node-red-STM32/OZE_Main/Debug/OZE_Main.list

OZE_Main.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   00000298  08000000  08000000  00001000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         0002c1c0  080002a0  080002a0  000012a0  2**4
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       00004c9c  0802c460  0802c460  0002d460  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .ARM          00000008  080310fc  080310fc  000320fc  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  4 .init_array   00000004  08031104  08031104  00032104  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  5 .fini_array   00000004  08031108  08031108  00032108  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  6 .data         00000224  24000000  0803110c  00033000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  7 .bss          0002af64  24000224  08031330  00033224  2**2
                  ALLOC
  8 ._user_heap_stack 00000600  2402b188  08031330  00034188  2**0
                  ALLOC
  9 .lwip_sec     000193fb  2402b788  08031330  00033788  2**2
                  ALLOC
 10 .ARM.attributes 0000002e  00000000  00000000  00033224  2**0
                  CONTENTS, READONLY
 11 .debug_info   00050eec  00000000  00000000  00033252  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 12 .debug_abbrev 0000b5ee  00000000  00000000  0008413e  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 13 .debug_aranges 00003788  00000000  00000000  0008f730  2**3
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 14 .debug_rnglists 00002c6b  00000000  00000000  00092eb8  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 15 .debug_macro  0004f045  00000000  00000000  00095b23  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 16 .debug_line   000570e7  00000000  00000000  000e4b68  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 17 .debug_str    0018e57b  00000000  00000000  0013bc4f  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 18 .comment      00000043  00000000  00000000  002ca1ca  2**0
                  CONTENTS, READONLY
 19 .debug_frame  0000f94c  00000000  00000000  002ca210  2**2
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 20 .debug_line_str 00000064  00000000  00000000  002d9b5c  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS

Disassembly of section .text:

080002a0 <__do_global_dtors_aux>:
 80002a0:	b510      	push	{r4, lr}
 80002a2:	4c05      	ldr	r4, [pc, #20]	@ (80002b8 <__do_global_dtors_aux+0x18>)
 80002a4:	7823      	ldrb	r3, [r4, #0]
 80002a6:	b933      	cbnz	r3, 80002b6 <__do_global_dtors_aux+0x16>
 80002a8:	4b04      	ldr	r3, [pc, #16]	@ (80002bc <__do_global_dtors_aux+0x1c>)
 80002aa:	b113      	cbz	r3, 80002b2 <__do_global_dtors_aux+0x12>
 80002ac:	4804      	ldr	r0, [pc, #16]	@ (80002c0 <__do_global_dtors_aux+0x20>)
 80002ae:	f3af 8000 	nop.w
 80002b2:	2301      	movs	r3, #1
 80002b4:	7023      	strb	r3, [r4, #0]
 80002b6:	bd10      	pop	{r4, pc}
 80002b8:	24000224 	.word	0x24000224
 80002bc:	00000000 	.word	0x00000000
 80002c0:	0802c448 	.word	0x0802c448

080002c4 <frame_dummy>:
 80002c4:	b508      	push	{r3, lr}
 80002c6:	4b03      	ldr	r3, [pc, #12]	@ (80002d4 <frame_dummy+0x10>)
 80002c8:	b11b      	cbz	r3, 80002d2 <frame_dummy+0xe>
 80002ca:	4903      	ldr	r1, [pc, #12]	@ (80002d8 <frame_dummy+0x14>)
 80002cc:	4803      	ldr	r0, [pc, #12]	@ (80002dc <frame_dummy+0x18>)
 80002ce:	f3af 8000 	nop.w
 80002d2:	bd08      	pop	{r3, pc}
 80002d4:	00000000 	.word	0x00000000
 80002d8:	24000228 	.word	0x24000228
 80002dc:	0802c448 	.word	0x0802c448

080002e0 <strcmp>:
 80002e0:	f810 2b01 	ldrb.w	r2, [r0], #1
 80002e4:	f811 3b01 	ldrb.w	r3, [r1], #1
 80002e8:	2a01      	cmp	r2, #1
 80002ea:	bf28      	it	cs
 80002ec:	429a      	cmpcs	r2, r3
 80002ee:	d0f7      	beq.n	80002e0 <strcmp>
 80002f0:	1ad0      	subs	r0, r2, r3
 80002f2:	4770      	bx	lr
	...

08000300 <memchr>:
 8000300:	f001 01ff 	and.w	r1, r1, #255	@ 0xff
 8000304:	2a10      	cmp	r2, #16
 8000306:	db2b      	blt.n	8000360 <memchr+0x60>
 8000308:	f010 0f07 	tst.w	r0, #7
 800030c:	d008      	beq.n	8000320 <memchr+0x20>
 800030e:	f810 3b01 	ldrb.w	r3, [r0], #1
 8000312:	3a01      	subs	r2, #1
 8000314:	428b      	cmp	r3, r1
 8000316:	d02d      	beq.n	8000374 <memchr+0x74>
 8000318:	f010 0f07 	tst.w	r0, #7
 800031c:	b342      	cbz	r2, 8000370 <memchr+0x70>
 800031e:	d1f6      	bne.n	800030e <memchr+0xe>
 8000320:	b4f0      	push	{r4, r5, r6, r7}
 8000322:	ea41 2101 	orr.w	r1, r1, r1, lsl #8
 8000326:	ea41 4101 	orr.w	r1, r1, r1, lsl #16
 800032a:	f022 0407 	bic.w	r4, r2, #7
 800032e:	f07f 0700 	mvns.w	r7, #0
 8000332:	2300      	movs	r3, #0
 8000334:	e8f0 5602 	ldrd	r5, r6, [r0], #8
 8000338:	3c08      	subs	r4, #8
 800033a:	ea85 0501 	eor.w	r5, r5, r1
 800033e:	ea86 0601 	eor.w	r6, r6, r1
 8000342:	fa85 f547 	uadd8	r5, r5, r7
 8000346:	faa3 f587 	sel	r5, r3, r7
 800034a:	fa86 f647 	uadd8	r6, r6, r7
 800034e:	faa5 f687 	sel	r6, r5, r7
 8000352:	b98e      	cbnz	r6, 8000378 <memchr+0x78>
 8000354:	d1ee      	bne.n	8000334 <memchr+0x34>
 8000356:	bcf0      	pop	{r4, r5, r6, r7}
 8000358:	f001 01ff 	and.w	r1, r1, #255	@ 0xff
 800035c:	f002 0207 	and.w	r2, r2, #7
 8000360:	b132      	cbz	r2, 8000370 <memchr+0x70>
 8000362:	f810 3b01 	ldrb.w	r3, [r0], #1
 8000366:	3a01      	subs	r2, #1
 8000368:	ea83 0301 	eor.w	r3, r3, r1
 800036c:	b113      	cbz	r3, 8000374 <memchr+0x74>
 800036e:	d1f8      	bne.n	8000362 <memchr+0x62>
 8000370:	2000      	movs	r0, #0
 8000372:	4770      	bx	lr
 8000374:	3801      	subs	r0, #1
 8000376:	4770      	bx	lr
 8000378:	2d00      	cmp	r5, #0
 800037a:	bf06      	itte	eq
 800037c:	4635      	moveq	r5, r6
 800037e:	3803      	subeq	r0, #3
 8000380:	3807      	subne	r0, #7
 8000382:	f015 0f01 	tst.w	r5, #1
 8000386:	d107      	bne.n	8000398 <memchr+0x98>
 8000388:	3001      	adds	r0, #1
 800038a:	f415 7f80 	tst.w	r5, #256	@ 0x100
 800038e:	bf02      	ittt	eq
 8000390:	3001      	addeq	r0, #1
 8000392:	f415 3fc0 	tsteq.w	r5, #98304	@ 0x18000
 8000396:	3001      	addeq	r0, #1
 8000398:	bcf0      	pop	{r4, r5, r6, r7}
 800039a:	3801      	subs	r0, #1
 800039c:	4770      	bx	lr
 800039e:	bf00      	nop

080003a0 <strlen>:
 80003a0:	4603      	mov	r3, r0
 80003a2:	f813 2b01 	ldrb.w	r2, [r3], #1
 80003a6:	2a00      	cmp	r2, #0
 80003a8:	d1fb      	bne.n	80003a2 <strlen+0x2>
 80003aa:	1a18      	subs	r0, r3, r0
 80003ac:	3801      	subs	r0, #1
 80003ae:	4770      	bx	lr

080003b0 <__aeabi_drsub>:
 80003b0:	f081 4100 	eor.w	r1, r1, #2147483648	@ 0x80000000
 80003b4:	e002      	b.n	80003bc <__adddf3>
 80003b6:	bf00      	nop

080003b8 <__aeabi_dsub>:
 80003b8:	f083 4300 	eor.w	r3, r3, #2147483648	@ 0x80000000

080003bc <__adddf3>:
 80003bc:	b530      	push	{r4, r5, lr}
 80003be:	ea4f 0441 	mov.w	r4, r1, lsl #1
 80003c2:	ea4f 0543 	mov.w	r5, r3, lsl #1
 80003c6:	ea94 0f05 	teq	r4, r5
 80003ca:	bf08      	it	eq
 80003cc:	ea90 0f02 	teqeq	r0, r2
 80003d0:	bf1f      	itttt	ne
 80003d2:	ea54 0c00 	orrsne.w	ip, r4, r0
 80003d6:	ea55 0c02 	orrsne.w	ip, r5, r2
 80003da:	ea7f 5c64 	mvnsne.w	ip, r4, asr #21
 80003de:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 80003e2:	f000 80e2 	beq.w	80005aa <__adddf3+0x1ee>
 80003e6:	ea4f 5454 	mov.w	r4, r4, lsr #21
 80003ea:	ebd4 5555 	rsbs	r5, r4, r5, lsr #21
 80003ee:	bfb8      	it	lt
 80003f0:	426d      	neglt	r5, r5
 80003f2:	dd0c      	ble.n	800040e <__adddf3+0x52>
 80003f4:	442c      	add	r4, r5
 80003f6:	ea80 0202 	eor.w	r2, r0, r2
 80003fa:	ea81 0303 	eor.w	r3, r1, r3
 80003fe:	ea82 0000 	eor.w	r0, r2, r0
 8000402:	ea83 0101 	eor.w	r1, r3, r1
 8000406:	ea80 0202 	eor.w	r2, r0, r2
 800040a:	ea81 0303 	eor.w	r3, r1, r3
 800040e:	2d36      	cmp	r5, #54	@ 0x36
 8000410:	bf88      	it	hi
 8000412:	bd30      	pophi	{r4, r5, pc}
 8000414:	f011 4f00 	tst.w	r1, #2147483648	@ 0x80000000
 8000418:	ea4f 3101 	mov.w	r1, r1, lsl #12
 800041c:	f44f 1c80 	mov.w	ip, #1048576	@ 0x100000
 8000420:	ea4c 3111 	orr.w	r1, ip, r1, lsr #12
 8000424:	d002      	beq.n	800042c <__adddf3+0x70>
 8000426:	4240      	negs	r0, r0
 8000428:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 800042c:	f013 4f00 	tst.w	r3, #2147483648	@ 0x80000000
 8000430:	ea4f 3303 	mov.w	r3, r3, lsl #12
 8000434:	ea4c 3313 	orr.w	r3, ip, r3, lsr #12
 8000438:	d002      	beq.n	8000440 <__adddf3+0x84>
 800043a:	4252      	negs	r2, r2
 800043c:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
 8000440:	ea94 0f05 	teq	r4, r5
 8000444:	f000 80a7 	beq.w	8000596 <__adddf3+0x1da>
 8000448:	f1a4 0401 	sub.w	r4, r4, #1
 800044c:	f1d5 0e20 	rsbs	lr, r5, #32
 8000450:	db0d      	blt.n	800046e <__adddf3+0xb2>
 8000452:	fa02 fc0e 	lsl.w	ip, r2, lr
 8000456:	fa22 f205 	lsr.w	r2, r2, r5
 800045a:	1880      	adds	r0, r0, r2
 800045c:	f141 0100 	adc.w	r1, r1, #0
 8000460:	fa03 f20e 	lsl.w	r2, r3, lr
 8000464:	1880      	adds	r0, r0, r2
 8000466:	fa43 f305 	asr.w	r3, r3, r5
 800046a:	4159      	adcs	r1, r3
 800046c:	e00e      	b.n	800048c <__adddf3+0xd0>
 800046e:	f1a5 0520 	sub.w	r5, r5, #32
 8000472:	f10e 0e20 	add.w	lr, lr, #32
 8000476:	2a01      	cmp	r2, #1
 8000478:	fa03 fc0e 	lsl.w	ip, r3, lr
 800047c:	bf28      	it	cs
 800047e:	f04c 0c02 	orrcs.w	ip, ip, #2
 8000482:	fa43 f305 	asr.w	r3, r3, r5
 8000486:	18c0      	adds	r0, r0, r3
 8000488:	eb51 71e3 	adcs.w	r1, r1, r3, asr #31
 800048c:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 8000490:	d507      	bpl.n	80004a2 <__adddf3+0xe6>
 8000492:	f04f 0e00 	mov.w	lr, #0
 8000496:	f1dc 0c00 	rsbs	ip, ip, #0
 800049a:	eb7e 0000 	sbcs.w	r0, lr, r0
 800049e:	eb6e 0101 	sbc.w	r1, lr, r1
 80004a2:	f5b1 1f80 	cmp.w	r1, #1048576	@ 0x100000
 80004a6:	d31b      	bcc.n	80004e0 <__adddf3+0x124>
 80004a8:	f5b1 1f00 	cmp.w	r1, #2097152	@ 0x200000
 80004ac:	d30c      	bcc.n	80004c8 <__adddf3+0x10c>
 80004ae:	0849      	lsrs	r1, r1, #1
 80004b0:	ea5f 0030 	movs.w	r0, r0, rrx
 80004b4:	ea4f 0c3c 	mov.w	ip, ip, rrx
 80004b8:	f104 0401 	add.w	r4, r4, #1
 80004bc:	ea4f 5244 	mov.w	r2, r4, lsl #21
 80004c0:	f512 0f80 	cmn.w	r2, #4194304	@ 0x400000
 80004c4:	f080 809a 	bcs.w	80005fc <__adddf3+0x240>
 80004c8:	f1bc 4f00 	cmp.w	ip, #2147483648	@ 0x80000000
 80004cc:	bf08      	it	eq
 80004ce:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
 80004d2:	f150 0000 	adcs.w	r0, r0, #0
 80004d6:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 80004da:	ea41 0105 	orr.w	r1, r1, r5
 80004de:	bd30      	pop	{r4, r5, pc}
 80004e0:	ea5f 0c4c 	movs.w	ip, ip, lsl #1
 80004e4:	4140      	adcs	r0, r0
 80004e6:	eb41 0101 	adc.w	r1, r1, r1
 80004ea:	3c01      	subs	r4, #1
 80004ec:	bf28      	it	cs
 80004ee:	f5b1 1f80 	cmpcs.w	r1, #1048576	@ 0x100000
 80004f2:	d2e9      	bcs.n	80004c8 <__adddf3+0x10c>
 80004f4:	f091 0f00 	teq	r1, #0
 80004f8:	bf04      	itt	eq
 80004fa:	4601      	moveq	r1, r0
 80004fc:	2000      	moveq	r0, #0
 80004fe:	fab1 f381 	clz	r3, r1
 8000502:	bf08      	it	eq
 8000504:	3320      	addeq	r3, #32
 8000506:	f1a3 030b 	sub.w	r3, r3, #11
 800050a:	f1b3 0220 	subs.w	r2, r3, #32
 800050e:	da0c      	bge.n	800052a <__adddf3+0x16e>
 8000510:	320c      	adds	r2, #12
 8000512:	dd08      	ble.n	8000526 <__adddf3+0x16a>
 8000514:	f102 0c14 	add.w	ip, r2, #20
 8000518:	f1c2 020c 	rsb	r2, r2, #12
 800051c:	fa01 f00c 	lsl.w	r0, r1, ip
 8000520:	fa21 f102 	lsr.w	r1, r1, r2
 8000524:	e00c      	b.n	8000540 <__adddf3+0x184>
 8000526:	f102 0214 	add.w	r2, r2, #20
 800052a:	bfd8      	it	le
 800052c:	f1c2 0c20 	rsble	ip, r2, #32
 8000530:	fa01 f102 	lsl.w	r1, r1, r2
 8000534:	fa20 fc0c 	lsr.w	ip, r0, ip
 8000538:	bfdc      	itt	le
 800053a:	ea41 010c 	orrle.w	r1, r1, ip
 800053e:	4090      	lslle	r0, r2
 8000540:	1ae4      	subs	r4, r4, r3
 8000542:	bfa2      	ittt	ge
 8000544:	eb01 5104 	addge.w	r1, r1, r4, lsl #20
 8000548:	4329      	orrge	r1, r5
 800054a:	bd30      	popge	{r4, r5, pc}
 800054c:	ea6f 0404 	mvn.w	r4, r4
 8000550:	3c1f      	subs	r4, #31
 8000552:	da1c      	bge.n	800058e <__adddf3+0x1d2>
 8000554:	340c      	adds	r4, #12
 8000556:	dc0e      	bgt.n	8000576 <__adddf3+0x1ba>
 8000558:	f104 0414 	add.w	r4, r4, #20
 800055c:	f1c4 0220 	rsb	r2, r4, #32
 8000560:	fa20 f004 	lsr.w	r0, r0, r4
 8000564:	fa01 f302 	lsl.w	r3, r1, r2
 8000568:	ea40 0003 	orr.w	r0, r0, r3
 800056c:	fa21 f304 	lsr.w	r3, r1, r4
 8000570:	ea45 0103 	orr.w	r1, r5, r3
 8000574:	bd30      	pop	{r4, r5, pc}
 8000576:	f1c4 040c 	rsb	r4, r4, #12
 800057a:	f1c4 0220 	rsb	r2, r4, #32
 800057e:	fa20 f002 	lsr.w	r0, r0, r2
 8000582:	fa01 f304 	lsl.w	r3, r1, r4
 8000586:	ea40 0003 	orr.w	r0, r0, r3
 800058a:	4629      	mov	r1, r5
 800058c:	bd30      	pop	{r4, r5, pc}
 800058e:	fa21 f004 	lsr.w	r0, r1, r4
 8000592:	4629      	mov	r1, r5
 8000594:	bd30      	pop	{r4, r5, pc}
 8000596:	f094 0f00 	teq	r4, #0
 800059a:	f483 1380 	eor.w	r3, r3, #1048576	@ 0x100000
 800059e:	bf06      	itte	eq
 80005a0:	f481 1180 	eoreq.w	r1, r1, #1048576	@ 0x100000
 80005a4:	3401      	addeq	r4, #1
 80005a6:	3d01      	subne	r5, #1
 80005a8:	e74e      	b.n	8000448 <__adddf3+0x8c>
 80005aa:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 80005ae:	bf18      	it	ne
 80005b0:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 80005b4:	d029      	beq.n	800060a <__adddf3+0x24e>
 80005b6:	ea94 0f05 	teq	r4, r5
 80005ba:	bf08      	it	eq
 80005bc:	ea90 0f02 	teqeq	r0, r2
 80005c0:	d005      	beq.n	80005ce <__adddf3+0x212>
 80005c2:	ea54 0c00 	orrs.w	ip, r4, r0
 80005c6:	bf04      	itt	eq
 80005c8:	4619      	moveq	r1, r3
 80005ca:	4610      	moveq	r0, r2
 80005cc:	bd30      	pop	{r4, r5, pc}
 80005ce:	ea91 0f03 	teq	r1, r3
 80005d2:	bf1e      	ittt	ne
 80005d4:	2100      	movne	r1, #0
 80005d6:	2000      	movne	r0, #0
 80005d8:	bd30      	popne	{r4, r5, pc}
 80005da:	ea5f 5c54 	movs.w	ip, r4, lsr #21
 80005de:	d105      	bne.n	80005ec <__adddf3+0x230>
 80005e0:	0040      	lsls	r0, r0, #1
 80005e2:	4149      	adcs	r1, r1
 80005e4:	bf28      	it	cs
 80005e6:	f041 4100 	orrcs.w	r1, r1, #2147483648	@ 0x80000000
 80005ea:	bd30      	pop	{r4, r5, pc}
 80005ec:	f514 0480 	adds.w	r4, r4, #4194304	@ 0x400000
 80005f0:	bf3c      	itt	cc
 80005f2:	f501 1180 	addcc.w	r1, r1, #1048576	@ 0x100000
 80005f6:	bd30      	popcc	{r4, r5, pc}
 80005f8:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 80005fc:	f045 41fe 	orr.w	r1, r5, #2130706432	@ 0x7f000000
 8000600:	f441 0170 	orr.w	r1, r1, #15728640	@ 0xf00000
 8000604:	f04f 0000 	mov.w	r0, #0
 8000608:	bd30      	pop	{r4, r5, pc}
 800060a:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 800060e:	bf1a      	itte	ne
 8000610:	4619      	movne	r1, r3
 8000612:	4610      	movne	r0, r2
 8000614:	ea7f 5c65 	mvnseq.w	ip, r5, asr #21
 8000618:	bf1c      	itt	ne
 800061a:	460b      	movne	r3, r1
 800061c:	4602      	movne	r2, r0
 800061e:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
 8000622:	bf06      	itte	eq
 8000624:	ea52 3503 	orrseq.w	r5, r2, r3, lsl #12
 8000628:	ea91 0f03 	teqeq	r1, r3
 800062c:	f441 2100 	orrne.w	r1, r1, #524288	@ 0x80000
 8000630:	bd30      	pop	{r4, r5, pc}
 8000632:	bf00      	nop

08000634 <__aeabi_ui2d>:
 8000634:	f090 0f00 	teq	r0, #0
 8000638:	bf04      	itt	eq
 800063a:	2100      	moveq	r1, #0
 800063c:	4770      	bxeq	lr
 800063e:	b530      	push	{r4, r5, lr}
 8000640:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 8000644:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 8000648:	f04f 0500 	mov.w	r5, #0
 800064c:	f04f 0100 	mov.w	r1, #0
 8000650:	e750      	b.n	80004f4 <__adddf3+0x138>
 8000652:	bf00      	nop

08000654 <__aeabi_i2d>:
 8000654:	f090 0f00 	teq	r0, #0
 8000658:	bf04      	itt	eq
 800065a:	2100      	moveq	r1, #0
 800065c:	4770      	bxeq	lr
 800065e:	b530      	push	{r4, r5, lr}
 8000660:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 8000664:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 8000668:	f010 4500 	ands.w	r5, r0, #2147483648	@ 0x80000000
 800066c:	bf48      	it	mi
 800066e:	4240      	negmi	r0, r0
 8000670:	f04f 0100 	mov.w	r1, #0
 8000674:	e73e      	b.n	80004f4 <__adddf3+0x138>
 8000676:	bf00      	nop

08000678 <__aeabi_f2d>:
 8000678:	0042      	lsls	r2, r0, #1
 800067a:	ea4f 01e2 	mov.w	r1, r2, asr #3
 800067e:	ea4f 0131 	mov.w	r1, r1, rrx
 8000682:	ea4f 7002 	mov.w	r0, r2, lsl #28
 8000686:	bf1f      	itttt	ne
 8000688:	f012 437f 	andsne.w	r3, r2, #4278190080	@ 0xff000000
 800068c:	f093 4f7f 	teqne	r3, #4278190080	@ 0xff000000
 8000690:	f081 5160 	eorne.w	r1, r1, #939524096	@ 0x38000000
 8000694:	4770      	bxne	lr
 8000696:	f032 427f 	bics.w	r2, r2, #4278190080	@ 0xff000000
 800069a:	bf08      	it	eq
 800069c:	4770      	bxeq	lr
 800069e:	f093 4f7f 	teq	r3, #4278190080	@ 0xff000000
 80006a2:	bf04      	itt	eq
 80006a4:	f441 2100 	orreq.w	r1, r1, #524288	@ 0x80000
 80006a8:	4770      	bxeq	lr
 80006aa:	b530      	push	{r4, r5, lr}
 80006ac:	f44f 7460 	mov.w	r4, #896	@ 0x380
 80006b0:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 80006b4:	f021 4100 	bic.w	r1, r1, #2147483648	@ 0x80000000
 80006b8:	e71c      	b.n	80004f4 <__adddf3+0x138>
 80006ba:	bf00      	nop

080006bc <__aeabi_ul2d>:
 80006bc:	ea50 0201 	orrs.w	r2, r0, r1
 80006c0:	bf08      	it	eq
 80006c2:	4770      	bxeq	lr
 80006c4:	b530      	push	{r4, r5, lr}
 80006c6:	f04f 0500 	mov.w	r5, #0
 80006ca:	e00a      	b.n	80006e2 <__aeabi_l2d+0x16>

080006cc <__aeabi_l2d>:
 80006cc:	ea50 0201 	orrs.w	r2, r0, r1
 80006d0:	bf08      	it	eq
 80006d2:	4770      	bxeq	lr
 80006d4:	b530      	push	{r4, r5, lr}
 80006d6:	f011 4500 	ands.w	r5, r1, #2147483648	@ 0x80000000
 80006da:	d502      	bpl.n	80006e2 <__aeabi_l2d+0x16>
 80006dc:	4240      	negs	r0, r0
 80006de:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 80006e2:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 80006e6:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 80006ea:	ea5f 5c91 	movs.w	ip, r1, lsr #22
 80006ee:	f43f aed8 	beq.w	80004a2 <__adddf3+0xe6>
 80006f2:	f04f 0203 	mov.w	r2, #3
 80006f6:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 80006fa:	bf18      	it	ne
 80006fc:	3203      	addne	r2, #3
 80006fe:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 8000702:	bf18      	it	ne
 8000704:	3203      	addne	r2, #3
 8000706:	eb02 02dc 	add.w	r2, r2, ip, lsr #3
 800070a:	f1c2 0320 	rsb	r3, r2, #32
 800070e:	fa00 fc03 	lsl.w	ip, r0, r3
 8000712:	fa20 f002 	lsr.w	r0, r0, r2
 8000716:	fa01 fe03 	lsl.w	lr, r1, r3
 800071a:	ea40 000e 	orr.w	r0, r0, lr
 800071e:	fa21 f102 	lsr.w	r1, r1, r2
 8000722:	4414      	add	r4, r2
 8000724:	e6bd      	b.n	80004a2 <__adddf3+0xe6>
 8000726:	bf00      	nop

08000728 <__aeabi_uldivmod>:
 8000728:	b953      	cbnz	r3, 8000740 <__aeabi_uldivmod+0x18>
 800072a:	b94a      	cbnz	r2, 8000740 <__aeabi_uldivmod+0x18>
 800072c:	2900      	cmp	r1, #0
 800072e:	bf08      	it	eq
 8000730:	2800      	cmpeq	r0, #0
 8000732:	bf1c      	itt	ne
 8000734:	f04f 31ff 	movne.w	r1, #4294967295	@ 0xffffffff
 8000738:	f04f 30ff 	movne.w	r0, #4294967295	@ 0xffffffff
 800073c:	f000 b9a2 	b.w	8000a84 <__aeabi_idiv0>
 8000740:	f1ad 0c08 	sub.w	ip, sp, #8
 8000744:	e96d ce04 	strd	ip, lr, [sp, #-16]!
 8000748:	f000 f83e 	bl	80007c8 <__udivmoddi4>
 800074c:	f8dd e004 	ldr.w	lr, [sp, #4]
 8000750:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8000754:	b004      	add	sp, #16
 8000756:	4770      	bx	lr

08000758 <__aeabi_d2lz>:
 8000758:	b508      	push	{r3, lr}
 800075a:	4602      	mov	r2, r0
 800075c:	460b      	mov	r3, r1
 800075e:	ec43 2b17 	vmov	d7, r2, r3
 8000762:	eeb5 7bc0 	vcmpe.f64	d7, #0.0
 8000766:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 800076a:	d403      	bmi.n	8000774 <__aeabi_d2lz+0x1c>
 800076c:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
 8000770:	f000 b80a 	b.w	8000788 <__aeabi_d2ulz>
 8000774:	eeb1 7b47 	vneg.f64	d7, d7
 8000778:	ec51 0b17 	vmov	r0, r1, d7
 800077c:	f000 f804 	bl	8000788 <__aeabi_d2ulz>
 8000780:	4240      	negs	r0, r0
 8000782:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 8000786:	bd08      	pop	{r3, pc}

08000788 <__aeabi_d2ulz>:
 8000788:	ed9f 6b0b 	vldr	d6, [pc, #44]	@ 80007b8 <__aeabi_d2ulz+0x30>
 800078c:	ec41 0b17 	vmov	d7, r0, r1
 8000790:	ed9f 5b0b 	vldr	d5, [pc, #44]	@ 80007c0 <__aeabi_d2ulz+0x38>
 8000794:	ee27 6b06 	vmul.f64	d6, d7, d6
 8000798:	eebc 6bc6 	vcvt.u32.f64	s12, d6
 800079c:	eeb8 4b46 	vcvt.f64.u32	d4, s12
 80007a0:	eea4 7b45 	vfms.f64	d7, d4, d5
 80007a4:	eefc 7bc7 	vcvt.u32.f64	s15, d7
 80007a8:	ee16 1a10 	vmov	r1, s12
 80007ac:	ee17 0a90 	vmov	r0, s15
 80007b0:	4770      	bx	lr
 80007b2:	bf00      	nop
 80007b4:	f3af 8000 	nop.w
 80007b8:	00000000 	.word	0x00000000
 80007bc:	3df00000 	.word	0x3df00000
 80007c0:	00000000 	.word	0x00000000
 80007c4:	41f00000 	.word	0x41f00000

080007c8 <__udivmoddi4>:
 80007c8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 80007cc:	9d08      	ldr	r5, [sp, #32]
 80007ce:	460c      	mov	r4, r1
 80007d0:	2b00      	cmp	r3, #0
 80007d2:	d14e      	bne.n	8000872 <__udivmoddi4+0xaa>
 80007d4:	4694      	mov	ip, r2
 80007d6:	458c      	cmp	ip, r1
 80007d8:	4686      	mov	lr, r0
 80007da:	fab2 f282 	clz	r2, r2
 80007de:	d962      	bls.n	80008a6 <__udivmoddi4+0xde>
 80007e0:	b14a      	cbz	r2, 80007f6 <__udivmoddi4+0x2e>
 80007e2:	f1c2 0320 	rsb	r3, r2, #32
 80007e6:	4091      	lsls	r1, r2
 80007e8:	fa20 f303 	lsr.w	r3, r0, r3
 80007ec:	fa0c fc02 	lsl.w	ip, ip, r2
 80007f0:	4319      	orrs	r1, r3
 80007f2:	fa00 fe02 	lsl.w	lr, r0, r2
 80007f6:	ea4f 471c 	mov.w	r7, ip, lsr #16
 80007fa:	fa1f f68c 	uxth.w	r6, ip
 80007fe:	fbb1 f4f7 	udiv	r4, r1, r7
 8000802:	ea4f 431e 	mov.w	r3, lr, lsr #16
 8000806:	fb07 1114 	mls	r1, r7, r4, r1
 800080a:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 800080e:	fb04 f106 	mul.w	r1, r4, r6
 8000812:	4299      	cmp	r1, r3
 8000814:	d90a      	bls.n	800082c <__udivmoddi4+0x64>
 8000816:	eb1c 0303 	adds.w	r3, ip, r3
 800081a:	f104 30ff 	add.w	r0, r4, #4294967295	@ 0xffffffff
 800081e:	f080 8112 	bcs.w	8000a46 <__udivmoddi4+0x27e>
 8000822:	4299      	cmp	r1, r3
 8000824:	f240 810f 	bls.w	8000a46 <__udivmoddi4+0x27e>
 8000828:	3c02      	subs	r4, #2
 800082a:	4463      	add	r3, ip
 800082c:	1a59      	subs	r1, r3, r1
 800082e:	fa1f f38e 	uxth.w	r3, lr
 8000832:	fbb1 f0f7 	udiv	r0, r1, r7
 8000836:	fb07 1110 	mls	r1, r7, r0, r1
 800083a:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 800083e:	fb00 f606 	mul.w	r6, r0, r6
 8000842:	429e      	cmp	r6, r3
 8000844:	d90a      	bls.n	800085c <__udivmoddi4+0x94>
 8000846:	eb1c 0303 	adds.w	r3, ip, r3
 800084a:	f100 31ff 	add.w	r1, r0, #4294967295	@ 0xffffffff
 800084e:	f080 80fc 	bcs.w	8000a4a <__udivmoddi4+0x282>
 8000852:	429e      	cmp	r6, r3
 8000854:	f240 80f9 	bls.w	8000a4a <__udivmoddi4+0x282>
 8000858:	4463      	add	r3, ip
 800085a:	3802      	subs	r0, #2
 800085c:	1b9b      	subs	r3, r3, r6
 800085e:	ea40 4004 	orr.w	r0, r0, r4, lsl #16
 8000862:	2100      	movs	r1, #0
 8000864:	b11d      	cbz	r5, 800086e <__udivmoddi4+0xa6>
 8000866:	40d3      	lsrs	r3, r2
 8000868:	2200      	movs	r2, #0
 800086a:	e9c5 3200 	strd	r3, r2, [r5]
 800086e:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8000872:	428b      	cmp	r3, r1
 8000874:	d905      	bls.n	8000882 <__udivmoddi4+0xba>
 8000876:	b10d      	cbz	r5, 800087c <__udivmoddi4+0xb4>
 8000878:	e9c5 0100 	strd	r0, r1, [r5]
 800087c:	2100      	movs	r1, #0
 800087e:	4608      	mov	r0, r1
 8000880:	e7f5      	b.n	800086e <__udivmoddi4+0xa6>
 8000882:	fab3 f183 	clz	r1, r3
 8000886:	2900      	cmp	r1, #0
 8000888:	d146      	bne.n	8000918 <__udivmoddi4+0x150>
 800088a:	42a3      	cmp	r3, r4
 800088c:	d302      	bcc.n	8000894 <__udivmoddi4+0xcc>
 800088e:	4290      	cmp	r0, r2
 8000890:	f0c0 80f0 	bcc.w	8000a74 <__udivmoddi4+0x2ac>
 8000894:	1a86      	subs	r6, r0, r2
 8000896:	eb64 0303 	sbc.w	r3, r4, r3
 800089a:	2001      	movs	r0, #1
 800089c:	2d00      	cmp	r5, #0
 800089e:	d0e6      	beq.n	800086e <__udivmoddi4+0xa6>
 80008a0:	e9c5 6300 	strd	r6, r3, [r5]
 80008a4:	e7e3      	b.n	800086e <__udivmoddi4+0xa6>
 80008a6:	2a00      	cmp	r2, #0
 80008a8:	f040 8090 	bne.w	80009cc <__udivmoddi4+0x204>
 80008ac:	eba1 040c 	sub.w	r4, r1, ip
 80008b0:	ea4f 481c 	mov.w	r8, ip, lsr #16
 80008b4:	fa1f f78c 	uxth.w	r7, ip
 80008b8:	2101      	movs	r1, #1
 80008ba:	fbb4 f6f8 	udiv	r6, r4, r8
 80008be:	ea4f 431e 	mov.w	r3, lr, lsr #16
 80008c2:	fb08 4416 	mls	r4, r8, r6, r4
 80008c6:	ea43 4304 	orr.w	r3, r3, r4, lsl #16
 80008ca:	fb07 f006 	mul.w	r0, r7, r6
 80008ce:	4298      	cmp	r0, r3
 80008d0:	d908      	bls.n	80008e4 <__udivmoddi4+0x11c>
 80008d2:	eb1c 0303 	adds.w	r3, ip, r3
 80008d6:	f106 34ff 	add.w	r4, r6, #4294967295	@ 0xffffffff
 80008da:	d202      	bcs.n	80008e2 <__udivmoddi4+0x11a>
 80008dc:	4298      	cmp	r0, r3
 80008de:	f200 80cd 	bhi.w	8000a7c <__udivmoddi4+0x2b4>
 80008e2:	4626      	mov	r6, r4
 80008e4:	1a1c      	subs	r4, r3, r0
 80008e6:	fa1f f38e 	uxth.w	r3, lr
 80008ea:	fbb4 f0f8 	udiv	r0, r4, r8
 80008ee:	fb08 4410 	mls	r4, r8, r0, r4
 80008f2:	ea43 4304 	orr.w	r3, r3, r4, lsl #16
 80008f6:	fb00 f707 	mul.w	r7, r0, r7
 80008fa:	429f      	cmp	r7, r3
 80008fc:	d908      	bls.n	8000910 <__udivmoddi4+0x148>
 80008fe:	eb1c 0303 	adds.w	r3, ip, r3
 8000902:	f100 34ff 	add.w	r4, r0, #4294967295	@ 0xffffffff
 8000906:	d202      	bcs.n	800090e <__udivmoddi4+0x146>
 8000908:	429f      	cmp	r7, r3
 800090a:	f200 80b0 	bhi.w	8000a6e <__udivmoddi4+0x2a6>
 800090e:	4620      	mov	r0, r4
 8000910:	1bdb      	subs	r3, r3, r7
 8000912:	ea40 4006 	orr.w	r0, r0, r6, lsl #16
 8000916:	e7a5      	b.n	8000864 <__udivmoddi4+0x9c>
 8000918:	f1c1 0620 	rsb	r6, r1, #32
 800091c:	408b      	lsls	r3, r1
 800091e:	fa22 f706 	lsr.w	r7, r2, r6
 8000922:	431f      	orrs	r7, r3
 8000924:	fa20 fc06 	lsr.w	ip, r0, r6
 8000928:	fa04 f301 	lsl.w	r3, r4, r1
 800092c:	ea43 030c 	orr.w	r3, r3, ip
 8000930:	40f4      	lsrs	r4, r6
 8000932:	fa00 f801 	lsl.w	r8, r0, r1
 8000936:	0c38      	lsrs	r0, r7, #16
 8000938:	ea4f 4913 	mov.w	r9, r3, lsr #16
 800093c:	fbb4 fef0 	udiv	lr, r4, r0
 8000940:	fa1f fc87 	uxth.w	ip, r7
 8000944:	fb00 441e 	mls	r4, r0, lr, r4
 8000948:	ea49 4404 	orr.w	r4, r9, r4, lsl #16
 800094c:	fb0e f90c 	mul.w	r9, lr, ip
 8000950:	45a1      	cmp	r9, r4
 8000952:	fa02 f201 	lsl.w	r2, r2, r1
 8000956:	d90a      	bls.n	800096e <__udivmoddi4+0x1a6>
 8000958:	193c      	adds	r4, r7, r4
 800095a:	f10e 3aff 	add.w	sl, lr, #4294967295	@ 0xffffffff
 800095e:	f080 8084 	bcs.w	8000a6a <__udivmoddi4+0x2a2>
 8000962:	45a1      	cmp	r9, r4
 8000964:	f240 8081 	bls.w	8000a6a <__udivmoddi4+0x2a2>
 8000968:	f1ae 0e02 	sub.w	lr, lr, #2
 800096c:	443c      	add	r4, r7
 800096e:	eba4 0409 	sub.w	r4, r4, r9
 8000972:	fa1f f983 	uxth.w	r9, r3
 8000976:	fbb4 f3f0 	udiv	r3, r4, r0
 800097a:	fb00 4413 	mls	r4, r0, r3, r4
 800097e:	ea49 4404 	orr.w	r4, r9, r4, lsl #16
 8000982:	fb03 fc0c 	mul.w	ip, r3, ip
 8000986:	45a4      	cmp	ip, r4
 8000988:	d907      	bls.n	800099a <__udivmoddi4+0x1d2>
 800098a:	193c      	adds	r4, r7, r4
 800098c:	f103 30ff 	add.w	r0, r3, #4294967295	@ 0xffffffff
 8000990:	d267      	bcs.n	8000a62 <__udivmoddi4+0x29a>
 8000992:	45a4      	cmp	ip, r4
 8000994:	d965      	bls.n	8000a62 <__udivmoddi4+0x29a>
 8000996:	3b02      	subs	r3, #2
 8000998:	443c      	add	r4, r7
 800099a:	ea43 400e 	orr.w	r0, r3, lr, lsl #16
 800099e:	fba0 9302 	umull	r9, r3, r0, r2
 80009a2:	eba4 040c 	sub.w	r4, r4, ip
 80009a6:	429c      	cmp	r4, r3
 80009a8:	46ce      	mov	lr, r9
 80009aa:	469c      	mov	ip, r3
 80009ac:	d351      	bcc.n	8000a52 <__udivmoddi4+0x28a>
 80009ae:	d04e      	beq.n	8000a4e <__udivmoddi4+0x286>
 80009b0:	b155      	cbz	r5, 80009c8 <__udivmoddi4+0x200>
 80009b2:	ebb8 030e 	subs.w	r3, r8, lr
 80009b6:	eb64 040c 	sbc.w	r4, r4, ip
 80009ba:	fa04 f606 	lsl.w	r6, r4, r6
 80009be:	40cb      	lsrs	r3, r1
 80009c0:	431e      	orrs	r6, r3
 80009c2:	40cc      	lsrs	r4, r1
 80009c4:	e9c5 6400 	strd	r6, r4, [r5]
 80009c8:	2100      	movs	r1, #0
 80009ca:	e750      	b.n	800086e <__udivmoddi4+0xa6>
 80009cc:	f1c2 0320 	rsb	r3, r2, #32
 80009d0:	fa20 f103 	lsr.w	r1, r0, r3
 80009d4:	fa0c fc02 	lsl.w	ip, ip, r2
 80009d8:	fa24 f303 	lsr.w	r3, r4, r3
 80009dc:	4094      	lsls	r4, r2
 80009de:	430c      	orrs	r4, r1
 80009e0:	ea4f 481c 	mov.w	r8, ip, lsr #16
 80009e4:	fa00 fe02 	lsl.w	lr, r0, r2
 80009e8:	fa1f f78c 	uxth.w	r7, ip
 80009ec:	fbb3 f0f8 	udiv	r0, r3, r8
 80009f0:	fb08 3110 	mls	r1, r8, r0, r3
 80009f4:	0c23      	lsrs	r3, r4, #16
 80009f6:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 80009fa:	fb00 f107 	mul.w	r1, r0, r7
 80009fe:	4299      	cmp	r1, r3
 8000a00:	d908      	bls.n	8000a14 <__udivmoddi4+0x24c>
 8000a02:	eb1c 0303 	adds.w	r3, ip, r3
 8000a06:	f100 36ff 	add.w	r6, r0, #4294967295	@ 0xffffffff
 8000a0a:	d22c      	bcs.n	8000a66 <__udivmoddi4+0x29e>
 8000a0c:	4299      	cmp	r1, r3
 8000a0e:	d92a      	bls.n	8000a66 <__udivmoddi4+0x29e>
 8000a10:	3802      	subs	r0, #2
 8000a12:	4463      	add	r3, ip
 8000a14:	1a5b      	subs	r3, r3, r1
 8000a16:	b2a4      	uxth	r4, r4
 8000a18:	fbb3 f1f8 	udiv	r1, r3, r8
 8000a1c:	fb08 3311 	mls	r3, r8, r1, r3
 8000a20:	ea44 4403 	orr.w	r4, r4, r3, lsl #16
 8000a24:	fb01 f307 	mul.w	r3, r1, r7
 8000a28:	42a3      	cmp	r3, r4
 8000a2a:	d908      	bls.n	8000a3e <__udivmoddi4+0x276>
 8000a2c:	eb1c 0404 	adds.w	r4, ip, r4
 8000a30:	f101 36ff 	add.w	r6, r1, #4294967295	@ 0xffffffff
 8000a34:	d213      	bcs.n	8000a5e <__udivmoddi4+0x296>
 8000a36:	42a3      	cmp	r3, r4
 8000a38:	d911      	bls.n	8000a5e <__udivmoddi4+0x296>
 8000a3a:	3902      	subs	r1, #2
 8000a3c:	4464      	add	r4, ip
 8000a3e:	1ae4      	subs	r4, r4, r3
 8000a40:	ea41 4100 	orr.w	r1, r1, r0, lsl #16
 8000a44:	e739      	b.n	80008ba <__udivmoddi4+0xf2>
 8000a46:	4604      	mov	r4, r0
 8000a48:	e6f0      	b.n	800082c <__udivmoddi4+0x64>
 8000a4a:	4608      	mov	r0, r1
 8000a4c:	e706      	b.n	800085c <__udivmoddi4+0x94>
 8000a4e:	45c8      	cmp	r8, r9
 8000a50:	d2ae      	bcs.n	80009b0 <__udivmoddi4+0x1e8>
 8000a52:	ebb9 0e02 	subs.w	lr, r9, r2
 8000a56:	eb63 0c07 	sbc.w	ip, r3, r7
 8000a5a:	3801      	subs	r0, #1
 8000a5c:	e7a8      	b.n	80009b0 <__udivmoddi4+0x1e8>
 8000a5e:	4631      	mov	r1, r6
 8000a60:	e7ed      	b.n	8000a3e <__udivmoddi4+0x276>
 8000a62:	4603      	mov	r3, r0
 8000a64:	e799      	b.n	800099a <__udivmoddi4+0x1d2>
 8000a66:	4630      	mov	r0, r6
 8000a68:	e7d4      	b.n	8000a14 <__udivmoddi4+0x24c>
 8000a6a:	46d6      	mov	lr, sl
 8000a6c:	e77f      	b.n	800096e <__udivmoddi4+0x1a6>
 8000a6e:	4463      	add	r3, ip
 8000a70:	3802      	subs	r0, #2
 8000a72:	e74d      	b.n	8000910 <__udivmoddi4+0x148>
 8000a74:	4606      	mov	r6, r0
 8000a76:	4623      	mov	r3, r4
 8000a78:	4608      	mov	r0, r1
 8000a7a:	e70f      	b.n	800089c <__udivmoddi4+0xd4>
 8000a7c:	3e02      	subs	r6, #2
 8000a7e:	4463      	add	r3, ip
 8000a80:	e730      	b.n	80008e4 <__udivmoddi4+0x11c>
 8000a82:	bf00      	nop

08000a84 <__aeabi_idiv0>:
 8000a84:	4770      	bx	lr
 8000a86:	bf00      	nop

08000a88 <case_insensitive_strcmp>:
    return version;
}

/* Case insensitive string comparison, doesn't consider two NULL pointers equal though */
static int case_insensitive_strcmp(const unsigned char *string1, const unsigned char *string2)
{
 8000a88:	b480      	push	{r7}
 8000a8a:	b085      	sub	sp, #20
 8000a8c:	af00      	add	r7, sp, #0
 8000a8e:	6078      	str	r0, [r7, #4]
 8000a90:	6039      	str	r1, [r7, #0]
    if ((string1 == NULL) || (string2 == NULL))
 8000a92:	687b      	ldr	r3, [r7, #4]
 8000a94:	2b00      	cmp	r3, #0
 8000a96:	d002      	beq.n	8000a9e <case_insensitive_strcmp+0x16>
 8000a98:	683b      	ldr	r3, [r7, #0]
 8000a9a:	2b00      	cmp	r3, #0
 8000a9c:	d101      	bne.n	8000aa2 <case_insensitive_strcmp+0x1a>
    {
        return 1;
 8000a9e:	2301      	movs	r3, #1
 8000aa0:	e056      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    }

    if (string1 == string2)
 8000aa2:	687a      	ldr	r2, [r7, #4]
 8000aa4:	683b      	ldr	r3, [r7, #0]
 8000aa6:	429a      	cmp	r2, r3
 8000aa8:	d10d      	bne.n	8000ac6 <case_insensitive_strcmp+0x3e>
    {
        return 0;
 8000aaa:	2300      	movs	r3, #0
 8000aac:	e050      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    }

    for(; tolower(*string1) == tolower(*string2); (void)string1++, string2++)
    {
        if (*string1 == '\0')
 8000aae:	687b      	ldr	r3, [r7, #4]
 8000ab0:	781b      	ldrb	r3, [r3, #0]
 8000ab2:	2b00      	cmp	r3, #0
 8000ab4:	d101      	bne.n	8000aba <case_insensitive_strcmp+0x32>
        {
            return 0;
 8000ab6:	2300      	movs	r3, #0
 8000ab8:	e04a      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    for(; tolower(*string1) == tolower(*string2); (void)string1++, string2++)
 8000aba:	687b      	ldr	r3, [r7, #4]
 8000abc:	3301      	adds	r3, #1
 8000abe:	607b      	str	r3, [r7, #4]
 8000ac0:	683b      	ldr	r3, [r7, #0]
 8000ac2:	3301      	adds	r3, #1
 8000ac4:	603b      	str	r3, [r7, #0]
 8000ac6:	687b      	ldr	r3, [r7, #4]
 8000ac8:	781b      	ldrb	r3, [r3, #0]
 8000aca:	73fb      	strb	r3, [r7, #15]
 8000acc:	7bfb      	ldrb	r3, [r7, #15]
 8000ace:	3301      	adds	r3, #1
 8000ad0:	4a22      	ldr	r2, [pc, #136]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000ad2:	4413      	add	r3, r2
 8000ad4:	781b      	ldrb	r3, [r3, #0]
 8000ad6:	f003 0303 	and.w	r3, r3, #3
 8000ada:	2b01      	cmp	r3, #1
 8000adc:	d103      	bne.n	8000ae6 <case_insensitive_strcmp+0x5e>
 8000ade:	7bfb      	ldrb	r3, [r7, #15]
 8000ae0:	f103 0220 	add.w	r2, r3, #32
 8000ae4:	e000      	b.n	8000ae8 <case_insensitive_strcmp+0x60>
 8000ae6:	7bfa      	ldrb	r2, [r7, #15]
 8000ae8:	683b      	ldr	r3, [r7, #0]
 8000aea:	781b      	ldrb	r3, [r3, #0]
 8000aec:	73bb      	strb	r3, [r7, #14]
 8000aee:	7bbb      	ldrb	r3, [r7, #14]
 8000af0:	3301      	adds	r3, #1
 8000af2:	491a      	ldr	r1, [pc, #104]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000af4:	440b      	add	r3, r1
 8000af6:	781b      	ldrb	r3, [r3, #0]
 8000af8:	f003 0303 	and.w	r3, r3, #3
 8000afc:	2b01      	cmp	r3, #1
 8000afe:	d102      	bne.n	8000b06 <case_insensitive_strcmp+0x7e>
 8000b00:	7bbb      	ldrb	r3, [r7, #14]
 8000b02:	3320      	adds	r3, #32
 8000b04:	e000      	b.n	8000b08 <case_insensitive_strcmp+0x80>
 8000b06:	7bbb      	ldrb	r3, [r7, #14]
 8000b08:	429a      	cmp	r2, r3
 8000b0a:	d0d0      	beq.n	8000aae <case_insensitive_strcmp+0x26>
        }
    }

    return tolower(*string1) - tolower(*string2);
 8000b0c:	687b      	ldr	r3, [r7, #4]
 8000b0e:	781b      	ldrb	r3, [r3, #0]
 8000b10:	737b      	strb	r3, [r7, #13]
 8000b12:	7b7b      	ldrb	r3, [r7, #13]
 8000b14:	3301      	adds	r3, #1
 8000b16:	4a11      	ldr	r2, [pc, #68]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000b18:	4413      	add	r3, r2
 8000b1a:	781b      	ldrb	r3, [r3, #0]
 8000b1c:	f003 0303 	and.w	r3, r3, #3
 8000b20:	2b01      	cmp	r3, #1
 8000b22:	d103      	bne.n	8000b2c <case_insensitive_strcmp+0xa4>
 8000b24:	7b7b      	ldrb	r3, [r7, #13]
 8000b26:	f103 0220 	add.w	r2, r3, #32
 8000b2a:	e000      	b.n	8000b2e <case_insensitive_strcmp+0xa6>
 8000b2c:	7b7a      	ldrb	r2, [r7, #13]
 8000b2e:	683b      	ldr	r3, [r7, #0]
 8000b30:	781b      	ldrb	r3, [r3, #0]
 8000b32:	733b      	strb	r3, [r7, #12]
 8000b34:	7b3b      	ldrb	r3, [r7, #12]
 8000b36:	3301      	adds	r3, #1
 8000b38:	4908      	ldr	r1, [pc, #32]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000b3a:	440b      	add	r3, r1
 8000b3c:	781b      	ldrb	r3, [r3, #0]
 8000b3e:	f003 0303 	and.w	r3, r3, #3
 8000b42:	2b01      	cmp	r3, #1
 8000b44:	d102      	bne.n	8000b4c <case_insensitive_strcmp+0xc4>
 8000b46:	7b3b      	ldrb	r3, [r7, #12]
 8000b48:	3320      	adds	r3, #32
 8000b4a:	e000      	b.n	8000b4e <case_insensitive_strcmp+0xc6>
 8000b4c:	7b3b      	ldrb	r3, [r7, #12]
 8000b4e:	1ad3      	subs	r3, r2, r3
}
 8000b50:	4618      	mov	r0, r3
 8000b52:	3714      	adds	r7, #20
 8000b54:	46bd      	mov	sp, r7
 8000b56:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000b5a:	4770      	bx	lr
 8000b5c:	08030d40 	.word	0x08030d40

08000b60 <cJSON_New_Item>:
    }
}

/* Internal constructor. */
static cJSON *cJSON_New_Item(const internal_hooks * const hooks)
{
 8000b60:	b580      	push	{r7, lr}
 8000b62:	b084      	sub	sp, #16
 8000b64:	af00      	add	r7, sp, #0
 8000b66:	6078      	str	r0, [r7, #4]
    cJSON* node = (cJSON*)hooks->allocate(sizeof(cJSON));
 8000b68:	687b      	ldr	r3, [r7, #4]
 8000b6a:	681b      	ldr	r3, [r3, #0]
 8000b6c:	2028      	movs	r0, #40	@ 0x28
 8000b6e:	4798      	blx	r3
 8000b70:	60f8      	str	r0, [r7, #12]
    if (node)
 8000b72:	68fb      	ldr	r3, [r7, #12]
 8000b74:	2b00      	cmp	r3, #0
 8000b76:	d004      	beq.n	8000b82 <cJSON_New_Item+0x22>
    {
        memset(node, '\0', sizeof(cJSON));
 8000b78:	2228      	movs	r2, #40	@ 0x28
 8000b7a:	2100      	movs	r1, #0
 8000b7c:	68f8      	ldr	r0, [r7, #12]
 8000b7e:	f029 f8bf 	bl	8029d00 <memset>
    }

    return node;
 8000b82:	68fb      	ldr	r3, [r7, #12]
}
 8000b84:	4618      	mov	r0, r3
 8000b86:	3710      	adds	r7, #16
 8000b88:	46bd      	mov	sp, r7
 8000b8a:	bd80      	pop	{r7, pc}

08000b8c <cJSON_Delete>:

/* Delete a cJSON structure. */
CJSON_PUBLIC(void) cJSON_Delete(cJSON *item)
{
 8000b8c:	b580      	push	{r7, lr}
 8000b8e:	b084      	sub	sp, #16
 8000b90:	af00      	add	r7, sp, #0
 8000b92:	6078      	str	r0, [r7, #4]
    cJSON *next = NULL;
 8000b94:	2300      	movs	r3, #0
 8000b96:	60fb      	str	r3, [r7, #12]
    while (item != NULL)
 8000b98:	e03d      	b.n	8000c16 <cJSON_Delete+0x8a>
    {
        next = item->next;
 8000b9a:	687b      	ldr	r3, [r7, #4]
 8000b9c:	681b      	ldr	r3, [r3, #0]
 8000b9e:	60fb      	str	r3, [r7, #12]
        if (!(item->type & cJSON_IsReference) && (item->child != NULL))
 8000ba0:	687b      	ldr	r3, [r7, #4]
 8000ba2:	68db      	ldr	r3, [r3, #12]
 8000ba4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8000ba8:	2b00      	cmp	r3, #0
 8000baa:	d108      	bne.n	8000bbe <cJSON_Delete+0x32>
 8000bac:	687b      	ldr	r3, [r7, #4]
 8000bae:	689b      	ldr	r3, [r3, #8]
 8000bb0:	2b00      	cmp	r3, #0
 8000bb2:	d004      	beq.n	8000bbe <cJSON_Delete+0x32>
        {
            cJSON_Delete(item->child);
 8000bb4:	687b      	ldr	r3, [r7, #4]
 8000bb6:	689b      	ldr	r3, [r3, #8]
 8000bb8:	4618      	mov	r0, r3
 8000bba:	f7ff ffe7 	bl	8000b8c <cJSON_Delete>
        }
        if (!(item->type & cJSON_IsReference) && (item->valuestring != NULL))
 8000bbe:	687b      	ldr	r3, [r7, #4]
 8000bc0:	68db      	ldr	r3, [r3, #12]
 8000bc2:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8000bc6:	2b00      	cmp	r3, #0
 8000bc8:	d10c      	bne.n	8000be4 <cJSON_Delete+0x58>
 8000bca:	687b      	ldr	r3, [r7, #4]
 8000bcc:	691b      	ldr	r3, [r3, #16]
 8000bce:	2b00      	cmp	r3, #0
 8000bd0:	d008      	beq.n	8000be4 <cJSON_Delete+0x58>
        {
            global_hooks.deallocate(item->valuestring);
 8000bd2:	4b15      	ldr	r3, [pc, #84]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000bd4:	685b      	ldr	r3, [r3, #4]
 8000bd6:	687a      	ldr	r2, [r7, #4]
 8000bd8:	6912      	ldr	r2, [r2, #16]
 8000bda:	4610      	mov	r0, r2
 8000bdc:	4798      	blx	r3
            item->valuestring = NULL;
 8000bde:	687b      	ldr	r3, [r7, #4]
 8000be0:	2200      	movs	r2, #0
 8000be2:	611a      	str	r2, [r3, #16]
        }
        if (!(item->type & cJSON_StringIsConst) && (item->string != NULL))
 8000be4:	687b      	ldr	r3, [r7, #4]
 8000be6:	68db      	ldr	r3, [r3, #12]
 8000be8:	f403 7300 	and.w	r3, r3, #512	@ 0x200
 8000bec:	2b00      	cmp	r3, #0
 8000bee:	d10c      	bne.n	8000c0a <cJSON_Delete+0x7e>
 8000bf0:	687b      	ldr	r3, [r7, #4]
 8000bf2:	6a1b      	ldr	r3, [r3, #32]
 8000bf4:	2b00      	cmp	r3, #0
 8000bf6:	d008      	beq.n	8000c0a <cJSON_Delete+0x7e>
        {
            global_hooks.deallocate(item->string);
 8000bf8:	4b0b      	ldr	r3, [pc, #44]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000bfa:	685b      	ldr	r3, [r3, #4]
 8000bfc:	687a      	ldr	r2, [r7, #4]
 8000bfe:	6a12      	ldr	r2, [r2, #32]
 8000c00:	4610      	mov	r0, r2
 8000c02:	4798      	blx	r3
            item->string = NULL;
 8000c04:	687b      	ldr	r3, [r7, #4]
 8000c06:	2200      	movs	r2, #0
 8000c08:	621a      	str	r2, [r3, #32]
        }
        global_hooks.deallocate(item);
 8000c0a:	4b07      	ldr	r3, [pc, #28]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000c0c:	685b      	ldr	r3, [r3, #4]
 8000c0e:	6878      	ldr	r0, [r7, #4]
 8000c10:	4798      	blx	r3
        item = next;
 8000c12:	68fb      	ldr	r3, [r7, #12]
 8000c14:	607b      	str	r3, [r7, #4]
    while (item != NULL)
 8000c16:	687b      	ldr	r3, [r7, #4]
 8000c18:	2b00      	cmp	r3, #0
 8000c1a:	d1be      	bne.n	8000b9a <cJSON_Delete+0xe>
    }
}
 8000c1c:	bf00      	nop
 8000c1e:	bf00      	nop
 8000c20:	3710      	adds	r7, #16
 8000c22:	46bd      	mov	sp, r7
 8000c24:	bd80      	pop	{r7, pc}
 8000c26:	bf00      	nop
 8000c28:	24000000 	.word	0x24000000

08000c2c <get_decimal_point>:

/* get the decimal point character of the current locale */
static unsigned char get_decimal_point(void)
{
 8000c2c:	b480      	push	{r7}
 8000c2e:	af00      	add	r7, sp, #0
#ifdef ENABLE_LOCALES
    struct lconv *lconv = localeconv();
    return (unsigned char) lconv->decimal_point[0];
#else
    return '.';
 8000c30:	232e      	movs	r3, #46	@ 0x2e
#endif
}
 8000c32:	4618      	mov	r0, r3
 8000c34:	46bd      	mov	sp, r7
 8000c36:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000c3a:	4770      	bx	lr
 8000c3c:	0000      	movs	r0, r0
	...

08000c40 <parse_number>:
/* get a pointer to the buffer at the position */
#define buffer_at_offset(buffer) ((buffer)->content + (buffer)->offset)

/* Parse the input text to generate a number, and populate the result into item. */
static cJSON_bool parse_number(cJSON * const item, parse_buffer * const input_buffer)
{
 8000c40:	b580      	push	{r7, lr}
 8000c42:	b098      	sub	sp, #96	@ 0x60
 8000c44:	af00      	add	r7, sp, #0
 8000c46:	6078      	str	r0, [r7, #4]
 8000c48:	6039      	str	r1, [r7, #0]
    double number = 0;
 8000c4a:	f04f 0200 	mov.w	r2, #0
 8000c4e:	f04f 0300 	mov.w	r3, #0
 8000c52:	e9c7 2314 	strd	r2, r3, [r7, #80]	@ 0x50
    unsigned char *after_end = NULL;
 8000c56:	2300      	movs	r3, #0
 8000c58:	64bb      	str	r3, [r7, #72]	@ 0x48
    unsigned char number_c_string[64];
    unsigned char decimal_point = get_decimal_point();
 8000c5a:	f7ff ffe7 	bl	8000c2c <get_decimal_point>
 8000c5e:	4603      	mov	r3, r0
 8000c60:	f887 304f 	strb.w	r3, [r7, #79]	@ 0x4f
    size_t i = 0;
 8000c64:	2300      	movs	r3, #0
 8000c66:	65fb      	str	r3, [r7, #92]	@ 0x5c

    if ((input_buffer == NULL) || (input_buffer->content == NULL))
 8000c68:	683b      	ldr	r3, [r7, #0]
 8000c6a:	2b00      	cmp	r3, #0
 8000c6c:	d003      	beq.n	8000c76 <parse_number+0x36>
 8000c6e:	683b      	ldr	r3, [r7, #0]
 8000c70:	681b      	ldr	r3, [r3, #0]
 8000c72:	2b00      	cmp	r3, #0
 8000c74:	d101      	bne.n	8000c7a <parse_number+0x3a>
    {
        return false;
 8000c76:	2300      	movs	r3, #0
 8000c78:	e09f      	b.n	8000dba <parse_number+0x17a>
    }

    /* copy the number into a temporary buffer and replace '.' with the decimal point
     * of the current locale (for strtod)
     * This also takes care of '\0' not necessarily being available for marking the end of the input */
    for (i = 0; (i < (sizeof(number_c_string) - 1)) && can_access_at_index(input_buffer, i); i++)
 8000c7a:	2300      	movs	r3, #0
 8000c7c:	65fb      	str	r3, [r7, #92]	@ 0x5c
 8000c7e:	e03d      	b.n	8000cfc <parse_number+0xbc>
    {
        switch (buffer_at_offset(input_buffer)[i])
 8000c80:	683b      	ldr	r3, [r7, #0]
 8000c82:	681a      	ldr	r2, [r3, #0]
 8000c84:	683b      	ldr	r3, [r7, #0]
 8000c86:	6899      	ldr	r1, [r3, #8]
 8000c88:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000c8a:	440b      	add	r3, r1
 8000c8c:	4413      	add	r3, r2
 8000c8e:	781b      	ldrb	r3, [r3, #0]
 8000c90:	2b45      	cmp	r3, #69	@ 0x45
 8000c92:	dc17      	bgt.n	8000cc4 <parse_number+0x84>
 8000c94:	2b2b      	cmp	r3, #43	@ 0x2b
 8000c96:	db40      	blt.n	8000d1a <parse_number+0xda>
 8000c98:	3b2b      	subs	r3, #43	@ 0x2b
 8000c9a:	2201      	movs	r2, #1
 8000c9c:	409a      	lsls	r2, r3
 8000c9e:	4b4e      	ldr	r3, [pc, #312]	@ (8000dd8 <parse_number+0x198>)
 8000ca0:	4013      	ands	r3, r2
 8000ca2:	2b00      	cmp	r3, #0
 8000ca4:	bf14      	ite	ne
 8000ca6:	2301      	movne	r3, #1
 8000ca8:	2300      	moveq	r3, #0
 8000caa:	b2db      	uxtb	r3, r3
 8000cac:	2b00      	cmp	r3, #0
 8000cae:	d10b      	bne.n	8000cc8 <parse_number+0x88>
 8000cb0:	f002 0308 	and.w	r3, r2, #8
 8000cb4:	2b00      	cmp	r3, #0
 8000cb6:	bf14      	ite	ne
 8000cb8:	2301      	movne	r3, #1
 8000cba:	2300      	moveq	r3, #0
 8000cbc:	b2db      	uxtb	r3, r3
 8000cbe:	2b00      	cmp	r3, #0
 8000cc0:	d111      	bne.n	8000ce6 <parse_number+0xa6>
            case '.':
                number_c_string[i] = decimal_point;
                break;

            default:
                goto loop_end;
 8000cc2:	e02a      	b.n	8000d1a <parse_number+0xda>
        switch (buffer_at_offset(input_buffer)[i])
 8000cc4:	2b65      	cmp	r3, #101	@ 0x65
 8000cc6:	d128      	bne.n	8000d1a <parse_number+0xda>
                number_c_string[i] = buffer_at_offset(input_buffer)[i];
 8000cc8:	683b      	ldr	r3, [r7, #0]
 8000cca:	681a      	ldr	r2, [r3, #0]
 8000ccc:	683b      	ldr	r3, [r7, #0]
 8000cce:	6899      	ldr	r1, [r3, #8]
 8000cd0:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cd2:	440b      	add	r3, r1
 8000cd4:	4413      	add	r3, r2
 8000cd6:	7819      	ldrb	r1, [r3, #0]
 8000cd8:	f107 0208 	add.w	r2, r7, #8
 8000cdc:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cde:	4413      	add	r3, r2
 8000ce0:	460a      	mov	r2, r1
 8000ce2:	701a      	strb	r2, [r3, #0]
                break;
 8000ce4:	e007      	b.n	8000cf6 <parse_number+0xb6>
                number_c_string[i] = decimal_point;
 8000ce6:	f107 0208 	add.w	r2, r7, #8
 8000cea:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cec:	4413      	add	r3, r2
 8000cee:	f897 204f 	ldrb.w	r2, [r7, #79]	@ 0x4f
 8000cf2:	701a      	strb	r2, [r3, #0]
                break;
 8000cf4:	bf00      	nop
    for (i = 0; (i < (sizeof(number_c_string) - 1)) && can_access_at_index(input_buffer, i); i++)
 8000cf6:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cf8:	3301      	adds	r3, #1
 8000cfa:	65fb      	str	r3, [r7, #92]	@ 0x5c
 8000cfc:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cfe:	2b3e      	cmp	r3, #62	@ 0x3e
 8000d00:	d80d      	bhi.n	8000d1e <parse_number+0xde>
 8000d02:	683b      	ldr	r3, [r7, #0]
 8000d04:	2b00      	cmp	r3, #0
 8000d06:	d00a      	beq.n	8000d1e <parse_number+0xde>
 8000d08:	683b      	ldr	r3, [r7, #0]
 8000d0a:	689a      	ldr	r2, [r3, #8]
 8000d0c:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000d0e:	441a      	add	r2, r3
 8000d10:	683b      	ldr	r3, [r7, #0]
 8000d12:	685b      	ldr	r3, [r3, #4]
 8000d14:	429a      	cmp	r2, r3
 8000d16:	d3b3      	bcc.n	8000c80 <parse_number+0x40>
        }
    }
loop_end:
 8000d18:	e001      	b.n	8000d1e <parse_number+0xde>
                goto loop_end;
 8000d1a:	bf00      	nop
 8000d1c:	e000      	b.n	8000d20 <parse_number+0xe0>
loop_end:
 8000d1e:	bf00      	nop
    number_c_string[i] = '\0';
 8000d20:	f107 0208 	add.w	r2, r7, #8
 8000d24:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000d26:	4413      	add	r3, r2
 8000d28:	2200      	movs	r2, #0
 8000d2a:	701a      	strb	r2, [r3, #0]

    number = strtod((const char*)number_c_string, (char**)&after_end);
 8000d2c:	f107 0248 	add.w	r2, r7, #72	@ 0x48
 8000d30:	f107 0308 	add.w	r3, r7, #8
 8000d34:	4611      	mov	r1, r2
 8000d36:	4618      	mov	r0, r3
 8000d38:	f028 f94c 	bl	8028fd4 <strtod>
 8000d3c:	ed87 0b14 	vstr	d0, [r7, #80]	@ 0x50
    if (number_c_string == after_end)
 8000d40:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 8000d42:	f107 0308 	add.w	r3, r7, #8
 8000d46:	429a      	cmp	r2, r3
 8000d48:	d101      	bne.n	8000d4e <parse_number+0x10e>
    {
        return false; /* parse_error */
 8000d4a:	2300      	movs	r3, #0
 8000d4c:	e035      	b.n	8000dba <parse_number+0x17a>
    }

    item->valuedouble = number;
 8000d4e:	6879      	ldr	r1, [r7, #4]
 8000d50:	e9d7 2314 	ldrd	r2, r3, [r7, #80]	@ 0x50
 8000d54:	e9c1 2306 	strd	r2, r3, [r1, #24]

    /* use saturation in case of overflow */
    if (number >= INT_MAX)
 8000d58:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d5c:	ed9f 6b1a 	vldr	d6, [pc, #104]	@ 8000dc8 <parse_number+0x188>
 8000d60:	eeb4 7bc6 	vcmpe.f64	d7, d6
 8000d64:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8000d68:	db04      	blt.n	8000d74 <parse_number+0x134>
    {
        item->valueint = INT_MAX;
 8000d6a:	687b      	ldr	r3, [r7, #4]
 8000d6c:	f06f 4200 	mvn.w	r2, #2147483648	@ 0x80000000
 8000d70:	615a      	str	r2, [r3, #20]
 8000d72:	e015      	b.n	8000da0 <parse_number+0x160>
    }
    else if (number <= (double)INT_MIN)
 8000d74:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d78:	ed9f 6b15 	vldr	d6, [pc, #84]	@ 8000dd0 <parse_number+0x190>
 8000d7c:	eeb4 7bc6 	vcmpe.f64	d7, d6
 8000d80:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8000d84:	d804      	bhi.n	8000d90 <parse_number+0x150>
    {
        item->valueint = INT_MIN;
 8000d86:	687b      	ldr	r3, [r7, #4]
 8000d88:	f04f 4200 	mov.w	r2, #2147483648	@ 0x80000000
 8000d8c:	615a      	str	r2, [r3, #20]
 8000d8e:	e007      	b.n	8000da0 <parse_number+0x160>
    }
    else
    {
        item->valueint = (int)number;
 8000d90:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d94:	eefd 7bc7 	vcvt.s32.f64	s15, d7
 8000d98:	ee17 2a90 	vmov	r2, s15
 8000d9c:	687b      	ldr	r3, [r7, #4]
 8000d9e:	615a      	str	r2, [r3, #20]
    }

    item->type = cJSON_Number;
 8000da0:	687b      	ldr	r3, [r7, #4]
 8000da2:	2208      	movs	r2, #8
 8000da4:	60da      	str	r2, [r3, #12]

    input_buffer->offset += (size_t)(after_end - number_c_string);
 8000da6:	683b      	ldr	r3, [r7, #0]
 8000da8:	689b      	ldr	r3, [r3, #8]
 8000daa:	6cb9      	ldr	r1, [r7, #72]	@ 0x48
 8000dac:	f107 0208 	add.w	r2, r7, #8
 8000db0:	1a8a      	subs	r2, r1, r2
 8000db2:	441a      	add	r2, r3
 8000db4:	683b      	ldr	r3, [r7, #0]
 8000db6:	609a      	str	r2, [r3, #8]
    return true;
 8000db8:	2301      	movs	r3, #1
}
 8000dba:	4618      	mov	r0, r3
 8000dbc:	3760      	adds	r7, #96	@ 0x60
 8000dbe:	46bd      	mov	sp, r7
 8000dc0:	bd80      	pop	{r7, pc}
 8000dc2:	bf00      	nop
 8000dc4:	f3af 8000 	nop.w
 8000dc8:	ffc00000 	.word	0xffc00000
 8000dcc:	41dfffff 	.word	0x41dfffff
 8000dd0:	00000000 	.word	0x00000000
 8000dd4:	c1e00000 	.word	0xc1e00000
 8000dd8:	04007fe5 	.word	0x04007fe5

08000ddc <parse_hex4>:
    return true;
}

/* parse 4 digit hexadecimal number */
static unsigned parse_hex4(const unsigned char * const input)
{
 8000ddc:	b480      	push	{r7}
 8000dde:	b085      	sub	sp, #20
 8000de0:	af00      	add	r7, sp, #0
 8000de2:	6078      	str	r0, [r7, #4]
    unsigned int h = 0;
 8000de4:	2300      	movs	r3, #0
 8000de6:	60fb      	str	r3, [r7, #12]
    size_t i = 0;
 8000de8:	2300      	movs	r3, #0
 8000dea:	60bb      	str	r3, [r7, #8]

    for (i = 0; i < 4; i++)
 8000dec:	2300      	movs	r3, #0
 8000dee:	60bb      	str	r3, [r7, #8]
 8000df0:	e04c      	b.n	8000e8c <parse_hex4+0xb0>
    {
        /* parse digit */
        if ((input[i] >= '0') && (input[i] <= '9'))
 8000df2:	687a      	ldr	r2, [r7, #4]
 8000df4:	68bb      	ldr	r3, [r7, #8]
 8000df6:	4413      	add	r3, r2
 8000df8:	781b      	ldrb	r3, [r3, #0]
 8000dfa:	2b2f      	cmp	r3, #47	@ 0x2f
 8000dfc:	d90f      	bls.n	8000e1e <parse_hex4+0x42>
 8000dfe:	687a      	ldr	r2, [r7, #4]
 8000e00:	68bb      	ldr	r3, [r7, #8]
 8000e02:	4413      	add	r3, r2
 8000e04:	781b      	ldrb	r3, [r3, #0]
 8000e06:	2b39      	cmp	r3, #57	@ 0x39
 8000e08:	d809      	bhi.n	8000e1e <parse_hex4+0x42>
        {
            h += (unsigned int) input[i] - '0';
 8000e0a:	687a      	ldr	r2, [r7, #4]
 8000e0c:	68bb      	ldr	r3, [r7, #8]
 8000e0e:	4413      	add	r3, r2
 8000e10:	781b      	ldrb	r3, [r3, #0]
 8000e12:	461a      	mov	r2, r3
 8000e14:	68fb      	ldr	r3, [r7, #12]
 8000e16:	4413      	add	r3, r2
 8000e18:	3b30      	subs	r3, #48	@ 0x30
 8000e1a:	60fb      	str	r3, [r7, #12]
 8000e1c:	e02d      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else if ((input[i] >= 'A') && (input[i] <= 'F'))
 8000e1e:	687a      	ldr	r2, [r7, #4]
 8000e20:	68bb      	ldr	r3, [r7, #8]
 8000e22:	4413      	add	r3, r2
 8000e24:	781b      	ldrb	r3, [r3, #0]
 8000e26:	2b40      	cmp	r3, #64	@ 0x40
 8000e28:	d90f      	bls.n	8000e4a <parse_hex4+0x6e>
 8000e2a:	687a      	ldr	r2, [r7, #4]
 8000e2c:	68bb      	ldr	r3, [r7, #8]
 8000e2e:	4413      	add	r3, r2
 8000e30:	781b      	ldrb	r3, [r3, #0]
 8000e32:	2b46      	cmp	r3, #70	@ 0x46
 8000e34:	d809      	bhi.n	8000e4a <parse_hex4+0x6e>
        {
            h += (unsigned int) 10 + input[i] - 'A';
 8000e36:	687a      	ldr	r2, [r7, #4]
 8000e38:	68bb      	ldr	r3, [r7, #8]
 8000e3a:	4413      	add	r3, r2
 8000e3c:	781b      	ldrb	r3, [r3, #0]
 8000e3e:	461a      	mov	r2, r3
 8000e40:	68fb      	ldr	r3, [r7, #12]
 8000e42:	4413      	add	r3, r2
 8000e44:	3b37      	subs	r3, #55	@ 0x37
 8000e46:	60fb      	str	r3, [r7, #12]
 8000e48:	e017      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else if ((input[i] >= 'a') && (input[i] <= 'f'))
 8000e4a:	687a      	ldr	r2, [r7, #4]
 8000e4c:	68bb      	ldr	r3, [r7, #8]
 8000e4e:	4413      	add	r3, r2
 8000e50:	781b      	ldrb	r3, [r3, #0]
 8000e52:	2b60      	cmp	r3, #96	@ 0x60
 8000e54:	d90f      	bls.n	8000e76 <parse_hex4+0x9a>
 8000e56:	687a      	ldr	r2, [r7, #4]
 8000e58:	68bb      	ldr	r3, [r7, #8]
 8000e5a:	4413      	add	r3, r2
 8000e5c:	781b      	ldrb	r3, [r3, #0]
 8000e5e:	2b66      	cmp	r3, #102	@ 0x66
 8000e60:	d809      	bhi.n	8000e76 <parse_hex4+0x9a>
        {
            h += (unsigned int) 10 + input[i] - 'a';
 8000e62:	687a      	ldr	r2, [r7, #4]
 8000e64:	68bb      	ldr	r3, [r7, #8]
 8000e66:	4413      	add	r3, r2
 8000e68:	781b      	ldrb	r3, [r3, #0]
 8000e6a:	461a      	mov	r2, r3
 8000e6c:	68fb      	ldr	r3, [r7, #12]
 8000e6e:	4413      	add	r3, r2
 8000e70:	3b57      	subs	r3, #87	@ 0x57
 8000e72:	60fb      	str	r3, [r7, #12]
 8000e74:	e001      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else /* invalid */
        {
            return 0;
 8000e76:	2300      	movs	r3, #0
 8000e78:	e00c      	b.n	8000e94 <parse_hex4+0xb8>
        }

        if (i < 3)
 8000e7a:	68bb      	ldr	r3, [r7, #8]
 8000e7c:	2b02      	cmp	r3, #2
 8000e7e:	d802      	bhi.n	8000e86 <parse_hex4+0xaa>
        {
            /* shift left to make place for the next nibble */
            h = h << 4;
 8000e80:	68fb      	ldr	r3, [r7, #12]
 8000e82:	011b      	lsls	r3, r3, #4
 8000e84:	60fb      	str	r3, [r7, #12]
    for (i = 0; i < 4; i++)
 8000e86:	68bb      	ldr	r3, [r7, #8]
 8000e88:	3301      	adds	r3, #1
 8000e8a:	60bb      	str	r3, [r7, #8]
 8000e8c:	68bb      	ldr	r3, [r7, #8]
 8000e8e:	2b03      	cmp	r3, #3
 8000e90:	d9af      	bls.n	8000df2 <parse_hex4+0x16>
        }
    }

    return h;
 8000e92:	68fb      	ldr	r3, [r7, #12]
}
 8000e94:	4618      	mov	r0, r3
 8000e96:	3714      	adds	r7, #20
 8000e98:	46bd      	mov	sp, r7
 8000e9a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000e9e:	4770      	bx	lr

08000ea0 <utf16_literal_to_utf8>:

/* converts a UTF-16 literal to UTF-8
 * A literal can be one or two sequences of the form \uXXXX */
static unsigned char utf16_literal_to_utf8(const unsigned char * const input_pointer, const unsigned char * const input_end, unsigned char **output_pointer)
{
 8000ea0:	b580      	push	{r7, lr}
 8000ea2:	b08a      	sub	sp, #40	@ 0x28
 8000ea4:	af00      	add	r7, sp, #0
 8000ea6:	60f8      	str	r0, [r7, #12]
 8000ea8:	60b9      	str	r1, [r7, #8]
 8000eaa:	607a      	str	r2, [r7, #4]
    long unsigned int codepoint = 0;
 8000eac:	2300      	movs	r3, #0
 8000eae:	627b      	str	r3, [r7, #36]	@ 0x24
    unsigned int first_code = 0;
 8000eb0:	2300      	movs	r3, #0
 8000eb2:	61fb      	str	r3, [r7, #28]
    const unsigned char *first_sequence = input_pointer;
 8000eb4:	68fb      	ldr	r3, [r7, #12]
 8000eb6:	61bb      	str	r3, [r7, #24]
    unsigned char utf8_length = 0;
 8000eb8:	2300      	movs	r3, #0
 8000eba:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    unsigned char utf8_position = 0;
 8000ebe:	2300      	movs	r3, #0
 8000ec0:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    unsigned char sequence_length = 0;
 8000ec4:	2300      	movs	r3, #0
 8000ec6:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
    unsigned char first_byte_mark = 0;
 8000eca:	2300      	movs	r3, #0
 8000ecc:	f887 3020 	strb.w	r3, [r7, #32]

    if ((input_end - first_sequence) < 6)
 8000ed0:	68ba      	ldr	r2, [r7, #8]
 8000ed2:	69bb      	ldr	r3, [r7, #24]
 8000ed4:	1ad3      	subs	r3, r2, r3
 8000ed6:	2b05      	cmp	r3, #5
 8000ed8:	f340 80b7 	ble.w	800104a <utf16_literal_to_utf8+0x1aa>
        /* input ends unexpectedly */
        goto fail;
    }

    /* get the first utf16 sequence */
    first_code = parse_hex4(first_sequence + 2);
 8000edc:	69bb      	ldr	r3, [r7, #24]
 8000ede:	3302      	adds	r3, #2
 8000ee0:	4618      	mov	r0, r3
 8000ee2:	f7ff ff7b 	bl	8000ddc <parse_hex4>
 8000ee6:	61f8      	str	r0, [r7, #28]

    /* check that the code is valid */
    if (((first_code >= 0xDC00) && (first_code <= 0xDFFF)))
 8000ee8:	69fb      	ldr	r3, [r7, #28]
 8000eea:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000eee:	d304      	bcc.n	8000efa <utf16_literal_to_utf8+0x5a>
 8000ef0:	69fb      	ldr	r3, [r7, #28]
 8000ef2:	f5b3 4f60 	cmp.w	r3, #57344	@ 0xe000
 8000ef6:	f0c0 80aa 	bcc.w	800104e <utf16_literal_to_utf8+0x1ae>
    {
        goto fail;
    }

    /* UTF16 surrogate pair */
    if ((first_code >= 0xD800) && (first_code <= 0xDBFF))
 8000efa:	69fb      	ldr	r3, [r7, #28]
 8000efc:	f5b3 4f58 	cmp.w	r3, #55296	@ 0xd800
 8000f00:	d337      	bcc.n	8000f72 <utf16_literal_to_utf8+0xd2>
 8000f02:	69fb      	ldr	r3, [r7, #28]
 8000f04:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000f08:	d233      	bcs.n	8000f72 <utf16_literal_to_utf8+0xd2>
    {
        const unsigned char *second_sequence = first_sequence + 6;
 8000f0a:	69bb      	ldr	r3, [r7, #24]
 8000f0c:	3306      	adds	r3, #6
 8000f0e:	617b      	str	r3, [r7, #20]
        unsigned int second_code = 0;
 8000f10:	2300      	movs	r3, #0
 8000f12:	613b      	str	r3, [r7, #16]
        sequence_length = 12; /* \uXXXX\uXXXX */
 8000f14:	230c      	movs	r3, #12
 8000f16:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21

        if ((input_end - second_sequence) < 6)
 8000f1a:	68ba      	ldr	r2, [r7, #8]
 8000f1c:	697b      	ldr	r3, [r7, #20]
 8000f1e:	1ad3      	subs	r3, r2, r3
 8000f20:	2b05      	cmp	r3, #5
 8000f22:	f340 8096 	ble.w	8001052 <utf16_literal_to_utf8+0x1b2>
        {
            /* input ends unexpectedly */
            goto fail;
        }

        if ((second_sequence[0] != '\\') || (second_sequence[1] != 'u'))
 8000f26:	697b      	ldr	r3, [r7, #20]
 8000f28:	781b      	ldrb	r3, [r3, #0]
 8000f2a:	2b5c      	cmp	r3, #92	@ 0x5c
 8000f2c:	f040 8093 	bne.w	8001056 <utf16_literal_to_utf8+0x1b6>
 8000f30:	697b      	ldr	r3, [r7, #20]
 8000f32:	3301      	adds	r3, #1
 8000f34:	781b      	ldrb	r3, [r3, #0]
 8000f36:	2b75      	cmp	r3, #117	@ 0x75
 8000f38:	f040 808d 	bne.w	8001056 <utf16_literal_to_utf8+0x1b6>
            /* missing second half of the surrogate pair */
            goto fail;
        }

        /* get the second utf16 sequence */
        second_code = parse_hex4(second_sequence + 2);
 8000f3c:	697b      	ldr	r3, [r7, #20]
 8000f3e:	3302      	adds	r3, #2
 8000f40:	4618      	mov	r0, r3
 8000f42:	f7ff ff4b 	bl	8000ddc <parse_hex4>
 8000f46:	6138      	str	r0, [r7, #16]
        /* check that the code is valid */
        if ((second_code < 0xDC00) || (second_code > 0xDFFF))
 8000f48:	693b      	ldr	r3, [r7, #16]
 8000f4a:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000f4e:	f0c0 8084 	bcc.w	800105a <utf16_literal_to_utf8+0x1ba>
 8000f52:	693b      	ldr	r3, [r7, #16]
 8000f54:	f5b3 4f60 	cmp.w	r3, #57344	@ 0xe000
 8000f58:	d27f      	bcs.n	800105a <utf16_literal_to_utf8+0x1ba>
            goto fail;
        }


        /* calculate the unicode codepoint from the surrogate pair */
        codepoint = 0x10000 + (((first_code & 0x3FF) << 10) | (second_code & 0x3FF));
 8000f5a:	69fb      	ldr	r3, [r7, #28]
 8000f5c:	029a      	lsls	r2, r3, #10
 8000f5e:	4b43      	ldr	r3, [pc, #268]	@ (800106c <utf16_literal_to_utf8+0x1cc>)
 8000f60:	4013      	ands	r3, r2
 8000f62:	693a      	ldr	r2, [r7, #16]
 8000f64:	f3c2 0209 	ubfx	r2, r2, #0, #10
 8000f68:	4313      	orrs	r3, r2
 8000f6a:	f503 3380 	add.w	r3, r3, #65536	@ 0x10000
 8000f6e:	627b      	str	r3, [r7, #36]	@ 0x24
    {
 8000f70:	e004      	b.n	8000f7c <utf16_literal_to_utf8+0xdc>
    }
    else
    {
        sequence_length = 6; /* \uXXXX */
 8000f72:	2306      	movs	r3, #6
 8000f74:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
        codepoint = first_code;
 8000f78:	69fb      	ldr	r3, [r7, #28]
 8000f7a:	627b      	str	r3, [r7, #36]	@ 0x24
    }

    /* encode as UTF-8
     * takes at maximum 4 bytes to encode:
     * 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx */
    if (codepoint < 0x80)
 8000f7c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000f7e:	2b7f      	cmp	r3, #127	@ 0x7f
 8000f80:	d803      	bhi.n	8000f8a <utf16_literal_to_utf8+0xea>
    {
        /* normal ascii, encoding 0xxxxxxx */
        utf8_length = 1;
 8000f82:	2301      	movs	r3, #1
 8000f84:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
 8000f88:	e01f      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint < 0x800)
 8000f8a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000f8c:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 8000f90:	d206      	bcs.n	8000fa0 <utf16_literal_to_utf8+0x100>
    {
        /* two bytes, encoding 110xxxxx 10xxxxxx */
        utf8_length = 2;
 8000f92:	2302      	movs	r3, #2
 8000f94:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xC0; /* 11000000 */
 8000f98:	23c0      	movs	r3, #192	@ 0xc0
 8000f9a:	f887 3020 	strb.w	r3, [r7, #32]
 8000f9e:	e014      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint < 0x10000)
 8000fa0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fa2:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8000fa6:	d206      	bcs.n	8000fb6 <utf16_literal_to_utf8+0x116>
    {
        /* three bytes, encoding 1110xxxx 10xxxxxx 10xxxxxx */
        utf8_length = 3;
 8000fa8:	2303      	movs	r3, #3
 8000faa:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xE0; /* 11100000 */
 8000fae:	23e0      	movs	r3, #224	@ 0xe0
 8000fb0:	f887 3020 	strb.w	r3, [r7, #32]
 8000fb4:	e009      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint <= 0x10FFFF)
 8000fb6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fb8:	f5b3 1f88 	cmp.w	r3, #1114112	@ 0x110000
 8000fbc:	d24f      	bcs.n	800105e <utf16_literal_to_utf8+0x1be>
    {
        /* four bytes, encoding 1110xxxx 10xxxxxx 10xxxxxx 10xxxxxx */
        utf8_length = 4;
 8000fbe:	2304      	movs	r3, #4
 8000fc0:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xF0; /* 11110000 */
 8000fc4:	23f0      	movs	r3, #240	@ 0xf0
 8000fc6:	f887 3020 	strb.w	r3, [r7, #32]
        /* invalid unicode codepoint */
        goto fail;
    }

    /* encode as utf8 */
    for (utf8_position = (unsigned char)(utf8_length - 1); utf8_position > 0; utf8_position--)
 8000fca:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8000fce:	3b01      	subs	r3, #1
 8000fd0:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8000fd4:	e015      	b.n	8001002 <utf16_literal_to_utf8+0x162>
    {
        /* 10xxxxxx */
        (*output_pointer)[utf8_position] = (unsigned char)((codepoint | 0x80) & 0xBF);
 8000fd6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fd8:	b2db      	uxtb	r3, r3
 8000fda:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 8000fde:	b2da      	uxtb	r2, r3
 8000fe0:	687b      	ldr	r3, [r7, #4]
 8000fe2:	6819      	ldr	r1, [r3, #0]
 8000fe4:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8000fe8:	440b      	add	r3, r1
 8000fea:	f062 027f 	orn	r2, r2, #127	@ 0x7f
 8000fee:	b2d2      	uxtb	r2, r2
 8000ff0:	701a      	strb	r2, [r3, #0]
        codepoint >>= 6;
 8000ff2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000ff4:	099b      	lsrs	r3, r3, #6
 8000ff6:	627b      	str	r3, [r7, #36]	@ 0x24
    for (utf8_position = (unsigned char)(utf8_length - 1); utf8_position > 0; utf8_position--)
 8000ff8:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8000ffc:	3b01      	subs	r3, #1
 8000ffe:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8001002:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8001006:	2b00      	cmp	r3, #0
 8001008:	d1e5      	bne.n	8000fd6 <utf16_literal_to_utf8+0x136>
    }
    /* encode first byte */
    if (utf8_length > 1)
 800100a:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 800100e:	2b01      	cmp	r3, #1
 8001010:	d909      	bls.n	8001026 <utf16_literal_to_utf8+0x186>
    {
        (*output_pointer)[0] = (unsigned char)((codepoint | first_byte_mark) & 0xFF);
 8001012:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001014:	b2d9      	uxtb	r1, r3
 8001016:	687b      	ldr	r3, [r7, #4]
 8001018:	681b      	ldr	r3, [r3, #0]
 800101a:	f897 2020 	ldrb.w	r2, [r7, #32]
 800101e:	430a      	orrs	r2, r1
 8001020:	b2d2      	uxtb	r2, r2
 8001022:	701a      	strb	r2, [r3, #0]
 8001024:	e007      	b.n	8001036 <utf16_literal_to_utf8+0x196>
    }
    else
    {
        (*output_pointer)[0] = (unsigned char)(codepoint & 0x7F);
 8001026:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001028:	b2da      	uxtb	r2, r3
 800102a:	687b      	ldr	r3, [r7, #4]
 800102c:	681b      	ldr	r3, [r3, #0]
 800102e:	f002 027f 	and.w	r2, r2, #127	@ 0x7f
 8001032:	b2d2      	uxtb	r2, r2
 8001034:	701a      	strb	r2, [r3, #0]
    }

    *output_pointer += utf8_length;
 8001036:	687b      	ldr	r3, [r7, #4]
 8001038:	681a      	ldr	r2, [r3, #0]
 800103a:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 800103e:	441a      	add	r2, r3
 8001040:	687b      	ldr	r3, [r7, #4]
 8001042:	601a      	str	r2, [r3, #0]

    return sequence_length;
 8001044:	f897 3021 	ldrb.w	r3, [r7, #33]	@ 0x21
 8001048:	e00b      	b.n	8001062 <utf16_literal_to_utf8+0x1c2>
        goto fail;
 800104a:	bf00      	nop
 800104c:	e008      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
        goto fail;
 800104e:	bf00      	nop
 8001050:	e006      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 8001052:	bf00      	nop
 8001054:	e004      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 8001056:	bf00      	nop
 8001058:	e002      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 800105a:	bf00      	nop
 800105c:	e000      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
        goto fail;
 800105e:	bf00      	nop

fail:
    return 0;
 8001060:	2300      	movs	r3, #0
}
 8001062:	4618      	mov	r0, r3
 8001064:	3728      	adds	r7, #40	@ 0x28
 8001066:	46bd      	mov	sp, r7
 8001068:	bd80      	pop	{r7, pc}
 800106a:	bf00      	nop
 800106c:	000ffc00 	.word	0x000ffc00

08001070 <parse_string>:

/* Parse the input text into an unescaped cinput, and populate item. */
static cJSON_bool parse_string(cJSON * const item, parse_buffer * const input_buffer)
{
 8001070:	b580      	push	{r7, lr}
 8001072:	b08a      	sub	sp, #40	@ 0x28
 8001074:	af00      	add	r7, sp, #0
 8001076:	6078      	str	r0, [r7, #4]
 8001078:	6039      	str	r1, [r7, #0]
    const unsigned char *input_pointer = buffer_at_offset(input_buffer) + 1;
 800107a:	683b      	ldr	r3, [r7, #0]
 800107c:	681a      	ldr	r2, [r3, #0]
 800107e:	683b      	ldr	r3, [r7, #0]
 8001080:	689b      	ldr	r3, [r3, #8]
 8001082:	3301      	adds	r3, #1
 8001084:	4413      	add	r3, r2
 8001086:	627b      	str	r3, [r7, #36]	@ 0x24
    const unsigned char *input_end = buffer_at_offset(input_buffer) + 1;
 8001088:	683b      	ldr	r3, [r7, #0]
 800108a:	681a      	ldr	r2, [r3, #0]
 800108c:	683b      	ldr	r3, [r7, #0]
 800108e:	689b      	ldr	r3, [r3, #8]
 8001090:	3301      	adds	r3, #1
 8001092:	4413      	add	r3, r2
 8001094:	623b      	str	r3, [r7, #32]
    unsigned char *output_pointer = NULL;
 8001096:	2300      	movs	r3, #0
 8001098:	60fb      	str	r3, [r7, #12]
    unsigned char *output = NULL;
 800109a:	2300      	movs	r3, #0
 800109c:	61fb      	str	r3, [r7, #28]

    /* not a string */
    if (buffer_at_offset(input_buffer)[0] != '\"')
 800109e:	683b      	ldr	r3, [r7, #0]
 80010a0:	681a      	ldr	r2, [r3, #0]
 80010a2:	683b      	ldr	r3, [r7, #0]
 80010a4:	689b      	ldr	r3, [r3, #8]
 80010a6:	4413      	add	r3, r2
 80010a8:	781b      	ldrb	r3, [r3, #0]
 80010aa:	2b22      	cmp	r3, #34	@ 0x22
 80010ac:	f040 8103 	bne.w	80012b6 <parse_string+0x246>
        goto fail;
    }

    {
        /* calculate approximate size of the output (overestimate) */
        size_t allocation_length = 0;
 80010b0:	2300      	movs	r3, #0
 80010b2:	613b      	str	r3, [r7, #16]
        size_t skipped_bytes = 0;
 80010b4:	2300      	movs	r3, #0
 80010b6:	61bb      	str	r3, [r7, #24]
        while (((size_t)(input_end - input_buffer->content) < input_buffer->length) && (*input_end != '\"'))
 80010b8:	e017      	b.n	80010ea <parse_string+0x7a>
        {
            /* is escape sequence */
            if (input_end[0] == '\\')
 80010ba:	6a3b      	ldr	r3, [r7, #32]
 80010bc:	781b      	ldrb	r3, [r3, #0]
 80010be:	2b5c      	cmp	r3, #92	@ 0x5c
 80010c0:	d110      	bne.n	80010e4 <parse_string+0x74>
            {
                if ((size_t)(input_end + 1 - input_buffer->content) >= input_buffer->length)
 80010c2:	6a3b      	ldr	r3, [r7, #32]
 80010c4:	1c5a      	adds	r2, r3, #1
 80010c6:	683b      	ldr	r3, [r7, #0]
 80010c8:	681b      	ldr	r3, [r3, #0]
 80010ca:	1ad3      	subs	r3, r2, r3
 80010cc:	461a      	mov	r2, r3
 80010ce:	683b      	ldr	r3, [r7, #0]
 80010d0:	685b      	ldr	r3, [r3, #4]
 80010d2:	429a      	cmp	r2, r3
 80010d4:	f080 80f1 	bcs.w	80012ba <parse_string+0x24a>
                {
                    /* prevent buffer overflow when last input character is a backslash */
                    goto fail;
                }
                skipped_bytes++;
 80010d8:	69bb      	ldr	r3, [r7, #24]
 80010da:	3301      	adds	r3, #1
 80010dc:	61bb      	str	r3, [r7, #24]
                input_end++;
 80010de:	6a3b      	ldr	r3, [r7, #32]
 80010e0:	3301      	adds	r3, #1
 80010e2:	623b      	str	r3, [r7, #32]
            }
            input_end++;
 80010e4:	6a3b      	ldr	r3, [r7, #32]
 80010e6:	3301      	adds	r3, #1
 80010e8:	623b      	str	r3, [r7, #32]
        while (((size_t)(input_end - input_buffer->content) < input_buffer->length) && (*input_end != '\"'))
 80010ea:	683b      	ldr	r3, [r7, #0]
 80010ec:	681b      	ldr	r3, [r3, #0]
 80010ee:	6a3a      	ldr	r2, [r7, #32]
 80010f0:	1ad3      	subs	r3, r2, r3
 80010f2:	461a      	mov	r2, r3
 80010f4:	683b      	ldr	r3, [r7, #0]
 80010f6:	685b      	ldr	r3, [r3, #4]
 80010f8:	429a      	cmp	r2, r3
 80010fa:	d203      	bcs.n	8001104 <parse_string+0x94>
 80010fc:	6a3b      	ldr	r3, [r7, #32]
 80010fe:	781b      	ldrb	r3, [r3, #0]
 8001100:	2b22      	cmp	r3, #34	@ 0x22
 8001102:	d1da      	bne.n	80010ba <parse_string+0x4a>
        }
        if (((size_t)(input_end - input_buffer->content) >= input_buffer->length) || (*input_end != '\"'))
 8001104:	683b      	ldr	r3, [r7, #0]
 8001106:	681b      	ldr	r3, [r3, #0]
 8001108:	6a3a      	ldr	r2, [r7, #32]
 800110a:	1ad3      	subs	r3, r2, r3
 800110c:	461a      	mov	r2, r3
 800110e:	683b      	ldr	r3, [r7, #0]
 8001110:	685b      	ldr	r3, [r3, #4]
 8001112:	429a      	cmp	r2, r3
 8001114:	f080 80d3 	bcs.w	80012be <parse_string+0x24e>
 8001118:	6a3b      	ldr	r3, [r7, #32]
 800111a:	781b      	ldrb	r3, [r3, #0]
 800111c:	2b22      	cmp	r3, #34	@ 0x22
 800111e:	f040 80ce 	bne.w	80012be <parse_string+0x24e>
        {
            goto fail; /* string ended unexpectedly */
        }

        /* This is at most how much we need for the output */
        allocation_length = (size_t) (input_end - buffer_at_offset(input_buffer)) - skipped_bytes;
 8001122:	683b      	ldr	r3, [r7, #0]
 8001124:	681a      	ldr	r2, [r3, #0]
 8001126:	683b      	ldr	r3, [r7, #0]
 8001128:	689b      	ldr	r3, [r3, #8]
 800112a:	4413      	add	r3, r2
 800112c:	6a3a      	ldr	r2, [r7, #32]
 800112e:	1ad3      	subs	r3, r2, r3
 8001130:	461a      	mov	r2, r3
 8001132:	69bb      	ldr	r3, [r7, #24]
 8001134:	1ad3      	subs	r3, r2, r3
 8001136:	613b      	str	r3, [r7, #16]
        output = (unsigned char*)input_buffer->hooks.allocate(allocation_length + sizeof(""));
 8001138:	683b      	ldr	r3, [r7, #0]
 800113a:	691b      	ldr	r3, [r3, #16]
 800113c:	693a      	ldr	r2, [r7, #16]
 800113e:	3201      	adds	r2, #1
 8001140:	4610      	mov	r0, r2
 8001142:	4798      	blx	r3
 8001144:	61f8      	str	r0, [r7, #28]
        if (output == NULL)
 8001146:	69fb      	ldr	r3, [r7, #28]
 8001148:	2b00      	cmp	r3, #0
 800114a:	f000 80ba 	beq.w	80012c2 <parse_string+0x252>
        {
            goto fail; /* allocation failure */
        }
    }

    output_pointer = output;
 800114e:	69fb      	ldr	r3, [r7, #28]
 8001150:	60fb      	str	r3, [r7, #12]
    /* loop through the string literal */
    while (input_pointer < input_end)
 8001152:	e094      	b.n	800127e <parse_string+0x20e>
    {
        if (*input_pointer != '\\')
 8001154:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001156:	781b      	ldrb	r3, [r3, #0]
 8001158:	2b5c      	cmp	r3, #92	@ 0x5c
 800115a:	d008      	beq.n	800116e <parse_string+0xfe>
        {
            *output_pointer++ = *input_pointer++;
 800115c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 800115e:	1c53      	adds	r3, r2, #1
 8001160:	627b      	str	r3, [r7, #36]	@ 0x24
 8001162:	68fb      	ldr	r3, [r7, #12]
 8001164:	1c59      	adds	r1, r3, #1
 8001166:	60f9      	str	r1, [r7, #12]
 8001168:	7812      	ldrb	r2, [r2, #0]
 800116a:	701a      	strb	r2, [r3, #0]
 800116c:	e087      	b.n	800127e <parse_string+0x20e>
        }
        /* escape sequence */
        else
        {
            unsigned char sequence_length = 2;
 800116e:	2302      	movs	r3, #2
 8001170:	75fb      	strb	r3, [r7, #23]
            if ((input_end - input_pointer) < 1)
 8001172:	6a3a      	ldr	r2, [r7, #32]
 8001174:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001176:	1ad3      	subs	r3, r2, r3
 8001178:	2b00      	cmp	r3, #0
 800117a:	f340 80a4 	ble.w	80012c6 <parse_string+0x256>
            {
                goto fail;
            }

            switch (input_pointer[1])
 800117e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001180:	3301      	adds	r3, #1
 8001182:	781b      	ldrb	r3, [r3, #0]
 8001184:	2b75      	cmp	r3, #117	@ 0x75
 8001186:	f300 80a0 	bgt.w	80012ca <parse_string+0x25a>
 800118a:	2b5c      	cmp	r3, #92	@ 0x5c
 800118c:	da04      	bge.n	8001198 <parse_string+0x128>
 800118e:	2b22      	cmp	r3, #34	@ 0x22
 8001190:	d05c      	beq.n	800124c <parse_string+0x1dc>
 8001192:	2b2f      	cmp	r3, #47	@ 0x2f
 8001194:	d05a      	beq.n	800124c <parse_string+0x1dc>
                        goto fail;
                    }
                    break;

                default:
                    goto fail;
 8001196:	e098      	b.n	80012ca <parse_string+0x25a>
            switch (input_pointer[1])
 8001198:	3b5c      	subs	r3, #92	@ 0x5c
 800119a:	2b19      	cmp	r3, #25
 800119c:	f200 8095 	bhi.w	80012ca <parse_string+0x25a>
 80011a0:	a201      	add	r2, pc, #4	@ (adr r2, 80011a8 <parse_string+0x138>)
 80011a2:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80011a6:	bf00      	nop
 80011a8:	0800124d 	.word	0x0800124d
 80011ac:	080012cb 	.word	0x080012cb
 80011b0:	080012cb 	.word	0x080012cb
 80011b4:	080012cb 	.word	0x080012cb
 80011b8:	080012cb 	.word	0x080012cb
 80011bc:	080012cb 	.word	0x080012cb
 80011c0:	08001211 	.word	0x08001211
 80011c4:	080012cb 	.word	0x080012cb
 80011c8:	080012cb 	.word	0x080012cb
 80011cc:	080012cb 	.word	0x080012cb
 80011d0:	0800121d 	.word	0x0800121d
 80011d4:	080012cb 	.word	0x080012cb
 80011d8:	080012cb 	.word	0x080012cb
 80011dc:	080012cb 	.word	0x080012cb
 80011e0:	080012cb 	.word	0x080012cb
 80011e4:	080012cb 	.word	0x080012cb
 80011e8:	080012cb 	.word	0x080012cb
 80011ec:	080012cb 	.word	0x080012cb
 80011f0:	08001229 	.word	0x08001229
 80011f4:	080012cb 	.word	0x080012cb
 80011f8:	080012cb 	.word	0x080012cb
 80011fc:	080012cb 	.word	0x080012cb
 8001200:	08001235 	.word	0x08001235
 8001204:	080012cb 	.word	0x080012cb
 8001208:	08001241 	.word	0x08001241
 800120c:	0800125d 	.word	0x0800125d
                    *output_pointer++ = '\b';
 8001210:	68fb      	ldr	r3, [r7, #12]
 8001212:	1c5a      	adds	r2, r3, #1
 8001214:	60fa      	str	r2, [r7, #12]
 8001216:	2208      	movs	r2, #8
 8001218:	701a      	strb	r2, [r3, #0]
                    break;
 800121a:	e02c      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\f';
 800121c:	68fb      	ldr	r3, [r7, #12]
 800121e:	1c5a      	adds	r2, r3, #1
 8001220:	60fa      	str	r2, [r7, #12]
 8001222:	220c      	movs	r2, #12
 8001224:	701a      	strb	r2, [r3, #0]
                    break;
 8001226:	e026      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\n';
 8001228:	68fb      	ldr	r3, [r7, #12]
 800122a:	1c5a      	adds	r2, r3, #1
 800122c:	60fa      	str	r2, [r7, #12]
 800122e:	220a      	movs	r2, #10
 8001230:	701a      	strb	r2, [r3, #0]
                    break;
 8001232:	e020      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\r';
 8001234:	68fb      	ldr	r3, [r7, #12]
 8001236:	1c5a      	adds	r2, r3, #1
 8001238:	60fa      	str	r2, [r7, #12]
 800123a:	220d      	movs	r2, #13
 800123c:	701a      	strb	r2, [r3, #0]
                    break;
 800123e:	e01a      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\t';
 8001240:	68fb      	ldr	r3, [r7, #12]
 8001242:	1c5a      	adds	r2, r3, #1
 8001244:	60fa      	str	r2, [r7, #12]
 8001246:	2209      	movs	r2, #9
 8001248:	701a      	strb	r2, [r3, #0]
                    break;
 800124a:	e014      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = input_pointer[1];
 800124c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800124e:	1c5a      	adds	r2, r3, #1
 8001250:	68fb      	ldr	r3, [r7, #12]
 8001252:	1c59      	adds	r1, r3, #1
 8001254:	60f9      	str	r1, [r7, #12]
 8001256:	7812      	ldrb	r2, [r2, #0]
 8001258:	701a      	strb	r2, [r3, #0]
                    break;
 800125a:	e00c      	b.n	8001276 <parse_string+0x206>
                    sequence_length = utf16_literal_to_utf8(input_pointer, input_end, &output_pointer);
 800125c:	f107 030c 	add.w	r3, r7, #12
 8001260:	461a      	mov	r2, r3
 8001262:	6a39      	ldr	r1, [r7, #32]
 8001264:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8001266:	f7ff fe1b 	bl	8000ea0 <utf16_literal_to_utf8>
 800126a:	4603      	mov	r3, r0
 800126c:	75fb      	strb	r3, [r7, #23]
                    if (sequence_length == 0)
 800126e:	7dfb      	ldrb	r3, [r7, #23]
 8001270:	2b00      	cmp	r3, #0
 8001272:	d02c      	beq.n	80012ce <parse_string+0x25e>
                    break;
 8001274:	bf00      	nop
            }
            input_pointer += sequence_length;
 8001276:	7dfb      	ldrb	r3, [r7, #23]
 8001278:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 800127a:	4413      	add	r3, r2
 800127c:	627b      	str	r3, [r7, #36]	@ 0x24
    while (input_pointer < input_end)
 800127e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8001280:	6a3b      	ldr	r3, [r7, #32]
 8001282:	429a      	cmp	r2, r3
 8001284:	f4ff af66 	bcc.w	8001154 <parse_string+0xe4>
        }
    }

    /* zero terminate the output */
    *output_pointer = '\0';
 8001288:	68fb      	ldr	r3, [r7, #12]
 800128a:	2200      	movs	r2, #0
 800128c:	701a      	strb	r2, [r3, #0]

    item->type = cJSON_String;
 800128e:	687b      	ldr	r3, [r7, #4]
 8001290:	2210      	movs	r2, #16
 8001292:	60da      	str	r2, [r3, #12]
    item->valuestring = (char*)output;
 8001294:	687b      	ldr	r3, [r7, #4]
 8001296:	69fa      	ldr	r2, [r7, #28]
 8001298:	611a      	str	r2, [r3, #16]

    input_buffer->offset = (size_t) (input_end - input_buffer->content);
 800129a:	683b      	ldr	r3, [r7, #0]
 800129c:	681b      	ldr	r3, [r3, #0]
 800129e:	6a3a      	ldr	r2, [r7, #32]
 80012a0:	1ad3      	subs	r3, r2, r3
 80012a2:	461a      	mov	r2, r3
 80012a4:	683b      	ldr	r3, [r7, #0]
 80012a6:	609a      	str	r2, [r3, #8]
    input_buffer->offset++;
 80012a8:	683b      	ldr	r3, [r7, #0]
 80012aa:	689b      	ldr	r3, [r3, #8]
 80012ac:	1c5a      	adds	r2, r3, #1
 80012ae:	683b      	ldr	r3, [r7, #0]
 80012b0:	609a      	str	r2, [r3, #8]

    return true;
 80012b2:	2301      	movs	r3, #1
 80012b4:	e020      	b.n	80012f8 <parse_string+0x288>
        goto fail;
 80012b6:	bf00      	nop
 80012b8:	e00a      	b.n	80012d0 <parse_string+0x260>
                    goto fail;
 80012ba:	bf00      	nop
 80012bc:	e008      	b.n	80012d0 <parse_string+0x260>
            goto fail; /* string ended unexpectedly */
 80012be:	bf00      	nop
 80012c0:	e006      	b.n	80012d0 <parse_string+0x260>
            goto fail; /* allocation failure */
 80012c2:	bf00      	nop
 80012c4:	e004      	b.n	80012d0 <parse_string+0x260>
                goto fail;
 80012c6:	bf00      	nop
 80012c8:	e002      	b.n	80012d0 <parse_string+0x260>
                    goto fail;
 80012ca:	bf00      	nop
 80012cc:	e000      	b.n	80012d0 <parse_string+0x260>
                        goto fail;
 80012ce:	bf00      	nop

fail:
    if (output != NULL)
 80012d0:	69fb      	ldr	r3, [r7, #28]
 80012d2:	2b00      	cmp	r3, #0
 80012d4:	d005      	beq.n	80012e2 <parse_string+0x272>
    {
        input_buffer->hooks.deallocate(output);
 80012d6:	683b      	ldr	r3, [r7, #0]
 80012d8:	695b      	ldr	r3, [r3, #20]
 80012da:	69f8      	ldr	r0, [r7, #28]
 80012dc:	4798      	blx	r3
        output = NULL;
 80012de:	2300      	movs	r3, #0
 80012e0:	61fb      	str	r3, [r7, #28]
    }

    if (input_pointer != NULL)
 80012e2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80012e4:	2b00      	cmp	r3, #0
 80012e6:	d006      	beq.n	80012f6 <parse_string+0x286>
    {
        input_buffer->offset = (size_t)(input_pointer - input_buffer->content);
 80012e8:	683b      	ldr	r3, [r7, #0]
 80012ea:	681b      	ldr	r3, [r3, #0]
 80012ec:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80012ee:	1ad3      	subs	r3, r2, r3
 80012f0:	461a      	mov	r2, r3
 80012f2:	683b      	ldr	r3, [r7, #0]
 80012f4:	609a      	str	r2, [r3, #8]
    }

    return false;
 80012f6:	2300      	movs	r3, #0
}
 80012f8:	4618      	mov	r0, r3
 80012fa:	3728      	adds	r7, #40	@ 0x28
 80012fc:	46bd      	mov	sp, r7
 80012fe:	bd80      	pop	{r7, pc}

08001300 <buffer_skip_whitespace>:
static cJSON_bool parse_object(cJSON * const item, parse_buffer * const input_buffer);
static cJSON_bool print_object(const cJSON * const item, printbuffer * const output_buffer);

/* Utility to jump whitespace and cr/lf */
static parse_buffer *buffer_skip_whitespace(parse_buffer * const buffer)
{
 8001300:	b480      	push	{r7}
 8001302:	b083      	sub	sp, #12
 8001304:	af00      	add	r7, sp, #0
 8001306:	6078      	str	r0, [r7, #4]
    if ((buffer == NULL) || (buffer->content == NULL))
 8001308:	687b      	ldr	r3, [r7, #4]
 800130a:	2b00      	cmp	r3, #0
 800130c:	d003      	beq.n	8001316 <buffer_skip_whitespace+0x16>
 800130e:	687b      	ldr	r3, [r7, #4]
 8001310:	681b      	ldr	r3, [r3, #0]
 8001312:	2b00      	cmp	r3, #0
 8001314:	d101      	bne.n	800131a <buffer_skip_whitespace+0x1a>
    {
        return NULL;
 8001316:	2300      	movs	r3, #0
 8001318:	e02c      	b.n	8001374 <buffer_skip_whitespace+0x74>
    }

    if (cannot_access_at_index(buffer, 0))
 800131a:	687b      	ldr	r3, [r7, #4]
 800131c:	2b00      	cmp	r3, #0
 800131e:	d005      	beq.n	800132c <buffer_skip_whitespace+0x2c>
 8001320:	687b      	ldr	r3, [r7, #4]
 8001322:	689a      	ldr	r2, [r3, #8]
 8001324:	687b      	ldr	r3, [r7, #4]
 8001326:	685b      	ldr	r3, [r3, #4]
 8001328:	429a      	cmp	r2, r3
 800132a:	d306      	bcc.n	800133a <buffer_skip_whitespace+0x3a>
    {
        return buffer;
 800132c:	687b      	ldr	r3, [r7, #4]
 800132e:	e021      	b.n	8001374 <buffer_skip_whitespace+0x74>
    }

    while (can_access_at_index(buffer, 0) && (buffer_at_offset(buffer)[0] <= 32))
    {
       buffer->offset++;
 8001330:	687b      	ldr	r3, [r7, #4]
 8001332:	689b      	ldr	r3, [r3, #8]
 8001334:	1c5a      	adds	r2, r3, #1
 8001336:	687b      	ldr	r3, [r7, #4]
 8001338:	609a      	str	r2, [r3, #8]
    while (can_access_at_index(buffer, 0) && (buffer_at_offset(buffer)[0] <= 32))
 800133a:	687b      	ldr	r3, [r7, #4]
 800133c:	2b00      	cmp	r3, #0
 800133e:	d00d      	beq.n	800135c <buffer_skip_whitespace+0x5c>
 8001340:	687b      	ldr	r3, [r7, #4]
 8001342:	689a      	ldr	r2, [r3, #8]
 8001344:	687b      	ldr	r3, [r7, #4]
 8001346:	685b      	ldr	r3, [r3, #4]
 8001348:	429a      	cmp	r2, r3
 800134a:	d207      	bcs.n	800135c <buffer_skip_whitespace+0x5c>
 800134c:	687b      	ldr	r3, [r7, #4]
 800134e:	681a      	ldr	r2, [r3, #0]
 8001350:	687b      	ldr	r3, [r7, #4]
 8001352:	689b      	ldr	r3, [r3, #8]
 8001354:	4413      	add	r3, r2
 8001356:	781b      	ldrb	r3, [r3, #0]
 8001358:	2b20      	cmp	r3, #32
 800135a:	d9e9      	bls.n	8001330 <buffer_skip_whitespace+0x30>
    }

    if (buffer->offset == buffer->length)
 800135c:	687b      	ldr	r3, [r7, #4]
 800135e:	689a      	ldr	r2, [r3, #8]
 8001360:	687b      	ldr	r3, [r7, #4]
 8001362:	685b      	ldr	r3, [r3, #4]
 8001364:	429a      	cmp	r2, r3
 8001366:	d104      	bne.n	8001372 <buffer_skip_whitespace+0x72>
    {
        buffer->offset--;
 8001368:	687b      	ldr	r3, [r7, #4]
 800136a:	689b      	ldr	r3, [r3, #8]
 800136c:	1e5a      	subs	r2, r3, #1
 800136e:	687b      	ldr	r3, [r7, #4]
 8001370:	609a      	str	r2, [r3, #8]
    }

    return buffer;
 8001372:	687b      	ldr	r3, [r7, #4]
}
 8001374:	4618      	mov	r0, r3
 8001376:	370c      	adds	r7, #12
 8001378:	46bd      	mov	sp, r7
 800137a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800137e:	4770      	bx	lr

08001380 <skip_utf8_bom>:

/* skip the UTF-8 BOM (byte order mark) if it is at the beginning of a buffer */
static parse_buffer *skip_utf8_bom(parse_buffer * const buffer)
{
 8001380:	b580      	push	{r7, lr}
 8001382:	b082      	sub	sp, #8
 8001384:	af00      	add	r7, sp, #0
 8001386:	6078      	str	r0, [r7, #4]
    if ((buffer == NULL) || (buffer->content == NULL) || (buffer->offset != 0))
 8001388:	687b      	ldr	r3, [r7, #4]
 800138a:	2b00      	cmp	r3, #0
 800138c:	d007      	beq.n	800139e <skip_utf8_bom+0x1e>
 800138e:	687b      	ldr	r3, [r7, #4]
 8001390:	681b      	ldr	r3, [r3, #0]
 8001392:	2b00      	cmp	r3, #0
 8001394:	d003      	beq.n	800139e <skip_utf8_bom+0x1e>
 8001396:	687b      	ldr	r3, [r7, #4]
 8001398:	689b      	ldr	r3, [r3, #8]
 800139a:	2b00      	cmp	r3, #0
 800139c:	d001      	beq.n	80013a2 <skip_utf8_bom+0x22>
    {
        return NULL;
 800139e:	2300      	movs	r3, #0
 80013a0:	e01c      	b.n	80013dc <skip_utf8_bom+0x5c>
    }

    if (can_access_at_index(buffer, 4) && (strncmp((const char*)buffer_at_offset(buffer), "\xEF\xBB\xBF", 3) == 0))
 80013a2:	687b      	ldr	r3, [r7, #4]
 80013a4:	2b00      	cmp	r3, #0
 80013a6:	d018      	beq.n	80013da <skip_utf8_bom+0x5a>
 80013a8:	687b      	ldr	r3, [r7, #4]
 80013aa:	689b      	ldr	r3, [r3, #8]
 80013ac:	1d1a      	adds	r2, r3, #4
 80013ae:	687b      	ldr	r3, [r7, #4]
 80013b0:	685b      	ldr	r3, [r3, #4]
 80013b2:	429a      	cmp	r2, r3
 80013b4:	d211      	bcs.n	80013da <skip_utf8_bom+0x5a>
 80013b6:	687b      	ldr	r3, [r7, #4]
 80013b8:	681a      	ldr	r2, [r3, #0]
 80013ba:	687b      	ldr	r3, [r7, #4]
 80013bc:	689b      	ldr	r3, [r3, #8]
 80013be:	4413      	add	r3, r2
 80013c0:	2203      	movs	r2, #3
 80013c2:	4908      	ldr	r1, [pc, #32]	@ (80013e4 <skip_utf8_bom+0x64>)
 80013c4:	4618      	mov	r0, r3
 80013c6:	f028 fca3 	bl	8029d10 <strncmp>
 80013ca:	4603      	mov	r3, r0
 80013cc:	2b00      	cmp	r3, #0
 80013ce:	d104      	bne.n	80013da <skip_utf8_bom+0x5a>
    {
        buffer->offset += 3;
 80013d0:	687b      	ldr	r3, [r7, #4]
 80013d2:	689b      	ldr	r3, [r3, #8]
 80013d4:	1cda      	adds	r2, r3, #3
 80013d6:	687b      	ldr	r3, [r7, #4]
 80013d8:	609a      	str	r2, [r3, #8]
    }

    return buffer;
 80013da:	687b      	ldr	r3, [r7, #4]
}
 80013dc:	4618      	mov	r0, r3
 80013de:	3708      	adds	r7, #8
 80013e0:	46bd      	mov	sp, r7
 80013e2:	bd80      	pop	{r7, pc}
 80013e4:	0802c498 	.word	0x0802c498

080013e8 <cJSON_ParseWithOpts>:

CJSON_PUBLIC(cJSON *) cJSON_ParseWithOpts(const char *value, const char **return_parse_end, cJSON_bool require_null_terminated)
{
 80013e8:	b580      	push	{r7, lr}
 80013ea:	b086      	sub	sp, #24
 80013ec:	af00      	add	r7, sp, #0
 80013ee:	60f8      	str	r0, [r7, #12]
 80013f0:	60b9      	str	r1, [r7, #8]
 80013f2:	607a      	str	r2, [r7, #4]
    size_t buffer_length;

    if (NULL == value)
 80013f4:	68fb      	ldr	r3, [r7, #12]
 80013f6:	2b00      	cmp	r3, #0
 80013f8:	d101      	bne.n	80013fe <cJSON_ParseWithOpts+0x16>
    {
        return NULL;
 80013fa:	2300      	movs	r3, #0
 80013fc:	e00c      	b.n	8001418 <cJSON_ParseWithOpts+0x30>
    }

    /* Adding null character size due to require_null_terminated. */
    buffer_length = strlen(value) + sizeof("");
 80013fe:	68f8      	ldr	r0, [r7, #12]
 8001400:	f7fe ffce 	bl	80003a0 <strlen>
 8001404:	4603      	mov	r3, r0
 8001406:	3301      	adds	r3, #1
 8001408:	617b      	str	r3, [r7, #20]

    return cJSON_ParseWithLengthOpts(value, buffer_length, return_parse_end, require_null_terminated);
 800140a:	687b      	ldr	r3, [r7, #4]
 800140c:	68ba      	ldr	r2, [r7, #8]
 800140e:	6979      	ldr	r1, [r7, #20]
 8001410:	68f8      	ldr	r0, [r7, #12]
 8001412:	f000 f805 	bl	8001420 <cJSON_ParseWithLengthOpts>
 8001416:	4603      	mov	r3, r0
}
 8001418:	4618      	mov	r0, r3
 800141a:	3718      	adds	r7, #24
 800141c:	46bd      	mov	sp, r7
 800141e:	bd80      	pop	{r7, pc}

08001420 <cJSON_ParseWithLengthOpts>:

/* Parse an object - create a new root, and populate. */
CJSON_PUBLIC(cJSON *) cJSON_ParseWithLengthOpts(const char *value, size_t buffer_length, const char **return_parse_end, cJSON_bool require_null_terminated)
{
 8001420:	b580      	push	{r7, lr}
 8001422:	b08e      	sub	sp, #56	@ 0x38
 8001424:	af00      	add	r7, sp, #0
 8001426:	60f8      	str	r0, [r7, #12]
 8001428:	60b9      	str	r1, [r7, #8]
 800142a:	607a      	str	r2, [r7, #4]
 800142c:	603b      	str	r3, [r7, #0]
    parse_buffer buffer = { 0, 0, 0, 0, { 0, 0, 0 } };
 800142e:	f107 0318 	add.w	r3, r7, #24
 8001432:	2200      	movs	r2, #0
 8001434:	601a      	str	r2, [r3, #0]
 8001436:	605a      	str	r2, [r3, #4]
 8001438:	609a      	str	r2, [r3, #8]
 800143a:	60da      	str	r2, [r3, #12]
 800143c:	611a      	str	r2, [r3, #16]
 800143e:	615a      	str	r2, [r3, #20]
 8001440:	619a      	str	r2, [r3, #24]
    cJSON *item = NULL;
 8001442:	2300      	movs	r3, #0
 8001444:	637b      	str	r3, [r7, #52]	@ 0x34

    /* reset error position */
    global_error.json = NULL;
 8001446:	4b41      	ldr	r3, [pc, #260]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 8001448:	2200      	movs	r2, #0
 800144a:	601a      	str	r2, [r3, #0]
    global_error.position = 0;
 800144c:	4b3f      	ldr	r3, [pc, #252]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 800144e:	2200      	movs	r2, #0
 8001450:	605a      	str	r2, [r3, #4]

    if (value == NULL || 0 == buffer_length)
 8001452:	68fb      	ldr	r3, [r7, #12]
 8001454:	2b00      	cmp	r3, #0
 8001456:	d042      	beq.n	80014de <cJSON_ParseWithLengthOpts+0xbe>
 8001458:	68bb      	ldr	r3, [r7, #8]
 800145a:	2b00      	cmp	r3, #0
 800145c:	d03f      	beq.n	80014de <cJSON_ParseWithLengthOpts+0xbe>
    {
        goto fail;
    }

    buffer.content = (const unsigned char*)value;
 800145e:	68fb      	ldr	r3, [r7, #12]
 8001460:	61bb      	str	r3, [r7, #24]
    buffer.length = buffer_length;
 8001462:	68bb      	ldr	r3, [r7, #8]
 8001464:	61fb      	str	r3, [r7, #28]
    buffer.offset = 0;
 8001466:	2300      	movs	r3, #0
 8001468:	623b      	str	r3, [r7, #32]
    buffer.hooks = global_hooks;
 800146a:	4a39      	ldr	r2, [pc, #228]	@ (8001550 <cJSON_ParseWithLengthOpts+0x130>)
 800146c:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8001470:	ca07      	ldmia	r2, {r0, r1, r2}
 8001472:	e883 0007 	stmia.w	r3, {r0, r1, r2}

    item = cJSON_New_Item(&global_hooks);
 8001476:	4836      	ldr	r0, [pc, #216]	@ (8001550 <cJSON_ParseWithLengthOpts+0x130>)
 8001478:	f7ff fb72 	bl	8000b60 <cJSON_New_Item>
 800147c:	6378      	str	r0, [r7, #52]	@ 0x34
    if (item == NULL) /* memory fail */
 800147e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8001480:	2b00      	cmp	r3, #0
 8001482:	d02e      	beq.n	80014e2 <cJSON_ParseWithLengthOpts+0xc2>
    {
        goto fail;
    }

    if (!parse_value(item, buffer_skip_whitespace(skip_utf8_bom(&buffer))))
 8001484:	f107 0318 	add.w	r3, r7, #24
 8001488:	4618      	mov	r0, r3
 800148a:	f7ff ff79 	bl	8001380 <skip_utf8_bom>
 800148e:	4603      	mov	r3, r0
 8001490:	4618      	mov	r0, r3
 8001492:	f7ff ff35 	bl	8001300 <buffer_skip_whitespace>
 8001496:	4603      	mov	r3, r0
 8001498:	4619      	mov	r1, r3
 800149a:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 800149c:	f000 f868 	bl	8001570 <parse_value>
 80014a0:	4603      	mov	r3, r0
 80014a2:	2b00      	cmp	r3, #0
 80014a4:	d01f      	beq.n	80014e6 <cJSON_ParseWithLengthOpts+0xc6>
        /* parse failure. ep is set. */
        goto fail;
    }

    /* if we require null-terminated JSON without appended garbage, skip and then check for a null terminator */
    if (require_null_terminated)
 80014a6:	683b      	ldr	r3, [r7, #0]
 80014a8:	2b00      	cmp	r3, #0
 80014aa:	d00e      	beq.n	80014ca <cJSON_ParseWithLengthOpts+0xaa>
    {
        buffer_skip_whitespace(&buffer);
 80014ac:	f107 0318 	add.w	r3, r7, #24
 80014b0:	4618      	mov	r0, r3
 80014b2:	f7ff ff25 	bl	8001300 <buffer_skip_whitespace>
        if ((buffer.offset >= buffer.length) || buffer_at_offset(&buffer)[0] != '\0')
 80014b6:	6a3a      	ldr	r2, [r7, #32]
 80014b8:	69fb      	ldr	r3, [r7, #28]
 80014ba:	429a      	cmp	r2, r3
 80014bc:	d215      	bcs.n	80014ea <cJSON_ParseWithLengthOpts+0xca>
 80014be:	69ba      	ldr	r2, [r7, #24]
 80014c0:	6a3b      	ldr	r3, [r7, #32]
 80014c2:	4413      	add	r3, r2
 80014c4:	781b      	ldrb	r3, [r3, #0]
 80014c6:	2b00      	cmp	r3, #0
 80014c8:	d10f      	bne.n	80014ea <cJSON_ParseWithLengthOpts+0xca>
        {
            goto fail;
        }
    }
    if (return_parse_end)
 80014ca:	687b      	ldr	r3, [r7, #4]
 80014cc:	2b00      	cmp	r3, #0
 80014ce:	d004      	beq.n	80014da <cJSON_ParseWithLengthOpts+0xba>
    {
        *return_parse_end = (const char*)buffer_at_offset(&buffer);
 80014d0:	69ba      	ldr	r2, [r7, #24]
 80014d2:	6a3b      	ldr	r3, [r7, #32]
 80014d4:	441a      	add	r2, r3
 80014d6:	687b      	ldr	r3, [r7, #4]
 80014d8:	601a      	str	r2, [r3, #0]
    }

    return item;
 80014da:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80014dc:	e031      	b.n	8001542 <cJSON_ParseWithLengthOpts+0x122>
        goto fail;
 80014de:	bf00      	nop
 80014e0:	e004      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
        goto fail;
 80014e2:	bf00      	nop
 80014e4:	e002      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
        goto fail;
 80014e6:	bf00      	nop
 80014e8:	e000      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
            goto fail;
 80014ea:	bf00      	nop

fail:
    if (item != NULL)
 80014ec:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80014ee:	2b00      	cmp	r3, #0
 80014f0:	d002      	beq.n	80014f8 <cJSON_ParseWithLengthOpts+0xd8>
    {
        cJSON_Delete(item);
 80014f2:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 80014f4:	f7ff fb4a 	bl	8000b8c <cJSON_Delete>
    }

    if (value != NULL)
 80014f8:	68fb      	ldr	r3, [r7, #12]
 80014fa:	2b00      	cmp	r3, #0
 80014fc:	d020      	beq.n	8001540 <cJSON_ParseWithLengthOpts+0x120>
    {
        error local_error;
        local_error.json = (const unsigned char*)value;
 80014fe:	68fb      	ldr	r3, [r7, #12]
 8001500:	613b      	str	r3, [r7, #16]
        local_error.position = 0;
 8001502:	2300      	movs	r3, #0
 8001504:	617b      	str	r3, [r7, #20]

        if (buffer.offset < buffer.length)
 8001506:	6a3a      	ldr	r2, [r7, #32]
 8001508:	69fb      	ldr	r3, [r7, #28]
 800150a:	429a      	cmp	r2, r3
 800150c:	d202      	bcs.n	8001514 <cJSON_ParseWithLengthOpts+0xf4>
        {
            local_error.position = buffer.offset;
 800150e:	6a3b      	ldr	r3, [r7, #32]
 8001510:	617b      	str	r3, [r7, #20]
 8001512:	e005      	b.n	8001520 <cJSON_ParseWithLengthOpts+0x100>
        }
        else if (buffer.length > 0)
 8001514:	69fb      	ldr	r3, [r7, #28]
 8001516:	2b00      	cmp	r3, #0
 8001518:	d002      	beq.n	8001520 <cJSON_ParseWithLengthOpts+0x100>
        {
            local_error.position = buffer.length - 1;
 800151a:	69fb      	ldr	r3, [r7, #28]
 800151c:	3b01      	subs	r3, #1
 800151e:	617b      	str	r3, [r7, #20]
        }

        if (return_parse_end != NULL)
 8001520:	687b      	ldr	r3, [r7, #4]
 8001522:	2b00      	cmp	r3, #0
 8001524:	d004      	beq.n	8001530 <cJSON_ParseWithLengthOpts+0x110>
        {
            *return_parse_end = (const char*)local_error.json + local_error.position;
 8001526:	693a      	ldr	r2, [r7, #16]
 8001528:	697b      	ldr	r3, [r7, #20]
 800152a:	441a      	add	r2, r3
 800152c:	687b      	ldr	r3, [r7, #4]
 800152e:	601a      	str	r2, [r3, #0]
        }

        global_error = local_error;
 8001530:	4b06      	ldr	r3, [pc, #24]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 8001532:	461a      	mov	r2, r3
 8001534:	f107 0310 	add.w	r3, r7, #16
 8001538:	e893 0003 	ldmia.w	r3, {r0, r1}
 800153c:	e882 0003 	stmia.w	r2, {r0, r1}
    }

    return NULL;
 8001540:	2300      	movs	r3, #0
}
 8001542:	4618      	mov	r0, r3
 8001544:	3738      	adds	r7, #56	@ 0x38
 8001546:	46bd      	mov	sp, r7
 8001548:	bd80      	pop	{r7, pc}
 800154a:	bf00      	nop
 800154c:	24000240 	.word	0x24000240
 8001550:	24000000 	.word	0x24000000

08001554 <cJSON_Parse>:

/* Default options for cJSON_Parse */
CJSON_PUBLIC(cJSON *) cJSON_Parse(const char *value)
{
 8001554:	b580      	push	{r7, lr}
 8001556:	b082      	sub	sp, #8
 8001558:	af00      	add	r7, sp, #0
 800155a:	6078      	str	r0, [r7, #4]
    return cJSON_ParseWithOpts(value, 0, 0);
 800155c:	2200      	movs	r2, #0
 800155e:	2100      	movs	r1, #0
 8001560:	6878      	ldr	r0, [r7, #4]
 8001562:	f7ff ff41 	bl	80013e8 <cJSON_ParseWithOpts>
 8001566:	4603      	mov	r3, r0
}
 8001568:	4618      	mov	r0, r3
 800156a:	3708      	adds	r7, #8
 800156c:	46bd      	mov	sp, r7
 800156e:	bd80      	pop	{r7, pc}

08001570 <parse_value>:
    return print_value(item, &p);
}

/* Parser core - when encountering text, process appropriately. */
static cJSON_bool parse_value(cJSON * const item, parse_buffer * const input_buffer)
{
 8001570:	b580      	push	{r7, lr}
 8001572:	b082      	sub	sp, #8
 8001574:	af00      	add	r7, sp, #0
 8001576:	6078      	str	r0, [r7, #4]
 8001578:	6039      	str	r1, [r7, #0]
    if ((input_buffer == NULL) || (input_buffer->content == NULL))
 800157a:	683b      	ldr	r3, [r7, #0]
 800157c:	2b00      	cmp	r3, #0
 800157e:	d003      	beq.n	8001588 <parse_value+0x18>
 8001580:	683b      	ldr	r3, [r7, #0]
 8001582:	681b      	ldr	r3, [r3, #0]
 8001584:	2b00      	cmp	r3, #0
 8001586:	d101      	bne.n	800158c <parse_value+0x1c>
    {
        return false; /* no input */
 8001588:	2300      	movs	r3, #0
 800158a:	e0d2      	b.n	8001732 <parse_value+0x1c2>
    }

    /* parse the different types of values */
    /* null */
    if (can_read(input_buffer, 4) && (strncmp((const char*)buffer_at_offset(input_buffer), "null", 4) == 0))
 800158c:	683b      	ldr	r3, [r7, #0]
 800158e:	2b00      	cmp	r3, #0
 8001590:	d01d      	beq.n	80015ce <parse_value+0x5e>
 8001592:	683b      	ldr	r3, [r7, #0]
 8001594:	689b      	ldr	r3, [r3, #8]
 8001596:	1d1a      	adds	r2, r3, #4
 8001598:	683b      	ldr	r3, [r7, #0]
 800159a:	685b      	ldr	r3, [r3, #4]
 800159c:	429a      	cmp	r2, r3
 800159e:	d816      	bhi.n	80015ce <parse_value+0x5e>
 80015a0:	683b      	ldr	r3, [r7, #0]
 80015a2:	681a      	ldr	r2, [r3, #0]
 80015a4:	683b      	ldr	r3, [r7, #0]
 80015a6:	689b      	ldr	r3, [r3, #8]
 80015a8:	4413      	add	r3, r2
 80015aa:	2204      	movs	r2, #4
 80015ac:	4963      	ldr	r1, [pc, #396]	@ (800173c <parse_value+0x1cc>)
 80015ae:	4618      	mov	r0, r3
 80015b0:	f028 fbae 	bl	8029d10 <strncmp>
 80015b4:	4603      	mov	r3, r0
 80015b6:	2b00      	cmp	r3, #0
 80015b8:	d109      	bne.n	80015ce <parse_value+0x5e>
    {
        item->type = cJSON_NULL;
 80015ba:	687b      	ldr	r3, [r7, #4]
 80015bc:	2204      	movs	r2, #4
 80015be:	60da      	str	r2, [r3, #12]
        input_buffer->offset += 4;
 80015c0:	683b      	ldr	r3, [r7, #0]
 80015c2:	689b      	ldr	r3, [r3, #8]
 80015c4:	1d1a      	adds	r2, r3, #4
 80015c6:	683b      	ldr	r3, [r7, #0]
 80015c8:	609a      	str	r2, [r3, #8]
        return true;
 80015ca:	2301      	movs	r3, #1
 80015cc:	e0b1      	b.n	8001732 <parse_value+0x1c2>
    }
    /* false */
    if (can_read(input_buffer, 5) && (strncmp((const char*)buffer_at_offset(input_buffer), "false", 5) == 0))
 80015ce:	683b      	ldr	r3, [r7, #0]
 80015d0:	2b00      	cmp	r3, #0
 80015d2:	d01d      	beq.n	8001610 <parse_value+0xa0>
 80015d4:	683b      	ldr	r3, [r7, #0]
 80015d6:	689b      	ldr	r3, [r3, #8]
 80015d8:	1d5a      	adds	r2, r3, #5
 80015da:	683b      	ldr	r3, [r7, #0]
 80015dc:	685b      	ldr	r3, [r3, #4]
 80015de:	429a      	cmp	r2, r3
 80015e0:	d816      	bhi.n	8001610 <parse_value+0xa0>
 80015e2:	683b      	ldr	r3, [r7, #0]
 80015e4:	681a      	ldr	r2, [r3, #0]
 80015e6:	683b      	ldr	r3, [r7, #0]
 80015e8:	689b      	ldr	r3, [r3, #8]
 80015ea:	4413      	add	r3, r2
 80015ec:	2205      	movs	r2, #5
 80015ee:	4954      	ldr	r1, [pc, #336]	@ (8001740 <parse_value+0x1d0>)
 80015f0:	4618      	mov	r0, r3
 80015f2:	f028 fb8d 	bl	8029d10 <strncmp>
 80015f6:	4603      	mov	r3, r0
 80015f8:	2b00      	cmp	r3, #0
 80015fa:	d109      	bne.n	8001610 <parse_value+0xa0>
    {
        item->type = cJSON_False;
 80015fc:	687b      	ldr	r3, [r7, #4]
 80015fe:	2201      	movs	r2, #1
 8001600:	60da      	str	r2, [r3, #12]
        input_buffer->offset += 5;
 8001602:	683b      	ldr	r3, [r7, #0]
 8001604:	689b      	ldr	r3, [r3, #8]
 8001606:	1d5a      	adds	r2, r3, #5
 8001608:	683b      	ldr	r3, [r7, #0]
 800160a:	609a      	str	r2, [r3, #8]
        return true;
 800160c:	2301      	movs	r3, #1
 800160e:	e090      	b.n	8001732 <parse_value+0x1c2>
    }
    /* true */
    if (can_read(input_buffer, 4) && (strncmp((const char*)buffer_at_offset(input_buffer), "true", 4) == 0))
 8001610:	683b      	ldr	r3, [r7, #0]
 8001612:	2b00      	cmp	r3, #0
 8001614:	d020      	beq.n	8001658 <parse_value+0xe8>
 8001616:	683b      	ldr	r3, [r7, #0]
 8001618:	689b      	ldr	r3, [r3, #8]
 800161a:	1d1a      	adds	r2, r3, #4
 800161c:	683b      	ldr	r3, [r7, #0]
 800161e:	685b      	ldr	r3, [r3, #4]
 8001620:	429a      	cmp	r2, r3
 8001622:	d819      	bhi.n	8001658 <parse_value+0xe8>
 8001624:	683b      	ldr	r3, [r7, #0]
 8001626:	681a      	ldr	r2, [r3, #0]
 8001628:	683b      	ldr	r3, [r7, #0]
 800162a:	689b      	ldr	r3, [r3, #8]
 800162c:	4413      	add	r3, r2
 800162e:	2204      	movs	r2, #4
 8001630:	4944      	ldr	r1, [pc, #272]	@ (8001744 <parse_value+0x1d4>)
 8001632:	4618      	mov	r0, r3
 8001634:	f028 fb6c 	bl	8029d10 <strncmp>
 8001638:	4603      	mov	r3, r0
 800163a:	2b00      	cmp	r3, #0
 800163c:	d10c      	bne.n	8001658 <parse_value+0xe8>
    {
        item->type = cJSON_True;
 800163e:	687b      	ldr	r3, [r7, #4]
 8001640:	2202      	movs	r2, #2
 8001642:	60da      	str	r2, [r3, #12]
        item->valueint = 1;
 8001644:	687b      	ldr	r3, [r7, #4]
 8001646:	2201      	movs	r2, #1
 8001648:	615a      	str	r2, [r3, #20]
        input_buffer->offset += 4;
 800164a:	683b      	ldr	r3, [r7, #0]
 800164c:	689b      	ldr	r3, [r3, #8]
 800164e:	1d1a      	adds	r2, r3, #4
 8001650:	683b      	ldr	r3, [r7, #0]
 8001652:	609a      	str	r2, [r3, #8]
        return true;
 8001654:	2301      	movs	r3, #1
 8001656:	e06c      	b.n	8001732 <parse_value+0x1c2>
    }
    /* string */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '\"'))
 8001658:	683b      	ldr	r3, [r7, #0]
 800165a:	2b00      	cmp	r3, #0
 800165c:	d013      	beq.n	8001686 <parse_value+0x116>
 800165e:	683b      	ldr	r3, [r7, #0]
 8001660:	689a      	ldr	r2, [r3, #8]
 8001662:	683b      	ldr	r3, [r7, #0]
 8001664:	685b      	ldr	r3, [r3, #4]
 8001666:	429a      	cmp	r2, r3
 8001668:	d20d      	bcs.n	8001686 <parse_value+0x116>
 800166a:	683b      	ldr	r3, [r7, #0]
 800166c:	681a      	ldr	r2, [r3, #0]
 800166e:	683b      	ldr	r3, [r7, #0]
 8001670:	689b      	ldr	r3, [r3, #8]
 8001672:	4413      	add	r3, r2
 8001674:	781b      	ldrb	r3, [r3, #0]
 8001676:	2b22      	cmp	r3, #34	@ 0x22
 8001678:	d105      	bne.n	8001686 <parse_value+0x116>
    {
        return parse_string(item, input_buffer);
 800167a:	6839      	ldr	r1, [r7, #0]
 800167c:	6878      	ldr	r0, [r7, #4]
 800167e:	f7ff fcf7 	bl	8001070 <parse_string>
 8001682:	4603      	mov	r3, r0
 8001684:	e055      	b.n	8001732 <parse_value+0x1c2>
    }
    /* number */
    if (can_access_at_index(input_buffer, 0) && ((buffer_at_offset(input_buffer)[0] == '-') || ((buffer_at_offset(input_buffer)[0] >= '0') && (buffer_at_offset(input_buffer)[0] <= '9'))))
 8001686:	683b      	ldr	r3, [r7, #0]
 8001688:	2b00      	cmp	r3, #0
 800168a:	d023      	beq.n	80016d4 <parse_value+0x164>
 800168c:	683b      	ldr	r3, [r7, #0]
 800168e:	689a      	ldr	r2, [r3, #8]
 8001690:	683b      	ldr	r3, [r7, #0]
 8001692:	685b      	ldr	r3, [r3, #4]
 8001694:	429a      	cmp	r2, r3
 8001696:	d21d      	bcs.n	80016d4 <parse_value+0x164>
 8001698:	683b      	ldr	r3, [r7, #0]
 800169a:	681a      	ldr	r2, [r3, #0]
 800169c:	683b      	ldr	r3, [r7, #0]
 800169e:	689b      	ldr	r3, [r3, #8]
 80016a0:	4413      	add	r3, r2
 80016a2:	781b      	ldrb	r3, [r3, #0]
 80016a4:	2b2d      	cmp	r3, #45	@ 0x2d
 80016a6:	d00f      	beq.n	80016c8 <parse_value+0x158>
 80016a8:	683b      	ldr	r3, [r7, #0]
 80016aa:	681a      	ldr	r2, [r3, #0]
 80016ac:	683b      	ldr	r3, [r7, #0]
 80016ae:	689b      	ldr	r3, [r3, #8]
 80016b0:	4413      	add	r3, r2
 80016b2:	781b      	ldrb	r3, [r3, #0]
 80016b4:	2b2f      	cmp	r3, #47	@ 0x2f
 80016b6:	d90d      	bls.n	80016d4 <parse_value+0x164>
 80016b8:	683b      	ldr	r3, [r7, #0]
 80016ba:	681a      	ldr	r2, [r3, #0]
 80016bc:	683b      	ldr	r3, [r7, #0]
 80016be:	689b      	ldr	r3, [r3, #8]
 80016c0:	4413      	add	r3, r2
 80016c2:	781b      	ldrb	r3, [r3, #0]
 80016c4:	2b39      	cmp	r3, #57	@ 0x39
 80016c6:	d805      	bhi.n	80016d4 <parse_value+0x164>
    {
        return parse_number(item, input_buffer);
 80016c8:	6839      	ldr	r1, [r7, #0]
 80016ca:	6878      	ldr	r0, [r7, #4]
 80016cc:	f7ff fab8 	bl	8000c40 <parse_number>
 80016d0:	4603      	mov	r3, r0
 80016d2:	e02e      	b.n	8001732 <parse_value+0x1c2>
    }
    /* array */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '['))
 80016d4:	683b      	ldr	r3, [r7, #0]
 80016d6:	2b00      	cmp	r3, #0
 80016d8:	d013      	beq.n	8001702 <parse_value+0x192>
 80016da:	683b      	ldr	r3, [r7, #0]
 80016dc:	689a      	ldr	r2, [r3, #8]
 80016de:	683b      	ldr	r3, [r7, #0]
 80016e0:	685b      	ldr	r3, [r3, #4]
 80016e2:	429a      	cmp	r2, r3
 80016e4:	d20d      	bcs.n	8001702 <parse_value+0x192>
 80016e6:	683b      	ldr	r3, [r7, #0]
 80016e8:	681a      	ldr	r2, [r3, #0]
 80016ea:	683b      	ldr	r3, [r7, #0]
 80016ec:	689b      	ldr	r3, [r3, #8]
 80016ee:	4413      	add	r3, r2
 80016f0:	781b      	ldrb	r3, [r3, #0]
 80016f2:	2b5b      	cmp	r3, #91	@ 0x5b
 80016f4:	d105      	bne.n	8001702 <parse_value+0x192>
    {
        return parse_array(item, input_buffer);
 80016f6:	6839      	ldr	r1, [r7, #0]
 80016f8:	6878      	ldr	r0, [r7, #4]
 80016fa:	f000 f825 	bl	8001748 <parse_array>
 80016fe:	4603      	mov	r3, r0
 8001700:	e017      	b.n	8001732 <parse_value+0x1c2>
    }
    /* object */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '{'))
 8001702:	683b      	ldr	r3, [r7, #0]
 8001704:	2b00      	cmp	r3, #0
 8001706:	d013      	beq.n	8001730 <parse_value+0x1c0>
 8001708:	683b      	ldr	r3, [r7, #0]
 800170a:	689a      	ldr	r2, [r3, #8]
 800170c:	683b      	ldr	r3, [r7, #0]
 800170e:	685b      	ldr	r3, [r3, #4]
 8001710:	429a      	cmp	r2, r3
 8001712:	d20d      	bcs.n	8001730 <parse_value+0x1c0>
 8001714:	683b      	ldr	r3, [r7, #0]
 8001716:	681a      	ldr	r2, [r3, #0]
 8001718:	683b      	ldr	r3, [r7, #0]
 800171a:	689b      	ldr	r3, [r3, #8]
 800171c:	4413      	add	r3, r2
 800171e:	781b      	ldrb	r3, [r3, #0]
 8001720:	2b7b      	cmp	r3, #123	@ 0x7b
 8001722:	d105      	bne.n	8001730 <parse_value+0x1c0>
    {
        return parse_object(item, input_buffer);
 8001724:	6839      	ldr	r1, [r7, #0]
 8001726:	6878      	ldr	r0, [r7, #4]
 8001728:	f000 f8d2 	bl	80018d0 <parse_object>
 800172c:	4603      	mov	r3, r0
 800172e:	e000      	b.n	8001732 <parse_value+0x1c2>
    }

    return false;
 8001730:	2300      	movs	r3, #0
}
 8001732:	4618      	mov	r0, r3
 8001734:	3708      	adds	r7, #8
 8001736:	46bd      	mov	sp, r7
 8001738:	bd80      	pop	{r7, pc}
 800173a:	bf00      	nop
 800173c:	0802c46c 	.word	0x0802c46c
 8001740:	0802c49c 	.word	0x0802c49c
 8001744:	0802c4a4 	.word	0x0802c4a4

08001748 <parse_array>:
    }
}

/* Build an array from input text. */
static cJSON_bool parse_array(cJSON * const item, parse_buffer * const input_buffer)
{
 8001748:	b580      	push	{r7, lr}
 800174a:	b086      	sub	sp, #24
 800174c:	af00      	add	r7, sp, #0
 800174e:	6078      	str	r0, [r7, #4]
 8001750:	6039      	str	r1, [r7, #0]
    cJSON *head = NULL; /* head of the linked list */
 8001752:	2300      	movs	r3, #0
 8001754:	617b      	str	r3, [r7, #20]
    cJSON *current_item = NULL;
 8001756:	2300      	movs	r3, #0
 8001758:	613b      	str	r3, [r7, #16]

    if (input_buffer->depth >= CJSON_NESTING_LIMIT)
 800175a:	683b      	ldr	r3, [r7, #0]
 800175c:	68db      	ldr	r3, [r3, #12]
 800175e:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 8001762:	d301      	bcc.n	8001768 <parse_array+0x20>
    {
        return false; /* to deeply nested */
 8001764:	2300      	movs	r3, #0
 8001766:	e0af      	b.n	80018c8 <parse_array+0x180>
    }
    input_buffer->depth++;
 8001768:	683b      	ldr	r3, [r7, #0]
 800176a:	68db      	ldr	r3, [r3, #12]
 800176c:	1c5a      	adds	r2, r3, #1
 800176e:	683b      	ldr	r3, [r7, #0]
 8001770:	60da      	str	r2, [r3, #12]

    if (buffer_at_offset(input_buffer)[0] != '[')
 8001772:	683b      	ldr	r3, [r7, #0]
 8001774:	681a      	ldr	r2, [r3, #0]
 8001776:	683b      	ldr	r3, [r7, #0]
 8001778:	689b      	ldr	r3, [r3, #8]
 800177a:	4413      	add	r3, r2
 800177c:	781b      	ldrb	r3, [r3, #0]
 800177e:	2b5b      	cmp	r3, #91	@ 0x5b
 8001780:	f040 8094 	bne.w	80018ac <parse_array+0x164>
    {
        /* not an array */
        goto fail;
    }

    input_buffer->offset++;
 8001784:	683b      	ldr	r3, [r7, #0]
 8001786:	689b      	ldr	r3, [r3, #8]
 8001788:	1c5a      	adds	r2, r3, #1
 800178a:	683b      	ldr	r3, [r7, #0]
 800178c:	609a      	str	r2, [r3, #8]
    buffer_skip_whitespace(input_buffer);
 800178e:	6838      	ldr	r0, [r7, #0]
 8001790:	f7ff fdb6 	bl	8001300 <buffer_skip_whitespace>
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ']'))
 8001794:	683b      	ldr	r3, [r7, #0]
 8001796:	2b00      	cmp	r3, #0
 8001798:	d00d      	beq.n	80017b6 <parse_array+0x6e>
 800179a:	683b      	ldr	r3, [r7, #0]
 800179c:	689a      	ldr	r2, [r3, #8]
 800179e:	683b      	ldr	r3, [r7, #0]
 80017a0:	685b      	ldr	r3, [r3, #4]
 80017a2:	429a      	cmp	r2, r3
 80017a4:	d207      	bcs.n	80017b6 <parse_array+0x6e>
 80017a6:	683b      	ldr	r3, [r7, #0]
 80017a8:	681a      	ldr	r2, [r3, #0]
 80017aa:	683b      	ldr	r3, [r7, #0]
 80017ac:	689b      	ldr	r3, [r3, #8]
 80017ae:	4413      	add	r3, r2
 80017b0:	781b      	ldrb	r3, [r3, #0]
 80017b2:	2b5d      	cmp	r3, #93	@ 0x5d
 80017b4:	d061      	beq.n	800187a <parse_array+0x132>
        /* empty array */
        goto success;
    }

    /* check if we skipped to the end of the buffer */
    if (cannot_access_at_index(input_buffer, 0))
 80017b6:	683b      	ldr	r3, [r7, #0]
 80017b8:	2b00      	cmp	r3, #0
 80017ba:	d005      	beq.n	80017c8 <parse_array+0x80>
 80017bc:	683b      	ldr	r3, [r7, #0]
 80017be:	689a      	ldr	r2, [r3, #8]
 80017c0:	683b      	ldr	r3, [r7, #0]
 80017c2:	685b      	ldr	r3, [r3, #4]
 80017c4:	429a      	cmp	r2, r3
 80017c6:	d305      	bcc.n	80017d4 <parse_array+0x8c>
    {
        input_buffer->offset--;
 80017c8:	683b      	ldr	r3, [r7, #0]
 80017ca:	689b      	ldr	r3, [r3, #8]
 80017cc:	1e5a      	subs	r2, r3, #1
 80017ce:	683b      	ldr	r3, [r7, #0]
 80017d0:	609a      	str	r2, [r3, #8]
        goto fail;
 80017d2:	e072      	b.n	80018ba <parse_array+0x172>
    }

    /* step back to character in front of the first element */
    input_buffer->offset--;
 80017d4:	683b      	ldr	r3, [r7, #0]
 80017d6:	689b      	ldr	r3, [r3, #8]
 80017d8:	1e5a      	subs	r2, r3, #1
 80017da:	683b      	ldr	r3, [r7, #0]
 80017dc:	609a      	str	r2, [r3, #8]
    /* loop through the comma separated array elements */
    do
    {
        /* allocate next item */
        cJSON *new_item = cJSON_New_Item(&(input_buffer->hooks));
 80017de:	683b      	ldr	r3, [r7, #0]
 80017e0:	3310      	adds	r3, #16
 80017e2:	4618      	mov	r0, r3
 80017e4:	f7ff f9bc 	bl	8000b60 <cJSON_New_Item>
 80017e8:	60f8      	str	r0, [r7, #12]
        if (new_item == NULL)
 80017ea:	68fb      	ldr	r3, [r7, #12]
 80017ec:	2b00      	cmp	r3, #0
 80017ee:	d05f      	beq.n	80018b0 <parse_array+0x168>
        {
            goto fail; /* allocation failure */
        }

        /* attach next item to list */
        if (head == NULL)
 80017f0:	697b      	ldr	r3, [r7, #20]
 80017f2:	2b00      	cmp	r3, #0
 80017f4:	d104      	bne.n	8001800 <parse_array+0xb8>
        {
            /* start the linked list */
            current_item = head = new_item;
 80017f6:	68fb      	ldr	r3, [r7, #12]
 80017f8:	617b      	str	r3, [r7, #20]
 80017fa:	697b      	ldr	r3, [r7, #20]
 80017fc:	613b      	str	r3, [r7, #16]
 80017fe:	e007      	b.n	8001810 <parse_array+0xc8>
        }
        else
        {
            /* add to the end and advance */
            current_item->next = new_item;
 8001800:	693b      	ldr	r3, [r7, #16]
 8001802:	68fa      	ldr	r2, [r7, #12]
 8001804:	601a      	str	r2, [r3, #0]
            new_item->prev = current_item;
 8001806:	68fb      	ldr	r3, [r7, #12]
 8001808:	693a      	ldr	r2, [r7, #16]
 800180a:	605a      	str	r2, [r3, #4]
            current_item = new_item;
 800180c:	68fb      	ldr	r3, [r7, #12]
 800180e:	613b      	str	r3, [r7, #16]
        }

        /* parse next value */
        input_buffer->offset++;
 8001810:	683b      	ldr	r3, [r7, #0]
 8001812:	689b      	ldr	r3, [r3, #8]
 8001814:	1c5a      	adds	r2, r3, #1
 8001816:	683b      	ldr	r3, [r7, #0]
 8001818:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 800181a:	6838      	ldr	r0, [r7, #0]
 800181c:	f7ff fd70 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_value(current_item, input_buffer))
 8001820:	6839      	ldr	r1, [r7, #0]
 8001822:	6938      	ldr	r0, [r7, #16]
 8001824:	f7ff fea4 	bl	8001570 <parse_value>
 8001828:	4603      	mov	r3, r0
 800182a:	2b00      	cmp	r3, #0
 800182c:	d042      	beq.n	80018b4 <parse_array+0x16c>
        {
            goto fail; /* failed to parse value */
        }
        buffer_skip_whitespace(input_buffer);
 800182e:	6838      	ldr	r0, [r7, #0]
 8001830:	f7ff fd66 	bl	8001300 <buffer_skip_whitespace>
    }
    while (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ','));
 8001834:	683b      	ldr	r3, [r7, #0]
 8001836:	2b00      	cmp	r3, #0
 8001838:	d00d      	beq.n	8001856 <parse_array+0x10e>
 800183a:	683b      	ldr	r3, [r7, #0]
 800183c:	689a      	ldr	r2, [r3, #8]
 800183e:	683b      	ldr	r3, [r7, #0]
 8001840:	685b      	ldr	r3, [r3, #4]
 8001842:	429a      	cmp	r2, r3
 8001844:	d207      	bcs.n	8001856 <parse_array+0x10e>
 8001846:	683b      	ldr	r3, [r7, #0]
 8001848:	681a      	ldr	r2, [r3, #0]
 800184a:	683b      	ldr	r3, [r7, #0]
 800184c:	689b      	ldr	r3, [r3, #8]
 800184e:	4413      	add	r3, r2
 8001850:	781b      	ldrb	r3, [r3, #0]
 8001852:	2b2c      	cmp	r3, #44	@ 0x2c
 8001854:	d0c3      	beq.n	80017de <parse_array+0x96>

    if (cannot_access_at_index(input_buffer, 0) || buffer_at_offset(input_buffer)[0] != ']')
 8001856:	683b      	ldr	r3, [r7, #0]
 8001858:	2b00      	cmp	r3, #0
 800185a:	d02d      	beq.n	80018b8 <parse_array+0x170>
 800185c:	683b      	ldr	r3, [r7, #0]
 800185e:	689a      	ldr	r2, [r3, #8]
 8001860:	683b      	ldr	r3, [r7, #0]
 8001862:	685b      	ldr	r3, [r3, #4]
 8001864:	429a      	cmp	r2, r3
 8001866:	d227      	bcs.n	80018b8 <parse_array+0x170>
 8001868:	683b      	ldr	r3, [r7, #0]
 800186a:	681a      	ldr	r2, [r3, #0]
 800186c:	683b      	ldr	r3, [r7, #0]
 800186e:	689b      	ldr	r3, [r3, #8]
 8001870:	4413      	add	r3, r2
 8001872:	781b      	ldrb	r3, [r3, #0]
 8001874:	2b5d      	cmp	r3, #93	@ 0x5d
 8001876:	d11f      	bne.n	80018b8 <parse_array+0x170>
    {
        goto fail; /* expected end of array */
    }

success:
 8001878:	e000      	b.n	800187c <parse_array+0x134>
        goto success;
 800187a:	bf00      	nop
    input_buffer->depth--;
 800187c:	683b      	ldr	r3, [r7, #0]
 800187e:	68db      	ldr	r3, [r3, #12]
 8001880:	1e5a      	subs	r2, r3, #1
 8001882:	683b      	ldr	r3, [r7, #0]
 8001884:	60da      	str	r2, [r3, #12]

    if (head != NULL) {
 8001886:	697b      	ldr	r3, [r7, #20]
 8001888:	2b00      	cmp	r3, #0
 800188a:	d002      	beq.n	8001892 <parse_array+0x14a>
        head->prev = current_item;
 800188c:	697b      	ldr	r3, [r7, #20]
 800188e:	693a      	ldr	r2, [r7, #16]
 8001890:	605a      	str	r2, [r3, #4]
    }

    item->type = cJSON_Array;
 8001892:	687b      	ldr	r3, [r7, #4]
 8001894:	2220      	movs	r2, #32
 8001896:	60da      	str	r2, [r3, #12]
    item->child = head;
 8001898:	687b      	ldr	r3, [r7, #4]
 800189a:	697a      	ldr	r2, [r7, #20]
 800189c:	609a      	str	r2, [r3, #8]

    input_buffer->offset++;
 800189e:	683b      	ldr	r3, [r7, #0]
 80018a0:	689b      	ldr	r3, [r3, #8]
 80018a2:	1c5a      	adds	r2, r3, #1
 80018a4:	683b      	ldr	r3, [r7, #0]
 80018a6:	609a      	str	r2, [r3, #8]

    return true;
 80018a8:	2301      	movs	r3, #1
 80018aa:	e00d      	b.n	80018c8 <parse_array+0x180>
        goto fail;
 80018ac:	bf00      	nop
 80018ae:	e004      	b.n	80018ba <parse_array+0x172>
            goto fail; /* allocation failure */
 80018b0:	bf00      	nop
 80018b2:	e002      	b.n	80018ba <parse_array+0x172>
            goto fail; /* failed to parse value */
 80018b4:	bf00      	nop
 80018b6:	e000      	b.n	80018ba <parse_array+0x172>
        goto fail; /* expected end of array */
 80018b8:	bf00      	nop

fail:
    if (head != NULL)
 80018ba:	697b      	ldr	r3, [r7, #20]
 80018bc:	2b00      	cmp	r3, #0
 80018be:	d002      	beq.n	80018c6 <parse_array+0x17e>
    {
        cJSON_Delete(head);
 80018c0:	6978      	ldr	r0, [r7, #20]
 80018c2:	f7ff f963 	bl	8000b8c <cJSON_Delete>
    }

    return false;
 80018c6:	2300      	movs	r3, #0
}
 80018c8:	4618      	mov	r0, r3
 80018ca:	3718      	adds	r7, #24
 80018cc:	46bd      	mov	sp, r7
 80018ce:	bd80      	pop	{r7, pc}

080018d0 <parse_object>:
    return true;
}

/* Build an object from the text. */
static cJSON_bool parse_object(cJSON * const item, parse_buffer * const input_buffer)
{
 80018d0:	b580      	push	{r7, lr}
 80018d2:	b086      	sub	sp, #24
 80018d4:	af00      	add	r7, sp, #0
 80018d6:	6078      	str	r0, [r7, #4]
 80018d8:	6039      	str	r1, [r7, #0]
    cJSON *head = NULL; /* linked list head */
 80018da:	2300      	movs	r3, #0
 80018dc:	617b      	str	r3, [r7, #20]
    cJSON *current_item = NULL;
 80018de:	2300      	movs	r3, #0
 80018e0:	613b      	str	r3, [r7, #16]

    if (input_buffer->depth >= CJSON_NESTING_LIMIT)
 80018e2:	683b      	ldr	r3, [r7, #0]
 80018e4:	68db      	ldr	r3, [r3, #12]
 80018e6:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 80018ea:	d301      	bcc.n	80018f0 <parse_object+0x20>
    {
        return false; /* to deeply nested */
 80018ec:	2300      	movs	r3, #0
 80018ee:	e0f7      	b.n	8001ae0 <parse_object+0x210>
    }
    input_buffer->depth++;
 80018f0:	683b      	ldr	r3, [r7, #0]
 80018f2:	68db      	ldr	r3, [r3, #12]
 80018f4:	1c5a      	adds	r2, r3, #1
 80018f6:	683b      	ldr	r3, [r7, #0]
 80018f8:	60da      	str	r2, [r3, #12]

    if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != '{'))
 80018fa:	683b      	ldr	r3, [r7, #0]
 80018fc:	2b00      	cmp	r3, #0
 80018fe:	f000 80db 	beq.w	8001ab8 <parse_object+0x1e8>
 8001902:	683b      	ldr	r3, [r7, #0]
 8001904:	689a      	ldr	r2, [r3, #8]
 8001906:	683b      	ldr	r3, [r7, #0]
 8001908:	685b      	ldr	r3, [r3, #4]
 800190a:	429a      	cmp	r2, r3
 800190c:	f080 80d4 	bcs.w	8001ab8 <parse_object+0x1e8>
 8001910:	683b      	ldr	r3, [r7, #0]
 8001912:	681a      	ldr	r2, [r3, #0]
 8001914:	683b      	ldr	r3, [r7, #0]
 8001916:	689b      	ldr	r3, [r3, #8]
 8001918:	4413      	add	r3, r2
 800191a:	781b      	ldrb	r3, [r3, #0]
 800191c:	2b7b      	cmp	r3, #123	@ 0x7b
 800191e:	f040 80cb 	bne.w	8001ab8 <parse_object+0x1e8>
    {
        goto fail; /* not an object */
    }

    input_buffer->offset++;
 8001922:	683b      	ldr	r3, [r7, #0]
 8001924:	689b      	ldr	r3, [r3, #8]
 8001926:	1c5a      	adds	r2, r3, #1
 8001928:	683b      	ldr	r3, [r7, #0]
 800192a:	609a      	str	r2, [r3, #8]
    buffer_skip_whitespace(input_buffer);
 800192c:	6838      	ldr	r0, [r7, #0]
 800192e:	f7ff fce7 	bl	8001300 <buffer_skip_whitespace>
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '}'))
 8001932:	683b      	ldr	r3, [r7, #0]
 8001934:	2b00      	cmp	r3, #0
 8001936:	d00e      	beq.n	8001956 <parse_object+0x86>
 8001938:	683b      	ldr	r3, [r7, #0]
 800193a:	689a      	ldr	r2, [r3, #8]
 800193c:	683b      	ldr	r3, [r7, #0]
 800193e:	685b      	ldr	r3, [r3, #4]
 8001940:	429a      	cmp	r2, r3
 8001942:	d208      	bcs.n	8001956 <parse_object+0x86>
 8001944:	683b      	ldr	r3, [r7, #0]
 8001946:	681a      	ldr	r2, [r3, #0]
 8001948:	683b      	ldr	r3, [r7, #0]
 800194a:	689b      	ldr	r3, [r3, #8]
 800194c:	4413      	add	r3, r2
 800194e:	781b      	ldrb	r3, [r3, #0]
 8001950:	2b7d      	cmp	r3, #125	@ 0x7d
 8001952:	f000 8098 	beq.w	8001a86 <parse_object+0x1b6>
    {
        goto success; /* empty object */
    }

    /* check if we skipped to the end of the buffer */
    if (cannot_access_at_index(input_buffer, 0))
 8001956:	683b      	ldr	r3, [r7, #0]
 8001958:	2b00      	cmp	r3, #0
 800195a:	d005      	beq.n	8001968 <parse_object+0x98>
 800195c:	683b      	ldr	r3, [r7, #0]
 800195e:	689a      	ldr	r2, [r3, #8]
 8001960:	683b      	ldr	r3, [r7, #0]
 8001962:	685b      	ldr	r3, [r3, #4]
 8001964:	429a      	cmp	r2, r3
 8001966:	d305      	bcc.n	8001974 <parse_object+0xa4>
    {
        input_buffer->offset--;
 8001968:	683b      	ldr	r3, [r7, #0]
 800196a:	689b      	ldr	r3, [r3, #8]
 800196c:	1e5a      	subs	r2, r3, #1
 800196e:	683b      	ldr	r3, [r7, #0]
 8001970:	609a      	str	r2, [r3, #8]
        goto fail;
 8001972:	e0ae      	b.n	8001ad2 <parse_object+0x202>
    }

    /* step back to character in front of the first element */
    input_buffer->offset--;
 8001974:	683b      	ldr	r3, [r7, #0]
 8001976:	689b      	ldr	r3, [r3, #8]
 8001978:	1e5a      	subs	r2, r3, #1
 800197a:	683b      	ldr	r3, [r7, #0]
 800197c:	609a      	str	r2, [r3, #8]
    /* loop through the comma separated array elements */
    do
    {
        /* allocate next item */
        cJSON *new_item = cJSON_New_Item(&(input_buffer->hooks));
 800197e:	683b      	ldr	r3, [r7, #0]
 8001980:	3310      	adds	r3, #16
 8001982:	4618      	mov	r0, r3
 8001984:	f7ff f8ec 	bl	8000b60 <cJSON_New_Item>
 8001988:	60f8      	str	r0, [r7, #12]
        if (new_item == NULL)
 800198a:	68fb      	ldr	r3, [r7, #12]
 800198c:	2b00      	cmp	r3, #0
 800198e:	f000 8095 	beq.w	8001abc <parse_object+0x1ec>
        {
            goto fail; /* allocation failure */
        }

        /* attach next item to list */
        if (head == NULL)
 8001992:	697b      	ldr	r3, [r7, #20]
 8001994:	2b00      	cmp	r3, #0
 8001996:	d104      	bne.n	80019a2 <parse_object+0xd2>
        {
            /* start the linked list */
            current_item = head = new_item;
 8001998:	68fb      	ldr	r3, [r7, #12]
 800199a:	617b      	str	r3, [r7, #20]
 800199c:	697b      	ldr	r3, [r7, #20]
 800199e:	613b      	str	r3, [r7, #16]
 80019a0:	e007      	b.n	80019b2 <parse_object+0xe2>
        }
        else
        {
            /* add to the end and advance */
            current_item->next = new_item;
 80019a2:	693b      	ldr	r3, [r7, #16]
 80019a4:	68fa      	ldr	r2, [r7, #12]
 80019a6:	601a      	str	r2, [r3, #0]
            new_item->prev = current_item;
 80019a8:	68fb      	ldr	r3, [r7, #12]
 80019aa:	693a      	ldr	r2, [r7, #16]
 80019ac:	605a      	str	r2, [r3, #4]
            current_item = new_item;
 80019ae:	68fb      	ldr	r3, [r7, #12]
 80019b0:	613b      	str	r3, [r7, #16]
        }

        if (cannot_access_at_index(input_buffer, 1))
 80019b2:	683b      	ldr	r3, [r7, #0]
 80019b4:	2b00      	cmp	r3, #0
 80019b6:	f000 8083 	beq.w	8001ac0 <parse_object+0x1f0>
 80019ba:	683b      	ldr	r3, [r7, #0]
 80019bc:	689b      	ldr	r3, [r3, #8]
 80019be:	1c5a      	adds	r2, r3, #1
 80019c0:	683b      	ldr	r3, [r7, #0]
 80019c2:	685b      	ldr	r3, [r3, #4]
 80019c4:	429a      	cmp	r2, r3
 80019c6:	d27b      	bcs.n	8001ac0 <parse_object+0x1f0>
        {
            goto fail; /* nothing comes after the comma */
        }

        /* parse the name of the child */
        input_buffer->offset++;
 80019c8:	683b      	ldr	r3, [r7, #0]
 80019ca:	689b      	ldr	r3, [r3, #8]
 80019cc:	1c5a      	adds	r2, r3, #1
 80019ce:	683b      	ldr	r3, [r7, #0]
 80019d0:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 80019d2:	6838      	ldr	r0, [r7, #0]
 80019d4:	f7ff fc94 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_string(current_item, input_buffer))
 80019d8:	6839      	ldr	r1, [r7, #0]
 80019da:	6938      	ldr	r0, [r7, #16]
 80019dc:	f7ff fb48 	bl	8001070 <parse_string>
 80019e0:	4603      	mov	r3, r0
 80019e2:	2b00      	cmp	r3, #0
 80019e4:	d06e      	beq.n	8001ac4 <parse_object+0x1f4>
        {
            goto fail; /* failed to parse name */
        }
        buffer_skip_whitespace(input_buffer);
 80019e6:	6838      	ldr	r0, [r7, #0]
 80019e8:	f7ff fc8a 	bl	8001300 <buffer_skip_whitespace>

        /* swap valuestring and string, because we parsed the name */
        current_item->string = current_item->valuestring;
 80019ec:	693b      	ldr	r3, [r7, #16]
 80019ee:	691a      	ldr	r2, [r3, #16]
 80019f0:	693b      	ldr	r3, [r7, #16]
 80019f2:	621a      	str	r2, [r3, #32]
        current_item->valuestring = NULL;
 80019f4:	693b      	ldr	r3, [r7, #16]
 80019f6:	2200      	movs	r2, #0
 80019f8:	611a      	str	r2, [r3, #16]

        if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != ':'))
 80019fa:	683b      	ldr	r3, [r7, #0]
 80019fc:	2b00      	cmp	r3, #0
 80019fe:	d063      	beq.n	8001ac8 <parse_object+0x1f8>
 8001a00:	683b      	ldr	r3, [r7, #0]
 8001a02:	689a      	ldr	r2, [r3, #8]
 8001a04:	683b      	ldr	r3, [r7, #0]
 8001a06:	685b      	ldr	r3, [r3, #4]
 8001a08:	429a      	cmp	r2, r3
 8001a0a:	d25d      	bcs.n	8001ac8 <parse_object+0x1f8>
 8001a0c:	683b      	ldr	r3, [r7, #0]
 8001a0e:	681a      	ldr	r2, [r3, #0]
 8001a10:	683b      	ldr	r3, [r7, #0]
 8001a12:	689b      	ldr	r3, [r3, #8]
 8001a14:	4413      	add	r3, r2
 8001a16:	781b      	ldrb	r3, [r3, #0]
 8001a18:	2b3a      	cmp	r3, #58	@ 0x3a
 8001a1a:	d155      	bne.n	8001ac8 <parse_object+0x1f8>
        {
            goto fail; /* invalid object */
        }

        /* parse the value */
        input_buffer->offset++;
 8001a1c:	683b      	ldr	r3, [r7, #0]
 8001a1e:	689b      	ldr	r3, [r3, #8]
 8001a20:	1c5a      	adds	r2, r3, #1
 8001a22:	683b      	ldr	r3, [r7, #0]
 8001a24:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 8001a26:	6838      	ldr	r0, [r7, #0]
 8001a28:	f7ff fc6a 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_value(current_item, input_buffer))
 8001a2c:	6839      	ldr	r1, [r7, #0]
 8001a2e:	6938      	ldr	r0, [r7, #16]
 8001a30:	f7ff fd9e 	bl	8001570 <parse_value>
 8001a34:	4603      	mov	r3, r0
 8001a36:	2b00      	cmp	r3, #0
 8001a38:	d048      	beq.n	8001acc <parse_object+0x1fc>
        {
            goto fail; /* failed to parse value */
        }
        buffer_skip_whitespace(input_buffer);
 8001a3a:	6838      	ldr	r0, [r7, #0]
 8001a3c:	f7ff fc60 	bl	8001300 <buffer_skip_whitespace>
    }
    while (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ','));
 8001a40:	683b      	ldr	r3, [r7, #0]
 8001a42:	2b00      	cmp	r3, #0
 8001a44:	d00d      	beq.n	8001a62 <parse_object+0x192>
 8001a46:	683b      	ldr	r3, [r7, #0]
 8001a48:	689a      	ldr	r2, [r3, #8]
 8001a4a:	683b      	ldr	r3, [r7, #0]
 8001a4c:	685b      	ldr	r3, [r3, #4]
 8001a4e:	429a      	cmp	r2, r3
 8001a50:	d207      	bcs.n	8001a62 <parse_object+0x192>
 8001a52:	683b      	ldr	r3, [r7, #0]
 8001a54:	681a      	ldr	r2, [r3, #0]
 8001a56:	683b      	ldr	r3, [r7, #0]
 8001a58:	689b      	ldr	r3, [r3, #8]
 8001a5a:	4413      	add	r3, r2
 8001a5c:	781b      	ldrb	r3, [r3, #0]
 8001a5e:	2b2c      	cmp	r3, #44	@ 0x2c
 8001a60:	d08d      	beq.n	800197e <parse_object+0xae>

    if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != '}'))
 8001a62:	683b      	ldr	r3, [r7, #0]
 8001a64:	2b00      	cmp	r3, #0
 8001a66:	d033      	beq.n	8001ad0 <parse_object+0x200>
 8001a68:	683b      	ldr	r3, [r7, #0]
 8001a6a:	689a      	ldr	r2, [r3, #8]
 8001a6c:	683b      	ldr	r3, [r7, #0]
 8001a6e:	685b      	ldr	r3, [r3, #4]
 8001a70:	429a      	cmp	r2, r3
 8001a72:	d22d      	bcs.n	8001ad0 <parse_object+0x200>
 8001a74:	683b      	ldr	r3, [r7, #0]
 8001a76:	681a      	ldr	r2, [r3, #0]
 8001a78:	683b      	ldr	r3, [r7, #0]
 8001a7a:	689b      	ldr	r3, [r3, #8]
 8001a7c:	4413      	add	r3, r2
 8001a7e:	781b      	ldrb	r3, [r3, #0]
 8001a80:	2b7d      	cmp	r3, #125	@ 0x7d
 8001a82:	d125      	bne.n	8001ad0 <parse_object+0x200>
    {
        goto fail; /* expected end of object */
    }

success:
 8001a84:	e000      	b.n	8001a88 <parse_object+0x1b8>
        goto success; /* empty object */
 8001a86:	bf00      	nop
    input_buffer->depth--;
 8001a88:	683b      	ldr	r3, [r7, #0]
 8001a8a:	68db      	ldr	r3, [r3, #12]
 8001a8c:	1e5a      	subs	r2, r3, #1
 8001a8e:	683b      	ldr	r3, [r7, #0]
 8001a90:	60da      	str	r2, [r3, #12]

    if (head != NULL) {
 8001a92:	697b      	ldr	r3, [r7, #20]
 8001a94:	2b00      	cmp	r3, #0
 8001a96:	d002      	beq.n	8001a9e <parse_object+0x1ce>
        head->prev = current_item;
 8001a98:	697b      	ldr	r3, [r7, #20]
 8001a9a:	693a      	ldr	r2, [r7, #16]
 8001a9c:	605a      	str	r2, [r3, #4]
    }

    item->type = cJSON_Object;
 8001a9e:	687b      	ldr	r3, [r7, #4]
 8001aa0:	2240      	movs	r2, #64	@ 0x40
 8001aa2:	60da      	str	r2, [r3, #12]
    item->child = head;
 8001aa4:	687b      	ldr	r3, [r7, #4]
 8001aa6:	697a      	ldr	r2, [r7, #20]
 8001aa8:	609a      	str	r2, [r3, #8]

    input_buffer->offset++;
 8001aaa:	683b      	ldr	r3, [r7, #0]
 8001aac:	689b      	ldr	r3, [r3, #8]
 8001aae:	1c5a      	adds	r2, r3, #1
 8001ab0:	683b      	ldr	r3, [r7, #0]
 8001ab2:	609a      	str	r2, [r3, #8]
    return true;
 8001ab4:	2301      	movs	r3, #1
 8001ab6:	e013      	b.n	8001ae0 <parse_object+0x210>
        goto fail; /* not an object */
 8001ab8:	bf00      	nop
 8001aba:	e00a      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* allocation failure */
 8001abc:	bf00      	nop
 8001abe:	e008      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* nothing comes after the comma */
 8001ac0:	bf00      	nop
 8001ac2:	e006      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* failed to parse name */
 8001ac4:	bf00      	nop
 8001ac6:	e004      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* invalid object */
 8001ac8:	bf00      	nop
 8001aca:	e002      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* failed to parse value */
 8001acc:	bf00      	nop
 8001ace:	e000      	b.n	8001ad2 <parse_object+0x202>
        goto fail; /* expected end of object */
 8001ad0:	bf00      	nop

fail:
    if (head != NULL)
 8001ad2:	697b      	ldr	r3, [r7, #20]
 8001ad4:	2b00      	cmp	r3, #0
 8001ad6:	d002      	beq.n	8001ade <parse_object+0x20e>
    {
        cJSON_Delete(head);
 8001ad8:	6978      	ldr	r0, [r7, #20]
 8001ada:	f7ff f857 	bl	8000b8c <cJSON_Delete>
    }

    return false;
 8001ade:	2300      	movs	r3, #0
}
 8001ae0:	4618      	mov	r0, r3
 8001ae2:	3718      	adds	r7, #24
 8001ae4:	46bd      	mov	sp, r7
 8001ae6:	bd80      	pop	{r7, pc}

08001ae8 <cJSON_GetArraySize>:
    return true;
}

/* Get Array size/item / object item. */
CJSON_PUBLIC(int) cJSON_GetArraySize(const cJSON *array)
{
 8001ae8:	b480      	push	{r7}
 8001aea:	b085      	sub	sp, #20
 8001aec:	af00      	add	r7, sp, #0
 8001aee:	6078      	str	r0, [r7, #4]
    cJSON *child = NULL;
 8001af0:	2300      	movs	r3, #0
 8001af2:	60fb      	str	r3, [r7, #12]
    size_t size = 0;
 8001af4:	2300      	movs	r3, #0
 8001af6:	60bb      	str	r3, [r7, #8]

    if (array == NULL)
 8001af8:	687b      	ldr	r3, [r7, #4]
 8001afa:	2b00      	cmp	r3, #0
 8001afc:	d101      	bne.n	8001b02 <cJSON_GetArraySize+0x1a>
    {
        return 0;
 8001afe:	2300      	movs	r3, #0
 8001b00:	e00d      	b.n	8001b1e <cJSON_GetArraySize+0x36>
    }

    child = array->child;
 8001b02:	687b      	ldr	r3, [r7, #4]
 8001b04:	689b      	ldr	r3, [r3, #8]
 8001b06:	60fb      	str	r3, [r7, #12]

    while(child != NULL)
 8001b08:	e005      	b.n	8001b16 <cJSON_GetArraySize+0x2e>
    {
        size++;
 8001b0a:	68bb      	ldr	r3, [r7, #8]
 8001b0c:	3301      	adds	r3, #1
 8001b0e:	60bb      	str	r3, [r7, #8]
        child = child->next;
 8001b10:	68fb      	ldr	r3, [r7, #12]
 8001b12:	681b      	ldr	r3, [r3, #0]
 8001b14:	60fb      	str	r3, [r7, #12]
    while(child != NULL)
 8001b16:	68fb      	ldr	r3, [r7, #12]
 8001b18:	2b00      	cmp	r3, #0
 8001b1a:	d1f6      	bne.n	8001b0a <cJSON_GetArraySize+0x22>
    }

    /* FIXME: Can overflow here. Cannot be fixed without breaking the API */

    return (int)size;
 8001b1c:	68bb      	ldr	r3, [r7, #8]
}
 8001b1e:	4618      	mov	r0, r3
 8001b20:	3714      	adds	r7, #20
 8001b22:	46bd      	mov	sp, r7
 8001b24:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001b28:	4770      	bx	lr

08001b2a <get_array_item>:

static cJSON* get_array_item(const cJSON *array, size_t index)
{
 8001b2a:	b480      	push	{r7}
 8001b2c:	b085      	sub	sp, #20
 8001b2e:	af00      	add	r7, sp, #0
 8001b30:	6078      	str	r0, [r7, #4]
 8001b32:	6039      	str	r1, [r7, #0]
    cJSON *current_child = NULL;
 8001b34:	2300      	movs	r3, #0
 8001b36:	60fb      	str	r3, [r7, #12]

    if (array == NULL)
 8001b38:	687b      	ldr	r3, [r7, #4]
 8001b3a:	2b00      	cmp	r3, #0
 8001b3c:	d101      	bne.n	8001b42 <get_array_item+0x18>
    {
        return NULL;
 8001b3e:	2300      	movs	r3, #0
 8001b40:	e010      	b.n	8001b64 <get_array_item+0x3a>
    }

    current_child = array->child;
 8001b42:	687b      	ldr	r3, [r7, #4]
 8001b44:	689b      	ldr	r3, [r3, #8]
 8001b46:	60fb      	str	r3, [r7, #12]
    while ((current_child != NULL) && (index > 0))
 8001b48:	e005      	b.n	8001b56 <get_array_item+0x2c>
    {
        index--;
 8001b4a:	683b      	ldr	r3, [r7, #0]
 8001b4c:	3b01      	subs	r3, #1
 8001b4e:	603b      	str	r3, [r7, #0]
        current_child = current_child->next;
 8001b50:	68fb      	ldr	r3, [r7, #12]
 8001b52:	681b      	ldr	r3, [r3, #0]
 8001b54:	60fb      	str	r3, [r7, #12]
    while ((current_child != NULL) && (index > 0))
 8001b56:	68fb      	ldr	r3, [r7, #12]
 8001b58:	2b00      	cmp	r3, #0
 8001b5a:	d002      	beq.n	8001b62 <get_array_item+0x38>
 8001b5c:	683b      	ldr	r3, [r7, #0]
 8001b5e:	2b00      	cmp	r3, #0
 8001b60:	d1f3      	bne.n	8001b4a <get_array_item+0x20>
    }

    return current_child;
 8001b62:	68fb      	ldr	r3, [r7, #12]
}
 8001b64:	4618      	mov	r0, r3
 8001b66:	3714      	adds	r7, #20
 8001b68:	46bd      	mov	sp, r7
 8001b6a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001b6e:	4770      	bx	lr

08001b70 <cJSON_GetArrayItem>:

CJSON_PUBLIC(cJSON *) cJSON_GetArrayItem(const cJSON *array, int index)
{
 8001b70:	b580      	push	{r7, lr}
 8001b72:	b082      	sub	sp, #8
 8001b74:	af00      	add	r7, sp, #0
 8001b76:	6078      	str	r0, [r7, #4]
 8001b78:	6039      	str	r1, [r7, #0]
    if (index < 0)
 8001b7a:	683b      	ldr	r3, [r7, #0]
 8001b7c:	2b00      	cmp	r3, #0
 8001b7e:	da01      	bge.n	8001b84 <cJSON_GetArrayItem+0x14>
    {
        return NULL;
 8001b80:	2300      	movs	r3, #0
 8001b82:	e005      	b.n	8001b90 <cJSON_GetArrayItem+0x20>
    }

    return get_array_item(array, (size_t)index);
 8001b84:	683b      	ldr	r3, [r7, #0]
 8001b86:	4619      	mov	r1, r3
 8001b88:	6878      	ldr	r0, [r7, #4]
 8001b8a:	f7ff ffce 	bl	8001b2a <get_array_item>
 8001b8e:	4603      	mov	r3, r0
}
 8001b90:	4618      	mov	r0, r3
 8001b92:	3708      	adds	r7, #8
 8001b94:	46bd      	mov	sp, r7
 8001b96:	bd80      	pop	{r7, pc}

08001b98 <get_object_item>:

static cJSON *get_object_item(const cJSON * const object, const char * const name, const cJSON_bool case_sensitive)
{
 8001b98:	b580      	push	{r7, lr}
 8001b9a:	b086      	sub	sp, #24
 8001b9c:	af00      	add	r7, sp, #0
 8001b9e:	60f8      	str	r0, [r7, #12]
 8001ba0:	60b9      	str	r1, [r7, #8]
 8001ba2:	607a      	str	r2, [r7, #4]
    cJSON *current_element = NULL;
 8001ba4:	2300      	movs	r3, #0
 8001ba6:	617b      	str	r3, [r7, #20]

    if ((object == NULL) || (name == NULL))
 8001ba8:	68fb      	ldr	r3, [r7, #12]
 8001baa:	2b00      	cmp	r3, #0
 8001bac:	d002      	beq.n	8001bb4 <get_object_item+0x1c>
 8001bae:	68bb      	ldr	r3, [r7, #8]
 8001bb0:	2b00      	cmp	r3, #0
 8001bb2:	d101      	bne.n	8001bb8 <get_object_item+0x20>
    {
        return NULL;
 8001bb4:	2300      	movs	r3, #0
 8001bb6:	e033      	b.n	8001c20 <get_object_item+0x88>
    }

    current_element = object->child;
 8001bb8:	68fb      	ldr	r3, [r7, #12]
 8001bba:	689b      	ldr	r3, [r3, #8]
 8001bbc:	617b      	str	r3, [r7, #20]
    if (case_sensitive)
 8001bbe:	687b      	ldr	r3, [r7, #4]
 8001bc0:	2b00      	cmp	r3, #0
 8001bc2:	d017      	beq.n	8001bf4 <get_object_item+0x5c>
    {
        while ((current_element != NULL) && (current_element->string != NULL) && (strcmp(name, current_element->string) != 0))
 8001bc4:	e002      	b.n	8001bcc <get_object_item+0x34>
        {
            current_element = current_element->next;
 8001bc6:	697b      	ldr	r3, [r7, #20]
 8001bc8:	681b      	ldr	r3, [r3, #0]
 8001bca:	617b      	str	r3, [r7, #20]
        while ((current_element != NULL) && (current_element->string != NULL) && (strcmp(name, current_element->string) != 0))
 8001bcc:	697b      	ldr	r3, [r7, #20]
 8001bce:	2b00      	cmp	r3, #0
 8001bd0:	d01c      	beq.n	8001c0c <get_object_item+0x74>
 8001bd2:	697b      	ldr	r3, [r7, #20]
 8001bd4:	6a1b      	ldr	r3, [r3, #32]
 8001bd6:	2b00      	cmp	r3, #0
 8001bd8:	d018      	beq.n	8001c0c <get_object_item+0x74>
 8001bda:	697b      	ldr	r3, [r7, #20]
 8001bdc:	6a1b      	ldr	r3, [r3, #32]
 8001bde:	4619      	mov	r1, r3
 8001be0:	68b8      	ldr	r0, [r7, #8]
 8001be2:	f7fe fb7d 	bl	80002e0 <strcmp>
 8001be6:	4603      	mov	r3, r0
 8001be8:	2b00      	cmp	r3, #0
 8001bea:	d1ec      	bne.n	8001bc6 <get_object_item+0x2e>
 8001bec:	e00e      	b.n	8001c0c <get_object_item+0x74>
    }
    else
    {
        while ((current_element != NULL) && (case_insensitive_strcmp((const unsigned char*)name, (const unsigned char*)(current_element->string)) != 0))
        {
            current_element = current_element->next;
 8001bee:	697b      	ldr	r3, [r7, #20]
 8001bf0:	681b      	ldr	r3, [r3, #0]
 8001bf2:	617b      	str	r3, [r7, #20]
        while ((current_element != NULL) && (case_insensitive_strcmp((const unsigned char*)name, (const unsigned char*)(current_element->string)) != 0))
 8001bf4:	697b      	ldr	r3, [r7, #20]
 8001bf6:	2b00      	cmp	r3, #0
 8001bf8:	d008      	beq.n	8001c0c <get_object_item+0x74>
 8001bfa:	697b      	ldr	r3, [r7, #20]
 8001bfc:	6a1b      	ldr	r3, [r3, #32]
 8001bfe:	4619      	mov	r1, r3
 8001c00:	68b8      	ldr	r0, [r7, #8]
 8001c02:	f7fe ff41 	bl	8000a88 <case_insensitive_strcmp>
 8001c06:	4603      	mov	r3, r0
 8001c08:	2b00      	cmp	r3, #0
 8001c0a:	d1f0      	bne.n	8001bee <get_object_item+0x56>
        }
    }

    if ((current_element == NULL) || (current_element->string == NULL)) {
 8001c0c:	697b      	ldr	r3, [r7, #20]
 8001c0e:	2b00      	cmp	r3, #0
 8001c10:	d003      	beq.n	8001c1a <get_object_item+0x82>
 8001c12:	697b      	ldr	r3, [r7, #20]
 8001c14:	6a1b      	ldr	r3, [r3, #32]
 8001c16:	2b00      	cmp	r3, #0
 8001c18:	d101      	bne.n	8001c1e <get_object_item+0x86>
        return NULL;
 8001c1a:	2300      	movs	r3, #0
 8001c1c:	e000      	b.n	8001c20 <get_object_item+0x88>
    }

    return current_element;
 8001c1e:	697b      	ldr	r3, [r7, #20]
}
 8001c20:	4618      	mov	r0, r3
 8001c22:	3718      	adds	r7, #24
 8001c24:	46bd      	mov	sp, r7
 8001c26:	bd80      	pop	{r7, pc}

08001c28 <cJSON_GetObjectItemCaseSensitive>:
{
    return get_object_item(object, string, false);
}

CJSON_PUBLIC(cJSON *) cJSON_GetObjectItemCaseSensitive(const cJSON * const object, const char * const string)
{
 8001c28:	b580      	push	{r7, lr}
 8001c2a:	b082      	sub	sp, #8
 8001c2c:	af00      	add	r7, sp, #0
 8001c2e:	6078      	str	r0, [r7, #4]
 8001c30:	6039      	str	r1, [r7, #0]
    return get_object_item(object, string, true);
 8001c32:	2201      	movs	r2, #1
 8001c34:	6839      	ldr	r1, [r7, #0]
 8001c36:	6878      	ldr	r0, [r7, #4]
 8001c38:	f7ff ffae 	bl	8001b98 <get_object_item>
 8001c3c:	4603      	mov	r3, r0
}
 8001c3e:	4618      	mov	r0, r3
 8001c40:	3708      	adds	r7, #8
 8001c42:	46bd      	mov	sp, r7
 8001c44:	bd80      	pop	{r7, pc}

08001c46 <cJSON_IsNumber>:

    return (item->type & 0xFF) == cJSON_NULL;
}

CJSON_PUBLIC(cJSON_bool) cJSON_IsNumber(const cJSON * const item)
{
 8001c46:	b480      	push	{r7}
 8001c48:	b083      	sub	sp, #12
 8001c4a:	af00      	add	r7, sp, #0
 8001c4c:	6078      	str	r0, [r7, #4]
    if (item == NULL)
 8001c4e:	687b      	ldr	r3, [r7, #4]
 8001c50:	2b00      	cmp	r3, #0
 8001c52:	d101      	bne.n	8001c58 <cJSON_IsNumber+0x12>
    {
        return false;
 8001c54:	2300      	movs	r3, #0
 8001c56:	e007      	b.n	8001c68 <cJSON_IsNumber+0x22>
    }

    return (item->type & 0xFF) == cJSON_Number;
 8001c58:	687b      	ldr	r3, [r7, #4]
 8001c5a:	68db      	ldr	r3, [r3, #12]
 8001c5c:	b2db      	uxtb	r3, r3
 8001c5e:	2b08      	cmp	r3, #8
 8001c60:	bf0c      	ite	eq
 8001c62:	2301      	moveq	r3, #1
 8001c64:	2300      	movne	r3, #0
 8001c66:	b2db      	uxtb	r3, r3
}
 8001c68:	4618      	mov	r0, r3
 8001c6a:	370c      	adds	r7, #12
 8001c6c:	46bd      	mov	sp, r7
 8001c6e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001c72:	4770      	bx	lr

08001c74 <cJSON_IsArray>:

    return (item->type & 0xFF) == cJSON_String;
}

CJSON_PUBLIC(cJSON_bool) cJSON_IsArray(const cJSON * const item)
{
 8001c74:	b480      	push	{r7}
 8001c76:	b083      	sub	sp, #12
 8001c78:	af00      	add	r7, sp, #0
 8001c7a:	6078      	str	r0, [r7, #4]
    if (item == NULL)
 8001c7c:	687b      	ldr	r3, [r7, #4]
 8001c7e:	2b00      	cmp	r3, #0
 8001c80:	d101      	bne.n	8001c86 <cJSON_IsArray+0x12>
    {
        return false;
 8001c82:	2300      	movs	r3, #0
 8001c84:	e007      	b.n	8001c96 <cJSON_IsArray+0x22>
    }

    return (item->type & 0xFF) == cJSON_Array;
 8001c86:	687b      	ldr	r3, [r7, #4]
 8001c88:	68db      	ldr	r3, [r3, #12]
 8001c8a:	b2db      	uxtb	r3, r3
 8001c8c:	2b20      	cmp	r3, #32
 8001c8e:	bf0c      	ite	eq
 8001c90:	2301      	moveq	r3, #1
 8001c92:	2300      	movne	r3, #0
 8001c94:	b2db      	uxtb	r3, r3
}
 8001c96:	4618      	mov	r0, r3
 8001c98:	370c      	adds	r7, #12
 8001c9a:	46bd      	mov	sp, r7
 8001c9c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001ca0:	4770      	bx	lr

08001ca2 <vApplicationStackOverflowHook>:
/* Hook prototypes */
void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName);

/* USER CODE BEGIN 4 */
void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
{
 8001ca2:	b480      	push	{r7}
 8001ca4:	b083      	sub	sp, #12
 8001ca6:	af00      	add	r7, sp, #0
 8001ca8:	6078      	str	r0, [r7, #4]
 8001caa:	6039      	str	r1, [r7, #0]
   /* Run time stack overflow checking is performed if
   configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is
   called if a stack overflow is detected. */
}
 8001cac:	bf00      	nop
 8001cae:	370c      	adds	r7, #12
 8001cb0:	46bd      	mov	sp, r7
 8001cb2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001cb6:	4770      	bx	lr

08001cb8 <main>:
/**
  * @brief  The application entry point.
  * @retval int
  */
int main(void)
{
 8001cb8:	b580      	push	{r7, lr}
 8001cba:	b084      	sub	sp, #16
 8001cbc:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN 1 */

  /* USER CODE END 1 */

  /* MPU Configuration--------------------------------------------------------*/
  MPU_Config();
 8001cbe:	f000 fbb3 	bl	8002428 <MPU_Config>
  \details Turns on I-Cache
  */
__STATIC_FORCEINLINE void SCB_EnableICache (void)
{
  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
 8001cc2:	4b4c      	ldr	r3, [pc, #304]	@ (8001df4 <main+0x13c>)
 8001cc4:	695b      	ldr	r3, [r3, #20]
 8001cc6:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8001cca:	2b00      	cmp	r3, #0
 8001ccc:	d11b      	bne.n	8001d06 <main+0x4e>
  \details Acts as a special kind of Data Memory Barrier.
           It completes when all explicit memory accesses before this instruction complete.
 */
__STATIC_FORCEINLINE void __DSB(void)
{
  __ASM volatile ("dsb 0xF":::"memory");
 8001cce:	f3bf 8f4f 	dsb	sy
}
 8001cd2:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001cd4:	f3bf 8f6f 	isb	sy
}
 8001cd8:	bf00      	nop

    __DSB();
    __ISB();
    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
 8001cda:	4b46      	ldr	r3, [pc, #280]	@ (8001df4 <main+0x13c>)
 8001cdc:	2200      	movs	r2, #0
 8001cde:	f8c3 2250 	str.w	r2, [r3, #592]	@ 0x250
  __ASM volatile ("dsb 0xF":::"memory");
 8001ce2:	f3bf 8f4f 	dsb	sy
}
 8001ce6:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001ce8:	f3bf 8f6f 	isb	sy
}
 8001cec:	bf00      	nop
    __DSB();
    __ISB();
    SCB->CCR |=  (uint32_t)SCB_CCR_IC_Msk;  /* enable I-Cache */
 8001cee:	4b41      	ldr	r3, [pc, #260]	@ (8001df4 <main+0x13c>)
 8001cf0:	695b      	ldr	r3, [r3, #20]
 8001cf2:	4a40      	ldr	r2, [pc, #256]	@ (8001df4 <main+0x13c>)
 8001cf4:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 8001cf8:	6153      	str	r3, [r2, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 8001cfa:	f3bf 8f4f 	dsb	sy
}
 8001cfe:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001d00:	f3bf 8f6f 	isb	sy
}
 8001d04:	e000      	b.n	8001d08 <main+0x50>
    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
 8001d06:	bf00      	nop
  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
    uint32_t ccsidr;
    uint32_t sets;
    uint32_t ways;

    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
 8001d08:	4b3a      	ldr	r3, [pc, #232]	@ (8001df4 <main+0x13c>)
 8001d0a:	695b      	ldr	r3, [r3, #20]
 8001d0c:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8001d10:	2b00      	cmp	r3, #0
 8001d12:	d138      	bne.n	8001d86 <main+0xce>

    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
 8001d14:	4b37      	ldr	r3, [pc, #220]	@ (8001df4 <main+0x13c>)
 8001d16:	2200      	movs	r2, #0
 8001d18:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
  __ASM volatile ("dsb 0xF":::"memory");
 8001d1c:	f3bf 8f4f 	dsb	sy
}
 8001d20:	bf00      	nop
    __DSB();

    ccsidr = SCB->CCSIDR;
 8001d22:	4b34      	ldr	r3, [pc, #208]	@ (8001df4 <main+0x13c>)
 8001d24:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 8001d28:	60fb      	str	r3, [r7, #12]

                                            /* invalidate D-Cache */
    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
 8001d2a:	68fb      	ldr	r3, [r7, #12]
 8001d2c:	0b5b      	lsrs	r3, r3, #13
 8001d2e:	f3c3 030e 	ubfx	r3, r3, #0, #15
 8001d32:	60bb      	str	r3, [r7, #8]
    do {
      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
 8001d34:	68fb      	ldr	r3, [r7, #12]
 8001d36:	08db      	lsrs	r3, r3, #3
 8001d38:	f3c3 0309 	ubfx	r3, r3, #0, #10
 8001d3c:	607b      	str	r3, [r7, #4]
      do {
        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
 8001d3e:	68bb      	ldr	r3, [r7, #8]
 8001d40:	015a      	lsls	r2, r3, #5
 8001d42:	f643 73e0 	movw	r3, #16352	@ 0x3fe0
 8001d46:	4013      	ands	r3, r2
                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
 8001d48:	687a      	ldr	r2, [r7, #4]
 8001d4a:	0792      	lsls	r2, r2, #30
        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
 8001d4c:	4929      	ldr	r1, [pc, #164]	@ (8001df4 <main+0x13c>)
 8001d4e:	4313      	orrs	r3, r2
 8001d50:	f8c1 3260 	str.w	r3, [r1, #608]	@ 0x260
        #if defined ( __CC_ARM )
          __schedule_barrier();
        #endif
      } while (ways-- != 0U);
 8001d54:	687b      	ldr	r3, [r7, #4]
 8001d56:	1e5a      	subs	r2, r3, #1
 8001d58:	607a      	str	r2, [r7, #4]
 8001d5a:	2b00      	cmp	r3, #0
 8001d5c:	d1ef      	bne.n	8001d3e <main+0x86>
    } while(sets-- != 0U);
 8001d5e:	68bb      	ldr	r3, [r7, #8]
 8001d60:	1e5a      	subs	r2, r3, #1
 8001d62:	60ba      	str	r2, [r7, #8]
 8001d64:	2b00      	cmp	r3, #0
 8001d66:	d1e5      	bne.n	8001d34 <main+0x7c>
  __ASM volatile ("dsb 0xF":::"memory");
 8001d68:	f3bf 8f4f 	dsb	sy
}
 8001d6c:	bf00      	nop
    __DSB();

    SCB->CCR |=  (uint32_t)SCB_CCR_DC_Msk;  /* enable D-Cache */
 8001d6e:	4b21      	ldr	r3, [pc, #132]	@ (8001df4 <main+0x13c>)
 8001d70:	695b      	ldr	r3, [r3, #20]
 8001d72:	4a20      	ldr	r2, [pc, #128]	@ (8001df4 <main+0x13c>)
 8001d74:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8001d78:	6153      	str	r3, [r2, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 8001d7a:	f3bf 8f4f 	dsb	sy
}
 8001d7e:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001d80:	f3bf 8f6f 	isb	sy
}
 8001d84:	e000      	b.n	8001d88 <main+0xd0>
    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
 8001d86:	bf00      	nop
  SCB_EnableDCache();

  /* MCU Configuration--------------------------------------------------------*/

  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  HAL_Init();
 8001d88:	f003 f90c 	bl	8004fa4 <HAL_Init>
  /* USER CODE BEGIN Init */

  /* USER CODE END Init */

  /* Configure the system clock */
  SystemClock_Config();
 8001d8c:	f000 f83e 	bl	8001e0c <SystemClock_Config>
  /* USER CODE BEGIN SysInit */

  /* USER CODE END SysInit */

  /* Initialize all configured peripherals */
  MX_GPIO_Init();
 8001d90:	f000 faac 	bl	80022ec <MX_GPIO_Init>
  MX_DMA_Init();
 8001d94:	f000 fa82 	bl	800229c <MX_DMA_Init>
  MX_UART8_Init();
 8001d98:	f000 f8f4 	bl	8001f84 <MX_UART8_Init>
  MX_CRC_Init();
 8001d9c:	f000 f8b2 	bl	8001f04 <MX_CRC_Init>
  MX_RNG_Init();
 8001da0:	f000 f8da 	bl	8001f58 <MX_RNG_Init>
  MX_USART1_UART_Init();
 8001da4:	f000 f93a 	bl	800201c <MX_USART1_UART_Init>
  MX_USART2_UART_Init();
 8001da8:	f000 f988 	bl	80020bc <MX_USART2_UART_Init>
  MX_USART3_UART_Init();
 8001dac:	f000 f9d6 	bl	800215c <MX_USART3_UART_Init>
  MX_USART6_UART_Init();
 8001db0:	f000 fa24 	bl	80021fc <MX_USART6_UART_Init>

//  HAL_DMA_RegisterCallback(&hdma_uart8_rx, HAL_DMA_XFER_CPLT_CB_ID, dmaCallback);
  /* USER CODE END 2 */

  /* Init scheduler */
  osKernelInitialize();
 8001db4:	f00e fcf2 	bl	801079c <osKernelInitialize>

  /* USER CODE BEGIN RTOS_MUTEX */
  /* add mutexes, ... */
  resMeasurementsMutex = osMutexNew (NULL);
 8001db8:	2000      	movs	r0, #0
 8001dba:	f00e fe07 	bl	80109cc <osMutexNew>
 8001dbe:	4603      	mov	r3, r0
 8001dc0:	4a0d      	ldr	r2, [pc, #52]	@ (8001df8 <main+0x140>)
 8001dc2:	6013      	str	r3, [r2, #0]
  sensorsInfoMutex     = osMutexNew (NULL);
 8001dc4:	2000      	movs	r0, #0
 8001dc6:	f00e fe01 	bl	80109cc <osMutexNew>
 8001dca:	4603      	mov	r3, r0
 8001dcc:	4a0b      	ldr	r2, [pc, #44]	@ (8001dfc <main+0x144>)
 8001dce:	6013      	str	r3, [r2, #0]
  /* add queues, ... */
  /* USER CODE END RTOS_QUEUES */

  /* Create the thread(s) */
  /* creation of defaultTask */
  defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes);
 8001dd0:	4a0b      	ldr	r2, [pc, #44]	@ (8001e00 <main+0x148>)
 8001dd2:	2100      	movs	r1, #0
 8001dd4:	480b      	ldr	r0, [pc, #44]	@ (8001e04 <main+0x14c>)
 8001dd6:	f00e fd40 	bl	801085a <osThreadNew>
 8001dda:	4603      	mov	r3, r0
 8001ddc:	4a0a      	ldr	r2, [pc, #40]	@ (8001e08 <main+0x150>)
 8001dde:	6013      	str	r3, [r2, #0]

  /* USER CODE BEGIN RTOS_THREADS */
  /* add threads, ... */
  mqtt_cli_init();
 8001de0:	f001 f8b6 	bl	8002f50 <mqtt_cli_init>
//  Uart8TasksInit();
  UartTasksInit();
 8001de4:	f001 ffe2 	bl	8003dac <UartTasksInit>
#ifdef USER_MOCKS
  MockMeasurmetsTaskInit();
#else
  MeasurmentsReqSchedulerTaskInit();
 8001de8:	f002 ff2a 	bl	8004c40 <MeasurmentsReqSchedulerTaskInit>
  /* USER CODE BEGIN RTOS_EVENTS */
  /* add events, ... */
  /* USER CODE END RTOS_EVENTS */

  /* Start scheduler */
  osKernelStart();
 8001dec:	f00e fcfa 	bl	80107e4 <osKernelStart>

  /* We should never get here as control is now taken by the scheduler */

  /* Infinite loop */
  /* USER CODE BEGIN WHILE */
  while (1)
 8001df0:	bf00      	nop
 8001df2:	e7fd      	b.n	8001df0 <main+0x138>
 8001df4:	e000ed00 	.word	0xe000ed00
 8001df8:	24002168 	.word	0x24002168
 8001dfc:	2400216c 	.word	0x2400216c
 8001e00:	080309d8 	.word	0x080309d8
 8001e04:	08002411 	.word	0x08002411
 8001e08:	24000654 	.word	0x24000654

08001e0c <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8001e0c:	b580      	push	{r7, lr}
 8001e0e:	b09c      	sub	sp, #112	@ 0x70
 8001e10:	af00      	add	r7, sp, #0
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8001e12:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8001e16:	224c      	movs	r2, #76	@ 0x4c
 8001e18:	2100      	movs	r1, #0
 8001e1a:	4618      	mov	r0, r3
 8001e1c:	f027 ff70 	bl	8029d00 <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 8001e20:	1d3b      	adds	r3, r7, #4
 8001e22:	2220      	movs	r2, #32
 8001e24:	2100      	movs	r1, #0
 8001e26:	4618      	mov	r0, r3
 8001e28:	f027 ff6a 	bl	8029d00 <memset>

  /** Supply configuration update enable
  */
  HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
 8001e2c:	2002      	movs	r0, #2
 8001e2e:	f007 fe03 	bl	8009a38 <HAL_PWREx_ConfigSupply>

  /** Configure the main internal regulator output voltage
  */
  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
 8001e32:	2300      	movs	r3, #0
 8001e34:	603b      	str	r3, [r7, #0]
 8001e36:	4b31      	ldr	r3, [pc, #196]	@ (8001efc <SystemClock_Config+0xf0>)
 8001e38:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8001e3a:	4a30      	ldr	r2, [pc, #192]	@ (8001efc <SystemClock_Config+0xf0>)
 8001e3c:	f023 0301 	bic.w	r3, r3, #1
 8001e40:	62d3      	str	r3, [r2, #44]	@ 0x2c
 8001e42:	4b2e      	ldr	r3, [pc, #184]	@ (8001efc <SystemClock_Config+0xf0>)
 8001e44:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8001e46:	f003 0301 	and.w	r3, r3, #1
 8001e4a:	603b      	str	r3, [r7, #0]
 8001e4c:	4b2c      	ldr	r3, [pc, #176]	@ (8001f00 <SystemClock_Config+0xf4>)
 8001e4e:	699b      	ldr	r3, [r3, #24]
 8001e50:	4a2b      	ldr	r2, [pc, #172]	@ (8001f00 <SystemClock_Config+0xf4>)
 8001e52:	f443 4340 	orr.w	r3, r3, #49152	@ 0xc000
 8001e56:	6193      	str	r3, [r2, #24]
 8001e58:	4b29      	ldr	r3, [pc, #164]	@ (8001f00 <SystemClock_Config+0xf4>)
 8001e5a:	699b      	ldr	r3, [r3, #24]
 8001e5c:	f403 4340 	and.w	r3, r3, #49152	@ 0xc000
 8001e60:	603b      	str	r3, [r7, #0]
 8001e62:	683b      	ldr	r3, [r7, #0]

  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
 8001e64:	bf00      	nop
 8001e66:	4b26      	ldr	r3, [pc, #152]	@ (8001f00 <SystemClock_Config+0xf4>)
 8001e68:	699b      	ldr	r3, [r3, #24]
 8001e6a:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8001e6e:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 8001e72:	d1f8      	bne.n	8001e66 <SystemClock_Config+0x5a>

  /** Initializes the RCC Oscillators according to the specified parameters
  * in the RCC_OscInitTypeDef structure.
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
 8001e74:	2321      	movs	r3, #33	@ 0x21
 8001e76:	627b      	str	r3, [r7, #36]	@ 0x24
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 8001e78:	f44f 3380 	mov.w	r3, #65536	@ 0x10000
 8001e7c:	62bb      	str	r3, [r7, #40]	@ 0x28
  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
 8001e7e:	2301      	movs	r3, #1
 8001e80:	63fb      	str	r3, [r7, #60]	@ 0x3c
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8001e82:	2302      	movs	r3, #2
 8001e84:	64bb      	str	r3, [r7, #72]	@ 0x48
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 8001e86:	2302      	movs	r3, #2
 8001e88:	64fb      	str	r3, [r7, #76]	@ 0x4c
  RCC_OscInitStruct.PLL.PLLM = 5;
 8001e8a:	2305      	movs	r3, #5
 8001e8c:	653b      	str	r3, [r7, #80]	@ 0x50
  RCC_OscInitStruct.PLL.PLLN = 160;
 8001e8e:	23a0      	movs	r3, #160	@ 0xa0
 8001e90:	657b      	str	r3, [r7, #84]	@ 0x54
  RCC_OscInitStruct.PLL.PLLP = 2;
 8001e92:	2302      	movs	r3, #2
 8001e94:	65bb      	str	r3, [r7, #88]	@ 0x58
  RCC_OscInitStruct.PLL.PLLQ = 2;
 8001e96:	2302      	movs	r3, #2
 8001e98:	65fb      	str	r3, [r7, #92]	@ 0x5c
  RCC_OscInitStruct.PLL.PLLR = 2;
 8001e9a:	2302      	movs	r3, #2
 8001e9c:	663b      	str	r3, [r7, #96]	@ 0x60
  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
 8001e9e:	2308      	movs	r3, #8
 8001ea0:	667b      	str	r3, [r7, #100]	@ 0x64
  RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
 8001ea2:	2300      	movs	r3, #0
 8001ea4:	66bb      	str	r3, [r7, #104]	@ 0x68
  RCC_OscInitStruct.PLL.PLLFRACN = 0;
 8001ea6:	2300      	movs	r3, #0
 8001ea8:	66fb      	str	r3, [r7, #108]	@ 0x6c
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8001eaa:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8001eae:	4618      	mov	r0, r3
 8001eb0:	f007 fdfc 	bl	8009aac <HAL_RCC_OscConfig>
 8001eb4:	4603      	mov	r3, r0
 8001eb6:	2b00      	cmp	r3, #0
 8001eb8:	d001      	beq.n	8001ebe <SystemClock_Config+0xb2>
  {
    Error_Handler();
 8001eba:	f000 fb25 	bl	8002508 <Error_Handler>
  }

  /** Initializes the CPU, AHB and APB buses clocks
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8001ebe:	233f      	movs	r3, #63	@ 0x3f
 8001ec0:	607b      	str	r3, [r7, #4]
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
                              |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 8001ec2:	2303      	movs	r3, #3
 8001ec4:	60bb      	str	r3, [r7, #8]
  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
 8001ec6:	2300      	movs	r3, #0
 8001ec8:	60fb      	str	r3, [r7, #12]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
 8001eca:	2308      	movs	r3, #8
 8001ecc:	613b      	str	r3, [r7, #16]
  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
 8001ece:	2340      	movs	r3, #64	@ 0x40
 8001ed0:	617b      	str	r3, [r7, #20]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
 8001ed2:	2340      	movs	r3, #64	@ 0x40
 8001ed4:	61bb      	str	r3, [r7, #24]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
 8001ed6:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8001eda:	61fb      	str	r3, [r7, #28]
  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
 8001edc:	2340      	movs	r3, #64	@ 0x40
 8001ede:	623b      	str	r3, [r7, #32]

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 8001ee0:	1d3b      	adds	r3, r7, #4
 8001ee2:	2102      	movs	r1, #2
 8001ee4:	4618      	mov	r0, r3
 8001ee6:	f008 fa3b 	bl	800a360 <HAL_RCC_ClockConfig>
 8001eea:	4603      	mov	r3, r0
 8001eec:	2b00      	cmp	r3, #0
 8001eee:	d001      	beq.n	8001ef4 <SystemClock_Config+0xe8>
  {
    Error_Handler();
 8001ef0:	f000 fb0a 	bl	8002508 <Error_Handler>
  }
}
 8001ef4:	bf00      	nop
 8001ef6:	3770      	adds	r7, #112	@ 0x70
 8001ef8:	46bd      	mov	sp, r7
 8001efa:	bd80      	pop	{r7, pc}
 8001efc:	58000400 	.word	0x58000400
 8001f00:	58024800 	.word	0x58024800

08001f04 <MX_CRC_Init>:
  * @brief CRC Initialization Function
  * @param None
  * @retval None
  */
static void MX_CRC_Init(void)
{
 8001f04:	b580      	push	{r7, lr}
 8001f06:	af00      	add	r7, sp, #0
  /* USER CODE END CRC_Init 0 */

  /* USER CODE BEGIN CRC_Init 1 */

  /* USER CODE END CRC_Init 1 */
  hcrc.Instance = CRC;
 8001f08:	4b11      	ldr	r3, [pc, #68]	@ (8001f50 <MX_CRC_Init+0x4c>)
 8001f0a:	4a12      	ldr	r2, [pc, #72]	@ (8001f54 <MX_CRC_Init+0x50>)
 8001f0c:	601a      	str	r2, [r3, #0]
  hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE;
 8001f0e:	4b10      	ldr	r3, [pc, #64]	@ (8001f50 <MX_CRC_Init+0x4c>)
 8001f10:	2201      	movs	r2, #1
 8001f12:	711a      	strb	r2, [r3, #4]
  hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
 8001f14:	4b0e      	ldr	r3, [pc, #56]	@ (8001f50 <MX_CRC_Init+0x4c>)
 8001f16:	2200      	movs	r2, #0
 8001f18:	715a      	strb	r2, [r3, #5]
  hcrc.Init.GeneratingPolynomial = 4129;
 8001f1a:	4b0d      	ldr	r3, [pc, #52]	@ (8001f50 <MX_CRC_Init+0x4c>)
 8001f1c:	f241 0221 	movw	r2, #4129	@ 0x1021
 8001f20:	609a      	str	r2, [r3, #8]
  hcrc.Init.CRCLength = CRC_POLYLENGTH_16B;
 8001f22:	4b0b      	ldr	r3, [pc, #44]	@ (8001f50 <MX_CRC_Init+0x4c>)
 8001f24:	2208      	movs	r2, #8
 8001f26:	60da      	str	r2, [r3, #12]
  hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
 8001f28:	4b09      	ldr	r3, [pc, #36]	@ (8001f50 <MX_CRC_Init+0x4c>)
 8001f2a:	2200      	movs	r2, #0
 8001f2c:	615a      	str	r2, [r3, #20]
  hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
 8001f2e:	4b08      	ldr	r3, [pc, #32]	@ (8001f50 <MX_CRC_Init+0x4c>)
 8001f30:	2200      	movs	r2, #0
 8001f32:	619a      	str	r2, [r3, #24]
  hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
 8001f34:	4b06      	ldr	r3, [pc, #24]	@ (8001f50 <MX_CRC_Init+0x4c>)
 8001f36:	2201      	movs	r2, #1
 8001f38:	621a      	str	r2, [r3, #32]
  if (HAL_CRC_Init(&hcrc) != HAL_OK)
 8001f3a:	4805      	ldr	r0, [pc, #20]	@ (8001f50 <MX_CRC_Init+0x4c>)
 8001f3c:	f003 fa2a 	bl	8005394 <HAL_CRC_Init>
 8001f40:	4603      	mov	r3, r0
 8001f42:	2b00      	cmp	r3, #0
 8001f44:	d001      	beq.n	8001f4a <MX_CRC_Init+0x46>
  {
    Error_Handler();
 8001f46:	f000 fadf 	bl	8002508 <Error_Handler>
  }
  /* USER CODE BEGIN CRC_Init 2 */

  /* USER CODE END CRC_Init 2 */

}
 8001f4a:	bf00      	nop
 8001f4c:	bd80      	pop	{r7, pc}
 8001f4e:	bf00      	nop
 8001f50:	24000248 	.word	0x24000248
 8001f54:	58024c00 	.word	0x58024c00

08001f58 <MX_RNG_Init>:
  * @brief RNG Initialization Function
  * @param None
  * @retval None
  */
static void MX_RNG_Init(void)
{
 8001f58:	b580      	push	{r7, lr}
 8001f5a:	af00      	add	r7, sp, #0
  /* USER CODE END RNG_Init 0 */

  /* USER CODE BEGIN RNG_Init 1 */

  /* USER CODE END RNG_Init 1 */
  hrng.Instance = RNG;
 8001f5c:	4b07      	ldr	r3, [pc, #28]	@ (8001f7c <MX_RNG_Init+0x24>)
 8001f5e:	4a08      	ldr	r2, [pc, #32]	@ (8001f80 <MX_RNG_Init+0x28>)
 8001f60:	601a      	str	r2, [r3, #0]
  hrng.Init.ClockErrorDetection = RNG_CED_ENABLE;
 8001f62:	4b06      	ldr	r3, [pc, #24]	@ (8001f7c <MX_RNG_Init+0x24>)
 8001f64:	2200      	movs	r2, #0
 8001f66:	605a      	str	r2, [r3, #4]
  if (HAL_RNG_Init(&hrng) != HAL_OK)
 8001f68:	4804      	ldr	r0, [pc, #16]	@ (8001f7c <MX_RNG_Init+0x24>)
 8001f6a:	f00a fbd7 	bl	800c71c <HAL_RNG_Init>
 8001f6e:	4603      	mov	r3, r0
 8001f70:	2b00      	cmp	r3, #0
 8001f72:	d001      	beq.n	8001f78 <MX_RNG_Init+0x20>
  {
    Error_Handler();
 8001f74:	f000 fac8 	bl	8002508 <Error_Handler>
  }
  /* USER CODE BEGIN RNG_Init 2 */

  /* USER CODE END RNG_Init 2 */

}
 8001f78:	bf00      	nop
 8001f7a:	bd80      	pop	{r7, pc}
 8001f7c:	2400026c 	.word	0x2400026c
 8001f80:	48021800 	.word	0x48021800

08001f84 <MX_UART8_Init>:
  * @brief UART8 Initialization Function
  * @param None
  * @retval None
  */
static void MX_UART8_Init(void)
{
 8001f84:	b580      	push	{r7, lr}
 8001f86:	af00      	add	r7, sp, #0
  /* USER CODE END UART8_Init 0 */

  /* USER CODE BEGIN UART8_Init 1 */

  /* USER CODE END UART8_Init 1 */
  huart8.Instance = UART8;
 8001f88:	4b22      	ldr	r3, [pc, #136]	@ (8002014 <MX_UART8_Init+0x90>)
 8001f8a:	4a23      	ldr	r2, [pc, #140]	@ (8002018 <MX_UART8_Init+0x94>)
 8001f8c:	601a      	str	r2, [r3, #0]
  huart8.Init.BaudRate = 115200;
 8001f8e:	4b21      	ldr	r3, [pc, #132]	@ (8002014 <MX_UART8_Init+0x90>)
 8001f90:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 8001f94:	605a      	str	r2, [r3, #4]
  huart8.Init.WordLength = UART_WORDLENGTH_8B;
 8001f96:	4b1f      	ldr	r3, [pc, #124]	@ (8002014 <MX_UART8_Init+0x90>)
 8001f98:	2200      	movs	r2, #0
 8001f9a:	609a      	str	r2, [r3, #8]
  huart8.Init.StopBits = UART_STOPBITS_1;
 8001f9c:	4b1d      	ldr	r3, [pc, #116]	@ (8002014 <MX_UART8_Init+0x90>)
 8001f9e:	2200      	movs	r2, #0
 8001fa0:	60da      	str	r2, [r3, #12]
  huart8.Init.Parity = UART_PARITY_NONE;
 8001fa2:	4b1c      	ldr	r3, [pc, #112]	@ (8002014 <MX_UART8_Init+0x90>)
 8001fa4:	2200      	movs	r2, #0
 8001fa6:	611a      	str	r2, [r3, #16]
  huart8.Init.Mode = UART_MODE_TX_RX;
 8001fa8:	4b1a      	ldr	r3, [pc, #104]	@ (8002014 <MX_UART8_Init+0x90>)
 8001faa:	220c      	movs	r2, #12
 8001fac:	615a      	str	r2, [r3, #20]
  huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8001fae:	4b19      	ldr	r3, [pc, #100]	@ (8002014 <MX_UART8_Init+0x90>)
 8001fb0:	2200      	movs	r2, #0
 8001fb2:	619a      	str	r2, [r3, #24]
  huart8.Init.OverSampling = UART_OVERSAMPLING_16;
 8001fb4:	4b17      	ldr	r3, [pc, #92]	@ (8002014 <MX_UART8_Init+0x90>)
 8001fb6:	2200      	movs	r2, #0
 8001fb8:	61da      	str	r2, [r3, #28]
  huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 8001fba:	4b16      	ldr	r3, [pc, #88]	@ (8002014 <MX_UART8_Init+0x90>)
 8001fbc:	2200      	movs	r2, #0
 8001fbe:	621a      	str	r2, [r3, #32]
  huart8.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 8001fc0:	4b14      	ldr	r3, [pc, #80]	@ (8002014 <MX_UART8_Init+0x90>)
 8001fc2:	2200      	movs	r2, #0
 8001fc4:	625a      	str	r2, [r3, #36]	@ 0x24
  huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
 8001fc6:	4b13      	ldr	r3, [pc, #76]	@ (8002014 <MX_UART8_Init+0x90>)
 8001fc8:	2200      	movs	r2, #0
 8001fca:	629a      	str	r2, [r3, #40]	@ 0x28
  if (HAL_UART_Init(&huart8) != HAL_OK)
 8001fcc:	4811      	ldr	r0, [pc, #68]	@ (8002014 <MX_UART8_Init+0x90>)
 8001fce:	f00a ff2b 	bl	800ce28 <HAL_UART_Init>
 8001fd2:	4603      	mov	r3, r0
 8001fd4:	2b00      	cmp	r3, #0
 8001fd6:	d001      	beq.n	8001fdc <MX_UART8_Init+0x58>
  {
    Error_Handler();
 8001fd8:	f000 fa96 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart8, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 8001fdc:	2100      	movs	r1, #0
 8001fde:	480d      	ldr	r0, [pc, #52]	@ (8002014 <MX_UART8_Init+0x90>)
 8001fe0:	f00d fbcb 	bl	800f77a <HAL_UARTEx_SetTxFifoThreshold>
 8001fe4:	4603      	mov	r3, r0
 8001fe6:	2b00      	cmp	r3, #0
 8001fe8:	d001      	beq.n	8001fee <MX_UART8_Init+0x6a>
  {
    Error_Handler();
 8001fea:	f000 fa8d 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart8, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 8001fee:	2100      	movs	r1, #0
 8001ff0:	4808      	ldr	r0, [pc, #32]	@ (8002014 <MX_UART8_Init+0x90>)
 8001ff2:	f00d fc00 	bl	800f7f6 <HAL_UARTEx_SetRxFifoThreshold>
 8001ff6:	4603      	mov	r3, r0
 8001ff8:	2b00      	cmp	r3, #0
 8001ffa:	d001      	beq.n	8002000 <MX_UART8_Init+0x7c>
  {
    Error_Handler();
 8001ffc:	f000 fa84 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart8) != HAL_OK)
 8002000:	4804      	ldr	r0, [pc, #16]	@ (8002014 <MX_UART8_Init+0x90>)
 8002002:	f00d fb81 	bl	800f708 <HAL_UARTEx_DisableFifoMode>
 8002006:	4603      	mov	r3, r0
 8002008:	2b00      	cmp	r3, #0
 800200a:	d001      	beq.n	8002010 <MX_UART8_Init+0x8c>
  {
    Error_Handler();
 800200c:	f000 fa7c 	bl	8002508 <Error_Handler>
  }
  /* USER CODE BEGIN UART8_Init 2 */

  /* USER CODE END UART8_Init 2 */

}
 8002010:	bf00      	nop
 8002012:	bd80      	pop	{r7, pc}
 8002014:	24000280 	.word	0x24000280
 8002018:	40007c00 	.word	0x40007c00

0800201c <MX_USART1_UART_Init>:
  * @brief USART1 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART1_UART_Init(void)
{
 800201c:	b580      	push	{r7, lr}
 800201e:	af00      	add	r7, sp, #0
  /* USER CODE END USART1_Init 0 */

  /* USER CODE BEGIN USART1_Init 1 */

  /* USER CODE END USART1_Init 1 */
  huart1.Instance = USART1;
 8002020:	4b24      	ldr	r3, [pc, #144]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 8002022:	4a25      	ldr	r2, [pc, #148]	@ (80020b8 <MX_USART1_UART_Init+0x9c>)
 8002024:	601a      	str	r2, [r3, #0]
  huart1.Init.BaudRate = 115200;
 8002026:	4b23      	ldr	r3, [pc, #140]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 8002028:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 800202c:	605a      	str	r2, [r3, #4]
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 800202e:	4b21      	ldr	r3, [pc, #132]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 8002030:	2200      	movs	r2, #0
 8002032:	609a      	str	r2, [r3, #8]
  huart1.Init.StopBits = UART_STOPBITS_1;
 8002034:	4b1f      	ldr	r3, [pc, #124]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 8002036:	2200      	movs	r2, #0
 8002038:	60da      	str	r2, [r3, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 800203a:	4b1e      	ldr	r3, [pc, #120]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 800203c:	2200      	movs	r2, #0
 800203e:	611a      	str	r2, [r3, #16]
  huart1.Init.Mode = UART_MODE_TX_RX;
 8002040:	4b1c      	ldr	r3, [pc, #112]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 8002042:	220c      	movs	r2, #12
 8002044:	615a      	str	r2, [r3, #20]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8002046:	4b1b      	ldr	r3, [pc, #108]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 8002048:	2200      	movs	r2, #0
 800204a:	619a      	str	r2, [r3, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 800204c:	4b19      	ldr	r3, [pc, #100]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 800204e:	2200      	movs	r2, #0
 8002050:	61da      	str	r2, [r3, #28]
  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 8002052:	4b18      	ldr	r3, [pc, #96]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 8002054:	2200      	movs	r2, #0
 8002056:	621a      	str	r2, [r3, #32]
  huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 8002058:	4b16      	ldr	r3, [pc, #88]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 800205a:	2200      	movs	r2, #0
 800205c:	625a      	str	r2, [r3, #36]	@ 0x24
  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXINVERT_INIT;
 800205e:	4b15      	ldr	r3, [pc, #84]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 8002060:	2202      	movs	r2, #2
 8002062:	629a      	str	r2, [r3, #40]	@ 0x28
  huart1.AdvancedInit.RxPinLevelInvert = UART_ADVFEATURE_RXINV_ENABLE;
 8002064:	4b13      	ldr	r3, [pc, #76]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 8002066:	f44f 3280 	mov.w	r2, #65536	@ 0x10000
 800206a:	631a      	str	r2, [r3, #48]	@ 0x30
  if (HAL_UART_Init(&huart1) != HAL_OK)
 800206c:	4811      	ldr	r0, [pc, #68]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 800206e:	f00a fedb 	bl	800ce28 <HAL_UART_Init>
 8002072:	4603      	mov	r3, r0
 8002074:	2b00      	cmp	r3, #0
 8002076:	d001      	beq.n	800207c <MX_USART1_UART_Init+0x60>
  {
    Error_Handler();
 8002078:	f000 fa46 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 800207c:	2100      	movs	r1, #0
 800207e:	480d      	ldr	r0, [pc, #52]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 8002080:	f00d fb7b 	bl	800f77a <HAL_UARTEx_SetTxFifoThreshold>
 8002084:	4603      	mov	r3, r0
 8002086:	2b00      	cmp	r3, #0
 8002088:	d001      	beq.n	800208e <MX_USART1_UART_Init+0x72>
  {
    Error_Handler();
 800208a:	f000 fa3d 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 800208e:	2100      	movs	r1, #0
 8002090:	4808      	ldr	r0, [pc, #32]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 8002092:	f00d fbb0 	bl	800f7f6 <HAL_UARTEx_SetRxFifoThreshold>
 8002096:	4603      	mov	r3, r0
 8002098:	2b00      	cmp	r3, #0
 800209a:	d001      	beq.n	80020a0 <MX_USART1_UART_Init+0x84>
  {
    Error_Handler();
 800209c:	f000 fa34 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
 80020a0:	4804      	ldr	r0, [pc, #16]	@ (80020b4 <MX_USART1_UART_Init+0x98>)
 80020a2:	f00d fb31 	bl	800f708 <HAL_UARTEx_DisableFifoMode>
 80020a6:	4603      	mov	r3, r0
 80020a8:	2b00      	cmp	r3, #0
 80020aa:	d001      	beq.n	80020b0 <MX_USART1_UART_Init+0x94>
  {
    Error_Handler();
 80020ac:	f000 fa2c 	bl	8002508 <Error_Handler>
  }
  /* USER CODE BEGIN USART1_Init 2 */

  /* USER CODE END USART1_Init 2 */

}
 80020b0:	bf00      	nop
 80020b2:	bd80      	pop	{r7, pc}
 80020b4:	24000314 	.word	0x24000314
 80020b8:	40011000 	.word	0x40011000

080020bc <MX_USART2_UART_Init>:
  * @brief USART2 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART2_UART_Init(void)
{
 80020bc:	b580      	push	{r7, lr}
 80020be:	af00      	add	r7, sp, #0
  /* USER CODE END USART2_Init 0 */

  /* USER CODE BEGIN USART2_Init 1 */

  /* USER CODE END USART2_Init 1 */
  huart2.Instance = USART2;
 80020c0:	4b24      	ldr	r3, [pc, #144]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 80020c2:	4a25      	ldr	r2, [pc, #148]	@ (8002158 <MX_USART2_UART_Init+0x9c>)
 80020c4:	601a      	str	r2, [r3, #0]
  huart2.Init.BaudRate = 115200;
 80020c6:	4b23      	ldr	r3, [pc, #140]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 80020c8:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 80020cc:	605a      	str	r2, [r3, #4]
  huart2.Init.WordLength = UART_WORDLENGTH_8B;
 80020ce:	4b21      	ldr	r3, [pc, #132]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 80020d0:	2200      	movs	r2, #0
 80020d2:	609a      	str	r2, [r3, #8]
  huart2.Init.StopBits = UART_STOPBITS_1;
 80020d4:	4b1f      	ldr	r3, [pc, #124]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 80020d6:	2200      	movs	r2, #0
 80020d8:	60da      	str	r2, [r3, #12]
  huart2.Init.Parity = UART_PARITY_NONE;
 80020da:	4b1e      	ldr	r3, [pc, #120]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 80020dc:	2200      	movs	r2, #0
 80020de:	611a      	str	r2, [r3, #16]
  huart2.Init.Mode = UART_MODE_TX_RX;
 80020e0:	4b1c      	ldr	r3, [pc, #112]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 80020e2:	220c      	movs	r2, #12
 80020e4:	615a      	str	r2, [r3, #20]
  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 80020e6:	4b1b      	ldr	r3, [pc, #108]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 80020e8:	2200      	movs	r2, #0
 80020ea:	619a      	str	r2, [r3, #24]
  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
 80020ec:	4b19      	ldr	r3, [pc, #100]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 80020ee:	2200      	movs	r2, #0
 80020f0:	61da      	str	r2, [r3, #28]
  huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 80020f2:	4b18      	ldr	r3, [pc, #96]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 80020f4:	2200      	movs	r2, #0
 80020f6:	621a      	str	r2, [r3, #32]
  huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 80020f8:	4b16      	ldr	r3, [pc, #88]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 80020fa:	2200      	movs	r2, #0
 80020fc:	625a      	str	r2, [r3, #36]	@ 0x24
  huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXINVERT_INIT;
 80020fe:	4b15      	ldr	r3, [pc, #84]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 8002100:	2202      	movs	r2, #2
 8002102:	629a      	str	r2, [r3, #40]	@ 0x28
  huart2.AdvancedInit.RxPinLevelInvert = UART_ADVFEATURE_RXINV_ENABLE;
 8002104:	4b13      	ldr	r3, [pc, #76]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 8002106:	f44f 3280 	mov.w	r2, #65536	@ 0x10000
 800210a:	631a      	str	r2, [r3, #48]	@ 0x30
  if (HAL_UART_Init(&huart2) != HAL_OK)
 800210c:	4811      	ldr	r0, [pc, #68]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 800210e:	f00a fe8b 	bl	800ce28 <HAL_UART_Init>
 8002112:	4603      	mov	r3, r0
 8002114:	2b00      	cmp	r3, #0
 8002116:	d001      	beq.n	800211c <MX_USART2_UART_Init+0x60>
  {
    Error_Handler();
 8002118:	f000 f9f6 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 800211c:	2100      	movs	r1, #0
 800211e:	480d      	ldr	r0, [pc, #52]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 8002120:	f00d fb2b 	bl	800f77a <HAL_UARTEx_SetTxFifoThreshold>
 8002124:	4603      	mov	r3, r0
 8002126:	2b00      	cmp	r3, #0
 8002128:	d001      	beq.n	800212e <MX_USART2_UART_Init+0x72>
  {
    Error_Handler();
 800212a:	f000 f9ed 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 800212e:	2100      	movs	r1, #0
 8002130:	4808      	ldr	r0, [pc, #32]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 8002132:	f00d fb60 	bl	800f7f6 <HAL_UARTEx_SetRxFifoThreshold>
 8002136:	4603      	mov	r3, r0
 8002138:	2b00      	cmp	r3, #0
 800213a:	d001      	beq.n	8002140 <MX_USART2_UART_Init+0x84>
  {
    Error_Handler();
 800213c:	f000 f9e4 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
 8002140:	4804      	ldr	r0, [pc, #16]	@ (8002154 <MX_USART2_UART_Init+0x98>)
 8002142:	f00d fae1 	bl	800f708 <HAL_UARTEx_DisableFifoMode>
 8002146:	4603      	mov	r3, r0
 8002148:	2b00      	cmp	r3, #0
 800214a:	d001      	beq.n	8002150 <MX_USART2_UART_Init+0x94>
  {
    Error_Handler();
 800214c:	f000 f9dc 	bl	8002508 <Error_Handler>
  }
  /* USER CODE BEGIN USART2_Init 2 */

  /* USER CODE END USART2_Init 2 */

}
 8002150:	bf00      	nop
 8002152:	bd80      	pop	{r7, pc}
 8002154:	240003a8 	.word	0x240003a8
 8002158:	40004400 	.word	0x40004400

0800215c <MX_USART3_UART_Init>:
  * @brief USART3 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART3_UART_Init(void)
{
 800215c:	b580      	push	{r7, lr}
 800215e:	af00      	add	r7, sp, #0
  /* USER CODE END USART3_Init 0 */

  /* USER CODE BEGIN USART3_Init 1 */

  /* USER CODE END USART3_Init 1 */
  huart3.Instance = USART3;
 8002160:	4b24      	ldr	r3, [pc, #144]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 8002162:	4a25      	ldr	r2, [pc, #148]	@ (80021f8 <MX_USART3_UART_Init+0x9c>)
 8002164:	601a      	str	r2, [r3, #0]
  huart3.Init.BaudRate = 115200;
 8002166:	4b23      	ldr	r3, [pc, #140]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 8002168:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 800216c:	605a      	str	r2, [r3, #4]
  huart3.Init.WordLength = UART_WORDLENGTH_8B;
 800216e:	4b21      	ldr	r3, [pc, #132]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 8002170:	2200      	movs	r2, #0
 8002172:	609a      	str	r2, [r3, #8]
  huart3.Init.StopBits = UART_STOPBITS_1;
 8002174:	4b1f      	ldr	r3, [pc, #124]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 8002176:	2200      	movs	r2, #0
 8002178:	60da      	str	r2, [r3, #12]
  huart3.Init.Parity = UART_PARITY_NONE;
 800217a:	4b1e      	ldr	r3, [pc, #120]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 800217c:	2200      	movs	r2, #0
 800217e:	611a      	str	r2, [r3, #16]
  huart3.Init.Mode = UART_MODE_TX_RX;
 8002180:	4b1c      	ldr	r3, [pc, #112]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 8002182:	220c      	movs	r2, #12
 8002184:	615a      	str	r2, [r3, #20]
  huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8002186:	4b1b      	ldr	r3, [pc, #108]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 8002188:	2200      	movs	r2, #0
 800218a:	619a      	str	r2, [r3, #24]
  huart3.Init.OverSampling = UART_OVERSAMPLING_16;
 800218c:	4b19      	ldr	r3, [pc, #100]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 800218e:	2200      	movs	r2, #0
 8002190:	61da      	str	r2, [r3, #28]
  huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 8002192:	4b18      	ldr	r3, [pc, #96]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 8002194:	2200      	movs	r2, #0
 8002196:	621a      	str	r2, [r3, #32]
  huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 8002198:	4b16      	ldr	r3, [pc, #88]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 800219a:	2200      	movs	r2, #0
 800219c:	625a      	str	r2, [r3, #36]	@ 0x24
  huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXINVERT_INIT;
 800219e:	4b15      	ldr	r3, [pc, #84]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 80021a0:	2202      	movs	r2, #2
 80021a2:	629a      	str	r2, [r3, #40]	@ 0x28
  huart3.AdvancedInit.RxPinLevelInvert = UART_ADVFEATURE_RXINV_ENABLE;
 80021a4:	4b13      	ldr	r3, [pc, #76]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 80021a6:	f44f 3280 	mov.w	r2, #65536	@ 0x10000
 80021aa:	631a      	str	r2, [r3, #48]	@ 0x30
  if (HAL_UART_Init(&huart3) != HAL_OK)
 80021ac:	4811      	ldr	r0, [pc, #68]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 80021ae:	f00a fe3b 	bl	800ce28 <HAL_UART_Init>
 80021b2:	4603      	mov	r3, r0
 80021b4:	2b00      	cmp	r3, #0
 80021b6:	d001      	beq.n	80021bc <MX_USART3_UART_Init+0x60>
  {
    Error_Handler();
 80021b8:	f000 f9a6 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 80021bc:	2100      	movs	r1, #0
 80021be:	480d      	ldr	r0, [pc, #52]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 80021c0:	f00d fadb 	bl	800f77a <HAL_UARTEx_SetTxFifoThreshold>
 80021c4:	4603      	mov	r3, r0
 80021c6:	2b00      	cmp	r3, #0
 80021c8:	d001      	beq.n	80021ce <MX_USART3_UART_Init+0x72>
  {
    Error_Handler();
 80021ca:	f000 f99d 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 80021ce:	2100      	movs	r1, #0
 80021d0:	4808      	ldr	r0, [pc, #32]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 80021d2:	f00d fb10 	bl	800f7f6 <HAL_UARTEx_SetRxFifoThreshold>
 80021d6:	4603      	mov	r3, r0
 80021d8:	2b00      	cmp	r3, #0
 80021da:	d001      	beq.n	80021e0 <MX_USART3_UART_Init+0x84>
  {
    Error_Handler();
 80021dc:	f000 f994 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK)
 80021e0:	4804      	ldr	r0, [pc, #16]	@ (80021f4 <MX_USART3_UART_Init+0x98>)
 80021e2:	f00d fa91 	bl	800f708 <HAL_UARTEx_DisableFifoMode>
 80021e6:	4603      	mov	r3, r0
 80021e8:	2b00      	cmp	r3, #0
 80021ea:	d001      	beq.n	80021f0 <MX_USART3_UART_Init+0x94>
  {
    Error_Handler();
 80021ec:	f000 f98c 	bl	8002508 <Error_Handler>
  }
  /* USER CODE BEGIN USART3_Init 2 */

  /* USER CODE END USART3_Init 2 */

}
 80021f0:	bf00      	nop
 80021f2:	bd80      	pop	{r7, pc}
 80021f4:	2400043c 	.word	0x2400043c
 80021f8:	40004800 	.word	0x40004800

080021fc <MX_USART6_UART_Init>:
  * @brief USART6 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART6_UART_Init(void)
{
 80021fc:	b580      	push	{r7, lr}
 80021fe:	af00      	add	r7, sp, #0
  /* USER CODE END USART6_Init 0 */

  /* USER CODE BEGIN USART6_Init 1 */

  /* USER CODE END USART6_Init 1 */
  huart6.Instance = USART6;
 8002200:	4b24      	ldr	r3, [pc, #144]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 8002202:	4a25      	ldr	r2, [pc, #148]	@ (8002298 <MX_USART6_UART_Init+0x9c>)
 8002204:	601a      	str	r2, [r3, #0]
  huart6.Init.BaudRate = 115200;
 8002206:	4b23      	ldr	r3, [pc, #140]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 8002208:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 800220c:	605a      	str	r2, [r3, #4]
  huart6.Init.WordLength = UART_WORDLENGTH_8B;
 800220e:	4b21      	ldr	r3, [pc, #132]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 8002210:	2200      	movs	r2, #0
 8002212:	609a      	str	r2, [r3, #8]
  huart6.Init.StopBits = UART_STOPBITS_1;
 8002214:	4b1f      	ldr	r3, [pc, #124]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 8002216:	2200      	movs	r2, #0
 8002218:	60da      	str	r2, [r3, #12]
  huart6.Init.Parity = UART_PARITY_NONE;
 800221a:	4b1e      	ldr	r3, [pc, #120]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 800221c:	2200      	movs	r2, #0
 800221e:	611a      	str	r2, [r3, #16]
  huart6.Init.Mode = UART_MODE_TX_RX;
 8002220:	4b1c      	ldr	r3, [pc, #112]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 8002222:	220c      	movs	r2, #12
 8002224:	615a      	str	r2, [r3, #20]
  huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8002226:	4b1b      	ldr	r3, [pc, #108]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 8002228:	2200      	movs	r2, #0
 800222a:	619a      	str	r2, [r3, #24]
  huart6.Init.OverSampling = UART_OVERSAMPLING_16;
 800222c:	4b19      	ldr	r3, [pc, #100]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 800222e:	2200      	movs	r2, #0
 8002230:	61da      	str	r2, [r3, #28]
  huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 8002232:	4b18      	ldr	r3, [pc, #96]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 8002234:	2200      	movs	r2, #0
 8002236:	621a      	str	r2, [r3, #32]
  huart6.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 8002238:	4b16      	ldr	r3, [pc, #88]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 800223a:	2200      	movs	r2, #0
 800223c:	625a      	str	r2, [r3, #36]	@ 0x24
  huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXINVERT_INIT;
 800223e:	4b15      	ldr	r3, [pc, #84]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 8002240:	2202      	movs	r2, #2
 8002242:	629a      	str	r2, [r3, #40]	@ 0x28
  huart6.AdvancedInit.RxPinLevelInvert = UART_ADVFEATURE_RXINV_ENABLE;
 8002244:	4b13      	ldr	r3, [pc, #76]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 8002246:	f44f 3280 	mov.w	r2, #65536	@ 0x10000
 800224a:	631a      	str	r2, [r3, #48]	@ 0x30
  if (HAL_UART_Init(&huart6) != HAL_OK)
 800224c:	4811      	ldr	r0, [pc, #68]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 800224e:	f00a fdeb 	bl	800ce28 <HAL_UART_Init>
 8002252:	4603      	mov	r3, r0
 8002254:	2b00      	cmp	r3, #0
 8002256:	d001      	beq.n	800225c <MX_USART6_UART_Init+0x60>
  {
    Error_Handler();
 8002258:	f000 f956 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart6, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 800225c:	2100      	movs	r1, #0
 800225e:	480d      	ldr	r0, [pc, #52]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 8002260:	f00d fa8b 	bl	800f77a <HAL_UARTEx_SetTxFifoThreshold>
 8002264:	4603      	mov	r3, r0
 8002266:	2b00      	cmp	r3, #0
 8002268:	d001      	beq.n	800226e <MX_USART6_UART_Init+0x72>
  {
    Error_Handler();
 800226a:	f000 f94d 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart6, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 800226e:	2100      	movs	r1, #0
 8002270:	4808      	ldr	r0, [pc, #32]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 8002272:	f00d fac0 	bl	800f7f6 <HAL_UARTEx_SetRxFifoThreshold>
 8002276:	4603      	mov	r3, r0
 8002278:	2b00      	cmp	r3, #0
 800227a:	d001      	beq.n	8002280 <MX_USART6_UART_Init+0x84>
  {
    Error_Handler();
 800227c:	f000 f944 	bl	8002508 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart6) != HAL_OK)
 8002280:	4804      	ldr	r0, [pc, #16]	@ (8002294 <MX_USART6_UART_Init+0x98>)
 8002282:	f00d fa41 	bl	800f708 <HAL_UARTEx_DisableFifoMode>
 8002286:	4603      	mov	r3, r0
 8002288:	2b00      	cmp	r3, #0
 800228a:	d001      	beq.n	8002290 <MX_USART6_UART_Init+0x94>
  {
    Error_Handler();
 800228c:	f000 f93c 	bl	8002508 <Error_Handler>
  }
  /* USER CODE BEGIN USART6_Init 2 */

  /* USER CODE END USART6_Init 2 */

}
 8002290:	bf00      	nop
 8002292:	bd80      	pop	{r7, pc}
 8002294:	240004d0 	.word	0x240004d0
 8002298:	40011400 	.word	0x40011400

0800229c <MX_DMA_Init>:

/**
  * Enable DMA controller clock
  */
static void MX_DMA_Init(void)
{
 800229c:	b580      	push	{r7, lr}
 800229e:	b082      	sub	sp, #8
 80022a0:	af00      	add	r7, sp, #0

  /* DMA controller clock enable */
  __HAL_RCC_DMA2_CLK_ENABLE();
 80022a2:	4b11      	ldr	r3, [pc, #68]	@ (80022e8 <MX_DMA_Init+0x4c>)
 80022a4:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 80022a8:	4a0f      	ldr	r2, [pc, #60]	@ (80022e8 <MX_DMA_Init+0x4c>)
 80022aa:	f043 0302 	orr.w	r3, r3, #2
 80022ae:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 80022b2:	4b0d      	ldr	r3, [pc, #52]	@ (80022e8 <MX_DMA_Init+0x4c>)
 80022b4:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 80022b8:	f003 0302 	and.w	r3, r3, #2
 80022bc:	607b      	str	r3, [r7, #4]
 80022be:	687b      	ldr	r3, [r7, #4]

  /* DMA interrupt init */
  /* DMA2_Stream6_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0);
 80022c0:	2200      	movs	r2, #0
 80022c2:	2105      	movs	r1, #5
 80022c4:	2045      	movs	r0, #69	@ 0x45
 80022c6:	f002 ffc5 	bl	8005254 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
 80022ca:	2045      	movs	r0, #69	@ 0x45
 80022cc:	f002 ffdc 	bl	8005288 <HAL_NVIC_EnableIRQ>
  /* DMA2_Stream7_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
 80022d0:	2200      	movs	r2, #0
 80022d2:	2105      	movs	r1, #5
 80022d4:	2046      	movs	r0, #70	@ 0x46
 80022d6:	f002 ffbd 	bl	8005254 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
 80022da:	2046      	movs	r0, #70	@ 0x46
 80022dc:	f002 ffd4 	bl	8005288 <HAL_NVIC_EnableIRQ>

}
 80022e0:	bf00      	nop
 80022e2:	3708      	adds	r7, #8
 80022e4:	46bd      	mov	sp, r7
 80022e6:	bd80      	pop	{r7, pc}
 80022e8:	58024400 	.word	0x58024400

080022ec <MX_GPIO_Init>:
  * @brief GPIO Initialization Function
  * @param None
  * @retval None
  */
static void MX_GPIO_Init(void)
{
 80022ec:	b580      	push	{r7, lr}
 80022ee:	b08c      	sub	sp, #48	@ 0x30
 80022f0:	af00      	add	r7, sp, #0
/* USER CODE BEGIN MX_GPIO_Init_1 */
	GPIO_InitTypeDef GPIO_InitStruct = {0};
 80022f2:	f107 031c 	add.w	r3, r7, #28
 80022f6:	2200      	movs	r2, #0
 80022f8:	601a      	str	r2, [r3, #0]
 80022fa:	605a      	str	r2, [r3, #4]
 80022fc:	609a      	str	r2, [r3, #8]
 80022fe:	60da      	str	r2, [r3, #12]
 8002300:	611a      	str	r2, [r3, #16]
/* USER CODE END MX_GPIO_Init_1 */

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOH_CLK_ENABLE();
 8002302:	4b41      	ldr	r3, [pc, #260]	@ (8002408 <MX_GPIO_Init+0x11c>)
 8002304:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002308:	4a3f      	ldr	r2, [pc, #252]	@ (8002408 <MX_GPIO_Init+0x11c>)
 800230a:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 800230e:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8002312:	4b3d      	ldr	r3, [pc, #244]	@ (8002408 <MX_GPIO_Init+0x11c>)
 8002314:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002318:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800231c:	61bb      	str	r3, [r7, #24]
 800231e:	69bb      	ldr	r3, [r7, #24]
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8002320:	4b39      	ldr	r3, [pc, #228]	@ (8002408 <MX_GPIO_Init+0x11c>)
 8002322:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002326:	4a38      	ldr	r2, [pc, #224]	@ (8002408 <MX_GPIO_Init+0x11c>)
 8002328:	f043 0304 	orr.w	r3, r3, #4
 800232c:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8002330:	4b35      	ldr	r3, [pc, #212]	@ (8002408 <MX_GPIO_Init+0x11c>)
 8002332:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002336:	f003 0304 	and.w	r3, r3, #4
 800233a:	617b      	str	r3, [r7, #20]
 800233c:	697b      	ldr	r3, [r7, #20]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 800233e:	4b32      	ldr	r3, [pc, #200]	@ (8002408 <MX_GPIO_Init+0x11c>)
 8002340:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002344:	4a30      	ldr	r2, [pc, #192]	@ (8002408 <MX_GPIO_Init+0x11c>)
 8002346:	f043 0301 	orr.w	r3, r3, #1
 800234a:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 800234e:	4b2e      	ldr	r3, [pc, #184]	@ (8002408 <MX_GPIO_Init+0x11c>)
 8002350:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002354:	f003 0301 	and.w	r3, r3, #1
 8002358:	613b      	str	r3, [r7, #16]
 800235a:	693b      	ldr	r3, [r7, #16]
  __HAL_RCC_GPIOB_CLK_ENABLE();
 800235c:	4b2a      	ldr	r3, [pc, #168]	@ (8002408 <MX_GPIO_Init+0x11c>)
 800235e:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002362:	4a29      	ldr	r2, [pc, #164]	@ (8002408 <MX_GPIO_Init+0x11c>)
 8002364:	f043 0302 	orr.w	r3, r3, #2
 8002368:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 800236c:	4b26      	ldr	r3, [pc, #152]	@ (8002408 <MX_GPIO_Init+0x11c>)
 800236e:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002372:	f003 0302 	and.w	r3, r3, #2
 8002376:	60fb      	str	r3, [r7, #12]
 8002378:	68fb      	ldr	r3, [r7, #12]
  __HAL_RCC_GPIOD_CLK_ENABLE();
 800237a:	4b23      	ldr	r3, [pc, #140]	@ (8002408 <MX_GPIO_Init+0x11c>)
 800237c:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002380:	4a21      	ldr	r2, [pc, #132]	@ (8002408 <MX_GPIO_Init+0x11c>)
 8002382:	f043 0308 	orr.w	r3, r3, #8
 8002386:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 800238a:	4b1f      	ldr	r3, [pc, #124]	@ (8002408 <MX_GPIO_Init+0x11c>)
 800238c:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002390:	f003 0308 	and.w	r3, r3, #8
 8002394:	60bb      	str	r3, [r7, #8]
 8002396:	68bb      	ldr	r3, [r7, #8]
  __HAL_RCC_GPIOE_CLK_ENABLE();
 8002398:	4b1b      	ldr	r3, [pc, #108]	@ (8002408 <MX_GPIO_Init+0x11c>)
 800239a:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800239e:	4a1a      	ldr	r2, [pc, #104]	@ (8002408 <MX_GPIO_Init+0x11c>)
 80023a0:	f043 0310 	orr.w	r3, r3, #16
 80023a4:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80023a8:	4b17      	ldr	r3, [pc, #92]	@ (8002408 <MX_GPIO_Init+0x11c>)
 80023aa:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023ae:	f003 0310 	and.w	r3, r3, #16
 80023b2:	607b      	str	r3, [r7, #4]
 80023b4:	687b      	ldr	r3, [r7, #4]

/* USER CODE BEGIN MX_GPIO_Init_2 */
  GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
 80023b6:	f44f 4340 	mov.w	r3, #49152	@ 0xc000
 80023ba:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80023bc:	2301      	movs	r3, #1
 80023be:	623b      	str	r3, [r7, #32]
  GPIO_InitStruct.Pull = GPIO_PULLUP;
 80023c0:	2301      	movs	r3, #1
 80023c2:	627b      	str	r3, [r7, #36]	@ 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80023c4:	2300      	movs	r3, #0
 80023c6:	62bb      	str	r3, [r7, #40]	@ 0x28
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 80023c8:	f107 031c 	add.w	r3, r7, #28
 80023cc:	4619      	mov	r1, r3
 80023ce:	480f      	ldr	r0, [pc, #60]	@ (800240c <MX_GPIO_Init+0x120>)
 80023d0:	f007 f968 	bl	80096a4 <HAL_GPIO_Init>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_14, GPIO_PIN_RESET);
 80023d4:	2200      	movs	r2, #0
 80023d6:	f44f 4180 	mov.w	r1, #16384	@ 0x4000
 80023da:	480c      	ldr	r0, [pc, #48]	@ (800240c <MX_GPIO_Init+0x120>)
 80023dc:	f007 fb12 	bl	8009a04 <HAL_GPIO_WritePin>
  HAL_Delay(100);
 80023e0:	2064      	movs	r0, #100	@ 0x64
 80023e2:	f002 fe3b 	bl	800505c <HAL_Delay>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_14, GPIO_PIN_SET);
 80023e6:	2201      	movs	r2, #1
 80023e8:	f44f 4180 	mov.w	r1, #16384	@ 0x4000
 80023ec:	4807      	ldr	r0, [pc, #28]	@ (800240c <MX_GPIO_Init+0x120>)
 80023ee:	f007 fb09 	bl	8009a04 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_15, GPIO_PIN_SET);
 80023f2:	2201      	movs	r2, #1
 80023f4:	f44f 4100 	mov.w	r1, #32768	@ 0x8000
 80023f8:	4804      	ldr	r0, [pc, #16]	@ (800240c <MX_GPIO_Init+0x120>)
 80023fa:	f007 fb03 	bl	8009a04 <HAL_GPIO_WritePin>
//	HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, GPIO_PIN_RESET);
//	HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, GPIO_PIN_SET);
//	HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, GPIO_PIN_RESET);
//	HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, GPIO_PIN_SET);
/* USER CODE END MX_GPIO_Init_2 */
}
 80023fe:	bf00      	nop
 8002400:	3730      	adds	r7, #48	@ 0x30
 8002402:	46bd      	mov	sp, r7
 8002404:	bd80      	pop	{r7, pc}
 8002406:	bf00      	nop
 8002408:	58024400 	.word	0x58024400
 800240c:	58021000 	.word	0x58021000

08002410 <StartDefaultTask>:
  * @param  argument: Not used
  * @retval None
  */
/* USER CODE END Header_StartDefaultTask */
void StartDefaultTask(void *argument)
{
 8002410:	b580      	push	{r7, lr}
 8002412:	b082      	sub	sp, #8
 8002414:	af00      	add	r7, sp, #0
 8002416:	6078      	str	r0, [r7, #4]
  /* init code for LWIP */
  MX_LWIP_Init();
 8002418:	f00d faea 	bl	800f9f0 <MX_LWIP_Init>
  /* USER CODE BEGIN 5 */
  /* Infinite loop */
  for(;;)
  {
    osDelay(pdMS_TO_TICKS(1000));
 800241c:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8002420:	f00e fab9 	bl	8010996 <osDelay>
 8002424:	e7fa      	b.n	800241c <StartDefaultTask+0xc>
	...

08002428 <MPU_Config>:
}

 /* MPU Configuration */

void MPU_Config(void)
{
 8002428:	b580      	push	{r7, lr}
 800242a:	b084      	sub	sp, #16
 800242c:	af00      	add	r7, sp, #0
  MPU_Region_InitTypeDef MPU_InitStruct = {0};
 800242e:	463b      	mov	r3, r7
 8002430:	2200      	movs	r2, #0
 8002432:	601a      	str	r2, [r3, #0]
 8002434:	605a      	str	r2, [r3, #4]
 8002436:	609a      	str	r2, [r3, #8]
 8002438:	60da      	str	r2, [r3, #12]

  /* Disables the MPU */
  HAL_MPU_Disable();
 800243a:	f002 ff33 	bl	80052a4 <HAL_MPU_Disable>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
 800243e:	2301      	movs	r3, #1
 8002440:	703b      	strb	r3, [r7, #0]
  MPU_InitStruct.Number = MPU_REGION_NUMBER0;
 8002442:	2300      	movs	r3, #0
 8002444:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x0;
 8002446:	2300      	movs	r3, #0
 8002448:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
 800244a:	231f      	movs	r3, #31
 800244c:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.SubRegionDisable = 0x87;
 800244e:	2387      	movs	r3, #135	@ 0x87
 8002450:	727b      	strb	r3, [r7, #9]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
 8002452:	2300      	movs	r3, #0
 8002454:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
 8002456:	2300      	movs	r3, #0
 8002458:	72fb      	strb	r3, [r7, #11]
  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
 800245a:	2301      	movs	r3, #1
 800245c:	733b      	strb	r3, [r7, #12]
  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
 800245e:	2301      	movs	r3, #1
 8002460:	737b      	strb	r3, [r7, #13]
  MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
 8002462:	2300      	movs	r3, #0
 8002464:	73bb      	strb	r3, [r7, #14]
  MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
 8002466:	2300      	movs	r3, #0
 8002468:	73fb      	strb	r3, [r7, #15]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 800246a:	463b      	mov	r3, r7
 800246c:	4618      	mov	r0, r3
 800246e:	f002 ff51 	bl	8005314 <HAL_MPU_ConfigRegion>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Number = MPU_REGION_NUMBER1;
 8002472:	2301      	movs	r3, #1
 8002474:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x24020000;
 8002476:	4b13      	ldr	r3, [pc, #76]	@ (80024c4 <MPU_Config+0x9c>)
 8002478:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;
 800247a:	2310      	movs	r3, #16
 800247c:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.SubRegionDisable = 0x0;
 800247e:	2300      	movs	r3, #0
 8002480:	727b      	strb	r3, [r7, #9]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
 8002482:	2301      	movs	r3, #1
 8002484:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
 8002486:	2303      	movs	r3, #3
 8002488:	72fb      	strb	r3, [r7, #11]
  MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
 800248a:	2300      	movs	r3, #0
 800248c:	737b      	strb	r3, [r7, #13]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 800248e:	463b      	mov	r3, r7
 8002490:	4618      	mov	r0, r3
 8002492:	f002 ff3f 	bl	8005314 <HAL_MPU_ConfigRegion>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Number = MPU_REGION_NUMBER2;
 8002496:	2302      	movs	r3, #2
 8002498:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x24040000;
 800249a:	4b0b      	ldr	r3, [pc, #44]	@ (80024c8 <MPU_Config+0xa0>)
 800249c:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_512B;
 800249e:	2308      	movs	r3, #8
 80024a0:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
 80024a2:	2300      	movs	r3, #0
 80024a4:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
 80024a6:	2301      	movs	r3, #1
 80024a8:	737b      	strb	r3, [r7, #13]
  MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
 80024aa:	2301      	movs	r3, #1
 80024ac:	73fb      	strb	r3, [r7, #15]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 80024ae:	463b      	mov	r3, r7
 80024b0:	4618      	mov	r0, r3
 80024b2:	f002 ff2f 	bl	8005314 <HAL_MPU_ConfigRegion>
  /* Enables the MPU */
  HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
 80024b6:	2004      	movs	r0, #4
 80024b8:	f002 ff0c 	bl	80052d4 <HAL_MPU_Enable>

}
 80024bc:	bf00      	nop
 80024be:	3710      	adds	r7, #16
 80024c0:	46bd      	mov	sp, r7
 80024c2:	bd80      	pop	{r7, pc}
 80024c4:	24020000 	.word	0x24020000
 80024c8:	24040000 	.word	0x24040000

080024cc <HAL_TIM_PeriodElapsedCallback>:
  * a global variable "uwTick" used as application time base.
  * @param  htim : TIM handle
  * @retval None
  */
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
 80024cc:	b580      	push	{r7, lr}
 80024ce:	b082      	sub	sp, #8
 80024d0:	af00      	add	r7, sp, #0
 80024d2:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN Callback 0 */

  /* USER CODE END Callback 0 */
  if (htim->Instance == TIM6) {
 80024d4:	687b      	ldr	r3, [r7, #4]
 80024d6:	681b      	ldr	r3, [r3, #0]
 80024d8:	4a09      	ldr	r2, [pc, #36]	@ (8002500 <HAL_TIM_PeriodElapsedCallback+0x34>)
 80024da:	4293      	cmp	r3, r2
 80024dc:	d101      	bne.n	80024e2 <HAL_TIM_PeriodElapsedCallback+0x16>
    HAL_IncTick();
 80024de:	f002 fd9d 	bl	800501c <HAL_IncTick>
  }
  /* USER CODE BEGIN Callback 1 */
  if (htim->Instance == TIM6) {
 80024e2:	687b      	ldr	r3, [r7, #4]
 80024e4:	681b      	ldr	r3, [r3, #0]
 80024e6:	4a06      	ldr	r2, [pc, #24]	@ (8002500 <HAL_TIM_PeriodElapsedCallback+0x34>)
 80024e8:	4293      	cmp	r3, r2
 80024ea:	d104      	bne.n	80024f6 <HAL_TIM_PeriodElapsedCallback+0x2a>
    MilliTimer++;
 80024ec:	4b05      	ldr	r3, [pc, #20]	@ (8002504 <HAL_TIM_PeriodElapsedCallback+0x38>)
 80024ee:	681b      	ldr	r3, [r3, #0]
 80024f0:	3301      	adds	r3, #1
 80024f2:	4a04      	ldr	r2, [pc, #16]	@ (8002504 <HAL_TIM_PeriodElapsedCallback+0x38>)
 80024f4:	6013      	str	r3, [r2, #0]
  }
  /* USER CODE END Callback 1 */
}
 80024f6:	bf00      	nop
 80024f8:	3708      	adds	r7, #8
 80024fa:	46bd      	mov	sp, r7
 80024fc:	bd80      	pop	{r7, pc}
 80024fe:	bf00      	nop
 8002500:	40001000 	.word	0x40001000
 8002504:	2402b034 	.word	0x2402b034

08002508 <Error_Handler>:
/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
 8002508:	b480      	push	{r7}
 800250a:	af00      	add	r7, sp, #0
  __ASM volatile ("cpsid i" : : : "memory");
 800250c:	b672      	cpsid	i
}
 800250e:	bf00      	nop
  /* USER CODE BEGIN Error_Handler_Debug */
  /* User can add his own implementation to report the HAL error return state */
  __disable_irq();
  while (1)
 8002510:	bf00      	nop
 8002512:	e7fd      	b.n	8002510 <Error_Handler+0x8>

08002514 <MqttClientSubTask>:
void MqttClientSubTask(void *argument); //mqtt client subscribe task function
void MqttClientPubTask(void *argument); //mqtt client publish task function
int MqttConnectBroker(void); 				//mqtt broker connect function
void MqttMessageArrived(MessageData *msg); //mqtt message callback function

void MqttClientSubTask (void* argument) {
 8002514:	b580      	push	{r7, lr}
 8002516:	b082      	sub	sp, #8
 8002518:	af00      	add	r7, sp, #0
 800251a:	6078      	str	r0, [r7, #4]
    while (1) {
        // waiting for valid ip address
        if (gnetif.ip_addr.addr == 0 || gnetif.netmask.addr == 0 || gnetif.gw.addr == 0) // system has no valid ip address
 800251c:	4b16      	ldr	r3, [pc, #88]	@ (8002578 <MqttClientSubTask+0x64>)
 800251e:	685b      	ldr	r3, [r3, #4]
 8002520:	2b00      	cmp	r3, #0
 8002522:	d007      	beq.n	8002534 <MqttClientSubTask+0x20>
 8002524:	4b14      	ldr	r3, [pc, #80]	@ (8002578 <MqttClientSubTask+0x64>)
 8002526:	689b      	ldr	r3, [r3, #8]
 8002528:	2b00      	cmp	r3, #0
 800252a:	d003      	beq.n	8002534 <MqttClientSubTask+0x20>
 800252c:	4b12      	ldr	r3, [pc, #72]	@ (8002578 <MqttClientSubTask+0x64>)
 800252e:	68db      	ldr	r3, [r3, #12]
 8002530:	2b00      	cmp	r3, #0
 8002532:	d104      	bne.n	800253e <MqttClientSubTask+0x2a>
        {
            osDelay (pdMS_TO_TICKS (1000));
 8002534:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8002538:	f00e fa2d 	bl	8010996 <osDelay>
            continue;
 800253c:	e003      	b.n	8002546 <MqttClientSubTask+0x32>
        } else {
            printf ("DHCP/Static IP O.K.\n");
 800253e:	480f      	ldr	r0, [pc, #60]	@ (800257c <MqttClientSubTask+0x68>)
 8002540:	f027 fab4 	bl	8029aac <puts>
            break;
 8002544:	e000      	b.n	8002548 <MqttClientSubTask+0x34>
        if (gnetif.ip_addr.addr == 0 || gnetif.netmask.addr == 0 || gnetif.gw.addr == 0) // system has no valid ip address
 8002546:	e7e9      	b.n	800251c <MqttClientSubTask+0x8>
        }
    }

    while (1) {
        if (!mqttClient.isconnected) {
 8002548:	4b0d      	ldr	r3, [pc, #52]	@ (8002580 <MqttClientSubTask+0x6c>)
 800254a:	6a1b      	ldr	r3, [r3, #32]
 800254c:	2b00      	cmp	r3, #0
 800254e:	d109      	bne.n	8002564 <MqttClientSubTask+0x50>
            // try to connect to the broker
            if (MqttConnectBroker () != MQTT_SUCCESS) {
 8002550:	f000 fb02 	bl	8002b58 <MqttConnectBroker>
 8002554:	4603      	mov	r3, r0
 8002556:	2b00      	cmp	r3, #0
 8002558:	d0f6      	beq.n	8002548 <MqttClientSubTask+0x34>
                osDelay (pdMS_TO_TICKS (1000));
 800255a:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 800255e:	f00e fa1a 	bl	8010996 <osDelay>
 8002562:	e7f1      	b.n	8002548 <MqttClientSubTask+0x34>
            }
        } else {
            MQTTYield (&mqttClient, 500); // handle timer
 8002564:	f44f 71fa 	mov.w	r1, #500	@ 0x1f4
 8002568:	4805      	ldr	r0, [pc, #20]	@ (8002580 <MqttClientSubTask+0x6c>)
 800256a:	f024 fba1 	bl	8026cb0 <MQTTYield>
            osDelay (pdMS_TO_TICKS (100));
 800256e:	2064      	movs	r0, #100	@ 0x64
 8002570:	f00e fa11 	bl	8010996 <osDelay>
        if (!mqttClient.isconnected) {
 8002574:	e7e8      	b.n	8002548 <MqttClientSubTask+0x34>
 8002576:	bf00      	nop
 8002578:	24002174 	.word	0x24002174
 800257c:	0802c59c 	.word	0x0802c59c
 8002580:	24000670 	.word	0x24000670

08002584 <MqttClientPubTask>:
        }
    }
}

void MqttClientPubTask (void* argument) {
 8002584:	b580      	push	{r7, lr}
 8002586:	f5ad 7d16 	sub.w	sp, sp, #600	@ 0x258
 800258a:	af04      	add	r7, sp, #16
 800258c:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 8002590:	f5a3 7311 	sub.w	r3, r3, #580	@ 0x244
 8002594:	6018      	str	r0, [r3, #0]
    char messageBuffer[512]  = { 0x00 };
 8002596:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 800259a:	f5a3 7304 	sub.w	r3, r3, #528	@ 0x210
 800259e:	2200      	movs	r2, #0
 80025a0:	601a      	str	r2, [r3, #0]
 80025a2:	3304      	adds	r3, #4
 80025a4:	f44f 72fe 	mov.w	r2, #508	@ 0x1fc
 80025a8:	2100      	movs	r1, #0
 80025aa:	4618      	mov	r0, r3
 80025ac:	f027 fba8 	bl	8029d00 <memset>
    char topicTextBuffer[32] = { 0x00 };
 80025b0:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 80025b4:	f5a3 730c 	sub.w	r3, r3, #560	@ 0x230
 80025b8:	2200      	movs	r2, #0
 80025ba:	601a      	str	r2, [r3, #0]
 80025bc:	3304      	adds	r3, #4
 80025be:	2200      	movs	r2, #0
 80025c0:	601a      	str	r2, [r3, #0]
 80025c2:	605a      	str	r2, [r3, #4]
 80025c4:	609a      	str	r2, [r3, #8]
 80025c6:	60da      	str	r2, [r3, #12]
 80025c8:	611a      	str	r2, [r3, #16]
 80025ca:	615a      	str	r2, [r3, #20]
 80025cc:	619a      	str	r2, [r3, #24]
    uint32_t bytesInBuffer   = 0;
 80025ce:	2300      	movs	r3, #0
 80025d0:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
    uint8_t boardNumber      = 0;
 80025d4:	2300      	movs	r3, #0
 80025d6:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
    MQTTMessage message;

    while (1) {
        if (mqttClient.isconnected) {
 80025da:	4b93      	ldr	r3, [pc, #588]	@ (8002828 <MqttClientPubTask+0x2a4>)
 80025dc:	6a1b      	ldr	r3, [r3, #32]
 80025de:	2b00      	cmp	r3, #0
 80025e0:	f000 8293 	beq.w	8002b0a <MqttClientPubTask+0x586>
            if (is_link_up ()) {
 80025e4:	f00d f9f4 	bl	800f9d0 <is_link_up>
 80025e8:	4603      	mov	r3, r0
 80025ea:	2b00      	cmp	r3, #0
 80025ec:	f000 828d 	beq.w	8002b0a <MqttClientPubTask+0x586>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 80025f0:	2300      	movs	r3, #0
 80025f2:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
 80025f6:	e10e      	b.n	8002816 <MqttClientPubTask+0x292>
                    osMutexAcquire (resMeasurementsMutex, osWaitForever);
 80025f8:	4b8c      	ldr	r3, [pc, #560]	@ (800282c <MqttClientPubTask+0x2a8>)
 80025fa:	681b      	ldr	r3, [r3, #0]
 80025fc:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8002600:	4618      	mov	r0, r3
 8002602:	f00e fa69 	bl	8010ad8 <osMutexAcquire>
                    RESMeasurements* resMeas = &resMeasurements[boardNumber];
 8002606:	f897 2247 	ldrb.w	r2, [r7, #583]	@ 0x247
 800260a:	4613      	mov	r3, r2
 800260c:	011b      	lsls	r3, r3, #4
 800260e:	1a9b      	subs	r3, r3, r2
 8002610:	009b      	lsls	r3, r3, #2
 8002612:	4a87      	ldr	r2, [pc, #540]	@ (8002830 <MqttClientPubTask+0x2ac>)
 8002614:	4413      	add	r3, r2
 8002616:	f8c7 3238 	str.w	r3, [r7, #568]	@ 0x238
                    sprintf (topicTextBuffer, "RESmeasurments/%d", boardNumber + 1);
 800261a:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 800261e:	1c5a      	adds	r2, r3, #1
 8002620:	f107 0318 	add.w	r3, r7, #24
 8002624:	4983      	ldr	r1, [pc, #524]	@ (8002834 <MqttClientPubTask+0x2b0>)
 8002626:	4618      	mov	r0, r3
 8002628:	f027 fa48 	bl	8029abc <siprintf>
                    bytesInBuffer = sprintf (messageBuffer, "{\"voltageRMS\":[%.2f, %.2f, %.2f], ", resMeas->voltageRMS[0], resMeas->voltageRMS[1], resMeas->voltageRMS[2]);
 800262c:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002630:	edd3 7a00 	vldr	s15, [r3]
 8002634:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 8002638:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 800263c:	edd3 7a01 	vldr	s15, [r3, #4]
 8002640:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002644:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002648:	edd3 6a02 	vldr	s13, [r3, #8]
 800264c:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002650:	f107 0038 	add.w	r0, r7, #56	@ 0x38
 8002654:	ed8d 6b02 	vstr	d6, [sp, #8]
 8002658:	ed8d 7b00 	vstr	d7, [sp]
 800265c:	ec53 2b15 	vmov	r2, r3, d5
 8002660:	4975      	ldr	r1, [pc, #468]	@ (8002838 <MqttClientPubTask+0x2b4>)
 8002662:	f027 fa2b 	bl	8029abc <siprintf>
 8002666:	4603      	mov	r3, r0
 8002668:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"voltagePeak\":[%.2f, %.2f, %.2f], ", resMeas->voltagePeak[0], resMeas->voltagePeak[1], resMeas->voltagePeak[2]);
 800266c:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002670:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002674:	18d0      	adds	r0, r2, r3
 8002676:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 800267a:	edd3 7a03 	vldr	s15, [r3, #12]
 800267e:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 8002682:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002686:	edd3 7a04 	vldr	s15, [r3, #16]
 800268a:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 800268e:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002692:	edd3 6a05 	vldr	s13, [r3, #20]
 8002696:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 800269a:	ed8d 6b02 	vstr	d6, [sp, #8]
 800269e:	ed8d 7b00 	vstr	d7, [sp]
 80026a2:	ec53 2b15 	vmov	r2, r3, d5
 80026a6:	4965      	ldr	r1, [pc, #404]	@ (800283c <MqttClientPubTask+0x2b8>)
 80026a8:	f027 fa08 	bl	8029abc <siprintf>
 80026ac:	4603      	mov	r3, r0
 80026ae:	461a      	mov	r2, r3
 80026b0:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80026b4:	4413      	add	r3, r2
 80026b6:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentRMS\":[%.3f, %.3f, %.3f], ", resMeas->currentRMS[0], resMeas->currentRMS[1], resMeas->currentRMS[2]);
 80026ba:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 80026be:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80026c2:	18d0      	adds	r0, r2, r3
 80026c4:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 80026c8:	edd3 7a06 	vldr	s15, [r3, #24]
 80026cc:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 80026d0:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 80026d4:	edd3 7a07 	vldr	s15, [r3, #28]
 80026d8:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 80026dc:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 80026e0:	edd3 6a08 	vldr	s13, [r3, #32]
 80026e4:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 80026e8:	ed8d 6b02 	vstr	d6, [sp, #8]
 80026ec:	ed8d 7b00 	vstr	d7, [sp]
 80026f0:	ec53 2b15 	vmov	r2, r3, d5
 80026f4:	4952      	ldr	r1, [pc, #328]	@ (8002840 <MqttClientPubTask+0x2bc>)
 80026f6:	f027 f9e1 	bl	8029abc <siprintf>
 80026fa:	4603      	mov	r3, r0
 80026fc:	461a      	mov	r2, r3
 80026fe:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002702:	4413      	add	r3, r2
 8002704:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentPeak\":[%.3f, %.3f, %.3f], ", resMeas->currentPeak[0], resMeas->currentPeak[1], resMeas->currentPeak[2]);
 8002708:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 800270c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002710:	18d0      	adds	r0, r2, r3
 8002712:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002716:	edd3 7a09 	vldr	s15, [r3, #36]	@ 0x24
 800271a:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 800271e:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002722:	edd3 7a0a 	vldr	s15, [r3, #40]	@ 0x28
 8002726:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 800272a:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 800272e:	edd3 6a0b 	vldr	s13, [r3, #44]	@ 0x2c
 8002732:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002736:	ed8d 6b02 	vstr	d6, [sp, #8]
 800273a:	ed8d 7b00 	vstr	d7, [sp]
 800273e:	ec53 2b15 	vmov	r2, r3, d5
 8002742:	4940      	ldr	r1, [pc, #256]	@ (8002844 <MqttClientPubTask+0x2c0>)
 8002744:	f027 f9ba 	bl	8029abc <siprintf>
 8002748:	4603      	mov	r3, r0
 800274a:	461a      	mov	r2, r3
 800274c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002750:	4413      	add	r3, r2
 8002752:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"power\":[%.2f, %.2f, %.2f], ", resMeas->power[0], resMeas->power[1], resMeas->power[2]);
 8002756:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 800275a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 800275e:	18d0      	adds	r0, r2, r3
 8002760:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002764:	edd3 7a0c 	vldr	s15, [r3, #48]	@ 0x30
 8002768:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 800276c:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002770:	edd3 7a0d 	vldr	s15, [r3, #52]	@ 0x34
 8002774:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002778:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 800277c:	edd3 6a0e 	vldr	s13, [r3, #56]	@ 0x38
 8002780:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002784:	ed8d 6b02 	vstr	d6, [sp, #8]
 8002788:	ed8d 7b00 	vstr	d7, [sp]
 800278c:	ec53 2b15 	vmov	r2, r3, d5
 8002790:	492d      	ldr	r1, [pc, #180]	@ (8002848 <MqttClientPubTask+0x2c4>)
 8002792:	f027 f993 	bl	8029abc <siprintf>
 8002796:	4603      	mov	r3, r0
 8002798:	461a      	mov	r2, r3
 800279a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 800279e:	4413      	add	r3, r2
 80027a0:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"lastSeen\": %ld}", slaveLastSeen[boardNumber]);
 80027a4:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 80027a8:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80027ac:	18d0      	adds	r0, r2, r3
 80027ae:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 80027b2:	4a26      	ldr	r2, [pc, #152]	@ (800284c <MqttClientPubTask+0x2c8>)
 80027b4:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 80027b8:	461a      	mov	r2, r3
 80027ba:	4925      	ldr	r1, [pc, #148]	@ (8002850 <MqttClientPubTask+0x2cc>)
 80027bc:	f027 f97e 	bl	8029abc <siprintf>
 80027c0:	4603      	mov	r3, r0
 80027c2:	461a      	mov	r2, r3
 80027c4:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80027c8:	4413      	add	r3, r2
 80027ca:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    osMutexRelease (resMeasurementsMutex);
 80027ce:	4b17      	ldr	r3, [pc, #92]	@ (800282c <MqttClientPubTask+0x2a8>)
 80027d0:	681b      	ldr	r3, [r3, #0]
 80027d2:	4618      	mov	r0, r3
 80027d4:	f00e f9cb 	bl	8010b6e <osMutexRelease>
                    message.payload    = (void*)messageBuffer;
 80027d8:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 80027dc:	f5a3 7310 	sub.w	r3, r3, #576	@ 0x240
 80027e0:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 80027e4:	609a      	str	r2, [r3, #8]
                    message.payloadlen = strlen (messageBuffer);
 80027e6:	f107 0338 	add.w	r3, r7, #56	@ 0x38
 80027ea:	4618      	mov	r0, r3
 80027ec:	f7fd fdd8 	bl	80003a0 <strlen>
 80027f0:	4602      	mov	r2, r0
 80027f2:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 80027f6:	f5a3 7310 	sub.w	r3, r3, #576	@ 0x240
 80027fa:	60da      	str	r2, [r3, #12]
                    MQTTPublish (&mqttClient, topicTextBuffer, &message); // publish a message
 80027fc:	f107 0208 	add.w	r2, r7, #8
 8002800:	f107 0318 	add.w	r3, r7, #24
 8002804:	4619      	mov	r1, r3
 8002806:	4808      	ldr	r0, [pc, #32]	@ (8002828 <MqttClientPubTask+0x2a4>)
 8002808:	f024 fc71 	bl	80270ee <MQTTPublish>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 800280c:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 8002810:	3301      	adds	r3, #1
 8002812:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
 8002816:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 800281a:	2b03      	cmp	r3, #3
 800281c:	f67f aeec 	bls.w	80025f8 <MqttClientPubTask+0x74>
                }

                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002820:	2300      	movs	r3, #0
 8002822:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
 8002826:	e16b      	b.n	8002b00 <MqttClientPubTask+0x57c>
 8002828:	24000670 	.word	0x24000670
 800282c:	24002168 	.word	0x24002168
 8002830:	24001fc8 	.word	0x24001fc8
 8002834:	0802c5b0 	.word	0x0802c5b0
 8002838:	0802c5c4 	.word	0x0802c5c4
 800283c:	0802c5e8 	.word	0x0802c5e8
 8002840:	0802c60c 	.word	0x0802c60c
 8002844:	0802c630 	.word	0x0802c630
 8002848:	0802c654 	.word	0x0802c654
 800284c:	24002158 	.word	0x24002158
 8002850:	0802c674 	.word	0x0802c674
                    osMutexAcquire (sensorsInfoMutex, osWaitForever);
 8002854:	4baf      	ldr	r3, [pc, #700]	@ (8002b14 <MqttClientPubTask+0x590>)
 8002856:	681b      	ldr	r3, [r3, #0]
 8002858:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800285c:	4618      	mov	r0, r3
 800285e:	f00e f93b 	bl	8010ad8 <osMutexAcquire>
                    SesnorsInfo* sensors = &sensorsInfo[boardNumber];
 8002862:	f897 2247 	ldrb.w	r2, [r7, #583]	@ 0x247
 8002866:	4613      	mov	r3, r2
 8002868:	009b      	lsls	r3, r3, #2
 800286a:	4413      	add	r3, r2
 800286c:	00db      	lsls	r3, r3, #3
 800286e:	4aaa      	ldr	r2, [pc, #680]	@ (8002b18 <MqttClientPubTask+0x594>)
 8002870:	4413      	add	r3, r2
 8002872:	f8c7 323c 	str.w	r3, [r7, #572]	@ 0x23c
                    sprintf (topicTextBuffer, "Sensors/%d", boardNumber + 1);
 8002876:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 800287a:	1c5a      	adds	r2, r3, #1
 800287c:	f107 0318 	add.w	r3, r7, #24
 8002880:	49a6      	ldr	r1, [pc, #664]	@ (8002b1c <MqttClientPubTask+0x598>)
 8002882:	4618      	mov	r0, r3
 8002884:	f027 f91a 	bl	8029abc <siprintf>
                    bytesInBuffer = sprintf (messageBuffer, "{\"pvTemperature\":[%.1f, %.1f], ", sensors->pvTemperature[0], sensors->pvTemperature[1]);
 8002888:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 800288c:	edd3 7a00 	vldr	s15, [r3]
 8002890:	eeb7 6ae7 	vcvt.f64.f32	d6, s15
 8002894:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002898:	edd3 7a01 	vldr	s15, [r3, #4]
 800289c:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 80028a0:	f107 0038 	add.w	r0, r7, #56	@ 0x38
 80028a4:	ed8d 7b00 	vstr	d7, [sp]
 80028a8:	ec53 2b16 	vmov	r2, r3, d6
 80028ac:	499c      	ldr	r1, [pc, #624]	@ (8002b20 <MqttClientPubTask+0x59c>)
 80028ae:	f027 f905 	bl	8029abc <siprintf>
 80028b2:	4603      	mov	r3, r0
 80028b4:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"fanVoltage\":%.2f, ", sensors->fanVoltage);
 80028b8:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 80028bc:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80028c0:	18d0      	adds	r0, r2, r3
 80028c2:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80028c6:	edd3 7a02 	vldr	s15, [r3, #8]
 80028ca:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 80028ce:	ec53 2b17 	vmov	r2, r3, d7
 80028d2:	4994      	ldr	r1, [pc, #592]	@ (8002b24 <MqttClientPubTask+0x5a0>)
 80028d4:	f027 f8f2 	bl	8029abc <siprintf>
 80028d8:	4603      	mov	r3, r0
 80028da:	461a      	mov	r2, r3
 80028dc:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80028e0:	4413      	add	r3, r2
 80028e2:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"pvEncoder\":%.2f, ", sensors->pvEncoder);
 80028e6:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 80028ea:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80028ee:	18d0      	adds	r0, r2, r3
 80028f0:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80028f4:	edd3 7a03 	vldr	s15, [r3, #12]
 80028f8:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 80028fc:	ec53 2b17 	vmov	r2, r3, d7
 8002900:	4989      	ldr	r1, [pc, #548]	@ (8002b28 <MqttClientPubTask+0x5a4>)
 8002902:	f027 f8db 	bl	8029abc <siprintf>
 8002906:	4603      	mov	r3, r0
 8002908:	461a      	mov	r2, r3
 800290a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 800290e:	4413      	add	r3, r2
 8002910:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXStatus\":%d, ", sensors->motorXStatus);
 8002914:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002918:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 800291c:	18d0      	adds	r0, r2, r3
 800291e:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002922:	7c1b      	ldrb	r3, [r3, #16]
 8002924:	461a      	mov	r2, r3
 8002926:	4981      	ldr	r1, [pc, #516]	@ (8002b2c <MqttClientPubTask+0x5a8>)
 8002928:	f027 f8c8 	bl	8029abc <siprintf>
 800292c:	4603      	mov	r3, r0
 800292e:	461a      	mov	r2, r3
 8002930:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002934:	4413      	add	r3, r2
 8002936:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYStatus\":%d, ", sensors->motorYStatus);
 800293a:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 800293e:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002942:	18d0      	adds	r0, r2, r3
 8002944:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002948:	7c5b      	ldrb	r3, [r3, #17]
 800294a:	461a      	mov	r2, r3
 800294c:	4978      	ldr	r1, [pc, #480]	@ (8002b30 <MqttClientPubTask+0x5ac>)
 800294e:	f027 f8b5 	bl	8029abc <siprintf>
 8002952:	4603      	mov	r3, r0
 8002954:	461a      	mov	r2, r3
 8002956:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 800295a:	4413      	add	r3, r2
 800295c:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXAveCurrent\":%.3f, ", sensors->motorXAveCurrent);
 8002960:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002964:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002968:	18d0      	adds	r0, r2, r3
 800296a:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 800296e:	edd3 7a05 	vldr	s15, [r3, #20]
 8002972:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002976:	ec53 2b17 	vmov	r2, r3, d7
 800297a:	496e      	ldr	r1, [pc, #440]	@ (8002b34 <MqttClientPubTask+0x5b0>)
 800297c:	f027 f89e 	bl	8029abc <siprintf>
 8002980:	4603      	mov	r3, r0
 8002982:	461a      	mov	r2, r3
 8002984:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002988:	4413      	add	r3, r2
 800298a:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYAveCurrent\":%.3f, ", sensors->motorYAveCurrent);
 800298e:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002992:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002996:	18d0      	adds	r0, r2, r3
 8002998:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 800299c:	edd3 7a06 	vldr	s15, [r3, #24]
 80029a0:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 80029a4:	ec53 2b17 	vmov	r2, r3, d7
 80029a8:	4963      	ldr	r1, [pc, #396]	@ (8002b38 <MqttClientPubTask+0x5b4>)
 80029aa:	f027 f887 	bl	8029abc <siprintf>
 80029ae:	4603      	mov	r3, r0
 80029b0:	461a      	mov	r2, r3
 80029b2:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80029b6:	4413      	add	r3, r2
 80029b8:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXPeakCurrent\":%.3f, ", sensors->motorXPeakCurrent);
 80029bc:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 80029c0:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80029c4:	18d0      	adds	r0, r2, r3
 80029c6:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80029ca:	edd3 7a07 	vldr	s15, [r3, #28]
 80029ce:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 80029d2:	ec53 2b17 	vmov	r2, r3, d7
 80029d6:	4959      	ldr	r1, [pc, #356]	@ (8002b3c <MqttClientPubTask+0x5b8>)
 80029d8:	f027 f870 	bl	8029abc <siprintf>
 80029dc:	4603      	mov	r3, r0
 80029de:	461a      	mov	r2, r3
 80029e0:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80029e4:	4413      	add	r3, r2
 80029e6:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYPeakCurrent\":%.3f, ", sensors->motorYPeakCurrent);
 80029ea:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 80029ee:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80029f2:	18d0      	adds	r0, r2, r3
 80029f4:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80029f8:	edd3 7a08 	vldr	s15, [r3, #32]
 80029fc:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002a00:	ec53 2b17 	vmov	r2, r3, d7
 8002a04:	494e      	ldr	r1, [pc, #312]	@ (8002b40 <MqttClientPubTask+0x5bc>)
 8002a06:	f027 f859 	bl	8029abc <siprintf>
 8002a0a:	4603      	mov	r3, r0
 8002a0c:	461a      	mov	r2, r3
 8002a0e:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a12:	4413      	add	r3, r2
 8002a14:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitSwitchUp\":%d, ", sensors->limitSwitchUp);
 8002a18:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002a1c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a20:	18d0      	adds	r0, r2, r3
 8002a22:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002a26:	f893 3024 	ldrb.w	r3, [r3, #36]	@ 0x24
 8002a2a:	461a      	mov	r2, r3
 8002a2c:	4945      	ldr	r1, [pc, #276]	@ (8002b44 <MqttClientPubTask+0x5c0>)
 8002a2e:	f027 f845 	bl	8029abc <siprintf>
 8002a32:	4603      	mov	r3, r0
 8002a34:	461a      	mov	r2, r3
 8002a36:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a3a:	4413      	add	r3, r2
 8002a3c:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitSwitchDown\":%d, ", sensors->limitSwitchDown);
 8002a40:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002a44:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a48:	18d0      	adds	r0, r2, r3
 8002a4a:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002a4e:	f893 3025 	ldrb.w	r3, [r3, #37]	@ 0x25
 8002a52:	461a      	mov	r2, r3
 8002a54:	493c      	ldr	r1, [pc, #240]	@ (8002b48 <MqttClientPubTask+0x5c4>)
 8002a56:	f027 f831 	bl	8029abc <siprintf>
 8002a5a:	4603      	mov	r3, r0
 8002a5c:	461a      	mov	r2, r3
 8002a5e:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a62:	4413      	add	r3, r2
 8002a64:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitSwitchCenter\":%d, ", sensors->limitSwitchCenter);
 8002a68:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002a6c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a70:	18d0      	adds	r0, r2, r3
 8002a72:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002a76:	f893 3026 	ldrb.w	r3, [r3, #38]	@ 0x26
 8002a7a:	461a      	mov	r2, r3
 8002a7c:	4933      	ldr	r1, [pc, #204]	@ (8002b4c <MqttClientPubTask+0x5c8>)
 8002a7e:	f027 f81d 	bl	8029abc <siprintf>
 8002a82:	4603      	mov	r3, r0
 8002a84:	461a      	mov	r2, r3
 8002a86:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a8a:	4413      	add	r3, r2
 8002a8c:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"powerSupplyFailMask\":%d}", sensors->powerSupplyFailMask);
 8002a90:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002a94:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a98:	18d0      	adds	r0, r2, r3
 8002a9a:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002a9e:	f893 3027 	ldrb.w	r3, [r3, #39]	@ 0x27
 8002aa2:	461a      	mov	r2, r3
 8002aa4:	492a      	ldr	r1, [pc, #168]	@ (8002b50 <MqttClientPubTask+0x5cc>)
 8002aa6:	f027 f809 	bl	8029abc <siprintf>
 8002aaa:	4603      	mov	r3, r0
 8002aac:	461a      	mov	r2, r3
 8002aae:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002ab2:	4413      	add	r3, r2
 8002ab4:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240

                    osMutexRelease (sensorsInfoMutex);
 8002ab8:	4b16      	ldr	r3, [pc, #88]	@ (8002b14 <MqttClientPubTask+0x590>)
 8002aba:	681b      	ldr	r3, [r3, #0]
 8002abc:	4618      	mov	r0, r3
 8002abe:	f00e f856 	bl	8010b6e <osMutexRelease>
                    message.payload    = (void*)messageBuffer;
 8002ac2:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 8002ac6:	f5a3 7310 	sub.w	r3, r3, #576	@ 0x240
 8002aca:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002ace:	609a      	str	r2, [r3, #8]
                    message.payloadlen = strlen (messageBuffer);
 8002ad0:	f107 0338 	add.w	r3, r7, #56	@ 0x38
 8002ad4:	4618      	mov	r0, r3
 8002ad6:	f7fd fc63 	bl	80003a0 <strlen>
 8002ada:	4602      	mov	r2, r0
 8002adc:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 8002ae0:	f5a3 7310 	sub.w	r3, r3, #576	@ 0x240
 8002ae4:	60da      	str	r2, [r3, #12]
                    MQTTPublish (&mqttClient, topicTextBuffer, &message); // publish a message
 8002ae6:	f107 0208 	add.w	r2, r7, #8
 8002aea:	f107 0318 	add.w	r3, r7, #24
 8002aee:	4619      	mov	r1, r3
 8002af0:	4818      	ldr	r0, [pc, #96]	@ (8002b54 <MqttClientPubTask+0x5d0>)
 8002af2:	f024 fafc 	bl	80270ee <MQTTPublish>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002af6:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 8002afa:	3301      	adds	r3, #1
 8002afc:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
 8002b00:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 8002b04:	2b03      	cmp	r3, #3
 8002b06:	f67f aea5 	bls.w	8002854 <MqttClientPubTask+0x2d0>
                }
            }
        }

        osDelay (pdMS_TO_TICKS (1000));
 8002b0a:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8002b0e:	f00d ff42 	bl	8010996 <osDelay>
        if (mqttClient.isconnected) {
 8002b12:	e562      	b.n	80025da <MqttClientPubTask+0x56>
 8002b14:	2400216c 	.word	0x2400216c
 8002b18:	240020b8 	.word	0x240020b8
 8002b1c:	0802c688 	.word	0x0802c688
 8002b20:	0802c694 	.word	0x0802c694
 8002b24:	0802c6b4 	.word	0x0802c6b4
 8002b28:	0802c6c8 	.word	0x0802c6c8
 8002b2c:	0802c6dc 	.word	0x0802c6dc
 8002b30:	0802c6f0 	.word	0x0802c6f0
 8002b34:	0802c704 	.word	0x0802c704
 8002b38:	0802c720 	.word	0x0802c720
 8002b3c:	0802c73c 	.word	0x0802c73c
 8002b40:	0802c758 	.word	0x0802c758
 8002b44:	0802c774 	.word	0x0802c774
 8002b48:	0802c78c 	.word	0x0802c78c
 8002b4c:	0802c7a4 	.word	0x0802c7a4
 8002b50:	0802c7c0 	.word	0x0802c7c0
 8002b54:	24000670 	.word	0x24000670

08002b58 <MqttConnectBroker>:
    }
}

int MqttConnectBroker () {
 8002b58:	b580      	push	{r7, lr}
 8002b5a:	b09c      	sub	sp, #112	@ 0x70
 8002b5c:	af04      	add	r7, sp, #16
    uint8_t boardNumber = 0;
 8002b5e:	2300      	movs	r3, #0
 8002b60:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
    int ret;

    NewNetwork (&net);
 8002b64:	4839      	ldr	r0, [pc, #228]	@ (8002c4c <MqttConnectBroker+0xf4>)
 8002b66:	f024 fbfb 	bl	8027360 <NewNetwork>
    ret = ConnectNetwork (&net, BROKER_IP, MQTT_PORT);
 8002b6a:	f240 725b 	movw	r2, #1883	@ 0x75b
 8002b6e:	4938      	ldr	r1, [pc, #224]	@ (8002c50 <MqttConnectBroker+0xf8>)
 8002b70:	4836      	ldr	r0, [pc, #216]	@ (8002c4c <MqttConnectBroker+0xf4>)
 8002b72:	f024 fc11 	bl	8027398 <ConnectNetwork>
 8002b76:	65b8      	str	r0, [r7, #88]	@ 0x58
    if (ret != MQTT_SUCCESS) {
 8002b78:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002b7a:	2b00      	cmp	r3, #0
 8002b7c:	d005      	beq.n	8002b8a <MqttConnectBroker+0x32>
        printf ("ConnectNetwork failed.\n");
 8002b7e:	4835      	ldr	r0, [pc, #212]	@ (8002c54 <MqttConnectBroker+0xfc>)
 8002b80:	f026 ff94 	bl	8029aac <puts>
        return -1;
 8002b84:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8002b88:	e05c      	b.n	8002c44 <MqttConnectBroker+0xec>
    }

    MQTTClientInit (&mqttClient, &net, 1000, sndBuffer, sizeof (sndBuffer), rcvBuffer, sizeof (rcvBuffer));
 8002b8a:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8002b8e:	9302      	str	r3, [sp, #8]
 8002b90:	4b31      	ldr	r3, [pc, #196]	@ (8002c58 <MqttConnectBroker+0x100>)
 8002b92:	9301      	str	r3, [sp, #4]
 8002b94:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8002b98:	9300      	str	r3, [sp, #0]
 8002b9a:	4b30      	ldr	r3, [pc, #192]	@ (8002c5c <MqttConnectBroker+0x104>)
 8002b9c:	f44f 727a 	mov.w	r2, #1000	@ 0x3e8
 8002ba0:	492a      	ldr	r1, [pc, #168]	@ (8002c4c <MqttConnectBroker+0xf4>)
 8002ba2:	482f      	ldr	r0, [pc, #188]	@ (8002c60 <MqttConnectBroker+0x108>)
 8002ba4:	f023 fd16 	bl	80265d4 <MQTTClientInit>

    MQTTPacket_connectData data = MQTTPacket_connectData_initializer;
 8002ba8:	4a2e      	ldr	r2, [pc, #184]	@ (8002c64 <MqttConnectBroker+0x10c>)
 8002baa:	463b      	mov	r3, r7
 8002bac:	4611      	mov	r1, r2
 8002bae:	2258      	movs	r2, #88	@ 0x58
 8002bb0:	4618      	mov	r0, r3
 8002bb2:	f027 f99c 	bl	8029eee <memcpy>
    data.willFlag               = 0;
 8002bb6:	2300      	movs	r3, #0
 8002bb8:	76fb      	strb	r3, [r7, #27]
    data.MQTTVersion            = 3;
 8002bba:	2303      	movs	r3, #3
 8002bbc:	723b      	strb	r3, [r7, #8]
    data.clientID.cstring       = "test_user1";
 8002bbe:	4b2a      	ldr	r3, [pc, #168]	@ (8002c68 <MqttConnectBroker+0x110>)
 8002bc0:	60fb      	str	r3, [r7, #12]
    data.username.cstring       = "test_user1";
 8002bc2:	4b29      	ldr	r3, [pc, #164]	@ (8002c68 <MqttConnectBroker+0x110>)
 8002bc4:	643b      	str	r3, [r7, #64]	@ 0x40
    data.password.cstring       = "1234";
 8002bc6:	4b29      	ldr	r3, [pc, #164]	@ (8002c6c <MqttConnectBroker+0x114>)
 8002bc8:	64fb      	str	r3, [r7, #76]	@ 0x4c
    data.keepAliveInterval      = 100;
 8002bca:	2364      	movs	r3, #100	@ 0x64
 8002bcc:	833b      	strh	r3, [r7, #24]
    data.cleansession           = 1;
 8002bce:	2301      	movs	r3, #1
 8002bd0:	76bb      	strb	r3, [r7, #26]

    ret = MQTTConnect (&mqttClient, &data);
 8002bd2:	463b      	mov	r3, r7
 8002bd4:	4619      	mov	r1, r3
 8002bd6:	4822      	ldr	r0, [pc, #136]	@ (8002c60 <MqttConnectBroker+0x108>)
 8002bd8:	f024 f958 	bl	8026e8c <MQTTConnect>
 8002bdc:	65b8      	str	r0, [r7, #88]	@ 0x58
    if (ret != MQTT_SUCCESS) {
 8002bde:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002be0:	2b00      	cmp	r3, #0
 8002be2:	d008      	beq.n	8002bf6 <MqttConnectBroker+0x9e>
        net_disconnect (&net);
 8002be4:	4819      	ldr	r0, [pc, #100]	@ (8002c4c <MqttConnectBroker+0xf4>)
 8002be6:	f024 fc60 	bl	80274aa <net_disconnect>
        printf ("MQTTConnect failed. Code %d\n", ret);
 8002bea:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 8002bec:	4820      	ldr	r0, [pc, #128]	@ (8002c70 <MqttConnectBroker+0x118>)
 8002bee:	f026 fef5 	bl	80299dc <iprintf>
        return ret;
 8002bf2:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002bf4:	e026      	b.n	8002c44 <MqttConnectBroker+0xec>
    }

    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002bf6:	2300      	movs	r3, #0
 8002bf8:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
 8002bfc:	e01a      	b.n	8002c34 <MqttConnectBroker+0xdc>
        ret = MQTTSubscribe (&mqttClient, subscribeTopicNames[boardNumber], QOS0, MqttMessageArrived);
 8002bfe:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 8002c02:	4a1c      	ldr	r2, [pc, #112]	@ (8002c74 <MqttConnectBroker+0x11c>)
 8002c04:	f852 1023 	ldr.w	r1, [r2, r3, lsl #2]
 8002c08:	4b1b      	ldr	r3, [pc, #108]	@ (8002c78 <MqttConnectBroker+0x120>)
 8002c0a:	2200      	movs	r2, #0
 8002c0c:	4814      	ldr	r0, [pc, #80]	@ (8002c60 <MqttConnectBroker+0x108>)
 8002c0e:	f024 fa58 	bl	80270c2 <MQTTSubscribe>
 8002c12:	65b8      	str	r0, [r7, #88]	@ 0x58
        if (ret != MQTT_SUCCESS) {
 8002c14:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002c16:	2b00      	cmp	r3, #0
 8002c18:	d007      	beq.n	8002c2a <MqttConnectBroker+0xd2>
            net_disconnect (&net);
 8002c1a:	480c      	ldr	r0, [pc, #48]	@ (8002c4c <MqttConnectBroker+0xf4>)
 8002c1c:	f024 fc45 	bl	80274aa <net_disconnect>
            printf ("MQTTSubscribe failed.\n");
 8002c20:	4816      	ldr	r0, [pc, #88]	@ (8002c7c <MqttConnectBroker+0x124>)
 8002c22:	f026 ff43 	bl	8029aac <puts>
            return ret;
 8002c26:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002c28:	e00c      	b.n	8002c44 <MqttConnectBroker+0xec>
    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002c2a:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 8002c2e:	3301      	adds	r3, #1
 8002c30:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
 8002c34:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 8002c38:	2b03      	cmp	r3, #3
 8002c3a:	d9e0      	bls.n	8002bfe <MqttConnectBroker+0xa6>
        }
    }
    printf ("MQTT_ConnectBroker O.K.\n");
 8002c3c:	4810      	ldr	r0, [pc, #64]	@ (8002c80 <MqttConnectBroker+0x128>)
 8002c3e:	f026 ff35 	bl	8029aac <puts>

    return MQTT_SUCCESS;
 8002c42:	2300      	movs	r3, #0
}
 8002c44:	4618      	mov	r0, r3
 8002c46:	3760      	adds	r7, #96	@ 0x60
 8002c48:	46bd      	mov	sp, r7
 8002c4a:	bd80      	pop	{r7, pc}
 8002c4c:	24000660 	.word	0x24000660
 8002c50:	0802c7dc 	.word	0x0802c7dc
 8002c54:	0802c7ec 	.word	0x0802c7ec
 8002c58:	24000adc 	.word	0x24000adc
 8002c5c:	240006dc 	.word	0x240006dc
 8002c60:	24000670 	.word	0x24000670
 8002c64:	0802c868 	.word	0x0802c868
 8002c68:	0802c804 	.word	0x0802c804
 8002c6c:	0802c810 	.word	0x0802c810
 8002c70:	0802c818 	.word	0x0802c818
 8002c74:	080309fc 	.word	0x080309fc
 8002c78:	08002c85 	.word	0x08002c85
 8002c7c:	0802c838 	.word	0x0802c838
 8002c80:	0802c850 	.word	0x0802c850

08002c84 <MqttMessageArrived>:

void MqttMessageArrived (MessageData* msg) {
 8002c84:	b580      	push	{r7, lr}
 8002c86:	b096      	sub	sp, #88	@ 0x58
 8002c88:	af00      	add	r7, sp, #0
 8002c8a:	6078      	str	r0, [r7, #4]
    SerialProtocolCommands spCommand = spUnknown;
 8002c8c:	2309      	movs	r3, #9
 8002c8e:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
    BoardNoOverTopic topicForBoard   = unknownBoard;
 8002c92:	2305      	movs	r3, #5
 8002c94:	f887 3056 	strb.w	r3, [r7, #86]	@ 0x56
    uint8_t boardNumber              = 0;
 8002c98:	2300      	movs	r3, #0
 8002c9a:	f887 3055 	strb.w	r3, [r7, #85]	@ 0x55
    MQTTMessage* message             = msg->message;
 8002c9e:	687b      	ldr	r3, [r7, #4]
 8002ca0:	681b      	ldr	r3, [r3, #0]
 8002ca2:	64bb      	str	r3, [r7, #72]	@ 0x48
    char topicName[32]               = { 0 };
 8002ca4:	2300      	movs	r3, #0
 8002ca6:	61bb      	str	r3, [r7, #24]
 8002ca8:	f107 031c 	add.w	r3, r7, #28
 8002cac:	2200      	movs	r2, #0
 8002cae:	601a      	str	r2, [r3, #0]
 8002cb0:	605a      	str	r2, [r3, #4]
 8002cb2:	609a      	str	r2, [r3, #8]
 8002cb4:	60da      	str	r2, [r3, #12]
 8002cb6:	611a      	str	r2, [r3, #16]
 8002cb8:	615a      	str	r2, [r3, #20]
 8002cba:	619a      	str	r2, [r3, #24]
    memcpy (topicName, msg->topicName->lenstring.data, msg->topicName->lenstring.len);
 8002cbc:	687b      	ldr	r3, [r7, #4]
 8002cbe:	685b      	ldr	r3, [r3, #4]
 8002cc0:	6899      	ldr	r1, [r3, #8]
 8002cc2:	687b      	ldr	r3, [r7, #4]
 8002cc4:	685b      	ldr	r3, [r3, #4]
 8002cc6:	685b      	ldr	r3, [r3, #4]
 8002cc8:	461a      	mov	r2, r3
 8002cca:	f107 0318 	add.w	r3, r7, #24
 8002cce:	4618      	mov	r0, r3
 8002cd0:	f027 f90d 	bl	8029eee <memcpy>

    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002cd4:	2300      	movs	r3, #0
 8002cd6:	f887 3055 	strb.w	r3, [r7, #85]	@ 0x55
 8002cda:	e017      	b.n	8002d0c <MqttMessageArrived+0x88>
        if (strcmp (topicName, subscribeTopicNames[boardNumber]) == 0) {
 8002cdc:	f897 3055 	ldrb.w	r3, [r7, #85]	@ 0x55
 8002ce0:	4a90      	ldr	r2, [pc, #576]	@ (8002f24 <MqttMessageArrived+0x2a0>)
 8002ce2:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 8002ce6:	f107 0318 	add.w	r3, r7, #24
 8002cea:	4611      	mov	r1, r2
 8002cec:	4618      	mov	r0, r3
 8002cee:	f7fd faf7 	bl	80002e0 <strcmp>
 8002cf2:	4603      	mov	r3, r0
 8002cf4:	2b00      	cmp	r3, #0
 8002cf6:	d104      	bne.n	8002d02 <MqttMessageArrived+0x7e>
            topicForBoard = (BoardNoOverTopic)(boardNumber);
 8002cf8:	f897 3055 	ldrb.w	r3, [r7, #85]	@ 0x55
 8002cfc:	f887 3056 	strb.w	r3, [r7, #86]	@ 0x56
            break;
 8002d00:	e008      	b.n	8002d14 <MqttMessageArrived+0x90>
    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002d02:	f897 3055 	ldrb.w	r3, [r7, #85]	@ 0x55
 8002d06:	3301      	adds	r3, #1
 8002d08:	f887 3055 	strb.w	r3, [r7, #85]	@ 0x55
 8002d0c:	f897 3055 	ldrb.w	r3, [r7, #85]	@ 0x55
 8002d10:	2b03      	cmp	r3, #3
 8002d12:	d9e3      	bls.n	8002cdc <MqttMessageArrived+0x58>
        }
    }

    cJSON* json             = cJSON_Parse (message->payload);
 8002d14:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 8002d16:	689b      	ldr	r3, [r3, #8]
 8002d18:	4618      	mov	r0, r3
 8002d1a:	f7fe fc1b 	bl	8001554 <cJSON_Parse>
 8002d1e:	6478      	str	r0, [r7, #68]	@ 0x44
    const cJSON* objectItem = NULL;
 8002d20:	2300      	movs	r3, #0
 8002d22:	643b      	str	r3, [r7, #64]	@ 0x40
    InterProcessData data   = { 0 };
 8002d24:	f107 030c 	add.w	r3, r7, #12
 8002d28:	2200      	movs	r2, #0
 8002d2a:	601a      	str	r2, [r3, #0]
 8002d2c:	605a      	str	r2, [r3, #4]
 8002d2e:	609a      	str	r2, [r3, #8]
    for (int topicCmdNumber = 0; topicCmdNumber < MAX_COMMANDS_IN_MQTT_PAYLOAD; topicCmdNumber++) {
 8002d30:	2300      	movs	r3, #0
 8002d32:	653b      	str	r3, [r7, #80]	@ 0x50
 8002d34:	e0e0      	b.n	8002ef8 <MqttMessageArrived+0x274>
        spCommand  = spUnknown;
 8002d36:	2309      	movs	r3, #9
 8002d38:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
        objectItem = cJSON_GetObjectItemCaseSensitive (json, topicCommands[topicCmdNumber]);
 8002d3c:	4a7a      	ldr	r2, [pc, #488]	@ (8002f28 <MqttMessageArrived+0x2a4>)
 8002d3e:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8002d40:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8002d44:	4619      	mov	r1, r3
 8002d46:	6c78      	ldr	r0, [r7, #68]	@ 0x44
 8002d48:	f7fe ff6e 	bl	8001c28 <cJSON_GetObjectItemCaseSensitive>
 8002d4c:	6438      	str	r0, [r7, #64]	@ 0x40
        if (objectItem != NULL) {
 8002d4e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8002d50:	2b00      	cmp	r3, #0
 8002d52:	f000 80ce 	beq.w	8002ef2 <MqttMessageArrived+0x26e>
            switch (topicCmdNumber) {
 8002d56:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8002d58:	2b07      	cmp	r3, #7
 8002d5a:	d875      	bhi.n	8002e48 <MqttMessageArrived+0x1c4>
 8002d5c:	a201      	add	r2, pc, #4	@ (adr r2, 8002d64 <MqttMessageArrived+0xe0>)
 8002d5e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8002d62:	bf00      	nop
 8002d64:	08002d85 	.word	0x08002d85
 8002d68:	08002d8b 	.word	0x08002d8b
 8002d6c:	08002d99 	.word	0x08002d99
 8002d70:	08002e03 	.word	0x08002e03
 8002d74:	08002e13 	.word	0x08002e13
 8002d78:	08002e19 	.word	0x08002e19
 8002d7c:	08002e43 	.word	0x08002e43
 8002d80:	08002e49 	.word	0x08002e49
            case 0: spCommand = spSetFanSpeed;
 8002d84:	2302      	movs	r3, #2
 8002d86:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
            case 1:
                if (spCommand == spUnknown) {
 8002d8a:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 8002d8e:	2b09      	cmp	r3, #9
 8002d90:	d102      	bne.n	8002d98 <MqttMessageArrived+0x114>
                    spCommand = spSetMotorXOn;
 8002d92:	2303      	movs	r3, #3
 8002d94:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
                }
            case 2:
                if (spCommand == spUnknown) {
 8002d98:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 8002d9c:	2b09      	cmp	r3, #9
 8002d9e:	d102      	bne.n	8002da6 <MqttMessageArrived+0x122>
                    spCommand = spSetMotorYOn;
 8002da0:	2304      	movs	r3, #4
 8002da2:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
                }
                if (cJSON_IsArray (objectItem)) {
 8002da6:	6c38      	ldr	r0, [r7, #64]	@ 0x40
 8002da8:	f7fe ff64 	bl	8001c74 <cJSON_IsArray>
 8002dac:	4603      	mov	r3, r0
 8002dae:	2b00      	cmp	r3, #0
 8002db0:	d04c      	beq.n	8002e4c <MqttMessageArrived+0x1c8>
                    data.spCommand = spCommand;
 8002db2:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 8002db6:	733b      	strb	r3, [r7, #12]
                    int arraySize  = cJSON_GetArraySize (objectItem);
 8002db8:	6c38      	ldr	r0, [r7, #64]	@ 0x40
 8002dba:	f7fe fe95 	bl	8001ae8 <cJSON_GetArraySize>
 8002dbe:	63f8      	str	r0, [r7, #60]	@ 0x3c
                    if (arraySize == 2) {
 8002dc0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8002dc2:	2b02      	cmp	r3, #2
 8002dc4:	d142      	bne.n	8002e4c <MqttMessageArrived+0x1c8>
                        for (int i = 0; i < arraySize; i++) {
 8002dc6:	2300      	movs	r3, #0
 8002dc8:	64fb      	str	r3, [r7, #76]	@ 0x4c
 8002dca:	e015      	b.n	8002df8 <MqttMessageArrived+0x174>
                            cJSON* item = cJSON_GetArrayItem (objectItem, i);
 8002dcc:	6cf9      	ldr	r1, [r7, #76]	@ 0x4c
 8002dce:	6c38      	ldr	r0, [r7, #64]	@ 0x40
 8002dd0:	f7fe fece 	bl	8001b70 <cJSON_GetArrayItem>
 8002dd4:	63b8      	str	r0, [r7, #56]	@ 0x38
                            if (cJSON_IsNumber (item)) {
 8002dd6:	6bb8      	ldr	r0, [r7, #56]	@ 0x38
 8002dd8:	f7fe ff35 	bl	8001c46 <cJSON_IsNumber>
 8002ddc:	4603      	mov	r3, r0
 8002dde:	2b00      	cmp	r3, #0
 8002de0:	d007      	beq.n	8002df2 <MqttMessageArrived+0x16e>
                                data.values.integerValues.value[i] = item->valueint;
 8002de2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8002de4:	695a      	ldr	r2, [r3, #20]
 8002de6:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8002de8:	009b      	lsls	r3, r3, #2
 8002dea:	3358      	adds	r3, #88	@ 0x58
 8002dec:	443b      	add	r3, r7
 8002dee:	f843 2c48 	str.w	r2, [r3, #-72]
                        for (int i = 0; i < arraySize; i++) {
 8002df2:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8002df4:	3301      	adds	r3, #1
 8002df6:	64fb      	str	r3, [r7, #76]	@ 0x4c
 8002df8:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
 8002dfa:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8002dfc:	429a      	cmp	r2, r3
 8002dfe:	dbe5      	blt.n	8002dcc <MqttMessageArrived+0x148>
                            }
                        }
                    }
                }
                break;
 8002e00:	e024      	b.n	8002e4c <MqttMessageArrived+0x1c8>
            case 3:
                data.spCommand                     = spSetDiodeOn;
 8002e02:	2307      	movs	r3, #7
 8002e04:	733b      	strb	r3, [r7, #12]
                data.values.integerValues.value[0] = objectItem->valueint;
 8002e06:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8002e08:	695b      	ldr	r3, [r3, #20]
 8002e0a:	613b      	str	r3, [r7, #16]
                data.values.integerValues.value[1] = 0;
 8002e0c:	2300      	movs	r3, #0
 8002e0e:	617b      	str	r3, [r7, #20]
                break;
 8002e10:	e01d      	b.n	8002e4e <MqttMessageArrived+0x1ca>
            case 4: spCommand = spSetmotorXMaxCurrent;
 8002e12:	2305      	movs	r3, #5
 8002e14:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
            case 5:
                if (spCommand == spUnknown) {
 8002e18:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 8002e1c:	2b09      	cmp	r3, #9
 8002e1e:	d102      	bne.n	8002e26 <MqttMessageArrived+0x1a2>
                    spCommand = spSetmotorYMaxCurrent;
 8002e20:	2306      	movs	r3, #6
 8002e22:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
                }
                data.spCommand                   = spCommand;
 8002e26:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 8002e2a:	733b      	strb	r3, [r7, #12]
                data.values.flaotValues.value[0] = objectItem->valuedouble;
 8002e2c:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8002e2e:	ed93 7b06 	vldr	d7, [r3, #24]
 8002e32:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8002e36:	edc7 7a04 	vstr	s15, [r7, #16]
                data.values.flaotValues.value[1] = 0.0;
 8002e3a:	f04f 0300 	mov.w	r3, #0
 8002e3e:	617b      	str	r3, [r7, #20]
                break;
 8002e40:	e005      	b.n	8002e4e <MqttMessageArrived+0x1ca>
            case 6:
            	data.spCommand = spClearPeakMeasurments;
 8002e42:	2308      	movs	r3, #8
 8002e44:	733b      	strb	r3, [r7, #12]
            	break;
 8002e46:	e002      	b.n	8002e4e <MqttMessageArrived+0x1ca>
            case 7:
            	break;
            default: break;
 8002e48:	bf00      	nop
 8002e4a:	e000      	b.n	8002e4e <MqttMessageArrived+0x1ca>
                break;
 8002e4c:	bf00      	nop
            }

            switch (topicForBoard) {
 8002e4e:	f897 3056 	ldrb.w	r3, [r7, #86]	@ 0x56
 8002e52:	2b04      	cmp	r3, #4
 8002e54:	d84c      	bhi.n	8002ef0 <MqttMessageArrived+0x26c>
 8002e56:	a201      	add	r2, pc, #4	@ (adr r2, 8002e5c <MqttMessageArrived+0x1d8>)
 8002e58:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8002e5c:	08002ef1 	.word	0x08002ef1
 8002e60:	08002e71 	.word	0x08002e71
 8002e64:	08002e91 	.word	0x08002e91
 8002e68:	08002eb1 	.word	0x08002eb1
 8002e6c:	08002ed1 	.word	0x08002ed1
            case main_board:
            	break;
            case board_1:
#if 1
                if (uart1TaskData.sendCmdToSlaveQueue != NULL) {
 8002e70:	4b2e      	ldr	r3, [pc, #184]	@ (8002f2c <MqttMessageArrived+0x2a8>)
 8002e72:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8002e74:	2b00      	cmp	r3, #0
 8002e76:	d007      	beq.n	8002e88 <MqttMessageArrived+0x204>
                    osMessageQueuePut (uart1TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8002e78:	4b2c      	ldr	r3, [pc, #176]	@ (8002f2c <MqttMessageArrived+0x2a8>)
 8002e7a:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8002e7c:	f107 010c 	add.w	r1, r7, #12
 8002e80:	2364      	movs	r3, #100	@ 0x64
 8002e82:	2200      	movs	r2, #0
 8002e84:	f00e f868 	bl	8010f58 <osMessageQueuePut>
#else
                if (uart8TaskData.sendCmdToSlaveQueue != NULL) {
                    osMessageQueuePut (uart8TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
                }
#endif
                printf ("Send cmd to board 1\n");
 8002e88:	4829      	ldr	r0, [pc, #164]	@ (8002f30 <MqttMessageArrived+0x2ac>)
 8002e8a:	f026 fe0f 	bl	8029aac <puts>
                break;
 8002e8e:	e030      	b.n	8002ef2 <MqttMessageArrived+0x26e>
            case board_2:
                if (uart3TaskData.sendCmdToSlaveQueue != NULL) {
 8002e90:	4b28      	ldr	r3, [pc, #160]	@ (8002f34 <MqttMessageArrived+0x2b0>)
 8002e92:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8002e94:	2b00      	cmp	r3, #0
 8002e96:	d007      	beq.n	8002ea8 <MqttMessageArrived+0x224>
                    osMessageQueuePut (uart3TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8002e98:	4b26      	ldr	r3, [pc, #152]	@ (8002f34 <MqttMessageArrived+0x2b0>)
 8002e9a:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8002e9c:	f107 010c 	add.w	r1, r7, #12
 8002ea0:	2364      	movs	r3, #100	@ 0x64
 8002ea2:	2200      	movs	r2, #0
 8002ea4:	f00e f858 	bl	8010f58 <osMessageQueuePut>
                }
                printf ("Send cmd to board 2\n");
 8002ea8:	4823      	ldr	r0, [pc, #140]	@ (8002f38 <MqttMessageArrived+0x2b4>)
 8002eaa:	f026 fdff 	bl	8029aac <puts>
                break;
 8002eae:	e020      	b.n	8002ef2 <MqttMessageArrived+0x26e>
            case board_3:
                if (uart6TaskData.sendCmdToSlaveQueue != NULL) {
 8002eb0:	4b22      	ldr	r3, [pc, #136]	@ (8002f3c <MqttMessageArrived+0x2b8>)
 8002eb2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8002eb4:	2b00      	cmp	r3, #0
 8002eb6:	d007      	beq.n	8002ec8 <MqttMessageArrived+0x244>
                    osMessageQueuePut (uart6TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8002eb8:	4b20      	ldr	r3, [pc, #128]	@ (8002f3c <MqttMessageArrived+0x2b8>)
 8002eba:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8002ebc:	f107 010c 	add.w	r1, r7, #12
 8002ec0:	2364      	movs	r3, #100	@ 0x64
 8002ec2:	2200      	movs	r2, #0
 8002ec4:	f00e f848 	bl	8010f58 <osMessageQueuePut>
                }
                printf ("Send cmd to board 3\n");
 8002ec8:	481d      	ldr	r0, [pc, #116]	@ (8002f40 <MqttMessageArrived+0x2bc>)
 8002eca:	f026 fdef 	bl	8029aac <puts>
                break;
 8002ece:	e010      	b.n	8002ef2 <MqttMessageArrived+0x26e>
            case board_4:
                if (uart2TaskData.sendCmdToSlaveQueue != NULL) {
 8002ed0:	4b1c      	ldr	r3, [pc, #112]	@ (8002f44 <MqttMessageArrived+0x2c0>)
 8002ed2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8002ed4:	2b00      	cmp	r3, #0
 8002ed6:	d007      	beq.n	8002ee8 <MqttMessageArrived+0x264>
                    osMessageQueuePut (uart2TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8002ed8:	4b1a      	ldr	r3, [pc, #104]	@ (8002f44 <MqttMessageArrived+0x2c0>)
 8002eda:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8002edc:	f107 010c 	add.w	r1, r7, #12
 8002ee0:	2364      	movs	r3, #100	@ 0x64
 8002ee2:	2200      	movs	r2, #0
 8002ee4:	f00e f838 	bl	8010f58 <osMessageQueuePut>
                }
                printf ("Send cmd to board 4\n");
 8002ee8:	4817      	ldr	r0, [pc, #92]	@ (8002f48 <MqttMessageArrived+0x2c4>)
 8002eea:	f026 fddf 	bl	8029aac <puts>
                break;
 8002eee:	e000      	b.n	8002ef2 <MqttMessageArrived+0x26e>
            default: break;
 8002ef0:	bf00      	nop
    for (int topicCmdNumber = 0; topicCmdNumber < MAX_COMMANDS_IN_MQTT_PAYLOAD; topicCmdNumber++) {
 8002ef2:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8002ef4:	3301      	adds	r3, #1
 8002ef6:	653b      	str	r3, [r7, #80]	@ 0x50
 8002ef8:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8002efa:	2b08      	cmp	r3, #8
 8002efc:	f77f af1b 	ble.w	8002d36 <MqttMessageArrived+0xb2>
            }
        }
    }
    cJSON_Delete (json);
 8002f00:	6c78      	ldr	r0, [r7, #68]	@ 0x44
 8002f02:	f7fd fe43 	bl	8000b8c <cJSON_Delete>
    printf ("MQTT Topic:%s, MSG[%d]:%s\n", topicName, (int)message->payloadlen, (char*)message->payload);
 8002f06:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 8002f08:	68db      	ldr	r3, [r3, #12]
 8002f0a:	461a      	mov	r2, r3
 8002f0c:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 8002f0e:	689b      	ldr	r3, [r3, #8]
 8002f10:	f107 0118 	add.w	r1, r7, #24
 8002f14:	480d      	ldr	r0, [pc, #52]	@ (8002f4c <MqttMessageArrived+0x2c8>)
 8002f16:	f026 fd61 	bl	80299dc <iprintf>
}
 8002f1a:	bf00      	nop
 8002f1c:	3758      	adds	r7, #88	@ 0x58
 8002f1e:	46bd      	mov	sp, r7
 8002f20:	bd80      	pop	{r7, pc}
 8002f22:	bf00      	nop
 8002f24:	080309fc 	.word	0x080309fc
 8002f28:	08030a10 	.word	0x08030a10
 8002f2c:	24001e2c 	.word	0x24001e2c
 8002f30:	0802c8c0 	.word	0x0802c8c0
 8002f34:	24001e64 	.word	0x24001e64
 8002f38:	0802c8d4 	.word	0x0802c8d4
 8002f3c:	24001e9c 	.word	0x24001e9c
 8002f40:	0802c8e8 	.word	0x0802c8e8
 8002f44:	24001ed4 	.word	0x24001ed4
 8002f48:	0802c8fc 	.word	0x0802c8fc
 8002f4c:	0802c910 	.word	0x0802c910

08002f50 <mqtt_cli_init>:

void mqtt_cli_init (void) {
 8002f50:	b580      	push	{r7, lr}
 8002f52:	af00      	add	r7, sp, #0
    mqttClientSubTaskHandle = osThreadNew (MqttClientSubTask, NULL, &mqttClientSubTaskAttr); // subscribe task
 8002f54:	4a08      	ldr	r2, [pc, #32]	@ (8002f78 <mqtt_cli_init+0x28>)
 8002f56:	2100      	movs	r1, #0
 8002f58:	4808      	ldr	r0, [pc, #32]	@ (8002f7c <mqtt_cli_init+0x2c>)
 8002f5a:	f00d fc7e 	bl	801085a <osThreadNew>
 8002f5e:	4603      	mov	r3, r0
 8002f60:	4a07      	ldr	r2, [pc, #28]	@ (8002f80 <mqtt_cli_init+0x30>)
 8002f62:	6013      	str	r3, [r2, #0]
    mqttClientPubTaskHandle = osThreadNew (MqttClientPubTask, NULL, &mqttClientPubTaskAttr); // publish task
 8002f64:	4a07      	ldr	r2, [pc, #28]	@ (8002f84 <mqtt_cli_init+0x34>)
 8002f66:	2100      	movs	r1, #0
 8002f68:	4807      	ldr	r0, [pc, #28]	@ (8002f88 <mqtt_cli_init+0x38>)
 8002f6a:	f00d fc76 	bl	801085a <osThreadNew>
 8002f6e:	4603      	mov	r3, r0
 8002f70:	4a06      	ldr	r2, [pc, #24]	@ (8002f8c <mqtt_cli_init+0x3c>)
 8002f72:	6013      	str	r3, [r2, #0]
}
 8002f74:	bf00      	nop
 8002f76:	bd80      	pop	{r7, pc}
 8002f78:	08030a34 	.word	0x08030a34
 8002f7c:	08002515 	.word	0x08002515
 8002f80:	24000658 	.word	0x24000658
 8002f84:	08030a58 	.word	0x08030a58
 8002f88:	08002585 	.word	0x08002585
 8002f8c:	2400065c 	.word	0x2400065c

08002f90 <WriteDataToBuffer>:
        buff[newBuffPos++] = (uint8_t)((uData >> (i * 8)) & 0xFF);
    }
    *buffPos = newBuffPos;
}

void WriteDataToBuffer (uint8_t* buff, uint16_t* buffPos, void* data, uint8_t dataSize) {
 8002f90:	b480      	push	{r7}
 8002f92:	b089      	sub	sp, #36	@ 0x24
 8002f94:	af00      	add	r7, sp, #0
 8002f96:	60f8      	str	r0, [r7, #12]
 8002f98:	60b9      	str	r1, [r7, #8]
 8002f9a:	607a      	str	r2, [r7, #4]
 8002f9c:	70fb      	strb	r3, [r7, #3]
    uint32_t* uDataPtr = data;
 8002f9e:	687b      	ldr	r3, [r7, #4]
 8002fa0:	61bb      	str	r3, [r7, #24]
    uint32_t uData     = *uDataPtr;
 8002fa2:	69bb      	ldr	r3, [r7, #24]
 8002fa4:	681b      	ldr	r3, [r3, #0]
 8002fa6:	617b      	str	r3, [r7, #20]
    uint8_t i          = 0;
 8002fa8:	2300      	movs	r3, #0
 8002faa:	77fb      	strb	r3, [r7, #31]
    uint8_t newBuffPos = *buffPos;
 8002fac:	68bb      	ldr	r3, [r7, #8]
 8002fae:	881b      	ldrh	r3, [r3, #0]
 8002fb0:	77bb      	strb	r3, [r7, #30]
    for (i = 0; i < dataSize; i++) {
 8002fb2:	2300      	movs	r3, #0
 8002fb4:	77fb      	strb	r3, [r7, #31]
 8002fb6:	e00e      	b.n	8002fd6 <WriteDataToBuffer+0x46>
        buff[newBuffPos++] = (uint8_t)((uData >> (i * 8)) & 0xFF);
 8002fb8:	7ffb      	ldrb	r3, [r7, #31]
 8002fba:	00db      	lsls	r3, r3, #3
 8002fbc:	697a      	ldr	r2, [r7, #20]
 8002fbe:	40da      	lsrs	r2, r3
 8002fc0:	7fbb      	ldrb	r3, [r7, #30]
 8002fc2:	1c59      	adds	r1, r3, #1
 8002fc4:	77b9      	strb	r1, [r7, #30]
 8002fc6:	4619      	mov	r1, r3
 8002fc8:	68fb      	ldr	r3, [r7, #12]
 8002fca:	440b      	add	r3, r1
 8002fcc:	b2d2      	uxtb	r2, r2
 8002fce:	701a      	strb	r2, [r3, #0]
    for (i = 0; i < dataSize; i++) {
 8002fd0:	7ffb      	ldrb	r3, [r7, #31]
 8002fd2:	3301      	adds	r3, #1
 8002fd4:	77fb      	strb	r3, [r7, #31]
 8002fd6:	7ffa      	ldrb	r2, [r7, #31]
 8002fd8:	78fb      	ldrb	r3, [r7, #3]
 8002fda:	429a      	cmp	r2, r3
 8002fdc:	d3ec      	bcc.n	8002fb8 <WriteDataToBuffer+0x28>
    }
    *buffPos = newBuffPos;
 8002fde:	7fbb      	ldrb	r3, [r7, #30]
 8002fe0:	b29a      	uxth	r2, r3
 8002fe2:	68bb      	ldr	r3, [r7, #8]
 8002fe4:	801a      	strh	r2, [r3, #0]
}
 8002fe6:	bf00      	nop
 8002fe8:	3724      	adds	r7, #36	@ 0x24
 8002fea:	46bd      	mov	sp, r7
 8002fec:	f85d 7b04 	ldr.w	r7, [sp], #4
 8002ff0:	4770      	bx	lr

08002ff2 <ReadFloatFromBuffer>:

void ReadFloatFromBuffer(uint8_t* buff, uint16_t* buffPos, float* data)
{
 8002ff2:	b480      	push	{r7}
 8002ff4:	b087      	sub	sp, #28
 8002ff6:	af00      	add	r7, sp, #0
 8002ff8:	60f8      	str	r0, [r7, #12]
 8002ffa:	60b9      	str	r1, [r7, #8]
 8002ffc:	607a      	str	r2, [r7, #4]
	uint32_t* word =  (uint32_t *)data;
 8002ffe:	687b      	ldr	r3, [r7, #4]
 8003000:	617b      	str	r3, [r7, #20]
	*word = CONVERT_BYTES_TO_WORD(&buff[*buffPos]);
 8003002:	68bb      	ldr	r3, [r7, #8]
 8003004:	881b      	ldrh	r3, [r3, #0]
 8003006:	3303      	adds	r3, #3
 8003008:	68fa      	ldr	r2, [r7, #12]
 800300a:	4413      	add	r3, r2
 800300c:	781b      	ldrb	r3, [r3, #0]
 800300e:	061a      	lsls	r2, r3, #24
 8003010:	68bb      	ldr	r3, [r7, #8]
 8003012:	881b      	ldrh	r3, [r3, #0]
 8003014:	3302      	adds	r3, #2
 8003016:	68f9      	ldr	r1, [r7, #12]
 8003018:	440b      	add	r3, r1
 800301a:	781b      	ldrb	r3, [r3, #0]
 800301c:	041b      	lsls	r3, r3, #16
 800301e:	431a      	orrs	r2, r3
 8003020:	68bb      	ldr	r3, [r7, #8]
 8003022:	881b      	ldrh	r3, [r3, #0]
 8003024:	3301      	adds	r3, #1
 8003026:	68f9      	ldr	r1, [r7, #12]
 8003028:	440b      	add	r3, r1
 800302a:	781b      	ldrb	r3, [r3, #0]
 800302c:	021b      	lsls	r3, r3, #8
 800302e:	4313      	orrs	r3, r2
 8003030:	68ba      	ldr	r2, [r7, #8]
 8003032:	8812      	ldrh	r2, [r2, #0]
 8003034:	4611      	mov	r1, r2
 8003036:	68fa      	ldr	r2, [r7, #12]
 8003038:	440a      	add	r2, r1
 800303a:	7812      	ldrb	r2, [r2, #0]
 800303c:	4313      	orrs	r3, r2
 800303e:	461a      	mov	r2, r3
 8003040:	697b      	ldr	r3, [r7, #20]
 8003042:	601a      	str	r2, [r3, #0]
	*buffPos += sizeof(float);
 8003044:	68bb      	ldr	r3, [r7, #8]
 8003046:	881b      	ldrh	r3, [r3, #0]
 8003048:	3304      	adds	r3, #4
 800304a:	b29a      	uxth	r2, r3
 800304c:	68bb      	ldr	r3, [r7, #8]
 800304e:	801a      	strh	r2, [r3, #0]
}
 8003050:	bf00      	nop
 8003052:	371c      	adds	r7, #28
 8003054:	46bd      	mov	sp, r7
 8003056:	f85d 7b04 	ldr.w	r7, [sp], #4
 800305a:	4770      	bx	lr

0800305c <ReadByteFromBufer>:
	*data = CONVERT_BYTES_TO_SHORT_WORD(&buff[*buffPos]);
	*buffPos += sizeof(uint32_t);
}

void ReadByteFromBufer(uint8_t* buff, uint16_t* buffPos, uint8_t* data)
{
 800305c:	b480      	push	{r7}
 800305e:	b085      	sub	sp, #20
 8003060:	af00      	add	r7, sp, #0
 8003062:	60f8      	str	r0, [r7, #12]
 8003064:	60b9      	str	r1, [r7, #8]
 8003066:	607a      	str	r2, [r7, #4]
	*data = CONVERT_BYTES_TO_SHORT_WORD(&buff[*buffPos]);
 8003068:	68bb      	ldr	r3, [r7, #8]
 800306a:	881b      	ldrh	r3, [r3, #0]
 800306c:	3301      	adds	r3, #1
 800306e:	68fa      	ldr	r2, [r7, #12]
 8003070:	4413      	add	r3, r2
 8003072:	781b      	ldrb	r3, [r3, #0]
 8003074:	021b      	lsls	r3, r3, #8
 8003076:	b25a      	sxtb	r2, r3
 8003078:	68bb      	ldr	r3, [r7, #8]
 800307a:	881b      	ldrh	r3, [r3, #0]
 800307c:	4619      	mov	r1, r3
 800307e:	68fb      	ldr	r3, [r7, #12]
 8003080:	440b      	add	r3, r1
 8003082:	781b      	ldrb	r3, [r3, #0]
 8003084:	b25b      	sxtb	r3, r3
 8003086:	4313      	orrs	r3, r2
 8003088:	b25b      	sxtb	r3, r3
 800308a:	b2da      	uxtb	r2, r3
 800308c:	687b      	ldr	r3, [r7, #4]
 800308e:	701a      	strb	r2, [r3, #0]
	*buffPos += sizeof(uint8_t);
 8003090:	68bb      	ldr	r3, [r7, #8]
 8003092:	881b      	ldrh	r3, [r3, #0]
 8003094:	3301      	adds	r3, #1
 8003096:	b29a      	uxth	r2, r3
 8003098:	68bb      	ldr	r3, [r7, #8]
 800309a:	801a      	strh	r2, [r3, #0]
}
 800309c:	bf00      	nop
 800309e:	3714      	adds	r7, #20
 80030a0:	46bd      	mov	sp, r7
 80030a2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80030a6:	4770      	bx	lr

080030a8 <PrepareReqFrame>:

uint16_t PrepareReqFrame (uint8_t* txBuffer, uint16_t frameId, SerialProtocolCommands frameCommand, uint8_t* dataBuffer, uint16_t dataLength) {
 80030a8:	b580      	push	{r7, lr}
 80030aa:	b086      	sub	sp, #24
 80030ac:	af00      	add	r7, sp, #0
 80030ae:	60f8      	str	r0, [r7, #12]
 80030b0:	607b      	str	r3, [r7, #4]
 80030b2:	460b      	mov	r3, r1
 80030b4:	817b      	strh	r3, [r7, #10]
 80030b6:	4613      	mov	r3, r2
 80030b8:	727b      	strb	r3, [r7, #9]
    uint16_t crc         = 0;
 80030ba:	2300      	movs	r3, #0
 80030bc:	82bb      	strh	r3, [r7, #20]
    uint16_t txBufferPos = 0;
 80030be:	2300      	movs	r3, #0
 80030c0:	82fb      	strh	r3, [r7, #22]
    uint16_t frameCmd    = ((uint16_t)frameCommand);
 80030c2:	7a7b      	ldrb	r3, [r7, #9]
 80030c4:	827b      	strh	r3, [r7, #18]

    memset (txBuffer, 0x00, dataLength);
 80030c6:	8c3b      	ldrh	r3, [r7, #32]
 80030c8:	461a      	mov	r2, r3
 80030ca:	2100      	movs	r1, #0
 80030cc:	68f8      	ldr	r0, [r7, #12]
 80030ce:	f026 fe17 	bl	8029d00 <memset>
    txBuffer[txBufferPos++] = FRAME_INDICATOR;
 80030d2:	8afb      	ldrh	r3, [r7, #22]
 80030d4:	1c5a      	adds	r2, r3, #1
 80030d6:	82fa      	strh	r2, [r7, #22]
 80030d8:	461a      	mov	r2, r3
 80030da:	68fb      	ldr	r3, [r7, #12]
 80030dc:	4413      	add	r3, r2
 80030de:	22aa      	movs	r2, #170	@ 0xaa
 80030e0:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameId);
 80030e2:	8afb      	ldrh	r3, [r7, #22]
 80030e4:	1c5a      	adds	r2, r3, #1
 80030e6:	82fa      	strh	r2, [r7, #22]
 80030e8:	461a      	mov	r2, r3
 80030ea:	68fb      	ldr	r3, [r7, #12]
 80030ec:	4413      	add	r3, r2
 80030ee:	897a      	ldrh	r2, [r7, #10]
 80030f0:	b2d2      	uxtb	r2, r2
 80030f2:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameId);
 80030f4:	897b      	ldrh	r3, [r7, #10]
 80030f6:	0a1b      	lsrs	r3, r3, #8
 80030f8:	b29a      	uxth	r2, r3
 80030fa:	8afb      	ldrh	r3, [r7, #22]
 80030fc:	1c59      	adds	r1, r3, #1
 80030fe:	82f9      	strh	r1, [r7, #22]
 8003100:	4619      	mov	r1, r3
 8003102:	68fb      	ldr	r3, [r7, #12]
 8003104:	440b      	add	r3, r1
 8003106:	b2d2      	uxtb	r2, r2
 8003108:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameCmd);
 800310a:	8afb      	ldrh	r3, [r7, #22]
 800310c:	1c5a      	adds	r2, r3, #1
 800310e:	82fa      	strh	r2, [r7, #22]
 8003110:	461a      	mov	r2, r3
 8003112:	68fb      	ldr	r3, [r7, #12]
 8003114:	4413      	add	r3, r2
 8003116:	8a7a      	ldrh	r2, [r7, #18]
 8003118:	b2d2      	uxtb	r2, r2
 800311a:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameCmd);
 800311c:	8a7b      	ldrh	r3, [r7, #18]
 800311e:	0a1b      	lsrs	r3, r3, #8
 8003120:	b29a      	uxth	r2, r3
 8003122:	8afb      	ldrh	r3, [r7, #22]
 8003124:	1c59      	adds	r1, r3, #1
 8003126:	82f9      	strh	r1, [r7, #22]
 8003128:	4619      	mov	r1, r3
 800312a:	68fb      	ldr	r3, [r7, #12]
 800312c:	440b      	add	r3, r1
 800312e:	b2d2      	uxtb	r2, r2
 8003130:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (dataLength);
 8003132:	8afb      	ldrh	r3, [r7, #22]
 8003134:	1c5a      	adds	r2, r3, #1
 8003136:	82fa      	strh	r2, [r7, #22]
 8003138:	461a      	mov	r2, r3
 800313a:	68fb      	ldr	r3, [r7, #12]
 800313c:	4413      	add	r3, r2
 800313e:	8c3a      	ldrh	r2, [r7, #32]
 8003140:	b2d2      	uxtb	r2, r2
 8003142:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (dataLength);
 8003144:	8c3b      	ldrh	r3, [r7, #32]
 8003146:	0a1b      	lsrs	r3, r3, #8
 8003148:	b29a      	uxth	r2, r3
 800314a:	8afb      	ldrh	r3, [r7, #22]
 800314c:	1c59      	adds	r1, r3, #1
 800314e:	82f9      	strh	r1, [r7, #22]
 8003150:	4619      	mov	r1, r3
 8003152:	68fb      	ldr	r3, [r7, #12]
 8003154:	440b      	add	r3, r1
 8003156:	b2d2      	uxtb	r2, r2
 8003158:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = 0x00;
 800315a:	8afb      	ldrh	r3, [r7, #22]
 800315c:	1c5a      	adds	r2, r3, #1
 800315e:	82fa      	strh	r2, [r7, #22]
 8003160:	461a      	mov	r2, r3
 8003162:	68fb      	ldr	r3, [r7, #12]
 8003164:	4413      	add	r3, r2
 8003166:	2200      	movs	r2, #0
 8003168:	701a      	strb	r2, [r3, #0]
    if (dataLength > 0) {
 800316a:	8c3b      	ldrh	r3, [r7, #32]
 800316c:	2b00      	cmp	r3, #0
 800316e:	d00b      	beq.n	8003188 <PrepareReqFrame+0xe0>
        memcpy (&txBuffer[txBufferPos], dataBuffer, dataLength);
 8003170:	8afb      	ldrh	r3, [r7, #22]
 8003172:	68fa      	ldr	r2, [r7, #12]
 8003174:	4413      	add	r3, r2
 8003176:	8c3a      	ldrh	r2, [r7, #32]
 8003178:	6879      	ldr	r1, [r7, #4]
 800317a:	4618      	mov	r0, r3
 800317c:	f026 feb7 	bl	8029eee <memcpy>
        txBufferPos += dataLength;
 8003180:	8afa      	ldrh	r2, [r7, #22]
 8003182:	8c3b      	ldrh	r3, [r7, #32]
 8003184:	4413      	add	r3, r2
 8003186:	82fb      	strh	r3, [r7, #22]
    }
    crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)txBuffer, txBufferPos);
 8003188:	8afb      	ldrh	r3, [r7, #22]
 800318a:	461a      	mov	r2, r3
 800318c:	68f9      	ldr	r1, [r7, #12]
 800318e:	480f      	ldr	r0, [pc, #60]	@ (80031cc <PrepareReqFrame+0x124>)
 8003190:	f002 f964 	bl	800545c <HAL_CRC_Calculate>
 8003194:	4603      	mov	r3, r0
 8003196:	82bb      	strh	r3, [r7, #20]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (crc);
 8003198:	8afb      	ldrh	r3, [r7, #22]
 800319a:	1c5a      	adds	r2, r3, #1
 800319c:	82fa      	strh	r2, [r7, #22]
 800319e:	461a      	mov	r2, r3
 80031a0:	68fb      	ldr	r3, [r7, #12]
 80031a2:	4413      	add	r3, r2
 80031a4:	8aba      	ldrh	r2, [r7, #20]
 80031a6:	b2d2      	uxtb	r2, r2
 80031a8:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (crc);
 80031aa:	8abb      	ldrh	r3, [r7, #20]
 80031ac:	0a1b      	lsrs	r3, r3, #8
 80031ae:	b29a      	uxth	r2, r3
 80031b0:	8afb      	ldrh	r3, [r7, #22]
 80031b2:	1c59      	adds	r1, r3, #1
 80031b4:	82f9      	strh	r1, [r7, #22]
 80031b6:	4619      	mov	r1, r3
 80031b8:	68fb      	ldr	r3, [r7, #12]
 80031ba:	440b      	add	r3, r1
 80031bc:	b2d2      	uxtb	r2, r2
 80031be:	701a      	strb	r2, [r3, #0]

    return txBufferPos;
 80031c0:	8afb      	ldrh	r3, [r7, #22]
}
 80031c2:	4618      	mov	r0, r3
 80031c4:	3718      	adds	r7, #24
 80031c6:	46bd      	mov	sp, r7
 80031c8:	bd80      	pop	{r7, pc}
 80031ca:	bf00      	nop
 80031cc:	24000248 	.word	0x24000248

080031d0 <PrepareRespFrame>:

uint16_t PrepareRespFrame (uint8_t* txBuffer, uint16_t frameId, SerialProtocolCommands frameCommand, SerialProtocolRespStatus respStatus, uint8_t* dataBuffer, uint16_t dataLength) {
 80031d0:	b580      	push	{r7, lr}
 80031d2:	b084      	sub	sp, #16
 80031d4:	af00      	add	r7, sp, #0
 80031d6:	6078      	str	r0, [r7, #4]
 80031d8:	4608      	mov	r0, r1
 80031da:	4611      	mov	r1, r2
 80031dc:	461a      	mov	r2, r3
 80031de:	4603      	mov	r3, r0
 80031e0:	807b      	strh	r3, [r7, #2]
 80031e2:	460b      	mov	r3, r1
 80031e4:	707b      	strb	r3, [r7, #1]
 80031e6:	4613      	mov	r3, r2
 80031e8:	703b      	strb	r3, [r7, #0]
    uint16_t crc         = 0;
 80031ea:	2300      	movs	r3, #0
 80031ec:	81bb      	strh	r3, [r7, #12]
    uint16_t txBufferPos = 0;
 80031ee:	2300      	movs	r3, #0
 80031f0:	81fb      	strh	r3, [r7, #14]
    uint16_t frameCmd = ((uint16_t)frameCommand) | 0x8000; // MSB set means response
 80031f2:	787b      	ldrb	r3, [r7, #1]
 80031f4:	b21a      	sxth	r2, r3
 80031f6:	4b43      	ldr	r3, [pc, #268]	@ (8003304 <PrepareRespFrame+0x134>)
 80031f8:	4313      	orrs	r3, r2
 80031fa:	b21b      	sxth	r3, r3
 80031fc:	817b      	strh	r3, [r7, #10]

    memset (txBuffer, 0x00, dataLength);
 80031fe:	8bbb      	ldrh	r3, [r7, #28]
 8003200:	461a      	mov	r2, r3
 8003202:	2100      	movs	r1, #0
 8003204:	6878      	ldr	r0, [r7, #4]
 8003206:	f026 fd7b 	bl	8029d00 <memset>
    txBuffer[txBufferPos++] = FRAME_INDICATOR;
 800320a:	89fb      	ldrh	r3, [r7, #14]
 800320c:	1c5a      	adds	r2, r3, #1
 800320e:	81fa      	strh	r2, [r7, #14]
 8003210:	461a      	mov	r2, r3
 8003212:	687b      	ldr	r3, [r7, #4]
 8003214:	4413      	add	r3, r2
 8003216:	22aa      	movs	r2, #170	@ 0xaa
 8003218:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameId);
 800321a:	89fb      	ldrh	r3, [r7, #14]
 800321c:	1c5a      	adds	r2, r3, #1
 800321e:	81fa      	strh	r2, [r7, #14]
 8003220:	461a      	mov	r2, r3
 8003222:	687b      	ldr	r3, [r7, #4]
 8003224:	4413      	add	r3, r2
 8003226:	887a      	ldrh	r2, [r7, #2]
 8003228:	b2d2      	uxtb	r2, r2
 800322a:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameId);
 800322c:	887b      	ldrh	r3, [r7, #2]
 800322e:	0a1b      	lsrs	r3, r3, #8
 8003230:	b29a      	uxth	r2, r3
 8003232:	89fb      	ldrh	r3, [r7, #14]
 8003234:	1c59      	adds	r1, r3, #1
 8003236:	81f9      	strh	r1, [r7, #14]
 8003238:	4619      	mov	r1, r3
 800323a:	687b      	ldr	r3, [r7, #4]
 800323c:	440b      	add	r3, r1
 800323e:	b2d2      	uxtb	r2, r2
 8003240:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameCmd);
 8003242:	89fb      	ldrh	r3, [r7, #14]
 8003244:	1c5a      	adds	r2, r3, #1
 8003246:	81fa      	strh	r2, [r7, #14]
 8003248:	461a      	mov	r2, r3
 800324a:	687b      	ldr	r3, [r7, #4]
 800324c:	4413      	add	r3, r2
 800324e:	897a      	ldrh	r2, [r7, #10]
 8003250:	b2d2      	uxtb	r2, r2
 8003252:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameCmd);
 8003254:	897b      	ldrh	r3, [r7, #10]
 8003256:	0a1b      	lsrs	r3, r3, #8
 8003258:	b29a      	uxth	r2, r3
 800325a:	89fb      	ldrh	r3, [r7, #14]
 800325c:	1c59      	adds	r1, r3, #1
 800325e:	81f9      	strh	r1, [r7, #14]
 8003260:	4619      	mov	r1, r3
 8003262:	687b      	ldr	r3, [r7, #4]
 8003264:	440b      	add	r3, r1
 8003266:	b2d2      	uxtb	r2, r2
 8003268:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (dataLength);
 800326a:	89fb      	ldrh	r3, [r7, #14]
 800326c:	1c5a      	adds	r2, r3, #1
 800326e:	81fa      	strh	r2, [r7, #14]
 8003270:	461a      	mov	r2, r3
 8003272:	687b      	ldr	r3, [r7, #4]
 8003274:	4413      	add	r3, r2
 8003276:	8bba      	ldrh	r2, [r7, #28]
 8003278:	b2d2      	uxtb	r2, r2
 800327a:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (dataLength);
 800327c:	8bbb      	ldrh	r3, [r7, #28]
 800327e:	0a1b      	lsrs	r3, r3, #8
 8003280:	b29a      	uxth	r2, r3
 8003282:	89fb      	ldrh	r3, [r7, #14]
 8003284:	1c59      	adds	r1, r3, #1
 8003286:	81f9      	strh	r1, [r7, #14]
 8003288:	4619      	mov	r1, r3
 800328a:	687b      	ldr	r3, [r7, #4]
 800328c:	440b      	add	r3, r1
 800328e:	b2d2      	uxtb	r2, r2
 8003290:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = (uint8_t)respStatus;
 8003292:	89fb      	ldrh	r3, [r7, #14]
 8003294:	1c5a      	adds	r2, r3, #1
 8003296:	81fa      	strh	r2, [r7, #14]
 8003298:	461a      	mov	r2, r3
 800329a:	687b      	ldr	r3, [r7, #4]
 800329c:	4413      	add	r3, r2
 800329e:	783a      	ldrb	r2, [r7, #0]
 80032a0:	701a      	strb	r2, [r3, #0]
    if (dataLength > 0) {
 80032a2:	8bbb      	ldrh	r3, [r7, #28]
 80032a4:	2b00      	cmp	r3, #0
 80032a6:	d00b      	beq.n	80032c0 <PrepareRespFrame+0xf0>
        memcpy (&txBuffer[txBufferPos], dataBuffer, dataLength);
 80032a8:	89fb      	ldrh	r3, [r7, #14]
 80032aa:	687a      	ldr	r2, [r7, #4]
 80032ac:	4413      	add	r3, r2
 80032ae:	8bba      	ldrh	r2, [r7, #28]
 80032b0:	69b9      	ldr	r1, [r7, #24]
 80032b2:	4618      	mov	r0, r3
 80032b4:	f026 fe1b 	bl	8029eee <memcpy>
        txBufferPos += dataLength;
 80032b8:	89fa      	ldrh	r2, [r7, #14]
 80032ba:	8bbb      	ldrh	r3, [r7, #28]
 80032bc:	4413      	add	r3, r2
 80032be:	81fb      	strh	r3, [r7, #14]
    }
    crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)txBuffer, txBufferPos);
 80032c0:	89fb      	ldrh	r3, [r7, #14]
 80032c2:	461a      	mov	r2, r3
 80032c4:	6879      	ldr	r1, [r7, #4]
 80032c6:	4810      	ldr	r0, [pc, #64]	@ (8003308 <PrepareRespFrame+0x138>)
 80032c8:	f002 f8c8 	bl	800545c <HAL_CRC_Calculate>
 80032cc:	4603      	mov	r3, r0
 80032ce:	81bb      	strh	r3, [r7, #12]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (crc);
 80032d0:	89fb      	ldrh	r3, [r7, #14]
 80032d2:	1c5a      	adds	r2, r3, #1
 80032d4:	81fa      	strh	r2, [r7, #14]
 80032d6:	461a      	mov	r2, r3
 80032d8:	687b      	ldr	r3, [r7, #4]
 80032da:	4413      	add	r3, r2
 80032dc:	89ba      	ldrh	r2, [r7, #12]
 80032de:	b2d2      	uxtb	r2, r2
 80032e0:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (crc);
 80032e2:	89bb      	ldrh	r3, [r7, #12]
 80032e4:	0a1b      	lsrs	r3, r3, #8
 80032e6:	b29a      	uxth	r2, r3
 80032e8:	89fb      	ldrh	r3, [r7, #14]
 80032ea:	1c59      	adds	r1, r3, #1
 80032ec:	81f9      	strh	r1, [r7, #14]
 80032ee:	4619      	mov	r1, r3
 80032f0:	687b      	ldr	r3, [r7, #4]
 80032f2:	440b      	add	r3, r1
 80032f4:	b2d2      	uxtb	r2, r2
 80032f6:	701a      	strb	r2, [r3, #0]

    return txBufferPos;
 80032f8:	89fb      	ldrh	r3, [r7, #14]
}
 80032fa:	4618      	mov	r0, r3
 80032fc:	3710      	adds	r7, #16
 80032fe:	46bd      	mov	sp, r7
 8003300:	bd80      	pop	{r7, pc}
 8003302:	bf00      	nop
 8003304:	ffff8000 	.word	0xffff8000
 8003308:	24000248 	.word	0x24000248

0800330c <HAL_MspInit>:
/* USER CODE END 0 */
/**
  * Initializes the Global MSP.
  */
void HAL_MspInit(void)
{
 800330c:	b580      	push	{r7, lr}
 800330e:	b082      	sub	sp, #8
 8003310:	af00      	add	r7, sp, #0

  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_SYSCFG_CLK_ENABLE();
 8003312:	4b10      	ldr	r3, [pc, #64]	@ (8003354 <HAL_MspInit+0x48>)
 8003314:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8003318:	4a0e      	ldr	r2, [pc, #56]	@ (8003354 <HAL_MspInit+0x48>)
 800331a:	f043 0302 	orr.w	r3, r3, #2
 800331e:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 8003322:	4b0c      	ldr	r3, [pc, #48]	@ (8003354 <HAL_MspInit+0x48>)
 8003324:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8003328:	f003 0302 	and.w	r3, r3, #2
 800332c:	607b      	str	r3, [r7, #4]
 800332e:	687b      	ldr	r3, [r7, #4]

  /* System interrupt init*/
  /* PendSV_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
 8003330:	2200      	movs	r2, #0
 8003332:	210f      	movs	r1, #15
 8003334:	f06f 0001 	mvn.w	r0, #1
 8003338:	f001 ff8c 	bl	8005254 <HAL_NVIC_SetPriority>

  /* Peripheral interrupt init */
  /* RCC_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(RCC_IRQn, 5, 0);
 800333c:	2200      	movs	r2, #0
 800333e:	2105      	movs	r1, #5
 8003340:	2005      	movs	r0, #5
 8003342:	f001 ff87 	bl	8005254 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(RCC_IRQn);
 8003346:	2005      	movs	r0, #5
 8003348:	f001 ff9e 	bl	8005288 <HAL_NVIC_EnableIRQ>

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 800334c:	bf00      	nop
 800334e:	3708      	adds	r7, #8
 8003350:	46bd      	mov	sp, r7
 8003352:	bd80      	pop	{r7, pc}
 8003354:	58024400 	.word	0x58024400

08003358 <HAL_CRC_MspInit>:
* This function configures the hardware resources used in this example
* @param hcrc: CRC handle pointer
* @retval None
*/
void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
{
 8003358:	b480      	push	{r7}
 800335a:	b085      	sub	sp, #20
 800335c:	af00      	add	r7, sp, #0
 800335e:	6078      	str	r0, [r7, #4]
  if(hcrc->Instance==CRC)
 8003360:	687b      	ldr	r3, [r7, #4]
 8003362:	681b      	ldr	r3, [r3, #0]
 8003364:	4a0b      	ldr	r2, [pc, #44]	@ (8003394 <HAL_CRC_MspInit+0x3c>)
 8003366:	4293      	cmp	r3, r2
 8003368:	d10e      	bne.n	8003388 <HAL_CRC_MspInit+0x30>
  {
  /* USER CODE BEGIN CRC_MspInit 0 */

  /* USER CODE END CRC_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_CRC_CLK_ENABLE();
 800336a:	4b0b      	ldr	r3, [pc, #44]	@ (8003398 <HAL_CRC_MspInit+0x40>)
 800336c:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003370:	4a09      	ldr	r2, [pc, #36]	@ (8003398 <HAL_CRC_MspInit+0x40>)
 8003372:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 8003376:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 800337a:	4b07      	ldr	r3, [pc, #28]	@ (8003398 <HAL_CRC_MspInit+0x40>)
 800337c:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003380:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 8003384:	60fb      	str	r3, [r7, #12]
 8003386:	68fb      	ldr	r3, [r7, #12]
  /* USER CODE BEGIN CRC_MspInit 1 */

  /* USER CODE END CRC_MspInit 1 */
  }

}
 8003388:	bf00      	nop
 800338a:	3714      	adds	r7, #20
 800338c:	46bd      	mov	sp, r7
 800338e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003392:	4770      	bx	lr
 8003394:	58024c00 	.word	0x58024c00
 8003398:	58024400 	.word	0x58024400

0800339c <HAL_RNG_MspInit>:
* This function configures the hardware resources used in this example
* @param hrng: RNG handle pointer
* @retval None
*/
void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
{
 800339c:	b580      	push	{r7, lr}
 800339e:	b0b4      	sub	sp, #208	@ 0xd0
 80033a0:	af00      	add	r7, sp, #0
 80033a2:	6078      	str	r0, [r7, #4]
  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 80033a4:	f107 0310 	add.w	r3, r7, #16
 80033a8:	22c0      	movs	r2, #192	@ 0xc0
 80033aa:	2100      	movs	r1, #0
 80033ac:	4618      	mov	r0, r3
 80033ae:	f026 fca7 	bl	8029d00 <memset>
  if(hrng->Instance==RNG)
 80033b2:	687b      	ldr	r3, [r7, #4]
 80033b4:	681b      	ldr	r3, [r3, #0]
 80033b6:	4a14      	ldr	r2, [pc, #80]	@ (8003408 <HAL_RNG_MspInit+0x6c>)
 80033b8:	4293      	cmp	r3, r2
 80033ba:	d121      	bne.n	8003400 <HAL_RNG_MspInit+0x64>

  /* USER CODE END RNG_MspInit 0 */

  /** Initializes the peripherals clock
  */
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
 80033bc:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 80033c0:	f04f 0300 	mov.w	r3, #0
 80033c4:	e9c7 2304 	strd	r2, r3, [r7, #16]
    PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
 80033c8:	2300      	movs	r3, #0
 80033ca:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 80033ce:	f107 0310 	add.w	r3, r7, #16
 80033d2:	4618      	mov	r0, r3
 80033d4:	f007 fb92 	bl	800aafc <HAL_RCCEx_PeriphCLKConfig>
 80033d8:	4603      	mov	r3, r0
 80033da:	2b00      	cmp	r3, #0
 80033dc:	d001      	beq.n	80033e2 <HAL_RNG_MspInit+0x46>
    {
      Error_Handler();
 80033de:	f7ff f893 	bl	8002508 <Error_Handler>
    }

    /* Peripheral clock enable */
    __HAL_RCC_RNG_CLK_ENABLE();
 80033e2:	4b0a      	ldr	r3, [pc, #40]	@ (800340c <HAL_RNG_MspInit+0x70>)
 80033e4:	f8d3 30dc 	ldr.w	r3, [r3, #220]	@ 0xdc
 80033e8:	4a08      	ldr	r2, [pc, #32]	@ (800340c <HAL_RNG_MspInit+0x70>)
 80033ea:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 80033ee:	f8c2 30dc 	str.w	r3, [r2, #220]	@ 0xdc
 80033f2:	4b06      	ldr	r3, [pc, #24]	@ (800340c <HAL_RNG_MspInit+0x70>)
 80033f4:	f8d3 30dc 	ldr.w	r3, [r3, #220]	@ 0xdc
 80033f8:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 80033fc:	60fb      	str	r3, [r7, #12]
 80033fe:	68fb      	ldr	r3, [r7, #12]
  /* USER CODE BEGIN RNG_MspInit 1 */

  /* USER CODE END RNG_MspInit 1 */
  }

}
 8003400:	bf00      	nop
 8003402:	37d0      	adds	r7, #208	@ 0xd0
 8003404:	46bd      	mov	sp, r7
 8003406:	bd80      	pop	{r7, pc}
 8003408:	48021800 	.word	0x48021800
 800340c:	58024400 	.word	0x58024400

08003410 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 8003410:	b580      	push	{r7, lr}
 8003412:	b0c2      	sub	sp, #264	@ 0x108
 8003414:	af00      	add	r7, sp, #0
 8003416:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 800341a:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 800341e:	6018      	str	r0, [r3, #0]
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8003420:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 8003424:	2200      	movs	r2, #0
 8003426:	601a      	str	r2, [r3, #0]
 8003428:	605a      	str	r2, [r3, #4]
 800342a:	609a      	str	r2, [r3, #8]
 800342c:	60da      	str	r2, [r3, #12]
 800342e:	611a      	str	r2, [r3, #16]
  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 8003430:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003434:	22c0      	movs	r2, #192	@ 0xc0
 8003436:	2100      	movs	r1, #0
 8003438:	4618      	mov	r0, r3
 800343a:	f026 fc61 	bl	8029d00 <memset>
  if(huart->Instance==UART8)
 800343e:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003442:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003446:	681b      	ldr	r3, [r3, #0]
 8003448:	681b      	ldr	r3, [r3, #0]
 800344a:	4ab8      	ldr	r2, [pc, #736]	@ (800372c <HAL_UART_MspInit+0x31c>)
 800344c:	4293      	cmp	r3, r2
 800344e:	f040 80bc 	bne.w	80035ca <HAL_UART_MspInit+0x1ba>

  /* USER CODE END UART8_MspInit 0 */

  /** Initializes the peripherals clock
  */
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART8;
 8003452:	f04f 0202 	mov.w	r2, #2
 8003456:	f04f 0300 	mov.w	r3, #0
 800345a:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
 800345e:	2300      	movs	r3, #0
 8003460:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 8003464:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003468:	4618      	mov	r0, r3
 800346a:	f007 fb47 	bl	800aafc <HAL_RCCEx_PeriphCLKConfig>
 800346e:	4603      	mov	r3, r0
 8003470:	2b00      	cmp	r3, #0
 8003472:	d001      	beq.n	8003478 <HAL_UART_MspInit+0x68>
    {
      Error_Handler();
 8003474:	f7ff f848 	bl	8002508 <Error_Handler>
    }

    /* Peripheral clock enable */
    __HAL_RCC_UART8_CLK_ENABLE();
 8003478:	4bad      	ldr	r3, [pc, #692]	@ (8003730 <HAL_UART_MspInit+0x320>)
 800347a:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 800347e:	4aac      	ldr	r2, [pc, #688]	@ (8003730 <HAL_UART_MspInit+0x320>)
 8003480:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
 8003484:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 8003488:	4ba9      	ldr	r3, [pc, #676]	@ (8003730 <HAL_UART_MspInit+0x320>)
 800348a:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 800348e:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 8003492:	62fb      	str	r3, [r7, #44]	@ 0x2c
 8003494:	6afb      	ldr	r3, [r7, #44]	@ 0x2c

    __HAL_RCC_GPIOE_CLK_ENABLE();
 8003496:	4ba6      	ldr	r3, [pc, #664]	@ (8003730 <HAL_UART_MspInit+0x320>)
 8003498:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800349c:	4aa4      	ldr	r2, [pc, #656]	@ (8003730 <HAL_UART_MspInit+0x320>)
 800349e:	f043 0310 	orr.w	r3, r3, #16
 80034a2:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80034a6:	4ba2      	ldr	r3, [pc, #648]	@ (8003730 <HAL_UART_MspInit+0x320>)
 80034a8:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80034ac:	f003 0310 	and.w	r3, r3, #16
 80034b0:	62bb      	str	r3, [r7, #40]	@ 0x28
 80034b2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
    /**UART8 GPIO Configuration
    PE0     ------> UART8_RX
    PE1     ------> UART8_TX
    */
    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
 80034b4:	2303      	movs	r3, #3
 80034b6:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 80034ba:	2302      	movs	r3, #2
 80034bc:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 80034c0:	2300      	movs	r3, #0
 80034c2:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80034c6:	2300      	movs	r3, #0
 80034c8:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
 80034cc:	2308      	movs	r3, #8
 80034ce:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 80034d2:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 80034d6:	4619      	mov	r1, r3
 80034d8:	4896      	ldr	r0, [pc, #600]	@ (8003734 <HAL_UART_MspInit+0x324>)
 80034da:	f006 f8e3 	bl	80096a4 <HAL_GPIO_Init>

    /* UART8 DMA Init */
    /* UART8_RX Init */
    hdma_uart8_rx.Instance = DMA2_Stream7;
 80034de:	4b96      	ldr	r3, [pc, #600]	@ (8003738 <HAL_UART_MspInit+0x328>)
 80034e0:	4a96      	ldr	r2, [pc, #600]	@ (800373c <HAL_UART_MspInit+0x32c>)
 80034e2:	601a      	str	r2, [r3, #0]
    hdma_uart8_rx.Init.Request = DMA_REQUEST_UART8_RX;
 80034e4:	4b94      	ldr	r3, [pc, #592]	@ (8003738 <HAL_UART_MspInit+0x328>)
 80034e6:	2251      	movs	r2, #81	@ 0x51
 80034e8:	605a      	str	r2, [r3, #4]
    hdma_uart8_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
 80034ea:	4b93      	ldr	r3, [pc, #588]	@ (8003738 <HAL_UART_MspInit+0x328>)
 80034ec:	2200      	movs	r2, #0
 80034ee:	609a      	str	r2, [r3, #8]
    hdma_uart8_rx.Init.PeriphInc = DMA_PINC_DISABLE;
 80034f0:	4b91      	ldr	r3, [pc, #580]	@ (8003738 <HAL_UART_MspInit+0x328>)
 80034f2:	2200      	movs	r2, #0
 80034f4:	60da      	str	r2, [r3, #12]
    hdma_uart8_rx.Init.MemInc = DMA_MINC_ENABLE;
 80034f6:	4b90      	ldr	r3, [pc, #576]	@ (8003738 <HAL_UART_MspInit+0x328>)
 80034f8:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 80034fc:	611a      	str	r2, [r3, #16]
    hdma_uart8_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 80034fe:	4b8e      	ldr	r3, [pc, #568]	@ (8003738 <HAL_UART_MspInit+0x328>)
 8003500:	2200      	movs	r2, #0
 8003502:	615a      	str	r2, [r3, #20]
    hdma_uart8_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8003504:	4b8c      	ldr	r3, [pc, #560]	@ (8003738 <HAL_UART_MspInit+0x328>)
 8003506:	2200      	movs	r2, #0
 8003508:	619a      	str	r2, [r3, #24]
    hdma_uart8_rx.Init.Mode = DMA_NORMAL;
 800350a:	4b8b      	ldr	r3, [pc, #556]	@ (8003738 <HAL_UART_MspInit+0x328>)
 800350c:	2200      	movs	r2, #0
 800350e:	61da      	str	r2, [r3, #28]
    hdma_uart8_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
 8003510:	4b89      	ldr	r3, [pc, #548]	@ (8003738 <HAL_UART_MspInit+0x328>)
 8003512:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 8003516:	621a      	str	r2, [r3, #32]
    hdma_uart8_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
 8003518:	4b87      	ldr	r3, [pc, #540]	@ (8003738 <HAL_UART_MspInit+0x328>)
 800351a:	2200      	movs	r2, #0
 800351c:	625a      	str	r2, [r3, #36]	@ 0x24
    if (HAL_DMA_Init(&hdma_uart8_rx) != HAL_OK)
 800351e:	4886      	ldr	r0, [pc, #536]	@ (8003738 <HAL_UART_MspInit+0x328>)
 8003520:	f002 f93e 	bl	80057a0 <HAL_DMA_Init>
 8003524:	4603      	mov	r3, r0
 8003526:	2b00      	cmp	r3, #0
 8003528:	d001      	beq.n	800352e <HAL_UART_MspInit+0x11e>
    {
      Error_Handler();
 800352a:	f7fe ffed 	bl	8002508 <Error_Handler>
    }

    __HAL_LINKDMA(huart,hdmarx,hdma_uart8_rx);
 800352e:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003532:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003536:	681b      	ldr	r3, [r3, #0]
 8003538:	4a7f      	ldr	r2, [pc, #508]	@ (8003738 <HAL_UART_MspInit+0x328>)
 800353a:	f8c3 2080 	str.w	r2, [r3, #128]	@ 0x80
 800353e:	4a7e      	ldr	r2, [pc, #504]	@ (8003738 <HAL_UART_MspInit+0x328>)
 8003540:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003544:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003548:	681b      	ldr	r3, [r3, #0]
 800354a:	6393      	str	r3, [r2, #56]	@ 0x38

    /* UART8_TX Init */
    hdma_uart8_tx.Instance = DMA2_Stream6;
 800354c:	4b7c      	ldr	r3, [pc, #496]	@ (8003740 <HAL_UART_MspInit+0x330>)
 800354e:	4a7d      	ldr	r2, [pc, #500]	@ (8003744 <HAL_UART_MspInit+0x334>)
 8003550:	601a      	str	r2, [r3, #0]
    hdma_uart8_tx.Init.Request = DMA_REQUEST_UART8_TX;
 8003552:	4b7b      	ldr	r3, [pc, #492]	@ (8003740 <HAL_UART_MspInit+0x330>)
 8003554:	2252      	movs	r2, #82	@ 0x52
 8003556:	605a      	str	r2, [r3, #4]
    hdma_uart8_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 8003558:	4b79      	ldr	r3, [pc, #484]	@ (8003740 <HAL_UART_MspInit+0x330>)
 800355a:	2240      	movs	r2, #64	@ 0x40
 800355c:	609a      	str	r2, [r3, #8]
    hdma_uart8_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 800355e:	4b78      	ldr	r3, [pc, #480]	@ (8003740 <HAL_UART_MspInit+0x330>)
 8003560:	2200      	movs	r2, #0
 8003562:	60da      	str	r2, [r3, #12]
    hdma_uart8_tx.Init.MemInc = DMA_MINC_ENABLE;
 8003564:	4b76      	ldr	r3, [pc, #472]	@ (8003740 <HAL_UART_MspInit+0x330>)
 8003566:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 800356a:	611a      	str	r2, [r3, #16]
    hdma_uart8_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 800356c:	4b74      	ldr	r3, [pc, #464]	@ (8003740 <HAL_UART_MspInit+0x330>)
 800356e:	2200      	movs	r2, #0
 8003570:	615a      	str	r2, [r3, #20]
    hdma_uart8_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8003572:	4b73      	ldr	r3, [pc, #460]	@ (8003740 <HAL_UART_MspInit+0x330>)
 8003574:	2200      	movs	r2, #0
 8003576:	619a      	str	r2, [r3, #24]
    hdma_uart8_tx.Init.Mode = DMA_NORMAL;
 8003578:	4b71      	ldr	r3, [pc, #452]	@ (8003740 <HAL_UART_MspInit+0x330>)
 800357a:	2200      	movs	r2, #0
 800357c:	61da      	str	r2, [r3, #28]
    hdma_uart8_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
 800357e:	4b70      	ldr	r3, [pc, #448]	@ (8003740 <HAL_UART_MspInit+0x330>)
 8003580:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 8003584:	621a      	str	r2, [r3, #32]
    hdma_uart8_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
 8003586:	4b6e      	ldr	r3, [pc, #440]	@ (8003740 <HAL_UART_MspInit+0x330>)
 8003588:	2200      	movs	r2, #0
 800358a:	625a      	str	r2, [r3, #36]	@ 0x24
    if (HAL_DMA_Init(&hdma_uart8_tx) != HAL_OK)
 800358c:	486c      	ldr	r0, [pc, #432]	@ (8003740 <HAL_UART_MspInit+0x330>)
 800358e:	f002 f907 	bl	80057a0 <HAL_DMA_Init>
 8003592:	4603      	mov	r3, r0
 8003594:	2b00      	cmp	r3, #0
 8003596:	d001      	beq.n	800359c <HAL_UART_MspInit+0x18c>
    {
      Error_Handler();
 8003598:	f7fe ffb6 	bl	8002508 <Error_Handler>
    }

    __HAL_LINKDMA(huart,hdmatx,hdma_uart8_tx);
 800359c:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 80035a0:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 80035a4:	681b      	ldr	r3, [r3, #0]
 80035a6:	4a66      	ldr	r2, [pc, #408]	@ (8003740 <HAL_UART_MspInit+0x330>)
 80035a8:	67da      	str	r2, [r3, #124]	@ 0x7c
 80035aa:	4a65      	ldr	r2, [pc, #404]	@ (8003740 <HAL_UART_MspInit+0x330>)
 80035ac:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 80035b0:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 80035b4:	681b      	ldr	r3, [r3, #0]
 80035b6:	6393      	str	r3, [r2, #56]	@ 0x38

    /* UART8 interrupt Init */
    HAL_NVIC_SetPriority(UART8_IRQn, 5, 0);
 80035b8:	2200      	movs	r2, #0
 80035ba:	2105      	movs	r1, #5
 80035bc:	2053      	movs	r0, #83	@ 0x53
 80035be:	f001 fe49 	bl	8005254 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(UART8_IRQn);
 80035c2:	2053      	movs	r0, #83	@ 0x53
 80035c4:	f001 fe60 	bl	8005288 <HAL_NVIC_EnableIRQ>
  /* USER CODE BEGIN USART6_MspInit 1 */

  /* USER CODE END USART6_MspInit 1 */
  }

}
 80035c8:	e17e      	b.n	80038c8 <HAL_UART_MspInit+0x4b8>
  else if(huart->Instance==USART1)
 80035ca:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 80035ce:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 80035d2:	681b      	ldr	r3, [r3, #0]
 80035d4:	681b      	ldr	r3, [r3, #0]
 80035d6:	4a5c      	ldr	r2, [pc, #368]	@ (8003748 <HAL_UART_MspInit+0x338>)
 80035d8:	4293      	cmp	r3, r2
 80035da:	d14f      	bne.n	800367c <HAL_UART_MspInit+0x26c>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
 80035dc:	f04f 0201 	mov.w	r2, #1
 80035e0:	f04f 0300 	mov.w	r3, #0
 80035e4:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
 80035e8:	2300      	movs	r3, #0
 80035ea:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 80035ee:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 80035f2:	4618      	mov	r0, r3
 80035f4:	f007 fa82 	bl	800aafc <HAL_RCCEx_PeriphCLKConfig>
 80035f8:	4603      	mov	r3, r0
 80035fa:	2b00      	cmp	r3, #0
 80035fc:	d001      	beq.n	8003602 <HAL_UART_MspInit+0x1f2>
      Error_Handler();
 80035fe:	f7fe ff83 	bl	8002508 <Error_Handler>
    __HAL_RCC_USART1_CLK_ENABLE();
 8003602:	4b4b      	ldr	r3, [pc, #300]	@ (8003730 <HAL_UART_MspInit+0x320>)
 8003604:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 8003608:	4a49      	ldr	r2, [pc, #292]	@ (8003730 <HAL_UART_MspInit+0x320>)
 800360a:	f043 0310 	orr.w	r3, r3, #16
 800360e:	f8c2 30f0 	str.w	r3, [r2, #240]	@ 0xf0
 8003612:	4b47      	ldr	r3, [pc, #284]	@ (8003730 <HAL_UART_MspInit+0x320>)
 8003614:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 8003618:	f003 0310 	and.w	r3, r3, #16
 800361c:	627b      	str	r3, [r7, #36]	@ 0x24
 800361e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
    __HAL_RCC_GPIOB_CLK_ENABLE();
 8003620:	4b43      	ldr	r3, [pc, #268]	@ (8003730 <HAL_UART_MspInit+0x320>)
 8003622:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003626:	4a42      	ldr	r2, [pc, #264]	@ (8003730 <HAL_UART_MspInit+0x320>)
 8003628:	f043 0302 	orr.w	r3, r3, #2
 800362c:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003630:	4b3f      	ldr	r3, [pc, #252]	@ (8003730 <HAL_UART_MspInit+0x320>)
 8003632:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003636:	f003 0302 	and.w	r3, r3, #2
 800363a:	623b      	str	r3, [r7, #32]
 800363c:	6a3b      	ldr	r3, [r7, #32]
    GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
 800363e:	f44f 4340 	mov.w	r3, #49152	@ 0xc000
 8003642:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8003646:	2302      	movs	r3, #2
 8003648:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 800364c:	2300      	movs	r3, #0
 800364e:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8003652:	2302      	movs	r3, #2
 8003654:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
 8003658:	2304      	movs	r3, #4
 800365a:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 800365e:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 8003662:	4619      	mov	r1, r3
 8003664:	4839      	ldr	r0, [pc, #228]	@ (800374c <HAL_UART_MspInit+0x33c>)
 8003666:	f006 f81d 	bl	80096a4 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
 800366a:	2200      	movs	r2, #0
 800366c:	2105      	movs	r1, #5
 800366e:	2025      	movs	r0, #37	@ 0x25
 8003670:	f001 fdf0 	bl	8005254 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART1_IRQn);
 8003674:	2025      	movs	r0, #37	@ 0x25
 8003676:	f001 fe07 	bl	8005288 <HAL_NVIC_EnableIRQ>
}
 800367a:	e125      	b.n	80038c8 <HAL_UART_MspInit+0x4b8>
  else if(huart->Instance==USART2)
 800367c:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003680:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003684:	681b      	ldr	r3, [r3, #0]
 8003686:	681b      	ldr	r3, [r3, #0]
 8003688:	4a31      	ldr	r2, [pc, #196]	@ (8003750 <HAL_UART_MspInit+0x340>)
 800368a:	4293      	cmp	r3, r2
 800368c:	d164      	bne.n	8003758 <HAL_UART_MspInit+0x348>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART2;
 800368e:	f04f 0202 	mov.w	r2, #2
 8003692:	f04f 0300 	mov.w	r3, #0
 8003696:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
 800369a:	2300      	movs	r3, #0
 800369c:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 80036a0:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 80036a4:	4618      	mov	r0, r3
 80036a6:	f007 fa29 	bl	800aafc <HAL_RCCEx_PeriphCLKConfig>
 80036aa:	4603      	mov	r3, r0
 80036ac:	2b00      	cmp	r3, #0
 80036ae:	d001      	beq.n	80036b4 <HAL_UART_MspInit+0x2a4>
      Error_Handler();
 80036b0:	f7fe ff2a 	bl	8002508 <Error_Handler>
    __HAL_RCC_USART2_CLK_ENABLE();
 80036b4:	4b1e      	ldr	r3, [pc, #120]	@ (8003730 <HAL_UART_MspInit+0x320>)
 80036b6:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 80036ba:	4a1d      	ldr	r2, [pc, #116]	@ (8003730 <HAL_UART_MspInit+0x320>)
 80036bc:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 80036c0:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 80036c4:	4b1a      	ldr	r3, [pc, #104]	@ (8003730 <HAL_UART_MspInit+0x320>)
 80036c6:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 80036ca:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 80036ce:	61fb      	str	r3, [r7, #28]
 80036d0:	69fb      	ldr	r3, [r7, #28]
    __HAL_RCC_GPIOD_CLK_ENABLE();
 80036d2:	4b17      	ldr	r3, [pc, #92]	@ (8003730 <HAL_UART_MspInit+0x320>)
 80036d4:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80036d8:	4a15      	ldr	r2, [pc, #84]	@ (8003730 <HAL_UART_MspInit+0x320>)
 80036da:	f043 0308 	orr.w	r3, r3, #8
 80036de:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80036e2:	4b13      	ldr	r3, [pc, #76]	@ (8003730 <HAL_UART_MspInit+0x320>)
 80036e4:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80036e8:	f003 0308 	and.w	r3, r3, #8
 80036ec:	61bb      	str	r3, [r7, #24]
 80036ee:	69bb      	ldr	r3, [r7, #24]
    GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6;
 80036f0:	2360      	movs	r3, #96	@ 0x60
 80036f2:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 80036f6:	2302      	movs	r3, #2
 80036f8:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 80036fc:	2300      	movs	r3, #0
 80036fe:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8003702:	2302      	movs	r3, #2
 8003704:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
 8003708:	2307      	movs	r3, #7
 800370a:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 800370e:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 8003712:	4619      	mov	r1, r3
 8003714:	480f      	ldr	r0, [pc, #60]	@ (8003754 <HAL_UART_MspInit+0x344>)
 8003716:	f005 ffc5 	bl	80096a4 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART2_IRQn, 5, 0);
 800371a:	2200      	movs	r2, #0
 800371c:	2105      	movs	r1, #5
 800371e:	2026      	movs	r0, #38	@ 0x26
 8003720:	f001 fd98 	bl	8005254 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART2_IRQn);
 8003724:	2026      	movs	r0, #38	@ 0x26
 8003726:	f001 fdaf 	bl	8005288 <HAL_NVIC_EnableIRQ>
}
 800372a:	e0cd      	b.n	80038c8 <HAL_UART_MspInit+0x4b8>
 800372c:	40007c00 	.word	0x40007c00
 8003730:	58024400 	.word	0x58024400
 8003734:	58021000 	.word	0x58021000
 8003738:	24000564 	.word	0x24000564
 800373c:	400204b8 	.word	0x400204b8
 8003740:	240005dc 	.word	0x240005dc
 8003744:	400204a0 	.word	0x400204a0
 8003748:	40011000 	.word	0x40011000
 800374c:	58020400 	.word	0x58020400
 8003750:	40004400 	.word	0x40004400
 8003754:	58020c00 	.word	0x58020c00
  else if(huart->Instance==USART3)
 8003758:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 800375c:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003760:	681b      	ldr	r3, [r3, #0]
 8003762:	681b      	ldr	r3, [r3, #0]
 8003764:	4a5b      	ldr	r2, [pc, #364]	@ (80038d4 <HAL_UART_MspInit+0x4c4>)
 8003766:	4293      	cmp	r3, r2
 8003768:	d14f      	bne.n	800380a <HAL_UART_MspInit+0x3fa>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3;
 800376a:	f04f 0202 	mov.w	r2, #2
 800376e:	f04f 0300 	mov.w	r3, #0
 8003772:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
 8003776:	2300      	movs	r3, #0
 8003778:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 800377c:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003780:	4618      	mov	r0, r3
 8003782:	f007 f9bb 	bl	800aafc <HAL_RCCEx_PeriphCLKConfig>
 8003786:	4603      	mov	r3, r0
 8003788:	2b00      	cmp	r3, #0
 800378a:	d001      	beq.n	8003790 <HAL_UART_MspInit+0x380>
      Error_Handler();
 800378c:	f7fe febc 	bl	8002508 <Error_Handler>
    __HAL_RCC_USART3_CLK_ENABLE();
 8003790:	4b51      	ldr	r3, [pc, #324]	@ (80038d8 <HAL_UART_MspInit+0x4c8>)
 8003792:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003796:	4a50      	ldr	r2, [pc, #320]	@ (80038d8 <HAL_UART_MspInit+0x4c8>)
 8003798:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
 800379c:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 80037a0:	4b4d      	ldr	r3, [pc, #308]	@ (80038d8 <HAL_UART_MspInit+0x4c8>)
 80037a2:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 80037a6:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 80037aa:	617b      	str	r3, [r7, #20]
 80037ac:	697b      	ldr	r3, [r7, #20]
    __HAL_RCC_GPIOD_CLK_ENABLE();
 80037ae:	4b4a      	ldr	r3, [pc, #296]	@ (80038d8 <HAL_UART_MspInit+0x4c8>)
 80037b0:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80037b4:	4a48      	ldr	r2, [pc, #288]	@ (80038d8 <HAL_UART_MspInit+0x4c8>)
 80037b6:	f043 0308 	orr.w	r3, r3, #8
 80037ba:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80037be:	4b46      	ldr	r3, [pc, #280]	@ (80038d8 <HAL_UART_MspInit+0x4c8>)
 80037c0:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80037c4:	f003 0308 	and.w	r3, r3, #8
 80037c8:	613b      	str	r3, [r7, #16]
 80037ca:	693b      	ldr	r3, [r7, #16]
    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
 80037cc:	f44f 7340 	mov.w	r3, #768	@ 0x300
 80037d0:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 80037d4:	2302      	movs	r3, #2
 80037d6:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 80037da:	2300      	movs	r3, #0
 80037dc:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 80037e0:	2302      	movs	r3, #2
 80037e2:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
 80037e6:	2307      	movs	r3, #7
 80037e8:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 80037ec:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 80037f0:	4619      	mov	r1, r3
 80037f2:	483a      	ldr	r0, [pc, #232]	@ (80038dc <HAL_UART_MspInit+0x4cc>)
 80037f4:	f005 ff56 	bl	80096a4 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART3_IRQn, 5, 0);
 80037f8:	2200      	movs	r2, #0
 80037fa:	2105      	movs	r1, #5
 80037fc:	2027      	movs	r0, #39	@ 0x27
 80037fe:	f001 fd29 	bl	8005254 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART3_IRQn);
 8003802:	2027      	movs	r0, #39	@ 0x27
 8003804:	f001 fd40 	bl	8005288 <HAL_NVIC_EnableIRQ>
}
 8003808:	e05e      	b.n	80038c8 <HAL_UART_MspInit+0x4b8>
  else if(huart->Instance==USART6)
 800380a:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 800380e:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003812:	681b      	ldr	r3, [r3, #0]
 8003814:	681b      	ldr	r3, [r3, #0]
 8003816:	4a32      	ldr	r2, [pc, #200]	@ (80038e0 <HAL_UART_MspInit+0x4d0>)
 8003818:	4293      	cmp	r3, r2
 800381a:	d155      	bne.n	80038c8 <HAL_UART_MspInit+0x4b8>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART6;
 800381c:	f04f 0201 	mov.w	r2, #1
 8003820:	f04f 0300 	mov.w	r3, #0
 8003824:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
 8003828:	2300      	movs	r3, #0
 800382a:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 800382e:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003832:	4618      	mov	r0, r3
 8003834:	f007 f962 	bl	800aafc <HAL_RCCEx_PeriphCLKConfig>
 8003838:	4603      	mov	r3, r0
 800383a:	2b00      	cmp	r3, #0
 800383c:	d001      	beq.n	8003842 <HAL_UART_MspInit+0x432>
      Error_Handler();
 800383e:	f7fe fe63 	bl	8002508 <Error_Handler>
    __HAL_RCC_USART6_CLK_ENABLE();
 8003842:	4b25      	ldr	r3, [pc, #148]	@ (80038d8 <HAL_UART_MspInit+0x4c8>)
 8003844:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 8003848:	4a23      	ldr	r2, [pc, #140]	@ (80038d8 <HAL_UART_MspInit+0x4c8>)
 800384a:	f043 0320 	orr.w	r3, r3, #32
 800384e:	f8c2 30f0 	str.w	r3, [r2, #240]	@ 0xf0
 8003852:	4b21      	ldr	r3, [pc, #132]	@ (80038d8 <HAL_UART_MspInit+0x4c8>)
 8003854:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 8003858:	f003 0320 	and.w	r3, r3, #32
 800385c:	60fb      	str	r3, [r7, #12]
 800385e:	68fb      	ldr	r3, [r7, #12]
    __HAL_RCC_GPIOC_CLK_ENABLE();
 8003860:	4b1d      	ldr	r3, [pc, #116]	@ (80038d8 <HAL_UART_MspInit+0x4c8>)
 8003862:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003866:	4a1c      	ldr	r2, [pc, #112]	@ (80038d8 <HAL_UART_MspInit+0x4c8>)
 8003868:	f043 0304 	orr.w	r3, r3, #4
 800386c:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003870:	4b19      	ldr	r3, [pc, #100]	@ (80038d8 <HAL_UART_MspInit+0x4c8>)
 8003872:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003876:	f003 0204 	and.w	r2, r3, #4
 800387a:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 800387e:	f5a3 7380 	sub.w	r3, r3, #256	@ 0x100
 8003882:	601a      	str	r2, [r3, #0]
 8003884:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003888:	f5a3 7380 	sub.w	r3, r3, #256	@ 0x100
 800388c:	681b      	ldr	r3, [r3, #0]
    GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
 800388e:	23c0      	movs	r3, #192	@ 0xc0
 8003890:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8003894:	2302      	movs	r3, #2
 8003896:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 800389a:	2300      	movs	r3, #0
 800389c:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 80038a0:	2302      	movs	r3, #2
 80038a2:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF7_USART6;
 80038a6:	2307      	movs	r3, #7
 80038a8:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 80038ac:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 80038b0:	4619      	mov	r1, r3
 80038b2:	480c      	ldr	r0, [pc, #48]	@ (80038e4 <HAL_UART_MspInit+0x4d4>)
 80038b4:	f005 fef6 	bl	80096a4 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART6_IRQn, 5, 0);
 80038b8:	2200      	movs	r2, #0
 80038ba:	2105      	movs	r1, #5
 80038bc:	2047      	movs	r0, #71	@ 0x47
 80038be:	f001 fcc9 	bl	8005254 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART6_IRQn);
 80038c2:	2047      	movs	r0, #71	@ 0x47
 80038c4:	f001 fce0 	bl	8005288 <HAL_NVIC_EnableIRQ>
}
 80038c8:	bf00      	nop
 80038ca:	f507 7784 	add.w	r7, r7, #264	@ 0x108
 80038ce:	46bd      	mov	sp, r7
 80038d0:	bd80      	pop	{r7, pc}
 80038d2:	bf00      	nop
 80038d4:	40004800 	.word	0x40004800
 80038d8:	58024400 	.word	0x58024400
 80038dc:	58020c00 	.word	0x58020c00
 80038e0:	40011400 	.word	0x40011400
 80038e4:	58020800 	.word	0x58020800

080038e8 <HAL_InitTick>:
  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
  * @param  TickPriority: Tick interrupt priority.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 80038e8:	b580      	push	{r7, lr}
 80038ea:	b090      	sub	sp, #64	@ 0x40
 80038ec:	af00      	add	r7, sp, #0
 80038ee:	6078      	str	r0, [r7, #4]
  uint32_t              uwTimclock, uwAPB1Prescaler;

  uint32_t              uwPrescalerValue;
  uint32_t              pFLatency;
/*Configure the TIM6 IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 80038f0:	687b      	ldr	r3, [r7, #4]
 80038f2:	2b0f      	cmp	r3, #15
 80038f4:	d827      	bhi.n	8003946 <HAL_InitTick+0x5e>
  {
  HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority ,0U);
 80038f6:	2200      	movs	r2, #0
 80038f8:	6879      	ldr	r1, [r7, #4]
 80038fa:	2036      	movs	r0, #54	@ 0x36
 80038fc:	f001 fcaa 	bl	8005254 <HAL_NVIC_SetPriority>

  /* Enable the TIM6 global Interrupt */
  HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
 8003900:	2036      	movs	r0, #54	@ 0x36
 8003902:	f001 fcc1 	bl	8005288 <HAL_NVIC_EnableIRQ>
    uwTickPrio = TickPriority;
 8003906:	4a29      	ldr	r2, [pc, #164]	@ (80039ac <HAL_InitTick+0xc4>)
 8003908:	687b      	ldr	r3, [r7, #4]
 800390a:	6013      	str	r3, [r2, #0]
  {
    return HAL_ERROR;
  }

  /* Enable TIM6 clock */
  __HAL_RCC_TIM6_CLK_ENABLE();
 800390c:	4b28      	ldr	r3, [pc, #160]	@ (80039b0 <HAL_InitTick+0xc8>)
 800390e:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003912:	4a27      	ldr	r2, [pc, #156]	@ (80039b0 <HAL_InitTick+0xc8>)
 8003914:	f043 0310 	orr.w	r3, r3, #16
 8003918:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 800391c:	4b24      	ldr	r3, [pc, #144]	@ (80039b0 <HAL_InitTick+0xc8>)
 800391e:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003922:	f003 0310 	and.w	r3, r3, #16
 8003926:	60fb      	str	r3, [r7, #12]
 8003928:	68fb      	ldr	r3, [r7, #12]

  /* Get clock configuration */
  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
 800392a:	f107 0210 	add.w	r2, r7, #16
 800392e:	f107 0314 	add.w	r3, r7, #20
 8003932:	4611      	mov	r1, r2
 8003934:	4618      	mov	r0, r3
 8003936:	f007 f89f 	bl	800aa78 <HAL_RCC_GetClockConfig>

  /* Get APB1 prescaler */
  uwAPB1Prescaler = clkconfig.APB1CLKDivider;
 800393a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800393c:	63bb      	str	r3, [r7, #56]	@ 0x38
  /* Compute TIM6 clock */
  if (uwAPB1Prescaler == RCC_HCLK_DIV1)
 800393e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8003940:	2b00      	cmp	r3, #0
 8003942:	d106      	bne.n	8003952 <HAL_InitTick+0x6a>
 8003944:	e001      	b.n	800394a <HAL_InitTick+0x62>
    return HAL_ERROR;
 8003946:	2301      	movs	r3, #1
 8003948:	e02b      	b.n	80039a2 <HAL_InitTick+0xba>
  {
    uwTimclock = HAL_RCC_GetPCLK1Freq();
 800394a:	f007 f869 	bl	800aa20 <HAL_RCC_GetPCLK1Freq>
 800394e:	63f8      	str	r0, [r7, #60]	@ 0x3c
 8003950:	e004      	b.n	800395c <HAL_InitTick+0x74>
  }
  else
  {
    uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
 8003952:	f007 f865 	bl	800aa20 <HAL_RCC_GetPCLK1Freq>
 8003956:	4603      	mov	r3, r0
 8003958:	005b      	lsls	r3, r3, #1
 800395a:	63fb      	str	r3, [r7, #60]	@ 0x3c
  }

  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
 800395c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800395e:	4a15      	ldr	r2, [pc, #84]	@ (80039b4 <HAL_InitTick+0xcc>)
 8003960:	fba2 2303 	umull	r2, r3, r2, r3
 8003964:	0c9b      	lsrs	r3, r3, #18
 8003966:	3b01      	subs	r3, #1
 8003968:	637b      	str	r3, [r7, #52]	@ 0x34

  /* Initialize TIM6 */
  htim6.Instance = TIM6;
 800396a:	4b13      	ldr	r3, [pc, #76]	@ (80039b8 <HAL_InitTick+0xd0>)
 800396c:	4a13      	ldr	r2, [pc, #76]	@ (80039bc <HAL_InitTick+0xd4>)
 800396e:	601a      	str	r2, [r3, #0]
  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
  + ClockDivision = 0
  + Counter direction = Up
  */
  htim6.Init.Period = (1000000U / 1000U) - 1U;
 8003970:	4b11      	ldr	r3, [pc, #68]	@ (80039b8 <HAL_InitTick+0xd0>)
 8003972:	f240 32e7 	movw	r2, #999	@ 0x3e7
 8003976:	60da      	str	r2, [r3, #12]
  htim6.Init.Prescaler = uwPrescalerValue;
 8003978:	4a0f      	ldr	r2, [pc, #60]	@ (80039b8 <HAL_InitTick+0xd0>)
 800397a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800397c:	6053      	str	r3, [r2, #4]
  htim6.Init.ClockDivision = 0;
 800397e:	4b0e      	ldr	r3, [pc, #56]	@ (80039b8 <HAL_InitTick+0xd0>)
 8003980:	2200      	movs	r2, #0
 8003982:	611a      	str	r2, [r3, #16]
  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 8003984:	4b0c      	ldr	r3, [pc, #48]	@ (80039b8 <HAL_InitTick+0xd0>)
 8003986:	2200      	movs	r2, #0
 8003988:	609a      	str	r2, [r3, #8]

  if(HAL_TIM_Base_Init(&htim6) == HAL_OK)
 800398a:	480b      	ldr	r0, [pc, #44]	@ (80039b8 <HAL_InitTick+0xd0>)
 800398c:	f008 ff7e 	bl	800c88c <HAL_TIM_Base_Init>
 8003990:	4603      	mov	r3, r0
 8003992:	2b00      	cmp	r3, #0
 8003994:	d104      	bne.n	80039a0 <HAL_InitTick+0xb8>
  {
    /* Start the TIM time Base generation in interrupt mode */
    return HAL_TIM_Base_Start_IT(&htim6);
 8003996:	4808      	ldr	r0, [pc, #32]	@ (80039b8 <HAL_InitTick+0xd0>)
 8003998:	f008 ffda 	bl	800c950 <HAL_TIM_Base_Start_IT>
 800399c:	4603      	mov	r3, r0
 800399e:	e000      	b.n	80039a2 <HAL_InitTick+0xba>
  }

  /* Return function status */
  return HAL_ERROR;
 80039a0:	2301      	movs	r3, #1
}
 80039a2:	4618      	mov	r0, r3
 80039a4:	3740      	adds	r7, #64	@ 0x40
 80039a6:	46bd      	mov	sp, r7
 80039a8:	bd80      	pop	{r7, pc}
 80039aa:	bf00      	nop
 80039ac:	2400002c 	.word	0x2400002c
 80039b0:	58024400 	.word	0x58024400
 80039b4:	431bde83 	.word	0x431bde83
 80039b8:	24000edc 	.word	0x24000edc
 80039bc:	40001000 	.word	0x40001000

080039c0 <NMI_Handler>:
/******************************************************************************/
/**
  * @brief This function handles Non maskable interrupt.
  */
void NMI_Handler(void)
{
 80039c0:	b480      	push	{r7}
 80039c2:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */

  /* USER CODE END NonMaskableInt_IRQn 0 */
  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
   while (1)
 80039c4:	bf00      	nop
 80039c6:	e7fd      	b.n	80039c4 <NMI_Handler+0x4>

080039c8 <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 80039c8:	b480      	push	{r7}
 80039ca:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN HardFault_IRQn 0 */

  /* USER CODE END HardFault_IRQn 0 */
  while (1)
 80039cc:	bf00      	nop
 80039ce:	e7fd      	b.n	80039cc <HardFault_Handler+0x4>

080039d0 <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 80039d0:	b480      	push	{r7}
 80039d2:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN MemoryManagement_IRQn 0 */

  /* USER CODE END MemoryManagement_IRQn 0 */
  while (1)
 80039d4:	bf00      	nop
 80039d6:	e7fd      	b.n	80039d4 <MemManage_Handler+0x4>

080039d8 <BusFault_Handler>:

/**
  * @brief This function handles Pre-fetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 80039d8:	b480      	push	{r7}
 80039da:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN BusFault_IRQn 0 */

  /* USER CODE END BusFault_IRQn 0 */
  while (1)
 80039dc:	bf00      	nop
 80039de:	e7fd      	b.n	80039dc <BusFault_Handler+0x4>

080039e0 <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 80039e0:	b480      	push	{r7}
 80039e2:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN UsageFault_IRQn 0 */

  /* USER CODE END UsageFault_IRQn 0 */
  while (1)
 80039e4:	bf00      	nop
 80039e6:	e7fd      	b.n	80039e4 <UsageFault_Handler+0x4>

080039e8 <DebugMon_Handler>:

/**
  * @brief This function handles Debug monitor.
  */
void DebugMon_Handler(void)
{
 80039e8:	b480      	push	{r7}
 80039ea:	af00      	add	r7, sp, #0

  /* USER CODE END DebugMonitor_IRQn 0 */
  /* USER CODE BEGIN DebugMonitor_IRQn 1 */

  /* USER CODE END DebugMonitor_IRQn 1 */
}
 80039ec:	bf00      	nop
 80039ee:	46bd      	mov	sp, r7
 80039f0:	f85d 7b04 	ldr.w	r7, [sp], #4
 80039f4:	4770      	bx	lr

080039f6 <RCC_IRQHandler>:

/**
  * @brief This function handles RCC global interrupt.
  */
void RCC_IRQHandler(void)
{
 80039f6:	b480      	push	{r7}
 80039f8:	af00      	add	r7, sp, #0

  /* USER CODE END RCC_IRQn 0 */
  /* USER CODE BEGIN RCC_IRQn 1 */

  /* USER CODE END RCC_IRQn 1 */
}
 80039fa:	bf00      	nop
 80039fc:	46bd      	mov	sp, r7
 80039fe:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003a02:	4770      	bx	lr

08003a04 <USART1_IRQHandler>:

/**
  * @brief This function handles USART1 global interrupt.
  */
void USART1_IRQHandler(void)
{
 8003a04:	b580      	push	{r7, lr}
 8003a06:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 8003a08:	4802      	ldr	r0, [pc, #8]	@ (8003a14 <USART1_IRQHandler+0x10>)
 8003a0a:	f009 faf1 	bl	800cff0 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART1_IRQn 1 */

  /* USER CODE END USART1_IRQn 1 */
}
 8003a0e:	bf00      	nop
 8003a10:	bd80      	pop	{r7, pc}
 8003a12:	bf00      	nop
 8003a14:	24000314 	.word	0x24000314

08003a18 <USART2_IRQHandler>:

/**
  * @brief This function handles USART2 global interrupt.
  */
void USART2_IRQHandler(void)
{
 8003a18:	b580      	push	{r7, lr}
 8003a1a:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART2_IRQn 0 */

  /* USER CODE END USART2_IRQn 0 */
  HAL_UART_IRQHandler(&huart2);
 8003a1c:	4802      	ldr	r0, [pc, #8]	@ (8003a28 <USART2_IRQHandler+0x10>)
 8003a1e:	f009 fae7 	bl	800cff0 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART2_IRQn 1 */

  /* USER CODE END USART2_IRQn 1 */
}
 8003a22:	bf00      	nop
 8003a24:	bd80      	pop	{r7, pc}
 8003a26:	bf00      	nop
 8003a28:	240003a8 	.word	0x240003a8

08003a2c <USART3_IRQHandler>:

/**
  * @brief This function handles USART3 global interrupt.
  */
void USART3_IRQHandler(void)
{
 8003a2c:	b580      	push	{r7, lr}
 8003a2e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART3_IRQn 0 */

  /* USER CODE END USART3_IRQn 0 */
  HAL_UART_IRQHandler(&huart3);
 8003a30:	4802      	ldr	r0, [pc, #8]	@ (8003a3c <USART3_IRQHandler+0x10>)
 8003a32:	f009 fadd 	bl	800cff0 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART3_IRQn 1 */

  /* USER CODE END USART3_IRQn 1 */
}
 8003a36:	bf00      	nop
 8003a38:	bd80      	pop	{r7, pc}
 8003a3a:	bf00      	nop
 8003a3c:	2400043c 	.word	0x2400043c

08003a40 <TIM6_DAC_IRQHandler>:

/**
  * @brief This function handles TIM6 global interrupt, DAC1_CH1 and DAC1_CH2 underrun error interrupts.
  */
void TIM6_DAC_IRQHandler(void)
{
 8003a40:	b580      	push	{r7, lr}
 8003a42:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */

  /* USER CODE END TIM6_DAC_IRQn 0 */
  HAL_TIM_IRQHandler(&htim6);
 8003a44:	4802      	ldr	r0, [pc, #8]	@ (8003a50 <TIM6_DAC_IRQHandler+0x10>)
 8003a46:	f008 fffb 	bl	800ca40 <HAL_TIM_IRQHandler>
  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */

  /* USER CODE END TIM6_DAC_IRQn 1 */
}
 8003a4a:	bf00      	nop
 8003a4c:	bd80      	pop	{r7, pc}
 8003a4e:	bf00      	nop
 8003a50:	24000edc 	.word	0x24000edc

08003a54 <ETH_IRQHandler>:

/**
  * @brief This function handles Ethernet global interrupt.
  */
void ETH_IRQHandler(void)
{
 8003a54:	b580      	push	{r7, lr}
 8003a56:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN ETH_IRQn 0 */

  /* USER CODE END ETH_IRQn 0 */
  HAL_ETH_IRQHandler(&heth);
 8003a58:	4802      	ldr	r0, [pc, #8]	@ (8003a64 <ETH_IRQHandler+0x10>)
 8003a5a:	f004 fc9b 	bl	8008394 <HAL_ETH_IRQHandler>
  /* USER CODE BEGIN ETH_IRQn 1 */

  /* USER CODE END ETH_IRQn 1 */
}
 8003a5e:	bf00      	nop
 8003a60:	bd80      	pop	{r7, pc}
 8003a62:	bf00      	nop
 8003a64:	240021ec 	.word	0x240021ec

08003a68 <DMA2_Stream6_IRQHandler>:

/**
  * @brief This function handles DMA2 stream6 global interrupt.
  */
void DMA2_Stream6_IRQHandler(void)
{
 8003a68:	b580      	push	{r7, lr}
 8003a6a:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN DMA2_Stream6_IRQn 0 */

  /* USER CODE END DMA2_Stream6_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_uart8_tx);
 8003a6c:	4802      	ldr	r0, [pc, #8]	@ (8003a78 <DMA2_Stream6_IRQHandler+0x10>)
 8003a6e:	f002 ff57 	bl	8006920 <HAL_DMA_IRQHandler>
  /* USER CODE BEGIN DMA2_Stream6_IRQn 1 */

  /* USER CODE END DMA2_Stream6_IRQn 1 */
}
 8003a72:	bf00      	nop
 8003a74:	bd80      	pop	{r7, pc}
 8003a76:	bf00      	nop
 8003a78:	240005dc 	.word	0x240005dc

08003a7c <DMA2_Stream7_IRQHandler>:

/**
  * @brief This function handles DMA2 stream7 global interrupt.
  */
void DMA2_Stream7_IRQHandler(void)
{
 8003a7c:	b580      	push	{r7, lr}
 8003a7e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */

  /* USER CODE END DMA2_Stream7_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_uart8_rx);
 8003a80:	4802      	ldr	r0, [pc, #8]	@ (8003a8c <DMA2_Stream7_IRQHandler+0x10>)
 8003a82:	f002 ff4d 	bl	8006920 <HAL_DMA_IRQHandler>
  /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */

  /* USER CODE END DMA2_Stream7_IRQn 1 */
}
 8003a86:	bf00      	nop
 8003a88:	bd80      	pop	{r7, pc}
 8003a8a:	bf00      	nop
 8003a8c:	24000564 	.word	0x24000564

08003a90 <USART6_IRQHandler>:

/**
  * @brief This function handles USART6 global interrupt.
  */
void USART6_IRQHandler(void)
{
 8003a90:	b580      	push	{r7, lr}
 8003a92:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART6_IRQn 0 */

  /* USER CODE END USART6_IRQn 0 */
  HAL_UART_IRQHandler(&huart6);
 8003a94:	4802      	ldr	r0, [pc, #8]	@ (8003aa0 <USART6_IRQHandler+0x10>)
 8003a96:	f009 faab 	bl	800cff0 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART6_IRQn 1 */

  /* USER CODE END USART6_IRQn 1 */
}
 8003a9a:	bf00      	nop
 8003a9c:	bd80      	pop	{r7, pc}
 8003a9e:	bf00      	nop
 8003aa0:	240004d0 	.word	0x240004d0

08003aa4 <UART8_IRQHandler>:

/**
  * @brief This function handles UART8 global interrupt.
  */
void UART8_IRQHandler(void)
{
 8003aa4:	b580      	push	{r7, lr}
 8003aa6:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN UART8_IRQn 0 */

  /* USER CODE END UART8_IRQn 0 */
  HAL_UART_IRQHandler(&huart8);
 8003aa8:	4802      	ldr	r0, [pc, #8]	@ (8003ab4 <UART8_IRQHandler+0x10>)
 8003aaa:	f009 faa1 	bl	800cff0 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN UART8_IRQn 1 */

  /* USER CODE END UART8_IRQn 1 */
}
 8003aae:	bf00      	nop
 8003ab0:	bd80      	pop	{r7, pc}
 8003ab2:	bf00      	nop
 8003ab4:	24000280 	.word	0x24000280

08003ab8 <ITM_SendChar>:
           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
  \param [in]     ch  Character to transmit.
  \returns            Character to transmit.
 */
__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
{
 8003ab8:	b480      	push	{r7}
 8003aba:	b083      	sub	sp, #12
 8003abc:	af00      	add	r7, sp, #0
 8003abe:	6078      	str	r0, [r7, #4]
  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
 8003ac0:	f04f 4360 	mov.w	r3, #3758096384	@ 0xe0000000
 8003ac4:	f8d3 3e80 	ldr.w	r3, [r3, #3712]	@ 0xe80
 8003ac8:	f003 0301 	and.w	r3, r3, #1
 8003acc:	2b00      	cmp	r3, #0
 8003ace:	d013      	beq.n	8003af8 <ITM_SendChar+0x40>
      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
 8003ad0:	f04f 4360 	mov.w	r3, #3758096384	@ 0xe0000000
 8003ad4:	f8d3 3e00 	ldr.w	r3, [r3, #3584]	@ 0xe00
 8003ad8:	f003 0301 	and.w	r3, r3, #1
  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
 8003adc:	2b00      	cmp	r3, #0
 8003ade:	d00b      	beq.n	8003af8 <ITM_SendChar+0x40>
  {
    while (ITM->PORT[0U].u32 == 0UL)
 8003ae0:	e000      	b.n	8003ae4 <ITM_SendChar+0x2c>
    {
      __NOP();
 8003ae2:	bf00      	nop
    while (ITM->PORT[0U].u32 == 0UL)
 8003ae4:	f04f 4360 	mov.w	r3, #3758096384	@ 0xe0000000
 8003ae8:	681b      	ldr	r3, [r3, #0]
 8003aea:	2b00      	cmp	r3, #0
 8003aec:	d0f9      	beq.n	8003ae2 <ITM_SendChar+0x2a>
    }
    ITM->PORT[0U].u8 = (uint8_t)ch;
 8003aee:	f04f 4360 	mov.w	r3, #3758096384	@ 0xe0000000
 8003af2:	687a      	ldr	r2, [r7, #4]
 8003af4:	b2d2      	uxtb	r2, r2
 8003af6:	701a      	strb	r2, [r3, #0]
  }
  return (ch);
 8003af8:	687b      	ldr	r3, [r7, #4]
}
 8003afa:	4618      	mov	r0, r3
 8003afc:	370c      	adds	r7, #12
 8003afe:	46bd      	mov	sp, r7
 8003b00:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003b04:	4770      	bx	lr

08003b06 <_getpid>:
void initialise_monitor_handles()
{
}

int _getpid(void)
{
 8003b06:	b480      	push	{r7}
 8003b08:	af00      	add	r7, sp, #0
  return 1;
 8003b0a:	2301      	movs	r3, #1
}
 8003b0c:	4618      	mov	r0, r3
 8003b0e:	46bd      	mov	sp, r7
 8003b10:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003b14:	4770      	bx	lr
	...

08003b18 <_kill>:

int _kill(int pid, int sig)
{
 8003b18:	b480      	push	{r7}
 8003b1a:	b083      	sub	sp, #12
 8003b1c:	af00      	add	r7, sp, #0
 8003b1e:	6078      	str	r0, [r7, #4]
 8003b20:	6039      	str	r1, [r7, #0]
  (void)pid;
  (void)sig;
  errno = EINVAL;
 8003b22:	4b05      	ldr	r3, [pc, #20]	@ (8003b38 <_kill+0x20>)
 8003b24:	2216      	movs	r2, #22
 8003b26:	601a      	str	r2, [r3, #0]
  return -1;
 8003b28:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8003b2c:	4618      	mov	r0, r3
 8003b2e:	370c      	adds	r7, #12
 8003b30:	46bd      	mov	sp, r7
 8003b32:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003b36:	4770      	bx	lr
 8003b38:	2402b180 	.word	0x2402b180

08003b3c <_exit>:

void _exit (int status)
{
 8003b3c:	b580      	push	{r7, lr}
 8003b3e:	b082      	sub	sp, #8
 8003b40:	af00      	add	r7, sp, #0
 8003b42:	6078      	str	r0, [r7, #4]
  _kill(status, -1);
 8003b44:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8003b48:	6878      	ldr	r0, [r7, #4]
 8003b4a:	f7ff ffe5 	bl	8003b18 <_kill>
  while (1) {}    /* Make sure we hang here */
 8003b4e:	bf00      	nop
 8003b50:	e7fd      	b.n	8003b4e <_exit+0x12>

08003b52 <_read>:
}

__attribute__((weak)) int _read(int file, char *ptr, int len)
{
 8003b52:	b580      	push	{r7, lr}
 8003b54:	b086      	sub	sp, #24
 8003b56:	af00      	add	r7, sp, #0
 8003b58:	60f8      	str	r0, [r7, #12]
 8003b5a:	60b9      	str	r1, [r7, #8]
 8003b5c:	607a      	str	r2, [r7, #4]
  (void)file;
  int DataIdx;

  for (DataIdx = 0; DataIdx < len; DataIdx++)
 8003b5e:	2300      	movs	r3, #0
 8003b60:	617b      	str	r3, [r7, #20]
 8003b62:	e00a      	b.n	8003b7a <_read+0x28>
  {
    *ptr++ = __io_getchar();
 8003b64:	f3af 8000 	nop.w
 8003b68:	4601      	mov	r1, r0
 8003b6a:	68bb      	ldr	r3, [r7, #8]
 8003b6c:	1c5a      	adds	r2, r3, #1
 8003b6e:	60ba      	str	r2, [r7, #8]
 8003b70:	b2ca      	uxtb	r2, r1
 8003b72:	701a      	strb	r2, [r3, #0]
  for (DataIdx = 0; DataIdx < len; DataIdx++)
 8003b74:	697b      	ldr	r3, [r7, #20]
 8003b76:	3301      	adds	r3, #1
 8003b78:	617b      	str	r3, [r7, #20]
 8003b7a:	697a      	ldr	r2, [r7, #20]
 8003b7c:	687b      	ldr	r3, [r7, #4]
 8003b7e:	429a      	cmp	r2, r3
 8003b80:	dbf0      	blt.n	8003b64 <_read+0x12>
  }

  return len;
 8003b82:	687b      	ldr	r3, [r7, #4]
}
 8003b84:	4618      	mov	r0, r3
 8003b86:	3718      	adds	r7, #24
 8003b88:	46bd      	mov	sp, r7
 8003b8a:	bd80      	pop	{r7, pc}

08003b8c <_write>:

__attribute__((weak)) int _write(int file, char *ptr, int len)
{
 8003b8c:	b580      	push	{r7, lr}
 8003b8e:	b086      	sub	sp, #24
 8003b90:	af00      	add	r7, sp, #0
 8003b92:	60f8      	str	r0, [r7, #12]
 8003b94:	60b9      	str	r1, [r7, #8]
 8003b96:	607a      	str	r2, [r7, #4]
  (void)file;
  int DataIdx;

  for (DataIdx = 0; DataIdx < len; DataIdx++)
 8003b98:	2300      	movs	r3, #0
 8003b9a:	617b      	str	r3, [r7, #20]
 8003b9c:	e009      	b.n	8003bb2 <_write+0x26>
  {
//    __io_putchar(*ptr++);
	  ITM_SendChar(*ptr++);
 8003b9e:	68bb      	ldr	r3, [r7, #8]
 8003ba0:	1c5a      	adds	r2, r3, #1
 8003ba2:	60ba      	str	r2, [r7, #8]
 8003ba4:	781b      	ldrb	r3, [r3, #0]
 8003ba6:	4618      	mov	r0, r3
 8003ba8:	f7ff ff86 	bl	8003ab8 <ITM_SendChar>
  for (DataIdx = 0; DataIdx < len; DataIdx++)
 8003bac:	697b      	ldr	r3, [r7, #20]
 8003bae:	3301      	adds	r3, #1
 8003bb0:	617b      	str	r3, [r7, #20]
 8003bb2:	697a      	ldr	r2, [r7, #20]
 8003bb4:	687b      	ldr	r3, [r7, #4]
 8003bb6:	429a      	cmp	r2, r3
 8003bb8:	dbf1      	blt.n	8003b9e <_write+0x12>
  }
  return len;
 8003bba:	687b      	ldr	r3, [r7, #4]
}
 8003bbc:	4618      	mov	r0, r3
 8003bbe:	3718      	adds	r7, #24
 8003bc0:	46bd      	mov	sp, r7
 8003bc2:	bd80      	pop	{r7, pc}

08003bc4 <_close>:

int _close(int file)
{
 8003bc4:	b480      	push	{r7}
 8003bc6:	b083      	sub	sp, #12
 8003bc8:	af00      	add	r7, sp, #0
 8003bca:	6078      	str	r0, [r7, #4]
  (void)file;
  return -1;
 8003bcc:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8003bd0:	4618      	mov	r0, r3
 8003bd2:	370c      	adds	r7, #12
 8003bd4:	46bd      	mov	sp, r7
 8003bd6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003bda:	4770      	bx	lr

08003bdc <_fstat>:


int _fstat(int file, struct stat *st)
{
 8003bdc:	b480      	push	{r7}
 8003bde:	b083      	sub	sp, #12
 8003be0:	af00      	add	r7, sp, #0
 8003be2:	6078      	str	r0, [r7, #4]
 8003be4:	6039      	str	r1, [r7, #0]
  (void)file;
  st->st_mode = S_IFCHR;
 8003be6:	683b      	ldr	r3, [r7, #0]
 8003be8:	f44f 5200 	mov.w	r2, #8192	@ 0x2000
 8003bec:	605a      	str	r2, [r3, #4]
  return 0;
 8003bee:	2300      	movs	r3, #0
}
 8003bf0:	4618      	mov	r0, r3
 8003bf2:	370c      	adds	r7, #12
 8003bf4:	46bd      	mov	sp, r7
 8003bf6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003bfa:	4770      	bx	lr

08003bfc <_isatty>:

int _isatty(int file)
{
 8003bfc:	b480      	push	{r7}
 8003bfe:	b083      	sub	sp, #12
 8003c00:	af00      	add	r7, sp, #0
 8003c02:	6078      	str	r0, [r7, #4]
  (void)file;
  return 1;
 8003c04:	2301      	movs	r3, #1
}
 8003c06:	4618      	mov	r0, r3
 8003c08:	370c      	adds	r7, #12
 8003c0a:	46bd      	mov	sp, r7
 8003c0c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003c10:	4770      	bx	lr

08003c12 <_lseek>:

int _lseek(int file, int ptr, int dir)
{
 8003c12:	b480      	push	{r7}
 8003c14:	b085      	sub	sp, #20
 8003c16:	af00      	add	r7, sp, #0
 8003c18:	60f8      	str	r0, [r7, #12]
 8003c1a:	60b9      	str	r1, [r7, #8]
 8003c1c:	607a      	str	r2, [r7, #4]
  (void)file;
  (void)ptr;
  (void)dir;
  return 0;
 8003c1e:	2300      	movs	r3, #0
}
 8003c20:	4618      	mov	r0, r3
 8003c22:	3714      	adds	r7, #20
 8003c24:	46bd      	mov	sp, r7
 8003c26:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003c2a:	4770      	bx	lr

08003c2c <_sbrk>:
 *
 * @param incr Memory size
 * @return Pointer to allocated memory
 */
void *_sbrk(ptrdiff_t incr)
{
 8003c2c:	b480      	push	{r7}
 8003c2e:	b087      	sub	sp, #28
 8003c30:	af00      	add	r7, sp, #0
 8003c32:	6078      	str	r0, [r7, #4]
  extern uint8_t _end; /* Symbol defined in the linker script */
  extern uint8_t _estack; /* Symbol defined in the linker script */
  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
 8003c34:	4a14      	ldr	r2, [pc, #80]	@ (8003c88 <_sbrk+0x5c>)
 8003c36:	4b15      	ldr	r3, [pc, #84]	@ (8003c8c <_sbrk+0x60>)
 8003c38:	1ad3      	subs	r3, r2, r3
 8003c3a:	617b      	str	r3, [r7, #20]
  const uint8_t *max_heap = (uint8_t *)stack_limit;
 8003c3c:	697b      	ldr	r3, [r7, #20]
 8003c3e:	613b      	str	r3, [r7, #16]
  uint8_t *prev_heap_end;

  /* Initialize heap end at first call */
  if (NULL == __sbrk_heap_end)
 8003c40:	4b13      	ldr	r3, [pc, #76]	@ (8003c90 <_sbrk+0x64>)
 8003c42:	681b      	ldr	r3, [r3, #0]
 8003c44:	2b00      	cmp	r3, #0
 8003c46:	d102      	bne.n	8003c4e <_sbrk+0x22>
  {
    __sbrk_heap_end = &_end;
 8003c48:	4b11      	ldr	r3, [pc, #68]	@ (8003c90 <_sbrk+0x64>)
 8003c4a:	4a12      	ldr	r2, [pc, #72]	@ (8003c94 <_sbrk+0x68>)
 8003c4c:	601a      	str	r2, [r3, #0]
  }

  /* Protect heap from growing into the reserved MSP stack */
  if (__sbrk_heap_end + incr > max_heap)
 8003c4e:	4b10      	ldr	r3, [pc, #64]	@ (8003c90 <_sbrk+0x64>)
 8003c50:	681a      	ldr	r2, [r3, #0]
 8003c52:	687b      	ldr	r3, [r7, #4]
 8003c54:	4413      	add	r3, r2
 8003c56:	693a      	ldr	r2, [r7, #16]
 8003c58:	429a      	cmp	r2, r3
 8003c5a:	d205      	bcs.n	8003c68 <_sbrk+0x3c>
  {
    errno = ENOMEM;
 8003c5c:	4b0e      	ldr	r3, [pc, #56]	@ (8003c98 <_sbrk+0x6c>)
 8003c5e:	220c      	movs	r2, #12
 8003c60:	601a      	str	r2, [r3, #0]
    return (void *)-1;
 8003c62:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8003c66:	e009      	b.n	8003c7c <_sbrk+0x50>
  }

  prev_heap_end = __sbrk_heap_end;
 8003c68:	4b09      	ldr	r3, [pc, #36]	@ (8003c90 <_sbrk+0x64>)
 8003c6a:	681b      	ldr	r3, [r3, #0]
 8003c6c:	60fb      	str	r3, [r7, #12]
  __sbrk_heap_end += incr;
 8003c6e:	4b08      	ldr	r3, [pc, #32]	@ (8003c90 <_sbrk+0x64>)
 8003c70:	681a      	ldr	r2, [r3, #0]
 8003c72:	687b      	ldr	r3, [r7, #4]
 8003c74:	4413      	add	r3, r2
 8003c76:	4a06      	ldr	r2, [pc, #24]	@ (8003c90 <_sbrk+0x64>)
 8003c78:	6013      	str	r3, [r2, #0]

  return (void *)prev_heap_end;
 8003c7a:	68fb      	ldr	r3, [r7, #12]
}
 8003c7c:	4618      	mov	r0, r3
 8003c7e:	371c      	adds	r7, #28
 8003c80:	46bd      	mov	sp, r7
 8003c82:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003c86:	4770      	bx	lr
 8003c88:	24060000 	.word	0x24060000
 8003c8c:	00000400 	.word	0x00000400
 8003c90:	24000f28 	.word	0x24000f28
 8003c94:	2402b188 	.word	0x2402b188
 8003c98:	2402b180 	.word	0x2402b180

08003c9c <SystemInit>:
  *         configuration.
  * @param  None
  * @retval None
  */
void SystemInit (void)
{
 8003c9c:	b480      	push	{r7}
 8003c9e:	af00      	add	r7, sp, #0
 __IO uint32_t tmpreg;
#endif /* DATA_IN_D2_SRAM */

  /* FPU settings ------------------------------------------------------------*/
  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
 8003ca0:	4b37      	ldr	r3, [pc, #220]	@ (8003d80 <SystemInit+0xe4>)
 8003ca2:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8003ca6:	4a36      	ldr	r2, [pc, #216]	@ (8003d80 <SystemInit+0xe4>)
 8003ca8:	f443 0370 	orr.w	r3, r3, #15728640	@ 0xf00000
 8003cac:	f8c2 3088 	str.w	r3, [r2, #136]	@ 0x88
  #endif
  /* Reset the RCC clock configuration to the default reset state ------------*/

   /* Increasing the CPU frequency */
  if(FLASH_LATENCY_DEFAULT  > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
 8003cb0:	4b34      	ldr	r3, [pc, #208]	@ (8003d84 <SystemInit+0xe8>)
 8003cb2:	681b      	ldr	r3, [r3, #0]
 8003cb4:	f003 030f 	and.w	r3, r3, #15
 8003cb8:	2b06      	cmp	r3, #6
 8003cba:	d807      	bhi.n	8003ccc <SystemInit+0x30>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
 8003cbc:	4b31      	ldr	r3, [pc, #196]	@ (8003d84 <SystemInit+0xe8>)
 8003cbe:	681b      	ldr	r3, [r3, #0]
 8003cc0:	f023 030f 	bic.w	r3, r3, #15
 8003cc4:	4a2f      	ldr	r2, [pc, #188]	@ (8003d84 <SystemInit+0xe8>)
 8003cc6:	f043 0307 	orr.w	r3, r3, #7
 8003cca:	6013      	str	r3, [r2, #0]
  }

  /* Set HSION bit */
  RCC->CR |= RCC_CR_HSION;
 8003ccc:	4b2e      	ldr	r3, [pc, #184]	@ (8003d88 <SystemInit+0xec>)
 8003cce:	681b      	ldr	r3, [r3, #0]
 8003cd0:	4a2d      	ldr	r2, [pc, #180]	@ (8003d88 <SystemInit+0xec>)
 8003cd2:	f043 0301 	orr.w	r3, r3, #1
 8003cd6:	6013      	str	r3, [r2, #0]

  /* Reset CFGR register */
  RCC->CFGR = 0x00000000;
 8003cd8:	4b2b      	ldr	r3, [pc, #172]	@ (8003d88 <SystemInit+0xec>)
 8003cda:	2200      	movs	r2, #0
 8003cdc:	611a      	str	r2, [r3, #16]

  /* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */
  RCC->CR &= 0xEAF6ED7FU;
 8003cde:	4b2a      	ldr	r3, [pc, #168]	@ (8003d88 <SystemInit+0xec>)
 8003ce0:	681a      	ldr	r2, [r3, #0]
 8003ce2:	4929      	ldr	r1, [pc, #164]	@ (8003d88 <SystemInit+0xec>)
 8003ce4:	4b29      	ldr	r3, [pc, #164]	@ (8003d8c <SystemInit+0xf0>)
 8003ce6:	4013      	ands	r3, r2
 8003ce8:	600b      	str	r3, [r1, #0]

   /* Decreasing the number of wait states because of lower CPU frequency */
  if(FLASH_LATENCY_DEFAULT  < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
 8003cea:	4b26      	ldr	r3, [pc, #152]	@ (8003d84 <SystemInit+0xe8>)
 8003cec:	681b      	ldr	r3, [r3, #0]
 8003cee:	f003 0308 	and.w	r3, r3, #8
 8003cf2:	2b00      	cmp	r3, #0
 8003cf4:	d007      	beq.n	8003d06 <SystemInit+0x6a>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
 8003cf6:	4b23      	ldr	r3, [pc, #140]	@ (8003d84 <SystemInit+0xe8>)
 8003cf8:	681b      	ldr	r3, [r3, #0]
 8003cfa:	f023 030f 	bic.w	r3, r3, #15
 8003cfe:	4a21      	ldr	r2, [pc, #132]	@ (8003d84 <SystemInit+0xe8>)
 8003d00:	f043 0307 	orr.w	r3, r3, #7
 8003d04:	6013      	str	r3, [r2, #0]
  }

#if defined(D3_SRAM_BASE)
  /* Reset D1CFGR register */
  RCC->D1CFGR = 0x00000000;
 8003d06:	4b20      	ldr	r3, [pc, #128]	@ (8003d88 <SystemInit+0xec>)
 8003d08:	2200      	movs	r2, #0
 8003d0a:	619a      	str	r2, [r3, #24]

  /* Reset D2CFGR register */
  RCC->D2CFGR = 0x00000000;
 8003d0c:	4b1e      	ldr	r3, [pc, #120]	@ (8003d88 <SystemInit+0xec>)
 8003d0e:	2200      	movs	r2, #0
 8003d10:	61da      	str	r2, [r3, #28]

  /* Reset D3CFGR register */
  RCC->D3CFGR = 0x00000000;
 8003d12:	4b1d      	ldr	r3, [pc, #116]	@ (8003d88 <SystemInit+0xec>)
 8003d14:	2200      	movs	r2, #0
 8003d16:	621a      	str	r2, [r3, #32]

  /* Reset SRDCFGR register */
  RCC->SRDCFGR = 0x00000000;
#endif
  /* Reset PLLCKSELR register */
  RCC->PLLCKSELR = 0x02020200;
 8003d18:	4b1b      	ldr	r3, [pc, #108]	@ (8003d88 <SystemInit+0xec>)
 8003d1a:	4a1d      	ldr	r2, [pc, #116]	@ (8003d90 <SystemInit+0xf4>)
 8003d1c:	629a      	str	r2, [r3, #40]	@ 0x28

  /* Reset PLLCFGR register */
  RCC->PLLCFGR = 0x01FF0000;
 8003d1e:	4b1a      	ldr	r3, [pc, #104]	@ (8003d88 <SystemInit+0xec>)
 8003d20:	4a1c      	ldr	r2, [pc, #112]	@ (8003d94 <SystemInit+0xf8>)
 8003d22:	62da      	str	r2, [r3, #44]	@ 0x2c
  /* Reset PLL1DIVR register */
  RCC->PLL1DIVR = 0x01010280;
 8003d24:	4b18      	ldr	r3, [pc, #96]	@ (8003d88 <SystemInit+0xec>)
 8003d26:	4a1c      	ldr	r2, [pc, #112]	@ (8003d98 <SystemInit+0xfc>)
 8003d28:	631a      	str	r2, [r3, #48]	@ 0x30
  /* Reset PLL1FRACR register */
  RCC->PLL1FRACR = 0x00000000;
 8003d2a:	4b17      	ldr	r3, [pc, #92]	@ (8003d88 <SystemInit+0xec>)
 8003d2c:	2200      	movs	r2, #0
 8003d2e:	635a      	str	r2, [r3, #52]	@ 0x34

  /* Reset PLL2DIVR register */
  RCC->PLL2DIVR = 0x01010280;
 8003d30:	4b15      	ldr	r3, [pc, #84]	@ (8003d88 <SystemInit+0xec>)
 8003d32:	4a19      	ldr	r2, [pc, #100]	@ (8003d98 <SystemInit+0xfc>)
 8003d34:	639a      	str	r2, [r3, #56]	@ 0x38

  /* Reset PLL2FRACR register */

  RCC->PLL2FRACR = 0x00000000;
 8003d36:	4b14      	ldr	r3, [pc, #80]	@ (8003d88 <SystemInit+0xec>)
 8003d38:	2200      	movs	r2, #0
 8003d3a:	63da      	str	r2, [r3, #60]	@ 0x3c
  /* Reset PLL3DIVR register */
  RCC->PLL3DIVR = 0x01010280;
 8003d3c:	4b12      	ldr	r3, [pc, #72]	@ (8003d88 <SystemInit+0xec>)
 8003d3e:	4a16      	ldr	r2, [pc, #88]	@ (8003d98 <SystemInit+0xfc>)
 8003d40:	641a      	str	r2, [r3, #64]	@ 0x40

  /* Reset PLL3FRACR register */
  RCC->PLL3FRACR = 0x00000000;
 8003d42:	4b11      	ldr	r3, [pc, #68]	@ (8003d88 <SystemInit+0xec>)
 8003d44:	2200      	movs	r2, #0
 8003d46:	645a      	str	r2, [r3, #68]	@ 0x44

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 8003d48:	4b0f      	ldr	r3, [pc, #60]	@ (8003d88 <SystemInit+0xec>)
 8003d4a:	681b      	ldr	r3, [r3, #0]
 8003d4c:	4a0e      	ldr	r2, [pc, #56]	@ (8003d88 <SystemInit+0xec>)
 8003d4e:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 8003d52:	6013      	str	r3, [r2, #0]

  /* Disable all interrupts */
  RCC->CIER = 0x00000000;
 8003d54:	4b0c      	ldr	r3, [pc, #48]	@ (8003d88 <SystemInit+0xec>)
 8003d56:	2200      	movs	r2, #0
 8003d58:	661a      	str	r2, [r3, #96]	@ 0x60

#if (STM32H7_DEV_ID == 0x450UL)
  /* dual core CM7 or single core line */
  if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U)
 8003d5a:	4b10      	ldr	r3, [pc, #64]	@ (8003d9c <SystemInit+0x100>)
 8003d5c:	681a      	ldr	r2, [r3, #0]
 8003d5e:	4b10      	ldr	r3, [pc, #64]	@ (8003da0 <SystemInit+0x104>)
 8003d60:	4013      	ands	r3, r2
 8003d62:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 8003d66:	d202      	bcs.n	8003d6e <SystemInit+0xd2>
  {
    /* if stm32h7 revY*/
    /* Change  the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
    *((__IO uint32_t*)0x51008108) = 0x000000001U;
 8003d68:	4b0e      	ldr	r3, [pc, #56]	@ (8003da4 <SystemInit+0x108>)
 8003d6a:	2201      	movs	r2, #1
 8003d6c:	601a      	str	r2, [r3, #0]
  /*
   * Disable the FMC bank1 (enabled after reset).
   * This, prevents CPU speculation access on this bank which blocks the use of FMC during
   * 24us. During this time the others FMC master (such as LTDC) cannot use it!
   */
  FMC_Bank1_R->BTCR[0] = 0x000030D2;
 8003d6e:	4b0e      	ldr	r3, [pc, #56]	@ (8003da8 <SystemInit+0x10c>)
 8003d70:	f243 02d2 	movw	r2, #12498	@ 0x30d2
 8003d74:	601a      	str	r2, [r3, #0]
#if defined(USER_VECT_TAB_ADDRESS)
  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */
#endif /* USER_VECT_TAB_ADDRESS */

#endif /*DUAL_CORE && CORE_CM4*/
}
 8003d76:	bf00      	nop
 8003d78:	46bd      	mov	sp, r7
 8003d7a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003d7e:	4770      	bx	lr
 8003d80:	e000ed00 	.word	0xe000ed00
 8003d84:	52002000 	.word	0x52002000
 8003d88:	58024400 	.word	0x58024400
 8003d8c:	eaf6ed7f 	.word	0xeaf6ed7f
 8003d90:	02020200 	.word	0x02020200
 8003d94:	01ff0000 	.word	0x01ff0000
 8003d98:	01010280 	.word	0x01010280
 8003d9c:	5c001000 	.word	0x5c001000
 8003da0:	ffff0000 	.word	0xffff0000
 8003da4:	51008108 	.word	0x51008108
 8003da8:	52004000 	.word	0x52004000

08003dac <UartTasksInit>:
osMutexId_t resMeasurementsMutex;
osMutexId_t sensorsInfoMutex;

extern RNG_HandleTypeDef hrng;

void UartTasksInit (void) {
 8003dac:	b580      	push	{r7, lr}
 8003dae:	af00      	add	r7, sp, #0
    uart1TaskData.uartRxBuffer    = uart1RxBuffer;
 8003db0:	4b4e      	ldr	r3, [pc, #312]	@ (8003eec <UartTasksInit+0x140>)
 8003db2:	4a4f      	ldr	r2, [pc, #316]	@ (8003ef0 <UartTasksInit+0x144>)
 8003db4:	601a      	str	r2, [r3, #0]
    uart1TaskData.uartRxBufferLen = UART1_RX_BUFF_SIZE;
 8003db6:	4b4d      	ldr	r3, [pc, #308]	@ (8003eec <UartTasksInit+0x140>)
 8003db8:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003dbc:	809a      	strh	r2, [r3, #4]
    uart1TaskData.uartTxBuffer    = uart1TxBuffer;
 8003dbe:	4b4b      	ldr	r3, [pc, #300]	@ (8003eec <UartTasksInit+0x140>)
 8003dc0:	4a4c      	ldr	r2, [pc, #304]	@ (8003ef4 <UartTasksInit+0x148>)
 8003dc2:	609a      	str	r2, [r3, #8]
    uart1TaskData.uartRxBufferLen = UART1_TX_BUFF_SIZE;
 8003dc4:	4b49      	ldr	r3, [pc, #292]	@ (8003eec <UartTasksInit+0x140>)
 8003dc6:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003dca:	809a      	strh	r2, [r3, #4]
    uart1TaskData.frameData       = uart1TaskFrameData;
 8003dcc:	4b47      	ldr	r3, [pc, #284]	@ (8003eec <UartTasksInit+0x140>)
 8003dce:	4a4a      	ldr	r2, [pc, #296]	@ (8003ef8 <UartTasksInit+0x14c>)
 8003dd0:	611a      	str	r2, [r3, #16]
    uart1TaskData.frameDataLen    = UART1_RX_BUFF_SIZE;
 8003dd2:	4b46      	ldr	r3, [pc, #280]	@ (8003eec <UartTasksInit+0x140>)
 8003dd4:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003dd8:	829a      	strh	r2, [r3, #20]
    uart1TaskData.huart           = &huart1;
 8003dda:	4b44      	ldr	r3, [pc, #272]	@ (8003eec <UartTasksInit+0x140>)
 8003ddc:	4a47      	ldr	r2, [pc, #284]	@ (8003efc <UartTasksInit+0x150>)
 8003dde:	631a      	str	r2, [r3, #48]	@ 0x30
    uart1TaskData.uartNumber      = 1;
 8003de0:	4b42      	ldr	r3, [pc, #264]	@ (8003eec <UartTasksInit+0x140>)
 8003de2:	2201      	movs	r2, #1
 8003de4:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart2TaskData.uartRxBuffer    = uart2RxBuffer;
 8003de8:	4b45      	ldr	r3, [pc, #276]	@ (8003f00 <UartTasksInit+0x154>)
 8003dea:	4a46      	ldr	r2, [pc, #280]	@ (8003f04 <UartTasksInit+0x158>)
 8003dec:	601a      	str	r2, [r3, #0]
    uart2TaskData.uartRxBufferLen = UART2_RX_BUFF_SIZE;
 8003dee:	4b44      	ldr	r3, [pc, #272]	@ (8003f00 <UartTasksInit+0x154>)
 8003df0:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003df4:	809a      	strh	r2, [r3, #4]
    uart2TaskData.uartTxBuffer    = uart2TxBuffer;
 8003df6:	4b42      	ldr	r3, [pc, #264]	@ (8003f00 <UartTasksInit+0x154>)
 8003df8:	4a43      	ldr	r2, [pc, #268]	@ (8003f08 <UartTasksInit+0x15c>)
 8003dfa:	609a      	str	r2, [r3, #8]
    uart2TaskData.uartRxBufferLen = UART2_TX_BUFF_SIZE;
 8003dfc:	4b40      	ldr	r3, [pc, #256]	@ (8003f00 <UartTasksInit+0x154>)
 8003dfe:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003e02:	809a      	strh	r2, [r3, #4]
    uart2TaskData.frameData       = uart2TaskFrameData;
 8003e04:	4b3e      	ldr	r3, [pc, #248]	@ (8003f00 <UartTasksInit+0x154>)
 8003e06:	4a41      	ldr	r2, [pc, #260]	@ (8003f0c <UartTasksInit+0x160>)
 8003e08:	611a      	str	r2, [r3, #16]
    uart2TaskData.frameDataLen    = UART2_RX_BUFF_SIZE;
 8003e0a:	4b3d      	ldr	r3, [pc, #244]	@ (8003f00 <UartTasksInit+0x154>)
 8003e0c:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003e10:	829a      	strh	r2, [r3, #20]
    uart2TaskData.huart           = &huart2;
 8003e12:	4b3b      	ldr	r3, [pc, #236]	@ (8003f00 <UartTasksInit+0x154>)
 8003e14:	4a3e      	ldr	r2, [pc, #248]	@ (8003f10 <UartTasksInit+0x164>)
 8003e16:	631a      	str	r2, [r3, #48]	@ 0x30
    uart2TaskData.uartNumber      = 2;
 8003e18:	4b39      	ldr	r3, [pc, #228]	@ (8003f00 <UartTasksInit+0x154>)
 8003e1a:	2202      	movs	r2, #2
 8003e1c:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart3TaskData.uartRxBuffer    = uart3RxBuffer;
 8003e20:	4b3c      	ldr	r3, [pc, #240]	@ (8003f14 <UartTasksInit+0x168>)
 8003e22:	4a3d      	ldr	r2, [pc, #244]	@ (8003f18 <UartTasksInit+0x16c>)
 8003e24:	601a      	str	r2, [r3, #0]
    uart3TaskData.uartRxBufferLen = UART3_RX_BUFF_SIZE;
 8003e26:	4b3b      	ldr	r3, [pc, #236]	@ (8003f14 <UartTasksInit+0x168>)
 8003e28:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003e2c:	809a      	strh	r2, [r3, #4]
    uart3TaskData.uartTxBuffer    = uart3TxBuffer;
 8003e2e:	4b39      	ldr	r3, [pc, #228]	@ (8003f14 <UartTasksInit+0x168>)
 8003e30:	4a3a      	ldr	r2, [pc, #232]	@ (8003f1c <UartTasksInit+0x170>)
 8003e32:	609a      	str	r2, [r3, #8]
    uart3TaskData.uartRxBufferLen = UART3_TX_BUFF_SIZE;
 8003e34:	4b37      	ldr	r3, [pc, #220]	@ (8003f14 <UartTasksInit+0x168>)
 8003e36:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003e3a:	809a      	strh	r2, [r3, #4]
    uart3TaskData.frameData       = uart3TaskFrameData;
 8003e3c:	4b35      	ldr	r3, [pc, #212]	@ (8003f14 <UartTasksInit+0x168>)
 8003e3e:	4a38      	ldr	r2, [pc, #224]	@ (8003f20 <UartTasksInit+0x174>)
 8003e40:	611a      	str	r2, [r3, #16]
    uart3TaskData.frameDataLen    = UART3_RX_BUFF_SIZE;
 8003e42:	4b34      	ldr	r3, [pc, #208]	@ (8003f14 <UartTasksInit+0x168>)
 8003e44:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003e48:	829a      	strh	r2, [r3, #20]
    uart3TaskData.huart           = &huart3;
 8003e4a:	4b32      	ldr	r3, [pc, #200]	@ (8003f14 <UartTasksInit+0x168>)
 8003e4c:	4a35      	ldr	r2, [pc, #212]	@ (8003f24 <UartTasksInit+0x178>)
 8003e4e:	631a      	str	r2, [r3, #48]	@ 0x30
    uart3TaskData.uartNumber      = 3;
 8003e50:	4b30      	ldr	r3, [pc, #192]	@ (8003f14 <UartTasksInit+0x168>)
 8003e52:	2203      	movs	r2, #3
 8003e54:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart6TaskData.uartRxBuffer    = uart6RxBuffer;
 8003e58:	4b33      	ldr	r3, [pc, #204]	@ (8003f28 <UartTasksInit+0x17c>)
 8003e5a:	4a34      	ldr	r2, [pc, #208]	@ (8003f2c <UartTasksInit+0x180>)
 8003e5c:	601a      	str	r2, [r3, #0]
    uart6TaskData.uartRxBufferLen = UART6_RX_BUFF_SIZE;
 8003e5e:	4b32      	ldr	r3, [pc, #200]	@ (8003f28 <UartTasksInit+0x17c>)
 8003e60:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003e64:	809a      	strh	r2, [r3, #4]
    uart6TaskData.uartTxBuffer    = uart6TxBuffer;
 8003e66:	4b30      	ldr	r3, [pc, #192]	@ (8003f28 <UartTasksInit+0x17c>)
 8003e68:	4a31      	ldr	r2, [pc, #196]	@ (8003f30 <UartTasksInit+0x184>)
 8003e6a:	609a      	str	r2, [r3, #8]
    uart6TaskData.uartRxBufferLen = UART6_TX_BUFF_SIZE;
 8003e6c:	4b2e      	ldr	r3, [pc, #184]	@ (8003f28 <UartTasksInit+0x17c>)
 8003e6e:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003e72:	809a      	strh	r2, [r3, #4]
    uart6TaskData.frameData       = uart6TaskFrameData;
 8003e74:	4b2c      	ldr	r3, [pc, #176]	@ (8003f28 <UartTasksInit+0x17c>)
 8003e76:	4a2f      	ldr	r2, [pc, #188]	@ (8003f34 <UartTasksInit+0x188>)
 8003e78:	611a      	str	r2, [r3, #16]
    uart6TaskData.frameDataLen    = UART6_RX_BUFF_SIZE;
 8003e7a:	4b2b      	ldr	r3, [pc, #172]	@ (8003f28 <UartTasksInit+0x17c>)
 8003e7c:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003e80:	829a      	strh	r2, [r3, #20]
    uart6TaskData.huart           = &huart6;
 8003e82:	4b29      	ldr	r3, [pc, #164]	@ (8003f28 <UartTasksInit+0x17c>)
 8003e84:	4a2c      	ldr	r2, [pc, #176]	@ (8003f38 <UartTasksInit+0x18c>)
 8003e86:	631a      	str	r2, [r3, #48]	@ 0x30
    uart6TaskData.uartNumber      = 6;
 8003e88:	4b27      	ldr	r3, [pc, #156]	@ (8003f28 <UartTasksInit+0x17c>)
 8003e8a:	2206      	movs	r2, #6
 8003e8c:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart8TaskData.uartRxBuffer    = uart8RxBuffer;
 8003e90:	4b2a      	ldr	r3, [pc, #168]	@ (8003f3c <UartTasksInit+0x190>)
 8003e92:	4a2b      	ldr	r2, [pc, #172]	@ (8003f40 <UartTasksInit+0x194>)
 8003e94:	601a      	str	r2, [r3, #0]
    uart8TaskData.uartRxBufferLen = UART8_RX_BUFF_SIZE;
 8003e96:	4b29      	ldr	r3, [pc, #164]	@ (8003f3c <UartTasksInit+0x190>)
 8003e98:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003e9c:	809a      	strh	r2, [r3, #4]
    uart8TaskData.uartTxBuffer    = uart8TxBuffer;
 8003e9e:	4b27      	ldr	r3, [pc, #156]	@ (8003f3c <UartTasksInit+0x190>)
 8003ea0:	4a28      	ldr	r2, [pc, #160]	@ (8003f44 <UartTasksInit+0x198>)
 8003ea2:	609a      	str	r2, [r3, #8]
    uart8TaskData.uartRxBufferLen = UART8_TX_BUFF_SIZE;
 8003ea4:	4b25      	ldr	r3, [pc, #148]	@ (8003f3c <UartTasksInit+0x190>)
 8003ea6:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003eaa:	809a      	strh	r2, [r3, #4]
    uart8TaskData.frameData       = uart8TaskFrameData;
 8003eac:	4b23      	ldr	r3, [pc, #140]	@ (8003f3c <UartTasksInit+0x190>)
 8003eae:	4a26      	ldr	r2, [pc, #152]	@ (8003f48 <UartTasksInit+0x19c>)
 8003eb0:	611a      	str	r2, [r3, #16]
    uart8TaskData.frameDataLen    = UART8_RX_BUFF_SIZE;
 8003eb2:	4b22      	ldr	r3, [pc, #136]	@ (8003f3c <UartTasksInit+0x190>)
 8003eb4:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003eb8:	829a      	strh	r2, [r3, #20]
    uart8TaskData.huart           = &huart8;
 8003eba:	4b20      	ldr	r3, [pc, #128]	@ (8003f3c <UartTasksInit+0x190>)
 8003ebc:	4a23      	ldr	r2, [pc, #140]	@ (8003f4c <UartTasksInit+0x1a0>)
 8003ebe:	631a      	str	r2, [r3, #48]	@ 0x30
    uart8TaskData.uartNumber      = 8;
 8003ec0:	4b1e      	ldr	r3, [pc, #120]	@ (8003f3c <UartTasksInit+0x190>)
 8003ec2:	2208      	movs	r2, #8
 8003ec4:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    UartTaskCreate (&uart1TaskData);
 8003ec8:	4808      	ldr	r0, [pc, #32]	@ (8003eec <UartTasksInit+0x140>)
 8003eca:	f000 f841 	bl	8003f50 <UartTaskCreate>
    UartTaskCreate (&uart2TaskData);
 8003ece:	480c      	ldr	r0, [pc, #48]	@ (8003f00 <UartTasksInit+0x154>)
 8003ed0:	f000 f83e 	bl	8003f50 <UartTaskCreate>
    UartTaskCreate (&uart3TaskData);
 8003ed4:	480f      	ldr	r0, [pc, #60]	@ (8003f14 <UartTasksInit+0x168>)
 8003ed6:	f000 f83b 	bl	8003f50 <UartTaskCreate>
    UartTaskCreate (&uart6TaskData);
 8003eda:	4813      	ldr	r0, [pc, #76]	@ (8003f28 <UartTasksInit+0x17c>)
 8003edc:	f000 f838 	bl	8003f50 <UartTaskCreate>
    UartTaskCreate (&uart8TaskData);
 8003ee0:	4816      	ldr	r0, [pc, #88]	@ (8003f3c <UartTasksInit+0x190>)
 8003ee2:	f000 f835 	bl	8003f50 <UartTaskCreate>
}
 8003ee6:	bf00      	nop
 8003ee8:	bd80      	pop	{r7, pc}
 8003eea:	bf00      	nop
 8003eec:	24001e2c 	.word	0x24001e2c
 8003ef0:	24000f2c 	.word	0x24000f2c
 8003ef4:	2400102c 	.word	0x2400102c
 8003ef8:	2400112c 	.word	0x2400112c
 8003efc:	24000314 	.word	0x24000314
 8003f00:	24001ed4 	.word	0x24001ed4
 8003f04:	2400122c 	.word	0x2400122c
 8003f08:	2400132c 	.word	0x2400132c
 8003f0c:	2400142c 	.word	0x2400142c
 8003f10:	240003a8 	.word	0x240003a8
 8003f14:	24001e64 	.word	0x24001e64
 8003f18:	2400152c 	.word	0x2400152c
 8003f1c:	2400162c 	.word	0x2400162c
 8003f20:	2400172c 	.word	0x2400172c
 8003f24:	2400043c 	.word	0x2400043c
 8003f28:	24001e9c 	.word	0x24001e9c
 8003f2c:	2400182c 	.word	0x2400182c
 8003f30:	2400192c 	.word	0x2400192c
 8003f34:	24001a2c 	.word	0x24001a2c
 8003f38:	240004d0 	.word	0x240004d0
 8003f3c:	24001f0c 	.word	0x24001f0c
 8003f40:	24001b2c 	.word	0x24001b2c
 8003f44:	24001c2c 	.word	0x24001c2c
 8003f48:	24001d2c 	.word	0x24001d2c
 8003f4c:	24000280 	.word	0x24000280

08003f50 <UartTaskCreate>:

void UartTaskCreate (UartTaskData* uartTaskData) {
 8003f50:	b580      	push	{r7, lr}
 8003f52:	b09a      	sub	sp, #104	@ 0x68
 8003f54:	af00      	add	r7, sp, #0
 8003f56:	6078      	str	r0, [r7, #4]
    osThreadAttr_t osThreadAttrRxUart = { 0 };
 8003f58:	f107 0344 	add.w	r3, r7, #68	@ 0x44
 8003f5c:	2224      	movs	r2, #36	@ 0x24
 8003f5e:	2100      	movs	r1, #0
 8003f60:	4618      	mov	r0, r3
 8003f62:	f025 fecd 	bl	8029d00 <memset>
    osThreadAttr_t osThreadAttrTxUart = { 0 };
 8003f66:	f107 0320 	add.w	r3, r7, #32
 8003f6a:	2224      	movs	r2, #36	@ 0x24
 8003f6c:	2100      	movs	r1, #0
 8003f6e:	4618      	mov	r0, r3
 8003f70:	f025 fec6 	bl	8029d00 <memset>

    uartTaskData->processRxDataMsgBuffer = xMessageBufferCreate (INPUT_DATA_BUFF_SIZE);
 8003f74:	2201      	movs	r2, #1
 8003f76:	2100      	movs	r1, #0
 8003f78:	f44f 7080 	mov.w	r0, #256	@ 0x100
 8003f7c:	f00e faf8 	bl	8012570 <xStreamBufferGenericCreate>
 8003f80:	4602      	mov	r2, r0
 8003f82:	687b      	ldr	r3, [r7, #4]
 8003f84:	625a      	str	r2, [r3, #36]	@ 0x24
    uartTaskData->processDataCb          = NULL;
 8003f86:	687b      	ldr	r3, [r7, #4]
 8003f88:	2200      	movs	r2, #0
 8003f8a:	629a      	str	r2, [r3, #40]	@ 0x28

    //    osThreadAttrRxUart.name       = "os_thread_uart1_rx";
    osThreadAttrRxUart.stack_size = configMINIMAL_STACK_SIZE * 2;
 8003f8c:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8003f90:	65bb      	str	r3, [r7, #88]	@ 0x58
    osThreadAttrRxUart.priority   = (osPriority_t)osPriorityHigh;
 8003f92:	2328      	movs	r3, #40	@ 0x28
 8003f94:	65fb      	str	r3, [r7, #92]	@ 0x5c


    uartTaskData->uartRecieveTaskHandle = osThreadNew (UartRxTask, uartTaskData, &osThreadAttrRxUart);
 8003f96:	f107 0344 	add.w	r3, r7, #68	@ 0x44
 8003f9a:	461a      	mov	r2, r3
 8003f9c:	6879      	ldr	r1, [r7, #4]
 8003f9e:	4816      	ldr	r0, [pc, #88]	@ (8003ff8 <UartTaskCreate+0xa8>)
 8003fa0:	f00c fc5b 	bl	801085a <osThreadNew>
 8003fa4:	4602      	mov	r2, r0
 8003fa6:	687b      	ldr	r3, [r7, #4]
 8003fa8:	619a      	str	r2, [r3, #24]


    osMessageQueueAttr_t uartTxMsgQueueAttr = { 0 };
 8003faa:	f107 0308 	add.w	r3, r7, #8
 8003fae:	2200      	movs	r2, #0
 8003fb0:	601a      	str	r2, [r3, #0]
 8003fb2:	605a      	str	r2, [r3, #4]
 8003fb4:	609a      	str	r2, [r3, #8]
 8003fb6:	60da      	str	r2, [r3, #12]
 8003fb8:	611a      	str	r2, [r3, #16]
 8003fba:	615a      	str	r2, [r3, #20]
    //    uartTxMsgQueueAttr.name                 = "uart1TxMsgQueue";
    uartTaskData->sendCmdToSlaveQueue = osMessageQueueNew (16, sizeof (InterProcessData), &uartTxMsgQueueAttr);
 8003fbc:	f107 0308 	add.w	r3, r7, #8
 8003fc0:	461a      	mov	r2, r3
 8003fc2:	210c      	movs	r1, #12
 8003fc4:	2010      	movs	r0, #16
 8003fc6:	f00c ff53 	bl	8010e70 <osMessageQueueNew>
 8003fca:	4602      	mov	r2, r0
 8003fcc:	687b      	ldr	r3, [r7, #4]
 8003fce:	62da      	str	r2, [r3, #44]	@ 0x2c

    //    osThreadAttrTxUart.name              = "os_thread_uart1_tx";
    osThreadAttrTxUart.stack_size        = configMINIMAL_STACK_SIZE * 4;
 8003fd0:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 8003fd4:	637b      	str	r3, [r7, #52]	@ 0x34
    osThreadAttrTxUart.priority          = (osPriority_t)osPriorityNormal;
 8003fd6:	2318      	movs	r3, #24
 8003fd8:	63bb      	str	r3, [r7, #56]	@ 0x38
    uartTaskData->uartTransmitTaskHandle = osThreadNew (UartTxTask, uartTaskData, &osThreadAttrTxUart);
 8003fda:	f107 0320 	add.w	r3, r7, #32
 8003fde:	461a      	mov	r2, r3
 8003fe0:	6879      	ldr	r1, [r7, #4]
 8003fe2:	4806      	ldr	r0, [pc, #24]	@ (8003ffc <UartTaskCreate+0xac>)
 8003fe4:	f00c fc39 	bl	801085a <osThreadNew>
 8003fe8:	4602      	mov	r2, r0
 8003fea:	687b      	ldr	r3, [r7, #4]
 8003fec:	61da      	str	r2, [r3, #28]
}
 8003fee:	bf00      	nop
 8003ff0:	3768      	adds	r7, #104	@ 0x68
 8003ff2:	46bd      	mov	sp, r7
 8003ff4:	bd80      	pop	{r7, pc}
 8003ff6:	bf00      	nop
 8003ff8:	08004175 	.word	0x08004175
 8003ffc:	08004761 	.word	0x08004761

08004000 <HAL_UART_RxCpltCallback>:

void HAL_UART_RxCpltCallback (UART_HandleTypeDef* huart) {
 8004000:	b480      	push	{r7}
 8004002:	b083      	sub	sp, #12
 8004004:	af00      	add	r7, sp, #0
 8004006:	6078      	str	r0, [r7, #4]
    //	osSemaphoreRelease(uart8RxSemaphore);
}
 8004008:	bf00      	nop
 800400a:	370c      	adds	r7, #12
 800400c:	46bd      	mov	sp, r7
 800400e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004012:	4770      	bx	lr

08004014 <HAL_UARTEx_RxEventCallback>:

void HAL_UARTEx_RxEventCallback (UART_HandleTypeDef* huart, uint16_t Size) {
 8004014:	b580      	push	{r7, lr}
 8004016:	b082      	sub	sp, #8
 8004018:	af00      	add	r7, sp, #0
 800401a:	6078      	str	r0, [r7, #4]
 800401c:	460b      	mov	r3, r1
 800401e:	807b      	strh	r3, [r7, #2]
    if (huart->Instance == USART1) {
 8004020:	687b      	ldr	r3, [r7, #4]
 8004022:	681b      	ldr	r3, [r3, #0]
 8004024:	4a1e      	ldr	r2, [pc, #120]	@ (80040a0 <HAL_UARTEx_RxEventCallback+0x8c>)
 8004026:	4293      	cmp	r3, r2
 8004028:	d106      	bne.n	8004038 <HAL_UARTEx_RxEventCallback+0x24>
        HandleUartRxCallback (&uart1TaskData, huart, Size);
 800402a:	887b      	ldrh	r3, [r7, #2]
 800402c:	461a      	mov	r2, r3
 800402e:	6879      	ldr	r1, [r7, #4]
 8004030:	481c      	ldr	r0, [pc, #112]	@ (80040a4 <HAL_UARTEx_RxEventCallback+0x90>)
 8004032:	f000 f853 	bl	80040dc <HandleUartRxCallback>
    } else if (huart->Instance == USART6) {
        HandleUartRxCallback (&uart6TaskData, huart, Size);
    } else if (huart->Instance == UART8) {
        HandleUartRxCallback (&uart8TaskData, huart, Size);
    }
}
 8004036:	e02e      	b.n	8004096 <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == USART2) {
 8004038:	687b      	ldr	r3, [r7, #4]
 800403a:	681b      	ldr	r3, [r3, #0]
 800403c:	4a1a      	ldr	r2, [pc, #104]	@ (80040a8 <HAL_UARTEx_RxEventCallback+0x94>)
 800403e:	4293      	cmp	r3, r2
 8004040:	d106      	bne.n	8004050 <HAL_UARTEx_RxEventCallback+0x3c>
        HandleUartRxCallback (&uart2TaskData, huart, Size);
 8004042:	887b      	ldrh	r3, [r7, #2]
 8004044:	461a      	mov	r2, r3
 8004046:	6879      	ldr	r1, [r7, #4]
 8004048:	4818      	ldr	r0, [pc, #96]	@ (80040ac <HAL_UARTEx_RxEventCallback+0x98>)
 800404a:	f000 f847 	bl	80040dc <HandleUartRxCallback>
}
 800404e:	e022      	b.n	8004096 <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == USART3) {
 8004050:	687b      	ldr	r3, [r7, #4]
 8004052:	681b      	ldr	r3, [r3, #0]
 8004054:	4a16      	ldr	r2, [pc, #88]	@ (80040b0 <HAL_UARTEx_RxEventCallback+0x9c>)
 8004056:	4293      	cmp	r3, r2
 8004058:	d106      	bne.n	8004068 <HAL_UARTEx_RxEventCallback+0x54>
        HandleUartRxCallback (&uart3TaskData, huart, Size);
 800405a:	887b      	ldrh	r3, [r7, #2]
 800405c:	461a      	mov	r2, r3
 800405e:	6879      	ldr	r1, [r7, #4]
 8004060:	4814      	ldr	r0, [pc, #80]	@ (80040b4 <HAL_UARTEx_RxEventCallback+0xa0>)
 8004062:	f000 f83b 	bl	80040dc <HandleUartRxCallback>
}
 8004066:	e016      	b.n	8004096 <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == USART6) {
 8004068:	687b      	ldr	r3, [r7, #4]
 800406a:	681b      	ldr	r3, [r3, #0]
 800406c:	4a12      	ldr	r2, [pc, #72]	@ (80040b8 <HAL_UARTEx_RxEventCallback+0xa4>)
 800406e:	4293      	cmp	r3, r2
 8004070:	d106      	bne.n	8004080 <HAL_UARTEx_RxEventCallback+0x6c>
        HandleUartRxCallback (&uart6TaskData, huart, Size);
 8004072:	887b      	ldrh	r3, [r7, #2]
 8004074:	461a      	mov	r2, r3
 8004076:	6879      	ldr	r1, [r7, #4]
 8004078:	4810      	ldr	r0, [pc, #64]	@ (80040bc <HAL_UARTEx_RxEventCallback+0xa8>)
 800407a:	f000 f82f 	bl	80040dc <HandleUartRxCallback>
}
 800407e:	e00a      	b.n	8004096 <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == UART8) {
 8004080:	687b      	ldr	r3, [r7, #4]
 8004082:	681b      	ldr	r3, [r3, #0]
 8004084:	4a0e      	ldr	r2, [pc, #56]	@ (80040c0 <HAL_UARTEx_RxEventCallback+0xac>)
 8004086:	4293      	cmp	r3, r2
 8004088:	d105      	bne.n	8004096 <HAL_UARTEx_RxEventCallback+0x82>
        HandleUartRxCallback (&uart8TaskData, huart, Size);
 800408a:	887b      	ldrh	r3, [r7, #2]
 800408c:	461a      	mov	r2, r3
 800408e:	6879      	ldr	r1, [r7, #4]
 8004090:	480c      	ldr	r0, [pc, #48]	@ (80040c4 <HAL_UARTEx_RxEventCallback+0xb0>)
 8004092:	f000 f823 	bl	80040dc <HandleUartRxCallback>
}
 8004096:	bf00      	nop
 8004098:	3708      	adds	r7, #8
 800409a:	46bd      	mov	sp, r7
 800409c:	bd80      	pop	{r7, pc}
 800409e:	bf00      	nop
 80040a0:	40011000 	.word	0x40011000
 80040a4:	24001e2c 	.word	0x24001e2c
 80040a8:	40004400 	.word	0x40004400
 80040ac:	24001ed4 	.word	0x24001ed4
 80040b0:	40004800 	.word	0x40004800
 80040b4:	24001e64 	.word	0x24001e64
 80040b8:	40011400 	.word	0x40011400
 80040bc:	24001e9c 	.word	0x24001e9c
 80040c0:	40007c00 	.word	0x40007c00
 80040c4:	24001f0c 	.word	0x24001f0c

080040c8 <HAL_UART_TxCpltCallback>:

void HAL_UART_TxCpltCallback (UART_HandleTypeDef* huart) {
 80040c8:	b480      	push	{r7}
 80040ca:	b083      	sub	sp, #12
 80040cc:	af00      	add	r7, sp, #0
 80040ce:	6078      	str	r0, [r7, #4]
    if (huart->Instance == UART8) {
    }
}
 80040d0:	bf00      	nop
 80040d2:	370c      	adds	r7, #12
 80040d4:	46bd      	mov	sp, r7
 80040d6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80040da:	4770      	bx	lr

080040dc <HandleUartRxCallback>:

void HandleUartRxCallback (UartTaskData* uartTaskData, UART_HandleTypeDef* huart, uint16_t Size) {
 80040dc:	b580      	push	{r7, lr}
 80040de:	b088      	sub	sp, #32
 80040e0:	af02      	add	r7, sp, #8
 80040e2:	60f8      	str	r0, [r7, #12]
 80040e4:	60b9      	str	r1, [r7, #8]
 80040e6:	4613      	mov	r3, r2
 80040e8:	80fb      	strh	r3, [r7, #6]
    BaseType_t pxHigherPriorityTaskWoken = pdFALSE;
 80040ea:	2300      	movs	r3, #0
 80040ec:	617b      	str	r3, [r7, #20]
    osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 80040ee:	68fb      	ldr	r3, [r7, #12]
 80040f0:	6a1b      	ldr	r3, [r3, #32]
 80040f2:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80040f6:	4618      	mov	r0, r3
 80040f8:	f00c fcee 	bl	8010ad8 <osMutexAcquire>
    memcpy (&(uartTaskData->frameData[uartTaskData->frameBytesCount]), uartTaskData->uartRxBuffer, Size);
 80040fc:	68fb      	ldr	r3, [r7, #12]
 80040fe:	691b      	ldr	r3, [r3, #16]
 8004100:	68fa      	ldr	r2, [r7, #12]
 8004102:	8ad2      	ldrh	r2, [r2, #22]
 8004104:	1898      	adds	r0, r3, r2
 8004106:	68fb      	ldr	r3, [r7, #12]
 8004108:	681b      	ldr	r3, [r3, #0]
 800410a:	88fa      	ldrh	r2, [r7, #6]
 800410c:	4619      	mov	r1, r3
 800410e:	f025 feee 	bl	8029eee <memcpy>
    uartTaskData->frameBytesCount += Size;
 8004112:	68fb      	ldr	r3, [r7, #12]
 8004114:	8ada      	ldrh	r2, [r3, #22]
 8004116:	88fb      	ldrh	r3, [r7, #6]
 8004118:	4413      	add	r3, r2
 800411a:	b29a      	uxth	r2, r3
 800411c:	68fb      	ldr	r3, [r7, #12]
 800411e:	82da      	strh	r2, [r3, #22]
    osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004120:	68fb      	ldr	r3, [r7, #12]
 8004122:	6a1b      	ldr	r3, [r3, #32]
 8004124:	4618      	mov	r0, r3
 8004126:	f00c fd22 	bl	8010b6e <osMutexRelease>
    xTaskNotifyFromISR (uartTaskData->uartRecieveTaskHandle, Size, eSetValueWithOverwrite, &pxHigherPriorityTaskWoken);
 800412a:	68fb      	ldr	r3, [r7, #12]
 800412c:	6998      	ldr	r0, [r3, #24]
 800412e:	88f9      	ldrh	r1, [r7, #6]
 8004130:	f107 0314 	add.w	r3, r7, #20
 8004134:	9300      	str	r3, [sp, #0]
 8004136:	2300      	movs	r3, #0
 8004138:	2203      	movs	r2, #3
 800413a:	f00f ff11 	bl	8013f60 <xTaskGenericNotifyFromISR>
    //	HAL_UARTEx_ReceiveToIdle_DMA(huart, uart8RxBuffer, UART8_RX_BUFF_SIZE);
    //	__HAL_DMA_DISABLE_IT(&hdma_uart8_rx, DMA_IT_HT);
    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 800413e:	68fb      	ldr	r3, [r7, #12]
 8004140:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8004142:	68fb      	ldr	r3, [r7, #12]
 8004144:	6819      	ldr	r1, [r3, #0]
 8004146:	68fb      	ldr	r3, [r7, #12]
 8004148:	889b      	ldrh	r3, [r3, #4]
 800414a:	461a      	mov	r2, r3
 800414c:	f00b fb91 	bl	800f872 <HAL_UARTEx_ReceiveToIdle_IT>
    portEND_SWITCHING_ISR (pxHigherPriorityTaskWoken);
 8004150:	697b      	ldr	r3, [r7, #20]
 8004152:	2b00      	cmp	r3, #0
 8004154:	d007      	beq.n	8004166 <HandleUartRxCallback+0x8a>
 8004156:	4b06      	ldr	r3, [pc, #24]	@ (8004170 <HandleUartRxCallback+0x94>)
 8004158:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 800415c:	601a      	str	r2, [r3, #0]
 800415e:	f3bf 8f4f 	dsb	sy
 8004162:	f3bf 8f6f 	isb	sy
}
 8004166:	bf00      	nop
 8004168:	3718      	adds	r7, #24
 800416a:	46bd      	mov	sp, r7
 800416c:	bd80      	pop	{r7, pc}
 800416e:	bf00      	nop
 8004170:	e000ed04 	.word	0xe000ed04

08004174 <UartRxTask>:

void UartRxTask (void* argument) {
 8004174:	b580      	push	{r7, lr}
 8004176:	b0d2      	sub	sp, #328	@ 0x148
 8004178:	af02      	add	r7, sp, #8
 800417a:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800417e:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 8004182:	6018      	str	r0, [r3, #0]
    UartTaskData* uartTaskData             = (UartTaskData*)argument;
 8004184:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004188:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 800418c:	681b      	ldr	r3, [r3, #0]
 800418e:	f8c7 312c 	str.w	r3, [r7, #300]	@ 0x12c
    SerialProtocolFrameData spFrameData    = { 0 };
 8004192:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004196:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800419a:	4618      	mov	r0, r3
 800419c:	f44f 7386 	mov.w	r3, #268	@ 0x10c
 80041a0:	461a      	mov	r2, r3
 80041a2:	2100      	movs	r1, #0
 80041a4:	f025 fdac 	bl	8029d00 <memset>
    uint32_t bytesRec                      = 0;
 80041a8:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80041ac:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 80041b0:	2200      	movs	r2, #0
 80041b2:	601a      	str	r2, [r3, #0]
    uint32_t crc                           = 0;
 80041b4:	2300      	movs	r3, #0
 80041b6:	f8c7 3128 	str.w	r3, [r7, #296]	@ 0x128
    uint16_t frameCommandRaw               = 0x0000;
 80041ba:	2300      	movs	r3, #0
 80041bc:	f8a7 3126 	strh.w	r3, [r7, #294]	@ 0x126
    uint16_t frameBytesCount               = 0;
 80041c0:	2300      	movs	r3, #0
 80041c2:	f8a7 3124 	strh.w	r3, [r7, #292]	@ 0x124
    uint16_t frameCrc                      = 0;
 80041c6:	2300      	movs	r3, #0
 80041c8:	f8a7 3122 	strh.w	r3, [r7, #290]	@ 0x122
    uint16_t frameTotalLength              = 0;
 80041cc:	2300      	movs	r3, #0
 80041ce:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
    uint16_t dataToSend                    = 0;
 80041d2:	2300      	movs	r3, #0
 80041d4:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
    portBASE_TYPE crcPass                  = pdFAIL;
 80041d8:	2300      	movs	r3, #0
 80041da:	f8c7 3138 	str.w	r3, [r7, #312]	@ 0x138
    portBASE_TYPE proceed                  = pdFALSE;
 80041de:	2300      	movs	r3, #0
 80041e0:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
    portBASE_TYPE frameTimeout             = pdFAIL;
 80041e4:	2300      	movs	r3, #0
 80041e6:	f8c7 311c 	str.w	r3, [r7, #284]	@ 0x11c
    enum SerialReceiverStates receverState = srWaitForHeader;
 80041ea:	2300      	movs	r3, #0
 80041ec:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133

    uartTaskData->rxDataBufferMutex = osMutexNew (NULL);
 80041f0:	2000      	movs	r0, #0
 80041f2:	f00c fbeb 	bl	80109cc <osMutexNew>
 80041f6:	4602      	mov	r2, r0
 80041f8:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80041fc:	621a      	str	r2, [r3, #32]
    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 80041fe:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004202:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8004204:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004208:	6819      	ldr	r1, [r3, #0]
 800420a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800420e:	889b      	ldrh	r3, [r3, #4]
 8004210:	461a      	mov	r2, r3
 8004212:	f00b fb2e 	bl	800f872 <HAL_UARTEx_ReceiveToIdle_IT>
    //	HAL_UARTEx_ReceiveToIdle_DMA(&huart8, uart8RxBuffer, 32);
    while (pdTRUE) {
        //		HAL_UART_Receive_IT(&huart8, uart8RxBuffer, 1);
        //		if(osSemaphoreAcquire(uart8RxSemaphore, pdMS_TO_TICKS(1000)) !=
        // osOK) 		if(xTaskNotifyWait(0, 0, &bytesRec, portMAX_DELAY) == pdTrue)
        frameTimeout = !(xTaskNotifyWait (0, 0, &bytesRec, pdMS_TO_TICKS (FRAME_TIMEOUT_MS)));
 8004216:	f107 020c 	add.w	r2, r7, #12
 800421a:	f44f 63fa 	mov.w	r3, #2000	@ 0x7d0
 800421e:	2100      	movs	r1, #0
 8004220:	2000      	movs	r0, #0
 8004222:	f00f fd7b 	bl	8013d1c <xTaskNotifyWait>
 8004226:	4603      	mov	r3, r0
 8004228:	2b00      	cmp	r3, #0
 800422a:	bf0c      	ite	eq
 800422c:	2301      	moveq	r3, #1
 800422e:	2300      	movne	r3, #0
 8004230:	b2db      	uxtb	r3, r3
 8004232:	f8c7 311c 	str.w	r3, [r7, #284]	@ 0x11c

        osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004236:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800423a:	6a1b      	ldr	r3, [r3, #32]
 800423c:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004240:	4618      	mov	r0, r3
 8004242:	f00c fc49 	bl	8010ad8 <osMutexAcquire>
        frameBytesCount = uartTaskData->frameBytesCount;
 8004246:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800424a:	8adb      	ldrh	r3, [r3, #22]
 800424c:	f8a7 3124 	strh.w	r3, [r7, #292]	@ 0x124
        osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004250:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004254:	6a1b      	ldr	r3, [r3, #32]
 8004256:	4618      	mov	r0, r3
 8004258:	f00c fc89 	bl	8010b6e <osMutexRelease>
        if ((frameTimeout == pdTRUE) && (frameBytesCount > 0)) {
 800425c:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 8004260:	2b01      	cmp	r3, #1
 8004262:	d10a      	bne.n	800427a <UartRxTask+0x106>
 8004264:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004268:	2b00      	cmp	r3, #0
 800426a:	d006      	beq.n	800427a <UartRxTask+0x106>
            receverState = srFail;
 800426c:	2304      	movs	r3, #4
 800426e:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
            proceed      = pdTRUE;
 8004272:	2301      	movs	r3, #1
 8004274:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
 8004278:	e029      	b.n	80042ce <UartRxTask+0x15a>
        } else {
            if (frameTimeout == pdFALSE) {
 800427a:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 800427e:	2b00      	cmp	r3, #0
 8004280:	d111      	bne.n	80042a6 <UartRxTask+0x132>
                proceed = pdTRUE;
 8004282:	2301      	movs	r3, #1
 8004284:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
#if UART_TASK_LOGS
                printf ("Uart%d: RX bytes received: %ld\n", uartTaskData->uartNumber, bytesRec);
 8004288:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800428c:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004290:	4619      	mov	r1, r3
 8004292:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004296:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 800429a:	681b      	ldr	r3, [r3, #0]
 800429c:	461a      	mov	r2, r3
 800429e:	48c1      	ldr	r0, [pc, #772]	@ (80045a4 <UartRxTask+0x430>)
 80042a0:	f025 fb9c 	bl	80299dc <iprintf>
 80042a4:	e22f      	b.n	8004706 <UartRxTask+0x592>
#endif
            } else {
                if (uartTaskData->huart->RxState == HAL_UART_STATE_READY) {
 80042a6:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80042aa:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80042ac:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 80042b0:	2b20      	cmp	r3, #32
 80042b2:	f040 8228 	bne.w	8004706 <UartRxTask+0x592>
                    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 80042b6:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80042ba:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 80042bc:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80042c0:	6819      	ldr	r1, [r3, #0]
 80042c2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80042c6:	889b      	ldrh	r3, [r3, #4]
 80042c8:	461a      	mov	r2, r3
 80042ca:	f00b fad2 	bl	800f872 <HAL_UARTEx_ReceiveToIdle_IT>
                }
            }
        }

        while (proceed) {
 80042ce:	e21a      	b.n	8004706 <UartRxTask+0x592>
            switch (receverState) {
 80042d0:	f897 3133 	ldrb.w	r3, [r7, #307]	@ 0x133
 80042d4:	2b04      	cmp	r3, #4
 80042d6:	f200 81f1 	bhi.w	80046bc <UartRxTask+0x548>
 80042da:	a201      	add	r2, pc, #4	@ (adr r2, 80042e0 <UartRxTask+0x16c>)
 80042dc:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80042e0:	080042f5 	.word	0x080042f5
 80042e4:	08004457 	.word	0x08004457
 80042e8:	0800443b 	.word	0x0800443b
 80042ec:	080044f7 	.word	0x080044f7
 80042f0:	080045b1 	.word	0x080045b1
            case srWaitForHeader:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 80042f4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80042f8:	6a1b      	ldr	r3, [r3, #32]
 80042fa:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80042fe:	4618      	mov	r0, r3
 8004300:	f00c fbea 	bl	8010ad8 <osMutexAcquire>
                if (uartTaskData->frameData[0] == FRAME_INDICATOR) {
 8004304:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004308:	691b      	ldr	r3, [r3, #16]
 800430a:	781b      	ldrb	r3, [r3, #0]
 800430c:	2baa      	cmp	r3, #170	@ 0xaa
 800430e:	f040 8082 	bne.w	8004416 <UartRxTask+0x2a2>
                    if (frameBytesCount > FRAME_ID_LENGTH) {
 8004312:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004316:	2b02      	cmp	r3, #2
 8004318:	d914      	bls.n	8004344 <UartRxTask+0x1d0>
                        spFrameData.frameHeader.frameId =
                        CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH - FRAME_ID_LENGTH - FRAME_COMMAND_LENGTH]));
 800431a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800431e:	691b      	ldr	r3, [r3, #16]
 8004320:	3302      	adds	r3, #2
 8004322:	781b      	ldrb	r3, [r3, #0]
 8004324:	021b      	lsls	r3, r3, #8
 8004326:	b21a      	sxth	r2, r3
 8004328:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800432c:	691b      	ldr	r3, [r3, #16]
 800432e:	3301      	adds	r3, #1
 8004330:	781b      	ldrb	r3, [r3, #0]
 8004332:	b21b      	sxth	r3, r3
 8004334:	4313      	orrs	r3, r2
 8004336:	b21b      	sxth	r3, r3
 8004338:	b29a      	uxth	r2, r3
                        spFrameData.frameHeader.frameId =
 800433a:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800433e:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004342:	801a      	strh	r2, [r3, #0]
                    }
                    if (frameBytesCount > FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH) {
 8004344:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004348:	2b04      	cmp	r3, #4
 800434a:	d923      	bls.n	8004394 <UartRxTask+0x220>
                        frameCommandRaw = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH - FRAME_COMMAND_LENGTH]));
 800434c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004350:	691b      	ldr	r3, [r3, #16]
 8004352:	3304      	adds	r3, #4
 8004354:	781b      	ldrb	r3, [r3, #0]
 8004356:	021b      	lsls	r3, r3, #8
 8004358:	b21a      	sxth	r2, r3
 800435a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800435e:	691b      	ldr	r3, [r3, #16]
 8004360:	3303      	adds	r3, #3
 8004362:	781b      	ldrb	r3, [r3, #0]
 8004364:	b21b      	sxth	r3, r3
 8004366:	4313      	orrs	r3, r2
 8004368:	b21b      	sxth	r3, r3
 800436a:	f8a7 3126 	strh.w	r3, [r7, #294]	@ 0x126
                        spFrameData.frameHeader.frameCommand    = (SerialProtocolCommands)(frameCommandRaw & 0x7FFF);
 800436e:	f8b7 3126 	ldrh.w	r3, [r7, #294]	@ 0x126
 8004372:	b2da      	uxtb	r2, r3
 8004374:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004378:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800437c:	709a      	strb	r2, [r3, #2]
                        spFrameData.frameHeader.isResponseFrame = (frameCommandRaw & 0x8000) != 0 ? pdTRUE : pdFALSE;
 800437e:	f9b7 3126 	ldrsh.w	r3, [r7, #294]	@ 0x126
 8004382:	13db      	asrs	r3, r3, #15
 8004384:	b21b      	sxth	r3, r3
 8004386:	f003 0201 	and.w	r2, r3, #1
 800438a:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800438e:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004392:	609a      	str	r2, [r3, #8]
                    }
                    if ((frameBytesCount > FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH + FRAME_RESP_STAT_LENGTH) && ((spFrameData.frameHeader.frameCommand & 0x8000) != 0)) {
 8004394:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004398:	2b05      	cmp	r3, #5
 800439a:	d913      	bls.n	80043c4 <UartRxTask+0x250>
 800439c:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80043a0:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80043a4:	789b      	ldrb	r3, [r3, #2]
 80043a6:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 80043aa:	2b00      	cmp	r3, #0
 80043ac:	d00a      	beq.n	80043c4 <UartRxTask+0x250>
                        spFrameData.frameHeader.respStatus = (SerialProtocolRespStatus)(uartTaskData->frameData[FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH + FRAME_RESP_STAT_LENGTH]);
 80043ae:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80043b2:	691b      	ldr	r3, [r3, #16]
 80043b4:	3305      	adds	r3, #5
 80043b6:	781b      	ldrb	r3, [r3, #0]
 80043b8:	b25a      	sxtb	r2, r3
 80043ba:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80043be:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80043c2:	70da      	strb	r2, [r3, #3]
                    }
                    if (frameBytesCount >= FRAME_HEADER_LENGTH) {
 80043c4:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 80043c8:	2b07      	cmp	r3, #7
 80043ca:	d920      	bls.n	800440e <UartRxTask+0x29a>
                        spFrameData.frameHeader.frameDataLength = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH]));
 80043cc:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80043d0:	691b      	ldr	r3, [r3, #16]
 80043d2:	3306      	adds	r3, #6
 80043d4:	781b      	ldrb	r3, [r3, #0]
 80043d6:	021b      	lsls	r3, r3, #8
 80043d8:	b21a      	sxth	r2, r3
 80043da:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80043de:	691b      	ldr	r3, [r3, #16]
 80043e0:	3305      	adds	r3, #5
 80043e2:	781b      	ldrb	r3, [r3, #0]
 80043e4:	b21b      	sxth	r3, r3
 80043e6:	4313      	orrs	r3, r2
 80043e8:	b21b      	sxth	r3, r3
 80043ea:	b29a      	uxth	r2, r3
 80043ec:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80043f0:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80043f4:	809a      	strh	r2, [r3, #4]
                        frameTotalLength                        = FRAME_HEADER_LENGTH + spFrameData.frameHeader.frameDataLength + FRAME_CRC_LENGTH;
 80043f6:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80043fa:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80043fe:	889b      	ldrh	r3, [r3, #4]
 8004400:	330a      	adds	r3, #10
 8004402:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
                        receverState                            = srRecieveData;
 8004406:	2302      	movs	r3, #2
 8004408:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
 800440c:	e00e      	b.n	800442c <UartRxTask+0x2b8>
                    } else {
                        proceed = pdFALSE;
 800440e:	2300      	movs	r3, #0
 8004410:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
 8004414:	e00a      	b.n	800442c <UartRxTask+0x2b8>
                    }
                } else {
                    if (frameBytesCount > 0) {
 8004416:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 800441a:	2b00      	cmp	r3, #0
 800441c:	d003      	beq.n	8004426 <UartRxTask+0x2b2>
                        receverState = srFail;
 800441e:	2304      	movs	r3, #4
 8004420:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
 8004424:	e002      	b.n	800442c <UartRxTask+0x2b8>
                    } else {
                        proceed = pdFALSE;
 8004426:	2300      	movs	r3, #0
 8004428:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                    }
                }
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 800442c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004430:	6a1b      	ldr	r3, [r3, #32]
 8004432:	4618      	mov	r0, r3
 8004434:	f00c fb9b 	bl	8010b6e <osMutexRelease>
                break;
 8004438:	e165      	b.n	8004706 <UartRxTask+0x592>
            case srRecieveData:
                if (frameBytesCount >= frameTotalLength) {
 800443a:	f8b7 2124 	ldrh.w	r2, [r7, #292]	@ 0x124
 800443e:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8004442:	429a      	cmp	r2, r3
 8004444:	d303      	bcc.n	800444e <UartRxTask+0x2da>
                    receverState = srCheckCrc;
 8004446:	2301      	movs	r3, #1
 8004448:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                } else {
                    proceed = pdFALSE;
                }
                break;
 800444c:	e15b      	b.n	8004706 <UartRxTask+0x592>
                    proceed = pdFALSE;
 800444e:	2300      	movs	r3, #0
 8004450:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                break;
 8004454:	e157      	b.n	8004706 <UartRxTask+0x592>
            case srCheckCrc:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004456:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800445a:	6a1b      	ldr	r3, [r3, #32]
 800445c:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004460:	4618      	mov	r0, r3
 8004462:	f00c fb39 	bl	8010ad8 <osMutexAcquire>
                frameCrc = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[frameTotalLength - FRAME_CRC_LENGTH]));
 8004466:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800446a:	691a      	ldr	r2, [r3, #16]
 800446c:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8004470:	3b01      	subs	r3, #1
 8004472:	4413      	add	r3, r2
 8004474:	781b      	ldrb	r3, [r3, #0]
 8004476:	021b      	lsls	r3, r3, #8
 8004478:	b21a      	sxth	r2, r3
 800447a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800447e:	6919      	ldr	r1, [r3, #16]
 8004480:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8004484:	3b02      	subs	r3, #2
 8004486:	440b      	add	r3, r1
 8004488:	781b      	ldrb	r3, [r3, #0]
 800448a:	b21b      	sxth	r3, r3
 800448c:	4313      	orrs	r3, r2
 800448e:	b21b      	sxth	r3, r3
 8004490:	f8a7 3122 	strh.w	r3, [r7, #290]	@ 0x122
                crc      = HAL_CRC_Calculate (&hcrc, (uint32_t*)(uartTaskData->frameData), frameTotalLength - FRAME_CRC_LENGTH);
 8004494:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004498:	6919      	ldr	r1, [r3, #16]
 800449a:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 800449e:	3b02      	subs	r3, #2
 80044a0:	461a      	mov	r2, r3
 80044a2:	4841      	ldr	r0, [pc, #260]	@ (80045a8 <UartRxTask+0x434>)
 80044a4:	f000 ffda 	bl	800545c <HAL_CRC_Calculate>
 80044a8:	f8c7 0128 	str.w	r0, [r7, #296]	@ 0x128
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 80044ac:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80044b0:	6a1b      	ldr	r3, [r3, #32]
 80044b2:	4618      	mov	r0, r3
 80044b4:	f00c fb5b 	bl	8010b6e <osMutexRelease>
                crcPass = frameCrc == crc;
 80044b8:	f8b7 3122 	ldrh.w	r3, [r7, #290]	@ 0x122
 80044bc:	f8d7 2128 	ldr.w	r2, [r7, #296]	@ 0x128
 80044c0:	429a      	cmp	r2, r3
 80044c2:	bf0c      	ite	eq
 80044c4:	2301      	moveq	r3, #1
 80044c6:	2300      	movne	r3, #0
 80044c8:	b2db      	uxtb	r3, r3
 80044ca:	f8c7 3138 	str.w	r3, [r7, #312]	@ 0x138
                if (crcPass) {
 80044ce:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 80044d2:	2b00      	cmp	r3, #0
 80044d4:	d00b      	beq.n	80044ee <UartRxTask+0x37a>
#if UART_TASK_LOGS
                    printf ("Uart%d: Frame CRC PASS\n", uartTaskData->uartNumber);
 80044d6:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80044da:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80044de:	4619      	mov	r1, r3
 80044e0:	4832      	ldr	r0, [pc, #200]	@ (80045ac <UartRxTask+0x438>)
 80044e2:	f025 fa7b 	bl	80299dc <iprintf>
#endif
                    receverState = srExecuteCmd;
 80044e6:	2303      	movs	r3, #3
 80044e8:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                } else {
                    receverState = srFail;
                }
                break;
 80044ec:	e10b      	b.n	8004706 <UartRxTask+0x592>
                    receverState = srFail;
 80044ee:	2304      	movs	r3, #4
 80044f0:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 80044f4:	e107      	b.n	8004706 <UartRxTask+0x592>
            case srExecuteCmd:
                if ((uartTaskData->processDataCb != NULL) || (uartTaskData->processRxDataMsgBuffer != NULL)) {
 80044f6:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80044fa:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80044fc:	2b00      	cmp	r3, #0
 80044fe:	d104      	bne.n	800450a <UartRxTask+0x396>
 8004500:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004504:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8004506:	2b00      	cmp	r3, #0
 8004508:	d01e      	beq.n	8004548 <UartRxTask+0x3d4>
                    osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 800450a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800450e:	6a1b      	ldr	r3, [r3, #32]
 8004510:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004514:	4618      	mov	r0, r3
 8004516:	f00c fadf 	bl	8010ad8 <osMutexAcquire>
                    memcpy (spFrameData.dataBuffer, &(uartTaskData->frameData[FRAME_HEADER_LENGTH]), spFrameData.frameHeader.frameDataLength);
 800451a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800451e:	691b      	ldr	r3, [r3, #16]
 8004520:	f103 0108 	add.w	r1, r3, #8
 8004524:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004528:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800452c:	889b      	ldrh	r3, [r3, #4]
 800452e:	461a      	mov	r2, r3
 8004530:	f107 0310 	add.w	r3, r7, #16
 8004534:	330c      	adds	r3, #12
 8004536:	4618      	mov	r0, r3
 8004538:	f025 fcd9 	bl	8029eee <memcpy>
                    osMutexRelease (uartTaskData->rxDataBufferMutex);
 800453c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004540:	6a1b      	ldr	r3, [r3, #32]
 8004542:	4618      	mov	r0, r3
 8004544:	f00c fb13 	bl	8010b6e <osMutexRelease>
                }
                if (uartTaskData->processRxDataMsgBuffer != NULL) {
 8004548:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800454c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800454e:	2b00      	cmp	r3, #0
 8004550:	d015      	beq.n	800457e <UartRxTask+0x40a>
                    if(xMessageBufferSend (uartTaskData->processRxDataMsgBuffer, &spFrameData, sizeof (SerialProtocolFrameHeader) + spFrameData.frameHeader.frameDataLength, pdMS_TO_TICKS (200)) == pdFALSE)
 8004552:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004556:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 8004558:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800455c:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004560:	889b      	ldrh	r3, [r3, #4]
 8004562:	f103 020c 	add.w	r2, r3, #12
 8004566:	f107 0110 	add.w	r1, r7, #16
 800456a:	23c8      	movs	r3, #200	@ 0xc8
 800456c:	f00e f892 	bl	8012694 <xStreamBufferSend>
 8004570:	4603      	mov	r3, r0
 8004572:	2b00      	cmp	r3, #0
 8004574:	d103      	bne.n	800457e <UartRxTask+0x40a>
                    {
                    	receverState = srFail;
 8004576:	2304      	movs	r3, #4
 8004578:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                    	break;
 800457c:	e0c3      	b.n	8004706 <UartRxTask+0x592>
                    }
                }
                if (uartTaskData->processDataCb != NULL) {
 800457e:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004582:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8004584:	2b00      	cmp	r3, #0
 8004586:	d008      	beq.n	800459a <UartRxTask+0x426>
                    uartTaskData->processDataCb (uartTaskData, &spFrameData);
 8004588:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800458c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800458e:	f107 0210 	add.w	r2, r7, #16
 8004592:	4611      	mov	r1, r2
 8004594:	f8d7 012c 	ldr.w	r0, [r7, #300]	@ 0x12c
 8004598:	4798      	blx	r3
                }
                receverState = srFinish;
 800459a:	2305      	movs	r3, #5
 800459c:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 80045a0:	e0b1      	b.n	8004706 <UartRxTask+0x592>
 80045a2:	bf00      	nop
 80045a4:	0802c92c 	.word	0x0802c92c
 80045a8:	24000248 	.word	0x24000248
 80045ac:	0802c94c 	.word	0x0802c94c
            case srFail:
                dataToSend = 0;
 80045b0:	2300      	movs	r3, #0
 80045b2:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
                if ((frameTimeout == pdTRUE) && (frameBytesCount > 2)) {
 80045b6:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 80045ba:	2b01      	cmp	r3, #1
 80045bc:	d124      	bne.n	8004608 <UartRxTask+0x494>
 80045be:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 80045c2:	2b02      	cmp	r3, #2
 80045c4:	d920      	bls.n	8004608 <UartRxTask+0x494>
                    dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spTimeout, NULL, 0);
 80045c6:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80045ca:	6898      	ldr	r0, [r3, #8]
 80045cc:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80045d0:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80045d4:	8819      	ldrh	r1, [r3, #0]
 80045d6:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80045da:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80045de:	789a      	ldrb	r2, [r3, #2]
 80045e0:	2300      	movs	r3, #0
 80045e2:	9301      	str	r3, [sp, #4]
 80045e4:	2300      	movs	r3, #0
 80045e6:	9300      	str	r3, [sp, #0]
 80045e8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80045ec:	f7fe fdf0 	bl	80031d0 <PrepareRespFrame>
 80045f0:	4603      	mov	r3, r0
 80045f2:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
#if UART_TASK_LOGS
                    printf ("Uart%d: RX data receiver timeout!\n", uartTaskData->uartNumber);
 80045f6:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80045fa:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80045fe:	4619      	mov	r1, r3
 8004600:	4844      	ldr	r0, [pc, #272]	@ (8004714 <UartRxTask+0x5a0>)
 8004602:	f025 f9eb 	bl	80299dc <iprintf>
 8004606:	e03c      	b.n	8004682 <UartRxTask+0x50e>
#endif
                } else if (!crcPass) {
 8004608:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 800460c:	2b00      	cmp	r3, #0
 800460e:	d120      	bne.n	8004652 <UartRxTask+0x4de>
                    dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spCrcFail, NULL, 0);
 8004610:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004614:	6898      	ldr	r0, [r3, #8]
 8004616:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800461a:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800461e:	8819      	ldrh	r1, [r3, #0]
 8004620:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004624:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004628:	789a      	ldrb	r2, [r3, #2]
 800462a:	2300      	movs	r3, #0
 800462c:	9301      	str	r3, [sp, #4]
 800462e:	2300      	movs	r3, #0
 8004630:	9300      	str	r3, [sp, #0]
 8004632:	f06f 0301 	mvn.w	r3, #1
 8004636:	f7fe fdcb 	bl	80031d0 <PrepareRespFrame>
 800463a:	4603      	mov	r3, r0
 800463c:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
#if UART_TASK_LOGS
                    printf ("Uart%d: Frame CRC FAIL\n", uartTaskData->uartNumber);
 8004640:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004644:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004648:	4619      	mov	r1, r3
 800464a:	4833      	ldr	r0, [pc, #204]	@ (8004718 <UartRxTask+0x5a4>)
 800464c:	f025 f9c6 	bl	80299dc <iprintf>
 8004650:	e017      	b.n	8004682 <UartRxTask+0x50e>
#endif
                }
                else
                {
                	dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spInternalError, NULL, 0);
 8004652:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004656:	6898      	ldr	r0, [r3, #8]
 8004658:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800465c:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004660:	8819      	ldrh	r1, [r3, #0]
 8004662:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004666:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800466a:	789a      	ldrb	r2, [r3, #2]
 800466c:	2300      	movs	r3, #0
 800466e:	9301      	str	r3, [sp, #4]
 8004670:	2300      	movs	r3, #0
 8004672:	9300      	str	r3, [sp, #0]
 8004674:	f06f 0303 	mvn.w	r3, #3
 8004678:	f7fe fdaa 	bl	80031d0 <PrepareRespFrame>
 800467c:	4603      	mov	r3, r0
 800467e:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
                }
                if (dataToSend > 0) {
 8004682:	f8b7 313c 	ldrh.w	r3, [r7, #316]	@ 0x13c
 8004686:	2b00      	cmp	r3, #0
 8004688:	d00a      	beq.n	80046a0 <UartRxTask+0x52c>
                    HAL_UART_Transmit_IT (uartTaskData->huart, uartTaskData->uartTxBuffer, dataToSend);
 800468a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800468e:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8004690:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004694:	689b      	ldr	r3, [r3, #8]
 8004696:	f8b7 213c 	ldrh.w	r2, [r7, #316]	@ 0x13c
 800469a:	4619      	mov	r1, r3
 800469c:	f008 fc14 	bl	800cec8 <HAL_UART_Transmit_IT>
                }
#if UART_TASK_LOGS
                printf ("Uart%d: TX bytes sent: %d\n", dataToSend, uartTaskData->uartNumber);
 80046a0:	f8b7 113c 	ldrh.w	r1, [r7, #316]	@ 0x13c
 80046a4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80046a8:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80046ac:	461a      	mov	r2, r3
 80046ae:	481b      	ldr	r0, [pc, #108]	@ (800471c <UartRxTask+0x5a8>)
 80046b0:	f025 f994 	bl	80299dc <iprintf>
#endif
                receverState = srFinish;
 80046b4:	2305      	movs	r3, #5
 80046b6:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 80046ba:	e024      	b.n	8004706 <UartRxTask+0x592>
            case srFinish:
            default:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 80046bc:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80046c0:	6a1b      	ldr	r3, [r3, #32]
 80046c2:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80046c6:	4618      	mov	r0, r3
 80046c8:	f00c fa06 	bl	8010ad8 <osMutexAcquire>
                uartTaskData->frameBytesCount = 0;
 80046cc:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80046d0:	2200      	movs	r2, #0
 80046d2:	82da      	strh	r2, [r3, #22]
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 80046d4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80046d8:	6a1b      	ldr	r3, [r3, #32]
 80046da:	4618      	mov	r0, r3
 80046dc:	f00c fa47 	bl	8010b6e <osMutexRelease>
                spFrameData.frameHeader.frameCommand = spUnknown;
 80046e0:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80046e4:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80046e8:	2209      	movs	r2, #9
 80046ea:	709a      	strb	r2, [r3, #2]
                frameTotalLength                     = 0;
 80046ec:	2300      	movs	r3, #0
 80046ee:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
                outputDataBufferPos                  = 0;
 80046f2:	4b0b      	ldr	r3, [pc, #44]	@ (8004720 <UartRxTask+0x5ac>)
 80046f4:	2200      	movs	r2, #0
 80046f6:	801a      	strh	r2, [r3, #0]
                receverState                         = srWaitForHeader;
 80046f8:	2300      	movs	r3, #0
 80046fa:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                proceed                              = pdFALSE;
 80046fe:	2300      	movs	r3, #0
 8004700:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                break;
 8004704:	bf00      	nop
        while (proceed) {
 8004706:	f8d7 3134 	ldr.w	r3, [r7, #308]	@ 0x134
 800470a:	2b00      	cmp	r3, #0
 800470c:	f47f ade0 	bne.w	80042d0 <UartRxTask+0x15c>
        frameTimeout = !(xTaskNotifyWait (0, 0, &bytesRec, pdMS_TO_TICKS (FRAME_TIMEOUT_MS)));
 8004710:	e581      	b.n	8004216 <UartRxTask+0xa2>
 8004712:	bf00      	nop
 8004714:	0802c964 	.word	0x0802c964
 8004718:	0802c988 	.word	0x0802c988
 800471c:	0802c9a0 	.word	0x0802c9a0
 8004720:	24001fc4 	.word	0x24001fc4

08004724 <ReadMeasSetFromBuffer>:
        }
    }
}

void ReadMeasSetFromBuffer(uint8_t* buff, uint16_t* buffPos, float* dataSet)
{
 8004724:	b580      	push	{r7, lr}
 8004726:	b086      	sub	sp, #24
 8004728:	af00      	add	r7, sp, #0
 800472a:	60f8      	str	r0, [r7, #12]
 800472c:	60b9      	str	r1, [r7, #8]
 800472e:	607a      	str	r2, [r7, #4]
	for(uint8_t i = 0; i < 3; i++)
 8004730:	2300      	movs	r3, #0
 8004732:	75fb      	strb	r3, [r7, #23]
 8004734:	e00b      	b.n	800474e <ReadMeasSetFromBuffer+0x2a>
	{
		ReadFloatFromBuffer(buff, buffPos, &dataSet[i]);
 8004736:	7dfb      	ldrb	r3, [r7, #23]
 8004738:	009b      	lsls	r3, r3, #2
 800473a:	687a      	ldr	r2, [r7, #4]
 800473c:	4413      	add	r3, r2
 800473e:	461a      	mov	r2, r3
 8004740:	68b9      	ldr	r1, [r7, #8]
 8004742:	68f8      	ldr	r0, [r7, #12]
 8004744:	f7fe fc55 	bl	8002ff2 <ReadFloatFromBuffer>
	for(uint8_t i = 0; i < 3; i++)
 8004748:	7dfb      	ldrb	r3, [r7, #23]
 800474a:	3301      	adds	r3, #1
 800474c:	75fb      	strb	r3, [r7, #23]
 800474e:	7dfb      	ldrb	r3, [r7, #23]
 8004750:	2b02      	cmp	r3, #2
 8004752:	d9f0      	bls.n	8004736 <ReadMeasSetFromBuffer+0x12>
	}
}
 8004754:	bf00      	nop
 8004756:	bf00      	nop
 8004758:	3718      	adds	r7, #24
 800475a:	46bd      	mov	sp, r7
 800475c:	bd80      	pop	{r7, pc}
	...

08004760 <UartTxTask>:

void UartTxTask (void* argument) {
 8004760:	b580      	push	{r7, lr}
 8004762:	b0d4      	sub	sp, #336	@ 0x150
 8004764:	af02      	add	r7, sp, #8
 8004766:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 800476a:	f5a3 73a2 	sub.w	r3, r3, #324	@ 0x144
 800476e:	6018      	str	r0, [r3, #0]
    UartTaskData* const uartTaskData  = (UartTaskData*)argument;
 8004770:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004774:	f5a3 73a2 	sub.w	r3, r3, #324	@ 0x144
 8004778:	681b      	ldr	r3, [r3, #0]
 800477a:	f8c7 3140 	str.w	r3, [r7, #320]	@ 0x140
    InterProcessData data             = { 0 };
 800477e:	f507 7390 	add.w	r3, r7, #288	@ 0x120
 8004782:	2200      	movs	r2, #0
 8004784:	601a      	str	r2, [r3, #0]
 8004786:	605a      	str	r2, [r3, #4]
 8004788:	609a      	str	r2, [r3, #8]
    SerialProtocolFrameData frameData = { 0 };
 800478a:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 800478e:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 8004792:	4618      	mov	r0, r3
 8004794:	f44f 7386 	mov.w	r3, #268	@ 0x10c
 8004798:	461a      	mov	r2, r3
 800479a:	2100      	movs	r1, #0
 800479c:	f025 fab0 	bl	8029d00 <memset>
    size_t bytesInMsg;
    uint16_t frameId                    = 0;
 80047a0:	2300      	movs	r3, #0
 80047a2:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
    uint32_t rndVal                     = 0;
 80047a6:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 80047aa:	f5a3 739c 	sub.w	r3, r3, #312	@ 0x138
 80047ae:	2200      	movs	r2, #0
 80047b0:	601a      	str	r2, [r3, #0]
    uint16_t bytesToSend                = 0;
 80047b2:	2300      	movs	r3, #0
 80047b4:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
    SerialProtocolCommands frameCommand = spUnknown;
 80047b8:	2309      	movs	r3, #9
 80047ba:	f887 313b 	strb.w	r3, [r7, #315]	@ 0x13b
    uint16_t inputDataBufferPos = 0;
 80047be:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 80047c2:	f5a3 739d 	sub.w	r3, r3, #314	@ 0x13a
 80047c6:	2200      	movs	r2, #0
 80047c8:	801a      	strh	r2, [r3, #0]
    uint8_t boardNumber = 0;
 80047ca:	2300      	movs	r3, #0
 80047cc:	f887 3147 	strb.w	r3, [r7, #327]	@ 0x147

    while (pdTRUE) {
        if (uartTaskData->sendCmdToSlaveQueue != NULL) {
 80047d0:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 80047d4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80047d6:	2b00      	cmp	r3, #0
 80047d8:	f000 8226 	beq.w	8004c28 <UartTxTask+0x4c8>
            osMessageQueueGet (uartTaskData->sendCmdToSlaveQueue, &data, 0, osWaitForever);
 80047dc:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 80047e0:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 80047e2:	f507 7190 	add.w	r1, r7, #288	@ 0x120
 80047e6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80047ea:	2200      	movs	r2, #0
 80047ec:	f00c fc14 	bl	8011018 <osMessageQueueGet>
            HAL_RNG_GenerateRandomNumber (&hrng, &rndVal);
 80047f0:	f107 0310 	add.w	r3, r7, #16
 80047f4:	4619      	mov	r1, r3
 80047f6:	48a2      	ldr	r0, [pc, #648]	@ (8004a80 <UartTxTask+0x320>)
 80047f8:	f007 fff2 	bl	800c7e0 <HAL_RNG_GenerateRandomNumber>
            frameId             = (uint16_t)(rndVal & 0xFFFF);
 80047fc:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004800:	f5a3 739c 	sub.w	r3, r3, #312	@ 0x138
 8004804:	681b      	ldr	r3, [r3, #0]
 8004806:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
            frameCommand        = data.spCommand;
 800480a:	f897 3120 	ldrb.w	r3, [r7, #288]	@ 0x120
 800480e:	f887 313b 	strb.w	r3, [r7, #315]	@ 0x13b
            outputDataBufferPos = 0;
 8004812:	4b9c      	ldr	r3, [pc, #624]	@ (8004a84 <UartTxTask+0x324>)
 8004814:	2200      	movs	r2, #0
 8004816:	801a      	strh	r2, [r3, #0]
            memset (outputDataBuffer, 0x00, OUTPUT_DATA_BUFF_SIZE);
 8004818:	2280      	movs	r2, #128	@ 0x80
 800481a:	2100      	movs	r1, #0
 800481c:	489a      	ldr	r0, [pc, #616]	@ (8004a88 <UartTxTask+0x328>)
 800481e:	f025 fa6f 	bl	8029d00 <memset>
            switch (frameCommand) {
 8004822:	f897 313b 	ldrb.w	r3, [r7, #315]	@ 0x13b
 8004826:	2b08      	cmp	r3, #8
 8004828:	f200 8203 	bhi.w	8004c32 <UartTxTask+0x4d2>
 800482c:	a201      	add	r2, pc, #4	@ (adr r2, 8004834 <UartTxTask+0xd4>)
 800482e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8004832:	bf00      	nop
 8004834:	080048a1 	.word	0x080048a1
 8004838:	080048a1 	.word	0x080048a1
 800483c:	08004859 	.word	0x08004859
 8004840:	08004859 	.word	0x08004859
 8004844:	08004859 	.word	0x08004859
 8004848:	0800488f 	.word	0x0800488f
 800484c:	0800488f 	.word	0x0800488f
 8004850:	0800487d 	.word	0x0800487d
 8004854:	080048a1 	.word	0x080048a1
            case spSetFanSpeed:
            case spSetMotorXOn:
            case spSetMotorYOn:
                WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[0], sizeof (float));
 8004858:	f507 7390 	add.w	r3, r7, #288	@ 0x120
 800485c:	1d1a      	adds	r2, r3, #4
 800485e:	2304      	movs	r3, #4
 8004860:	4988      	ldr	r1, [pc, #544]	@ (8004a84 <UartTxTask+0x324>)
 8004862:	4889      	ldr	r0, [pc, #548]	@ (8004a88 <UartTxTask+0x328>)
 8004864:	f7fe fb94 	bl	8002f90 <WriteDataToBuffer>
                WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[1], sizeof (float));
 8004868:	f507 7390 	add.w	r3, r7, #288	@ 0x120
 800486c:	f103 0208 	add.w	r2, r3, #8
 8004870:	2304      	movs	r3, #4
 8004872:	4984      	ldr	r1, [pc, #528]	@ (8004a84 <UartTxTask+0x324>)
 8004874:	4884      	ldr	r0, [pc, #528]	@ (8004a88 <UartTxTask+0x328>)
 8004876:	f7fe fb8b 	bl	8002f90 <WriteDataToBuffer>
                break;
 800487a:	e012      	b.n	80048a2 <UartTxTask+0x142>
            case spSetDiodeOn: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[0], sizeof (float)); break;
 800487c:	f507 7390 	add.w	r3, r7, #288	@ 0x120
 8004880:	1d1a      	adds	r2, r3, #4
 8004882:	2304      	movs	r3, #4
 8004884:	497f      	ldr	r1, [pc, #508]	@ (8004a84 <UartTxTask+0x324>)
 8004886:	4880      	ldr	r0, [pc, #512]	@ (8004a88 <UartTxTask+0x328>)
 8004888:	f7fe fb82 	bl	8002f90 <WriteDataToBuffer>
 800488c:	e009      	b.n	80048a2 <UartTxTask+0x142>
            case spSetmotorXMaxCurrent:
            case spSetmotorYMaxCurrent: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float)); break;
 800488e:	f507 7390 	add.w	r3, r7, #288	@ 0x120
 8004892:	1d1a      	adds	r2, r3, #4
 8004894:	2304      	movs	r3, #4
 8004896:	497b      	ldr	r1, [pc, #492]	@ (8004a84 <UartTxTask+0x324>)
 8004898:	487b      	ldr	r0, [pc, #492]	@ (8004a88 <UartTxTask+0x328>)
 800489a:	f7fe fb79 	bl	8002f90 <WriteDataToBuffer>
 800489e:	e000      	b.n	80048a2 <UartTxTask+0x142>
            case spGetElectricalMeasurments:
            case spGetSensorMeasurments: break;
 80048a0:	bf00      	nop
            case spClearPeakMeasurments: break;
            default: continue; break;
            }

            bytesToSend = PrepareReqFrame (uartTaskData->uartTxBuffer, frameId, frameCommand, outputDataBuffer, outputDataBufferPos);
 80048a2:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 80048a6:	6898      	ldr	r0, [r3, #8]
 80048a8:	4b76      	ldr	r3, [pc, #472]	@ (8004a84 <UartTxTask+0x324>)
 80048aa:	881b      	ldrh	r3, [r3, #0]
 80048ac:	f897 213b 	ldrb.w	r2, [r7, #315]	@ 0x13b
 80048b0:	f8b7 113e 	ldrh.w	r1, [r7, #318]	@ 0x13e
 80048b4:	9300      	str	r3, [sp, #0]
 80048b6:	4b74      	ldr	r3, [pc, #464]	@ (8004a88 <UartTxTask+0x328>)
 80048b8:	f7fe fbf6 	bl	80030a8 <PrepareReqFrame>
 80048bc:	4603      	mov	r3, r0
 80048be:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
            HAL_UART_Transmit_IT (uartTaskData->huart, uartTaskData->uartTxBuffer, bytesToSend);
 80048c2:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 80048c6:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 80048c8:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 80048cc:	689b      	ldr	r3, [r3, #8]
 80048ce:	f8b7 213c 	ldrh.w	r2, [r7, #316]	@ 0x13c
 80048d2:	4619      	mov	r1, r3
 80048d4:	f008 faf8 	bl	800cec8 <HAL_UART_Transmit_IT>
            bytesInMsg = xMessageBufferReceive (uartTaskData->processRxDataMsgBuffer, &frameData, INPUT_DATA_BUFF_SIZE, pdMS_TO_TICKS (1000));
 80048d8:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 80048dc:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 80048de:	f107 0114 	add.w	r1, r7, #20
 80048e2:	f44f 737a 	mov.w	r3, #1000	@ 0x3e8
 80048e6:	f44f 7280 	mov.w	r2, #256	@ 0x100
 80048ea:	f00d ffc9 	bl	8012880 <xStreamBufferReceive>
 80048ee:	f8c7 0134 	str.w	r0, [r7, #308]	@ 0x134
        	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 80048f2:	2300      	movs	r3, #0
 80048f4:	f887 3147 	strb.w	r3, [r7, #327]	@ 0x147
 80048f8:	e00e      	b.n	8004918 <UartTxTask+0x1b8>
        	{
        		if(boardToUartNumberMap[boardNumber] == uartTaskData->uartNumber)
 80048fa:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 80048fe:	4a63      	ldr	r2, [pc, #396]	@ (8004a8c <UartTxTask+0x32c>)
 8004900:	5cd2      	ldrb	r2, [r2, r3]
 8004902:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004906:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 800490a:	429a      	cmp	r2, r3
 800490c:	d009      	beq.n	8004922 <UartTxTask+0x1c2>
        	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 800490e:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8004912:	3301      	adds	r3, #1
 8004914:	f887 3147 	strb.w	r3, [r7, #327]	@ 0x147
 8004918:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 800491c:	2b03      	cmp	r3, #3
 800491e:	d9ec      	bls.n	80048fa <UartTxTask+0x19a>
 8004920:	e000      	b.n	8004924 <UartTxTask+0x1c4>
        		{
        			break;
 8004922:	bf00      	nop
        		}
        	}
            if (bytesInMsg == 0) {
 8004924:	f8d7 3134 	ldr.w	r3, [r7, #308]	@ 0x134
 8004928:	2b00      	cmp	r3, #0
 800492a:	d124      	bne.n	8004976 <UartTxTask+0x216>
                if (frameCommand == spGetElectricalMeasurments)
 800492c:	f897 313b 	ldrb.w	r3, [r7, #315]	@ 0x13b
 8004930:	2b00      	cmp	r3, #0
 8004932:	d114      	bne.n	800495e <UartTxTask+0x1fe>
                {
                	osMutexAcquire (resMeasurementsMutex, osWaitForever);
 8004934:	4b56      	ldr	r3, [pc, #344]	@ (8004a90 <UartTxTask+0x330>)
 8004936:	681b      	ldr	r3, [r3, #0]
 8004938:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800493c:	4618      	mov	r0, r3
 800493e:	f00c f8cb 	bl	8010ad8 <osMutexAcquire>
                	slaveLastSeen[boardNumber]++;
 8004942:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8004946:	4a53      	ldr	r2, [pc, #332]	@ (8004a94 <UartTxTask+0x334>)
 8004948:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 800494c:	3201      	adds	r2, #1
 800494e:	4951      	ldr	r1, [pc, #324]	@ (8004a94 <UartTxTask+0x334>)
 8004950:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
                	osMutexRelease(resMeasurementsMutex);
 8004954:	4b4e      	ldr	r3, [pc, #312]	@ (8004a90 <UartTxTask+0x330>)
 8004956:	681b      	ldr	r3, [r3, #0]
 8004958:	4618      	mov	r0, r3
 800495a:	f00c f908 	bl	8010b6e <osMutexRelease>
                }
#if UART_TASK_LOGS
                printf ("Uart%d: Response timeout for frameId 0x%x\n", uartTaskData->uartNumber, frameId);
 800495e:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004962:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004966:	4619      	mov	r1, r3
 8004968:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 800496c:	461a      	mov	r2, r3
 800496e:	484a      	ldr	r0, [pc, #296]	@ (8004a98 <UartTxTask+0x338>)
 8004970:	f025 f834 	bl	80299dc <iprintf>
 8004974:	e72c      	b.n	80047d0 <UartTxTask+0x70>
#endif
            } else {
                if ((frameId == frameData.frameHeader.frameId) && (frameData.frameHeader.respStatus == spOK)) {
 8004976:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 800497a:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 800497e:	881b      	ldrh	r3, [r3, #0]
 8004980:	f8b7 213e 	ldrh.w	r2, [r7, #318]	@ 0x13e
 8004984:	429a      	cmp	r2, r3
 8004986:	f47f af23 	bne.w	80047d0 <UartTxTask+0x70>
 800498a:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 800498e:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 8004992:	f993 3003 	ldrsb.w	r3, [r3, #3]
 8004996:	2b00      	cmp	r3, #0
 8004998:	f47f af1a 	bne.w	80047d0 <UartTxTask+0x70>
#if UART_TASK_LOGS
                    printf ("Uart%d: Response for frameId 0x%x OK\n", uartTaskData->uartNumber, frameId);
 800499c:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 80049a0:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80049a4:	4619      	mov	r1, r3
 80049a6:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 80049aa:	461a      	mov	r2, r3
 80049ac:	483b      	ldr	r0, [pc, #236]	@ (8004a9c <UartTxTask+0x33c>)
 80049ae:	f025 f815 	bl	80299dc <iprintf>
#endif
                    slaveLastSeen[boardNumber] = 0;
 80049b2:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 80049b6:	4a37      	ldr	r2, [pc, #220]	@ (8004a94 <UartTxTask+0x334>)
 80049b8:	2100      	movs	r1, #0
 80049ba:	f842 1023 	str.w	r1, [r2, r3, lsl #2]
                    switch(frameData.frameHeader.frameCommand)
 80049be:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 80049c2:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 80049c6:	789b      	ldrb	r3, [r3, #2]
 80049c8:	2b00      	cmp	r3, #0
 80049ca:	d002      	beq.n	80049d2 <UartTxTask+0x272>
 80049cc:	2b01      	cmp	r3, #1
 80049ce:	d069      	beq.n	8004aa4 <UartTxTask+0x344>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitSwitchCenter);
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->powerSupplyFailMask);
                    	osMutexRelease(sensorsInfoMutex);
                    	break;
                    default:
                    	break;
 80049d0:	e130      	b.n	8004c34 <UartTxTask+0x4d4>
                    	osMutexAcquire (resMeasurementsMutex, osWaitForever);
 80049d2:	4b2f      	ldr	r3, [pc, #188]	@ (8004a90 <UartTxTask+0x330>)
 80049d4:	681b      	ldr	r3, [r3, #0]
 80049d6:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80049da:	4618      	mov	r0, r3
 80049dc:	f00c f87c 	bl	8010ad8 <osMutexAcquire>
            			RESMeasurements *resMeas = &resMeasurements[boardNumber];
 80049e0:	f897 2147 	ldrb.w	r2, [r7, #327]	@ 0x147
 80049e4:	4613      	mov	r3, r2
 80049e6:	011b      	lsls	r3, r3, #4
 80049e8:	1a9b      	subs	r3, r3, r2
 80049ea:	009b      	lsls	r3, r3, #2
 80049ec:	4a2c      	ldr	r2, [pc, #176]	@ (8004aa0 <UartTxTask+0x340>)
 80049ee:	4413      	add	r3, r2
 80049f0:	f8c7 312c 	str.w	r3, [r7, #300]	@ 0x12c
                    	inputDataBufferPos = 0;
 80049f4:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 80049f8:	f5a3 739d 	sub.w	r3, r3, #314	@ 0x13a
 80049fc:	2200      	movs	r2, #0
 80049fe:	801a      	strh	r2, [r3, #0]
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->voltageRMS);
 8004a00:	f8d7 212c 	ldr.w	r2, [r7, #300]	@ 0x12c
 8004a04:	f107 010e 	add.w	r1, r7, #14
 8004a08:	f107 0314 	add.w	r3, r7, #20
 8004a0c:	330c      	adds	r3, #12
 8004a0e:	4618      	mov	r0, r3
 8004a10:	f7ff fe88 	bl	8004724 <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->voltagePeak);
 8004a14:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a18:	f103 020c 	add.w	r2, r3, #12
 8004a1c:	f107 010e 	add.w	r1, r7, #14
 8004a20:	f107 0314 	add.w	r3, r7, #20
 8004a24:	330c      	adds	r3, #12
 8004a26:	4618      	mov	r0, r3
 8004a28:	f7ff fe7c 	bl	8004724 <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->currentRMS);
 8004a2c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a30:	f103 0218 	add.w	r2, r3, #24
 8004a34:	f107 010e 	add.w	r1, r7, #14
 8004a38:	f107 0314 	add.w	r3, r7, #20
 8004a3c:	330c      	adds	r3, #12
 8004a3e:	4618      	mov	r0, r3
 8004a40:	f7ff fe70 	bl	8004724 <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->currentPeak);
 8004a44:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a48:	f103 0224 	add.w	r2, r3, #36	@ 0x24
 8004a4c:	f107 010e 	add.w	r1, r7, #14
 8004a50:	f107 0314 	add.w	r3, r7, #20
 8004a54:	330c      	adds	r3, #12
 8004a56:	4618      	mov	r0, r3
 8004a58:	f7ff fe64 	bl	8004724 <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->power);
 8004a5c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a60:	f103 0230 	add.w	r2, r3, #48	@ 0x30
 8004a64:	f107 010e 	add.w	r1, r7, #14
 8004a68:	f107 0314 	add.w	r3, r7, #20
 8004a6c:	330c      	adds	r3, #12
 8004a6e:	4618      	mov	r0, r3
 8004a70:	f7ff fe58 	bl	8004724 <ReadMeasSetFromBuffer>
                    	osMutexRelease(resMeasurementsMutex);
 8004a74:	4b06      	ldr	r3, [pc, #24]	@ (8004a90 <UartTxTask+0x330>)
 8004a76:	681b      	ldr	r3, [r3, #0]
 8004a78:	4618      	mov	r0, r3
 8004a7a:	f00c f878 	bl	8010b6e <osMutexRelease>
                    	break;
 8004a7e:	e0d9      	b.n	8004c34 <UartTxTask+0x4d4>
 8004a80:	2400026c 	.word	0x2400026c
 8004a84:	24001fc4 	.word	0x24001fc4
 8004a88:	24001f44 	.word	0x24001f44
 8004a8c:	24000014 	.word	0x24000014
 8004a90:	24002168 	.word	0x24002168
 8004a94:	24002158 	.word	0x24002158
 8004a98:	0802c9bc 	.word	0x0802c9bc
 8004a9c:	0802c9e8 	.word	0x0802c9e8
 8004aa0:	24001fc8 	.word	0x24001fc8
                    	osMutexAcquire (sensorsInfoMutex, osWaitForever);
 8004aa4:	4b64      	ldr	r3, [pc, #400]	@ (8004c38 <UartTxTask+0x4d8>)
 8004aa6:	681b      	ldr	r3, [r3, #0]
 8004aa8:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004aac:	4618      	mov	r0, r3
 8004aae:	f00c f813 	bl	8010ad8 <osMutexAcquire>
                    	inputDataBufferPos = 0;
 8004ab2:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004ab6:	f5a3 739d 	sub.w	r3, r3, #314	@ 0x13a
 8004aba:	2200      	movs	r2, #0
 8004abc:	801a      	strh	r2, [r3, #0]
                    	SesnorsInfo* sensors = &sensorsInfo[boardNumber];
 8004abe:	f897 2147 	ldrb.w	r2, [r7, #327]	@ 0x147
 8004ac2:	4613      	mov	r3, r2
 8004ac4:	009b      	lsls	r3, r3, #2
 8004ac6:	4413      	add	r3, r2
 8004ac8:	00db      	lsls	r3, r3, #3
 8004aca:	4a5c      	ldr	r2, [pc, #368]	@ (8004c3c <UartTxTask+0x4dc>)
 8004acc:	4413      	add	r3, r2
 8004ace:	f8c7 3130 	str.w	r3, [r7, #304]	@ 0x130
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->pvTemperature[0]);
 8004ad2:	f8d7 2130 	ldr.w	r2, [r7, #304]	@ 0x130
 8004ad6:	f107 010e 	add.w	r1, r7, #14
 8004ada:	f107 0314 	add.w	r3, r7, #20
 8004ade:	330c      	adds	r3, #12
 8004ae0:	4618      	mov	r0, r3
 8004ae2:	f7fe fa86 	bl	8002ff2 <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->pvTemperature[1]);
 8004ae6:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004aea:	1d1a      	adds	r2, r3, #4
 8004aec:	f107 010e 	add.w	r1, r7, #14
 8004af0:	f107 0314 	add.w	r3, r7, #20
 8004af4:	330c      	adds	r3, #12
 8004af6:	4618      	mov	r0, r3
 8004af8:	f7fe fa7b 	bl	8002ff2 <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->fanVoltage);
 8004afc:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004b00:	f103 0208 	add.w	r2, r3, #8
 8004b04:	f107 010e 	add.w	r1, r7, #14
 8004b08:	f107 0314 	add.w	r3, r7, #20
 8004b0c:	330c      	adds	r3, #12
 8004b0e:	4618      	mov	r0, r3
 8004b10:	f7fe fa6f 	bl	8002ff2 <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->pvEncoder);
 8004b14:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004b18:	f103 020c 	add.w	r2, r3, #12
 8004b1c:	f107 010e 	add.w	r1, r7, #14
 8004b20:	f107 0314 	add.w	r3, r7, #20
 8004b24:	330c      	adds	r3, #12
 8004b26:	4618      	mov	r0, r3
 8004b28:	f7fe fa63 	bl	8002ff2 <ReadFloatFromBuffer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXStatus);
 8004b2c:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004b30:	f103 0210 	add.w	r2, r3, #16
 8004b34:	f107 010e 	add.w	r1, r7, #14
 8004b38:	f107 0314 	add.w	r3, r7, #20
 8004b3c:	330c      	adds	r3, #12
 8004b3e:	4618      	mov	r0, r3
 8004b40:	f7fe fa8c 	bl	800305c <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYStatus);
 8004b44:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004b48:	f103 0211 	add.w	r2, r3, #17
 8004b4c:	f107 010e 	add.w	r1, r7, #14
 8004b50:	f107 0314 	add.w	r3, r7, #20
 8004b54:	330c      	adds	r3, #12
 8004b56:	4618      	mov	r0, r3
 8004b58:	f7fe fa80 	bl	800305c <ReadByteFromBufer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXAveCurrent);
 8004b5c:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004b60:	f103 0214 	add.w	r2, r3, #20
 8004b64:	f107 010e 	add.w	r1, r7, #14
 8004b68:	f107 0314 	add.w	r3, r7, #20
 8004b6c:	330c      	adds	r3, #12
 8004b6e:	4618      	mov	r0, r3
 8004b70:	f7fe fa3f 	bl	8002ff2 <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYAveCurrent);
 8004b74:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004b78:	f103 0218 	add.w	r2, r3, #24
 8004b7c:	f107 010e 	add.w	r1, r7, #14
 8004b80:	f107 0314 	add.w	r3, r7, #20
 8004b84:	330c      	adds	r3, #12
 8004b86:	4618      	mov	r0, r3
 8004b88:	f7fe fa33 	bl	8002ff2 <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXPeakCurrent);
 8004b8c:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004b90:	f103 021c 	add.w	r2, r3, #28
 8004b94:	f107 010e 	add.w	r1, r7, #14
 8004b98:	f107 0314 	add.w	r3, r7, #20
 8004b9c:	330c      	adds	r3, #12
 8004b9e:	4618      	mov	r0, r3
 8004ba0:	f7fe fa27 	bl	8002ff2 <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYPeakCurrent);
 8004ba4:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004ba8:	f103 0220 	add.w	r2, r3, #32
 8004bac:	f107 010e 	add.w	r1, r7, #14
 8004bb0:	f107 0314 	add.w	r3, r7, #20
 8004bb4:	330c      	adds	r3, #12
 8004bb6:	4618      	mov	r0, r3
 8004bb8:	f7fe fa1b 	bl	8002ff2 <ReadFloatFromBuffer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitSwitchUp);
 8004bbc:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004bc0:	f103 0224 	add.w	r2, r3, #36	@ 0x24
 8004bc4:	f107 010e 	add.w	r1, r7, #14
 8004bc8:	f107 0314 	add.w	r3, r7, #20
 8004bcc:	330c      	adds	r3, #12
 8004bce:	4618      	mov	r0, r3
 8004bd0:	f7fe fa44 	bl	800305c <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitSwitchDown);
 8004bd4:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004bd8:	f103 0225 	add.w	r2, r3, #37	@ 0x25
 8004bdc:	f107 010e 	add.w	r1, r7, #14
 8004be0:	f107 0314 	add.w	r3, r7, #20
 8004be4:	330c      	adds	r3, #12
 8004be6:	4618      	mov	r0, r3
 8004be8:	f7fe fa38 	bl	800305c <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitSwitchCenter);
 8004bec:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004bf0:	f103 0226 	add.w	r2, r3, #38	@ 0x26
 8004bf4:	f107 010e 	add.w	r1, r7, #14
 8004bf8:	f107 0314 	add.w	r3, r7, #20
 8004bfc:	330c      	adds	r3, #12
 8004bfe:	4618      	mov	r0, r3
 8004c00:	f7fe fa2c 	bl	800305c <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->powerSupplyFailMask);
 8004c04:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004c08:	f103 0227 	add.w	r2, r3, #39	@ 0x27
 8004c0c:	f107 010e 	add.w	r1, r7, #14
 8004c10:	f107 0314 	add.w	r3, r7, #20
 8004c14:	330c      	adds	r3, #12
 8004c16:	4618      	mov	r0, r3
 8004c18:	f7fe fa20 	bl	800305c <ReadByteFromBufer>
                    	osMutexRelease(sensorsInfoMutex);
 8004c1c:	4b06      	ldr	r3, [pc, #24]	@ (8004c38 <UartTxTask+0x4d8>)
 8004c1e:	681b      	ldr	r3, [r3, #0]
 8004c20:	4618      	mov	r0, r3
 8004c22:	f00b ffa4 	bl	8010b6e <osMutexRelease>
                    	break;
 8004c26:	e005      	b.n	8004c34 <UartTxTask+0x4d4>
                    }
                }
            }
        } else {
            osDelay (pdMS_TO_TICKS (1000));
 8004c28:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8004c2c:	f00b feb3 	bl	8010996 <osDelay>
 8004c30:	e5ce      	b.n	80047d0 <UartTxTask+0x70>
            default: continue; break;
 8004c32:	bf00      	nop
        if (uartTaskData->sendCmdToSlaveQueue != NULL) {
 8004c34:	e5cc      	b.n	80047d0 <UartTxTask+0x70>
 8004c36:	bf00      	nop
 8004c38:	2400216c 	.word	0x2400216c
 8004c3c:	240020b8 	.word	0x240020b8

08004c40 <MeasurmentsReqSchedulerTaskInit>:
        }
    }
}

void MeasurmentsReqSchedulerTaskInit (void) {
 8004c40:	b580      	push	{r7, lr}
 8004c42:	b08a      	sub	sp, #40	@ 0x28
 8004c44:	af00      	add	r7, sp, #0
    osThreadAttr_t osThreadAttrMeasurmentsReqSchedulerTask = { 0 };
 8004c46:	1d3b      	adds	r3, r7, #4
 8004c48:	2224      	movs	r2, #36	@ 0x24
 8004c4a:	2100      	movs	r1, #0
 8004c4c:	4618      	mov	r0, r3
 8004c4e:	f025 f857 	bl	8029d00 <memset>

    osThreadAttrMeasurmentsReqSchedulerTask.name       = "os_thread_XXX";
 8004c52:	4b08      	ldr	r3, [pc, #32]	@ (8004c74 <MeasurmentsReqSchedulerTaskInit+0x34>)
 8004c54:	607b      	str	r3, [r7, #4]
    osThreadAttrMeasurmentsReqSchedulerTask.stack_size = configMINIMAL_STACK_SIZE * 2;
 8004c56:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8004c5a:	61bb      	str	r3, [r7, #24]
    osThreadAttrMeasurmentsReqSchedulerTask.priority   = (osPriority_t)osPriorityNormal;
 8004c5c:	2318      	movs	r3, #24
 8004c5e:	61fb      	str	r3, [r7, #28]

    osThreadNew (MeasurmentsReqSchedulerTask, uartTasks, &osThreadAttrMeasurmentsReqSchedulerTask);
 8004c60:	1d3b      	adds	r3, r7, #4
 8004c62:	461a      	mov	r2, r3
 8004c64:	4904      	ldr	r1, [pc, #16]	@ (8004c78 <MeasurmentsReqSchedulerTaskInit+0x38>)
 8004c66:	4805      	ldr	r0, [pc, #20]	@ (8004c7c <MeasurmentsReqSchedulerTaskInit+0x3c>)
 8004c68:	f00b fdf7 	bl	801085a <osThreadNew>
}
 8004c6c:	bf00      	nop
 8004c6e:	3728      	adds	r7, #40	@ 0x28
 8004c70:	46bd      	mov	sp, r7
 8004c72:	bd80      	pop	{r7, pc}
 8004c74:	0802ca10 	.word	0x0802ca10
 8004c78:	24000018 	.word	0x24000018
 8004c7c:	08004c81 	.word	0x08004c81

08004c80 <MeasurmentsReqSchedulerTask>:

void MeasurmentsReqSchedulerTask (void* argument) {
 8004c80:	b580      	push	{r7, lr}
 8004c82:	b088      	sub	sp, #32
 8004c84:	af00      	add	r7, sp, #0
 8004c86:	6078      	str	r0, [r7, #4]
    while (pdTRUE) {
        __uintptr_t* ptr = (__uintptr_t*)argument;
 8004c88:	687b      	ldr	r3, [r7, #4]
 8004c8a:	61fb      	str	r3, [r7, #28]
        while (*ptr != 0) {
 8004c8c:	e04a      	b.n	8004d24 <MeasurmentsReqSchedulerTask+0xa4>
            UartTaskData* uartTask = (UartTaskData*)*ptr;
 8004c8e:	69fb      	ldr	r3, [r7, #28]
 8004c90:	681b      	ldr	r3, [r3, #0]
 8004c92:	617b      	str	r3, [r7, #20]
            if (uartTask->sendCmdToSlaveQueue != NULL) {
 8004c94:	697b      	ldr	r3, [r7, #20]
 8004c96:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8004c98:	2b00      	cmp	r3, #0
 8004c9a:	d040      	beq.n	8004d1e <MeasurmentsReqSchedulerTask+0x9e>
                InterProcessData data = { 0 };
 8004c9c:	f107 0308 	add.w	r3, r7, #8
 8004ca0:	2200      	movs	r2, #0
 8004ca2:	601a      	str	r2, [r3, #0]
 8004ca4:	605a      	str	r2, [r3, #4]
 8004ca6:	609a      	str	r2, [r3, #8]
                uint8_t boardNumber = 0;
 8004ca8:	2300      	movs	r3, #0
 8004caa:	76fb      	strb	r3, [r7, #27]
            	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 8004cac:	2300      	movs	r3, #0
 8004cae:	76fb      	strb	r3, [r7, #27]
 8004cb0:	e00a      	b.n	8004cc8 <MeasurmentsReqSchedulerTask+0x48>
            	{
            		if(boardToUartNumberMap[boardNumber] == uartTask->uartNumber)
 8004cb2:	7efb      	ldrb	r3, [r7, #27]
 8004cb4:	4a20      	ldr	r2, [pc, #128]	@ (8004d38 <MeasurmentsReqSchedulerTask+0xb8>)
 8004cb6:	5cd2      	ldrb	r2, [r2, r3]
 8004cb8:	697b      	ldr	r3, [r7, #20]
 8004cba:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004cbe:	429a      	cmp	r2, r3
 8004cc0:	d006      	beq.n	8004cd0 <MeasurmentsReqSchedulerTask+0x50>
            	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 8004cc2:	7efb      	ldrb	r3, [r7, #27]
 8004cc4:	3301      	adds	r3, #1
 8004cc6:	76fb      	strb	r3, [r7, #27]
 8004cc8:	7efb      	ldrb	r3, [r7, #27]
 8004cca:	2b03      	cmp	r3, #3
 8004ccc:	d9f1      	bls.n	8004cb2 <MeasurmentsReqSchedulerTask+0x32>
 8004cce:	e000      	b.n	8004cd2 <MeasurmentsReqSchedulerTask+0x52>
            		{
            			break;
 8004cd0:	bf00      	nop
            		}
            	}
                data.spCommand        = spGetElectricalMeasurments;
 8004cd2:	2300      	movs	r3, #0
 8004cd4:	723b      	strb	r3, [r7, #8]
                osMessageQueuePut (uartTask->sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8004cd6:	697b      	ldr	r3, [r7, #20]
 8004cd8:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8004cda:	f107 0108 	add.w	r1, r7, #8
 8004cde:	2364      	movs	r3, #100	@ 0x64
 8004ce0:	2200      	movs	r2, #0
 8004ce2:	f00c f939 	bl	8010f58 <osMessageQueuePut>
            	osMutexAcquire (resMeasurementsMutex, osWaitForever);
 8004ce6:	4b15      	ldr	r3, [pc, #84]	@ (8004d3c <MeasurmentsReqSchedulerTask+0xbc>)
 8004ce8:	681b      	ldr	r3, [r3, #0]
 8004cea:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004cee:	4618      	mov	r0, r3
 8004cf0:	f00b fef2 	bl	8010ad8 <osMutexAcquire>
            	if(slaveLastSeen[boardNumber] == 0)
 8004cf4:	7efb      	ldrb	r3, [r7, #27]
 8004cf6:	4a12      	ldr	r2, [pc, #72]	@ (8004d40 <MeasurmentsReqSchedulerTask+0xc0>)
 8004cf8:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8004cfc:	2b00      	cmp	r3, #0
 8004cfe:	d109      	bne.n	8004d14 <MeasurmentsReqSchedulerTask+0x94>
            	{
            		data.spCommand = spGetSensorMeasurments;
 8004d00:	2301      	movs	r3, #1
 8004d02:	723b      	strb	r3, [r7, #8]
            		osMessageQueuePut (uartTask->sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8004d04:	697b      	ldr	r3, [r7, #20]
 8004d06:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8004d08:	f107 0108 	add.w	r1, r7, #8
 8004d0c:	2364      	movs	r3, #100	@ 0x64
 8004d0e:	2200      	movs	r2, #0
 8004d10:	f00c f922 	bl	8010f58 <osMessageQueuePut>
            	}
            	osMutexRelease(resMeasurementsMutex);
 8004d14:	4b09      	ldr	r3, [pc, #36]	@ (8004d3c <MeasurmentsReqSchedulerTask+0xbc>)
 8004d16:	681b      	ldr	r3, [r3, #0]
 8004d18:	4618      	mov	r0, r3
 8004d1a:	f00b ff28 	bl	8010b6e <osMutexRelease>
            }
            ptr++;
 8004d1e:	69fb      	ldr	r3, [r7, #28]
 8004d20:	3304      	adds	r3, #4
 8004d22:	61fb      	str	r3, [r7, #28]
        while (*ptr != 0) {
 8004d24:	69fb      	ldr	r3, [r7, #28]
 8004d26:	681b      	ldr	r3, [r3, #0]
 8004d28:	2b00      	cmp	r3, #0
 8004d2a:	d1b0      	bne.n	8004c8e <MeasurmentsReqSchedulerTask+0xe>
        }
        osDelay (pdMS_TO_TICKS (MEASURMENTS_SCHEDULER_INTERVAL_MS));
 8004d2c:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8004d30:	f00b fe31 	bl	8010996 <osDelay>
    while (pdTRUE) {
 8004d34:	e7a8      	b.n	8004c88 <MeasurmentsReqSchedulerTask+0x8>
 8004d36:	bf00      	nop
 8004d38:	24000014 	.word	0x24000014
 8004d3c:	24002168 	.word	0x24002168
 8004d40:	24002158 	.word	0x24002158

08004d44 <Reset_Handler>:

    .section  .text.Reset_Handler
  .weak  Reset_Handler
  .type  Reset_Handler, %function
Reset_Handler:
  ldr   sp, =_estack      /* set stack pointer */
 8004d44:	f8df d034 	ldr.w	sp, [pc, #52]	@ 8004d7c <LoopFillZerobss+0xe>

/* Call the clock system initialization function.*/
  bl  SystemInit
 8004d48:	f7fe ffa8 	bl	8003c9c <SystemInit>

/* Copy the data segment initializers from flash to SRAM */
  ldr r0, =_sdata
 8004d4c:	480c      	ldr	r0, [pc, #48]	@ (8004d80 <LoopFillZerobss+0x12>)
  ldr r1, =_edata
 8004d4e:	490d      	ldr	r1, [pc, #52]	@ (8004d84 <LoopFillZerobss+0x16>)
  ldr r2, =_sidata
 8004d50:	4a0d      	ldr	r2, [pc, #52]	@ (8004d88 <LoopFillZerobss+0x1a>)
  movs r3, #0
 8004d52:	2300      	movs	r3, #0
  b LoopCopyDataInit
 8004d54:	e002      	b.n	8004d5c <LoopCopyDataInit>

08004d56 <CopyDataInit>:

CopyDataInit:
  ldr r4, [r2, r3]
 8004d56:	58d4      	ldr	r4, [r2, r3]
  str r4, [r0, r3]
 8004d58:	50c4      	str	r4, [r0, r3]
  adds r3, r3, #4
 8004d5a:	3304      	adds	r3, #4

08004d5c <LoopCopyDataInit>:

LoopCopyDataInit:
  adds r4, r0, r3
 8004d5c:	18c4      	adds	r4, r0, r3
  cmp r4, r1
 8004d5e:	428c      	cmp	r4, r1
  bcc CopyDataInit
 8004d60:	d3f9      	bcc.n	8004d56 <CopyDataInit>
/* Zero fill the bss segment. */
  ldr r2, =_sbss
 8004d62:	4a0a      	ldr	r2, [pc, #40]	@ (8004d8c <LoopFillZerobss+0x1e>)
  ldr r4, =_ebss
 8004d64:	4c0a      	ldr	r4, [pc, #40]	@ (8004d90 <LoopFillZerobss+0x22>)
  movs r3, #0
 8004d66:	2300      	movs	r3, #0
  b LoopFillZerobss
 8004d68:	e001      	b.n	8004d6e <LoopFillZerobss>

08004d6a <FillZerobss>:

FillZerobss:
  str  r3, [r2]
 8004d6a:	6013      	str	r3, [r2, #0]
  adds r2, r2, #4
 8004d6c:	3204      	adds	r2, #4

08004d6e <LoopFillZerobss>:

LoopFillZerobss:
  cmp r2, r4
 8004d6e:	42a2      	cmp	r2, r4
  bcc FillZerobss
 8004d70:	d3fb      	bcc.n	8004d6a <FillZerobss>

/* Call static constructors */
    bl __libc_init_array
 8004d72:	f025 f895 	bl	8029ea0 <__libc_init_array>
/* Call the application's entry point.*/
  bl  main
 8004d76:	f7fc ff9f 	bl	8001cb8 <main>
  bx  lr
 8004d7a:	4770      	bx	lr
  ldr   sp, =_estack      /* set stack pointer */
 8004d7c:	24060000 	.word	0x24060000
  ldr r0, =_sdata
 8004d80:	24000000 	.word	0x24000000
  ldr r1, =_edata
 8004d84:	24000224 	.word	0x24000224
  ldr r2, =_sidata
 8004d88:	0803110c 	.word	0x0803110c
  ldr r2, =_sbss
 8004d8c:	24000224 	.word	0x24000224
  ldr r4, =_ebss
 8004d90:	2402b188 	.word	0x2402b188

08004d94 <ADC3_IRQHandler>:
 * @retval None
*/
    .section  .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b  Infinite_Loop
 8004d94:	e7fe      	b.n	8004d94 <ADC3_IRQHandler>

08004d96 <DP83848_RegisterBusIO>:
  * @param  ioctx: holds device IO functions.
  * @retval DP83848_STATUS_OK  if OK
  *         DP83848_STATUS_ERROR if missing mandatory function
  */
int32_t  DP83848_RegisterBusIO(dp83848_Object_t *pObj, dp83848_IOCtx_t *ioctx)
{
 8004d96:	b480      	push	{r7}
 8004d98:	b083      	sub	sp, #12
 8004d9a:	af00      	add	r7, sp, #0
 8004d9c:	6078      	str	r0, [r7, #4]
 8004d9e:	6039      	str	r1, [r7, #0]
  if(!pObj || !ioctx->ReadReg || !ioctx->WriteReg || !ioctx->GetTick)
 8004da0:	687b      	ldr	r3, [r7, #4]
 8004da2:	2b00      	cmp	r3, #0
 8004da4:	d00b      	beq.n	8004dbe <DP83848_RegisterBusIO+0x28>
 8004da6:	683b      	ldr	r3, [r7, #0]
 8004da8:	68db      	ldr	r3, [r3, #12]
 8004daa:	2b00      	cmp	r3, #0
 8004dac:	d007      	beq.n	8004dbe <DP83848_RegisterBusIO+0x28>
 8004dae:	683b      	ldr	r3, [r7, #0]
 8004db0:	689b      	ldr	r3, [r3, #8]
 8004db2:	2b00      	cmp	r3, #0
 8004db4:	d003      	beq.n	8004dbe <DP83848_RegisterBusIO+0x28>
 8004db6:	683b      	ldr	r3, [r7, #0]
 8004db8:	691b      	ldr	r3, [r3, #16]
 8004dba:	2b00      	cmp	r3, #0
 8004dbc:	d102      	bne.n	8004dc4 <DP83848_RegisterBusIO+0x2e>
  {
    return DP83848_STATUS_ERROR;
 8004dbe:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8004dc2:	e014      	b.n	8004dee <DP83848_RegisterBusIO+0x58>
  }

  pObj->IO.Init = ioctx->Init;
 8004dc4:	683b      	ldr	r3, [r7, #0]
 8004dc6:	681a      	ldr	r2, [r3, #0]
 8004dc8:	687b      	ldr	r3, [r7, #4]
 8004dca:	609a      	str	r2, [r3, #8]
  pObj->IO.DeInit = ioctx->DeInit;
 8004dcc:	683b      	ldr	r3, [r7, #0]
 8004dce:	685a      	ldr	r2, [r3, #4]
 8004dd0:	687b      	ldr	r3, [r7, #4]
 8004dd2:	60da      	str	r2, [r3, #12]
  pObj->IO.ReadReg = ioctx->ReadReg;
 8004dd4:	683b      	ldr	r3, [r7, #0]
 8004dd6:	68da      	ldr	r2, [r3, #12]
 8004dd8:	687b      	ldr	r3, [r7, #4]
 8004dda:	615a      	str	r2, [r3, #20]
  pObj->IO.WriteReg = ioctx->WriteReg;
 8004ddc:	683b      	ldr	r3, [r7, #0]
 8004dde:	689a      	ldr	r2, [r3, #8]
 8004de0:	687b      	ldr	r3, [r7, #4]
 8004de2:	611a      	str	r2, [r3, #16]
  pObj->IO.GetTick = ioctx->GetTick;
 8004de4:	683b      	ldr	r3, [r7, #0]
 8004de6:	691a      	ldr	r2, [r3, #16]
 8004de8:	687b      	ldr	r3, [r7, #4]
 8004dea:	619a      	str	r2, [r3, #24]

  return DP83848_STATUS_OK;
 8004dec:	2300      	movs	r3, #0
}
 8004dee:	4618      	mov	r0, r3
 8004df0:	370c      	adds	r7, #12
 8004df2:	46bd      	mov	sp, r7
 8004df4:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004df8:	4770      	bx	lr

08004dfa <DP83848_Init>:
  * @retval DP83848_STATUS_OK  if OK
  *         DP83848_STATUS_ADDRESS_ERROR if cannot find device address
  *         DP83848_STATUS_READ_ERROR if connot read register
  */
 int32_t DP83848_Init(dp83848_Object_t *pObj)
 {
 8004dfa:	b580      	push	{r7, lr}
 8004dfc:	b086      	sub	sp, #24
 8004dfe:	af00      	add	r7, sp, #0
 8004e00:	6078      	str	r0, [r7, #4]
   uint32_t regvalue = 0, addr = 0;
 8004e02:	2300      	movs	r3, #0
 8004e04:	60fb      	str	r3, [r7, #12]
 8004e06:	2300      	movs	r3, #0
 8004e08:	617b      	str	r3, [r7, #20]
   int32_t status = DP83848_STATUS_OK;
 8004e0a:	2300      	movs	r3, #0
 8004e0c:	613b      	str	r3, [r7, #16]

   if(pObj->Is_Initialized == 0)
 8004e0e:	687b      	ldr	r3, [r7, #4]
 8004e10:	685b      	ldr	r3, [r3, #4]
 8004e12:	2b00      	cmp	r3, #0
 8004e14:	d139      	bne.n	8004e8a <DP83848_Init+0x90>
   {
     if(pObj->IO.Init != 0)
 8004e16:	687b      	ldr	r3, [r7, #4]
 8004e18:	689b      	ldr	r3, [r3, #8]
 8004e1a:	2b00      	cmp	r3, #0
 8004e1c:	d002      	beq.n	8004e24 <DP83848_Init+0x2a>
     {
       /* GPIO and Clocks initialization */
       pObj->IO.Init();
 8004e1e:	687b      	ldr	r3, [r7, #4]
 8004e20:	689b      	ldr	r3, [r3, #8]
 8004e22:	4798      	blx	r3
     }

     /* for later check */
     pObj->DevAddr = DP83848_MAX_DEV_ADDR + 1;
 8004e24:	687b      	ldr	r3, [r7, #4]
 8004e26:	2220      	movs	r2, #32
 8004e28:	601a      	str	r2, [r3, #0]

     /* Get the device address from special mode register */
     for(addr = 0; addr <= DP83848_MAX_DEV_ADDR; addr ++)
 8004e2a:	2300      	movs	r3, #0
 8004e2c:	617b      	str	r3, [r7, #20]
 8004e2e:	e01c      	b.n	8004e6a <DP83848_Init+0x70>
     {
       if(pObj->IO.ReadReg(addr, DP83848_SMR, &regvalue) < 0)
 8004e30:	687b      	ldr	r3, [r7, #4]
 8004e32:	695b      	ldr	r3, [r3, #20]
 8004e34:	f107 020c 	add.w	r2, r7, #12
 8004e38:	2119      	movs	r1, #25
 8004e3a:	6978      	ldr	r0, [r7, #20]
 8004e3c:	4798      	blx	r3
 8004e3e:	4603      	mov	r3, r0
 8004e40:	2b00      	cmp	r3, #0
 8004e42:	da03      	bge.n	8004e4c <DP83848_Init+0x52>
       {
         status = DP83848_STATUS_READ_ERROR;
 8004e44:	f06f 0304 	mvn.w	r3, #4
 8004e48:	613b      	str	r3, [r7, #16]
         /* Can't read from this device address
            continue with next address */
         continue;
 8004e4a:	e00b      	b.n	8004e64 <DP83848_Init+0x6a>
       }

       if((regvalue & DP83848_SMR_PHY_ADDR) == addr)
 8004e4c:	68fb      	ldr	r3, [r7, #12]
 8004e4e:	f003 031f 	and.w	r3, r3, #31
 8004e52:	697a      	ldr	r2, [r7, #20]
 8004e54:	429a      	cmp	r2, r3
 8004e56:	d105      	bne.n	8004e64 <DP83848_Init+0x6a>
       {
         pObj->DevAddr = addr;
 8004e58:	687b      	ldr	r3, [r7, #4]
 8004e5a:	697a      	ldr	r2, [r7, #20]
 8004e5c:	601a      	str	r2, [r3, #0]
         status = DP83848_STATUS_OK;
 8004e5e:	2300      	movs	r3, #0
 8004e60:	613b      	str	r3, [r7, #16]
         break;
 8004e62:	e005      	b.n	8004e70 <DP83848_Init+0x76>
     for(addr = 0; addr <= DP83848_MAX_DEV_ADDR; addr ++)
 8004e64:	697b      	ldr	r3, [r7, #20]
 8004e66:	3301      	adds	r3, #1
 8004e68:	617b      	str	r3, [r7, #20]
 8004e6a:	697b      	ldr	r3, [r7, #20]
 8004e6c:	2b1f      	cmp	r3, #31
 8004e6e:	d9df      	bls.n	8004e30 <DP83848_Init+0x36>
       }
     }

     if(pObj->DevAddr > DP83848_MAX_DEV_ADDR)
 8004e70:	687b      	ldr	r3, [r7, #4]
 8004e72:	681b      	ldr	r3, [r3, #0]
 8004e74:	2b1f      	cmp	r3, #31
 8004e76:	d902      	bls.n	8004e7e <DP83848_Init+0x84>
     {
       status = DP83848_STATUS_ADDRESS_ERROR;
 8004e78:	f06f 0302 	mvn.w	r3, #2
 8004e7c:	613b      	str	r3, [r7, #16]
     }

     /* if device address is matched */
     if(status == DP83848_STATUS_OK)
 8004e7e:	693b      	ldr	r3, [r7, #16]
 8004e80:	2b00      	cmp	r3, #0
 8004e82:	d102      	bne.n	8004e8a <DP83848_Init+0x90>
     {
       pObj->Is_Initialized = 1;
 8004e84:	687b      	ldr	r3, [r7, #4]
 8004e86:	2201      	movs	r2, #1
 8004e88:	605a      	str	r2, [r3, #4]
     }
   }

   return status;
 8004e8a:	693b      	ldr	r3, [r7, #16]
 }
 8004e8c:	4618      	mov	r0, r3
 8004e8e:	3718      	adds	r7, #24
 8004e90:	46bd      	mov	sp, r7
 8004e92:	bd80      	pop	{r7, pc}

08004e94 <DP83848_GetLinkState>:
  *         DP83848_STATUS_10MBITS_HALFDUPLEX  if 10Mb/s HD
  *         DP83848_STATUS_READ_ERROR if connot read register
  *         DP83848_STATUS_WRITE_ERROR if connot write to register
  */
int32_t DP83848_GetLinkState(dp83848_Object_t *pObj)
{
 8004e94:	b580      	push	{r7, lr}
 8004e96:	b084      	sub	sp, #16
 8004e98:	af00      	add	r7, sp, #0
 8004e9a:	6078      	str	r0, [r7, #4]
  uint32_t readval = 0;
 8004e9c:	2300      	movs	r3, #0
 8004e9e:	60fb      	str	r3, [r7, #12]

  /* Read Status register  */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BSR, &readval) < 0)
 8004ea0:	687b      	ldr	r3, [r7, #4]
 8004ea2:	695b      	ldr	r3, [r3, #20]
 8004ea4:	687a      	ldr	r2, [r7, #4]
 8004ea6:	6810      	ldr	r0, [r2, #0]
 8004ea8:	f107 020c 	add.w	r2, r7, #12
 8004eac:	2101      	movs	r1, #1
 8004eae:	4798      	blx	r3
 8004eb0:	4603      	mov	r3, r0
 8004eb2:	2b00      	cmp	r3, #0
 8004eb4:	da02      	bge.n	8004ebc <DP83848_GetLinkState+0x28>
  {
    return DP83848_STATUS_READ_ERROR;
 8004eb6:	f06f 0304 	mvn.w	r3, #4
 8004eba:	e06e      	b.n	8004f9a <DP83848_GetLinkState+0x106>
  }

  /* Read Status register again */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BSR, &readval) < 0)
 8004ebc:	687b      	ldr	r3, [r7, #4]
 8004ebe:	695b      	ldr	r3, [r3, #20]
 8004ec0:	687a      	ldr	r2, [r7, #4]
 8004ec2:	6810      	ldr	r0, [r2, #0]
 8004ec4:	f107 020c 	add.w	r2, r7, #12
 8004ec8:	2101      	movs	r1, #1
 8004eca:	4798      	blx	r3
 8004ecc:	4603      	mov	r3, r0
 8004ece:	2b00      	cmp	r3, #0
 8004ed0:	da02      	bge.n	8004ed8 <DP83848_GetLinkState+0x44>
  {
    return DP83848_STATUS_READ_ERROR;
 8004ed2:	f06f 0304 	mvn.w	r3, #4
 8004ed6:	e060      	b.n	8004f9a <DP83848_GetLinkState+0x106>
  }

  if((readval & DP83848_BSR_LINK_STATUS) == 0)
 8004ed8:	68fb      	ldr	r3, [r7, #12]
 8004eda:	f003 0304 	and.w	r3, r3, #4
 8004ede:	2b00      	cmp	r3, #0
 8004ee0:	d101      	bne.n	8004ee6 <DP83848_GetLinkState+0x52>
  {
    /* Return Link Down status */
    return DP83848_STATUS_LINK_DOWN;
 8004ee2:	2301      	movs	r3, #1
 8004ee4:	e059      	b.n	8004f9a <DP83848_GetLinkState+0x106>
  }

  /* Check Auto negotiaition */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BCR, &readval) < 0)
 8004ee6:	687b      	ldr	r3, [r7, #4]
 8004ee8:	695b      	ldr	r3, [r3, #20]
 8004eea:	687a      	ldr	r2, [r7, #4]
 8004eec:	6810      	ldr	r0, [r2, #0]
 8004eee:	f107 020c 	add.w	r2, r7, #12
 8004ef2:	2100      	movs	r1, #0
 8004ef4:	4798      	blx	r3
 8004ef6:	4603      	mov	r3, r0
 8004ef8:	2b00      	cmp	r3, #0
 8004efa:	da02      	bge.n	8004f02 <DP83848_GetLinkState+0x6e>
  {
    return DP83848_STATUS_READ_ERROR;
 8004efc:	f06f 0304 	mvn.w	r3, #4
 8004f00:	e04b      	b.n	8004f9a <DP83848_GetLinkState+0x106>
  }

  if((readval & DP83848_BCR_AUTONEGO_EN) != DP83848_BCR_AUTONEGO_EN)
 8004f02:	68fb      	ldr	r3, [r7, #12]
 8004f04:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 8004f08:	2b00      	cmp	r3, #0
 8004f0a:	d11b      	bne.n	8004f44 <DP83848_GetLinkState+0xb0>
  {
    if(((readval & DP83848_BCR_SPEED_SELECT) == DP83848_BCR_SPEED_SELECT) && ((readval & DP83848_BCR_DUPLEX_MODE) == DP83848_BCR_DUPLEX_MODE))
 8004f0c:	68fb      	ldr	r3, [r7, #12]
 8004f0e:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8004f12:	2b00      	cmp	r3, #0
 8004f14:	d006      	beq.n	8004f24 <DP83848_GetLinkState+0x90>
 8004f16:	68fb      	ldr	r3, [r7, #12]
 8004f18:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8004f1c:	2b00      	cmp	r3, #0
 8004f1e:	d001      	beq.n	8004f24 <DP83848_GetLinkState+0x90>
    {
      return DP83848_STATUS_100MBITS_FULLDUPLEX;
 8004f20:	2302      	movs	r3, #2
 8004f22:	e03a      	b.n	8004f9a <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_BCR_SPEED_SELECT) == DP83848_BCR_SPEED_SELECT)
 8004f24:	68fb      	ldr	r3, [r7, #12]
 8004f26:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8004f2a:	2b00      	cmp	r3, #0
 8004f2c:	d001      	beq.n	8004f32 <DP83848_GetLinkState+0x9e>
    {
      return DP83848_STATUS_100MBITS_HALFDUPLEX;
 8004f2e:	2303      	movs	r3, #3
 8004f30:	e033      	b.n	8004f9a <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_BCR_DUPLEX_MODE) == DP83848_BCR_DUPLEX_MODE)
 8004f32:	68fb      	ldr	r3, [r7, #12]
 8004f34:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8004f38:	2b00      	cmp	r3, #0
 8004f3a:	d001      	beq.n	8004f40 <DP83848_GetLinkState+0xac>
    {
      return DP83848_STATUS_10MBITS_FULLDUPLEX;
 8004f3c:	2304      	movs	r3, #4
 8004f3e:	e02c      	b.n	8004f9a <DP83848_GetLinkState+0x106>
    }
    else
    {
      return DP83848_STATUS_10MBITS_HALFDUPLEX;
 8004f40:	2305      	movs	r3, #5
 8004f42:	e02a      	b.n	8004f9a <DP83848_GetLinkState+0x106>
    }
  }
  else /* Auto Nego enabled */
  {
    if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_PHYSCSR, &readval) < 0)
 8004f44:	687b      	ldr	r3, [r7, #4]
 8004f46:	695b      	ldr	r3, [r3, #20]
 8004f48:	687a      	ldr	r2, [r7, #4]
 8004f4a:	6810      	ldr	r0, [r2, #0]
 8004f4c:	f107 020c 	add.w	r2, r7, #12
 8004f50:	2110      	movs	r1, #16
 8004f52:	4798      	blx	r3
 8004f54:	4603      	mov	r3, r0
 8004f56:	2b00      	cmp	r3, #0
 8004f58:	da02      	bge.n	8004f60 <DP83848_GetLinkState+0xcc>
    {
      return DP83848_STATUS_READ_ERROR;
 8004f5a:	f06f 0304 	mvn.w	r3, #4
 8004f5e:	e01c      	b.n	8004f9a <DP83848_GetLinkState+0x106>
    }

    /* Check if auto nego not done */
    if((readval & DP83848_PHYSCSR_AUTONEGO_DONE) == 0)
 8004f60:	68fb      	ldr	r3, [r7, #12]
 8004f62:	f003 0310 	and.w	r3, r3, #16
 8004f66:	2b00      	cmp	r3, #0
 8004f68:	d101      	bne.n	8004f6e <DP83848_GetLinkState+0xda>
    {
      return DP83848_STATUS_AUTONEGO_NOTDONE;
 8004f6a:	2306      	movs	r3, #6
 8004f6c:	e015      	b.n	8004f9a <DP83848_GetLinkState+0x106>
    }

    if((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_100BTX_FD)
 8004f6e:	68fb      	ldr	r3, [r7, #12]
 8004f70:	f003 0306 	and.w	r3, r3, #6
 8004f74:	2b04      	cmp	r3, #4
 8004f76:	d101      	bne.n	8004f7c <DP83848_GetLinkState+0xe8>
    {
      return DP83848_STATUS_100MBITS_FULLDUPLEX;
 8004f78:	2302      	movs	r3, #2
 8004f7a:	e00e      	b.n	8004f9a <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_100BTX_HD)
 8004f7c:	68fb      	ldr	r3, [r7, #12]
 8004f7e:	f003 0306 	and.w	r3, r3, #6
 8004f82:	2b00      	cmp	r3, #0
 8004f84:	d101      	bne.n	8004f8a <DP83848_GetLinkState+0xf6>
    {
      return DP83848_STATUS_100MBITS_HALFDUPLEX;
 8004f86:	2303      	movs	r3, #3
 8004f88:	e007      	b.n	8004f9a <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_10BT_FD)
 8004f8a:	68fb      	ldr	r3, [r7, #12]
 8004f8c:	f003 0306 	and.w	r3, r3, #6
 8004f90:	2b06      	cmp	r3, #6
 8004f92:	d101      	bne.n	8004f98 <DP83848_GetLinkState+0x104>
    {
      return DP83848_STATUS_10MBITS_FULLDUPLEX;
 8004f94:	2304      	movs	r3, #4
 8004f96:	e000      	b.n	8004f9a <DP83848_GetLinkState+0x106>
    }
    else
    {
      return DP83848_STATUS_10MBITS_HALFDUPLEX;
 8004f98:	2305      	movs	r3, #5
    }
  }
}
 8004f9a:	4618      	mov	r0, r3
 8004f9c:	3710      	adds	r7, #16
 8004f9e:	46bd      	mov	sp, r7
 8004fa0:	bd80      	pop	{r7, pc}
	...

08004fa4 <HAL_Init>:
  *         need to ensure that the SysTick time base is always set to 1 millisecond
  *         to have correct HAL operation.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_Init(void)
{
 8004fa4:	b580      	push	{r7, lr}
 8004fa6:	b082      	sub	sp, #8
 8004fa8:	af00      	add	r7, sp, #0
   __HAL_ART_CONFIG_BASE_ADDRESS(0x08100000UL);  /* Configure the Cortex-M4 ART Base address to the Flash Bank 2 : */
   __HAL_ART_ENABLE();                           /* Enable the Cortex-M4 ART */
#endif /* DUAL_CORE &&  CORE_CM4 */

  /* Set Interrupt Group Priority */
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 8004faa:	2003      	movs	r0, #3
 8004fac:	f000 f947 	bl	800523e <HAL_NVIC_SetPriorityGrouping>

  /* Update the SystemCoreClock global variable */
#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU);
 8004fb0:	f005 fb8c 	bl	800a6cc <HAL_RCC_GetSysClockFreq>
 8004fb4:	4602      	mov	r2, r0
 8004fb6:	4b15      	ldr	r3, [pc, #84]	@ (800500c <HAL_Init+0x68>)
 8004fb8:	699b      	ldr	r3, [r3, #24]
 8004fba:	0a1b      	lsrs	r3, r3, #8
 8004fbc:	f003 030f 	and.w	r3, r3, #15
 8004fc0:	4913      	ldr	r1, [pc, #76]	@ (8005010 <HAL_Init+0x6c>)
 8004fc2:	5ccb      	ldrb	r3, [r1, r3]
 8004fc4:	f003 031f 	and.w	r3, r3, #31
 8004fc8:	fa22 f303 	lsr.w	r3, r2, r3
 8004fcc:	607b      	str	r3, [r7, #4]
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU);
#endif

  /* Update the SystemD2Clock global variable */
#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 8004fce:	4b0f      	ldr	r3, [pc, #60]	@ (800500c <HAL_Init+0x68>)
 8004fd0:	699b      	ldr	r3, [r3, #24]
 8004fd2:	f003 030f 	and.w	r3, r3, #15
 8004fd6:	4a0e      	ldr	r2, [pc, #56]	@ (8005010 <HAL_Init+0x6c>)
 8004fd8:	5cd3      	ldrb	r3, [r2, r3]
 8004fda:	f003 031f 	and.w	r3, r3, #31
 8004fde:	687a      	ldr	r2, [r7, #4]
 8004fe0:	fa22 f303 	lsr.w	r3, r2, r3
 8004fe4:	4a0b      	ldr	r2, [pc, #44]	@ (8005014 <HAL_Init+0x70>)
 8004fe6:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 8004fe8:	4a0b      	ldr	r2, [pc, #44]	@ (8005018 <HAL_Init+0x74>)
 8004fea:	687b      	ldr	r3, [r7, #4]
 8004fec:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
  if(HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
 8004fee:	200f      	movs	r0, #15
 8004ff0:	f7fe fc7a 	bl	80038e8 <HAL_InitTick>
 8004ff4:	4603      	mov	r3, r0
 8004ff6:	2b00      	cmp	r3, #0
 8004ff8:	d001      	beq.n	8004ffe <HAL_Init+0x5a>
  {
    return HAL_ERROR;
 8004ffa:	2301      	movs	r3, #1
 8004ffc:	e002      	b.n	8005004 <HAL_Init+0x60>
  }

  /* Init the low level hardware */
  HAL_MspInit();
 8004ffe:	f7fe f985 	bl	800330c <HAL_MspInit>

  /* Return function status */
  return HAL_OK;
 8005002:	2300      	movs	r3, #0
}
 8005004:	4618      	mov	r0, r3
 8005006:	3708      	adds	r7, #8
 8005008:	46bd      	mov	sp, r7
 800500a:	bd80      	pop	{r7, pc}
 800500c:	58024400 	.word	0x58024400
 8005010:	08030a7c 	.word	0x08030a7c
 8005014:	24000010 	.word	0x24000010
 8005018:	2400000c 	.word	0x2400000c

0800501c <HAL_IncTick>:
 * @note This function is declared as __weak to be overwritten in case of other
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
 800501c:	b480      	push	{r7}
 800501e:	af00      	add	r7, sp, #0
  uwTick += (uint32_t)uwTickFreq;
 8005020:	4b06      	ldr	r3, [pc, #24]	@ (800503c <HAL_IncTick+0x20>)
 8005022:	781b      	ldrb	r3, [r3, #0]
 8005024:	461a      	mov	r2, r3
 8005026:	4b06      	ldr	r3, [pc, #24]	@ (8005040 <HAL_IncTick+0x24>)
 8005028:	681b      	ldr	r3, [r3, #0]
 800502a:	4413      	add	r3, r2
 800502c:	4a04      	ldr	r2, [pc, #16]	@ (8005040 <HAL_IncTick+0x24>)
 800502e:	6013      	str	r3, [r2, #0]
}
 8005030:	bf00      	nop
 8005032:	46bd      	mov	sp, r7
 8005034:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005038:	4770      	bx	lr
 800503a:	bf00      	nop
 800503c:	24000030 	.word	0x24000030
 8005040:	24002170 	.word	0x24002170

08005044 <HAL_GetTick>:
  * @note This function is declared as __weak to be overwritten in case of other
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
 8005044:	b480      	push	{r7}
 8005046:	af00      	add	r7, sp, #0
  return uwTick;
 8005048:	4b03      	ldr	r3, [pc, #12]	@ (8005058 <HAL_GetTick+0x14>)
 800504a:	681b      	ldr	r3, [r3, #0]
}
 800504c:	4618      	mov	r0, r3
 800504e:	46bd      	mov	sp, r7
 8005050:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005054:	4770      	bx	lr
 8005056:	bf00      	nop
 8005058:	24002170 	.word	0x24002170

0800505c <HAL_Delay>:
  *       implementations in user file.
  * @param Delay  specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 800505c:	b580      	push	{r7, lr}
 800505e:	b084      	sub	sp, #16
 8005060:	af00      	add	r7, sp, #0
 8005062:	6078      	str	r0, [r7, #4]
  uint32_t tickstart = HAL_GetTick();
 8005064:	f7ff ffee 	bl	8005044 <HAL_GetTick>
 8005068:	60b8      	str	r0, [r7, #8]
  uint32_t wait = Delay;
 800506a:	687b      	ldr	r3, [r7, #4]
 800506c:	60fb      	str	r3, [r7, #12]

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 800506e:	68fb      	ldr	r3, [r7, #12]
 8005070:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8005074:	d005      	beq.n	8005082 <HAL_Delay+0x26>
  {
    wait += (uint32_t)(uwTickFreq);
 8005076:	4b0a      	ldr	r3, [pc, #40]	@ (80050a0 <HAL_Delay+0x44>)
 8005078:	781b      	ldrb	r3, [r3, #0]
 800507a:	461a      	mov	r2, r3
 800507c:	68fb      	ldr	r3, [r7, #12]
 800507e:	4413      	add	r3, r2
 8005080:	60fb      	str	r3, [r7, #12]
  }

  while ((HAL_GetTick() - tickstart) < wait)
 8005082:	bf00      	nop
 8005084:	f7ff ffde 	bl	8005044 <HAL_GetTick>
 8005088:	4602      	mov	r2, r0
 800508a:	68bb      	ldr	r3, [r7, #8]
 800508c:	1ad3      	subs	r3, r2, r3
 800508e:	68fa      	ldr	r2, [r7, #12]
 8005090:	429a      	cmp	r2, r3
 8005092:	d8f7      	bhi.n	8005084 <HAL_Delay+0x28>
  {
  }
}
 8005094:	bf00      	nop
 8005096:	bf00      	nop
 8005098:	3710      	adds	r7, #16
 800509a:	46bd      	mov	sp, r7
 800509c:	bd80      	pop	{r7, pc}
 800509e:	bf00      	nop
 80050a0:	24000030 	.word	0x24000030

080050a4 <HAL_GetREVID>:
/**
  * @brief  Returns the device revision identifier.
  * @retval Device revision identifier
  */
uint32_t HAL_GetREVID(void)
{
 80050a4:	b480      	push	{r7}
 80050a6:	af00      	add	r7, sp, #0
   return((DBGMCU->IDCODE) >> 16);
 80050a8:	4b03      	ldr	r3, [pc, #12]	@ (80050b8 <HAL_GetREVID+0x14>)
 80050aa:	681b      	ldr	r3, [r3, #0]
 80050ac:	0c1b      	lsrs	r3, r3, #16
}
 80050ae:	4618      	mov	r0, r3
 80050b0:	46bd      	mov	sp, r7
 80050b2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80050b6:	4770      	bx	lr
 80050b8:	5c001000 	.word	0x5c001000

080050bc <HAL_SYSCFG_ETHInterfaceSelect>:
  *   @arg SYSCFG_ETH_MII : Select the Media Independent Interface
  *   @arg SYSCFG_ETH_RMII: Select the Reduced Media Independent Interface
  * @retval None
  */
void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface)
{
 80050bc:	b480      	push	{r7}
 80050be:	b083      	sub	sp, #12
 80050c0:	af00      	add	r7, sp, #0
 80050c2:	6078      	str	r0, [r7, #4]
  /* Check the parameter */
  assert_param(IS_SYSCFG_ETHERNET_CONFIG(SYSCFG_ETHInterface));

  MODIFY_REG(SYSCFG->PMCR, SYSCFG_PMCR_EPIS_SEL, (uint32_t)(SYSCFG_ETHInterface));
 80050c4:	4b06      	ldr	r3, [pc, #24]	@ (80050e0 <HAL_SYSCFG_ETHInterfaceSelect+0x24>)
 80050c6:	685b      	ldr	r3, [r3, #4]
 80050c8:	f423 0260 	bic.w	r2, r3, #14680064	@ 0xe00000
 80050cc:	4904      	ldr	r1, [pc, #16]	@ (80050e0 <HAL_SYSCFG_ETHInterfaceSelect+0x24>)
 80050ce:	687b      	ldr	r3, [r7, #4]
 80050d0:	4313      	orrs	r3, r2
 80050d2:	604b      	str	r3, [r1, #4]
}
 80050d4:	bf00      	nop
 80050d6:	370c      	adds	r7, #12
 80050d8:	46bd      	mov	sp, r7
 80050da:	f85d 7b04 	ldr.w	r7, [sp], #4
 80050de:	4770      	bx	lr
 80050e0:	58000400 	.word	0x58000400

080050e4 <__NVIC_SetPriorityGrouping>:
{
 80050e4:	b480      	push	{r7}
 80050e6:	b085      	sub	sp, #20
 80050e8:	af00      	add	r7, sp, #0
 80050ea:	6078      	str	r0, [r7, #4]
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
 80050ec:	687b      	ldr	r3, [r7, #4]
 80050ee:	f003 0307 	and.w	r3, r3, #7
 80050f2:	60fb      	str	r3, [r7, #12]
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 80050f4:	4b0b      	ldr	r3, [pc, #44]	@ (8005124 <__NVIC_SetPriorityGrouping+0x40>)
 80050f6:	68db      	ldr	r3, [r3, #12]
 80050f8:	60bb      	str	r3, [r7, #8]
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 80050fa:	68ba      	ldr	r2, [r7, #8]
 80050fc:	f64f 03ff 	movw	r3, #63743	@ 0xf8ff
 8005100:	4013      	ands	r3, r2
 8005102:	60bb      	str	r3, [r7, #8]
                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
 8005104:	68fb      	ldr	r3, [r7, #12]
 8005106:	021a      	lsls	r2, r3, #8
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
 8005108:	68bb      	ldr	r3, [r7, #8]
 800510a:	431a      	orrs	r2, r3
  reg_value  =  (reg_value                                   |
 800510c:	4b06      	ldr	r3, [pc, #24]	@ (8005128 <__NVIC_SetPriorityGrouping+0x44>)
 800510e:	4313      	orrs	r3, r2
 8005110:	60bb      	str	r3, [r7, #8]
  SCB->AIRCR =  reg_value;
 8005112:	4a04      	ldr	r2, [pc, #16]	@ (8005124 <__NVIC_SetPriorityGrouping+0x40>)
 8005114:	68bb      	ldr	r3, [r7, #8]
 8005116:	60d3      	str	r3, [r2, #12]
}
 8005118:	bf00      	nop
 800511a:	3714      	adds	r7, #20
 800511c:	46bd      	mov	sp, r7
 800511e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005122:	4770      	bx	lr
 8005124:	e000ed00 	.word	0xe000ed00
 8005128:	05fa0000 	.word	0x05fa0000

0800512c <__NVIC_GetPriorityGrouping>:
{
 800512c:	b480      	push	{r7}
 800512e:	af00      	add	r7, sp, #0
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 8005130:	4b04      	ldr	r3, [pc, #16]	@ (8005144 <__NVIC_GetPriorityGrouping+0x18>)
 8005132:	68db      	ldr	r3, [r3, #12]
 8005134:	0a1b      	lsrs	r3, r3, #8
 8005136:	f003 0307 	and.w	r3, r3, #7
}
 800513a:	4618      	mov	r0, r3
 800513c:	46bd      	mov	sp, r7
 800513e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005142:	4770      	bx	lr
 8005144:	e000ed00 	.word	0xe000ed00

08005148 <__NVIC_EnableIRQ>:
{
 8005148:	b480      	push	{r7}
 800514a:	b083      	sub	sp, #12
 800514c:	af00      	add	r7, sp, #0
 800514e:	4603      	mov	r3, r0
 8005150:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 8005152:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8005156:	2b00      	cmp	r3, #0
 8005158:	db0b      	blt.n	8005172 <__NVIC_EnableIRQ+0x2a>
    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
 800515a:	88fb      	ldrh	r3, [r7, #6]
 800515c:	f003 021f 	and.w	r2, r3, #31
 8005160:	4907      	ldr	r1, [pc, #28]	@ (8005180 <__NVIC_EnableIRQ+0x38>)
 8005162:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8005166:	095b      	lsrs	r3, r3, #5
 8005168:	2001      	movs	r0, #1
 800516a:	fa00 f202 	lsl.w	r2, r0, r2
 800516e:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
}
 8005172:	bf00      	nop
 8005174:	370c      	adds	r7, #12
 8005176:	46bd      	mov	sp, r7
 8005178:	f85d 7b04 	ldr.w	r7, [sp], #4
 800517c:	4770      	bx	lr
 800517e:	bf00      	nop
 8005180:	e000e100 	.word	0xe000e100

08005184 <__NVIC_SetPriority>:
{
 8005184:	b480      	push	{r7}
 8005186:	b083      	sub	sp, #12
 8005188:	af00      	add	r7, sp, #0
 800518a:	4603      	mov	r3, r0
 800518c:	6039      	str	r1, [r7, #0]
 800518e:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 8005190:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8005194:	2b00      	cmp	r3, #0
 8005196:	db0a      	blt.n	80051ae <__NVIC_SetPriority+0x2a>
    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005198:	683b      	ldr	r3, [r7, #0]
 800519a:	b2da      	uxtb	r2, r3
 800519c:	490c      	ldr	r1, [pc, #48]	@ (80051d0 <__NVIC_SetPriority+0x4c>)
 800519e:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 80051a2:	0112      	lsls	r2, r2, #4
 80051a4:	b2d2      	uxtb	r2, r2
 80051a6:	440b      	add	r3, r1
 80051a8:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
}
 80051ac:	e00a      	b.n	80051c4 <__NVIC_SetPriority+0x40>
    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80051ae:	683b      	ldr	r3, [r7, #0]
 80051b0:	b2da      	uxtb	r2, r3
 80051b2:	4908      	ldr	r1, [pc, #32]	@ (80051d4 <__NVIC_SetPriority+0x50>)
 80051b4:	88fb      	ldrh	r3, [r7, #6]
 80051b6:	f003 030f 	and.w	r3, r3, #15
 80051ba:	3b04      	subs	r3, #4
 80051bc:	0112      	lsls	r2, r2, #4
 80051be:	b2d2      	uxtb	r2, r2
 80051c0:	440b      	add	r3, r1
 80051c2:	761a      	strb	r2, [r3, #24]
}
 80051c4:	bf00      	nop
 80051c6:	370c      	adds	r7, #12
 80051c8:	46bd      	mov	sp, r7
 80051ca:	f85d 7b04 	ldr.w	r7, [sp], #4
 80051ce:	4770      	bx	lr
 80051d0:	e000e100 	.word	0xe000e100
 80051d4:	e000ed00 	.word	0xe000ed00

080051d8 <NVIC_EncodePriority>:
{
 80051d8:	b480      	push	{r7}
 80051da:	b089      	sub	sp, #36	@ 0x24
 80051dc:	af00      	add	r7, sp, #0
 80051de:	60f8      	str	r0, [r7, #12]
 80051e0:	60b9      	str	r1, [r7, #8]
 80051e2:	607a      	str	r2, [r7, #4]
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
 80051e4:	68fb      	ldr	r3, [r7, #12]
 80051e6:	f003 0307 	and.w	r3, r3, #7
 80051ea:	61fb      	str	r3, [r7, #28]
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 80051ec:	69fb      	ldr	r3, [r7, #28]
 80051ee:	f1c3 0307 	rsb	r3, r3, #7
 80051f2:	2b04      	cmp	r3, #4
 80051f4:	bf28      	it	cs
 80051f6:	2304      	movcs	r3, #4
 80051f8:	61bb      	str	r3, [r7, #24]
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 80051fa:	69fb      	ldr	r3, [r7, #28]
 80051fc:	3304      	adds	r3, #4
 80051fe:	2b06      	cmp	r3, #6
 8005200:	d902      	bls.n	8005208 <NVIC_EncodePriority+0x30>
 8005202:	69fb      	ldr	r3, [r7, #28]
 8005204:	3b03      	subs	r3, #3
 8005206:	e000      	b.n	800520a <NVIC_EncodePriority+0x32>
 8005208:	2300      	movs	r3, #0
 800520a:	617b      	str	r3, [r7, #20]
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 800520c:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8005210:	69bb      	ldr	r3, [r7, #24]
 8005212:	fa02 f303 	lsl.w	r3, r2, r3
 8005216:	43da      	mvns	r2, r3
 8005218:	68bb      	ldr	r3, [r7, #8]
 800521a:	401a      	ands	r2, r3
 800521c:	697b      	ldr	r3, [r7, #20]
 800521e:	409a      	lsls	r2, r3
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 8005220:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8005224:	697b      	ldr	r3, [r7, #20]
 8005226:	fa01 f303 	lsl.w	r3, r1, r3
 800522a:	43d9      	mvns	r1, r3
 800522c:	687b      	ldr	r3, [r7, #4]
 800522e:	400b      	ands	r3, r1
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8005230:	4313      	orrs	r3, r2
}
 8005232:	4618      	mov	r0, r3
 8005234:	3724      	adds	r7, #36	@ 0x24
 8005236:	46bd      	mov	sp, r7
 8005238:	f85d 7b04 	ldr.w	r7, [sp], #4
 800523c:	4770      	bx	lr

0800523e <HAL_NVIC_SetPriorityGrouping>:
  * @note   When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
  *         The pending IRQ priority will be managed only by the subpriority.
  * @retval None
  */
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
 800523e:	b580      	push	{r7, lr}
 8005240:	b082      	sub	sp, #8
 8005242:	af00      	add	r7, sp, #0
 8005244:	6078      	str	r0, [r7, #4]
  /* Check the parameters */
  assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));

  /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
  NVIC_SetPriorityGrouping(PriorityGroup);
 8005246:	6878      	ldr	r0, [r7, #4]
 8005248:	f7ff ff4c 	bl	80050e4 <__NVIC_SetPriorityGrouping>
}
 800524c:	bf00      	nop
 800524e:	3708      	adds	r7, #8
 8005250:	46bd      	mov	sp, r7
 8005252:	bd80      	pop	{r7, pc}

08005254 <HAL_NVIC_SetPriority>:
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
 8005254:	b580      	push	{r7, lr}
 8005256:	b086      	sub	sp, #24
 8005258:	af00      	add	r7, sp, #0
 800525a:	4603      	mov	r3, r0
 800525c:	60b9      	str	r1, [r7, #8]
 800525e:	607a      	str	r2, [r7, #4]
 8005260:	81fb      	strh	r3, [r7, #14]

  /* Check the parameters */
  assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
  assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));

  prioritygroup = NVIC_GetPriorityGrouping();
 8005262:	f7ff ff63 	bl	800512c <__NVIC_GetPriorityGrouping>
 8005266:	6178      	str	r0, [r7, #20]

  NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
 8005268:	687a      	ldr	r2, [r7, #4]
 800526a:	68b9      	ldr	r1, [r7, #8]
 800526c:	6978      	ldr	r0, [r7, #20]
 800526e:	f7ff ffb3 	bl	80051d8 <NVIC_EncodePriority>
 8005272:	4602      	mov	r2, r0
 8005274:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
 8005278:	4611      	mov	r1, r2
 800527a:	4618      	mov	r0, r3
 800527c:	f7ff ff82 	bl	8005184 <__NVIC_SetPriority>
}
 8005280:	bf00      	nop
 8005282:	3718      	adds	r7, #24
 8005284:	46bd      	mov	sp, r7
 8005286:	bd80      	pop	{r7, pc}

08005288 <HAL_NVIC_EnableIRQ>:
  *         This parameter can be an enumerator of IRQn_Type enumeration
  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32h7xxxx.h))
  * @retval None
  */
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
 8005288:	b580      	push	{r7, lr}
 800528a:	b082      	sub	sp, #8
 800528c:	af00      	add	r7, sp, #0
 800528e:	4603      	mov	r3, r0
 8005290:	80fb      	strh	r3, [r7, #6]
  /* Check the parameters */
  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));

  /* Enable interrupt */
  NVIC_EnableIRQ(IRQn);
 8005292:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8005296:	4618      	mov	r0, r3
 8005298:	f7ff ff56 	bl	8005148 <__NVIC_EnableIRQ>
}
 800529c:	bf00      	nop
 800529e:	3708      	adds	r7, #8
 80052a0:	46bd      	mov	sp, r7
 80052a2:	bd80      	pop	{r7, pc}

080052a4 <HAL_MPU_Disable>:
/**
  * @brief  Disables the MPU
  * @retval None
  */
void HAL_MPU_Disable(void)
{
 80052a4:	b480      	push	{r7}
 80052a6:	af00      	add	r7, sp, #0
  \details Ensures the apparent order of the explicit memory operations before
           and after the instruction, without ensuring their completion.
 */
__STATIC_FORCEINLINE void __DMB(void)
{
  __ASM volatile ("dmb 0xF":::"memory");
 80052a8:	f3bf 8f5f 	dmb	sy
}
 80052ac:	bf00      	nop
  /* Make sure outstanding transfers are done */
  __DMB();

  /* Disable fault exceptions */
  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
 80052ae:	4b07      	ldr	r3, [pc, #28]	@ (80052cc <HAL_MPU_Disable+0x28>)
 80052b0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80052b2:	4a06      	ldr	r2, [pc, #24]	@ (80052cc <HAL_MPU_Disable+0x28>)
 80052b4:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 80052b8:	6253      	str	r3, [r2, #36]	@ 0x24

  /* Disable the MPU and clear the control register*/
  MPU->CTRL = 0;
 80052ba:	4b05      	ldr	r3, [pc, #20]	@ (80052d0 <HAL_MPU_Disable+0x2c>)
 80052bc:	2200      	movs	r2, #0
 80052be:	605a      	str	r2, [r3, #4]
}
 80052c0:	bf00      	nop
 80052c2:	46bd      	mov	sp, r7
 80052c4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80052c8:	4770      	bx	lr
 80052ca:	bf00      	nop
 80052cc:	e000ed00 	.word	0xe000ed00
 80052d0:	e000ed90 	.word	0xe000ed90

080052d4 <HAL_MPU_Enable>:
  *            @arg MPU_PRIVILEGED_DEFAULT
  *            @arg MPU_HFNMI_PRIVDEF
  * @retval None
  */
void HAL_MPU_Enable(uint32_t MPU_Control)
{
 80052d4:	b480      	push	{r7}
 80052d6:	b083      	sub	sp, #12
 80052d8:	af00      	add	r7, sp, #0
 80052da:	6078      	str	r0, [r7, #4]
  /* Enable the MPU */
  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 80052dc:	4a0b      	ldr	r2, [pc, #44]	@ (800530c <HAL_MPU_Enable+0x38>)
 80052de:	687b      	ldr	r3, [r7, #4]
 80052e0:	f043 0301 	orr.w	r3, r3, #1
 80052e4:	6053      	str	r3, [r2, #4]

  /* Enable fault exceptions */
  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
 80052e6:	4b0a      	ldr	r3, [pc, #40]	@ (8005310 <HAL_MPU_Enable+0x3c>)
 80052e8:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80052ea:	4a09      	ldr	r2, [pc, #36]	@ (8005310 <HAL_MPU_Enable+0x3c>)
 80052ec:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 80052f0:	6253      	str	r3, [r2, #36]	@ 0x24
  __ASM volatile ("dsb 0xF":::"memory");
 80052f2:	f3bf 8f4f 	dsb	sy
}
 80052f6:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 80052f8:	f3bf 8f6f 	isb	sy
}
 80052fc:	bf00      	nop

  /* Ensure MPU setting take effects */
  __DSB();
  __ISB();
}
 80052fe:	bf00      	nop
 8005300:	370c      	adds	r7, #12
 8005302:	46bd      	mov	sp, r7
 8005304:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005308:	4770      	bx	lr
 800530a:	bf00      	nop
 800530c:	e000ed90 	.word	0xe000ed90
 8005310:	e000ed00 	.word	0xe000ed00

08005314 <HAL_MPU_ConfigRegion>:
  * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains
  *                the initialization and configuration information.
  * @retval None
  */
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
{
 8005314:	b480      	push	{r7}
 8005316:	b083      	sub	sp, #12
 8005318:	af00      	add	r7, sp, #0
 800531a:	6078      	str	r0, [r7, #4]
  assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
  assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
  assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));

  /* Set the Region number */
  MPU->RNR = MPU_Init->Number;
 800531c:	687b      	ldr	r3, [r7, #4]
 800531e:	785a      	ldrb	r2, [r3, #1]
 8005320:	4b1b      	ldr	r3, [pc, #108]	@ (8005390 <HAL_MPU_ConfigRegion+0x7c>)
 8005322:	609a      	str	r2, [r3, #8]

  /* Disable the Region */
  CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
 8005324:	4b1a      	ldr	r3, [pc, #104]	@ (8005390 <HAL_MPU_ConfigRegion+0x7c>)
 8005326:	691b      	ldr	r3, [r3, #16]
 8005328:	4a19      	ldr	r2, [pc, #100]	@ (8005390 <HAL_MPU_ConfigRegion+0x7c>)
 800532a:	f023 0301 	bic.w	r3, r3, #1
 800532e:	6113      	str	r3, [r2, #16]

  /* Apply configuration */
  MPU->RBAR = MPU_Init->BaseAddress;
 8005330:	4a17      	ldr	r2, [pc, #92]	@ (8005390 <HAL_MPU_ConfigRegion+0x7c>)
 8005332:	687b      	ldr	r3, [r7, #4]
 8005334:	685b      	ldr	r3, [r3, #4]
 8005336:	60d3      	str	r3, [r2, #12]
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8005338:	687b      	ldr	r3, [r7, #4]
 800533a:	7b1b      	ldrb	r3, [r3, #12]
 800533c:	071a      	lsls	r2, r3, #28
              ((uint32_t)MPU_Init->AccessPermission        << MPU_RASR_AP_Pos)   |
 800533e:	687b      	ldr	r3, [r7, #4]
 8005340:	7adb      	ldrb	r3, [r3, #11]
 8005342:	061b      	lsls	r3, r3, #24
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8005344:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->TypeExtField            << MPU_RASR_TEX_Pos)  |
 8005346:	687b      	ldr	r3, [r7, #4]
 8005348:	7a9b      	ldrb	r3, [r3, #10]
 800534a:	04db      	lsls	r3, r3, #19
              ((uint32_t)MPU_Init->AccessPermission        << MPU_RASR_AP_Pos)   |
 800534c:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsShareable             << MPU_RASR_S_Pos)    |
 800534e:	687b      	ldr	r3, [r7, #4]
 8005350:	7b5b      	ldrb	r3, [r3, #13]
 8005352:	049b      	lsls	r3, r3, #18
              ((uint32_t)MPU_Init->TypeExtField            << MPU_RASR_TEX_Pos)  |
 8005354:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsCacheable             << MPU_RASR_C_Pos)    |
 8005356:	687b      	ldr	r3, [r7, #4]
 8005358:	7b9b      	ldrb	r3, [r3, #14]
 800535a:	045b      	lsls	r3, r3, #17
              ((uint32_t)MPU_Init->IsShareable             << MPU_RASR_S_Pos)    |
 800535c:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsBufferable            << MPU_RASR_B_Pos)    |
 800535e:	687b      	ldr	r3, [r7, #4]
 8005360:	7bdb      	ldrb	r3, [r3, #15]
 8005362:	041b      	lsls	r3, r3, #16
              ((uint32_t)MPU_Init->IsCacheable             << MPU_RASR_C_Pos)    |
 8005364:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->SubRegionDisable        << MPU_RASR_SRD_Pos)  |
 8005366:	687b      	ldr	r3, [r7, #4]
 8005368:	7a5b      	ldrb	r3, [r3, #9]
 800536a:	021b      	lsls	r3, r3, #8
              ((uint32_t)MPU_Init->IsBufferable            << MPU_RASR_B_Pos)    |
 800536c:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->Size                    << MPU_RASR_SIZE_Pos) |
 800536e:	687b      	ldr	r3, [r7, #4]
 8005370:	7a1b      	ldrb	r3, [r3, #8]
 8005372:	005b      	lsls	r3, r3, #1
              ((uint32_t)MPU_Init->SubRegionDisable        << MPU_RASR_SRD_Pos)  |
 8005374:	4313      	orrs	r3, r2
              ((uint32_t)MPU_Init->Enable                  << MPU_RASR_ENABLE_Pos);
 8005376:	687a      	ldr	r2, [r7, #4]
 8005378:	7812      	ldrb	r2, [r2, #0]
 800537a:	4611      	mov	r1, r2
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 800537c:	4a04      	ldr	r2, [pc, #16]	@ (8005390 <HAL_MPU_ConfigRegion+0x7c>)
              ((uint32_t)MPU_Init->Size                    << MPU_RASR_SIZE_Pos) |
 800537e:	430b      	orrs	r3, r1
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8005380:	6113      	str	r3, [r2, #16]
}
 8005382:	bf00      	nop
 8005384:	370c      	adds	r7, #12
 8005386:	46bd      	mov	sp, r7
 8005388:	f85d 7b04 	ldr.w	r7, [sp], #4
 800538c:	4770      	bx	lr
 800538e:	bf00      	nop
 8005390:	e000ed90 	.word	0xe000ed90

08005394 <HAL_CRC_Init>:
  *         parameters in the CRC_InitTypeDef and create the associated handle.
  * @param  hcrc CRC handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
{
 8005394:	b580      	push	{r7, lr}
 8005396:	b082      	sub	sp, #8
 8005398:	af00      	add	r7, sp, #0
 800539a:	6078      	str	r0, [r7, #4]
  /* Check the CRC handle allocation */
  if (hcrc == NULL)
 800539c:	687b      	ldr	r3, [r7, #4]
 800539e:	2b00      	cmp	r3, #0
 80053a0:	d101      	bne.n	80053a6 <HAL_CRC_Init+0x12>
  {
    return HAL_ERROR;
 80053a2:	2301      	movs	r3, #1
 80053a4:	e054      	b.n	8005450 <HAL_CRC_Init+0xbc>
  }

  /* Check the parameters */
  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));

  if (hcrc->State == HAL_CRC_STATE_RESET)
 80053a6:	687b      	ldr	r3, [r7, #4]
 80053a8:	7f5b      	ldrb	r3, [r3, #29]
 80053aa:	b2db      	uxtb	r3, r3
 80053ac:	2b00      	cmp	r3, #0
 80053ae:	d105      	bne.n	80053bc <HAL_CRC_Init+0x28>
  {
    /* Allocate lock resource and initialize it */
    hcrc->Lock = HAL_UNLOCKED;
 80053b0:	687b      	ldr	r3, [r7, #4]
 80053b2:	2200      	movs	r2, #0
 80053b4:	771a      	strb	r2, [r3, #28]
    /* Init the low level hardware */
    HAL_CRC_MspInit(hcrc);
 80053b6:	6878      	ldr	r0, [r7, #4]
 80053b8:	f7fd ffce 	bl	8003358 <HAL_CRC_MspInit>
  }

  hcrc->State = HAL_CRC_STATE_BUSY;
 80053bc:	687b      	ldr	r3, [r7, #4]
 80053be:	2202      	movs	r2, #2
 80053c0:	775a      	strb	r2, [r3, #29]

  /* check whether or not non-default generating polynomial has been
   * picked up by user */
  assert_param(IS_DEFAULT_POLYNOMIAL(hcrc->Init.DefaultPolynomialUse));
  if (hcrc->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_ENABLE)
 80053c2:	687b      	ldr	r3, [r7, #4]
 80053c4:	791b      	ldrb	r3, [r3, #4]
 80053c6:	2b00      	cmp	r3, #0
 80053c8:	d10c      	bne.n	80053e4 <HAL_CRC_Init+0x50>
  {
    /* initialize peripheral with default generating polynomial */
    WRITE_REG(hcrc->Instance->POL, DEFAULT_CRC32_POLY);
 80053ca:	687b      	ldr	r3, [r7, #4]
 80053cc:	681b      	ldr	r3, [r3, #0]
 80053ce:	4a22      	ldr	r2, [pc, #136]	@ (8005458 <HAL_CRC_Init+0xc4>)
 80053d0:	615a      	str	r2, [r3, #20]
    MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, CRC_POLYLENGTH_32B);
 80053d2:	687b      	ldr	r3, [r7, #4]
 80053d4:	681b      	ldr	r3, [r3, #0]
 80053d6:	689a      	ldr	r2, [r3, #8]
 80053d8:	687b      	ldr	r3, [r7, #4]
 80053da:	681b      	ldr	r3, [r3, #0]
 80053dc:	f022 0218 	bic.w	r2, r2, #24
 80053e0:	609a      	str	r2, [r3, #8]
 80053e2:	e00c      	b.n	80053fe <HAL_CRC_Init+0x6a>
  }
  else
  {
    /* initialize CRC peripheral with generating polynomial defined by user */
    if (HAL_CRCEx_Polynomial_Set(hcrc, hcrc->Init.GeneratingPolynomial, hcrc->Init.CRCLength) != HAL_OK)
 80053e4:	687b      	ldr	r3, [r7, #4]
 80053e6:	6899      	ldr	r1, [r3, #8]
 80053e8:	687b      	ldr	r3, [r7, #4]
 80053ea:	68db      	ldr	r3, [r3, #12]
 80053ec:	461a      	mov	r2, r3
 80053ee:	6878      	ldr	r0, [r7, #4]
 80053f0:	f000 f948 	bl	8005684 <HAL_CRCEx_Polynomial_Set>
 80053f4:	4603      	mov	r3, r0
 80053f6:	2b00      	cmp	r3, #0
 80053f8:	d001      	beq.n	80053fe <HAL_CRC_Init+0x6a>
    {
      return HAL_ERROR;
 80053fa:	2301      	movs	r3, #1
 80053fc:	e028      	b.n	8005450 <HAL_CRC_Init+0xbc>
  }

  /* check whether or not non-default CRC initial value has been
   * picked up by user */
  assert_param(IS_DEFAULT_INIT_VALUE(hcrc->Init.DefaultInitValueUse));
  if (hcrc->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_ENABLE)
 80053fe:	687b      	ldr	r3, [r7, #4]
 8005400:	795b      	ldrb	r3, [r3, #5]
 8005402:	2b00      	cmp	r3, #0
 8005404:	d105      	bne.n	8005412 <HAL_CRC_Init+0x7e>
  {
    WRITE_REG(hcrc->Instance->INIT, DEFAULT_CRC_INITVALUE);
 8005406:	687b      	ldr	r3, [r7, #4]
 8005408:	681b      	ldr	r3, [r3, #0]
 800540a:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 800540e:	611a      	str	r2, [r3, #16]
 8005410:	e004      	b.n	800541c <HAL_CRC_Init+0x88>
  }
  else
  {
    WRITE_REG(hcrc->Instance->INIT, hcrc->Init.InitValue);
 8005412:	687b      	ldr	r3, [r7, #4]
 8005414:	681b      	ldr	r3, [r3, #0]
 8005416:	687a      	ldr	r2, [r7, #4]
 8005418:	6912      	ldr	r2, [r2, #16]
 800541a:	611a      	str	r2, [r3, #16]
  }


  /* set input data inversion mode */
  assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(hcrc->Init.InputDataInversionMode));
  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, hcrc->Init.InputDataInversionMode);
 800541c:	687b      	ldr	r3, [r7, #4]
 800541e:	681b      	ldr	r3, [r3, #0]
 8005420:	689b      	ldr	r3, [r3, #8]
 8005422:	f023 0160 	bic.w	r1, r3, #96	@ 0x60
 8005426:	687b      	ldr	r3, [r7, #4]
 8005428:	695a      	ldr	r2, [r3, #20]
 800542a:	687b      	ldr	r3, [r7, #4]
 800542c:	681b      	ldr	r3, [r3, #0]
 800542e:	430a      	orrs	r2, r1
 8005430:	609a      	str	r2, [r3, #8]

  /* set output data inversion mode */
  assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(hcrc->Init.OutputDataInversionMode));
  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, hcrc->Init.OutputDataInversionMode);
 8005432:	687b      	ldr	r3, [r7, #4]
 8005434:	681b      	ldr	r3, [r3, #0]
 8005436:	689b      	ldr	r3, [r3, #8]
 8005438:	f023 0180 	bic.w	r1, r3, #128	@ 0x80
 800543c:	687b      	ldr	r3, [r7, #4]
 800543e:	699a      	ldr	r2, [r3, #24]
 8005440:	687b      	ldr	r3, [r7, #4]
 8005442:	681b      	ldr	r3, [r3, #0]
 8005444:	430a      	orrs	r2, r1
 8005446:	609a      	str	r2, [r3, #8]
  /* makes sure the input data format (bytes, halfwords or words stream)
   * is properly specified by user */
  assert_param(IS_CRC_INPUTDATA_FORMAT(hcrc->InputDataFormat));

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_READY;
 8005448:	687b      	ldr	r3, [r7, #4]
 800544a:	2201      	movs	r2, #1
 800544c:	775a      	strb	r2, [r3, #29]

  /* Return function status */
  return HAL_OK;
 800544e:	2300      	movs	r3, #0
}
 8005450:	4618      	mov	r0, r3
 8005452:	3708      	adds	r7, #8
 8005454:	46bd      	mov	sp, r7
 8005456:	bd80      	pop	{r7, pc}
 8005458:	04c11db7 	.word	0x04c11db7

0800545c <HAL_CRC_Calculate>:
  *        and the API will internally adjust its input data processing based on the
  *        handle field hcrc->InputDataFormat.
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
{
 800545c:	b580      	push	{r7, lr}
 800545e:	b086      	sub	sp, #24
 8005460:	af00      	add	r7, sp, #0
 8005462:	60f8      	str	r0, [r7, #12]
 8005464:	60b9      	str	r1, [r7, #8]
 8005466:	607a      	str	r2, [r7, #4]
  uint32_t index;      /* CRC input data buffer index */
  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
 8005468:	2300      	movs	r3, #0
 800546a:	613b      	str	r3, [r7, #16]

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_BUSY;
 800546c:	68fb      	ldr	r3, [r7, #12]
 800546e:	2202      	movs	r2, #2
 8005470:	775a      	strb	r2, [r3, #29]

  /* Reset CRC Calculation Unit (hcrc->Instance->INIT is
  *  written in hcrc->Instance->DR) */
  __HAL_CRC_DR_RESET(hcrc);
 8005472:	68fb      	ldr	r3, [r7, #12]
 8005474:	681b      	ldr	r3, [r3, #0]
 8005476:	689a      	ldr	r2, [r3, #8]
 8005478:	68fb      	ldr	r3, [r7, #12]
 800547a:	681b      	ldr	r3, [r3, #0]
 800547c:	f042 0201 	orr.w	r2, r2, #1
 8005480:	609a      	str	r2, [r3, #8]

  switch (hcrc->InputDataFormat)
 8005482:	68fb      	ldr	r3, [r7, #12]
 8005484:	6a1b      	ldr	r3, [r3, #32]
 8005486:	2b03      	cmp	r3, #3
 8005488:	d006      	beq.n	8005498 <HAL_CRC_Calculate+0x3c>
 800548a:	2b03      	cmp	r3, #3
 800548c:	d829      	bhi.n	80054e2 <HAL_CRC_Calculate+0x86>
 800548e:	2b01      	cmp	r3, #1
 8005490:	d019      	beq.n	80054c6 <HAL_CRC_Calculate+0x6a>
 8005492:	2b02      	cmp	r3, #2
 8005494:	d01e      	beq.n	80054d4 <HAL_CRC_Calculate+0x78>
      /* Specific 16-bit input data handling  */
      temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength);    /* Derogation MisraC2012 R.11.5 */
      break;

    default:
      break;
 8005496:	e024      	b.n	80054e2 <HAL_CRC_Calculate+0x86>
      for (index = 0U; index < BufferLength; index++)
 8005498:	2300      	movs	r3, #0
 800549a:	617b      	str	r3, [r7, #20]
 800549c:	e00a      	b.n	80054b4 <HAL_CRC_Calculate+0x58>
        hcrc->Instance->DR = pBuffer[index];
 800549e:	697b      	ldr	r3, [r7, #20]
 80054a0:	009b      	lsls	r3, r3, #2
 80054a2:	68ba      	ldr	r2, [r7, #8]
 80054a4:	441a      	add	r2, r3
 80054a6:	68fb      	ldr	r3, [r7, #12]
 80054a8:	681b      	ldr	r3, [r3, #0]
 80054aa:	6812      	ldr	r2, [r2, #0]
 80054ac:	601a      	str	r2, [r3, #0]
      for (index = 0U; index < BufferLength; index++)
 80054ae:	697b      	ldr	r3, [r7, #20]
 80054b0:	3301      	adds	r3, #1
 80054b2:	617b      	str	r3, [r7, #20]
 80054b4:	697a      	ldr	r2, [r7, #20]
 80054b6:	687b      	ldr	r3, [r7, #4]
 80054b8:	429a      	cmp	r2, r3
 80054ba:	d3f0      	bcc.n	800549e <HAL_CRC_Calculate+0x42>
      temp = hcrc->Instance->DR;
 80054bc:	68fb      	ldr	r3, [r7, #12]
 80054be:	681b      	ldr	r3, [r3, #0]
 80054c0:	681b      	ldr	r3, [r3, #0]
 80054c2:	613b      	str	r3, [r7, #16]
      break;
 80054c4:	e00e      	b.n	80054e4 <HAL_CRC_Calculate+0x88>
      temp = CRC_Handle_8(hcrc, (uint8_t *)pBuffer, BufferLength);
 80054c6:	687a      	ldr	r2, [r7, #4]
 80054c8:	68b9      	ldr	r1, [r7, #8]
 80054ca:	68f8      	ldr	r0, [r7, #12]
 80054cc:	f000 f812 	bl	80054f4 <CRC_Handle_8>
 80054d0:	6138      	str	r0, [r7, #16]
      break;
 80054d2:	e007      	b.n	80054e4 <HAL_CRC_Calculate+0x88>
      temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength);    /* Derogation MisraC2012 R.11.5 */
 80054d4:	687a      	ldr	r2, [r7, #4]
 80054d6:	68b9      	ldr	r1, [r7, #8]
 80054d8:	68f8      	ldr	r0, [r7, #12]
 80054da:	f000 f899 	bl	8005610 <CRC_Handle_16>
 80054de:	6138      	str	r0, [r7, #16]
      break;
 80054e0:	e000      	b.n	80054e4 <HAL_CRC_Calculate+0x88>
      break;
 80054e2:	bf00      	nop
  }

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_READY;
 80054e4:	68fb      	ldr	r3, [r7, #12]
 80054e6:	2201      	movs	r2, #1
 80054e8:	775a      	strb	r2, [r3, #29]

  /* Return the CRC computed value */
  return temp;
 80054ea:	693b      	ldr	r3, [r7, #16]
}
 80054ec:	4618      	mov	r0, r3
 80054ee:	3718      	adds	r7, #24
 80054f0:	46bd      	mov	sp, r7
 80054f2:	bd80      	pop	{r7, pc}

080054f4 <CRC_Handle_8>:
  * @param  pBuffer pointer to the input data buffer
  * @param  BufferLength input data buffer length
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength)
{
 80054f4:	b480      	push	{r7}
 80054f6:	b089      	sub	sp, #36	@ 0x24
 80054f8:	af00      	add	r7, sp, #0
 80054fa:	60f8      	str	r0, [r7, #12]
 80054fc:	60b9      	str	r1, [r7, #8]
 80054fe:	607a      	str	r2, [r7, #4]
  __IO uint16_t *pReg;

  /* Processing time optimization: 4 bytes are entered in a row with a single word write,
   * last bytes must be carefully fed to the CRC calculator to ensure a correct type
   * handling by the peripheral */
  for (i = 0U; i < (BufferLength / 4U); i++)
 8005500:	2300      	movs	r3, #0
 8005502:	61fb      	str	r3, [r7, #28]
 8005504:	e023      	b.n	800554e <CRC_Handle_8+0x5a>
  {
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005506:	69fb      	ldr	r3, [r7, #28]
 8005508:	009b      	lsls	r3, r3, #2
 800550a:	68ba      	ldr	r2, [r7, #8]
 800550c:	4413      	add	r3, r2
 800550e:	781b      	ldrb	r3, [r3, #0]
 8005510:	061a      	lsls	r2, r3, #24
                         ((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
 8005512:	69fb      	ldr	r3, [r7, #28]
 8005514:	009b      	lsls	r3, r3, #2
 8005516:	3301      	adds	r3, #1
 8005518:	68b9      	ldr	r1, [r7, #8]
 800551a:	440b      	add	r3, r1
 800551c:	781b      	ldrb	r3, [r3, #0]
 800551e:	041b      	lsls	r3, r3, #16
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005520:	431a      	orrs	r2, r3
                         ((uint32_t)pBuffer[(4U * i) + 2U] << 8U)  | \
 8005522:	69fb      	ldr	r3, [r7, #28]
 8005524:	009b      	lsls	r3, r3, #2
 8005526:	3302      	adds	r3, #2
 8005528:	68b9      	ldr	r1, [r7, #8]
 800552a:	440b      	add	r3, r1
 800552c:	781b      	ldrb	r3, [r3, #0]
 800552e:	021b      	lsls	r3, r3, #8
                         ((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
 8005530:	431a      	orrs	r2, r3
                         (uint32_t)pBuffer[(4U * i) + 3U];
 8005532:	69fb      	ldr	r3, [r7, #28]
 8005534:	009b      	lsls	r3, r3, #2
 8005536:	3303      	adds	r3, #3
 8005538:	68b9      	ldr	r1, [r7, #8]
 800553a:	440b      	add	r3, r1
 800553c:	781b      	ldrb	r3, [r3, #0]
 800553e:	4619      	mov	r1, r3
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005540:	68fb      	ldr	r3, [r7, #12]
 8005542:	681b      	ldr	r3, [r3, #0]
                         ((uint32_t)pBuffer[(4U * i) + 2U] << 8U)  | \
 8005544:	430a      	orrs	r2, r1
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005546:	601a      	str	r2, [r3, #0]
  for (i = 0U; i < (BufferLength / 4U); i++)
 8005548:	69fb      	ldr	r3, [r7, #28]
 800554a:	3301      	adds	r3, #1
 800554c:	61fb      	str	r3, [r7, #28]
 800554e:	687b      	ldr	r3, [r7, #4]
 8005550:	089b      	lsrs	r3, r3, #2
 8005552:	69fa      	ldr	r2, [r7, #28]
 8005554:	429a      	cmp	r2, r3
 8005556:	d3d6      	bcc.n	8005506 <CRC_Handle_8+0x12>
  }
  /* last bytes specific handling */
  if ((BufferLength % 4U) != 0U)
 8005558:	687b      	ldr	r3, [r7, #4]
 800555a:	f003 0303 	and.w	r3, r3, #3
 800555e:	2b00      	cmp	r3, #0
 8005560:	d04d      	beq.n	80055fe <CRC_Handle_8+0x10a>
  {
    if ((BufferLength % 4U) == 1U)
 8005562:	687b      	ldr	r3, [r7, #4]
 8005564:	f003 0303 	and.w	r3, r3, #3
 8005568:	2b01      	cmp	r3, #1
 800556a:	d107      	bne.n	800557c <CRC_Handle_8+0x88>
    {
      *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[4U * i];         /* Derogation MisraC2012 R.11.5 */
 800556c:	69fb      	ldr	r3, [r7, #28]
 800556e:	009b      	lsls	r3, r3, #2
 8005570:	68ba      	ldr	r2, [r7, #8]
 8005572:	4413      	add	r3, r2
 8005574:	68fa      	ldr	r2, [r7, #12]
 8005576:	6812      	ldr	r2, [r2, #0]
 8005578:	781b      	ldrb	r3, [r3, #0]
 800557a:	7013      	strb	r3, [r2, #0]
    }
    if ((BufferLength % 4U) == 2U)
 800557c:	687b      	ldr	r3, [r7, #4]
 800557e:	f003 0303 	and.w	r3, r3, #3
 8005582:	2b02      	cmp	r3, #2
 8005584:	d116      	bne.n	80055b4 <CRC_Handle_8+0xc0>
    {
      data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
 8005586:	69fb      	ldr	r3, [r7, #28]
 8005588:	009b      	lsls	r3, r3, #2
 800558a:	68ba      	ldr	r2, [r7, #8]
 800558c:	4413      	add	r3, r2
 800558e:	781b      	ldrb	r3, [r3, #0]
 8005590:	021b      	lsls	r3, r3, #8
 8005592:	b21a      	sxth	r2, r3
 8005594:	69fb      	ldr	r3, [r7, #28]
 8005596:	009b      	lsls	r3, r3, #2
 8005598:	3301      	adds	r3, #1
 800559a:	68b9      	ldr	r1, [r7, #8]
 800559c:	440b      	add	r3, r1
 800559e:	781b      	ldrb	r3, [r3, #0]
 80055a0:	b21b      	sxth	r3, r3
 80055a2:	4313      	orrs	r3, r2
 80055a4:	b21b      	sxth	r3, r3
 80055a6:	837b      	strh	r3, [r7, #26]
      pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                    /* Derogation MisraC2012 R.11.5 */
 80055a8:	68fb      	ldr	r3, [r7, #12]
 80055aa:	681b      	ldr	r3, [r3, #0]
 80055ac:	617b      	str	r3, [r7, #20]
      *pReg = data;
 80055ae:	697b      	ldr	r3, [r7, #20]
 80055b0:	8b7a      	ldrh	r2, [r7, #26]
 80055b2:	801a      	strh	r2, [r3, #0]
    }
    if ((BufferLength % 4U) == 3U)
 80055b4:	687b      	ldr	r3, [r7, #4]
 80055b6:	f003 0303 	and.w	r3, r3, #3
 80055ba:	2b03      	cmp	r3, #3
 80055bc:	d11f      	bne.n	80055fe <CRC_Handle_8+0x10a>
    {
      data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
 80055be:	69fb      	ldr	r3, [r7, #28]
 80055c0:	009b      	lsls	r3, r3, #2
 80055c2:	68ba      	ldr	r2, [r7, #8]
 80055c4:	4413      	add	r3, r2
 80055c6:	781b      	ldrb	r3, [r3, #0]
 80055c8:	021b      	lsls	r3, r3, #8
 80055ca:	b21a      	sxth	r2, r3
 80055cc:	69fb      	ldr	r3, [r7, #28]
 80055ce:	009b      	lsls	r3, r3, #2
 80055d0:	3301      	adds	r3, #1
 80055d2:	68b9      	ldr	r1, [r7, #8]
 80055d4:	440b      	add	r3, r1
 80055d6:	781b      	ldrb	r3, [r3, #0]
 80055d8:	b21b      	sxth	r3, r3
 80055da:	4313      	orrs	r3, r2
 80055dc:	b21b      	sxth	r3, r3
 80055de:	837b      	strh	r3, [r7, #26]
      pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                    /* Derogation MisraC2012 R.11.5 */
 80055e0:	68fb      	ldr	r3, [r7, #12]
 80055e2:	681b      	ldr	r3, [r3, #0]
 80055e4:	617b      	str	r3, [r7, #20]
      *pReg = data;
 80055e6:	697b      	ldr	r3, [r7, #20]
 80055e8:	8b7a      	ldrh	r2, [r7, #26]
 80055ea:	801a      	strh	r2, [r3, #0]

      *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[(4U * i) + 2U];  /* Derogation MisraC2012 R.11.5 */
 80055ec:	69fb      	ldr	r3, [r7, #28]
 80055ee:	009b      	lsls	r3, r3, #2
 80055f0:	3302      	adds	r3, #2
 80055f2:	68ba      	ldr	r2, [r7, #8]
 80055f4:	4413      	add	r3, r2
 80055f6:	68fa      	ldr	r2, [r7, #12]
 80055f8:	6812      	ldr	r2, [r2, #0]
 80055fa:	781b      	ldrb	r3, [r3, #0]
 80055fc:	7013      	strb	r3, [r2, #0]
    }
  }

  /* Return the CRC computed value */
  return hcrc->Instance->DR;
 80055fe:	68fb      	ldr	r3, [r7, #12]
 8005600:	681b      	ldr	r3, [r3, #0]
 8005602:	681b      	ldr	r3, [r3, #0]
}
 8005604:	4618      	mov	r0, r3
 8005606:	3724      	adds	r7, #36	@ 0x24
 8005608:	46bd      	mov	sp, r7
 800560a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800560e:	4770      	bx	lr

08005610 <CRC_Handle_16>:
  * @param  pBuffer pointer to the input data buffer
  * @param  BufferLength input data buffer length
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength)
{
 8005610:	b480      	push	{r7}
 8005612:	b087      	sub	sp, #28
 8005614:	af00      	add	r7, sp, #0
 8005616:	60f8      	str	r0, [r7, #12]
 8005618:	60b9      	str	r1, [r7, #8]
 800561a:	607a      	str	r2, [r7, #4]
  __IO uint16_t *pReg;

  /* Processing time optimization: 2 HalfWords are entered in a row with a single word write,
   * in case of odd length, last HalfWord must be carefully fed to the CRC calculator to ensure
   * a correct type handling by the peripheral */
  for (i = 0U; i < (BufferLength / 2U); i++)
 800561c:	2300      	movs	r3, #0
 800561e:	617b      	str	r3, [r7, #20]
 8005620:	e013      	b.n	800564a <CRC_Handle_16+0x3a>
  {
    hcrc->Instance->DR = ((uint32_t)pBuffer[2U * i] << 16U) | (uint32_t)pBuffer[(2U * i) + 1U];
 8005622:	697b      	ldr	r3, [r7, #20]
 8005624:	009b      	lsls	r3, r3, #2
 8005626:	68ba      	ldr	r2, [r7, #8]
 8005628:	4413      	add	r3, r2
 800562a:	881b      	ldrh	r3, [r3, #0]
 800562c:	041a      	lsls	r2, r3, #16
 800562e:	697b      	ldr	r3, [r7, #20]
 8005630:	009b      	lsls	r3, r3, #2
 8005632:	3302      	adds	r3, #2
 8005634:	68b9      	ldr	r1, [r7, #8]
 8005636:	440b      	add	r3, r1
 8005638:	881b      	ldrh	r3, [r3, #0]
 800563a:	4619      	mov	r1, r3
 800563c:	68fb      	ldr	r3, [r7, #12]
 800563e:	681b      	ldr	r3, [r3, #0]
 8005640:	430a      	orrs	r2, r1
 8005642:	601a      	str	r2, [r3, #0]
  for (i = 0U; i < (BufferLength / 2U); i++)
 8005644:	697b      	ldr	r3, [r7, #20]
 8005646:	3301      	adds	r3, #1
 8005648:	617b      	str	r3, [r7, #20]
 800564a:	687b      	ldr	r3, [r7, #4]
 800564c:	085b      	lsrs	r3, r3, #1
 800564e:	697a      	ldr	r2, [r7, #20]
 8005650:	429a      	cmp	r2, r3
 8005652:	d3e6      	bcc.n	8005622 <CRC_Handle_16+0x12>
  }
  if ((BufferLength % 2U) != 0U)
 8005654:	687b      	ldr	r3, [r7, #4]
 8005656:	f003 0301 	and.w	r3, r3, #1
 800565a:	2b00      	cmp	r3, #0
 800565c:	d009      	beq.n	8005672 <CRC_Handle_16+0x62>
  {
    pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                 /* Derogation MisraC2012 R.11.5 */
 800565e:	68fb      	ldr	r3, [r7, #12]
 8005660:	681b      	ldr	r3, [r3, #0]
 8005662:	613b      	str	r3, [r7, #16]
    *pReg = pBuffer[2U * i];
 8005664:	697b      	ldr	r3, [r7, #20]
 8005666:	009b      	lsls	r3, r3, #2
 8005668:	68ba      	ldr	r2, [r7, #8]
 800566a:	4413      	add	r3, r2
 800566c:	881a      	ldrh	r2, [r3, #0]
 800566e:	693b      	ldr	r3, [r7, #16]
 8005670:	801a      	strh	r2, [r3, #0]
  }

  /* Return the CRC computed value */
  return hcrc->Instance->DR;
 8005672:	68fb      	ldr	r3, [r7, #12]
 8005674:	681b      	ldr	r3, [r3, #0]
 8005676:	681b      	ldr	r3, [r3, #0]
}
 8005678:	4618      	mov	r0, r3
 800567a:	371c      	adds	r7, #28
 800567c:	46bd      	mov	sp, r7
 800567e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005682:	4770      	bx	lr

08005684 <HAL_CRCEx_Polynomial_Set>:
  *          @arg @ref CRC_POLYLENGTH_16B 16-bit long CRC (generating polynomial of degree 16)
  *          @arg @ref CRC_POLYLENGTH_32B 32-bit long CRC (generating polynomial of degree 32)
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength)
{
 8005684:	b480      	push	{r7}
 8005686:	b087      	sub	sp, #28
 8005688:	af00      	add	r7, sp, #0
 800568a:	60f8      	str	r0, [r7, #12]
 800568c:	60b9      	str	r1, [r7, #8]
 800568e:	607a      	str	r2, [r7, #4]
  HAL_StatusTypeDef status = HAL_OK;
 8005690:	2300      	movs	r3, #0
 8005692:	75fb      	strb	r3, [r7, #23]
  uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */
 8005694:	231f      	movs	r3, #31
 8005696:	613b      	str	r3, [r7, #16]

  /* Check the parameters */
  assert_param(IS_CRC_POL_LENGTH(PolyLength));

  /* Ensure that the generating polynomial is odd */
  if ((Pol & (uint32_t)(0x1U)) ==  0U)
 8005698:	68bb      	ldr	r3, [r7, #8]
 800569a:	f003 0301 	and.w	r3, r3, #1
 800569e:	2b00      	cmp	r3, #0
 80056a0:	d102      	bne.n	80056a8 <HAL_CRCEx_Polynomial_Set+0x24>
  {
    status =  HAL_ERROR;
 80056a2:	2301      	movs	r3, #1
 80056a4:	75fb      	strb	r3, [r7, #23]
 80056a6:	e063      	b.n	8005770 <HAL_CRCEx_Polynomial_Set+0xec>
     * definition. HAL_ERROR is reported if Pol degree is
     * larger than that indicated by PolyLength.
     * Look for MSB position: msb will contain the degree of
     *  the second to the largest polynomial member. E.g., for
     *  X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */
    while ((msb-- > 0U) && ((Pol & ((uint32_t)(0x1U) << (msb & 0x1FU))) == 0U))
 80056a8:	bf00      	nop
 80056aa:	693b      	ldr	r3, [r7, #16]
 80056ac:	1e5a      	subs	r2, r3, #1
 80056ae:	613a      	str	r2, [r7, #16]
 80056b0:	2b00      	cmp	r3, #0
 80056b2:	d009      	beq.n	80056c8 <HAL_CRCEx_Polynomial_Set+0x44>
 80056b4:	693b      	ldr	r3, [r7, #16]
 80056b6:	f003 031f 	and.w	r3, r3, #31
 80056ba:	68ba      	ldr	r2, [r7, #8]
 80056bc:	fa22 f303 	lsr.w	r3, r2, r3
 80056c0:	f003 0301 	and.w	r3, r3, #1
 80056c4:	2b00      	cmp	r3, #0
 80056c6:	d0f0      	beq.n	80056aa <HAL_CRCEx_Polynomial_Set+0x26>
    {
    }

    switch (PolyLength)
 80056c8:	687b      	ldr	r3, [r7, #4]
 80056ca:	2b18      	cmp	r3, #24
 80056cc:	d846      	bhi.n	800575c <HAL_CRCEx_Polynomial_Set+0xd8>
 80056ce:	a201      	add	r2, pc, #4	@ (adr r2, 80056d4 <HAL_CRCEx_Polynomial_Set+0x50>)
 80056d0:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80056d4:	08005763 	.word	0x08005763
 80056d8:	0800575d 	.word	0x0800575d
 80056dc:	0800575d 	.word	0x0800575d
 80056e0:	0800575d 	.word	0x0800575d
 80056e4:	0800575d 	.word	0x0800575d
 80056e8:	0800575d 	.word	0x0800575d
 80056ec:	0800575d 	.word	0x0800575d
 80056f0:	0800575d 	.word	0x0800575d
 80056f4:	08005751 	.word	0x08005751
 80056f8:	0800575d 	.word	0x0800575d
 80056fc:	0800575d 	.word	0x0800575d
 8005700:	0800575d 	.word	0x0800575d
 8005704:	0800575d 	.word	0x0800575d
 8005708:	0800575d 	.word	0x0800575d
 800570c:	0800575d 	.word	0x0800575d
 8005710:	0800575d 	.word	0x0800575d
 8005714:	08005745 	.word	0x08005745
 8005718:	0800575d 	.word	0x0800575d
 800571c:	0800575d 	.word	0x0800575d
 8005720:	0800575d 	.word	0x0800575d
 8005724:	0800575d 	.word	0x0800575d
 8005728:	0800575d 	.word	0x0800575d
 800572c:	0800575d 	.word	0x0800575d
 8005730:	0800575d 	.word	0x0800575d
 8005734:	08005739 	.word	0x08005739
    {

      case CRC_POLYLENGTH_7B:
        if (msb >= HAL_CRC_LENGTH_7B)
 8005738:	693b      	ldr	r3, [r7, #16]
 800573a:	2b06      	cmp	r3, #6
 800573c:	d913      	bls.n	8005766 <HAL_CRCEx_Polynomial_Set+0xe2>
        {
          status =   HAL_ERROR;
 800573e:	2301      	movs	r3, #1
 8005740:	75fb      	strb	r3, [r7, #23]
        }
        break;
 8005742:	e010      	b.n	8005766 <HAL_CRCEx_Polynomial_Set+0xe2>
      case CRC_POLYLENGTH_8B:
        if (msb >= HAL_CRC_LENGTH_8B)
 8005744:	693b      	ldr	r3, [r7, #16]
 8005746:	2b07      	cmp	r3, #7
 8005748:	d90f      	bls.n	800576a <HAL_CRCEx_Polynomial_Set+0xe6>
        {
          status =   HAL_ERROR;
 800574a:	2301      	movs	r3, #1
 800574c:	75fb      	strb	r3, [r7, #23]
        }
        break;
 800574e:	e00c      	b.n	800576a <HAL_CRCEx_Polynomial_Set+0xe6>
      case CRC_POLYLENGTH_16B:
        if (msb >= HAL_CRC_LENGTH_16B)
 8005750:	693b      	ldr	r3, [r7, #16]
 8005752:	2b0f      	cmp	r3, #15
 8005754:	d90b      	bls.n	800576e <HAL_CRCEx_Polynomial_Set+0xea>
        {
          status =   HAL_ERROR;
 8005756:	2301      	movs	r3, #1
 8005758:	75fb      	strb	r3, [r7, #23]
        }
        break;
 800575a:	e008      	b.n	800576e <HAL_CRCEx_Polynomial_Set+0xea>

      case CRC_POLYLENGTH_32B:
        /* no polynomial definition vs. polynomial length issue possible */
        break;
      default:
        status =  HAL_ERROR;
 800575c:	2301      	movs	r3, #1
 800575e:	75fb      	strb	r3, [r7, #23]
        break;
 8005760:	e006      	b.n	8005770 <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 8005762:	bf00      	nop
 8005764:	e004      	b.n	8005770 <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 8005766:	bf00      	nop
 8005768:	e002      	b.n	8005770 <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 800576a:	bf00      	nop
 800576c:	e000      	b.n	8005770 <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 800576e:	bf00      	nop
    }
  }
  if (status == HAL_OK)
 8005770:	7dfb      	ldrb	r3, [r7, #23]
 8005772:	2b00      	cmp	r3, #0
 8005774:	d10d      	bne.n	8005792 <HAL_CRCEx_Polynomial_Set+0x10e>
  {
    /* set generating polynomial */
    WRITE_REG(hcrc->Instance->POL, Pol);
 8005776:	68fb      	ldr	r3, [r7, #12]
 8005778:	681b      	ldr	r3, [r3, #0]
 800577a:	68ba      	ldr	r2, [r7, #8]
 800577c:	615a      	str	r2, [r3, #20]

    /* set generating polynomial size */
    MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength);
 800577e:	68fb      	ldr	r3, [r7, #12]
 8005780:	681b      	ldr	r3, [r3, #0]
 8005782:	689b      	ldr	r3, [r3, #8]
 8005784:	f023 0118 	bic.w	r1, r3, #24
 8005788:	68fb      	ldr	r3, [r7, #12]
 800578a:	681b      	ldr	r3, [r3, #0]
 800578c:	687a      	ldr	r2, [r7, #4]
 800578e:	430a      	orrs	r2, r1
 8005790:	609a      	str	r2, [r3, #8]
  }
  /* Return function status */
  return status;
 8005792:	7dfb      	ldrb	r3, [r7, #23]
}
 8005794:	4618      	mov	r0, r3
 8005796:	371c      	adds	r7, #28
 8005798:	46bd      	mov	sp, r7
 800579a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800579e:	4770      	bx	lr

080057a0 <HAL_DMA_Init>:
  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
 80057a0:	b580      	push	{r7, lr}
 80057a2:	b086      	sub	sp, #24
 80057a4:	af00      	add	r7, sp, #0
 80057a6:	6078      	str	r0, [r7, #4]
  uint32_t registerValue;
  uint32_t tickstart = HAL_GetTick();
 80057a8:	f7ff fc4c 	bl	8005044 <HAL_GetTick>
 80057ac:	6138      	str	r0, [r7, #16]
  DMA_Base_Registers *regs_dma;
  BDMA_Base_Registers *regs_bdma;

  /* Check the DMA peripheral handle */
  if(hdma == NULL)
 80057ae:	687b      	ldr	r3, [r7, #4]
 80057b0:	2b00      	cmp	r3, #0
 80057b2:	d101      	bne.n	80057b8 <HAL_DMA_Init+0x18>
  {
    return HAL_ERROR;
 80057b4:	2301      	movs	r3, #1
 80057b6:	e316      	b.n	8005de6 <HAL_DMA_Init+0x646>
  assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
  assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
  assert_param(IS_DMA_MODE(hdma->Init.Mode));
  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));

  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 80057b8:	687b      	ldr	r3, [r7, #4]
 80057ba:	681b      	ldr	r3, [r3, #0]
 80057bc:	4a66      	ldr	r2, [pc, #408]	@ (8005958 <HAL_DMA_Init+0x1b8>)
 80057be:	4293      	cmp	r3, r2
 80057c0:	d04a      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 80057c2:	687b      	ldr	r3, [r7, #4]
 80057c4:	681b      	ldr	r3, [r3, #0]
 80057c6:	4a65      	ldr	r2, [pc, #404]	@ (800595c <HAL_DMA_Init+0x1bc>)
 80057c8:	4293      	cmp	r3, r2
 80057ca:	d045      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 80057cc:	687b      	ldr	r3, [r7, #4]
 80057ce:	681b      	ldr	r3, [r3, #0]
 80057d0:	4a63      	ldr	r2, [pc, #396]	@ (8005960 <HAL_DMA_Init+0x1c0>)
 80057d2:	4293      	cmp	r3, r2
 80057d4:	d040      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 80057d6:	687b      	ldr	r3, [r7, #4]
 80057d8:	681b      	ldr	r3, [r3, #0]
 80057da:	4a62      	ldr	r2, [pc, #392]	@ (8005964 <HAL_DMA_Init+0x1c4>)
 80057dc:	4293      	cmp	r3, r2
 80057de:	d03b      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 80057e0:	687b      	ldr	r3, [r7, #4]
 80057e2:	681b      	ldr	r3, [r3, #0]
 80057e4:	4a60      	ldr	r2, [pc, #384]	@ (8005968 <HAL_DMA_Init+0x1c8>)
 80057e6:	4293      	cmp	r3, r2
 80057e8:	d036      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 80057ea:	687b      	ldr	r3, [r7, #4]
 80057ec:	681b      	ldr	r3, [r3, #0]
 80057ee:	4a5f      	ldr	r2, [pc, #380]	@ (800596c <HAL_DMA_Init+0x1cc>)
 80057f0:	4293      	cmp	r3, r2
 80057f2:	d031      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 80057f4:	687b      	ldr	r3, [r7, #4]
 80057f6:	681b      	ldr	r3, [r3, #0]
 80057f8:	4a5d      	ldr	r2, [pc, #372]	@ (8005970 <HAL_DMA_Init+0x1d0>)
 80057fa:	4293      	cmp	r3, r2
 80057fc:	d02c      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 80057fe:	687b      	ldr	r3, [r7, #4]
 8005800:	681b      	ldr	r3, [r3, #0]
 8005802:	4a5c      	ldr	r2, [pc, #368]	@ (8005974 <HAL_DMA_Init+0x1d4>)
 8005804:	4293      	cmp	r3, r2
 8005806:	d027      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 8005808:	687b      	ldr	r3, [r7, #4]
 800580a:	681b      	ldr	r3, [r3, #0]
 800580c:	4a5a      	ldr	r2, [pc, #360]	@ (8005978 <HAL_DMA_Init+0x1d8>)
 800580e:	4293      	cmp	r3, r2
 8005810:	d022      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 8005812:	687b      	ldr	r3, [r7, #4]
 8005814:	681b      	ldr	r3, [r3, #0]
 8005816:	4a59      	ldr	r2, [pc, #356]	@ (800597c <HAL_DMA_Init+0x1dc>)
 8005818:	4293      	cmp	r3, r2
 800581a:	d01d      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 800581c:	687b      	ldr	r3, [r7, #4]
 800581e:	681b      	ldr	r3, [r3, #0]
 8005820:	4a57      	ldr	r2, [pc, #348]	@ (8005980 <HAL_DMA_Init+0x1e0>)
 8005822:	4293      	cmp	r3, r2
 8005824:	d018      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 8005826:	687b      	ldr	r3, [r7, #4]
 8005828:	681b      	ldr	r3, [r3, #0]
 800582a:	4a56      	ldr	r2, [pc, #344]	@ (8005984 <HAL_DMA_Init+0x1e4>)
 800582c:	4293      	cmp	r3, r2
 800582e:	d013      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 8005830:	687b      	ldr	r3, [r7, #4]
 8005832:	681b      	ldr	r3, [r3, #0]
 8005834:	4a54      	ldr	r2, [pc, #336]	@ (8005988 <HAL_DMA_Init+0x1e8>)
 8005836:	4293      	cmp	r3, r2
 8005838:	d00e      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 800583a:	687b      	ldr	r3, [r7, #4]
 800583c:	681b      	ldr	r3, [r3, #0]
 800583e:	4a53      	ldr	r2, [pc, #332]	@ (800598c <HAL_DMA_Init+0x1ec>)
 8005840:	4293      	cmp	r3, r2
 8005842:	d009      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 8005844:	687b      	ldr	r3, [r7, #4]
 8005846:	681b      	ldr	r3, [r3, #0]
 8005848:	4a51      	ldr	r2, [pc, #324]	@ (8005990 <HAL_DMA_Init+0x1f0>)
 800584a:	4293      	cmp	r3, r2
 800584c:	d004      	beq.n	8005858 <HAL_DMA_Init+0xb8>
 800584e:	687b      	ldr	r3, [r7, #4]
 8005850:	681b      	ldr	r3, [r3, #0]
 8005852:	4a50      	ldr	r2, [pc, #320]	@ (8005994 <HAL_DMA_Init+0x1f4>)
 8005854:	4293      	cmp	r3, r2
 8005856:	d101      	bne.n	800585c <HAL_DMA_Init+0xbc>
 8005858:	2301      	movs	r3, #1
 800585a:	e000      	b.n	800585e <HAL_DMA_Init+0xbe>
 800585c:	2300      	movs	r3, #0
 800585e:	2b00      	cmp	r3, #0
 8005860:	f000 813b 	beq.w	8005ada <HAL_DMA_Init+0x33a>
      assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
      assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
    }

    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 8005864:	687b      	ldr	r3, [r7, #4]
 8005866:	2202      	movs	r2, #2
 8005868:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Allocate lock resource */
    __HAL_UNLOCK(hdma);
 800586c:	687b      	ldr	r3, [r7, #4]
 800586e:	2200      	movs	r2, #0
 8005870:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    /* Disable the peripheral */
    __HAL_DMA_DISABLE(hdma);
 8005874:	687b      	ldr	r3, [r7, #4]
 8005876:	681b      	ldr	r3, [r3, #0]
 8005878:	4a37      	ldr	r2, [pc, #220]	@ (8005958 <HAL_DMA_Init+0x1b8>)
 800587a:	4293      	cmp	r3, r2
 800587c:	d04a      	beq.n	8005914 <HAL_DMA_Init+0x174>
 800587e:	687b      	ldr	r3, [r7, #4]
 8005880:	681b      	ldr	r3, [r3, #0]
 8005882:	4a36      	ldr	r2, [pc, #216]	@ (800595c <HAL_DMA_Init+0x1bc>)
 8005884:	4293      	cmp	r3, r2
 8005886:	d045      	beq.n	8005914 <HAL_DMA_Init+0x174>
 8005888:	687b      	ldr	r3, [r7, #4]
 800588a:	681b      	ldr	r3, [r3, #0]
 800588c:	4a34      	ldr	r2, [pc, #208]	@ (8005960 <HAL_DMA_Init+0x1c0>)
 800588e:	4293      	cmp	r3, r2
 8005890:	d040      	beq.n	8005914 <HAL_DMA_Init+0x174>
 8005892:	687b      	ldr	r3, [r7, #4]
 8005894:	681b      	ldr	r3, [r3, #0]
 8005896:	4a33      	ldr	r2, [pc, #204]	@ (8005964 <HAL_DMA_Init+0x1c4>)
 8005898:	4293      	cmp	r3, r2
 800589a:	d03b      	beq.n	8005914 <HAL_DMA_Init+0x174>
 800589c:	687b      	ldr	r3, [r7, #4]
 800589e:	681b      	ldr	r3, [r3, #0]
 80058a0:	4a31      	ldr	r2, [pc, #196]	@ (8005968 <HAL_DMA_Init+0x1c8>)
 80058a2:	4293      	cmp	r3, r2
 80058a4:	d036      	beq.n	8005914 <HAL_DMA_Init+0x174>
 80058a6:	687b      	ldr	r3, [r7, #4]
 80058a8:	681b      	ldr	r3, [r3, #0]
 80058aa:	4a30      	ldr	r2, [pc, #192]	@ (800596c <HAL_DMA_Init+0x1cc>)
 80058ac:	4293      	cmp	r3, r2
 80058ae:	d031      	beq.n	8005914 <HAL_DMA_Init+0x174>
 80058b0:	687b      	ldr	r3, [r7, #4]
 80058b2:	681b      	ldr	r3, [r3, #0]
 80058b4:	4a2e      	ldr	r2, [pc, #184]	@ (8005970 <HAL_DMA_Init+0x1d0>)
 80058b6:	4293      	cmp	r3, r2
 80058b8:	d02c      	beq.n	8005914 <HAL_DMA_Init+0x174>
 80058ba:	687b      	ldr	r3, [r7, #4]
 80058bc:	681b      	ldr	r3, [r3, #0]
 80058be:	4a2d      	ldr	r2, [pc, #180]	@ (8005974 <HAL_DMA_Init+0x1d4>)
 80058c0:	4293      	cmp	r3, r2
 80058c2:	d027      	beq.n	8005914 <HAL_DMA_Init+0x174>
 80058c4:	687b      	ldr	r3, [r7, #4]
 80058c6:	681b      	ldr	r3, [r3, #0]
 80058c8:	4a2b      	ldr	r2, [pc, #172]	@ (8005978 <HAL_DMA_Init+0x1d8>)
 80058ca:	4293      	cmp	r3, r2
 80058cc:	d022      	beq.n	8005914 <HAL_DMA_Init+0x174>
 80058ce:	687b      	ldr	r3, [r7, #4]
 80058d0:	681b      	ldr	r3, [r3, #0]
 80058d2:	4a2a      	ldr	r2, [pc, #168]	@ (800597c <HAL_DMA_Init+0x1dc>)
 80058d4:	4293      	cmp	r3, r2
 80058d6:	d01d      	beq.n	8005914 <HAL_DMA_Init+0x174>
 80058d8:	687b      	ldr	r3, [r7, #4]
 80058da:	681b      	ldr	r3, [r3, #0]
 80058dc:	4a28      	ldr	r2, [pc, #160]	@ (8005980 <HAL_DMA_Init+0x1e0>)
 80058de:	4293      	cmp	r3, r2
 80058e0:	d018      	beq.n	8005914 <HAL_DMA_Init+0x174>
 80058e2:	687b      	ldr	r3, [r7, #4]
 80058e4:	681b      	ldr	r3, [r3, #0]
 80058e6:	4a27      	ldr	r2, [pc, #156]	@ (8005984 <HAL_DMA_Init+0x1e4>)
 80058e8:	4293      	cmp	r3, r2
 80058ea:	d013      	beq.n	8005914 <HAL_DMA_Init+0x174>
 80058ec:	687b      	ldr	r3, [r7, #4]
 80058ee:	681b      	ldr	r3, [r3, #0]
 80058f0:	4a25      	ldr	r2, [pc, #148]	@ (8005988 <HAL_DMA_Init+0x1e8>)
 80058f2:	4293      	cmp	r3, r2
 80058f4:	d00e      	beq.n	8005914 <HAL_DMA_Init+0x174>
 80058f6:	687b      	ldr	r3, [r7, #4]
 80058f8:	681b      	ldr	r3, [r3, #0]
 80058fa:	4a24      	ldr	r2, [pc, #144]	@ (800598c <HAL_DMA_Init+0x1ec>)
 80058fc:	4293      	cmp	r3, r2
 80058fe:	d009      	beq.n	8005914 <HAL_DMA_Init+0x174>
 8005900:	687b      	ldr	r3, [r7, #4]
 8005902:	681b      	ldr	r3, [r3, #0]
 8005904:	4a22      	ldr	r2, [pc, #136]	@ (8005990 <HAL_DMA_Init+0x1f0>)
 8005906:	4293      	cmp	r3, r2
 8005908:	d004      	beq.n	8005914 <HAL_DMA_Init+0x174>
 800590a:	687b      	ldr	r3, [r7, #4]
 800590c:	681b      	ldr	r3, [r3, #0]
 800590e:	4a21      	ldr	r2, [pc, #132]	@ (8005994 <HAL_DMA_Init+0x1f4>)
 8005910:	4293      	cmp	r3, r2
 8005912:	d108      	bne.n	8005926 <HAL_DMA_Init+0x186>
 8005914:	687b      	ldr	r3, [r7, #4]
 8005916:	681b      	ldr	r3, [r3, #0]
 8005918:	681a      	ldr	r2, [r3, #0]
 800591a:	687b      	ldr	r3, [r7, #4]
 800591c:	681b      	ldr	r3, [r3, #0]
 800591e:	f022 0201 	bic.w	r2, r2, #1
 8005922:	601a      	str	r2, [r3, #0]
 8005924:	e007      	b.n	8005936 <HAL_DMA_Init+0x196>
 8005926:	687b      	ldr	r3, [r7, #4]
 8005928:	681b      	ldr	r3, [r3, #0]
 800592a:	681a      	ldr	r2, [r3, #0]
 800592c:	687b      	ldr	r3, [r7, #4]
 800592e:	681b      	ldr	r3, [r3, #0]
 8005930:	f022 0201 	bic.w	r2, r2, #1
 8005934:	601a      	str	r2, [r3, #0]

    /* Check if the DMA Stream is effectively disabled */
    while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 8005936:	e02f      	b.n	8005998 <HAL_DMA_Init+0x1f8>
    {
      /* Check for the Timeout */
      if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
 8005938:	f7ff fb84 	bl	8005044 <HAL_GetTick>
 800593c:	4602      	mov	r2, r0
 800593e:	693b      	ldr	r3, [r7, #16]
 8005940:	1ad3      	subs	r3, r2, r3
 8005942:	2b05      	cmp	r3, #5
 8005944:	d928      	bls.n	8005998 <HAL_DMA_Init+0x1f8>
      {
        /* Update error code */
        hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
 8005946:	687b      	ldr	r3, [r7, #4]
 8005948:	2220      	movs	r2, #32
 800594a:	655a      	str	r2, [r3, #84]	@ 0x54

        /* Change the DMA state */
        hdma->State = HAL_DMA_STATE_ERROR;
 800594c:	687b      	ldr	r3, [r7, #4]
 800594e:	2203      	movs	r2, #3
 8005950:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        return HAL_ERROR;
 8005954:	2301      	movs	r3, #1
 8005956:	e246      	b.n	8005de6 <HAL_DMA_Init+0x646>
 8005958:	40020010 	.word	0x40020010
 800595c:	40020028 	.word	0x40020028
 8005960:	40020040 	.word	0x40020040
 8005964:	40020058 	.word	0x40020058
 8005968:	40020070 	.word	0x40020070
 800596c:	40020088 	.word	0x40020088
 8005970:	400200a0 	.word	0x400200a0
 8005974:	400200b8 	.word	0x400200b8
 8005978:	40020410 	.word	0x40020410
 800597c:	40020428 	.word	0x40020428
 8005980:	40020440 	.word	0x40020440
 8005984:	40020458 	.word	0x40020458
 8005988:	40020470 	.word	0x40020470
 800598c:	40020488 	.word	0x40020488
 8005990:	400204a0 	.word	0x400204a0
 8005994:	400204b8 	.word	0x400204b8
    while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 8005998:	687b      	ldr	r3, [r7, #4]
 800599a:	681b      	ldr	r3, [r3, #0]
 800599c:	681b      	ldr	r3, [r3, #0]
 800599e:	f003 0301 	and.w	r3, r3, #1
 80059a2:	2b00      	cmp	r3, #0
 80059a4:	d1c8      	bne.n	8005938 <HAL_DMA_Init+0x198>
      }
    }

    /* Get the CR register value */
    registerValue = ((DMA_Stream_TypeDef   *)hdma->Instance)->CR;
 80059a6:	687b      	ldr	r3, [r7, #4]
 80059a8:	681b      	ldr	r3, [r3, #0]
 80059aa:	681b      	ldr	r3, [r3, #0]
 80059ac:	617b      	str	r3, [r7, #20]

    /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */
    registerValue &= ((uint32_t)~(DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
 80059ae:	697a      	ldr	r2, [r7, #20]
 80059b0:	4b83      	ldr	r3, [pc, #524]	@ (8005bc0 <HAL_DMA_Init+0x420>)
 80059b2:	4013      	ands	r3, r2
 80059b4:	617b      	str	r3, [r7, #20]
                        DMA_SxCR_PL    | DMA_SxCR_MSIZE  | DMA_SxCR_PSIZE  | \
                        DMA_SxCR_MINC  | DMA_SxCR_PINC   | DMA_SxCR_CIRC   | \
                        DMA_SxCR_DIR   | DMA_SxCR_CT     | DMA_SxCR_DBM));

    /* Prepare the DMA Stream configuration */
    registerValue |=  hdma->Init.Direction           |
 80059b6:	687b      	ldr	r3, [r7, #4]
 80059b8:	689a      	ldr	r2, [r3, #8]
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 80059ba:	687b      	ldr	r3, [r7, #4]
 80059bc:	68db      	ldr	r3, [r3, #12]
    registerValue |=  hdma->Init.Direction           |
 80059be:	431a      	orrs	r2, r3
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 80059c0:	687b      	ldr	r3, [r7, #4]
 80059c2:	691b      	ldr	r3, [r3, #16]
 80059c4:	431a      	orrs	r2, r3
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 80059c6:	687b      	ldr	r3, [r7, #4]
 80059c8:	695b      	ldr	r3, [r3, #20]
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 80059ca:	431a      	orrs	r2, r3
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 80059cc:	687b      	ldr	r3, [r7, #4]
 80059ce:	699b      	ldr	r3, [r3, #24]
 80059d0:	431a      	orrs	r2, r3
            hdma->Init.Mode                | hdma->Init.Priority;
 80059d2:	687b      	ldr	r3, [r7, #4]
 80059d4:	69db      	ldr	r3, [r3, #28]
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 80059d6:	431a      	orrs	r2, r3
            hdma->Init.Mode                | hdma->Init.Priority;
 80059d8:	687b      	ldr	r3, [r7, #4]
 80059da:	6a1b      	ldr	r3, [r3, #32]
 80059dc:	4313      	orrs	r3, r2
    registerValue |=  hdma->Init.Direction           |
 80059de:	697a      	ldr	r2, [r7, #20]
 80059e0:	4313      	orrs	r3, r2
 80059e2:	617b      	str	r3, [r7, #20]

    /* the Memory burst and peripheral burst are not used when the FIFO is disabled */
    if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
 80059e4:	687b      	ldr	r3, [r7, #4]
 80059e6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80059e8:	2b04      	cmp	r3, #4
 80059ea:	d107      	bne.n	80059fc <HAL_DMA_Init+0x25c>
    {
      /* Get memory burst and peripheral burst */
      registerValue |=  hdma->Init.MemBurst | hdma->Init.PeriphBurst;
 80059ec:	687b      	ldr	r3, [r7, #4]
 80059ee:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80059f0:	687b      	ldr	r3, [r7, #4]
 80059f2:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80059f4:	4313      	orrs	r3, r2
 80059f6:	697a      	ldr	r2, [r7, #20]
 80059f8:	4313      	orrs	r3, r2
 80059fa:	617b      	str	r3, [r7, #20]
    }

    /* Work around for Errata 2.22: UART/USART- DMA transfer lock: DMA stream could be
                                    lock when transferring data to/from USART/UART */
#if (STM32H7_DEV_ID == 0x450UL)
    if((DBGMCU->IDCODE & 0xFFFF0000U) >= 0x20000000U)
 80059fc:	4b71      	ldr	r3, [pc, #452]	@ (8005bc4 <HAL_DMA_Init+0x424>)
 80059fe:	681a      	ldr	r2, [r3, #0]
 8005a00:	4b71      	ldr	r3, [pc, #452]	@ (8005bc8 <HAL_DMA_Init+0x428>)
 8005a02:	4013      	ands	r3, r2
 8005a04:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 8005a08:	d328      	bcc.n	8005a5c <HAL_DMA_Init+0x2bc>
    {
#endif /* STM32H7_DEV_ID == 0x450UL */
      if(IS_DMA_UART_USART_REQUEST(hdma->Init.Request) != 0U)
 8005a0a:	687b      	ldr	r3, [r7, #4]
 8005a0c:	685b      	ldr	r3, [r3, #4]
 8005a0e:	2b28      	cmp	r3, #40	@ 0x28
 8005a10:	d903      	bls.n	8005a1a <HAL_DMA_Init+0x27a>
 8005a12:	687b      	ldr	r3, [r7, #4]
 8005a14:	685b      	ldr	r3, [r3, #4]
 8005a16:	2b2e      	cmp	r3, #46	@ 0x2e
 8005a18:	d917      	bls.n	8005a4a <HAL_DMA_Init+0x2aa>
 8005a1a:	687b      	ldr	r3, [r7, #4]
 8005a1c:	685b      	ldr	r3, [r3, #4]
 8005a1e:	2b3e      	cmp	r3, #62	@ 0x3e
 8005a20:	d903      	bls.n	8005a2a <HAL_DMA_Init+0x28a>
 8005a22:	687b      	ldr	r3, [r7, #4]
 8005a24:	685b      	ldr	r3, [r3, #4]
 8005a26:	2b42      	cmp	r3, #66	@ 0x42
 8005a28:	d90f      	bls.n	8005a4a <HAL_DMA_Init+0x2aa>
 8005a2a:	687b      	ldr	r3, [r7, #4]
 8005a2c:	685b      	ldr	r3, [r3, #4]
 8005a2e:	2b46      	cmp	r3, #70	@ 0x46
 8005a30:	d903      	bls.n	8005a3a <HAL_DMA_Init+0x29a>
 8005a32:	687b      	ldr	r3, [r7, #4]
 8005a34:	685b      	ldr	r3, [r3, #4]
 8005a36:	2b48      	cmp	r3, #72	@ 0x48
 8005a38:	d907      	bls.n	8005a4a <HAL_DMA_Init+0x2aa>
 8005a3a:	687b      	ldr	r3, [r7, #4]
 8005a3c:	685b      	ldr	r3, [r3, #4]
 8005a3e:	2b4e      	cmp	r3, #78	@ 0x4e
 8005a40:	d905      	bls.n	8005a4e <HAL_DMA_Init+0x2ae>
 8005a42:	687b      	ldr	r3, [r7, #4]
 8005a44:	685b      	ldr	r3, [r3, #4]
 8005a46:	2b52      	cmp	r3, #82	@ 0x52
 8005a48:	d801      	bhi.n	8005a4e <HAL_DMA_Init+0x2ae>
 8005a4a:	2301      	movs	r3, #1
 8005a4c:	e000      	b.n	8005a50 <HAL_DMA_Init+0x2b0>
 8005a4e:	2300      	movs	r3, #0
 8005a50:	2b00      	cmp	r3, #0
 8005a52:	d003      	beq.n	8005a5c <HAL_DMA_Init+0x2bc>
      {
        registerValue |= DMA_SxCR_TRBUFF;
 8005a54:	697b      	ldr	r3, [r7, #20]
 8005a56:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 8005a5a:	617b      	str	r3, [r7, #20]
#if (STM32H7_DEV_ID == 0x450UL)
    }
#endif /* STM32H7_DEV_ID == 0x450UL */

    /* Write to DMA Stream CR register */
    ((DMA_Stream_TypeDef   *)hdma->Instance)->CR = registerValue;
 8005a5c:	687b      	ldr	r3, [r7, #4]
 8005a5e:	681b      	ldr	r3, [r3, #0]
 8005a60:	697a      	ldr	r2, [r7, #20]
 8005a62:	601a      	str	r2, [r3, #0]

    /* Get the FCR register value */
    registerValue = ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR;
 8005a64:	687b      	ldr	r3, [r7, #4]
 8005a66:	681b      	ldr	r3, [r3, #0]
 8005a68:	695b      	ldr	r3, [r3, #20]
 8005a6a:	617b      	str	r3, [r7, #20]

    /* Clear Direct mode and FIFO threshold bits */
    registerValue &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
 8005a6c:	697b      	ldr	r3, [r7, #20]
 8005a6e:	f023 0307 	bic.w	r3, r3, #7
 8005a72:	617b      	str	r3, [r7, #20]

    /* Prepare the DMA Stream FIFO configuration */
    registerValue |= hdma->Init.FIFOMode;
 8005a74:	687b      	ldr	r3, [r7, #4]
 8005a76:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8005a78:	697a      	ldr	r2, [r7, #20]
 8005a7a:	4313      	orrs	r3, r2
 8005a7c:	617b      	str	r3, [r7, #20]

    /* the FIFO threshold is not used when the FIFO mode is disabled */
    if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
 8005a7e:	687b      	ldr	r3, [r7, #4]
 8005a80:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8005a82:	2b04      	cmp	r3, #4
 8005a84:	d117      	bne.n	8005ab6 <HAL_DMA_Init+0x316>
    {
      /* Get the FIFO threshold */
      registerValue |= hdma->Init.FIFOThreshold;
 8005a86:	687b      	ldr	r3, [r7, #4]
 8005a88:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8005a8a:	697a      	ldr	r2, [r7, #20]
 8005a8c:	4313      	orrs	r3, r2
 8005a8e:	617b      	str	r3, [r7, #20]

      /* Check compatibility between FIFO threshold level and size of the memory burst */
      /* for INCR4, INCR8, INCR16 */
      if(hdma->Init.MemBurst != DMA_MBURST_SINGLE)
 8005a90:	687b      	ldr	r3, [r7, #4]
 8005a92:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8005a94:	2b00      	cmp	r3, #0
 8005a96:	d00e      	beq.n	8005ab6 <HAL_DMA_Init+0x316>
      {
        if (DMA_CheckFifoParam(hdma) != HAL_OK)
 8005a98:	6878      	ldr	r0, [r7, #4]
 8005a9a:	f001 ff1d 	bl	80078d8 <DMA_CheckFifoParam>
 8005a9e:	4603      	mov	r3, r0
 8005aa0:	2b00      	cmp	r3, #0
 8005aa2:	d008      	beq.n	8005ab6 <HAL_DMA_Init+0x316>
        {
          /* Update error code */
          hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
 8005aa4:	687b      	ldr	r3, [r7, #4]
 8005aa6:	2240      	movs	r2, #64	@ 0x40
 8005aa8:	655a      	str	r2, [r3, #84]	@ 0x54

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 8005aaa:	687b      	ldr	r3, [r7, #4]
 8005aac:	2201      	movs	r2, #1
 8005aae:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          return HAL_ERROR;
 8005ab2:	2301      	movs	r3, #1
 8005ab4:	e197      	b.n	8005de6 <HAL_DMA_Init+0x646>
        }
      }
    }

    /* Write to DMA Stream FCR */
    ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR = registerValue;
 8005ab6:	687b      	ldr	r3, [r7, #4]
 8005ab8:	681b      	ldr	r3, [r3, #0]
 8005aba:	697a      	ldr	r2, [r7, #20]
 8005abc:	615a      	str	r2, [r3, #20]

    /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
       DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
    regs_dma = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
 8005abe:	6878      	ldr	r0, [r7, #4]
 8005ac0:	f001 fe58 	bl	8007774 <DMA_CalcBaseAndBitshift>
 8005ac4:	4603      	mov	r3, r0
 8005ac6:	60bb      	str	r3, [r7, #8]

    /* Clear all interrupt flags */
    regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 8005ac8:	687b      	ldr	r3, [r7, #4]
 8005aca:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8005acc:	f003 031f 	and.w	r3, r3, #31
 8005ad0:	223f      	movs	r2, #63	@ 0x3f
 8005ad2:	409a      	lsls	r2, r3
 8005ad4:	68bb      	ldr	r3, [r7, #8]
 8005ad6:	609a      	str	r2, [r3, #8]
 8005ad8:	e0cd      	b.n	8005c76 <HAL_DMA_Init+0x4d6>
  }
  else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */
 8005ada:	687b      	ldr	r3, [r7, #4]
 8005adc:	681b      	ldr	r3, [r3, #0]
 8005ade:	4a3b      	ldr	r2, [pc, #236]	@ (8005bcc <HAL_DMA_Init+0x42c>)
 8005ae0:	4293      	cmp	r3, r2
 8005ae2:	d022      	beq.n	8005b2a <HAL_DMA_Init+0x38a>
 8005ae4:	687b      	ldr	r3, [r7, #4]
 8005ae6:	681b      	ldr	r3, [r3, #0]
 8005ae8:	4a39      	ldr	r2, [pc, #228]	@ (8005bd0 <HAL_DMA_Init+0x430>)
 8005aea:	4293      	cmp	r3, r2
 8005aec:	d01d      	beq.n	8005b2a <HAL_DMA_Init+0x38a>
 8005aee:	687b      	ldr	r3, [r7, #4]
 8005af0:	681b      	ldr	r3, [r3, #0]
 8005af2:	4a38      	ldr	r2, [pc, #224]	@ (8005bd4 <HAL_DMA_Init+0x434>)
 8005af4:	4293      	cmp	r3, r2
 8005af6:	d018      	beq.n	8005b2a <HAL_DMA_Init+0x38a>
 8005af8:	687b      	ldr	r3, [r7, #4]
 8005afa:	681b      	ldr	r3, [r3, #0]
 8005afc:	4a36      	ldr	r2, [pc, #216]	@ (8005bd8 <HAL_DMA_Init+0x438>)
 8005afe:	4293      	cmp	r3, r2
 8005b00:	d013      	beq.n	8005b2a <HAL_DMA_Init+0x38a>
 8005b02:	687b      	ldr	r3, [r7, #4]
 8005b04:	681b      	ldr	r3, [r3, #0]
 8005b06:	4a35      	ldr	r2, [pc, #212]	@ (8005bdc <HAL_DMA_Init+0x43c>)
 8005b08:	4293      	cmp	r3, r2
 8005b0a:	d00e      	beq.n	8005b2a <HAL_DMA_Init+0x38a>
 8005b0c:	687b      	ldr	r3, [r7, #4]
 8005b0e:	681b      	ldr	r3, [r3, #0]
 8005b10:	4a33      	ldr	r2, [pc, #204]	@ (8005be0 <HAL_DMA_Init+0x440>)
 8005b12:	4293      	cmp	r3, r2
 8005b14:	d009      	beq.n	8005b2a <HAL_DMA_Init+0x38a>
 8005b16:	687b      	ldr	r3, [r7, #4]
 8005b18:	681b      	ldr	r3, [r3, #0]
 8005b1a:	4a32      	ldr	r2, [pc, #200]	@ (8005be4 <HAL_DMA_Init+0x444>)
 8005b1c:	4293      	cmp	r3, r2
 8005b1e:	d004      	beq.n	8005b2a <HAL_DMA_Init+0x38a>
 8005b20:	687b      	ldr	r3, [r7, #4]
 8005b22:	681b      	ldr	r3, [r3, #0]
 8005b24:	4a30      	ldr	r2, [pc, #192]	@ (8005be8 <HAL_DMA_Init+0x448>)
 8005b26:	4293      	cmp	r3, r2
 8005b28:	d101      	bne.n	8005b2e <HAL_DMA_Init+0x38e>
 8005b2a:	2301      	movs	r3, #1
 8005b2c:	e000      	b.n	8005b30 <HAL_DMA_Init+0x390>
 8005b2e:	2300      	movs	r3, #0
 8005b30:	2b00      	cmp	r3, #0
 8005b32:	f000 8097 	beq.w	8005c64 <HAL_DMA_Init+0x4c4>
  {
    if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 8005b36:	687b      	ldr	r3, [r7, #4]
 8005b38:	681b      	ldr	r3, [r3, #0]
 8005b3a:	4a24      	ldr	r2, [pc, #144]	@ (8005bcc <HAL_DMA_Init+0x42c>)
 8005b3c:	4293      	cmp	r3, r2
 8005b3e:	d021      	beq.n	8005b84 <HAL_DMA_Init+0x3e4>
 8005b40:	687b      	ldr	r3, [r7, #4]
 8005b42:	681b      	ldr	r3, [r3, #0]
 8005b44:	4a22      	ldr	r2, [pc, #136]	@ (8005bd0 <HAL_DMA_Init+0x430>)
 8005b46:	4293      	cmp	r3, r2
 8005b48:	d01c      	beq.n	8005b84 <HAL_DMA_Init+0x3e4>
 8005b4a:	687b      	ldr	r3, [r7, #4]
 8005b4c:	681b      	ldr	r3, [r3, #0]
 8005b4e:	4a21      	ldr	r2, [pc, #132]	@ (8005bd4 <HAL_DMA_Init+0x434>)
 8005b50:	4293      	cmp	r3, r2
 8005b52:	d017      	beq.n	8005b84 <HAL_DMA_Init+0x3e4>
 8005b54:	687b      	ldr	r3, [r7, #4]
 8005b56:	681b      	ldr	r3, [r3, #0]
 8005b58:	4a1f      	ldr	r2, [pc, #124]	@ (8005bd8 <HAL_DMA_Init+0x438>)
 8005b5a:	4293      	cmp	r3, r2
 8005b5c:	d012      	beq.n	8005b84 <HAL_DMA_Init+0x3e4>
 8005b5e:	687b      	ldr	r3, [r7, #4]
 8005b60:	681b      	ldr	r3, [r3, #0]
 8005b62:	4a1e      	ldr	r2, [pc, #120]	@ (8005bdc <HAL_DMA_Init+0x43c>)
 8005b64:	4293      	cmp	r3, r2
 8005b66:	d00d      	beq.n	8005b84 <HAL_DMA_Init+0x3e4>
 8005b68:	687b      	ldr	r3, [r7, #4]
 8005b6a:	681b      	ldr	r3, [r3, #0]
 8005b6c:	4a1c      	ldr	r2, [pc, #112]	@ (8005be0 <HAL_DMA_Init+0x440>)
 8005b6e:	4293      	cmp	r3, r2
 8005b70:	d008      	beq.n	8005b84 <HAL_DMA_Init+0x3e4>
 8005b72:	687b      	ldr	r3, [r7, #4]
 8005b74:	681b      	ldr	r3, [r3, #0]
 8005b76:	4a1b      	ldr	r2, [pc, #108]	@ (8005be4 <HAL_DMA_Init+0x444>)
 8005b78:	4293      	cmp	r3, r2
 8005b7a:	d003      	beq.n	8005b84 <HAL_DMA_Init+0x3e4>
 8005b7c:	687b      	ldr	r3, [r7, #4]
 8005b7e:	681b      	ldr	r3, [r3, #0]
 8005b80:	4a19      	ldr	r2, [pc, #100]	@ (8005be8 <HAL_DMA_Init+0x448>)
 8005b82:	4293      	cmp	r3, r2
      /* Check the request parameter */
      assert_param(IS_BDMA_REQUEST(hdma->Init.Request));
    }

    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 8005b84:	687b      	ldr	r3, [r7, #4]
 8005b86:	2202      	movs	r2, #2
 8005b88:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Allocate lock resource */
    __HAL_UNLOCK(hdma);
 8005b8c:	687b      	ldr	r3, [r7, #4]
 8005b8e:	2200      	movs	r2, #0
 8005b90:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    /* Get the CR register value */
    registerValue = ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR;
 8005b94:	687b      	ldr	r3, [r7, #4]
 8005b96:	681b      	ldr	r3, [r3, #0]
 8005b98:	681b      	ldr	r3, [r3, #0]
 8005b9a:	617b      	str	r3, [r7, #20]

    /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, MEM2MEM, DBM and CT bits */
    registerValue &= ((uint32_t)~(BDMA_CCR_PL    | BDMA_CCR_MSIZE   | BDMA_CCR_PSIZE  | \
 8005b9c:	697a      	ldr	r2, [r7, #20]
 8005b9e:	4b13      	ldr	r3, [pc, #76]	@ (8005bec <HAL_DMA_Init+0x44c>)
 8005ba0:	4013      	ands	r3, r2
 8005ba2:	617b      	str	r3, [r7, #20]
                                  BDMA_CCR_MINC  | BDMA_CCR_PINC    | BDMA_CCR_CIRC   | \
                                  BDMA_CCR_DIR   | BDMA_CCR_MEM2MEM | BDMA_CCR_DBM    | \
                                  BDMA_CCR_CT));

    /* Prepare the DMA Channel configuration */
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 8005ba4:	687b      	ldr	r3, [r7, #4]
 8005ba6:	689b      	ldr	r3, [r3, #8]
 8005ba8:	2b40      	cmp	r3, #64	@ 0x40
 8005baa:	d021      	beq.n	8005bf0 <HAL_DMA_Init+0x450>
 8005bac:	687b      	ldr	r3, [r7, #4]
 8005bae:	689b      	ldr	r3, [r3, #8]
 8005bb0:	2b80      	cmp	r3, #128	@ 0x80
 8005bb2:	d102      	bne.n	8005bba <HAL_DMA_Init+0x41a>
 8005bb4:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 8005bb8:	e01b      	b.n	8005bf2 <HAL_DMA_Init+0x452>
 8005bba:	2300      	movs	r3, #0
 8005bbc:	e019      	b.n	8005bf2 <HAL_DMA_Init+0x452>
 8005bbe:	bf00      	nop
 8005bc0:	fe10803f 	.word	0xfe10803f
 8005bc4:	5c001000 	.word	0x5c001000
 8005bc8:	ffff0000 	.word	0xffff0000
 8005bcc:	58025408 	.word	0x58025408
 8005bd0:	5802541c 	.word	0x5802541c
 8005bd4:	58025430 	.word	0x58025430
 8005bd8:	58025444 	.word	0x58025444
 8005bdc:	58025458 	.word	0x58025458
 8005be0:	5802546c 	.word	0x5802546c
 8005be4:	58025480 	.word	0x58025480
 8005be8:	58025494 	.word	0x58025494
 8005bec:	fffe000f 	.word	0xfffe000f
 8005bf0:	2310      	movs	r3, #16
                      DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc)       |
 8005bf2:	687a      	ldr	r2, [r7, #4]
 8005bf4:	68d2      	ldr	r2, [r2, #12]
 8005bf6:	08d2      	lsrs	r2, r2, #3
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 8005bf8:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc)              |
 8005bfa:	687b      	ldr	r3, [r7, #4]
 8005bfc:	691b      	ldr	r3, [r3, #16]
 8005bfe:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc)       |
 8005c00:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) |
 8005c02:	687b      	ldr	r3, [r7, #4]
 8005c04:	695b      	ldr	r3, [r3, #20]
 8005c06:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc)              |
 8005c08:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment)    |
 8005c0a:	687b      	ldr	r3, [r7, #4]
 8005c0c:	699b      	ldr	r3, [r3, #24]
 8005c0e:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) |
 8005c10:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MODE(hdma->Init.Mode)                      |
 8005c12:	687b      	ldr	r3, [r7, #4]
 8005c14:	69db      	ldr	r3, [r3, #28]
 8005c16:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment)    |
 8005c18:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_PRIORITY(hdma->Init.Priority);
 8005c1a:	687b      	ldr	r3, [r7, #4]
 8005c1c:	6a1b      	ldr	r3, [r3, #32]
 8005c1e:	091b      	lsrs	r3, r3, #4
                      DMA_TO_BDMA_MODE(hdma->Init.Mode)                      |
 8005c20:	4313      	orrs	r3, r2
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 8005c22:	697a      	ldr	r2, [r7, #20]
 8005c24:	4313      	orrs	r3, r2
 8005c26:	617b      	str	r3, [r7, #20]

    /* Write to DMA Channel CR register */
    ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR = registerValue;
 8005c28:	687b      	ldr	r3, [r7, #4]
 8005c2a:	681b      	ldr	r3, [r3, #0]
 8005c2c:	697a      	ldr	r2, [r7, #20]
 8005c2e:	601a      	str	r2, [r3, #0]

    /* calculation of the channel index */
    hdma->StreamIndex = (((uint32_t)((uint32_t*)hdma->Instance) - (uint32_t)BDMA_Channel0) / ((uint32_t)BDMA_Channel1 - (uint32_t)BDMA_Channel0)) << 2U;
 8005c30:	687b      	ldr	r3, [r7, #4]
 8005c32:	681b      	ldr	r3, [r3, #0]
 8005c34:	461a      	mov	r2, r3
 8005c36:	4b6e      	ldr	r3, [pc, #440]	@ (8005df0 <HAL_DMA_Init+0x650>)
 8005c38:	4413      	add	r3, r2
 8005c3a:	4a6e      	ldr	r2, [pc, #440]	@ (8005df4 <HAL_DMA_Init+0x654>)
 8005c3c:	fba2 2303 	umull	r2, r3, r2, r3
 8005c40:	091b      	lsrs	r3, r3, #4
 8005c42:	009a      	lsls	r2, r3, #2
 8005c44:	687b      	ldr	r3, [r7, #4]
 8005c46:	65da      	str	r2, [r3, #92]	@ 0x5c

    /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
    DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
    regs_bdma = (BDMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
 8005c48:	6878      	ldr	r0, [r7, #4]
 8005c4a:	f001 fd93 	bl	8007774 <DMA_CalcBaseAndBitshift>
 8005c4e:	4603      	mov	r3, r0
 8005c50:	60fb      	str	r3, [r7, #12]

    /* Clear all interrupt flags */
    regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 8005c52:	687b      	ldr	r3, [r7, #4]
 8005c54:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8005c56:	f003 031f 	and.w	r3, r3, #31
 8005c5a:	2201      	movs	r2, #1
 8005c5c:	409a      	lsls	r2, r3
 8005c5e:	68fb      	ldr	r3, [r7, #12]
 8005c60:	605a      	str	r2, [r3, #4]
 8005c62:	e008      	b.n	8005c76 <HAL_DMA_Init+0x4d6>
  }
  else
  {
    hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
 8005c64:	687b      	ldr	r3, [r7, #4]
 8005c66:	2240      	movs	r2, #64	@ 0x40
 8005c68:	655a      	str	r2, [r3, #84]	@ 0x54
    hdma->State     = HAL_DMA_STATE_ERROR;
 8005c6a:	687b      	ldr	r3, [r7, #4]
 8005c6c:	2203      	movs	r2, #3
 8005c6e:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    return HAL_ERROR;
 8005c72:	2301      	movs	r3, #1
 8005c74:	e0b7      	b.n	8005de6 <HAL_DMA_Init+0x646>
  }

  if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 8005c76:	687b      	ldr	r3, [r7, #4]
 8005c78:	681b      	ldr	r3, [r3, #0]
 8005c7a:	4a5f      	ldr	r2, [pc, #380]	@ (8005df8 <HAL_DMA_Init+0x658>)
 8005c7c:	4293      	cmp	r3, r2
 8005c7e:	d072      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005c80:	687b      	ldr	r3, [r7, #4]
 8005c82:	681b      	ldr	r3, [r3, #0]
 8005c84:	4a5d      	ldr	r2, [pc, #372]	@ (8005dfc <HAL_DMA_Init+0x65c>)
 8005c86:	4293      	cmp	r3, r2
 8005c88:	d06d      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005c8a:	687b      	ldr	r3, [r7, #4]
 8005c8c:	681b      	ldr	r3, [r3, #0]
 8005c8e:	4a5c      	ldr	r2, [pc, #368]	@ (8005e00 <HAL_DMA_Init+0x660>)
 8005c90:	4293      	cmp	r3, r2
 8005c92:	d068      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005c94:	687b      	ldr	r3, [r7, #4]
 8005c96:	681b      	ldr	r3, [r3, #0]
 8005c98:	4a5a      	ldr	r2, [pc, #360]	@ (8005e04 <HAL_DMA_Init+0x664>)
 8005c9a:	4293      	cmp	r3, r2
 8005c9c:	d063      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005c9e:	687b      	ldr	r3, [r7, #4]
 8005ca0:	681b      	ldr	r3, [r3, #0]
 8005ca2:	4a59      	ldr	r2, [pc, #356]	@ (8005e08 <HAL_DMA_Init+0x668>)
 8005ca4:	4293      	cmp	r3, r2
 8005ca6:	d05e      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005ca8:	687b      	ldr	r3, [r7, #4]
 8005caa:	681b      	ldr	r3, [r3, #0]
 8005cac:	4a57      	ldr	r2, [pc, #348]	@ (8005e0c <HAL_DMA_Init+0x66c>)
 8005cae:	4293      	cmp	r3, r2
 8005cb0:	d059      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005cb2:	687b      	ldr	r3, [r7, #4]
 8005cb4:	681b      	ldr	r3, [r3, #0]
 8005cb6:	4a56      	ldr	r2, [pc, #344]	@ (8005e10 <HAL_DMA_Init+0x670>)
 8005cb8:	4293      	cmp	r3, r2
 8005cba:	d054      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005cbc:	687b      	ldr	r3, [r7, #4]
 8005cbe:	681b      	ldr	r3, [r3, #0]
 8005cc0:	4a54      	ldr	r2, [pc, #336]	@ (8005e14 <HAL_DMA_Init+0x674>)
 8005cc2:	4293      	cmp	r3, r2
 8005cc4:	d04f      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005cc6:	687b      	ldr	r3, [r7, #4]
 8005cc8:	681b      	ldr	r3, [r3, #0]
 8005cca:	4a53      	ldr	r2, [pc, #332]	@ (8005e18 <HAL_DMA_Init+0x678>)
 8005ccc:	4293      	cmp	r3, r2
 8005cce:	d04a      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005cd0:	687b      	ldr	r3, [r7, #4]
 8005cd2:	681b      	ldr	r3, [r3, #0]
 8005cd4:	4a51      	ldr	r2, [pc, #324]	@ (8005e1c <HAL_DMA_Init+0x67c>)
 8005cd6:	4293      	cmp	r3, r2
 8005cd8:	d045      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005cda:	687b      	ldr	r3, [r7, #4]
 8005cdc:	681b      	ldr	r3, [r3, #0]
 8005cde:	4a50      	ldr	r2, [pc, #320]	@ (8005e20 <HAL_DMA_Init+0x680>)
 8005ce0:	4293      	cmp	r3, r2
 8005ce2:	d040      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005ce4:	687b      	ldr	r3, [r7, #4]
 8005ce6:	681b      	ldr	r3, [r3, #0]
 8005ce8:	4a4e      	ldr	r2, [pc, #312]	@ (8005e24 <HAL_DMA_Init+0x684>)
 8005cea:	4293      	cmp	r3, r2
 8005cec:	d03b      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005cee:	687b      	ldr	r3, [r7, #4]
 8005cf0:	681b      	ldr	r3, [r3, #0]
 8005cf2:	4a4d      	ldr	r2, [pc, #308]	@ (8005e28 <HAL_DMA_Init+0x688>)
 8005cf4:	4293      	cmp	r3, r2
 8005cf6:	d036      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005cf8:	687b      	ldr	r3, [r7, #4]
 8005cfa:	681b      	ldr	r3, [r3, #0]
 8005cfc:	4a4b      	ldr	r2, [pc, #300]	@ (8005e2c <HAL_DMA_Init+0x68c>)
 8005cfe:	4293      	cmp	r3, r2
 8005d00:	d031      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005d02:	687b      	ldr	r3, [r7, #4]
 8005d04:	681b      	ldr	r3, [r3, #0]
 8005d06:	4a4a      	ldr	r2, [pc, #296]	@ (8005e30 <HAL_DMA_Init+0x690>)
 8005d08:	4293      	cmp	r3, r2
 8005d0a:	d02c      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005d0c:	687b      	ldr	r3, [r7, #4]
 8005d0e:	681b      	ldr	r3, [r3, #0]
 8005d10:	4a48      	ldr	r2, [pc, #288]	@ (8005e34 <HAL_DMA_Init+0x694>)
 8005d12:	4293      	cmp	r3, r2
 8005d14:	d027      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005d16:	687b      	ldr	r3, [r7, #4]
 8005d18:	681b      	ldr	r3, [r3, #0]
 8005d1a:	4a47      	ldr	r2, [pc, #284]	@ (8005e38 <HAL_DMA_Init+0x698>)
 8005d1c:	4293      	cmp	r3, r2
 8005d1e:	d022      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005d20:	687b      	ldr	r3, [r7, #4]
 8005d22:	681b      	ldr	r3, [r3, #0]
 8005d24:	4a45      	ldr	r2, [pc, #276]	@ (8005e3c <HAL_DMA_Init+0x69c>)
 8005d26:	4293      	cmp	r3, r2
 8005d28:	d01d      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005d2a:	687b      	ldr	r3, [r7, #4]
 8005d2c:	681b      	ldr	r3, [r3, #0]
 8005d2e:	4a44      	ldr	r2, [pc, #272]	@ (8005e40 <HAL_DMA_Init+0x6a0>)
 8005d30:	4293      	cmp	r3, r2
 8005d32:	d018      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005d34:	687b      	ldr	r3, [r7, #4]
 8005d36:	681b      	ldr	r3, [r3, #0]
 8005d38:	4a42      	ldr	r2, [pc, #264]	@ (8005e44 <HAL_DMA_Init+0x6a4>)
 8005d3a:	4293      	cmp	r3, r2
 8005d3c:	d013      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005d3e:	687b      	ldr	r3, [r7, #4]
 8005d40:	681b      	ldr	r3, [r3, #0]
 8005d42:	4a41      	ldr	r2, [pc, #260]	@ (8005e48 <HAL_DMA_Init+0x6a8>)
 8005d44:	4293      	cmp	r3, r2
 8005d46:	d00e      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005d48:	687b      	ldr	r3, [r7, #4]
 8005d4a:	681b      	ldr	r3, [r3, #0]
 8005d4c:	4a3f      	ldr	r2, [pc, #252]	@ (8005e4c <HAL_DMA_Init+0x6ac>)
 8005d4e:	4293      	cmp	r3, r2
 8005d50:	d009      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005d52:	687b      	ldr	r3, [r7, #4]
 8005d54:	681b      	ldr	r3, [r3, #0]
 8005d56:	4a3e      	ldr	r2, [pc, #248]	@ (8005e50 <HAL_DMA_Init+0x6b0>)
 8005d58:	4293      	cmp	r3, r2
 8005d5a:	d004      	beq.n	8005d66 <HAL_DMA_Init+0x5c6>
 8005d5c:	687b      	ldr	r3, [r7, #4]
 8005d5e:	681b      	ldr	r3, [r3, #0]
 8005d60:	4a3c      	ldr	r2, [pc, #240]	@ (8005e54 <HAL_DMA_Init+0x6b4>)
 8005d62:	4293      	cmp	r3, r2
 8005d64:	d101      	bne.n	8005d6a <HAL_DMA_Init+0x5ca>
 8005d66:	2301      	movs	r3, #1
 8005d68:	e000      	b.n	8005d6c <HAL_DMA_Init+0x5cc>
 8005d6a:	2300      	movs	r3, #0
 8005d6c:	2b00      	cmp	r3, #0
 8005d6e:	d032      	beq.n	8005dd6 <HAL_DMA_Init+0x636>
  {
    /* Initialize parameters for DMAMUX channel :
    DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask
    */
    DMA_CalcDMAMUXChannelBaseAndMask(hdma);
 8005d70:	6878      	ldr	r0, [r7, #4]
 8005d72:	f001 fe2d 	bl	80079d0 <DMA_CalcDMAMUXChannelBaseAndMask>

    if(hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
 8005d76:	687b      	ldr	r3, [r7, #4]
 8005d78:	689b      	ldr	r3, [r3, #8]
 8005d7a:	2b80      	cmp	r3, #128	@ 0x80
 8005d7c:	d102      	bne.n	8005d84 <HAL_DMA_Init+0x5e4>
    {
      /* if memory to memory force the request to 0*/
      hdma->Init.Request = DMA_REQUEST_MEM2MEM;
 8005d7e:	687b      	ldr	r3, [r7, #4]
 8005d80:	2200      	movs	r2, #0
 8005d82:	605a      	str	r2, [r3, #4]
    }

    /* Set peripheral request  to DMAMUX channel */
    hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID);
 8005d84:	687b      	ldr	r3, [r7, #4]
 8005d86:	685a      	ldr	r2, [r3, #4]
 8005d88:	687b      	ldr	r3, [r7, #4]
 8005d8a:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8005d8c:	b2d2      	uxtb	r2, r2
 8005d8e:	601a      	str	r2, [r3, #0]

    /* Clear the DMAMUX synchro overrun flag */
    hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 8005d90:	687b      	ldr	r3, [r7, #4]
 8005d92:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 8005d94:	687a      	ldr	r2, [r7, #4]
 8005d96:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 8005d98:	605a      	str	r2, [r3, #4]

    /* Initialize parameters for DMAMUX request generator :
    if the DMA request is DMA_REQUEST_GENERATOR0 to DMA_REQUEST_GENERATOR7
    */
    if((hdma->Init.Request >= DMA_REQUEST_GENERATOR0) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR7))
 8005d9a:	687b      	ldr	r3, [r7, #4]
 8005d9c:	685b      	ldr	r3, [r3, #4]
 8005d9e:	2b00      	cmp	r3, #0
 8005da0:	d010      	beq.n	8005dc4 <HAL_DMA_Init+0x624>
 8005da2:	687b      	ldr	r3, [r7, #4]
 8005da4:	685b      	ldr	r3, [r3, #4]
 8005da6:	2b08      	cmp	r3, #8
 8005da8:	d80c      	bhi.n	8005dc4 <HAL_DMA_Init+0x624>
    {
      /* Initialize parameters for DMAMUX request generator :
      DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask */
      DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);
 8005daa:	6878      	ldr	r0, [r7, #4]
 8005dac:	f001 feaa 	bl	8007b04 <DMA_CalcDMAMUXRequestGenBaseAndMask>

      /* Reset the DMAMUX request generator register */
      hdma->DMAmuxRequestGen->RGCR = 0U;
 8005db0:	687b      	ldr	r3, [r7, #4]
 8005db2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8005db4:	2200      	movs	r2, #0
 8005db6:	601a      	str	r2, [r3, #0]

      /* Clear the DMAMUX request generator overrun flag */
      hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 8005db8:	687b      	ldr	r3, [r7, #4]
 8005dba:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8005dbc:	687a      	ldr	r2, [r7, #4]
 8005dbe:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 8005dc0:	605a      	str	r2, [r3, #4]
 8005dc2:	e008      	b.n	8005dd6 <HAL_DMA_Init+0x636>
    }
    else
    {
      hdma->DMAmuxRequestGen = 0U;
 8005dc4:	687b      	ldr	r3, [r7, #4]
 8005dc6:	2200      	movs	r2, #0
 8005dc8:	66da      	str	r2, [r3, #108]	@ 0x6c
      hdma->DMAmuxRequestGenStatus = 0U;
 8005dca:	687b      	ldr	r3, [r7, #4]
 8005dcc:	2200      	movs	r2, #0
 8005dce:	671a      	str	r2, [r3, #112]	@ 0x70
      hdma->DMAmuxRequestGenStatusMask = 0U;
 8005dd0:	687b      	ldr	r3, [r7, #4]
 8005dd2:	2200      	movs	r2, #0
 8005dd4:	675a      	str	r2, [r3, #116]	@ 0x74
    }
  }

  /* Initialize the error code */
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 8005dd6:	687b      	ldr	r3, [r7, #4]
 8005dd8:	2200      	movs	r2, #0
 8005dda:	655a      	str	r2, [r3, #84]	@ 0x54

  /* Initialize the DMA state */
  hdma->State = HAL_DMA_STATE_READY;
 8005ddc:	687b      	ldr	r3, [r7, #4]
 8005dde:	2201      	movs	r2, #1
 8005de0:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

  return HAL_OK;
 8005de4:	2300      	movs	r3, #0
}
 8005de6:	4618      	mov	r0, r3
 8005de8:	3718      	adds	r7, #24
 8005dea:	46bd      	mov	sp, r7
 8005dec:	bd80      	pop	{r7, pc}
 8005dee:	bf00      	nop
 8005df0:	a7fdabf8 	.word	0xa7fdabf8
 8005df4:	cccccccd 	.word	0xcccccccd
 8005df8:	40020010 	.word	0x40020010
 8005dfc:	40020028 	.word	0x40020028
 8005e00:	40020040 	.word	0x40020040
 8005e04:	40020058 	.word	0x40020058
 8005e08:	40020070 	.word	0x40020070
 8005e0c:	40020088 	.word	0x40020088
 8005e10:	400200a0 	.word	0x400200a0
 8005e14:	400200b8 	.word	0x400200b8
 8005e18:	40020410 	.word	0x40020410
 8005e1c:	40020428 	.word	0x40020428
 8005e20:	40020440 	.word	0x40020440
 8005e24:	40020458 	.word	0x40020458
 8005e28:	40020470 	.word	0x40020470
 8005e2c:	40020488 	.word	0x40020488
 8005e30:	400204a0 	.word	0x400204a0
 8005e34:	400204b8 	.word	0x400204b8
 8005e38:	58025408 	.word	0x58025408
 8005e3c:	5802541c 	.word	0x5802541c
 8005e40:	58025430 	.word	0x58025430
 8005e44:	58025444 	.word	0x58025444
 8005e48:	58025458 	.word	0x58025458
 8005e4c:	5802546c 	.word	0x5802546c
 8005e50:	58025480 	.word	0x58025480
 8005e54:	58025494 	.word	0x58025494

08005e58 <HAL_DMA_Abort>:
  *        and the Stream will be effectively disabled only after the transfer of
  *        this single data is finished.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
{
 8005e58:	b580      	push	{r7, lr}
 8005e5a:	b086      	sub	sp, #24
 8005e5c:	af00      	add	r7, sp, #0
 8005e5e:	6078      	str	r0, [r7, #4]
  /* calculate DMA base and stream number */
  DMA_Base_Registers *regs_dma;
  BDMA_Base_Registers *regs_bdma;
  const __IO uint32_t *enableRegister;

  uint32_t tickstart = HAL_GetTick();
 8005e60:	f7ff f8f0 	bl	8005044 <HAL_GetTick>
 8005e64:	6138      	str	r0, [r7, #16]

 /* Check the DMA peripheral handle */
  if(hdma == NULL)
 8005e66:	687b      	ldr	r3, [r7, #4]
 8005e68:	2b00      	cmp	r3, #0
 8005e6a:	d101      	bne.n	8005e70 <HAL_DMA_Abort+0x18>
  {
    return HAL_ERROR;
 8005e6c:	2301      	movs	r3, #1
 8005e6e:	e2dc      	b.n	800642a <HAL_DMA_Abort+0x5d2>
  }

  /* Check the DMA peripheral state */
  if(hdma->State != HAL_DMA_STATE_BUSY)
 8005e70:	687b      	ldr	r3, [r7, #4]
 8005e72:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 8005e76:	b2db      	uxtb	r3, r3
 8005e78:	2b02      	cmp	r3, #2
 8005e7a:	d008      	beq.n	8005e8e <HAL_DMA_Abort+0x36>
  {
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 8005e7c:	687b      	ldr	r3, [r7, #4]
 8005e7e:	2280      	movs	r2, #128	@ 0x80
 8005e80:	655a      	str	r2, [r3, #84]	@ 0x54

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 8005e82:	687b      	ldr	r3, [r7, #4]
 8005e84:	2200      	movs	r2, #0
 8005e86:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    return HAL_ERROR;
 8005e8a:	2301      	movs	r3, #1
 8005e8c:	e2cd      	b.n	800642a <HAL_DMA_Abort+0x5d2>
  }
  else
  {
    /* Disable all the transfer interrupts */
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 8005e8e:	687b      	ldr	r3, [r7, #4]
 8005e90:	681b      	ldr	r3, [r3, #0]
 8005e92:	4a76      	ldr	r2, [pc, #472]	@ (800606c <HAL_DMA_Abort+0x214>)
 8005e94:	4293      	cmp	r3, r2
 8005e96:	d04a      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005e98:	687b      	ldr	r3, [r7, #4]
 8005e9a:	681b      	ldr	r3, [r3, #0]
 8005e9c:	4a74      	ldr	r2, [pc, #464]	@ (8006070 <HAL_DMA_Abort+0x218>)
 8005e9e:	4293      	cmp	r3, r2
 8005ea0:	d045      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005ea2:	687b      	ldr	r3, [r7, #4]
 8005ea4:	681b      	ldr	r3, [r3, #0]
 8005ea6:	4a73      	ldr	r2, [pc, #460]	@ (8006074 <HAL_DMA_Abort+0x21c>)
 8005ea8:	4293      	cmp	r3, r2
 8005eaa:	d040      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005eac:	687b      	ldr	r3, [r7, #4]
 8005eae:	681b      	ldr	r3, [r3, #0]
 8005eb0:	4a71      	ldr	r2, [pc, #452]	@ (8006078 <HAL_DMA_Abort+0x220>)
 8005eb2:	4293      	cmp	r3, r2
 8005eb4:	d03b      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005eb6:	687b      	ldr	r3, [r7, #4]
 8005eb8:	681b      	ldr	r3, [r3, #0]
 8005eba:	4a70      	ldr	r2, [pc, #448]	@ (800607c <HAL_DMA_Abort+0x224>)
 8005ebc:	4293      	cmp	r3, r2
 8005ebe:	d036      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005ec0:	687b      	ldr	r3, [r7, #4]
 8005ec2:	681b      	ldr	r3, [r3, #0]
 8005ec4:	4a6e      	ldr	r2, [pc, #440]	@ (8006080 <HAL_DMA_Abort+0x228>)
 8005ec6:	4293      	cmp	r3, r2
 8005ec8:	d031      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005eca:	687b      	ldr	r3, [r7, #4]
 8005ecc:	681b      	ldr	r3, [r3, #0]
 8005ece:	4a6d      	ldr	r2, [pc, #436]	@ (8006084 <HAL_DMA_Abort+0x22c>)
 8005ed0:	4293      	cmp	r3, r2
 8005ed2:	d02c      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005ed4:	687b      	ldr	r3, [r7, #4]
 8005ed6:	681b      	ldr	r3, [r3, #0]
 8005ed8:	4a6b      	ldr	r2, [pc, #428]	@ (8006088 <HAL_DMA_Abort+0x230>)
 8005eda:	4293      	cmp	r3, r2
 8005edc:	d027      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005ede:	687b      	ldr	r3, [r7, #4]
 8005ee0:	681b      	ldr	r3, [r3, #0]
 8005ee2:	4a6a      	ldr	r2, [pc, #424]	@ (800608c <HAL_DMA_Abort+0x234>)
 8005ee4:	4293      	cmp	r3, r2
 8005ee6:	d022      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005ee8:	687b      	ldr	r3, [r7, #4]
 8005eea:	681b      	ldr	r3, [r3, #0]
 8005eec:	4a68      	ldr	r2, [pc, #416]	@ (8006090 <HAL_DMA_Abort+0x238>)
 8005eee:	4293      	cmp	r3, r2
 8005ef0:	d01d      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005ef2:	687b      	ldr	r3, [r7, #4]
 8005ef4:	681b      	ldr	r3, [r3, #0]
 8005ef6:	4a67      	ldr	r2, [pc, #412]	@ (8006094 <HAL_DMA_Abort+0x23c>)
 8005ef8:	4293      	cmp	r3, r2
 8005efa:	d018      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005efc:	687b      	ldr	r3, [r7, #4]
 8005efe:	681b      	ldr	r3, [r3, #0]
 8005f00:	4a65      	ldr	r2, [pc, #404]	@ (8006098 <HAL_DMA_Abort+0x240>)
 8005f02:	4293      	cmp	r3, r2
 8005f04:	d013      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005f06:	687b      	ldr	r3, [r7, #4]
 8005f08:	681b      	ldr	r3, [r3, #0]
 8005f0a:	4a64      	ldr	r2, [pc, #400]	@ (800609c <HAL_DMA_Abort+0x244>)
 8005f0c:	4293      	cmp	r3, r2
 8005f0e:	d00e      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005f10:	687b      	ldr	r3, [r7, #4]
 8005f12:	681b      	ldr	r3, [r3, #0]
 8005f14:	4a62      	ldr	r2, [pc, #392]	@ (80060a0 <HAL_DMA_Abort+0x248>)
 8005f16:	4293      	cmp	r3, r2
 8005f18:	d009      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005f1a:	687b      	ldr	r3, [r7, #4]
 8005f1c:	681b      	ldr	r3, [r3, #0]
 8005f1e:	4a61      	ldr	r2, [pc, #388]	@ (80060a4 <HAL_DMA_Abort+0x24c>)
 8005f20:	4293      	cmp	r3, r2
 8005f22:	d004      	beq.n	8005f2e <HAL_DMA_Abort+0xd6>
 8005f24:	687b      	ldr	r3, [r7, #4]
 8005f26:	681b      	ldr	r3, [r3, #0]
 8005f28:	4a5f      	ldr	r2, [pc, #380]	@ (80060a8 <HAL_DMA_Abort+0x250>)
 8005f2a:	4293      	cmp	r3, r2
 8005f2c:	d101      	bne.n	8005f32 <HAL_DMA_Abort+0xda>
 8005f2e:	2301      	movs	r3, #1
 8005f30:	e000      	b.n	8005f34 <HAL_DMA_Abort+0xdc>
 8005f32:	2300      	movs	r3, #0
 8005f34:	2b00      	cmp	r3, #0
 8005f36:	d013      	beq.n	8005f60 <HAL_DMA_Abort+0x108>
    {
       /* Disable DMA All Interrupts  */
      ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_HT);
 8005f38:	687b      	ldr	r3, [r7, #4]
 8005f3a:	681b      	ldr	r3, [r3, #0]
 8005f3c:	681a      	ldr	r2, [r3, #0]
 8005f3e:	687b      	ldr	r3, [r7, #4]
 8005f40:	681b      	ldr	r3, [r3, #0]
 8005f42:	f022 021e 	bic.w	r2, r2, #30
 8005f46:	601a      	str	r2, [r3, #0]
      ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR &= ~(DMA_IT_FE);
 8005f48:	687b      	ldr	r3, [r7, #4]
 8005f4a:	681b      	ldr	r3, [r3, #0]
 8005f4c:	695a      	ldr	r2, [r3, #20]
 8005f4e:	687b      	ldr	r3, [r7, #4]
 8005f50:	681b      	ldr	r3, [r3, #0]
 8005f52:	f022 0280 	bic.w	r2, r2, #128	@ 0x80
 8005f56:	615a      	str	r2, [r3, #20]

      enableRegister = (__IO uint32_t *)(&(((DMA_Stream_TypeDef   *)hdma->Instance)->CR));
 8005f58:	687b      	ldr	r3, [r7, #4]
 8005f5a:	681b      	ldr	r3, [r3, #0]
 8005f5c:	617b      	str	r3, [r7, #20]
 8005f5e:	e00a      	b.n	8005f76 <HAL_DMA_Abort+0x11e>
    }
    else /* BDMA channel */
    {
      /* Disable DMA All Interrupts */
      ((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR  &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE);
 8005f60:	687b      	ldr	r3, [r7, #4]
 8005f62:	681b      	ldr	r3, [r3, #0]
 8005f64:	681a      	ldr	r2, [r3, #0]
 8005f66:	687b      	ldr	r3, [r7, #4]
 8005f68:	681b      	ldr	r3, [r3, #0]
 8005f6a:	f022 020e 	bic.w	r2, r2, #14
 8005f6e:	601a      	str	r2, [r3, #0]

      enableRegister = (__IO uint32_t *)(&(((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR));
 8005f70:	687b      	ldr	r3, [r7, #4]
 8005f72:	681b      	ldr	r3, [r3, #0]
 8005f74:	617b      	str	r3, [r7, #20]
    }

    if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 8005f76:	687b      	ldr	r3, [r7, #4]
 8005f78:	681b      	ldr	r3, [r3, #0]
 8005f7a:	4a3c      	ldr	r2, [pc, #240]	@ (800606c <HAL_DMA_Abort+0x214>)
 8005f7c:	4293      	cmp	r3, r2
 8005f7e:	d072      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8005f80:	687b      	ldr	r3, [r7, #4]
 8005f82:	681b      	ldr	r3, [r3, #0]
 8005f84:	4a3a      	ldr	r2, [pc, #232]	@ (8006070 <HAL_DMA_Abort+0x218>)
 8005f86:	4293      	cmp	r3, r2
 8005f88:	d06d      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8005f8a:	687b      	ldr	r3, [r7, #4]
 8005f8c:	681b      	ldr	r3, [r3, #0]
 8005f8e:	4a39      	ldr	r2, [pc, #228]	@ (8006074 <HAL_DMA_Abort+0x21c>)
 8005f90:	4293      	cmp	r3, r2
 8005f92:	d068      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8005f94:	687b      	ldr	r3, [r7, #4]
 8005f96:	681b      	ldr	r3, [r3, #0]
 8005f98:	4a37      	ldr	r2, [pc, #220]	@ (8006078 <HAL_DMA_Abort+0x220>)
 8005f9a:	4293      	cmp	r3, r2
 8005f9c:	d063      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8005f9e:	687b      	ldr	r3, [r7, #4]
 8005fa0:	681b      	ldr	r3, [r3, #0]
 8005fa2:	4a36      	ldr	r2, [pc, #216]	@ (800607c <HAL_DMA_Abort+0x224>)
 8005fa4:	4293      	cmp	r3, r2
 8005fa6:	d05e      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8005fa8:	687b      	ldr	r3, [r7, #4]
 8005faa:	681b      	ldr	r3, [r3, #0]
 8005fac:	4a34      	ldr	r2, [pc, #208]	@ (8006080 <HAL_DMA_Abort+0x228>)
 8005fae:	4293      	cmp	r3, r2
 8005fb0:	d059      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8005fb2:	687b      	ldr	r3, [r7, #4]
 8005fb4:	681b      	ldr	r3, [r3, #0]
 8005fb6:	4a33      	ldr	r2, [pc, #204]	@ (8006084 <HAL_DMA_Abort+0x22c>)
 8005fb8:	4293      	cmp	r3, r2
 8005fba:	d054      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8005fbc:	687b      	ldr	r3, [r7, #4]
 8005fbe:	681b      	ldr	r3, [r3, #0]
 8005fc0:	4a31      	ldr	r2, [pc, #196]	@ (8006088 <HAL_DMA_Abort+0x230>)
 8005fc2:	4293      	cmp	r3, r2
 8005fc4:	d04f      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8005fc6:	687b      	ldr	r3, [r7, #4]
 8005fc8:	681b      	ldr	r3, [r3, #0]
 8005fca:	4a30      	ldr	r2, [pc, #192]	@ (800608c <HAL_DMA_Abort+0x234>)
 8005fcc:	4293      	cmp	r3, r2
 8005fce:	d04a      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8005fd0:	687b      	ldr	r3, [r7, #4]
 8005fd2:	681b      	ldr	r3, [r3, #0]
 8005fd4:	4a2e      	ldr	r2, [pc, #184]	@ (8006090 <HAL_DMA_Abort+0x238>)
 8005fd6:	4293      	cmp	r3, r2
 8005fd8:	d045      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8005fda:	687b      	ldr	r3, [r7, #4]
 8005fdc:	681b      	ldr	r3, [r3, #0]
 8005fde:	4a2d      	ldr	r2, [pc, #180]	@ (8006094 <HAL_DMA_Abort+0x23c>)
 8005fe0:	4293      	cmp	r3, r2
 8005fe2:	d040      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8005fe4:	687b      	ldr	r3, [r7, #4]
 8005fe6:	681b      	ldr	r3, [r3, #0]
 8005fe8:	4a2b      	ldr	r2, [pc, #172]	@ (8006098 <HAL_DMA_Abort+0x240>)
 8005fea:	4293      	cmp	r3, r2
 8005fec:	d03b      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8005fee:	687b      	ldr	r3, [r7, #4]
 8005ff0:	681b      	ldr	r3, [r3, #0]
 8005ff2:	4a2a      	ldr	r2, [pc, #168]	@ (800609c <HAL_DMA_Abort+0x244>)
 8005ff4:	4293      	cmp	r3, r2
 8005ff6:	d036      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8005ff8:	687b      	ldr	r3, [r7, #4]
 8005ffa:	681b      	ldr	r3, [r3, #0]
 8005ffc:	4a28      	ldr	r2, [pc, #160]	@ (80060a0 <HAL_DMA_Abort+0x248>)
 8005ffe:	4293      	cmp	r3, r2
 8006000:	d031      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8006002:	687b      	ldr	r3, [r7, #4]
 8006004:	681b      	ldr	r3, [r3, #0]
 8006006:	4a27      	ldr	r2, [pc, #156]	@ (80060a4 <HAL_DMA_Abort+0x24c>)
 8006008:	4293      	cmp	r3, r2
 800600a:	d02c      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 800600c:	687b      	ldr	r3, [r7, #4]
 800600e:	681b      	ldr	r3, [r3, #0]
 8006010:	4a25      	ldr	r2, [pc, #148]	@ (80060a8 <HAL_DMA_Abort+0x250>)
 8006012:	4293      	cmp	r3, r2
 8006014:	d027      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8006016:	687b      	ldr	r3, [r7, #4]
 8006018:	681b      	ldr	r3, [r3, #0]
 800601a:	4a24      	ldr	r2, [pc, #144]	@ (80060ac <HAL_DMA_Abort+0x254>)
 800601c:	4293      	cmp	r3, r2
 800601e:	d022      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8006020:	687b      	ldr	r3, [r7, #4]
 8006022:	681b      	ldr	r3, [r3, #0]
 8006024:	4a22      	ldr	r2, [pc, #136]	@ (80060b0 <HAL_DMA_Abort+0x258>)
 8006026:	4293      	cmp	r3, r2
 8006028:	d01d      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 800602a:	687b      	ldr	r3, [r7, #4]
 800602c:	681b      	ldr	r3, [r3, #0]
 800602e:	4a21      	ldr	r2, [pc, #132]	@ (80060b4 <HAL_DMA_Abort+0x25c>)
 8006030:	4293      	cmp	r3, r2
 8006032:	d018      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8006034:	687b      	ldr	r3, [r7, #4]
 8006036:	681b      	ldr	r3, [r3, #0]
 8006038:	4a1f      	ldr	r2, [pc, #124]	@ (80060b8 <HAL_DMA_Abort+0x260>)
 800603a:	4293      	cmp	r3, r2
 800603c:	d013      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 800603e:	687b      	ldr	r3, [r7, #4]
 8006040:	681b      	ldr	r3, [r3, #0]
 8006042:	4a1e      	ldr	r2, [pc, #120]	@ (80060bc <HAL_DMA_Abort+0x264>)
 8006044:	4293      	cmp	r3, r2
 8006046:	d00e      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8006048:	687b      	ldr	r3, [r7, #4]
 800604a:	681b      	ldr	r3, [r3, #0]
 800604c:	4a1c      	ldr	r2, [pc, #112]	@ (80060c0 <HAL_DMA_Abort+0x268>)
 800604e:	4293      	cmp	r3, r2
 8006050:	d009      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 8006052:	687b      	ldr	r3, [r7, #4]
 8006054:	681b      	ldr	r3, [r3, #0]
 8006056:	4a1b      	ldr	r2, [pc, #108]	@ (80060c4 <HAL_DMA_Abort+0x26c>)
 8006058:	4293      	cmp	r3, r2
 800605a:	d004      	beq.n	8006066 <HAL_DMA_Abort+0x20e>
 800605c:	687b      	ldr	r3, [r7, #4]
 800605e:	681b      	ldr	r3, [r3, #0]
 8006060:	4a19      	ldr	r2, [pc, #100]	@ (80060c8 <HAL_DMA_Abort+0x270>)
 8006062:	4293      	cmp	r3, r2
 8006064:	d132      	bne.n	80060cc <HAL_DMA_Abort+0x274>
 8006066:	2301      	movs	r3, #1
 8006068:	e031      	b.n	80060ce <HAL_DMA_Abort+0x276>
 800606a:	bf00      	nop
 800606c:	40020010 	.word	0x40020010
 8006070:	40020028 	.word	0x40020028
 8006074:	40020040 	.word	0x40020040
 8006078:	40020058 	.word	0x40020058
 800607c:	40020070 	.word	0x40020070
 8006080:	40020088 	.word	0x40020088
 8006084:	400200a0 	.word	0x400200a0
 8006088:	400200b8 	.word	0x400200b8
 800608c:	40020410 	.word	0x40020410
 8006090:	40020428 	.word	0x40020428
 8006094:	40020440 	.word	0x40020440
 8006098:	40020458 	.word	0x40020458
 800609c:	40020470 	.word	0x40020470
 80060a0:	40020488 	.word	0x40020488
 80060a4:	400204a0 	.word	0x400204a0
 80060a8:	400204b8 	.word	0x400204b8
 80060ac:	58025408 	.word	0x58025408
 80060b0:	5802541c 	.word	0x5802541c
 80060b4:	58025430 	.word	0x58025430
 80060b8:	58025444 	.word	0x58025444
 80060bc:	58025458 	.word	0x58025458
 80060c0:	5802546c 	.word	0x5802546c
 80060c4:	58025480 	.word	0x58025480
 80060c8:	58025494 	.word	0x58025494
 80060cc:	2300      	movs	r3, #0
 80060ce:	2b00      	cmp	r3, #0
 80060d0:	d007      	beq.n	80060e2 <HAL_DMA_Abort+0x28a>
    {
      /* disable the DMAMUX sync overrun IT */
      hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
 80060d2:	687b      	ldr	r3, [r7, #4]
 80060d4:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 80060d6:	681a      	ldr	r2, [r3, #0]
 80060d8:	687b      	ldr	r3, [r7, #4]
 80060da:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 80060dc:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 80060e0:	601a      	str	r2, [r3, #0]
    }

    /* Disable the stream */
    __HAL_DMA_DISABLE(hdma);
 80060e2:	687b      	ldr	r3, [r7, #4]
 80060e4:	681b      	ldr	r3, [r3, #0]
 80060e6:	4a6d      	ldr	r2, [pc, #436]	@ (800629c <HAL_DMA_Abort+0x444>)
 80060e8:	4293      	cmp	r3, r2
 80060ea:	d04a      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 80060ec:	687b      	ldr	r3, [r7, #4]
 80060ee:	681b      	ldr	r3, [r3, #0]
 80060f0:	4a6b      	ldr	r2, [pc, #428]	@ (80062a0 <HAL_DMA_Abort+0x448>)
 80060f2:	4293      	cmp	r3, r2
 80060f4:	d045      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 80060f6:	687b      	ldr	r3, [r7, #4]
 80060f8:	681b      	ldr	r3, [r3, #0]
 80060fa:	4a6a      	ldr	r2, [pc, #424]	@ (80062a4 <HAL_DMA_Abort+0x44c>)
 80060fc:	4293      	cmp	r3, r2
 80060fe:	d040      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 8006100:	687b      	ldr	r3, [r7, #4]
 8006102:	681b      	ldr	r3, [r3, #0]
 8006104:	4a68      	ldr	r2, [pc, #416]	@ (80062a8 <HAL_DMA_Abort+0x450>)
 8006106:	4293      	cmp	r3, r2
 8006108:	d03b      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 800610a:	687b      	ldr	r3, [r7, #4]
 800610c:	681b      	ldr	r3, [r3, #0]
 800610e:	4a67      	ldr	r2, [pc, #412]	@ (80062ac <HAL_DMA_Abort+0x454>)
 8006110:	4293      	cmp	r3, r2
 8006112:	d036      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 8006114:	687b      	ldr	r3, [r7, #4]
 8006116:	681b      	ldr	r3, [r3, #0]
 8006118:	4a65      	ldr	r2, [pc, #404]	@ (80062b0 <HAL_DMA_Abort+0x458>)
 800611a:	4293      	cmp	r3, r2
 800611c:	d031      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 800611e:	687b      	ldr	r3, [r7, #4]
 8006120:	681b      	ldr	r3, [r3, #0]
 8006122:	4a64      	ldr	r2, [pc, #400]	@ (80062b4 <HAL_DMA_Abort+0x45c>)
 8006124:	4293      	cmp	r3, r2
 8006126:	d02c      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 8006128:	687b      	ldr	r3, [r7, #4]
 800612a:	681b      	ldr	r3, [r3, #0]
 800612c:	4a62      	ldr	r2, [pc, #392]	@ (80062b8 <HAL_DMA_Abort+0x460>)
 800612e:	4293      	cmp	r3, r2
 8006130:	d027      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 8006132:	687b      	ldr	r3, [r7, #4]
 8006134:	681b      	ldr	r3, [r3, #0]
 8006136:	4a61      	ldr	r2, [pc, #388]	@ (80062bc <HAL_DMA_Abort+0x464>)
 8006138:	4293      	cmp	r3, r2
 800613a:	d022      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 800613c:	687b      	ldr	r3, [r7, #4]
 800613e:	681b      	ldr	r3, [r3, #0]
 8006140:	4a5f      	ldr	r2, [pc, #380]	@ (80062c0 <HAL_DMA_Abort+0x468>)
 8006142:	4293      	cmp	r3, r2
 8006144:	d01d      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 8006146:	687b      	ldr	r3, [r7, #4]
 8006148:	681b      	ldr	r3, [r3, #0]
 800614a:	4a5e      	ldr	r2, [pc, #376]	@ (80062c4 <HAL_DMA_Abort+0x46c>)
 800614c:	4293      	cmp	r3, r2
 800614e:	d018      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 8006150:	687b      	ldr	r3, [r7, #4]
 8006152:	681b      	ldr	r3, [r3, #0]
 8006154:	4a5c      	ldr	r2, [pc, #368]	@ (80062c8 <HAL_DMA_Abort+0x470>)
 8006156:	4293      	cmp	r3, r2
 8006158:	d013      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 800615a:	687b      	ldr	r3, [r7, #4]
 800615c:	681b      	ldr	r3, [r3, #0]
 800615e:	4a5b      	ldr	r2, [pc, #364]	@ (80062cc <HAL_DMA_Abort+0x474>)
 8006160:	4293      	cmp	r3, r2
 8006162:	d00e      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 8006164:	687b      	ldr	r3, [r7, #4]
 8006166:	681b      	ldr	r3, [r3, #0]
 8006168:	4a59      	ldr	r2, [pc, #356]	@ (80062d0 <HAL_DMA_Abort+0x478>)
 800616a:	4293      	cmp	r3, r2
 800616c:	d009      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 800616e:	687b      	ldr	r3, [r7, #4]
 8006170:	681b      	ldr	r3, [r3, #0]
 8006172:	4a58      	ldr	r2, [pc, #352]	@ (80062d4 <HAL_DMA_Abort+0x47c>)
 8006174:	4293      	cmp	r3, r2
 8006176:	d004      	beq.n	8006182 <HAL_DMA_Abort+0x32a>
 8006178:	687b      	ldr	r3, [r7, #4]
 800617a:	681b      	ldr	r3, [r3, #0]
 800617c:	4a56      	ldr	r2, [pc, #344]	@ (80062d8 <HAL_DMA_Abort+0x480>)
 800617e:	4293      	cmp	r3, r2
 8006180:	d108      	bne.n	8006194 <HAL_DMA_Abort+0x33c>
 8006182:	687b      	ldr	r3, [r7, #4]
 8006184:	681b      	ldr	r3, [r3, #0]
 8006186:	681a      	ldr	r2, [r3, #0]
 8006188:	687b      	ldr	r3, [r7, #4]
 800618a:	681b      	ldr	r3, [r3, #0]
 800618c:	f022 0201 	bic.w	r2, r2, #1
 8006190:	601a      	str	r2, [r3, #0]
 8006192:	e007      	b.n	80061a4 <HAL_DMA_Abort+0x34c>
 8006194:	687b      	ldr	r3, [r7, #4]
 8006196:	681b      	ldr	r3, [r3, #0]
 8006198:	681a      	ldr	r2, [r3, #0]
 800619a:	687b      	ldr	r3, [r7, #4]
 800619c:	681b      	ldr	r3, [r3, #0]
 800619e:	f022 0201 	bic.w	r2, r2, #1
 80061a2:	601a      	str	r2, [r3, #0]

    /* Check if the DMA Stream is effectively disabled */
    while(((*enableRegister) & DMA_SxCR_EN) != 0U)
 80061a4:	e013      	b.n	80061ce <HAL_DMA_Abort+0x376>
    {
      /* Check for the Timeout */
      if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
 80061a6:	f7fe ff4d 	bl	8005044 <HAL_GetTick>
 80061aa:	4602      	mov	r2, r0
 80061ac:	693b      	ldr	r3, [r7, #16]
 80061ae:	1ad3      	subs	r3, r2, r3
 80061b0:	2b05      	cmp	r3, #5
 80061b2:	d90c      	bls.n	80061ce <HAL_DMA_Abort+0x376>
      {
        /* Update error code */
        hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
 80061b4:	687b      	ldr	r3, [r7, #4]
 80061b6:	2220      	movs	r2, #32
 80061b8:	655a      	str	r2, [r3, #84]	@ 0x54

        /* Change the DMA state */
        hdma->State = HAL_DMA_STATE_ERROR;
 80061ba:	687b      	ldr	r3, [r7, #4]
 80061bc:	2203      	movs	r2, #3
 80061be:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        /* Process Unlocked */
        __HAL_UNLOCK(hdma);
 80061c2:	687b      	ldr	r3, [r7, #4]
 80061c4:	2200      	movs	r2, #0
 80061c6:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

        return HAL_ERROR;
 80061ca:	2301      	movs	r3, #1
 80061cc:	e12d      	b.n	800642a <HAL_DMA_Abort+0x5d2>
    while(((*enableRegister) & DMA_SxCR_EN) != 0U)
 80061ce:	697b      	ldr	r3, [r7, #20]
 80061d0:	681b      	ldr	r3, [r3, #0]
 80061d2:	f003 0301 	and.w	r3, r3, #1
 80061d6:	2b00      	cmp	r3, #0
 80061d8:	d1e5      	bne.n	80061a6 <HAL_DMA_Abort+0x34e>
      }
    }

    /* Clear all interrupt flags at correct offset within the register */
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 80061da:	687b      	ldr	r3, [r7, #4]
 80061dc:	681b      	ldr	r3, [r3, #0]
 80061de:	4a2f      	ldr	r2, [pc, #188]	@ (800629c <HAL_DMA_Abort+0x444>)
 80061e0:	4293      	cmp	r3, r2
 80061e2:	d04a      	beq.n	800627a <HAL_DMA_Abort+0x422>
 80061e4:	687b      	ldr	r3, [r7, #4]
 80061e6:	681b      	ldr	r3, [r3, #0]
 80061e8:	4a2d      	ldr	r2, [pc, #180]	@ (80062a0 <HAL_DMA_Abort+0x448>)
 80061ea:	4293      	cmp	r3, r2
 80061ec:	d045      	beq.n	800627a <HAL_DMA_Abort+0x422>
 80061ee:	687b      	ldr	r3, [r7, #4]
 80061f0:	681b      	ldr	r3, [r3, #0]
 80061f2:	4a2c      	ldr	r2, [pc, #176]	@ (80062a4 <HAL_DMA_Abort+0x44c>)
 80061f4:	4293      	cmp	r3, r2
 80061f6:	d040      	beq.n	800627a <HAL_DMA_Abort+0x422>
 80061f8:	687b      	ldr	r3, [r7, #4]
 80061fa:	681b      	ldr	r3, [r3, #0]
 80061fc:	4a2a      	ldr	r2, [pc, #168]	@ (80062a8 <HAL_DMA_Abort+0x450>)
 80061fe:	4293      	cmp	r3, r2
 8006200:	d03b      	beq.n	800627a <HAL_DMA_Abort+0x422>
 8006202:	687b      	ldr	r3, [r7, #4]
 8006204:	681b      	ldr	r3, [r3, #0]
 8006206:	4a29      	ldr	r2, [pc, #164]	@ (80062ac <HAL_DMA_Abort+0x454>)
 8006208:	4293      	cmp	r3, r2
 800620a:	d036      	beq.n	800627a <HAL_DMA_Abort+0x422>
 800620c:	687b      	ldr	r3, [r7, #4]
 800620e:	681b      	ldr	r3, [r3, #0]
 8006210:	4a27      	ldr	r2, [pc, #156]	@ (80062b0 <HAL_DMA_Abort+0x458>)
 8006212:	4293      	cmp	r3, r2
 8006214:	d031      	beq.n	800627a <HAL_DMA_Abort+0x422>
 8006216:	687b      	ldr	r3, [r7, #4]
 8006218:	681b      	ldr	r3, [r3, #0]
 800621a:	4a26      	ldr	r2, [pc, #152]	@ (80062b4 <HAL_DMA_Abort+0x45c>)
 800621c:	4293      	cmp	r3, r2
 800621e:	d02c      	beq.n	800627a <HAL_DMA_Abort+0x422>
 8006220:	687b      	ldr	r3, [r7, #4]
 8006222:	681b      	ldr	r3, [r3, #0]
 8006224:	4a24      	ldr	r2, [pc, #144]	@ (80062b8 <HAL_DMA_Abort+0x460>)
 8006226:	4293      	cmp	r3, r2
 8006228:	d027      	beq.n	800627a <HAL_DMA_Abort+0x422>
 800622a:	687b      	ldr	r3, [r7, #4]
 800622c:	681b      	ldr	r3, [r3, #0]
 800622e:	4a23      	ldr	r2, [pc, #140]	@ (80062bc <HAL_DMA_Abort+0x464>)
 8006230:	4293      	cmp	r3, r2
 8006232:	d022      	beq.n	800627a <HAL_DMA_Abort+0x422>
 8006234:	687b      	ldr	r3, [r7, #4]
 8006236:	681b      	ldr	r3, [r3, #0]
 8006238:	4a21      	ldr	r2, [pc, #132]	@ (80062c0 <HAL_DMA_Abort+0x468>)
 800623a:	4293      	cmp	r3, r2
 800623c:	d01d      	beq.n	800627a <HAL_DMA_Abort+0x422>
 800623e:	687b      	ldr	r3, [r7, #4]
 8006240:	681b      	ldr	r3, [r3, #0]
 8006242:	4a20      	ldr	r2, [pc, #128]	@ (80062c4 <HAL_DMA_Abort+0x46c>)
 8006244:	4293      	cmp	r3, r2
 8006246:	d018      	beq.n	800627a <HAL_DMA_Abort+0x422>
 8006248:	687b      	ldr	r3, [r7, #4]
 800624a:	681b      	ldr	r3, [r3, #0]
 800624c:	4a1e      	ldr	r2, [pc, #120]	@ (80062c8 <HAL_DMA_Abort+0x470>)
 800624e:	4293      	cmp	r3, r2
 8006250:	d013      	beq.n	800627a <HAL_DMA_Abort+0x422>
 8006252:	687b      	ldr	r3, [r7, #4]
 8006254:	681b      	ldr	r3, [r3, #0]
 8006256:	4a1d      	ldr	r2, [pc, #116]	@ (80062cc <HAL_DMA_Abort+0x474>)
 8006258:	4293      	cmp	r3, r2
 800625a:	d00e      	beq.n	800627a <HAL_DMA_Abort+0x422>
 800625c:	687b      	ldr	r3, [r7, #4]
 800625e:	681b      	ldr	r3, [r3, #0]
 8006260:	4a1b      	ldr	r2, [pc, #108]	@ (80062d0 <HAL_DMA_Abort+0x478>)
 8006262:	4293      	cmp	r3, r2
 8006264:	d009      	beq.n	800627a <HAL_DMA_Abort+0x422>
 8006266:	687b      	ldr	r3, [r7, #4]
 8006268:	681b      	ldr	r3, [r3, #0]
 800626a:	4a1a      	ldr	r2, [pc, #104]	@ (80062d4 <HAL_DMA_Abort+0x47c>)
 800626c:	4293      	cmp	r3, r2
 800626e:	d004      	beq.n	800627a <HAL_DMA_Abort+0x422>
 8006270:	687b      	ldr	r3, [r7, #4]
 8006272:	681b      	ldr	r3, [r3, #0]
 8006274:	4a18      	ldr	r2, [pc, #96]	@ (80062d8 <HAL_DMA_Abort+0x480>)
 8006276:	4293      	cmp	r3, r2
 8006278:	d101      	bne.n	800627e <HAL_DMA_Abort+0x426>
 800627a:	2301      	movs	r3, #1
 800627c:	e000      	b.n	8006280 <HAL_DMA_Abort+0x428>
 800627e:	2300      	movs	r3, #0
 8006280:	2b00      	cmp	r3, #0
 8006282:	d02b      	beq.n	80062dc <HAL_DMA_Abort+0x484>
    {
      regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress;
 8006284:	687b      	ldr	r3, [r7, #4]
 8006286:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8006288:	60bb      	str	r3, [r7, #8]
      regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 800628a:	687b      	ldr	r3, [r7, #4]
 800628c:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800628e:	f003 031f 	and.w	r3, r3, #31
 8006292:	223f      	movs	r2, #63	@ 0x3f
 8006294:	409a      	lsls	r2, r3
 8006296:	68bb      	ldr	r3, [r7, #8]
 8006298:	609a      	str	r2, [r3, #8]
 800629a:	e02a      	b.n	80062f2 <HAL_DMA_Abort+0x49a>
 800629c:	40020010 	.word	0x40020010
 80062a0:	40020028 	.word	0x40020028
 80062a4:	40020040 	.word	0x40020040
 80062a8:	40020058 	.word	0x40020058
 80062ac:	40020070 	.word	0x40020070
 80062b0:	40020088 	.word	0x40020088
 80062b4:	400200a0 	.word	0x400200a0
 80062b8:	400200b8 	.word	0x400200b8
 80062bc:	40020410 	.word	0x40020410
 80062c0:	40020428 	.word	0x40020428
 80062c4:	40020440 	.word	0x40020440
 80062c8:	40020458 	.word	0x40020458
 80062cc:	40020470 	.word	0x40020470
 80062d0:	40020488 	.word	0x40020488
 80062d4:	400204a0 	.word	0x400204a0
 80062d8:	400204b8 	.word	0x400204b8
    }
    else /* BDMA channel */
    {
      regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 80062dc:	687b      	ldr	r3, [r7, #4]
 80062de:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 80062e0:	60fb      	str	r3, [r7, #12]
      regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 80062e2:	687b      	ldr	r3, [r7, #4]
 80062e4:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80062e6:	f003 031f 	and.w	r3, r3, #31
 80062ea:	2201      	movs	r2, #1
 80062ec:	409a      	lsls	r2, r3
 80062ee:	68fb      	ldr	r3, [r7, #12]
 80062f0:	605a      	str	r2, [r3, #4]
    }

    if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 80062f2:	687b      	ldr	r3, [r7, #4]
 80062f4:	681b      	ldr	r3, [r3, #0]
 80062f6:	4a4f      	ldr	r2, [pc, #316]	@ (8006434 <HAL_DMA_Abort+0x5dc>)
 80062f8:	4293      	cmp	r3, r2
 80062fa:	d072      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 80062fc:	687b      	ldr	r3, [r7, #4]
 80062fe:	681b      	ldr	r3, [r3, #0]
 8006300:	4a4d      	ldr	r2, [pc, #308]	@ (8006438 <HAL_DMA_Abort+0x5e0>)
 8006302:	4293      	cmp	r3, r2
 8006304:	d06d      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 8006306:	687b      	ldr	r3, [r7, #4]
 8006308:	681b      	ldr	r3, [r3, #0]
 800630a:	4a4c      	ldr	r2, [pc, #304]	@ (800643c <HAL_DMA_Abort+0x5e4>)
 800630c:	4293      	cmp	r3, r2
 800630e:	d068      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 8006310:	687b      	ldr	r3, [r7, #4]
 8006312:	681b      	ldr	r3, [r3, #0]
 8006314:	4a4a      	ldr	r2, [pc, #296]	@ (8006440 <HAL_DMA_Abort+0x5e8>)
 8006316:	4293      	cmp	r3, r2
 8006318:	d063      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 800631a:	687b      	ldr	r3, [r7, #4]
 800631c:	681b      	ldr	r3, [r3, #0]
 800631e:	4a49      	ldr	r2, [pc, #292]	@ (8006444 <HAL_DMA_Abort+0x5ec>)
 8006320:	4293      	cmp	r3, r2
 8006322:	d05e      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 8006324:	687b      	ldr	r3, [r7, #4]
 8006326:	681b      	ldr	r3, [r3, #0]
 8006328:	4a47      	ldr	r2, [pc, #284]	@ (8006448 <HAL_DMA_Abort+0x5f0>)
 800632a:	4293      	cmp	r3, r2
 800632c:	d059      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 800632e:	687b      	ldr	r3, [r7, #4]
 8006330:	681b      	ldr	r3, [r3, #0]
 8006332:	4a46      	ldr	r2, [pc, #280]	@ (800644c <HAL_DMA_Abort+0x5f4>)
 8006334:	4293      	cmp	r3, r2
 8006336:	d054      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 8006338:	687b      	ldr	r3, [r7, #4]
 800633a:	681b      	ldr	r3, [r3, #0]
 800633c:	4a44      	ldr	r2, [pc, #272]	@ (8006450 <HAL_DMA_Abort+0x5f8>)
 800633e:	4293      	cmp	r3, r2
 8006340:	d04f      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 8006342:	687b      	ldr	r3, [r7, #4]
 8006344:	681b      	ldr	r3, [r3, #0]
 8006346:	4a43      	ldr	r2, [pc, #268]	@ (8006454 <HAL_DMA_Abort+0x5fc>)
 8006348:	4293      	cmp	r3, r2
 800634a:	d04a      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 800634c:	687b      	ldr	r3, [r7, #4]
 800634e:	681b      	ldr	r3, [r3, #0]
 8006350:	4a41      	ldr	r2, [pc, #260]	@ (8006458 <HAL_DMA_Abort+0x600>)
 8006352:	4293      	cmp	r3, r2
 8006354:	d045      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 8006356:	687b      	ldr	r3, [r7, #4]
 8006358:	681b      	ldr	r3, [r3, #0]
 800635a:	4a40      	ldr	r2, [pc, #256]	@ (800645c <HAL_DMA_Abort+0x604>)
 800635c:	4293      	cmp	r3, r2
 800635e:	d040      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 8006360:	687b      	ldr	r3, [r7, #4]
 8006362:	681b      	ldr	r3, [r3, #0]
 8006364:	4a3e      	ldr	r2, [pc, #248]	@ (8006460 <HAL_DMA_Abort+0x608>)
 8006366:	4293      	cmp	r3, r2
 8006368:	d03b      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 800636a:	687b      	ldr	r3, [r7, #4]
 800636c:	681b      	ldr	r3, [r3, #0]
 800636e:	4a3d      	ldr	r2, [pc, #244]	@ (8006464 <HAL_DMA_Abort+0x60c>)
 8006370:	4293      	cmp	r3, r2
 8006372:	d036      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 8006374:	687b      	ldr	r3, [r7, #4]
 8006376:	681b      	ldr	r3, [r3, #0]
 8006378:	4a3b      	ldr	r2, [pc, #236]	@ (8006468 <HAL_DMA_Abort+0x610>)
 800637a:	4293      	cmp	r3, r2
 800637c:	d031      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 800637e:	687b      	ldr	r3, [r7, #4]
 8006380:	681b      	ldr	r3, [r3, #0]
 8006382:	4a3a      	ldr	r2, [pc, #232]	@ (800646c <HAL_DMA_Abort+0x614>)
 8006384:	4293      	cmp	r3, r2
 8006386:	d02c      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 8006388:	687b      	ldr	r3, [r7, #4]
 800638a:	681b      	ldr	r3, [r3, #0]
 800638c:	4a38      	ldr	r2, [pc, #224]	@ (8006470 <HAL_DMA_Abort+0x618>)
 800638e:	4293      	cmp	r3, r2
 8006390:	d027      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 8006392:	687b      	ldr	r3, [r7, #4]
 8006394:	681b      	ldr	r3, [r3, #0]
 8006396:	4a37      	ldr	r2, [pc, #220]	@ (8006474 <HAL_DMA_Abort+0x61c>)
 8006398:	4293      	cmp	r3, r2
 800639a:	d022      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 800639c:	687b      	ldr	r3, [r7, #4]
 800639e:	681b      	ldr	r3, [r3, #0]
 80063a0:	4a35      	ldr	r2, [pc, #212]	@ (8006478 <HAL_DMA_Abort+0x620>)
 80063a2:	4293      	cmp	r3, r2
 80063a4:	d01d      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 80063a6:	687b      	ldr	r3, [r7, #4]
 80063a8:	681b      	ldr	r3, [r3, #0]
 80063aa:	4a34      	ldr	r2, [pc, #208]	@ (800647c <HAL_DMA_Abort+0x624>)
 80063ac:	4293      	cmp	r3, r2
 80063ae:	d018      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 80063b0:	687b      	ldr	r3, [r7, #4]
 80063b2:	681b      	ldr	r3, [r3, #0]
 80063b4:	4a32      	ldr	r2, [pc, #200]	@ (8006480 <HAL_DMA_Abort+0x628>)
 80063b6:	4293      	cmp	r3, r2
 80063b8:	d013      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 80063ba:	687b      	ldr	r3, [r7, #4]
 80063bc:	681b      	ldr	r3, [r3, #0]
 80063be:	4a31      	ldr	r2, [pc, #196]	@ (8006484 <HAL_DMA_Abort+0x62c>)
 80063c0:	4293      	cmp	r3, r2
 80063c2:	d00e      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 80063c4:	687b      	ldr	r3, [r7, #4]
 80063c6:	681b      	ldr	r3, [r3, #0]
 80063c8:	4a2f      	ldr	r2, [pc, #188]	@ (8006488 <HAL_DMA_Abort+0x630>)
 80063ca:	4293      	cmp	r3, r2
 80063cc:	d009      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 80063ce:	687b      	ldr	r3, [r7, #4]
 80063d0:	681b      	ldr	r3, [r3, #0]
 80063d2:	4a2e      	ldr	r2, [pc, #184]	@ (800648c <HAL_DMA_Abort+0x634>)
 80063d4:	4293      	cmp	r3, r2
 80063d6:	d004      	beq.n	80063e2 <HAL_DMA_Abort+0x58a>
 80063d8:	687b      	ldr	r3, [r7, #4]
 80063da:	681b      	ldr	r3, [r3, #0]
 80063dc:	4a2c      	ldr	r2, [pc, #176]	@ (8006490 <HAL_DMA_Abort+0x638>)
 80063de:	4293      	cmp	r3, r2
 80063e0:	d101      	bne.n	80063e6 <HAL_DMA_Abort+0x58e>
 80063e2:	2301      	movs	r3, #1
 80063e4:	e000      	b.n	80063e8 <HAL_DMA_Abort+0x590>
 80063e6:	2300      	movs	r3, #0
 80063e8:	2b00      	cmp	r3, #0
 80063ea:	d015      	beq.n	8006418 <HAL_DMA_Abort+0x5c0>
    {
      /* Clear the DMAMUX synchro overrun flag */
      hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 80063ec:	687b      	ldr	r3, [r7, #4]
 80063ee:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 80063f0:	687a      	ldr	r2, [r7, #4]
 80063f2:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 80063f4:	605a      	str	r2, [r3, #4]

      if(hdma->DMAmuxRequestGen != 0U)
 80063f6:	687b      	ldr	r3, [r7, #4]
 80063f8:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80063fa:	2b00      	cmp	r3, #0
 80063fc:	d00c      	beq.n	8006418 <HAL_DMA_Abort+0x5c0>
      {
        /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT */
        /* disable the request gen overrun IT */
        hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
 80063fe:	687b      	ldr	r3, [r7, #4]
 8006400:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006402:	681a      	ldr	r2, [r3, #0]
 8006404:	687b      	ldr	r3, [r7, #4]
 8006406:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006408:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 800640c:	601a      	str	r2, [r3, #0]

        /* Clear the DMAMUX request generator overrun flag */
        hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 800640e:	687b      	ldr	r3, [r7, #4]
 8006410:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8006412:	687a      	ldr	r2, [r7, #4]
 8006414:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 8006416:	605a      	str	r2, [r3, #4]
      }
    }

    /* Change the DMA state */
    hdma->State = HAL_DMA_STATE_READY;
 8006418:	687b      	ldr	r3, [r7, #4]
 800641a:	2201      	movs	r2, #1
 800641c:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 8006420:	687b      	ldr	r3, [r7, #4]
 8006422:	2200      	movs	r2, #0
 8006424:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
  }

  return HAL_OK;
 8006428:	2300      	movs	r3, #0
}
 800642a:	4618      	mov	r0, r3
 800642c:	3718      	adds	r7, #24
 800642e:	46bd      	mov	sp, r7
 8006430:	bd80      	pop	{r7, pc}
 8006432:	bf00      	nop
 8006434:	40020010 	.word	0x40020010
 8006438:	40020028 	.word	0x40020028
 800643c:	40020040 	.word	0x40020040
 8006440:	40020058 	.word	0x40020058
 8006444:	40020070 	.word	0x40020070
 8006448:	40020088 	.word	0x40020088
 800644c:	400200a0 	.word	0x400200a0
 8006450:	400200b8 	.word	0x400200b8
 8006454:	40020410 	.word	0x40020410
 8006458:	40020428 	.word	0x40020428
 800645c:	40020440 	.word	0x40020440
 8006460:	40020458 	.word	0x40020458
 8006464:	40020470 	.word	0x40020470
 8006468:	40020488 	.word	0x40020488
 800646c:	400204a0 	.word	0x400204a0
 8006470:	400204b8 	.word	0x400204b8
 8006474:	58025408 	.word	0x58025408
 8006478:	5802541c 	.word	0x5802541c
 800647c:	58025430 	.word	0x58025430
 8006480:	58025444 	.word	0x58025444
 8006484:	58025458 	.word	0x58025458
 8006488:	5802546c 	.word	0x5802546c
 800648c:	58025480 	.word	0x58025480
 8006490:	58025494 	.word	0x58025494

08006494 <HAL_DMA_Abort_IT>:
  * @param  hdma  : pointer to a DMA_HandleTypeDef structure that contains
  *                 the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{
 8006494:	b580      	push	{r7, lr}
 8006496:	b084      	sub	sp, #16
 8006498:	af00      	add	r7, sp, #0
 800649a:	6078      	str	r0, [r7, #4]
  BDMA_Base_Registers *regs_bdma;

  /* Check the DMA peripheral handle */
  if(hdma == NULL)
 800649c:	687b      	ldr	r3, [r7, #4]
 800649e:	2b00      	cmp	r3, #0
 80064a0:	d101      	bne.n	80064a6 <HAL_DMA_Abort_IT+0x12>
  {
    return HAL_ERROR;
 80064a2:	2301      	movs	r3, #1
 80064a4:	e237      	b.n	8006916 <HAL_DMA_Abort_IT+0x482>
  }

  if(hdma->State != HAL_DMA_STATE_BUSY)
 80064a6:	687b      	ldr	r3, [r7, #4]
 80064a8:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 80064ac:	b2db      	uxtb	r3, r3
 80064ae:	2b02      	cmp	r3, #2
 80064b0:	d004      	beq.n	80064bc <HAL_DMA_Abort_IT+0x28>
  {
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 80064b2:	687b      	ldr	r3, [r7, #4]
 80064b4:	2280      	movs	r2, #128	@ 0x80
 80064b6:	655a      	str	r2, [r3, #84]	@ 0x54
    return HAL_ERROR;
 80064b8:	2301      	movs	r3, #1
 80064ba:	e22c      	b.n	8006916 <HAL_DMA_Abort_IT+0x482>
  }
  else
  {
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 80064bc:	687b      	ldr	r3, [r7, #4]
 80064be:	681b      	ldr	r3, [r3, #0]
 80064c0:	4a5c      	ldr	r2, [pc, #368]	@ (8006634 <HAL_DMA_Abort_IT+0x1a0>)
 80064c2:	4293      	cmp	r3, r2
 80064c4:	d04a      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 80064c6:	687b      	ldr	r3, [r7, #4]
 80064c8:	681b      	ldr	r3, [r3, #0]
 80064ca:	4a5b      	ldr	r2, [pc, #364]	@ (8006638 <HAL_DMA_Abort_IT+0x1a4>)
 80064cc:	4293      	cmp	r3, r2
 80064ce:	d045      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 80064d0:	687b      	ldr	r3, [r7, #4]
 80064d2:	681b      	ldr	r3, [r3, #0]
 80064d4:	4a59      	ldr	r2, [pc, #356]	@ (800663c <HAL_DMA_Abort_IT+0x1a8>)
 80064d6:	4293      	cmp	r3, r2
 80064d8:	d040      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 80064da:	687b      	ldr	r3, [r7, #4]
 80064dc:	681b      	ldr	r3, [r3, #0]
 80064de:	4a58      	ldr	r2, [pc, #352]	@ (8006640 <HAL_DMA_Abort_IT+0x1ac>)
 80064e0:	4293      	cmp	r3, r2
 80064e2:	d03b      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 80064e4:	687b      	ldr	r3, [r7, #4]
 80064e6:	681b      	ldr	r3, [r3, #0]
 80064e8:	4a56      	ldr	r2, [pc, #344]	@ (8006644 <HAL_DMA_Abort_IT+0x1b0>)
 80064ea:	4293      	cmp	r3, r2
 80064ec:	d036      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 80064ee:	687b      	ldr	r3, [r7, #4]
 80064f0:	681b      	ldr	r3, [r3, #0]
 80064f2:	4a55      	ldr	r2, [pc, #340]	@ (8006648 <HAL_DMA_Abort_IT+0x1b4>)
 80064f4:	4293      	cmp	r3, r2
 80064f6:	d031      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 80064f8:	687b      	ldr	r3, [r7, #4]
 80064fa:	681b      	ldr	r3, [r3, #0]
 80064fc:	4a53      	ldr	r2, [pc, #332]	@ (800664c <HAL_DMA_Abort_IT+0x1b8>)
 80064fe:	4293      	cmp	r3, r2
 8006500:	d02c      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 8006502:	687b      	ldr	r3, [r7, #4]
 8006504:	681b      	ldr	r3, [r3, #0]
 8006506:	4a52      	ldr	r2, [pc, #328]	@ (8006650 <HAL_DMA_Abort_IT+0x1bc>)
 8006508:	4293      	cmp	r3, r2
 800650a:	d027      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 800650c:	687b      	ldr	r3, [r7, #4]
 800650e:	681b      	ldr	r3, [r3, #0]
 8006510:	4a50      	ldr	r2, [pc, #320]	@ (8006654 <HAL_DMA_Abort_IT+0x1c0>)
 8006512:	4293      	cmp	r3, r2
 8006514:	d022      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 8006516:	687b      	ldr	r3, [r7, #4]
 8006518:	681b      	ldr	r3, [r3, #0]
 800651a:	4a4f      	ldr	r2, [pc, #316]	@ (8006658 <HAL_DMA_Abort_IT+0x1c4>)
 800651c:	4293      	cmp	r3, r2
 800651e:	d01d      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 8006520:	687b      	ldr	r3, [r7, #4]
 8006522:	681b      	ldr	r3, [r3, #0]
 8006524:	4a4d      	ldr	r2, [pc, #308]	@ (800665c <HAL_DMA_Abort_IT+0x1c8>)
 8006526:	4293      	cmp	r3, r2
 8006528:	d018      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 800652a:	687b      	ldr	r3, [r7, #4]
 800652c:	681b      	ldr	r3, [r3, #0]
 800652e:	4a4c      	ldr	r2, [pc, #304]	@ (8006660 <HAL_DMA_Abort_IT+0x1cc>)
 8006530:	4293      	cmp	r3, r2
 8006532:	d013      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 8006534:	687b      	ldr	r3, [r7, #4]
 8006536:	681b      	ldr	r3, [r3, #0]
 8006538:	4a4a      	ldr	r2, [pc, #296]	@ (8006664 <HAL_DMA_Abort_IT+0x1d0>)
 800653a:	4293      	cmp	r3, r2
 800653c:	d00e      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 800653e:	687b      	ldr	r3, [r7, #4]
 8006540:	681b      	ldr	r3, [r3, #0]
 8006542:	4a49      	ldr	r2, [pc, #292]	@ (8006668 <HAL_DMA_Abort_IT+0x1d4>)
 8006544:	4293      	cmp	r3, r2
 8006546:	d009      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 8006548:	687b      	ldr	r3, [r7, #4]
 800654a:	681b      	ldr	r3, [r3, #0]
 800654c:	4a47      	ldr	r2, [pc, #284]	@ (800666c <HAL_DMA_Abort_IT+0x1d8>)
 800654e:	4293      	cmp	r3, r2
 8006550:	d004      	beq.n	800655c <HAL_DMA_Abort_IT+0xc8>
 8006552:	687b      	ldr	r3, [r7, #4]
 8006554:	681b      	ldr	r3, [r3, #0]
 8006556:	4a46      	ldr	r2, [pc, #280]	@ (8006670 <HAL_DMA_Abort_IT+0x1dc>)
 8006558:	4293      	cmp	r3, r2
 800655a:	d101      	bne.n	8006560 <HAL_DMA_Abort_IT+0xcc>
 800655c:	2301      	movs	r3, #1
 800655e:	e000      	b.n	8006562 <HAL_DMA_Abort_IT+0xce>
 8006560:	2300      	movs	r3, #0
 8006562:	2b00      	cmp	r3, #0
 8006564:	f000 8086 	beq.w	8006674 <HAL_DMA_Abort_IT+0x1e0>
    {
      /* Set Abort State  */
      hdma->State = HAL_DMA_STATE_ABORT;
 8006568:	687b      	ldr	r3, [r7, #4]
 800656a:	2204      	movs	r2, #4
 800656c:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Disable the stream */
      __HAL_DMA_DISABLE(hdma);
 8006570:	687b      	ldr	r3, [r7, #4]
 8006572:	681b      	ldr	r3, [r3, #0]
 8006574:	4a2f      	ldr	r2, [pc, #188]	@ (8006634 <HAL_DMA_Abort_IT+0x1a0>)
 8006576:	4293      	cmp	r3, r2
 8006578:	d04a      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 800657a:	687b      	ldr	r3, [r7, #4]
 800657c:	681b      	ldr	r3, [r3, #0]
 800657e:	4a2e      	ldr	r2, [pc, #184]	@ (8006638 <HAL_DMA_Abort_IT+0x1a4>)
 8006580:	4293      	cmp	r3, r2
 8006582:	d045      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 8006584:	687b      	ldr	r3, [r7, #4]
 8006586:	681b      	ldr	r3, [r3, #0]
 8006588:	4a2c      	ldr	r2, [pc, #176]	@ (800663c <HAL_DMA_Abort_IT+0x1a8>)
 800658a:	4293      	cmp	r3, r2
 800658c:	d040      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 800658e:	687b      	ldr	r3, [r7, #4]
 8006590:	681b      	ldr	r3, [r3, #0]
 8006592:	4a2b      	ldr	r2, [pc, #172]	@ (8006640 <HAL_DMA_Abort_IT+0x1ac>)
 8006594:	4293      	cmp	r3, r2
 8006596:	d03b      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 8006598:	687b      	ldr	r3, [r7, #4]
 800659a:	681b      	ldr	r3, [r3, #0]
 800659c:	4a29      	ldr	r2, [pc, #164]	@ (8006644 <HAL_DMA_Abort_IT+0x1b0>)
 800659e:	4293      	cmp	r3, r2
 80065a0:	d036      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 80065a2:	687b      	ldr	r3, [r7, #4]
 80065a4:	681b      	ldr	r3, [r3, #0]
 80065a6:	4a28      	ldr	r2, [pc, #160]	@ (8006648 <HAL_DMA_Abort_IT+0x1b4>)
 80065a8:	4293      	cmp	r3, r2
 80065aa:	d031      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 80065ac:	687b      	ldr	r3, [r7, #4]
 80065ae:	681b      	ldr	r3, [r3, #0]
 80065b0:	4a26      	ldr	r2, [pc, #152]	@ (800664c <HAL_DMA_Abort_IT+0x1b8>)
 80065b2:	4293      	cmp	r3, r2
 80065b4:	d02c      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 80065b6:	687b      	ldr	r3, [r7, #4]
 80065b8:	681b      	ldr	r3, [r3, #0]
 80065ba:	4a25      	ldr	r2, [pc, #148]	@ (8006650 <HAL_DMA_Abort_IT+0x1bc>)
 80065bc:	4293      	cmp	r3, r2
 80065be:	d027      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 80065c0:	687b      	ldr	r3, [r7, #4]
 80065c2:	681b      	ldr	r3, [r3, #0]
 80065c4:	4a23      	ldr	r2, [pc, #140]	@ (8006654 <HAL_DMA_Abort_IT+0x1c0>)
 80065c6:	4293      	cmp	r3, r2
 80065c8:	d022      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 80065ca:	687b      	ldr	r3, [r7, #4]
 80065cc:	681b      	ldr	r3, [r3, #0]
 80065ce:	4a22      	ldr	r2, [pc, #136]	@ (8006658 <HAL_DMA_Abort_IT+0x1c4>)
 80065d0:	4293      	cmp	r3, r2
 80065d2:	d01d      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 80065d4:	687b      	ldr	r3, [r7, #4]
 80065d6:	681b      	ldr	r3, [r3, #0]
 80065d8:	4a20      	ldr	r2, [pc, #128]	@ (800665c <HAL_DMA_Abort_IT+0x1c8>)
 80065da:	4293      	cmp	r3, r2
 80065dc:	d018      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 80065de:	687b      	ldr	r3, [r7, #4]
 80065e0:	681b      	ldr	r3, [r3, #0]
 80065e2:	4a1f      	ldr	r2, [pc, #124]	@ (8006660 <HAL_DMA_Abort_IT+0x1cc>)
 80065e4:	4293      	cmp	r3, r2
 80065e6:	d013      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 80065e8:	687b      	ldr	r3, [r7, #4]
 80065ea:	681b      	ldr	r3, [r3, #0]
 80065ec:	4a1d      	ldr	r2, [pc, #116]	@ (8006664 <HAL_DMA_Abort_IT+0x1d0>)
 80065ee:	4293      	cmp	r3, r2
 80065f0:	d00e      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 80065f2:	687b      	ldr	r3, [r7, #4]
 80065f4:	681b      	ldr	r3, [r3, #0]
 80065f6:	4a1c      	ldr	r2, [pc, #112]	@ (8006668 <HAL_DMA_Abort_IT+0x1d4>)
 80065f8:	4293      	cmp	r3, r2
 80065fa:	d009      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 80065fc:	687b      	ldr	r3, [r7, #4]
 80065fe:	681b      	ldr	r3, [r3, #0]
 8006600:	4a1a      	ldr	r2, [pc, #104]	@ (800666c <HAL_DMA_Abort_IT+0x1d8>)
 8006602:	4293      	cmp	r3, r2
 8006604:	d004      	beq.n	8006610 <HAL_DMA_Abort_IT+0x17c>
 8006606:	687b      	ldr	r3, [r7, #4]
 8006608:	681b      	ldr	r3, [r3, #0]
 800660a:	4a19      	ldr	r2, [pc, #100]	@ (8006670 <HAL_DMA_Abort_IT+0x1dc>)
 800660c:	4293      	cmp	r3, r2
 800660e:	d108      	bne.n	8006622 <HAL_DMA_Abort_IT+0x18e>
 8006610:	687b      	ldr	r3, [r7, #4]
 8006612:	681b      	ldr	r3, [r3, #0]
 8006614:	681a      	ldr	r2, [r3, #0]
 8006616:	687b      	ldr	r3, [r7, #4]
 8006618:	681b      	ldr	r3, [r3, #0]
 800661a:	f022 0201 	bic.w	r2, r2, #1
 800661e:	601a      	str	r2, [r3, #0]
 8006620:	e178      	b.n	8006914 <HAL_DMA_Abort_IT+0x480>
 8006622:	687b      	ldr	r3, [r7, #4]
 8006624:	681b      	ldr	r3, [r3, #0]
 8006626:	681a      	ldr	r2, [r3, #0]
 8006628:	687b      	ldr	r3, [r7, #4]
 800662a:	681b      	ldr	r3, [r3, #0]
 800662c:	f022 0201 	bic.w	r2, r2, #1
 8006630:	601a      	str	r2, [r3, #0]
 8006632:	e16f      	b.n	8006914 <HAL_DMA_Abort_IT+0x480>
 8006634:	40020010 	.word	0x40020010
 8006638:	40020028 	.word	0x40020028
 800663c:	40020040 	.word	0x40020040
 8006640:	40020058 	.word	0x40020058
 8006644:	40020070 	.word	0x40020070
 8006648:	40020088 	.word	0x40020088
 800664c:	400200a0 	.word	0x400200a0
 8006650:	400200b8 	.word	0x400200b8
 8006654:	40020410 	.word	0x40020410
 8006658:	40020428 	.word	0x40020428
 800665c:	40020440 	.word	0x40020440
 8006660:	40020458 	.word	0x40020458
 8006664:	40020470 	.word	0x40020470
 8006668:	40020488 	.word	0x40020488
 800666c:	400204a0 	.word	0x400204a0
 8006670:	400204b8 	.word	0x400204b8
    }
    else /* BDMA channel */
    {
      /* Disable DMA All Interrupts  */
      ((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR  &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE);
 8006674:	687b      	ldr	r3, [r7, #4]
 8006676:	681b      	ldr	r3, [r3, #0]
 8006678:	681a      	ldr	r2, [r3, #0]
 800667a:	687b      	ldr	r3, [r7, #4]
 800667c:	681b      	ldr	r3, [r3, #0]
 800667e:	f022 020e 	bic.w	r2, r2, #14
 8006682:	601a      	str	r2, [r3, #0]

      /* Disable the channel */
      __HAL_DMA_DISABLE(hdma);
 8006684:	687b      	ldr	r3, [r7, #4]
 8006686:	681b      	ldr	r3, [r3, #0]
 8006688:	4a6c      	ldr	r2, [pc, #432]	@ (800683c <HAL_DMA_Abort_IT+0x3a8>)
 800668a:	4293      	cmp	r3, r2
 800668c:	d04a      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 800668e:	687b      	ldr	r3, [r7, #4]
 8006690:	681b      	ldr	r3, [r3, #0]
 8006692:	4a6b      	ldr	r2, [pc, #428]	@ (8006840 <HAL_DMA_Abort_IT+0x3ac>)
 8006694:	4293      	cmp	r3, r2
 8006696:	d045      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 8006698:	687b      	ldr	r3, [r7, #4]
 800669a:	681b      	ldr	r3, [r3, #0]
 800669c:	4a69      	ldr	r2, [pc, #420]	@ (8006844 <HAL_DMA_Abort_IT+0x3b0>)
 800669e:	4293      	cmp	r3, r2
 80066a0:	d040      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 80066a2:	687b      	ldr	r3, [r7, #4]
 80066a4:	681b      	ldr	r3, [r3, #0]
 80066a6:	4a68      	ldr	r2, [pc, #416]	@ (8006848 <HAL_DMA_Abort_IT+0x3b4>)
 80066a8:	4293      	cmp	r3, r2
 80066aa:	d03b      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 80066ac:	687b      	ldr	r3, [r7, #4]
 80066ae:	681b      	ldr	r3, [r3, #0]
 80066b0:	4a66      	ldr	r2, [pc, #408]	@ (800684c <HAL_DMA_Abort_IT+0x3b8>)
 80066b2:	4293      	cmp	r3, r2
 80066b4:	d036      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 80066b6:	687b      	ldr	r3, [r7, #4]
 80066b8:	681b      	ldr	r3, [r3, #0]
 80066ba:	4a65      	ldr	r2, [pc, #404]	@ (8006850 <HAL_DMA_Abort_IT+0x3bc>)
 80066bc:	4293      	cmp	r3, r2
 80066be:	d031      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 80066c0:	687b      	ldr	r3, [r7, #4]
 80066c2:	681b      	ldr	r3, [r3, #0]
 80066c4:	4a63      	ldr	r2, [pc, #396]	@ (8006854 <HAL_DMA_Abort_IT+0x3c0>)
 80066c6:	4293      	cmp	r3, r2
 80066c8:	d02c      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 80066ca:	687b      	ldr	r3, [r7, #4]
 80066cc:	681b      	ldr	r3, [r3, #0]
 80066ce:	4a62      	ldr	r2, [pc, #392]	@ (8006858 <HAL_DMA_Abort_IT+0x3c4>)
 80066d0:	4293      	cmp	r3, r2
 80066d2:	d027      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 80066d4:	687b      	ldr	r3, [r7, #4]
 80066d6:	681b      	ldr	r3, [r3, #0]
 80066d8:	4a60      	ldr	r2, [pc, #384]	@ (800685c <HAL_DMA_Abort_IT+0x3c8>)
 80066da:	4293      	cmp	r3, r2
 80066dc:	d022      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 80066de:	687b      	ldr	r3, [r7, #4]
 80066e0:	681b      	ldr	r3, [r3, #0]
 80066e2:	4a5f      	ldr	r2, [pc, #380]	@ (8006860 <HAL_DMA_Abort_IT+0x3cc>)
 80066e4:	4293      	cmp	r3, r2
 80066e6:	d01d      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 80066e8:	687b      	ldr	r3, [r7, #4]
 80066ea:	681b      	ldr	r3, [r3, #0]
 80066ec:	4a5d      	ldr	r2, [pc, #372]	@ (8006864 <HAL_DMA_Abort_IT+0x3d0>)
 80066ee:	4293      	cmp	r3, r2
 80066f0:	d018      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 80066f2:	687b      	ldr	r3, [r7, #4]
 80066f4:	681b      	ldr	r3, [r3, #0]
 80066f6:	4a5c      	ldr	r2, [pc, #368]	@ (8006868 <HAL_DMA_Abort_IT+0x3d4>)
 80066f8:	4293      	cmp	r3, r2
 80066fa:	d013      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 80066fc:	687b      	ldr	r3, [r7, #4]
 80066fe:	681b      	ldr	r3, [r3, #0]
 8006700:	4a5a      	ldr	r2, [pc, #360]	@ (800686c <HAL_DMA_Abort_IT+0x3d8>)
 8006702:	4293      	cmp	r3, r2
 8006704:	d00e      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 8006706:	687b      	ldr	r3, [r7, #4]
 8006708:	681b      	ldr	r3, [r3, #0]
 800670a:	4a59      	ldr	r2, [pc, #356]	@ (8006870 <HAL_DMA_Abort_IT+0x3dc>)
 800670c:	4293      	cmp	r3, r2
 800670e:	d009      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 8006710:	687b      	ldr	r3, [r7, #4]
 8006712:	681b      	ldr	r3, [r3, #0]
 8006714:	4a57      	ldr	r2, [pc, #348]	@ (8006874 <HAL_DMA_Abort_IT+0x3e0>)
 8006716:	4293      	cmp	r3, r2
 8006718:	d004      	beq.n	8006724 <HAL_DMA_Abort_IT+0x290>
 800671a:	687b      	ldr	r3, [r7, #4]
 800671c:	681b      	ldr	r3, [r3, #0]
 800671e:	4a56      	ldr	r2, [pc, #344]	@ (8006878 <HAL_DMA_Abort_IT+0x3e4>)
 8006720:	4293      	cmp	r3, r2
 8006722:	d108      	bne.n	8006736 <HAL_DMA_Abort_IT+0x2a2>
 8006724:	687b      	ldr	r3, [r7, #4]
 8006726:	681b      	ldr	r3, [r3, #0]
 8006728:	681a      	ldr	r2, [r3, #0]
 800672a:	687b      	ldr	r3, [r7, #4]
 800672c:	681b      	ldr	r3, [r3, #0]
 800672e:	f022 0201 	bic.w	r2, r2, #1
 8006732:	601a      	str	r2, [r3, #0]
 8006734:	e007      	b.n	8006746 <HAL_DMA_Abort_IT+0x2b2>
 8006736:	687b      	ldr	r3, [r7, #4]
 8006738:	681b      	ldr	r3, [r3, #0]
 800673a:	681a      	ldr	r2, [r3, #0]
 800673c:	687b      	ldr	r3, [r7, #4]
 800673e:	681b      	ldr	r3, [r3, #0]
 8006740:	f022 0201 	bic.w	r2, r2, #1
 8006744:	601a      	str	r2, [r3, #0]

      if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 8006746:	687b      	ldr	r3, [r7, #4]
 8006748:	681b      	ldr	r3, [r3, #0]
 800674a:	4a3c      	ldr	r2, [pc, #240]	@ (800683c <HAL_DMA_Abort_IT+0x3a8>)
 800674c:	4293      	cmp	r3, r2
 800674e:	d072      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 8006750:	687b      	ldr	r3, [r7, #4]
 8006752:	681b      	ldr	r3, [r3, #0]
 8006754:	4a3a      	ldr	r2, [pc, #232]	@ (8006840 <HAL_DMA_Abort_IT+0x3ac>)
 8006756:	4293      	cmp	r3, r2
 8006758:	d06d      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 800675a:	687b      	ldr	r3, [r7, #4]
 800675c:	681b      	ldr	r3, [r3, #0]
 800675e:	4a39      	ldr	r2, [pc, #228]	@ (8006844 <HAL_DMA_Abort_IT+0x3b0>)
 8006760:	4293      	cmp	r3, r2
 8006762:	d068      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 8006764:	687b      	ldr	r3, [r7, #4]
 8006766:	681b      	ldr	r3, [r3, #0]
 8006768:	4a37      	ldr	r2, [pc, #220]	@ (8006848 <HAL_DMA_Abort_IT+0x3b4>)
 800676a:	4293      	cmp	r3, r2
 800676c:	d063      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 800676e:	687b      	ldr	r3, [r7, #4]
 8006770:	681b      	ldr	r3, [r3, #0]
 8006772:	4a36      	ldr	r2, [pc, #216]	@ (800684c <HAL_DMA_Abort_IT+0x3b8>)
 8006774:	4293      	cmp	r3, r2
 8006776:	d05e      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 8006778:	687b      	ldr	r3, [r7, #4]
 800677a:	681b      	ldr	r3, [r3, #0]
 800677c:	4a34      	ldr	r2, [pc, #208]	@ (8006850 <HAL_DMA_Abort_IT+0x3bc>)
 800677e:	4293      	cmp	r3, r2
 8006780:	d059      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 8006782:	687b      	ldr	r3, [r7, #4]
 8006784:	681b      	ldr	r3, [r3, #0]
 8006786:	4a33      	ldr	r2, [pc, #204]	@ (8006854 <HAL_DMA_Abort_IT+0x3c0>)
 8006788:	4293      	cmp	r3, r2
 800678a:	d054      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 800678c:	687b      	ldr	r3, [r7, #4]
 800678e:	681b      	ldr	r3, [r3, #0]
 8006790:	4a31      	ldr	r2, [pc, #196]	@ (8006858 <HAL_DMA_Abort_IT+0x3c4>)
 8006792:	4293      	cmp	r3, r2
 8006794:	d04f      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 8006796:	687b      	ldr	r3, [r7, #4]
 8006798:	681b      	ldr	r3, [r3, #0]
 800679a:	4a30      	ldr	r2, [pc, #192]	@ (800685c <HAL_DMA_Abort_IT+0x3c8>)
 800679c:	4293      	cmp	r3, r2
 800679e:	d04a      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 80067a0:	687b      	ldr	r3, [r7, #4]
 80067a2:	681b      	ldr	r3, [r3, #0]
 80067a4:	4a2e      	ldr	r2, [pc, #184]	@ (8006860 <HAL_DMA_Abort_IT+0x3cc>)
 80067a6:	4293      	cmp	r3, r2
 80067a8:	d045      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 80067aa:	687b      	ldr	r3, [r7, #4]
 80067ac:	681b      	ldr	r3, [r3, #0]
 80067ae:	4a2d      	ldr	r2, [pc, #180]	@ (8006864 <HAL_DMA_Abort_IT+0x3d0>)
 80067b0:	4293      	cmp	r3, r2
 80067b2:	d040      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 80067b4:	687b      	ldr	r3, [r7, #4]
 80067b6:	681b      	ldr	r3, [r3, #0]
 80067b8:	4a2b      	ldr	r2, [pc, #172]	@ (8006868 <HAL_DMA_Abort_IT+0x3d4>)
 80067ba:	4293      	cmp	r3, r2
 80067bc:	d03b      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 80067be:	687b      	ldr	r3, [r7, #4]
 80067c0:	681b      	ldr	r3, [r3, #0]
 80067c2:	4a2a      	ldr	r2, [pc, #168]	@ (800686c <HAL_DMA_Abort_IT+0x3d8>)
 80067c4:	4293      	cmp	r3, r2
 80067c6:	d036      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 80067c8:	687b      	ldr	r3, [r7, #4]
 80067ca:	681b      	ldr	r3, [r3, #0]
 80067cc:	4a28      	ldr	r2, [pc, #160]	@ (8006870 <HAL_DMA_Abort_IT+0x3dc>)
 80067ce:	4293      	cmp	r3, r2
 80067d0:	d031      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 80067d2:	687b      	ldr	r3, [r7, #4]
 80067d4:	681b      	ldr	r3, [r3, #0]
 80067d6:	4a27      	ldr	r2, [pc, #156]	@ (8006874 <HAL_DMA_Abort_IT+0x3e0>)
 80067d8:	4293      	cmp	r3, r2
 80067da:	d02c      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 80067dc:	687b      	ldr	r3, [r7, #4]
 80067de:	681b      	ldr	r3, [r3, #0]
 80067e0:	4a25      	ldr	r2, [pc, #148]	@ (8006878 <HAL_DMA_Abort_IT+0x3e4>)
 80067e2:	4293      	cmp	r3, r2
 80067e4:	d027      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 80067e6:	687b      	ldr	r3, [r7, #4]
 80067e8:	681b      	ldr	r3, [r3, #0]
 80067ea:	4a24      	ldr	r2, [pc, #144]	@ (800687c <HAL_DMA_Abort_IT+0x3e8>)
 80067ec:	4293      	cmp	r3, r2
 80067ee:	d022      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 80067f0:	687b      	ldr	r3, [r7, #4]
 80067f2:	681b      	ldr	r3, [r3, #0]
 80067f4:	4a22      	ldr	r2, [pc, #136]	@ (8006880 <HAL_DMA_Abort_IT+0x3ec>)
 80067f6:	4293      	cmp	r3, r2
 80067f8:	d01d      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 80067fa:	687b      	ldr	r3, [r7, #4]
 80067fc:	681b      	ldr	r3, [r3, #0]
 80067fe:	4a21      	ldr	r2, [pc, #132]	@ (8006884 <HAL_DMA_Abort_IT+0x3f0>)
 8006800:	4293      	cmp	r3, r2
 8006802:	d018      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 8006804:	687b      	ldr	r3, [r7, #4]
 8006806:	681b      	ldr	r3, [r3, #0]
 8006808:	4a1f      	ldr	r2, [pc, #124]	@ (8006888 <HAL_DMA_Abort_IT+0x3f4>)
 800680a:	4293      	cmp	r3, r2
 800680c:	d013      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 800680e:	687b      	ldr	r3, [r7, #4]
 8006810:	681b      	ldr	r3, [r3, #0]
 8006812:	4a1e      	ldr	r2, [pc, #120]	@ (800688c <HAL_DMA_Abort_IT+0x3f8>)
 8006814:	4293      	cmp	r3, r2
 8006816:	d00e      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 8006818:	687b      	ldr	r3, [r7, #4]
 800681a:	681b      	ldr	r3, [r3, #0]
 800681c:	4a1c      	ldr	r2, [pc, #112]	@ (8006890 <HAL_DMA_Abort_IT+0x3fc>)
 800681e:	4293      	cmp	r3, r2
 8006820:	d009      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 8006822:	687b      	ldr	r3, [r7, #4]
 8006824:	681b      	ldr	r3, [r3, #0]
 8006826:	4a1b      	ldr	r2, [pc, #108]	@ (8006894 <HAL_DMA_Abort_IT+0x400>)
 8006828:	4293      	cmp	r3, r2
 800682a:	d004      	beq.n	8006836 <HAL_DMA_Abort_IT+0x3a2>
 800682c:	687b      	ldr	r3, [r7, #4]
 800682e:	681b      	ldr	r3, [r3, #0]
 8006830:	4a19      	ldr	r2, [pc, #100]	@ (8006898 <HAL_DMA_Abort_IT+0x404>)
 8006832:	4293      	cmp	r3, r2
 8006834:	d132      	bne.n	800689c <HAL_DMA_Abort_IT+0x408>
 8006836:	2301      	movs	r3, #1
 8006838:	e031      	b.n	800689e <HAL_DMA_Abort_IT+0x40a>
 800683a:	bf00      	nop
 800683c:	40020010 	.word	0x40020010
 8006840:	40020028 	.word	0x40020028
 8006844:	40020040 	.word	0x40020040
 8006848:	40020058 	.word	0x40020058
 800684c:	40020070 	.word	0x40020070
 8006850:	40020088 	.word	0x40020088
 8006854:	400200a0 	.word	0x400200a0
 8006858:	400200b8 	.word	0x400200b8
 800685c:	40020410 	.word	0x40020410
 8006860:	40020428 	.word	0x40020428
 8006864:	40020440 	.word	0x40020440
 8006868:	40020458 	.word	0x40020458
 800686c:	40020470 	.word	0x40020470
 8006870:	40020488 	.word	0x40020488
 8006874:	400204a0 	.word	0x400204a0
 8006878:	400204b8 	.word	0x400204b8
 800687c:	58025408 	.word	0x58025408
 8006880:	5802541c 	.word	0x5802541c
 8006884:	58025430 	.word	0x58025430
 8006888:	58025444 	.word	0x58025444
 800688c:	58025458 	.word	0x58025458
 8006890:	5802546c 	.word	0x5802546c
 8006894:	58025480 	.word	0x58025480
 8006898:	58025494 	.word	0x58025494
 800689c:	2300      	movs	r3, #0
 800689e:	2b00      	cmp	r3, #0
 80068a0:	d028      	beq.n	80068f4 <HAL_DMA_Abort_IT+0x460>
      {
        /* disable the DMAMUX sync overrun IT */
        hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
 80068a2:	687b      	ldr	r3, [r7, #4]
 80068a4:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 80068a6:	681a      	ldr	r2, [r3, #0]
 80068a8:	687b      	ldr	r3, [r7, #4]
 80068aa:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 80068ac:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 80068b0:	601a      	str	r2, [r3, #0]

        /* Clear all flags */
        regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 80068b2:	687b      	ldr	r3, [r7, #4]
 80068b4:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 80068b6:	60fb      	str	r3, [r7, #12]
        regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 80068b8:	687b      	ldr	r3, [r7, #4]
 80068ba:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80068bc:	f003 031f 	and.w	r3, r3, #31
 80068c0:	2201      	movs	r2, #1
 80068c2:	409a      	lsls	r2, r3
 80068c4:	68fb      	ldr	r3, [r7, #12]
 80068c6:	605a      	str	r2, [r3, #4]

        /* Clear the DMAMUX synchro overrun flag */
        hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 80068c8:	687b      	ldr	r3, [r7, #4]
 80068ca:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 80068cc:	687a      	ldr	r2, [r7, #4]
 80068ce:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 80068d0:	605a      	str	r2, [r3, #4]

        if(hdma->DMAmuxRequestGen != 0U)
 80068d2:	687b      	ldr	r3, [r7, #4]
 80068d4:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80068d6:	2b00      	cmp	r3, #0
 80068d8:	d00c      	beq.n	80068f4 <HAL_DMA_Abort_IT+0x460>
        {
          /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
          /* disable the request gen overrun IT */
          hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
 80068da:	687b      	ldr	r3, [r7, #4]
 80068dc:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80068de:	681a      	ldr	r2, [r3, #0]
 80068e0:	687b      	ldr	r3, [r7, #4]
 80068e2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80068e4:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 80068e8:	601a      	str	r2, [r3, #0]

          /* Clear the DMAMUX request generator overrun flag */
          hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 80068ea:	687b      	ldr	r3, [r7, #4]
 80068ec:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80068ee:	687a      	ldr	r2, [r7, #4]
 80068f0:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 80068f2:	605a      	str	r2, [r3, #4]
        }
      }

      /* Change the DMA state */
      hdma->State = HAL_DMA_STATE_READY;
 80068f4:	687b      	ldr	r3, [r7, #4]
 80068f6:	2201      	movs	r2, #1
 80068f8:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Process Unlocked */
      __HAL_UNLOCK(hdma);
 80068fc:	687b      	ldr	r3, [r7, #4]
 80068fe:	2200      	movs	r2, #0
 8006900:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

      /* Call User Abort callback */
      if(hdma->XferAbortCallback != NULL)
 8006904:	687b      	ldr	r3, [r7, #4]
 8006906:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8006908:	2b00      	cmp	r3, #0
 800690a:	d003      	beq.n	8006914 <HAL_DMA_Abort_IT+0x480>
      {
        hdma->XferAbortCallback(hdma);
 800690c:	687b      	ldr	r3, [r7, #4]
 800690e:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8006910:	6878      	ldr	r0, [r7, #4]
 8006912:	4798      	blx	r3
      }
    }
  }

  return HAL_OK;
 8006914:	2300      	movs	r3, #0
}
 8006916:	4618      	mov	r0, r3
 8006918:	3710      	adds	r7, #16
 800691a:	46bd      	mov	sp, r7
 800691c:	bd80      	pop	{r7, pc}
 800691e:	bf00      	nop

08006920 <HAL_DMA_IRQHandler>:
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Stream.
  * @retval None
  */
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
 8006920:	b580      	push	{r7, lr}
 8006922:	b08a      	sub	sp, #40	@ 0x28
 8006924:	af00      	add	r7, sp, #0
 8006926:	6078      	str	r0, [r7, #4]
  uint32_t tmpisr_dma, tmpisr_bdma;
  uint32_t ccr_reg;
  __IO uint32_t count = 0U;
 8006928:	2300      	movs	r3, #0
 800692a:	60fb      	str	r3, [r7, #12]
  uint32_t timeout = SystemCoreClock / 9600U;
 800692c:	4b67      	ldr	r3, [pc, #412]	@ (8006acc <HAL_DMA_IRQHandler+0x1ac>)
 800692e:	681b      	ldr	r3, [r3, #0]
 8006930:	4a67      	ldr	r2, [pc, #412]	@ (8006ad0 <HAL_DMA_IRQHandler+0x1b0>)
 8006932:	fba2 2303 	umull	r2, r3, r2, r3
 8006936:	0a9b      	lsrs	r3, r3, #10
 8006938:	627b      	str	r3, [r7, #36]	@ 0x24

  /* calculate DMA base and stream number */
  DMA_Base_Registers  *regs_dma  = (DMA_Base_Registers *)hdma->StreamBaseAddress;
 800693a:	687b      	ldr	r3, [r7, #4]
 800693c:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800693e:	623b      	str	r3, [r7, #32]
  BDMA_Base_Registers *regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 8006940:	687b      	ldr	r3, [r7, #4]
 8006942:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8006944:	61fb      	str	r3, [r7, #28]

  tmpisr_dma  = regs_dma->ISR;
 8006946:	6a3b      	ldr	r3, [r7, #32]
 8006948:	681b      	ldr	r3, [r3, #0]
 800694a:	61bb      	str	r3, [r7, #24]
  tmpisr_bdma = regs_bdma->ISR;
 800694c:	69fb      	ldr	r3, [r7, #28]
 800694e:	681b      	ldr	r3, [r3, #0]
 8006950:	617b      	str	r3, [r7, #20]

  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U)  /* DMA1 or DMA2 instance */
 8006952:	687b      	ldr	r3, [r7, #4]
 8006954:	681b      	ldr	r3, [r3, #0]
 8006956:	4a5f      	ldr	r2, [pc, #380]	@ (8006ad4 <HAL_DMA_IRQHandler+0x1b4>)
 8006958:	4293      	cmp	r3, r2
 800695a:	d04a      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 800695c:	687b      	ldr	r3, [r7, #4]
 800695e:	681b      	ldr	r3, [r3, #0]
 8006960:	4a5d      	ldr	r2, [pc, #372]	@ (8006ad8 <HAL_DMA_IRQHandler+0x1b8>)
 8006962:	4293      	cmp	r3, r2
 8006964:	d045      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 8006966:	687b      	ldr	r3, [r7, #4]
 8006968:	681b      	ldr	r3, [r3, #0]
 800696a:	4a5c      	ldr	r2, [pc, #368]	@ (8006adc <HAL_DMA_IRQHandler+0x1bc>)
 800696c:	4293      	cmp	r3, r2
 800696e:	d040      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 8006970:	687b      	ldr	r3, [r7, #4]
 8006972:	681b      	ldr	r3, [r3, #0]
 8006974:	4a5a      	ldr	r2, [pc, #360]	@ (8006ae0 <HAL_DMA_IRQHandler+0x1c0>)
 8006976:	4293      	cmp	r3, r2
 8006978:	d03b      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 800697a:	687b      	ldr	r3, [r7, #4]
 800697c:	681b      	ldr	r3, [r3, #0]
 800697e:	4a59      	ldr	r2, [pc, #356]	@ (8006ae4 <HAL_DMA_IRQHandler+0x1c4>)
 8006980:	4293      	cmp	r3, r2
 8006982:	d036      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 8006984:	687b      	ldr	r3, [r7, #4]
 8006986:	681b      	ldr	r3, [r3, #0]
 8006988:	4a57      	ldr	r2, [pc, #348]	@ (8006ae8 <HAL_DMA_IRQHandler+0x1c8>)
 800698a:	4293      	cmp	r3, r2
 800698c:	d031      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 800698e:	687b      	ldr	r3, [r7, #4]
 8006990:	681b      	ldr	r3, [r3, #0]
 8006992:	4a56      	ldr	r2, [pc, #344]	@ (8006aec <HAL_DMA_IRQHandler+0x1cc>)
 8006994:	4293      	cmp	r3, r2
 8006996:	d02c      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 8006998:	687b      	ldr	r3, [r7, #4]
 800699a:	681b      	ldr	r3, [r3, #0]
 800699c:	4a54      	ldr	r2, [pc, #336]	@ (8006af0 <HAL_DMA_IRQHandler+0x1d0>)
 800699e:	4293      	cmp	r3, r2
 80069a0:	d027      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 80069a2:	687b      	ldr	r3, [r7, #4]
 80069a4:	681b      	ldr	r3, [r3, #0]
 80069a6:	4a53      	ldr	r2, [pc, #332]	@ (8006af4 <HAL_DMA_IRQHandler+0x1d4>)
 80069a8:	4293      	cmp	r3, r2
 80069aa:	d022      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 80069ac:	687b      	ldr	r3, [r7, #4]
 80069ae:	681b      	ldr	r3, [r3, #0]
 80069b0:	4a51      	ldr	r2, [pc, #324]	@ (8006af8 <HAL_DMA_IRQHandler+0x1d8>)
 80069b2:	4293      	cmp	r3, r2
 80069b4:	d01d      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 80069b6:	687b      	ldr	r3, [r7, #4]
 80069b8:	681b      	ldr	r3, [r3, #0]
 80069ba:	4a50      	ldr	r2, [pc, #320]	@ (8006afc <HAL_DMA_IRQHandler+0x1dc>)
 80069bc:	4293      	cmp	r3, r2
 80069be:	d018      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 80069c0:	687b      	ldr	r3, [r7, #4]
 80069c2:	681b      	ldr	r3, [r3, #0]
 80069c4:	4a4e      	ldr	r2, [pc, #312]	@ (8006b00 <HAL_DMA_IRQHandler+0x1e0>)
 80069c6:	4293      	cmp	r3, r2
 80069c8:	d013      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 80069ca:	687b      	ldr	r3, [r7, #4]
 80069cc:	681b      	ldr	r3, [r3, #0]
 80069ce:	4a4d      	ldr	r2, [pc, #308]	@ (8006b04 <HAL_DMA_IRQHandler+0x1e4>)
 80069d0:	4293      	cmp	r3, r2
 80069d2:	d00e      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 80069d4:	687b      	ldr	r3, [r7, #4]
 80069d6:	681b      	ldr	r3, [r3, #0]
 80069d8:	4a4b      	ldr	r2, [pc, #300]	@ (8006b08 <HAL_DMA_IRQHandler+0x1e8>)
 80069da:	4293      	cmp	r3, r2
 80069dc:	d009      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 80069de:	687b      	ldr	r3, [r7, #4]
 80069e0:	681b      	ldr	r3, [r3, #0]
 80069e2:	4a4a      	ldr	r2, [pc, #296]	@ (8006b0c <HAL_DMA_IRQHandler+0x1ec>)
 80069e4:	4293      	cmp	r3, r2
 80069e6:	d004      	beq.n	80069f2 <HAL_DMA_IRQHandler+0xd2>
 80069e8:	687b      	ldr	r3, [r7, #4]
 80069ea:	681b      	ldr	r3, [r3, #0]
 80069ec:	4a48      	ldr	r2, [pc, #288]	@ (8006b10 <HAL_DMA_IRQHandler+0x1f0>)
 80069ee:	4293      	cmp	r3, r2
 80069f0:	d101      	bne.n	80069f6 <HAL_DMA_IRQHandler+0xd6>
 80069f2:	2301      	movs	r3, #1
 80069f4:	e000      	b.n	80069f8 <HAL_DMA_IRQHandler+0xd8>
 80069f6:	2300      	movs	r3, #0
 80069f8:	2b00      	cmp	r3, #0
 80069fa:	f000 842b 	beq.w	8007254 <HAL_DMA_IRQHandler+0x934>
  {
    /* Transfer Error Interrupt management ***************************************/
    if ((tmpisr_dma & (DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 80069fe:	687b      	ldr	r3, [r7, #4]
 8006a00:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006a02:	f003 031f 	and.w	r3, r3, #31
 8006a06:	2208      	movs	r2, #8
 8006a08:	409a      	lsls	r2, r3
 8006a0a:	69bb      	ldr	r3, [r7, #24]
 8006a0c:	4013      	ands	r3, r2
 8006a0e:	2b00      	cmp	r3, #0
 8006a10:	f000 80a2 	beq.w	8006b58 <HAL_DMA_IRQHandler+0x238>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != 0U)
 8006a14:	687b      	ldr	r3, [r7, #4]
 8006a16:	681b      	ldr	r3, [r3, #0]
 8006a18:	4a2e      	ldr	r2, [pc, #184]	@ (8006ad4 <HAL_DMA_IRQHandler+0x1b4>)
 8006a1a:	4293      	cmp	r3, r2
 8006a1c:	d04a      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006a1e:	687b      	ldr	r3, [r7, #4]
 8006a20:	681b      	ldr	r3, [r3, #0]
 8006a22:	4a2d      	ldr	r2, [pc, #180]	@ (8006ad8 <HAL_DMA_IRQHandler+0x1b8>)
 8006a24:	4293      	cmp	r3, r2
 8006a26:	d045      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006a28:	687b      	ldr	r3, [r7, #4]
 8006a2a:	681b      	ldr	r3, [r3, #0]
 8006a2c:	4a2b      	ldr	r2, [pc, #172]	@ (8006adc <HAL_DMA_IRQHandler+0x1bc>)
 8006a2e:	4293      	cmp	r3, r2
 8006a30:	d040      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006a32:	687b      	ldr	r3, [r7, #4]
 8006a34:	681b      	ldr	r3, [r3, #0]
 8006a36:	4a2a      	ldr	r2, [pc, #168]	@ (8006ae0 <HAL_DMA_IRQHandler+0x1c0>)
 8006a38:	4293      	cmp	r3, r2
 8006a3a:	d03b      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006a3c:	687b      	ldr	r3, [r7, #4]
 8006a3e:	681b      	ldr	r3, [r3, #0]
 8006a40:	4a28      	ldr	r2, [pc, #160]	@ (8006ae4 <HAL_DMA_IRQHandler+0x1c4>)
 8006a42:	4293      	cmp	r3, r2
 8006a44:	d036      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006a46:	687b      	ldr	r3, [r7, #4]
 8006a48:	681b      	ldr	r3, [r3, #0]
 8006a4a:	4a27      	ldr	r2, [pc, #156]	@ (8006ae8 <HAL_DMA_IRQHandler+0x1c8>)
 8006a4c:	4293      	cmp	r3, r2
 8006a4e:	d031      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006a50:	687b      	ldr	r3, [r7, #4]
 8006a52:	681b      	ldr	r3, [r3, #0]
 8006a54:	4a25      	ldr	r2, [pc, #148]	@ (8006aec <HAL_DMA_IRQHandler+0x1cc>)
 8006a56:	4293      	cmp	r3, r2
 8006a58:	d02c      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006a5a:	687b      	ldr	r3, [r7, #4]
 8006a5c:	681b      	ldr	r3, [r3, #0]
 8006a5e:	4a24      	ldr	r2, [pc, #144]	@ (8006af0 <HAL_DMA_IRQHandler+0x1d0>)
 8006a60:	4293      	cmp	r3, r2
 8006a62:	d027      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006a64:	687b      	ldr	r3, [r7, #4]
 8006a66:	681b      	ldr	r3, [r3, #0]
 8006a68:	4a22      	ldr	r2, [pc, #136]	@ (8006af4 <HAL_DMA_IRQHandler+0x1d4>)
 8006a6a:	4293      	cmp	r3, r2
 8006a6c:	d022      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006a6e:	687b      	ldr	r3, [r7, #4]
 8006a70:	681b      	ldr	r3, [r3, #0]
 8006a72:	4a21      	ldr	r2, [pc, #132]	@ (8006af8 <HAL_DMA_IRQHandler+0x1d8>)
 8006a74:	4293      	cmp	r3, r2
 8006a76:	d01d      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006a78:	687b      	ldr	r3, [r7, #4]
 8006a7a:	681b      	ldr	r3, [r3, #0]
 8006a7c:	4a1f      	ldr	r2, [pc, #124]	@ (8006afc <HAL_DMA_IRQHandler+0x1dc>)
 8006a7e:	4293      	cmp	r3, r2
 8006a80:	d018      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006a82:	687b      	ldr	r3, [r7, #4]
 8006a84:	681b      	ldr	r3, [r3, #0]
 8006a86:	4a1e      	ldr	r2, [pc, #120]	@ (8006b00 <HAL_DMA_IRQHandler+0x1e0>)
 8006a88:	4293      	cmp	r3, r2
 8006a8a:	d013      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006a8c:	687b      	ldr	r3, [r7, #4]
 8006a8e:	681b      	ldr	r3, [r3, #0]
 8006a90:	4a1c      	ldr	r2, [pc, #112]	@ (8006b04 <HAL_DMA_IRQHandler+0x1e4>)
 8006a92:	4293      	cmp	r3, r2
 8006a94:	d00e      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006a96:	687b      	ldr	r3, [r7, #4]
 8006a98:	681b      	ldr	r3, [r3, #0]
 8006a9a:	4a1b      	ldr	r2, [pc, #108]	@ (8006b08 <HAL_DMA_IRQHandler+0x1e8>)
 8006a9c:	4293      	cmp	r3, r2
 8006a9e:	d009      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006aa0:	687b      	ldr	r3, [r7, #4]
 8006aa2:	681b      	ldr	r3, [r3, #0]
 8006aa4:	4a19      	ldr	r2, [pc, #100]	@ (8006b0c <HAL_DMA_IRQHandler+0x1ec>)
 8006aa6:	4293      	cmp	r3, r2
 8006aa8:	d004      	beq.n	8006ab4 <HAL_DMA_IRQHandler+0x194>
 8006aaa:	687b      	ldr	r3, [r7, #4]
 8006aac:	681b      	ldr	r3, [r3, #0]
 8006aae:	4a18      	ldr	r2, [pc, #96]	@ (8006b10 <HAL_DMA_IRQHandler+0x1f0>)
 8006ab0:	4293      	cmp	r3, r2
 8006ab2:	d12f      	bne.n	8006b14 <HAL_DMA_IRQHandler+0x1f4>
 8006ab4:	687b      	ldr	r3, [r7, #4]
 8006ab6:	681b      	ldr	r3, [r3, #0]
 8006ab8:	681b      	ldr	r3, [r3, #0]
 8006aba:	f003 0304 	and.w	r3, r3, #4
 8006abe:	2b00      	cmp	r3, #0
 8006ac0:	bf14      	ite	ne
 8006ac2:	2301      	movne	r3, #1
 8006ac4:	2300      	moveq	r3, #0
 8006ac6:	b2db      	uxtb	r3, r3
 8006ac8:	e02e      	b.n	8006b28 <HAL_DMA_IRQHandler+0x208>
 8006aca:	bf00      	nop
 8006acc:	2400000c 	.word	0x2400000c
 8006ad0:	1b4e81b5 	.word	0x1b4e81b5
 8006ad4:	40020010 	.word	0x40020010
 8006ad8:	40020028 	.word	0x40020028
 8006adc:	40020040 	.word	0x40020040
 8006ae0:	40020058 	.word	0x40020058
 8006ae4:	40020070 	.word	0x40020070
 8006ae8:	40020088 	.word	0x40020088
 8006aec:	400200a0 	.word	0x400200a0
 8006af0:	400200b8 	.word	0x400200b8
 8006af4:	40020410 	.word	0x40020410
 8006af8:	40020428 	.word	0x40020428
 8006afc:	40020440 	.word	0x40020440
 8006b00:	40020458 	.word	0x40020458
 8006b04:	40020470 	.word	0x40020470
 8006b08:	40020488 	.word	0x40020488
 8006b0c:	400204a0 	.word	0x400204a0
 8006b10:	400204b8 	.word	0x400204b8
 8006b14:	687b      	ldr	r3, [r7, #4]
 8006b16:	681b      	ldr	r3, [r3, #0]
 8006b18:	681b      	ldr	r3, [r3, #0]
 8006b1a:	f003 0308 	and.w	r3, r3, #8
 8006b1e:	2b00      	cmp	r3, #0
 8006b20:	bf14      	ite	ne
 8006b22:	2301      	movne	r3, #1
 8006b24:	2300      	moveq	r3, #0
 8006b26:	b2db      	uxtb	r3, r3
 8006b28:	2b00      	cmp	r3, #0
 8006b2a:	d015      	beq.n	8006b58 <HAL_DMA_IRQHandler+0x238>
      {
        /* Disable the transfer error interrupt */
        ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TE);
 8006b2c:	687b      	ldr	r3, [r7, #4]
 8006b2e:	681b      	ldr	r3, [r3, #0]
 8006b30:	681a      	ldr	r2, [r3, #0]
 8006b32:	687b      	ldr	r3, [r7, #4]
 8006b34:	681b      	ldr	r3, [r3, #0]
 8006b36:	f022 0204 	bic.w	r2, r2, #4
 8006b3a:	601a      	str	r2, [r3, #0]

        /* Clear the transfer error flag */
        regs_dma->IFCR = DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU);
 8006b3c:	687b      	ldr	r3, [r7, #4]
 8006b3e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006b40:	f003 031f 	and.w	r3, r3, #31
 8006b44:	2208      	movs	r2, #8
 8006b46:	409a      	lsls	r2, r3
 8006b48:	6a3b      	ldr	r3, [r7, #32]
 8006b4a:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_TE;
 8006b4c:	687b      	ldr	r3, [r7, #4]
 8006b4e:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8006b50:	f043 0201 	orr.w	r2, r3, #1
 8006b54:	687b      	ldr	r3, [r7, #4]
 8006b56:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* FIFO Error Interrupt management ******************************************/
    if ((tmpisr_dma & (DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 8006b58:	687b      	ldr	r3, [r7, #4]
 8006b5a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006b5c:	f003 031f 	and.w	r3, r3, #31
 8006b60:	69ba      	ldr	r2, [r7, #24]
 8006b62:	fa22 f303 	lsr.w	r3, r2, r3
 8006b66:	f003 0301 	and.w	r3, r3, #1
 8006b6a:	2b00      	cmp	r3, #0
 8006b6c:	d06e      	beq.n	8006c4c <HAL_DMA_IRQHandler+0x32c>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != 0U)
 8006b6e:	687b      	ldr	r3, [r7, #4]
 8006b70:	681b      	ldr	r3, [r3, #0]
 8006b72:	4a69      	ldr	r2, [pc, #420]	@ (8006d18 <HAL_DMA_IRQHandler+0x3f8>)
 8006b74:	4293      	cmp	r3, r2
 8006b76:	d04a      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006b78:	687b      	ldr	r3, [r7, #4]
 8006b7a:	681b      	ldr	r3, [r3, #0]
 8006b7c:	4a67      	ldr	r2, [pc, #412]	@ (8006d1c <HAL_DMA_IRQHandler+0x3fc>)
 8006b7e:	4293      	cmp	r3, r2
 8006b80:	d045      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006b82:	687b      	ldr	r3, [r7, #4]
 8006b84:	681b      	ldr	r3, [r3, #0]
 8006b86:	4a66      	ldr	r2, [pc, #408]	@ (8006d20 <HAL_DMA_IRQHandler+0x400>)
 8006b88:	4293      	cmp	r3, r2
 8006b8a:	d040      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006b8c:	687b      	ldr	r3, [r7, #4]
 8006b8e:	681b      	ldr	r3, [r3, #0]
 8006b90:	4a64      	ldr	r2, [pc, #400]	@ (8006d24 <HAL_DMA_IRQHandler+0x404>)
 8006b92:	4293      	cmp	r3, r2
 8006b94:	d03b      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006b96:	687b      	ldr	r3, [r7, #4]
 8006b98:	681b      	ldr	r3, [r3, #0]
 8006b9a:	4a63      	ldr	r2, [pc, #396]	@ (8006d28 <HAL_DMA_IRQHandler+0x408>)
 8006b9c:	4293      	cmp	r3, r2
 8006b9e:	d036      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006ba0:	687b      	ldr	r3, [r7, #4]
 8006ba2:	681b      	ldr	r3, [r3, #0]
 8006ba4:	4a61      	ldr	r2, [pc, #388]	@ (8006d2c <HAL_DMA_IRQHandler+0x40c>)
 8006ba6:	4293      	cmp	r3, r2
 8006ba8:	d031      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006baa:	687b      	ldr	r3, [r7, #4]
 8006bac:	681b      	ldr	r3, [r3, #0]
 8006bae:	4a60      	ldr	r2, [pc, #384]	@ (8006d30 <HAL_DMA_IRQHandler+0x410>)
 8006bb0:	4293      	cmp	r3, r2
 8006bb2:	d02c      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006bb4:	687b      	ldr	r3, [r7, #4]
 8006bb6:	681b      	ldr	r3, [r3, #0]
 8006bb8:	4a5e      	ldr	r2, [pc, #376]	@ (8006d34 <HAL_DMA_IRQHandler+0x414>)
 8006bba:	4293      	cmp	r3, r2
 8006bbc:	d027      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006bbe:	687b      	ldr	r3, [r7, #4]
 8006bc0:	681b      	ldr	r3, [r3, #0]
 8006bc2:	4a5d      	ldr	r2, [pc, #372]	@ (8006d38 <HAL_DMA_IRQHandler+0x418>)
 8006bc4:	4293      	cmp	r3, r2
 8006bc6:	d022      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006bc8:	687b      	ldr	r3, [r7, #4]
 8006bca:	681b      	ldr	r3, [r3, #0]
 8006bcc:	4a5b      	ldr	r2, [pc, #364]	@ (8006d3c <HAL_DMA_IRQHandler+0x41c>)
 8006bce:	4293      	cmp	r3, r2
 8006bd0:	d01d      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006bd2:	687b      	ldr	r3, [r7, #4]
 8006bd4:	681b      	ldr	r3, [r3, #0]
 8006bd6:	4a5a      	ldr	r2, [pc, #360]	@ (8006d40 <HAL_DMA_IRQHandler+0x420>)
 8006bd8:	4293      	cmp	r3, r2
 8006bda:	d018      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006bdc:	687b      	ldr	r3, [r7, #4]
 8006bde:	681b      	ldr	r3, [r3, #0]
 8006be0:	4a58      	ldr	r2, [pc, #352]	@ (8006d44 <HAL_DMA_IRQHandler+0x424>)
 8006be2:	4293      	cmp	r3, r2
 8006be4:	d013      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006be6:	687b      	ldr	r3, [r7, #4]
 8006be8:	681b      	ldr	r3, [r3, #0]
 8006bea:	4a57      	ldr	r2, [pc, #348]	@ (8006d48 <HAL_DMA_IRQHandler+0x428>)
 8006bec:	4293      	cmp	r3, r2
 8006bee:	d00e      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006bf0:	687b      	ldr	r3, [r7, #4]
 8006bf2:	681b      	ldr	r3, [r3, #0]
 8006bf4:	4a55      	ldr	r2, [pc, #340]	@ (8006d4c <HAL_DMA_IRQHandler+0x42c>)
 8006bf6:	4293      	cmp	r3, r2
 8006bf8:	d009      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006bfa:	687b      	ldr	r3, [r7, #4]
 8006bfc:	681b      	ldr	r3, [r3, #0]
 8006bfe:	4a54      	ldr	r2, [pc, #336]	@ (8006d50 <HAL_DMA_IRQHandler+0x430>)
 8006c00:	4293      	cmp	r3, r2
 8006c02:	d004      	beq.n	8006c0e <HAL_DMA_IRQHandler+0x2ee>
 8006c04:	687b      	ldr	r3, [r7, #4]
 8006c06:	681b      	ldr	r3, [r3, #0]
 8006c08:	4a52      	ldr	r2, [pc, #328]	@ (8006d54 <HAL_DMA_IRQHandler+0x434>)
 8006c0a:	4293      	cmp	r3, r2
 8006c0c:	d10a      	bne.n	8006c24 <HAL_DMA_IRQHandler+0x304>
 8006c0e:	687b      	ldr	r3, [r7, #4]
 8006c10:	681b      	ldr	r3, [r3, #0]
 8006c12:	695b      	ldr	r3, [r3, #20]
 8006c14:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 8006c18:	2b00      	cmp	r3, #0
 8006c1a:	bf14      	ite	ne
 8006c1c:	2301      	movne	r3, #1
 8006c1e:	2300      	moveq	r3, #0
 8006c20:	b2db      	uxtb	r3, r3
 8006c22:	e003      	b.n	8006c2c <HAL_DMA_IRQHandler+0x30c>
 8006c24:	687b      	ldr	r3, [r7, #4]
 8006c26:	681b      	ldr	r3, [r3, #0]
 8006c28:	681b      	ldr	r3, [r3, #0]
 8006c2a:	2300      	movs	r3, #0
 8006c2c:	2b00      	cmp	r3, #0
 8006c2e:	d00d      	beq.n	8006c4c <HAL_DMA_IRQHandler+0x32c>
      {
        /* Clear the FIFO error flag */
        regs_dma->IFCR = DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU);
 8006c30:	687b      	ldr	r3, [r7, #4]
 8006c32:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006c34:	f003 031f 	and.w	r3, r3, #31
 8006c38:	2201      	movs	r2, #1
 8006c3a:	409a      	lsls	r2, r3
 8006c3c:	6a3b      	ldr	r3, [r7, #32]
 8006c3e:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_FE;
 8006c40:	687b      	ldr	r3, [r7, #4]
 8006c42:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8006c44:	f043 0202 	orr.w	r2, r3, #2
 8006c48:	687b      	ldr	r3, [r7, #4]
 8006c4a:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* Direct Mode Error Interrupt management ***********************************/
    if ((tmpisr_dma & (DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 8006c4c:	687b      	ldr	r3, [r7, #4]
 8006c4e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006c50:	f003 031f 	and.w	r3, r3, #31
 8006c54:	2204      	movs	r2, #4
 8006c56:	409a      	lsls	r2, r3
 8006c58:	69bb      	ldr	r3, [r7, #24]
 8006c5a:	4013      	ands	r3, r2
 8006c5c:	2b00      	cmp	r3, #0
 8006c5e:	f000 808f 	beq.w	8006d80 <HAL_DMA_IRQHandler+0x460>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != 0U)
 8006c62:	687b      	ldr	r3, [r7, #4]
 8006c64:	681b      	ldr	r3, [r3, #0]
 8006c66:	4a2c      	ldr	r2, [pc, #176]	@ (8006d18 <HAL_DMA_IRQHandler+0x3f8>)
 8006c68:	4293      	cmp	r3, r2
 8006c6a:	d04a      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006c6c:	687b      	ldr	r3, [r7, #4]
 8006c6e:	681b      	ldr	r3, [r3, #0]
 8006c70:	4a2a      	ldr	r2, [pc, #168]	@ (8006d1c <HAL_DMA_IRQHandler+0x3fc>)
 8006c72:	4293      	cmp	r3, r2
 8006c74:	d045      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006c76:	687b      	ldr	r3, [r7, #4]
 8006c78:	681b      	ldr	r3, [r3, #0]
 8006c7a:	4a29      	ldr	r2, [pc, #164]	@ (8006d20 <HAL_DMA_IRQHandler+0x400>)
 8006c7c:	4293      	cmp	r3, r2
 8006c7e:	d040      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006c80:	687b      	ldr	r3, [r7, #4]
 8006c82:	681b      	ldr	r3, [r3, #0]
 8006c84:	4a27      	ldr	r2, [pc, #156]	@ (8006d24 <HAL_DMA_IRQHandler+0x404>)
 8006c86:	4293      	cmp	r3, r2
 8006c88:	d03b      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006c8a:	687b      	ldr	r3, [r7, #4]
 8006c8c:	681b      	ldr	r3, [r3, #0]
 8006c8e:	4a26      	ldr	r2, [pc, #152]	@ (8006d28 <HAL_DMA_IRQHandler+0x408>)
 8006c90:	4293      	cmp	r3, r2
 8006c92:	d036      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006c94:	687b      	ldr	r3, [r7, #4]
 8006c96:	681b      	ldr	r3, [r3, #0]
 8006c98:	4a24      	ldr	r2, [pc, #144]	@ (8006d2c <HAL_DMA_IRQHandler+0x40c>)
 8006c9a:	4293      	cmp	r3, r2
 8006c9c:	d031      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006c9e:	687b      	ldr	r3, [r7, #4]
 8006ca0:	681b      	ldr	r3, [r3, #0]
 8006ca2:	4a23      	ldr	r2, [pc, #140]	@ (8006d30 <HAL_DMA_IRQHandler+0x410>)
 8006ca4:	4293      	cmp	r3, r2
 8006ca6:	d02c      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006ca8:	687b      	ldr	r3, [r7, #4]
 8006caa:	681b      	ldr	r3, [r3, #0]
 8006cac:	4a21      	ldr	r2, [pc, #132]	@ (8006d34 <HAL_DMA_IRQHandler+0x414>)
 8006cae:	4293      	cmp	r3, r2
 8006cb0:	d027      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006cb2:	687b      	ldr	r3, [r7, #4]
 8006cb4:	681b      	ldr	r3, [r3, #0]
 8006cb6:	4a20      	ldr	r2, [pc, #128]	@ (8006d38 <HAL_DMA_IRQHandler+0x418>)
 8006cb8:	4293      	cmp	r3, r2
 8006cba:	d022      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006cbc:	687b      	ldr	r3, [r7, #4]
 8006cbe:	681b      	ldr	r3, [r3, #0]
 8006cc0:	4a1e      	ldr	r2, [pc, #120]	@ (8006d3c <HAL_DMA_IRQHandler+0x41c>)
 8006cc2:	4293      	cmp	r3, r2
 8006cc4:	d01d      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006cc6:	687b      	ldr	r3, [r7, #4]
 8006cc8:	681b      	ldr	r3, [r3, #0]
 8006cca:	4a1d      	ldr	r2, [pc, #116]	@ (8006d40 <HAL_DMA_IRQHandler+0x420>)
 8006ccc:	4293      	cmp	r3, r2
 8006cce:	d018      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006cd0:	687b      	ldr	r3, [r7, #4]
 8006cd2:	681b      	ldr	r3, [r3, #0]
 8006cd4:	4a1b      	ldr	r2, [pc, #108]	@ (8006d44 <HAL_DMA_IRQHandler+0x424>)
 8006cd6:	4293      	cmp	r3, r2
 8006cd8:	d013      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006cda:	687b      	ldr	r3, [r7, #4]
 8006cdc:	681b      	ldr	r3, [r3, #0]
 8006cde:	4a1a      	ldr	r2, [pc, #104]	@ (8006d48 <HAL_DMA_IRQHandler+0x428>)
 8006ce0:	4293      	cmp	r3, r2
 8006ce2:	d00e      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006ce4:	687b      	ldr	r3, [r7, #4]
 8006ce6:	681b      	ldr	r3, [r3, #0]
 8006ce8:	4a18      	ldr	r2, [pc, #96]	@ (8006d4c <HAL_DMA_IRQHandler+0x42c>)
 8006cea:	4293      	cmp	r3, r2
 8006cec:	d009      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006cee:	687b      	ldr	r3, [r7, #4]
 8006cf0:	681b      	ldr	r3, [r3, #0]
 8006cf2:	4a17      	ldr	r2, [pc, #92]	@ (8006d50 <HAL_DMA_IRQHandler+0x430>)
 8006cf4:	4293      	cmp	r3, r2
 8006cf6:	d004      	beq.n	8006d02 <HAL_DMA_IRQHandler+0x3e2>
 8006cf8:	687b      	ldr	r3, [r7, #4]
 8006cfa:	681b      	ldr	r3, [r3, #0]
 8006cfc:	4a15      	ldr	r2, [pc, #84]	@ (8006d54 <HAL_DMA_IRQHandler+0x434>)
 8006cfe:	4293      	cmp	r3, r2
 8006d00:	d12a      	bne.n	8006d58 <HAL_DMA_IRQHandler+0x438>
 8006d02:	687b      	ldr	r3, [r7, #4]
 8006d04:	681b      	ldr	r3, [r3, #0]
 8006d06:	681b      	ldr	r3, [r3, #0]
 8006d08:	f003 0302 	and.w	r3, r3, #2
 8006d0c:	2b00      	cmp	r3, #0
 8006d0e:	bf14      	ite	ne
 8006d10:	2301      	movne	r3, #1
 8006d12:	2300      	moveq	r3, #0
 8006d14:	b2db      	uxtb	r3, r3
 8006d16:	e023      	b.n	8006d60 <HAL_DMA_IRQHandler+0x440>
 8006d18:	40020010 	.word	0x40020010
 8006d1c:	40020028 	.word	0x40020028
 8006d20:	40020040 	.word	0x40020040
 8006d24:	40020058 	.word	0x40020058
 8006d28:	40020070 	.word	0x40020070
 8006d2c:	40020088 	.word	0x40020088
 8006d30:	400200a0 	.word	0x400200a0
 8006d34:	400200b8 	.word	0x400200b8
 8006d38:	40020410 	.word	0x40020410
 8006d3c:	40020428 	.word	0x40020428
 8006d40:	40020440 	.word	0x40020440
 8006d44:	40020458 	.word	0x40020458
 8006d48:	40020470 	.word	0x40020470
 8006d4c:	40020488 	.word	0x40020488
 8006d50:	400204a0 	.word	0x400204a0
 8006d54:	400204b8 	.word	0x400204b8
 8006d58:	687b      	ldr	r3, [r7, #4]
 8006d5a:	681b      	ldr	r3, [r3, #0]
 8006d5c:	681b      	ldr	r3, [r3, #0]
 8006d5e:	2300      	movs	r3, #0
 8006d60:	2b00      	cmp	r3, #0
 8006d62:	d00d      	beq.n	8006d80 <HAL_DMA_IRQHandler+0x460>
      {
        /* Clear the direct mode error flag */
        regs_dma->IFCR = DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU);
 8006d64:	687b      	ldr	r3, [r7, #4]
 8006d66:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006d68:	f003 031f 	and.w	r3, r3, #31
 8006d6c:	2204      	movs	r2, #4
 8006d6e:	409a      	lsls	r2, r3
 8006d70:	6a3b      	ldr	r3, [r7, #32]
 8006d72:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_DME;
 8006d74:	687b      	ldr	r3, [r7, #4]
 8006d76:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8006d78:	f043 0204 	orr.w	r2, r3, #4
 8006d7c:	687b      	ldr	r3, [r7, #4]
 8006d7e:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* Half Transfer Complete Interrupt management ******************************/
    if ((tmpisr_dma & (DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 8006d80:	687b      	ldr	r3, [r7, #4]
 8006d82:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006d84:	f003 031f 	and.w	r3, r3, #31
 8006d88:	2210      	movs	r2, #16
 8006d8a:	409a      	lsls	r2, r3
 8006d8c:	69bb      	ldr	r3, [r7, #24]
 8006d8e:	4013      	ands	r3, r2
 8006d90:	2b00      	cmp	r3, #0
 8006d92:	f000 80a6 	beq.w	8006ee2 <HAL_DMA_IRQHandler+0x5c2>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != 0U)
 8006d96:	687b      	ldr	r3, [r7, #4]
 8006d98:	681b      	ldr	r3, [r3, #0]
 8006d9a:	4a85      	ldr	r2, [pc, #532]	@ (8006fb0 <HAL_DMA_IRQHandler+0x690>)
 8006d9c:	4293      	cmp	r3, r2
 8006d9e:	d04a      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006da0:	687b      	ldr	r3, [r7, #4]
 8006da2:	681b      	ldr	r3, [r3, #0]
 8006da4:	4a83      	ldr	r2, [pc, #524]	@ (8006fb4 <HAL_DMA_IRQHandler+0x694>)
 8006da6:	4293      	cmp	r3, r2
 8006da8:	d045      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006daa:	687b      	ldr	r3, [r7, #4]
 8006dac:	681b      	ldr	r3, [r3, #0]
 8006dae:	4a82      	ldr	r2, [pc, #520]	@ (8006fb8 <HAL_DMA_IRQHandler+0x698>)
 8006db0:	4293      	cmp	r3, r2
 8006db2:	d040      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006db4:	687b      	ldr	r3, [r7, #4]
 8006db6:	681b      	ldr	r3, [r3, #0]
 8006db8:	4a80      	ldr	r2, [pc, #512]	@ (8006fbc <HAL_DMA_IRQHandler+0x69c>)
 8006dba:	4293      	cmp	r3, r2
 8006dbc:	d03b      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006dbe:	687b      	ldr	r3, [r7, #4]
 8006dc0:	681b      	ldr	r3, [r3, #0]
 8006dc2:	4a7f      	ldr	r2, [pc, #508]	@ (8006fc0 <HAL_DMA_IRQHandler+0x6a0>)
 8006dc4:	4293      	cmp	r3, r2
 8006dc6:	d036      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006dc8:	687b      	ldr	r3, [r7, #4]
 8006dca:	681b      	ldr	r3, [r3, #0]
 8006dcc:	4a7d      	ldr	r2, [pc, #500]	@ (8006fc4 <HAL_DMA_IRQHandler+0x6a4>)
 8006dce:	4293      	cmp	r3, r2
 8006dd0:	d031      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006dd2:	687b      	ldr	r3, [r7, #4]
 8006dd4:	681b      	ldr	r3, [r3, #0]
 8006dd6:	4a7c      	ldr	r2, [pc, #496]	@ (8006fc8 <HAL_DMA_IRQHandler+0x6a8>)
 8006dd8:	4293      	cmp	r3, r2
 8006dda:	d02c      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006ddc:	687b      	ldr	r3, [r7, #4]
 8006dde:	681b      	ldr	r3, [r3, #0]
 8006de0:	4a7a      	ldr	r2, [pc, #488]	@ (8006fcc <HAL_DMA_IRQHandler+0x6ac>)
 8006de2:	4293      	cmp	r3, r2
 8006de4:	d027      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006de6:	687b      	ldr	r3, [r7, #4]
 8006de8:	681b      	ldr	r3, [r3, #0]
 8006dea:	4a79      	ldr	r2, [pc, #484]	@ (8006fd0 <HAL_DMA_IRQHandler+0x6b0>)
 8006dec:	4293      	cmp	r3, r2
 8006dee:	d022      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006df0:	687b      	ldr	r3, [r7, #4]
 8006df2:	681b      	ldr	r3, [r3, #0]
 8006df4:	4a77      	ldr	r2, [pc, #476]	@ (8006fd4 <HAL_DMA_IRQHandler+0x6b4>)
 8006df6:	4293      	cmp	r3, r2
 8006df8:	d01d      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006dfa:	687b      	ldr	r3, [r7, #4]
 8006dfc:	681b      	ldr	r3, [r3, #0]
 8006dfe:	4a76      	ldr	r2, [pc, #472]	@ (8006fd8 <HAL_DMA_IRQHandler+0x6b8>)
 8006e00:	4293      	cmp	r3, r2
 8006e02:	d018      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006e04:	687b      	ldr	r3, [r7, #4]
 8006e06:	681b      	ldr	r3, [r3, #0]
 8006e08:	4a74      	ldr	r2, [pc, #464]	@ (8006fdc <HAL_DMA_IRQHandler+0x6bc>)
 8006e0a:	4293      	cmp	r3, r2
 8006e0c:	d013      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006e0e:	687b      	ldr	r3, [r7, #4]
 8006e10:	681b      	ldr	r3, [r3, #0]
 8006e12:	4a73      	ldr	r2, [pc, #460]	@ (8006fe0 <HAL_DMA_IRQHandler+0x6c0>)
 8006e14:	4293      	cmp	r3, r2
 8006e16:	d00e      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006e18:	687b      	ldr	r3, [r7, #4]
 8006e1a:	681b      	ldr	r3, [r3, #0]
 8006e1c:	4a71      	ldr	r2, [pc, #452]	@ (8006fe4 <HAL_DMA_IRQHandler+0x6c4>)
 8006e1e:	4293      	cmp	r3, r2
 8006e20:	d009      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006e22:	687b      	ldr	r3, [r7, #4]
 8006e24:	681b      	ldr	r3, [r3, #0]
 8006e26:	4a70      	ldr	r2, [pc, #448]	@ (8006fe8 <HAL_DMA_IRQHandler+0x6c8>)
 8006e28:	4293      	cmp	r3, r2
 8006e2a:	d004      	beq.n	8006e36 <HAL_DMA_IRQHandler+0x516>
 8006e2c:	687b      	ldr	r3, [r7, #4]
 8006e2e:	681b      	ldr	r3, [r3, #0]
 8006e30:	4a6e      	ldr	r2, [pc, #440]	@ (8006fec <HAL_DMA_IRQHandler+0x6cc>)
 8006e32:	4293      	cmp	r3, r2
 8006e34:	d10a      	bne.n	8006e4c <HAL_DMA_IRQHandler+0x52c>
 8006e36:	687b      	ldr	r3, [r7, #4]
 8006e38:	681b      	ldr	r3, [r3, #0]
 8006e3a:	681b      	ldr	r3, [r3, #0]
 8006e3c:	f003 0308 	and.w	r3, r3, #8
 8006e40:	2b00      	cmp	r3, #0
 8006e42:	bf14      	ite	ne
 8006e44:	2301      	movne	r3, #1
 8006e46:	2300      	moveq	r3, #0
 8006e48:	b2db      	uxtb	r3, r3
 8006e4a:	e009      	b.n	8006e60 <HAL_DMA_IRQHandler+0x540>
 8006e4c:	687b      	ldr	r3, [r7, #4]
 8006e4e:	681b      	ldr	r3, [r3, #0]
 8006e50:	681b      	ldr	r3, [r3, #0]
 8006e52:	f003 0304 	and.w	r3, r3, #4
 8006e56:	2b00      	cmp	r3, #0
 8006e58:	bf14      	ite	ne
 8006e5a:	2301      	movne	r3, #1
 8006e5c:	2300      	moveq	r3, #0
 8006e5e:	b2db      	uxtb	r3, r3
 8006e60:	2b00      	cmp	r3, #0
 8006e62:	d03e      	beq.n	8006ee2 <HAL_DMA_IRQHandler+0x5c2>
      {
        /* Clear the half transfer complete flag */
        regs_dma->IFCR = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU);
 8006e64:	687b      	ldr	r3, [r7, #4]
 8006e66:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006e68:	f003 031f 	and.w	r3, r3, #31
 8006e6c:	2210      	movs	r2, #16
 8006e6e:	409a      	lsls	r2, r3
 8006e70:	6a3b      	ldr	r3, [r7, #32]
 8006e72:	609a      	str	r2, [r3, #8]

        /* Multi_Buffering mode enabled */
        if(((((DMA_Stream_TypeDef   *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U)
 8006e74:	687b      	ldr	r3, [r7, #4]
 8006e76:	681b      	ldr	r3, [r3, #0]
 8006e78:	681b      	ldr	r3, [r3, #0]
 8006e7a:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 8006e7e:	2b00      	cmp	r3, #0
 8006e80:	d018      	beq.n	8006eb4 <HAL_DMA_IRQHandler+0x594>
        {
          /* Current memory buffer used is Memory 0 */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U)
 8006e82:	687b      	ldr	r3, [r7, #4]
 8006e84:	681b      	ldr	r3, [r3, #0]
 8006e86:	681b      	ldr	r3, [r3, #0]
 8006e88:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 8006e8c:	2b00      	cmp	r3, #0
 8006e8e:	d108      	bne.n	8006ea2 <HAL_DMA_IRQHandler+0x582>
          {
            if(hdma->XferHalfCpltCallback != NULL)
 8006e90:	687b      	ldr	r3, [r7, #4]
 8006e92:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8006e94:	2b00      	cmp	r3, #0
 8006e96:	d024      	beq.n	8006ee2 <HAL_DMA_IRQHandler+0x5c2>
            {
              /* Half transfer callback */
              hdma->XferHalfCpltCallback(hdma);
 8006e98:	687b      	ldr	r3, [r7, #4]
 8006e9a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8006e9c:	6878      	ldr	r0, [r7, #4]
 8006e9e:	4798      	blx	r3
 8006ea0:	e01f      	b.n	8006ee2 <HAL_DMA_IRQHandler+0x5c2>
            }
          }
          /* Current memory buffer used is Memory 1 */
          else
          {
            if(hdma->XferM1HalfCpltCallback != NULL)
 8006ea2:	687b      	ldr	r3, [r7, #4]
 8006ea4:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8006ea6:	2b00      	cmp	r3, #0
 8006ea8:	d01b      	beq.n	8006ee2 <HAL_DMA_IRQHandler+0x5c2>
            {
              /* Half transfer callback */
              hdma->XferM1HalfCpltCallback(hdma);
 8006eaa:	687b      	ldr	r3, [r7, #4]
 8006eac:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8006eae:	6878      	ldr	r0, [r7, #4]
 8006eb0:	4798      	blx	r3
 8006eb2:	e016      	b.n	8006ee2 <HAL_DMA_IRQHandler+0x5c2>
          }
        }
        else
        {
          /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U)
 8006eb4:	687b      	ldr	r3, [r7, #4]
 8006eb6:	681b      	ldr	r3, [r3, #0]
 8006eb8:	681b      	ldr	r3, [r3, #0]
 8006eba:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8006ebe:	2b00      	cmp	r3, #0
 8006ec0:	d107      	bne.n	8006ed2 <HAL_DMA_IRQHandler+0x5b2>
          {
            /* Disable the half transfer interrupt */
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_HT);
 8006ec2:	687b      	ldr	r3, [r7, #4]
 8006ec4:	681b      	ldr	r3, [r3, #0]
 8006ec6:	681a      	ldr	r2, [r3, #0]
 8006ec8:	687b      	ldr	r3, [r7, #4]
 8006eca:	681b      	ldr	r3, [r3, #0]
 8006ecc:	f022 0208 	bic.w	r2, r2, #8
 8006ed0:	601a      	str	r2, [r3, #0]
          }

          if(hdma->XferHalfCpltCallback != NULL)
 8006ed2:	687b      	ldr	r3, [r7, #4]
 8006ed4:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8006ed6:	2b00      	cmp	r3, #0
 8006ed8:	d003      	beq.n	8006ee2 <HAL_DMA_IRQHandler+0x5c2>
          {
            /* Half transfer callback */
            hdma->XferHalfCpltCallback(hdma);
 8006eda:	687b      	ldr	r3, [r7, #4]
 8006edc:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8006ede:	6878      	ldr	r0, [r7, #4]
 8006ee0:	4798      	blx	r3
          }
        }
      }
    }
    /* Transfer Complete Interrupt management ***********************************/
    if ((tmpisr_dma & (DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 8006ee2:	687b      	ldr	r3, [r7, #4]
 8006ee4:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006ee6:	f003 031f 	and.w	r3, r3, #31
 8006eea:	2220      	movs	r2, #32
 8006eec:	409a      	lsls	r2, r3
 8006eee:	69bb      	ldr	r3, [r7, #24]
 8006ef0:	4013      	ands	r3, r2
 8006ef2:	2b00      	cmp	r3, #0
 8006ef4:	f000 8110 	beq.w	8007118 <HAL_DMA_IRQHandler+0x7f8>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != 0U)
 8006ef8:	687b      	ldr	r3, [r7, #4]
 8006efa:	681b      	ldr	r3, [r3, #0]
 8006efc:	4a2c      	ldr	r2, [pc, #176]	@ (8006fb0 <HAL_DMA_IRQHandler+0x690>)
 8006efe:	4293      	cmp	r3, r2
 8006f00:	d04a      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f02:	687b      	ldr	r3, [r7, #4]
 8006f04:	681b      	ldr	r3, [r3, #0]
 8006f06:	4a2b      	ldr	r2, [pc, #172]	@ (8006fb4 <HAL_DMA_IRQHandler+0x694>)
 8006f08:	4293      	cmp	r3, r2
 8006f0a:	d045      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f0c:	687b      	ldr	r3, [r7, #4]
 8006f0e:	681b      	ldr	r3, [r3, #0]
 8006f10:	4a29      	ldr	r2, [pc, #164]	@ (8006fb8 <HAL_DMA_IRQHandler+0x698>)
 8006f12:	4293      	cmp	r3, r2
 8006f14:	d040      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f16:	687b      	ldr	r3, [r7, #4]
 8006f18:	681b      	ldr	r3, [r3, #0]
 8006f1a:	4a28      	ldr	r2, [pc, #160]	@ (8006fbc <HAL_DMA_IRQHandler+0x69c>)
 8006f1c:	4293      	cmp	r3, r2
 8006f1e:	d03b      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f20:	687b      	ldr	r3, [r7, #4]
 8006f22:	681b      	ldr	r3, [r3, #0]
 8006f24:	4a26      	ldr	r2, [pc, #152]	@ (8006fc0 <HAL_DMA_IRQHandler+0x6a0>)
 8006f26:	4293      	cmp	r3, r2
 8006f28:	d036      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f2a:	687b      	ldr	r3, [r7, #4]
 8006f2c:	681b      	ldr	r3, [r3, #0]
 8006f2e:	4a25      	ldr	r2, [pc, #148]	@ (8006fc4 <HAL_DMA_IRQHandler+0x6a4>)
 8006f30:	4293      	cmp	r3, r2
 8006f32:	d031      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f34:	687b      	ldr	r3, [r7, #4]
 8006f36:	681b      	ldr	r3, [r3, #0]
 8006f38:	4a23      	ldr	r2, [pc, #140]	@ (8006fc8 <HAL_DMA_IRQHandler+0x6a8>)
 8006f3a:	4293      	cmp	r3, r2
 8006f3c:	d02c      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f3e:	687b      	ldr	r3, [r7, #4]
 8006f40:	681b      	ldr	r3, [r3, #0]
 8006f42:	4a22      	ldr	r2, [pc, #136]	@ (8006fcc <HAL_DMA_IRQHandler+0x6ac>)
 8006f44:	4293      	cmp	r3, r2
 8006f46:	d027      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f48:	687b      	ldr	r3, [r7, #4]
 8006f4a:	681b      	ldr	r3, [r3, #0]
 8006f4c:	4a20      	ldr	r2, [pc, #128]	@ (8006fd0 <HAL_DMA_IRQHandler+0x6b0>)
 8006f4e:	4293      	cmp	r3, r2
 8006f50:	d022      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f52:	687b      	ldr	r3, [r7, #4]
 8006f54:	681b      	ldr	r3, [r3, #0]
 8006f56:	4a1f      	ldr	r2, [pc, #124]	@ (8006fd4 <HAL_DMA_IRQHandler+0x6b4>)
 8006f58:	4293      	cmp	r3, r2
 8006f5a:	d01d      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f5c:	687b      	ldr	r3, [r7, #4]
 8006f5e:	681b      	ldr	r3, [r3, #0]
 8006f60:	4a1d      	ldr	r2, [pc, #116]	@ (8006fd8 <HAL_DMA_IRQHandler+0x6b8>)
 8006f62:	4293      	cmp	r3, r2
 8006f64:	d018      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f66:	687b      	ldr	r3, [r7, #4]
 8006f68:	681b      	ldr	r3, [r3, #0]
 8006f6a:	4a1c      	ldr	r2, [pc, #112]	@ (8006fdc <HAL_DMA_IRQHandler+0x6bc>)
 8006f6c:	4293      	cmp	r3, r2
 8006f6e:	d013      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f70:	687b      	ldr	r3, [r7, #4]
 8006f72:	681b      	ldr	r3, [r3, #0]
 8006f74:	4a1a      	ldr	r2, [pc, #104]	@ (8006fe0 <HAL_DMA_IRQHandler+0x6c0>)
 8006f76:	4293      	cmp	r3, r2
 8006f78:	d00e      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f7a:	687b      	ldr	r3, [r7, #4]
 8006f7c:	681b      	ldr	r3, [r3, #0]
 8006f7e:	4a19      	ldr	r2, [pc, #100]	@ (8006fe4 <HAL_DMA_IRQHandler+0x6c4>)
 8006f80:	4293      	cmp	r3, r2
 8006f82:	d009      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f84:	687b      	ldr	r3, [r7, #4]
 8006f86:	681b      	ldr	r3, [r3, #0]
 8006f88:	4a17      	ldr	r2, [pc, #92]	@ (8006fe8 <HAL_DMA_IRQHandler+0x6c8>)
 8006f8a:	4293      	cmp	r3, r2
 8006f8c:	d004      	beq.n	8006f98 <HAL_DMA_IRQHandler+0x678>
 8006f8e:	687b      	ldr	r3, [r7, #4]
 8006f90:	681b      	ldr	r3, [r3, #0]
 8006f92:	4a16      	ldr	r2, [pc, #88]	@ (8006fec <HAL_DMA_IRQHandler+0x6cc>)
 8006f94:	4293      	cmp	r3, r2
 8006f96:	d12b      	bne.n	8006ff0 <HAL_DMA_IRQHandler+0x6d0>
 8006f98:	687b      	ldr	r3, [r7, #4]
 8006f9a:	681b      	ldr	r3, [r3, #0]
 8006f9c:	681b      	ldr	r3, [r3, #0]
 8006f9e:	f003 0310 	and.w	r3, r3, #16
 8006fa2:	2b00      	cmp	r3, #0
 8006fa4:	bf14      	ite	ne
 8006fa6:	2301      	movne	r3, #1
 8006fa8:	2300      	moveq	r3, #0
 8006faa:	b2db      	uxtb	r3, r3
 8006fac:	e02a      	b.n	8007004 <HAL_DMA_IRQHandler+0x6e4>
 8006fae:	bf00      	nop
 8006fb0:	40020010 	.word	0x40020010
 8006fb4:	40020028 	.word	0x40020028
 8006fb8:	40020040 	.word	0x40020040
 8006fbc:	40020058 	.word	0x40020058
 8006fc0:	40020070 	.word	0x40020070
 8006fc4:	40020088 	.word	0x40020088
 8006fc8:	400200a0 	.word	0x400200a0
 8006fcc:	400200b8 	.word	0x400200b8
 8006fd0:	40020410 	.word	0x40020410
 8006fd4:	40020428 	.word	0x40020428
 8006fd8:	40020440 	.word	0x40020440
 8006fdc:	40020458 	.word	0x40020458
 8006fe0:	40020470 	.word	0x40020470
 8006fe4:	40020488 	.word	0x40020488
 8006fe8:	400204a0 	.word	0x400204a0
 8006fec:	400204b8 	.word	0x400204b8
 8006ff0:	687b      	ldr	r3, [r7, #4]
 8006ff2:	681b      	ldr	r3, [r3, #0]
 8006ff4:	681b      	ldr	r3, [r3, #0]
 8006ff6:	f003 0302 	and.w	r3, r3, #2
 8006ffa:	2b00      	cmp	r3, #0
 8006ffc:	bf14      	ite	ne
 8006ffe:	2301      	movne	r3, #1
 8007000:	2300      	moveq	r3, #0
 8007002:	b2db      	uxtb	r3, r3
 8007004:	2b00      	cmp	r3, #0
 8007006:	f000 8087 	beq.w	8007118 <HAL_DMA_IRQHandler+0x7f8>
      {
        /* Clear the transfer complete flag */
        regs_dma->IFCR = DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU);
 800700a:	687b      	ldr	r3, [r7, #4]
 800700c:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800700e:	f003 031f 	and.w	r3, r3, #31
 8007012:	2220      	movs	r2, #32
 8007014:	409a      	lsls	r2, r3
 8007016:	6a3b      	ldr	r3, [r7, #32]
 8007018:	609a      	str	r2, [r3, #8]

        if(HAL_DMA_STATE_ABORT == hdma->State)
 800701a:	687b      	ldr	r3, [r7, #4]
 800701c:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 8007020:	b2db      	uxtb	r3, r3
 8007022:	2b04      	cmp	r3, #4
 8007024:	d139      	bne.n	800709a <HAL_DMA_IRQHandler+0x77a>
        {
          /* Disable all the transfer interrupts */
          ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME);
 8007026:	687b      	ldr	r3, [r7, #4]
 8007028:	681b      	ldr	r3, [r3, #0]
 800702a:	681a      	ldr	r2, [r3, #0]
 800702c:	687b      	ldr	r3, [r7, #4]
 800702e:	681b      	ldr	r3, [r3, #0]
 8007030:	f022 0216 	bic.w	r2, r2, #22
 8007034:	601a      	str	r2, [r3, #0]
          ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR &= ~(DMA_IT_FE);
 8007036:	687b      	ldr	r3, [r7, #4]
 8007038:	681b      	ldr	r3, [r3, #0]
 800703a:	695a      	ldr	r2, [r3, #20]
 800703c:	687b      	ldr	r3, [r7, #4]
 800703e:	681b      	ldr	r3, [r3, #0]
 8007040:	f022 0280 	bic.w	r2, r2, #128	@ 0x80
 8007044:	615a      	str	r2, [r3, #20]

          if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
 8007046:	687b      	ldr	r3, [r7, #4]
 8007048:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800704a:	2b00      	cmp	r3, #0
 800704c:	d103      	bne.n	8007056 <HAL_DMA_IRQHandler+0x736>
 800704e:	687b      	ldr	r3, [r7, #4]
 8007050:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8007052:	2b00      	cmp	r3, #0
 8007054:	d007      	beq.n	8007066 <HAL_DMA_IRQHandler+0x746>
          {
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_HT);
 8007056:	687b      	ldr	r3, [r7, #4]
 8007058:	681b      	ldr	r3, [r3, #0]
 800705a:	681a      	ldr	r2, [r3, #0]
 800705c:	687b      	ldr	r3, [r7, #4]
 800705e:	681b      	ldr	r3, [r3, #0]
 8007060:	f022 0208 	bic.w	r2, r2, #8
 8007064:	601a      	str	r2, [r3, #0]
          }

          /* Clear all interrupt flags at correct offset within the register */
          regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 8007066:	687b      	ldr	r3, [r7, #4]
 8007068:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800706a:	f003 031f 	and.w	r3, r3, #31
 800706e:	223f      	movs	r2, #63	@ 0x3f
 8007070:	409a      	lsls	r2, r3
 8007072:	6a3b      	ldr	r3, [r7, #32]
 8007074:	609a      	str	r2, [r3, #8]

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 8007076:	687b      	ldr	r3, [r7, #4]
 8007078:	2201      	movs	r2, #1
 800707a:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          /* Process Unlocked */
          __HAL_UNLOCK(hdma);
 800707e:	687b      	ldr	r3, [r7, #4]
 8007080:	2200      	movs	r2, #0
 8007082:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

          if(hdma->XferAbortCallback != NULL)
 8007086:	687b      	ldr	r3, [r7, #4]
 8007088:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800708a:	2b00      	cmp	r3, #0
 800708c:	f000 834a 	beq.w	8007724 <HAL_DMA_IRQHandler+0xe04>
          {
            hdma->XferAbortCallback(hdma);
 8007090:	687b      	ldr	r3, [r7, #4]
 8007092:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8007094:	6878      	ldr	r0, [r7, #4]
 8007096:	4798      	blx	r3
          }
          return;
 8007098:	e344      	b.n	8007724 <HAL_DMA_IRQHandler+0xe04>
        }

        if(((((DMA_Stream_TypeDef   *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U)
 800709a:	687b      	ldr	r3, [r7, #4]
 800709c:	681b      	ldr	r3, [r3, #0]
 800709e:	681b      	ldr	r3, [r3, #0]
 80070a0:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 80070a4:	2b00      	cmp	r3, #0
 80070a6:	d018      	beq.n	80070da <HAL_DMA_IRQHandler+0x7ba>
        {
          /* Current memory buffer used is Memory 0 */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U)
 80070a8:	687b      	ldr	r3, [r7, #4]
 80070aa:	681b      	ldr	r3, [r3, #0]
 80070ac:	681b      	ldr	r3, [r3, #0]
 80070ae:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 80070b2:	2b00      	cmp	r3, #0
 80070b4:	d108      	bne.n	80070c8 <HAL_DMA_IRQHandler+0x7a8>
          {
            if(hdma->XferM1CpltCallback != NULL)
 80070b6:	687b      	ldr	r3, [r7, #4]
 80070b8:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 80070ba:	2b00      	cmp	r3, #0
 80070bc:	d02c      	beq.n	8007118 <HAL_DMA_IRQHandler+0x7f8>
            {
              /* Transfer complete Callback for memory1 */
              hdma->XferM1CpltCallback(hdma);
 80070be:	687b      	ldr	r3, [r7, #4]
 80070c0:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 80070c2:	6878      	ldr	r0, [r7, #4]
 80070c4:	4798      	blx	r3
 80070c6:	e027      	b.n	8007118 <HAL_DMA_IRQHandler+0x7f8>
            }
          }
          /* Current memory buffer used is Memory 1 */
          else
          {
            if(hdma->XferCpltCallback != NULL)
 80070c8:	687b      	ldr	r3, [r7, #4]
 80070ca:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80070cc:	2b00      	cmp	r3, #0
 80070ce:	d023      	beq.n	8007118 <HAL_DMA_IRQHandler+0x7f8>
            {
              /* Transfer complete Callback for memory0 */
              hdma->XferCpltCallback(hdma);
 80070d0:	687b      	ldr	r3, [r7, #4]
 80070d2:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80070d4:	6878      	ldr	r0, [r7, #4]
 80070d6:	4798      	blx	r3
 80070d8:	e01e      	b.n	8007118 <HAL_DMA_IRQHandler+0x7f8>
          }
        }
        /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
        else
        {
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U)
 80070da:	687b      	ldr	r3, [r7, #4]
 80070dc:	681b      	ldr	r3, [r3, #0]
 80070de:	681b      	ldr	r3, [r3, #0]
 80070e0:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 80070e4:	2b00      	cmp	r3, #0
 80070e6:	d10f      	bne.n	8007108 <HAL_DMA_IRQHandler+0x7e8>
          {
            /* Disable the transfer complete interrupt */
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC);
 80070e8:	687b      	ldr	r3, [r7, #4]
 80070ea:	681b      	ldr	r3, [r3, #0]
 80070ec:	681a      	ldr	r2, [r3, #0]
 80070ee:	687b      	ldr	r3, [r7, #4]
 80070f0:	681b      	ldr	r3, [r3, #0]
 80070f2:	f022 0210 	bic.w	r2, r2, #16
 80070f6:	601a      	str	r2, [r3, #0]

            /* Change the DMA state */
            hdma->State = HAL_DMA_STATE_READY;
 80070f8:	687b      	ldr	r3, [r7, #4]
 80070fa:	2201      	movs	r2, #1
 80070fc:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

            /* Process Unlocked */
            __HAL_UNLOCK(hdma);
 8007100:	687b      	ldr	r3, [r7, #4]
 8007102:	2200      	movs	r2, #0
 8007104:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
          }

          if(hdma->XferCpltCallback != NULL)
 8007108:	687b      	ldr	r3, [r7, #4]
 800710a:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800710c:	2b00      	cmp	r3, #0
 800710e:	d003      	beq.n	8007118 <HAL_DMA_IRQHandler+0x7f8>
          {
            /* Transfer complete callback */
            hdma->XferCpltCallback(hdma);
 8007110:	687b      	ldr	r3, [r7, #4]
 8007112:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007114:	6878      	ldr	r0, [r7, #4]
 8007116:	4798      	blx	r3
        }
      }
    }

    /* manage error case */
    if(hdma->ErrorCode != HAL_DMA_ERROR_NONE)
 8007118:	687b      	ldr	r3, [r7, #4]
 800711a:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800711c:	2b00      	cmp	r3, #0
 800711e:	f000 8306 	beq.w	800772e <HAL_DMA_IRQHandler+0xe0e>
    {
      if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != 0U)
 8007122:	687b      	ldr	r3, [r7, #4]
 8007124:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8007126:	f003 0301 	and.w	r3, r3, #1
 800712a:	2b00      	cmp	r3, #0
 800712c:	f000 8088 	beq.w	8007240 <HAL_DMA_IRQHandler+0x920>
      {
        hdma->State = HAL_DMA_STATE_ABORT;
 8007130:	687b      	ldr	r3, [r7, #4]
 8007132:	2204      	movs	r2, #4
 8007134:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        /* Disable the stream */
        __HAL_DMA_DISABLE(hdma);
 8007138:	687b      	ldr	r3, [r7, #4]
 800713a:	681b      	ldr	r3, [r3, #0]
 800713c:	4a7a      	ldr	r2, [pc, #488]	@ (8007328 <HAL_DMA_IRQHandler+0xa08>)
 800713e:	4293      	cmp	r3, r2
 8007140:	d04a      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 8007142:	687b      	ldr	r3, [r7, #4]
 8007144:	681b      	ldr	r3, [r3, #0]
 8007146:	4a79      	ldr	r2, [pc, #484]	@ (800732c <HAL_DMA_IRQHandler+0xa0c>)
 8007148:	4293      	cmp	r3, r2
 800714a:	d045      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 800714c:	687b      	ldr	r3, [r7, #4]
 800714e:	681b      	ldr	r3, [r3, #0]
 8007150:	4a77      	ldr	r2, [pc, #476]	@ (8007330 <HAL_DMA_IRQHandler+0xa10>)
 8007152:	4293      	cmp	r3, r2
 8007154:	d040      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 8007156:	687b      	ldr	r3, [r7, #4]
 8007158:	681b      	ldr	r3, [r3, #0]
 800715a:	4a76      	ldr	r2, [pc, #472]	@ (8007334 <HAL_DMA_IRQHandler+0xa14>)
 800715c:	4293      	cmp	r3, r2
 800715e:	d03b      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 8007160:	687b      	ldr	r3, [r7, #4]
 8007162:	681b      	ldr	r3, [r3, #0]
 8007164:	4a74      	ldr	r2, [pc, #464]	@ (8007338 <HAL_DMA_IRQHandler+0xa18>)
 8007166:	4293      	cmp	r3, r2
 8007168:	d036      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 800716a:	687b      	ldr	r3, [r7, #4]
 800716c:	681b      	ldr	r3, [r3, #0]
 800716e:	4a73      	ldr	r2, [pc, #460]	@ (800733c <HAL_DMA_IRQHandler+0xa1c>)
 8007170:	4293      	cmp	r3, r2
 8007172:	d031      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 8007174:	687b      	ldr	r3, [r7, #4]
 8007176:	681b      	ldr	r3, [r3, #0]
 8007178:	4a71      	ldr	r2, [pc, #452]	@ (8007340 <HAL_DMA_IRQHandler+0xa20>)
 800717a:	4293      	cmp	r3, r2
 800717c:	d02c      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 800717e:	687b      	ldr	r3, [r7, #4]
 8007180:	681b      	ldr	r3, [r3, #0]
 8007182:	4a70      	ldr	r2, [pc, #448]	@ (8007344 <HAL_DMA_IRQHandler+0xa24>)
 8007184:	4293      	cmp	r3, r2
 8007186:	d027      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 8007188:	687b      	ldr	r3, [r7, #4]
 800718a:	681b      	ldr	r3, [r3, #0]
 800718c:	4a6e      	ldr	r2, [pc, #440]	@ (8007348 <HAL_DMA_IRQHandler+0xa28>)
 800718e:	4293      	cmp	r3, r2
 8007190:	d022      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 8007192:	687b      	ldr	r3, [r7, #4]
 8007194:	681b      	ldr	r3, [r3, #0]
 8007196:	4a6d      	ldr	r2, [pc, #436]	@ (800734c <HAL_DMA_IRQHandler+0xa2c>)
 8007198:	4293      	cmp	r3, r2
 800719a:	d01d      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 800719c:	687b      	ldr	r3, [r7, #4]
 800719e:	681b      	ldr	r3, [r3, #0]
 80071a0:	4a6b      	ldr	r2, [pc, #428]	@ (8007350 <HAL_DMA_IRQHandler+0xa30>)
 80071a2:	4293      	cmp	r3, r2
 80071a4:	d018      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 80071a6:	687b      	ldr	r3, [r7, #4]
 80071a8:	681b      	ldr	r3, [r3, #0]
 80071aa:	4a6a      	ldr	r2, [pc, #424]	@ (8007354 <HAL_DMA_IRQHandler+0xa34>)
 80071ac:	4293      	cmp	r3, r2
 80071ae:	d013      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 80071b0:	687b      	ldr	r3, [r7, #4]
 80071b2:	681b      	ldr	r3, [r3, #0]
 80071b4:	4a68      	ldr	r2, [pc, #416]	@ (8007358 <HAL_DMA_IRQHandler+0xa38>)
 80071b6:	4293      	cmp	r3, r2
 80071b8:	d00e      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 80071ba:	687b      	ldr	r3, [r7, #4]
 80071bc:	681b      	ldr	r3, [r3, #0]
 80071be:	4a67      	ldr	r2, [pc, #412]	@ (800735c <HAL_DMA_IRQHandler+0xa3c>)
 80071c0:	4293      	cmp	r3, r2
 80071c2:	d009      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 80071c4:	687b      	ldr	r3, [r7, #4]
 80071c6:	681b      	ldr	r3, [r3, #0]
 80071c8:	4a65      	ldr	r2, [pc, #404]	@ (8007360 <HAL_DMA_IRQHandler+0xa40>)
 80071ca:	4293      	cmp	r3, r2
 80071cc:	d004      	beq.n	80071d8 <HAL_DMA_IRQHandler+0x8b8>
 80071ce:	687b      	ldr	r3, [r7, #4]
 80071d0:	681b      	ldr	r3, [r3, #0]
 80071d2:	4a64      	ldr	r2, [pc, #400]	@ (8007364 <HAL_DMA_IRQHandler+0xa44>)
 80071d4:	4293      	cmp	r3, r2
 80071d6:	d108      	bne.n	80071ea <HAL_DMA_IRQHandler+0x8ca>
 80071d8:	687b      	ldr	r3, [r7, #4]
 80071da:	681b      	ldr	r3, [r3, #0]
 80071dc:	681a      	ldr	r2, [r3, #0]
 80071de:	687b      	ldr	r3, [r7, #4]
 80071e0:	681b      	ldr	r3, [r3, #0]
 80071e2:	f022 0201 	bic.w	r2, r2, #1
 80071e6:	601a      	str	r2, [r3, #0]
 80071e8:	e007      	b.n	80071fa <HAL_DMA_IRQHandler+0x8da>
 80071ea:	687b      	ldr	r3, [r7, #4]
 80071ec:	681b      	ldr	r3, [r3, #0]
 80071ee:	681a      	ldr	r2, [r3, #0]
 80071f0:	687b      	ldr	r3, [r7, #4]
 80071f2:	681b      	ldr	r3, [r3, #0]
 80071f4:	f022 0201 	bic.w	r2, r2, #1
 80071f8:	601a      	str	r2, [r3, #0]

        do
        {
          if (++count > timeout)
 80071fa:	68fb      	ldr	r3, [r7, #12]
 80071fc:	3301      	adds	r3, #1
 80071fe:	60fb      	str	r3, [r7, #12]
 8007200:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8007202:	429a      	cmp	r2, r3
 8007204:	d307      	bcc.n	8007216 <HAL_DMA_IRQHandler+0x8f6>
          {
            break;
          }
        }
        while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U);
 8007206:	687b      	ldr	r3, [r7, #4]
 8007208:	681b      	ldr	r3, [r3, #0]
 800720a:	681b      	ldr	r3, [r3, #0]
 800720c:	f003 0301 	and.w	r3, r3, #1
 8007210:	2b00      	cmp	r3, #0
 8007212:	d1f2      	bne.n	80071fa <HAL_DMA_IRQHandler+0x8da>
 8007214:	e000      	b.n	8007218 <HAL_DMA_IRQHandler+0x8f8>
            break;
 8007216:	bf00      	nop

        if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 8007218:	687b      	ldr	r3, [r7, #4]
 800721a:	681b      	ldr	r3, [r3, #0]
 800721c:	681b      	ldr	r3, [r3, #0]
 800721e:	f003 0301 	and.w	r3, r3, #1
 8007222:	2b00      	cmp	r3, #0
 8007224:	d004      	beq.n	8007230 <HAL_DMA_IRQHandler+0x910>
        {
          /* Change the DMA state to error if DMA disable fails */
          hdma->State = HAL_DMA_STATE_ERROR;
 8007226:	687b      	ldr	r3, [r7, #4]
 8007228:	2203      	movs	r2, #3
 800722a:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35
 800722e:	e003      	b.n	8007238 <HAL_DMA_IRQHandler+0x918>
        }
        else
        {
          /* Change the DMA state to Ready if DMA disable success */
          hdma->State = HAL_DMA_STATE_READY;
 8007230:	687b      	ldr	r3, [r7, #4]
 8007232:	2201      	movs	r2, #1
 8007234:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35
        }

        /* Process Unlocked */
        __HAL_UNLOCK(hdma);
 8007238:	687b      	ldr	r3, [r7, #4]
 800723a:	2200      	movs	r2, #0
 800723c:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
      }

      if(hdma->XferErrorCallback != NULL)
 8007240:	687b      	ldr	r3, [r7, #4]
 8007242:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8007244:	2b00      	cmp	r3, #0
 8007246:	f000 8272 	beq.w	800772e <HAL_DMA_IRQHandler+0xe0e>
      {
        /* Transfer error callback */
        hdma->XferErrorCallback(hdma);
 800724a:	687b      	ldr	r3, [r7, #4]
 800724c:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800724e:	6878      	ldr	r0, [r7, #4]
 8007250:	4798      	blx	r3
 8007252:	e26c      	b.n	800772e <HAL_DMA_IRQHandler+0xe0e>
      }
    }
  }
  else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U)  /* BDMA instance(s) */
 8007254:	687b      	ldr	r3, [r7, #4]
 8007256:	681b      	ldr	r3, [r3, #0]
 8007258:	4a43      	ldr	r2, [pc, #268]	@ (8007368 <HAL_DMA_IRQHandler+0xa48>)
 800725a:	4293      	cmp	r3, r2
 800725c:	d022      	beq.n	80072a4 <HAL_DMA_IRQHandler+0x984>
 800725e:	687b      	ldr	r3, [r7, #4]
 8007260:	681b      	ldr	r3, [r3, #0]
 8007262:	4a42      	ldr	r2, [pc, #264]	@ (800736c <HAL_DMA_IRQHandler+0xa4c>)
 8007264:	4293      	cmp	r3, r2
 8007266:	d01d      	beq.n	80072a4 <HAL_DMA_IRQHandler+0x984>
 8007268:	687b      	ldr	r3, [r7, #4]
 800726a:	681b      	ldr	r3, [r3, #0]
 800726c:	4a40      	ldr	r2, [pc, #256]	@ (8007370 <HAL_DMA_IRQHandler+0xa50>)
 800726e:	4293      	cmp	r3, r2
 8007270:	d018      	beq.n	80072a4 <HAL_DMA_IRQHandler+0x984>
 8007272:	687b      	ldr	r3, [r7, #4]
 8007274:	681b      	ldr	r3, [r3, #0]
 8007276:	4a3f      	ldr	r2, [pc, #252]	@ (8007374 <HAL_DMA_IRQHandler+0xa54>)
 8007278:	4293      	cmp	r3, r2
 800727a:	d013      	beq.n	80072a4 <HAL_DMA_IRQHandler+0x984>
 800727c:	687b      	ldr	r3, [r7, #4]
 800727e:	681b      	ldr	r3, [r3, #0]
 8007280:	4a3d      	ldr	r2, [pc, #244]	@ (8007378 <HAL_DMA_IRQHandler+0xa58>)
 8007282:	4293      	cmp	r3, r2
 8007284:	d00e      	beq.n	80072a4 <HAL_DMA_IRQHandler+0x984>
 8007286:	687b      	ldr	r3, [r7, #4]
 8007288:	681b      	ldr	r3, [r3, #0]
 800728a:	4a3c      	ldr	r2, [pc, #240]	@ (800737c <HAL_DMA_IRQHandler+0xa5c>)
 800728c:	4293      	cmp	r3, r2
 800728e:	d009      	beq.n	80072a4 <HAL_DMA_IRQHandler+0x984>
 8007290:	687b      	ldr	r3, [r7, #4]
 8007292:	681b      	ldr	r3, [r3, #0]
 8007294:	4a3a      	ldr	r2, [pc, #232]	@ (8007380 <HAL_DMA_IRQHandler+0xa60>)
 8007296:	4293      	cmp	r3, r2
 8007298:	d004      	beq.n	80072a4 <HAL_DMA_IRQHandler+0x984>
 800729a:	687b      	ldr	r3, [r7, #4]
 800729c:	681b      	ldr	r3, [r3, #0]
 800729e:	4a39      	ldr	r2, [pc, #228]	@ (8007384 <HAL_DMA_IRQHandler+0xa64>)
 80072a0:	4293      	cmp	r3, r2
 80072a2:	d101      	bne.n	80072a8 <HAL_DMA_IRQHandler+0x988>
 80072a4:	2301      	movs	r3, #1
 80072a6:	e000      	b.n	80072aa <HAL_DMA_IRQHandler+0x98a>
 80072a8:	2300      	movs	r3, #0
 80072aa:	2b00      	cmp	r3, #0
 80072ac:	f000 823f 	beq.w	800772e <HAL_DMA_IRQHandler+0xe0e>
  {
    ccr_reg = (((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR);
 80072b0:	687b      	ldr	r3, [r7, #4]
 80072b2:	681b      	ldr	r3, [r3, #0]
 80072b4:	681b      	ldr	r3, [r3, #0]
 80072b6:	613b      	str	r3, [r7, #16]

    /* Half Transfer Complete Interrupt management ******************************/
    if (((tmpisr_bdma & (BDMA_FLAG_HT0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_HTIE) != 0U))
 80072b8:	687b      	ldr	r3, [r7, #4]
 80072ba:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80072bc:	f003 031f 	and.w	r3, r3, #31
 80072c0:	2204      	movs	r2, #4
 80072c2:	409a      	lsls	r2, r3
 80072c4:	697b      	ldr	r3, [r7, #20]
 80072c6:	4013      	ands	r3, r2
 80072c8:	2b00      	cmp	r3, #0
 80072ca:	f000 80cd 	beq.w	8007468 <HAL_DMA_IRQHandler+0xb48>
 80072ce:	693b      	ldr	r3, [r7, #16]
 80072d0:	f003 0304 	and.w	r3, r3, #4
 80072d4:	2b00      	cmp	r3, #0
 80072d6:	f000 80c7 	beq.w	8007468 <HAL_DMA_IRQHandler+0xb48>
    {
      /* Clear the half transfer complete flag */
      regs_bdma->IFCR = (BDMA_ISR_HTIF0 << (hdma->StreamIndex & 0x1FU));
 80072da:	687b      	ldr	r3, [r7, #4]
 80072dc:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80072de:	f003 031f 	and.w	r3, r3, #31
 80072e2:	2204      	movs	r2, #4
 80072e4:	409a      	lsls	r2, r3
 80072e6:	69fb      	ldr	r3, [r7, #28]
 80072e8:	605a      	str	r2, [r3, #4]

      /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 80072ea:	693b      	ldr	r3, [r7, #16]
 80072ec:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 80072f0:	2b00      	cmp	r3, #0
 80072f2:	d049      	beq.n	8007388 <HAL_DMA_IRQHandler+0xa68>
      {
        /* Current memory buffer used is Memory 0 */
        if((ccr_reg & BDMA_CCR_CT) == 0U)
 80072f4:	693b      	ldr	r3, [r7, #16]
 80072f6:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 80072fa:	2b00      	cmp	r3, #0
 80072fc:	d109      	bne.n	8007312 <HAL_DMA_IRQHandler+0x9f2>
        {
          if(hdma->XferM1HalfCpltCallback != NULL)
 80072fe:	687b      	ldr	r3, [r7, #4]
 8007300:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8007302:	2b00      	cmp	r3, #0
 8007304:	f000 8210 	beq.w	8007728 <HAL_DMA_IRQHandler+0xe08>
          {
            /* Half transfer Callback for Memory 1 */
            hdma->XferM1HalfCpltCallback(hdma);
 8007308:	687b      	ldr	r3, [r7, #4]
 800730a:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800730c:	6878      	ldr	r0, [r7, #4]
 800730e:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007310:	e20a      	b.n	8007728 <HAL_DMA_IRQHandler+0xe08>
          }
        }
        /* Current memory buffer used is Memory 1 */
        else
        {
          if(hdma->XferHalfCpltCallback != NULL)
 8007312:	687b      	ldr	r3, [r7, #4]
 8007314:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007316:	2b00      	cmp	r3, #0
 8007318:	f000 8206 	beq.w	8007728 <HAL_DMA_IRQHandler+0xe08>
          {
            /* Half transfer Callback for Memory 0 */
            hdma->XferHalfCpltCallback(hdma);
 800731c:	687b      	ldr	r3, [r7, #4]
 800731e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007320:	6878      	ldr	r0, [r7, #4]
 8007322:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007324:	e200      	b.n	8007728 <HAL_DMA_IRQHandler+0xe08>
 8007326:	bf00      	nop
 8007328:	40020010 	.word	0x40020010
 800732c:	40020028 	.word	0x40020028
 8007330:	40020040 	.word	0x40020040
 8007334:	40020058 	.word	0x40020058
 8007338:	40020070 	.word	0x40020070
 800733c:	40020088 	.word	0x40020088
 8007340:	400200a0 	.word	0x400200a0
 8007344:	400200b8 	.word	0x400200b8
 8007348:	40020410 	.word	0x40020410
 800734c:	40020428 	.word	0x40020428
 8007350:	40020440 	.word	0x40020440
 8007354:	40020458 	.word	0x40020458
 8007358:	40020470 	.word	0x40020470
 800735c:	40020488 	.word	0x40020488
 8007360:	400204a0 	.word	0x400204a0
 8007364:	400204b8 	.word	0x400204b8
 8007368:	58025408 	.word	0x58025408
 800736c:	5802541c 	.word	0x5802541c
 8007370:	58025430 	.word	0x58025430
 8007374:	58025444 	.word	0x58025444
 8007378:	58025458 	.word	0x58025458
 800737c:	5802546c 	.word	0x5802546c
 8007380:	58025480 	.word	0x58025480
 8007384:	58025494 	.word	0x58025494
          }
        }
      }
      else
      {
        if((ccr_reg & BDMA_CCR_CIRC) == 0U)
 8007388:	693b      	ldr	r3, [r7, #16]
 800738a:	f003 0320 	and.w	r3, r3, #32
 800738e:	2b00      	cmp	r3, #0
 8007390:	d160      	bne.n	8007454 <HAL_DMA_IRQHandler+0xb34>
        {
          /* Disable the half transfer interrupt */
          __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 8007392:	687b      	ldr	r3, [r7, #4]
 8007394:	681b      	ldr	r3, [r3, #0]
 8007396:	4a7f      	ldr	r2, [pc, #508]	@ (8007594 <HAL_DMA_IRQHandler+0xc74>)
 8007398:	4293      	cmp	r3, r2
 800739a:	d04a      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 800739c:	687b      	ldr	r3, [r7, #4]
 800739e:	681b      	ldr	r3, [r3, #0]
 80073a0:	4a7d      	ldr	r2, [pc, #500]	@ (8007598 <HAL_DMA_IRQHandler+0xc78>)
 80073a2:	4293      	cmp	r3, r2
 80073a4:	d045      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 80073a6:	687b      	ldr	r3, [r7, #4]
 80073a8:	681b      	ldr	r3, [r3, #0]
 80073aa:	4a7c      	ldr	r2, [pc, #496]	@ (800759c <HAL_DMA_IRQHandler+0xc7c>)
 80073ac:	4293      	cmp	r3, r2
 80073ae:	d040      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 80073b0:	687b      	ldr	r3, [r7, #4]
 80073b2:	681b      	ldr	r3, [r3, #0]
 80073b4:	4a7a      	ldr	r2, [pc, #488]	@ (80075a0 <HAL_DMA_IRQHandler+0xc80>)
 80073b6:	4293      	cmp	r3, r2
 80073b8:	d03b      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 80073ba:	687b      	ldr	r3, [r7, #4]
 80073bc:	681b      	ldr	r3, [r3, #0]
 80073be:	4a79      	ldr	r2, [pc, #484]	@ (80075a4 <HAL_DMA_IRQHandler+0xc84>)
 80073c0:	4293      	cmp	r3, r2
 80073c2:	d036      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 80073c4:	687b      	ldr	r3, [r7, #4]
 80073c6:	681b      	ldr	r3, [r3, #0]
 80073c8:	4a77      	ldr	r2, [pc, #476]	@ (80075a8 <HAL_DMA_IRQHandler+0xc88>)
 80073ca:	4293      	cmp	r3, r2
 80073cc:	d031      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 80073ce:	687b      	ldr	r3, [r7, #4]
 80073d0:	681b      	ldr	r3, [r3, #0]
 80073d2:	4a76      	ldr	r2, [pc, #472]	@ (80075ac <HAL_DMA_IRQHandler+0xc8c>)
 80073d4:	4293      	cmp	r3, r2
 80073d6:	d02c      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 80073d8:	687b      	ldr	r3, [r7, #4]
 80073da:	681b      	ldr	r3, [r3, #0]
 80073dc:	4a74      	ldr	r2, [pc, #464]	@ (80075b0 <HAL_DMA_IRQHandler+0xc90>)
 80073de:	4293      	cmp	r3, r2
 80073e0:	d027      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 80073e2:	687b      	ldr	r3, [r7, #4]
 80073e4:	681b      	ldr	r3, [r3, #0]
 80073e6:	4a73      	ldr	r2, [pc, #460]	@ (80075b4 <HAL_DMA_IRQHandler+0xc94>)
 80073e8:	4293      	cmp	r3, r2
 80073ea:	d022      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 80073ec:	687b      	ldr	r3, [r7, #4]
 80073ee:	681b      	ldr	r3, [r3, #0]
 80073f0:	4a71      	ldr	r2, [pc, #452]	@ (80075b8 <HAL_DMA_IRQHandler+0xc98>)
 80073f2:	4293      	cmp	r3, r2
 80073f4:	d01d      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 80073f6:	687b      	ldr	r3, [r7, #4]
 80073f8:	681b      	ldr	r3, [r3, #0]
 80073fa:	4a70      	ldr	r2, [pc, #448]	@ (80075bc <HAL_DMA_IRQHandler+0xc9c>)
 80073fc:	4293      	cmp	r3, r2
 80073fe:	d018      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 8007400:	687b      	ldr	r3, [r7, #4]
 8007402:	681b      	ldr	r3, [r3, #0]
 8007404:	4a6e      	ldr	r2, [pc, #440]	@ (80075c0 <HAL_DMA_IRQHandler+0xca0>)
 8007406:	4293      	cmp	r3, r2
 8007408:	d013      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 800740a:	687b      	ldr	r3, [r7, #4]
 800740c:	681b      	ldr	r3, [r3, #0]
 800740e:	4a6d      	ldr	r2, [pc, #436]	@ (80075c4 <HAL_DMA_IRQHandler+0xca4>)
 8007410:	4293      	cmp	r3, r2
 8007412:	d00e      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 8007414:	687b      	ldr	r3, [r7, #4]
 8007416:	681b      	ldr	r3, [r3, #0]
 8007418:	4a6b      	ldr	r2, [pc, #428]	@ (80075c8 <HAL_DMA_IRQHandler+0xca8>)
 800741a:	4293      	cmp	r3, r2
 800741c:	d009      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 800741e:	687b      	ldr	r3, [r7, #4]
 8007420:	681b      	ldr	r3, [r3, #0]
 8007422:	4a6a      	ldr	r2, [pc, #424]	@ (80075cc <HAL_DMA_IRQHandler+0xcac>)
 8007424:	4293      	cmp	r3, r2
 8007426:	d004      	beq.n	8007432 <HAL_DMA_IRQHandler+0xb12>
 8007428:	687b      	ldr	r3, [r7, #4]
 800742a:	681b      	ldr	r3, [r3, #0]
 800742c:	4a68      	ldr	r2, [pc, #416]	@ (80075d0 <HAL_DMA_IRQHandler+0xcb0>)
 800742e:	4293      	cmp	r3, r2
 8007430:	d108      	bne.n	8007444 <HAL_DMA_IRQHandler+0xb24>
 8007432:	687b      	ldr	r3, [r7, #4]
 8007434:	681b      	ldr	r3, [r3, #0]
 8007436:	681a      	ldr	r2, [r3, #0]
 8007438:	687b      	ldr	r3, [r7, #4]
 800743a:	681b      	ldr	r3, [r3, #0]
 800743c:	f022 0208 	bic.w	r2, r2, #8
 8007440:	601a      	str	r2, [r3, #0]
 8007442:	e007      	b.n	8007454 <HAL_DMA_IRQHandler+0xb34>
 8007444:	687b      	ldr	r3, [r7, #4]
 8007446:	681b      	ldr	r3, [r3, #0]
 8007448:	681a      	ldr	r2, [r3, #0]
 800744a:	687b      	ldr	r3, [r7, #4]
 800744c:	681b      	ldr	r3, [r3, #0]
 800744e:	f022 0204 	bic.w	r2, r2, #4
 8007452:	601a      	str	r2, [r3, #0]
        }

        /* DMA peripheral state is not updated in Half Transfer */
        /* but in Transfer Complete case */

       if(hdma->XferHalfCpltCallback != NULL)
 8007454:	687b      	ldr	r3, [r7, #4]
 8007456:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007458:	2b00      	cmp	r3, #0
 800745a:	f000 8165 	beq.w	8007728 <HAL_DMA_IRQHandler+0xe08>
        {
          /* Half transfer callback */
          hdma->XferHalfCpltCallback(hdma);
 800745e:	687b      	ldr	r3, [r7, #4]
 8007460:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007462:	6878      	ldr	r0, [r7, #4]
 8007464:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007466:	e15f      	b.n	8007728 <HAL_DMA_IRQHandler+0xe08>
        }
      }
    }

    /* Transfer Complete Interrupt management ***********************************/
    else if (((tmpisr_bdma & (BDMA_FLAG_TC0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TCIE) != 0U))
 8007468:	687b      	ldr	r3, [r7, #4]
 800746a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800746c:	f003 031f 	and.w	r3, r3, #31
 8007470:	2202      	movs	r2, #2
 8007472:	409a      	lsls	r2, r3
 8007474:	697b      	ldr	r3, [r7, #20]
 8007476:	4013      	ands	r3, r2
 8007478:	2b00      	cmp	r3, #0
 800747a:	f000 80c5 	beq.w	8007608 <HAL_DMA_IRQHandler+0xce8>
 800747e:	693b      	ldr	r3, [r7, #16]
 8007480:	f003 0302 	and.w	r3, r3, #2
 8007484:	2b00      	cmp	r3, #0
 8007486:	f000 80bf 	beq.w	8007608 <HAL_DMA_IRQHandler+0xce8>
    {
      /* Clear the transfer complete flag */
      regs_bdma->IFCR = (BDMA_ISR_TCIF0) << (hdma->StreamIndex & 0x1FU);
 800748a:	687b      	ldr	r3, [r7, #4]
 800748c:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800748e:	f003 031f 	and.w	r3, r3, #31
 8007492:	2202      	movs	r2, #2
 8007494:	409a      	lsls	r2, r3
 8007496:	69fb      	ldr	r3, [r7, #28]
 8007498:	605a      	str	r2, [r3, #4]

      /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 800749a:	693b      	ldr	r3, [r7, #16]
 800749c:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 80074a0:	2b00      	cmp	r3, #0
 80074a2:	d018      	beq.n	80074d6 <HAL_DMA_IRQHandler+0xbb6>
      {
        /* Current memory buffer used is Memory 0 */
        if((ccr_reg & BDMA_CCR_CT) == 0U)
 80074a4:	693b      	ldr	r3, [r7, #16]
 80074a6:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 80074aa:	2b00      	cmp	r3, #0
 80074ac:	d109      	bne.n	80074c2 <HAL_DMA_IRQHandler+0xba2>
        {
          if(hdma->XferM1CpltCallback != NULL)
 80074ae:	687b      	ldr	r3, [r7, #4]
 80074b0:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 80074b2:	2b00      	cmp	r3, #0
 80074b4:	f000 813a 	beq.w	800772c <HAL_DMA_IRQHandler+0xe0c>
          {
            /* Transfer complete Callback for Memory 1 */
            hdma->XferM1CpltCallback(hdma);
 80074b8:	687b      	ldr	r3, [r7, #4]
 80074ba:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 80074bc:	6878      	ldr	r0, [r7, #4]
 80074be:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 80074c0:	e134      	b.n	800772c <HAL_DMA_IRQHandler+0xe0c>
          }
        }
        /* Current memory buffer used is Memory 1 */
        else
        {
          if(hdma->XferCpltCallback != NULL)
 80074c2:	687b      	ldr	r3, [r7, #4]
 80074c4:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80074c6:	2b00      	cmp	r3, #0
 80074c8:	f000 8130 	beq.w	800772c <HAL_DMA_IRQHandler+0xe0c>
          {
            /* Transfer complete Callback for Memory 0 */
            hdma->XferCpltCallback(hdma);
 80074cc:	687b      	ldr	r3, [r7, #4]
 80074ce:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80074d0:	6878      	ldr	r0, [r7, #4]
 80074d2:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 80074d4:	e12a      	b.n	800772c <HAL_DMA_IRQHandler+0xe0c>
          }
        }
      }
      else
      {
        if((ccr_reg & BDMA_CCR_CIRC) == 0U)
 80074d6:	693b      	ldr	r3, [r7, #16]
 80074d8:	f003 0320 	and.w	r3, r3, #32
 80074dc:	2b00      	cmp	r3, #0
 80074de:	f040 8089 	bne.w	80075f4 <HAL_DMA_IRQHandler+0xcd4>
        {
          /* Disable the transfer complete and error interrupt, if the DMA mode is not CIRCULAR */
          __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
 80074e2:	687b      	ldr	r3, [r7, #4]
 80074e4:	681b      	ldr	r3, [r3, #0]
 80074e6:	4a2b      	ldr	r2, [pc, #172]	@ (8007594 <HAL_DMA_IRQHandler+0xc74>)
 80074e8:	4293      	cmp	r3, r2
 80074ea:	d04a      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 80074ec:	687b      	ldr	r3, [r7, #4]
 80074ee:	681b      	ldr	r3, [r3, #0]
 80074f0:	4a29      	ldr	r2, [pc, #164]	@ (8007598 <HAL_DMA_IRQHandler+0xc78>)
 80074f2:	4293      	cmp	r3, r2
 80074f4:	d045      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 80074f6:	687b      	ldr	r3, [r7, #4]
 80074f8:	681b      	ldr	r3, [r3, #0]
 80074fa:	4a28      	ldr	r2, [pc, #160]	@ (800759c <HAL_DMA_IRQHandler+0xc7c>)
 80074fc:	4293      	cmp	r3, r2
 80074fe:	d040      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 8007500:	687b      	ldr	r3, [r7, #4]
 8007502:	681b      	ldr	r3, [r3, #0]
 8007504:	4a26      	ldr	r2, [pc, #152]	@ (80075a0 <HAL_DMA_IRQHandler+0xc80>)
 8007506:	4293      	cmp	r3, r2
 8007508:	d03b      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 800750a:	687b      	ldr	r3, [r7, #4]
 800750c:	681b      	ldr	r3, [r3, #0]
 800750e:	4a25      	ldr	r2, [pc, #148]	@ (80075a4 <HAL_DMA_IRQHandler+0xc84>)
 8007510:	4293      	cmp	r3, r2
 8007512:	d036      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 8007514:	687b      	ldr	r3, [r7, #4]
 8007516:	681b      	ldr	r3, [r3, #0]
 8007518:	4a23      	ldr	r2, [pc, #140]	@ (80075a8 <HAL_DMA_IRQHandler+0xc88>)
 800751a:	4293      	cmp	r3, r2
 800751c:	d031      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 800751e:	687b      	ldr	r3, [r7, #4]
 8007520:	681b      	ldr	r3, [r3, #0]
 8007522:	4a22      	ldr	r2, [pc, #136]	@ (80075ac <HAL_DMA_IRQHandler+0xc8c>)
 8007524:	4293      	cmp	r3, r2
 8007526:	d02c      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 8007528:	687b      	ldr	r3, [r7, #4]
 800752a:	681b      	ldr	r3, [r3, #0]
 800752c:	4a20      	ldr	r2, [pc, #128]	@ (80075b0 <HAL_DMA_IRQHandler+0xc90>)
 800752e:	4293      	cmp	r3, r2
 8007530:	d027      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 8007532:	687b      	ldr	r3, [r7, #4]
 8007534:	681b      	ldr	r3, [r3, #0]
 8007536:	4a1f      	ldr	r2, [pc, #124]	@ (80075b4 <HAL_DMA_IRQHandler+0xc94>)
 8007538:	4293      	cmp	r3, r2
 800753a:	d022      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 800753c:	687b      	ldr	r3, [r7, #4]
 800753e:	681b      	ldr	r3, [r3, #0]
 8007540:	4a1d      	ldr	r2, [pc, #116]	@ (80075b8 <HAL_DMA_IRQHandler+0xc98>)
 8007542:	4293      	cmp	r3, r2
 8007544:	d01d      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 8007546:	687b      	ldr	r3, [r7, #4]
 8007548:	681b      	ldr	r3, [r3, #0]
 800754a:	4a1c      	ldr	r2, [pc, #112]	@ (80075bc <HAL_DMA_IRQHandler+0xc9c>)
 800754c:	4293      	cmp	r3, r2
 800754e:	d018      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 8007550:	687b      	ldr	r3, [r7, #4]
 8007552:	681b      	ldr	r3, [r3, #0]
 8007554:	4a1a      	ldr	r2, [pc, #104]	@ (80075c0 <HAL_DMA_IRQHandler+0xca0>)
 8007556:	4293      	cmp	r3, r2
 8007558:	d013      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 800755a:	687b      	ldr	r3, [r7, #4]
 800755c:	681b      	ldr	r3, [r3, #0]
 800755e:	4a19      	ldr	r2, [pc, #100]	@ (80075c4 <HAL_DMA_IRQHandler+0xca4>)
 8007560:	4293      	cmp	r3, r2
 8007562:	d00e      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 8007564:	687b      	ldr	r3, [r7, #4]
 8007566:	681b      	ldr	r3, [r3, #0]
 8007568:	4a17      	ldr	r2, [pc, #92]	@ (80075c8 <HAL_DMA_IRQHandler+0xca8>)
 800756a:	4293      	cmp	r3, r2
 800756c:	d009      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 800756e:	687b      	ldr	r3, [r7, #4]
 8007570:	681b      	ldr	r3, [r3, #0]
 8007572:	4a16      	ldr	r2, [pc, #88]	@ (80075cc <HAL_DMA_IRQHandler+0xcac>)
 8007574:	4293      	cmp	r3, r2
 8007576:	d004      	beq.n	8007582 <HAL_DMA_IRQHandler+0xc62>
 8007578:	687b      	ldr	r3, [r7, #4]
 800757a:	681b      	ldr	r3, [r3, #0]
 800757c:	4a14      	ldr	r2, [pc, #80]	@ (80075d0 <HAL_DMA_IRQHandler+0xcb0>)
 800757e:	4293      	cmp	r3, r2
 8007580:	d128      	bne.n	80075d4 <HAL_DMA_IRQHandler+0xcb4>
 8007582:	687b      	ldr	r3, [r7, #4]
 8007584:	681b      	ldr	r3, [r3, #0]
 8007586:	681a      	ldr	r2, [r3, #0]
 8007588:	687b      	ldr	r3, [r7, #4]
 800758a:	681b      	ldr	r3, [r3, #0]
 800758c:	f022 0214 	bic.w	r2, r2, #20
 8007590:	601a      	str	r2, [r3, #0]
 8007592:	e027      	b.n	80075e4 <HAL_DMA_IRQHandler+0xcc4>
 8007594:	40020010 	.word	0x40020010
 8007598:	40020028 	.word	0x40020028
 800759c:	40020040 	.word	0x40020040
 80075a0:	40020058 	.word	0x40020058
 80075a4:	40020070 	.word	0x40020070
 80075a8:	40020088 	.word	0x40020088
 80075ac:	400200a0 	.word	0x400200a0
 80075b0:	400200b8 	.word	0x400200b8
 80075b4:	40020410 	.word	0x40020410
 80075b8:	40020428 	.word	0x40020428
 80075bc:	40020440 	.word	0x40020440
 80075c0:	40020458 	.word	0x40020458
 80075c4:	40020470 	.word	0x40020470
 80075c8:	40020488 	.word	0x40020488
 80075cc:	400204a0 	.word	0x400204a0
 80075d0:	400204b8 	.word	0x400204b8
 80075d4:	687b      	ldr	r3, [r7, #4]
 80075d6:	681b      	ldr	r3, [r3, #0]
 80075d8:	681a      	ldr	r2, [r3, #0]
 80075da:	687b      	ldr	r3, [r7, #4]
 80075dc:	681b      	ldr	r3, [r3, #0]
 80075de:	f022 020a 	bic.w	r2, r2, #10
 80075e2:	601a      	str	r2, [r3, #0]

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 80075e4:	687b      	ldr	r3, [r7, #4]
 80075e6:	2201      	movs	r2, #1
 80075e8:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          /* Process Unlocked */
          __HAL_UNLOCK(hdma);
 80075ec:	687b      	ldr	r3, [r7, #4]
 80075ee:	2200      	movs	r2, #0
 80075f0:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
        }

        if(hdma->XferCpltCallback != NULL)
 80075f4:	687b      	ldr	r3, [r7, #4]
 80075f6:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80075f8:	2b00      	cmp	r3, #0
 80075fa:	f000 8097 	beq.w	800772c <HAL_DMA_IRQHandler+0xe0c>
        {
          /* Transfer complete callback */
          hdma->XferCpltCallback(hdma);
 80075fe:	687b      	ldr	r3, [r7, #4]
 8007600:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007602:	6878      	ldr	r0, [r7, #4]
 8007604:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007606:	e091      	b.n	800772c <HAL_DMA_IRQHandler+0xe0c>
        }
      }
    }
    /* Transfer Error Interrupt management **************************************/
    else if (((tmpisr_bdma & (BDMA_FLAG_TE0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TEIE) != 0U))
 8007608:	687b      	ldr	r3, [r7, #4]
 800760a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800760c:	f003 031f 	and.w	r3, r3, #31
 8007610:	2208      	movs	r2, #8
 8007612:	409a      	lsls	r2, r3
 8007614:	697b      	ldr	r3, [r7, #20]
 8007616:	4013      	ands	r3, r2
 8007618:	2b00      	cmp	r3, #0
 800761a:	f000 8088 	beq.w	800772e <HAL_DMA_IRQHandler+0xe0e>
 800761e:	693b      	ldr	r3, [r7, #16]
 8007620:	f003 0308 	and.w	r3, r3, #8
 8007624:	2b00      	cmp	r3, #0
 8007626:	f000 8082 	beq.w	800772e <HAL_DMA_IRQHandler+0xe0e>
    {
      /* When a DMA transfer error occurs */
      /* A hardware clear of its EN bits is performed */
      /* Disable ALL DMA IT */
      __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 800762a:	687b      	ldr	r3, [r7, #4]
 800762c:	681b      	ldr	r3, [r3, #0]
 800762e:	4a41      	ldr	r2, [pc, #260]	@ (8007734 <HAL_DMA_IRQHandler+0xe14>)
 8007630:	4293      	cmp	r3, r2
 8007632:	d04a      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 8007634:	687b      	ldr	r3, [r7, #4]
 8007636:	681b      	ldr	r3, [r3, #0]
 8007638:	4a3f      	ldr	r2, [pc, #252]	@ (8007738 <HAL_DMA_IRQHandler+0xe18>)
 800763a:	4293      	cmp	r3, r2
 800763c:	d045      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 800763e:	687b      	ldr	r3, [r7, #4]
 8007640:	681b      	ldr	r3, [r3, #0]
 8007642:	4a3e      	ldr	r2, [pc, #248]	@ (800773c <HAL_DMA_IRQHandler+0xe1c>)
 8007644:	4293      	cmp	r3, r2
 8007646:	d040      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 8007648:	687b      	ldr	r3, [r7, #4]
 800764a:	681b      	ldr	r3, [r3, #0]
 800764c:	4a3c      	ldr	r2, [pc, #240]	@ (8007740 <HAL_DMA_IRQHandler+0xe20>)
 800764e:	4293      	cmp	r3, r2
 8007650:	d03b      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 8007652:	687b      	ldr	r3, [r7, #4]
 8007654:	681b      	ldr	r3, [r3, #0]
 8007656:	4a3b      	ldr	r2, [pc, #236]	@ (8007744 <HAL_DMA_IRQHandler+0xe24>)
 8007658:	4293      	cmp	r3, r2
 800765a:	d036      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 800765c:	687b      	ldr	r3, [r7, #4]
 800765e:	681b      	ldr	r3, [r3, #0]
 8007660:	4a39      	ldr	r2, [pc, #228]	@ (8007748 <HAL_DMA_IRQHandler+0xe28>)
 8007662:	4293      	cmp	r3, r2
 8007664:	d031      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 8007666:	687b      	ldr	r3, [r7, #4]
 8007668:	681b      	ldr	r3, [r3, #0]
 800766a:	4a38      	ldr	r2, [pc, #224]	@ (800774c <HAL_DMA_IRQHandler+0xe2c>)
 800766c:	4293      	cmp	r3, r2
 800766e:	d02c      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 8007670:	687b      	ldr	r3, [r7, #4]
 8007672:	681b      	ldr	r3, [r3, #0]
 8007674:	4a36      	ldr	r2, [pc, #216]	@ (8007750 <HAL_DMA_IRQHandler+0xe30>)
 8007676:	4293      	cmp	r3, r2
 8007678:	d027      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 800767a:	687b      	ldr	r3, [r7, #4]
 800767c:	681b      	ldr	r3, [r3, #0]
 800767e:	4a35      	ldr	r2, [pc, #212]	@ (8007754 <HAL_DMA_IRQHandler+0xe34>)
 8007680:	4293      	cmp	r3, r2
 8007682:	d022      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 8007684:	687b      	ldr	r3, [r7, #4]
 8007686:	681b      	ldr	r3, [r3, #0]
 8007688:	4a33      	ldr	r2, [pc, #204]	@ (8007758 <HAL_DMA_IRQHandler+0xe38>)
 800768a:	4293      	cmp	r3, r2
 800768c:	d01d      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 800768e:	687b      	ldr	r3, [r7, #4]
 8007690:	681b      	ldr	r3, [r3, #0]
 8007692:	4a32      	ldr	r2, [pc, #200]	@ (800775c <HAL_DMA_IRQHandler+0xe3c>)
 8007694:	4293      	cmp	r3, r2
 8007696:	d018      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 8007698:	687b      	ldr	r3, [r7, #4]
 800769a:	681b      	ldr	r3, [r3, #0]
 800769c:	4a30      	ldr	r2, [pc, #192]	@ (8007760 <HAL_DMA_IRQHandler+0xe40>)
 800769e:	4293      	cmp	r3, r2
 80076a0:	d013      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 80076a2:	687b      	ldr	r3, [r7, #4]
 80076a4:	681b      	ldr	r3, [r3, #0]
 80076a6:	4a2f      	ldr	r2, [pc, #188]	@ (8007764 <HAL_DMA_IRQHandler+0xe44>)
 80076a8:	4293      	cmp	r3, r2
 80076aa:	d00e      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 80076ac:	687b      	ldr	r3, [r7, #4]
 80076ae:	681b      	ldr	r3, [r3, #0]
 80076b0:	4a2d      	ldr	r2, [pc, #180]	@ (8007768 <HAL_DMA_IRQHandler+0xe48>)
 80076b2:	4293      	cmp	r3, r2
 80076b4:	d009      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 80076b6:	687b      	ldr	r3, [r7, #4]
 80076b8:	681b      	ldr	r3, [r3, #0]
 80076ba:	4a2c      	ldr	r2, [pc, #176]	@ (800776c <HAL_DMA_IRQHandler+0xe4c>)
 80076bc:	4293      	cmp	r3, r2
 80076be:	d004      	beq.n	80076ca <HAL_DMA_IRQHandler+0xdaa>
 80076c0:	687b      	ldr	r3, [r7, #4]
 80076c2:	681b      	ldr	r3, [r3, #0]
 80076c4:	4a2a      	ldr	r2, [pc, #168]	@ (8007770 <HAL_DMA_IRQHandler+0xe50>)
 80076c6:	4293      	cmp	r3, r2
 80076c8:	d108      	bne.n	80076dc <HAL_DMA_IRQHandler+0xdbc>
 80076ca:	687b      	ldr	r3, [r7, #4]
 80076cc:	681b      	ldr	r3, [r3, #0]
 80076ce:	681a      	ldr	r2, [r3, #0]
 80076d0:	687b      	ldr	r3, [r7, #4]
 80076d2:	681b      	ldr	r3, [r3, #0]
 80076d4:	f022 021c 	bic.w	r2, r2, #28
 80076d8:	601a      	str	r2, [r3, #0]
 80076da:	e007      	b.n	80076ec <HAL_DMA_IRQHandler+0xdcc>
 80076dc:	687b      	ldr	r3, [r7, #4]
 80076de:	681b      	ldr	r3, [r3, #0]
 80076e0:	681a      	ldr	r2, [r3, #0]
 80076e2:	687b      	ldr	r3, [r7, #4]
 80076e4:	681b      	ldr	r3, [r3, #0]
 80076e6:	f022 020e 	bic.w	r2, r2, #14
 80076ea:	601a      	str	r2, [r3, #0]

      /* Clear all flags */
      regs_bdma->IFCR = (BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU);
 80076ec:	687b      	ldr	r3, [r7, #4]
 80076ee:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80076f0:	f003 031f 	and.w	r3, r3, #31
 80076f4:	2201      	movs	r2, #1
 80076f6:	409a      	lsls	r2, r3
 80076f8:	69fb      	ldr	r3, [r7, #28]
 80076fa:	605a      	str	r2, [r3, #4]

      /* Update error code */
      hdma->ErrorCode = HAL_DMA_ERROR_TE;
 80076fc:	687b      	ldr	r3, [r7, #4]
 80076fe:	2201      	movs	r2, #1
 8007700:	655a      	str	r2, [r3, #84]	@ 0x54

      /* Change the DMA state */
      hdma->State = HAL_DMA_STATE_READY;
 8007702:	687b      	ldr	r3, [r7, #4]
 8007704:	2201      	movs	r2, #1
 8007706:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Process Unlocked */
      __HAL_UNLOCK(hdma);
 800770a:	687b      	ldr	r3, [r7, #4]
 800770c:	2200      	movs	r2, #0
 800770e:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

      if (hdma->XferErrorCallback != NULL)
 8007712:	687b      	ldr	r3, [r7, #4]
 8007714:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8007716:	2b00      	cmp	r3, #0
 8007718:	d009      	beq.n	800772e <HAL_DMA_IRQHandler+0xe0e>
      {
        /* Transfer error callback */
        hdma->XferErrorCallback(hdma);
 800771a:	687b      	ldr	r3, [r7, #4]
 800771c:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800771e:	6878      	ldr	r0, [r7, #4]
 8007720:	4798      	blx	r3
 8007722:	e004      	b.n	800772e <HAL_DMA_IRQHandler+0xe0e>
          return;
 8007724:	bf00      	nop
 8007726:	e002      	b.n	800772e <HAL_DMA_IRQHandler+0xe0e>
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007728:	bf00      	nop
 800772a:	e000      	b.n	800772e <HAL_DMA_IRQHandler+0xe0e>
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 800772c:	bf00      	nop
  }
  else
  {
    /* Nothing To Do */
  }
}
 800772e:	3728      	adds	r7, #40	@ 0x28
 8007730:	46bd      	mov	sp, r7
 8007732:	bd80      	pop	{r7, pc}
 8007734:	40020010 	.word	0x40020010
 8007738:	40020028 	.word	0x40020028
 800773c:	40020040 	.word	0x40020040
 8007740:	40020058 	.word	0x40020058
 8007744:	40020070 	.word	0x40020070
 8007748:	40020088 	.word	0x40020088
 800774c:	400200a0 	.word	0x400200a0
 8007750:	400200b8 	.word	0x400200b8
 8007754:	40020410 	.word	0x40020410
 8007758:	40020428 	.word	0x40020428
 800775c:	40020440 	.word	0x40020440
 8007760:	40020458 	.word	0x40020458
 8007764:	40020470 	.word	0x40020470
 8007768:	40020488 	.word	0x40020488
 800776c:	400204a0 	.word	0x400204a0
 8007770:	400204b8 	.word	0x400204b8

08007774 <DMA_CalcBaseAndBitshift>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval Stream base address
  */
static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
{
 8007774:	b480      	push	{r7}
 8007776:	b085      	sub	sp, #20
 8007778:	af00      	add	r7, sp, #0
 800777a:	6078      	str	r0, [r7, #4]
  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 800777c:	687b      	ldr	r3, [r7, #4]
 800777e:	681b      	ldr	r3, [r3, #0]
 8007780:	4a42      	ldr	r2, [pc, #264]	@ (800788c <DMA_CalcBaseAndBitshift+0x118>)
 8007782:	4293      	cmp	r3, r2
 8007784:	d04a      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 8007786:	687b      	ldr	r3, [r7, #4]
 8007788:	681b      	ldr	r3, [r3, #0]
 800778a:	4a41      	ldr	r2, [pc, #260]	@ (8007890 <DMA_CalcBaseAndBitshift+0x11c>)
 800778c:	4293      	cmp	r3, r2
 800778e:	d045      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 8007790:	687b      	ldr	r3, [r7, #4]
 8007792:	681b      	ldr	r3, [r3, #0]
 8007794:	4a3f      	ldr	r2, [pc, #252]	@ (8007894 <DMA_CalcBaseAndBitshift+0x120>)
 8007796:	4293      	cmp	r3, r2
 8007798:	d040      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 800779a:	687b      	ldr	r3, [r7, #4]
 800779c:	681b      	ldr	r3, [r3, #0]
 800779e:	4a3e      	ldr	r2, [pc, #248]	@ (8007898 <DMA_CalcBaseAndBitshift+0x124>)
 80077a0:	4293      	cmp	r3, r2
 80077a2:	d03b      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 80077a4:	687b      	ldr	r3, [r7, #4]
 80077a6:	681b      	ldr	r3, [r3, #0]
 80077a8:	4a3c      	ldr	r2, [pc, #240]	@ (800789c <DMA_CalcBaseAndBitshift+0x128>)
 80077aa:	4293      	cmp	r3, r2
 80077ac:	d036      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 80077ae:	687b      	ldr	r3, [r7, #4]
 80077b0:	681b      	ldr	r3, [r3, #0]
 80077b2:	4a3b      	ldr	r2, [pc, #236]	@ (80078a0 <DMA_CalcBaseAndBitshift+0x12c>)
 80077b4:	4293      	cmp	r3, r2
 80077b6:	d031      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 80077b8:	687b      	ldr	r3, [r7, #4]
 80077ba:	681b      	ldr	r3, [r3, #0]
 80077bc:	4a39      	ldr	r2, [pc, #228]	@ (80078a4 <DMA_CalcBaseAndBitshift+0x130>)
 80077be:	4293      	cmp	r3, r2
 80077c0:	d02c      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 80077c2:	687b      	ldr	r3, [r7, #4]
 80077c4:	681b      	ldr	r3, [r3, #0]
 80077c6:	4a38      	ldr	r2, [pc, #224]	@ (80078a8 <DMA_CalcBaseAndBitshift+0x134>)
 80077c8:	4293      	cmp	r3, r2
 80077ca:	d027      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 80077cc:	687b      	ldr	r3, [r7, #4]
 80077ce:	681b      	ldr	r3, [r3, #0]
 80077d0:	4a36      	ldr	r2, [pc, #216]	@ (80078ac <DMA_CalcBaseAndBitshift+0x138>)
 80077d2:	4293      	cmp	r3, r2
 80077d4:	d022      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 80077d6:	687b      	ldr	r3, [r7, #4]
 80077d8:	681b      	ldr	r3, [r3, #0]
 80077da:	4a35      	ldr	r2, [pc, #212]	@ (80078b0 <DMA_CalcBaseAndBitshift+0x13c>)
 80077dc:	4293      	cmp	r3, r2
 80077de:	d01d      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 80077e0:	687b      	ldr	r3, [r7, #4]
 80077e2:	681b      	ldr	r3, [r3, #0]
 80077e4:	4a33      	ldr	r2, [pc, #204]	@ (80078b4 <DMA_CalcBaseAndBitshift+0x140>)
 80077e6:	4293      	cmp	r3, r2
 80077e8:	d018      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 80077ea:	687b      	ldr	r3, [r7, #4]
 80077ec:	681b      	ldr	r3, [r3, #0]
 80077ee:	4a32      	ldr	r2, [pc, #200]	@ (80078b8 <DMA_CalcBaseAndBitshift+0x144>)
 80077f0:	4293      	cmp	r3, r2
 80077f2:	d013      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 80077f4:	687b      	ldr	r3, [r7, #4]
 80077f6:	681b      	ldr	r3, [r3, #0]
 80077f8:	4a30      	ldr	r2, [pc, #192]	@ (80078bc <DMA_CalcBaseAndBitshift+0x148>)
 80077fa:	4293      	cmp	r3, r2
 80077fc:	d00e      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 80077fe:	687b      	ldr	r3, [r7, #4]
 8007800:	681b      	ldr	r3, [r3, #0]
 8007802:	4a2f      	ldr	r2, [pc, #188]	@ (80078c0 <DMA_CalcBaseAndBitshift+0x14c>)
 8007804:	4293      	cmp	r3, r2
 8007806:	d009      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 8007808:	687b      	ldr	r3, [r7, #4]
 800780a:	681b      	ldr	r3, [r3, #0]
 800780c:	4a2d      	ldr	r2, [pc, #180]	@ (80078c4 <DMA_CalcBaseAndBitshift+0x150>)
 800780e:	4293      	cmp	r3, r2
 8007810:	d004      	beq.n	800781c <DMA_CalcBaseAndBitshift+0xa8>
 8007812:	687b      	ldr	r3, [r7, #4]
 8007814:	681b      	ldr	r3, [r3, #0]
 8007816:	4a2c      	ldr	r2, [pc, #176]	@ (80078c8 <DMA_CalcBaseAndBitshift+0x154>)
 8007818:	4293      	cmp	r3, r2
 800781a:	d101      	bne.n	8007820 <DMA_CalcBaseAndBitshift+0xac>
 800781c:	2301      	movs	r3, #1
 800781e:	e000      	b.n	8007822 <DMA_CalcBaseAndBitshift+0xae>
 8007820:	2300      	movs	r3, #0
 8007822:	2b00      	cmp	r3, #0
 8007824:	d024      	beq.n	8007870 <DMA_CalcBaseAndBitshift+0xfc>
  {
    uint32_t stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U;
 8007826:	687b      	ldr	r3, [r7, #4]
 8007828:	681b      	ldr	r3, [r3, #0]
 800782a:	b2db      	uxtb	r3, r3
 800782c:	3b10      	subs	r3, #16
 800782e:	4a27      	ldr	r2, [pc, #156]	@ (80078cc <DMA_CalcBaseAndBitshift+0x158>)
 8007830:	fba2 2303 	umull	r2, r3, r2, r3
 8007834:	091b      	lsrs	r3, r3, #4
 8007836:	60fb      	str	r3, [r7, #12]

    /* lookup table for necessary bitshift of flags within status registers */
    static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U};
    hdma->StreamIndex = flagBitshiftOffset[stream_number & 0x7U];
 8007838:	68fb      	ldr	r3, [r7, #12]
 800783a:	f003 0307 	and.w	r3, r3, #7
 800783e:	4a24      	ldr	r2, [pc, #144]	@ (80078d0 <DMA_CalcBaseAndBitshift+0x15c>)
 8007840:	5cd3      	ldrb	r3, [r2, r3]
 8007842:	461a      	mov	r2, r3
 8007844:	687b      	ldr	r3, [r7, #4]
 8007846:	65da      	str	r2, [r3, #92]	@ 0x5c

    if (stream_number > 3U)
 8007848:	68fb      	ldr	r3, [r7, #12]
 800784a:	2b03      	cmp	r3, #3
 800784c:	d908      	bls.n	8007860 <DMA_CalcBaseAndBitshift+0xec>
    {
      /* return pointer to HISR and HIFCR */
      hdma->StreamBaseAddress = (((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU)) + 4U);
 800784e:	687b      	ldr	r3, [r7, #4]
 8007850:	681b      	ldr	r3, [r3, #0]
 8007852:	461a      	mov	r2, r3
 8007854:	4b1f      	ldr	r3, [pc, #124]	@ (80078d4 <DMA_CalcBaseAndBitshift+0x160>)
 8007856:	4013      	ands	r3, r2
 8007858:	1d1a      	adds	r2, r3, #4
 800785a:	687b      	ldr	r3, [r7, #4]
 800785c:	659a      	str	r2, [r3, #88]	@ 0x58
 800785e:	e00d      	b.n	800787c <DMA_CalcBaseAndBitshift+0x108>
    }
    else
    {
      /* return pointer to LISR and LIFCR */
      hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU));
 8007860:	687b      	ldr	r3, [r7, #4]
 8007862:	681b      	ldr	r3, [r3, #0]
 8007864:	461a      	mov	r2, r3
 8007866:	4b1b      	ldr	r3, [pc, #108]	@ (80078d4 <DMA_CalcBaseAndBitshift+0x160>)
 8007868:	4013      	ands	r3, r2
 800786a:	687a      	ldr	r2, [r7, #4]
 800786c:	6593      	str	r3, [r2, #88]	@ 0x58
 800786e:	e005      	b.n	800787c <DMA_CalcBaseAndBitshift+0x108>
    }
  }
  else /* BDMA instance(s) */
  {
    /* return pointer to ISR and IFCR */
    hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0xFFU));
 8007870:	687b      	ldr	r3, [r7, #4]
 8007872:	681b      	ldr	r3, [r3, #0]
 8007874:	f023 02ff 	bic.w	r2, r3, #255	@ 0xff
 8007878:	687b      	ldr	r3, [r7, #4]
 800787a:	659a      	str	r2, [r3, #88]	@ 0x58
  }

  return hdma->StreamBaseAddress;
 800787c:	687b      	ldr	r3, [r7, #4]
 800787e:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
}
 8007880:	4618      	mov	r0, r3
 8007882:	3714      	adds	r7, #20
 8007884:	46bd      	mov	sp, r7
 8007886:	f85d 7b04 	ldr.w	r7, [sp], #4
 800788a:	4770      	bx	lr
 800788c:	40020010 	.word	0x40020010
 8007890:	40020028 	.word	0x40020028
 8007894:	40020040 	.word	0x40020040
 8007898:	40020058 	.word	0x40020058
 800789c:	40020070 	.word	0x40020070
 80078a0:	40020088 	.word	0x40020088
 80078a4:	400200a0 	.word	0x400200a0
 80078a8:	400200b8 	.word	0x400200b8
 80078ac:	40020410 	.word	0x40020410
 80078b0:	40020428 	.word	0x40020428
 80078b4:	40020440 	.word	0x40020440
 80078b8:	40020458 	.word	0x40020458
 80078bc:	40020470 	.word	0x40020470
 80078c0:	40020488 	.word	0x40020488
 80078c4:	400204a0 	.word	0x400204a0
 80078c8:	400204b8 	.word	0x400204b8
 80078cc:	aaaaaaab 	.word	0xaaaaaaab
 80078d0:	08030a8c 	.word	0x08030a8c
 80078d4:	fffffc00 	.word	0xfffffc00

080078d8 <DMA_CheckFifoParam>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma)
{
 80078d8:	b480      	push	{r7}
 80078da:	b085      	sub	sp, #20
 80078dc:	af00      	add	r7, sp, #0
 80078de:	6078      	str	r0, [r7, #4]
  HAL_StatusTypeDef status = HAL_OK;
 80078e0:	2300      	movs	r3, #0
 80078e2:	73fb      	strb	r3, [r7, #15]

  /* Memory Data size equal to Byte */
  if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE)
 80078e4:	687b      	ldr	r3, [r7, #4]
 80078e6:	699b      	ldr	r3, [r3, #24]
 80078e8:	2b00      	cmp	r3, #0
 80078ea:	d120      	bne.n	800792e <DMA_CheckFifoParam+0x56>
  {
    switch (hdma->Init.FIFOThreshold)
 80078ec:	687b      	ldr	r3, [r7, #4]
 80078ee:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80078f0:	2b03      	cmp	r3, #3
 80078f2:	d858      	bhi.n	80079a6 <DMA_CheckFifoParam+0xce>
 80078f4:	a201      	add	r2, pc, #4	@ (adr r2, 80078fc <DMA_CheckFifoParam+0x24>)
 80078f6:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80078fa:	bf00      	nop
 80078fc:	0800790d 	.word	0x0800790d
 8007900:	0800791f 	.word	0x0800791f
 8007904:	0800790d 	.word	0x0800790d
 8007908:	080079a7 	.word	0x080079a7
    {
      case DMA_FIFO_THRESHOLD_1QUARTERFULL:
      case DMA_FIFO_THRESHOLD_3QUARTERSFULL:

        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 800790c:	687b      	ldr	r3, [r7, #4]
 800790e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007910:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 8007914:	2b00      	cmp	r3, #0
 8007916:	d048      	beq.n	80079aa <DMA_CheckFifoParam+0xd2>
        {
          status = HAL_ERROR;
 8007918:	2301      	movs	r3, #1
 800791a:	73fb      	strb	r3, [r7, #15]
        }
        break;
 800791c:	e045      	b.n	80079aa <DMA_CheckFifoParam+0xd2>

      case DMA_FIFO_THRESHOLD_HALFFULL:
        if (hdma->Init.MemBurst == DMA_MBURST_INC16)
 800791e:	687b      	ldr	r3, [r7, #4]
 8007920:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007922:	f1b3 7fc0 	cmp.w	r3, #25165824	@ 0x1800000
 8007926:	d142      	bne.n	80079ae <DMA_CheckFifoParam+0xd6>
        {
          status = HAL_ERROR;
 8007928:	2301      	movs	r3, #1
 800792a:	73fb      	strb	r3, [r7, #15]
        }
        break;
 800792c:	e03f      	b.n	80079ae <DMA_CheckFifoParam+0xd6>
        break;
    }
  }

  /* Memory Data size equal to Half-Word */
  else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
 800792e:	687b      	ldr	r3, [r7, #4]
 8007930:	699b      	ldr	r3, [r3, #24]
 8007932:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 8007936:	d123      	bne.n	8007980 <DMA_CheckFifoParam+0xa8>
  {
    switch (hdma->Init.FIFOThreshold)
 8007938:	687b      	ldr	r3, [r7, #4]
 800793a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800793c:	2b03      	cmp	r3, #3
 800793e:	d838      	bhi.n	80079b2 <DMA_CheckFifoParam+0xda>
 8007940:	a201      	add	r2, pc, #4	@ (adr r2, 8007948 <DMA_CheckFifoParam+0x70>)
 8007942:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8007946:	bf00      	nop
 8007948:	08007959 	.word	0x08007959
 800794c:	0800795f 	.word	0x0800795f
 8007950:	08007959 	.word	0x08007959
 8007954:	08007971 	.word	0x08007971
    {
      case DMA_FIFO_THRESHOLD_1QUARTERFULL:
      case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
        status = HAL_ERROR;
 8007958:	2301      	movs	r3, #1
 800795a:	73fb      	strb	r3, [r7, #15]
        break;
 800795c:	e030      	b.n	80079c0 <DMA_CheckFifoParam+0xe8>

      case DMA_FIFO_THRESHOLD_HALFFULL:
        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 800795e:	687b      	ldr	r3, [r7, #4]
 8007960:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007962:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 8007966:	2b00      	cmp	r3, #0
 8007968:	d025      	beq.n	80079b6 <DMA_CheckFifoParam+0xde>
        {
          status = HAL_ERROR;
 800796a:	2301      	movs	r3, #1
 800796c:	73fb      	strb	r3, [r7, #15]
        }
        break;
 800796e:	e022      	b.n	80079b6 <DMA_CheckFifoParam+0xde>

      case DMA_FIFO_THRESHOLD_FULL:
        if (hdma->Init.MemBurst == DMA_MBURST_INC16)
 8007970:	687b      	ldr	r3, [r7, #4]
 8007972:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007974:	f1b3 7fc0 	cmp.w	r3, #25165824	@ 0x1800000
 8007978:	d11f      	bne.n	80079ba <DMA_CheckFifoParam+0xe2>
        {
          status = HAL_ERROR;
 800797a:	2301      	movs	r3, #1
 800797c:	73fb      	strb	r3, [r7, #15]
        }
        break;
 800797e:	e01c      	b.n	80079ba <DMA_CheckFifoParam+0xe2>
  }

  /* Memory Data size equal to Word */
  else
  {
    switch (hdma->Init.FIFOThreshold)
 8007980:	687b      	ldr	r3, [r7, #4]
 8007982:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8007984:	2b02      	cmp	r3, #2
 8007986:	d902      	bls.n	800798e <DMA_CheckFifoParam+0xb6>
 8007988:	2b03      	cmp	r3, #3
 800798a:	d003      	beq.n	8007994 <DMA_CheckFifoParam+0xbc>
          status = HAL_ERROR;
        }
    break;

      default:
        break;
 800798c:	e018      	b.n	80079c0 <DMA_CheckFifoParam+0xe8>
        status = HAL_ERROR;
 800798e:	2301      	movs	r3, #1
 8007990:	73fb      	strb	r3, [r7, #15]
        break;
 8007992:	e015      	b.n	80079c0 <DMA_CheckFifoParam+0xe8>
        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 8007994:	687b      	ldr	r3, [r7, #4]
 8007996:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007998:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 800799c:	2b00      	cmp	r3, #0
 800799e:	d00e      	beq.n	80079be <DMA_CheckFifoParam+0xe6>
          status = HAL_ERROR;
 80079a0:	2301      	movs	r3, #1
 80079a2:	73fb      	strb	r3, [r7, #15]
    break;
 80079a4:	e00b      	b.n	80079be <DMA_CheckFifoParam+0xe6>
        break;
 80079a6:	bf00      	nop
 80079a8:	e00a      	b.n	80079c0 <DMA_CheckFifoParam+0xe8>
        break;
 80079aa:	bf00      	nop
 80079ac:	e008      	b.n	80079c0 <DMA_CheckFifoParam+0xe8>
        break;
 80079ae:	bf00      	nop
 80079b0:	e006      	b.n	80079c0 <DMA_CheckFifoParam+0xe8>
        break;
 80079b2:	bf00      	nop
 80079b4:	e004      	b.n	80079c0 <DMA_CheckFifoParam+0xe8>
        break;
 80079b6:	bf00      	nop
 80079b8:	e002      	b.n	80079c0 <DMA_CheckFifoParam+0xe8>
        break;
 80079ba:	bf00      	nop
 80079bc:	e000      	b.n	80079c0 <DMA_CheckFifoParam+0xe8>
    break;
 80079be:	bf00      	nop
    }
  }

  return status;
 80079c0:	7bfb      	ldrb	r3, [r7, #15]
}
 80079c2:	4618      	mov	r0, r3
 80079c4:	3714      	adds	r7, #20
 80079c6:	46bd      	mov	sp, r7
 80079c8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80079cc:	4770      	bx	lr
 80079ce:	bf00      	nop

080079d0 <DMA_CalcDMAMUXChannelBaseAndMask>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma)
{
 80079d0:	b480      	push	{r7}
 80079d2:	b085      	sub	sp, #20
 80079d4:	af00      	add	r7, sp, #0
 80079d6:	6078      	str	r0, [r7, #4]
  uint32_t stream_number;
  uint32_t stream_baseaddress = (uint32_t)((uint32_t*)hdma->Instance);
 80079d8:	687b      	ldr	r3, [r7, #4]
 80079da:	681b      	ldr	r3, [r3, #0]
 80079dc:	60bb      	str	r3, [r7, #8]

  if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 80079de:	687b      	ldr	r3, [r7, #4]
 80079e0:	681b      	ldr	r3, [r3, #0]
 80079e2:	4a38      	ldr	r2, [pc, #224]	@ (8007ac4 <DMA_CalcDMAMUXChannelBaseAndMask+0xf4>)
 80079e4:	4293      	cmp	r3, r2
 80079e6:	d022      	beq.n	8007a2e <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 80079e8:	687b      	ldr	r3, [r7, #4]
 80079ea:	681b      	ldr	r3, [r3, #0]
 80079ec:	4a36      	ldr	r2, [pc, #216]	@ (8007ac8 <DMA_CalcDMAMUXChannelBaseAndMask+0xf8>)
 80079ee:	4293      	cmp	r3, r2
 80079f0:	d01d      	beq.n	8007a2e <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 80079f2:	687b      	ldr	r3, [r7, #4]
 80079f4:	681b      	ldr	r3, [r3, #0]
 80079f6:	4a35      	ldr	r2, [pc, #212]	@ (8007acc <DMA_CalcDMAMUXChannelBaseAndMask+0xfc>)
 80079f8:	4293      	cmp	r3, r2
 80079fa:	d018      	beq.n	8007a2e <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 80079fc:	687b      	ldr	r3, [r7, #4]
 80079fe:	681b      	ldr	r3, [r3, #0]
 8007a00:	4a33      	ldr	r2, [pc, #204]	@ (8007ad0 <DMA_CalcDMAMUXChannelBaseAndMask+0x100>)
 8007a02:	4293      	cmp	r3, r2
 8007a04:	d013      	beq.n	8007a2e <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007a06:	687b      	ldr	r3, [r7, #4]
 8007a08:	681b      	ldr	r3, [r3, #0]
 8007a0a:	4a32      	ldr	r2, [pc, #200]	@ (8007ad4 <DMA_CalcDMAMUXChannelBaseAndMask+0x104>)
 8007a0c:	4293      	cmp	r3, r2
 8007a0e:	d00e      	beq.n	8007a2e <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007a10:	687b      	ldr	r3, [r7, #4]
 8007a12:	681b      	ldr	r3, [r3, #0]
 8007a14:	4a30      	ldr	r2, [pc, #192]	@ (8007ad8 <DMA_CalcDMAMUXChannelBaseAndMask+0x108>)
 8007a16:	4293      	cmp	r3, r2
 8007a18:	d009      	beq.n	8007a2e <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007a1a:	687b      	ldr	r3, [r7, #4]
 8007a1c:	681b      	ldr	r3, [r3, #0]
 8007a1e:	4a2f      	ldr	r2, [pc, #188]	@ (8007adc <DMA_CalcDMAMUXChannelBaseAndMask+0x10c>)
 8007a20:	4293      	cmp	r3, r2
 8007a22:	d004      	beq.n	8007a2e <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007a24:	687b      	ldr	r3, [r7, #4]
 8007a26:	681b      	ldr	r3, [r3, #0]
 8007a28:	4a2d      	ldr	r2, [pc, #180]	@ (8007ae0 <DMA_CalcDMAMUXChannelBaseAndMask+0x110>)
 8007a2a:	4293      	cmp	r3, r2
 8007a2c:	d101      	bne.n	8007a32 <DMA_CalcDMAMUXChannelBaseAndMask+0x62>
 8007a2e:	2301      	movs	r3, #1
 8007a30:	e000      	b.n	8007a34 <DMA_CalcDMAMUXChannelBaseAndMask+0x64>
 8007a32:	2300      	movs	r3, #0
 8007a34:	2b00      	cmp	r3, #0
 8007a36:	d01a      	beq.n	8007a6e <DMA_CalcDMAMUXChannelBaseAndMask+0x9e>
  {
    /* BDMA Channels are connected to DMAMUX2 channels */
    stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 8U) / 20U;
 8007a38:	687b      	ldr	r3, [r7, #4]
 8007a3a:	681b      	ldr	r3, [r3, #0]
 8007a3c:	b2db      	uxtb	r3, r3
 8007a3e:	3b08      	subs	r3, #8
 8007a40:	4a28      	ldr	r2, [pc, #160]	@ (8007ae4 <DMA_CalcDMAMUXChannelBaseAndMask+0x114>)
 8007a42:	fba2 2303 	umull	r2, r3, r2, r3
 8007a46:	091b      	lsrs	r3, r3, #4
 8007a48:	60fb      	str	r3, [r7, #12]
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_Channel0) + (stream_number * 4U)));
 8007a4a:	68fa      	ldr	r2, [r7, #12]
 8007a4c:	4b26      	ldr	r3, [pc, #152]	@ (8007ae8 <DMA_CalcDMAMUXChannelBaseAndMask+0x118>)
 8007a4e:	4413      	add	r3, r2
 8007a50:	009b      	lsls	r3, r3, #2
 8007a52:	461a      	mov	r2, r3
 8007a54:	687b      	ldr	r3, [r7, #4]
 8007a56:	661a      	str	r2, [r3, #96]	@ 0x60
    hdma->DMAmuxChannelStatus = DMAMUX2_ChannelStatus;
 8007a58:	687b      	ldr	r3, [r7, #4]
 8007a5a:	4a24      	ldr	r2, [pc, #144]	@ (8007aec <DMA_CalcDMAMUXChannelBaseAndMask+0x11c>)
 8007a5c:	665a      	str	r2, [r3, #100]	@ 0x64
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
 8007a5e:	68fb      	ldr	r3, [r7, #12]
 8007a60:	f003 031f 	and.w	r3, r3, #31
 8007a64:	2201      	movs	r2, #1
 8007a66:	409a      	lsls	r2, r3
 8007a68:	687b      	ldr	r3, [r7, #4]
 8007a6a:	669a      	str	r2, [r3, #104]	@ 0x68
    }
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U)));
    hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
  }
}
 8007a6c:	e024      	b.n	8007ab8 <DMA_CalcDMAMUXChannelBaseAndMask+0xe8>
    stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U;
 8007a6e:	687b      	ldr	r3, [r7, #4]
 8007a70:	681b      	ldr	r3, [r3, #0]
 8007a72:	b2db      	uxtb	r3, r3
 8007a74:	3b10      	subs	r3, #16
 8007a76:	4a1e      	ldr	r2, [pc, #120]	@ (8007af0 <DMA_CalcDMAMUXChannelBaseAndMask+0x120>)
 8007a78:	fba2 2303 	umull	r2, r3, r2, r3
 8007a7c:	091b      	lsrs	r3, r3, #4
 8007a7e:	60fb      	str	r3, [r7, #12]
    if((stream_baseaddress <= ((uint32_t)DMA2_Stream7) ) && \
 8007a80:	68bb      	ldr	r3, [r7, #8]
 8007a82:	4a1c      	ldr	r2, [pc, #112]	@ (8007af4 <DMA_CalcDMAMUXChannelBaseAndMask+0x124>)
 8007a84:	4293      	cmp	r3, r2
 8007a86:	d806      	bhi.n	8007a96 <DMA_CalcDMAMUXChannelBaseAndMask+0xc6>
 8007a88:	68bb      	ldr	r3, [r7, #8]
 8007a8a:	4a1b      	ldr	r2, [pc, #108]	@ (8007af8 <DMA_CalcDMAMUXChannelBaseAndMask+0x128>)
 8007a8c:	4293      	cmp	r3, r2
 8007a8e:	d902      	bls.n	8007a96 <DMA_CalcDMAMUXChannelBaseAndMask+0xc6>
      stream_number += 8U;
 8007a90:	68fb      	ldr	r3, [r7, #12]
 8007a92:	3308      	adds	r3, #8
 8007a94:	60fb      	str	r3, [r7, #12]
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U)));
 8007a96:	68fa      	ldr	r2, [r7, #12]
 8007a98:	4b18      	ldr	r3, [pc, #96]	@ (8007afc <DMA_CalcDMAMUXChannelBaseAndMask+0x12c>)
 8007a9a:	4413      	add	r3, r2
 8007a9c:	009b      	lsls	r3, r3, #2
 8007a9e:	461a      	mov	r2, r3
 8007aa0:	687b      	ldr	r3, [r7, #4]
 8007aa2:	661a      	str	r2, [r3, #96]	@ 0x60
    hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
 8007aa4:	687b      	ldr	r3, [r7, #4]
 8007aa6:	4a16      	ldr	r2, [pc, #88]	@ (8007b00 <DMA_CalcDMAMUXChannelBaseAndMask+0x130>)
 8007aa8:	665a      	str	r2, [r3, #100]	@ 0x64
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
 8007aaa:	68fb      	ldr	r3, [r7, #12]
 8007aac:	f003 031f 	and.w	r3, r3, #31
 8007ab0:	2201      	movs	r2, #1
 8007ab2:	409a      	lsls	r2, r3
 8007ab4:	687b      	ldr	r3, [r7, #4]
 8007ab6:	669a      	str	r2, [r3, #104]	@ 0x68
}
 8007ab8:	bf00      	nop
 8007aba:	3714      	adds	r7, #20
 8007abc:	46bd      	mov	sp, r7
 8007abe:	f85d 7b04 	ldr.w	r7, [sp], #4
 8007ac2:	4770      	bx	lr
 8007ac4:	58025408 	.word	0x58025408
 8007ac8:	5802541c 	.word	0x5802541c
 8007acc:	58025430 	.word	0x58025430
 8007ad0:	58025444 	.word	0x58025444
 8007ad4:	58025458 	.word	0x58025458
 8007ad8:	5802546c 	.word	0x5802546c
 8007adc:	58025480 	.word	0x58025480
 8007ae0:	58025494 	.word	0x58025494
 8007ae4:	cccccccd 	.word	0xcccccccd
 8007ae8:	16009600 	.word	0x16009600
 8007aec:	58025880 	.word	0x58025880
 8007af0:	aaaaaaab 	.word	0xaaaaaaab
 8007af4:	400204b8 	.word	0x400204b8
 8007af8:	4002040f 	.word	0x4002040f
 8007afc:	10008200 	.word	0x10008200
 8007b00:	40020880 	.word	0x40020880

08007b04 <DMA_CalcDMAMUXRequestGenBaseAndMask>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma)
{
 8007b04:	b480      	push	{r7}
 8007b06:	b085      	sub	sp, #20
 8007b08:	af00      	add	r7, sp, #0
 8007b0a:	6078      	str	r0, [r7, #4]
  uint32_t request =  hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID;
 8007b0c:	687b      	ldr	r3, [r7, #4]
 8007b0e:	685b      	ldr	r3, [r3, #4]
 8007b10:	b2db      	uxtb	r3, r3
 8007b12:	60fb      	str	r3, [r7, #12]

  if((request >= DMA_REQUEST_GENERATOR0) && (request <= DMA_REQUEST_GENERATOR7))
 8007b14:	68fb      	ldr	r3, [r7, #12]
 8007b16:	2b00      	cmp	r3, #0
 8007b18:	d04a      	beq.n	8007bb0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xac>
 8007b1a:	68fb      	ldr	r3, [r7, #12]
 8007b1c:	2b08      	cmp	r3, #8
 8007b1e:	d847      	bhi.n	8007bb0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xac>
  {
    if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 8007b20:	687b      	ldr	r3, [r7, #4]
 8007b22:	681b      	ldr	r3, [r3, #0]
 8007b24:	4a25      	ldr	r2, [pc, #148]	@ (8007bbc <DMA_CalcDMAMUXRequestGenBaseAndMask+0xb8>)
 8007b26:	4293      	cmp	r3, r2
 8007b28:	d022      	beq.n	8007b70 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007b2a:	687b      	ldr	r3, [r7, #4]
 8007b2c:	681b      	ldr	r3, [r3, #0]
 8007b2e:	4a24      	ldr	r2, [pc, #144]	@ (8007bc0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xbc>)
 8007b30:	4293      	cmp	r3, r2
 8007b32:	d01d      	beq.n	8007b70 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007b34:	687b      	ldr	r3, [r7, #4]
 8007b36:	681b      	ldr	r3, [r3, #0]
 8007b38:	4a22      	ldr	r2, [pc, #136]	@ (8007bc4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc0>)
 8007b3a:	4293      	cmp	r3, r2
 8007b3c:	d018      	beq.n	8007b70 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007b3e:	687b      	ldr	r3, [r7, #4]
 8007b40:	681b      	ldr	r3, [r3, #0]
 8007b42:	4a21      	ldr	r2, [pc, #132]	@ (8007bc8 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc4>)
 8007b44:	4293      	cmp	r3, r2
 8007b46:	d013      	beq.n	8007b70 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007b48:	687b      	ldr	r3, [r7, #4]
 8007b4a:	681b      	ldr	r3, [r3, #0]
 8007b4c:	4a1f      	ldr	r2, [pc, #124]	@ (8007bcc <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc8>)
 8007b4e:	4293      	cmp	r3, r2
 8007b50:	d00e      	beq.n	8007b70 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007b52:	687b      	ldr	r3, [r7, #4]
 8007b54:	681b      	ldr	r3, [r3, #0]
 8007b56:	4a1e      	ldr	r2, [pc, #120]	@ (8007bd0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xcc>)
 8007b58:	4293      	cmp	r3, r2
 8007b5a:	d009      	beq.n	8007b70 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007b5c:	687b      	ldr	r3, [r7, #4]
 8007b5e:	681b      	ldr	r3, [r3, #0]
 8007b60:	4a1c      	ldr	r2, [pc, #112]	@ (8007bd4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd0>)
 8007b62:	4293      	cmp	r3, r2
 8007b64:	d004      	beq.n	8007b70 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007b66:	687b      	ldr	r3, [r7, #4]
 8007b68:	681b      	ldr	r3, [r3, #0]
 8007b6a:	4a1b      	ldr	r2, [pc, #108]	@ (8007bd8 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd4>)
 8007b6c:	4293      	cmp	r3, r2
 8007b6e:	d101      	bne.n	8007b74 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x70>
 8007b70:	2301      	movs	r3, #1
 8007b72:	e000      	b.n	8007b76 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x72>
 8007b74:	2300      	movs	r3, #0
 8007b76:	2b00      	cmp	r3, #0
 8007b78:	d00a      	beq.n	8007b90 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x8c>
    {
      /* BDMA Channels are connected to DMAMUX2 request generator blocks */
      hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_RequestGenerator0) + ((request - 1U) * 4U)));
 8007b7a:	68fa      	ldr	r2, [r7, #12]
 8007b7c:	4b17      	ldr	r3, [pc, #92]	@ (8007bdc <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd8>)
 8007b7e:	4413      	add	r3, r2
 8007b80:	009b      	lsls	r3, r3, #2
 8007b82:	461a      	mov	r2, r3
 8007b84:	687b      	ldr	r3, [r7, #4]
 8007b86:	66da      	str	r2, [r3, #108]	@ 0x6c

      hdma->DMAmuxRequestGenStatus = DMAMUX2_RequestGenStatus;
 8007b88:	687b      	ldr	r3, [r7, #4]
 8007b8a:	4a15      	ldr	r2, [pc, #84]	@ (8007be0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xdc>)
 8007b8c:	671a      	str	r2, [r3, #112]	@ 0x70
 8007b8e:	e009      	b.n	8007ba4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xa0>
    }
    else
    {
      /* DMA1 and DMA2 Streams use DMAMUX1 request generator blocks */
      hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenerator0) + ((request - 1U) * 4U)));
 8007b90:	68fa      	ldr	r2, [r7, #12]
 8007b92:	4b14      	ldr	r3, [pc, #80]	@ (8007be4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xe0>)
 8007b94:	4413      	add	r3, r2
 8007b96:	009b      	lsls	r3, r3, #2
 8007b98:	461a      	mov	r2, r3
 8007b9a:	687b      	ldr	r3, [r7, #4]
 8007b9c:	66da      	str	r2, [r3, #108]	@ 0x6c

      hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus;
 8007b9e:	687b      	ldr	r3, [r7, #4]
 8007ba0:	4a11      	ldr	r2, [pc, #68]	@ (8007be8 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xe4>)
 8007ba2:	671a      	str	r2, [r3, #112]	@ 0x70
    }

    hdma->DMAmuxRequestGenStatusMask = 1UL << (request - 1U);
 8007ba4:	68fb      	ldr	r3, [r7, #12]
 8007ba6:	3b01      	subs	r3, #1
 8007ba8:	2201      	movs	r2, #1
 8007baa:	409a      	lsls	r2, r3
 8007bac:	687b      	ldr	r3, [r7, #4]
 8007bae:	675a      	str	r2, [r3, #116]	@ 0x74
  }
}
 8007bb0:	bf00      	nop
 8007bb2:	3714      	adds	r7, #20
 8007bb4:	46bd      	mov	sp, r7
 8007bb6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8007bba:	4770      	bx	lr
 8007bbc:	58025408 	.word	0x58025408
 8007bc0:	5802541c 	.word	0x5802541c
 8007bc4:	58025430 	.word	0x58025430
 8007bc8:	58025444 	.word	0x58025444
 8007bcc:	58025458 	.word	0x58025458
 8007bd0:	5802546c 	.word	0x5802546c
 8007bd4:	58025480 	.word	0x58025480
 8007bd8:	58025494 	.word	0x58025494
 8007bdc:	1600963f 	.word	0x1600963f
 8007be0:	58025940 	.word	0x58025940
 8007be4:	1000823f 	.word	0x1000823f
 8007be8:	40020940 	.word	0x40020940

08007bec <HAL_ETH_Init>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
{
 8007bec:	b580      	push	{r7, lr}
 8007bee:	b084      	sub	sp, #16
 8007bf0:	af00      	add	r7, sp, #0
 8007bf2:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;

  if (heth == NULL)
 8007bf4:	687b      	ldr	r3, [r7, #4]
 8007bf6:	2b00      	cmp	r3, #0
 8007bf8:	d101      	bne.n	8007bfe <HAL_ETH_Init+0x12>
  {
    return HAL_ERROR;
 8007bfa:	2301      	movs	r3, #1
 8007bfc:	e0e3      	b.n	8007dc6 <HAL_ETH_Init+0x1da>
  }
  if (heth->gState == HAL_ETH_STATE_RESET)
 8007bfe:	687b      	ldr	r3, [r7, #4]
 8007c00:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8007c04:	2b00      	cmp	r3, #0
 8007c06:	d106      	bne.n	8007c16 <HAL_ETH_Init+0x2a>
  {
    heth->gState = HAL_ETH_STATE_BUSY;
 8007c08:	687b      	ldr	r3, [r7, #4]
 8007c0a:	2223      	movs	r2, #35	@ 0x23
 8007c0c:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* Init the low level hardware */
    heth->MspInitCallback(heth);
#else
    /* Init the low level hardware : GPIO, CLOCK, NVIC. */
    HAL_ETH_MspInit(heth);
 8007c10:	6878      	ldr	r0, [r7, #4]
 8007c12:	f008 fa03 	bl	801001c <HAL_ETH_MspInit>

#endif /* (USE_HAL_ETH_REGISTER_CALLBACKS) */
  }

  __HAL_RCC_SYSCFG_CLK_ENABLE();
 8007c16:	4b6e      	ldr	r3, [pc, #440]	@ (8007dd0 <HAL_ETH_Init+0x1e4>)
 8007c18:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8007c1c:	4a6c      	ldr	r2, [pc, #432]	@ (8007dd0 <HAL_ETH_Init+0x1e4>)
 8007c1e:	f043 0302 	orr.w	r3, r3, #2
 8007c22:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 8007c26:	4b6a      	ldr	r3, [pc, #424]	@ (8007dd0 <HAL_ETH_Init+0x1e4>)
 8007c28:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8007c2c:	f003 0302 	and.w	r3, r3, #2
 8007c30:	60bb      	str	r3, [r7, #8]
 8007c32:	68bb      	ldr	r3, [r7, #8]

  if (heth->Init.MediaInterface == HAL_ETH_MII_MODE)
 8007c34:	687b      	ldr	r3, [r7, #4]
 8007c36:	7a1b      	ldrb	r3, [r3, #8]
 8007c38:	2b00      	cmp	r3, #0
 8007c3a:	d103      	bne.n	8007c44 <HAL_ETH_Init+0x58>
  {
    HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_MII);
 8007c3c:	2000      	movs	r0, #0
 8007c3e:	f7fd fa3d 	bl	80050bc <HAL_SYSCFG_ETHInterfaceSelect>
 8007c42:	e003      	b.n	8007c4c <HAL_ETH_Init+0x60>
  }
  else
  {
    HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_RMII);
 8007c44:	f44f 0000 	mov.w	r0, #8388608	@ 0x800000
 8007c48:	f7fd fa38 	bl	80050bc <HAL_SYSCFG_ETHInterfaceSelect>
  }

  /* Dummy read to sync with ETH */
  (void)SYSCFG->PMCR;
 8007c4c:	4b61      	ldr	r3, [pc, #388]	@ (8007dd4 <HAL_ETH_Init+0x1e8>)
 8007c4e:	685b      	ldr	r3, [r3, #4]

  /* Ethernet Software reset */
  /* Set the SWR bit: resets all MAC subsystem internal registers and logic */
  /* After reset all the registers holds their respective reset values */
  SET_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR);
 8007c50:	687b      	ldr	r3, [r7, #4]
 8007c52:	681b      	ldr	r3, [r3, #0]
 8007c54:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007c58:	681b      	ldr	r3, [r3, #0]
 8007c5a:	687a      	ldr	r2, [r7, #4]
 8007c5c:	6812      	ldr	r2, [r2, #0]
 8007c5e:	f043 0301 	orr.w	r3, r3, #1
 8007c62:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007c66:	6013      	str	r3, [r2, #0]

  /* Get tick */
  tickstart = HAL_GetTick();
 8007c68:	f7fd f9ec 	bl	8005044 <HAL_GetTick>
 8007c6c:	60f8      	str	r0, [r7, #12]

  /* Wait for software reset */
  while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U)
 8007c6e:	e011      	b.n	8007c94 <HAL_ETH_Init+0xa8>
  {
    if (((HAL_GetTick() - tickstart) > ETH_SWRESET_TIMEOUT))
 8007c70:	f7fd f9e8 	bl	8005044 <HAL_GetTick>
 8007c74:	4602      	mov	r2, r0
 8007c76:	68fb      	ldr	r3, [r7, #12]
 8007c78:	1ad3      	subs	r3, r2, r3
 8007c7a:	f5b3 7ffa 	cmp.w	r3, #500	@ 0x1f4
 8007c7e:	d909      	bls.n	8007c94 <HAL_ETH_Init+0xa8>
    {
      /* Set Error Code */
      heth->ErrorCode = HAL_ETH_ERROR_TIMEOUT;
 8007c80:	687b      	ldr	r3, [r7, #4]
 8007c82:	2204      	movs	r2, #4
 8007c84:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
      /* Set State as Error */
      heth->gState = HAL_ETH_STATE_ERROR;
 8007c88:	687b      	ldr	r3, [r7, #4]
 8007c8a:	22e0      	movs	r2, #224	@ 0xe0
 8007c8c:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
      /* Return Error */
      return HAL_ERROR;
 8007c90:	2301      	movs	r3, #1
 8007c92:	e098      	b.n	8007dc6 <HAL_ETH_Init+0x1da>
  while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U)
 8007c94:	687b      	ldr	r3, [r7, #4]
 8007c96:	681b      	ldr	r3, [r3, #0]
 8007c98:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007c9c:	681b      	ldr	r3, [r3, #0]
 8007c9e:	f003 0301 	and.w	r3, r3, #1
 8007ca2:	2b00      	cmp	r3, #0
 8007ca4:	d1e4      	bne.n	8007c70 <HAL_ETH_Init+0x84>
    }
  }

  /*------------------ MDIO CSR Clock Range Configuration --------------------*/
  HAL_ETH_SetMDIOClockRange(heth);
 8007ca6:	6878      	ldr	r0, [r7, #4]
 8007ca8:	f000 ff1c 	bl	8008ae4 <HAL_ETH_SetMDIOClockRange>

  /*------------------ MAC LPI 1US Tic Counter Configuration --------------------*/
  WRITE_REG(heth->Instance->MAC1USTCR, (((uint32_t)HAL_RCC_GetHCLKFreq() / ETH_MAC_US_TICK) - 1U));
 8007cac:	f002 fe88 	bl	800a9c0 <HAL_RCC_GetHCLKFreq>
 8007cb0:	4603      	mov	r3, r0
 8007cb2:	4a49      	ldr	r2, [pc, #292]	@ (8007dd8 <HAL_ETH_Init+0x1ec>)
 8007cb4:	fba2 2303 	umull	r2, r3, r2, r3
 8007cb8:	0c9a      	lsrs	r2, r3, #18
 8007cba:	687b      	ldr	r3, [r7, #4]
 8007cbc:	681b      	ldr	r3, [r3, #0]
 8007cbe:	3a01      	subs	r2, #1
 8007cc0:	f8c3 20dc 	str.w	r2, [r3, #220]	@ 0xdc

  /*------------------ MAC, MTL and DMA default Configuration ----------------*/
  ETH_MACDMAConfig(heth);
 8007cc4:	6878      	ldr	r0, [r7, #4]
 8007cc6:	f001 f90d 	bl	8008ee4 <ETH_MACDMAConfig>

  /* SET DSL to 64 bit */
  MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_DSL, ETH_DMACCR_DSL_64BIT);
 8007cca:	687b      	ldr	r3, [r7, #4]
 8007ccc:	681b      	ldr	r3, [r3, #0]
 8007cce:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007cd2:	f8d3 3100 	ldr.w	r3, [r3, #256]	@ 0x100
 8007cd6:	f423 13e0 	bic.w	r3, r3, #1835008	@ 0x1c0000
 8007cda:	687a      	ldr	r2, [r7, #4]
 8007cdc:	6812      	ldr	r2, [r2, #0]
 8007cde:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 8007ce2:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007ce6:	f8c2 3100 	str.w	r3, [r2, #256]	@ 0x100

  /* Set Receive Buffers Length (must be a multiple of 4) */
  if ((heth->Init.RxBuffLen % 0x4U) != 0x0U)
 8007cea:	687b      	ldr	r3, [r7, #4]
 8007cec:	695b      	ldr	r3, [r3, #20]
 8007cee:	f003 0303 	and.w	r3, r3, #3
 8007cf2:	2b00      	cmp	r3, #0
 8007cf4:	d009      	beq.n	8007d0a <HAL_ETH_Init+0x11e>
  {
    /* Set Error Code */
    heth->ErrorCode = HAL_ETH_ERROR_PARAM;
 8007cf6:	687b      	ldr	r3, [r7, #4]
 8007cf8:	2201      	movs	r2, #1
 8007cfa:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    /* Set State as Error */
    heth->gState = HAL_ETH_STATE_ERROR;
 8007cfe:	687b      	ldr	r3, [r7, #4]
 8007d00:	22e0      	movs	r2, #224	@ 0xe0
 8007d02:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    /* Return Error */
    return HAL_ERROR;
 8007d06:	2301      	movs	r3, #1
 8007d08:	e05d      	b.n	8007dc6 <HAL_ETH_Init+0x1da>
  }
  else
  {
    MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_RBSZ, ((heth->Init.RxBuffLen) << 1));
 8007d0a:	687b      	ldr	r3, [r7, #4]
 8007d0c:	681b      	ldr	r3, [r3, #0]
 8007d0e:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007d12:	f8d3 2108 	ldr.w	r2, [r3, #264]	@ 0x108
 8007d16:	4b31      	ldr	r3, [pc, #196]	@ (8007ddc <HAL_ETH_Init+0x1f0>)
 8007d18:	4013      	ands	r3, r2
 8007d1a:	687a      	ldr	r2, [r7, #4]
 8007d1c:	6952      	ldr	r2, [r2, #20]
 8007d1e:	0051      	lsls	r1, r2, #1
 8007d20:	687a      	ldr	r2, [r7, #4]
 8007d22:	6812      	ldr	r2, [r2, #0]
 8007d24:	430b      	orrs	r3, r1
 8007d26:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007d2a:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108
  }

  /*------------------ DMA Tx Descriptors Configuration ----------------------*/
  ETH_DMATxDescListInit(heth);
 8007d2e:	6878      	ldr	r0, [r7, #4]
 8007d30:	f001 f975 	bl	800901e <ETH_DMATxDescListInit>

  /*------------------ DMA Rx Descriptors Configuration ----------------------*/
  ETH_DMARxDescListInit(heth);
 8007d34:	6878      	ldr	r0, [r7, #4]
 8007d36:	f001 f9bb 	bl	80090b0 <ETH_DMARxDescListInit>

  /*--------------------- ETHERNET MAC Address Configuration ------------------*/
  /* Set MAC addr bits 32 to 47 */
  heth->Instance->MACA0HR = (((uint32_t)(heth->Init.MACAddr[5]) << 8) | (uint32_t)heth->Init.MACAddr[4]);
 8007d3a:	687b      	ldr	r3, [r7, #4]
 8007d3c:	685b      	ldr	r3, [r3, #4]
 8007d3e:	3305      	adds	r3, #5
 8007d40:	781b      	ldrb	r3, [r3, #0]
 8007d42:	021a      	lsls	r2, r3, #8
 8007d44:	687b      	ldr	r3, [r7, #4]
 8007d46:	685b      	ldr	r3, [r3, #4]
 8007d48:	3304      	adds	r3, #4
 8007d4a:	781b      	ldrb	r3, [r3, #0]
 8007d4c:	4619      	mov	r1, r3
 8007d4e:	687b      	ldr	r3, [r7, #4]
 8007d50:	681b      	ldr	r3, [r3, #0]
 8007d52:	430a      	orrs	r2, r1
 8007d54:	f8c3 2300 	str.w	r2, [r3, #768]	@ 0x300
  /* Set MAC addr bits 0 to 31 */
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 8007d58:	687b      	ldr	r3, [r7, #4]
 8007d5a:	685b      	ldr	r3, [r3, #4]
 8007d5c:	3303      	adds	r3, #3
 8007d5e:	781b      	ldrb	r3, [r3, #0]
 8007d60:	061a      	lsls	r2, r3, #24
 8007d62:	687b      	ldr	r3, [r7, #4]
 8007d64:	685b      	ldr	r3, [r3, #4]
 8007d66:	3302      	adds	r3, #2
 8007d68:	781b      	ldrb	r3, [r3, #0]
 8007d6a:	041b      	lsls	r3, r3, #16
 8007d6c:	431a      	orrs	r2, r3
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 8007d6e:	687b      	ldr	r3, [r7, #4]
 8007d70:	685b      	ldr	r3, [r3, #4]
 8007d72:	3301      	adds	r3, #1
 8007d74:	781b      	ldrb	r3, [r3, #0]
 8007d76:	021b      	lsls	r3, r3, #8
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 8007d78:	431a      	orrs	r2, r3
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 8007d7a:	687b      	ldr	r3, [r7, #4]
 8007d7c:	685b      	ldr	r3, [r3, #4]
 8007d7e:	781b      	ldrb	r3, [r3, #0]
 8007d80:	4619      	mov	r1, r3
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 8007d82:	687b      	ldr	r3, [r7, #4]
 8007d84:	681b      	ldr	r3, [r3, #0]
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 8007d86:	430a      	orrs	r2, r1
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 8007d88:	f8c3 2304 	str.w	r2, [r3, #772]	@ 0x304

  /* Disable Rx MMC Interrupts */
  SET_BIT(heth->Instance->MMCRIMR, ETH_MMCRIMR_RXLPITRCIM | ETH_MMCRIMR_RXLPIUSCIM | \
 8007d8c:	687b      	ldr	r3, [r7, #4]
 8007d8e:	681b      	ldr	r3, [r3, #0]
 8007d90:	f8d3 170c 	ldr.w	r1, [r3, #1804]	@ 0x70c
 8007d94:	687b      	ldr	r3, [r7, #4]
 8007d96:	681a      	ldr	r2, [r3, #0]
 8007d98:	4b11      	ldr	r3, [pc, #68]	@ (8007de0 <HAL_ETH_Init+0x1f4>)
 8007d9a:	430b      	orrs	r3, r1
 8007d9c:	f8c2 370c 	str.w	r3, [r2, #1804]	@ 0x70c
          ETH_MMCRIMR_RXUCGPIM | ETH_MMCRIMR_RXALGNERPIM | ETH_MMCRIMR_RXCRCERPIM);

  /* Disable Tx MMC Interrupts */
  SET_BIT(heth->Instance->MMCTIMR, ETH_MMCTIMR_TXLPITRCIM | ETH_MMCTIMR_TXLPIUSCIM | \
 8007da0:	687b      	ldr	r3, [r7, #4]
 8007da2:	681b      	ldr	r3, [r3, #0]
 8007da4:	f8d3 1710 	ldr.w	r1, [r3, #1808]	@ 0x710
 8007da8:	687b      	ldr	r3, [r7, #4]
 8007daa:	681a      	ldr	r2, [r3, #0]
 8007dac:	4b0d      	ldr	r3, [pc, #52]	@ (8007de4 <HAL_ETH_Init+0x1f8>)
 8007dae:	430b      	orrs	r3, r1
 8007db0:	f8c2 3710 	str.w	r3, [r2, #1808]	@ 0x710
          ETH_MMCTIMR_TXGPKTIM | ETH_MMCTIMR_TXMCOLGPIM | ETH_MMCTIMR_TXSCOLGPIM);

  heth->ErrorCode = HAL_ETH_ERROR_NONE;
 8007db4:	687b      	ldr	r3, [r7, #4]
 8007db6:	2200      	movs	r2, #0
 8007db8:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
  heth->gState = HAL_ETH_STATE_READY;
 8007dbc:	687b      	ldr	r3, [r7, #4]
 8007dbe:	2210      	movs	r2, #16
 8007dc0:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 8007dc4:	2300      	movs	r3, #0
}
 8007dc6:	4618      	mov	r0, r3
 8007dc8:	3710      	adds	r7, #16
 8007dca:	46bd      	mov	sp, r7
 8007dcc:	bd80      	pop	{r7, pc}
 8007dce:	bf00      	nop
 8007dd0:	58024400 	.word	0x58024400
 8007dd4:	58000400 	.word	0x58000400
 8007dd8:	431bde83 	.word	0x431bde83
 8007ddc:	ffff8001 	.word	0xffff8001
 8007de0:	0c020060 	.word	0x0c020060
 8007de4:	0c20c000 	.word	0x0c20c000

08007de8 <HAL_ETH_Start_IT>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Start_IT(ETH_HandleTypeDef *heth)
{
 8007de8:	b580      	push	{r7, lr}
 8007dea:	b082      	sub	sp, #8
 8007dec:	af00      	add	r7, sp, #0
 8007dee:	6078      	str	r0, [r7, #4]
  if (heth->gState == HAL_ETH_STATE_READY)
 8007df0:	687b      	ldr	r3, [r7, #4]
 8007df2:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8007df6:	2b10      	cmp	r3, #16
 8007df8:	d165      	bne.n	8007ec6 <HAL_ETH_Start_IT+0xde>
  {
    heth->gState = HAL_ETH_STATE_BUSY;
 8007dfa:	687b      	ldr	r3, [r7, #4]
 8007dfc:	2223      	movs	r2, #35	@ 0x23
 8007dfe:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* save IT mode to ETH Handle */
    heth->RxDescList.ItMode = 1U;
 8007e02:	687b      	ldr	r3, [r7, #4]
 8007e04:	2201      	movs	r2, #1
 8007e06:	659a      	str	r2, [r3, #88]	@ 0x58

    /* Set number of descriptors to build */
    heth->RxDescList.RxBuildDescCnt = ETH_RX_DESC_CNT;
 8007e08:	687b      	ldr	r3, [r7, #4]
 8007e0a:	2204      	movs	r2, #4
 8007e0c:	66da      	str	r2, [r3, #108]	@ 0x6c

    /* Build all descriptors */
    ETH_UpdateDescriptor(heth);
 8007e0e:	6878      	ldr	r0, [r7, #4]
 8007e10:	f000 f9e4 	bl	80081dc <ETH_UpdateDescriptor>

    /* Enable the DMA transmission */
    SET_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
 8007e14:	687b      	ldr	r3, [r7, #4]
 8007e16:	681b      	ldr	r3, [r3, #0]
 8007e18:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007e1c:	f8d3 3104 	ldr.w	r3, [r3, #260]	@ 0x104
 8007e20:	687a      	ldr	r2, [r7, #4]
 8007e22:	6812      	ldr	r2, [r2, #0]
 8007e24:	f043 0301 	orr.w	r3, r3, #1
 8007e28:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007e2c:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

    /* Enable the DMA reception */
    SET_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
 8007e30:	687b      	ldr	r3, [r7, #4]
 8007e32:	681b      	ldr	r3, [r3, #0]
 8007e34:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007e38:	f8d3 3108 	ldr.w	r3, [r3, #264]	@ 0x108
 8007e3c:	687a      	ldr	r2, [r7, #4]
 8007e3e:	6812      	ldr	r2, [r2, #0]
 8007e40:	f043 0301 	orr.w	r3, r3, #1
 8007e44:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007e48:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108

    /* Clear Tx and Rx process stopped flags */
    heth->Instance->DMACSR |= (ETH_DMACSR_TPS | ETH_DMACSR_RPS);
 8007e4c:	687b      	ldr	r3, [r7, #4]
 8007e4e:	681b      	ldr	r3, [r3, #0]
 8007e50:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007e54:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 8007e58:	687a      	ldr	r2, [r7, #4]
 8007e5a:	6812      	ldr	r2, [r2, #0]
 8007e5c:	f443 7381 	orr.w	r3, r3, #258	@ 0x102
 8007e60:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007e64:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160

    /* Set the Flush Transmit FIFO bit */
    SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
 8007e68:	687b      	ldr	r3, [r7, #4]
 8007e6a:	681b      	ldr	r3, [r3, #0]
 8007e6c:	f8d3 2d00 	ldr.w	r2, [r3, #3328]	@ 0xd00
 8007e70:	687b      	ldr	r3, [r7, #4]
 8007e72:	681b      	ldr	r3, [r3, #0]
 8007e74:	f042 0201 	orr.w	r2, r2, #1
 8007e78:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

    /* Enable the MAC transmission */
    SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
 8007e7c:	687b      	ldr	r3, [r7, #4]
 8007e7e:	681b      	ldr	r3, [r3, #0]
 8007e80:	681a      	ldr	r2, [r3, #0]
 8007e82:	687b      	ldr	r3, [r7, #4]
 8007e84:	681b      	ldr	r3, [r3, #0]
 8007e86:	f042 0202 	orr.w	r2, r2, #2
 8007e8a:	601a      	str	r2, [r3, #0]

    /* Enable the MAC reception */
    SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
 8007e8c:	687b      	ldr	r3, [r7, #4]
 8007e8e:	681b      	ldr	r3, [r3, #0]
 8007e90:	681a      	ldr	r2, [r3, #0]
 8007e92:	687b      	ldr	r3, [r7, #4]
 8007e94:	681b      	ldr	r3, [r3, #0]
 8007e96:	f042 0201 	orr.w	r2, r2, #1
 8007e9a:	601a      	str	r2, [r3, #0]
    /* Enable ETH DMA interrupts:
    - Tx complete interrupt
    - Rx complete interrupt
    - Fatal bus interrupt
    */
    __HAL_ETH_DMA_ENABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE  |
 8007e9c:	687b      	ldr	r3, [r7, #4]
 8007e9e:	681b      	ldr	r3, [r3, #0]
 8007ea0:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007ea4:	f8d3 1134 	ldr.w	r1, [r3, #308]	@ 0x134
 8007ea8:	687b      	ldr	r3, [r7, #4]
 8007eaa:	681a      	ldr	r2, [r3, #0]
 8007eac:	f24d 03c1 	movw	r3, #53441	@ 0xd0c1
 8007eb0:	430b      	orrs	r3, r1
 8007eb2:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007eb6:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134
                                   ETH_DMACIER_FBEE | ETH_DMACIER_AIE | ETH_DMACIER_RBUE));

    heth->gState = HAL_ETH_STATE_STARTED;
 8007eba:	687b      	ldr	r3, [r7, #4]
 8007ebc:	2223      	movs	r2, #35	@ 0x23
 8007ebe:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    return HAL_OK;
 8007ec2:	2300      	movs	r3, #0
 8007ec4:	e000      	b.n	8007ec8 <HAL_ETH_Start_IT+0xe0>
  }
  else
  {
    return HAL_ERROR;
 8007ec6:	2301      	movs	r3, #1
  }
}
 8007ec8:	4618      	mov	r0, r3
 8007eca:	3708      	adds	r7, #8
 8007ecc:	46bd      	mov	sp, r7
 8007ece:	bd80      	pop	{r7, pc}

08007ed0 <HAL_ETH_Stop_IT>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Stop_IT(ETH_HandleTypeDef *heth)
{
 8007ed0:	b480      	push	{r7}
 8007ed2:	b085      	sub	sp, #20
 8007ed4:	af00      	add	r7, sp, #0
 8007ed6:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t descindex;

  if (heth->gState == HAL_ETH_STATE_STARTED)
 8007ed8:	687b      	ldr	r3, [r7, #4]
 8007eda:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8007ede:	2b23      	cmp	r3, #35	@ 0x23
 8007ee0:	d165      	bne.n	8007fae <HAL_ETH_Stop_IT+0xde>
  {
    /* Set the ETH peripheral state to BUSY */
    heth->gState = HAL_ETH_STATE_BUSY;
 8007ee2:	687b      	ldr	r3, [r7, #4]
 8007ee4:	2223      	movs	r2, #35	@ 0x23
 8007ee6:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    /* Disable interrupts:
    - Tx complete interrupt
    - Rx complete interrupt
    - Fatal bus interrupt
    */
    __HAL_ETH_DMA_DISABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE  |
 8007eea:	687b      	ldr	r3, [r7, #4]
 8007eec:	681b      	ldr	r3, [r3, #0]
 8007eee:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007ef2:	f8d3 1134 	ldr.w	r1, [r3, #308]	@ 0x134
 8007ef6:	687b      	ldr	r3, [r7, #4]
 8007ef8:	681a      	ldr	r2, [r3, #0]
 8007efa:	4b30      	ldr	r3, [pc, #192]	@ (8007fbc <HAL_ETH_Stop_IT+0xec>)
 8007efc:	400b      	ands	r3, r1
 8007efe:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007f02:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134
                                    ETH_DMACIER_FBEE | ETH_DMACIER_AIE | ETH_DMACIER_RBUE));

    /* Disable the DMA transmission */
    CLEAR_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
 8007f06:	687b      	ldr	r3, [r7, #4]
 8007f08:	681b      	ldr	r3, [r3, #0]
 8007f0a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007f0e:	f8d3 3104 	ldr.w	r3, [r3, #260]	@ 0x104
 8007f12:	687a      	ldr	r2, [r7, #4]
 8007f14:	6812      	ldr	r2, [r2, #0]
 8007f16:	f023 0301 	bic.w	r3, r3, #1
 8007f1a:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007f1e:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

    /* Disable the DMA reception */
    CLEAR_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
 8007f22:	687b      	ldr	r3, [r7, #4]
 8007f24:	681b      	ldr	r3, [r3, #0]
 8007f26:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007f2a:	f8d3 3108 	ldr.w	r3, [r3, #264]	@ 0x108
 8007f2e:	687a      	ldr	r2, [r7, #4]
 8007f30:	6812      	ldr	r2, [r2, #0]
 8007f32:	f023 0301 	bic.w	r3, r3, #1
 8007f36:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007f3a:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108

    /* Disable the MAC reception */
    CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
 8007f3e:	687b      	ldr	r3, [r7, #4]
 8007f40:	681b      	ldr	r3, [r3, #0]
 8007f42:	681a      	ldr	r2, [r3, #0]
 8007f44:	687b      	ldr	r3, [r7, #4]
 8007f46:	681b      	ldr	r3, [r3, #0]
 8007f48:	f022 0201 	bic.w	r2, r2, #1
 8007f4c:	601a      	str	r2, [r3, #0]

    /* Set the Flush Transmit FIFO bit */
    SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
 8007f4e:	687b      	ldr	r3, [r7, #4]
 8007f50:	681b      	ldr	r3, [r3, #0]
 8007f52:	f8d3 2d00 	ldr.w	r2, [r3, #3328]	@ 0xd00
 8007f56:	687b      	ldr	r3, [r7, #4]
 8007f58:	681b      	ldr	r3, [r3, #0]
 8007f5a:	f042 0201 	orr.w	r2, r2, #1
 8007f5e:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

    /* Disable the MAC transmission */
    CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
 8007f62:	687b      	ldr	r3, [r7, #4]
 8007f64:	681b      	ldr	r3, [r3, #0]
 8007f66:	681a      	ldr	r2, [r3, #0]
 8007f68:	687b      	ldr	r3, [r7, #4]
 8007f6a:	681b      	ldr	r3, [r3, #0]
 8007f6c:	f022 0202 	bic.w	r2, r2, #2
 8007f70:	601a      	str	r2, [r3, #0]

    /* Clear IOC bit to all Rx descriptors */
    for (descindex = 0; descindex < (uint32_t)ETH_RX_DESC_CNT; descindex++)
 8007f72:	2300      	movs	r3, #0
 8007f74:	60fb      	str	r3, [r7, #12]
 8007f76:	e00e      	b.n	8007f96 <HAL_ETH_Stop_IT+0xc6>
    {
      dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descindex];
 8007f78:	687b      	ldr	r3, [r7, #4]
 8007f7a:	68fa      	ldr	r2, [r7, #12]
 8007f7c:	3212      	adds	r2, #18
 8007f7e:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8007f82:	60bb      	str	r3, [r7, #8]
      CLEAR_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC);
 8007f84:	68bb      	ldr	r3, [r7, #8]
 8007f86:	68db      	ldr	r3, [r3, #12]
 8007f88:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 8007f8c:	68bb      	ldr	r3, [r7, #8]
 8007f8e:	60da      	str	r2, [r3, #12]
    for (descindex = 0; descindex < (uint32_t)ETH_RX_DESC_CNT; descindex++)
 8007f90:	68fb      	ldr	r3, [r7, #12]
 8007f92:	3301      	adds	r3, #1
 8007f94:	60fb      	str	r3, [r7, #12]
 8007f96:	68fb      	ldr	r3, [r7, #12]
 8007f98:	2b03      	cmp	r3, #3
 8007f9a:	d9ed      	bls.n	8007f78 <HAL_ETH_Stop_IT+0xa8>
    }

    heth->RxDescList.ItMode = 0U;
 8007f9c:	687b      	ldr	r3, [r7, #4]
 8007f9e:	2200      	movs	r2, #0
 8007fa0:	659a      	str	r2, [r3, #88]	@ 0x58

    heth->gState = HAL_ETH_STATE_READY;
 8007fa2:	687b      	ldr	r3, [r7, #4]
 8007fa4:	2210      	movs	r2, #16
 8007fa6:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* Return function status */
    return HAL_OK;
 8007faa:	2300      	movs	r3, #0
 8007fac:	e000      	b.n	8007fb0 <HAL_ETH_Stop_IT+0xe0>
  }
  else
  {
    return HAL_ERROR;
 8007fae:	2301      	movs	r3, #1
  }
}
 8007fb0:	4618      	mov	r0, r3
 8007fb2:	3714      	adds	r7, #20
 8007fb4:	46bd      	mov	sp, r7
 8007fb6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8007fba:	4770      	bx	lr
 8007fbc:	ffff2f3e 	.word	0xffff2f3e

08007fc0 <HAL_ETH_Transmit_IT>:
  *         the configuration information for ETHERNET module
  * @param  pTxConfig: Hold the configuration of packet to be transmitted
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Transmit_IT(ETH_HandleTypeDef *heth, ETH_TxPacketConfigTypeDef *pTxConfig)
{
 8007fc0:	b580      	push	{r7, lr}
 8007fc2:	b082      	sub	sp, #8
 8007fc4:	af00      	add	r7, sp, #0
 8007fc6:	6078      	str	r0, [r7, #4]
 8007fc8:	6039      	str	r1, [r7, #0]
  if (pTxConfig == NULL)
 8007fca:	683b      	ldr	r3, [r7, #0]
 8007fcc:	2b00      	cmp	r3, #0
 8007fce:	d109      	bne.n	8007fe4 <HAL_ETH_Transmit_IT+0x24>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_PARAM;
 8007fd0:	687b      	ldr	r3, [r7, #4]
 8007fd2:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8007fd6:	f043 0201 	orr.w	r2, r3, #1
 8007fda:	687b      	ldr	r3, [r7, #4]
 8007fdc:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    return HAL_ERROR;
 8007fe0:	2301      	movs	r3, #1
 8007fe2:	e03a      	b.n	800805a <HAL_ETH_Transmit_IT+0x9a>
  }

  if (heth->gState == HAL_ETH_STATE_STARTED)
 8007fe4:	687b      	ldr	r3, [r7, #4]
 8007fe6:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8007fea:	2b23      	cmp	r3, #35	@ 0x23
 8007fec:	d134      	bne.n	8008058 <HAL_ETH_Transmit_IT+0x98>
  {
    /* Save the packet pointer to release.  */
    heth->TxDescList.CurrentPacketAddress = (uint32_t *)pTxConfig->pData;
 8007fee:	683b      	ldr	r3, [r7, #0]
 8007ff0:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 8007ff2:	687b      	ldr	r3, [r7, #4]
 8007ff4:	63da      	str	r2, [r3, #60]	@ 0x3c

    /* Config DMA Tx descriptor by Tx Packet info */
    if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 1) != HAL_ETH_ERROR_NONE)
 8007ff6:	2201      	movs	r2, #1
 8007ff8:	6839      	ldr	r1, [r7, #0]
 8007ffa:	6878      	ldr	r0, [r7, #4]
 8007ffc:	f001 f8b6 	bl	800916c <ETH_Prepare_Tx_Descriptors>
 8008000:	4603      	mov	r3, r0
 8008002:	2b00      	cmp	r3, #0
 8008004:	d009      	beq.n	800801a <HAL_ETH_Transmit_IT+0x5a>
    {
      heth->ErrorCode |= HAL_ETH_ERROR_BUSY;
 8008006:	687b      	ldr	r3, [r7, #4]
 8008008:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800800c:	f043 0202 	orr.w	r2, r3, #2
 8008010:	687b      	ldr	r3, [r7, #4]
 8008012:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
      return HAL_ERROR;
 8008016:	2301      	movs	r3, #1
 8008018:	e01f      	b.n	800805a <HAL_ETH_Transmit_IT+0x9a>
  __ASM volatile ("dsb 0xF":::"memory");
 800801a:	f3bf 8f4f 	dsb	sy
}
 800801e:	bf00      	nop

    /* Ensure completion of descriptor preparation before transmission start */
    __DSB();

    /* Incr current tx desc index */
    INCR_TX_DESC_INDEX(heth->TxDescList.CurTxDesc, 1U);
 8008020:	687b      	ldr	r3, [r7, #4]
 8008022:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8008024:	1c5a      	adds	r2, r3, #1
 8008026:	687b      	ldr	r3, [r7, #4]
 8008028:	629a      	str	r2, [r3, #40]	@ 0x28
 800802a:	687b      	ldr	r3, [r7, #4]
 800802c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800802e:	2b03      	cmp	r3, #3
 8008030:	d904      	bls.n	800803c <HAL_ETH_Transmit_IT+0x7c>
 8008032:	687b      	ldr	r3, [r7, #4]
 8008034:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8008036:	1f1a      	subs	r2, r3, #4
 8008038:	687b      	ldr	r3, [r7, #4]
 800803a:	629a      	str	r2, [r3, #40]	@ 0x28

    /* Start transmission */
    /* issue a poll command to Tx DMA by writing address of next immediate free descriptor */
    WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t)(heth->TxDescList.TxDesc[heth->TxDescList.CurTxDesc]));
 800803c:	687b      	ldr	r3, [r7, #4]
 800803e:	6a99      	ldr	r1, [r3, #40]	@ 0x28
 8008040:	687b      	ldr	r3, [r7, #4]
 8008042:	681a      	ldr	r2, [r3, #0]
 8008044:	687b      	ldr	r3, [r7, #4]
 8008046:	3106      	adds	r1, #6
 8008048:	f853 3021 	ldr.w	r3, [r3, r1, lsl #2]
 800804c:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008050:	f8c2 3120 	str.w	r3, [r2, #288]	@ 0x120

    return HAL_OK;
 8008054:	2300      	movs	r3, #0
 8008056:	e000      	b.n	800805a <HAL_ETH_Transmit_IT+0x9a>

  }
  else
  {
    return HAL_ERROR;
 8008058:	2301      	movs	r3, #1
  }
}
 800805a:	4618      	mov	r0, r3
 800805c:	3708      	adds	r7, #8
 800805e:	46bd      	mov	sp, r7
 8008060:	bd80      	pop	{r7, pc}

08008062 <HAL_ETH_ReadData>:
  *         the configuration information for ETHERNET module
  * @param  pAppBuff: Pointer to an application buffer to receive the packet.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReadData(ETH_HandleTypeDef *heth, void **pAppBuff)
{
 8008062:	b580      	push	{r7, lr}
 8008064:	b088      	sub	sp, #32
 8008066:	af00      	add	r7, sp, #0
 8008068:	6078      	str	r0, [r7, #4]
 800806a:	6039      	str	r1, [r7, #0]
  uint32_t descidx;
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t desccnt = 0U;
 800806c:	2300      	movs	r3, #0
 800806e:	617b      	str	r3, [r7, #20]
  uint32_t desccntmax;
  uint32_t bufflength;
  uint8_t rxdataready = 0U;
 8008070:	2300      	movs	r3, #0
 8008072:	74fb      	strb	r3, [r7, #19]

  if (pAppBuff == NULL)
 8008074:	683b      	ldr	r3, [r7, #0]
 8008076:	2b00      	cmp	r3, #0
 8008078:	d109      	bne.n	800808e <HAL_ETH_ReadData+0x2c>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_PARAM;
 800807a:	687b      	ldr	r3, [r7, #4]
 800807c:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8008080:	f043 0201 	orr.w	r2, r3, #1
 8008084:	687b      	ldr	r3, [r7, #4]
 8008086:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    return HAL_ERROR;
 800808a:	2301      	movs	r3, #1
 800808c:	e0a2      	b.n	80081d4 <HAL_ETH_ReadData+0x172>
  }

  if (heth->gState != HAL_ETH_STATE_STARTED)
 800808e:	687b      	ldr	r3, [r7, #4]
 8008090:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8008094:	2b23      	cmp	r3, #35	@ 0x23
 8008096:	d001      	beq.n	800809c <HAL_ETH_ReadData+0x3a>
  {
    return HAL_ERROR;
 8008098:	2301      	movs	r3, #1
 800809a:	e09b      	b.n	80081d4 <HAL_ETH_ReadData+0x172>
  }

  descidx = heth->RxDescList.RxDescIdx;
 800809c:	687b      	ldr	r3, [r7, #4]
 800809e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80080a0:	61fb      	str	r3, [r7, #28]
  dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 80080a2:	687b      	ldr	r3, [r7, #4]
 80080a4:	69fa      	ldr	r2, [r7, #28]
 80080a6:	3212      	adds	r2, #18
 80080a8:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80080ac:	61bb      	str	r3, [r7, #24]
  desccntmax = ETH_RX_DESC_CNT - heth->RxDescList.RxBuildDescCnt;
 80080ae:	687b      	ldr	r3, [r7, #4]
 80080b0:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80080b2:	f1c3 0304 	rsb	r3, r3, #4
 80080b6:	60fb      	str	r3, [r7, #12]

  /* Check if descriptor is not owned by DMA */
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 80080b8:	e064      	b.n	8008184 <HAL_ETH_ReadData+0x122>
         && (rxdataready == 0U))
  {
    if (READ_BIT(dmarxdesc->DESC3,  ETH_DMARXNDESCWBF_CTXT)  != (uint32_t)RESET)
 80080ba:	69bb      	ldr	r3, [r7, #24]
 80080bc:	68db      	ldr	r3, [r3, #12]
 80080be:	f003 4380 	and.w	r3, r3, #1073741824	@ 0x40000000
 80080c2:	2b00      	cmp	r3, #0
 80080c4:	d007      	beq.n	80080d6 <HAL_ETH_ReadData+0x74>
    {
      /* Get timestamp high */
      heth->RxDescList.TimeStamp.TimeStampHigh = dmarxdesc->DESC1;
 80080c6:	69bb      	ldr	r3, [r7, #24]
 80080c8:	685a      	ldr	r2, [r3, #4]
 80080ca:	687b      	ldr	r3, [r7, #4]
 80080cc:	679a      	str	r2, [r3, #120]	@ 0x78
      /* Get timestamp low */
      heth->RxDescList.TimeStamp.TimeStampLow  = dmarxdesc->DESC0;
 80080ce:	69bb      	ldr	r3, [r7, #24]
 80080d0:	681a      	ldr	r2, [r3, #0]
 80080d2:	687b      	ldr	r3, [r7, #4]
 80080d4:	675a      	str	r2, [r3, #116]	@ 0x74
    }
    if ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) || (heth->RxDescList.pRxStart != NULL))
 80080d6:	69bb      	ldr	r3, [r7, #24]
 80080d8:	68db      	ldr	r3, [r3, #12]
 80080da:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 80080de:	2b00      	cmp	r3, #0
 80080e0:	d103      	bne.n	80080ea <HAL_ETH_ReadData+0x88>
 80080e2:	687b      	ldr	r3, [r7, #4]
 80080e4:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 80080e6:	2b00      	cmp	r3, #0
 80080e8:	d03a      	beq.n	8008160 <HAL_ETH_ReadData+0xfe>
    {
      /* Check if first descriptor */
      if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET)
 80080ea:	69bb      	ldr	r3, [r7, #24]
 80080ec:	68db      	ldr	r3, [r3, #12]
 80080ee:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 80080f2:	2b00      	cmp	r3, #0
 80080f4:	d005      	beq.n	8008102 <HAL_ETH_ReadData+0xa0>
      {
        heth->RxDescList.RxDescCnt = 0;
 80080f6:	687b      	ldr	r3, [r7, #4]
 80080f8:	2200      	movs	r2, #0
 80080fa:	661a      	str	r2, [r3, #96]	@ 0x60
        heth->RxDescList.RxDataLength = 0;
 80080fc:	687b      	ldr	r3, [r7, #4]
 80080fe:	2200      	movs	r2, #0
 8008100:	665a      	str	r2, [r3, #100]	@ 0x64
      }

      /* Get the Frame Length of the received packet: substruct 4 bytes of the CRC */
      bufflength = READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_PL) - heth->RxDescList.RxDataLength;
 8008102:	69bb      	ldr	r3, [r7, #24]
 8008104:	68db      	ldr	r3, [r3, #12]
 8008106:	f3c3 020e 	ubfx	r2, r3, #0, #15
 800810a:	687b      	ldr	r3, [r7, #4]
 800810c:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800810e:	1ad3      	subs	r3, r2, r3
 8008110:	60bb      	str	r3, [r7, #8]

      /* Check if last descriptor */
      if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_LD) != (uint32_t)RESET)
 8008112:	69bb      	ldr	r3, [r7, #24]
 8008114:	68db      	ldr	r3, [r3, #12]
 8008116:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 800811a:	2b00      	cmp	r3, #0
 800811c:	d005      	beq.n	800812a <HAL_ETH_ReadData+0xc8>
      {
        /* Save Last descriptor index */
        heth->RxDescList.pRxLastRxDesc = dmarxdesc->DESC3;
 800811e:	69bb      	ldr	r3, [r7, #24]
 8008120:	68da      	ldr	r2, [r3, #12]
 8008122:	687b      	ldr	r3, [r7, #4]
 8008124:	671a      	str	r2, [r3, #112]	@ 0x70

        /* Packet ready */
        rxdataready = 1;
 8008126:	2301      	movs	r3, #1
 8008128:	74fb      	strb	r3, [r7, #19]
      /*Call registered Link callback*/
      heth->rxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
                           (uint8_t *)dmarxdesc->BackupAddr0, bufflength);
#else
      /* Link callback */
      HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
 800812a:	687b      	ldr	r3, [r7, #4]
 800812c:	f103 007c 	add.w	r0, r3, #124	@ 0x7c
 8008130:	687b      	ldr	r3, [r7, #4]
 8008132:	f103 0180 	add.w	r1, r3, #128	@ 0x80
                             (uint8_t *)dmarxdesc->BackupAddr0, (uint16_t) bufflength);
 8008136:	69bb      	ldr	r3, [r7, #24]
 8008138:	691b      	ldr	r3, [r3, #16]
      HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
 800813a:	461a      	mov	r2, r3
 800813c:	68bb      	ldr	r3, [r7, #8]
 800813e:	b29b      	uxth	r3, r3
 8008140:	f008 f96e 	bl	8010420 <HAL_ETH_RxLinkCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
      heth->RxDescList.RxDescCnt++;
 8008144:	687b      	ldr	r3, [r7, #4]
 8008146:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8008148:	1c5a      	adds	r2, r3, #1
 800814a:	687b      	ldr	r3, [r7, #4]
 800814c:	661a      	str	r2, [r3, #96]	@ 0x60
      heth->RxDescList.RxDataLength += bufflength;
 800814e:	687b      	ldr	r3, [r7, #4]
 8008150:	6e5a      	ldr	r2, [r3, #100]	@ 0x64
 8008152:	68bb      	ldr	r3, [r7, #8]
 8008154:	441a      	add	r2, r3
 8008156:	687b      	ldr	r3, [r7, #4]
 8008158:	665a      	str	r2, [r3, #100]	@ 0x64

      /* Clear buffer pointer */
      dmarxdesc->BackupAddr0 = 0;
 800815a:	69bb      	ldr	r3, [r7, #24]
 800815c:	2200      	movs	r2, #0
 800815e:	611a      	str	r2, [r3, #16]
    }

    /* Increment current rx descriptor index */
    INCR_RX_DESC_INDEX(descidx, 1U);
 8008160:	69fb      	ldr	r3, [r7, #28]
 8008162:	3301      	adds	r3, #1
 8008164:	61fb      	str	r3, [r7, #28]
 8008166:	69fb      	ldr	r3, [r7, #28]
 8008168:	2b03      	cmp	r3, #3
 800816a:	d902      	bls.n	8008172 <HAL_ETH_ReadData+0x110>
 800816c:	69fb      	ldr	r3, [r7, #28]
 800816e:	3b04      	subs	r3, #4
 8008170:	61fb      	str	r3, [r7, #28]
    /* Get current descriptor address */
    dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 8008172:	687b      	ldr	r3, [r7, #4]
 8008174:	69fa      	ldr	r2, [r7, #28]
 8008176:	3212      	adds	r2, #18
 8008178:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 800817c:	61bb      	str	r3, [r7, #24]
    desccnt++;
 800817e:	697b      	ldr	r3, [r7, #20]
 8008180:	3301      	adds	r3, #1
 8008182:	617b      	str	r3, [r7, #20]
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 8008184:	69bb      	ldr	r3, [r7, #24]
 8008186:	68db      	ldr	r3, [r3, #12]
         && (rxdataready == 0U))
 8008188:	2b00      	cmp	r3, #0
 800818a:	db06      	blt.n	800819a <HAL_ETH_ReadData+0x138>
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 800818c:	697a      	ldr	r2, [r7, #20]
 800818e:	68fb      	ldr	r3, [r7, #12]
 8008190:	429a      	cmp	r2, r3
 8008192:	d202      	bcs.n	800819a <HAL_ETH_ReadData+0x138>
         && (rxdataready == 0U))
 8008194:	7cfb      	ldrb	r3, [r7, #19]
 8008196:	2b00      	cmp	r3, #0
 8008198:	d08f      	beq.n	80080ba <HAL_ETH_ReadData+0x58>
  }

  heth->RxDescList.RxBuildDescCnt += desccnt;
 800819a:	687b      	ldr	r3, [r7, #4]
 800819c:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 800819e:	697b      	ldr	r3, [r7, #20]
 80081a0:	441a      	add	r2, r3
 80081a2:	687b      	ldr	r3, [r7, #4]
 80081a4:	66da      	str	r2, [r3, #108]	@ 0x6c
  if ((heth->RxDescList.RxBuildDescCnt) != 0U)
 80081a6:	687b      	ldr	r3, [r7, #4]
 80081a8:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80081aa:	2b00      	cmp	r3, #0
 80081ac:	d002      	beq.n	80081b4 <HAL_ETH_ReadData+0x152>
  {
    /* Update Descriptors */
    ETH_UpdateDescriptor(heth);
 80081ae:	6878      	ldr	r0, [r7, #4]
 80081b0:	f000 f814 	bl	80081dc <ETH_UpdateDescriptor>
  }

  heth->RxDescList.RxDescIdx = descidx;
 80081b4:	687b      	ldr	r3, [r7, #4]
 80081b6:	69fa      	ldr	r2, [r7, #28]
 80081b8:	65da      	str	r2, [r3, #92]	@ 0x5c

  if (rxdataready == 1U)
 80081ba:	7cfb      	ldrb	r3, [r7, #19]
 80081bc:	2b01      	cmp	r3, #1
 80081be:	d108      	bne.n	80081d2 <HAL_ETH_ReadData+0x170>
  {
    /* Return received packet */
    *pAppBuff = heth->RxDescList.pRxStart;
 80081c0:	687b      	ldr	r3, [r7, #4]
 80081c2:	6fda      	ldr	r2, [r3, #124]	@ 0x7c
 80081c4:	683b      	ldr	r3, [r7, #0]
 80081c6:	601a      	str	r2, [r3, #0]
    /* Reset first element */
    heth->RxDescList.pRxStart = NULL;
 80081c8:	687b      	ldr	r3, [r7, #4]
 80081ca:	2200      	movs	r2, #0
 80081cc:	67da      	str	r2, [r3, #124]	@ 0x7c

    return HAL_OK;
 80081ce:	2300      	movs	r3, #0
 80081d0:	e000      	b.n	80081d4 <HAL_ETH_ReadData+0x172>
  }

  /* Packet not ready */
  return HAL_ERROR;
 80081d2:	2301      	movs	r3, #1
}
 80081d4:	4618      	mov	r0, r3
 80081d6:	3720      	adds	r7, #32
 80081d8:	46bd      	mov	sp, r7
 80081da:	bd80      	pop	{r7, pc}

080081dc <ETH_UpdateDescriptor>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth)
{
 80081dc:	b580      	push	{r7, lr}
 80081de:	b088      	sub	sp, #32
 80081e0:	af00      	add	r7, sp, #0
 80081e2:	6078      	str	r0, [r7, #4]
  uint32_t descidx;
  uint32_t tailidx;
  uint32_t desccount;
  ETH_DMADescTypeDef *dmarxdesc;
  uint8_t *buff = NULL;
 80081e4:	2300      	movs	r3, #0
 80081e6:	60bb      	str	r3, [r7, #8]
  uint8_t allocStatus = 1U;
 80081e8:	2301      	movs	r3, #1
 80081ea:	74fb      	strb	r3, [r7, #19]

  descidx = heth->RxDescList.RxBuildDescIdx;
 80081ec:	687b      	ldr	r3, [r7, #4]
 80081ee:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 80081f0:	61fb      	str	r3, [r7, #28]
  dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 80081f2:	687b      	ldr	r3, [r7, #4]
 80081f4:	69fa      	ldr	r2, [r7, #28]
 80081f6:	3212      	adds	r2, #18
 80081f8:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80081fc:	617b      	str	r3, [r7, #20]
  desccount = heth->RxDescList.RxBuildDescCnt;
 80081fe:	687b      	ldr	r3, [r7, #4]
 8008200:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8008202:	61bb      	str	r3, [r7, #24]

  while ((desccount > 0U) && (allocStatus != 0U))
 8008204:	e038      	b.n	8008278 <ETH_UpdateDescriptor+0x9c>
  {
    /* Check if a buffer's attached the descriptor */
    if (READ_REG(dmarxdesc->BackupAddr0) == 0U)
 8008206:	697b      	ldr	r3, [r7, #20]
 8008208:	691b      	ldr	r3, [r3, #16]
 800820a:	2b00      	cmp	r3, #0
 800820c:	d112      	bne.n	8008234 <ETH_UpdateDescriptor+0x58>
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
      /*Call registered Allocate callback*/
      heth->rxAllocateCallback(&buff);
#else
      /* Allocate callback */
      HAL_ETH_RxAllocateCallback(&buff);
 800820e:	f107 0308 	add.w	r3, r7, #8
 8008212:	4618      	mov	r0, r3
 8008214:	f008 f8d4 	bl	80103c0 <HAL_ETH_RxAllocateCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
      if (buff == NULL)
 8008218:	68bb      	ldr	r3, [r7, #8]
 800821a:	2b00      	cmp	r3, #0
 800821c:	d102      	bne.n	8008224 <ETH_UpdateDescriptor+0x48>
      {
        allocStatus = 0U;
 800821e:	2300      	movs	r3, #0
 8008220:	74fb      	strb	r3, [r7, #19]
 8008222:	e007      	b.n	8008234 <ETH_UpdateDescriptor+0x58>
      }
      else
      {
        WRITE_REG(dmarxdesc->BackupAddr0, (uint32_t)buff);
 8008224:	68bb      	ldr	r3, [r7, #8]
 8008226:	461a      	mov	r2, r3
 8008228:	697b      	ldr	r3, [r7, #20]
 800822a:	611a      	str	r2, [r3, #16]
        WRITE_REG(dmarxdesc->DESC0, (uint32_t)buff);
 800822c:	68bb      	ldr	r3, [r7, #8]
 800822e:	461a      	mov	r2, r3
 8008230:	697b      	ldr	r3, [r7, #20]
 8008232:	601a      	str	r2, [r3, #0]
      }
    }

    if (allocStatus != 0U)
 8008234:	7cfb      	ldrb	r3, [r7, #19]
 8008236:	2b00      	cmp	r3, #0
 8008238:	d01e      	beq.n	8008278 <ETH_UpdateDescriptor+0x9c>
    {

      if (heth->RxDescList.ItMode != 0U)
 800823a:	687b      	ldr	r3, [r7, #4]
 800823c:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800823e:	2b00      	cmp	r3, #0
 8008240:	d004      	beq.n	800824c <ETH_UpdateDescriptor+0x70>
      {
        WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V | ETH_DMARXNDESCRF_IOC);
 8008242:	697b      	ldr	r3, [r7, #20]
 8008244:	f04f 4241 	mov.w	r2, #3238002688	@ 0xc1000000
 8008248:	60da      	str	r2, [r3, #12]
 800824a:	e003      	b.n	8008254 <ETH_UpdateDescriptor+0x78>
      }
      else
      {
        WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V);
 800824c:	697b      	ldr	r3, [r7, #20]
 800824e:	f04f 4201 	mov.w	r2, #2164260864	@ 0x81000000
 8008252:	60da      	str	r2, [r3, #12]
      }

      /* Increment current rx descriptor index */
      INCR_RX_DESC_INDEX(descidx, 1U);
 8008254:	69fb      	ldr	r3, [r7, #28]
 8008256:	3301      	adds	r3, #1
 8008258:	61fb      	str	r3, [r7, #28]
 800825a:	69fb      	ldr	r3, [r7, #28]
 800825c:	2b03      	cmp	r3, #3
 800825e:	d902      	bls.n	8008266 <ETH_UpdateDescriptor+0x8a>
 8008260:	69fb      	ldr	r3, [r7, #28]
 8008262:	3b04      	subs	r3, #4
 8008264:	61fb      	str	r3, [r7, #28]
      /* Get current descriptor address */
      dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 8008266:	687b      	ldr	r3, [r7, #4]
 8008268:	69fa      	ldr	r2, [r7, #28]
 800826a:	3212      	adds	r2, #18
 800826c:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8008270:	617b      	str	r3, [r7, #20]
      desccount--;
 8008272:	69bb      	ldr	r3, [r7, #24]
 8008274:	3b01      	subs	r3, #1
 8008276:	61bb      	str	r3, [r7, #24]
  while ((desccount > 0U) && (allocStatus != 0U))
 8008278:	69bb      	ldr	r3, [r7, #24]
 800827a:	2b00      	cmp	r3, #0
 800827c:	d002      	beq.n	8008284 <ETH_UpdateDescriptor+0xa8>
 800827e:	7cfb      	ldrb	r3, [r7, #19]
 8008280:	2b00      	cmp	r3, #0
 8008282:	d1c0      	bne.n	8008206 <ETH_UpdateDescriptor+0x2a>
    }
  }

  if (heth->RxDescList.RxBuildDescCnt != desccount)
 8008284:	687b      	ldr	r3, [r7, #4]
 8008286:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8008288:	69ba      	ldr	r2, [r7, #24]
 800828a:	429a      	cmp	r2, r3
 800828c:	d01b      	beq.n	80082c6 <ETH_UpdateDescriptor+0xea>
  {
    /* Set the tail pointer index */
    tailidx = (descidx + 1U) % ETH_RX_DESC_CNT;
 800828e:	69fb      	ldr	r3, [r7, #28]
 8008290:	3301      	adds	r3, #1
 8008292:	f003 0303 	and.w	r3, r3, #3
 8008296:	60fb      	str	r3, [r7, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 8008298:	f3bf 8f5f 	dmb	sy
}
 800829c:	bf00      	nop

    /* DMB instruction to avoid race condition */
    __DMB();

    /* Set the Tail pointer address */
    WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (tailidx))));
 800829e:	687b      	ldr	r3, [r7, #4]
 80082a0:	6919      	ldr	r1, [r3, #16]
 80082a2:	68fa      	ldr	r2, [r7, #12]
 80082a4:	4613      	mov	r3, r2
 80082a6:	005b      	lsls	r3, r3, #1
 80082a8:	4413      	add	r3, r2
 80082aa:	00db      	lsls	r3, r3, #3
 80082ac:	18ca      	adds	r2, r1, r3
 80082ae:	687b      	ldr	r3, [r7, #4]
 80082b0:	681b      	ldr	r3, [r3, #0]
 80082b2:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80082b6:	f8c3 2128 	str.w	r2, [r3, #296]	@ 0x128

    heth->RxDescList.RxBuildDescIdx = descidx;
 80082ba:	687b      	ldr	r3, [r7, #4]
 80082bc:	69fa      	ldr	r2, [r7, #28]
 80082be:	669a      	str	r2, [r3, #104]	@ 0x68
    heth->RxDescList.RxBuildDescCnt = desccount;
 80082c0:	687b      	ldr	r3, [r7, #4]
 80082c2:	69ba      	ldr	r2, [r7, #24]
 80082c4:	66da      	str	r2, [r3, #108]	@ 0x6c
  }
}
 80082c6:	bf00      	nop
 80082c8:	3720      	adds	r7, #32
 80082ca:	46bd      	mov	sp, r7
 80082cc:	bd80      	pop	{r7, pc}

080082ce <HAL_ETH_ReleaseTxPacket>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReleaseTxPacket(ETH_HandleTypeDef *heth)
{
 80082ce:	b580      	push	{r7, lr}
 80082d0:	b086      	sub	sp, #24
 80082d2:	af00      	add	r7, sp, #0
 80082d4:	6078      	str	r0, [r7, #4]
  ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList;
 80082d6:	687b      	ldr	r3, [r7, #4]
 80082d8:	3318      	adds	r3, #24
 80082da:	60bb      	str	r3, [r7, #8]
  uint32_t numOfBuf =  dmatxdesclist->BuffersInUse;
 80082dc:	68bb      	ldr	r3, [r7, #8]
 80082de:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80082e0:	617b      	str	r3, [r7, #20]
  uint32_t idx =       dmatxdesclist->releaseIndex;
 80082e2:	68bb      	ldr	r3, [r7, #8]
 80082e4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80082e6:	613b      	str	r3, [r7, #16]
  uint8_t pktTxStatus = 1U;
 80082e8:	2301      	movs	r3, #1
 80082ea:	73fb      	strb	r3, [r7, #15]
#ifdef HAL_ETH_USE_PTP
  ETH_TimeStampTypeDef *timestamp = &heth->TxTimestamp;
#endif /* HAL_ETH_USE_PTP */

  /* Loop through buffers in use.  */
  while ((numOfBuf != 0U) && (pktTxStatus != 0U))
 80082ec:	e047      	b.n	800837e <HAL_ETH_ReleaseTxPacket+0xb0>
  {
    pktInUse = 1U;
 80082ee:	2301      	movs	r3, #1
 80082f0:	73bb      	strb	r3, [r7, #14]
    numOfBuf--;
 80082f2:	697b      	ldr	r3, [r7, #20]
 80082f4:	3b01      	subs	r3, #1
 80082f6:	617b      	str	r3, [r7, #20]
    /* If no packet, just examine the next packet.  */
    if (dmatxdesclist->PacketAddress[idx] == NULL)
 80082f8:	68ba      	ldr	r2, [r7, #8]
 80082fa:	693b      	ldr	r3, [r7, #16]
 80082fc:	3304      	adds	r3, #4
 80082fe:	009b      	lsls	r3, r3, #2
 8008300:	4413      	add	r3, r2
 8008302:	685b      	ldr	r3, [r3, #4]
 8008304:	2b00      	cmp	r3, #0
 8008306:	d10a      	bne.n	800831e <HAL_ETH_ReleaseTxPacket+0x50>
    {
      /* No packet in use, skip to next.  */
      INCR_TX_DESC_INDEX(idx, 1U);
 8008308:	693b      	ldr	r3, [r7, #16]
 800830a:	3301      	adds	r3, #1
 800830c:	613b      	str	r3, [r7, #16]
 800830e:	693b      	ldr	r3, [r7, #16]
 8008310:	2b03      	cmp	r3, #3
 8008312:	d902      	bls.n	800831a <HAL_ETH_ReleaseTxPacket+0x4c>
 8008314:	693b      	ldr	r3, [r7, #16]
 8008316:	3b04      	subs	r3, #4
 8008318:	613b      	str	r3, [r7, #16]
      pktInUse = 0U;
 800831a:	2300      	movs	r3, #0
 800831c:	73bb      	strb	r3, [r7, #14]
    }

    if (pktInUse != 0U)
 800831e:	7bbb      	ldrb	r3, [r7, #14]
 8008320:	2b00      	cmp	r3, #0
 8008322:	d02c      	beq.n	800837e <HAL_ETH_ReleaseTxPacket+0xb0>
    {
      /* Determine if the packet has been transmitted.  */
      if ((heth->Init.TxDesc[idx].DESC3 & ETH_DMATXNDESCRF_OWN) == 0U)
 8008324:	687b      	ldr	r3, [r7, #4]
 8008326:	68d9      	ldr	r1, [r3, #12]
 8008328:	693a      	ldr	r2, [r7, #16]
 800832a:	4613      	mov	r3, r2
 800832c:	005b      	lsls	r3, r3, #1
 800832e:	4413      	add	r3, r2
 8008330:	00db      	lsls	r3, r3, #3
 8008332:	440b      	add	r3, r1
 8008334:	68db      	ldr	r3, [r3, #12]
 8008336:	2b00      	cmp	r3, #0
 8008338:	db1f      	blt.n	800837a <HAL_ETH_ReleaseTxPacket+0xac>
        {
          HAL_ETH_TxPtpCallback(dmatxdesclist->PacketAddress[idx], timestamp);
        }
#endif  /* HAL_ETH_USE_PTP */
        /* Release the packet.  */
        HAL_ETH_TxFreeCallback(dmatxdesclist->PacketAddress[idx]);
 800833a:	68ba      	ldr	r2, [r7, #8]
 800833c:	693b      	ldr	r3, [r7, #16]
 800833e:	3304      	adds	r3, #4
 8008340:	009b      	lsls	r3, r3, #2
 8008342:	4413      	add	r3, r2
 8008344:	685b      	ldr	r3, [r3, #4]
 8008346:	4618      	mov	r0, r3
 8008348:	f008 f8d2 	bl	80104f0 <HAL_ETH_TxFreeCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

        /* Clear the entry in the in-use array.  */
        dmatxdesclist->PacketAddress[idx] = NULL;
 800834c:	68ba      	ldr	r2, [r7, #8]
 800834e:	693b      	ldr	r3, [r7, #16]
 8008350:	3304      	adds	r3, #4
 8008352:	009b      	lsls	r3, r3, #2
 8008354:	4413      	add	r3, r2
 8008356:	2200      	movs	r2, #0
 8008358:	605a      	str	r2, [r3, #4]

        /* Update the transmit relesae index and number of buffers in use.  */
        INCR_TX_DESC_INDEX(idx, 1U);
 800835a:	693b      	ldr	r3, [r7, #16]
 800835c:	3301      	adds	r3, #1
 800835e:	613b      	str	r3, [r7, #16]
 8008360:	693b      	ldr	r3, [r7, #16]
 8008362:	2b03      	cmp	r3, #3
 8008364:	d902      	bls.n	800836c <HAL_ETH_ReleaseTxPacket+0x9e>
 8008366:	693b      	ldr	r3, [r7, #16]
 8008368:	3b04      	subs	r3, #4
 800836a:	613b      	str	r3, [r7, #16]
        dmatxdesclist->BuffersInUse = numOfBuf;
 800836c:	68bb      	ldr	r3, [r7, #8]
 800836e:	697a      	ldr	r2, [r7, #20]
 8008370:	629a      	str	r2, [r3, #40]	@ 0x28
        dmatxdesclist->releaseIndex = idx;
 8008372:	68bb      	ldr	r3, [r7, #8]
 8008374:	693a      	ldr	r2, [r7, #16]
 8008376:	62da      	str	r2, [r3, #44]	@ 0x2c
 8008378:	e001      	b.n	800837e <HAL_ETH_ReleaseTxPacket+0xb0>
      }
      else
      {
        /* Get out of the loop!  */
        pktTxStatus = 0U;
 800837a:	2300      	movs	r3, #0
 800837c:	73fb      	strb	r3, [r7, #15]
  while ((numOfBuf != 0U) && (pktTxStatus != 0U))
 800837e:	697b      	ldr	r3, [r7, #20]
 8008380:	2b00      	cmp	r3, #0
 8008382:	d002      	beq.n	800838a <HAL_ETH_ReleaseTxPacket+0xbc>
 8008384:	7bfb      	ldrb	r3, [r7, #15]
 8008386:	2b00      	cmp	r3, #0
 8008388:	d1b1      	bne.n	80082ee <HAL_ETH_ReleaseTxPacket+0x20>
      }
    }
  }
  return HAL_OK;
 800838a:	2300      	movs	r3, #0
}
 800838c:	4618      	mov	r0, r3
 800838e:	3718      	adds	r7, #24
 8008390:	46bd      	mov	sp, r7
 8008392:	bd80      	pop	{r7, pc}

08008394 <HAL_ETH_IRQHandler>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth)
{
 8008394:	b580      	push	{r7, lr}
 8008396:	b086      	sub	sp, #24
 8008398:	af00      	add	r7, sp, #0
 800839a:	6078      	str	r0, [r7, #4]
  uint32_t mac_flag = READ_REG(heth->Instance->MACISR);
 800839c:	687b      	ldr	r3, [r7, #4]
 800839e:	681b      	ldr	r3, [r3, #0]
 80083a0:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 80083a4:	617b      	str	r3, [r7, #20]
  uint32_t dma_flag = READ_REG(heth->Instance->DMACSR);
 80083a6:	687b      	ldr	r3, [r7, #4]
 80083a8:	681b      	ldr	r3, [r3, #0]
 80083aa:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80083ae:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 80083b2:	613b      	str	r3, [r7, #16]
  uint32_t dma_itsource = READ_REG(heth->Instance->DMACIER);
 80083b4:	687b      	ldr	r3, [r7, #4]
 80083b6:	681b      	ldr	r3, [r3, #0]
 80083b8:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80083bc:	f8d3 3134 	ldr.w	r3, [r3, #308]	@ 0x134
 80083c0:	60fb      	str	r3, [r7, #12]
  uint32_t exti_d1_flag = READ_REG(EXTI_D1->PR3);
 80083c2:	4b6d      	ldr	r3, [pc, #436]	@ (8008578 <HAL_ETH_IRQHandler+0x1e4>)
 80083c4:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80083c6:	60bb      	str	r3, [r7, #8]
#if defined(DUAL_CORE)
  uint32_t exti_d2_flag = READ_REG(EXTI_D2->PR3);
#endif /* DUAL_CORE */

  /* Packet received */
  if (((dma_flag & ETH_DMACSR_RI) != 0U) && ((dma_itsource & ETH_DMACIER_RIE) != 0U))
 80083c8:	693b      	ldr	r3, [r7, #16]
 80083ca:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 80083ce:	2b00      	cmp	r3, #0
 80083d0:	d010      	beq.n	80083f4 <HAL_ETH_IRQHandler+0x60>
 80083d2:	68fb      	ldr	r3, [r7, #12]
 80083d4:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 80083d8:	2b00      	cmp	r3, #0
 80083da:	d00b      	beq.n	80083f4 <HAL_ETH_IRQHandler+0x60>
  {
    /* Clear the Eth DMA Rx IT pending bits */
    __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_RI | ETH_DMACSR_NIS);
 80083dc:	687b      	ldr	r3, [r7, #4]
 80083de:	681b      	ldr	r3, [r3, #0]
 80083e0:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80083e4:	461a      	mov	r2, r3
 80083e6:	f248 0340 	movw	r3, #32832	@ 0x8040
 80083ea:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /*Call registered Receive complete callback*/
    heth->RxCpltCallback(heth);
#else
    /* Receive complete callback */
    HAL_ETH_RxCpltCallback(heth);
 80083ee:	6878      	ldr	r0, [r7, #4]
 80083f0:	f007 fb6e 	bl	800fad0 <HAL_ETH_RxCpltCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* Packet transmitted */
  if (((dma_flag & ETH_DMACSR_TI) != 0U) && ((dma_itsource & ETH_DMACIER_TIE) != 0U))
 80083f4:	693b      	ldr	r3, [r7, #16]
 80083f6:	f003 0301 	and.w	r3, r3, #1
 80083fa:	2b00      	cmp	r3, #0
 80083fc:	d010      	beq.n	8008420 <HAL_ETH_IRQHandler+0x8c>
 80083fe:	68fb      	ldr	r3, [r7, #12]
 8008400:	f003 0301 	and.w	r3, r3, #1
 8008404:	2b00      	cmp	r3, #0
 8008406:	d00b      	beq.n	8008420 <HAL_ETH_IRQHandler+0x8c>
  {
    /* Clear the Eth DMA Tx IT pending bits */
    __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_TI | ETH_DMACSR_NIS);
 8008408:	687b      	ldr	r3, [r7, #4]
 800840a:	681b      	ldr	r3, [r3, #0]
 800840c:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008410:	461a      	mov	r2, r3
 8008412:	f248 0301 	movw	r3, #32769	@ 0x8001
 8008416:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /*Call registered Transmit complete callback*/
    heth->TxCpltCallback(heth);
#else
    /* Transfer complete callback */
    HAL_ETH_TxCpltCallback(heth);
 800841a:	6878      	ldr	r0, [r7, #4]
 800841c:	f007 fb68 	bl	800faf0 <HAL_ETH_TxCpltCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* ETH DMA Error */
  if (((dma_flag & ETH_DMACSR_AIS) != 0U) && ((dma_itsource & ETH_DMACIER_AIE) != 0U))
 8008420:	693b      	ldr	r3, [r7, #16]
 8008422:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 8008426:	2b00      	cmp	r3, #0
 8008428:	d047      	beq.n	80084ba <HAL_ETH_IRQHandler+0x126>
 800842a:	68fb      	ldr	r3, [r7, #12]
 800842c:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 8008430:	2b00      	cmp	r3, #0
 8008432:	d042      	beq.n	80084ba <HAL_ETH_IRQHandler+0x126>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_DMA;
 8008434:	687b      	ldr	r3, [r7, #4]
 8008436:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800843a:	f043 0208 	orr.w	r2, r3, #8
 800843e:	687b      	ldr	r3, [r7, #4]
 8008440:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    /* if fatal bus error occurred */
    if ((dma_flag & ETH_DMACSR_FBE) != 0U)
 8008444:	693b      	ldr	r3, [r7, #16]
 8008446:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 800844a:	2b00      	cmp	r3, #0
 800844c:	d01e      	beq.n	800848c <HAL_ETH_IRQHandler+0xf8>
    {
      /* Get DMA error code  */
      heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_FBE | ETH_DMACSR_TPS | ETH_DMACSR_RPS));
 800844e:	687b      	ldr	r3, [r7, #4]
 8008450:	681b      	ldr	r3, [r3, #0]
 8008452:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008456:	f8d3 2160 	ldr.w	r2, [r3, #352]	@ 0x160
 800845a:	f241 1302 	movw	r3, #4354	@ 0x1102
 800845e:	4013      	ands	r3, r2
 8008460:	687a      	ldr	r2, [r7, #4]
 8008462:	f8c2 308c 	str.w	r3, [r2, #140]	@ 0x8c

      /* Disable all interrupts */
      __HAL_ETH_DMA_DISABLE_IT(heth, ETH_DMACIER_NIE | ETH_DMACIER_AIE);
 8008466:	687b      	ldr	r3, [r7, #4]
 8008468:	681b      	ldr	r3, [r3, #0]
 800846a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800846e:	f8d3 3134 	ldr.w	r3, [r3, #308]	@ 0x134
 8008472:	687a      	ldr	r2, [r7, #4]
 8008474:	6812      	ldr	r2, [r2, #0]
 8008476:	f423 4340 	bic.w	r3, r3, #49152	@ 0xc000
 800847a:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800847e:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134

      /* Set HAL state to ERROR */
      heth->gState = HAL_ETH_STATE_ERROR;
 8008482:	687b      	ldr	r3, [r7, #4]
 8008484:	22e0      	movs	r2, #224	@ 0xe0
 8008486:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
 800848a:	e013      	b.n	80084b4 <HAL_ETH_IRQHandler+0x120>
    }
    else
    {
      /* Get DMA error status  */
      heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT |
 800848c:	687b      	ldr	r3, [r7, #4]
 800848e:	681b      	ldr	r3, [r3, #0]
 8008490:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008494:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 8008498:	f403 42cd 	and.w	r2, r3, #26240	@ 0x6680
 800849c:	687b      	ldr	r3, [r7, #4]
 800849e:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
                                                             ETH_DMACSR_RBU | ETH_DMACSR_AIS));

      /* Clear the interrupt summary flag */
      __HAL_ETH_DMA_CLEAR_IT(heth, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT |
 80084a2:	687b      	ldr	r3, [r7, #4]
 80084a4:	681b      	ldr	r3, [r3, #0]
 80084a6:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80084aa:	461a      	mov	r2, r3
 80084ac:	f44f 43cd 	mov.w	r3, #26240	@ 0x6680
 80084b0:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered Error callback*/
    heth->ErrorCallback(heth);
#else
    /* Ethernet DMA Error callback */
    HAL_ETH_ErrorCallback(heth);
 80084b4:	6878      	ldr	r0, [r7, #4]
 80084b6:	f007 fb2b 	bl	800fb10 <HAL_ETH_ErrorCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* ETH MAC Error IT */
  if (((mac_flag & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \
 80084ba:	697b      	ldr	r3, [r7, #20]
 80084bc:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 80084c0:	2b00      	cmp	r3, #0
 80084c2:	d104      	bne.n	80084ce <HAL_ETH_IRQHandler+0x13a>
      ((mac_flag & ETH_MACIER_TXSTSIE) == ETH_MACIER_TXSTSIE))
 80084c4:	697b      	ldr	r3, [r7, #20]
 80084c6:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
  if (((mac_flag & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \
 80084ca:	2b00      	cmp	r3, #0
 80084cc:	d019      	beq.n	8008502 <HAL_ETH_IRQHandler+0x16e>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_MAC;
 80084ce:	687b      	ldr	r3, [r7, #4]
 80084d0:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 80084d4:	f043 0210 	orr.w	r2, r3, #16
 80084d8:	687b      	ldr	r3, [r7, #4]
 80084da:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

    /* Get MAC Rx Tx status and clear Status register pending bit */
    heth->MACErrorCode = READ_REG(heth->Instance->MACRXTXSR);
 80084de:	687b      	ldr	r3, [r7, #4]
 80084e0:	681b      	ldr	r3, [r3, #0]
 80084e2:	f8d3 20b8 	ldr.w	r2, [r3, #184]	@ 0xb8
 80084e6:	687b      	ldr	r3, [r7, #4]
 80084e8:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

    heth->gState = HAL_ETH_STATE_ERROR;
 80084ec:	687b      	ldr	r3, [r7, #4]
 80084ee:	22e0      	movs	r2, #224	@ 0xe0
 80084f0:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered Error callback*/
    heth->ErrorCallback(heth);
#else
    /* Ethernet Error callback */
    HAL_ETH_ErrorCallback(heth);
 80084f4:	6878      	ldr	r0, [r7, #4]
 80084f6:	f007 fb0b 	bl	800fb10 <HAL_ETH_ErrorCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
    heth->MACErrorCode = (uint32_t)(0x0U);
 80084fa:	687b      	ldr	r3, [r7, #4]
 80084fc:	2200      	movs	r2, #0
 80084fe:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  }

  /* ETH PMT IT */
  if ((mac_flag & ETH_MAC_PMT_IT) != 0U)
 8008502:	697b      	ldr	r3, [r7, #20]
 8008504:	f003 0310 	and.w	r3, r3, #16
 8008508:	2b00      	cmp	r3, #0
 800850a:	d00f      	beq.n	800852c <HAL_ETH_IRQHandler+0x198>
  {
    /* Get MAC Wake-up source and clear the status register pending bit */
    heth->MACWakeUpEvent = READ_BIT(heth->Instance->MACPCSR, (ETH_MACPCSR_RWKPRCVD | ETH_MACPCSR_MGKPRCVD));
 800850c:	687b      	ldr	r3, [r7, #4]
 800850e:	681b      	ldr	r3, [r3, #0]
 8008510:	f8d3 30c0 	ldr.w	r3, [r3, #192]	@ 0xc0
 8008514:	f003 0260 	and.w	r2, r3, #96	@ 0x60
 8008518:	687b      	ldr	r3, [r7, #4]
 800851a:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered PMT callback*/
    heth->PMTCallback(heth);
#else
    /* Ethernet PMT callback */
    HAL_ETH_PMTCallback(heth);
 800851e:	6878      	ldr	r0, [r7, #4]
 8008520:	f000 f82c 	bl	800857c <HAL_ETH_PMTCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

    heth->MACWakeUpEvent = (uint32_t)(0x0U);
 8008524:	687b      	ldr	r3, [r7, #4]
 8008526:	2200      	movs	r2, #0
 8008528:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
  }

  /* ETH EEE IT */
  if ((mac_flag & ETH_MAC_LPI_IT) != 0U)
 800852c:	697b      	ldr	r3, [r7, #20]
 800852e:	f003 0320 	and.w	r3, r3, #32
 8008532:	2b00      	cmp	r3, #0
 8008534:	d00f      	beq.n	8008556 <HAL_ETH_IRQHandler+0x1c2>
  {
    /* Get MAC LPI interrupt source and clear the status register pending bit */
    heth->MACLPIEvent = READ_BIT(heth->Instance->MACLCSR, 0x0000000FU);
 8008536:	687b      	ldr	r3, [r7, #4]
 8008538:	681b      	ldr	r3, [r3, #0]
 800853a:	f8d3 30d0 	ldr.w	r3, [r3, #208]	@ 0xd0
 800853e:	f003 020f 	and.w	r2, r3, #15
 8008542:	687b      	ldr	r3, [r7, #4]
 8008544:	f8c3 2098 	str.w	r2, [r3, #152]	@ 0x98
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered EEE callback*/
    heth->EEECallback(heth);
#else
    /* Ethernet EEE callback */
    HAL_ETH_EEECallback(heth);
 8008548:	6878      	ldr	r0, [r7, #4]
 800854a:	f000 f821 	bl	8008590 <HAL_ETH_EEECallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

    heth->MACLPIEvent = (uint32_t)(0x0U);
 800854e:	687b      	ldr	r3, [r7, #4]
 8008550:	2200      	movs	r2, #0
 8008552:	f8c3 2098 	str.w	r2, [r3, #152]	@ 0x98
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
    }
  }
#else /* DUAL_CORE not defined */
  /* check ETH WAKEUP exti flag */
  if ((exti_d1_flag & ETH_WAKEUP_EXTI_LINE) != 0U)
 8008556:	68bb      	ldr	r3, [r7, #8]
 8008558:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 800855c:	2b00      	cmp	r3, #0
 800855e:	d006      	beq.n	800856e <HAL_ETH_IRQHandler+0x1da>
  {
    /* Clear ETH WAKEUP Exti pending bit */
    __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG(ETH_WAKEUP_EXTI_LINE);
 8008560:	4b05      	ldr	r3, [pc, #20]	@ (8008578 <HAL_ETH_IRQHandler+0x1e4>)
 8008562:	f44f 0280 	mov.w	r2, #4194304	@ 0x400000
 8008566:	629a      	str	r2, [r3, #40]	@ 0x28
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered WakeUp callback*/
    heth->WakeUpCallback(heth);
#else
    /* ETH WAKEUP callback */
    HAL_ETH_WakeUpCallback(heth);
 8008568:	6878      	ldr	r0, [r7, #4]
 800856a:	f000 f81b 	bl	80085a4 <HAL_ETH_WakeUpCallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }
#endif /* DUAL_CORE */
}
 800856e:	bf00      	nop
 8008570:	3718      	adds	r7, #24
 8008572:	46bd      	mov	sp, r7
 8008574:	bd80      	pop	{r7, pc}
 8008576:	bf00      	nop
 8008578:	58000080 	.word	0x58000080

0800857c <HAL_ETH_PMTCallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_PMTCallback(ETH_HandleTypeDef *heth)
{
 800857c:	b480      	push	{r7}
 800857e:	b083      	sub	sp, #12
 8008580:	af00      	add	r7, sp, #0
 8008582:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
  the HAL_ETH_PMTCallback could be implemented in the user file
  */
}
 8008584:	bf00      	nop
 8008586:	370c      	adds	r7, #12
 8008588:	46bd      	mov	sp, r7
 800858a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800858e:	4770      	bx	lr

08008590 <HAL_ETH_EEECallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_EEECallback(ETH_HandleTypeDef *heth)
{
 8008590:	b480      	push	{r7}
 8008592:	b083      	sub	sp, #12
 8008594:	af00      	add	r7, sp, #0
 8008596:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
  the HAL_ETH_EEECallback could be implemented in the user file
  */
}
 8008598:	bf00      	nop
 800859a:	370c      	adds	r7, #12
 800859c:	46bd      	mov	sp, r7
 800859e:	f85d 7b04 	ldr.w	r7, [sp], #4
 80085a2:	4770      	bx	lr

080085a4 <HAL_ETH_WakeUpCallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_WakeUpCallback(ETH_HandleTypeDef *heth)
{
 80085a4:	b480      	push	{r7}
 80085a6:	b083      	sub	sp, #12
 80085a8:	af00      	add	r7, sp, #0
 80085aa:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_ETH_WakeUpCallback could be implemented in the user file
   */
}
 80085ac:	bf00      	nop
 80085ae:	370c      	adds	r7, #12
 80085b0:	46bd      	mov	sp, r7
 80085b2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80085b6:	4770      	bx	lr

080085b8 <HAL_ETH_ReadPHYRegister>:
  * @param pRegValue: parameter to hold read value
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg,
                                          uint32_t *pRegValue)
{
 80085b8:	b580      	push	{r7, lr}
 80085ba:	b086      	sub	sp, #24
 80085bc:	af00      	add	r7, sp, #0
 80085be:	60f8      	str	r0, [r7, #12]
 80085c0:	60b9      	str	r1, [r7, #8]
 80085c2:	607a      	str	r2, [r7, #4]
 80085c4:	603b      	str	r3, [r7, #0]
  uint32_t tickstart;
  uint32_t tmpreg;

  /* Check for the Busy flag */
  if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET)
 80085c6:	68fb      	ldr	r3, [r7, #12]
 80085c8:	681b      	ldr	r3, [r3, #0]
 80085ca:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 80085ce:	f003 0301 	and.w	r3, r3, #1
 80085d2:	2b00      	cmp	r3, #0
 80085d4:	d001      	beq.n	80085da <HAL_ETH_ReadPHYRegister+0x22>
  {
    return HAL_ERROR;
 80085d6:	2301      	movs	r3, #1
 80085d8:	e03e      	b.n	8008658 <HAL_ETH_ReadPHYRegister+0xa0>
  }

  /* Get the  MACMDIOAR value */
  WRITE_REG(tmpreg, heth->Instance->MACMDIOAR);
 80085da:	68fb      	ldr	r3, [r7, #12]
 80085dc:	681b      	ldr	r3, [r3, #0]
 80085de:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 80085e2:	617b      	str	r3, [r7, #20]
     - Set the PHY device address
     - Set the PHY register address
     - Set the read mode
     - Set the MII Busy bit */

  MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21));
 80085e4:	697b      	ldr	r3, [r7, #20]
 80085e6:	f023 7278 	bic.w	r2, r3, #65011712	@ 0x3e00000
 80085ea:	68bb      	ldr	r3, [r7, #8]
 80085ec:	055b      	lsls	r3, r3, #21
 80085ee:	4313      	orrs	r3, r2
 80085f0:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16));
 80085f2:	697b      	ldr	r3, [r7, #20]
 80085f4:	f423 12f8 	bic.w	r2, r3, #2031616	@ 0x1f0000
 80085f8:	687b      	ldr	r3, [r7, #4]
 80085fa:	041b      	lsls	r3, r3, #16
 80085fc:	4313      	orrs	r3, r2
 80085fe:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_RD);
 8008600:	697b      	ldr	r3, [r7, #20]
 8008602:	f043 030c 	orr.w	r3, r3, #12
 8008606:	617b      	str	r3, [r7, #20]
  SET_BIT(tmpreg, ETH_MACMDIOAR_MB);
 8008608:	697b      	ldr	r3, [r7, #20]
 800860a:	f043 0301 	orr.w	r3, r3, #1
 800860e:	617b      	str	r3, [r7, #20]

  /* Write the result value into the MDII Address register */
  WRITE_REG(heth->Instance->MACMDIOAR, tmpreg);
 8008610:	68fb      	ldr	r3, [r7, #12]
 8008612:	681b      	ldr	r3, [r3, #0]
 8008614:	697a      	ldr	r2, [r7, #20]
 8008616:	f8c3 2200 	str.w	r2, [r3, #512]	@ 0x200

  tickstart = HAL_GetTick();
 800861a:	f7fc fd13 	bl	8005044 <HAL_GetTick>
 800861e:	6138      	str	r0, [r7, #16]

  /* Wait for the Busy flag */
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 8008620:	e009      	b.n	8008636 <HAL_ETH_ReadPHYRegister+0x7e>
  {
    if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT))
 8008622:	f7fc fd0f 	bl	8005044 <HAL_GetTick>
 8008626:	4602      	mov	r2, r0
 8008628:	693b      	ldr	r3, [r7, #16]
 800862a:	1ad3      	subs	r3, r2, r3
 800862c:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 8008630:	d901      	bls.n	8008636 <HAL_ETH_ReadPHYRegister+0x7e>
    {
      return HAL_ERROR;
 8008632:	2301      	movs	r3, #1
 8008634:	e010      	b.n	8008658 <HAL_ETH_ReadPHYRegister+0xa0>
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 8008636:	68fb      	ldr	r3, [r7, #12]
 8008638:	681b      	ldr	r3, [r3, #0]
 800863a:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 800863e:	f003 0301 	and.w	r3, r3, #1
 8008642:	2b00      	cmp	r3, #0
 8008644:	d1ed      	bne.n	8008622 <HAL_ETH_ReadPHYRegister+0x6a>
    }
  }

  /* Get MACMIIDR value */
  WRITE_REG(*pRegValue, (uint16_t)heth->Instance->MACMDIODR);
 8008646:	68fb      	ldr	r3, [r7, #12]
 8008648:	681b      	ldr	r3, [r3, #0]
 800864a:	f8d3 3204 	ldr.w	r3, [r3, #516]	@ 0x204
 800864e:	b29b      	uxth	r3, r3
 8008650:	461a      	mov	r2, r3
 8008652:	683b      	ldr	r3, [r7, #0]
 8008654:	601a      	str	r2, [r3, #0]

  return HAL_OK;
 8008656:	2300      	movs	r3, #0
}
 8008658:	4618      	mov	r0, r3
 800865a:	3718      	adds	r7, #24
 800865c:	46bd      	mov	sp, r7
 800865e:	bd80      	pop	{r7, pc}

08008660 <HAL_ETH_WritePHYRegister>:
  * @param  RegValue: the value to write
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_WritePHYRegister(const ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg,
                                           uint32_t RegValue)
{
 8008660:	b580      	push	{r7, lr}
 8008662:	b086      	sub	sp, #24
 8008664:	af00      	add	r7, sp, #0
 8008666:	60f8      	str	r0, [r7, #12]
 8008668:	60b9      	str	r1, [r7, #8]
 800866a:	607a      	str	r2, [r7, #4]
 800866c:	603b      	str	r3, [r7, #0]
  uint32_t tickstart;
  uint32_t tmpreg;

  /* Check for the Busy flag */
  if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET)
 800866e:	68fb      	ldr	r3, [r7, #12]
 8008670:	681b      	ldr	r3, [r3, #0]
 8008672:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008676:	f003 0301 	and.w	r3, r3, #1
 800867a:	2b00      	cmp	r3, #0
 800867c:	d001      	beq.n	8008682 <HAL_ETH_WritePHYRegister+0x22>
  {
    return HAL_ERROR;
 800867e:	2301      	movs	r3, #1
 8008680:	e03c      	b.n	80086fc <HAL_ETH_WritePHYRegister+0x9c>
  }

  /* Get the  MACMDIOAR value */
  WRITE_REG(tmpreg, heth->Instance->MACMDIOAR);
 8008682:	68fb      	ldr	r3, [r7, #12]
 8008684:	681b      	ldr	r3, [r3, #0]
 8008686:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 800868a:	617b      	str	r3, [r7, #20]
     - Set the PHY device address
     - Set the PHY register address
     - Set the write mode
     - Set the MII Busy bit */

  MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21));
 800868c:	697b      	ldr	r3, [r7, #20]
 800868e:	f023 7278 	bic.w	r2, r3, #65011712	@ 0x3e00000
 8008692:	68bb      	ldr	r3, [r7, #8]
 8008694:	055b      	lsls	r3, r3, #21
 8008696:	4313      	orrs	r3, r2
 8008698:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16));
 800869a:	697b      	ldr	r3, [r7, #20]
 800869c:	f423 12f8 	bic.w	r2, r3, #2031616	@ 0x1f0000
 80086a0:	687b      	ldr	r3, [r7, #4]
 80086a2:	041b      	lsls	r3, r3, #16
 80086a4:	4313      	orrs	r3, r2
 80086a6:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_WR);
 80086a8:	697b      	ldr	r3, [r7, #20]
 80086aa:	f023 030c 	bic.w	r3, r3, #12
 80086ae:	f043 0304 	orr.w	r3, r3, #4
 80086b2:	617b      	str	r3, [r7, #20]
  SET_BIT(tmpreg, ETH_MACMDIOAR_MB);
 80086b4:	697b      	ldr	r3, [r7, #20]
 80086b6:	f043 0301 	orr.w	r3, r3, #1
 80086ba:	617b      	str	r3, [r7, #20]

  /* Give the value to the MII data register */
  WRITE_REG(ETH->MACMDIODR, (uint16_t)RegValue);
 80086bc:	683b      	ldr	r3, [r7, #0]
 80086be:	b29a      	uxth	r2, r3
 80086c0:	4b10      	ldr	r3, [pc, #64]	@ (8008704 <HAL_ETH_WritePHYRegister+0xa4>)
 80086c2:	f8c3 2204 	str.w	r2, [r3, #516]	@ 0x204

  /* Write the result value into the MII Address register */
  WRITE_REG(ETH->MACMDIOAR, tmpreg);
 80086c6:	4a0f      	ldr	r2, [pc, #60]	@ (8008704 <HAL_ETH_WritePHYRegister+0xa4>)
 80086c8:	697b      	ldr	r3, [r7, #20]
 80086ca:	f8c2 3200 	str.w	r3, [r2, #512]	@ 0x200

  tickstart = HAL_GetTick();
 80086ce:	f7fc fcb9 	bl	8005044 <HAL_GetTick>
 80086d2:	6138      	str	r0, [r7, #16]

  /* Wait for the Busy flag */
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 80086d4:	e009      	b.n	80086ea <HAL_ETH_WritePHYRegister+0x8a>
  {
    if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT))
 80086d6:	f7fc fcb5 	bl	8005044 <HAL_GetTick>
 80086da:	4602      	mov	r2, r0
 80086dc:	693b      	ldr	r3, [r7, #16]
 80086de:	1ad3      	subs	r3, r2, r3
 80086e0:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 80086e4:	d901      	bls.n	80086ea <HAL_ETH_WritePHYRegister+0x8a>
    {
      return HAL_ERROR;
 80086e6:	2301      	movs	r3, #1
 80086e8:	e008      	b.n	80086fc <HAL_ETH_WritePHYRegister+0x9c>
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 80086ea:	68fb      	ldr	r3, [r7, #12]
 80086ec:	681b      	ldr	r3, [r3, #0]
 80086ee:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 80086f2:	f003 0301 	and.w	r3, r3, #1
 80086f6:	2b00      	cmp	r3, #0
 80086f8:	d1ed      	bne.n	80086d6 <HAL_ETH_WritePHYRegister+0x76>
    }
  }

  return HAL_OK;
 80086fa:	2300      	movs	r3, #0
}
 80086fc:	4618      	mov	r0, r3
 80086fe:	3718      	adds	r7, #24
 8008700:	46bd      	mov	sp, r7
 8008702:	bd80      	pop	{r7, pc}
 8008704:	40028000 	.word	0x40028000

08008708 <HAL_ETH_GetMACConfig>:
  * @param  macconf: pointer to a ETH_MACConfigTypeDef structure that will hold
  *         the configuration of the MAC.
  * @retval HAL Status
  */
HAL_StatusTypeDef HAL_ETH_GetMACConfig(const ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf)
{
 8008708:	b480      	push	{r7}
 800870a:	b083      	sub	sp, #12
 800870c:	af00      	add	r7, sp, #0
 800870e:	6078      	str	r0, [r7, #4]
 8008710:	6039      	str	r1, [r7, #0]
  if (macconf == NULL)
 8008712:	683b      	ldr	r3, [r7, #0]
 8008714:	2b00      	cmp	r3, #0
 8008716:	d101      	bne.n	800871c <HAL_ETH_GetMACConfig+0x14>
  {
    return HAL_ERROR;
 8008718:	2301      	movs	r3, #1
 800871a:	e1c3      	b.n	8008aa4 <HAL_ETH_GetMACConfig+0x39c>
  }

  /* Get MAC parameters */
  macconf->PreambleLength = READ_BIT(heth->Instance->MACCR, ETH_MACCR_PRELEN);
 800871c:	687b      	ldr	r3, [r7, #4]
 800871e:	681b      	ldr	r3, [r3, #0]
 8008720:	681b      	ldr	r3, [r3, #0]
 8008722:	f003 020c 	and.w	r2, r3, #12
 8008726:	683b      	ldr	r3, [r7, #0]
 8008728:	62da      	str	r2, [r3, #44]	@ 0x2c
  macconf->DeferralCheck = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DC) >> 4) > 0U) ? ENABLE : DISABLE;
 800872a:	687b      	ldr	r3, [r7, #4]
 800872c:	681b      	ldr	r3, [r3, #0]
 800872e:	681b      	ldr	r3, [r3, #0]
 8008730:	f003 0310 	and.w	r3, r3, #16
 8008734:	2b00      	cmp	r3, #0
 8008736:	bf14      	ite	ne
 8008738:	2301      	movne	r3, #1
 800873a:	2300      	moveq	r3, #0
 800873c:	b2db      	uxtb	r3, r3
 800873e:	461a      	mov	r2, r3
 8008740:	683b      	ldr	r3, [r7, #0]
 8008742:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  macconf->BackOffLimit = READ_BIT(heth->Instance->MACCR, ETH_MACCR_BL);
 8008746:	687b      	ldr	r3, [r7, #4]
 8008748:	681b      	ldr	r3, [r3, #0]
 800874a:	681b      	ldr	r3, [r3, #0]
 800874c:	f003 0260 	and.w	r2, r3, #96	@ 0x60
 8008750:	683b      	ldr	r3, [r7, #0]
 8008752:	625a      	str	r2, [r3, #36]	@ 0x24
  macconf->RetryTransmission = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DR) >> 8) == 0U) ? ENABLE : DISABLE;
 8008754:	687b      	ldr	r3, [r7, #4]
 8008756:	681b      	ldr	r3, [r3, #0]
 8008758:	681b      	ldr	r3, [r3, #0]
 800875a:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800875e:	2b00      	cmp	r3, #0
 8008760:	bf0c      	ite	eq
 8008762:	2301      	moveq	r3, #1
 8008764:	2300      	movne	r3, #0
 8008766:	b2db      	uxtb	r3, r3
 8008768:	461a      	mov	r2, r3
 800876a:	683b      	ldr	r3, [r7, #0]
 800876c:	f883 2020 	strb.w	r2, [r3, #32]
  macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U)
 8008770:	687b      	ldr	r3, [r7, #4]
 8008772:	681b      	ldr	r3, [r3, #0]
 8008774:	681b      	ldr	r3, [r3, #0]
 8008776:	f403 7300 	and.w	r3, r3, #512	@ 0x200
                                        ? ENABLE : DISABLE;
 800877a:	2b00      	cmp	r3, #0
 800877c:	bf14      	ite	ne
 800877e:	2301      	movne	r3, #1
 8008780:	2300      	moveq	r3, #0
 8008782:	b2db      	uxtb	r3, r3
 8008784:	461a      	mov	r2, r3
  macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U)
 8008786:	683b      	ldr	r3, [r7, #0]
 8008788:	77da      	strb	r2, [r3, #31]
  macconf->ReceiveOwn = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DO) >> 10) == 0U) ? ENABLE : DISABLE;
 800878a:	687b      	ldr	r3, [r7, #4]
 800878c:	681b      	ldr	r3, [r3, #0]
 800878e:	681b      	ldr	r3, [r3, #0]
 8008790:	f403 6380 	and.w	r3, r3, #1024	@ 0x400
 8008794:	2b00      	cmp	r3, #0
 8008796:	bf0c      	ite	eq
 8008798:	2301      	moveq	r3, #1
 800879a:	2300      	movne	r3, #0
 800879c:	b2db      	uxtb	r3, r3
 800879e:	461a      	mov	r2, r3
 80087a0:	683b      	ldr	r3, [r7, #0]
 80087a2:	779a      	strb	r2, [r3, #30]
  macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR,
 80087a4:	687b      	ldr	r3, [r7, #4]
 80087a6:	681b      	ldr	r3, [r3, #0]
 80087a8:	681b      	ldr	r3, [r3, #0]
                                                   ETH_MACCR_ECRSFD) >> 11) > 0U) ? ENABLE : DISABLE;
 80087aa:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 80087ae:	2b00      	cmp	r3, #0
 80087b0:	bf14      	ite	ne
 80087b2:	2301      	movne	r3, #1
 80087b4:	2300      	moveq	r3, #0
 80087b6:	b2db      	uxtb	r3, r3
 80087b8:	461a      	mov	r2, r3
  macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR,
 80087ba:	683b      	ldr	r3, [r7, #0]
 80087bc:	775a      	strb	r2, [r3, #29]
  macconf->LoopbackMode = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_LM) >> 12) > 0U) ? ENABLE : DISABLE;
 80087be:	687b      	ldr	r3, [r7, #4]
 80087c0:	681b      	ldr	r3, [r3, #0]
 80087c2:	681b      	ldr	r3, [r3, #0]
 80087c4:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 80087c8:	2b00      	cmp	r3, #0
 80087ca:	bf14      	ite	ne
 80087cc:	2301      	movne	r3, #1
 80087ce:	2300      	moveq	r3, #0
 80087d0:	b2db      	uxtb	r3, r3
 80087d2:	461a      	mov	r2, r3
 80087d4:	683b      	ldr	r3, [r7, #0]
 80087d6:	771a      	strb	r2, [r3, #28]
  macconf->DuplexMode = READ_BIT(heth->Instance->MACCR, ETH_MACCR_DM);
 80087d8:	687b      	ldr	r3, [r7, #4]
 80087da:	681b      	ldr	r3, [r3, #0]
 80087dc:	681b      	ldr	r3, [r3, #0]
 80087de:	f403 5200 	and.w	r2, r3, #8192	@ 0x2000
 80087e2:	683b      	ldr	r3, [r7, #0]
 80087e4:	619a      	str	r2, [r3, #24]
  macconf->Speed = READ_BIT(heth->Instance->MACCR, ETH_MACCR_FES);
 80087e6:	687b      	ldr	r3, [r7, #4]
 80087e8:	681b      	ldr	r3, [r3, #0]
 80087ea:	681b      	ldr	r3, [r3, #0]
 80087ec:	f403 4280 	and.w	r2, r3, #16384	@ 0x4000
 80087f0:	683b      	ldr	r3, [r7, #0]
 80087f2:	615a      	str	r2, [r3, #20]
  macconf->JumboPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JE) >> 16) > 0U) ? ENABLE : DISABLE;
 80087f4:	687b      	ldr	r3, [r7, #4]
 80087f6:	681b      	ldr	r3, [r3, #0]
 80087f8:	681b      	ldr	r3, [r3, #0]
 80087fa:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 80087fe:	2b00      	cmp	r3, #0
 8008800:	bf14      	ite	ne
 8008802:	2301      	movne	r3, #1
 8008804:	2300      	moveq	r3, #0
 8008806:	b2db      	uxtb	r3, r3
 8008808:	461a      	mov	r2, r3
 800880a:	683b      	ldr	r3, [r7, #0]
 800880c:	749a      	strb	r2, [r3, #18]
  macconf->Jabber = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JD) >> 17) == 0U) ? ENABLE : DISABLE;
 800880e:	687b      	ldr	r3, [r7, #4]
 8008810:	681b      	ldr	r3, [r3, #0]
 8008812:	681b      	ldr	r3, [r3, #0]
 8008814:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8008818:	2b00      	cmp	r3, #0
 800881a:	bf0c      	ite	eq
 800881c:	2301      	moveq	r3, #1
 800881e:	2300      	movne	r3, #0
 8008820:	b2db      	uxtb	r3, r3
 8008822:	461a      	mov	r2, r3
 8008824:	683b      	ldr	r3, [r7, #0]
 8008826:	745a      	strb	r2, [r3, #17]
  macconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >> 19) == 0U) ? ENABLE : DISABLE;
 8008828:	687b      	ldr	r3, [r7, #4]
 800882a:	681b      	ldr	r3, [r3, #0]
 800882c:	681b      	ldr	r3, [r3, #0]
 800882e:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 8008832:	2b00      	cmp	r3, #0
 8008834:	bf0c      	ite	eq
 8008836:	2301      	moveq	r3, #1
 8008838:	2300      	movne	r3, #0
 800883a:	b2db      	uxtb	r3, r3
 800883c:	461a      	mov	r2, r3
 800883e:	683b      	ldr	r3, [r7, #0]
 8008840:	741a      	strb	r2, [r3, #16]
  macconf->AutomaticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ACS) >> 20) > 0U) ? ENABLE : DISABLE;
 8008842:	687b      	ldr	r3, [r7, #4]
 8008844:	681b      	ldr	r3, [r3, #0]
 8008846:	681b      	ldr	r3, [r3, #0]
 8008848:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 800884c:	2b00      	cmp	r3, #0
 800884e:	bf14      	ite	ne
 8008850:	2301      	movne	r3, #1
 8008852:	2300      	moveq	r3, #0
 8008854:	b2db      	uxtb	r3, r3
 8008856:	461a      	mov	r2, r3
 8008858:	683b      	ldr	r3, [r7, #0]
 800885a:	73da      	strb	r2, [r3, #15]
  macconf->CRCStripTypePacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_CST) >> 21) > 0U) ? ENABLE : DISABLE;
 800885c:	687b      	ldr	r3, [r7, #4]
 800885e:	681b      	ldr	r3, [r3, #0]
 8008860:	681b      	ldr	r3, [r3, #0]
 8008862:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
 8008866:	2b00      	cmp	r3, #0
 8008868:	bf14      	ite	ne
 800886a:	2301      	movne	r3, #1
 800886c:	2300      	moveq	r3, #0
 800886e:	b2db      	uxtb	r3, r3
 8008870:	461a      	mov	r2, r3
 8008872:	683b      	ldr	r3, [r7, #0]
 8008874:	739a      	strb	r2, [r3, #14]
  macconf->Support2KPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_S2KP) >> 22) > 0U) ? ENABLE : DISABLE;
 8008876:	687b      	ldr	r3, [r7, #4]
 8008878:	681b      	ldr	r3, [r3, #0]
 800887a:	681b      	ldr	r3, [r3, #0]
 800887c:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 8008880:	2b00      	cmp	r3, #0
 8008882:	bf14      	ite	ne
 8008884:	2301      	movne	r3, #1
 8008886:	2300      	moveq	r3, #0
 8008888:	b2db      	uxtb	r3, r3
 800888a:	461a      	mov	r2, r3
 800888c:	683b      	ldr	r3, [r7, #0]
 800888e:	735a      	strb	r2, [r3, #13]
  macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR,
 8008890:	687b      	ldr	r3, [r7, #4]
 8008892:	681b      	ldr	r3, [r3, #0]
 8008894:	681b      	ldr	r3, [r3, #0]
                                                    ETH_MACCR_GPSLCE) >> 23) > 0U) ? ENABLE : DISABLE;
 8008896:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800889a:	2b00      	cmp	r3, #0
 800889c:	bf14      	ite	ne
 800889e:	2301      	movne	r3, #1
 80088a0:	2300      	moveq	r3, #0
 80088a2:	b2db      	uxtb	r3, r3
 80088a4:	461a      	mov	r2, r3
  macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR,
 80088a6:	683b      	ldr	r3, [r7, #0]
 80088a8:	731a      	strb	r2, [r3, #12]
  macconf->InterPacketGapVal = READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPG);
 80088aa:	687b      	ldr	r3, [r7, #4]
 80088ac:	681b      	ldr	r3, [r3, #0]
 80088ae:	681b      	ldr	r3, [r3, #0]
 80088b0:	f003 62e0 	and.w	r2, r3, #117440512	@ 0x7000000
 80088b4:	683b      	ldr	r3, [r7, #0]
 80088b6:	609a      	str	r2, [r3, #8]
  macconf->ChecksumOffload = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPC) >> 27) > 0U) ? ENABLE : DISABLE;
 80088b8:	687b      	ldr	r3, [r7, #4]
 80088ba:	681b      	ldr	r3, [r3, #0]
 80088bc:	681b      	ldr	r3, [r3, #0]
 80088be:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 80088c2:	2b00      	cmp	r3, #0
 80088c4:	bf14      	ite	ne
 80088c6:	2301      	movne	r3, #1
 80088c8:	2300      	moveq	r3, #0
 80088ca:	b2db      	uxtb	r3, r3
 80088cc:	461a      	mov	r2, r3
 80088ce:	683b      	ldr	r3, [r7, #0]
 80088d0:	711a      	strb	r2, [r3, #4]
  macconf->SourceAddrControl = READ_BIT(heth->Instance->MACCR, ETH_MACCR_SARC);
 80088d2:	687b      	ldr	r3, [r7, #4]
 80088d4:	681b      	ldr	r3, [r3, #0]
 80088d6:	681b      	ldr	r3, [r3, #0]
 80088d8:	f003 42e0 	and.w	r2, r3, #1879048192	@ 0x70000000
 80088dc:	683b      	ldr	r3, [r7, #0]
 80088de:	601a      	str	r2, [r3, #0]

  macconf->GiantPacketSizeLimit = READ_BIT(heth->Instance->MACECR, ETH_MACECR_GPSL);
 80088e0:	687b      	ldr	r3, [r7, #4]
 80088e2:	681b      	ldr	r3, [r3, #0]
 80088e4:	685b      	ldr	r3, [r3, #4]
 80088e6:	f3c3 020d 	ubfx	r2, r3, #0, #14
 80088ea:	683b      	ldr	r3, [r7, #0]
 80088ec:	635a      	str	r2, [r3, #52]	@ 0x34
  macconf->CRCCheckingRxPackets = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_DCRCC) >> 16) == 0U) ? ENABLE : DISABLE;
 80088ee:	687b      	ldr	r3, [r7, #4]
 80088f0:	681b      	ldr	r3, [r3, #0]
 80088f2:	685b      	ldr	r3, [r3, #4]
 80088f4:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 80088f8:	2b00      	cmp	r3, #0
 80088fa:	bf0c      	ite	eq
 80088fc:	2301      	moveq	r3, #1
 80088fe:	2300      	movne	r3, #0
 8008900:	b2db      	uxtb	r3, r3
 8008902:	461a      	mov	r2, r3
 8008904:	683b      	ldr	r3, [r7, #0]
 8008906:	f883 2032 	strb.w	r2, [r3, #50]	@ 0x32
  macconf->SlowProtocolDetect = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_SPEN) >> 17) > 0U) ? ENABLE : DISABLE;
 800890a:	687b      	ldr	r3, [r7, #4]
 800890c:	681b      	ldr	r3, [r3, #0]
 800890e:	685b      	ldr	r3, [r3, #4]
 8008910:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8008914:	2b00      	cmp	r3, #0
 8008916:	bf14      	ite	ne
 8008918:	2301      	movne	r3, #1
 800891a:	2300      	moveq	r3, #0
 800891c:	b2db      	uxtb	r3, r3
 800891e:	461a      	mov	r2, r3
 8008920:	683b      	ldr	r3, [r7, #0]
 8008922:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
  macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR,
 8008926:	687b      	ldr	r3, [r7, #4]
 8008928:	681b      	ldr	r3, [r3, #0]
 800892a:	685b      	ldr	r3, [r3, #4]
                                                        ETH_MACECR_USP) >> 18) > 0U) ? ENABLE : DISABLE;
 800892c:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 8008930:	2b00      	cmp	r3, #0
 8008932:	bf14      	ite	ne
 8008934:	2301      	movne	r3, #1
 8008936:	2300      	moveq	r3, #0
 8008938:	b2db      	uxtb	r3, r3
 800893a:	461a      	mov	r2, r3
  macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR,
 800893c:	683b      	ldr	r3, [r7, #0]
 800893e:	f883 2030 	strb.w	r2, [r3, #48]	@ 0x30
  macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U)
 8008942:	687b      	ldr	r3, [r7, #4]
 8008944:	681b      	ldr	r3, [r3, #0]
 8008946:	685b      	ldr	r3, [r3, #4]
 8008948:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
                                    ? ENABLE : DISABLE;
 800894c:	2b00      	cmp	r3, #0
 800894e:	bf14      	ite	ne
 8008950:	2301      	movne	r3, #1
 8008952:	2300      	moveq	r3, #0
 8008954:	b2db      	uxtb	r3, r3
 8008956:	461a      	mov	r2, r3
  macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U)
 8008958:	683b      	ldr	r3, [r7, #0]
 800895a:	f883 2038 	strb.w	r2, [r3, #56]	@ 0x38
  macconf->ExtendedInterPacketGapVal = READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPG) >> 25;
 800895e:	687b      	ldr	r3, [r7, #4]
 8008960:	681b      	ldr	r3, [r3, #0]
 8008962:	685b      	ldr	r3, [r3, #4]
 8008964:	0e5b      	lsrs	r3, r3, #25
 8008966:	f003 021f 	and.w	r2, r3, #31
 800896a:	683b      	ldr	r3, [r7, #0]
 800896c:	63da      	str	r2, [r3, #60]	@ 0x3c

  macconf->ProgrammableWatchdog = ((READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_PWE) >> 8) > 0U) ? ENABLE : DISABLE;
 800896e:	687b      	ldr	r3, [r7, #4]
 8008970:	681b      	ldr	r3, [r3, #0]
 8008972:	68db      	ldr	r3, [r3, #12]
 8008974:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8008978:	2b00      	cmp	r3, #0
 800897a:	bf14      	ite	ne
 800897c:	2301      	movne	r3, #1
 800897e:	2300      	moveq	r3, #0
 8008980:	b2db      	uxtb	r3, r3
 8008982:	461a      	mov	r2, r3
 8008984:	683b      	ldr	r3, [r7, #0]
 8008986:	f883 2040 	strb.w	r2, [r3, #64]	@ 0x40
  macconf->WatchdogTimeout = READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_WTO);
 800898a:	687b      	ldr	r3, [r7, #4]
 800898c:	681b      	ldr	r3, [r3, #0]
 800898e:	68db      	ldr	r3, [r3, #12]
 8008990:	f003 020f 	and.w	r2, r3, #15
 8008994:	683b      	ldr	r3, [r7, #0]
 8008996:	645a      	str	r2, [r3, #68]	@ 0x44

  macconf->TransmitFlowControl = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_TFE) >> 1) > 0U) ? ENABLE : DISABLE;
 8008998:	687b      	ldr	r3, [r7, #4]
 800899a:	681b      	ldr	r3, [r3, #0]
 800899c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800899e:	f003 0302 	and.w	r3, r3, #2
 80089a2:	2b00      	cmp	r3, #0
 80089a4:	bf14      	ite	ne
 80089a6:	2301      	movne	r3, #1
 80089a8:	2300      	moveq	r3, #0
 80089aa:	b2db      	uxtb	r3, r3
 80089ac:	461a      	mov	r2, r3
 80089ae:	683b      	ldr	r3, [r7, #0]
 80089b0:	f883 2054 	strb.w	r2, [r3, #84]	@ 0x54
  macconf->ZeroQuantaPause = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_DZPQ) >> 7) == 0U) ? ENABLE : DISABLE;
 80089b4:	687b      	ldr	r3, [r7, #4]
 80089b6:	681b      	ldr	r3, [r3, #0]
 80089b8:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80089ba:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 80089be:	2b00      	cmp	r3, #0
 80089c0:	bf0c      	ite	eq
 80089c2:	2301      	moveq	r3, #1
 80089c4:	2300      	movne	r3, #0
 80089c6:	b2db      	uxtb	r3, r3
 80089c8:	461a      	mov	r2, r3
 80089ca:	683b      	ldr	r3, [r7, #0]
 80089cc:	f883 204c 	strb.w	r2, [r3, #76]	@ 0x4c
  macconf->PauseLowThreshold = READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PLT);
 80089d0:	687b      	ldr	r3, [r7, #4]
 80089d2:	681b      	ldr	r3, [r3, #0]
 80089d4:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80089d6:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 80089da:	683b      	ldr	r3, [r7, #0]
 80089dc:	651a      	str	r2, [r3, #80]	@ 0x50
  macconf->PauseTime = (READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PT) >> 16);
 80089de:	687b      	ldr	r3, [r7, #4]
 80089e0:	681b      	ldr	r3, [r3, #0]
 80089e2:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80089e4:	0c1b      	lsrs	r3, r3, #16
 80089e6:	b29a      	uxth	r2, r3
 80089e8:	683b      	ldr	r3, [r7, #0]
 80089ea:	649a      	str	r2, [r3, #72]	@ 0x48
  macconf->ReceiveFlowControl = (READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_RFE) > 0U) ? ENABLE : DISABLE;
 80089ec:	687b      	ldr	r3, [r7, #4]
 80089ee:	681b      	ldr	r3, [r3, #0]
 80089f0:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 80089f4:	f003 0301 	and.w	r3, r3, #1
 80089f8:	2b00      	cmp	r3, #0
 80089fa:	bf14      	ite	ne
 80089fc:	2301      	movne	r3, #1
 80089fe:	2300      	moveq	r3, #0
 8008a00:	b2db      	uxtb	r3, r3
 8008a02:	461a      	mov	r2, r3
 8008a04:	683b      	ldr	r3, [r7, #0]
 8008a06:	f883 2056 	strb.w	r2, [r3, #86]	@ 0x56
  macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U)
 8008a0a:	687b      	ldr	r3, [r7, #4]
 8008a0c:	681b      	ldr	r3, [r3, #0]
 8008a0e:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 8008a12:	f003 0302 	and.w	r3, r3, #2
                                      ? ENABLE : DISABLE;
 8008a16:	2b00      	cmp	r3, #0
 8008a18:	bf14      	ite	ne
 8008a1a:	2301      	movne	r3, #1
 8008a1c:	2300      	moveq	r3, #0
 8008a1e:	b2db      	uxtb	r3, r3
 8008a20:	461a      	mov	r2, r3
  macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U)
 8008a22:	683b      	ldr	r3, [r7, #0]
 8008a24:	f883 2055 	strb.w	r2, [r3, #85]	@ 0x55

  macconf->TransmitQueueMode = READ_BIT(heth->Instance->MTLTQOMR, (ETH_MTLTQOMR_TTC | ETH_MTLTQOMR_TSF));
 8008a28:	687b      	ldr	r3, [r7, #4]
 8008a2a:	681b      	ldr	r3, [r3, #0]
 8008a2c:	f8d3 3d00 	ldr.w	r3, [r3, #3328]	@ 0xd00
 8008a30:	f003 0272 	and.w	r2, r3, #114	@ 0x72
 8008a34:	683b      	ldr	r3, [r7, #0]
 8008a36:	659a      	str	r2, [r3, #88]	@ 0x58

  macconf->ReceiveQueueMode = READ_BIT(heth->Instance->MTLRQOMR, (ETH_MTLRQOMR_RTC | ETH_MTLRQOMR_RSF));
 8008a38:	687b      	ldr	r3, [r7, #4]
 8008a3a:	681b      	ldr	r3, [r3, #0]
 8008a3c:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 8008a40:	f003 0223 	and.w	r2, r3, #35	@ 0x23
 8008a44:	683b      	ldr	r3, [r7, #0]
 8008a46:	65da      	str	r2, [r3, #92]	@ 0x5c
  macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 8008a48:	687b      	ldr	r3, [r7, #4]
 8008a4a:	681b      	ldr	r3, [r3, #0]
 8008a4c:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
                                                      ETH_MTLRQOMR_FUP) >> 3) > 0U) ? ENABLE : DISABLE;
 8008a50:	f003 0308 	and.w	r3, r3, #8
 8008a54:	2b00      	cmp	r3, #0
 8008a56:	bf14      	ite	ne
 8008a58:	2301      	movne	r3, #1
 8008a5a:	2300      	moveq	r3, #0
 8008a5c:	b2db      	uxtb	r3, r3
 8008a5e:	461a      	mov	r2, r3
  macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 8008a60:	683b      	ldr	r3, [r7, #0]
 8008a62:	f883 2062 	strb.w	r2, [r3, #98]	@ 0x62
  macconf->ForwardRxErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_FEP) >> 4) > 0U) ? ENABLE : DISABLE;
 8008a66:	687b      	ldr	r3, [r7, #4]
 8008a68:	681b      	ldr	r3, [r3, #0]
 8008a6a:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 8008a6e:	f003 0310 	and.w	r3, r3, #16
 8008a72:	2b00      	cmp	r3, #0
 8008a74:	bf14      	ite	ne
 8008a76:	2301      	movne	r3, #1
 8008a78:	2300      	moveq	r3, #0
 8008a7a:	b2db      	uxtb	r3, r3
 8008a7c:	461a      	mov	r2, r3
 8008a7e:	683b      	ldr	r3, [r7, #0]
 8008a80:	f883 2061 	strb.w	r2, [r3, #97]	@ 0x61
  macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 8008a84:	687b      	ldr	r3, [r7, #4]
 8008a86:	681b      	ldr	r3, [r3, #0]
 8008a88:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
                                                     ETH_MTLRQOMR_DISTCPEF) >> 6) == 0U) ? ENABLE : DISABLE;
 8008a8c:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8008a90:	2b00      	cmp	r3, #0
 8008a92:	bf0c      	ite	eq
 8008a94:	2301      	moveq	r3, #1
 8008a96:	2300      	movne	r3, #0
 8008a98:	b2db      	uxtb	r3, r3
 8008a9a:	461a      	mov	r2, r3
  macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 8008a9c:	683b      	ldr	r3, [r7, #0]
 8008a9e:	f883 2060 	strb.w	r2, [r3, #96]	@ 0x60

  return HAL_OK;
 8008aa2:	2300      	movs	r3, #0
}
 8008aa4:	4618      	mov	r0, r3
 8008aa6:	370c      	adds	r7, #12
 8008aa8:	46bd      	mov	sp, r7
 8008aaa:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008aae:	4770      	bx	lr

08008ab0 <HAL_ETH_SetMACConfig>:
  * @param  macconf: pointer to a ETH_MACConfigTypeDef structure that contains
  *         the configuration of the MAC.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_SetMACConfig(ETH_HandleTypeDef *heth,  ETH_MACConfigTypeDef *macconf)
{
 8008ab0:	b580      	push	{r7, lr}
 8008ab2:	b082      	sub	sp, #8
 8008ab4:	af00      	add	r7, sp, #0
 8008ab6:	6078      	str	r0, [r7, #4]
 8008ab8:	6039      	str	r1, [r7, #0]
  if (macconf == NULL)
 8008aba:	683b      	ldr	r3, [r7, #0]
 8008abc:	2b00      	cmp	r3, #0
 8008abe:	d101      	bne.n	8008ac4 <HAL_ETH_SetMACConfig+0x14>
  {
    return HAL_ERROR;
 8008ac0:	2301      	movs	r3, #1
 8008ac2:	e00b      	b.n	8008adc <HAL_ETH_SetMACConfig+0x2c>
  }

  if (heth->gState == HAL_ETH_STATE_READY)
 8008ac4:	687b      	ldr	r3, [r7, #4]
 8008ac6:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8008aca:	2b10      	cmp	r3, #16
 8008acc:	d105      	bne.n	8008ada <HAL_ETH_SetMACConfig+0x2a>
  {
    ETH_SetMACConfig(heth, macconf);
 8008ace:	6839      	ldr	r1, [r7, #0]
 8008ad0:	6878      	ldr	r0, [r7, #4]
 8008ad2:	f000 f865 	bl	8008ba0 <ETH_SetMACConfig>

    return HAL_OK;
 8008ad6:	2300      	movs	r3, #0
 8008ad8:	e000      	b.n	8008adc <HAL_ETH_SetMACConfig+0x2c>
  }
  else
  {
    return HAL_ERROR;
 8008ada:	2301      	movs	r3, #1
  }
}
 8008adc:	4618      	mov	r0, r3
 8008ade:	3708      	adds	r7, #8
 8008ae0:	46bd      	mov	sp, r7
 8008ae2:	bd80      	pop	{r7, pc}

08008ae4 <HAL_ETH_SetMDIOClockRange>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
void HAL_ETH_SetMDIOClockRange(ETH_HandleTypeDef *heth)
{
 8008ae4:	b580      	push	{r7, lr}
 8008ae6:	b084      	sub	sp, #16
 8008ae8:	af00      	add	r7, sp, #0
 8008aea:	6078      	str	r0, [r7, #4]
  uint32_t hclk;
  uint32_t tmpreg;

  /* Get the ETHERNET MACMDIOAR value */
  tmpreg = (heth->Instance)->MACMDIOAR;
 8008aec:	687b      	ldr	r3, [r7, #4]
 8008aee:	681b      	ldr	r3, [r3, #0]
 8008af0:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008af4:	60fb      	str	r3, [r7, #12]

  /* Clear CSR Clock Range bits */
  tmpreg &= ~ETH_MACMDIOAR_CR;
 8008af6:	68fb      	ldr	r3, [r7, #12]
 8008af8:	f423 6370 	bic.w	r3, r3, #3840	@ 0xf00
 8008afc:	60fb      	str	r3, [r7, #12]

  /* Get hclk frequency value */
  hclk = HAL_RCC_GetHCLKFreq();
 8008afe:	f001 ff5f 	bl	800a9c0 <HAL_RCC_GetHCLKFreq>
 8008b02:	60b8      	str	r0, [r7, #8]

  /* Set CR bits depending on hclk value */
  if (hclk < 35000000U)
 8008b04:	68bb      	ldr	r3, [r7, #8]
 8008b06:	4a1a      	ldr	r2, [pc, #104]	@ (8008b70 <HAL_ETH_SetMDIOClockRange+0x8c>)
 8008b08:	4293      	cmp	r3, r2
 8008b0a:	d804      	bhi.n	8008b16 <HAL_ETH_SetMDIOClockRange+0x32>
  {
    /* CSR Clock Range between 0-35 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV16;
 8008b0c:	68fb      	ldr	r3, [r7, #12]
 8008b0e:	f443 7300 	orr.w	r3, r3, #512	@ 0x200
 8008b12:	60fb      	str	r3, [r7, #12]
 8008b14:	e022      	b.n	8008b5c <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 60000000U)
 8008b16:	68bb      	ldr	r3, [r7, #8]
 8008b18:	4a16      	ldr	r2, [pc, #88]	@ (8008b74 <HAL_ETH_SetMDIOClockRange+0x90>)
 8008b1a:	4293      	cmp	r3, r2
 8008b1c:	d204      	bcs.n	8008b28 <HAL_ETH_SetMDIOClockRange+0x44>
  {
    /* CSR Clock Range between 35-60 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV26;
 8008b1e:	68fb      	ldr	r3, [r7, #12]
 8008b20:	f443 7340 	orr.w	r3, r3, #768	@ 0x300
 8008b24:	60fb      	str	r3, [r7, #12]
 8008b26:	e019      	b.n	8008b5c <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 100000000U)
 8008b28:	68bb      	ldr	r3, [r7, #8]
 8008b2a:	4a13      	ldr	r2, [pc, #76]	@ (8008b78 <HAL_ETH_SetMDIOClockRange+0x94>)
 8008b2c:	4293      	cmp	r3, r2
 8008b2e:	d915      	bls.n	8008b5c <HAL_ETH_SetMDIOClockRange+0x78>
  {
    /* CSR Clock Range between 60-100 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV42;
  }
  else if (hclk < 150000000U)
 8008b30:	68bb      	ldr	r3, [r7, #8]
 8008b32:	4a12      	ldr	r2, [pc, #72]	@ (8008b7c <HAL_ETH_SetMDIOClockRange+0x98>)
 8008b34:	4293      	cmp	r3, r2
 8008b36:	d804      	bhi.n	8008b42 <HAL_ETH_SetMDIOClockRange+0x5e>
  {
    /* CSR Clock Range between 100-150 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV62;
 8008b38:	68fb      	ldr	r3, [r7, #12]
 8008b3a:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 8008b3e:	60fb      	str	r3, [r7, #12]
 8008b40:	e00c      	b.n	8008b5c <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 250000000U)
 8008b42:	68bb      	ldr	r3, [r7, #8]
 8008b44:	4a0e      	ldr	r2, [pc, #56]	@ (8008b80 <HAL_ETH_SetMDIOClockRange+0x9c>)
 8008b46:	4293      	cmp	r3, r2
 8008b48:	d804      	bhi.n	8008b54 <HAL_ETH_SetMDIOClockRange+0x70>
  {
    /* CSR Clock Range between 150-250 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV102;
 8008b4a:	68fb      	ldr	r3, [r7, #12]
 8008b4c:	f443 6380 	orr.w	r3, r3, #1024	@ 0x400
 8008b50:	60fb      	str	r3, [r7, #12]
 8008b52:	e003      	b.n	8008b5c <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else /* (hclk >= 250000000U) */
  {
    /* CSR Clock >= 250 MHz */
    tmpreg |= (uint32_t)(ETH_MACMDIOAR_CR_DIV124);
 8008b54:	68fb      	ldr	r3, [r7, #12]
 8008b56:	f443 63a0 	orr.w	r3, r3, #1280	@ 0x500
 8008b5a:	60fb      	str	r3, [r7, #12]
  }

  /* Configure the CSR Clock Range */
  (heth->Instance)->MACMDIOAR = (uint32_t)tmpreg;
 8008b5c:	687b      	ldr	r3, [r7, #4]
 8008b5e:	681b      	ldr	r3, [r3, #0]
 8008b60:	68fa      	ldr	r2, [r7, #12]
 8008b62:	f8c3 2200 	str.w	r2, [r3, #512]	@ 0x200
}
 8008b66:	bf00      	nop
 8008b68:	3710      	adds	r7, #16
 8008b6a:	46bd      	mov	sp, r7
 8008b6c:	bd80      	pop	{r7, pc}
 8008b6e:	bf00      	nop
 8008b70:	02160ebf 	.word	0x02160ebf
 8008b74:	03938700 	.word	0x03938700
 8008b78:	05f5e0ff 	.word	0x05f5e0ff
 8008b7c:	08f0d17f 	.word	0x08f0d17f
 8008b80:	0ee6b27f 	.word	0x0ee6b27f

08008b84 <HAL_ETH_GetDMAError>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval ETH DMA Error Code
  */
uint32_t HAL_ETH_GetDMAError(const ETH_HandleTypeDef *heth)
{
 8008b84:	b480      	push	{r7}
 8008b86:	b083      	sub	sp, #12
 8008b88:	af00      	add	r7, sp, #0
 8008b8a:	6078      	str	r0, [r7, #4]
  return heth->DMAErrorCode;
 8008b8c:	687b      	ldr	r3, [r7, #4]
 8008b8e:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
}
 8008b92:	4618      	mov	r0, r3
 8008b94:	370c      	adds	r7, #12
 8008b96:	46bd      	mov	sp, r7
 8008b98:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008b9c:	4770      	bx	lr
	...

08008ba0 <ETH_SetMACConfig>:
/** @addtogroup ETH_Private_Functions   ETH Private Functions
  * @{
  */

static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, const ETH_MACConfigTypeDef *macconf)
{
 8008ba0:	b480      	push	{r7}
 8008ba2:	b085      	sub	sp, #20
 8008ba4:	af00      	add	r7, sp, #0
 8008ba6:	6078      	str	r0, [r7, #4]
 8008ba8:	6039      	str	r1, [r7, #0]
  uint32_t macregval;

  /*------------------------ MACCR Configuration --------------------*/
  macregval = (macconf->InterPacketGapVal |
 8008baa:	683b      	ldr	r3, [r7, #0]
 8008bac:	689a      	ldr	r2, [r3, #8]
               macconf->SourceAddrControl |
 8008bae:	683b      	ldr	r3, [r7, #0]
 8008bb0:	681b      	ldr	r3, [r3, #0]
  macregval = (macconf->InterPacketGapVal |
 8008bb2:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ChecksumOffload << 27) |
 8008bb4:	683b      	ldr	r3, [r7, #0]
 8008bb6:	791b      	ldrb	r3, [r3, #4]
 8008bb8:	06db      	lsls	r3, r3, #27
               macconf->SourceAddrControl |
 8008bba:	431a      	orrs	r2, r3
               ((uint32_t)macconf->GiantPacketSizeLimitControl << 23) |
 8008bbc:	683b      	ldr	r3, [r7, #0]
 8008bbe:	7b1b      	ldrb	r3, [r3, #12]
 8008bc0:	05db      	lsls	r3, r3, #23
               ((uint32_t)macconf->ChecksumOffload << 27) |
 8008bc2:	431a      	orrs	r2, r3
               ((uint32_t)macconf->Support2KPacket  << 22) |
 8008bc4:	683b      	ldr	r3, [r7, #0]
 8008bc6:	7b5b      	ldrb	r3, [r3, #13]
 8008bc8:	059b      	lsls	r3, r3, #22
               ((uint32_t)macconf->GiantPacketSizeLimitControl << 23) |
 8008bca:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CRCStripTypePacket << 21) |
 8008bcc:	683b      	ldr	r3, [r7, #0]
 8008bce:	7b9b      	ldrb	r3, [r3, #14]
 8008bd0:	055b      	lsls	r3, r3, #21
               ((uint32_t)macconf->Support2KPacket  << 22) |
 8008bd2:	431a      	orrs	r2, r3
               ((uint32_t)macconf->AutomaticPadCRCStrip << 20) |
 8008bd4:	683b      	ldr	r3, [r7, #0]
 8008bd6:	7bdb      	ldrb	r3, [r3, #15]
 8008bd8:	051b      	lsls	r3, r3, #20
               ((uint32_t)macconf->CRCStripTypePacket << 21) |
 8008bda:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) |
 8008bdc:	683a      	ldr	r2, [r7, #0]
 8008bde:	7c12      	ldrb	r2, [r2, #16]
 8008be0:	2a00      	cmp	r2, #0
 8008be2:	d102      	bne.n	8008bea <ETH_SetMACConfig+0x4a>
 8008be4:	f44f 2200 	mov.w	r2, #524288	@ 0x80000
 8008be8:	e000      	b.n	8008bec <ETH_SetMACConfig+0x4c>
 8008bea:	2200      	movs	r2, #0
               ((uint32_t)macconf->AutomaticPadCRCStrip << 20) |
 8008bec:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) |
 8008bee:	683a      	ldr	r2, [r7, #0]
 8008bf0:	7c52      	ldrb	r2, [r2, #17]
 8008bf2:	2a00      	cmp	r2, #0
 8008bf4:	d102      	bne.n	8008bfc <ETH_SetMACConfig+0x5c>
 8008bf6:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 8008bfa:	e000      	b.n	8008bfe <ETH_SetMACConfig+0x5e>
 8008bfc:	2200      	movs	r2, #0
               ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) |
 8008bfe:	431a      	orrs	r2, r3
               ((uint32_t)macconf->JumboPacket << 16) |
 8008c00:	683b      	ldr	r3, [r7, #0]
 8008c02:	7c9b      	ldrb	r3, [r3, #18]
 8008c04:	041b      	lsls	r3, r3, #16
               ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) |
 8008c06:	431a      	orrs	r2, r3
               macconf->Speed |
 8008c08:	683b      	ldr	r3, [r7, #0]
 8008c0a:	695b      	ldr	r3, [r3, #20]
               ((uint32_t)macconf->JumboPacket << 16) |
 8008c0c:	431a      	orrs	r2, r3
               macconf->DuplexMode |
 8008c0e:	683b      	ldr	r3, [r7, #0]
 8008c10:	699b      	ldr	r3, [r3, #24]
               macconf->Speed |
 8008c12:	431a      	orrs	r2, r3
               ((uint32_t)macconf->LoopbackMode << 12) |
 8008c14:	683b      	ldr	r3, [r7, #0]
 8008c16:	7f1b      	ldrb	r3, [r3, #28]
 8008c18:	031b      	lsls	r3, r3, #12
               macconf->DuplexMode |
 8008c1a:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) |
 8008c1c:	683b      	ldr	r3, [r7, #0]
 8008c1e:	7f5b      	ldrb	r3, [r3, #29]
 8008c20:	02db      	lsls	r3, r3, #11
               ((uint32_t)macconf->LoopbackMode << 12) |
 8008c22:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) |
 8008c24:	683a      	ldr	r2, [r7, #0]
 8008c26:	7f92      	ldrb	r2, [r2, #30]
 8008c28:	2a00      	cmp	r2, #0
 8008c2a:	d102      	bne.n	8008c32 <ETH_SetMACConfig+0x92>
 8008c2c:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 8008c30:	e000      	b.n	8008c34 <ETH_SetMACConfig+0x94>
 8008c32:	2200      	movs	r2, #0
               ((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) |
 8008c34:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CarrierSenseDuringTransmit << 9) |
 8008c36:	683b      	ldr	r3, [r7, #0]
 8008c38:	7fdb      	ldrb	r3, [r3, #31]
 8008c3a:	025b      	lsls	r3, r3, #9
               ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) |
 8008c3c:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) |
 8008c3e:	683a      	ldr	r2, [r7, #0]
 8008c40:	f892 2020 	ldrb.w	r2, [r2, #32]
 8008c44:	2a00      	cmp	r2, #0
 8008c46:	d102      	bne.n	8008c4e <ETH_SetMACConfig+0xae>
 8008c48:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8008c4c:	e000      	b.n	8008c50 <ETH_SetMACConfig+0xb0>
 8008c4e:	2200      	movs	r2, #0
               ((uint32_t)macconf->CarrierSenseDuringTransmit << 9) |
 8008c50:	431a      	orrs	r2, r3
               macconf->BackOffLimit |
 8008c52:	683b      	ldr	r3, [r7, #0]
 8008c54:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
               ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) |
 8008c56:	431a      	orrs	r2, r3
               ((uint32_t)macconf->DeferralCheck << 4) |
 8008c58:	683b      	ldr	r3, [r7, #0]
 8008c5a:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8008c5e:	011b      	lsls	r3, r3, #4
               macconf->BackOffLimit |
 8008c60:	431a      	orrs	r2, r3
               macconf->PreambleLength);
 8008c62:	683b      	ldr	r3, [r7, #0]
 8008c64:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
  macregval = (macconf->InterPacketGapVal |
 8008c66:	4313      	orrs	r3, r2
 8008c68:	60fb      	str	r3, [r7, #12]

  /* Write to MACCR */
  MODIFY_REG(heth->Instance->MACCR, ETH_MACCR_MASK, macregval);
 8008c6a:	687b      	ldr	r3, [r7, #4]
 8008c6c:	681b      	ldr	r3, [r3, #0]
 8008c6e:	681a      	ldr	r2, [r3, #0]
 8008c70:	4b56      	ldr	r3, [pc, #344]	@ (8008dcc <ETH_SetMACConfig+0x22c>)
 8008c72:	4013      	ands	r3, r2
 8008c74:	687a      	ldr	r2, [r7, #4]
 8008c76:	6812      	ldr	r2, [r2, #0]
 8008c78:	68f9      	ldr	r1, [r7, #12]
 8008c7a:	430b      	orrs	r3, r1
 8008c7c:	6013      	str	r3, [r2, #0]

  /*------------------------ MACECR Configuration --------------------*/
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 8008c7e:	683b      	ldr	r3, [r7, #0]
 8008c80:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8008c82:	065a      	lsls	r2, r3, #25
               ((uint32_t)macconf->ExtendedInterPacketGap << 24) |
 8008c84:	683b      	ldr	r3, [r7, #0]
 8008c86:	f893 3038 	ldrb.w	r3, [r3, #56]	@ 0x38
 8008c8a:	061b      	lsls	r3, r3, #24
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 8008c8c:	431a      	orrs	r2, r3
               ((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) |
 8008c8e:	683b      	ldr	r3, [r7, #0]
 8008c90:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8008c94:	049b      	lsls	r3, r3, #18
               ((uint32_t)macconf->ExtendedInterPacketGap << 24) |
 8008c96:	431a      	orrs	r2, r3
               ((uint32_t)macconf->SlowProtocolDetect << 17) |
 8008c98:	683b      	ldr	r3, [r7, #0]
 8008c9a:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8008c9e:	045b      	lsls	r3, r3, #17
               ((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) |
 8008ca0:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->CRCCheckingRxPackets == DISABLE) ? 1U : 0U) << 16) |
 8008ca2:	683a      	ldr	r2, [r7, #0]
 8008ca4:	f892 2032 	ldrb.w	r2, [r2, #50]	@ 0x32
 8008ca8:	2a00      	cmp	r2, #0
 8008caa:	d102      	bne.n	8008cb2 <ETH_SetMACConfig+0x112>
 8008cac:	f44f 3280 	mov.w	r2, #65536	@ 0x10000
 8008cb0:	e000      	b.n	8008cb4 <ETH_SetMACConfig+0x114>
 8008cb2:	2200      	movs	r2, #0
               ((uint32_t)macconf->SlowProtocolDetect << 17) |
 8008cb4:	431a      	orrs	r2, r3
               macconf->GiantPacketSizeLimit);
 8008cb6:	683b      	ldr	r3, [r7, #0]
 8008cb8:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 8008cba:	4313      	orrs	r3, r2
 8008cbc:	60fb      	str	r3, [r7, #12]

  /* Write to MACECR */
  MODIFY_REG(heth->Instance->MACECR, ETH_MACECR_MASK, macregval);
 8008cbe:	687b      	ldr	r3, [r7, #4]
 8008cc0:	681b      	ldr	r3, [r3, #0]
 8008cc2:	685a      	ldr	r2, [r3, #4]
 8008cc4:	4b42      	ldr	r3, [pc, #264]	@ (8008dd0 <ETH_SetMACConfig+0x230>)
 8008cc6:	4013      	ands	r3, r2
 8008cc8:	687a      	ldr	r2, [r7, #4]
 8008cca:	6812      	ldr	r2, [r2, #0]
 8008ccc:	68f9      	ldr	r1, [r7, #12]
 8008cce:	430b      	orrs	r3, r1
 8008cd0:	6053      	str	r3, [r2, #4]

  /*------------------------ MACWTR Configuration --------------------*/
  macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) |
 8008cd2:	683b      	ldr	r3, [r7, #0]
 8008cd4:	f893 3040 	ldrb.w	r3, [r3, #64]	@ 0x40
 8008cd8:	021a      	lsls	r2, r3, #8
               macconf->WatchdogTimeout);
 8008cda:	683b      	ldr	r3, [r7, #0]
 8008cdc:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
  macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) |
 8008cde:	4313      	orrs	r3, r2
 8008ce0:	60fb      	str	r3, [r7, #12]

  /* Write to MACWTR */
  MODIFY_REG(heth->Instance->MACWTR, ETH_MACWTR_MASK, macregval);
 8008ce2:	687b      	ldr	r3, [r7, #4]
 8008ce4:	681b      	ldr	r3, [r3, #0]
 8008ce6:	68da      	ldr	r2, [r3, #12]
 8008ce8:	4b3a      	ldr	r3, [pc, #232]	@ (8008dd4 <ETH_SetMACConfig+0x234>)
 8008cea:	4013      	ands	r3, r2
 8008cec:	687a      	ldr	r2, [r7, #4]
 8008cee:	6812      	ldr	r2, [r2, #0]
 8008cf0:	68f9      	ldr	r1, [r7, #12]
 8008cf2:	430b      	orrs	r3, r1
 8008cf4:	60d3      	str	r3, [r2, #12]

  /*------------------------ MACTFCR Configuration --------------------*/
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 8008cf6:	683b      	ldr	r3, [r7, #0]
 8008cf8:	f893 3054 	ldrb.w	r3, [r3, #84]	@ 0x54
 8008cfc:	005a      	lsls	r2, r3, #1
               macconf->PauseLowThreshold |
 8008cfe:	683b      	ldr	r3, [r7, #0]
 8008d00:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 8008d02:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->ZeroQuantaPause == DISABLE) ? 1U : 0U) << 7) |
 8008d04:	683a      	ldr	r2, [r7, #0]
 8008d06:	f892 204c 	ldrb.w	r2, [r2, #76]	@ 0x4c
 8008d0a:	2a00      	cmp	r2, #0
 8008d0c:	d101      	bne.n	8008d12 <ETH_SetMACConfig+0x172>
 8008d0e:	2280      	movs	r2, #128	@ 0x80
 8008d10:	e000      	b.n	8008d14 <ETH_SetMACConfig+0x174>
 8008d12:	2200      	movs	r2, #0
               macconf->PauseLowThreshold |
 8008d14:	431a      	orrs	r2, r3
               (macconf->PauseTime << 16));
 8008d16:	683b      	ldr	r3, [r7, #0]
 8008d18:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8008d1a:	041b      	lsls	r3, r3, #16
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 8008d1c:	4313      	orrs	r3, r2
 8008d1e:	60fb      	str	r3, [r7, #12]

  /* Write to MACTFCR */
  MODIFY_REG(heth->Instance->MACTFCR, ETH_MACTFCR_MASK, macregval);
 8008d20:	687b      	ldr	r3, [r7, #4]
 8008d22:	681b      	ldr	r3, [r3, #0]
 8008d24:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 8008d26:	f64f 730d 	movw	r3, #65293	@ 0xff0d
 8008d2a:	4013      	ands	r3, r2
 8008d2c:	687a      	ldr	r2, [r7, #4]
 8008d2e:	6812      	ldr	r2, [r2, #0]
 8008d30:	68f9      	ldr	r1, [r7, #12]
 8008d32:	430b      	orrs	r3, r1
 8008d34:	6713      	str	r3, [r2, #112]	@ 0x70

  /*------------------------ MACRFCR Configuration --------------------*/
  macregval = ((uint32_t)macconf->ReceiveFlowControl |
 8008d36:	683b      	ldr	r3, [r7, #0]
 8008d38:	f893 3056 	ldrb.w	r3, [r3, #86]	@ 0x56
 8008d3c:	461a      	mov	r2, r3
               ((uint32_t)macconf->UnicastPausePacketDetect << 1));
 8008d3e:	683b      	ldr	r3, [r7, #0]
 8008d40:	f893 3055 	ldrb.w	r3, [r3, #85]	@ 0x55
 8008d44:	005b      	lsls	r3, r3, #1
  macregval = ((uint32_t)macconf->ReceiveFlowControl |
 8008d46:	4313      	orrs	r3, r2
 8008d48:	60fb      	str	r3, [r7, #12]

  /* Write to MACRFCR */
  MODIFY_REG(heth->Instance->MACRFCR, ETH_MACRFCR_MASK, macregval);
 8008d4a:	687b      	ldr	r3, [r7, #4]
 8008d4c:	681b      	ldr	r3, [r3, #0]
 8008d4e:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 8008d52:	f023 0103 	bic.w	r1, r3, #3
 8008d56:	687b      	ldr	r3, [r7, #4]
 8008d58:	681b      	ldr	r3, [r3, #0]
 8008d5a:	68fa      	ldr	r2, [r7, #12]
 8008d5c:	430a      	orrs	r2, r1
 8008d5e:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

  /*------------------------ MTLTQOMR Configuration --------------------*/
  /* Write to MTLTQOMR */
  MODIFY_REG(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_MASK, macconf->TransmitQueueMode);
 8008d62:	687b      	ldr	r3, [r7, #4]
 8008d64:	681b      	ldr	r3, [r3, #0]
 8008d66:	f8d3 3d00 	ldr.w	r3, [r3, #3328]	@ 0xd00
 8008d6a:	f023 0172 	bic.w	r1, r3, #114	@ 0x72
 8008d6e:	683b      	ldr	r3, [r7, #0]
 8008d70:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 8008d72:	687b      	ldr	r3, [r7, #4]
 8008d74:	681b      	ldr	r3, [r3, #0]
 8008d76:	430a      	orrs	r2, r1
 8008d78:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

  /*------------------------ MTLRQOMR Configuration --------------------*/
  macregval = (macconf->ReceiveQueueMode |
 8008d7c:	683b      	ldr	r3, [r7, #0]
 8008d7e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
               ((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) |
 8008d80:	683a      	ldr	r2, [r7, #0]
 8008d82:	f892 2060 	ldrb.w	r2, [r2, #96]	@ 0x60
 8008d86:	2a00      	cmp	r2, #0
 8008d88:	d101      	bne.n	8008d8e <ETH_SetMACConfig+0x1ee>
 8008d8a:	2240      	movs	r2, #64	@ 0x40
 8008d8c:	e000      	b.n	8008d90 <ETH_SetMACConfig+0x1f0>
 8008d8e:	2200      	movs	r2, #0
  macregval = (macconf->ReceiveQueueMode |
 8008d90:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ForwardRxErrorPacket << 4) |
 8008d92:	683b      	ldr	r3, [r7, #0]
 8008d94:	f893 3061 	ldrb.w	r3, [r3, #97]	@ 0x61
 8008d98:	011b      	lsls	r3, r3, #4
               ((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) |
 8008d9a:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ForwardRxUndersizedGoodPacket << 3));
 8008d9c:	683b      	ldr	r3, [r7, #0]
 8008d9e:	f893 3062 	ldrb.w	r3, [r3, #98]	@ 0x62
 8008da2:	00db      	lsls	r3, r3, #3
  macregval = (macconf->ReceiveQueueMode |
 8008da4:	4313      	orrs	r3, r2
 8008da6:	60fb      	str	r3, [r7, #12]

  /* Write to MTLRQOMR */
  MODIFY_REG(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_MASK, macregval);
 8008da8:	687b      	ldr	r3, [r7, #4]
 8008daa:	681b      	ldr	r3, [r3, #0]
 8008dac:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 8008db0:	f023 017b 	bic.w	r1, r3, #123	@ 0x7b
 8008db4:	687b      	ldr	r3, [r7, #4]
 8008db6:	681b      	ldr	r3, [r3, #0]
 8008db8:	68fa      	ldr	r2, [r7, #12]
 8008dba:	430a      	orrs	r2, r1
 8008dbc:	f8c3 2d30 	str.w	r2, [r3, #3376]	@ 0xd30
}
 8008dc0:	bf00      	nop
 8008dc2:	3714      	adds	r7, #20
 8008dc4:	46bd      	mov	sp, r7
 8008dc6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008dca:	4770      	bx	lr
 8008dcc:	00048083 	.word	0x00048083
 8008dd0:	c0f88000 	.word	0xc0f88000
 8008dd4:	fffffef0 	.word	0xfffffef0

08008dd8 <ETH_SetDMAConfig>:

static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, const ETH_DMAConfigTypeDef *dmaconf)
{
 8008dd8:	b480      	push	{r7}
 8008dda:	b085      	sub	sp, #20
 8008ddc:	af00      	add	r7, sp, #0
 8008dde:	6078      	str	r0, [r7, #4]
 8008de0:	6039      	str	r1, [r7, #0]
  uint32_t dmaregval;

  /*------------------------ DMAMR Configuration --------------------*/
  MODIFY_REG(heth->Instance->DMAMR, ETH_DMAMR_MASK, dmaconf->DMAArbitration);
 8008de2:	687b      	ldr	r3, [r7, #4]
 8008de4:	681b      	ldr	r3, [r3, #0]
 8008de6:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008dea:	681a      	ldr	r2, [r3, #0]
 8008dec:	4b38      	ldr	r3, [pc, #224]	@ (8008ed0 <ETH_SetDMAConfig+0xf8>)
 8008dee:	4013      	ands	r3, r2
 8008df0:	683a      	ldr	r2, [r7, #0]
 8008df2:	6811      	ldr	r1, [r2, #0]
 8008df4:	687a      	ldr	r2, [r7, #4]
 8008df6:	6812      	ldr	r2, [r2, #0]
 8008df8:	430b      	orrs	r3, r1
 8008dfa:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008dfe:	6013      	str	r3, [r2, #0]

  /*------------------------ DMASBMR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 8008e00:	683b      	ldr	r3, [r7, #0]
 8008e02:	791b      	ldrb	r3, [r3, #4]
 8008e04:	031a      	lsls	r2, r3, #12
               dmaconf->BurstMode |
 8008e06:	683b      	ldr	r3, [r7, #0]
 8008e08:	689b      	ldr	r3, [r3, #8]
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 8008e0a:	431a      	orrs	r2, r3
               ((uint32_t)dmaconf->RebuildINCRxBurst << 15));
 8008e0c:	683b      	ldr	r3, [r7, #0]
 8008e0e:	7b1b      	ldrb	r3, [r3, #12]
 8008e10:	03db      	lsls	r3, r3, #15
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 8008e12:	4313      	orrs	r3, r2
 8008e14:	60fb      	str	r3, [r7, #12]

  MODIFY_REG(heth->Instance->DMASBMR, ETH_DMASBMR_MASK, dmaregval);
 8008e16:	687b      	ldr	r3, [r7, #4]
 8008e18:	681b      	ldr	r3, [r3, #0]
 8008e1a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008e1e:	685a      	ldr	r2, [r3, #4]
 8008e20:	4b2c      	ldr	r3, [pc, #176]	@ (8008ed4 <ETH_SetDMAConfig+0xfc>)
 8008e22:	4013      	ands	r3, r2
 8008e24:	687a      	ldr	r2, [r7, #4]
 8008e26:	6812      	ldr	r2, [r2, #0]
 8008e28:	68f9      	ldr	r1, [r7, #12]
 8008e2a:	430b      	orrs	r3, r1
 8008e2c:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008e30:	6053      	str	r3, [r2, #4]

  /*------------------------ DMACCR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) |
 8008e32:	683b      	ldr	r3, [r7, #0]
 8008e34:	7b5b      	ldrb	r3, [r3, #13]
 8008e36:	041a      	lsls	r2, r3, #16
               dmaconf->MaximumSegmentSize);
 8008e38:	683b      	ldr	r3, [r7, #0]
 8008e3a:	6a1b      	ldr	r3, [r3, #32]
  dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) |
 8008e3c:	4313      	orrs	r3, r2
 8008e3e:	60fb      	str	r3, [r7, #12]
  MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_MASK, dmaregval);
 8008e40:	687b      	ldr	r3, [r7, #4]
 8008e42:	681b      	ldr	r3, [r3, #0]
 8008e44:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008e48:	f8d3 2100 	ldr.w	r2, [r3, #256]	@ 0x100
 8008e4c:	4b22      	ldr	r3, [pc, #136]	@ (8008ed8 <ETH_SetDMAConfig+0x100>)
 8008e4e:	4013      	ands	r3, r2
 8008e50:	687a      	ldr	r2, [r7, #4]
 8008e52:	6812      	ldr	r2, [r2, #0]
 8008e54:	68f9      	ldr	r1, [r7, #12]
 8008e56:	430b      	orrs	r3, r1
 8008e58:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008e5c:	f8c2 3100 	str.w	r3, [r2, #256]	@ 0x100

  /*------------------------ DMACTCR Configuration --------------------*/
  dmaregval = (dmaconf->TxDMABurstLength |
 8008e60:	683b      	ldr	r3, [r7, #0]
 8008e62:	691a      	ldr	r2, [r3, #16]
               ((uint32_t)dmaconf->SecondPacketOperate << 4) |
 8008e64:	683b      	ldr	r3, [r7, #0]
 8008e66:	7d1b      	ldrb	r3, [r3, #20]
 8008e68:	011b      	lsls	r3, r3, #4
  dmaregval = (dmaconf->TxDMABurstLength |
 8008e6a:	431a      	orrs	r2, r3
               ((uint32_t)dmaconf->TCPSegmentation << 12));
 8008e6c:	683b      	ldr	r3, [r7, #0]
 8008e6e:	7f5b      	ldrb	r3, [r3, #29]
 8008e70:	031b      	lsls	r3, r3, #12
  dmaregval = (dmaconf->TxDMABurstLength |
 8008e72:	4313      	orrs	r3, r2
 8008e74:	60fb      	str	r3, [r7, #12]

  MODIFY_REG(heth->Instance->DMACTCR, ETH_DMACTCR_MASK, dmaregval);
 8008e76:	687b      	ldr	r3, [r7, #4]
 8008e78:	681b      	ldr	r3, [r3, #0]
 8008e7a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008e7e:	f8d3 2104 	ldr.w	r2, [r3, #260]	@ 0x104
 8008e82:	4b16      	ldr	r3, [pc, #88]	@ (8008edc <ETH_SetDMAConfig+0x104>)
 8008e84:	4013      	ands	r3, r2
 8008e86:	687a      	ldr	r2, [r7, #4]
 8008e88:	6812      	ldr	r2, [r2, #0]
 8008e8a:	68f9      	ldr	r1, [r7, #12]
 8008e8c:	430b      	orrs	r3, r1
 8008e8e:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008e92:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

  /*------------------------ DMACRCR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->FlushRxPacket  << 31) |
 8008e96:	683b      	ldr	r3, [r7, #0]
 8008e98:	7f1b      	ldrb	r3, [r3, #28]
 8008e9a:	07da      	lsls	r2, r3, #31
               dmaconf->RxDMABurstLength);
 8008e9c:	683b      	ldr	r3, [r7, #0]
 8008e9e:	699b      	ldr	r3, [r3, #24]
  dmaregval = (((uint32_t)dmaconf->FlushRxPacket  << 31) |
 8008ea0:	4313      	orrs	r3, r2
 8008ea2:	60fb      	str	r3, [r7, #12]

  /* Write to DMACRCR */
  MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_MASK, dmaregval);
 8008ea4:	687b      	ldr	r3, [r7, #4]
 8008ea6:	681b      	ldr	r3, [r3, #0]
 8008ea8:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008eac:	f8d3 2108 	ldr.w	r2, [r3, #264]	@ 0x108
 8008eb0:	4b0b      	ldr	r3, [pc, #44]	@ (8008ee0 <ETH_SetDMAConfig+0x108>)
 8008eb2:	4013      	ands	r3, r2
 8008eb4:	687a      	ldr	r2, [r7, #4]
 8008eb6:	6812      	ldr	r2, [r2, #0]
 8008eb8:	68f9      	ldr	r1, [r7, #12]
 8008eba:	430b      	orrs	r3, r1
 8008ebc:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008ec0:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108
}
 8008ec4:	bf00      	nop
 8008ec6:	3714      	adds	r7, #20
 8008ec8:	46bd      	mov	sp, r7
 8008eca:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008ece:	4770      	bx	lr
 8008ed0:	ffff87fd 	.word	0xffff87fd
 8008ed4:	ffff2ffe 	.word	0xffff2ffe
 8008ed8:	fffec000 	.word	0xfffec000
 8008edc:	ffc0efef 	.word	0xffc0efef
 8008ee0:	7fc0ffff 	.word	0x7fc0ffff

08008ee4 <ETH_MACDMAConfig>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth)
{
 8008ee4:	b580      	push	{r7, lr}
 8008ee6:	b0a4      	sub	sp, #144	@ 0x90
 8008ee8:	af00      	add	r7, sp, #0
 8008eea:	6078      	str	r0, [r7, #4]
  ETH_MACConfigTypeDef macDefaultConf;
  ETH_DMAConfigTypeDef dmaDefaultConf;

  /*--------------- ETHERNET MAC registers default Configuration --------------*/
  macDefaultConf.AutomaticPadCRCStrip = ENABLE;
 8008eec:	2301      	movs	r3, #1
 8008eee:	f887 303b 	strb.w	r3, [r7, #59]	@ 0x3b
  macDefaultConf.BackOffLimit = ETH_BACKOFFLIMIT_10;
 8008ef2:	2300      	movs	r3, #0
 8008ef4:	653b      	str	r3, [r7, #80]	@ 0x50
  macDefaultConf.CarrierSenseBeforeTransmit = DISABLE;
 8008ef6:	2300      	movs	r3, #0
 8008ef8:	f887 3049 	strb.w	r3, [r7, #73]	@ 0x49
  macDefaultConf.CarrierSenseDuringTransmit = DISABLE;
 8008efc:	2300      	movs	r3, #0
 8008efe:	f887 304b 	strb.w	r3, [r7, #75]	@ 0x4b
  macDefaultConf.ChecksumOffload = ENABLE;
 8008f02:	2301      	movs	r3, #1
 8008f04:	f887 3030 	strb.w	r3, [r7, #48]	@ 0x30
  macDefaultConf.CRCCheckingRxPackets = ENABLE;
 8008f08:	2301      	movs	r3, #1
 8008f0a:	f887 305e 	strb.w	r3, [r7, #94]	@ 0x5e
  macDefaultConf.CRCStripTypePacket = ENABLE;
 8008f0e:	2301      	movs	r3, #1
 8008f10:	f887 303a 	strb.w	r3, [r7, #58]	@ 0x3a
  macDefaultConf.DeferralCheck = DISABLE;
 8008f14:	2300      	movs	r3, #0
 8008f16:	f887 3054 	strb.w	r3, [r7, #84]	@ 0x54
  macDefaultConf.DropTCPIPChecksumErrorPacket = ENABLE;
 8008f1a:	2301      	movs	r3, #1
 8008f1c:	f887 308c 	strb.w	r3, [r7, #140]	@ 0x8c
  macDefaultConf.DuplexMode = ETH_FULLDUPLEX_MODE;
 8008f20:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 8008f24:	647b      	str	r3, [r7, #68]	@ 0x44
  macDefaultConf.ExtendedInterPacketGap = DISABLE;
 8008f26:	2300      	movs	r3, #0
 8008f28:	f887 3064 	strb.w	r3, [r7, #100]	@ 0x64
  macDefaultConf.ExtendedInterPacketGapVal = 0x0U;
 8008f2c:	2300      	movs	r3, #0
 8008f2e:	66bb      	str	r3, [r7, #104]	@ 0x68
  macDefaultConf.ForwardRxErrorPacket = DISABLE;
 8008f30:	2300      	movs	r3, #0
 8008f32:	f887 308d 	strb.w	r3, [r7, #141]	@ 0x8d
  macDefaultConf.ForwardRxUndersizedGoodPacket = DISABLE;
 8008f36:	2300      	movs	r3, #0
 8008f38:	f887 308e 	strb.w	r3, [r7, #142]	@ 0x8e
  macDefaultConf.GiantPacketSizeLimit = 0x618U;
 8008f3c:	f44f 63c3 	mov.w	r3, #1560	@ 0x618
 8008f40:	663b      	str	r3, [r7, #96]	@ 0x60
  macDefaultConf.GiantPacketSizeLimitControl = DISABLE;
 8008f42:	2300      	movs	r3, #0
 8008f44:	f887 3038 	strb.w	r3, [r7, #56]	@ 0x38
  macDefaultConf.InterPacketGapVal = ETH_INTERPACKETGAP_96BIT;
 8008f48:	2300      	movs	r3, #0
 8008f4a:	637b      	str	r3, [r7, #52]	@ 0x34
  macDefaultConf.Jabber = ENABLE;
 8008f4c:	2301      	movs	r3, #1
 8008f4e:	f887 303d 	strb.w	r3, [r7, #61]	@ 0x3d
  macDefaultConf.JumboPacket = DISABLE;
 8008f52:	2300      	movs	r3, #0
 8008f54:	f887 303e 	strb.w	r3, [r7, #62]	@ 0x3e
  macDefaultConf.LoopbackMode = DISABLE;
 8008f58:	2300      	movs	r3, #0
 8008f5a:	f887 3048 	strb.w	r3, [r7, #72]	@ 0x48
  macDefaultConf.PauseLowThreshold = ETH_PAUSELOWTHRESHOLD_MINUS_4;
 8008f5e:	2300      	movs	r3, #0
 8008f60:	67fb      	str	r3, [r7, #124]	@ 0x7c
  macDefaultConf.PauseTime = 0x0U;
 8008f62:	2300      	movs	r3, #0
 8008f64:	677b      	str	r3, [r7, #116]	@ 0x74
  macDefaultConf.PreambleLength = ETH_PREAMBLELENGTH_7;
 8008f66:	2300      	movs	r3, #0
 8008f68:	65bb      	str	r3, [r7, #88]	@ 0x58
  macDefaultConf.ProgrammableWatchdog = DISABLE;
 8008f6a:	2300      	movs	r3, #0
 8008f6c:	f887 306c 	strb.w	r3, [r7, #108]	@ 0x6c
  macDefaultConf.ReceiveFlowControl = DISABLE;
 8008f70:	2300      	movs	r3, #0
 8008f72:	f887 3082 	strb.w	r3, [r7, #130]	@ 0x82
  macDefaultConf.ReceiveOwn = ENABLE;
 8008f76:	2301      	movs	r3, #1
 8008f78:	f887 304a 	strb.w	r3, [r7, #74]	@ 0x4a
  macDefaultConf.ReceiveQueueMode = ETH_RECEIVESTOREFORWARD;
 8008f7c:	2320      	movs	r3, #32
 8008f7e:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
  macDefaultConf.RetryTransmission = ENABLE;
 8008f82:	2301      	movs	r3, #1
 8008f84:	f887 304c 	strb.w	r3, [r7, #76]	@ 0x4c
  macDefaultConf.SlowProtocolDetect = DISABLE;
 8008f88:	2300      	movs	r3, #0
 8008f8a:	f887 305d 	strb.w	r3, [r7, #93]	@ 0x5d
  macDefaultConf.SourceAddrControl = ETH_SOURCEADDRESS_REPLACE_ADDR0;
 8008f8e:	f04f 5340 	mov.w	r3, #805306368	@ 0x30000000
 8008f92:	62fb      	str	r3, [r7, #44]	@ 0x2c
  macDefaultConf.Speed = ETH_SPEED_100M;
 8008f94:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 8008f98:	643b      	str	r3, [r7, #64]	@ 0x40
  macDefaultConf.Support2KPacket = DISABLE;
 8008f9a:	2300      	movs	r3, #0
 8008f9c:	f887 3039 	strb.w	r3, [r7, #57]	@ 0x39
  macDefaultConf.TransmitQueueMode = ETH_TRANSMITSTOREFORWARD;
 8008fa0:	2302      	movs	r3, #2
 8008fa2:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
  macDefaultConf.TransmitFlowControl = DISABLE;
 8008fa6:	2300      	movs	r3, #0
 8008fa8:	f887 3080 	strb.w	r3, [r7, #128]	@ 0x80
  macDefaultConf.UnicastPausePacketDetect = DISABLE;
 8008fac:	2300      	movs	r3, #0
 8008fae:	f887 3081 	strb.w	r3, [r7, #129]	@ 0x81
  macDefaultConf.UnicastSlowProtocolPacketDetect = DISABLE;
 8008fb2:	2300      	movs	r3, #0
 8008fb4:	f887 305c 	strb.w	r3, [r7, #92]	@ 0x5c
  macDefaultConf.Watchdog = ENABLE;
 8008fb8:	2301      	movs	r3, #1
 8008fba:	f887 303c 	strb.w	r3, [r7, #60]	@ 0x3c
  macDefaultConf.WatchdogTimeout =  ETH_MACWTR_WTO_2KB;
 8008fbe:	2300      	movs	r3, #0
 8008fc0:	673b      	str	r3, [r7, #112]	@ 0x70
  macDefaultConf.ZeroQuantaPause = ENABLE;
 8008fc2:	2301      	movs	r3, #1
 8008fc4:	f887 3078 	strb.w	r3, [r7, #120]	@ 0x78

  /* MAC default configuration */
  ETH_SetMACConfig(heth, &macDefaultConf);
 8008fc8:	f107 032c 	add.w	r3, r7, #44	@ 0x2c
 8008fcc:	4619      	mov	r1, r3
 8008fce:	6878      	ldr	r0, [r7, #4]
 8008fd0:	f7ff fde6 	bl	8008ba0 <ETH_SetMACConfig>

  /*--------------- ETHERNET DMA registers default Configuration --------------*/
  dmaDefaultConf.AddressAlignedBeats = ENABLE;
 8008fd4:	2301      	movs	r3, #1
 8008fd6:	733b      	strb	r3, [r7, #12]
  dmaDefaultConf.BurstMode = ETH_BURSTLENGTH_FIXED;
 8008fd8:	2301      	movs	r3, #1
 8008fda:	613b      	str	r3, [r7, #16]
  dmaDefaultConf.DMAArbitration = ETH_DMAARBITRATION_RX1_TX1;
 8008fdc:	2300      	movs	r3, #0
 8008fde:	60bb      	str	r3, [r7, #8]
  dmaDefaultConf.FlushRxPacket = DISABLE;
 8008fe0:	2300      	movs	r3, #0
 8008fe2:	f887 3024 	strb.w	r3, [r7, #36]	@ 0x24
  dmaDefaultConf.PBLx8Mode = DISABLE;
 8008fe6:	2300      	movs	r3, #0
 8008fe8:	757b      	strb	r3, [r7, #21]
  dmaDefaultConf.RebuildINCRxBurst = DISABLE;
 8008fea:	2300      	movs	r3, #0
 8008fec:	753b      	strb	r3, [r7, #20]
  dmaDefaultConf.RxDMABurstLength = ETH_RXDMABURSTLENGTH_32BEAT;
 8008fee:	f44f 1300 	mov.w	r3, #2097152	@ 0x200000
 8008ff2:	623b      	str	r3, [r7, #32]
  dmaDefaultConf.SecondPacketOperate = DISABLE;
 8008ff4:	2300      	movs	r3, #0
 8008ff6:	773b      	strb	r3, [r7, #28]
  dmaDefaultConf.TxDMABurstLength = ETH_TXDMABURSTLENGTH_32BEAT;
 8008ff8:	f44f 1300 	mov.w	r3, #2097152	@ 0x200000
 8008ffc:	61bb      	str	r3, [r7, #24]
  dmaDefaultConf.TCPSegmentation = DISABLE;
 8008ffe:	2300      	movs	r3, #0
 8009000:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
  dmaDefaultConf.MaximumSegmentSize = ETH_SEGMENT_SIZE_DEFAULT;
 8009004:	f44f 7306 	mov.w	r3, #536	@ 0x218
 8009008:	62bb      	str	r3, [r7, #40]	@ 0x28

  /* DMA default configuration */
  ETH_SetDMAConfig(heth, &dmaDefaultConf);
 800900a:	f107 0308 	add.w	r3, r7, #8
 800900e:	4619      	mov	r1, r3
 8009010:	6878      	ldr	r0, [r7, #4]
 8009012:	f7ff fee1 	bl	8008dd8 <ETH_SetDMAConfig>
}
 8009016:	bf00      	nop
 8009018:	3790      	adds	r7, #144	@ 0x90
 800901a:	46bd      	mov	sp, r7
 800901c:	bd80      	pop	{r7, pc}

0800901e <ETH_DMATxDescListInit>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)
{
 800901e:	b480      	push	{r7}
 8009020:	b085      	sub	sp, #20
 8009022:	af00      	add	r7, sp, #0
 8009024:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmatxdesc;
  uint32_t i;

  /* Fill each DMATxDesc descriptor with the right values */
  for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++)
 8009026:	2300      	movs	r3, #0
 8009028:	60fb      	str	r3, [r7, #12]
 800902a:	e01d      	b.n	8009068 <ETH_DMATxDescListInit+0x4a>
  {
    dmatxdesc = heth->Init.TxDesc + i;
 800902c:	687b      	ldr	r3, [r7, #4]
 800902e:	68d9      	ldr	r1, [r3, #12]
 8009030:	68fa      	ldr	r2, [r7, #12]
 8009032:	4613      	mov	r3, r2
 8009034:	005b      	lsls	r3, r3, #1
 8009036:	4413      	add	r3, r2
 8009038:	00db      	lsls	r3, r3, #3
 800903a:	440b      	add	r3, r1
 800903c:	60bb      	str	r3, [r7, #8]

    WRITE_REG(dmatxdesc->DESC0, 0x0U);
 800903e:	68bb      	ldr	r3, [r7, #8]
 8009040:	2200      	movs	r2, #0
 8009042:	601a      	str	r2, [r3, #0]
    WRITE_REG(dmatxdesc->DESC1, 0x0U);
 8009044:	68bb      	ldr	r3, [r7, #8]
 8009046:	2200      	movs	r2, #0
 8009048:	605a      	str	r2, [r3, #4]
    WRITE_REG(dmatxdesc->DESC2, 0x0U);
 800904a:	68bb      	ldr	r3, [r7, #8]
 800904c:	2200      	movs	r2, #0
 800904e:	609a      	str	r2, [r3, #8]
    WRITE_REG(dmatxdesc->DESC3, 0x0U);
 8009050:	68bb      	ldr	r3, [r7, #8]
 8009052:	2200      	movs	r2, #0
 8009054:	60da      	str	r2, [r3, #12]

    WRITE_REG(heth->TxDescList.TxDesc[i], (uint32_t)dmatxdesc);
 8009056:	68b9      	ldr	r1, [r7, #8]
 8009058:	687b      	ldr	r3, [r7, #4]
 800905a:	68fa      	ldr	r2, [r7, #12]
 800905c:	3206      	adds	r2, #6
 800905e:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
  for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++)
 8009062:	68fb      	ldr	r3, [r7, #12]
 8009064:	3301      	adds	r3, #1
 8009066:	60fb      	str	r3, [r7, #12]
 8009068:	68fb      	ldr	r3, [r7, #12]
 800906a:	2b03      	cmp	r3, #3
 800906c:	d9de      	bls.n	800902c <ETH_DMATxDescListInit+0xe>

  }

  heth->TxDescList.CurTxDesc = 0;
 800906e:	687b      	ldr	r3, [r7, #4]
 8009070:	2200      	movs	r2, #0
 8009072:	629a      	str	r2, [r3, #40]	@ 0x28

  /* Set Transmit Descriptor Ring Length */
  WRITE_REG(heth->Instance->DMACTDRLR, (ETH_TX_DESC_CNT - 1U));
 8009074:	687b      	ldr	r3, [r7, #4]
 8009076:	681b      	ldr	r3, [r3, #0]
 8009078:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800907c:	461a      	mov	r2, r3
 800907e:	2303      	movs	r3, #3
 8009080:	f8c2 312c 	str.w	r3, [r2, #300]	@ 0x12c

  /* Set Transmit Descriptor List Address */
  WRITE_REG(heth->Instance->DMACTDLAR, (uint32_t) heth->Init.TxDesc);
 8009084:	687b      	ldr	r3, [r7, #4]
 8009086:	68da      	ldr	r2, [r3, #12]
 8009088:	687b      	ldr	r3, [r7, #4]
 800908a:	681b      	ldr	r3, [r3, #0]
 800908c:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009090:	f8c3 2114 	str.w	r2, [r3, #276]	@ 0x114

  /* Set Transmit Descriptor Tail pointer */
  WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t) heth->Init.TxDesc);
 8009094:	687b      	ldr	r3, [r7, #4]
 8009096:	68da      	ldr	r2, [r3, #12]
 8009098:	687b      	ldr	r3, [r7, #4]
 800909a:	681b      	ldr	r3, [r3, #0]
 800909c:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80090a0:	f8c3 2120 	str.w	r2, [r3, #288]	@ 0x120
}
 80090a4:	bf00      	nop
 80090a6:	3714      	adds	r7, #20
 80090a8:	46bd      	mov	sp, r7
 80090aa:	f85d 7b04 	ldr.w	r7, [sp], #4
 80090ae:	4770      	bx	lr

080090b0 <ETH_DMARxDescListInit>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth)
{
 80090b0:	b480      	push	{r7}
 80090b2:	b085      	sub	sp, #20
 80090b4:	af00      	add	r7, sp, #0
 80090b6:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t i;

  for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++)
 80090b8:	2300      	movs	r3, #0
 80090ba:	60fb      	str	r3, [r7, #12]
 80090bc:	e023      	b.n	8009106 <ETH_DMARxDescListInit+0x56>
  {
    dmarxdesc =  heth->Init.RxDesc + i;
 80090be:	687b      	ldr	r3, [r7, #4]
 80090c0:	6919      	ldr	r1, [r3, #16]
 80090c2:	68fa      	ldr	r2, [r7, #12]
 80090c4:	4613      	mov	r3, r2
 80090c6:	005b      	lsls	r3, r3, #1
 80090c8:	4413      	add	r3, r2
 80090ca:	00db      	lsls	r3, r3, #3
 80090cc:	440b      	add	r3, r1
 80090ce:	60bb      	str	r3, [r7, #8]

    WRITE_REG(dmarxdesc->DESC0, 0x0U);
 80090d0:	68bb      	ldr	r3, [r7, #8]
 80090d2:	2200      	movs	r2, #0
 80090d4:	601a      	str	r2, [r3, #0]
    WRITE_REG(dmarxdesc->DESC1, 0x0U);
 80090d6:	68bb      	ldr	r3, [r7, #8]
 80090d8:	2200      	movs	r2, #0
 80090da:	605a      	str	r2, [r3, #4]
    WRITE_REG(dmarxdesc->DESC2, 0x0U);
 80090dc:	68bb      	ldr	r3, [r7, #8]
 80090de:	2200      	movs	r2, #0
 80090e0:	609a      	str	r2, [r3, #8]
    WRITE_REG(dmarxdesc->DESC3, 0x0U);
 80090e2:	68bb      	ldr	r3, [r7, #8]
 80090e4:	2200      	movs	r2, #0
 80090e6:	60da      	str	r2, [r3, #12]
    WRITE_REG(dmarxdesc->BackupAddr0, 0x0U);
 80090e8:	68bb      	ldr	r3, [r7, #8]
 80090ea:	2200      	movs	r2, #0
 80090ec:	611a      	str	r2, [r3, #16]
    WRITE_REG(dmarxdesc->BackupAddr1, 0x0U);
 80090ee:	68bb      	ldr	r3, [r7, #8]
 80090f0:	2200      	movs	r2, #0
 80090f2:	615a      	str	r2, [r3, #20]

    /* Set Rx descritors addresses */
    WRITE_REG(heth->RxDescList.RxDesc[i], (uint32_t)dmarxdesc);
 80090f4:	68b9      	ldr	r1, [r7, #8]
 80090f6:	687b      	ldr	r3, [r7, #4]
 80090f8:	68fa      	ldr	r2, [r7, #12]
 80090fa:	3212      	adds	r2, #18
 80090fc:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
  for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++)
 8009100:	68fb      	ldr	r3, [r7, #12]
 8009102:	3301      	adds	r3, #1
 8009104:	60fb      	str	r3, [r7, #12]
 8009106:	68fb      	ldr	r3, [r7, #12]
 8009108:	2b03      	cmp	r3, #3
 800910a:	d9d8      	bls.n	80090be <ETH_DMARxDescListInit+0xe>

  }

  WRITE_REG(heth->RxDescList.RxDescIdx, 0U);
 800910c:	687b      	ldr	r3, [r7, #4]
 800910e:	2200      	movs	r2, #0
 8009110:	65da      	str	r2, [r3, #92]	@ 0x5c
  WRITE_REG(heth->RxDescList.RxDescCnt, 0U);
 8009112:	687b      	ldr	r3, [r7, #4]
 8009114:	2200      	movs	r2, #0
 8009116:	661a      	str	r2, [r3, #96]	@ 0x60
  WRITE_REG(heth->RxDescList.RxBuildDescIdx, 0U);
 8009118:	687b      	ldr	r3, [r7, #4]
 800911a:	2200      	movs	r2, #0
 800911c:	669a      	str	r2, [r3, #104]	@ 0x68
  WRITE_REG(heth->RxDescList.RxBuildDescCnt, 0U);
 800911e:	687b      	ldr	r3, [r7, #4]
 8009120:	2200      	movs	r2, #0
 8009122:	66da      	str	r2, [r3, #108]	@ 0x6c
  WRITE_REG(heth->RxDescList.ItMode, 0U);
 8009124:	687b      	ldr	r3, [r7, #4]
 8009126:	2200      	movs	r2, #0
 8009128:	659a      	str	r2, [r3, #88]	@ 0x58

  /* Set Receive Descriptor Ring Length */
  WRITE_REG(heth->Instance->DMACRDRLR, ((uint32_t)(ETH_RX_DESC_CNT - 1U)));
 800912a:	687b      	ldr	r3, [r7, #4]
 800912c:	681b      	ldr	r3, [r3, #0]
 800912e:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009132:	461a      	mov	r2, r3
 8009134:	2303      	movs	r3, #3
 8009136:	f8c2 3130 	str.w	r3, [r2, #304]	@ 0x130

  /* Set Receive Descriptor List Address */
  WRITE_REG(heth->Instance->DMACRDLAR, (uint32_t) heth->Init.RxDesc);
 800913a:	687b      	ldr	r3, [r7, #4]
 800913c:	691a      	ldr	r2, [r3, #16]
 800913e:	687b      	ldr	r3, [r7, #4]
 8009140:	681b      	ldr	r3, [r3, #0]
 8009142:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009146:	f8c3 211c 	str.w	r2, [r3, #284]	@ 0x11c

  /* Set Receive Descriptor Tail pointer Address */
  WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (uint32_t)(ETH_RX_DESC_CNT - 1U))));
 800914a:	687b      	ldr	r3, [r7, #4]
 800914c:	691b      	ldr	r3, [r3, #16]
 800914e:	f103 0248 	add.w	r2, r3, #72	@ 0x48
 8009152:	687b      	ldr	r3, [r7, #4]
 8009154:	681b      	ldr	r3, [r3, #0]
 8009156:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800915a:	f8c3 2128 	str.w	r2, [r3, #296]	@ 0x128
}
 800915e:	bf00      	nop
 8009160:	3714      	adds	r7, #20
 8009162:	46bd      	mov	sp, r7
 8009164:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009168:	4770      	bx	lr
	...

0800916c <ETH_Prepare_Tx_Descriptors>:
  * @param  ItMode: Enable or disable Tx EOT interrept
  * @retval Status
  */
static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, const ETH_TxPacketConfigTypeDef *pTxConfig,
                                           uint32_t ItMode)
{
 800916c:	b480      	push	{r7}
 800916e:	b091      	sub	sp, #68	@ 0x44
 8009170:	af00      	add	r7, sp, #0
 8009172:	60f8      	str	r0, [r7, #12]
 8009174:	60b9      	str	r1, [r7, #8]
 8009176:	607a      	str	r2, [r7, #4]
  ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList;
 8009178:	68fb      	ldr	r3, [r7, #12]
 800917a:	3318      	adds	r3, #24
 800917c:	627b      	str	r3, [r7, #36]	@ 0x24
  uint32_t descidx = dmatxdesclist->CurTxDesc;
 800917e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009180:	691b      	ldr	r3, [r3, #16]
 8009182:	63fb      	str	r3, [r7, #60]	@ 0x3c
  uint32_t firstdescidx = dmatxdesclist->CurTxDesc;
 8009184:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009186:	691b      	ldr	r3, [r3, #16]
 8009188:	623b      	str	r3, [r7, #32]
  uint32_t idx;
  uint32_t descnbr = 0;
 800918a:	2300      	movs	r3, #0
 800918c:	637b      	str	r3, [r7, #52]	@ 0x34
  ETH_DMADescTypeDef *dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 800918e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009190:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8009192:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009196:	633b      	str	r3, [r7, #48]	@ 0x30

  ETH_BufferTypeDef  *txbuffer = pTxConfig->TxBuffer;
 8009198:	68bb      	ldr	r3, [r7, #8]
 800919a:	689b      	ldr	r3, [r3, #8]
 800919c:	62fb      	str	r3, [r7, #44]	@ 0x2c
  uint32_t           bd_count = 0;
 800919e:	2300      	movs	r3, #0
 80091a0:	62bb      	str	r3, [r7, #40]	@ 0x28
  uint32_t primask_bit;

  /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
  if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN)
 80091a2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80091a4:	68db      	ldr	r3, [r3, #12]
 80091a6:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 80091aa:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 80091ae:	d007      	beq.n	80091c0 <ETH_Prepare_Tx_Descriptors+0x54>
      || (dmatxdesclist->PacketAddress[descidx] != NULL))
 80091b0:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80091b2:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80091b4:	3304      	adds	r3, #4
 80091b6:	009b      	lsls	r3, r3, #2
 80091b8:	4413      	add	r3, r2
 80091ba:	685b      	ldr	r3, [r3, #4]
 80091bc:	2b00      	cmp	r3, #0
 80091be:	d001      	beq.n	80091c4 <ETH_Prepare_Tx_Descriptors+0x58>
  {
    return HAL_ETH_ERROR_BUSY;
 80091c0:	2302      	movs	r3, #2
 80091c2:	e266      	b.n	8009692 <ETH_Prepare_Tx_Descriptors+0x526>

  /***************************************************************************/
  /*****************    Context descriptor configuration (Optional) **********/
  /***************************************************************************/
  /* If VLAN tag is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 80091c4:	68bb      	ldr	r3, [r7, #8]
 80091c6:	681b      	ldr	r3, [r3, #0]
 80091c8:	f003 0304 	and.w	r3, r3, #4
 80091cc:	2b00      	cmp	r3, #0
 80091ce:	d044      	beq.n	800925a <ETH_Prepare_Tx_Descriptors+0xee>
  {
    /* Set vlan tag value */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_VT, pTxConfig->VlanTag);
 80091d0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80091d2:	68da      	ldr	r2, [r3, #12]
 80091d4:	4b75      	ldr	r3, [pc, #468]	@ (80093ac <ETH_Prepare_Tx_Descriptors+0x240>)
 80091d6:	4013      	ands	r3, r2
 80091d8:	68ba      	ldr	r2, [r7, #8]
 80091da:	6a52      	ldr	r2, [r2, #36]	@ 0x24
 80091dc:	431a      	orrs	r2, r3
 80091de:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80091e0:	60da      	str	r2, [r3, #12]
    /* Set vlan tag valid bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_VLTV);
 80091e2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80091e4:	68db      	ldr	r3, [r3, #12]
 80091e6:	f443 3280 	orr.w	r2, r3, #65536	@ 0x10000
 80091ea:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80091ec:	60da      	str	r2, [r3, #12]
    /* Set the descriptor as the vlan input source */
    SET_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI);
 80091ee:	68fb      	ldr	r3, [r7, #12]
 80091f0:	681b      	ldr	r3, [r3, #0]
 80091f2:	6e1a      	ldr	r2, [r3, #96]	@ 0x60
 80091f4:	68fb      	ldr	r3, [r7, #12]
 80091f6:	681b      	ldr	r3, [r3, #0]
 80091f8:	f442 1280 	orr.w	r2, r2, #1048576	@ 0x100000
 80091fc:	661a      	str	r2, [r3, #96]	@ 0x60

    /* if inner VLAN is enabled */
    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_INNERVLANTAG) != (uint32_t)RESET)
 80091fe:	68bb      	ldr	r3, [r7, #8]
 8009200:	681b      	ldr	r3, [r3, #0]
 8009202:	f003 0308 	and.w	r3, r3, #8
 8009206:	2b00      	cmp	r3, #0
 8009208:	d027      	beq.n	800925a <ETH_Prepare_Tx_Descriptors+0xee>
    {
      /* Set inner vlan tag value */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_IVT, (pTxConfig->InnerVlanTag << 16));
 800920a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800920c:	689b      	ldr	r3, [r3, #8]
 800920e:	b29a      	uxth	r2, r3
 8009210:	68bb      	ldr	r3, [r7, #8]
 8009212:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8009214:	041b      	lsls	r3, r3, #16
 8009216:	431a      	orrs	r2, r3
 8009218:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800921a:	609a      	str	r2, [r3, #8]
      /* Set inner vlan tag valid bit */
      SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_IVLTV);
 800921c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800921e:	68db      	ldr	r3, [r3, #12]
 8009220:	f443 3200 	orr.w	r2, r3, #131072	@ 0x20000
 8009224:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009226:	60da      	str	r2, [r3, #12]

      /* Set Vlan Tag control */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_IVTIR, pTxConfig->InnerVlanCtrl);
 8009228:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800922a:	68db      	ldr	r3, [r3, #12]
 800922c:	f423 2240 	bic.w	r2, r3, #786432	@ 0xc0000
 8009230:	68bb      	ldr	r3, [r7, #8]
 8009232:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8009234:	431a      	orrs	r2, r3
 8009236:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009238:	60da      	str	r2, [r3, #12]

      /* Set the descriptor as the inner vlan input source */
      SET_BIT(heth->Instance->MACIVIR, ETH_MACIVIR_VLTI);
 800923a:	68fb      	ldr	r3, [r7, #12]
 800923c:	681b      	ldr	r3, [r3, #0]
 800923e:	6e5a      	ldr	r2, [r3, #100]	@ 0x64
 8009240:	68fb      	ldr	r3, [r7, #12]
 8009242:	681b      	ldr	r3, [r3, #0]
 8009244:	f442 1280 	orr.w	r2, r2, #1048576	@ 0x100000
 8009248:	665a      	str	r2, [r3, #100]	@ 0x64
      /* Enable double VLAN processing */
      SET_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP);
 800924a:	68fb      	ldr	r3, [r7, #12]
 800924c:	681b      	ldr	r3, [r3, #0]
 800924e:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 8009250:	68fb      	ldr	r3, [r7, #12]
 8009252:	681b      	ldr	r3, [r3, #0]
 8009254:	f042 6280 	orr.w	r2, r2, #67108864	@ 0x4000000
 8009258:	651a      	str	r2, [r3, #80]	@ 0x50
    }
  }

  /* if tcp segmentation is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 800925a:	68bb      	ldr	r3, [r7, #8]
 800925c:	681b      	ldr	r3, [r3, #0]
 800925e:	f003 0310 	and.w	r3, r3, #16
 8009262:	2b00      	cmp	r3, #0
 8009264:	d00e      	beq.n	8009284 <ETH_Prepare_Tx_Descriptors+0x118>
  {
    /* Set MSS value */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_MSS, pTxConfig->MaxSegmentSize);
 8009266:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009268:	689a      	ldr	r2, [r3, #8]
 800926a:	4b51      	ldr	r3, [pc, #324]	@ (80093b0 <ETH_Prepare_Tx_Descriptors+0x244>)
 800926c:	4013      	ands	r3, r2
 800926e:	68ba      	ldr	r2, [r7, #8]
 8009270:	6992      	ldr	r2, [r2, #24]
 8009272:	431a      	orrs	r2, r3
 8009274:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009276:	609a      	str	r2, [r3, #8]
    /* Set MSS valid bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_TCMSSV);
 8009278:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800927a:	68db      	ldr	r3, [r3, #12]
 800927c:	f043 6280 	orr.w	r2, r3, #67108864	@ 0x4000000
 8009280:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009282:	60da      	str	r2, [r3, #12]
  }

  if ((READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 8009284:	68bb      	ldr	r3, [r7, #8]
 8009286:	681b      	ldr	r3, [r3, #0]
 8009288:	f003 0304 	and.w	r3, r3, #4
 800928c:	2b00      	cmp	r3, #0
 800928e:	d105      	bne.n	800929c <ETH_Prepare_Tx_Descriptors+0x130>
      || (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET))
 8009290:	68bb      	ldr	r3, [r7, #8]
 8009292:	681b      	ldr	r3, [r3, #0]
 8009294:	f003 0310 	and.w	r3, r3, #16
 8009298:	2b00      	cmp	r3, #0
 800929a:	d036      	beq.n	800930a <ETH_Prepare_Tx_Descriptors+0x19e>
  {
    /* Set as context descriptor */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_CTXT);
 800929c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800929e:	68db      	ldr	r3, [r3, #12]
 80092a0:	f043 4280 	orr.w	r2, r3, #1073741824	@ 0x40000000
 80092a4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80092a6:	60da      	str	r2, [r3, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 80092a8:	f3bf 8f5f 	dmb	sy
}
 80092ac:	bf00      	nop
    /* Ensure rest of descriptor is written to RAM before the OWN bit */
    __DMB();
    /* Set own bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN);
 80092ae:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80092b0:	68db      	ldr	r3, [r3, #12]
 80092b2:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 80092b6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80092b8:	60da      	str	r2, [r3, #12]
    /* Increment current tx descriptor index */
    INCR_TX_DESC_INDEX(descidx, 1U);
 80092ba:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80092bc:	3301      	adds	r3, #1
 80092be:	63fb      	str	r3, [r7, #60]	@ 0x3c
 80092c0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80092c2:	2b03      	cmp	r3, #3
 80092c4:	d902      	bls.n	80092cc <ETH_Prepare_Tx_Descriptors+0x160>
 80092c6:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80092c8:	3b04      	subs	r3, #4
 80092ca:	63fb      	str	r3, [r7, #60]	@ 0x3c
    /* Get current descriptor address */
    dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 80092cc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80092ce:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 80092d0:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80092d4:	633b      	str	r3, [r7, #48]	@ 0x30

    descnbr += 1U;
 80092d6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80092d8:	3301      	adds	r3, #1
 80092da:	637b      	str	r3, [r7, #52]	@ 0x34

    /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
    if (READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN)
 80092dc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80092de:	68db      	ldr	r3, [r3, #12]
 80092e0:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 80092e4:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 80092e8:	d10f      	bne.n	800930a <ETH_Prepare_Tx_Descriptors+0x19e>
    {
      dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[firstdescidx];
 80092ea:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80092ec:	6a3a      	ldr	r2, [r7, #32]
 80092ee:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80092f2:	633b      	str	r3, [r7, #48]	@ 0x30
  __ASM volatile ("dmb 0xF":::"memory");
 80092f4:	f3bf 8f5f 	dmb	sy
}
 80092f8:	bf00      	nop
      /* Ensure rest of descriptor is written to RAM before the OWN bit */
      __DMB();
      /* Clear own bit */
      CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN);
 80092fa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80092fc:	68db      	ldr	r3, [r3, #12]
 80092fe:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 8009302:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009304:	60da      	str	r2, [r3, #12]

      return HAL_ETH_ERROR_BUSY;
 8009306:	2302      	movs	r3, #2
 8009308:	e1c3      	b.n	8009692 <ETH_Prepare_Tx_Descriptors+0x526>

  /***************************************************************************/
  /*****************    Normal descriptors configuration     *****************/
  /***************************************************************************/

  descnbr += 1U;
 800930a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800930c:	3301      	adds	r3, #1
 800930e:	637b      	str	r3, [r7, #52]	@ 0x34

  /* Set header or buffer 1 address */
  WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer);
 8009310:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009312:	681b      	ldr	r3, [r3, #0]
 8009314:	461a      	mov	r2, r3
 8009316:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009318:	601a      	str	r2, [r3, #0]
  /* Set header or buffer 1 Length */
  MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len);
 800931a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800931c:	689a      	ldr	r2, [r3, #8]
 800931e:	4b24      	ldr	r3, [pc, #144]	@ (80093b0 <ETH_Prepare_Tx_Descriptors+0x244>)
 8009320:	4013      	ands	r3, r2
 8009322:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8009324:	6852      	ldr	r2, [r2, #4]
 8009326:	431a      	orrs	r2, r3
 8009328:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800932a:	609a      	str	r2, [r3, #8]

  if (txbuffer->next != NULL)
 800932c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800932e:	689b      	ldr	r3, [r3, #8]
 8009330:	2b00      	cmp	r3, #0
 8009332:	d012      	beq.n	800935a <ETH_Prepare_Tx_Descriptors+0x1ee>
  {
    txbuffer = txbuffer->next;
 8009334:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009336:	689b      	ldr	r3, [r3, #8]
 8009338:	62fb      	str	r3, [r7, #44]	@ 0x2c
    /* Set buffer 2 address */
    WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer);
 800933a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800933c:	681b      	ldr	r3, [r3, #0]
 800933e:	461a      	mov	r2, r3
 8009340:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009342:	605a      	str	r2, [r3, #4]
    /* Set buffer 2 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16));
 8009344:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009346:	689a      	ldr	r2, [r3, #8]
 8009348:	4b1a      	ldr	r3, [pc, #104]	@ (80093b4 <ETH_Prepare_Tx_Descriptors+0x248>)
 800934a:	4013      	ands	r3, r2
 800934c:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800934e:	6852      	ldr	r2, [r2, #4]
 8009350:	0412      	lsls	r2, r2, #16
 8009352:	431a      	orrs	r2, r3
 8009354:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009356:	609a      	str	r2, [r3, #8]
 8009358:	e008      	b.n	800936c <ETH_Prepare_Tx_Descriptors+0x200>
  }
  else
  {
    WRITE_REG(dmatxdesc->DESC1, 0x0U);
 800935a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800935c:	2200      	movs	r2, #0
 800935e:	605a      	str	r2, [r3, #4]
    /* Set buffer 2 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U);
 8009360:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009362:	689a      	ldr	r2, [r3, #8]
 8009364:	4b13      	ldr	r3, [pc, #76]	@ (80093b4 <ETH_Prepare_Tx_Descriptors+0x248>)
 8009366:	4013      	ands	r3, r2
 8009368:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800936a:	6093      	str	r3, [r2, #8]
  }

  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 800936c:	68bb      	ldr	r3, [r7, #8]
 800936e:	681b      	ldr	r3, [r3, #0]
 8009370:	f003 0310 	and.w	r3, r3, #16
 8009374:	2b00      	cmp	r3, #0
 8009376:	d021      	beq.n	80093bc <ETH_Prepare_Tx_Descriptors+0x250>
  {
    /* Set TCP Header length */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_THL, (pTxConfig->TCPHeaderLen << 19));
 8009378:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800937a:	68db      	ldr	r3, [r3, #12]
 800937c:	f423 02f0 	bic.w	r2, r3, #7864320	@ 0x780000
 8009380:	68bb      	ldr	r3, [r7, #8]
 8009382:	6a1b      	ldr	r3, [r3, #32]
 8009384:	04db      	lsls	r3, r3, #19
 8009386:	431a      	orrs	r2, r3
 8009388:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800938a:	60da      	str	r2, [r3, #12]
    /* Set TCP payload length */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen);
 800938c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800938e:	68da      	ldr	r2, [r3, #12]
 8009390:	4b09      	ldr	r3, [pc, #36]	@ (80093b8 <ETH_Prepare_Tx_Descriptors+0x24c>)
 8009392:	4013      	ands	r3, r2
 8009394:	68ba      	ldr	r2, [r7, #8]
 8009396:	69d2      	ldr	r2, [r2, #28]
 8009398:	431a      	orrs	r2, r3
 800939a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800939c:	60da      	str	r2, [r3, #12]
    /* Set TCP Segmentation Enabled bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE);
 800939e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80093a0:	68db      	ldr	r3, [r3, #12]
 80093a2:	f443 2280 	orr.w	r2, r3, #262144	@ 0x40000
 80093a6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80093a8:	60da      	str	r2, [r3, #12]
 80093aa:	e02e      	b.n	800940a <ETH_Prepare_Tx_Descriptors+0x29e>
 80093ac:	ffff0000 	.word	0xffff0000
 80093b0:	ffffc000 	.word	0xffffc000
 80093b4:	c000ffff 	.word	0xc000ffff
 80093b8:	fffc0000 	.word	0xfffc0000
  }
  else
  {
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length);
 80093bc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80093be:	68da      	ldr	r2, [r3, #12]
 80093c0:	4b7b      	ldr	r3, [pc, #492]	@ (80095b0 <ETH_Prepare_Tx_Descriptors+0x444>)
 80093c2:	4013      	ands	r3, r2
 80093c4:	68ba      	ldr	r2, [r7, #8]
 80093c6:	6852      	ldr	r2, [r2, #4]
 80093c8:	431a      	orrs	r2, r3
 80093ca:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80093cc:	60da      	str	r2, [r3, #12]

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET)
 80093ce:	68bb      	ldr	r3, [r7, #8]
 80093d0:	681b      	ldr	r3, [r3, #0]
 80093d2:	f003 0301 	and.w	r3, r3, #1
 80093d6:	2b00      	cmp	r3, #0
 80093d8:	d008      	beq.n	80093ec <ETH_Prepare_Tx_Descriptors+0x280>
    {
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl);
 80093da:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80093dc:	68db      	ldr	r3, [r3, #12]
 80093de:	f423 3240 	bic.w	r2, r3, #196608	@ 0x30000
 80093e2:	68bb      	ldr	r3, [r7, #8]
 80093e4:	695b      	ldr	r3, [r3, #20]
 80093e6:	431a      	orrs	r2, r3
 80093e8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80093ea:	60da      	str	r2, [r3, #12]
    }

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CRCPAD) != (uint32_t)RESET)
 80093ec:	68bb      	ldr	r3, [r7, #8]
 80093ee:	681b      	ldr	r3, [r3, #0]
 80093f0:	f003 0320 	and.w	r3, r3, #32
 80093f4:	2b00      	cmp	r3, #0
 80093f6:	d008      	beq.n	800940a <ETH_Prepare_Tx_Descriptors+0x29e>
    {
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CPC, pTxConfig->CRCPadCtrl);
 80093f8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80093fa:	68db      	ldr	r3, [r3, #12]
 80093fc:	f023 6240 	bic.w	r2, r3, #201326592	@ 0xc000000
 8009400:	68bb      	ldr	r3, [r7, #8]
 8009402:	691b      	ldr	r3, [r3, #16]
 8009404:	431a      	orrs	r2, r3
 8009406:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009408:	60da      	str	r2, [r3, #12]
    }
  }

  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 800940a:	68bb      	ldr	r3, [r7, #8]
 800940c:	681b      	ldr	r3, [r3, #0]
 800940e:	f003 0304 	and.w	r3, r3, #4
 8009412:	2b00      	cmp	r3, #0
 8009414:	d008      	beq.n	8009428 <ETH_Prepare_Tx_Descriptors+0x2bc>
  {
    /* Set Vlan Tag control */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_VTIR, pTxConfig->VlanCtrl);
 8009416:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009418:	689b      	ldr	r3, [r3, #8]
 800941a:	f423 4240 	bic.w	r2, r3, #49152	@ 0xc000
 800941e:	68bb      	ldr	r3, [r7, #8]
 8009420:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8009422:	431a      	orrs	r2, r3
 8009424:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009426:	609a      	str	r2, [r3, #8]
  }

  /* Mark it as First Descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD);
 8009428:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800942a:	68db      	ldr	r3, [r3, #12]
 800942c:	f043 5200 	orr.w	r2, r3, #536870912	@ 0x20000000
 8009430:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009432:	60da      	str	r2, [r3, #12]
  /* Mark it as NORMAL descriptor */
  CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT);
 8009434:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009436:	68db      	ldr	r3, [r3, #12]
 8009438:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 800943c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800943e:	60da      	str	r2, [r3, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 8009440:	f3bf 8f5f 	dmb	sy
}
 8009444:	bf00      	nop
  /* Ensure rest of descriptor is written to RAM before the OWN bit */
  __DMB();
  /* set OWN bit of FIRST descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 8009446:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009448:	68db      	ldr	r3, [r3, #12]
 800944a:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 800944e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009450:	60da      	str	r2, [r3, #12]

  /* If source address insertion/replacement is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_SAIC) != (uint32_t)RESET)
 8009452:	68bb      	ldr	r3, [r7, #8]
 8009454:	681b      	ldr	r3, [r3, #0]
 8009456:	f003 0302 	and.w	r3, r3, #2
 800945a:	2b00      	cmp	r3, #0
 800945c:	f000 80da 	beq.w	8009614 <ETH_Prepare_Tx_Descriptors+0x4a8>
  {
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_SAIC, pTxConfig->SrcAddrCtrl);
 8009460:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009462:	68db      	ldr	r3, [r3, #12]
 8009464:	f023 7260 	bic.w	r2, r3, #58720256	@ 0x3800000
 8009468:	68bb      	ldr	r3, [r7, #8]
 800946a:	68db      	ldr	r3, [r3, #12]
 800946c:	431a      	orrs	r2, r3
 800946e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009470:	60da      	str	r2, [r3, #12]
  }

  /* only if the packet is split into more than one descriptors > 1 */
  while (txbuffer->next != NULL)
 8009472:	e0cf      	b.n	8009614 <ETH_Prepare_Tx_Descriptors+0x4a8>
  {
    /* Clear the LD bit of previous descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD);
 8009474:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009476:	68db      	ldr	r3, [r3, #12]
 8009478:	f023 5280 	bic.w	r2, r3, #268435456	@ 0x10000000
 800947c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800947e:	60da      	str	r2, [r3, #12]
    /* Increment current tx descriptor index */
    INCR_TX_DESC_INDEX(descidx, 1U);
 8009480:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009482:	3301      	adds	r3, #1
 8009484:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8009486:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009488:	2b03      	cmp	r3, #3
 800948a:	d902      	bls.n	8009492 <ETH_Prepare_Tx_Descriptors+0x326>
 800948c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800948e:	3b04      	subs	r3, #4
 8009490:	63fb      	str	r3, [r7, #60]	@ 0x3c
    /* Get current descriptor address */
    dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 8009492:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009494:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8009496:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 800949a:	633b      	str	r3, [r7, #48]	@ 0x30

    /* Clear the FD bit of new Descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD);
 800949c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800949e:	68db      	ldr	r3, [r3, #12]
 80094a0:	f023 5200 	bic.w	r2, r3, #536870912	@ 0x20000000
 80094a4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80094a6:	60da      	str	r2, [r3, #12]

    /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
    if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN) == ETH_DMATXNDESCRF_OWN)
 80094a8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80094aa:	68db      	ldr	r3, [r3, #12]
 80094ac:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 80094b0:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 80094b4:	d007      	beq.n	80094c6 <ETH_Prepare_Tx_Descriptors+0x35a>
        || (dmatxdesclist->PacketAddress[descidx] != NULL))
 80094b6:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80094b8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80094ba:	3304      	adds	r3, #4
 80094bc:	009b      	lsls	r3, r3, #2
 80094be:	4413      	add	r3, r2
 80094c0:	685b      	ldr	r3, [r3, #4]
 80094c2:	2b00      	cmp	r3, #0
 80094c4:	d029      	beq.n	800951a <ETH_Prepare_Tx_Descriptors+0x3ae>
    {
      descidx = firstdescidx;
 80094c6:	6a3b      	ldr	r3, [r7, #32]
 80094c8:	63fb      	str	r3, [r7, #60]	@ 0x3c
      dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 80094ca:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80094cc:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 80094ce:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80094d2:	633b      	str	r3, [r7, #48]	@ 0x30

      /* clear previous desc own bit */
      for (idx = 0; idx < descnbr; idx ++)
 80094d4:	2300      	movs	r3, #0
 80094d6:	63bb      	str	r3, [r7, #56]	@ 0x38
 80094d8:	e019      	b.n	800950e <ETH_Prepare_Tx_Descriptors+0x3a2>
  __ASM volatile ("dmb 0xF":::"memory");
 80094da:	f3bf 8f5f 	dmb	sy
}
 80094de:	bf00      	nop
      {
        /* Ensure rest of descriptor is written to RAM before the OWN bit */
        __DMB();

        CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 80094e0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80094e2:	68db      	ldr	r3, [r3, #12]
 80094e4:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 80094e8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80094ea:	60da      	str	r2, [r3, #12]

        /* Increment current tx descriptor index */
        INCR_TX_DESC_INDEX(descidx, 1U);
 80094ec:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80094ee:	3301      	adds	r3, #1
 80094f0:	63fb      	str	r3, [r7, #60]	@ 0x3c
 80094f2:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80094f4:	2b03      	cmp	r3, #3
 80094f6:	d902      	bls.n	80094fe <ETH_Prepare_Tx_Descriptors+0x392>
 80094f8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80094fa:	3b04      	subs	r3, #4
 80094fc:	63fb      	str	r3, [r7, #60]	@ 0x3c
        /* Get current descriptor address */
        dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 80094fe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009500:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8009502:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009506:	633b      	str	r3, [r7, #48]	@ 0x30
      for (idx = 0; idx < descnbr; idx ++)
 8009508:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800950a:	3301      	adds	r3, #1
 800950c:	63bb      	str	r3, [r7, #56]	@ 0x38
 800950e:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 8009510:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8009512:	429a      	cmp	r2, r3
 8009514:	d3e1      	bcc.n	80094da <ETH_Prepare_Tx_Descriptors+0x36e>
      }

      return HAL_ETH_ERROR_BUSY;
 8009516:	2302      	movs	r3, #2
 8009518:	e0bb      	b.n	8009692 <ETH_Prepare_Tx_Descriptors+0x526>
    }

    descnbr += 1U;
 800951a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800951c:	3301      	adds	r3, #1
 800951e:	637b      	str	r3, [r7, #52]	@ 0x34

    /* Get the next Tx buffer in the list */
    txbuffer = txbuffer->next;
 8009520:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009522:	689b      	ldr	r3, [r3, #8]
 8009524:	62fb      	str	r3, [r7, #44]	@ 0x2c

    /* Set header or buffer 1 address */
    WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer);
 8009526:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009528:	681b      	ldr	r3, [r3, #0]
 800952a:	461a      	mov	r2, r3
 800952c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800952e:	601a      	str	r2, [r3, #0]
    /* Set header or buffer 1 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len);
 8009530:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009532:	689a      	ldr	r2, [r3, #8]
 8009534:	4b1f      	ldr	r3, [pc, #124]	@ (80095b4 <ETH_Prepare_Tx_Descriptors+0x448>)
 8009536:	4013      	ands	r3, r2
 8009538:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800953a:	6852      	ldr	r2, [r2, #4]
 800953c:	431a      	orrs	r2, r3
 800953e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009540:	609a      	str	r2, [r3, #8]

    if (txbuffer->next != NULL)
 8009542:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009544:	689b      	ldr	r3, [r3, #8]
 8009546:	2b00      	cmp	r3, #0
 8009548:	d012      	beq.n	8009570 <ETH_Prepare_Tx_Descriptors+0x404>
    {
      /* Get the next Tx buffer in the list */
      txbuffer = txbuffer->next;
 800954a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800954c:	689b      	ldr	r3, [r3, #8]
 800954e:	62fb      	str	r3, [r7, #44]	@ 0x2c
      /* Set buffer 2 address */
      WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer);
 8009550:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009552:	681b      	ldr	r3, [r3, #0]
 8009554:	461a      	mov	r2, r3
 8009556:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009558:	605a      	str	r2, [r3, #4]
      /* Set buffer 2 Length */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16));
 800955a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800955c:	689a      	ldr	r2, [r3, #8]
 800955e:	4b16      	ldr	r3, [pc, #88]	@ (80095b8 <ETH_Prepare_Tx_Descriptors+0x44c>)
 8009560:	4013      	ands	r3, r2
 8009562:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8009564:	6852      	ldr	r2, [r2, #4]
 8009566:	0412      	lsls	r2, r2, #16
 8009568:	431a      	orrs	r2, r3
 800956a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800956c:	609a      	str	r2, [r3, #8]
 800956e:	e008      	b.n	8009582 <ETH_Prepare_Tx_Descriptors+0x416>
    }
    else
    {
      WRITE_REG(dmatxdesc->DESC1, 0x0U);
 8009570:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009572:	2200      	movs	r2, #0
 8009574:	605a      	str	r2, [r3, #4]
      /* Set buffer 2 Length */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U);
 8009576:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009578:	689a      	ldr	r2, [r3, #8]
 800957a:	4b0f      	ldr	r3, [pc, #60]	@ (80095b8 <ETH_Prepare_Tx_Descriptors+0x44c>)
 800957c:	4013      	ands	r3, r2
 800957e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8009580:	6093      	str	r3, [r2, #8]
    }

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 8009582:	68bb      	ldr	r3, [r7, #8]
 8009584:	681b      	ldr	r3, [r3, #0]
 8009586:	f003 0310 	and.w	r3, r3, #16
 800958a:	2b00      	cmp	r3, #0
 800958c:	d018      	beq.n	80095c0 <ETH_Prepare_Tx_Descriptors+0x454>
    {
      /* Set TCP payload length */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen);
 800958e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009590:	68da      	ldr	r2, [r3, #12]
 8009592:	4b0a      	ldr	r3, [pc, #40]	@ (80095bc <ETH_Prepare_Tx_Descriptors+0x450>)
 8009594:	4013      	ands	r3, r2
 8009596:	68ba      	ldr	r2, [r7, #8]
 8009598:	69d2      	ldr	r2, [r2, #28]
 800959a:	431a      	orrs	r2, r3
 800959c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800959e:	60da      	str	r2, [r3, #12]
      /* Set TCP Segmentation Enabled bit */
      SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE);
 80095a0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80095a2:	68db      	ldr	r3, [r3, #12]
 80095a4:	f443 2280 	orr.w	r2, r3, #262144	@ 0x40000
 80095a8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80095aa:	60da      	str	r2, [r3, #12]
 80095ac:	e020      	b.n	80095f0 <ETH_Prepare_Tx_Descriptors+0x484>
 80095ae:	bf00      	nop
 80095b0:	ffff8000 	.word	0xffff8000
 80095b4:	ffffc000 	.word	0xffffc000
 80095b8:	c000ffff 	.word	0xc000ffff
 80095bc:	fffc0000 	.word	0xfffc0000
    }
    else
    {
      /* Set the packet length */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length);
 80095c0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80095c2:	68da      	ldr	r2, [r3, #12]
 80095c4:	4b36      	ldr	r3, [pc, #216]	@ (80096a0 <ETH_Prepare_Tx_Descriptors+0x534>)
 80095c6:	4013      	ands	r3, r2
 80095c8:	68ba      	ldr	r2, [r7, #8]
 80095ca:	6852      	ldr	r2, [r2, #4]
 80095cc:	431a      	orrs	r2, r3
 80095ce:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80095d0:	60da      	str	r2, [r3, #12]

      if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET)
 80095d2:	68bb      	ldr	r3, [r7, #8]
 80095d4:	681b      	ldr	r3, [r3, #0]
 80095d6:	f003 0301 	and.w	r3, r3, #1
 80095da:	2b00      	cmp	r3, #0
 80095dc:	d008      	beq.n	80095f0 <ETH_Prepare_Tx_Descriptors+0x484>
      {
        /* Checksum Insertion Control */
        MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl);
 80095de:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80095e0:	68db      	ldr	r3, [r3, #12]
 80095e2:	f423 3240 	bic.w	r2, r3, #196608	@ 0x30000
 80095e6:	68bb      	ldr	r3, [r7, #8]
 80095e8:	695b      	ldr	r3, [r3, #20]
 80095ea:	431a      	orrs	r2, r3
 80095ec:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80095ee:	60da      	str	r2, [r3, #12]
      }
    }

    bd_count += 1U;
 80095f0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80095f2:	3301      	adds	r3, #1
 80095f4:	62bb      	str	r3, [r7, #40]	@ 0x28
  __ASM volatile ("dmb 0xF":::"memory");
 80095f6:	f3bf 8f5f 	dmb	sy
}
 80095fa:	bf00      	nop

    /* Ensure rest of descriptor is written to RAM before the OWN bit */
    __DMB();
    /* Set Own bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 80095fc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80095fe:	68db      	ldr	r3, [r3, #12]
 8009600:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8009604:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009606:	60da      	str	r2, [r3, #12]
    /* Mark it as NORMAL descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT);
 8009608:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800960a:	68db      	ldr	r3, [r3, #12]
 800960c:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 8009610:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009612:	60da      	str	r2, [r3, #12]
  while (txbuffer->next != NULL)
 8009614:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009616:	689b      	ldr	r3, [r3, #8]
 8009618:	2b00      	cmp	r3, #0
 800961a:	f47f af2b 	bne.w	8009474 <ETH_Prepare_Tx_Descriptors+0x308>
  }

  if (ItMode != ((uint32_t)RESET))
 800961e:	687b      	ldr	r3, [r7, #4]
 8009620:	2b00      	cmp	r3, #0
 8009622:	d006      	beq.n	8009632 <ETH_Prepare_Tx_Descriptors+0x4c6>
  {
    /* Set Interrupt on completion bit */
    SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC);
 8009624:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009626:	689b      	ldr	r3, [r3, #8]
 8009628:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 800962c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800962e:	609a      	str	r2, [r3, #8]
 8009630:	e005      	b.n	800963e <ETH_Prepare_Tx_Descriptors+0x4d2>
  }
  else
  {
    /* Clear Interrupt on completion bit */
    CLEAR_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC);
 8009632:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009634:	689b      	ldr	r3, [r3, #8]
 8009636:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 800963a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800963c:	609a      	str	r2, [r3, #8]
  }

  /* Mark it as LAST descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD);
 800963e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009640:	68db      	ldr	r3, [r3, #12]
 8009642:	f043 5280 	orr.w	r2, r3, #268435456	@ 0x10000000
 8009646:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009648:	60da      	str	r2, [r3, #12]
  /* Save the current packet address to expose it to the application */
  dmatxdesclist->PacketAddress[descidx] = dmatxdesclist->CurrentPacketAddress;
 800964a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800964c:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 800964e:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8009650:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009652:	3304      	adds	r3, #4
 8009654:	009b      	lsls	r3, r3, #2
 8009656:	440b      	add	r3, r1
 8009658:	605a      	str	r2, [r3, #4]

  dmatxdesclist->CurTxDesc = descidx;
 800965a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800965c:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 800965e:	611a      	str	r2, [r3, #16]
  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
 8009660:	f3ef 8310 	mrs	r3, PRIMASK
 8009664:	613b      	str	r3, [r7, #16]
  return(result);
 8009666:	693b      	ldr	r3, [r7, #16]

  /* Enter critical section */
  primask_bit = __get_PRIMASK();
 8009668:	61fb      	str	r3, [r7, #28]
 800966a:	2301      	movs	r3, #1
 800966c:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
 800966e:	697b      	ldr	r3, [r7, #20]
 8009670:	f383 8810 	msr	PRIMASK, r3
}
 8009674:	bf00      	nop
  __set_PRIMASK(1);

  dmatxdesclist->BuffersInUse += bd_count + 1U;
 8009676:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009678:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 800967a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800967c:	4413      	add	r3, r2
 800967e:	1c5a      	adds	r2, r3, #1
 8009680:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009682:	629a      	str	r2, [r3, #40]	@ 0x28
 8009684:	69fb      	ldr	r3, [r7, #28]
 8009686:	61bb      	str	r3, [r7, #24]
  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
 8009688:	69bb      	ldr	r3, [r7, #24]
 800968a:	f383 8810 	msr	PRIMASK, r3
}
 800968e:	bf00      	nop

  /* Exit critical section: restore previous priority mask */
  __set_PRIMASK(primask_bit);

  /* Return function status */
  return HAL_ETH_ERROR_NONE;
 8009690:	2300      	movs	r3, #0
}
 8009692:	4618      	mov	r0, r3
 8009694:	3744      	adds	r7, #68	@ 0x44
 8009696:	46bd      	mov	sp, r7
 8009698:	f85d 7b04 	ldr.w	r7, [sp], #4
 800969c:	4770      	bx	lr
 800969e:	bf00      	nop
 80096a0:	ffff8000 	.word	0xffff8000

080096a4 <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 80096a4:	b480      	push	{r7}
 80096a6:	b089      	sub	sp, #36	@ 0x24
 80096a8:	af00      	add	r7, sp, #0
 80096aa:	6078      	str	r0, [r7, #4]
 80096ac:	6039      	str	r1, [r7, #0]
  uint32_t position = 0x00U;
 80096ae:	2300      	movs	r3, #0
 80096b0:	61fb      	str	r3, [r7, #28]
  EXTI_Core_TypeDef *EXTI_CurrentCPU;

#if defined(DUAL_CORE) && defined(CORE_CM4)
  EXTI_CurrentCPU = EXTI_D2; /* EXTI for CM4 CPU */
#else
  EXTI_CurrentCPU = EXTI_D1; /* EXTI for CM7 CPU */
 80096b2:	4b89      	ldr	r3, [pc, #548]	@ (80098d8 <HAL_GPIO_Init+0x234>)
 80096b4:	617b      	str	r3, [r7, #20]
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));

  /* Configure the port pins */
  while (((GPIO_Init->Pin) >> position) != 0x00U)
 80096b6:	e194      	b.n	80099e2 <HAL_GPIO_Init+0x33e>
  {
    /* Get current io position */
    iocurrent = (GPIO_Init->Pin) & (1UL << position);
 80096b8:	683b      	ldr	r3, [r7, #0]
 80096ba:	681a      	ldr	r2, [r3, #0]
 80096bc:	2101      	movs	r1, #1
 80096be:	69fb      	ldr	r3, [r7, #28]
 80096c0:	fa01 f303 	lsl.w	r3, r1, r3
 80096c4:	4013      	ands	r3, r2
 80096c6:	613b      	str	r3, [r7, #16]

    if (iocurrent != 0x00U)
 80096c8:	693b      	ldr	r3, [r7, #16]
 80096ca:	2b00      	cmp	r3, #0
 80096cc:	f000 8186 	beq.w	80099dc <HAL_GPIO_Init+0x338>
    {
      /*--------------------- GPIO Mode Configuration ------------------------*/
      /* In case of Output or Alternate function mode selection */
      if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
 80096d0:	683b      	ldr	r3, [r7, #0]
 80096d2:	685b      	ldr	r3, [r3, #4]
 80096d4:	f003 0303 	and.w	r3, r3, #3
 80096d8:	2b01      	cmp	r3, #1
 80096da:	d005      	beq.n	80096e8 <HAL_GPIO_Init+0x44>
 80096dc:	683b      	ldr	r3, [r7, #0]
 80096de:	685b      	ldr	r3, [r3, #4]
 80096e0:	f003 0303 	and.w	r3, r3, #3
 80096e4:	2b02      	cmp	r3, #2
 80096e6:	d130      	bne.n	800974a <HAL_GPIO_Init+0xa6>
      {
        /* Check the Speed parameter */
        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));

        /* Configure the IO Speed */
        temp = GPIOx->OSPEEDR;
 80096e8:	687b      	ldr	r3, [r7, #4]
 80096ea:	689b      	ldr	r3, [r3, #8]
 80096ec:	61bb      	str	r3, [r7, #24]
        temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2U));
 80096ee:	69fb      	ldr	r3, [r7, #28]
 80096f0:	005b      	lsls	r3, r3, #1
 80096f2:	2203      	movs	r2, #3
 80096f4:	fa02 f303 	lsl.w	r3, r2, r3
 80096f8:	43db      	mvns	r3, r3
 80096fa:	69ba      	ldr	r2, [r7, #24]
 80096fc:	4013      	ands	r3, r2
 80096fe:	61bb      	str	r3, [r7, #24]
        temp |= (GPIO_Init->Speed << (position * 2U));
 8009700:	683b      	ldr	r3, [r7, #0]
 8009702:	68da      	ldr	r2, [r3, #12]
 8009704:	69fb      	ldr	r3, [r7, #28]
 8009706:	005b      	lsls	r3, r3, #1
 8009708:	fa02 f303 	lsl.w	r3, r2, r3
 800970c:	69ba      	ldr	r2, [r7, #24]
 800970e:	4313      	orrs	r3, r2
 8009710:	61bb      	str	r3, [r7, #24]
        GPIOx->OSPEEDR = temp;
 8009712:	687b      	ldr	r3, [r7, #4]
 8009714:	69ba      	ldr	r2, [r7, #24]
 8009716:	609a      	str	r2, [r3, #8]

        /* Configure the IO Output Type */
        temp = GPIOx->OTYPER;
 8009718:	687b      	ldr	r3, [r7, #4]
 800971a:	685b      	ldr	r3, [r3, #4]
 800971c:	61bb      	str	r3, [r7, #24]
        temp &= ~(GPIO_OTYPER_OT0 << position) ;
 800971e:	2201      	movs	r2, #1
 8009720:	69fb      	ldr	r3, [r7, #28]
 8009722:	fa02 f303 	lsl.w	r3, r2, r3
 8009726:	43db      	mvns	r3, r3
 8009728:	69ba      	ldr	r2, [r7, #24]
 800972a:	4013      	ands	r3, r2
 800972c:	61bb      	str	r3, [r7, #24]
        temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
 800972e:	683b      	ldr	r3, [r7, #0]
 8009730:	685b      	ldr	r3, [r3, #4]
 8009732:	091b      	lsrs	r3, r3, #4
 8009734:	f003 0201 	and.w	r2, r3, #1
 8009738:	69fb      	ldr	r3, [r7, #28]
 800973a:	fa02 f303 	lsl.w	r3, r2, r3
 800973e:	69ba      	ldr	r2, [r7, #24]
 8009740:	4313      	orrs	r3, r2
 8009742:	61bb      	str	r3, [r7, #24]
        GPIOx->OTYPER = temp;
 8009744:	687b      	ldr	r3, [r7, #4]
 8009746:	69ba      	ldr	r2, [r7, #24]
 8009748:	605a      	str	r2, [r3, #4]
      }

      if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
 800974a:	683b      	ldr	r3, [r7, #0]
 800974c:	685b      	ldr	r3, [r3, #4]
 800974e:	f003 0303 	and.w	r3, r3, #3
 8009752:	2b03      	cmp	r3, #3
 8009754:	d017      	beq.n	8009786 <HAL_GPIO_Init+0xe2>
      {
       /* Check the Pull parameter */
       assert_param(IS_GPIO_PULL(GPIO_Init->Pull));

      /* Activate the Pull-up or Pull down resistor for the current IO */
      temp = GPIOx->PUPDR;
 8009756:	687b      	ldr	r3, [r7, #4]
 8009758:	68db      	ldr	r3, [r3, #12]
 800975a:	61bb      	str	r3, [r7, #24]
      temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
 800975c:	69fb      	ldr	r3, [r7, #28]
 800975e:	005b      	lsls	r3, r3, #1
 8009760:	2203      	movs	r2, #3
 8009762:	fa02 f303 	lsl.w	r3, r2, r3
 8009766:	43db      	mvns	r3, r3
 8009768:	69ba      	ldr	r2, [r7, #24]
 800976a:	4013      	ands	r3, r2
 800976c:	61bb      	str	r3, [r7, #24]
      temp |= ((GPIO_Init->Pull) << (position * 2U));
 800976e:	683b      	ldr	r3, [r7, #0]
 8009770:	689a      	ldr	r2, [r3, #8]
 8009772:	69fb      	ldr	r3, [r7, #28]
 8009774:	005b      	lsls	r3, r3, #1
 8009776:	fa02 f303 	lsl.w	r3, r2, r3
 800977a:	69ba      	ldr	r2, [r7, #24]
 800977c:	4313      	orrs	r3, r2
 800977e:	61bb      	str	r3, [r7, #24]
      GPIOx->PUPDR = temp;
 8009780:	687b      	ldr	r3, [r7, #4]
 8009782:	69ba      	ldr	r2, [r7, #24]
 8009784:	60da      	str	r2, [r3, #12]
      }

      /* In case of Alternate function mode selection */
      if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
 8009786:	683b      	ldr	r3, [r7, #0]
 8009788:	685b      	ldr	r3, [r3, #4]
 800978a:	f003 0303 	and.w	r3, r3, #3
 800978e:	2b02      	cmp	r3, #2
 8009790:	d123      	bne.n	80097da <HAL_GPIO_Init+0x136>
        /* Check the Alternate function parameters */
        assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));

        /* Configure Alternate function mapped with the current IO */
        temp = GPIOx->AFR[position >> 3U];
 8009792:	69fb      	ldr	r3, [r7, #28]
 8009794:	08da      	lsrs	r2, r3, #3
 8009796:	687b      	ldr	r3, [r7, #4]
 8009798:	3208      	adds	r2, #8
 800979a:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 800979e:	61bb      	str	r3, [r7, #24]
        temp &= ~(0xFU << ((position & 0x07U) * 4U));
 80097a0:	69fb      	ldr	r3, [r7, #28]
 80097a2:	f003 0307 	and.w	r3, r3, #7
 80097a6:	009b      	lsls	r3, r3, #2
 80097a8:	220f      	movs	r2, #15
 80097aa:	fa02 f303 	lsl.w	r3, r2, r3
 80097ae:	43db      	mvns	r3, r3
 80097b0:	69ba      	ldr	r2, [r7, #24]
 80097b2:	4013      	ands	r3, r2
 80097b4:	61bb      	str	r3, [r7, #24]
        temp |= ((GPIO_Init->Alternate) << ((position & 0x07U) * 4U));
 80097b6:	683b      	ldr	r3, [r7, #0]
 80097b8:	691a      	ldr	r2, [r3, #16]
 80097ba:	69fb      	ldr	r3, [r7, #28]
 80097bc:	f003 0307 	and.w	r3, r3, #7
 80097c0:	009b      	lsls	r3, r3, #2
 80097c2:	fa02 f303 	lsl.w	r3, r2, r3
 80097c6:	69ba      	ldr	r2, [r7, #24]
 80097c8:	4313      	orrs	r3, r2
 80097ca:	61bb      	str	r3, [r7, #24]
        GPIOx->AFR[position >> 3U] = temp;
 80097cc:	69fb      	ldr	r3, [r7, #28]
 80097ce:	08da      	lsrs	r2, r3, #3
 80097d0:	687b      	ldr	r3, [r7, #4]
 80097d2:	3208      	adds	r2, #8
 80097d4:	69b9      	ldr	r1, [r7, #24]
 80097d6:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
      }

      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
      temp = GPIOx->MODER;
 80097da:	687b      	ldr	r3, [r7, #4]
 80097dc:	681b      	ldr	r3, [r3, #0]
 80097de:	61bb      	str	r3, [r7, #24]
      temp &= ~(GPIO_MODER_MODE0 << (position * 2U));
 80097e0:	69fb      	ldr	r3, [r7, #28]
 80097e2:	005b      	lsls	r3, r3, #1
 80097e4:	2203      	movs	r2, #3
 80097e6:	fa02 f303 	lsl.w	r3, r2, r3
 80097ea:	43db      	mvns	r3, r3
 80097ec:	69ba      	ldr	r2, [r7, #24]
 80097ee:	4013      	ands	r3, r2
 80097f0:	61bb      	str	r3, [r7, #24]
      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
 80097f2:	683b      	ldr	r3, [r7, #0]
 80097f4:	685b      	ldr	r3, [r3, #4]
 80097f6:	f003 0203 	and.w	r2, r3, #3
 80097fa:	69fb      	ldr	r3, [r7, #28]
 80097fc:	005b      	lsls	r3, r3, #1
 80097fe:	fa02 f303 	lsl.w	r3, r2, r3
 8009802:	69ba      	ldr	r2, [r7, #24]
 8009804:	4313      	orrs	r3, r2
 8009806:	61bb      	str	r3, [r7, #24]
      GPIOx->MODER = temp;
 8009808:	687b      	ldr	r3, [r7, #4]
 800980a:	69ba      	ldr	r2, [r7, #24]
 800980c:	601a      	str	r2, [r3, #0]

      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
 800980e:	683b      	ldr	r3, [r7, #0]
 8009810:	685b      	ldr	r3, [r3, #4]
 8009812:	f403 3340 	and.w	r3, r3, #196608	@ 0x30000
 8009816:	2b00      	cmp	r3, #0
 8009818:	f000 80e0 	beq.w	80099dc <HAL_GPIO_Init+0x338>
      {
        /* Enable SYSCFG Clock */
        __HAL_RCC_SYSCFG_CLK_ENABLE();
 800981c:	4b2f      	ldr	r3, [pc, #188]	@ (80098dc <HAL_GPIO_Init+0x238>)
 800981e:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8009822:	4a2e      	ldr	r2, [pc, #184]	@ (80098dc <HAL_GPIO_Init+0x238>)
 8009824:	f043 0302 	orr.w	r3, r3, #2
 8009828:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 800982c:	4b2b      	ldr	r3, [pc, #172]	@ (80098dc <HAL_GPIO_Init+0x238>)
 800982e:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8009832:	f003 0302 	and.w	r3, r3, #2
 8009836:	60fb      	str	r3, [r7, #12]
 8009838:	68fb      	ldr	r3, [r7, #12]

        temp = SYSCFG->EXTICR[position >> 2U];
 800983a:	4a29      	ldr	r2, [pc, #164]	@ (80098e0 <HAL_GPIO_Init+0x23c>)
 800983c:	69fb      	ldr	r3, [r7, #28]
 800983e:	089b      	lsrs	r3, r3, #2
 8009840:	3302      	adds	r3, #2
 8009842:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8009846:	61bb      	str	r3, [r7, #24]
        temp &= ~(0x0FUL << (4U * (position & 0x03U)));
 8009848:	69fb      	ldr	r3, [r7, #28]
 800984a:	f003 0303 	and.w	r3, r3, #3
 800984e:	009b      	lsls	r3, r3, #2
 8009850:	220f      	movs	r2, #15
 8009852:	fa02 f303 	lsl.w	r3, r2, r3
 8009856:	43db      	mvns	r3, r3
 8009858:	69ba      	ldr	r2, [r7, #24]
 800985a:	4013      	ands	r3, r2
 800985c:	61bb      	str	r3, [r7, #24]
        temp |= (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U)));
 800985e:	687b      	ldr	r3, [r7, #4]
 8009860:	4a20      	ldr	r2, [pc, #128]	@ (80098e4 <HAL_GPIO_Init+0x240>)
 8009862:	4293      	cmp	r3, r2
 8009864:	d052      	beq.n	800990c <HAL_GPIO_Init+0x268>
 8009866:	687b      	ldr	r3, [r7, #4]
 8009868:	4a1f      	ldr	r2, [pc, #124]	@ (80098e8 <HAL_GPIO_Init+0x244>)
 800986a:	4293      	cmp	r3, r2
 800986c:	d031      	beq.n	80098d2 <HAL_GPIO_Init+0x22e>
 800986e:	687b      	ldr	r3, [r7, #4]
 8009870:	4a1e      	ldr	r2, [pc, #120]	@ (80098ec <HAL_GPIO_Init+0x248>)
 8009872:	4293      	cmp	r3, r2
 8009874:	d02b      	beq.n	80098ce <HAL_GPIO_Init+0x22a>
 8009876:	687b      	ldr	r3, [r7, #4]
 8009878:	4a1d      	ldr	r2, [pc, #116]	@ (80098f0 <HAL_GPIO_Init+0x24c>)
 800987a:	4293      	cmp	r3, r2
 800987c:	d025      	beq.n	80098ca <HAL_GPIO_Init+0x226>
 800987e:	687b      	ldr	r3, [r7, #4]
 8009880:	4a1c      	ldr	r2, [pc, #112]	@ (80098f4 <HAL_GPIO_Init+0x250>)
 8009882:	4293      	cmp	r3, r2
 8009884:	d01f      	beq.n	80098c6 <HAL_GPIO_Init+0x222>
 8009886:	687b      	ldr	r3, [r7, #4]
 8009888:	4a1b      	ldr	r2, [pc, #108]	@ (80098f8 <HAL_GPIO_Init+0x254>)
 800988a:	4293      	cmp	r3, r2
 800988c:	d019      	beq.n	80098c2 <HAL_GPIO_Init+0x21e>
 800988e:	687b      	ldr	r3, [r7, #4]
 8009890:	4a1a      	ldr	r2, [pc, #104]	@ (80098fc <HAL_GPIO_Init+0x258>)
 8009892:	4293      	cmp	r3, r2
 8009894:	d013      	beq.n	80098be <HAL_GPIO_Init+0x21a>
 8009896:	687b      	ldr	r3, [r7, #4]
 8009898:	4a19      	ldr	r2, [pc, #100]	@ (8009900 <HAL_GPIO_Init+0x25c>)
 800989a:	4293      	cmp	r3, r2
 800989c:	d00d      	beq.n	80098ba <HAL_GPIO_Init+0x216>
 800989e:	687b      	ldr	r3, [r7, #4]
 80098a0:	4a18      	ldr	r2, [pc, #96]	@ (8009904 <HAL_GPIO_Init+0x260>)
 80098a2:	4293      	cmp	r3, r2
 80098a4:	d007      	beq.n	80098b6 <HAL_GPIO_Init+0x212>
 80098a6:	687b      	ldr	r3, [r7, #4]
 80098a8:	4a17      	ldr	r2, [pc, #92]	@ (8009908 <HAL_GPIO_Init+0x264>)
 80098aa:	4293      	cmp	r3, r2
 80098ac:	d101      	bne.n	80098b2 <HAL_GPIO_Init+0x20e>
 80098ae:	2309      	movs	r3, #9
 80098b0:	e02d      	b.n	800990e <HAL_GPIO_Init+0x26a>
 80098b2:	230a      	movs	r3, #10
 80098b4:	e02b      	b.n	800990e <HAL_GPIO_Init+0x26a>
 80098b6:	2308      	movs	r3, #8
 80098b8:	e029      	b.n	800990e <HAL_GPIO_Init+0x26a>
 80098ba:	2307      	movs	r3, #7
 80098bc:	e027      	b.n	800990e <HAL_GPIO_Init+0x26a>
 80098be:	2306      	movs	r3, #6
 80098c0:	e025      	b.n	800990e <HAL_GPIO_Init+0x26a>
 80098c2:	2305      	movs	r3, #5
 80098c4:	e023      	b.n	800990e <HAL_GPIO_Init+0x26a>
 80098c6:	2304      	movs	r3, #4
 80098c8:	e021      	b.n	800990e <HAL_GPIO_Init+0x26a>
 80098ca:	2303      	movs	r3, #3
 80098cc:	e01f      	b.n	800990e <HAL_GPIO_Init+0x26a>
 80098ce:	2302      	movs	r3, #2
 80098d0:	e01d      	b.n	800990e <HAL_GPIO_Init+0x26a>
 80098d2:	2301      	movs	r3, #1
 80098d4:	e01b      	b.n	800990e <HAL_GPIO_Init+0x26a>
 80098d6:	bf00      	nop
 80098d8:	58000080 	.word	0x58000080
 80098dc:	58024400 	.word	0x58024400
 80098e0:	58000400 	.word	0x58000400
 80098e4:	58020000 	.word	0x58020000
 80098e8:	58020400 	.word	0x58020400
 80098ec:	58020800 	.word	0x58020800
 80098f0:	58020c00 	.word	0x58020c00
 80098f4:	58021000 	.word	0x58021000
 80098f8:	58021400 	.word	0x58021400
 80098fc:	58021800 	.word	0x58021800
 8009900:	58021c00 	.word	0x58021c00
 8009904:	58022000 	.word	0x58022000
 8009908:	58022400 	.word	0x58022400
 800990c:	2300      	movs	r3, #0
 800990e:	69fa      	ldr	r2, [r7, #28]
 8009910:	f002 0203 	and.w	r2, r2, #3
 8009914:	0092      	lsls	r2, r2, #2
 8009916:	4093      	lsls	r3, r2
 8009918:	69ba      	ldr	r2, [r7, #24]
 800991a:	4313      	orrs	r3, r2
 800991c:	61bb      	str	r3, [r7, #24]
        SYSCFG->EXTICR[position >> 2U] = temp;
 800991e:	4938      	ldr	r1, [pc, #224]	@ (8009a00 <HAL_GPIO_Init+0x35c>)
 8009920:	69fb      	ldr	r3, [r7, #28]
 8009922:	089b      	lsrs	r3, r3, #2
 8009924:	3302      	adds	r3, #2
 8009926:	69ba      	ldr	r2, [r7, #24]
 8009928:	f841 2023 	str.w	r2, [r1, r3, lsl #2]

        /* Clear Rising Falling edge configuration */
        temp = EXTI->RTSR1;
 800992c:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009930:	681b      	ldr	r3, [r3, #0]
 8009932:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 8009934:	693b      	ldr	r3, [r7, #16]
 8009936:	43db      	mvns	r3, r3
 8009938:	69ba      	ldr	r2, [r7, #24]
 800993a:	4013      	ands	r3, r2
 800993c:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
 800993e:	683b      	ldr	r3, [r7, #0]
 8009940:	685b      	ldr	r3, [r3, #4]
 8009942:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 8009946:	2b00      	cmp	r3, #0
 8009948:	d003      	beq.n	8009952 <HAL_GPIO_Init+0x2ae>
        {
          temp |= iocurrent;
 800994a:	69ba      	ldr	r2, [r7, #24]
 800994c:	693b      	ldr	r3, [r7, #16]
 800994e:	4313      	orrs	r3, r2
 8009950:	61bb      	str	r3, [r7, #24]
        }
        EXTI->RTSR1 = temp;
 8009952:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009956:	69bb      	ldr	r3, [r7, #24]
 8009958:	6013      	str	r3, [r2, #0]

        temp = EXTI->FTSR1;
 800995a:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800995e:	685b      	ldr	r3, [r3, #4]
 8009960:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 8009962:	693b      	ldr	r3, [r7, #16]
 8009964:	43db      	mvns	r3, r3
 8009966:	69ba      	ldr	r2, [r7, #24]
 8009968:	4013      	ands	r3, r2
 800996a:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
 800996c:	683b      	ldr	r3, [r7, #0]
 800996e:	685b      	ldr	r3, [r3, #4]
 8009970:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
 8009974:	2b00      	cmp	r3, #0
 8009976:	d003      	beq.n	8009980 <HAL_GPIO_Init+0x2dc>
        {
          temp |= iocurrent;
 8009978:	69ba      	ldr	r2, [r7, #24]
 800997a:	693b      	ldr	r3, [r7, #16]
 800997c:	4313      	orrs	r3, r2
 800997e:	61bb      	str	r3, [r7, #24]
        }
        EXTI->FTSR1 = temp;
 8009980:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009984:	69bb      	ldr	r3, [r7, #24]
 8009986:	6053      	str	r3, [r2, #4]

        temp = EXTI_CurrentCPU->EMR1;
 8009988:	697b      	ldr	r3, [r7, #20]
 800998a:	685b      	ldr	r3, [r3, #4]
 800998c:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 800998e:	693b      	ldr	r3, [r7, #16]
 8009990:	43db      	mvns	r3, r3
 8009992:	69ba      	ldr	r2, [r7, #24]
 8009994:	4013      	ands	r3, r2
 8009996:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
 8009998:	683b      	ldr	r3, [r7, #0]
 800999a:	685b      	ldr	r3, [r3, #4]
 800999c:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 80099a0:	2b00      	cmp	r3, #0
 80099a2:	d003      	beq.n	80099ac <HAL_GPIO_Init+0x308>
        {
          temp |= iocurrent;
 80099a4:	69ba      	ldr	r2, [r7, #24]
 80099a6:	693b      	ldr	r3, [r7, #16]
 80099a8:	4313      	orrs	r3, r2
 80099aa:	61bb      	str	r3, [r7, #24]
        }
        EXTI_CurrentCPU->EMR1 = temp;
 80099ac:	697b      	ldr	r3, [r7, #20]
 80099ae:	69ba      	ldr	r2, [r7, #24]
 80099b0:	605a      	str	r2, [r3, #4]

        /* Clear EXTI line configuration */
        temp = EXTI_CurrentCPU->IMR1;
 80099b2:	697b      	ldr	r3, [r7, #20]
 80099b4:	681b      	ldr	r3, [r3, #0]
 80099b6:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 80099b8:	693b      	ldr	r3, [r7, #16]
 80099ba:	43db      	mvns	r3, r3
 80099bc:	69ba      	ldr	r2, [r7, #24]
 80099be:	4013      	ands	r3, r2
 80099c0:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & EXTI_IT) != 0x00U)
 80099c2:	683b      	ldr	r3, [r7, #0]
 80099c4:	685b      	ldr	r3, [r3, #4]
 80099c6:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 80099ca:	2b00      	cmp	r3, #0
 80099cc:	d003      	beq.n	80099d6 <HAL_GPIO_Init+0x332>
        {
          temp |= iocurrent;
 80099ce:	69ba      	ldr	r2, [r7, #24]
 80099d0:	693b      	ldr	r3, [r7, #16]
 80099d2:	4313      	orrs	r3, r2
 80099d4:	61bb      	str	r3, [r7, #24]
        }
        EXTI_CurrentCPU->IMR1 = temp;
 80099d6:	697b      	ldr	r3, [r7, #20]
 80099d8:	69ba      	ldr	r2, [r7, #24]
 80099da:	601a      	str	r2, [r3, #0]
      }
    }

    position++;
 80099dc:	69fb      	ldr	r3, [r7, #28]
 80099de:	3301      	adds	r3, #1
 80099e0:	61fb      	str	r3, [r7, #28]
  while (((GPIO_Init->Pin) >> position) != 0x00U)
 80099e2:	683b      	ldr	r3, [r7, #0]
 80099e4:	681a      	ldr	r2, [r3, #0]
 80099e6:	69fb      	ldr	r3, [r7, #28]
 80099e8:	fa22 f303 	lsr.w	r3, r2, r3
 80099ec:	2b00      	cmp	r3, #0
 80099ee:	f47f ae63 	bne.w	80096b8 <HAL_GPIO_Init+0x14>
  }
}
 80099f2:	bf00      	nop
 80099f4:	bf00      	nop
 80099f6:	3724      	adds	r7, #36	@ 0x24
 80099f8:	46bd      	mov	sp, r7
 80099fa:	f85d 7b04 	ldr.w	r7, [sp], #4
 80099fe:	4770      	bx	lr
 8009a00:	58000400 	.word	0x58000400

08009a04 <HAL_GPIO_WritePin>:
  *            @arg GPIO_PIN_RESET: to clear the port pin
  *            @arg GPIO_PIN_SET: to set the port pin
  * @retval None
  */
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
 8009a04:	b480      	push	{r7}
 8009a06:	b083      	sub	sp, #12
 8009a08:	af00      	add	r7, sp, #0
 8009a0a:	6078      	str	r0, [r7, #4]
 8009a0c:	460b      	mov	r3, r1
 8009a0e:	807b      	strh	r3, [r7, #2]
 8009a10:	4613      	mov	r3, r2
 8009a12:	707b      	strb	r3, [r7, #1]
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 8009a14:	787b      	ldrb	r3, [r7, #1]
 8009a16:	2b00      	cmp	r3, #0
 8009a18:	d003      	beq.n	8009a22 <HAL_GPIO_WritePin+0x1e>
  {
    GPIOx->BSRR = GPIO_Pin;
 8009a1a:	887a      	ldrh	r2, [r7, #2]
 8009a1c:	687b      	ldr	r3, [r7, #4]
 8009a1e:	619a      	str	r2, [r3, #24]
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
  }
}
 8009a20:	e003      	b.n	8009a2a <HAL_GPIO_WritePin+0x26>
    GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
 8009a22:	887b      	ldrh	r3, [r7, #2]
 8009a24:	041a      	lsls	r2, r3, #16
 8009a26:	687b      	ldr	r3, [r7, #4]
 8009a28:	619a      	str	r2, [r3, #24]
}
 8009a2a:	bf00      	nop
 8009a2c:	370c      	adds	r7, #12
 8009a2e:	46bd      	mov	sp, r7
 8009a30:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009a34:	4770      	bx	lr
	...

08009a38 <HAL_PWREx_ConfigSupply>:
  *         PWR_SMPS_2V5_SUPPLIES_EXT are used only for lines that supports SMPS
  *         regulator.
  * @retval HAL status.
  */
HAL_StatusTypeDef HAL_PWREx_ConfigSupply (uint32_t SupplySource)
{
 8009a38:	b580      	push	{r7, lr}
 8009a3a:	b084      	sub	sp, #16
 8009a3c:	af00      	add	r7, sp, #0
 8009a3e:	6078      	str	r0, [r7, #4]
  /* Check the parameters */
  assert_param (IS_PWR_SUPPLY (SupplySource));

  /* Check if supply source was configured */
#if defined (PWR_FLAG_SCUEN)
  if (__HAL_PWR_GET_FLAG (PWR_FLAG_SCUEN) == 0U)
 8009a40:	4b19      	ldr	r3, [pc, #100]	@ (8009aa8 <HAL_PWREx_ConfigSupply+0x70>)
 8009a42:	68db      	ldr	r3, [r3, #12]
 8009a44:	f003 0304 	and.w	r3, r3, #4
 8009a48:	2b04      	cmp	r3, #4
 8009a4a:	d00a      	beq.n	8009a62 <HAL_PWREx_ConfigSupply+0x2a>
#else
  if ((PWR->CR3 & (PWR_CR3_SMPSEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS)) != (PWR_CR3_SMPSEN | PWR_CR3_LDOEN))
#endif /* defined (PWR_FLAG_SCUEN) */
  {
    /* Check supply configuration */
    if ((PWR->CR3 & PWR_SUPPLY_CONFIG_MASK) != SupplySource)
 8009a4c:	4b16      	ldr	r3, [pc, #88]	@ (8009aa8 <HAL_PWREx_ConfigSupply+0x70>)
 8009a4e:	68db      	ldr	r3, [r3, #12]
 8009a50:	f003 0307 	and.w	r3, r3, #7
 8009a54:	687a      	ldr	r2, [r7, #4]
 8009a56:	429a      	cmp	r2, r3
 8009a58:	d001      	beq.n	8009a5e <HAL_PWREx_ConfigSupply+0x26>
    {
      /* Supply configuration update locked, can't apply a new supply config */
      return HAL_ERROR;
 8009a5a:	2301      	movs	r3, #1
 8009a5c:	e01f      	b.n	8009a9e <HAL_PWREx_ConfigSupply+0x66>
    else
    {
      /* Supply configuration update locked, but new supply configuration
         matches with old supply configuration : nothing to do
      */
      return HAL_OK;
 8009a5e:	2300      	movs	r3, #0
 8009a60:	e01d      	b.n	8009a9e <HAL_PWREx_ConfigSupply+0x66>
    }
  }

  /* Set the power supply configuration */
  MODIFY_REG (PWR->CR3, PWR_SUPPLY_CONFIG_MASK, SupplySource);
 8009a62:	4b11      	ldr	r3, [pc, #68]	@ (8009aa8 <HAL_PWREx_ConfigSupply+0x70>)
 8009a64:	68db      	ldr	r3, [r3, #12]
 8009a66:	f023 0207 	bic.w	r2, r3, #7
 8009a6a:	490f      	ldr	r1, [pc, #60]	@ (8009aa8 <HAL_PWREx_ConfigSupply+0x70>)
 8009a6c:	687b      	ldr	r3, [r7, #4]
 8009a6e:	4313      	orrs	r3, r2
 8009a70:	60cb      	str	r3, [r1, #12]

  /* Get tick */
  tickstart = HAL_GetTick ();
 8009a72:	f7fb fae7 	bl	8005044 <HAL_GetTick>
 8009a76:	60f8      	str	r0, [r7, #12]

  /* Wait till voltage level flag is set */
  while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U)
 8009a78:	e009      	b.n	8009a8e <HAL_PWREx_ConfigSupply+0x56>
  {
    if ((HAL_GetTick () - tickstart) > PWR_FLAG_SETTING_DELAY)
 8009a7a:	f7fb fae3 	bl	8005044 <HAL_GetTick>
 8009a7e:	4602      	mov	r2, r0
 8009a80:	68fb      	ldr	r3, [r7, #12]
 8009a82:	1ad3      	subs	r3, r2, r3
 8009a84:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 8009a88:	d901      	bls.n	8009a8e <HAL_PWREx_ConfigSupply+0x56>
    {
      return HAL_ERROR;
 8009a8a:	2301      	movs	r3, #1
 8009a8c:	e007      	b.n	8009a9e <HAL_PWREx_ConfigSupply+0x66>
  while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U)
 8009a8e:	4b06      	ldr	r3, [pc, #24]	@ (8009aa8 <HAL_PWREx_ConfigSupply+0x70>)
 8009a90:	685b      	ldr	r3, [r3, #4]
 8009a92:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8009a96:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 8009a9a:	d1ee      	bne.n	8009a7a <HAL_PWREx_ConfigSupply+0x42>
      }
    }
  }
#endif /* defined (SMPS) */

  return HAL_OK;
 8009a9c:	2300      	movs	r3, #0
}
 8009a9e:	4618      	mov	r0, r3
 8009aa0:	3710      	adds	r7, #16
 8009aa2:	46bd      	mov	sp, r7
 8009aa4:	bd80      	pop	{r7, pc}
 8009aa6:	bf00      	nop
 8009aa8:	58024800 	.word	0x58024800

08009aac <HAL_RCC_OscConfig>:
  *         supported by this function. User should request a transition to HSE Off
  *         first and then HSE On or HSE Bypass.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
{
 8009aac:	b580      	push	{r7, lr}
 8009aae:	b08c      	sub	sp, #48	@ 0x30
 8009ab0:	af00      	add	r7, sp, #0
 8009ab2:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;
  uint32_t temp1_pllckcfg, temp2_pllckcfg;

  /* Check Null pointer */
  if (RCC_OscInitStruct == NULL)
 8009ab4:	687b      	ldr	r3, [r7, #4]
 8009ab6:	2b00      	cmp	r3, #0
 8009ab8:	d102      	bne.n	8009ac0 <HAL_RCC_OscConfig+0x14>
  {
    return HAL_ERROR;
 8009aba:	2301      	movs	r3, #1
 8009abc:	f000 bc48 	b.w	800a350 <HAL_RCC_OscConfig+0x8a4>
  }

  /* Check the parameters */
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  /*------------------------------- HSE Configuration ------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8009ac0:	687b      	ldr	r3, [r7, #4]
 8009ac2:	681b      	ldr	r3, [r3, #0]
 8009ac4:	f003 0301 	and.w	r3, r3, #1
 8009ac8:	2b00      	cmp	r3, #0
 8009aca:	f000 8088 	beq.w	8009bde <HAL_RCC_OscConfig+0x132>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));

    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 8009ace:	4b99      	ldr	r3, [pc, #612]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009ad0:	691b      	ldr	r3, [r3, #16]
 8009ad2:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 8009ad6:	62fb      	str	r3, [r7, #44]	@ 0x2c
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 8009ad8:	4b96      	ldr	r3, [pc, #600]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009ada:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8009adc:	62bb      	str	r3, [r7, #40]	@ 0x28
    /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
    if ((temp_sysclksrc == RCC_CFGR_SWS_HSE) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSE)))
 8009ade:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009ae0:	2b10      	cmp	r3, #16
 8009ae2:	d007      	beq.n	8009af4 <HAL_RCC_OscConfig+0x48>
 8009ae4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009ae6:	2b18      	cmp	r3, #24
 8009ae8:	d111      	bne.n	8009b0e <HAL_RCC_OscConfig+0x62>
 8009aea:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8009aec:	f003 0303 	and.w	r3, r3, #3
 8009af0:	2b02      	cmp	r3, #2
 8009af2:	d10c      	bne.n	8009b0e <HAL_RCC_OscConfig+0x62>
    {
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 8009af4:	4b8f      	ldr	r3, [pc, #572]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009af6:	681b      	ldr	r3, [r3, #0]
 8009af8:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8009afc:	2b00      	cmp	r3, #0
 8009afe:	d06d      	beq.n	8009bdc <HAL_RCC_OscConfig+0x130>
 8009b00:	687b      	ldr	r3, [r7, #4]
 8009b02:	685b      	ldr	r3, [r3, #4]
 8009b04:	2b00      	cmp	r3, #0
 8009b06:	d169      	bne.n	8009bdc <HAL_RCC_OscConfig+0x130>
      {
        return HAL_ERROR;
 8009b08:	2301      	movs	r3, #1
 8009b0a:	f000 bc21 	b.w	800a350 <HAL_RCC_OscConfig+0x8a4>
      }
    }
    else
    {
      /* Set the new HSE configuration ---------------------------------------*/
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8009b0e:	687b      	ldr	r3, [r7, #4]
 8009b10:	685b      	ldr	r3, [r3, #4]
 8009b12:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8009b16:	d106      	bne.n	8009b26 <HAL_RCC_OscConfig+0x7a>
 8009b18:	4b86      	ldr	r3, [pc, #536]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009b1a:	681b      	ldr	r3, [r3, #0]
 8009b1c:	4a85      	ldr	r2, [pc, #532]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009b1e:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8009b22:	6013      	str	r3, [r2, #0]
 8009b24:	e02e      	b.n	8009b84 <HAL_RCC_OscConfig+0xd8>
 8009b26:	687b      	ldr	r3, [r7, #4]
 8009b28:	685b      	ldr	r3, [r3, #4]
 8009b2a:	2b00      	cmp	r3, #0
 8009b2c:	d10c      	bne.n	8009b48 <HAL_RCC_OscConfig+0x9c>
 8009b2e:	4b81      	ldr	r3, [pc, #516]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009b30:	681b      	ldr	r3, [r3, #0]
 8009b32:	4a80      	ldr	r2, [pc, #512]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009b34:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8009b38:	6013      	str	r3, [r2, #0]
 8009b3a:	4b7e      	ldr	r3, [pc, #504]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009b3c:	681b      	ldr	r3, [r3, #0]
 8009b3e:	4a7d      	ldr	r2, [pc, #500]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009b40:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 8009b44:	6013      	str	r3, [r2, #0]
 8009b46:	e01d      	b.n	8009b84 <HAL_RCC_OscConfig+0xd8>
 8009b48:	687b      	ldr	r3, [r7, #4]
 8009b4a:	685b      	ldr	r3, [r3, #4]
 8009b4c:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 8009b50:	d10c      	bne.n	8009b6c <HAL_RCC_OscConfig+0xc0>
 8009b52:	4b78      	ldr	r3, [pc, #480]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009b54:	681b      	ldr	r3, [r3, #0]
 8009b56:	4a77      	ldr	r2, [pc, #476]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009b58:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
 8009b5c:	6013      	str	r3, [r2, #0]
 8009b5e:	4b75      	ldr	r3, [pc, #468]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009b60:	681b      	ldr	r3, [r3, #0]
 8009b62:	4a74      	ldr	r2, [pc, #464]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009b64:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8009b68:	6013      	str	r3, [r2, #0]
 8009b6a:	e00b      	b.n	8009b84 <HAL_RCC_OscConfig+0xd8>
 8009b6c:	4b71      	ldr	r3, [pc, #452]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009b6e:	681b      	ldr	r3, [r3, #0]
 8009b70:	4a70      	ldr	r2, [pc, #448]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009b72:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8009b76:	6013      	str	r3, [r2, #0]
 8009b78:	4b6e      	ldr	r3, [pc, #440]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009b7a:	681b      	ldr	r3, [r3, #0]
 8009b7c:	4a6d      	ldr	r2, [pc, #436]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009b7e:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 8009b82:	6013      	str	r3, [r2, #0]

      /* Check the HSE State */
      if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
 8009b84:	687b      	ldr	r3, [r7, #4]
 8009b86:	685b      	ldr	r3, [r3, #4]
 8009b88:	2b00      	cmp	r3, #0
 8009b8a:	d013      	beq.n	8009bb4 <HAL_RCC_OscConfig+0x108>
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009b8c:	f7fb fa5a 	bl	8005044 <HAL_GetTick>
 8009b90:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSE is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 8009b92:	e008      	b.n	8009ba6 <HAL_RCC_OscConfig+0xfa>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 8009b94:	f7fb fa56 	bl	8005044 <HAL_GetTick>
 8009b98:	4602      	mov	r2, r0
 8009b9a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009b9c:	1ad3      	subs	r3, r2, r3
 8009b9e:	2b64      	cmp	r3, #100	@ 0x64
 8009ba0:	d901      	bls.n	8009ba6 <HAL_RCC_OscConfig+0xfa>
          {
            return HAL_TIMEOUT;
 8009ba2:	2303      	movs	r3, #3
 8009ba4:	e3d4      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 8009ba6:	4b63      	ldr	r3, [pc, #396]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009ba8:	681b      	ldr	r3, [r3, #0]
 8009baa:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8009bae:	2b00      	cmp	r3, #0
 8009bb0:	d0f0      	beq.n	8009b94 <HAL_RCC_OscConfig+0xe8>
 8009bb2:	e014      	b.n	8009bde <HAL_RCC_OscConfig+0x132>
        }
      }
      else
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009bb4:	f7fb fa46 	bl	8005044 <HAL_GetTick>
 8009bb8:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSE is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
 8009bba:	e008      	b.n	8009bce <HAL_RCC_OscConfig+0x122>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 8009bbc:	f7fb fa42 	bl	8005044 <HAL_GetTick>
 8009bc0:	4602      	mov	r2, r0
 8009bc2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009bc4:	1ad3      	subs	r3, r2, r3
 8009bc6:	2b64      	cmp	r3, #100	@ 0x64
 8009bc8:	d901      	bls.n	8009bce <HAL_RCC_OscConfig+0x122>
          {
            return HAL_TIMEOUT;
 8009bca:	2303      	movs	r3, #3
 8009bcc:	e3c0      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
 8009bce:	4b59      	ldr	r3, [pc, #356]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009bd0:	681b      	ldr	r3, [r3, #0]
 8009bd2:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8009bd6:	2b00      	cmp	r3, #0
 8009bd8:	d1f0      	bne.n	8009bbc <HAL_RCC_OscConfig+0x110>
 8009bda:	e000      	b.n	8009bde <HAL_RCC_OscConfig+0x132>
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 8009bdc:	bf00      	nop
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 8009bde:	687b      	ldr	r3, [r7, #4]
 8009be0:	681b      	ldr	r3, [r3, #0]
 8009be2:	f003 0302 	and.w	r3, r3, #2
 8009be6:	2b00      	cmp	r3, #0
 8009be8:	f000 80ca 	beq.w	8009d80 <HAL_RCC_OscConfig+0x2d4>
    /* Check the parameters */
    assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
    assert_param(IS_RCC_HSICALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));

    /* When the HSI is used as system clock it will not be disabled */
    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 8009bec:	4b51      	ldr	r3, [pc, #324]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009bee:	691b      	ldr	r3, [r3, #16]
 8009bf0:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 8009bf4:	623b      	str	r3, [r7, #32]
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 8009bf6:	4b4f      	ldr	r3, [pc, #316]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009bf8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8009bfa:	61fb      	str	r3, [r7, #28]
    if ((temp_sysclksrc == RCC_CFGR_SWS_HSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSI)))
 8009bfc:	6a3b      	ldr	r3, [r7, #32]
 8009bfe:	2b00      	cmp	r3, #0
 8009c00:	d007      	beq.n	8009c12 <HAL_RCC_OscConfig+0x166>
 8009c02:	6a3b      	ldr	r3, [r7, #32]
 8009c04:	2b18      	cmp	r3, #24
 8009c06:	d156      	bne.n	8009cb6 <HAL_RCC_OscConfig+0x20a>
 8009c08:	69fb      	ldr	r3, [r7, #28]
 8009c0a:	f003 0303 	and.w	r3, r3, #3
 8009c0e:	2b00      	cmp	r3, #0
 8009c10:	d151      	bne.n	8009cb6 <HAL_RCC_OscConfig+0x20a>
    {
      /* When HSI is used as system clock it will not be disabled */
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 8009c12:	4b48      	ldr	r3, [pc, #288]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009c14:	681b      	ldr	r3, [r3, #0]
 8009c16:	f003 0304 	and.w	r3, r3, #4
 8009c1a:	2b00      	cmp	r3, #0
 8009c1c:	d005      	beq.n	8009c2a <HAL_RCC_OscConfig+0x17e>
 8009c1e:	687b      	ldr	r3, [r7, #4]
 8009c20:	68db      	ldr	r3, [r3, #12]
 8009c22:	2b00      	cmp	r3, #0
 8009c24:	d101      	bne.n	8009c2a <HAL_RCC_OscConfig+0x17e>
      {
        return HAL_ERROR;
 8009c26:	2301      	movs	r3, #1
 8009c28:	e392      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
      }
      /* Otherwise, only HSI division and calibration are allowed */
      else
      {
        /* Enable the Internal High Speed oscillator (HSI, HSIDIV2, HSIDIV4, or HSIDIV8) */
        __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
 8009c2a:	4b42      	ldr	r3, [pc, #264]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009c2c:	681b      	ldr	r3, [r3, #0]
 8009c2e:	f023 0219 	bic.w	r2, r3, #25
 8009c32:	687b      	ldr	r3, [r7, #4]
 8009c34:	68db      	ldr	r3, [r3, #12]
 8009c36:	493f      	ldr	r1, [pc, #252]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009c38:	4313      	orrs	r3, r2
 8009c3a:	600b      	str	r3, [r1, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009c3c:	f7fb fa02 	bl	8005044 <HAL_GetTick>
 8009c40:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 8009c42:	e008      	b.n	8009c56 <HAL_RCC_OscConfig+0x1aa>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 8009c44:	f7fb f9fe 	bl	8005044 <HAL_GetTick>
 8009c48:	4602      	mov	r2, r0
 8009c4a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009c4c:	1ad3      	subs	r3, r2, r3
 8009c4e:	2b02      	cmp	r3, #2
 8009c50:	d901      	bls.n	8009c56 <HAL_RCC_OscConfig+0x1aa>
          {
            return HAL_TIMEOUT;
 8009c52:	2303      	movs	r3, #3
 8009c54:	e37c      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 8009c56:	4b37      	ldr	r3, [pc, #220]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009c58:	681b      	ldr	r3, [r3, #0]
 8009c5a:	f003 0304 	and.w	r3, r3, #4
 8009c5e:	2b00      	cmp	r3, #0
 8009c60:	d0f0      	beq.n	8009c44 <HAL_RCC_OscConfig+0x198>
          }
        }
        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8009c62:	f7fb fa1f 	bl	80050a4 <HAL_GetREVID>
 8009c66:	4603      	mov	r3, r0
 8009c68:	f241 0203 	movw	r2, #4099	@ 0x1003
 8009c6c:	4293      	cmp	r3, r2
 8009c6e:	d817      	bhi.n	8009ca0 <HAL_RCC_OscConfig+0x1f4>
 8009c70:	687b      	ldr	r3, [r7, #4]
 8009c72:	691b      	ldr	r3, [r3, #16]
 8009c74:	2b40      	cmp	r3, #64	@ 0x40
 8009c76:	d108      	bne.n	8009c8a <HAL_RCC_OscConfig+0x1de>
 8009c78:	4b2e      	ldr	r3, [pc, #184]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009c7a:	685b      	ldr	r3, [r3, #4]
 8009c7c:	f423 337c 	bic.w	r3, r3, #258048	@ 0x3f000
 8009c80:	4a2c      	ldr	r2, [pc, #176]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009c82:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 8009c86:	6053      	str	r3, [r2, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 8009c88:	e07a      	b.n	8009d80 <HAL_RCC_OscConfig+0x2d4>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8009c8a:	4b2a      	ldr	r3, [pc, #168]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009c8c:	685b      	ldr	r3, [r3, #4]
 8009c8e:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 8009c92:	687b      	ldr	r3, [r7, #4]
 8009c94:	691b      	ldr	r3, [r3, #16]
 8009c96:	031b      	lsls	r3, r3, #12
 8009c98:	4926      	ldr	r1, [pc, #152]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009c9a:	4313      	orrs	r3, r2
 8009c9c:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 8009c9e:	e06f      	b.n	8009d80 <HAL_RCC_OscConfig+0x2d4>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8009ca0:	4b24      	ldr	r3, [pc, #144]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009ca2:	685b      	ldr	r3, [r3, #4]
 8009ca4:	f023 42fe 	bic.w	r2, r3, #2130706432	@ 0x7f000000
 8009ca8:	687b      	ldr	r3, [r7, #4]
 8009caa:	691b      	ldr	r3, [r3, #16]
 8009cac:	061b      	lsls	r3, r3, #24
 8009cae:	4921      	ldr	r1, [pc, #132]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009cb0:	4313      	orrs	r3, r2
 8009cb2:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 8009cb4:	e064      	b.n	8009d80 <HAL_RCC_OscConfig+0x2d4>
    }

    else
    {
      /* Check the HSI State */
      if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
 8009cb6:	687b      	ldr	r3, [r7, #4]
 8009cb8:	68db      	ldr	r3, [r3, #12]
 8009cba:	2b00      	cmp	r3, #0
 8009cbc:	d047      	beq.n	8009d4e <HAL_RCC_OscConfig+0x2a2>
      {
        /* Enable the Internal High Speed oscillator (HSI, HSIDIV2,HSIDIV4, or HSIDIV8) */
        __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
 8009cbe:	4b1d      	ldr	r3, [pc, #116]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009cc0:	681b      	ldr	r3, [r3, #0]
 8009cc2:	f023 0219 	bic.w	r2, r3, #25
 8009cc6:	687b      	ldr	r3, [r7, #4]
 8009cc8:	68db      	ldr	r3, [r3, #12]
 8009cca:	491a      	ldr	r1, [pc, #104]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009ccc:	4313      	orrs	r3, r2
 8009cce:	600b      	str	r3, [r1, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009cd0:	f7fb f9b8 	bl	8005044 <HAL_GetTick>
 8009cd4:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 8009cd6:	e008      	b.n	8009cea <HAL_RCC_OscConfig+0x23e>
        {
          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 8009cd8:	f7fb f9b4 	bl	8005044 <HAL_GetTick>
 8009cdc:	4602      	mov	r2, r0
 8009cde:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009ce0:	1ad3      	subs	r3, r2, r3
 8009ce2:	2b02      	cmp	r3, #2
 8009ce4:	d901      	bls.n	8009cea <HAL_RCC_OscConfig+0x23e>
          {
            return HAL_TIMEOUT;
 8009ce6:	2303      	movs	r3, #3
 8009ce8:	e332      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 8009cea:	4b12      	ldr	r3, [pc, #72]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009cec:	681b      	ldr	r3, [r3, #0]
 8009cee:	f003 0304 	and.w	r3, r3, #4
 8009cf2:	2b00      	cmp	r3, #0
 8009cf4:	d0f0      	beq.n	8009cd8 <HAL_RCC_OscConfig+0x22c>
          }
        }

        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8009cf6:	f7fb f9d5 	bl	80050a4 <HAL_GetREVID>
 8009cfa:	4603      	mov	r3, r0
 8009cfc:	f241 0203 	movw	r2, #4099	@ 0x1003
 8009d00:	4293      	cmp	r3, r2
 8009d02:	d819      	bhi.n	8009d38 <HAL_RCC_OscConfig+0x28c>
 8009d04:	687b      	ldr	r3, [r7, #4]
 8009d06:	691b      	ldr	r3, [r3, #16]
 8009d08:	2b40      	cmp	r3, #64	@ 0x40
 8009d0a:	d108      	bne.n	8009d1e <HAL_RCC_OscConfig+0x272>
 8009d0c:	4b09      	ldr	r3, [pc, #36]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009d0e:	685b      	ldr	r3, [r3, #4]
 8009d10:	f423 337c 	bic.w	r3, r3, #258048	@ 0x3f000
 8009d14:	4a07      	ldr	r2, [pc, #28]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009d16:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 8009d1a:	6053      	str	r3, [r2, #4]
 8009d1c:	e030      	b.n	8009d80 <HAL_RCC_OscConfig+0x2d4>
 8009d1e:	4b05      	ldr	r3, [pc, #20]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009d20:	685b      	ldr	r3, [r3, #4]
 8009d22:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 8009d26:	687b      	ldr	r3, [r7, #4]
 8009d28:	691b      	ldr	r3, [r3, #16]
 8009d2a:	031b      	lsls	r3, r3, #12
 8009d2c:	4901      	ldr	r1, [pc, #4]	@ (8009d34 <HAL_RCC_OscConfig+0x288>)
 8009d2e:	4313      	orrs	r3, r2
 8009d30:	604b      	str	r3, [r1, #4]
 8009d32:	e025      	b.n	8009d80 <HAL_RCC_OscConfig+0x2d4>
 8009d34:	58024400 	.word	0x58024400
 8009d38:	4b9a      	ldr	r3, [pc, #616]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009d3a:	685b      	ldr	r3, [r3, #4]
 8009d3c:	f023 42fe 	bic.w	r2, r3, #2130706432	@ 0x7f000000
 8009d40:	687b      	ldr	r3, [r7, #4]
 8009d42:	691b      	ldr	r3, [r3, #16]
 8009d44:	061b      	lsls	r3, r3, #24
 8009d46:	4997      	ldr	r1, [pc, #604]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009d48:	4313      	orrs	r3, r2
 8009d4a:	604b      	str	r3, [r1, #4]
 8009d4c:	e018      	b.n	8009d80 <HAL_RCC_OscConfig+0x2d4>
      }
      else
      {
        /* Disable the Internal High Speed oscillator (HSI). */
        __HAL_RCC_HSI_DISABLE();
 8009d4e:	4b95      	ldr	r3, [pc, #596]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009d50:	681b      	ldr	r3, [r3, #0]
 8009d52:	4a94      	ldr	r2, [pc, #592]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009d54:	f023 0301 	bic.w	r3, r3, #1
 8009d58:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009d5a:	f7fb f973 	bl	8005044 <HAL_GetTick>
 8009d5e:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
 8009d60:	e008      	b.n	8009d74 <HAL_RCC_OscConfig+0x2c8>
        {
          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 8009d62:	f7fb f96f 	bl	8005044 <HAL_GetTick>
 8009d66:	4602      	mov	r2, r0
 8009d68:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009d6a:	1ad3      	subs	r3, r2, r3
 8009d6c:	2b02      	cmp	r3, #2
 8009d6e:	d901      	bls.n	8009d74 <HAL_RCC_OscConfig+0x2c8>
          {
            return HAL_TIMEOUT;
 8009d70:	2303      	movs	r3, #3
 8009d72:	e2ed      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
 8009d74:	4b8b      	ldr	r3, [pc, #556]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009d76:	681b      	ldr	r3, [r3, #0]
 8009d78:	f003 0304 	and.w	r3, r3, #4
 8009d7c:	2b00      	cmp	r3, #0
 8009d7e:	d1f0      	bne.n	8009d62 <HAL_RCC_OscConfig+0x2b6>
        }
      }
    }
  }
  /*----------------------------- CSI Configuration --------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_CSI) == RCC_OSCILLATORTYPE_CSI)
 8009d80:	687b      	ldr	r3, [r7, #4]
 8009d82:	681b      	ldr	r3, [r3, #0]
 8009d84:	f003 0310 	and.w	r3, r3, #16
 8009d88:	2b00      	cmp	r3, #0
 8009d8a:	f000 80a9 	beq.w	8009ee0 <HAL_RCC_OscConfig+0x434>
    /* Check the parameters */
    assert_param(IS_RCC_CSI(RCC_OscInitStruct->CSIState));
    assert_param(IS_RCC_CSICALIBRATION_VALUE(RCC_OscInitStruct->CSICalibrationValue));

    /* When the CSI is used as system clock it will not disabled */
    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 8009d8e:	4b85      	ldr	r3, [pc, #532]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009d90:	691b      	ldr	r3, [r3, #16]
 8009d92:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 8009d96:	61bb      	str	r3, [r7, #24]
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 8009d98:	4b82      	ldr	r3, [pc, #520]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009d9a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8009d9c:	617b      	str	r3, [r7, #20]
    if ((temp_sysclksrc == RCC_CFGR_SWS_CSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_CSI)))
 8009d9e:	69bb      	ldr	r3, [r7, #24]
 8009da0:	2b08      	cmp	r3, #8
 8009da2:	d007      	beq.n	8009db4 <HAL_RCC_OscConfig+0x308>
 8009da4:	69bb      	ldr	r3, [r7, #24]
 8009da6:	2b18      	cmp	r3, #24
 8009da8:	d13a      	bne.n	8009e20 <HAL_RCC_OscConfig+0x374>
 8009daa:	697b      	ldr	r3, [r7, #20]
 8009dac:	f003 0303 	and.w	r3, r3, #3
 8009db0:	2b01      	cmp	r3, #1
 8009db2:	d135      	bne.n	8009e20 <HAL_RCC_OscConfig+0x374>
    {
      /* When CSI is used as system clock it will not disabled */
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 8009db4:	4b7b      	ldr	r3, [pc, #492]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009db6:	681b      	ldr	r3, [r3, #0]
 8009db8:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8009dbc:	2b00      	cmp	r3, #0
 8009dbe:	d005      	beq.n	8009dcc <HAL_RCC_OscConfig+0x320>
 8009dc0:	687b      	ldr	r3, [r7, #4]
 8009dc2:	69db      	ldr	r3, [r3, #28]
 8009dc4:	2b80      	cmp	r3, #128	@ 0x80
 8009dc6:	d001      	beq.n	8009dcc <HAL_RCC_OscConfig+0x320>
      {
        return HAL_ERROR;
 8009dc8:	2301      	movs	r3, #1
 8009dca:	e2c1      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
      }
      /* Otherwise, just the calibration is allowed */
      else
      {
        /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 8009dcc:	f7fb f96a 	bl	80050a4 <HAL_GetREVID>
 8009dd0:	4603      	mov	r3, r0
 8009dd2:	f241 0203 	movw	r2, #4099	@ 0x1003
 8009dd6:	4293      	cmp	r3, r2
 8009dd8:	d817      	bhi.n	8009e0a <HAL_RCC_OscConfig+0x35e>
 8009dda:	687b      	ldr	r3, [r7, #4]
 8009ddc:	6a1b      	ldr	r3, [r3, #32]
 8009dde:	2b20      	cmp	r3, #32
 8009de0:	d108      	bne.n	8009df4 <HAL_RCC_OscConfig+0x348>
 8009de2:	4b70      	ldr	r3, [pc, #448]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009de4:	685b      	ldr	r3, [r3, #4]
 8009de6:	f023 43f8 	bic.w	r3, r3, #2080374784	@ 0x7c000000
 8009dea:	4a6e      	ldr	r2, [pc, #440]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009dec:	f043 4380 	orr.w	r3, r3, #1073741824	@ 0x40000000
 8009df0:	6053      	str	r3, [r2, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 8009df2:	e075      	b.n	8009ee0 <HAL_RCC_OscConfig+0x434>
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 8009df4:	4b6b      	ldr	r3, [pc, #428]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009df6:	685b      	ldr	r3, [r3, #4]
 8009df8:	f023 42f8 	bic.w	r2, r3, #2080374784	@ 0x7c000000
 8009dfc:	687b      	ldr	r3, [r7, #4]
 8009dfe:	6a1b      	ldr	r3, [r3, #32]
 8009e00:	069b      	lsls	r3, r3, #26
 8009e02:	4968      	ldr	r1, [pc, #416]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009e04:	4313      	orrs	r3, r2
 8009e06:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 8009e08:	e06a      	b.n	8009ee0 <HAL_RCC_OscConfig+0x434>
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 8009e0a:	4b66      	ldr	r3, [pc, #408]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009e0c:	68db      	ldr	r3, [r3, #12]
 8009e0e:	f023 527c 	bic.w	r2, r3, #1056964608	@ 0x3f000000
 8009e12:	687b      	ldr	r3, [r7, #4]
 8009e14:	6a1b      	ldr	r3, [r3, #32]
 8009e16:	061b      	lsls	r3, r3, #24
 8009e18:	4962      	ldr	r1, [pc, #392]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009e1a:	4313      	orrs	r3, r2
 8009e1c:	60cb      	str	r3, [r1, #12]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 8009e1e:	e05f      	b.n	8009ee0 <HAL_RCC_OscConfig+0x434>
      }
    }
    else
    {
      /* Check the CSI State */
      if ((RCC_OscInitStruct->CSIState) != RCC_CSI_OFF)
 8009e20:	687b      	ldr	r3, [r7, #4]
 8009e22:	69db      	ldr	r3, [r3, #28]
 8009e24:	2b00      	cmp	r3, #0
 8009e26:	d042      	beq.n	8009eae <HAL_RCC_OscConfig+0x402>
      {
        /* Enable the Internal High Speed oscillator (CSI). */
        __HAL_RCC_CSI_ENABLE();
 8009e28:	4b5e      	ldr	r3, [pc, #376]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009e2a:	681b      	ldr	r3, [r3, #0]
 8009e2c:	4a5d      	ldr	r2, [pc, #372]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009e2e:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 8009e32:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009e34:	f7fb f906 	bl	8005044 <HAL_GetTick>
 8009e38:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till CSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 8009e3a:	e008      	b.n	8009e4e <HAL_RCC_OscConfig+0x3a2>
        {
          if ((HAL_GetTick() - tickstart) > CSI_TIMEOUT_VALUE)
 8009e3c:	f7fb f902 	bl	8005044 <HAL_GetTick>
 8009e40:	4602      	mov	r2, r0
 8009e42:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009e44:	1ad3      	subs	r3, r2, r3
 8009e46:	2b02      	cmp	r3, #2
 8009e48:	d901      	bls.n	8009e4e <HAL_RCC_OscConfig+0x3a2>
          {
            return HAL_TIMEOUT;
 8009e4a:	2303      	movs	r3, #3
 8009e4c:	e280      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 8009e4e:	4b55      	ldr	r3, [pc, #340]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009e50:	681b      	ldr	r3, [r3, #0]
 8009e52:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8009e56:	2b00      	cmp	r3, #0
 8009e58:	d0f0      	beq.n	8009e3c <HAL_RCC_OscConfig+0x390>
          }
        }

        /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 8009e5a:	f7fb f923 	bl	80050a4 <HAL_GetREVID>
 8009e5e:	4603      	mov	r3, r0
 8009e60:	f241 0203 	movw	r2, #4099	@ 0x1003
 8009e64:	4293      	cmp	r3, r2
 8009e66:	d817      	bhi.n	8009e98 <HAL_RCC_OscConfig+0x3ec>
 8009e68:	687b      	ldr	r3, [r7, #4]
 8009e6a:	6a1b      	ldr	r3, [r3, #32]
 8009e6c:	2b20      	cmp	r3, #32
 8009e6e:	d108      	bne.n	8009e82 <HAL_RCC_OscConfig+0x3d6>
 8009e70:	4b4c      	ldr	r3, [pc, #304]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009e72:	685b      	ldr	r3, [r3, #4]
 8009e74:	f023 43f8 	bic.w	r3, r3, #2080374784	@ 0x7c000000
 8009e78:	4a4a      	ldr	r2, [pc, #296]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009e7a:	f043 4380 	orr.w	r3, r3, #1073741824	@ 0x40000000
 8009e7e:	6053      	str	r3, [r2, #4]
 8009e80:	e02e      	b.n	8009ee0 <HAL_RCC_OscConfig+0x434>
 8009e82:	4b48      	ldr	r3, [pc, #288]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009e84:	685b      	ldr	r3, [r3, #4]
 8009e86:	f023 42f8 	bic.w	r2, r3, #2080374784	@ 0x7c000000
 8009e8a:	687b      	ldr	r3, [r7, #4]
 8009e8c:	6a1b      	ldr	r3, [r3, #32]
 8009e8e:	069b      	lsls	r3, r3, #26
 8009e90:	4944      	ldr	r1, [pc, #272]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009e92:	4313      	orrs	r3, r2
 8009e94:	604b      	str	r3, [r1, #4]
 8009e96:	e023      	b.n	8009ee0 <HAL_RCC_OscConfig+0x434>
 8009e98:	4b42      	ldr	r3, [pc, #264]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009e9a:	68db      	ldr	r3, [r3, #12]
 8009e9c:	f023 527c 	bic.w	r2, r3, #1056964608	@ 0x3f000000
 8009ea0:	687b      	ldr	r3, [r7, #4]
 8009ea2:	6a1b      	ldr	r3, [r3, #32]
 8009ea4:	061b      	lsls	r3, r3, #24
 8009ea6:	493f      	ldr	r1, [pc, #252]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009ea8:	4313      	orrs	r3, r2
 8009eaa:	60cb      	str	r3, [r1, #12]
 8009eac:	e018      	b.n	8009ee0 <HAL_RCC_OscConfig+0x434>
      }
      else
      {
        /* Disable the Internal High Speed oscillator (CSI). */
        __HAL_RCC_CSI_DISABLE();
 8009eae:	4b3d      	ldr	r3, [pc, #244]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009eb0:	681b      	ldr	r3, [r3, #0]
 8009eb2:	4a3c      	ldr	r2, [pc, #240]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009eb4:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 8009eb8:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009eba:	f7fb f8c3 	bl	8005044 <HAL_GetTick>
 8009ebe:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till CSI is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U)
 8009ec0:	e008      	b.n	8009ed4 <HAL_RCC_OscConfig+0x428>
        {
          if ((HAL_GetTick() - tickstart) > CSI_TIMEOUT_VALUE)
 8009ec2:	f7fb f8bf 	bl	8005044 <HAL_GetTick>
 8009ec6:	4602      	mov	r2, r0
 8009ec8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009eca:	1ad3      	subs	r3, r2, r3
 8009ecc:	2b02      	cmp	r3, #2
 8009ece:	d901      	bls.n	8009ed4 <HAL_RCC_OscConfig+0x428>
          {
            return HAL_TIMEOUT;
 8009ed0:	2303      	movs	r3, #3
 8009ed2:	e23d      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U)
 8009ed4:	4b33      	ldr	r3, [pc, #204]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009ed6:	681b      	ldr	r3, [r3, #0]
 8009ed8:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8009edc:	2b00      	cmp	r3, #0
 8009ede:	d1f0      	bne.n	8009ec2 <HAL_RCC_OscConfig+0x416>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 8009ee0:	687b      	ldr	r3, [r7, #4]
 8009ee2:	681b      	ldr	r3, [r3, #0]
 8009ee4:	f003 0308 	and.w	r3, r3, #8
 8009ee8:	2b00      	cmp	r3, #0
 8009eea:	d036      	beq.n	8009f5a <HAL_RCC_OscConfig+0x4ae>
  {
    /* Check the parameters */
    assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));

    /* Check the LSI State */
    if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
 8009eec:	687b      	ldr	r3, [r7, #4]
 8009eee:	695b      	ldr	r3, [r3, #20]
 8009ef0:	2b00      	cmp	r3, #0
 8009ef2:	d019      	beq.n	8009f28 <HAL_RCC_OscConfig+0x47c>
    {
      /* Enable the Internal Low Speed oscillator (LSI). */
      __HAL_RCC_LSI_ENABLE();
 8009ef4:	4b2b      	ldr	r3, [pc, #172]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009ef6:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 8009ef8:	4a2a      	ldr	r2, [pc, #168]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009efa:	f043 0301 	orr.w	r3, r3, #1
 8009efe:	6753      	str	r3, [r2, #116]	@ 0x74

      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 8009f00:	f7fb f8a0 	bl	8005044 <HAL_GetTick>
 8009f04:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSI is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
 8009f06:	e008      	b.n	8009f1a <HAL_RCC_OscConfig+0x46e>
      {
        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 8009f08:	f7fb f89c 	bl	8005044 <HAL_GetTick>
 8009f0c:	4602      	mov	r2, r0
 8009f0e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009f10:	1ad3      	subs	r3, r2, r3
 8009f12:	2b02      	cmp	r3, #2
 8009f14:	d901      	bls.n	8009f1a <HAL_RCC_OscConfig+0x46e>
        {
          return HAL_TIMEOUT;
 8009f16:	2303      	movs	r3, #3
 8009f18:	e21a      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
 8009f1a:	4b22      	ldr	r3, [pc, #136]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009f1c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 8009f1e:	f003 0302 	and.w	r3, r3, #2
 8009f22:	2b00      	cmp	r3, #0
 8009f24:	d0f0      	beq.n	8009f08 <HAL_RCC_OscConfig+0x45c>
 8009f26:	e018      	b.n	8009f5a <HAL_RCC_OscConfig+0x4ae>
      }
    }
    else
    {
      /* Disable the Internal Low Speed oscillator (LSI). */
      __HAL_RCC_LSI_DISABLE();
 8009f28:	4b1e      	ldr	r3, [pc, #120]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009f2a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 8009f2c:	4a1d      	ldr	r2, [pc, #116]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009f2e:	f023 0301 	bic.w	r3, r3, #1
 8009f32:	6753      	str	r3, [r2, #116]	@ 0x74

      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 8009f34:	f7fb f886 	bl	8005044 <HAL_GetTick>
 8009f38:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSI is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
 8009f3a:	e008      	b.n	8009f4e <HAL_RCC_OscConfig+0x4a2>
      {
        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 8009f3c:	f7fb f882 	bl	8005044 <HAL_GetTick>
 8009f40:	4602      	mov	r2, r0
 8009f42:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009f44:	1ad3      	subs	r3, r2, r3
 8009f46:	2b02      	cmp	r3, #2
 8009f48:	d901      	bls.n	8009f4e <HAL_RCC_OscConfig+0x4a2>
        {
          return HAL_TIMEOUT;
 8009f4a:	2303      	movs	r3, #3
 8009f4c:	e200      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
 8009f4e:	4b15      	ldr	r3, [pc, #84]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009f50:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 8009f52:	f003 0302 	and.w	r3, r3, #2
 8009f56:	2b00      	cmp	r3, #0
 8009f58:	d1f0      	bne.n	8009f3c <HAL_RCC_OscConfig+0x490>
      }
    }
  }

  /*------------------------------ HSI48 Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
 8009f5a:	687b      	ldr	r3, [r7, #4]
 8009f5c:	681b      	ldr	r3, [r3, #0]
 8009f5e:	f003 0320 	and.w	r3, r3, #32
 8009f62:	2b00      	cmp	r3, #0
 8009f64:	d039      	beq.n	8009fda <HAL_RCC_OscConfig+0x52e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));

    /* Check the HSI48 State */
    if ((RCC_OscInitStruct->HSI48State) != RCC_HSI48_OFF)
 8009f66:	687b      	ldr	r3, [r7, #4]
 8009f68:	699b      	ldr	r3, [r3, #24]
 8009f6a:	2b00      	cmp	r3, #0
 8009f6c:	d01c      	beq.n	8009fa8 <HAL_RCC_OscConfig+0x4fc>
    {
      /* Enable the Internal Low Speed oscillator (HSI48). */
      __HAL_RCC_HSI48_ENABLE();
 8009f6e:	4b0d      	ldr	r3, [pc, #52]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009f70:	681b      	ldr	r3, [r3, #0]
 8009f72:	4a0c      	ldr	r2, [pc, #48]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009f74:	f443 5380 	orr.w	r3, r3, #4096	@ 0x1000
 8009f78:	6013      	str	r3, [r2, #0]

      /* Get time-out */
      tickstart = HAL_GetTick();
 8009f7a:	f7fb f863 	bl	8005044 <HAL_GetTick>
 8009f7e:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till HSI48 is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
 8009f80:	e008      	b.n	8009f94 <HAL_RCC_OscConfig+0x4e8>
      {
        if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
 8009f82:	f7fb f85f 	bl	8005044 <HAL_GetTick>
 8009f86:	4602      	mov	r2, r0
 8009f88:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009f8a:	1ad3      	subs	r3, r2, r3
 8009f8c:	2b02      	cmp	r3, #2
 8009f8e:	d901      	bls.n	8009f94 <HAL_RCC_OscConfig+0x4e8>
        {
          return HAL_TIMEOUT;
 8009f90:	2303      	movs	r3, #3
 8009f92:	e1dd      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
 8009f94:	4b03      	ldr	r3, [pc, #12]	@ (8009fa4 <HAL_RCC_OscConfig+0x4f8>)
 8009f96:	681b      	ldr	r3, [r3, #0]
 8009f98:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8009f9c:	2b00      	cmp	r3, #0
 8009f9e:	d0f0      	beq.n	8009f82 <HAL_RCC_OscConfig+0x4d6>
 8009fa0:	e01b      	b.n	8009fda <HAL_RCC_OscConfig+0x52e>
 8009fa2:	bf00      	nop
 8009fa4:	58024400 	.word	0x58024400
      }
    }
    else
    {
      /* Disable the Internal Low Speed oscillator (HSI48). */
      __HAL_RCC_HSI48_DISABLE();
 8009fa8:	4b9b      	ldr	r3, [pc, #620]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 8009faa:	681b      	ldr	r3, [r3, #0]
 8009fac:	4a9a      	ldr	r2, [pc, #616]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 8009fae:	f423 5380 	bic.w	r3, r3, #4096	@ 0x1000
 8009fb2:	6013      	str	r3, [r2, #0]

      /* Get time-out */
      tickstart = HAL_GetTick();
 8009fb4:	f7fb f846 	bl	8005044 <HAL_GetTick>
 8009fb8:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till HSI48 is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
 8009fba:	e008      	b.n	8009fce <HAL_RCC_OscConfig+0x522>
      {
        if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
 8009fbc:	f7fb f842 	bl	8005044 <HAL_GetTick>
 8009fc0:	4602      	mov	r2, r0
 8009fc2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009fc4:	1ad3      	subs	r3, r2, r3
 8009fc6:	2b02      	cmp	r3, #2
 8009fc8:	d901      	bls.n	8009fce <HAL_RCC_OscConfig+0x522>
        {
          return HAL_TIMEOUT;
 8009fca:	2303      	movs	r3, #3
 8009fcc:	e1c0      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
 8009fce:	4b92      	ldr	r3, [pc, #584]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 8009fd0:	681b      	ldr	r3, [r3, #0]
 8009fd2:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8009fd6:	2b00      	cmp	r3, #0
 8009fd8:	d1f0      	bne.n	8009fbc <HAL_RCC_OscConfig+0x510>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 8009fda:	687b      	ldr	r3, [r7, #4]
 8009fdc:	681b      	ldr	r3, [r3, #0]
 8009fde:	f003 0304 	and.w	r3, r3, #4
 8009fe2:	2b00      	cmp	r3, #0
 8009fe4:	f000 8081 	beq.w	800a0ea <HAL_RCC_OscConfig+0x63e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));

    /* Enable write access to Backup domain */
    PWR->CR1 |= PWR_CR1_DBP;
 8009fe8:	4b8c      	ldr	r3, [pc, #560]	@ (800a21c <HAL_RCC_OscConfig+0x770>)
 8009fea:	681b      	ldr	r3, [r3, #0]
 8009fec:	4a8b      	ldr	r2, [pc, #556]	@ (800a21c <HAL_RCC_OscConfig+0x770>)
 8009fee:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 8009ff2:	6013      	str	r3, [r2, #0]

    /* Wait for Backup domain Write protection disable */
    tickstart = HAL_GetTick();
 8009ff4:	f7fb f826 	bl	8005044 <HAL_GetTick>
 8009ff8:	6278      	str	r0, [r7, #36]	@ 0x24

    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 8009ffa:	e008      	b.n	800a00e <HAL_RCC_OscConfig+0x562>
    {
      if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 8009ffc:	f7fb f822 	bl	8005044 <HAL_GetTick>
 800a000:	4602      	mov	r2, r0
 800a002:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a004:	1ad3      	subs	r3, r2, r3
 800a006:	2b64      	cmp	r3, #100	@ 0x64
 800a008:	d901      	bls.n	800a00e <HAL_RCC_OscConfig+0x562>
      {
        return HAL_TIMEOUT;
 800a00a:	2303      	movs	r3, #3
 800a00c:	e1a0      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800a00e:	4b83      	ldr	r3, [pc, #524]	@ (800a21c <HAL_RCC_OscConfig+0x770>)
 800a010:	681b      	ldr	r3, [r3, #0]
 800a012:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800a016:	2b00      	cmp	r3, #0
 800a018:	d0f0      	beq.n	8009ffc <HAL_RCC_OscConfig+0x550>
      }
    }

    /* Set the new LSE configuration -----------------------------------------*/
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 800a01a:	687b      	ldr	r3, [r7, #4]
 800a01c:	689b      	ldr	r3, [r3, #8]
 800a01e:	2b01      	cmp	r3, #1
 800a020:	d106      	bne.n	800a030 <HAL_RCC_OscConfig+0x584>
 800a022:	4b7d      	ldr	r3, [pc, #500]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a024:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a026:	4a7c      	ldr	r2, [pc, #496]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a028:	f043 0301 	orr.w	r3, r3, #1
 800a02c:	6713      	str	r3, [r2, #112]	@ 0x70
 800a02e:	e02d      	b.n	800a08c <HAL_RCC_OscConfig+0x5e0>
 800a030:	687b      	ldr	r3, [r7, #4]
 800a032:	689b      	ldr	r3, [r3, #8]
 800a034:	2b00      	cmp	r3, #0
 800a036:	d10c      	bne.n	800a052 <HAL_RCC_OscConfig+0x5a6>
 800a038:	4b77      	ldr	r3, [pc, #476]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a03a:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a03c:	4a76      	ldr	r2, [pc, #472]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a03e:	f023 0301 	bic.w	r3, r3, #1
 800a042:	6713      	str	r3, [r2, #112]	@ 0x70
 800a044:	4b74      	ldr	r3, [pc, #464]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a046:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a048:	4a73      	ldr	r2, [pc, #460]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a04a:	f023 0304 	bic.w	r3, r3, #4
 800a04e:	6713      	str	r3, [r2, #112]	@ 0x70
 800a050:	e01c      	b.n	800a08c <HAL_RCC_OscConfig+0x5e0>
 800a052:	687b      	ldr	r3, [r7, #4]
 800a054:	689b      	ldr	r3, [r3, #8]
 800a056:	2b05      	cmp	r3, #5
 800a058:	d10c      	bne.n	800a074 <HAL_RCC_OscConfig+0x5c8>
 800a05a:	4b6f      	ldr	r3, [pc, #444]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a05c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a05e:	4a6e      	ldr	r2, [pc, #440]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a060:	f043 0304 	orr.w	r3, r3, #4
 800a064:	6713      	str	r3, [r2, #112]	@ 0x70
 800a066:	4b6c      	ldr	r3, [pc, #432]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a068:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a06a:	4a6b      	ldr	r2, [pc, #428]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a06c:	f043 0301 	orr.w	r3, r3, #1
 800a070:	6713      	str	r3, [r2, #112]	@ 0x70
 800a072:	e00b      	b.n	800a08c <HAL_RCC_OscConfig+0x5e0>
 800a074:	4b68      	ldr	r3, [pc, #416]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a076:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a078:	4a67      	ldr	r2, [pc, #412]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a07a:	f023 0301 	bic.w	r3, r3, #1
 800a07e:	6713      	str	r3, [r2, #112]	@ 0x70
 800a080:	4b65      	ldr	r3, [pc, #404]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a082:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a084:	4a64      	ldr	r2, [pc, #400]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a086:	f023 0304 	bic.w	r3, r3, #4
 800a08a:	6713      	str	r3, [r2, #112]	@ 0x70
    /* Check the LSE State */
    if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
 800a08c:	687b      	ldr	r3, [r7, #4]
 800a08e:	689b      	ldr	r3, [r3, #8]
 800a090:	2b00      	cmp	r3, #0
 800a092:	d015      	beq.n	800a0c0 <HAL_RCC_OscConfig+0x614>
    {
      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800a094:	f7fa ffd6 	bl	8005044 <HAL_GetTick>
 800a098:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSE is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800a09a:	e00a      	b.n	800a0b2 <HAL_RCC_OscConfig+0x606>
      {
        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 800a09c:	f7fa ffd2 	bl	8005044 <HAL_GetTick>
 800a0a0:	4602      	mov	r2, r0
 800a0a2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a0a4:	1ad3      	subs	r3, r2, r3
 800a0a6:	f241 3288 	movw	r2, #5000	@ 0x1388
 800a0aa:	4293      	cmp	r3, r2
 800a0ac:	d901      	bls.n	800a0b2 <HAL_RCC_OscConfig+0x606>
        {
          return HAL_TIMEOUT;
 800a0ae:	2303      	movs	r3, #3
 800a0b0:	e14e      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800a0b2:	4b59      	ldr	r3, [pc, #356]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a0b4:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a0b6:	f003 0302 	and.w	r3, r3, #2
 800a0ba:	2b00      	cmp	r3, #0
 800a0bc:	d0ee      	beq.n	800a09c <HAL_RCC_OscConfig+0x5f0>
 800a0be:	e014      	b.n	800a0ea <HAL_RCC_OscConfig+0x63e>
      }
    }
    else
    {
      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800a0c0:	f7fa ffc0 	bl	8005044 <HAL_GetTick>
 800a0c4:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSE is disabled */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
 800a0c6:	e00a      	b.n	800a0de <HAL_RCC_OscConfig+0x632>
      {
        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 800a0c8:	f7fa ffbc 	bl	8005044 <HAL_GetTick>
 800a0cc:	4602      	mov	r2, r0
 800a0ce:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a0d0:	1ad3      	subs	r3, r2, r3
 800a0d2:	f241 3288 	movw	r2, #5000	@ 0x1388
 800a0d6:	4293      	cmp	r3, r2
 800a0d8:	d901      	bls.n	800a0de <HAL_RCC_OscConfig+0x632>
        {
          return HAL_TIMEOUT;
 800a0da:	2303      	movs	r3, #3
 800a0dc:	e138      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
 800a0de:	4b4e      	ldr	r3, [pc, #312]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a0e0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a0e2:	f003 0302 	and.w	r3, r3, #2
 800a0e6:	2b00      	cmp	r3, #0
 800a0e8:	d1ee      	bne.n	800a0c8 <HAL_RCC_OscConfig+0x61c>
    }
  }
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 800a0ea:	687b      	ldr	r3, [r7, #4]
 800a0ec:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800a0ee:	2b00      	cmp	r3, #0
 800a0f0:	f000 812d 	beq.w	800a34e <HAL_RCC_OscConfig+0x8a2>
  {
    /* Check if the PLL is used as system clock or not */
    if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL1)
 800a0f4:	4b48      	ldr	r3, [pc, #288]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a0f6:	691b      	ldr	r3, [r3, #16]
 800a0f8:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800a0fc:	2b18      	cmp	r3, #24
 800a0fe:	f000 80bd 	beq.w	800a27c <HAL_RCC_OscConfig+0x7d0>
    {
      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 800a102:	687b      	ldr	r3, [r7, #4]
 800a104:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800a106:	2b02      	cmp	r3, #2
 800a108:	f040 809e 	bne.w	800a248 <HAL_RCC_OscConfig+0x79c>
        assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
        assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
        assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN));

        /* Disable the main PLL. */
        __HAL_RCC_PLL_DISABLE();
 800a10c:	4b42      	ldr	r3, [pc, #264]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a10e:	681b      	ldr	r3, [r3, #0]
 800a110:	4a41      	ldr	r2, [pc, #260]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a112:	f023 7380 	bic.w	r3, r3, #16777216	@ 0x1000000
 800a116:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a118:	f7fa ff94 	bl	8005044 <HAL_GetTick>
 800a11c:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800a11e:	e008      	b.n	800a132 <HAL_RCC_OscConfig+0x686>
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 800a120:	f7fa ff90 	bl	8005044 <HAL_GetTick>
 800a124:	4602      	mov	r2, r0
 800a126:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a128:	1ad3      	subs	r3, r2, r3
 800a12a:	2b02      	cmp	r3, #2
 800a12c:	d901      	bls.n	800a132 <HAL_RCC_OscConfig+0x686>
          {
            return HAL_TIMEOUT;
 800a12e:	2303      	movs	r3, #3
 800a130:	e10e      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800a132:	4b39      	ldr	r3, [pc, #228]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a134:	681b      	ldr	r3, [r3, #0]
 800a136:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800a13a:	2b00      	cmp	r3, #0
 800a13c:	d1f0      	bne.n	800a120 <HAL_RCC_OscConfig+0x674>
          }
        }

        /* Configure the main PLL clock source, multiplication and division factors. */
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 800a13e:	4b36      	ldr	r3, [pc, #216]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a140:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 800a142:	4b37      	ldr	r3, [pc, #220]	@ (800a220 <HAL_RCC_OscConfig+0x774>)
 800a144:	4013      	ands	r3, r2
 800a146:	687a      	ldr	r2, [r7, #4]
 800a148:	6a91      	ldr	r1, [r2, #40]	@ 0x28
 800a14a:	687a      	ldr	r2, [r7, #4]
 800a14c:	6ad2      	ldr	r2, [r2, #44]	@ 0x2c
 800a14e:	0112      	lsls	r2, r2, #4
 800a150:	430a      	orrs	r2, r1
 800a152:	4931      	ldr	r1, [pc, #196]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a154:	4313      	orrs	r3, r2
 800a156:	628b      	str	r3, [r1, #40]	@ 0x28
 800a158:	687b      	ldr	r3, [r7, #4]
 800a15a:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a15c:	3b01      	subs	r3, #1
 800a15e:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800a162:	687b      	ldr	r3, [r7, #4]
 800a164:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800a166:	3b01      	subs	r3, #1
 800a168:	025b      	lsls	r3, r3, #9
 800a16a:	b29b      	uxth	r3, r3
 800a16c:	431a      	orrs	r2, r3
 800a16e:	687b      	ldr	r3, [r7, #4]
 800a170:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800a172:	3b01      	subs	r3, #1
 800a174:	041b      	lsls	r3, r3, #16
 800a176:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 800a17a:	431a      	orrs	r2, r3
 800a17c:	687b      	ldr	r3, [r7, #4]
 800a17e:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800a180:	3b01      	subs	r3, #1
 800a182:	061b      	lsls	r3, r3, #24
 800a184:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 800a188:	4923      	ldr	r1, [pc, #140]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a18a:	4313      	orrs	r3, r2
 800a18c:	630b      	str	r3, [r1, #48]	@ 0x30
                             RCC_OscInitStruct->PLL.PLLP,
                             RCC_OscInitStruct->PLL.PLLQ,
                             RCC_OscInitStruct->PLL.PLLR);

        /* Disable PLLFRACN . */
        __HAL_RCC_PLLFRACN_DISABLE();
 800a18e:	4b22      	ldr	r3, [pc, #136]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a190:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a192:	4a21      	ldr	r2, [pc, #132]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a194:	f023 0301 	bic.w	r3, r3, #1
 800a198:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Configure PLL PLL1FRACN */
        __HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN);
 800a19a:	4b1f      	ldr	r3, [pc, #124]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a19c:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 800a19e:	4b21      	ldr	r3, [pc, #132]	@ (800a224 <HAL_RCC_OscConfig+0x778>)
 800a1a0:	4013      	ands	r3, r2
 800a1a2:	687a      	ldr	r2, [r7, #4]
 800a1a4:	6c92      	ldr	r2, [r2, #72]	@ 0x48
 800a1a6:	00d2      	lsls	r2, r2, #3
 800a1a8:	491b      	ldr	r1, [pc, #108]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a1aa:	4313      	orrs	r3, r2
 800a1ac:	634b      	str	r3, [r1, #52]	@ 0x34

        /* Select PLL1 input reference frequency range: VCI */
        __HAL_RCC_PLL_VCIRANGE(RCC_OscInitStruct->PLL.PLLRGE) ;
 800a1ae:	4b1a      	ldr	r3, [pc, #104]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a1b0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a1b2:	f023 020c 	bic.w	r2, r3, #12
 800a1b6:	687b      	ldr	r3, [r7, #4]
 800a1b8:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800a1ba:	4917      	ldr	r1, [pc, #92]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a1bc:	4313      	orrs	r3, r2
 800a1be:	62cb      	str	r3, [r1, #44]	@ 0x2c

        /* Select PLL1 output frequency range : VCO */
        __HAL_RCC_PLL_VCORANGE(RCC_OscInitStruct->PLL.PLLVCOSEL) ;
 800a1c0:	4b15      	ldr	r3, [pc, #84]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a1c2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a1c4:	f023 0202 	bic.w	r2, r3, #2
 800a1c8:	687b      	ldr	r3, [r7, #4]
 800a1ca:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800a1cc:	4912      	ldr	r1, [pc, #72]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a1ce:	4313      	orrs	r3, r2
 800a1d0:	62cb      	str	r3, [r1, #44]	@ 0x2c

        /* Enable PLL System Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP);
 800a1d2:	4b11      	ldr	r3, [pc, #68]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a1d4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a1d6:	4a10      	ldr	r2, [pc, #64]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a1d8:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a1dc:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1Q Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800a1de:	4b0e      	ldr	r3, [pc, #56]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a1e0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a1e2:	4a0d      	ldr	r2, [pc, #52]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a1e4:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800a1e8:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1R  Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVR);
 800a1ea:	4b0b      	ldr	r3, [pc, #44]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a1ec:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a1ee:	4a0a      	ldr	r2, [pc, #40]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a1f0:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
 800a1f4:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1FRACN . */
        __HAL_RCC_PLLFRACN_ENABLE();
 800a1f6:	4b08      	ldr	r3, [pc, #32]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a1f8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a1fa:	4a07      	ldr	r2, [pc, #28]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a1fc:	f043 0301 	orr.w	r3, r3, #1
 800a200:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable the main PLL. */
        __HAL_RCC_PLL_ENABLE();
 800a202:	4b05      	ldr	r3, [pc, #20]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a204:	681b      	ldr	r3, [r3, #0]
 800a206:	4a04      	ldr	r2, [pc, #16]	@ (800a218 <HAL_RCC_OscConfig+0x76c>)
 800a208:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 800a20c:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a20e:	f7fa ff19 	bl	8005044 <HAL_GetTick>
 800a212:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 800a214:	e011      	b.n	800a23a <HAL_RCC_OscConfig+0x78e>
 800a216:	bf00      	nop
 800a218:	58024400 	.word	0x58024400
 800a21c:	58024800 	.word	0x58024800
 800a220:	fffffc0c 	.word	0xfffffc0c
 800a224:	ffff0007 	.word	0xffff0007
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 800a228:	f7fa ff0c 	bl	8005044 <HAL_GetTick>
 800a22c:	4602      	mov	r2, r0
 800a22e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a230:	1ad3      	subs	r3, r2, r3
 800a232:	2b02      	cmp	r3, #2
 800a234:	d901      	bls.n	800a23a <HAL_RCC_OscConfig+0x78e>
          {
            return HAL_TIMEOUT;
 800a236:	2303      	movs	r3, #3
 800a238:	e08a      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 800a23a:	4b47      	ldr	r3, [pc, #284]	@ (800a358 <HAL_RCC_OscConfig+0x8ac>)
 800a23c:	681b      	ldr	r3, [r3, #0]
 800a23e:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800a242:	2b00      	cmp	r3, #0
 800a244:	d0f0      	beq.n	800a228 <HAL_RCC_OscConfig+0x77c>
 800a246:	e082      	b.n	800a34e <HAL_RCC_OscConfig+0x8a2>
        }
      }
      else
      {
        /* Disable the main PLL. */
        __HAL_RCC_PLL_DISABLE();
 800a248:	4b43      	ldr	r3, [pc, #268]	@ (800a358 <HAL_RCC_OscConfig+0x8ac>)
 800a24a:	681b      	ldr	r3, [r3, #0]
 800a24c:	4a42      	ldr	r2, [pc, #264]	@ (800a358 <HAL_RCC_OscConfig+0x8ac>)
 800a24e:	f023 7380 	bic.w	r3, r3, #16777216	@ 0x1000000
 800a252:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a254:	f7fa fef6 	bl	8005044 <HAL_GetTick>
 800a258:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800a25a:	e008      	b.n	800a26e <HAL_RCC_OscConfig+0x7c2>
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 800a25c:	f7fa fef2 	bl	8005044 <HAL_GetTick>
 800a260:	4602      	mov	r2, r0
 800a262:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a264:	1ad3      	subs	r3, r2, r3
 800a266:	2b02      	cmp	r3, #2
 800a268:	d901      	bls.n	800a26e <HAL_RCC_OscConfig+0x7c2>
          {
            return HAL_TIMEOUT;
 800a26a:	2303      	movs	r3, #3
 800a26c:	e070      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800a26e:	4b3a      	ldr	r3, [pc, #232]	@ (800a358 <HAL_RCC_OscConfig+0x8ac>)
 800a270:	681b      	ldr	r3, [r3, #0]
 800a272:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800a276:	2b00      	cmp	r3, #0
 800a278:	d1f0      	bne.n	800a25c <HAL_RCC_OscConfig+0x7b0>
 800a27a:	e068      	b.n	800a34e <HAL_RCC_OscConfig+0x8a2>
      }
    }
    else
    {
      /* Do not return HAL_ERROR if request repeats the current configuration */
      temp1_pllckcfg = RCC->PLLCKSELR;
 800a27c:	4b36      	ldr	r3, [pc, #216]	@ (800a358 <HAL_RCC_OscConfig+0x8ac>)
 800a27e:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800a280:	613b      	str	r3, [r7, #16]
      temp2_pllckcfg = RCC->PLL1DIVR;
 800a282:	4b35      	ldr	r3, [pc, #212]	@ (800a358 <HAL_RCC_OscConfig+0x8ac>)
 800a284:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a286:	60fb      	str	r3, [r7, #12]
      if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
 800a288:	687b      	ldr	r3, [r7, #4]
 800a28a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800a28c:	2b01      	cmp	r3, #1
 800a28e:	d031      	beq.n	800a2f4 <HAL_RCC_OscConfig+0x848>
          (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 800a290:	693b      	ldr	r3, [r7, #16]
 800a292:	f003 0203 	and.w	r2, r3, #3
 800a296:	687b      	ldr	r3, [r7, #4]
 800a298:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
      if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
 800a29a:	429a      	cmp	r2, r3
 800a29c:	d12a      	bne.n	800a2f4 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) ||
 800a29e:	693b      	ldr	r3, [r7, #16]
 800a2a0:	091b      	lsrs	r3, r3, #4
 800a2a2:	f003 023f 	and.w	r2, r3, #63	@ 0x3f
 800a2a6:	687b      	ldr	r3, [r7, #4]
 800a2a8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
          (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 800a2aa:	429a      	cmp	r2, r3
 800a2ac:	d122      	bne.n	800a2f4 <HAL_RCC_OscConfig+0x848>
          (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) ||
 800a2ae:	68fb      	ldr	r3, [r7, #12]
 800a2b0:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800a2b4:	687b      	ldr	r3, [r7, #4]
 800a2b6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a2b8:	3b01      	subs	r3, #1
          ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) ||
 800a2ba:	429a      	cmp	r2, r3
 800a2bc:	d11a      	bne.n	800a2f4 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) ||
 800a2be:	68fb      	ldr	r3, [r7, #12]
 800a2c0:	0a5b      	lsrs	r3, r3, #9
 800a2c2:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 800a2c6:	687b      	ldr	r3, [r7, #4]
 800a2c8:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800a2ca:	3b01      	subs	r3, #1
          (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) ||
 800a2cc:	429a      	cmp	r2, r3
 800a2ce:	d111      	bne.n	800a2f4 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) ||
 800a2d0:	68fb      	ldr	r3, [r7, #12]
 800a2d2:	0c1b      	lsrs	r3, r3, #16
 800a2d4:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 800a2d8:	687b      	ldr	r3, [r7, #4]
 800a2da:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800a2dc:	3b01      	subs	r3, #1
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) ||
 800a2de:	429a      	cmp	r2, r3
 800a2e0:	d108      	bne.n	800a2f4 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_R1) >> RCC_PLL1DIVR_R1_Pos) != (RCC_OscInitStruct->PLL.PLLR - 1U)))
 800a2e2:	68fb      	ldr	r3, [r7, #12]
 800a2e4:	0e1b      	lsrs	r3, r3, #24
 800a2e6:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 800a2ea:	687b      	ldr	r3, [r7, #4]
 800a2ec:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800a2ee:	3b01      	subs	r3, #1
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) ||
 800a2f0:	429a      	cmp	r2, r3
 800a2f2:	d001      	beq.n	800a2f8 <HAL_RCC_OscConfig+0x84c>
      {
        return HAL_ERROR;
 800a2f4:	2301      	movs	r3, #1
 800a2f6:	e02b      	b.n	800a350 <HAL_RCC_OscConfig+0x8a4>
      }
      else
      {
        /* Check if only fractional part needs to be updated  */
        temp1_pllckcfg = ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> RCC_PLL1FRACR_FRACN1_Pos);
 800a2f8:	4b17      	ldr	r3, [pc, #92]	@ (800a358 <HAL_RCC_OscConfig+0x8ac>)
 800a2fa:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800a2fc:	08db      	lsrs	r3, r3, #3
 800a2fe:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800a302:	613b      	str	r3, [r7, #16]
        if (RCC_OscInitStruct->PLL.PLLFRACN != temp1_pllckcfg)
 800a304:	687b      	ldr	r3, [r7, #4]
 800a306:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800a308:	693a      	ldr	r2, [r7, #16]
 800a30a:	429a      	cmp	r2, r3
 800a30c:	d01f      	beq.n	800a34e <HAL_RCC_OscConfig+0x8a2>
        {
          assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN));
          /* Disable PLL1FRACEN */
          __HAL_RCC_PLLFRACN_DISABLE();
 800a30e:	4b12      	ldr	r3, [pc, #72]	@ (800a358 <HAL_RCC_OscConfig+0x8ac>)
 800a310:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a312:	4a11      	ldr	r2, [pc, #68]	@ (800a358 <HAL_RCC_OscConfig+0x8ac>)
 800a314:	f023 0301 	bic.w	r3, r3, #1
 800a318:	62d3      	str	r3, [r2, #44]	@ 0x2c
          /* Get Start Tick*/
          tickstart = HAL_GetTick();
 800a31a:	f7fa fe93 	bl	8005044 <HAL_GetTick>
 800a31e:	6278      	str	r0, [r7, #36]	@ 0x24
          /* Wait at least 2 CK_REF (PLL input source divided by M) period to make sure next latched value will be taken into account. */
          while ((HAL_GetTick() - tickstart) < PLL_FRAC_TIMEOUT_VALUE)
 800a320:	bf00      	nop
 800a322:	f7fa fe8f 	bl	8005044 <HAL_GetTick>
 800a326:	4602      	mov	r2, r0
 800a328:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a32a:	4293      	cmp	r3, r2
 800a32c:	d0f9      	beq.n	800a322 <HAL_RCC_OscConfig+0x876>
          {
          }
          /* Configure PLL1 PLL1FRACN */
          __HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN);
 800a32e:	4b0a      	ldr	r3, [pc, #40]	@ (800a358 <HAL_RCC_OscConfig+0x8ac>)
 800a330:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 800a332:	4b0a      	ldr	r3, [pc, #40]	@ (800a35c <HAL_RCC_OscConfig+0x8b0>)
 800a334:	4013      	ands	r3, r2
 800a336:	687a      	ldr	r2, [r7, #4]
 800a338:	6c92      	ldr	r2, [r2, #72]	@ 0x48
 800a33a:	00d2      	lsls	r2, r2, #3
 800a33c:	4906      	ldr	r1, [pc, #24]	@ (800a358 <HAL_RCC_OscConfig+0x8ac>)
 800a33e:	4313      	orrs	r3, r2
 800a340:	634b      	str	r3, [r1, #52]	@ 0x34
          /* Enable PLL1FRACEN to latch new value. */
          __HAL_RCC_PLLFRACN_ENABLE();
 800a342:	4b05      	ldr	r3, [pc, #20]	@ (800a358 <HAL_RCC_OscConfig+0x8ac>)
 800a344:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a346:	4a04      	ldr	r2, [pc, #16]	@ (800a358 <HAL_RCC_OscConfig+0x8ac>)
 800a348:	f043 0301 	orr.w	r3, r3, #1
 800a34c:	62d3      	str	r3, [r2, #44]	@ 0x2c
        }
      }
    }
  }
  return HAL_OK;
 800a34e:	2300      	movs	r3, #0
}
 800a350:	4618      	mov	r0, r3
 800a352:	3730      	adds	r7, #48	@ 0x30
 800a354:	46bd      	mov	sp, r7
 800a356:	bd80      	pop	{r7, pc}
 800a358:	58024400 	.word	0x58024400
 800a35c:	ffff0007 	.word	0xffff0007

0800a360 <HAL_RCC_ClockConfig>:
  *         D1CPRE[3:0] bits to ensure that  Domain1 core clock not exceed the maximum allowed frequency
  *         (for more details refer to section above "Initialization/de-initialization functions")
  * @retval None
  */
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
{
 800a360:	b580      	push	{r7, lr}
 800a362:	b086      	sub	sp, #24
 800a364:	af00      	add	r7, sp, #0
 800a366:	6078      	str	r0, [r7, #4]
 800a368:	6039      	str	r1, [r7, #0]
  HAL_StatusTypeDef halstatus;
  uint32_t tickstart;
  uint32_t common_system_clock;

  /* Check Null pointer */
  if (RCC_ClkInitStruct == NULL)
 800a36a:	687b      	ldr	r3, [r7, #4]
 800a36c:	2b00      	cmp	r3, #0
 800a36e:	d101      	bne.n	800a374 <HAL_RCC_ClockConfig+0x14>
  {
    return HAL_ERROR;
 800a370:	2301      	movs	r3, #1
 800a372:	e19c      	b.n	800a6ae <HAL_RCC_ClockConfig+0x34e>
  /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
    must be correctly programmed according to the frequency of the CPU clock
    (HCLK) and the supply voltage of the device. */

  /* Increasing the CPU frequency */
  if (FLatency > __HAL_FLASH_GET_LATENCY())
 800a374:	4b8a      	ldr	r3, [pc, #552]	@ (800a5a0 <HAL_RCC_ClockConfig+0x240>)
 800a376:	681b      	ldr	r3, [r3, #0]
 800a378:	f003 030f 	and.w	r3, r3, #15
 800a37c:	683a      	ldr	r2, [r7, #0]
 800a37e:	429a      	cmp	r2, r3
 800a380:	d910      	bls.n	800a3a4 <HAL_RCC_ClockConfig+0x44>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 800a382:	4b87      	ldr	r3, [pc, #540]	@ (800a5a0 <HAL_RCC_ClockConfig+0x240>)
 800a384:	681b      	ldr	r3, [r3, #0]
 800a386:	f023 020f 	bic.w	r2, r3, #15
 800a38a:	4985      	ldr	r1, [pc, #532]	@ (800a5a0 <HAL_RCC_ClockConfig+0x240>)
 800a38c:	683b      	ldr	r3, [r7, #0]
 800a38e:	4313      	orrs	r3, r2
 800a390:	600b      	str	r3, [r1, #0]

    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if (__HAL_FLASH_GET_LATENCY() != FLatency)
 800a392:	4b83      	ldr	r3, [pc, #524]	@ (800a5a0 <HAL_RCC_ClockConfig+0x240>)
 800a394:	681b      	ldr	r3, [r3, #0]
 800a396:	f003 030f 	and.w	r3, r3, #15
 800a39a:	683a      	ldr	r2, [r7, #0]
 800a39c:	429a      	cmp	r2, r3
 800a39e:	d001      	beq.n	800a3a4 <HAL_RCC_ClockConfig+0x44>
    {
      return HAL_ERROR;
 800a3a0:	2301      	movs	r3, #1
 800a3a2:	e184      	b.n	800a6ae <HAL_RCC_ClockConfig+0x34e>

  }

  /* Increasing the BUS frequency divider */
  /*-------------------------- D1PCLK1/CDPCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1)
 800a3a4:	687b      	ldr	r3, [r7, #4]
 800a3a6:	681b      	ldr	r3, [r3, #0]
 800a3a8:	f003 0304 	and.w	r3, r3, #4
 800a3ac:	2b00      	cmp	r3, #0
 800a3ae:	d010      	beq.n	800a3d2 <HAL_RCC_ClockConfig+0x72>
  {
#if defined (RCC_D1CFGR_D1PPRE)
    if ((RCC_ClkInitStruct->APB3CLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_D1PPRE))
 800a3b0:	687b      	ldr	r3, [r7, #4]
 800a3b2:	691a      	ldr	r2, [r3, #16]
 800a3b4:	4b7b      	ldr	r3, [pc, #492]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a3b6:	699b      	ldr	r3, [r3, #24]
 800a3b8:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800a3bc:	429a      	cmp	r2, r3
 800a3be:	d908      	bls.n	800a3d2 <HAL_RCC_ClockConfig+0x72>
    {
      assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider);
 800a3c0:	4b78      	ldr	r3, [pc, #480]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a3c2:	699b      	ldr	r3, [r3, #24]
 800a3c4:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800a3c8:	687b      	ldr	r3, [r7, #4]
 800a3ca:	691b      	ldr	r3, [r3, #16]
 800a3cc:	4975      	ldr	r1, [pc, #468]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a3ce:	4313      	orrs	r3, r2
 800a3d0:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*-------------------------- PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 800a3d2:	687b      	ldr	r3, [r7, #4]
 800a3d4:	681b      	ldr	r3, [r3, #0]
 800a3d6:	f003 0308 	and.w	r3, r3, #8
 800a3da:	2b00      	cmp	r3, #0
 800a3dc:	d010      	beq.n	800a400 <HAL_RCC_ClockConfig+0xa0>
  {
#if defined (RCC_D2CFGR_D2PPRE1)
    if ((RCC_ClkInitStruct->APB1CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1))
 800a3de:	687b      	ldr	r3, [r7, #4]
 800a3e0:	695a      	ldr	r2, [r3, #20]
 800a3e2:	4b70      	ldr	r3, [pc, #448]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a3e4:	69db      	ldr	r3, [r3, #28]
 800a3e6:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800a3ea:	429a      	cmp	r2, r3
 800a3ec:	d908      	bls.n	800a400 <HAL_RCC_ClockConfig+0xa0>
    {
      assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
 800a3ee:	4b6d      	ldr	r3, [pc, #436]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a3f0:	69db      	ldr	r3, [r3, #28]
 800a3f2:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800a3f6:	687b      	ldr	r3, [r7, #4]
 800a3f8:	695b      	ldr	r3, [r3, #20]
 800a3fa:	496a      	ldr	r1, [pc, #424]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a3fc:	4313      	orrs	r3, r2
 800a3fe:	61cb      	str	r3, [r1, #28]
      MODIFY_REG(RCC->CDCFGR2, RCC_CDCFGR2_CDPPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
    }
#endif
  }
  /*-------------------------- PCLK2 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 800a400:	687b      	ldr	r3, [r7, #4]
 800a402:	681b      	ldr	r3, [r3, #0]
 800a404:	f003 0310 	and.w	r3, r3, #16
 800a408:	2b00      	cmp	r3, #0
 800a40a:	d010      	beq.n	800a42e <HAL_RCC_ClockConfig+0xce>
  {
#if defined(RCC_D2CFGR_D2PPRE2)
    if ((RCC_ClkInitStruct->APB2CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2))
 800a40c:	687b      	ldr	r3, [r7, #4]
 800a40e:	699a      	ldr	r2, [r3, #24]
 800a410:	4b64      	ldr	r3, [pc, #400]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a412:	69db      	ldr	r3, [r3, #28]
 800a414:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 800a418:	429a      	cmp	r2, r3
 800a41a:	d908      	bls.n	800a42e <HAL_RCC_ClockConfig+0xce>
    {
      assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider));
 800a41c:	4b61      	ldr	r3, [pc, #388]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a41e:	69db      	ldr	r3, [r3, #28]
 800a420:	f423 62e0 	bic.w	r2, r3, #1792	@ 0x700
 800a424:	687b      	ldr	r3, [r7, #4]
 800a426:	699b      	ldr	r3, [r3, #24]
 800a428:	495e      	ldr	r1, [pc, #376]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a42a:	4313      	orrs	r3, r2
 800a42c:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- D3PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1)
 800a42e:	687b      	ldr	r3, [r7, #4]
 800a430:	681b      	ldr	r3, [r3, #0]
 800a432:	f003 0320 	and.w	r3, r3, #32
 800a436:	2b00      	cmp	r3, #0
 800a438:	d010      	beq.n	800a45c <HAL_RCC_ClockConfig+0xfc>
  {
#if defined(RCC_D3CFGR_D3PPRE)
    if ((RCC_ClkInitStruct->APB4CLKDivider) > (RCC->D3CFGR & RCC_D3CFGR_D3PPRE))
 800a43a:	687b      	ldr	r3, [r7, #4]
 800a43c:	69da      	ldr	r2, [r3, #28]
 800a43e:	4b59      	ldr	r3, [pc, #356]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a440:	6a1b      	ldr	r3, [r3, #32]
 800a442:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800a446:	429a      	cmp	r2, r3
 800a448:	d908      	bls.n	800a45c <HAL_RCC_ClockConfig+0xfc>
    {
      assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider));
      MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider));
 800a44a:	4b56      	ldr	r3, [pc, #344]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a44c:	6a1b      	ldr	r3, [r3, #32]
 800a44e:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800a452:	687b      	ldr	r3, [r7, #4]
 800a454:	69db      	ldr	r3, [r3, #28]
 800a456:	4953      	ldr	r1, [pc, #332]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a458:	4313      	orrs	r3, r2
 800a45a:	620b      	str	r3, [r1, #32]
    }
#endif
  }

  /*-------------------------- HCLK Configuration --------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 800a45c:	687b      	ldr	r3, [r7, #4]
 800a45e:	681b      	ldr	r3, [r3, #0]
 800a460:	f003 0302 	and.w	r3, r3, #2
 800a464:	2b00      	cmp	r3, #0
 800a466:	d010      	beq.n	800a48a <HAL_RCC_ClockConfig+0x12a>
  {
#if defined (RCC_D1CFGR_HPRE)
    if ((RCC_ClkInitStruct->AHBCLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_HPRE))
 800a468:	687b      	ldr	r3, [r7, #4]
 800a46a:	68da      	ldr	r2, [r3, #12]
 800a46c:	4b4d      	ldr	r3, [pc, #308]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a46e:	699b      	ldr	r3, [r3, #24]
 800a470:	f003 030f 	and.w	r3, r3, #15
 800a474:	429a      	cmp	r2, r3
 800a476:	d908      	bls.n	800a48a <HAL_RCC_ClockConfig+0x12a>
    {
      /* Set the new HCLK clock divider */
      assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 800a478:	4b4a      	ldr	r3, [pc, #296]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a47a:	699b      	ldr	r3, [r3, #24]
 800a47c:	f023 020f 	bic.w	r2, r3, #15
 800a480:	687b      	ldr	r3, [r7, #4]
 800a482:	68db      	ldr	r3, [r3, #12]
 800a484:	4947      	ldr	r1, [pc, #284]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a486:	4313      	orrs	r3, r2
 800a488:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*------------------------- SYSCLK Configuration -------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 800a48a:	687b      	ldr	r3, [r7, #4]
 800a48c:	681b      	ldr	r3, [r3, #0]
 800a48e:	f003 0301 	and.w	r3, r3, #1
 800a492:	2b00      	cmp	r3, #0
 800a494:	d055      	beq.n	800a542 <HAL_RCC_ClockConfig+0x1e2>
  {
    assert_param(IS_RCC_SYSCLK(RCC_ClkInitStruct->SYSCLKDivider));
    assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
#if defined(RCC_D1CFGR_D1CPRE)
    MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1CPRE, RCC_ClkInitStruct->SYSCLKDivider);
 800a496:	4b43      	ldr	r3, [pc, #268]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a498:	699b      	ldr	r3, [r3, #24]
 800a49a:	f423 6270 	bic.w	r2, r3, #3840	@ 0xf00
 800a49e:	687b      	ldr	r3, [r7, #4]
 800a4a0:	689b      	ldr	r3, [r3, #8]
 800a4a2:	4940      	ldr	r1, [pc, #256]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a4a4:	4313      	orrs	r3, r2
 800a4a6:	618b      	str	r3, [r1, #24]
#else
    MODIFY_REG(RCC->CDCFGR1, RCC_CDCFGR1_CDCPRE, RCC_ClkInitStruct->SYSCLKDivider);
#endif
    /* HSE is selected as System Clock Source */
    if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 800a4a8:	687b      	ldr	r3, [r7, #4]
 800a4aa:	685b      	ldr	r3, [r3, #4]
 800a4ac:	2b02      	cmp	r3, #2
 800a4ae:	d107      	bne.n	800a4c0 <HAL_RCC_ClockConfig+0x160>
    {
      /* Check the HSE ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 800a4b0:	4b3c      	ldr	r3, [pc, #240]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a4b2:	681b      	ldr	r3, [r3, #0]
 800a4b4:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800a4b8:	2b00      	cmp	r3, #0
 800a4ba:	d121      	bne.n	800a500 <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800a4bc:	2301      	movs	r3, #1
 800a4be:	e0f6      	b.n	800a6ae <HAL_RCC_ClockConfig+0x34e>
      }
    }
    /* PLL is selected as System Clock Source */
    else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 800a4c0:	687b      	ldr	r3, [r7, #4]
 800a4c2:	685b      	ldr	r3, [r3, #4]
 800a4c4:	2b03      	cmp	r3, #3
 800a4c6:	d107      	bne.n	800a4d8 <HAL_RCC_ClockConfig+0x178>
    {
      /* Check the PLL ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 800a4c8:	4b36      	ldr	r3, [pc, #216]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a4ca:	681b      	ldr	r3, [r3, #0]
 800a4cc:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800a4d0:	2b00      	cmp	r3, #0
 800a4d2:	d115      	bne.n	800a500 <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800a4d4:	2301      	movs	r3, #1
 800a4d6:	e0ea      	b.n	800a6ae <HAL_RCC_ClockConfig+0x34e>
      }
    }
    /* CSI is selected as System Clock Source */
    else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_CSI)
 800a4d8:	687b      	ldr	r3, [r7, #4]
 800a4da:	685b      	ldr	r3, [r3, #4]
 800a4dc:	2b01      	cmp	r3, #1
 800a4de:	d107      	bne.n	800a4f0 <HAL_RCC_ClockConfig+0x190>
    {
      /* Check the PLL ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 800a4e0:	4b30      	ldr	r3, [pc, #192]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a4e2:	681b      	ldr	r3, [r3, #0]
 800a4e4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800a4e8:	2b00      	cmp	r3, #0
 800a4ea:	d109      	bne.n	800a500 <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800a4ec:	2301      	movs	r3, #1
 800a4ee:	e0de      	b.n	800a6ae <HAL_RCC_ClockConfig+0x34e>
    }
    /* HSI is selected as System Clock Source */
    else
    {
      /* Check the HSI ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a4f0:	4b2c      	ldr	r3, [pc, #176]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a4f2:	681b      	ldr	r3, [r3, #0]
 800a4f4:	f003 0304 	and.w	r3, r3, #4
 800a4f8:	2b00      	cmp	r3, #0
 800a4fa:	d101      	bne.n	800a500 <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800a4fc:	2301      	movs	r3, #1
 800a4fe:	e0d6      	b.n	800a6ae <HAL_RCC_ClockConfig+0x34e>
      }
    }
    MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
 800a500:	4b28      	ldr	r3, [pc, #160]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a502:	691b      	ldr	r3, [r3, #16]
 800a504:	f023 0207 	bic.w	r2, r3, #7
 800a508:	687b      	ldr	r3, [r7, #4]
 800a50a:	685b      	ldr	r3, [r3, #4]
 800a50c:	4925      	ldr	r1, [pc, #148]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a50e:	4313      	orrs	r3, r2
 800a510:	610b      	str	r3, [r1, #16]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800a512:	f7fa fd97 	bl	8005044 <HAL_GetTick>
 800a516:	6178      	str	r0, [r7, #20]

    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 800a518:	e00a      	b.n	800a530 <HAL_RCC_ClockConfig+0x1d0>
    {
      if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 800a51a:	f7fa fd93 	bl	8005044 <HAL_GetTick>
 800a51e:	4602      	mov	r2, r0
 800a520:	697b      	ldr	r3, [r7, #20]
 800a522:	1ad3      	subs	r3, r2, r3
 800a524:	f241 3288 	movw	r2, #5000	@ 0x1388
 800a528:	4293      	cmp	r3, r2
 800a52a:	d901      	bls.n	800a530 <HAL_RCC_ClockConfig+0x1d0>
      {
        return HAL_TIMEOUT;
 800a52c:	2303      	movs	r3, #3
 800a52e:	e0be      	b.n	800a6ae <HAL_RCC_ClockConfig+0x34e>
    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 800a530:	4b1c      	ldr	r3, [pc, #112]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a532:	691b      	ldr	r3, [r3, #16]
 800a534:	f003 0238 	and.w	r2, r3, #56	@ 0x38
 800a538:	687b      	ldr	r3, [r7, #4]
 800a53a:	685b      	ldr	r3, [r3, #4]
 800a53c:	00db      	lsls	r3, r3, #3
 800a53e:	429a      	cmp	r2, r3
 800a540:	d1eb      	bne.n	800a51a <HAL_RCC_ClockConfig+0x1ba>

  }

  /* Decreasing the BUS frequency divider */
  /*-------------------------- HCLK Configuration --------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 800a542:	687b      	ldr	r3, [r7, #4]
 800a544:	681b      	ldr	r3, [r3, #0]
 800a546:	f003 0302 	and.w	r3, r3, #2
 800a54a:	2b00      	cmp	r3, #0
 800a54c:	d010      	beq.n	800a570 <HAL_RCC_ClockConfig+0x210>
  {
#if defined(RCC_D1CFGR_HPRE)
    if ((RCC_ClkInitStruct->AHBCLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_HPRE))
 800a54e:	687b      	ldr	r3, [r7, #4]
 800a550:	68da      	ldr	r2, [r3, #12]
 800a552:	4b14      	ldr	r3, [pc, #80]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a554:	699b      	ldr	r3, [r3, #24]
 800a556:	f003 030f 	and.w	r3, r3, #15
 800a55a:	429a      	cmp	r2, r3
 800a55c:	d208      	bcs.n	800a570 <HAL_RCC_ClockConfig+0x210>
    {
      /* Set the new HCLK clock divider */
      assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 800a55e:	4b11      	ldr	r3, [pc, #68]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a560:	699b      	ldr	r3, [r3, #24]
 800a562:	f023 020f 	bic.w	r2, r3, #15
 800a566:	687b      	ldr	r3, [r7, #4]
 800a568:	68db      	ldr	r3, [r3, #12]
 800a56a:	490e      	ldr	r1, [pc, #56]	@ (800a5a4 <HAL_RCC_ClockConfig+0x244>)
 800a56c:	4313      	orrs	r3, r2
 800a56e:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /* Decreasing the number of wait states because of lower CPU frequency */
  if (FLatency < __HAL_FLASH_GET_LATENCY())
 800a570:	4b0b      	ldr	r3, [pc, #44]	@ (800a5a0 <HAL_RCC_ClockConfig+0x240>)
 800a572:	681b      	ldr	r3, [r3, #0]
 800a574:	f003 030f 	and.w	r3, r3, #15
 800a578:	683a      	ldr	r2, [r7, #0]
 800a57a:	429a      	cmp	r2, r3
 800a57c:	d214      	bcs.n	800a5a8 <HAL_RCC_ClockConfig+0x248>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 800a57e:	4b08      	ldr	r3, [pc, #32]	@ (800a5a0 <HAL_RCC_ClockConfig+0x240>)
 800a580:	681b      	ldr	r3, [r3, #0]
 800a582:	f023 020f 	bic.w	r2, r3, #15
 800a586:	4906      	ldr	r1, [pc, #24]	@ (800a5a0 <HAL_RCC_ClockConfig+0x240>)
 800a588:	683b      	ldr	r3, [r7, #0]
 800a58a:	4313      	orrs	r3, r2
 800a58c:	600b      	str	r3, [r1, #0]

    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if (__HAL_FLASH_GET_LATENCY() != FLatency)
 800a58e:	4b04      	ldr	r3, [pc, #16]	@ (800a5a0 <HAL_RCC_ClockConfig+0x240>)
 800a590:	681b      	ldr	r3, [r3, #0]
 800a592:	f003 030f 	and.w	r3, r3, #15
 800a596:	683a      	ldr	r2, [r7, #0]
 800a598:	429a      	cmp	r2, r3
 800a59a:	d005      	beq.n	800a5a8 <HAL_RCC_ClockConfig+0x248>
    {
      return HAL_ERROR;
 800a59c:	2301      	movs	r3, #1
 800a59e:	e086      	b.n	800a6ae <HAL_RCC_ClockConfig+0x34e>
 800a5a0:	52002000 	.word	0x52002000
 800a5a4:	58024400 	.word	0x58024400
    }
  }

  /*-------------------------- D1PCLK1/CDPCLK Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1)
 800a5a8:	687b      	ldr	r3, [r7, #4]
 800a5aa:	681b      	ldr	r3, [r3, #0]
 800a5ac:	f003 0304 	and.w	r3, r3, #4
 800a5b0:	2b00      	cmp	r3, #0
 800a5b2:	d010      	beq.n	800a5d6 <HAL_RCC_ClockConfig+0x276>
  {
#if defined(RCC_D1CFGR_D1PPRE)
    if ((RCC_ClkInitStruct->APB3CLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_D1PPRE))
 800a5b4:	687b      	ldr	r3, [r7, #4]
 800a5b6:	691a      	ldr	r2, [r3, #16]
 800a5b8:	4b3f      	ldr	r3, [pc, #252]	@ (800a6b8 <HAL_RCC_ClockConfig+0x358>)
 800a5ba:	699b      	ldr	r3, [r3, #24]
 800a5bc:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800a5c0:	429a      	cmp	r2, r3
 800a5c2:	d208      	bcs.n	800a5d6 <HAL_RCC_ClockConfig+0x276>
    {
      assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider);
 800a5c4:	4b3c      	ldr	r3, [pc, #240]	@ (800a6b8 <HAL_RCC_ClockConfig+0x358>)
 800a5c6:	699b      	ldr	r3, [r3, #24]
 800a5c8:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800a5cc:	687b      	ldr	r3, [r7, #4]
 800a5ce:	691b      	ldr	r3, [r3, #16]
 800a5d0:	4939      	ldr	r1, [pc, #228]	@ (800a6b8 <HAL_RCC_ClockConfig+0x358>)
 800a5d2:	4313      	orrs	r3, r2
 800a5d4:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*-------------------------- PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 800a5d6:	687b      	ldr	r3, [r7, #4]
 800a5d8:	681b      	ldr	r3, [r3, #0]
 800a5da:	f003 0308 	and.w	r3, r3, #8
 800a5de:	2b00      	cmp	r3, #0
 800a5e0:	d010      	beq.n	800a604 <HAL_RCC_ClockConfig+0x2a4>
  {
#if defined(RCC_D2CFGR_D2PPRE1)
    if ((RCC_ClkInitStruct->APB1CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1))
 800a5e2:	687b      	ldr	r3, [r7, #4]
 800a5e4:	695a      	ldr	r2, [r3, #20]
 800a5e6:	4b34      	ldr	r3, [pc, #208]	@ (800a6b8 <HAL_RCC_ClockConfig+0x358>)
 800a5e8:	69db      	ldr	r3, [r3, #28]
 800a5ea:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800a5ee:	429a      	cmp	r2, r3
 800a5f0:	d208      	bcs.n	800a604 <HAL_RCC_ClockConfig+0x2a4>
    {
      assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
 800a5f2:	4b31      	ldr	r3, [pc, #196]	@ (800a6b8 <HAL_RCC_ClockConfig+0x358>)
 800a5f4:	69db      	ldr	r3, [r3, #28]
 800a5f6:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800a5fa:	687b      	ldr	r3, [r7, #4]
 800a5fc:	695b      	ldr	r3, [r3, #20]
 800a5fe:	492e      	ldr	r1, [pc, #184]	@ (800a6b8 <HAL_RCC_ClockConfig+0x358>)
 800a600:	4313      	orrs	r3, r2
 800a602:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- PCLK2 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 800a604:	687b      	ldr	r3, [r7, #4]
 800a606:	681b      	ldr	r3, [r3, #0]
 800a608:	f003 0310 	and.w	r3, r3, #16
 800a60c:	2b00      	cmp	r3, #0
 800a60e:	d010      	beq.n	800a632 <HAL_RCC_ClockConfig+0x2d2>
  {
#if defined (RCC_D2CFGR_D2PPRE2)
    if ((RCC_ClkInitStruct->APB2CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2))
 800a610:	687b      	ldr	r3, [r7, #4]
 800a612:	699a      	ldr	r2, [r3, #24]
 800a614:	4b28      	ldr	r3, [pc, #160]	@ (800a6b8 <HAL_RCC_ClockConfig+0x358>)
 800a616:	69db      	ldr	r3, [r3, #28]
 800a618:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 800a61c:	429a      	cmp	r2, r3
 800a61e:	d208      	bcs.n	800a632 <HAL_RCC_ClockConfig+0x2d2>
    {
      assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider));
 800a620:	4b25      	ldr	r3, [pc, #148]	@ (800a6b8 <HAL_RCC_ClockConfig+0x358>)
 800a622:	69db      	ldr	r3, [r3, #28]
 800a624:	f423 62e0 	bic.w	r2, r3, #1792	@ 0x700
 800a628:	687b      	ldr	r3, [r7, #4]
 800a62a:	699b      	ldr	r3, [r3, #24]
 800a62c:	4922      	ldr	r1, [pc, #136]	@ (800a6b8 <HAL_RCC_ClockConfig+0x358>)
 800a62e:	4313      	orrs	r3, r2
 800a630:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- D3PCLK1/SRDPCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1)
 800a632:	687b      	ldr	r3, [r7, #4]
 800a634:	681b      	ldr	r3, [r3, #0]
 800a636:	f003 0320 	and.w	r3, r3, #32
 800a63a:	2b00      	cmp	r3, #0
 800a63c:	d010      	beq.n	800a660 <HAL_RCC_ClockConfig+0x300>
  {
#if defined(RCC_D3CFGR_D3PPRE)
    if ((RCC_ClkInitStruct->APB4CLKDivider) < (RCC->D3CFGR & RCC_D3CFGR_D3PPRE))
 800a63e:	687b      	ldr	r3, [r7, #4]
 800a640:	69da      	ldr	r2, [r3, #28]
 800a642:	4b1d      	ldr	r3, [pc, #116]	@ (800a6b8 <HAL_RCC_ClockConfig+0x358>)
 800a644:	6a1b      	ldr	r3, [r3, #32]
 800a646:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800a64a:	429a      	cmp	r2, r3
 800a64c:	d208      	bcs.n	800a660 <HAL_RCC_ClockConfig+0x300>
    {
      assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider));
      MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider));
 800a64e:	4b1a      	ldr	r3, [pc, #104]	@ (800a6b8 <HAL_RCC_ClockConfig+0x358>)
 800a650:	6a1b      	ldr	r3, [r3, #32]
 800a652:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800a656:	687b      	ldr	r3, [r7, #4]
 800a658:	69db      	ldr	r3, [r3, #28]
 800a65a:	4917      	ldr	r1, [pc, #92]	@ (800a6b8 <HAL_RCC_ClockConfig+0x358>)
 800a65c:	4313      	orrs	r3, r2
 800a65e:	620b      	str	r3, [r1, #32]
#endif
  }

  /* Update the SystemCoreClock global variable */
#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU);
 800a660:	f000 f834 	bl	800a6cc <HAL_RCC_GetSysClockFreq>
 800a664:	4602      	mov	r2, r0
 800a666:	4b14      	ldr	r3, [pc, #80]	@ (800a6b8 <HAL_RCC_ClockConfig+0x358>)
 800a668:	699b      	ldr	r3, [r3, #24]
 800a66a:	0a1b      	lsrs	r3, r3, #8
 800a66c:	f003 030f 	and.w	r3, r3, #15
 800a670:	4912      	ldr	r1, [pc, #72]	@ (800a6bc <HAL_RCC_ClockConfig+0x35c>)
 800a672:	5ccb      	ldrb	r3, [r1, r3]
 800a674:	f003 031f 	and.w	r3, r3, #31
 800a678:	fa22 f303 	lsr.w	r3, r2, r3
 800a67c:	613b      	str	r3, [r7, #16]
#else
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU);
#endif

#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 800a67e:	4b0e      	ldr	r3, [pc, #56]	@ (800a6b8 <HAL_RCC_ClockConfig+0x358>)
 800a680:	699b      	ldr	r3, [r3, #24]
 800a682:	f003 030f 	and.w	r3, r3, #15
 800a686:	4a0d      	ldr	r2, [pc, #52]	@ (800a6bc <HAL_RCC_ClockConfig+0x35c>)
 800a688:	5cd3      	ldrb	r3, [r2, r3]
 800a68a:	f003 031f 	and.w	r3, r3, #31
 800a68e:	693a      	ldr	r2, [r7, #16]
 800a690:	fa22 f303 	lsr.w	r3, r2, r3
 800a694:	4a0a      	ldr	r2, [pc, #40]	@ (800a6c0 <HAL_RCC_ClockConfig+0x360>)
 800a696:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 800a698:	4a0a      	ldr	r2, [pc, #40]	@ (800a6c4 <HAL_RCC_ClockConfig+0x364>)
 800a69a:	693b      	ldr	r3, [r7, #16]
 800a69c:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  /* Configure the source of time base considering new system clocks settings*/
  halstatus = HAL_InitTick(uwTickPrio);
 800a69e:	4b0a      	ldr	r3, [pc, #40]	@ (800a6c8 <HAL_RCC_ClockConfig+0x368>)
 800a6a0:	681b      	ldr	r3, [r3, #0]
 800a6a2:	4618      	mov	r0, r3
 800a6a4:	f7f9 f920 	bl	80038e8 <HAL_InitTick>
 800a6a8:	4603      	mov	r3, r0
 800a6aa:	73fb      	strb	r3, [r7, #15]

  return halstatus;
 800a6ac:	7bfb      	ldrb	r3, [r7, #15]
}
 800a6ae:	4618      	mov	r0, r3
 800a6b0:	3718      	adds	r7, #24
 800a6b2:	46bd      	mov	sp, r7
 800a6b4:	bd80      	pop	{r7, pc}
 800a6b6:	bf00      	nop
 800a6b8:	58024400 	.word	0x58024400
 800a6bc:	08030a7c 	.word	0x08030a7c
 800a6c0:	24000010 	.word	0x24000010
 800a6c4:	2400000c 	.word	0x2400000c
 800a6c8:	2400002c 	.word	0x2400002c

0800a6cc <HAL_RCC_GetSysClockFreq>:
  *
  *
  * @retval SYSCLK frequency
  */
uint32_t HAL_RCC_GetSysClockFreq(void)
{
 800a6cc:	b480      	push	{r7}
 800a6ce:	b089      	sub	sp, #36	@ 0x24
 800a6d0:	af00      	add	r7, sp, #0
  float_t fracn1, pllvco;
  uint32_t sysclockfreq;

  /* Get SYSCLK source -------------------------------------------------------*/

  switch (RCC->CFGR & RCC_CFGR_SWS)
 800a6d2:	4bb3      	ldr	r3, [pc, #716]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a6d4:	691b      	ldr	r3, [r3, #16]
 800a6d6:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800a6da:	2b18      	cmp	r3, #24
 800a6dc:	f200 8155 	bhi.w	800a98a <HAL_RCC_GetSysClockFreq+0x2be>
 800a6e0:	a201      	add	r2, pc, #4	@ (adr r2, 800a6e8 <HAL_RCC_GetSysClockFreq+0x1c>)
 800a6e2:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800a6e6:	bf00      	nop
 800a6e8:	0800a74d 	.word	0x0800a74d
 800a6ec:	0800a98b 	.word	0x0800a98b
 800a6f0:	0800a98b 	.word	0x0800a98b
 800a6f4:	0800a98b 	.word	0x0800a98b
 800a6f8:	0800a98b 	.word	0x0800a98b
 800a6fc:	0800a98b 	.word	0x0800a98b
 800a700:	0800a98b 	.word	0x0800a98b
 800a704:	0800a98b 	.word	0x0800a98b
 800a708:	0800a773 	.word	0x0800a773
 800a70c:	0800a98b 	.word	0x0800a98b
 800a710:	0800a98b 	.word	0x0800a98b
 800a714:	0800a98b 	.word	0x0800a98b
 800a718:	0800a98b 	.word	0x0800a98b
 800a71c:	0800a98b 	.word	0x0800a98b
 800a720:	0800a98b 	.word	0x0800a98b
 800a724:	0800a98b 	.word	0x0800a98b
 800a728:	0800a779 	.word	0x0800a779
 800a72c:	0800a98b 	.word	0x0800a98b
 800a730:	0800a98b 	.word	0x0800a98b
 800a734:	0800a98b 	.word	0x0800a98b
 800a738:	0800a98b 	.word	0x0800a98b
 800a73c:	0800a98b 	.word	0x0800a98b
 800a740:	0800a98b 	.word	0x0800a98b
 800a744:	0800a98b 	.word	0x0800a98b
 800a748:	0800a77f 	.word	0x0800a77f
  {
    case RCC_CFGR_SWS_HSI:  /* HSI used as system clock source */

      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800a74c:	4b94      	ldr	r3, [pc, #592]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a74e:	681b      	ldr	r3, [r3, #0]
 800a750:	f003 0320 	and.w	r3, r3, #32
 800a754:	2b00      	cmp	r3, #0
 800a756:	d009      	beq.n	800a76c <HAL_RCC_GetSysClockFreq+0xa0>
      {
        sysclockfreq = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800a758:	4b91      	ldr	r3, [pc, #580]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a75a:	681b      	ldr	r3, [r3, #0]
 800a75c:	08db      	lsrs	r3, r3, #3
 800a75e:	f003 0303 	and.w	r3, r3, #3
 800a762:	4a90      	ldr	r2, [pc, #576]	@ (800a9a4 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800a764:	fa22 f303 	lsr.w	r3, r2, r3
 800a768:	61bb      	str	r3, [r7, #24]
      else
      {
        sysclockfreq = (uint32_t) HSI_VALUE;
      }

      break;
 800a76a:	e111      	b.n	800a990 <HAL_RCC_GetSysClockFreq+0x2c4>
        sysclockfreq = (uint32_t) HSI_VALUE;
 800a76c:	4b8d      	ldr	r3, [pc, #564]	@ (800a9a4 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800a76e:	61bb      	str	r3, [r7, #24]
      break;
 800a770:	e10e      	b.n	800a990 <HAL_RCC_GetSysClockFreq+0x2c4>

    case RCC_CFGR_SWS_CSI:  /* CSI used as system clock  source */
      sysclockfreq = CSI_VALUE;
 800a772:	4b8d      	ldr	r3, [pc, #564]	@ (800a9a8 <HAL_RCC_GetSysClockFreq+0x2dc>)
 800a774:	61bb      	str	r3, [r7, #24]
      break;
 800a776:	e10b      	b.n	800a990 <HAL_RCC_GetSysClockFreq+0x2c4>

    case RCC_CFGR_SWS_HSE:  /* HSE used as system clock  source */
      sysclockfreq = HSE_VALUE;
 800a778:	4b8c      	ldr	r3, [pc, #560]	@ (800a9ac <HAL_RCC_GetSysClockFreq+0x2e0>)
 800a77a:	61bb      	str	r3, [r7, #24]
      break;
 800a77c:	e108      	b.n	800a990 <HAL_RCC_GetSysClockFreq+0x2c4>
    case RCC_CFGR_SWS_PLL1:  /* PLL1 used as system clock  source */

      /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
      SYSCLK = PLL_VCO / PLLR
      */
      pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800a77e:	4b88      	ldr	r3, [pc, #544]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a780:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800a782:	f003 0303 	and.w	r3, r3, #3
 800a786:	617b      	str	r3, [r7, #20]
      pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> 4)  ;
 800a788:	4b85      	ldr	r3, [pc, #532]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a78a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800a78c:	091b      	lsrs	r3, r3, #4
 800a78e:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800a792:	613b      	str	r3, [r7, #16]
      pllfracen = ((RCC-> PLLCFGR & RCC_PLLCFGR_PLL1FRACEN) >> RCC_PLLCFGR_PLL1FRACEN_Pos);
 800a794:	4b82      	ldr	r3, [pc, #520]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a796:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a798:	f003 0301 	and.w	r3, r3, #1
 800a79c:	60fb      	str	r3, [r7, #12]
      fracn1 = (float_t)(uint32_t)(pllfracen * ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> 3));
 800a79e:	4b80      	ldr	r3, [pc, #512]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a7a0:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800a7a2:	08db      	lsrs	r3, r3, #3
 800a7a4:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800a7a8:	68fa      	ldr	r2, [r7, #12]
 800a7aa:	fb02 f303 	mul.w	r3, r2, r3
 800a7ae:	ee07 3a90 	vmov	s15, r3
 800a7b2:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800a7b6:	edc7 7a02 	vstr	s15, [r7, #8]

      if (pllm != 0U)
 800a7ba:	693b      	ldr	r3, [r7, #16]
 800a7bc:	2b00      	cmp	r3, #0
 800a7be:	f000 80e1 	beq.w	800a984 <HAL_RCC_GetSysClockFreq+0x2b8>
 800a7c2:	697b      	ldr	r3, [r7, #20]
 800a7c4:	2b02      	cmp	r3, #2
 800a7c6:	f000 8083 	beq.w	800a8d0 <HAL_RCC_GetSysClockFreq+0x204>
 800a7ca:	697b      	ldr	r3, [r7, #20]
 800a7cc:	2b02      	cmp	r3, #2
 800a7ce:	f200 80a1 	bhi.w	800a914 <HAL_RCC_GetSysClockFreq+0x248>
 800a7d2:	697b      	ldr	r3, [r7, #20]
 800a7d4:	2b00      	cmp	r3, #0
 800a7d6:	d003      	beq.n	800a7e0 <HAL_RCC_GetSysClockFreq+0x114>
 800a7d8:	697b      	ldr	r3, [r7, #20]
 800a7da:	2b01      	cmp	r3, #1
 800a7dc:	d056      	beq.n	800a88c <HAL_RCC_GetSysClockFreq+0x1c0>
 800a7de:	e099      	b.n	800a914 <HAL_RCC_GetSysClockFreq+0x248>
      {
        switch (pllsource)
        {
          case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

            if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800a7e0:	4b6f      	ldr	r3, [pc, #444]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a7e2:	681b      	ldr	r3, [r3, #0]
 800a7e4:	f003 0320 	and.w	r3, r3, #32
 800a7e8:	2b00      	cmp	r3, #0
 800a7ea:	d02d      	beq.n	800a848 <HAL_RCC_GetSysClockFreq+0x17c>
            {
              hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800a7ec:	4b6c      	ldr	r3, [pc, #432]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a7ee:	681b      	ldr	r3, [r3, #0]
 800a7f0:	08db      	lsrs	r3, r3, #3
 800a7f2:	f003 0303 	and.w	r3, r3, #3
 800a7f6:	4a6b      	ldr	r2, [pc, #428]	@ (800a9a4 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800a7f8:	fa22 f303 	lsr.w	r3, r2, r3
 800a7fc:	607b      	str	r3, [r7, #4]
              pllvco = ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800a7fe:	687b      	ldr	r3, [r7, #4]
 800a800:	ee07 3a90 	vmov	s15, r3
 800a804:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800a808:	693b      	ldr	r3, [r7, #16]
 800a80a:	ee07 3a90 	vmov	s15, r3
 800a80e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800a812:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800a816:	4b62      	ldr	r3, [pc, #392]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a818:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a81a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800a81e:	ee07 3a90 	vmov	s15, r3
 800a822:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800a826:	ed97 6a02 	vldr	s12, [r7, #8]
 800a82a:	eddf 5a61 	vldr	s11, [pc, #388]	@ 800a9b0 <HAL_RCC_GetSysClockFreq+0x2e4>
 800a82e:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800a832:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800a836:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800a83a:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800a83e:	ee67 7a27 	vmul.f32	s15, s14, s15
 800a842:	edc7 7a07 	vstr	s15, [r7, #28]
            }
            else
            {
              pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
            }
            break;
 800a846:	e087      	b.n	800a958 <HAL_RCC_GetSysClockFreq+0x28c>
              pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800a848:	693b      	ldr	r3, [r7, #16]
 800a84a:	ee07 3a90 	vmov	s15, r3
 800a84e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800a852:	eddf 6a58 	vldr	s13, [pc, #352]	@ 800a9b4 <HAL_RCC_GetSysClockFreq+0x2e8>
 800a856:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800a85a:	4b51      	ldr	r3, [pc, #324]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a85c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a85e:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800a862:	ee07 3a90 	vmov	s15, r3
 800a866:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800a86a:	ed97 6a02 	vldr	s12, [r7, #8]
 800a86e:	eddf 5a50 	vldr	s11, [pc, #320]	@ 800a9b0 <HAL_RCC_GetSysClockFreq+0x2e4>
 800a872:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800a876:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800a87a:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800a87e:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800a882:	ee67 7a27 	vmul.f32	s15, s14, s15
 800a886:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800a88a:	e065      	b.n	800a958 <HAL_RCC_GetSysClockFreq+0x28c>

          case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
            pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800a88c:	693b      	ldr	r3, [r7, #16]
 800a88e:	ee07 3a90 	vmov	s15, r3
 800a892:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800a896:	eddf 6a48 	vldr	s13, [pc, #288]	@ 800a9b8 <HAL_RCC_GetSysClockFreq+0x2ec>
 800a89a:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800a89e:	4b40      	ldr	r3, [pc, #256]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a8a0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a8a2:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800a8a6:	ee07 3a90 	vmov	s15, r3
 800a8aa:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800a8ae:	ed97 6a02 	vldr	s12, [r7, #8]
 800a8b2:	eddf 5a3f 	vldr	s11, [pc, #252]	@ 800a9b0 <HAL_RCC_GetSysClockFreq+0x2e4>
 800a8b6:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800a8ba:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800a8be:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800a8c2:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800a8c6:	ee67 7a27 	vmul.f32	s15, s14, s15
 800a8ca:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800a8ce:	e043      	b.n	800a958 <HAL_RCC_GetSysClockFreq+0x28c>

          case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
            pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800a8d0:	693b      	ldr	r3, [r7, #16]
 800a8d2:	ee07 3a90 	vmov	s15, r3
 800a8d6:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800a8da:	eddf 6a38 	vldr	s13, [pc, #224]	@ 800a9bc <HAL_RCC_GetSysClockFreq+0x2f0>
 800a8de:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800a8e2:	4b2f      	ldr	r3, [pc, #188]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a8e4:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a8e6:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800a8ea:	ee07 3a90 	vmov	s15, r3
 800a8ee:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800a8f2:	ed97 6a02 	vldr	s12, [r7, #8]
 800a8f6:	eddf 5a2e 	vldr	s11, [pc, #184]	@ 800a9b0 <HAL_RCC_GetSysClockFreq+0x2e4>
 800a8fa:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800a8fe:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800a902:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800a906:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800a90a:	ee67 7a27 	vmul.f32	s15, s14, s15
 800a90e:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800a912:	e021      	b.n	800a958 <HAL_RCC_GetSysClockFreq+0x28c>

          default:
            pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800a914:	693b      	ldr	r3, [r7, #16]
 800a916:	ee07 3a90 	vmov	s15, r3
 800a91a:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800a91e:	eddf 6a26 	vldr	s13, [pc, #152]	@ 800a9b8 <HAL_RCC_GetSysClockFreq+0x2ec>
 800a922:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800a926:	4b1e      	ldr	r3, [pc, #120]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a928:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a92a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800a92e:	ee07 3a90 	vmov	s15, r3
 800a932:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800a936:	ed97 6a02 	vldr	s12, [r7, #8]
 800a93a:	eddf 5a1d 	vldr	s11, [pc, #116]	@ 800a9b0 <HAL_RCC_GetSysClockFreq+0x2e4>
 800a93e:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800a942:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800a946:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800a94a:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800a94e:	ee67 7a27 	vmul.f32	s15, s14, s15
 800a952:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800a956:	bf00      	nop
        }
        pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >> 9) + 1U) ;
 800a958:	4b11      	ldr	r3, [pc, #68]	@ (800a9a0 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a95a:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a95c:	0a5b      	lsrs	r3, r3, #9
 800a95e:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800a962:	3301      	adds	r3, #1
 800a964:	603b      	str	r3, [r7, #0]
        sysclockfreq = (uint32_t)(float_t)(pllvco / (float_t)pllp);
 800a966:	683b      	ldr	r3, [r7, #0]
 800a968:	ee07 3a90 	vmov	s15, r3
 800a96c:	eeb8 7a67 	vcvt.f32.u32	s14, s15
 800a970:	edd7 6a07 	vldr	s13, [r7, #28]
 800a974:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800a978:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800a97c:	ee17 3a90 	vmov	r3, s15
 800a980:	61bb      	str	r3, [r7, #24]
      }
      else
      {
        sysclockfreq = 0U;
      }
      break;
 800a982:	e005      	b.n	800a990 <HAL_RCC_GetSysClockFreq+0x2c4>
        sysclockfreq = 0U;
 800a984:	2300      	movs	r3, #0
 800a986:	61bb      	str	r3, [r7, #24]
      break;
 800a988:	e002      	b.n	800a990 <HAL_RCC_GetSysClockFreq+0x2c4>

    default:
      sysclockfreq = CSI_VALUE;
 800a98a:	4b07      	ldr	r3, [pc, #28]	@ (800a9a8 <HAL_RCC_GetSysClockFreq+0x2dc>)
 800a98c:	61bb      	str	r3, [r7, #24]
      break;
 800a98e:	bf00      	nop
  }

  return sysclockfreq;
 800a990:	69bb      	ldr	r3, [r7, #24]
}
 800a992:	4618      	mov	r0, r3
 800a994:	3724      	adds	r7, #36	@ 0x24
 800a996:	46bd      	mov	sp, r7
 800a998:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a99c:	4770      	bx	lr
 800a99e:	bf00      	nop
 800a9a0:	58024400 	.word	0x58024400
 800a9a4:	03d09000 	.word	0x03d09000
 800a9a8:	003d0900 	.word	0x003d0900
 800a9ac:	017d7840 	.word	0x017d7840
 800a9b0:	46000000 	.word	0x46000000
 800a9b4:	4c742400 	.word	0x4c742400
 800a9b8:	4a742400 	.word	0x4a742400
 800a9bc:	4bbebc20 	.word	0x4bbebc20

0800a9c0 <HAL_RCC_GetHCLKFreq>:
  * @note   The SystemD2Clock CMSIS variable is used to store System domain2 Clock Frequency
  *         and updated within this function
  * @retval HCLK frequency
  */
uint32_t HAL_RCC_GetHCLKFreq(void)
{
 800a9c0:	b580      	push	{r7, lr}
 800a9c2:	b082      	sub	sp, #8
 800a9c4:	af00      	add	r7, sp, #0
  uint32_t common_system_clock;

#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos] & 0x1FU);
 800a9c6:	f7ff fe81 	bl	800a6cc <HAL_RCC_GetSysClockFreq>
 800a9ca:	4602      	mov	r2, r0
 800a9cc:	4b10      	ldr	r3, [pc, #64]	@ (800aa10 <HAL_RCC_GetHCLKFreq+0x50>)
 800a9ce:	699b      	ldr	r3, [r3, #24]
 800a9d0:	0a1b      	lsrs	r3, r3, #8
 800a9d2:	f003 030f 	and.w	r3, r3, #15
 800a9d6:	490f      	ldr	r1, [pc, #60]	@ (800aa14 <HAL_RCC_GetHCLKFreq+0x54>)
 800a9d8:	5ccb      	ldrb	r3, [r1, r3]
 800a9da:	f003 031f 	and.w	r3, r3, #31
 800a9de:	fa22 f303 	lsr.w	r3, r2, r3
 800a9e2:	607b      	str	r3, [r7, #4]
#else
  common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos] & 0x1FU);
#endif

#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 800a9e4:	4b0a      	ldr	r3, [pc, #40]	@ (800aa10 <HAL_RCC_GetHCLKFreq+0x50>)
 800a9e6:	699b      	ldr	r3, [r3, #24]
 800a9e8:	f003 030f 	and.w	r3, r3, #15
 800a9ec:	4a09      	ldr	r2, [pc, #36]	@ (800aa14 <HAL_RCC_GetHCLKFreq+0x54>)
 800a9ee:	5cd3      	ldrb	r3, [r2, r3]
 800a9f0:	f003 031f 	and.w	r3, r3, #31
 800a9f4:	687a      	ldr	r2, [r7, #4]
 800a9f6:	fa22 f303 	lsr.w	r3, r2, r3
 800a9fa:	4a07      	ldr	r2, [pc, #28]	@ (800aa18 <HAL_RCC_GetHCLKFreq+0x58>)
 800a9fc:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 800a9fe:	4a07      	ldr	r2, [pc, #28]	@ (800aa1c <HAL_RCC_GetHCLKFreq+0x5c>)
 800aa00:	687b      	ldr	r3, [r7, #4]
 800aa02:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  return SystemD2Clock;
 800aa04:	4b04      	ldr	r3, [pc, #16]	@ (800aa18 <HAL_RCC_GetHCLKFreq+0x58>)
 800aa06:	681b      	ldr	r3, [r3, #0]
}
 800aa08:	4618      	mov	r0, r3
 800aa0a:	3708      	adds	r7, #8
 800aa0c:	46bd      	mov	sp, r7
 800aa0e:	bd80      	pop	{r7, pc}
 800aa10:	58024400 	.word	0x58024400
 800aa14:	08030a7c 	.word	0x08030a7c
 800aa18:	24000010 	.word	0x24000010
 800aa1c:	2400000c 	.word	0x2400000c

0800aa20 <HAL_RCC_GetPCLK1Freq>:
  * @note   Each time PCLK1 changes, this function must be called to update the
  *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval PCLK1 frequency
  */
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
 800aa20:	b580      	push	{r7, lr}
 800aa22:	af00      	add	r7, sp, #0
#if defined (RCC_D2CFGR_D2PPRE1)
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1) >> RCC_D2CFGR_D2PPRE1_Pos]) & 0x1FU));
 800aa24:	f7ff ffcc 	bl	800a9c0 <HAL_RCC_GetHCLKFreq>
 800aa28:	4602      	mov	r2, r0
 800aa2a:	4b06      	ldr	r3, [pc, #24]	@ (800aa44 <HAL_RCC_GetPCLK1Freq+0x24>)
 800aa2c:	69db      	ldr	r3, [r3, #28]
 800aa2e:	091b      	lsrs	r3, r3, #4
 800aa30:	f003 0307 	and.w	r3, r3, #7
 800aa34:	4904      	ldr	r1, [pc, #16]	@ (800aa48 <HAL_RCC_GetPCLK1Freq+0x28>)
 800aa36:	5ccb      	ldrb	r3, [r1, r3]
 800aa38:	f003 031f 	and.w	r3, r3, #31
 800aa3c:	fa22 f303 	lsr.w	r3, r2, r3
#else
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE1) >> RCC_CDCFGR2_CDPPRE1_Pos]) & 0x1FU));
#endif
}
 800aa40:	4618      	mov	r0, r3
 800aa42:	bd80      	pop	{r7, pc}
 800aa44:	58024400 	.word	0x58024400
 800aa48:	08030a7c 	.word	0x08030a7c

0800aa4c <HAL_RCC_GetPCLK2Freq>:
  * @note   Each time PCLK2 changes, this function must be called to update the
  *         right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval PCLK1 frequency
  */
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
 800aa4c:	b580      	push	{r7, lr}
 800aa4e:	af00      	add	r7, sp, #0
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
#if defined(RCC_D2CFGR_D2PPRE2)
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2) >> RCC_D2CFGR_D2PPRE2_Pos]) & 0x1FU));
 800aa50:	f7ff ffb6 	bl	800a9c0 <HAL_RCC_GetHCLKFreq>
 800aa54:	4602      	mov	r2, r0
 800aa56:	4b06      	ldr	r3, [pc, #24]	@ (800aa70 <HAL_RCC_GetPCLK2Freq+0x24>)
 800aa58:	69db      	ldr	r3, [r3, #28]
 800aa5a:	0a1b      	lsrs	r3, r3, #8
 800aa5c:	f003 0307 	and.w	r3, r3, #7
 800aa60:	4904      	ldr	r1, [pc, #16]	@ (800aa74 <HAL_RCC_GetPCLK2Freq+0x28>)
 800aa62:	5ccb      	ldrb	r3, [r1, r3]
 800aa64:	f003 031f 	and.w	r3, r3, #31
 800aa68:	fa22 f303 	lsr.w	r3, r2, r3
#else
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE2) >> RCC_CDCFGR2_CDPPRE2_Pos]) & 0x1FU));
#endif
}
 800aa6c:	4618      	mov	r0, r3
 800aa6e:	bd80      	pop	{r7, pc}
 800aa70:	58024400 	.word	0x58024400
 800aa74:	08030a7c 	.word	0x08030a7c

0800aa78 <HAL_RCC_GetClockConfig>:
  * will be configured.
  * @param  pFLatency: Pointer on the Flash Latency.
  * @retval None
  */
void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
{
 800aa78:	b480      	push	{r7}
 800aa7a:	b083      	sub	sp, #12
 800aa7c:	af00      	add	r7, sp, #0
 800aa7e:	6078      	str	r0, [r7, #4]
 800aa80:	6039      	str	r1, [r7, #0]
  /* Set all possible values for the Clock type parameter --------------------*/
  RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 |
 800aa82:	687b      	ldr	r3, [r7, #4]
 800aa84:	223f      	movs	r2, #63	@ 0x3f
 800aa86:	601a      	str	r2, [r3, #0]
                                 RCC_CLOCKTYPE_PCLK2 |  RCC_CLOCKTYPE_D3PCLK1  ;

  /* Get the SYSCLK configuration --------------------------------------------*/
  RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
 800aa88:	4b1a      	ldr	r3, [pc, #104]	@ (800aaf4 <HAL_RCC_GetClockConfig+0x7c>)
 800aa8a:	691b      	ldr	r3, [r3, #16]
 800aa8c:	f003 0207 	and.w	r2, r3, #7
 800aa90:	687b      	ldr	r3, [r7, #4]
 800aa92:	605a      	str	r2, [r3, #4]

#if defined(RCC_D1CFGR_D1CPRE)
  /* Get the SYSCLK configuration ----------------------------------------------*/
  RCC_ClkInitStruct->SYSCLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_D1CPRE);
 800aa94:	4b17      	ldr	r3, [pc, #92]	@ (800aaf4 <HAL_RCC_GetClockConfig+0x7c>)
 800aa96:	699b      	ldr	r3, [r3, #24]
 800aa98:	f403 6270 	and.w	r2, r3, #3840	@ 0xf00
 800aa9c:	687b      	ldr	r3, [r7, #4]
 800aa9e:	609a      	str	r2, [r3, #8]

  /* Get the D1HCLK configuration ----------------------------------------------*/
  RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_HPRE);
 800aaa0:	4b14      	ldr	r3, [pc, #80]	@ (800aaf4 <HAL_RCC_GetClockConfig+0x7c>)
 800aaa2:	699b      	ldr	r3, [r3, #24]
 800aaa4:	f003 020f 	and.w	r2, r3, #15
 800aaa8:	687b      	ldr	r3, [r7, #4]
 800aaaa:	60da      	str	r2, [r3, #12]

  /* Get the APB3 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB3CLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_D1PPRE);
 800aaac:	4b11      	ldr	r3, [pc, #68]	@ (800aaf4 <HAL_RCC_GetClockConfig+0x7c>)
 800aaae:	699b      	ldr	r3, [r3, #24]
 800aab0:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800aab4:	687b      	ldr	r3, [r7, #4]
 800aab6:	611a      	str	r2, [r3, #16]

  /* Get the APB1 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1);
 800aab8:	4b0e      	ldr	r3, [pc, #56]	@ (800aaf4 <HAL_RCC_GetClockConfig+0x7c>)
 800aaba:	69db      	ldr	r3, [r3, #28]
 800aabc:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800aac0:	687b      	ldr	r3, [r7, #4]
 800aac2:	615a      	str	r2, [r3, #20]

  /* Get the APB2 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2);
 800aac4:	4b0b      	ldr	r3, [pc, #44]	@ (800aaf4 <HAL_RCC_GetClockConfig+0x7c>)
 800aac6:	69db      	ldr	r3, [r3, #28]
 800aac8:	f403 62e0 	and.w	r2, r3, #1792	@ 0x700
 800aacc:	687b      	ldr	r3, [r7, #4]
 800aace:	619a      	str	r2, [r3, #24]

  /* Get the APB4 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB4CLKDivider = (uint32_t)(RCC->D3CFGR & RCC_D3CFGR_D3PPRE);
 800aad0:	4b08      	ldr	r3, [pc, #32]	@ (800aaf4 <HAL_RCC_GetClockConfig+0x7c>)
 800aad2:	6a1b      	ldr	r3, [r3, #32]
 800aad4:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800aad8:	687b      	ldr	r3, [r7, #4]
 800aada:	61da      	str	r2, [r3, #28]
  /* Get the APB4 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB4CLKDivider = (uint32_t)(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE);
#endif

  /* Get the Flash Wait State (Latency) configuration ------------------------*/
  *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
 800aadc:	4b06      	ldr	r3, [pc, #24]	@ (800aaf8 <HAL_RCC_GetClockConfig+0x80>)
 800aade:	681b      	ldr	r3, [r3, #0]
 800aae0:	f003 020f 	and.w	r2, r3, #15
 800aae4:	683b      	ldr	r3, [r7, #0]
 800aae6:	601a      	str	r2, [r3, #0]
}
 800aae8:	bf00      	nop
 800aaea:	370c      	adds	r7, #12
 800aaec:	46bd      	mov	sp, r7
 800aaee:	f85d 7b04 	ldr.w	r7, [sp], #4
 800aaf2:	4770      	bx	lr
 800aaf4:	58024400 	.word	0x58024400
 800aaf8:	52002000 	.word	0x52002000

0800aafc <HAL_RCCEx_PeriphCLKConfig>:
  * (*) : Available on some STM32H7 lines only.
  *
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
{
 800aafc:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
 800ab00:	b0c8      	sub	sp, #288	@ 0x120
 800ab02:	af00      	add	r7, sp, #0
 800ab04:	f8c7 010c 	str.w	r0, [r7, #268]	@ 0x10c
  uint32_t tmpreg;
  uint32_t tickstart;
  HAL_StatusTypeDef ret = HAL_OK;      /* Intermediate status */
 800ab08:	2300      	movs	r3, #0
 800ab0a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
  HAL_StatusTypeDef status = HAL_OK;   /* Final status */
 800ab0e:	2300      	movs	r3, #0
 800ab10:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e

  /*---------------------------- SPDIFRX configuration -------------------------------*/

  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
 800ab14:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ab18:	e9d3 2300 	ldrd	r2, r3, [r3]
 800ab1c:	f002 6400 	and.w	r4, r2, #134217728	@ 0x8000000
 800ab20:	2500      	movs	r5, #0
 800ab22:	ea54 0305 	orrs.w	r3, r4, r5
 800ab26:	d049      	beq.n	800abbc <HAL_RCCEx_PeriphCLKConfig+0xc0>
  {

    switch (PeriphClkInit->SpdifrxClockSelection)
 800ab28:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ab2c:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 800ab2e:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800ab32:	d02f      	beq.n	800ab94 <HAL_RCCEx_PeriphCLKConfig+0x98>
 800ab34:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800ab38:	d828      	bhi.n	800ab8c <HAL_RCCEx_PeriphCLKConfig+0x90>
 800ab3a:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800ab3e:	d01a      	beq.n	800ab76 <HAL_RCCEx_PeriphCLKConfig+0x7a>
 800ab40:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800ab44:	d822      	bhi.n	800ab8c <HAL_RCCEx_PeriphCLKConfig+0x90>
 800ab46:	2b00      	cmp	r3, #0
 800ab48:	d003      	beq.n	800ab52 <HAL_RCCEx_PeriphCLKConfig+0x56>
 800ab4a:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800ab4e:	d007      	beq.n	800ab60 <HAL_RCCEx_PeriphCLKConfig+0x64>
 800ab50:	e01c      	b.n	800ab8c <HAL_RCCEx_PeriphCLKConfig+0x90>
    {
      case RCC_SPDIFRXCLKSOURCE_PLL:      /* PLL is used as clock source for SPDIFRX*/
        /* Enable PLL1Q Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800ab52:	4bb8      	ldr	r3, [pc, #736]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800ab54:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ab56:	4ab7      	ldr	r2, [pc, #732]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800ab58:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800ab5c:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800ab5e:	e01a      	b.n	800ab96 <HAL_RCCEx_PeriphCLKConfig+0x9a>

      case RCC_SPDIFRXCLKSOURCE_PLL2: /* PLL2 is used as clock source for SPDIFRX*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800ab60:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ab64:	3308      	adds	r3, #8
 800ab66:	2102      	movs	r1, #2
 800ab68:	4618      	mov	r0, r3
 800ab6a:	f001 fc73 	bl	800c454 <RCCEx_PLL2_Config>
 800ab6e:	4603      	mov	r3, r0
 800ab70:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800ab74:	e00f      	b.n	800ab96 <HAL_RCCEx_PeriphCLKConfig+0x9a>

      case RCC_SPDIFRXCLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPDIFRX*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800ab76:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ab7a:	3328      	adds	r3, #40	@ 0x28
 800ab7c:	2102      	movs	r1, #2
 800ab7e:	4618      	mov	r0, r3
 800ab80:	f001 fd1a 	bl	800c5b8 <RCCEx_PLL3_Config>
 800ab84:	4603      	mov	r3, r0
 800ab86:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800ab8a:	e004      	b.n	800ab96 <HAL_RCCEx_PeriphCLKConfig+0x9a>
        /* Internal OSC clock is used as source of SPDIFRX clock*/
        /* SPDIFRX clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800ab8c:	2301      	movs	r3, #1
 800ab8e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800ab92:	e000      	b.n	800ab96 <HAL_RCCEx_PeriphCLKConfig+0x9a>
        break;
 800ab94:	bf00      	nop
    }

    if (ret == HAL_OK)
 800ab96:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ab9a:	2b00      	cmp	r3, #0
 800ab9c:	d10a      	bne.n	800abb4 <HAL_RCCEx_PeriphCLKConfig+0xb8>
    {
      /* Set the source of SPDIFRX clock*/
      __HAL_RCC_SPDIFRX_CONFIG(PeriphClkInit->SpdifrxClockSelection);
 800ab9e:	4ba5      	ldr	r3, [pc, #660]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800aba0:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800aba2:	f423 1140 	bic.w	r1, r3, #3145728	@ 0x300000
 800aba6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800abaa:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 800abac:	4aa1      	ldr	r2, [pc, #644]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800abae:	430b      	orrs	r3, r1
 800abb0:	6513      	str	r3, [r2, #80]	@ 0x50
 800abb2:	e003      	b.n	800abbc <HAL_RCCEx_PeriphCLKConfig+0xc0>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800abb4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800abb8:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SAI1 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1)
 800abbc:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800abc0:	e9d3 2300 	ldrd	r2, r3, [r3]
 800abc4:	f402 7880 	and.w	r8, r2, #256	@ 0x100
 800abc8:	f04f 0900 	mov.w	r9, #0
 800abcc:	ea58 0309 	orrs.w	r3, r8, r9
 800abd0:	d047      	beq.n	800ac62 <HAL_RCCEx_PeriphCLKConfig+0x166>
  {
    switch (PeriphClkInit->Sai1ClockSelection)
 800abd2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800abd6:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800abd8:	2b04      	cmp	r3, #4
 800abda:	d82a      	bhi.n	800ac32 <HAL_RCCEx_PeriphCLKConfig+0x136>
 800abdc:	a201      	add	r2, pc, #4	@ (adr r2, 800abe4 <HAL_RCCEx_PeriphCLKConfig+0xe8>)
 800abde:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800abe2:	bf00      	nop
 800abe4:	0800abf9 	.word	0x0800abf9
 800abe8:	0800ac07 	.word	0x0800ac07
 800abec:	0800ac1d 	.word	0x0800ac1d
 800abf0:	0800ac3b 	.word	0x0800ac3b
 800abf4:	0800ac3b 	.word	0x0800ac3b
    {
      case RCC_SAI1CLKSOURCE_PLL:      /* PLL is used as clock source for SAI1*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800abf8:	4b8e      	ldr	r3, [pc, #568]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800abfa:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800abfc:	4a8d      	ldr	r2, [pc, #564]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800abfe:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800ac02:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800ac04:	e01a      	b.n	800ac3c <HAL_RCCEx_PeriphCLKConfig+0x140>

      case RCC_SAI1CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI1*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800ac06:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ac0a:	3308      	adds	r3, #8
 800ac0c:	2100      	movs	r1, #0
 800ac0e:	4618      	mov	r0, r3
 800ac10:	f001 fc20 	bl	800c454 <RCCEx_PLL2_Config>
 800ac14:	4603      	mov	r3, r0
 800ac16:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800ac1a:	e00f      	b.n	800ac3c <HAL_RCCEx_PeriphCLKConfig+0x140>

      case RCC_SAI1CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI1*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800ac1c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ac20:	3328      	adds	r3, #40	@ 0x28
 800ac22:	2100      	movs	r1, #0
 800ac24:	4618      	mov	r0, r3
 800ac26:	f001 fcc7 	bl	800c5b8 <RCCEx_PLL3_Config>
 800ac2a:	4603      	mov	r3, r0
 800ac2c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800ac30:	e004      	b.n	800ac3c <HAL_RCCEx_PeriphCLKConfig+0x140>
        /* HSI, HSE, or CSI oscillator is used as source of SAI1 clock */
        /* SAI1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800ac32:	2301      	movs	r3, #1
 800ac34:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800ac38:	e000      	b.n	800ac3c <HAL_RCCEx_PeriphCLKConfig+0x140>
        break;
 800ac3a:	bf00      	nop
    }

    if (ret == HAL_OK)
 800ac3c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ac40:	2b00      	cmp	r3, #0
 800ac42:	d10a      	bne.n	800ac5a <HAL_RCCEx_PeriphCLKConfig+0x15e>
    {
      /* Set the source of SAI1 clock*/
      __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
 800ac44:	4b7b      	ldr	r3, [pc, #492]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800ac46:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800ac48:	f023 0107 	bic.w	r1, r3, #7
 800ac4c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ac50:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800ac52:	4a78      	ldr	r2, [pc, #480]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800ac54:	430b      	orrs	r3, r1
 800ac56:	6513      	str	r3, [r2, #80]	@ 0x50
 800ac58:	e003      	b.n	800ac62 <HAL_RCCEx_PeriphCLKConfig+0x166>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800ac5a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ac5e:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

#if defined(SAI3)
  /*---------------------------- SAI2/3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI23) == RCC_PERIPHCLK_SAI23)
 800ac62:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ac66:	e9d3 2300 	ldrd	r2, r3, [r3]
 800ac6a:	f402 7a00 	and.w	sl, r2, #512	@ 0x200
 800ac6e:	f04f 0b00 	mov.w	fp, #0
 800ac72:	ea5a 030b 	orrs.w	r3, sl, fp
 800ac76:	d04c      	beq.n	800ad12 <HAL_RCCEx_PeriphCLKConfig+0x216>
  {
    switch (PeriphClkInit->Sai23ClockSelection)
 800ac78:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ac7c:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800ac7e:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800ac82:	d030      	beq.n	800ace6 <HAL_RCCEx_PeriphCLKConfig+0x1ea>
 800ac84:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800ac88:	d829      	bhi.n	800acde <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800ac8a:	2bc0      	cmp	r3, #192	@ 0xc0
 800ac8c:	d02d      	beq.n	800acea <HAL_RCCEx_PeriphCLKConfig+0x1ee>
 800ac8e:	2bc0      	cmp	r3, #192	@ 0xc0
 800ac90:	d825      	bhi.n	800acde <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800ac92:	2b80      	cmp	r3, #128	@ 0x80
 800ac94:	d018      	beq.n	800acc8 <HAL_RCCEx_PeriphCLKConfig+0x1cc>
 800ac96:	2b80      	cmp	r3, #128	@ 0x80
 800ac98:	d821      	bhi.n	800acde <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800ac9a:	2b00      	cmp	r3, #0
 800ac9c:	d002      	beq.n	800aca4 <HAL_RCCEx_PeriphCLKConfig+0x1a8>
 800ac9e:	2b40      	cmp	r3, #64	@ 0x40
 800aca0:	d007      	beq.n	800acb2 <HAL_RCCEx_PeriphCLKConfig+0x1b6>
 800aca2:	e01c      	b.n	800acde <HAL_RCCEx_PeriphCLKConfig+0x1e2>
    {
      case RCC_SAI23CLKSOURCE_PLL:      /* PLL is used as clock source for SAI2/3 */
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800aca4:	4b63      	ldr	r3, [pc, #396]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800aca6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800aca8:	4a62      	ldr	r2, [pc, #392]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800acaa:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800acae:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800acb0:	e01c      	b.n	800acec <HAL_RCCEx_PeriphCLKConfig+0x1f0>

      case RCC_SAI23CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2/3 */

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800acb2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800acb6:	3308      	adds	r3, #8
 800acb8:	2100      	movs	r1, #0
 800acba:	4618      	mov	r0, r3
 800acbc:	f001 fbca 	bl	800c454 <RCCEx_PLL2_Config>
 800acc0:	4603      	mov	r3, r0
 800acc2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800acc6:	e011      	b.n	800acec <HAL_RCCEx_PeriphCLKConfig+0x1f0>

      case RCC_SAI23CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2/3 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800acc8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800accc:	3328      	adds	r3, #40	@ 0x28
 800acce:	2100      	movs	r1, #0
 800acd0:	4618      	mov	r0, r3
 800acd2:	f001 fc71 	bl	800c5b8 <RCCEx_PLL3_Config>
 800acd6:	4603      	mov	r3, r0
 800acd8:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800acdc:	e006      	b.n	800acec <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        /* HSI, HSE, or CSI oscillator is used as source of SAI2/3 clock */
        /* SAI2/3 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800acde:	2301      	movs	r3, #1
 800ace0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800ace4:	e002      	b.n	800acec <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        break;
 800ace6:	bf00      	nop
 800ace8:	e000      	b.n	800acec <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        break;
 800acea:	bf00      	nop
    }

    if (ret == HAL_OK)
 800acec:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800acf0:	2b00      	cmp	r3, #0
 800acf2:	d10a      	bne.n	800ad0a <HAL_RCCEx_PeriphCLKConfig+0x20e>
    {
      /* Set the source of SAI2/3 clock*/
      __HAL_RCC_SAI23_CONFIG(PeriphClkInit->Sai23ClockSelection);
 800acf4:	4b4f      	ldr	r3, [pc, #316]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800acf6:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800acf8:	f423 71e0 	bic.w	r1, r3, #448	@ 0x1c0
 800acfc:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ad00:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800ad02:	4a4c      	ldr	r2, [pc, #304]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800ad04:	430b      	orrs	r3, r1
 800ad06:	6513      	str	r3, [r2, #80]	@ 0x50
 800ad08:	e003      	b.n	800ad12 <HAL_RCCEx_PeriphCLKConfig+0x216>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800ad0a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ad0e:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif  /*SAI2B*/

#if defined(SAI4)
  /*---------------------------- SAI4A configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4A) == RCC_PERIPHCLK_SAI4A)
 800ad12:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ad16:	e9d3 2300 	ldrd	r2, r3, [r3]
 800ad1a:	f402 6380 	and.w	r3, r2, #1024	@ 0x400
 800ad1e:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
 800ad22:	2300      	movs	r3, #0
 800ad24:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
 800ad28:	e9d7 1240 	ldrd	r1, r2, [r7, #256]	@ 0x100
 800ad2c:	460b      	mov	r3, r1
 800ad2e:	4313      	orrs	r3, r2
 800ad30:	d053      	beq.n	800adda <HAL_RCCEx_PeriphCLKConfig+0x2de>
  {
    switch (PeriphClkInit->Sai4AClockSelection)
 800ad32:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ad36:	f8d3 30a8 	ldr.w	r3, [r3, #168]	@ 0xa8
 800ad3a:	f5b3 0f00 	cmp.w	r3, #8388608	@ 0x800000
 800ad3e:	d035      	beq.n	800adac <HAL_RCCEx_PeriphCLKConfig+0x2b0>
 800ad40:	f5b3 0f00 	cmp.w	r3, #8388608	@ 0x800000
 800ad44:	d82e      	bhi.n	800ada4 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800ad46:	f5b3 0fc0 	cmp.w	r3, #6291456	@ 0x600000
 800ad4a:	d031      	beq.n	800adb0 <HAL_RCCEx_PeriphCLKConfig+0x2b4>
 800ad4c:	f5b3 0fc0 	cmp.w	r3, #6291456	@ 0x600000
 800ad50:	d828      	bhi.n	800ada4 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800ad52:	f5b3 0f80 	cmp.w	r3, #4194304	@ 0x400000
 800ad56:	d01a      	beq.n	800ad8e <HAL_RCCEx_PeriphCLKConfig+0x292>
 800ad58:	f5b3 0f80 	cmp.w	r3, #4194304	@ 0x400000
 800ad5c:	d822      	bhi.n	800ada4 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800ad5e:	2b00      	cmp	r3, #0
 800ad60:	d003      	beq.n	800ad6a <HAL_RCCEx_PeriphCLKConfig+0x26e>
 800ad62:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800ad66:	d007      	beq.n	800ad78 <HAL_RCCEx_PeriphCLKConfig+0x27c>
 800ad68:	e01c      	b.n	800ada4 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
    {
      case RCC_SAI4ACLKSOURCE_PLL:      /* PLL is used as clock source for SAI2*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800ad6a:	4b32      	ldr	r3, [pc, #200]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800ad6c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ad6e:	4a31      	ldr	r2, [pc, #196]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800ad70:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800ad74:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800ad76:	e01c      	b.n	800adb2 <HAL_RCCEx_PeriphCLKConfig+0x2b6>

      case RCC_SAI4ACLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800ad78:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ad7c:	3308      	adds	r3, #8
 800ad7e:	2100      	movs	r1, #0
 800ad80:	4618      	mov	r0, r3
 800ad82:	f001 fb67 	bl	800c454 <RCCEx_PLL2_Config>
 800ad86:	4603      	mov	r3, r0
 800ad88:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2 clock source configuration done later after clock selection check */
        break;
 800ad8c:	e011      	b.n	800adb2 <HAL_RCCEx_PeriphCLKConfig+0x2b6>

      case RCC_SAI4ACLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800ad8e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ad92:	3328      	adds	r3, #40	@ 0x28
 800ad94:	2100      	movs	r1, #0
 800ad96:	4618      	mov	r0, r3
 800ad98:	f001 fc0e 	bl	800c5b8 <RCCEx_PLL3_Config>
 800ad9c:	4603      	mov	r3, r0
 800ad9e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800ada2:	e006      	b.n	800adb2 <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        /* SAI4A clock source configuration done later after clock selection check */
        break;
#endif /* RCC_VER_3_0 */

      default:
        ret = HAL_ERROR;
 800ada4:	2301      	movs	r3, #1
 800ada6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800adaa:	e002      	b.n	800adb2 <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        break;
 800adac:	bf00      	nop
 800adae:	e000      	b.n	800adb2 <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        break;
 800adb0:	bf00      	nop
    }

    if (ret == HAL_OK)
 800adb2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800adb6:	2b00      	cmp	r3, #0
 800adb8:	d10b      	bne.n	800add2 <HAL_RCCEx_PeriphCLKConfig+0x2d6>
    {
      /* Set the source of SAI4A clock*/
      __HAL_RCC_SAI4A_CONFIG(PeriphClkInit->Sai4AClockSelection);
 800adba:	4b1e      	ldr	r3, [pc, #120]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800adbc:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800adbe:	f423 0160 	bic.w	r1, r3, #14680064	@ 0xe00000
 800adc2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800adc6:	f8d3 30a8 	ldr.w	r3, [r3, #168]	@ 0xa8
 800adca:	4a1a      	ldr	r2, [pc, #104]	@ (800ae34 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800adcc:	430b      	orrs	r3, r1
 800adce:	6593      	str	r3, [r2, #88]	@ 0x58
 800add0:	e003      	b.n	800adda <HAL_RCCEx_PeriphCLKConfig+0x2de>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800add2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800add6:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  /*---------------------------- SAI4B configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4B) == RCC_PERIPHCLK_SAI4B)
 800adda:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800adde:	e9d3 2300 	ldrd	r2, r3, [r3]
 800ade2:	f402 6300 	and.w	r3, r2, #2048	@ 0x800
 800ade6:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
 800adea:	2300      	movs	r3, #0
 800adec:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
 800adf0:	e9d7 123e 	ldrd	r1, r2, [r7, #248]	@ 0xf8
 800adf4:	460b      	mov	r3, r1
 800adf6:	4313      	orrs	r3, r2
 800adf8:	d056      	beq.n	800aea8 <HAL_RCCEx_PeriphCLKConfig+0x3ac>
  {
    switch (PeriphClkInit->Sai4BClockSelection)
 800adfa:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800adfe:	f8d3 30ac 	ldr.w	r3, [r3, #172]	@ 0xac
 800ae02:	f1b3 6f80 	cmp.w	r3, #67108864	@ 0x4000000
 800ae06:	d038      	beq.n	800ae7a <HAL_RCCEx_PeriphCLKConfig+0x37e>
 800ae08:	f1b3 6f80 	cmp.w	r3, #67108864	@ 0x4000000
 800ae0c:	d831      	bhi.n	800ae72 <HAL_RCCEx_PeriphCLKConfig+0x376>
 800ae0e:	f1b3 7f40 	cmp.w	r3, #50331648	@ 0x3000000
 800ae12:	d034      	beq.n	800ae7e <HAL_RCCEx_PeriphCLKConfig+0x382>
 800ae14:	f1b3 7f40 	cmp.w	r3, #50331648	@ 0x3000000
 800ae18:	d82b      	bhi.n	800ae72 <HAL_RCCEx_PeriphCLKConfig+0x376>
 800ae1a:	f1b3 7f00 	cmp.w	r3, #33554432	@ 0x2000000
 800ae1e:	d01d      	beq.n	800ae5c <HAL_RCCEx_PeriphCLKConfig+0x360>
 800ae20:	f1b3 7f00 	cmp.w	r3, #33554432	@ 0x2000000
 800ae24:	d825      	bhi.n	800ae72 <HAL_RCCEx_PeriphCLKConfig+0x376>
 800ae26:	2b00      	cmp	r3, #0
 800ae28:	d006      	beq.n	800ae38 <HAL_RCCEx_PeriphCLKConfig+0x33c>
 800ae2a:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 800ae2e:	d00a      	beq.n	800ae46 <HAL_RCCEx_PeriphCLKConfig+0x34a>
 800ae30:	e01f      	b.n	800ae72 <HAL_RCCEx_PeriphCLKConfig+0x376>
 800ae32:	bf00      	nop
 800ae34:	58024400 	.word	0x58024400
    {
      case RCC_SAI4BCLKSOURCE_PLL:      /* PLL is used as clock source for SAI2*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800ae38:	4ba2      	ldr	r3, [pc, #648]	@ (800b0c4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800ae3a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ae3c:	4aa1      	ldr	r2, [pc, #644]	@ (800b0c4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800ae3e:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800ae42:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800ae44:	e01c      	b.n	800ae80 <HAL_RCCEx_PeriphCLKConfig+0x384>

      case RCC_SAI4BCLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800ae46:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ae4a:	3308      	adds	r3, #8
 800ae4c:	2100      	movs	r1, #0
 800ae4e:	4618      	mov	r0, r3
 800ae50:	f001 fb00 	bl	800c454 <RCCEx_PLL2_Config>
 800ae54:	4603      	mov	r3, r0
 800ae56:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2 clock source configuration done later after clock selection check */
        break;
 800ae5a:	e011      	b.n	800ae80 <HAL_RCCEx_PeriphCLKConfig+0x384>

      case RCC_SAI4BCLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800ae5c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ae60:	3328      	adds	r3, #40	@ 0x28
 800ae62:	2100      	movs	r1, #0
 800ae64:	4618      	mov	r0, r3
 800ae66:	f001 fba7 	bl	800c5b8 <RCCEx_PLL3_Config>
 800ae6a:	4603      	mov	r3, r0
 800ae6c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800ae70:	e006      	b.n	800ae80 <HAL_RCCEx_PeriphCLKConfig+0x384>
        /* SAI4B clock source configuration done later after clock selection check */
        break;
#endif /* RCC_VER_3_0 */

      default:
        ret = HAL_ERROR;
 800ae72:	2301      	movs	r3, #1
 800ae74:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800ae78:	e002      	b.n	800ae80 <HAL_RCCEx_PeriphCLKConfig+0x384>
        break;
 800ae7a:	bf00      	nop
 800ae7c:	e000      	b.n	800ae80 <HAL_RCCEx_PeriphCLKConfig+0x384>
        break;
 800ae7e:	bf00      	nop
    }

    if (ret == HAL_OK)
 800ae80:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ae84:	2b00      	cmp	r3, #0
 800ae86:	d10b      	bne.n	800aea0 <HAL_RCCEx_PeriphCLKConfig+0x3a4>
    {
      /* Set the source of SAI4B clock*/
      __HAL_RCC_SAI4B_CONFIG(PeriphClkInit->Sai4BClockSelection);
 800ae88:	4b8e      	ldr	r3, [pc, #568]	@ (800b0c4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800ae8a:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800ae8c:	f023 61e0 	bic.w	r1, r3, #117440512	@ 0x7000000
 800ae90:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ae94:	f8d3 30ac 	ldr.w	r3, [r3, #172]	@ 0xac
 800ae98:	4a8a      	ldr	r2, [pc, #552]	@ (800b0c4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800ae9a:	430b      	orrs	r3, r1
 800ae9c:	6593      	str	r3, [r2, #88]	@ 0x58
 800ae9e:	e003      	b.n	800aea8 <HAL_RCCEx_PeriphCLKConfig+0x3ac>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800aea0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800aea4:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif  /*SAI4*/

#if defined(QUADSPI)
  /*---------------------------- QSPI configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_QSPI) == RCC_PERIPHCLK_QSPI)
 800aea8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800aeac:	e9d3 2300 	ldrd	r2, r3, [r3]
 800aeb0:	f002 7300 	and.w	r3, r2, #33554432	@ 0x2000000
 800aeb4:	f8c7 30f0 	str.w	r3, [r7, #240]	@ 0xf0
 800aeb8:	2300      	movs	r3, #0
 800aeba:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
 800aebe:	e9d7 123c 	ldrd	r1, r2, [r7, #240]	@ 0xf0
 800aec2:	460b      	mov	r3, r1
 800aec4:	4313      	orrs	r3, r2
 800aec6:	d03a      	beq.n	800af3e <HAL_RCCEx_PeriphCLKConfig+0x442>
  {
    switch (PeriphClkInit->QspiClockSelection)
 800aec8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800aecc:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800aece:	2b30      	cmp	r3, #48	@ 0x30
 800aed0:	d01f      	beq.n	800af12 <HAL_RCCEx_PeriphCLKConfig+0x416>
 800aed2:	2b30      	cmp	r3, #48	@ 0x30
 800aed4:	d819      	bhi.n	800af0a <HAL_RCCEx_PeriphCLKConfig+0x40e>
 800aed6:	2b20      	cmp	r3, #32
 800aed8:	d00c      	beq.n	800aef4 <HAL_RCCEx_PeriphCLKConfig+0x3f8>
 800aeda:	2b20      	cmp	r3, #32
 800aedc:	d815      	bhi.n	800af0a <HAL_RCCEx_PeriphCLKConfig+0x40e>
 800aede:	2b00      	cmp	r3, #0
 800aee0:	d019      	beq.n	800af16 <HAL_RCCEx_PeriphCLKConfig+0x41a>
 800aee2:	2b10      	cmp	r3, #16
 800aee4:	d111      	bne.n	800af0a <HAL_RCCEx_PeriphCLKConfig+0x40e>
    {
      case RCC_QSPICLKSOURCE_PLL:      /* PLL is used as clock source for QSPI*/
        /* Enable QSPI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800aee6:	4b77      	ldr	r3, [pc, #476]	@ (800b0c4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800aee8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800aeea:	4a76      	ldr	r2, [pc, #472]	@ (800b0c4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800aeec:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800aef0:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* QSPI clock source configuration done later after clock selection check */
        break;
 800aef2:	e011      	b.n	800af18 <HAL_RCCEx_PeriphCLKConfig+0x41c>

      case RCC_QSPICLKSOURCE_PLL2: /* PLL2 is used as clock source for QSPI*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800aef4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800aef8:	3308      	adds	r3, #8
 800aefa:	2102      	movs	r1, #2
 800aefc:	4618      	mov	r0, r3
 800aefe:	f001 faa9 	bl	800c454 <RCCEx_PLL2_Config>
 800af02:	4603      	mov	r3, r0
 800af04:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* QSPI clock source configuration done later after clock selection check */
        break;
 800af08:	e006      	b.n	800af18 <HAL_RCCEx_PeriphCLKConfig+0x41c>
      case RCC_QSPICLKSOURCE_D1HCLK:
        /* Domain1 HCLK  clock selected as QSPI kernel peripheral clock */
        break;

      default:
        ret = HAL_ERROR;
 800af0a:	2301      	movs	r3, #1
 800af0c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800af10:	e002      	b.n	800af18 <HAL_RCCEx_PeriphCLKConfig+0x41c>
        break;
 800af12:	bf00      	nop
 800af14:	e000      	b.n	800af18 <HAL_RCCEx_PeriphCLKConfig+0x41c>
        break;
 800af16:	bf00      	nop
    }

    if (ret == HAL_OK)
 800af18:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800af1c:	2b00      	cmp	r3, #0
 800af1e:	d10a      	bne.n	800af36 <HAL_RCCEx_PeriphCLKConfig+0x43a>
    {
      /* Set the source of QSPI clock*/
      __HAL_RCC_QSPI_CONFIG(PeriphClkInit->QspiClockSelection);
 800af20:	4b68      	ldr	r3, [pc, #416]	@ (800b0c4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800af22:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800af24:	f023 0130 	bic.w	r1, r3, #48	@ 0x30
 800af28:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800af2c:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800af2e:	4a65      	ldr	r2, [pc, #404]	@ (800b0c4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800af30:	430b      	orrs	r3, r1
 800af32:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800af34:	e003      	b.n	800af3e <HAL_RCCEx_PeriphCLKConfig+0x442>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800af36:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800af3a:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif  /*OCTOSPI*/

  /*---------------------------- SPI1/2/3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI123) == RCC_PERIPHCLK_SPI123)
 800af3e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800af42:	e9d3 2300 	ldrd	r2, r3, [r3]
 800af46:	f402 5380 	and.w	r3, r2, #4096	@ 0x1000
 800af4a:	f8c7 30e8 	str.w	r3, [r7, #232]	@ 0xe8
 800af4e:	2300      	movs	r3, #0
 800af50:	f8c7 30ec 	str.w	r3, [r7, #236]	@ 0xec
 800af54:	e9d7 123a 	ldrd	r1, r2, [r7, #232]	@ 0xe8
 800af58:	460b      	mov	r3, r1
 800af5a:	4313      	orrs	r3, r2
 800af5c:	d051      	beq.n	800b002 <HAL_RCCEx_PeriphCLKConfig+0x506>
  {
    switch (PeriphClkInit->Spi123ClockSelection)
 800af5e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800af62:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 800af64:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800af68:	d035      	beq.n	800afd6 <HAL_RCCEx_PeriphCLKConfig+0x4da>
 800af6a:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800af6e:	d82e      	bhi.n	800afce <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800af70:	f5b3 5f40 	cmp.w	r3, #12288	@ 0x3000
 800af74:	d031      	beq.n	800afda <HAL_RCCEx_PeriphCLKConfig+0x4de>
 800af76:	f5b3 5f40 	cmp.w	r3, #12288	@ 0x3000
 800af7a:	d828      	bhi.n	800afce <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800af7c:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800af80:	d01a      	beq.n	800afb8 <HAL_RCCEx_PeriphCLKConfig+0x4bc>
 800af82:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800af86:	d822      	bhi.n	800afce <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800af88:	2b00      	cmp	r3, #0
 800af8a:	d003      	beq.n	800af94 <HAL_RCCEx_PeriphCLKConfig+0x498>
 800af8c:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800af90:	d007      	beq.n	800afa2 <HAL_RCCEx_PeriphCLKConfig+0x4a6>
 800af92:	e01c      	b.n	800afce <HAL_RCCEx_PeriphCLKConfig+0x4d2>
    {
      case RCC_SPI123CLKSOURCE_PLL:      /* PLL is used as clock source for SPI1/2/3 */
        /* Enable SPI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800af94:	4b4b      	ldr	r3, [pc, #300]	@ (800b0c4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800af96:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800af98:	4a4a      	ldr	r2, [pc, #296]	@ (800b0c4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800af9a:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800af9e:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800afa0:	e01c      	b.n	800afdc <HAL_RCCEx_PeriphCLKConfig+0x4e0>

      case RCC_SPI123CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI1/2/3 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800afa2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800afa6:	3308      	adds	r3, #8
 800afa8:	2100      	movs	r1, #0
 800afaa:	4618      	mov	r0, r3
 800afac:	f001 fa52 	bl	800c454 <RCCEx_PLL2_Config>
 800afb0:	4603      	mov	r3, r0
 800afb2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800afb6:	e011      	b.n	800afdc <HAL_RCCEx_PeriphCLKConfig+0x4e0>

      case RCC_SPI123CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI1/2/3 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800afb8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800afbc:	3328      	adds	r3, #40	@ 0x28
 800afbe:	2100      	movs	r1, #0
 800afc0:	4618      	mov	r0, r3
 800afc2:	f001 faf9 	bl	800c5b8 <RCCEx_PLL3_Config>
 800afc6:	4603      	mov	r3, r0
 800afc8:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800afcc:	e006      	b.n	800afdc <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        /* HSI, HSE, or CSI oscillator is used as source of SPI1/2/3 clock */
        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800afce:	2301      	movs	r3, #1
 800afd0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800afd4:	e002      	b.n	800afdc <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        break;
 800afd6:	bf00      	nop
 800afd8:	e000      	b.n	800afdc <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        break;
 800afda:	bf00      	nop
    }

    if (ret == HAL_OK)
 800afdc:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800afe0:	2b00      	cmp	r3, #0
 800afe2:	d10a      	bne.n	800affa <HAL_RCCEx_PeriphCLKConfig+0x4fe>
    {
      /* Set the source of SPI1/2/3 clock*/
      __HAL_RCC_SPI123_CONFIG(PeriphClkInit->Spi123ClockSelection);
 800afe4:	4b37      	ldr	r3, [pc, #220]	@ (800b0c4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800afe6:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800afe8:	f423 41e0 	bic.w	r1, r3, #28672	@ 0x7000
 800afec:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800aff0:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 800aff2:	4a34      	ldr	r2, [pc, #208]	@ (800b0c4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800aff4:	430b      	orrs	r3, r1
 800aff6:	6513      	str	r3, [r2, #80]	@ 0x50
 800aff8:	e003      	b.n	800b002 <HAL_RCCEx_PeriphCLKConfig+0x506>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800affa:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800affe:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SPI4/5 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI45) == RCC_PERIPHCLK_SPI45)
 800b002:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b006:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b00a:	f402 5300 	and.w	r3, r2, #8192	@ 0x2000
 800b00e:	f8c7 30e0 	str.w	r3, [r7, #224]	@ 0xe0
 800b012:	2300      	movs	r3, #0
 800b014:	f8c7 30e4 	str.w	r3, [r7, #228]	@ 0xe4
 800b018:	e9d7 1238 	ldrd	r1, r2, [r7, #224]	@ 0xe0
 800b01c:	460b      	mov	r3, r1
 800b01e:	4313      	orrs	r3, r2
 800b020:	d056      	beq.n	800b0d0 <HAL_RCCEx_PeriphCLKConfig+0x5d4>
  {
    switch (PeriphClkInit->Spi45ClockSelection)
 800b022:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b026:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800b028:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 800b02c:	d033      	beq.n	800b096 <HAL_RCCEx_PeriphCLKConfig+0x59a>
 800b02e:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 800b032:	d82c      	bhi.n	800b08e <HAL_RCCEx_PeriphCLKConfig+0x592>
 800b034:	f5b3 2f80 	cmp.w	r3, #262144	@ 0x40000
 800b038:	d02f      	beq.n	800b09a <HAL_RCCEx_PeriphCLKConfig+0x59e>
 800b03a:	f5b3 2f80 	cmp.w	r3, #262144	@ 0x40000
 800b03e:	d826      	bhi.n	800b08e <HAL_RCCEx_PeriphCLKConfig+0x592>
 800b040:	f5b3 3f40 	cmp.w	r3, #196608	@ 0x30000
 800b044:	d02b      	beq.n	800b09e <HAL_RCCEx_PeriphCLKConfig+0x5a2>
 800b046:	f5b3 3f40 	cmp.w	r3, #196608	@ 0x30000
 800b04a:	d820      	bhi.n	800b08e <HAL_RCCEx_PeriphCLKConfig+0x592>
 800b04c:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800b050:	d012      	beq.n	800b078 <HAL_RCCEx_PeriphCLKConfig+0x57c>
 800b052:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800b056:	d81a      	bhi.n	800b08e <HAL_RCCEx_PeriphCLKConfig+0x592>
 800b058:	2b00      	cmp	r3, #0
 800b05a:	d022      	beq.n	800b0a2 <HAL_RCCEx_PeriphCLKConfig+0x5a6>
 800b05c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800b060:	d115      	bne.n	800b08e <HAL_RCCEx_PeriphCLKConfig+0x592>
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;

      case RCC_SPI45CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI4/5 */

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b062:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b066:	3308      	adds	r3, #8
 800b068:	2101      	movs	r1, #1
 800b06a:	4618      	mov	r0, r3
 800b06c:	f001 f9f2 	bl	800c454 <RCCEx_PLL2_Config>
 800b070:	4603      	mov	r3, r0
 800b072:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI4/5 clock source configuration done later after clock selection check */
        break;
 800b076:	e015      	b.n	800b0a4 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
      case RCC_SPI45CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI4/5 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b078:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b07c:	3328      	adds	r3, #40	@ 0x28
 800b07e:	2101      	movs	r1, #1
 800b080:	4618      	mov	r0, r3
 800b082:	f001 fa99 	bl	800c5b8 <RCCEx_PLL3_Config>
 800b086:	4603      	mov	r3, r0
 800b088:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;
 800b08c:	e00a      	b.n	800b0a4 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        /* HSE,  oscillator is used as source of SPI4/5 clock */
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b08e:	2301      	movs	r3, #1
 800b090:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b094:	e006      	b.n	800b0a4 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800b096:	bf00      	nop
 800b098:	e004      	b.n	800b0a4 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800b09a:	bf00      	nop
 800b09c:	e002      	b.n	800b0a4 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800b09e:	bf00      	nop
 800b0a0:	e000      	b.n	800b0a4 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800b0a2:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b0a4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b0a8:	2b00      	cmp	r3, #0
 800b0aa:	d10d      	bne.n	800b0c8 <HAL_RCCEx_PeriphCLKConfig+0x5cc>
    {
      /* Set the source of SPI4/5 clock*/
      __HAL_RCC_SPI45_CONFIG(PeriphClkInit->Spi45ClockSelection);
 800b0ac:	4b05      	ldr	r3, [pc, #20]	@ (800b0c4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b0ae:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b0b0:	f423 21e0 	bic.w	r1, r3, #458752	@ 0x70000
 800b0b4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b0b8:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800b0ba:	4a02      	ldr	r2, [pc, #8]	@ (800b0c4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b0bc:	430b      	orrs	r3, r1
 800b0be:	6513      	str	r3, [r2, #80]	@ 0x50
 800b0c0:	e006      	b.n	800b0d0 <HAL_RCCEx_PeriphCLKConfig+0x5d4>
 800b0c2:	bf00      	nop
 800b0c4:	58024400 	.word	0x58024400
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b0c8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b0cc:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SPI6 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI6) == RCC_PERIPHCLK_SPI6)
 800b0d0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b0d4:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b0d8:	f402 4380 	and.w	r3, r2, #16384	@ 0x4000
 800b0dc:	f8c7 30d8 	str.w	r3, [r7, #216]	@ 0xd8
 800b0e0:	2300      	movs	r3, #0
 800b0e2:	f8c7 30dc 	str.w	r3, [r7, #220]	@ 0xdc
 800b0e6:	e9d7 1236 	ldrd	r1, r2, [r7, #216]	@ 0xd8
 800b0ea:	460b      	mov	r3, r1
 800b0ec:	4313      	orrs	r3, r2
 800b0ee:	d055      	beq.n	800b19c <HAL_RCCEx_PeriphCLKConfig+0x6a0>
  {
    switch (PeriphClkInit->Spi6ClockSelection)
 800b0f0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b0f4:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 800b0f8:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800b0fc:	d033      	beq.n	800b166 <HAL_RCCEx_PeriphCLKConfig+0x66a>
 800b0fe:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800b102:	d82c      	bhi.n	800b15e <HAL_RCCEx_PeriphCLKConfig+0x662>
 800b104:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800b108:	d02f      	beq.n	800b16a <HAL_RCCEx_PeriphCLKConfig+0x66e>
 800b10a:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800b10e:	d826      	bhi.n	800b15e <HAL_RCCEx_PeriphCLKConfig+0x662>
 800b110:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800b114:	d02b      	beq.n	800b16e <HAL_RCCEx_PeriphCLKConfig+0x672>
 800b116:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800b11a:	d820      	bhi.n	800b15e <HAL_RCCEx_PeriphCLKConfig+0x662>
 800b11c:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800b120:	d012      	beq.n	800b148 <HAL_RCCEx_PeriphCLKConfig+0x64c>
 800b122:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800b126:	d81a      	bhi.n	800b15e <HAL_RCCEx_PeriphCLKConfig+0x662>
 800b128:	2b00      	cmp	r3, #0
 800b12a:	d022      	beq.n	800b172 <HAL_RCCEx_PeriphCLKConfig+0x676>
 800b12c:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800b130:	d115      	bne.n	800b15e <HAL_RCCEx_PeriphCLKConfig+0x662>
        /* SPI6 clock source configuration done later after clock selection check */
        break;

      case RCC_SPI6CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI6*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b132:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b136:	3308      	adds	r3, #8
 800b138:	2101      	movs	r1, #1
 800b13a:	4618      	mov	r0, r3
 800b13c:	f001 f98a 	bl	800c454 <RCCEx_PLL2_Config>
 800b140:	4603      	mov	r3, r0
 800b142:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI6 clock source configuration done later after clock selection check */
        break;
 800b146:	e015      	b.n	800b174 <HAL_RCCEx_PeriphCLKConfig+0x678>
      case RCC_SPI6CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI6*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b148:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b14c:	3328      	adds	r3, #40	@ 0x28
 800b14e:	2101      	movs	r1, #1
 800b150:	4618      	mov	r0, r3
 800b152:	f001 fa31 	bl	800c5b8 <RCCEx_PLL3_Config>
 800b156:	4603      	mov	r3, r0
 800b158:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* SPI6 clock source configuration done later after clock selection check */
        break;
 800b15c:	e00a      	b.n	800b174 <HAL_RCCEx_PeriphCLKConfig+0x678>
        /* SPI6 clock source configuration done later after clock selection check */
        break;
#endif

      default:
        ret = HAL_ERROR;
 800b15e:	2301      	movs	r3, #1
 800b160:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b164:	e006      	b.n	800b174 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800b166:	bf00      	nop
 800b168:	e004      	b.n	800b174 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800b16a:	bf00      	nop
 800b16c:	e002      	b.n	800b174 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800b16e:	bf00      	nop
 800b170:	e000      	b.n	800b174 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800b172:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b174:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b178:	2b00      	cmp	r3, #0
 800b17a:	d10b      	bne.n	800b194 <HAL_RCCEx_PeriphCLKConfig+0x698>
    {
      /* Set the source of SPI6 clock*/
      __HAL_RCC_SPI6_CONFIG(PeriphClkInit->Spi6ClockSelection);
 800b17c:	4ba3      	ldr	r3, [pc, #652]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b17e:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b180:	f023 41e0 	bic.w	r1, r3, #1879048192	@ 0x70000000
 800b184:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b188:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 800b18c:	4a9f      	ldr	r2, [pc, #636]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b18e:	430b      	orrs	r3, r1
 800b190:	6593      	str	r3, [r2, #88]	@ 0x58
 800b192:	e003      	b.n	800b19c <HAL_RCCEx_PeriphCLKConfig+0x6a0>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b194:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b198:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif /*DSI*/

#if defined(FDCAN1) || defined(FDCAN2)
  /*---------------------------- FDCAN configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FDCAN) == RCC_PERIPHCLK_FDCAN)
 800b19c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b1a0:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b1a4:	f402 4300 	and.w	r3, r2, #32768	@ 0x8000
 800b1a8:	f8c7 30d0 	str.w	r3, [r7, #208]	@ 0xd0
 800b1ac:	2300      	movs	r3, #0
 800b1ae:	f8c7 30d4 	str.w	r3, [r7, #212]	@ 0xd4
 800b1b2:	e9d7 1234 	ldrd	r1, r2, [r7, #208]	@ 0xd0
 800b1b6:	460b      	mov	r3, r1
 800b1b8:	4313      	orrs	r3, r2
 800b1ba:	d037      	beq.n	800b22c <HAL_RCCEx_PeriphCLKConfig+0x730>
  {
    switch (PeriphClkInit->FdcanClockSelection)
 800b1bc:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b1c0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800b1c2:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800b1c6:	d00e      	beq.n	800b1e6 <HAL_RCCEx_PeriphCLKConfig+0x6ea>
 800b1c8:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800b1cc:	d816      	bhi.n	800b1fc <HAL_RCCEx_PeriphCLKConfig+0x700>
 800b1ce:	2b00      	cmp	r3, #0
 800b1d0:	d018      	beq.n	800b204 <HAL_RCCEx_PeriphCLKConfig+0x708>
 800b1d2:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800b1d6:	d111      	bne.n	800b1fc <HAL_RCCEx_PeriphCLKConfig+0x700>
    {
      case RCC_FDCANCLKSOURCE_PLL:      /* PLL is used as clock source for FDCAN*/
        /* Enable FDCAN Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b1d8:	4b8c      	ldr	r3, [pc, #560]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b1da:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b1dc:	4a8b      	ldr	r2, [pc, #556]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b1de:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b1e2:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* FDCAN clock source configuration done later after clock selection check */
        break;
 800b1e4:	e00f      	b.n	800b206 <HAL_RCCEx_PeriphCLKConfig+0x70a>

      case RCC_FDCANCLKSOURCE_PLL2: /* PLL2 is used as clock source for FDCAN*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b1e6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b1ea:	3308      	adds	r3, #8
 800b1ec:	2101      	movs	r1, #1
 800b1ee:	4618      	mov	r0, r3
 800b1f0:	f001 f930 	bl	800c454 <RCCEx_PLL2_Config>
 800b1f4:	4603      	mov	r3, r0
 800b1f6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* FDCAN clock source configuration done later after clock selection check */
        break;
 800b1fa:	e004      	b.n	800b206 <HAL_RCCEx_PeriphCLKConfig+0x70a>
        /* HSE is used as clock source for FDCAN*/
        /* FDCAN clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b1fc:	2301      	movs	r3, #1
 800b1fe:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b202:	e000      	b.n	800b206 <HAL_RCCEx_PeriphCLKConfig+0x70a>
        break;
 800b204:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b206:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b20a:	2b00      	cmp	r3, #0
 800b20c:	d10a      	bne.n	800b224 <HAL_RCCEx_PeriphCLKConfig+0x728>
    {
      /* Set the source of FDCAN clock*/
      __HAL_RCC_FDCAN_CONFIG(PeriphClkInit->FdcanClockSelection);
 800b20e:	4b7f      	ldr	r3, [pc, #508]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b210:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b212:	f023 5140 	bic.w	r1, r3, #805306368	@ 0x30000000
 800b216:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b21a:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800b21c:	4a7b      	ldr	r2, [pc, #492]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b21e:	430b      	orrs	r3, r1
 800b220:	6513      	str	r3, [r2, #80]	@ 0x50
 800b222:	e003      	b.n	800b22c <HAL_RCCEx_PeriphCLKConfig+0x730>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b224:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b228:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif /*FDCAN1 || FDCAN2*/

  /*---------------------------- FMC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMC) == RCC_PERIPHCLK_FMC)
 800b22c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b230:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b234:	f002 7380 	and.w	r3, r2, #16777216	@ 0x1000000
 800b238:	f8c7 30c8 	str.w	r3, [r7, #200]	@ 0xc8
 800b23c:	2300      	movs	r3, #0
 800b23e:	f8c7 30cc 	str.w	r3, [r7, #204]	@ 0xcc
 800b242:	e9d7 1232 	ldrd	r1, r2, [r7, #200]	@ 0xc8
 800b246:	460b      	mov	r3, r1
 800b248:	4313      	orrs	r3, r2
 800b24a:	d039      	beq.n	800b2c0 <HAL_RCCEx_PeriphCLKConfig+0x7c4>
  {
    switch (PeriphClkInit->FmcClockSelection)
 800b24c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b250:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800b252:	2b03      	cmp	r3, #3
 800b254:	d81c      	bhi.n	800b290 <HAL_RCCEx_PeriphCLKConfig+0x794>
 800b256:	a201      	add	r2, pc, #4	@ (adr r2, 800b25c <HAL_RCCEx_PeriphCLKConfig+0x760>)
 800b258:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800b25c:	0800b299 	.word	0x0800b299
 800b260:	0800b26d 	.word	0x0800b26d
 800b264:	0800b27b 	.word	0x0800b27b
 800b268:	0800b299 	.word	0x0800b299
    {
      case RCC_FMCCLKSOURCE_PLL:      /* PLL is used as clock source for FMC*/
        /* Enable FMC Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b26c:	4b67      	ldr	r3, [pc, #412]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b26e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b270:	4a66      	ldr	r2, [pc, #408]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b272:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b276:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* FMC clock source configuration done later after clock selection check */
        break;
 800b278:	e00f      	b.n	800b29a <HAL_RCCEx_PeriphCLKConfig+0x79e>

      case RCC_FMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for FMC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800b27a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b27e:	3308      	adds	r3, #8
 800b280:	2102      	movs	r1, #2
 800b282:	4618      	mov	r0, r3
 800b284:	f001 f8e6 	bl	800c454 <RCCEx_PLL2_Config>
 800b288:	4603      	mov	r3, r0
 800b28a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* FMC clock source configuration done later after clock selection check */
        break;
 800b28e:	e004      	b.n	800b29a <HAL_RCCEx_PeriphCLKConfig+0x79e>
      case RCC_FMCCLKSOURCE_HCLK:
        /* D1/CD HCLK  clock selected as FMC kernel peripheral clock */
        break;

      default:
        ret = HAL_ERROR;
 800b290:	2301      	movs	r3, #1
 800b292:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b296:	e000      	b.n	800b29a <HAL_RCCEx_PeriphCLKConfig+0x79e>
        break;
 800b298:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b29a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b29e:	2b00      	cmp	r3, #0
 800b2a0:	d10a      	bne.n	800b2b8 <HAL_RCCEx_PeriphCLKConfig+0x7bc>
    {
      /* Set the source of FMC clock*/
      __HAL_RCC_FMC_CONFIG(PeriphClkInit->FmcClockSelection);
 800b2a2:	4b5a      	ldr	r3, [pc, #360]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b2a4:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800b2a6:	f023 0103 	bic.w	r1, r3, #3
 800b2aa:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b2ae:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800b2b0:	4a56      	ldr	r2, [pc, #344]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b2b2:	430b      	orrs	r3, r1
 800b2b4:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800b2b6:	e003      	b.n	800b2c0 <HAL_RCCEx_PeriphCLKConfig+0x7c4>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b2b8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b2bc:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- RTC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
 800b2c0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b2c4:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b2c8:	f402 0380 	and.w	r3, r2, #4194304	@ 0x400000
 800b2cc:	f8c7 30c0 	str.w	r3, [r7, #192]	@ 0xc0
 800b2d0:	2300      	movs	r3, #0
 800b2d2:	f8c7 30c4 	str.w	r3, [r7, #196]	@ 0xc4
 800b2d6:	e9d7 1230 	ldrd	r1, r2, [r7, #192]	@ 0xc0
 800b2da:	460b      	mov	r3, r1
 800b2dc:	4313      	orrs	r3, r2
 800b2de:	f000 809f 	beq.w	800b420 <HAL_RCCEx_PeriphCLKConfig+0x924>
  {
    /* check for RTC Parameters used to output RTCCLK */
    assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));

    /* Enable write access to Backup domain */
    SET_BIT(PWR->CR1, PWR_CR1_DBP);
 800b2e2:	4b4b      	ldr	r3, [pc, #300]	@ (800b410 <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800b2e4:	681b      	ldr	r3, [r3, #0]
 800b2e6:	4a4a      	ldr	r2, [pc, #296]	@ (800b410 <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800b2e8:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800b2ec:	6013      	str	r3, [r2, #0]

    /* Wait for Backup domain Write protection disable */
    tickstart = HAL_GetTick();
 800b2ee:	f7f9 fea9 	bl	8005044 <HAL_GetTick>
 800b2f2:	f8c7 0118 	str.w	r0, [r7, #280]	@ 0x118

    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800b2f6:	e00b      	b.n	800b310 <HAL_RCCEx_PeriphCLKConfig+0x814>
    {
      if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 800b2f8:	f7f9 fea4 	bl	8005044 <HAL_GetTick>
 800b2fc:	4602      	mov	r2, r0
 800b2fe:	f8d7 3118 	ldr.w	r3, [r7, #280]	@ 0x118
 800b302:	1ad3      	subs	r3, r2, r3
 800b304:	2b64      	cmp	r3, #100	@ 0x64
 800b306:	d903      	bls.n	800b310 <HAL_RCCEx_PeriphCLKConfig+0x814>
      {
        ret = HAL_TIMEOUT;
 800b308:	2303      	movs	r3, #3
 800b30a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b30e:	e005      	b.n	800b31c <HAL_RCCEx_PeriphCLKConfig+0x820>
    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800b310:	4b3f      	ldr	r3, [pc, #252]	@ (800b410 <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800b312:	681b      	ldr	r3, [r3, #0]
 800b314:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800b318:	2b00      	cmp	r3, #0
 800b31a:	d0ed      	beq.n	800b2f8 <HAL_RCCEx_PeriphCLKConfig+0x7fc>
      }
    }

    if (ret == HAL_OK)
 800b31c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b320:	2b00      	cmp	r3, #0
 800b322:	d179      	bne.n	800b418 <HAL_RCCEx_PeriphCLKConfig+0x91c>
    {
      /* Reset the Backup domain only if the RTC Clock source selection is modified */
      if ((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))
 800b324:	4b39      	ldr	r3, [pc, #228]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b326:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 800b328:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b32c:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800b330:	4053      	eors	r3, r2
 800b332:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800b336:	2b00      	cmp	r3, #0
 800b338:	d015      	beq.n	800b366 <HAL_RCCEx_PeriphCLKConfig+0x86a>
      {
        /* Store the content of BDCR register before the reset of Backup Domain */
        tmpreg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 800b33a:	4b34      	ldr	r3, [pc, #208]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b33c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800b33e:	f423 7340 	bic.w	r3, r3, #768	@ 0x300
 800b342:	f8c7 3114 	str.w	r3, [r7, #276]	@ 0x114
        /* RTC Clock selection can be changed only if the Backup Domain is reset */
        __HAL_RCC_BACKUPRESET_FORCE();
 800b346:	4b31      	ldr	r3, [pc, #196]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b348:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800b34a:	4a30      	ldr	r2, [pc, #192]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b34c:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800b350:	6713      	str	r3, [r2, #112]	@ 0x70
        __HAL_RCC_BACKUPRESET_RELEASE();
 800b352:	4b2e      	ldr	r3, [pc, #184]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b354:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800b356:	4a2d      	ldr	r2, [pc, #180]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b358:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800b35c:	6713      	str	r3, [r2, #112]	@ 0x70
        /* Restore the Content of BDCR register */
        RCC->BDCR = tmpreg;
 800b35e:	4a2b      	ldr	r2, [pc, #172]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b360:	f8d7 3114 	ldr.w	r3, [r7, #276]	@ 0x114
 800b364:	6713      	str	r3, [r2, #112]	@ 0x70
      }

      /* If LSE is selected as RTC clock source (and enabled prior to Backup Domain reset), wait for LSE reactivation */
      if (PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE)
 800b366:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b36a:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800b36e:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800b372:	d118      	bne.n	800b3a6 <HAL_RCCEx_PeriphCLKConfig+0x8aa>
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800b374:	f7f9 fe66 	bl	8005044 <HAL_GetTick>
 800b378:	f8c7 0118 	str.w	r0, [r7, #280]	@ 0x118

        /* Wait till LSE is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800b37c:	e00d      	b.n	800b39a <HAL_RCCEx_PeriphCLKConfig+0x89e>
        {
          if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 800b37e:	f7f9 fe61 	bl	8005044 <HAL_GetTick>
 800b382:	4602      	mov	r2, r0
 800b384:	f8d7 3118 	ldr.w	r3, [r7, #280]	@ 0x118
 800b388:	1ad2      	subs	r2, r2, r3
 800b38a:	f241 3388 	movw	r3, #5000	@ 0x1388
 800b38e:	429a      	cmp	r2, r3
 800b390:	d903      	bls.n	800b39a <HAL_RCCEx_PeriphCLKConfig+0x89e>
          {
            ret = HAL_TIMEOUT;
 800b392:	2303      	movs	r3, #3
 800b394:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
            break;
 800b398:	e005      	b.n	800b3a6 <HAL_RCCEx_PeriphCLKConfig+0x8aa>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800b39a:	4b1c      	ldr	r3, [pc, #112]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b39c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800b39e:	f003 0302 	and.w	r3, r3, #2
 800b3a2:	2b00      	cmp	r3, #0
 800b3a4:	d0eb      	beq.n	800b37e <HAL_RCCEx_PeriphCLKConfig+0x882>
          }
        }
      }

      if (ret == HAL_OK)
 800b3a6:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b3aa:	2b00      	cmp	r3, #0
 800b3ac:	d129      	bne.n	800b402 <HAL_RCCEx_PeriphCLKConfig+0x906>
      {
        __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
 800b3ae:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b3b2:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800b3b6:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800b3ba:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800b3be:	d10e      	bne.n	800b3de <HAL_RCCEx_PeriphCLKConfig+0x8e2>
 800b3c0:	4b12      	ldr	r3, [pc, #72]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b3c2:	691b      	ldr	r3, [r3, #16]
 800b3c4:	f423 517c 	bic.w	r1, r3, #16128	@ 0x3f00
 800b3c8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b3cc:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800b3d0:	091a      	lsrs	r2, r3, #4
 800b3d2:	4b10      	ldr	r3, [pc, #64]	@ (800b414 <HAL_RCCEx_PeriphCLKConfig+0x918>)
 800b3d4:	4013      	ands	r3, r2
 800b3d6:	4a0d      	ldr	r2, [pc, #52]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b3d8:	430b      	orrs	r3, r1
 800b3da:	6113      	str	r3, [r2, #16]
 800b3dc:	e005      	b.n	800b3ea <HAL_RCCEx_PeriphCLKConfig+0x8ee>
 800b3de:	4b0b      	ldr	r3, [pc, #44]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b3e0:	691b      	ldr	r3, [r3, #16]
 800b3e2:	4a0a      	ldr	r2, [pc, #40]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b3e4:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 800b3e8:	6113      	str	r3, [r2, #16]
 800b3ea:	4b08      	ldr	r3, [pc, #32]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b3ec:	6f19      	ldr	r1, [r3, #112]	@ 0x70
 800b3ee:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b3f2:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800b3f6:	f3c3 030b 	ubfx	r3, r3, #0, #12
 800b3fa:	4a04      	ldr	r2, [pc, #16]	@ (800b40c <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b3fc:	430b      	orrs	r3, r1
 800b3fe:	6713      	str	r3, [r2, #112]	@ 0x70
 800b400:	e00e      	b.n	800b420 <HAL_RCCEx_PeriphCLKConfig+0x924>
      }
      else
      {
        /* set overall return value */
        status = ret;
 800b402:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b406:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
 800b40a:	e009      	b.n	800b420 <HAL_RCCEx_PeriphCLKConfig+0x924>
 800b40c:	58024400 	.word	0x58024400
 800b410:	58024800 	.word	0x58024800
 800b414:	00ffffcf 	.word	0x00ffffcf
      }
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b418:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b41c:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }


  /*-------------------------- USART1/6 configuration --------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART16) == RCC_PERIPHCLK_USART16)
 800b420:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b424:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b428:	f002 0301 	and.w	r3, r2, #1
 800b42c:	f8c7 30b8 	str.w	r3, [r7, #184]	@ 0xb8
 800b430:	2300      	movs	r3, #0
 800b432:	f8c7 30bc 	str.w	r3, [r7, #188]	@ 0xbc
 800b436:	e9d7 122e 	ldrd	r1, r2, [r7, #184]	@ 0xb8
 800b43a:	460b      	mov	r3, r1
 800b43c:	4313      	orrs	r3, r2
 800b43e:	f000 8089 	beq.w	800b554 <HAL_RCCEx_PeriphCLKConfig+0xa58>
  {
    switch (PeriphClkInit->Usart16ClockSelection)
 800b442:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b446:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 800b448:	2b28      	cmp	r3, #40	@ 0x28
 800b44a:	d86b      	bhi.n	800b524 <HAL_RCCEx_PeriphCLKConfig+0xa28>
 800b44c:	a201      	add	r2, pc, #4	@ (adr r2, 800b454 <HAL_RCCEx_PeriphCLKConfig+0x958>)
 800b44e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800b452:	bf00      	nop
 800b454:	0800b52d 	.word	0x0800b52d
 800b458:	0800b525 	.word	0x0800b525
 800b45c:	0800b525 	.word	0x0800b525
 800b460:	0800b525 	.word	0x0800b525
 800b464:	0800b525 	.word	0x0800b525
 800b468:	0800b525 	.word	0x0800b525
 800b46c:	0800b525 	.word	0x0800b525
 800b470:	0800b525 	.word	0x0800b525
 800b474:	0800b4f9 	.word	0x0800b4f9
 800b478:	0800b525 	.word	0x0800b525
 800b47c:	0800b525 	.word	0x0800b525
 800b480:	0800b525 	.word	0x0800b525
 800b484:	0800b525 	.word	0x0800b525
 800b488:	0800b525 	.word	0x0800b525
 800b48c:	0800b525 	.word	0x0800b525
 800b490:	0800b525 	.word	0x0800b525
 800b494:	0800b50f 	.word	0x0800b50f
 800b498:	0800b525 	.word	0x0800b525
 800b49c:	0800b525 	.word	0x0800b525
 800b4a0:	0800b525 	.word	0x0800b525
 800b4a4:	0800b525 	.word	0x0800b525
 800b4a8:	0800b525 	.word	0x0800b525
 800b4ac:	0800b525 	.word	0x0800b525
 800b4b0:	0800b525 	.word	0x0800b525
 800b4b4:	0800b52d 	.word	0x0800b52d
 800b4b8:	0800b525 	.word	0x0800b525
 800b4bc:	0800b525 	.word	0x0800b525
 800b4c0:	0800b525 	.word	0x0800b525
 800b4c4:	0800b525 	.word	0x0800b525
 800b4c8:	0800b525 	.word	0x0800b525
 800b4cc:	0800b525 	.word	0x0800b525
 800b4d0:	0800b525 	.word	0x0800b525
 800b4d4:	0800b52d 	.word	0x0800b52d
 800b4d8:	0800b525 	.word	0x0800b525
 800b4dc:	0800b525 	.word	0x0800b525
 800b4e0:	0800b525 	.word	0x0800b525
 800b4e4:	0800b525 	.word	0x0800b525
 800b4e8:	0800b525 	.word	0x0800b525
 800b4ec:	0800b525 	.word	0x0800b525
 800b4f0:	0800b525 	.word	0x0800b525
 800b4f4:	0800b52d 	.word	0x0800b52d
      case RCC_USART16CLKSOURCE_PCLK2: /* CD/D2 PCLK2 as clock source for USART1/6 */
        /* USART1/6 clock source configuration done later after clock selection check */
        break;

      case RCC_USART16CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART1/6 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b4f8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b4fc:	3308      	adds	r3, #8
 800b4fe:	2101      	movs	r1, #1
 800b500:	4618      	mov	r0, r3
 800b502:	f000 ffa7 	bl	800c454 <RCCEx_PLL2_Config>
 800b506:	4603      	mov	r3, r0
 800b508:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART1/6 clock source configuration done later after clock selection check */
        break;
 800b50c:	e00f      	b.n	800b52e <HAL_RCCEx_PeriphCLKConfig+0xa32>

      case RCC_USART16CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART1/6 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b50e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b512:	3328      	adds	r3, #40	@ 0x28
 800b514:	2101      	movs	r1, #1
 800b516:	4618      	mov	r0, r3
 800b518:	f001 f84e 	bl	800c5b8 <RCCEx_PLL3_Config>
 800b51c:	4603      	mov	r3, r0
 800b51e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART1/6 clock source configuration done later after clock selection check */
        break;
 800b522:	e004      	b.n	800b52e <HAL_RCCEx_PeriphCLKConfig+0xa32>
        /* LSE,  oscillator is used as source of USART1/6 clock */
        /* USART1/6 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b524:	2301      	movs	r3, #1
 800b526:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b52a:	e000      	b.n	800b52e <HAL_RCCEx_PeriphCLKConfig+0xa32>
        break;
 800b52c:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b52e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b532:	2b00      	cmp	r3, #0
 800b534:	d10a      	bne.n	800b54c <HAL_RCCEx_PeriphCLKConfig+0xa50>
    {
      /* Set the source of USART1/6 clock */
      __HAL_RCC_USART16_CONFIG(PeriphClkInit->Usart16ClockSelection);
 800b536:	4bbf      	ldr	r3, [pc, #764]	@ (800b834 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b538:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800b53a:	f023 0138 	bic.w	r1, r3, #56	@ 0x38
 800b53e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b542:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 800b544:	4abb      	ldr	r2, [pc, #748]	@ (800b834 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b546:	430b      	orrs	r3, r1
 800b548:	6553      	str	r3, [r2, #84]	@ 0x54
 800b54a:	e003      	b.n	800b554 <HAL_RCCEx_PeriphCLKConfig+0xa58>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b54c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b550:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*-------------------------- USART2/3/4/5/7/8 Configuration --------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART234578) == RCC_PERIPHCLK_USART234578)
 800b554:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b558:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b55c:	f002 0302 	and.w	r3, r2, #2
 800b560:	f8c7 30b0 	str.w	r3, [r7, #176]	@ 0xb0
 800b564:	2300      	movs	r3, #0
 800b566:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
 800b56a:	e9d7 122c 	ldrd	r1, r2, [r7, #176]	@ 0xb0
 800b56e:	460b      	mov	r3, r1
 800b570:	4313      	orrs	r3, r2
 800b572:	d041      	beq.n	800b5f8 <HAL_RCCEx_PeriphCLKConfig+0xafc>
  {
    switch (PeriphClkInit->Usart234578ClockSelection)
 800b574:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b578:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800b57a:	2b05      	cmp	r3, #5
 800b57c:	d824      	bhi.n	800b5c8 <HAL_RCCEx_PeriphCLKConfig+0xacc>
 800b57e:	a201      	add	r2, pc, #4	@ (adr r2, 800b584 <HAL_RCCEx_PeriphCLKConfig+0xa88>)
 800b580:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800b584:	0800b5d1 	.word	0x0800b5d1
 800b588:	0800b59d 	.word	0x0800b59d
 800b58c:	0800b5b3 	.word	0x0800b5b3
 800b590:	0800b5d1 	.word	0x0800b5d1
 800b594:	0800b5d1 	.word	0x0800b5d1
 800b598:	0800b5d1 	.word	0x0800b5d1
      case RCC_USART234578CLKSOURCE_PCLK1: /* CD/D2 PCLK1 as clock source for USART2/3/4/5/7/8 */
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;

      case RCC_USART234578CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART2/3/4/5/7/8 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b59c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b5a0:	3308      	adds	r3, #8
 800b5a2:	2101      	movs	r1, #1
 800b5a4:	4618      	mov	r0, r3
 800b5a6:	f000 ff55 	bl	800c454 <RCCEx_PLL2_Config>
 800b5aa:	4603      	mov	r3, r0
 800b5ac:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;
 800b5b0:	e00f      	b.n	800b5d2 <HAL_RCCEx_PeriphCLKConfig+0xad6>

      case RCC_USART234578CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART2/3/4/5/7/8 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b5b2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b5b6:	3328      	adds	r3, #40	@ 0x28
 800b5b8:	2101      	movs	r1, #1
 800b5ba:	4618      	mov	r0, r3
 800b5bc:	f000 fffc 	bl	800c5b8 <RCCEx_PLL3_Config>
 800b5c0:	4603      	mov	r3, r0
 800b5c2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;
 800b5c6:	e004      	b.n	800b5d2 <HAL_RCCEx_PeriphCLKConfig+0xad6>
        /* LSE,  oscillator is used as source of USART2/3/4/5/7/8 clock */
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b5c8:	2301      	movs	r3, #1
 800b5ca:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b5ce:	e000      	b.n	800b5d2 <HAL_RCCEx_PeriphCLKConfig+0xad6>
        break;
 800b5d0:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b5d2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b5d6:	2b00      	cmp	r3, #0
 800b5d8:	d10a      	bne.n	800b5f0 <HAL_RCCEx_PeriphCLKConfig+0xaf4>
    {
      /* Set the source of USART2/3/4/5/7/8 clock */
      __HAL_RCC_USART234578_CONFIG(PeriphClkInit->Usart234578ClockSelection);
 800b5da:	4b96      	ldr	r3, [pc, #600]	@ (800b834 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b5dc:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800b5de:	f023 0107 	bic.w	r1, r3, #7
 800b5e2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b5e6:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800b5e8:	4a92      	ldr	r2, [pc, #584]	@ (800b834 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b5ea:	430b      	orrs	r3, r1
 800b5ec:	6553      	str	r3, [r2, #84]	@ 0x54
 800b5ee:	e003      	b.n	800b5f8 <HAL_RCCEx_PeriphCLKConfig+0xafc>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b5f0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b5f4:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*-------------------------- LPUART1 Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1)
 800b5f8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b5fc:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b600:	f002 0304 	and.w	r3, r2, #4
 800b604:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
 800b608:	2300      	movs	r3, #0
 800b60a:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
 800b60e:	e9d7 122a 	ldrd	r1, r2, [r7, #168]	@ 0xa8
 800b612:	460b      	mov	r3, r1
 800b614:	4313      	orrs	r3, r2
 800b616:	d044      	beq.n	800b6a2 <HAL_RCCEx_PeriphCLKConfig+0xba6>
  {
    switch (PeriphClkInit->Lpuart1ClockSelection)
 800b618:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b61c:	f8d3 3094 	ldr.w	r3, [r3, #148]	@ 0x94
 800b620:	2b05      	cmp	r3, #5
 800b622:	d825      	bhi.n	800b670 <HAL_RCCEx_PeriphCLKConfig+0xb74>
 800b624:	a201      	add	r2, pc, #4	@ (adr r2, 800b62c <HAL_RCCEx_PeriphCLKConfig+0xb30>)
 800b626:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800b62a:	bf00      	nop
 800b62c:	0800b679 	.word	0x0800b679
 800b630:	0800b645 	.word	0x0800b645
 800b634:	0800b65b 	.word	0x0800b65b
 800b638:	0800b679 	.word	0x0800b679
 800b63c:	0800b679 	.word	0x0800b679
 800b640:	0800b679 	.word	0x0800b679
      case RCC_LPUART1CLKSOURCE_PCLK4: /* SRD/D3 PCLK1 (PCLK4) as clock source for LPUART1 */
        /* LPUART1 clock source configuration done later after clock selection check */
        break;

      case RCC_LPUART1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPUART1 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b644:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b648:	3308      	adds	r3, #8
 800b64a:	2101      	movs	r1, #1
 800b64c:	4618      	mov	r0, r3
 800b64e:	f000 ff01 	bl	800c454 <RCCEx_PLL2_Config>
 800b652:	4603      	mov	r3, r0
 800b654:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* LPUART1 clock source configuration done later after clock selection check */
        break;
 800b658:	e00f      	b.n	800b67a <HAL_RCCEx_PeriphCLKConfig+0xb7e>

      case RCC_LPUART1CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPUART1 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b65a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b65e:	3328      	adds	r3, #40	@ 0x28
 800b660:	2101      	movs	r1, #1
 800b662:	4618      	mov	r0, r3
 800b664:	f000 ffa8 	bl	800c5b8 <RCCEx_PLL3_Config>
 800b668:	4603      	mov	r3, r0
 800b66a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* LPUART1 clock source configuration done later after clock selection check */
        break;
 800b66e:	e004      	b.n	800b67a <HAL_RCCEx_PeriphCLKConfig+0xb7e>
        /* LSE,  oscillator is used as source of LPUART1 clock */
        /* LPUART1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b670:	2301      	movs	r3, #1
 800b672:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b676:	e000      	b.n	800b67a <HAL_RCCEx_PeriphCLKConfig+0xb7e>
        break;
 800b678:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b67a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b67e:	2b00      	cmp	r3, #0
 800b680:	d10b      	bne.n	800b69a <HAL_RCCEx_PeriphCLKConfig+0xb9e>
    {
      /* Set the source of LPUART1 clock */
      __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection);
 800b682:	4b6c      	ldr	r3, [pc, #432]	@ (800b834 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b684:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b686:	f023 0107 	bic.w	r1, r3, #7
 800b68a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b68e:	f8d3 3094 	ldr.w	r3, [r3, #148]	@ 0x94
 800b692:	4a68      	ldr	r2, [pc, #416]	@ (800b834 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b694:	430b      	orrs	r3, r1
 800b696:	6593      	str	r3, [r2, #88]	@ 0x58
 800b698:	e003      	b.n	800b6a2 <HAL_RCCEx_PeriphCLKConfig+0xba6>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b69a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b69e:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM1 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
 800b6a2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b6a6:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b6aa:	f002 0320 	and.w	r3, r2, #32
 800b6ae:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
 800b6b2:	2300      	movs	r3, #0
 800b6b4:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
 800b6b8:	e9d7 1228 	ldrd	r1, r2, [r7, #160]	@ 0xa0
 800b6bc:	460b      	mov	r3, r1
 800b6be:	4313      	orrs	r3, r2
 800b6c0:	d055      	beq.n	800b76e <HAL_RCCEx_PeriphCLKConfig+0xc72>
  {
    switch (PeriphClkInit->Lptim1ClockSelection)
 800b6c2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b6c6:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800b6ca:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800b6ce:	d033      	beq.n	800b738 <HAL_RCCEx_PeriphCLKConfig+0xc3c>
 800b6d0:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800b6d4:	d82c      	bhi.n	800b730 <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800b6d6:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800b6da:	d02f      	beq.n	800b73c <HAL_RCCEx_PeriphCLKConfig+0xc40>
 800b6dc:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800b6e0:	d826      	bhi.n	800b730 <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800b6e2:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800b6e6:	d02b      	beq.n	800b740 <HAL_RCCEx_PeriphCLKConfig+0xc44>
 800b6e8:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800b6ec:	d820      	bhi.n	800b730 <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800b6ee:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800b6f2:	d012      	beq.n	800b71a <HAL_RCCEx_PeriphCLKConfig+0xc1e>
 800b6f4:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800b6f8:	d81a      	bhi.n	800b730 <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800b6fa:	2b00      	cmp	r3, #0
 800b6fc:	d022      	beq.n	800b744 <HAL_RCCEx_PeriphCLKConfig+0xc48>
 800b6fe:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800b702:	d115      	bne.n	800b730 <HAL_RCCEx_PeriphCLKConfig+0xc34>
        /* LPTIM1 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM1*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b704:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b708:	3308      	adds	r3, #8
 800b70a:	2100      	movs	r1, #0
 800b70c:	4618      	mov	r0, r3
 800b70e:	f000 fea1 	bl	800c454 <RCCEx_PLL2_Config>
 800b712:	4603      	mov	r3, r0
 800b714:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM1 clock source configuration done later after clock selection check */
        break;
 800b718:	e015      	b.n	800b746 <HAL_RCCEx_PeriphCLKConfig+0xc4a>

      case RCC_LPTIM1CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM1*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800b71a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b71e:	3328      	adds	r3, #40	@ 0x28
 800b720:	2102      	movs	r1, #2
 800b722:	4618      	mov	r0, r3
 800b724:	f000 ff48 	bl	800c5b8 <RCCEx_PLL3_Config>
 800b728:	4603      	mov	r3, r0
 800b72a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM1 clock source configuration done later after clock selection check */
        break;
 800b72e:	e00a      	b.n	800b746 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM1 clock */
        /* LPTIM1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b730:	2301      	movs	r3, #1
 800b732:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b736:	e006      	b.n	800b746 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800b738:	bf00      	nop
 800b73a:	e004      	b.n	800b746 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800b73c:	bf00      	nop
 800b73e:	e002      	b.n	800b746 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800b740:	bf00      	nop
 800b742:	e000      	b.n	800b746 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800b744:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b746:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b74a:	2b00      	cmp	r3, #0
 800b74c:	d10b      	bne.n	800b766 <HAL_RCCEx_PeriphCLKConfig+0xc6a>
    {
      /* Set the source of LPTIM1 clock*/
      __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
 800b74e:	4b39      	ldr	r3, [pc, #228]	@ (800b834 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b750:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800b752:	f023 41e0 	bic.w	r1, r3, #1879048192	@ 0x70000000
 800b756:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b75a:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800b75e:	4a35      	ldr	r2, [pc, #212]	@ (800b834 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b760:	430b      	orrs	r3, r1
 800b762:	6553      	str	r3, [r2, #84]	@ 0x54
 800b764:	e003      	b.n	800b76e <HAL_RCCEx_PeriphCLKConfig+0xc72>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b766:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b76a:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM2 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2)
 800b76e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b772:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b776:	f002 0340 	and.w	r3, r2, #64	@ 0x40
 800b77a:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 800b77e:	2300      	movs	r3, #0
 800b780:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
 800b784:	e9d7 1226 	ldrd	r1, r2, [r7, #152]	@ 0x98
 800b788:	460b      	mov	r3, r1
 800b78a:	4313      	orrs	r3, r2
 800b78c:	d058      	beq.n	800b840 <HAL_RCCEx_PeriphCLKConfig+0xd44>
  {
    switch (PeriphClkInit->Lptim2ClockSelection)
 800b78e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b792:	f8d3 309c 	ldr.w	r3, [r3, #156]	@ 0x9c
 800b796:	f5b3 5fa0 	cmp.w	r3, #5120	@ 0x1400
 800b79a:	d033      	beq.n	800b804 <HAL_RCCEx_PeriphCLKConfig+0xd08>
 800b79c:	f5b3 5fa0 	cmp.w	r3, #5120	@ 0x1400
 800b7a0:	d82c      	bhi.n	800b7fc <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800b7a2:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800b7a6:	d02f      	beq.n	800b808 <HAL_RCCEx_PeriphCLKConfig+0xd0c>
 800b7a8:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800b7ac:	d826      	bhi.n	800b7fc <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800b7ae:	f5b3 6f40 	cmp.w	r3, #3072	@ 0xc00
 800b7b2:	d02b      	beq.n	800b80c <HAL_RCCEx_PeriphCLKConfig+0xd10>
 800b7b4:	f5b3 6f40 	cmp.w	r3, #3072	@ 0xc00
 800b7b8:	d820      	bhi.n	800b7fc <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800b7ba:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800b7be:	d012      	beq.n	800b7e6 <HAL_RCCEx_PeriphCLKConfig+0xcea>
 800b7c0:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800b7c4:	d81a      	bhi.n	800b7fc <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800b7c6:	2b00      	cmp	r3, #0
 800b7c8:	d022      	beq.n	800b810 <HAL_RCCEx_PeriphCLKConfig+0xd14>
 800b7ca:	f5b3 6f80 	cmp.w	r3, #1024	@ 0x400
 800b7ce:	d115      	bne.n	800b7fc <HAL_RCCEx_PeriphCLKConfig+0xd00>
        /* LPTIM2 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM2CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b7d0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b7d4:	3308      	adds	r3, #8
 800b7d6:	2100      	movs	r1, #0
 800b7d8:	4618      	mov	r0, r3
 800b7da:	f000 fe3b 	bl	800c454 <RCCEx_PLL2_Config>
 800b7de:	4603      	mov	r3, r0
 800b7e0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM2 clock source configuration done later after clock selection check */
        break;
 800b7e4:	e015      	b.n	800b812 <HAL_RCCEx_PeriphCLKConfig+0xd16>

      case RCC_LPTIM2CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800b7e6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b7ea:	3328      	adds	r3, #40	@ 0x28
 800b7ec:	2102      	movs	r1, #2
 800b7ee:	4618      	mov	r0, r3
 800b7f0:	f000 fee2 	bl	800c5b8 <RCCEx_PLL3_Config>
 800b7f4:	4603      	mov	r3, r0
 800b7f6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM2 clock source configuration done later after clock selection check */
        break;
 800b7fa:	e00a      	b.n	800b812 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM2 clock */
        /* LPTIM2 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b7fc:	2301      	movs	r3, #1
 800b7fe:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b802:	e006      	b.n	800b812 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800b804:	bf00      	nop
 800b806:	e004      	b.n	800b812 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800b808:	bf00      	nop
 800b80a:	e002      	b.n	800b812 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800b80c:	bf00      	nop
 800b80e:	e000      	b.n	800b812 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800b810:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b812:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b816:	2b00      	cmp	r3, #0
 800b818:	d10e      	bne.n	800b838 <HAL_RCCEx_PeriphCLKConfig+0xd3c>
    {
      /* Set the source of LPTIM2 clock*/
      __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection);
 800b81a:	4b06      	ldr	r3, [pc, #24]	@ (800b834 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b81c:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b81e:	f423 51e0 	bic.w	r1, r3, #7168	@ 0x1c00
 800b822:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b826:	f8d3 309c 	ldr.w	r3, [r3, #156]	@ 0x9c
 800b82a:	4a02      	ldr	r2, [pc, #8]	@ (800b834 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b82c:	430b      	orrs	r3, r1
 800b82e:	6593      	str	r3, [r2, #88]	@ 0x58
 800b830:	e006      	b.n	800b840 <HAL_RCCEx_PeriphCLKConfig+0xd44>
 800b832:	bf00      	nop
 800b834:	58024400 	.word	0x58024400
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b838:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b83c:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM345 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM345) == RCC_PERIPHCLK_LPTIM345)
 800b840:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b844:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b848:	f002 0380 	and.w	r3, r2, #128	@ 0x80
 800b84c:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 800b850:	2300      	movs	r3, #0
 800b852:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800b856:	e9d7 1224 	ldrd	r1, r2, [r7, #144]	@ 0x90
 800b85a:	460b      	mov	r3, r1
 800b85c:	4313      	orrs	r3, r2
 800b85e:	d055      	beq.n	800b90c <HAL_RCCEx_PeriphCLKConfig+0xe10>
  {
    switch (PeriphClkInit->Lptim345ClockSelection)
 800b860:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b864:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 800b868:	f5b3 4f20 	cmp.w	r3, #40960	@ 0xa000
 800b86c:	d033      	beq.n	800b8d6 <HAL_RCCEx_PeriphCLKConfig+0xdda>
 800b86e:	f5b3 4f20 	cmp.w	r3, #40960	@ 0xa000
 800b872:	d82c      	bhi.n	800b8ce <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800b874:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800b878:	d02f      	beq.n	800b8da <HAL_RCCEx_PeriphCLKConfig+0xdde>
 800b87a:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800b87e:	d826      	bhi.n	800b8ce <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800b880:	f5b3 4fc0 	cmp.w	r3, #24576	@ 0x6000
 800b884:	d02b      	beq.n	800b8de <HAL_RCCEx_PeriphCLKConfig+0xde2>
 800b886:	f5b3 4fc0 	cmp.w	r3, #24576	@ 0x6000
 800b88a:	d820      	bhi.n	800b8ce <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800b88c:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800b890:	d012      	beq.n	800b8b8 <HAL_RCCEx_PeriphCLKConfig+0xdbc>
 800b892:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800b896:	d81a      	bhi.n	800b8ce <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800b898:	2b00      	cmp	r3, #0
 800b89a:	d022      	beq.n	800b8e2 <HAL_RCCEx_PeriphCLKConfig+0xde6>
 800b89c:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800b8a0:	d115      	bne.n	800b8ce <HAL_RCCEx_PeriphCLKConfig+0xdd2>
      case RCC_LPTIM345CLKSOURCE_PCLK4:      /* SRD/D3 PCLK1 (PCLK4) as clock source for LPTIM3/4/5 */
        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM345CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM3/4/5 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b8a2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b8a6:	3308      	adds	r3, #8
 800b8a8:	2100      	movs	r1, #0
 800b8aa:	4618      	mov	r0, r3
 800b8ac:	f000 fdd2 	bl	800c454 <RCCEx_PLL2_Config>
 800b8b0:	4603      	mov	r3, r0
 800b8b2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;
 800b8b6:	e015      	b.n	800b8e4 <HAL_RCCEx_PeriphCLKConfig+0xde8>

      case RCC_LPTIM345CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM3/4/5 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800b8b8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b8bc:	3328      	adds	r3, #40	@ 0x28
 800b8be:	2102      	movs	r1, #2
 800b8c0:	4618      	mov	r0, r3
 800b8c2:	f000 fe79 	bl	800c5b8 <RCCEx_PLL3_Config>
 800b8c6:	4603      	mov	r3, r0
 800b8c8:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;
 800b8cc:	e00a      	b.n	800b8e4 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM3/4/5 clock */
        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b8ce:	2301      	movs	r3, #1
 800b8d0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b8d4:	e006      	b.n	800b8e4 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800b8d6:	bf00      	nop
 800b8d8:	e004      	b.n	800b8e4 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800b8da:	bf00      	nop
 800b8dc:	e002      	b.n	800b8e4 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800b8de:	bf00      	nop
 800b8e0:	e000      	b.n	800b8e4 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800b8e2:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b8e4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b8e8:	2b00      	cmp	r3, #0
 800b8ea:	d10b      	bne.n	800b904 <HAL_RCCEx_PeriphCLKConfig+0xe08>
    {
      /* Set the source of LPTIM3/4/5 clock */
      __HAL_RCC_LPTIM345_CONFIG(PeriphClkInit->Lptim345ClockSelection);
 800b8ec:	4bbb      	ldr	r3, [pc, #748]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b8ee:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b8f0:	f423 4160 	bic.w	r1, r3, #57344	@ 0xe000
 800b8f4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b8f8:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 800b8fc:	4ab7      	ldr	r2, [pc, #732]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b8fe:	430b      	orrs	r3, r1
 800b900:	6593      	str	r3, [r2, #88]	@ 0x58
 800b902:	e003      	b.n	800b90c <HAL_RCCEx_PeriphCLKConfig+0xe10>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b904:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b908:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e

    __HAL_RCC_I2C1235_CONFIG(PeriphClkInit->I2c1235ClockSelection);

  }
#else
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C123) == RCC_PERIPHCLK_I2C123)
 800b90c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b910:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b914:	f002 0308 	and.w	r3, r2, #8
 800b918:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
 800b91c:	2300      	movs	r3, #0
 800b91e:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
 800b922:	e9d7 1222 	ldrd	r1, r2, [r7, #136]	@ 0x88
 800b926:	460b      	mov	r3, r1
 800b928:	4313      	orrs	r3, r2
 800b92a:	d01e      	beq.n	800b96a <HAL_RCCEx_PeriphCLKConfig+0xe6e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_I2C123CLKSOURCE(PeriphClkInit->I2c123ClockSelection));

    if ((PeriphClkInit->I2c123ClockSelection) == RCC_I2C123CLKSOURCE_PLL3)
 800b92c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b930:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800b934:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800b938:	d10c      	bne.n	800b954 <HAL_RCCEx_PeriphCLKConfig+0xe58>
    {
      if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK)
 800b93a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b93e:	3328      	adds	r3, #40	@ 0x28
 800b940:	2102      	movs	r1, #2
 800b942:	4618      	mov	r0, r3
 800b944:	f000 fe38 	bl	800c5b8 <RCCEx_PLL3_Config>
 800b948:	4603      	mov	r3, r0
 800b94a:	2b00      	cmp	r3, #0
 800b94c:	d002      	beq.n	800b954 <HAL_RCCEx_PeriphCLKConfig+0xe58>
      {
        status = HAL_ERROR;
 800b94e:	2301      	movs	r3, #1
 800b950:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
      }
    }

    __HAL_RCC_I2C123_CONFIG(PeriphClkInit->I2c123ClockSelection);
 800b954:	4ba1      	ldr	r3, [pc, #644]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b956:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800b958:	f423 5140 	bic.w	r1, r3, #12288	@ 0x3000
 800b95c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b960:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800b964:	4a9d      	ldr	r2, [pc, #628]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b966:	430b      	orrs	r3, r1
 800b968:	6553      	str	r3, [r2, #84]	@ 0x54

  }
#endif /* I2C5 */

  /*------------------------------ I2C4 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
 800b96a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b96e:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b972:	f002 0310 	and.w	r3, r2, #16
 800b976:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800b97a:	2300      	movs	r3, #0
 800b97c:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800b980:	e9d7 1220 	ldrd	r1, r2, [r7, #128]	@ 0x80
 800b984:	460b      	mov	r3, r1
 800b986:	4313      	orrs	r3, r2
 800b988:	d01e      	beq.n	800b9c8 <HAL_RCCEx_PeriphCLKConfig+0xecc>
  {
    /* Check the parameters */
    assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));

    if ((PeriphClkInit->I2c4ClockSelection) == RCC_I2C4CLKSOURCE_PLL3)
 800b98a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b98e:	f8d3 3098 	ldr.w	r3, [r3, #152]	@ 0x98
 800b992:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800b996:	d10c      	bne.n	800b9b2 <HAL_RCCEx_PeriphCLKConfig+0xeb6>
    {
      if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK)
 800b998:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b99c:	3328      	adds	r3, #40	@ 0x28
 800b99e:	2102      	movs	r1, #2
 800b9a0:	4618      	mov	r0, r3
 800b9a2:	f000 fe09 	bl	800c5b8 <RCCEx_PLL3_Config>
 800b9a6:	4603      	mov	r3, r0
 800b9a8:	2b00      	cmp	r3, #0
 800b9aa:	d002      	beq.n	800b9b2 <HAL_RCCEx_PeriphCLKConfig+0xeb6>
      {
        status = HAL_ERROR;
 800b9ac:	2301      	movs	r3, #1
 800b9ae:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
      }
    }

    __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
 800b9b2:	4b8a      	ldr	r3, [pc, #552]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b9b4:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b9b6:	f423 7140 	bic.w	r1, r3, #768	@ 0x300
 800b9ba:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b9be:	f8d3 3098 	ldr.w	r3, [r3, #152]	@ 0x98
 800b9c2:	4a86      	ldr	r2, [pc, #536]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b9c4:	430b      	orrs	r3, r1
 800b9c6:	6593      	str	r3, [r2, #88]	@ 0x58

  }

  /*---------------------------- ADC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
 800b9c8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b9cc:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b9d0:	f402 2300 	and.w	r3, r2, #524288	@ 0x80000
 800b9d4:	67bb      	str	r3, [r7, #120]	@ 0x78
 800b9d6:	2300      	movs	r3, #0
 800b9d8:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800b9da:	e9d7 121e 	ldrd	r1, r2, [r7, #120]	@ 0x78
 800b9de:	460b      	mov	r3, r1
 800b9e0:	4313      	orrs	r3, r2
 800b9e2:	d03e      	beq.n	800ba62 <HAL_RCCEx_PeriphCLKConfig+0xf66>
  {
    switch (PeriphClkInit->AdcClockSelection)
 800b9e4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b9e8:	f8d3 30a4 	ldr.w	r3, [r3, #164]	@ 0xa4
 800b9ec:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800b9f0:	d022      	beq.n	800ba38 <HAL_RCCEx_PeriphCLKConfig+0xf3c>
 800b9f2:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800b9f6:	d81b      	bhi.n	800ba30 <HAL_RCCEx_PeriphCLKConfig+0xf34>
 800b9f8:	2b00      	cmp	r3, #0
 800b9fa:	d003      	beq.n	800ba04 <HAL_RCCEx_PeriphCLKConfig+0xf08>
 800b9fc:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800ba00:	d00b      	beq.n	800ba1a <HAL_RCCEx_PeriphCLKConfig+0xf1e>
 800ba02:	e015      	b.n	800ba30 <HAL_RCCEx_PeriphCLKConfig+0xf34>
    {

      case RCC_ADCCLKSOURCE_PLL2: /* PLL2 is used as clock source for ADC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800ba04:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba08:	3308      	adds	r3, #8
 800ba0a:	2100      	movs	r1, #0
 800ba0c:	4618      	mov	r0, r3
 800ba0e:	f000 fd21 	bl	800c454 <RCCEx_PLL2_Config>
 800ba12:	4603      	mov	r3, r0
 800ba14:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* ADC clock source configuration done later after clock selection check */
        break;
 800ba18:	e00f      	b.n	800ba3a <HAL_RCCEx_PeriphCLKConfig+0xf3e>

      case RCC_ADCCLKSOURCE_PLL3:  /* PLL3 is used as clock source for ADC*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800ba1a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba1e:	3328      	adds	r3, #40	@ 0x28
 800ba20:	2102      	movs	r1, #2
 800ba22:	4618      	mov	r0, r3
 800ba24:	f000 fdc8 	bl	800c5b8 <RCCEx_PLL3_Config>
 800ba28:	4603      	mov	r3, r0
 800ba2a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* ADC clock source configuration done later after clock selection check */
        break;
 800ba2e:	e004      	b.n	800ba3a <HAL_RCCEx_PeriphCLKConfig+0xf3e>
        /* HSI, HSE, or CSI oscillator is used as source of ADC clock */
        /* ADC clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800ba30:	2301      	movs	r3, #1
 800ba32:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800ba36:	e000      	b.n	800ba3a <HAL_RCCEx_PeriphCLKConfig+0xf3e>
        break;
 800ba38:	bf00      	nop
    }

    if (ret == HAL_OK)
 800ba3a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ba3e:	2b00      	cmp	r3, #0
 800ba40:	d10b      	bne.n	800ba5a <HAL_RCCEx_PeriphCLKConfig+0xf5e>
    {
      /* Set the source of ADC clock*/
      __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
 800ba42:	4b66      	ldr	r3, [pc, #408]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800ba44:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800ba46:	f423 3140 	bic.w	r1, r3, #196608	@ 0x30000
 800ba4a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba4e:	f8d3 30a4 	ldr.w	r3, [r3, #164]	@ 0xa4
 800ba52:	4a62      	ldr	r2, [pc, #392]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800ba54:	430b      	orrs	r3, r1
 800ba56:	6593      	str	r3, [r2, #88]	@ 0x58
 800ba58:	e003      	b.n	800ba62 <HAL_RCCEx_PeriphCLKConfig+0xf66>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800ba5a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ba5e:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*------------------------------ USB Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
 800ba62:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba66:	e9d3 2300 	ldrd	r2, r3, [r3]
 800ba6a:	f402 2380 	and.w	r3, r2, #262144	@ 0x40000
 800ba6e:	673b      	str	r3, [r7, #112]	@ 0x70
 800ba70:	2300      	movs	r3, #0
 800ba72:	677b      	str	r3, [r7, #116]	@ 0x74
 800ba74:	e9d7 121c 	ldrd	r1, r2, [r7, #112]	@ 0x70
 800ba78:	460b      	mov	r3, r1
 800ba7a:	4313      	orrs	r3, r2
 800ba7c:	d03b      	beq.n	800baf6 <HAL_RCCEx_PeriphCLKConfig+0xffa>
  {

    switch (PeriphClkInit->UsbClockSelection)
 800ba7e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba82:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800ba86:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800ba8a:	d01f      	beq.n	800bacc <HAL_RCCEx_PeriphCLKConfig+0xfd0>
 800ba8c:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800ba90:	d818      	bhi.n	800bac4 <HAL_RCCEx_PeriphCLKConfig+0xfc8>
 800ba92:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800ba96:	d003      	beq.n	800baa0 <HAL_RCCEx_PeriphCLKConfig+0xfa4>
 800ba98:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800ba9c:	d007      	beq.n	800baae <HAL_RCCEx_PeriphCLKConfig+0xfb2>
 800ba9e:	e011      	b.n	800bac4 <HAL_RCCEx_PeriphCLKConfig+0xfc8>
    {
      case RCC_USBCLKSOURCE_PLL:      /* PLL is used as clock source for USB*/
        /* Enable USB Clock output generated form System USB . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800baa0:	4b4e      	ldr	r3, [pc, #312]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800baa2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800baa4:	4a4d      	ldr	r2, [pc, #308]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800baa6:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800baaa:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* USB clock source configuration done later after clock selection check */
        break;
 800baac:	e00f      	b.n	800bace <HAL_RCCEx_PeriphCLKConfig+0xfd2>

      case RCC_USBCLKSOURCE_PLL3: /* PLL3 is used as clock source for USB*/

        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800baae:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bab2:	3328      	adds	r3, #40	@ 0x28
 800bab4:	2101      	movs	r1, #1
 800bab6:	4618      	mov	r0, r3
 800bab8:	f000 fd7e 	bl	800c5b8 <RCCEx_PLL3_Config>
 800babc:	4603      	mov	r3, r0
 800babe:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* USB clock source configuration done later after clock selection check */
        break;
 800bac2:	e004      	b.n	800bace <HAL_RCCEx_PeriphCLKConfig+0xfd2>
        /* HSI48 oscillator is used as source of USB clock */
        /* USB clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800bac4:	2301      	movs	r3, #1
 800bac6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800baca:	e000      	b.n	800bace <HAL_RCCEx_PeriphCLKConfig+0xfd2>
        break;
 800bacc:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bace:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bad2:	2b00      	cmp	r3, #0
 800bad4:	d10b      	bne.n	800baee <HAL_RCCEx_PeriphCLKConfig+0xff2>
    {
      /* Set the source of USB clock*/
      __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 800bad6:	4b41      	ldr	r3, [pc, #260]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bad8:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800bada:	f423 1140 	bic.w	r1, r3, #3145728	@ 0x300000
 800bade:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bae2:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800bae6:	4a3d      	ldr	r2, [pc, #244]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bae8:	430b      	orrs	r3, r1
 800baea:	6553      	str	r3, [r2, #84]	@ 0x54
 800baec:	e003      	b.n	800baf6 <HAL_RCCEx_PeriphCLKConfig+0xffa>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800baee:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800baf2:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }

  }

  /*------------------------------------- SDMMC Configuration ------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC) == RCC_PERIPHCLK_SDMMC)
 800baf6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bafa:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bafe:	f402 3380 	and.w	r3, r2, #65536	@ 0x10000
 800bb02:	66bb      	str	r3, [r7, #104]	@ 0x68
 800bb04:	2300      	movs	r3, #0
 800bb06:	66fb      	str	r3, [r7, #108]	@ 0x6c
 800bb08:	e9d7 121a 	ldrd	r1, r2, [r7, #104]	@ 0x68
 800bb0c:	460b      	mov	r3, r1
 800bb0e:	4313      	orrs	r3, r2
 800bb10:	d031      	beq.n	800bb76 <HAL_RCCEx_PeriphCLKConfig+0x107a>
  {
    /* Check the parameters */
    assert_param(IS_RCC_SDMMC(PeriphClkInit->SdmmcClockSelection));

    switch (PeriphClkInit->SdmmcClockSelection)
 800bb12:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb16:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800bb18:	2b00      	cmp	r3, #0
 800bb1a:	d003      	beq.n	800bb24 <HAL_RCCEx_PeriphCLKConfig+0x1028>
 800bb1c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800bb20:	d007      	beq.n	800bb32 <HAL_RCCEx_PeriphCLKConfig+0x1036>
 800bb22:	e011      	b.n	800bb48 <HAL_RCCEx_PeriphCLKConfig+0x104c>
    {
      case RCC_SDMMCCLKSOURCE_PLL:      /* PLL is used as clock source for SDMMC*/
        /* Enable SDMMC Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800bb24:	4b2d      	ldr	r3, [pc, #180]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bb26:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800bb28:	4a2c      	ldr	r2, [pc, #176]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bb2a:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800bb2e:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SDMMC clock source configuration done later after clock selection check */
        break;
 800bb30:	e00e      	b.n	800bb50 <HAL_RCCEx_PeriphCLKConfig+0x1054>

      case RCC_SDMMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for SDMMC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800bb32:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb36:	3308      	adds	r3, #8
 800bb38:	2102      	movs	r1, #2
 800bb3a:	4618      	mov	r0, r3
 800bb3c:	f000 fc8a 	bl	800c454 <RCCEx_PLL2_Config>
 800bb40:	4603      	mov	r3, r0
 800bb42:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SDMMC clock source configuration done later after clock selection check */
        break;
 800bb46:	e003      	b.n	800bb50 <HAL_RCCEx_PeriphCLKConfig+0x1054>

      default:
        ret = HAL_ERROR;
 800bb48:	2301      	movs	r3, #1
 800bb4a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bb4e:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bb50:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bb54:	2b00      	cmp	r3, #0
 800bb56:	d10a      	bne.n	800bb6e <HAL_RCCEx_PeriphCLKConfig+0x1072>
    {
      /* Set the source of SDMMC clock*/
      __HAL_RCC_SDMMC_CONFIG(PeriphClkInit->SdmmcClockSelection);
 800bb58:	4b20      	ldr	r3, [pc, #128]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bb5a:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800bb5c:	f423 3180 	bic.w	r1, r3, #65536	@ 0x10000
 800bb60:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb64:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800bb66:	4a1d      	ldr	r2, [pc, #116]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bb68:	430b      	orrs	r3, r1
 800bb6a:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800bb6c:	e003      	b.n	800bb76 <HAL_RCCEx_PeriphCLKConfig+0x107a>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bb6e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bb72:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif /* LTDC */

  /*------------------------------ RNG Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG)
 800bb76:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb7a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bb7e:	f402 3300 	and.w	r3, r2, #131072	@ 0x20000
 800bb82:	663b      	str	r3, [r7, #96]	@ 0x60
 800bb84:	2300      	movs	r3, #0
 800bb86:	667b      	str	r3, [r7, #100]	@ 0x64
 800bb88:	e9d7 1218 	ldrd	r1, r2, [r7, #96]	@ 0x60
 800bb8c:	460b      	mov	r3, r1
 800bb8e:	4313      	orrs	r3, r2
 800bb90:	d03b      	beq.n	800bc0a <HAL_RCCEx_PeriphCLKConfig+0x110e>
  {

    switch (PeriphClkInit->RngClockSelection)
 800bb92:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb96:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800bb9a:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800bb9e:	d018      	beq.n	800bbd2 <HAL_RCCEx_PeriphCLKConfig+0x10d6>
 800bba0:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800bba4:	d811      	bhi.n	800bbca <HAL_RCCEx_PeriphCLKConfig+0x10ce>
 800bba6:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 800bbaa:	d014      	beq.n	800bbd6 <HAL_RCCEx_PeriphCLKConfig+0x10da>
 800bbac:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 800bbb0:	d80b      	bhi.n	800bbca <HAL_RCCEx_PeriphCLKConfig+0x10ce>
 800bbb2:	2b00      	cmp	r3, #0
 800bbb4:	d014      	beq.n	800bbe0 <HAL_RCCEx_PeriphCLKConfig+0x10e4>
 800bbb6:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800bbba:	d106      	bne.n	800bbca <HAL_RCCEx_PeriphCLKConfig+0x10ce>
    {
      case RCC_RNGCLKSOURCE_PLL:     /* PLL is used as clock source for RNG*/
        /* Enable RNG Clock output generated form System RNG . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800bbbc:	4b07      	ldr	r3, [pc, #28]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bbbe:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800bbc0:	4a06      	ldr	r2, [pc, #24]	@ (800bbdc <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bbc2:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800bbc6:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* RNG clock source configuration done later after clock selection check */
        break;
 800bbc8:	e00b      	b.n	800bbe2 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        /* HSI48 oscillator is used as source of RNG clock */
        /* RNG clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800bbca:	2301      	movs	r3, #1
 800bbcc:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bbd0:	e007      	b.n	800bbe2 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        break;
 800bbd2:	bf00      	nop
 800bbd4:	e005      	b.n	800bbe2 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        break;
 800bbd6:	bf00      	nop
 800bbd8:	e003      	b.n	800bbe2 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
 800bbda:	bf00      	nop
 800bbdc:	58024400 	.word	0x58024400
        break;
 800bbe0:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bbe2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bbe6:	2b00      	cmp	r3, #0
 800bbe8:	d10b      	bne.n	800bc02 <HAL_RCCEx_PeriphCLKConfig+0x1106>
    {
      /* Set the source of RNG clock*/
      __HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection);
 800bbea:	4bba      	ldr	r3, [pc, #744]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bbec:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800bbee:	f423 7140 	bic.w	r1, r3, #768	@ 0x300
 800bbf2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bbf6:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800bbfa:	4ab6      	ldr	r2, [pc, #728]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bbfc:	430b      	orrs	r3, r1
 800bbfe:	6553      	str	r3, [r2, #84]	@ 0x54
 800bc00:	e003      	b.n	800bc0a <HAL_RCCEx_PeriphCLKConfig+0x110e>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bc02:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bc06:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }

  }

  /*------------------------------ SWPMI1 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1)
 800bc0a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc0e:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bc12:	f402 1380 	and.w	r3, r2, #1048576	@ 0x100000
 800bc16:	65bb      	str	r3, [r7, #88]	@ 0x58
 800bc18:	2300      	movs	r3, #0
 800bc1a:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800bc1c:	e9d7 1216 	ldrd	r1, r2, [r7, #88]	@ 0x58
 800bc20:	460b      	mov	r3, r1
 800bc22:	4313      	orrs	r3, r2
 800bc24:	d009      	beq.n	800bc3a <HAL_RCCEx_PeriphCLKConfig+0x113e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_SWPMI1CLKSOURCE(PeriphClkInit->Swpmi1ClockSelection));

    /* Configure the SWPMI1 interface clock source */
    __HAL_RCC_SWPMI1_CONFIG(PeriphClkInit->Swpmi1ClockSelection);
 800bc26:	4bab      	ldr	r3, [pc, #684]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bc28:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800bc2a:	f023 4100 	bic.w	r1, r3, #2147483648	@ 0x80000000
 800bc2e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc32:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800bc34:	4aa7      	ldr	r2, [pc, #668]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bc36:	430b      	orrs	r3, r1
 800bc38:	6513      	str	r3, [r2, #80]	@ 0x50
  }
#if defined(HRTIM1)
  /*------------------------------ HRTIM1 clock Configuration ----------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_HRTIM1) == RCC_PERIPHCLK_HRTIM1)
 800bc3a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc3e:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bc42:	f002 5380 	and.w	r3, r2, #268435456	@ 0x10000000
 800bc46:	653b      	str	r3, [r7, #80]	@ 0x50
 800bc48:	2300      	movs	r3, #0
 800bc4a:	657b      	str	r3, [r7, #84]	@ 0x54
 800bc4c:	e9d7 1214 	ldrd	r1, r2, [r7, #80]	@ 0x50
 800bc50:	460b      	mov	r3, r1
 800bc52:	4313      	orrs	r3, r2
 800bc54:	d00a      	beq.n	800bc6c <HAL_RCCEx_PeriphCLKConfig+0x1170>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HRTIM1CLKSOURCE(PeriphClkInit->Hrtim1ClockSelection));

    /* Configure the HRTIM1 clock source */
    __HAL_RCC_HRTIM1_CONFIG(PeriphClkInit->Hrtim1ClockSelection);
 800bc56:	4b9f      	ldr	r3, [pc, #636]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bc58:	691b      	ldr	r3, [r3, #16]
 800bc5a:	f423 4180 	bic.w	r1, r3, #16384	@ 0x4000
 800bc5e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc62:	f8d3 30b8 	ldr.w	r3, [r3, #184]	@ 0xb8
 800bc66:	4a9b      	ldr	r2, [pc, #620]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bc68:	430b      	orrs	r3, r1
 800bc6a:	6113      	str	r3, [r2, #16]
  }
#endif  /*HRTIM1*/
  /*------------------------------ DFSDM1 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1)
 800bc6c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc70:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bc74:	f402 1300 	and.w	r3, r2, #2097152	@ 0x200000
 800bc78:	64bb      	str	r3, [r7, #72]	@ 0x48
 800bc7a:	2300      	movs	r3, #0
 800bc7c:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800bc7e:	e9d7 1212 	ldrd	r1, r2, [r7, #72]	@ 0x48
 800bc82:	460b      	mov	r3, r1
 800bc84:	4313      	orrs	r3, r2
 800bc86:	d009      	beq.n	800bc9c <HAL_RCCEx_PeriphCLKConfig+0x11a0>
  {
    /* Check the parameters */
    assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection));

    /* Configure the DFSDM1 interface clock source */
    __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection);
 800bc88:	4b92      	ldr	r3, [pc, #584]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bc8a:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800bc8c:	f023 7180 	bic.w	r1, r3, #16777216	@ 0x1000000
 800bc90:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc94:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800bc96:	4a8f      	ldr	r2, [pc, #572]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bc98:	430b      	orrs	r3, r1
 800bc9a:	6513      	str	r3, [r2, #80]	@ 0x50
    __HAL_RCC_DFSDM2_CONFIG(PeriphClkInit->Dfsdm2ClockSelection);
  }
#endif  /* DFSDM2 */

  /*------------------------------------ TIM configuration --------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == RCC_PERIPHCLK_TIM)
 800bc9c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bca0:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bca4:	f002 4380 	and.w	r3, r2, #1073741824	@ 0x40000000
 800bca8:	643b      	str	r3, [r7, #64]	@ 0x40
 800bcaa:	2300      	movs	r3, #0
 800bcac:	647b      	str	r3, [r7, #68]	@ 0x44
 800bcae:	e9d7 1210 	ldrd	r1, r2, [r7, #64]	@ 0x40
 800bcb2:	460b      	mov	r3, r1
 800bcb4:	4313      	orrs	r3, r2
 800bcb6:	d00e      	beq.n	800bcd6 <HAL_RCCEx_PeriphCLKConfig+0x11da>
  {
    /* Check the parameters */
    assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection));

    /* Configure Timer Prescaler */
    __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
 800bcb8:	4b86      	ldr	r3, [pc, #536]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bcba:	691b      	ldr	r3, [r3, #16]
 800bcbc:	4a85      	ldr	r2, [pc, #532]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bcbe:	f423 4300 	bic.w	r3, r3, #32768	@ 0x8000
 800bcc2:	6113      	str	r3, [r2, #16]
 800bcc4:	4b83      	ldr	r3, [pc, #524]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bcc6:	6919      	ldr	r1, [r3, #16]
 800bcc8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bccc:	f8d3 30bc 	ldr.w	r3, [r3, #188]	@ 0xbc
 800bcd0:	4a80      	ldr	r2, [pc, #512]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bcd2:	430b      	orrs	r3, r1
 800bcd4:	6113      	str	r3, [r2, #16]
  }

  /*------------------------------------ CKPER configuration --------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CKPER) == RCC_PERIPHCLK_CKPER)
 800bcd6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bcda:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bcde:	f002 4300 	and.w	r3, r2, #2147483648	@ 0x80000000
 800bce2:	63bb      	str	r3, [r7, #56]	@ 0x38
 800bce4:	2300      	movs	r3, #0
 800bce6:	63fb      	str	r3, [r7, #60]	@ 0x3c
 800bce8:	e9d7 120e 	ldrd	r1, r2, [r7, #56]	@ 0x38
 800bcec:	460b      	mov	r3, r1
 800bcee:	4313      	orrs	r3, r2
 800bcf0:	d009      	beq.n	800bd06 <HAL_RCCEx_PeriphCLKConfig+0x120a>
  {
    /* Check the parameters */
    assert_param(IS_RCC_CLKPSOURCE(PeriphClkInit->CkperClockSelection));

    /* Configure the CKPER clock source */
    __HAL_RCC_CLKP_CONFIG(PeriphClkInit->CkperClockSelection);
 800bcf2:	4b78      	ldr	r3, [pc, #480]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bcf4:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800bcf6:	f023 5140 	bic.w	r1, r3, #805306368	@ 0x30000000
 800bcfa:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bcfe:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800bd00:	4a74      	ldr	r2, [pc, #464]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bd02:	430b      	orrs	r3, r1
 800bd04:	64d3      	str	r3, [r2, #76]	@ 0x4c
  }

  /*------------------------------ CEC Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
 800bd06:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd0a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bd0e:	f402 0300 	and.w	r3, r2, #8388608	@ 0x800000
 800bd12:	633b      	str	r3, [r7, #48]	@ 0x30
 800bd14:	2300      	movs	r3, #0
 800bd16:	637b      	str	r3, [r7, #52]	@ 0x34
 800bd18:	e9d7 120c 	ldrd	r1, r2, [r7, #48]	@ 0x30
 800bd1c:	460b      	mov	r3, r1
 800bd1e:	4313      	orrs	r3, r2
 800bd20:	d00a      	beq.n	800bd38 <HAL_RCCEx_PeriphCLKConfig+0x123c>
  {
    /* Check the parameters */
    assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));

    /* Configure the CEC interface clock source */
    __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
 800bd22:	4b6c      	ldr	r3, [pc, #432]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bd24:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800bd26:	f423 0140 	bic.w	r1, r3, #12582912	@ 0xc00000
 800bd2a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd2e:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800bd32:	4a68      	ldr	r2, [pc, #416]	@ (800bed4 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800bd34:	430b      	orrs	r3, r1
 800bd36:	6553      	str	r3, [r2, #84]	@ 0x54
  }

  /*---------------------------- PLL2 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVP) == RCC_PERIPHCLK_PLL2_DIVP)
 800bd38:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd3c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bd40:	2100      	movs	r1, #0
 800bd42:	62b9      	str	r1, [r7, #40]	@ 0x28
 800bd44:	f003 0301 	and.w	r3, r3, #1
 800bd48:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800bd4a:	e9d7 120a 	ldrd	r1, r2, [r7, #40]	@ 0x28
 800bd4e:	460b      	mov	r3, r1
 800bd50:	4313      	orrs	r3, r2
 800bd52:	d011      	beq.n	800bd78 <HAL_RCCEx_PeriphCLKConfig+0x127c>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800bd54:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd58:	3308      	adds	r3, #8
 800bd5a:	2100      	movs	r1, #0
 800bd5c:	4618      	mov	r0, r3
 800bd5e:	f000 fb79 	bl	800c454 <RCCEx_PLL2_Config>
 800bd62:	4603      	mov	r3, r0
 800bd64:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800bd68:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bd6c:	2b00      	cmp	r3, #0
 800bd6e:	d003      	beq.n	800bd78 <HAL_RCCEx_PeriphCLKConfig+0x127c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bd70:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bd74:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    } 
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVQ) == RCC_PERIPHCLK_PLL2_DIVQ)
 800bd78:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd7c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bd80:	2100      	movs	r1, #0
 800bd82:	6239      	str	r1, [r7, #32]
 800bd84:	f003 0302 	and.w	r3, r3, #2
 800bd88:	627b      	str	r3, [r7, #36]	@ 0x24
 800bd8a:	e9d7 1208 	ldrd	r1, r2, [r7, #32]
 800bd8e:	460b      	mov	r3, r1
 800bd90:	4313      	orrs	r3, r2
 800bd92:	d011      	beq.n	800bdb8 <HAL_RCCEx_PeriphCLKConfig+0x12bc>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800bd94:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd98:	3308      	adds	r3, #8
 800bd9a:	2101      	movs	r1, #1
 800bd9c:	4618      	mov	r0, r3
 800bd9e:	f000 fb59 	bl	800c454 <RCCEx_PLL2_Config>
 800bda2:	4603      	mov	r3, r0
 800bda4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800bda8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bdac:	2b00      	cmp	r3, #0
 800bdae:	d003      	beq.n	800bdb8 <HAL_RCCEx_PeriphCLKConfig+0x12bc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bdb0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bdb4:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVR) == RCC_PERIPHCLK_PLL2_DIVR)
 800bdb8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bdbc:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bdc0:	2100      	movs	r1, #0
 800bdc2:	61b9      	str	r1, [r7, #24]
 800bdc4:	f003 0304 	and.w	r3, r3, #4
 800bdc8:	61fb      	str	r3, [r7, #28]
 800bdca:	e9d7 1206 	ldrd	r1, r2, [r7, #24]
 800bdce:	460b      	mov	r3, r1
 800bdd0:	4313      	orrs	r3, r2
 800bdd2:	d011      	beq.n	800bdf8 <HAL_RCCEx_PeriphCLKConfig+0x12fc>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800bdd4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bdd8:	3308      	adds	r3, #8
 800bdda:	2102      	movs	r1, #2
 800bddc:	4618      	mov	r0, r3
 800bdde:	f000 fb39 	bl	800c454 <RCCEx_PLL2_Config>
 800bde2:	4603      	mov	r3, r0
 800bde4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800bde8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bdec:	2b00      	cmp	r3, #0
 800bdee:	d003      	beq.n	800bdf8 <HAL_RCCEx_PeriphCLKConfig+0x12fc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bdf0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bdf4:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  

  /*---------------------------- PLL3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVP) == RCC_PERIPHCLK_PLL3_DIVP)
 800bdf8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bdfc:	e9d3 2300 	ldrd	r2, r3, [r3]
 800be00:	2100      	movs	r1, #0
 800be02:	6139      	str	r1, [r7, #16]
 800be04:	f003 0308 	and.w	r3, r3, #8
 800be08:	617b      	str	r3, [r7, #20]
 800be0a:	e9d7 1204 	ldrd	r1, r2, [r7, #16]
 800be0e:	460b      	mov	r3, r1
 800be10:	4313      	orrs	r3, r2
 800be12:	d011      	beq.n	800be38 <HAL_RCCEx_PeriphCLKConfig+0x133c>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800be14:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be18:	3328      	adds	r3, #40	@ 0x28
 800be1a:	2100      	movs	r1, #0
 800be1c:	4618      	mov	r0, r3
 800be1e:	f000 fbcb 	bl	800c5b8 <RCCEx_PLL3_Config>
 800be22:	4603      	mov	r3, r0
 800be24:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
  
    if (ret == HAL_OK)
 800be28:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800be2c:	2b00      	cmp	r3, #0
 800be2e:	d003      	beq.n	800be38 <HAL_RCCEx_PeriphCLKConfig+0x133c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800be30:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800be34:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVQ) == RCC_PERIPHCLK_PLL3_DIVQ)
 800be38:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be3c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800be40:	2100      	movs	r1, #0
 800be42:	60b9      	str	r1, [r7, #8]
 800be44:	f003 0310 	and.w	r3, r3, #16
 800be48:	60fb      	str	r3, [r7, #12]
 800be4a:	e9d7 1202 	ldrd	r1, r2, [r7, #8]
 800be4e:	460b      	mov	r3, r1
 800be50:	4313      	orrs	r3, r2
 800be52:	d011      	beq.n	800be78 <HAL_RCCEx_PeriphCLKConfig+0x137c>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800be54:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be58:	3328      	adds	r3, #40	@ 0x28
 800be5a:	2101      	movs	r1, #1
 800be5c:	4618      	mov	r0, r3
 800be5e:	f000 fbab 	bl	800c5b8 <RCCEx_PLL3_Config>
 800be62:	4603      	mov	r3, r0
 800be64:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800be68:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800be6c:	2b00      	cmp	r3, #0
 800be6e:	d003      	beq.n	800be78 <HAL_RCCEx_PeriphCLKConfig+0x137c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800be70:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800be74:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVR) == RCC_PERIPHCLK_PLL3_DIVR)
 800be78:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be7c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800be80:	2100      	movs	r1, #0
 800be82:	6039      	str	r1, [r7, #0]
 800be84:	f003 0320 	and.w	r3, r3, #32
 800be88:	607b      	str	r3, [r7, #4]
 800be8a:	e9d7 1200 	ldrd	r1, r2, [r7]
 800be8e:	460b      	mov	r3, r1
 800be90:	4313      	orrs	r3, r2
 800be92:	d011      	beq.n	800beb8 <HAL_RCCEx_PeriphCLKConfig+0x13bc>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800be94:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be98:	3328      	adds	r3, #40	@ 0x28
 800be9a:	2102      	movs	r1, #2
 800be9c:	4618      	mov	r0, r3
 800be9e:	f000 fb8b 	bl	800c5b8 <RCCEx_PLL3_Config>
 800bea2:	4603      	mov	r3, r0
 800bea4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800bea8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800beac:	2b00      	cmp	r3, #0
 800beae:	d003      	beq.n	800beb8 <HAL_RCCEx_PeriphCLKConfig+0x13bc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800beb0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800beb4:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    } 
  }

  if (status == HAL_OK)
 800beb8:	f897 311e 	ldrb.w	r3, [r7, #286]	@ 0x11e
 800bebc:	2b00      	cmp	r3, #0
 800bebe:	d101      	bne.n	800bec4 <HAL_RCCEx_PeriphCLKConfig+0x13c8>
  {
    return HAL_OK;
 800bec0:	2300      	movs	r3, #0
 800bec2:	e000      	b.n	800bec6 <HAL_RCCEx_PeriphCLKConfig+0x13ca>
  }
  return HAL_ERROR;
 800bec4:	2301      	movs	r3, #1
}
 800bec6:	4618      	mov	r0, r3
 800bec8:	f507 7790 	add.w	r7, r7, #288	@ 0x120
 800becc:	46bd      	mov	sp, r7
 800bece:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
 800bed2:	bf00      	nop
 800bed4:	58024400 	.word	0x58024400

0800bed8 <HAL_RCCEx_GetD3PCLK1Freq>:
  * @note   Each time D3PCLK1 changes, this function must be called to update the
  *         right D3PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval D3PCLK1 frequency
  */
uint32_t HAL_RCCEx_GetD3PCLK1Freq(void)
{
 800bed8:	b580      	push	{r7, lr}
 800beda:	af00      	add	r7, sp, #0
#if defined(RCC_D3CFGR_D3PPRE)
  /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->D3CFGR & RCC_D3CFGR_D3PPRE) >> RCC_D3CFGR_D3PPRE_Pos] & 0x1FU));
 800bedc:	f7fe fd70 	bl	800a9c0 <HAL_RCC_GetHCLKFreq>
 800bee0:	4602      	mov	r2, r0
 800bee2:	4b06      	ldr	r3, [pc, #24]	@ (800befc <HAL_RCCEx_GetD3PCLK1Freq+0x24>)
 800bee4:	6a1b      	ldr	r3, [r3, #32]
 800bee6:	091b      	lsrs	r3, r3, #4
 800bee8:	f003 0307 	and.w	r3, r3, #7
 800beec:	4904      	ldr	r1, [pc, #16]	@ (800bf00 <HAL_RCCEx_GetD3PCLK1Freq+0x28>)
 800beee:	5ccb      	ldrb	r3, [r1, r3]
 800bef0:	f003 031f 	and.w	r3, r3, #31
 800bef4:	fa22 f303 	lsr.w	r3, r2, r3
#else
  /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE) >> RCC_SRDCFGR_SRDPPRE_Pos] & 0x1FU));
#endif
}
 800bef8:	4618      	mov	r0, r3
 800befa:	bd80      	pop	{r7, pc}
 800befc:	58024400 	.word	0x58024400
 800bf00:	08030a7c 	.word	0x08030a7c

0800bf04 <HAL_RCCEx_GetPLL2ClockFreq>:
  *         right PLL2CLK value. Otherwise, any configuration based on this function will be incorrect.
  * @param  PLL2_Clocks structure.
  * @retval None
  */
void HAL_RCCEx_GetPLL2ClockFreq(PLL2_ClocksTypeDef *PLL2_Clocks)
{
 800bf04:	b480      	push	{r7}
 800bf06:	b089      	sub	sp, #36	@ 0x24
 800bf08:	af00      	add	r7, sp, #0
 800bf0a:	6078      	str	r0, [r7, #4]
  float_t fracn2, pll2vco;

  /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL2M) * PLL2N
     PLL2xCLK = PLL2_VCO / PLL2x
  */
  pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800bf0c:	4ba1      	ldr	r3, [pc, #644]	@ (800c194 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bf0e:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800bf10:	f003 0303 	and.w	r3, r3, #3
 800bf14:	61bb      	str	r3, [r7, #24]
  pll2m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM2) >> 12);
 800bf16:	4b9f      	ldr	r3, [pc, #636]	@ (800c194 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bf18:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800bf1a:	0b1b      	lsrs	r3, r3, #12
 800bf1c:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800bf20:	617b      	str	r3, [r7, #20]
  pll2fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL2FRACEN) >> RCC_PLLCFGR_PLL2FRACEN_Pos;
 800bf22:	4b9c      	ldr	r3, [pc, #624]	@ (800c194 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bf24:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800bf26:	091b      	lsrs	r3, r3, #4
 800bf28:	f003 0301 	and.w	r3, r3, #1
 800bf2c:	613b      	str	r3, [r7, #16]
  fracn2 = (float_t)(uint32_t)(pll2fracen * ((RCC->PLL2FRACR & RCC_PLL2FRACR_FRACN2) >> 3));
 800bf2e:	4b99      	ldr	r3, [pc, #612]	@ (800c194 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bf30:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800bf32:	08db      	lsrs	r3, r3, #3
 800bf34:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800bf38:	693a      	ldr	r2, [r7, #16]
 800bf3a:	fb02 f303 	mul.w	r3, r2, r3
 800bf3e:	ee07 3a90 	vmov	s15, r3
 800bf42:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bf46:	edc7 7a03 	vstr	s15, [r7, #12]

  if (pll2m != 0U)
 800bf4a:	697b      	ldr	r3, [r7, #20]
 800bf4c:	2b00      	cmp	r3, #0
 800bf4e:	f000 8111 	beq.w	800c174 <HAL_RCCEx_GetPLL2ClockFreq+0x270>
  {
    switch (pllsource)
 800bf52:	69bb      	ldr	r3, [r7, #24]
 800bf54:	2b02      	cmp	r3, #2
 800bf56:	f000 8083 	beq.w	800c060 <HAL_RCCEx_GetPLL2ClockFreq+0x15c>
 800bf5a:	69bb      	ldr	r3, [r7, #24]
 800bf5c:	2b02      	cmp	r3, #2
 800bf5e:	f200 80a1 	bhi.w	800c0a4 <HAL_RCCEx_GetPLL2ClockFreq+0x1a0>
 800bf62:	69bb      	ldr	r3, [r7, #24]
 800bf64:	2b00      	cmp	r3, #0
 800bf66:	d003      	beq.n	800bf70 <HAL_RCCEx_GetPLL2ClockFreq+0x6c>
 800bf68:	69bb      	ldr	r3, [r7, #24]
 800bf6a:	2b01      	cmp	r3, #1
 800bf6c:	d056      	beq.n	800c01c <HAL_RCCEx_GetPLL2ClockFreq+0x118>
 800bf6e:	e099      	b.n	800c0a4 <HAL_RCCEx_GetPLL2ClockFreq+0x1a0>
    {

      case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800bf70:	4b88      	ldr	r3, [pc, #544]	@ (800c194 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bf72:	681b      	ldr	r3, [r3, #0]
 800bf74:	f003 0320 	and.w	r3, r3, #32
 800bf78:	2b00      	cmp	r3, #0
 800bf7a:	d02d      	beq.n	800bfd8 <HAL_RCCEx_GetPLL2ClockFreq+0xd4>
        {
          hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800bf7c:	4b85      	ldr	r3, [pc, #532]	@ (800c194 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bf7e:	681b      	ldr	r3, [r3, #0]
 800bf80:	08db      	lsrs	r3, r3, #3
 800bf82:	f003 0303 	and.w	r3, r3, #3
 800bf86:	4a84      	ldr	r2, [pc, #528]	@ (800c198 <HAL_RCCEx_GetPLL2ClockFreq+0x294>)
 800bf88:	fa22 f303 	lsr.w	r3, r2, r3
 800bf8c:	60bb      	str	r3, [r7, #8]
          pll2vco = ((float_t)hsivalue / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800bf8e:	68bb      	ldr	r3, [r7, #8]
 800bf90:	ee07 3a90 	vmov	s15, r3
 800bf94:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800bf98:	697b      	ldr	r3, [r7, #20]
 800bf9a:	ee07 3a90 	vmov	s15, r3
 800bf9e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bfa2:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800bfa6:	4b7b      	ldr	r3, [pc, #492]	@ (800c194 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bfa8:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800bfaa:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800bfae:	ee07 3a90 	vmov	s15, r3
 800bfb2:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800bfb6:	ed97 6a03 	vldr	s12, [r7, #12]
 800bfba:	eddf 5a78 	vldr	s11, [pc, #480]	@ 800c19c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800bfbe:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800bfc2:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800bfc6:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800bfca:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800bfce:	ee67 7a27 	vmul.f32	s15, s14, s15
 800bfd2:	edc7 7a07 	vstr	s15, [r7, #28]
        }
        else
        {
          pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
        }
        break;
 800bfd6:	e087      	b.n	800c0e8 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>
          pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800bfd8:	697b      	ldr	r3, [r7, #20]
 800bfda:	ee07 3a90 	vmov	s15, r3
 800bfde:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bfe2:	eddf 6a6f 	vldr	s13, [pc, #444]	@ 800c1a0 <HAL_RCCEx_GetPLL2ClockFreq+0x29c>
 800bfe6:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800bfea:	4b6a      	ldr	r3, [pc, #424]	@ (800c194 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bfec:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800bfee:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800bff2:	ee07 3a90 	vmov	s15, r3
 800bff6:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800bffa:	ed97 6a03 	vldr	s12, [r7, #12]
 800bffe:	eddf 5a67 	vldr	s11, [pc, #412]	@ 800c19c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800c002:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c006:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c00a:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c00e:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c012:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c016:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c01a:	e065      	b.n	800c0e8 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
        pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800c01c:	697b      	ldr	r3, [r7, #20]
 800c01e:	ee07 3a90 	vmov	s15, r3
 800c022:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c026:	eddf 6a5f 	vldr	s13, [pc, #380]	@ 800c1a4 <HAL_RCCEx_GetPLL2ClockFreq+0x2a0>
 800c02a:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c02e:	4b59      	ldr	r3, [pc, #356]	@ (800c194 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c030:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c032:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c036:	ee07 3a90 	vmov	s15, r3
 800c03a:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c03e:	ed97 6a03 	vldr	s12, [r7, #12]
 800c042:	eddf 5a56 	vldr	s11, [pc, #344]	@ 800c19c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800c046:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c04a:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c04e:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c052:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c056:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c05a:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c05e:	e043      	b.n	800c0e8 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
        pll2vco = ((float_t)HSE_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800c060:	697b      	ldr	r3, [r7, #20]
 800c062:	ee07 3a90 	vmov	s15, r3
 800c066:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c06a:	eddf 6a4f 	vldr	s13, [pc, #316]	@ 800c1a8 <HAL_RCCEx_GetPLL2ClockFreq+0x2a4>
 800c06e:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c072:	4b48      	ldr	r3, [pc, #288]	@ (800c194 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c074:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c076:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c07a:	ee07 3a90 	vmov	s15, r3
 800c07e:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c082:	ed97 6a03 	vldr	s12, [r7, #12]
 800c086:	eddf 5a45 	vldr	s11, [pc, #276]	@ 800c19c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800c08a:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c08e:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c092:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c096:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c09a:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c09e:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c0a2:	e021      	b.n	800c0e8 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      default:
        pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800c0a4:	697b      	ldr	r3, [r7, #20]
 800c0a6:	ee07 3a90 	vmov	s15, r3
 800c0aa:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c0ae:	eddf 6a3d 	vldr	s13, [pc, #244]	@ 800c1a4 <HAL_RCCEx_GetPLL2ClockFreq+0x2a0>
 800c0b2:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c0b6:	4b37      	ldr	r3, [pc, #220]	@ (800c194 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c0b8:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c0ba:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c0be:	ee07 3a90 	vmov	s15, r3
 800c0c2:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c0c6:	ed97 6a03 	vldr	s12, [r7, #12]
 800c0ca:	eddf 5a34 	vldr	s11, [pc, #208]	@ 800c19c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800c0ce:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c0d2:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c0d6:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c0da:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c0de:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c0e2:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c0e6:	bf00      	nop
    }
    PLL2_Clocks->PLL2_P_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_P2) >> 9)  + (float_t)1)) ;
 800c0e8:	4b2a      	ldr	r3, [pc, #168]	@ (800c194 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c0ea:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c0ec:	0a5b      	lsrs	r3, r3, #9
 800c0ee:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c0f2:	ee07 3a90 	vmov	s15, r3
 800c0f6:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c0fa:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c0fe:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c102:	edd7 6a07 	vldr	s13, [r7, #28]
 800c106:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800c10a:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800c10e:	ee17 2a90 	vmov	r2, s15
 800c112:	687b      	ldr	r3, [r7, #4]
 800c114:	601a      	str	r2, [r3, #0]
    PLL2_Clocks->PLL2_Q_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_Q2) >> 16) + (float_t)1)) ;
 800c116:	4b1f      	ldr	r3, [pc, #124]	@ (800c194 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c118:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c11a:	0c1b      	lsrs	r3, r3, #16
 800c11c:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c120:	ee07 3a90 	vmov	s15, r3
 800c124:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c128:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c12c:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c130:	edd7 6a07 	vldr	s13, [r7, #28]
 800c134:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800c138:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800c13c:	ee17 2a90 	vmov	r2, s15
 800c140:	687b      	ldr	r3, [r7, #4]
 800c142:	605a      	str	r2, [r3, #4]
    PLL2_Clocks->PLL2_R_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_R2) >> 24) + (float_t)1)) ;
 800c144:	4b13      	ldr	r3, [pc, #76]	@ (800c194 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c146:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c148:	0e1b      	lsrs	r3, r3, #24
 800c14a:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c14e:	ee07 3a90 	vmov	s15, r3
 800c152:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c156:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c15a:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c15e:	edd7 6a07 	vldr	s13, [r7, #28]
 800c162:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800c166:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800c16a:	ee17 2a90 	vmov	r2, s15
 800c16e:	687b      	ldr	r3, [r7, #4]
 800c170:	609a      	str	r2, [r3, #8]
  {
    PLL2_Clocks->PLL2_P_Frequency = 0U;
    PLL2_Clocks->PLL2_Q_Frequency = 0U;
    PLL2_Clocks->PLL2_R_Frequency = 0U;
  }
}
 800c172:	e008      	b.n	800c186 <HAL_RCCEx_GetPLL2ClockFreq+0x282>
    PLL2_Clocks->PLL2_P_Frequency = 0U;
 800c174:	687b      	ldr	r3, [r7, #4]
 800c176:	2200      	movs	r2, #0
 800c178:	601a      	str	r2, [r3, #0]
    PLL2_Clocks->PLL2_Q_Frequency = 0U;
 800c17a:	687b      	ldr	r3, [r7, #4]
 800c17c:	2200      	movs	r2, #0
 800c17e:	605a      	str	r2, [r3, #4]
    PLL2_Clocks->PLL2_R_Frequency = 0U;
 800c180:	687b      	ldr	r3, [r7, #4]
 800c182:	2200      	movs	r2, #0
 800c184:	609a      	str	r2, [r3, #8]
}
 800c186:	bf00      	nop
 800c188:	3724      	adds	r7, #36	@ 0x24
 800c18a:	46bd      	mov	sp, r7
 800c18c:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c190:	4770      	bx	lr
 800c192:	bf00      	nop
 800c194:	58024400 	.word	0x58024400
 800c198:	03d09000 	.word	0x03d09000
 800c19c:	46000000 	.word	0x46000000
 800c1a0:	4c742400 	.word	0x4c742400
 800c1a4:	4a742400 	.word	0x4a742400
 800c1a8:	4bbebc20 	.word	0x4bbebc20

0800c1ac <HAL_RCCEx_GetPLL3ClockFreq>:
  *         right PLL3CLK value. Otherwise, any configuration based on this function will be incorrect.
  * @param  PLL3_Clocks structure.
  * @retval None
  */
void HAL_RCCEx_GetPLL3ClockFreq(PLL3_ClocksTypeDef *PLL3_Clocks)
{
 800c1ac:	b480      	push	{r7}
 800c1ae:	b089      	sub	sp, #36	@ 0x24
 800c1b0:	af00      	add	r7, sp, #0
 800c1b2:	6078      	str	r0, [r7, #4]
  float_t fracn3, pll3vco;

  /* PLL3_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL3M) * PLL3N
     PLL3xCLK = PLL3_VCO / PLLxR
  */
  pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800c1b4:	4ba1      	ldr	r3, [pc, #644]	@ (800c43c <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c1b6:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c1b8:	f003 0303 	and.w	r3, r3, #3
 800c1bc:	61bb      	str	r3, [r7, #24]
  pll3m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM3) >> 20)  ;
 800c1be:	4b9f      	ldr	r3, [pc, #636]	@ (800c43c <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c1c0:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c1c2:	0d1b      	lsrs	r3, r3, #20
 800c1c4:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800c1c8:	617b      	str	r3, [r7, #20]
  pll3fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL3FRACEN) >> RCC_PLLCFGR_PLL3FRACEN_Pos;
 800c1ca:	4b9c      	ldr	r3, [pc, #624]	@ (800c43c <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c1cc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c1ce:	0a1b      	lsrs	r3, r3, #8
 800c1d0:	f003 0301 	and.w	r3, r3, #1
 800c1d4:	613b      	str	r3, [r7, #16]
  fracn3 = (float_t)(uint32_t)(pll3fracen * ((RCC->PLL3FRACR & RCC_PLL3FRACR_FRACN3) >> 3));
 800c1d6:	4b99      	ldr	r3, [pc, #612]	@ (800c43c <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c1d8:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800c1da:	08db      	lsrs	r3, r3, #3
 800c1dc:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800c1e0:	693a      	ldr	r2, [r7, #16]
 800c1e2:	fb02 f303 	mul.w	r3, r2, r3
 800c1e6:	ee07 3a90 	vmov	s15, r3
 800c1ea:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c1ee:	edc7 7a03 	vstr	s15, [r7, #12]

  if (pll3m != 0U)
 800c1f2:	697b      	ldr	r3, [r7, #20]
 800c1f4:	2b00      	cmp	r3, #0
 800c1f6:	f000 8111 	beq.w	800c41c <HAL_RCCEx_GetPLL3ClockFreq+0x270>
  {
    switch (pllsource)
 800c1fa:	69bb      	ldr	r3, [r7, #24]
 800c1fc:	2b02      	cmp	r3, #2
 800c1fe:	f000 8083 	beq.w	800c308 <HAL_RCCEx_GetPLL3ClockFreq+0x15c>
 800c202:	69bb      	ldr	r3, [r7, #24]
 800c204:	2b02      	cmp	r3, #2
 800c206:	f200 80a1 	bhi.w	800c34c <HAL_RCCEx_GetPLL3ClockFreq+0x1a0>
 800c20a:	69bb      	ldr	r3, [r7, #24]
 800c20c:	2b00      	cmp	r3, #0
 800c20e:	d003      	beq.n	800c218 <HAL_RCCEx_GetPLL3ClockFreq+0x6c>
 800c210:	69bb      	ldr	r3, [r7, #24]
 800c212:	2b01      	cmp	r3, #1
 800c214:	d056      	beq.n	800c2c4 <HAL_RCCEx_GetPLL3ClockFreq+0x118>
 800c216:	e099      	b.n	800c34c <HAL_RCCEx_GetPLL3ClockFreq+0x1a0>
    {
      case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800c218:	4b88      	ldr	r3, [pc, #544]	@ (800c43c <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c21a:	681b      	ldr	r3, [r3, #0]
 800c21c:	f003 0320 	and.w	r3, r3, #32
 800c220:	2b00      	cmp	r3, #0
 800c222:	d02d      	beq.n	800c280 <HAL_RCCEx_GetPLL3ClockFreq+0xd4>
        {
          hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800c224:	4b85      	ldr	r3, [pc, #532]	@ (800c43c <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c226:	681b      	ldr	r3, [r3, #0]
 800c228:	08db      	lsrs	r3, r3, #3
 800c22a:	f003 0303 	and.w	r3, r3, #3
 800c22e:	4a84      	ldr	r2, [pc, #528]	@ (800c440 <HAL_RCCEx_GetPLL3ClockFreq+0x294>)
 800c230:	fa22 f303 	lsr.w	r3, r2, r3
 800c234:	60bb      	str	r3, [r7, #8]
          pll3vco = ((float_t)hsivalue / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800c236:	68bb      	ldr	r3, [r7, #8]
 800c238:	ee07 3a90 	vmov	s15, r3
 800c23c:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c240:	697b      	ldr	r3, [r7, #20]
 800c242:	ee07 3a90 	vmov	s15, r3
 800c246:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c24a:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c24e:	4b7b      	ldr	r3, [pc, #492]	@ (800c43c <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c250:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c252:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c256:	ee07 3a90 	vmov	s15, r3
 800c25a:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c25e:	ed97 6a03 	vldr	s12, [r7, #12]
 800c262:	eddf 5a78 	vldr	s11, [pc, #480]	@ 800c444 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800c266:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c26a:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c26e:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c272:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c276:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c27a:	edc7 7a07 	vstr	s15, [r7, #28]
        }
        else
        {
          pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
        }
        break;
 800c27e:	e087      	b.n	800c390 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
          pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800c280:	697b      	ldr	r3, [r7, #20]
 800c282:	ee07 3a90 	vmov	s15, r3
 800c286:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c28a:	eddf 6a6f 	vldr	s13, [pc, #444]	@ 800c448 <HAL_RCCEx_GetPLL3ClockFreq+0x29c>
 800c28e:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c292:	4b6a      	ldr	r3, [pc, #424]	@ (800c43c <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c294:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c296:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c29a:	ee07 3a90 	vmov	s15, r3
 800c29e:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c2a2:	ed97 6a03 	vldr	s12, [r7, #12]
 800c2a6:	eddf 5a67 	vldr	s11, [pc, #412]	@ 800c444 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800c2aa:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c2ae:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c2b2:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c2b6:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c2ba:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c2be:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c2c2:	e065      	b.n	800c390 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
      case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
        pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800c2c4:	697b      	ldr	r3, [r7, #20]
 800c2c6:	ee07 3a90 	vmov	s15, r3
 800c2ca:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c2ce:	eddf 6a5f 	vldr	s13, [pc, #380]	@ 800c44c <HAL_RCCEx_GetPLL3ClockFreq+0x2a0>
 800c2d2:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c2d6:	4b59      	ldr	r3, [pc, #356]	@ (800c43c <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c2d8:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c2da:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c2de:	ee07 3a90 	vmov	s15, r3
 800c2e2:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c2e6:	ed97 6a03 	vldr	s12, [r7, #12]
 800c2ea:	eddf 5a56 	vldr	s11, [pc, #344]	@ 800c444 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800c2ee:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c2f2:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c2f6:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c2fa:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c2fe:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c302:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c306:	e043      	b.n	800c390 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>

      case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
        pll3vco = ((float_t)HSE_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800c308:	697b      	ldr	r3, [r7, #20]
 800c30a:	ee07 3a90 	vmov	s15, r3
 800c30e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c312:	eddf 6a4f 	vldr	s13, [pc, #316]	@ 800c450 <HAL_RCCEx_GetPLL3ClockFreq+0x2a4>
 800c316:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c31a:	4b48      	ldr	r3, [pc, #288]	@ (800c43c <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c31c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c31e:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c322:	ee07 3a90 	vmov	s15, r3
 800c326:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c32a:	ed97 6a03 	vldr	s12, [r7, #12]
 800c32e:	eddf 5a45 	vldr	s11, [pc, #276]	@ 800c444 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800c332:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c336:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c33a:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c33e:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c342:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c346:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c34a:	e021      	b.n	800c390 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>

      default:
        pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800c34c:	697b      	ldr	r3, [r7, #20]
 800c34e:	ee07 3a90 	vmov	s15, r3
 800c352:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c356:	eddf 6a3d 	vldr	s13, [pc, #244]	@ 800c44c <HAL_RCCEx_GetPLL3ClockFreq+0x2a0>
 800c35a:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c35e:	4b37      	ldr	r3, [pc, #220]	@ (800c43c <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c360:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c362:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c366:	ee07 3a90 	vmov	s15, r3
 800c36a:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c36e:	ed97 6a03 	vldr	s12, [r7, #12]
 800c372:	eddf 5a34 	vldr	s11, [pc, #208]	@ 800c444 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800c376:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c37a:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c37e:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c382:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c386:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c38a:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c38e:	bf00      	nop
    }
    PLL3_Clocks->PLL3_P_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_P3) >> 9)  + (float_t)1)) ;
 800c390:	4b2a      	ldr	r3, [pc, #168]	@ (800c43c <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c392:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c394:	0a5b      	lsrs	r3, r3, #9
 800c396:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c39a:	ee07 3a90 	vmov	s15, r3
 800c39e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c3a2:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c3a6:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c3aa:	edd7 6a07 	vldr	s13, [r7, #28]
 800c3ae:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800c3b2:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800c3b6:	ee17 2a90 	vmov	r2, s15
 800c3ba:	687b      	ldr	r3, [r7, #4]
 800c3bc:	601a      	str	r2, [r3, #0]
    PLL3_Clocks->PLL3_Q_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_Q3) >> 16) + (float_t)1)) ;
 800c3be:	4b1f      	ldr	r3, [pc, #124]	@ (800c43c <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c3c0:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c3c2:	0c1b      	lsrs	r3, r3, #16
 800c3c4:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c3c8:	ee07 3a90 	vmov	s15, r3
 800c3cc:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c3d0:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c3d4:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c3d8:	edd7 6a07 	vldr	s13, [r7, #28]
 800c3dc:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800c3e0:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800c3e4:	ee17 2a90 	vmov	r2, s15
 800c3e8:	687b      	ldr	r3, [r7, #4]
 800c3ea:	605a      	str	r2, [r3, #4]
    PLL3_Clocks->PLL3_R_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_R3) >> 24) + (float_t)1)) ;
 800c3ec:	4b13      	ldr	r3, [pc, #76]	@ (800c43c <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c3ee:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c3f0:	0e1b      	lsrs	r3, r3, #24
 800c3f2:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c3f6:	ee07 3a90 	vmov	s15, r3
 800c3fa:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c3fe:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c402:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c406:	edd7 6a07 	vldr	s13, [r7, #28]
 800c40a:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800c40e:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800c412:	ee17 2a90 	vmov	r2, s15
 800c416:	687b      	ldr	r3, [r7, #4]
 800c418:	609a      	str	r2, [r3, #8]
    PLL3_Clocks->PLL3_P_Frequency = 0U;
    PLL3_Clocks->PLL3_Q_Frequency = 0U;
    PLL3_Clocks->PLL3_R_Frequency = 0U;
  }

}
 800c41a:	e008      	b.n	800c42e <HAL_RCCEx_GetPLL3ClockFreq+0x282>
    PLL3_Clocks->PLL3_P_Frequency = 0U;
 800c41c:	687b      	ldr	r3, [r7, #4]
 800c41e:	2200      	movs	r2, #0
 800c420:	601a      	str	r2, [r3, #0]
    PLL3_Clocks->PLL3_Q_Frequency = 0U;
 800c422:	687b      	ldr	r3, [r7, #4]
 800c424:	2200      	movs	r2, #0
 800c426:	605a      	str	r2, [r3, #4]
    PLL3_Clocks->PLL3_R_Frequency = 0U;
 800c428:	687b      	ldr	r3, [r7, #4]
 800c42a:	2200      	movs	r2, #0
 800c42c:	609a      	str	r2, [r3, #8]
}
 800c42e:	bf00      	nop
 800c430:	3724      	adds	r7, #36	@ 0x24
 800c432:	46bd      	mov	sp, r7
 800c434:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c438:	4770      	bx	lr
 800c43a:	bf00      	nop
 800c43c:	58024400 	.word	0x58024400
 800c440:	03d09000 	.word	0x03d09000
 800c444:	46000000 	.word	0x46000000
 800c448:	4c742400 	.word	0x4c742400
 800c44c:	4a742400 	.word	0x4a742400
 800c450:	4bbebc20 	.word	0x4bbebc20

0800c454 <RCCEx_PLL2_Config>:
  * @note   PLL2 is temporary disabled to apply new parameters
  *
  * @retval HAL status
  */
static HAL_StatusTypeDef RCCEx_PLL2_Config(RCC_PLL2InitTypeDef *pll2, uint32_t Divider)
{
 800c454:	b580      	push	{r7, lr}
 800c456:	b084      	sub	sp, #16
 800c458:	af00      	add	r7, sp, #0
 800c45a:	6078      	str	r0, [r7, #4]
 800c45c:	6039      	str	r1, [r7, #0]

  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800c45e:	2300      	movs	r3, #0
 800c460:	73fb      	strb	r3, [r7, #15]
  assert_param(IS_RCC_PLL2RGE_VALUE(pll2->PLL2RGE));
  assert_param(IS_RCC_PLL2VCO_VALUE(pll2->PLL2VCOSEL));
  assert_param(IS_RCC_PLLFRACN_VALUE(pll2->PLL2FRACN));

  /* Check that PLL2 OSC clock source is already set */
  if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE)
 800c462:	4b53      	ldr	r3, [pc, #332]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c464:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c466:	f003 0303 	and.w	r3, r3, #3
 800c46a:	2b03      	cmp	r3, #3
 800c46c:	d101      	bne.n	800c472 <RCCEx_PLL2_Config+0x1e>
  {
    return HAL_ERROR;
 800c46e:	2301      	movs	r3, #1
 800c470:	e099      	b.n	800c5a6 <RCCEx_PLL2_Config+0x152>


  else
  {
    /* Disable  PLL2. */
    __HAL_RCC_PLL2_DISABLE();
 800c472:	4b4f      	ldr	r3, [pc, #316]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c474:	681b      	ldr	r3, [r3, #0]
 800c476:	4a4e      	ldr	r2, [pc, #312]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c478:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800c47c:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800c47e:	f7f8 fde1 	bl	8005044 <HAL_GetTick>
 800c482:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL is disabled */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U)
 800c484:	e008      	b.n	800c498 <RCCEx_PLL2_Config+0x44>
    {
      if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
 800c486:	f7f8 fddd 	bl	8005044 <HAL_GetTick>
 800c48a:	4602      	mov	r2, r0
 800c48c:	68bb      	ldr	r3, [r7, #8]
 800c48e:	1ad3      	subs	r3, r2, r3
 800c490:	2b02      	cmp	r3, #2
 800c492:	d901      	bls.n	800c498 <RCCEx_PLL2_Config+0x44>
      {
        return HAL_TIMEOUT;
 800c494:	2303      	movs	r3, #3
 800c496:	e086      	b.n	800c5a6 <RCCEx_PLL2_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U)
 800c498:	4b45      	ldr	r3, [pc, #276]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c49a:	681b      	ldr	r3, [r3, #0]
 800c49c:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 800c4a0:	2b00      	cmp	r3, #0
 800c4a2:	d1f0      	bne.n	800c486 <RCCEx_PLL2_Config+0x32>
      }
    }

    /* Configure PLL2 multiplication and division factors. */
    __HAL_RCC_PLL2_CONFIG(pll2->PLL2M,
 800c4a4:	4b42      	ldr	r3, [pc, #264]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c4a6:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c4a8:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 800c4ac:	687b      	ldr	r3, [r7, #4]
 800c4ae:	681b      	ldr	r3, [r3, #0]
 800c4b0:	031b      	lsls	r3, r3, #12
 800c4b2:	493f      	ldr	r1, [pc, #252]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c4b4:	4313      	orrs	r3, r2
 800c4b6:	628b      	str	r3, [r1, #40]	@ 0x28
 800c4b8:	687b      	ldr	r3, [r7, #4]
 800c4ba:	685b      	ldr	r3, [r3, #4]
 800c4bc:	3b01      	subs	r3, #1
 800c4be:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800c4c2:	687b      	ldr	r3, [r7, #4]
 800c4c4:	689b      	ldr	r3, [r3, #8]
 800c4c6:	3b01      	subs	r3, #1
 800c4c8:	025b      	lsls	r3, r3, #9
 800c4ca:	b29b      	uxth	r3, r3
 800c4cc:	431a      	orrs	r2, r3
 800c4ce:	687b      	ldr	r3, [r7, #4]
 800c4d0:	68db      	ldr	r3, [r3, #12]
 800c4d2:	3b01      	subs	r3, #1
 800c4d4:	041b      	lsls	r3, r3, #16
 800c4d6:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 800c4da:	431a      	orrs	r2, r3
 800c4dc:	687b      	ldr	r3, [r7, #4]
 800c4de:	691b      	ldr	r3, [r3, #16]
 800c4e0:	3b01      	subs	r3, #1
 800c4e2:	061b      	lsls	r3, r3, #24
 800c4e4:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 800c4e8:	4931      	ldr	r1, [pc, #196]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c4ea:	4313      	orrs	r3, r2
 800c4ec:	638b      	str	r3, [r1, #56]	@ 0x38
                          pll2->PLL2P,
                          pll2->PLL2Q,
                          pll2->PLL2R);

    /* Select PLL2 input reference frequency range: VCI */
    __HAL_RCC_PLL2_VCIRANGE(pll2->PLL2RGE) ;
 800c4ee:	4b30      	ldr	r3, [pc, #192]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c4f0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c4f2:	f023 02c0 	bic.w	r2, r3, #192	@ 0xc0
 800c4f6:	687b      	ldr	r3, [r7, #4]
 800c4f8:	695b      	ldr	r3, [r3, #20]
 800c4fa:	492d      	ldr	r1, [pc, #180]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c4fc:	4313      	orrs	r3, r2
 800c4fe:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Select PLL2 output frequency range : VCO */
    __HAL_RCC_PLL2_VCORANGE(pll2->PLL2VCOSEL) ;
 800c500:	4b2b      	ldr	r3, [pc, #172]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c502:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c504:	f023 0220 	bic.w	r2, r3, #32
 800c508:	687b      	ldr	r3, [r7, #4]
 800c50a:	699b      	ldr	r3, [r3, #24]
 800c50c:	4928      	ldr	r1, [pc, #160]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c50e:	4313      	orrs	r3, r2
 800c510:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Disable PLL2FRACN . */
    __HAL_RCC_PLL2FRACN_DISABLE();
 800c512:	4b27      	ldr	r3, [pc, #156]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c514:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c516:	4a26      	ldr	r2, [pc, #152]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c518:	f023 0310 	bic.w	r3, r3, #16
 800c51c:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Configures PLL2 clock Fractional Part Of The Multiplication Factor */
    __HAL_RCC_PLL2FRACN_CONFIG(pll2->PLL2FRACN);
 800c51e:	4b24      	ldr	r3, [pc, #144]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c520:	6bda      	ldr	r2, [r3, #60]	@ 0x3c
 800c522:	4b24      	ldr	r3, [pc, #144]	@ (800c5b4 <RCCEx_PLL2_Config+0x160>)
 800c524:	4013      	ands	r3, r2
 800c526:	687a      	ldr	r2, [r7, #4]
 800c528:	69d2      	ldr	r2, [r2, #28]
 800c52a:	00d2      	lsls	r2, r2, #3
 800c52c:	4920      	ldr	r1, [pc, #128]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c52e:	4313      	orrs	r3, r2
 800c530:	63cb      	str	r3, [r1, #60]	@ 0x3c

    /* Enable PLL2FRACN . */
    __HAL_RCC_PLL2FRACN_ENABLE();
 800c532:	4b1f      	ldr	r3, [pc, #124]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c534:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c536:	4a1e      	ldr	r2, [pc, #120]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c538:	f043 0310 	orr.w	r3, r3, #16
 800c53c:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Enable the PLL2 clock output */
    if (Divider == DIVIDER_P_UPDATE)
 800c53e:	683b      	ldr	r3, [r7, #0]
 800c540:	2b00      	cmp	r3, #0
 800c542:	d106      	bne.n	800c552 <RCCEx_PLL2_Config+0xfe>
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVP);
 800c544:	4b1a      	ldr	r3, [pc, #104]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c546:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c548:	4a19      	ldr	r2, [pc, #100]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c54a:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 800c54e:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800c550:	e00f      	b.n	800c572 <RCCEx_PLL2_Config+0x11e>
    }
    else if (Divider == DIVIDER_Q_UPDATE)
 800c552:	683b      	ldr	r3, [r7, #0]
 800c554:	2b01      	cmp	r3, #1
 800c556:	d106      	bne.n	800c566 <RCCEx_PLL2_Config+0x112>
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVQ);
 800c558:	4b15      	ldr	r3, [pc, #84]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c55a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c55c:	4a14      	ldr	r2, [pc, #80]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c55e:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 800c562:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800c564:	e005      	b.n	800c572 <RCCEx_PLL2_Config+0x11e>
    }
    else
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVR);
 800c566:	4b12      	ldr	r3, [pc, #72]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c568:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c56a:	4a11      	ldr	r2, [pc, #68]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c56c:	f443 1300 	orr.w	r3, r3, #2097152	@ 0x200000
 800c570:	62d3      	str	r3, [r2, #44]	@ 0x2c
    }

    /* Enable  PLL2. */
    __HAL_RCC_PLL2_ENABLE();
 800c572:	4b0f      	ldr	r3, [pc, #60]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c574:	681b      	ldr	r3, [r3, #0]
 800c576:	4a0e      	ldr	r2, [pc, #56]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c578:	f043 6380 	orr.w	r3, r3, #67108864	@ 0x4000000
 800c57c:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800c57e:	f7f8 fd61 	bl	8005044 <HAL_GetTick>
 800c582:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL2 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U)
 800c584:	e008      	b.n	800c598 <RCCEx_PLL2_Config+0x144>
    {
      if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
 800c586:	f7f8 fd5d 	bl	8005044 <HAL_GetTick>
 800c58a:	4602      	mov	r2, r0
 800c58c:	68bb      	ldr	r3, [r7, #8]
 800c58e:	1ad3      	subs	r3, r2, r3
 800c590:	2b02      	cmp	r3, #2
 800c592:	d901      	bls.n	800c598 <RCCEx_PLL2_Config+0x144>
      {
        return HAL_TIMEOUT;
 800c594:	2303      	movs	r3, #3
 800c596:	e006      	b.n	800c5a6 <RCCEx_PLL2_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U)
 800c598:	4b05      	ldr	r3, [pc, #20]	@ (800c5b0 <RCCEx_PLL2_Config+0x15c>)
 800c59a:	681b      	ldr	r3, [r3, #0]
 800c59c:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 800c5a0:	2b00      	cmp	r3, #0
 800c5a2:	d0f0      	beq.n	800c586 <RCCEx_PLL2_Config+0x132>
    }

  }


  return status;
 800c5a4:	7bfb      	ldrb	r3, [r7, #15]
}
 800c5a6:	4618      	mov	r0, r3
 800c5a8:	3710      	adds	r7, #16
 800c5aa:	46bd      	mov	sp, r7
 800c5ac:	bd80      	pop	{r7, pc}
 800c5ae:	bf00      	nop
 800c5b0:	58024400 	.word	0x58024400
 800c5b4:	ffff0007 	.word	0xffff0007

0800c5b8 <RCCEx_PLL3_Config>:
  * @note   PLL3 is temporary disabled to apply new parameters
  *
  * @retval HAL status
  */
static HAL_StatusTypeDef RCCEx_PLL3_Config(RCC_PLL3InitTypeDef *pll3, uint32_t Divider)
{
 800c5b8:	b580      	push	{r7, lr}
 800c5ba:	b084      	sub	sp, #16
 800c5bc:	af00      	add	r7, sp, #0
 800c5be:	6078      	str	r0, [r7, #4]
 800c5c0:	6039      	str	r1, [r7, #0]
  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800c5c2:	2300      	movs	r3, #0
 800c5c4:	73fb      	strb	r3, [r7, #15]
  assert_param(IS_RCC_PLL3RGE_VALUE(pll3->PLL3RGE));
  assert_param(IS_RCC_PLL3VCO_VALUE(pll3->PLL3VCOSEL));
  assert_param(IS_RCC_PLLFRACN_VALUE(pll3->PLL3FRACN));

  /* Check that PLL3 OSC clock source is already set */
  if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE)
 800c5c6:	4b53      	ldr	r3, [pc, #332]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c5c8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c5ca:	f003 0303 	and.w	r3, r3, #3
 800c5ce:	2b03      	cmp	r3, #3
 800c5d0:	d101      	bne.n	800c5d6 <RCCEx_PLL3_Config+0x1e>
  {
    return HAL_ERROR;
 800c5d2:	2301      	movs	r3, #1
 800c5d4:	e099      	b.n	800c70a <RCCEx_PLL3_Config+0x152>


  else
  {
    /* Disable  PLL3. */
    __HAL_RCC_PLL3_DISABLE();
 800c5d6:	4b4f      	ldr	r3, [pc, #316]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c5d8:	681b      	ldr	r3, [r3, #0]
 800c5da:	4a4e      	ldr	r2, [pc, #312]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c5dc:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 800c5e0:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800c5e2:	f7f8 fd2f 	bl	8005044 <HAL_GetTick>
 800c5e6:	60b8      	str	r0, [r7, #8]
    /* Wait till PLL3 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U)
 800c5e8:	e008      	b.n	800c5fc <RCCEx_PLL3_Config+0x44>
    {
      if ((HAL_GetTick() - tickstart) > PLL3_TIMEOUT_VALUE)
 800c5ea:	f7f8 fd2b 	bl	8005044 <HAL_GetTick>
 800c5ee:	4602      	mov	r2, r0
 800c5f0:	68bb      	ldr	r3, [r7, #8]
 800c5f2:	1ad3      	subs	r3, r2, r3
 800c5f4:	2b02      	cmp	r3, #2
 800c5f6:	d901      	bls.n	800c5fc <RCCEx_PLL3_Config+0x44>
      {
        return HAL_TIMEOUT;
 800c5f8:	2303      	movs	r3, #3
 800c5fa:	e086      	b.n	800c70a <RCCEx_PLL3_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U)
 800c5fc:	4b45      	ldr	r3, [pc, #276]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c5fe:	681b      	ldr	r3, [r3, #0]
 800c600:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 800c604:	2b00      	cmp	r3, #0
 800c606:	d1f0      	bne.n	800c5ea <RCCEx_PLL3_Config+0x32>
      }
    }

    /* Configure the PLL3  multiplication and division factors. */
    __HAL_RCC_PLL3_CONFIG(pll3->PLL3M,
 800c608:	4b42      	ldr	r3, [pc, #264]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c60a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c60c:	f023 727c 	bic.w	r2, r3, #66060288	@ 0x3f00000
 800c610:	687b      	ldr	r3, [r7, #4]
 800c612:	681b      	ldr	r3, [r3, #0]
 800c614:	051b      	lsls	r3, r3, #20
 800c616:	493f      	ldr	r1, [pc, #252]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c618:	4313      	orrs	r3, r2
 800c61a:	628b      	str	r3, [r1, #40]	@ 0x28
 800c61c:	687b      	ldr	r3, [r7, #4]
 800c61e:	685b      	ldr	r3, [r3, #4]
 800c620:	3b01      	subs	r3, #1
 800c622:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800c626:	687b      	ldr	r3, [r7, #4]
 800c628:	689b      	ldr	r3, [r3, #8]
 800c62a:	3b01      	subs	r3, #1
 800c62c:	025b      	lsls	r3, r3, #9
 800c62e:	b29b      	uxth	r3, r3
 800c630:	431a      	orrs	r2, r3
 800c632:	687b      	ldr	r3, [r7, #4]
 800c634:	68db      	ldr	r3, [r3, #12]
 800c636:	3b01      	subs	r3, #1
 800c638:	041b      	lsls	r3, r3, #16
 800c63a:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 800c63e:	431a      	orrs	r2, r3
 800c640:	687b      	ldr	r3, [r7, #4]
 800c642:	691b      	ldr	r3, [r3, #16]
 800c644:	3b01      	subs	r3, #1
 800c646:	061b      	lsls	r3, r3, #24
 800c648:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 800c64c:	4931      	ldr	r1, [pc, #196]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c64e:	4313      	orrs	r3, r2
 800c650:	640b      	str	r3, [r1, #64]	@ 0x40
                          pll3->PLL3P,
                          pll3->PLL3Q,
                          pll3->PLL3R);

    /* Select PLL3 input reference frequency range: VCI */
    __HAL_RCC_PLL3_VCIRANGE(pll3->PLL3RGE) ;
 800c652:	4b30      	ldr	r3, [pc, #192]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c654:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c656:	f423 6240 	bic.w	r2, r3, #3072	@ 0xc00
 800c65a:	687b      	ldr	r3, [r7, #4]
 800c65c:	695b      	ldr	r3, [r3, #20]
 800c65e:	492d      	ldr	r1, [pc, #180]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c660:	4313      	orrs	r3, r2
 800c662:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Select PLL3 output frequency range : VCO */
    __HAL_RCC_PLL3_VCORANGE(pll3->PLL3VCOSEL) ;
 800c664:	4b2b      	ldr	r3, [pc, #172]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c666:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c668:	f423 7200 	bic.w	r2, r3, #512	@ 0x200
 800c66c:	687b      	ldr	r3, [r7, #4]
 800c66e:	699b      	ldr	r3, [r3, #24]
 800c670:	4928      	ldr	r1, [pc, #160]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c672:	4313      	orrs	r3, r2
 800c674:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Disable PLL3FRACN . */
    __HAL_RCC_PLL3FRACN_DISABLE();
 800c676:	4b27      	ldr	r3, [pc, #156]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c678:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c67a:	4a26      	ldr	r2, [pc, #152]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c67c:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800c680:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Configures PLL3 clock Fractional Part Of The Multiplication Factor */
    __HAL_RCC_PLL3FRACN_CONFIG(pll3->PLL3FRACN);
 800c682:	4b24      	ldr	r3, [pc, #144]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c684:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 800c686:	4b24      	ldr	r3, [pc, #144]	@ (800c718 <RCCEx_PLL3_Config+0x160>)
 800c688:	4013      	ands	r3, r2
 800c68a:	687a      	ldr	r2, [r7, #4]
 800c68c:	69d2      	ldr	r2, [r2, #28]
 800c68e:	00d2      	lsls	r2, r2, #3
 800c690:	4920      	ldr	r1, [pc, #128]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c692:	4313      	orrs	r3, r2
 800c694:	644b      	str	r3, [r1, #68]	@ 0x44

    /* Enable PLL3FRACN . */
    __HAL_RCC_PLL3FRACN_ENABLE();
 800c696:	4b1f      	ldr	r3, [pc, #124]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c698:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c69a:	4a1e      	ldr	r2, [pc, #120]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c69c:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800c6a0:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Enable the PLL3 clock output */
    if (Divider == DIVIDER_P_UPDATE)
 800c6a2:	683b      	ldr	r3, [r7, #0]
 800c6a4:	2b00      	cmp	r3, #0
 800c6a6:	d106      	bne.n	800c6b6 <RCCEx_PLL3_Config+0xfe>
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVP);
 800c6a8:	4b1a      	ldr	r3, [pc, #104]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c6aa:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c6ac:	4a19      	ldr	r2, [pc, #100]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c6ae:	f443 0380 	orr.w	r3, r3, #4194304	@ 0x400000
 800c6b2:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800c6b4:	e00f      	b.n	800c6d6 <RCCEx_PLL3_Config+0x11e>
    }
    else if (Divider == DIVIDER_Q_UPDATE)
 800c6b6:	683b      	ldr	r3, [r7, #0]
 800c6b8:	2b01      	cmp	r3, #1
 800c6ba:	d106      	bne.n	800c6ca <RCCEx_PLL3_Config+0x112>
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ);
 800c6bc:	4b15      	ldr	r3, [pc, #84]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c6be:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c6c0:	4a14      	ldr	r2, [pc, #80]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c6c2:	f443 0300 	orr.w	r3, r3, #8388608	@ 0x800000
 800c6c6:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800c6c8:	e005      	b.n	800c6d6 <RCCEx_PLL3_Config+0x11e>
    }
    else
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVR);
 800c6ca:	4b12      	ldr	r3, [pc, #72]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c6cc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c6ce:	4a11      	ldr	r2, [pc, #68]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c6d0:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 800c6d4:	62d3      	str	r3, [r2, #44]	@ 0x2c
    }

    /* Enable  PLL3. */
    __HAL_RCC_PLL3_ENABLE();
 800c6d6:	4b0f      	ldr	r3, [pc, #60]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c6d8:	681b      	ldr	r3, [r3, #0]
 800c6da:	4a0e      	ldr	r2, [pc, #56]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c6dc:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
 800c6e0:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800c6e2:	f7f8 fcaf 	bl	8005044 <HAL_GetTick>
 800c6e6:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL3 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U)
 800c6e8:	e008      	b.n	800c6fc <RCCEx_PLL3_Config+0x144>
    {
      if ((HAL_GetTick() - tickstart) > PLL3_TIMEOUT_VALUE)
 800c6ea:	f7f8 fcab 	bl	8005044 <HAL_GetTick>
 800c6ee:	4602      	mov	r2, r0
 800c6f0:	68bb      	ldr	r3, [r7, #8]
 800c6f2:	1ad3      	subs	r3, r2, r3
 800c6f4:	2b02      	cmp	r3, #2
 800c6f6:	d901      	bls.n	800c6fc <RCCEx_PLL3_Config+0x144>
      {
        return HAL_TIMEOUT;
 800c6f8:	2303      	movs	r3, #3
 800c6fa:	e006      	b.n	800c70a <RCCEx_PLL3_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U)
 800c6fc:	4b05      	ldr	r3, [pc, #20]	@ (800c714 <RCCEx_PLL3_Config+0x15c>)
 800c6fe:	681b      	ldr	r3, [r3, #0]
 800c700:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 800c704:	2b00      	cmp	r3, #0
 800c706:	d0f0      	beq.n	800c6ea <RCCEx_PLL3_Config+0x132>
    }

  }


  return status;
 800c708:	7bfb      	ldrb	r3, [r7, #15]
}
 800c70a:	4618      	mov	r0, r3
 800c70c:	3710      	adds	r7, #16
 800c70e:	46bd      	mov	sp, r7
 800c710:	bd80      	pop	{r7, pc}
 800c712:	bf00      	nop
 800c714:	58024400 	.word	0x58024400
 800c718:	ffff0007 	.word	0xffff0007

0800c71c <HAL_RNG_Init>:
  * @param  hrng pointer to a RNG_HandleTypeDef structure that contains
  *                the configuration information for RNG.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
{
 800c71c:	b580      	push	{r7, lr}
 800c71e:	b084      	sub	sp, #16
 800c720:	af00      	add	r7, sp, #0
 800c722:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;
  /* Check the RNG handle allocation */
  if (hrng == NULL)
 800c724:	687b      	ldr	r3, [r7, #4]
 800c726:	2b00      	cmp	r3, #0
 800c728:	d101      	bne.n	800c72e <HAL_RNG_Init+0x12>
  {
    return HAL_ERROR;
 800c72a:	2301      	movs	r3, #1
 800c72c:	e054      	b.n	800c7d8 <HAL_RNG_Init+0xbc>

    /* Init the low level hardware */
    hrng->MspInitCallback(hrng);
  }
#else
  if (hrng->State == HAL_RNG_STATE_RESET)
 800c72e:	687b      	ldr	r3, [r7, #4]
 800c730:	7a5b      	ldrb	r3, [r3, #9]
 800c732:	b2db      	uxtb	r3, r3
 800c734:	2b00      	cmp	r3, #0
 800c736:	d105      	bne.n	800c744 <HAL_RNG_Init+0x28>
  {
    /* Allocate lock resource and initialize it */
    hrng->Lock = HAL_UNLOCKED;
 800c738:	687b      	ldr	r3, [r7, #4]
 800c73a:	2200      	movs	r2, #0
 800c73c:	721a      	strb	r2, [r3, #8]

    /* Init the low level hardware */
    HAL_RNG_MspInit(hrng);
 800c73e:	6878      	ldr	r0, [r7, #4]
 800c740:	f7f6 fe2c 	bl	800339c <HAL_RNG_MspInit>
  }
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */

  /* Change RNG peripheral state */
  hrng->State = HAL_RNG_STATE_BUSY;
 800c744:	687b      	ldr	r3, [r7, #4]
 800c746:	2202      	movs	r2, #2
 800c748:	725a      	strb	r2, [r3, #9]
      }
    }
  }
#else
  /* Clock Error Detection Configuration */
  MODIFY_REG(hrng->Instance->CR, RNG_CR_CED, hrng->Init.ClockErrorDetection);
 800c74a:	687b      	ldr	r3, [r7, #4]
 800c74c:	681b      	ldr	r3, [r3, #0]
 800c74e:	681b      	ldr	r3, [r3, #0]
 800c750:	f023 0120 	bic.w	r1, r3, #32
 800c754:	687b      	ldr	r3, [r7, #4]
 800c756:	685a      	ldr	r2, [r3, #4]
 800c758:	687b      	ldr	r3, [r7, #4]
 800c75a:	681b      	ldr	r3, [r3, #0]
 800c75c:	430a      	orrs	r2, r1
 800c75e:	601a      	str	r2, [r3, #0]
#endif /* RNG_CR_CONDRST */

  /* Enable the RNG Peripheral */
  __HAL_RNG_ENABLE(hrng);
 800c760:	687b      	ldr	r3, [r7, #4]
 800c762:	681b      	ldr	r3, [r3, #0]
 800c764:	681a      	ldr	r2, [r3, #0]
 800c766:	687b      	ldr	r3, [r7, #4]
 800c768:	681b      	ldr	r3, [r3, #0]
 800c76a:	f042 0204 	orr.w	r2, r2, #4
 800c76e:	601a      	str	r2, [r3, #0]

  /* verify that no seed error */
  if (__HAL_RNG_GET_IT(hrng, RNG_IT_SEI) != RESET)
 800c770:	687b      	ldr	r3, [r7, #4]
 800c772:	681b      	ldr	r3, [r3, #0]
 800c774:	685b      	ldr	r3, [r3, #4]
 800c776:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800c77a:	2b40      	cmp	r3, #64	@ 0x40
 800c77c:	d104      	bne.n	800c788 <HAL_RNG_Init+0x6c>
  {
    hrng->State = HAL_RNG_STATE_ERROR;
 800c77e:	687b      	ldr	r3, [r7, #4]
 800c780:	2204      	movs	r2, #4
 800c782:	725a      	strb	r2, [r3, #9]
    return HAL_ERROR;
 800c784:	2301      	movs	r3, #1
 800c786:	e027      	b.n	800c7d8 <HAL_RNG_Init+0xbc>
  }
  /* Get tick */
  tickstart = HAL_GetTick();
 800c788:	f7f8 fc5c 	bl	8005044 <HAL_GetTick>
 800c78c:	60f8      	str	r0, [r7, #12]
  /* Check if data register contains valid random data */
  while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800c78e:	e015      	b.n	800c7bc <HAL_RNG_Init+0xa0>
  {
    if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
 800c790:	f7f8 fc58 	bl	8005044 <HAL_GetTick>
 800c794:	4602      	mov	r2, r0
 800c796:	68fb      	ldr	r3, [r7, #12]
 800c798:	1ad3      	subs	r3, r2, r3
 800c79a:	2b02      	cmp	r3, #2
 800c79c:	d90e      	bls.n	800c7bc <HAL_RNG_Init+0xa0>
    {
      /* New check to avoid false timeout detection in case of preemption */
      if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800c79e:	687b      	ldr	r3, [r7, #4]
 800c7a0:	681b      	ldr	r3, [r3, #0]
 800c7a2:	685b      	ldr	r3, [r3, #4]
 800c7a4:	f003 0304 	and.w	r3, r3, #4
 800c7a8:	2b04      	cmp	r3, #4
 800c7aa:	d107      	bne.n	800c7bc <HAL_RNG_Init+0xa0>
      {
        hrng->State = HAL_RNG_STATE_ERROR;
 800c7ac:	687b      	ldr	r3, [r7, #4]
 800c7ae:	2204      	movs	r2, #4
 800c7b0:	725a      	strb	r2, [r3, #9]
        hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
 800c7b2:	687b      	ldr	r3, [r7, #4]
 800c7b4:	2202      	movs	r2, #2
 800c7b6:	60da      	str	r2, [r3, #12]
        return HAL_ERROR;
 800c7b8:	2301      	movs	r3, #1
 800c7ba:	e00d      	b.n	800c7d8 <HAL_RNG_Init+0xbc>
  while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800c7bc:	687b      	ldr	r3, [r7, #4]
 800c7be:	681b      	ldr	r3, [r3, #0]
 800c7c0:	685b      	ldr	r3, [r3, #4]
 800c7c2:	f003 0304 	and.w	r3, r3, #4
 800c7c6:	2b04      	cmp	r3, #4
 800c7c8:	d0e2      	beq.n	800c790 <HAL_RNG_Init+0x74>
      }
    }
  }

  /* Initialize the RNG state */
  hrng->State = HAL_RNG_STATE_READY;
 800c7ca:	687b      	ldr	r3, [r7, #4]
 800c7cc:	2201      	movs	r2, #1
 800c7ce:	725a      	strb	r2, [r3, #9]

  /* Initialise the error code */
  hrng->ErrorCode = HAL_RNG_ERROR_NONE;
 800c7d0:	687b      	ldr	r3, [r7, #4]
 800c7d2:	2200      	movs	r2, #0
 800c7d4:	60da      	str	r2, [r3, #12]

  /* Return function status */
  return HAL_OK;
 800c7d6:	2300      	movs	r3, #0
}
 800c7d8:	4618      	mov	r0, r3
 800c7da:	3710      	adds	r7, #16
 800c7dc:	46bd      	mov	sp, r7
 800c7de:	bd80      	pop	{r7, pc}

0800c7e0 <HAL_RNG_GenerateRandomNumber>:
  * @param  random32bit pointer to generated random number variable if successful.
  * @retval HAL status
  */

HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit)
{
 800c7e0:	b580      	push	{r7, lr}
 800c7e2:	b084      	sub	sp, #16
 800c7e4:	af00      	add	r7, sp, #0
 800c7e6:	6078      	str	r0, [r7, #4]
 800c7e8:	6039      	str	r1, [r7, #0]
  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800c7ea:	2300      	movs	r3, #0
 800c7ec:	73fb      	strb	r3, [r7, #15]

  /* Process Locked */
  __HAL_LOCK(hrng);
 800c7ee:	687b      	ldr	r3, [r7, #4]
 800c7f0:	7a1b      	ldrb	r3, [r3, #8]
 800c7f2:	2b01      	cmp	r3, #1
 800c7f4:	d101      	bne.n	800c7fa <HAL_RNG_GenerateRandomNumber+0x1a>
 800c7f6:	2302      	movs	r3, #2
 800c7f8:	e044      	b.n	800c884 <HAL_RNG_GenerateRandomNumber+0xa4>
 800c7fa:	687b      	ldr	r3, [r7, #4]
 800c7fc:	2201      	movs	r2, #1
 800c7fe:	721a      	strb	r2, [r3, #8]

  /* Check RNG peripheral state */
  if (hrng->State == HAL_RNG_STATE_READY)
 800c800:	687b      	ldr	r3, [r7, #4]
 800c802:	7a5b      	ldrb	r3, [r3, #9]
 800c804:	b2db      	uxtb	r3, r3
 800c806:	2b01      	cmp	r3, #1
 800c808:	d133      	bne.n	800c872 <HAL_RNG_GenerateRandomNumber+0x92>
  {
    /* Change RNG peripheral state */
    hrng->State = HAL_RNG_STATE_BUSY;
 800c80a:	687b      	ldr	r3, [r7, #4]
 800c80c:	2202      	movs	r2, #2
 800c80e:	725a      	strb	r2, [r3, #9]
      }
    }
#endif /* RNG_CR_CONDRST */

    /* Get tick */
    tickstart = HAL_GetTick();
 800c810:	f7f8 fc18 	bl	8005044 <HAL_GetTick>
 800c814:	60b8      	str	r0, [r7, #8]

    /* Check if data register contains valid random data */
    while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800c816:	e018      	b.n	800c84a <HAL_RNG_GenerateRandomNumber+0x6a>
    {
      if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
 800c818:	f7f8 fc14 	bl	8005044 <HAL_GetTick>
 800c81c:	4602      	mov	r2, r0
 800c81e:	68bb      	ldr	r3, [r7, #8]
 800c820:	1ad3      	subs	r3, r2, r3
 800c822:	2b02      	cmp	r3, #2
 800c824:	d911      	bls.n	800c84a <HAL_RNG_GenerateRandomNumber+0x6a>
      {
        /* New check to avoid false timeout detection in case of preemption */
        if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800c826:	687b      	ldr	r3, [r7, #4]
 800c828:	681b      	ldr	r3, [r3, #0]
 800c82a:	685b      	ldr	r3, [r3, #4]
 800c82c:	f003 0301 	and.w	r3, r3, #1
 800c830:	2b01      	cmp	r3, #1
 800c832:	d00a      	beq.n	800c84a <HAL_RNG_GenerateRandomNumber+0x6a>
        {
          hrng->State = HAL_RNG_STATE_READY;
 800c834:	687b      	ldr	r3, [r7, #4]
 800c836:	2201      	movs	r2, #1
 800c838:	725a      	strb	r2, [r3, #9]
          hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
 800c83a:	687b      	ldr	r3, [r7, #4]
 800c83c:	2202      	movs	r2, #2
 800c83e:	60da      	str	r2, [r3, #12]
          /* Process Unlocked */
          __HAL_UNLOCK(hrng);
 800c840:	687b      	ldr	r3, [r7, #4]
 800c842:	2200      	movs	r2, #0
 800c844:	721a      	strb	r2, [r3, #8]
          return HAL_ERROR;
 800c846:	2301      	movs	r3, #1
 800c848:	e01c      	b.n	800c884 <HAL_RNG_GenerateRandomNumber+0xa4>
    while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800c84a:	687b      	ldr	r3, [r7, #4]
 800c84c:	681b      	ldr	r3, [r3, #0]
 800c84e:	685b      	ldr	r3, [r3, #4]
 800c850:	f003 0301 	and.w	r3, r3, #1
 800c854:	2b01      	cmp	r3, #1
 800c856:	d1df      	bne.n	800c818 <HAL_RNG_GenerateRandomNumber+0x38>
        }
      }
    }

    /* Get a 32bit Random number */
    hrng->RandomNumber = hrng->Instance->DR;
 800c858:	687b      	ldr	r3, [r7, #4]
 800c85a:	681b      	ldr	r3, [r3, #0]
 800c85c:	689a      	ldr	r2, [r3, #8]
 800c85e:	687b      	ldr	r3, [r7, #4]
 800c860:	611a      	str	r2, [r3, #16]
    else /* No seed error */
    {
      *random32bit = hrng->RandomNumber;
    }
#else
    *random32bit = hrng->RandomNumber;
 800c862:	687b      	ldr	r3, [r7, #4]
 800c864:	691a      	ldr	r2, [r3, #16]
 800c866:	683b      	ldr	r3, [r7, #0]
 800c868:	601a      	str	r2, [r3, #0]

#endif /* RNG_CR_CONDRST */
    hrng->State = HAL_RNG_STATE_READY;
 800c86a:	687b      	ldr	r3, [r7, #4]
 800c86c:	2201      	movs	r2, #1
 800c86e:	725a      	strb	r2, [r3, #9]
 800c870:	e004      	b.n	800c87c <HAL_RNG_GenerateRandomNumber+0x9c>
  }
  else
  {
    hrng->ErrorCode = HAL_RNG_ERROR_BUSY;
 800c872:	687b      	ldr	r3, [r7, #4]
 800c874:	2204      	movs	r2, #4
 800c876:	60da      	str	r2, [r3, #12]
    status = HAL_ERROR;
 800c878:	2301      	movs	r3, #1
 800c87a:	73fb      	strb	r3, [r7, #15]
  }

  /* Process Unlocked */
  __HAL_UNLOCK(hrng);
 800c87c:	687b      	ldr	r3, [r7, #4]
 800c87e:	2200      	movs	r2, #0
 800c880:	721a      	strb	r2, [r3, #8]

  return status;
 800c882:	7bfb      	ldrb	r3, [r7, #15]
}
 800c884:	4618      	mov	r0, r3
 800c886:	3710      	adds	r7, #16
 800c888:	46bd      	mov	sp, r7
 800c88a:	bd80      	pop	{r7, pc}

0800c88c <HAL_TIM_Base_Init>:
  *         Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
  * @param  htim TIM Base handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
 800c88c:	b580      	push	{r7, lr}
 800c88e:	b082      	sub	sp, #8
 800c890:	af00      	add	r7, sp, #0
 800c892:	6078      	str	r0, [r7, #4]
  /* Check the TIM handle allocation */
  if (htim == NULL)
 800c894:	687b      	ldr	r3, [r7, #4]
 800c896:	2b00      	cmp	r3, #0
 800c898:	d101      	bne.n	800c89e <HAL_TIM_Base_Init+0x12>
  {
    return HAL_ERROR;
 800c89a:	2301      	movs	r3, #1
 800c89c:	e049      	b.n	800c932 <HAL_TIM_Base_Init+0xa6>
  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));

  if (htim->State == HAL_TIM_STATE_RESET)
 800c89e:	687b      	ldr	r3, [r7, #4]
 800c8a0:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 800c8a4:	b2db      	uxtb	r3, r3
 800c8a6:	2b00      	cmp	r3, #0
 800c8a8:	d106      	bne.n	800c8b8 <HAL_TIM_Base_Init+0x2c>
  {
    /* Allocate lock resource and initialize it */
    htim->Lock = HAL_UNLOCKED;
 800c8aa:	687b      	ldr	r3, [r7, #4]
 800c8ac:	2200      	movs	r2, #0
 800c8ae:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
    }
    /* Init the low level hardware : GPIO, CLOCK, NVIC */
    htim->Base_MspInitCallback(htim);
#else
    /* Init the low level hardware : GPIO, CLOCK, NVIC */
    HAL_TIM_Base_MspInit(htim);
 800c8b2:	6878      	ldr	r0, [r7, #4]
 800c8b4:	f000 f841 	bl	800c93a <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  }

  /* Set the TIM state */
  htim->State = HAL_TIM_STATE_BUSY;
 800c8b8:	687b      	ldr	r3, [r7, #4]
 800c8ba:	2202      	movs	r2, #2
 800c8bc:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  /* Set the Time Base configuration */
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 800c8c0:	687b      	ldr	r3, [r7, #4]
 800c8c2:	681a      	ldr	r2, [r3, #0]
 800c8c4:	687b      	ldr	r3, [r7, #4]
 800c8c6:	3304      	adds	r3, #4
 800c8c8:	4619      	mov	r1, r3
 800c8ca:	4610      	mov	r0, r2
 800c8cc:	f000 f9e8 	bl	800cca0 <TIM_Base_SetConfig>

  /* Initialize the DMA burst operation state */
  htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
 800c8d0:	687b      	ldr	r3, [r7, #4]
 800c8d2:	2201      	movs	r2, #1
 800c8d4:	f883 2048 	strb.w	r2, [r3, #72]	@ 0x48

  /* Initialize the TIM channels state */
  TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
 800c8d8:	687b      	ldr	r3, [r7, #4]
 800c8da:	2201      	movs	r2, #1
 800c8dc:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
 800c8e0:	687b      	ldr	r3, [r7, #4]
 800c8e2:	2201      	movs	r2, #1
 800c8e4:	f883 203f 	strb.w	r2, [r3, #63]	@ 0x3f
 800c8e8:	687b      	ldr	r3, [r7, #4]
 800c8ea:	2201      	movs	r2, #1
 800c8ec:	f883 2040 	strb.w	r2, [r3, #64]	@ 0x40
 800c8f0:	687b      	ldr	r3, [r7, #4]
 800c8f2:	2201      	movs	r2, #1
 800c8f4:	f883 2041 	strb.w	r2, [r3, #65]	@ 0x41
 800c8f8:	687b      	ldr	r3, [r7, #4]
 800c8fa:	2201      	movs	r2, #1
 800c8fc:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
 800c900:	687b      	ldr	r3, [r7, #4]
 800c902:	2201      	movs	r2, #1
 800c904:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
  TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
 800c908:	687b      	ldr	r3, [r7, #4]
 800c90a:	2201      	movs	r2, #1
 800c90c:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 800c910:	687b      	ldr	r3, [r7, #4]
 800c912:	2201      	movs	r2, #1
 800c914:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 800c918:	687b      	ldr	r3, [r7, #4]
 800c91a:	2201      	movs	r2, #1
 800c91c:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
 800c920:	687b      	ldr	r3, [r7, #4]
 800c922:	2201      	movs	r2, #1
 800c924:	f883 2047 	strb.w	r2, [r3, #71]	@ 0x47

  /* Initialize the TIM state*/
  htim->State = HAL_TIM_STATE_READY;
 800c928:	687b      	ldr	r3, [r7, #4]
 800c92a:	2201      	movs	r2, #1
 800c92c:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  return HAL_OK;
 800c930:	2300      	movs	r3, #0
}
 800c932:	4618      	mov	r0, r3
 800c934:	3708      	adds	r7, #8
 800c936:	46bd      	mov	sp, r7
 800c938:	bd80      	pop	{r7, pc}

0800c93a <HAL_TIM_Base_MspInit>:
  * @brief  Initializes the TIM Base MSP.
  * @param  htim TIM Base handle
  * @retval None
  */
__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
{
 800c93a:	b480      	push	{r7}
 800c93c:	b083      	sub	sp, #12
 800c93e:	af00      	add	r7, sp, #0
 800c940:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_Base_MspInit could be implemented in the user file
   */
}
 800c942:	bf00      	nop
 800c944:	370c      	adds	r7, #12
 800c946:	46bd      	mov	sp, r7
 800c948:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c94c:	4770      	bx	lr
	...

0800c950 <HAL_TIM_Base_Start_IT>:
  * @brief  Starts the TIM Base generation in interrupt mode.
  * @param  htim TIM Base handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
{
 800c950:	b480      	push	{r7}
 800c952:	b085      	sub	sp, #20
 800c954:	af00      	add	r7, sp, #0
 800c956:	6078      	str	r0, [r7, #4]

  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));

  /* Check the TIM state */
  if (htim->State != HAL_TIM_STATE_READY)
 800c958:	687b      	ldr	r3, [r7, #4]
 800c95a:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 800c95e:	b2db      	uxtb	r3, r3
 800c960:	2b01      	cmp	r3, #1
 800c962:	d001      	beq.n	800c968 <HAL_TIM_Base_Start_IT+0x18>
  {
    return HAL_ERROR;
 800c964:	2301      	movs	r3, #1
 800c966:	e054      	b.n	800ca12 <HAL_TIM_Base_Start_IT+0xc2>
  }

  /* Set the TIM state */
  htim->State = HAL_TIM_STATE_BUSY;
 800c968:	687b      	ldr	r3, [r7, #4]
 800c96a:	2202      	movs	r2, #2
 800c96c:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  /* Enable the TIM Update interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 800c970:	687b      	ldr	r3, [r7, #4]
 800c972:	681b      	ldr	r3, [r3, #0]
 800c974:	68da      	ldr	r2, [r3, #12]
 800c976:	687b      	ldr	r3, [r7, #4]
 800c978:	681b      	ldr	r3, [r3, #0]
 800c97a:	f042 0201 	orr.w	r2, r2, #1
 800c97e:	60da      	str	r2, [r3, #12]

  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
 800c980:	687b      	ldr	r3, [r7, #4]
 800c982:	681b      	ldr	r3, [r3, #0]
 800c984:	4a26      	ldr	r2, [pc, #152]	@ (800ca20 <HAL_TIM_Base_Start_IT+0xd0>)
 800c986:	4293      	cmp	r3, r2
 800c988:	d022      	beq.n	800c9d0 <HAL_TIM_Base_Start_IT+0x80>
 800c98a:	687b      	ldr	r3, [r7, #4]
 800c98c:	681b      	ldr	r3, [r3, #0]
 800c98e:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800c992:	d01d      	beq.n	800c9d0 <HAL_TIM_Base_Start_IT+0x80>
 800c994:	687b      	ldr	r3, [r7, #4]
 800c996:	681b      	ldr	r3, [r3, #0]
 800c998:	4a22      	ldr	r2, [pc, #136]	@ (800ca24 <HAL_TIM_Base_Start_IT+0xd4>)
 800c99a:	4293      	cmp	r3, r2
 800c99c:	d018      	beq.n	800c9d0 <HAL_TIM_Base_Start_IT+0x80>
 800c99e:	687b      	ldr	r3, [r7, #4]
 800c9a0:	681b      	ldr	r3, [r3, #0]
 800c9a2:	4a21      	ldr	r2, [pc, #132]	@ (800ca28 <HAL_TIM_Base_Start_IT+0xd8>)
 800c9a4:	4293      	cmp	r3, r2
 800c9a6:	d013      	beq.n	800c9d0 <HAL_TIM_Base_Start_IT+0x80>
 800c9a8:	687b      	ldr	r3, [r7, #4]
 800c9aa:	681b      	ldr	r3, [r3, #0]
 800c9ac:	4a1f      	ldr	r2, [pc, #124]	@ (800ca2c <HAL_TIM_Base_Start_IT+0xdc>)
 800c9ae:	4293      	cmp	r3, r2
 800c9b0:	d00e      	beq.n	800c9d0 <HAL_TIM_Base_Start_IT+0x80>
 800c9b2:	687b      	ldr	r3, [r7, #4]
 800c9b4:	681b      	ldr	r3, [r3, #0]
 800c9b6:	4a1e      	ldr	r2, [pc, #120]	@ (800ca30 <HAL_TIM_Base_Start_IT+0xe0>)
 800c9b8:	4293      	cmp	r3, r2
 800c9ba:	d009      	beq.n	800c9d0 <HAL_TIM_Base_Start_IT+0x80>
 800c9bc:	687b      	ldr	r3, [r7, #4]
 800c9be:	681b      	ldr	r3, [r3, #0]
 800c9c0:	4a1c      	ldr	r2, [pc, #112]	@ (800ca34 <HAL_TIM_Base_Start_IT+0xe4>)
 800c9c2:	4293      	cmp	r3, r2
 800c9c4:	d004      	beq.n	800c9d0 <HAL_TIM_Base_Start_IT+0x80>
 800c9c6:	687b      	ldr	r3, [r7, #4]
 800c9c8:	681b      	ldr	r3, [r3, #0]
 800c9ca:	4a1b      	ldr	r2, [pc, #108]	@ (800ca38 <HAL_TIM_Base_Start_IT+0xe8>)
 800c9cc:	4293      	cmp	r3, r2
 800c9ce:	d115      	bne.n	800c9fc <HAL_TIM_Base_Start_IT+0xac>
  {
    tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
 800c9d0:	687b      	ldr	r3, [r7, #4]
 800c9d2:	681b      	ldr	r3, [r3, #0]
 800c9d4:	689a      	ldr	r2, [r3, #8]
 800c9d6:	4b19      	ldr	r3, [pc, #100]	@ (800ca3c <HAL_TIM_Base_Start_IT+0xec>)
 800c9d8:	4013      	ands	r3, r2
 800c9da:	60fb      	str	r3, [r7, #12]
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800c9dc:	68fb      	ldr	r3, [r7, #12]
 800c9de:	2b06      	cmp	r3, #6
 800c9e0:	d015      	beq.n	800ca0e <HAL_TIM_Base_Start_IT+0xbe>
 800c9e2:	68fb      	ldr	r3, [r7, #12]
 800c9e4:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800c9e8:	d011      	beq.n	800ca0e <HAL_TIM_Base_Start_IT+0xbe>
    {
      __HAL_TIM_ENABLE(htim);
 800c9ea:	687b      	ldr	r3, [r7, #4]
 800c9ec:	681b      	ldr	r3, [r3, #0]
 800c9ee:	681a      	ldr	r2, [r3, #0]
 800c9f0:	687b      	ldr	r3, [r7, #4]
 800c9f2:	681b      	ldr	r3, [r3, #0]
 800c9f4:	f042 0201 	orr.w	r2, r2, #1
 800c9f8:	601a      	str	r2, [r3, #0]
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800c9fa:	e008      	b.n	800ca0e <HAL_TIM_Base_Start_IT+0xbe>
    }
  }
  else
  {
    __HAL_TIM_ENABLE(htim);
 800c9fc:	687b      	ldr	r3, [r7, #4]
 800c9fe:	681b      	ldr	r3, [r3, #0]
 800ca00:	681a      	ldr	r2, [r3, #0]
 800ca02:	687b      	ldr	r3, [r7, #4]
 800ca04:	681b      	ldr	r3, [r3, #0]
 800ca06:	f042 0201 	orr.w	r2, r2, #1
 800ca0a:	601a      	str	r2, [r3, #0]
 800ca0c:	e000      	b.n	800ca10 <HAL_TIM_Base_Start_IT+0xc0>
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800ca0e:	bf00      	nop
  }

  /* Return function status */
  return HAL_OK;
 800ca10:	2300      	movs	r3, #0
}
 800ca12:	4618      	mov	r0, r3
 800ca14:	3714      	adds	r7, #20
 800ca16:	46bd      	mov	sp, r7
 800ca18:	f85d 7b04 	ldr.w	r7, [sp], #4
 800ca1c:	4770      	bx	lr
 800ca1e:	bf00      	nop
 800ca20:	40010000 	.word	0x40010000
 800ca24:	40000400 	.word	0x40000400
 800ca28:	40000800 	.word	0x40000800
 800ca2c:	40000c00 	.word	0x40000c00
 800ca30:	40010400 	.word	0x40010400
 800ca34:	40001800 	.word	0x40001800
 800ca38:	40014000 	.word	0x40014000
 800ca3c:	00010007 	.word	0x00010007

0800ca40 <HAL_TIM_IRQHandler>:
  * @brief  This function handles TIM interrupts requests.
  * @param  htim TIM  handle
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
 800ca40:	b580      	push	{r7, lr}
 800ca42:	b084      	sub	sp, #16
 800ca44:	af00      	add	r7, sp, #0
 800ca46:	6078      	str	r0, [r7, #4]
  uint32_t itsource = htim->Instance->DIER;
 800ca48:	687b      	ldr	r3, [r7, #4]
 800ca4a:	681b      	ldr	r3, [r3, #0]
 800ca4c:	68db      	ldr	r3, [r3, #12]
 800ca4e:	60fb      	str	r3, [r7, #12]
  uint32_t itflag   = htim->Instance->SR;
 800ca50:	687b      	ldr	r3, [r7, #4]
 800ca52:	681b      	ldr	r3, [r3, #0]
 800ca54:	691b      	ldr	r3, [r3, #16]
 800ca56:	60bb      	str	r3, [r7, #8]

  /* Capture compare 1 event */
  if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1))
 800ca58:	68bb      	ldr	r3, [r7, #8]
 800ca5a:	f003 0302 	and.w	r3, r3, #2
 800ca5e:	2b00      	cmp	r3, #0
 800ca60:	d020      	beq.n	800caa4 <HAL_TIM_IRQHandler+0x64>
  {
    if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1))
 800ca62:	68fb      	ldr	r3, [r7, #12]
 800ca64:	f003 0302 	and.w	r3, r3, #2
 800ca68:	2b00      	cmp	r3, #0
 800ca6a:	d01b      	beq.n	800caa4 <HAL_TIM_IRQHandler+0x64>
    {
      {
        __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1);
 800ca6c:	687b      	ldr	r3, [r7, #4]
 800ca6e:	681b      	ldr	r3, [r3, #0]
 800ca70:	f06f 0202 	mvn.w	r2, #2
 800ca74:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 800ca76:	687b      	ldr	r3, [r7, #4]
 800ca78:	2201      	movs	r2, #1
 800ca7a:	771a      	strb	r2, [r3, #28]

        /* Input capture event */
        if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 800ca7c:	687b      	ldr	r3, [r7, #4]
 800ca7e:	681b      	ldr	r3, [r3, #0]
 800ca80:	699b      	ldr	r3, [r3, #24]
 800ca82:	f003 0303 	and.w	r3, r3, #3
 800ca86:	2b00      	cmp	r3, #0
 800ca88:	d003      	beq.n	800ca92 <HAL_TIM_IRQHandler+0x52>
        {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
          htim->IC_CaptureCallback(htim);
#else
          HAL_TIM_IC_CaptureCallback(htim);
 800ca8a:	6878      	ldr	r0, [r7, #4]
 800ca8c:	f000 f8e9 	bl	800cc62 <HAL_TIM_IC_CaptureCallback>
 800ca90:	e005      	b.n	800ca9e <HAL_TIM_IRQHandler+0x5e>
        {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
          htim->OC_DelayElapsedCallback(htim);
          htim->PWM_PulseFinishedCallback(htim);
#else
          HAL_TIM_OC_DelayElapsedCallback(htim);
 800ca92:	6878      	ldr	r0, [r7, #4]
 800ca94:	f000 f8db 	bl	800cc4e <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 800ca98:	6878      	ldr	r0, [r7, #4]
 800ca9a:	f000 f8ec 	bl	800cc76 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800ca9e:	687b      	ldr	r3, [r7, #4]
 800caa0:	2200      	movs	r2, #0
 800caa2:	771a      	strb	r2, [r3, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2))
 800caa4:	68bb      	ldr	r3, [r7, #8]
 800caa6:	f003 0304 	and.w	r3, r3, #4
 800caaa:	2b00      	cmp	r3, #0
 800caac:	d020      	beq.n	800caf0 <HAL_TIM_IRQHandler+0xb0>
  {
    if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2))
 800caae:	68fb      	ldr	r3, [r7, #12]
 800cab0:	f003 0304 	and.w	r3, r3, #4
 800cab4:	2b00      	cmp	r3, #0
 800cab6:	d01b      	beq.n	800caf0 <HAL_TIM_IRQHandler+0xb0>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2);
 800cab8:	687b      	ldr	r3, [r7, #4]
 800caba:	681b      	ldr	r3, [r3, #0]
 800cabc:	f06f 0204 	mvn.w	r2, #4
 800cac0:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 800cac2:	687b      	ldr	r3, [r7, #4]
 800cac4:	2202      	movs	r2, #2
 800cac6:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 800cac8:	687b      	ldr	r3, [r7, #4]
 800caca:	681b      	ldr	r3, [r3, #0]
 800cacc:	699b      	ldr	r3, [r3, #24]
 800cace:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800cad2:	2b00      	cmp	r3, #0
 800cad4:	d003      	beq.n	800cade <HAL_TIM_IRQHandler+0x9e>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800cad6:	6878      	ldr	r0, [r7, #4]
 800cad8:	f000 f8c3 	bl	800cc62 <HAL_TIM_IC_CaptureCallback>
 800cadc:	e005      	b.n	800caea <HAL_TIM_IRQHandler+0xaa>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800cade:	6878      	ldr	r0, [r7, #4]
 800cae0:	f000 f8b5 	bl	800cc4e <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800cae4:	6878      	ldr	r0, [r7, #4]
 800cae6:	f000 f8c6 	bl	800cc76 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800caea:	687b      	ldr	r3, [r7, #4]
 800caec:	2200      	movs	r2, #0
 800caee:	771a      	strb	r2, [r3, #28]
    }
  }
  /* Capture compare 3 event */
  if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3))
 800caf0:	68bb      	ldr	r3, [r7, #8]
 800caf2:	f003 0308 	and.w	r3, r3, #8
 800caf6:	2b00      	cmp	r3, #0
 800caf8:	d020      	beq.n	800cb3c <HAL_TIM_IRQHandler+0xfc>
  {
    if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
 800cafa:	68fb      	ldr	r3, [r7, #12]
 800cafc:	f003 0308 	and.w	r3, r3, #8
 800cb00:	2b00      	cmp	r3, #0
 800cb02:	d01b      	beq.n	800cb3c <HAL_TIM_IRQHandler+0xfc>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
 800cb04:	687b      	ldr	r3, [r7, #4]
 800cb06:	681b      	ldr	r3, [r3, #0]
 800cb08:	f06f 0208 	mvn.w	r2, #8
 800cb0c:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 800cb0e:	687b      	ldr	r3, [r7, #4]
 800cb10:	2204      	movs	r2, #4
 800cb12:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 800cb14:	687b      	ldr	r3, [r7, #4]
 800cb16:	681b      	ldr	r3, [r3, #0]
 800cb18:	69db      	ldr	r3, [r3, #28]
 800cb1a:	f003 0303 	and.w	r3, r3, #3
 800cb1e:	2b00      	cmp	r3, #0
 800cb20:	d003      	beq.n	800cb2a <HAL_TIM_IRQHandler+0xea>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800cb22:	6878      	ldr	r0, [r7, #4]
 800cb24:	f000 f89d 	bl	800cc62 <HAL_TIM_IC_CaptureCallback>
 800cb28:	e005      	b.n	800cb36 <HAL_TIM_IRQHandler+0xf6>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800cb2a:	6878      	ldr	r0, [r7, #4]
 800cb2c:	f000 f88f 	bl	800cc4e <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800cb30:	6878      	ldr	r0, [r7, #4]
 800cb32:	f000 f8a0 	bl	800cc76 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800cb36:	687b      	ldr	r3, [r7, #4]
 800cb38:	2200      	movs	r2, #0
 800cb3a:	771a      	strb	r2, [r3, #28]
    }
  }
  /* Capture compare 4 event */
  if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4))
 800cb3c:	68bb      	ldr	r3, [r7, #8]
 800cb3e:	f003 0310 	and.w	r3, r3, #16
 800cb42:	2b00      	cmp	r3, #0
 800cb44:	d020      	beq.n	800cb88 <HAL_TIM_IRQHandler+0x148>
  {
    if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4))
 800cb46:	68fb      	ldr	r3, [r7, #12]
 800cb48:	f003 0310 	and.w	r3, r3, #16
 800cb4c:	2b00      	cmp	r3, #0
 800cb4e:	d01b      	beq.n	800cb88 <HAL_TIM_IRQHandler+0x148>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4);
 800cb50:	687b      	ldr	r3, [r7, #4]
 800cb52:	681b      	ldr	r3, [r3, #0]
 800cb54:	f06f 0210 	mvn.w	r2, #16
 800cb58:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 800cb5a:	687b      	ldr	r3, [r7, #4]
 800cb5c:	2208      	movs	r2, #8
 800cb5e:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 800cb60:	687b      	ldr	r3, [r7, #4]
 800cb62:	681b      	ldr	r3, [r3, #0]
 800cb64:	69db      	ldr	r3, [r3, #28]
 800cb66:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800cb6a:	2b00      	cmp	r3, #0
 800cb6c:	d003      	beq.n	800cb76 <HAL_TIM_IRQHandler+0x136>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800cb6e:	6878      	ldr	r0, [r7, #4]
 800cb70:	f000 f877 	bl	800cc62 <HAL_TIM_IC_CaptureCallback>
 800cb74:	e005      	b.n	800cb82 <HAL_TIM_IRQHandler+0x142>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800cb76:	6878      	ldr	r0, [r7, #4]
 800cb78:	f000 f869 	bl	800cc4e <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800cb7c:	6878      	ldr	r0, [r7, #4]
 800cb7e:	f000 f87a 	bl	800cc76 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800cb82:	687b      	ldr	r3, [r7, #4]
 800cb84:	2200      	movs	r2, #0
 800cb86:	771a      	strb	r2, [r3, #28]
    }
  }
  /* TIM Update event */
  if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE))
 800cb88:	68bb      	ldr	r3, [r7, #8]
 800cb8a:	f003 0301 	and.w	r3, r3, #1
 800cb8e:	2b00      	cmp	r3, #0
 800cb90:	d00c      	beq.n	800cbac <HAL_TIM_IRQHandler+0x16c>
  {
    if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
 800cb92:	68fb      	ldr	r3, [r7, #12]
 800cb94:	f003 0301 	and.w	r3, r3, #1
 800cb98:	2b00      	cmp	r3, #0
 800cb9a:	d007      	beq.n	800cbac <HAL_TIM_IRQHandler+0x16c>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
 800cb9c:	687b      	ldr	r3, [r7, #4]
 800cb9e:	681b      	ldr	r3, [r3, #0]
 800cba0:	f06f 0201 	mvn.w	r2, #1
 800cba4:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->PeriodElapsedCallback(htim);
#else
      HAL_TIM_PeriodElapsedCallback(htim);
 800cba6:	6878      	ldr	r0, [r7, #4]
 800cba8:	f7f5 fc90 	bl	80024cc <HAL_TIM_PeriodElapsedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Break input event */
  if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
 800cbac:	68bb      	ldr	r3, [r7, #8]
 800cbae:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800cbb2:	2b00      	cmp	r3, #0
 800cbb4:	d104      	bne.n	800cbc0 <HAL_TIM_IRQHandler+0x180>
      ((itflag & (TIM_FLAG_SYSTEM_BREAK)) == (TIM_FLAG_SYSTEM_BREAK)))
 800cbb6:	68bb      	ldr	r3, [r7, #8]
 800cbb8:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
  if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
 800cbbc:	2b00      	cmp	r3, #0
 800cbbe:	d00c      	beq.n	800cbda <HAL_TIM_IRQHandler+0x19a>
  {
    if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
 800cbc0:	68fb      	ldr	r3, [r7, #12]
 800cbc2:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800cbc6:	2b00      	cmp	r3, #0
 800cbc8:	d007      	beq.n	800cbda <HAL_TIM_IRQHandler+0x19a>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK | TIM_FLAG_SYSTEM_BREAK);
 800cbca:	687b      	ldr	r3, [r7, #4]
 800cbcc:	681b      	ldr	r3, [r3, #0]
 800cbce:	f46f 5202 	mvn.w	r2, #8320	@ 0x2080
 800cbd2:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->BreakCallback(htim);
#else
      HAL_TIMEx_BreakCallback(htim);
 800cbd4:	6878      	ldr	r0, [r7, #4]
 800cbd6:	f000 f913 	bl	800ce00 <HAL_TIMEx_BreakCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Break2 input event */
  if ((itflag & (TIM_FLAG_BREAK2)) == (TIM_FLAG_BREAK2))
 800cbda:	68bb      	ldr	r3, [r7, #8]
 800cbdc:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800cbe0:	2b00      	cmp	r3, #0
 800cbe2:	d00c      	beq.n	800cbfe <HAL_TIM_IRQHandler+0x1be>
  {
    if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
 800cbe4:	68fb      	ldr	r3, [r7, #12]
 800cbe6:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800cbea:	2b00      	cmp	r3, #0
 800cbec:	d007      	beq.n	800cbfe <HAL_TIM_IRQHandler+0x1be>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2);
 800cbee:	687b      	ldr	r3, [r7, #4]
 800cbf0:	681b      	ldr	r3, [r3, #0]
 800cbf2:	f46f 7280 	mvn.w	r2, #256	@ 0x100
 800cbf6:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->Break2Callback(htim);
#else
      HAL_TIMEx_Break2Callback(htim);
 800cbf8:	6878      	ldr	r0, [r7, #4]
 800cbfa:	f000 f90b 	bl	800ce14 <HAL_TIMEx_Break2Callback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Trigger detection event */
  if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER))
 800cbfe:	68bb      	ldr	r3, [r7, #8]
 800cc00:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800cc04:	2b00      	cmp	r3, #0
 800cc06:	d00c      	beq.n	800cc22 <HAL_TIM_IRQHandler+0x1e2>
  {
    if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER))
 800cc08:	68fb      	ldr	r3, [r7, #12]
 800cc0a:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800cc0e:	2b00      	cmp	r3, #0
 800cc10:	d007      	beq.n	800cc22 <HAL_TIM_IRQHandler+0x1e2>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER);
 800cc12:	687b      	ldr	r3, [r7, #4]
 800cc14:	681b      	ldr	r3, [r3, #0]
 800cc16:	f06f 0240 	mvn.w	r2, #64	@ 0x40
 800cc1a:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->TriggerCallback(htim);
#else
      HAL_TIM_TriggerCallback(htim);
 800cc1c:	6878      	ldr	r0, [r7, #4]
 800cc1e:	f000 f834 	bl	800cc8a <HAL_TIM_TriggerCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM commutation event */
  if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM))
 800cc22:	68bb      	ldr	r3, [r7, #8]
 800cc24:	f003 0320 	and.w	r3, r3, #32
 800cc28:	2b00      	cmp	r3, #0
 800cc2a:	d00c      	beq.n	800cc46 <HAL_TIM_IRQHandler+0x206>
  {
    if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM))
 800cc2c:	68fb      	ldr	r3, [r7, #12]
 800cc2e:	f003 0320 	and.w	r3, r3, #32
 800cc32:	2b00      	cmp	r3, #0
 800cc34:	d007      	beq.n	800cc46 <HAL_TIM_IRQHandler+0x206>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
 800cc36:	687b      	ldr	r3, [r7, #4]
 800cc38:	681b      	ldr	r3, [r3, #0]
 800cc3a:	f06f 0220 	mvn.w	r2, #32
 800cc3e:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->CommutationCallback(htim);
#else
      HAL_TIMEx_CommutCallback(htim);
 800cc40:	6878      	ldr	r0, [r7, #4]
 800cc42:	f000 f8d3 	bl	800cdec <HAL_TIMEx_CommutCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
}
 800cc46:	bf00      	nop
 800cc48:	3710      	adds	r7, #16
 800cc4a:	46bd      	mov	sp, r7
 800cc4c:	bd80      	pop	{r7, pc}

0800cc4e <HAL_TIM_OC_DelayElapsedCallback>:
  * @brief  Output Compare callback in non-blocking mode
  * @param  htim TIM OC handle
  * @retval None
  */
__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
{
 800cc4e:	b480      	push	{r7}
 800cc50:	b083      	sub	sp, #12
 800cc52:	af00      	add	r7, sp, #0
 800cc54:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
   */
}
 800cc56:	bf00      	nop
 800cc58:	370c      	adds	r7, #12
 800cc5a:	46bd      	mov	sp, r7
 800cc5c:	f85d 7b04 	ldr.w	r7, [sp], #4
 800cc60:	4770      	bx	lr

0800cc62 <HAL_TIM_IC_CaptureCallback>:
  * @brief  Input Capture callback in non-blocking mode
  * @param  htim TIM IC handle
  * @retval None
  */
__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
{
 800cc62:	b480      	push	{r7}
 800cc64:	b083      	sub	sp, #12
 800cc66:	af00      	add	r7, sp, #0
 800cc68:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_IC_CaptureCallback could be implemented in the user file
   */
}
 800cc6a:	bf00      	nop
 800cc6c:	370c      	adds	r7, #12
 800cc6e:	46bd      	mov	sp, r7
 800cc70:	f85d 7b04 	ldr.w	r7, [sp], #4
 800cc74:	4770      	bx	lr

0800cc76 <HAL_TIM_PWM_PulseFinishedCallback>:
  * @brief  PWM Pulse finished callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
{
 800cc76:	b480      	push	{r7}
 800cc78:	b083      	sub	sp, #12
 800cc7a:	af00      	add	r7, sp, #0
 800cc7c:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
   */
}
 800cc7e:	bf00      	nop
 800cc80:	370c      	adds	r7, #12
 800cc82:	46bd      	mov	sp, r7
 800cc84:	f85d 7b04 	ldr.w	r7, [sp], #4
 800cc88:	4770      	bx	lr

0800cc8a <HAL_TIM_TriggerCallback>:
  * @brief  Hall Trigger detection callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
{
 800cc8a:	b480      	push	{r7}
 800cc8c:	b083      	sub	sp, #12
 800cc8e:	af00      	add	r7, sp, #0
 800cc90:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_TriggerCallback could be implemented in the user file
   */
}
 800cc92:	bf00      	nop
 800cc94:	370c      	adds	r7, #12
 800cc96:	46bd      	mov	sp, r7
 800cc98:	f85d 7b04 	ldr.w	r7, [sp], #4
 800cc9c:	4770      	bx	lr
	...

0800cca0 <TIM_Base_SetConfig>:
  * @param  TIMx TIM peripheral
  * @param  Structure TIM Base configuration structure
  * @retval None
  */
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
 800cca0:	b480      	push	{r7}
 800cca2:	b085      	sub	sp, #20
 800cca4:	af00      	add	r7, sp, #0
 800cca6:	6078      	str	r0, [r7, #4]
 800cca8:	6039      	str	r1, [r7, #0]
  uint32_t tmpcr1;
  tmpcr1 = TIMx->CR1;
 800ccaa:	687b      	ldr	r3, [r7, #4]
 800ccac:	681b      	ldr	r3, [r3, #0]
 800ccae:	60fb      	str	r3, [r7, #12]

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 800ccb0:	687b      	ldr	r3, [r7, #4]
 800ccb2:	4a46      	ldr	r2, [pc, #280]	@ (800cdcc <TIM_Base_SetConfig+0x12c>)
 800ccb4:	4293      	cmp	r3, r2
 800ccb6:	d013      	beq.n	800cce0 <TIM_Base_SetConfig+0x40>
 800ccb8:	687b      	ldr	r3, [r7, #4]
 800ccba:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800ccbe:	d00f      	beq.n	800cce0 <TIM_Base_SetConfig+0x40>
 800ccc0:	687b      	ldr	r3, [r7, #4]
 800ccc2:	4a43      	ldr	r2, [pc, #268]	@ (800cdd0 <TIM_Base_SetConfig+0x130>)
 800ccc4:	4293      	cmp	r3, r2
 800ccc6:	d00b      	beq.n	800cce0 <TIM_Base_SetConfig+0x40>
 800ccc8:	687b      	ldr	r3, [r7, #4]
 800ccca:	4a42      	ldr	r2, [pc, #264]	@ (800cdd4 <TIM_Base_SetConfig+0x134>)
 800cccc:	4293      	cmp	r3, r2
 800ccce:	d007      	beq.n	800cce0 <TIM_Base_SetConfig+0x40>
 800ccd0:	687b      	ldr	r3, [r7, #4]
 800ccd2:	4a41      	ldr	r2, [pc, #260]	@ (800cdd8 <TIM_Base_SetConfig+0x138>)
 800ccd4:	4293      	cmp	r3, r2
 800ccd6:	d003      	beq.n	800cce0 <TIM_Base_SetConfig+0x40>
 800ccd8:	687b      	ldr	r3, [r7, #4]
 800ccda:	4a40      	ldr	r2, [pc, #256]	@ (800cddc <TIM_Base_SetConfig+0x13c>)
 800ccdc:	4293      	cmp	r3, r2
 800ccde:	d108      	bne.n	800ccf2 <TIM_Base_SetConfig+0x52>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 800cce0:	68fb      	ldr	r3, [r7, #12]
 800cce2:	f023 0370 	bic.w	r3, r3, #112	@ 0x70
 800cce6:	60fb      	str	r3, [r7, #12]
    tmpcr1 |= Structure->CounterMode;
 800cce8:	683b      	ldr	r3, [r7, #0]
 800ccea:	685b      	ldr	r3, [r3, #4]
 800ccec:	68fa      	ldr	r2, [r7, #12]
 800ccee:	4313      	orrs	r3, r2
 800ccf0:	60fb      	str	r3, [r7, #12]
  }

  if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 800ccf2:	687b      	ldr	r3, [r7, #4]
 800ccf4:	4a35      	ldr	r2, [pc, #212]	@ (800cdcc <TIM_Base_SetConfig+0x12c>)
 800ccf6:	4293      	cmp	r3, r2
 800ccf8:	d01f      	beq.n	800cd3a <TIM_Base_SetConfig+0x9a>
 800ccfa:	687b      	ldr	r3, [r7, #4]
 800ccfc:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800cd00:	d01b      	beq.n	800cd3a <TIM_Base_SetConfig+0x9a>
 800cd02:	687b      	ldr	r3, [r7, #4]
 800cd04:	4a32      	ldr	r2, [pc, #200]	@ (800cdd0 <TIM_Base_SetConfig+0x130>)
 800cd06:	4293      	cmp	r3, r2
 800cd08:	d017      	beq.n	800cd3a <TIM_Base_SetConfig+0x9a>
 800cd0a:	687b      	ldr	r3, [r7, #4]
 800cd0c:	4a31      	ldr	r2, [pc, #196]	@ (800cdd4 <TIM_Base_SetConfig+0x134>)
 800cd0e:	4293      	cmp	r3, r2
 800cd10:	d013      	beq.n	800cd3a <TIM_Base_SetConfig+0x9a>
 800cd12:	687b      	ldr	r3, [r7, #4]
 800cd14:	4a30      	ldr	r2, [pc, #192]	@ (800cdd8 <TIM_Base_SetConfig+0x138>)
 800cd16:	4293      	cmp	r3, r2
 800cd18:	d00f      	beq.n	800cd3a <TIM_Base_SetConfig+0x9a>
 800cd1a:	687b      	ldr	r3, [r7, #4]
 800cd1c:	4a2f      	ldr	r2, [pc, #188]	@ (800cddc <TIM_Base_SetConfig+0x13c>)
 800cd1e:	4293      	cmp	r3, r2
 800cd20:	d00b      	beq.n	800cd3a <TIM_Base_SetConfig+0x9a>
 800cd22:	687b      	ldr	r3, [r7, #4]
 800cd24:	4a2e      	ldr	r2, [pc, #184]	@ (800cde0 <TIM_Base_SetConfig+0x140>)
 800cd26:	4293      	cmp	r3, r2
 800cd28:	d007      	beq.n	800cd3a <TIM_Base_SetConfig+0x9a>
 800cd2a:	687b      	ldr	r3, [r7, #4]
 800cd2c:	4a2d      	ldr	r2, [pc, #180]	@ (800cde4 <TIM_Base_SetConfig+0x144>)
 800cd2e:	4293      	cmp	r3, r2
 800cd30:	d003      	beq.n	800cd3a <TIM_Base_SetConfig+0x9a>
 800cd32:	687b      	ldr	r3, [r7, #4]
 800cd34:	4a2c      	ldr	r2, [pc, #176]	@ (800cde8 <TIM_Base_SetConfig+0x148>)
 800cd36:	4293      	cmp	r3, r2
 800cd38:	d108      	bne.n	800cd4c <TIM_Base_SetConfig+0xac>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
 800cd3a:	68fb      	ldr	r3, [r7, #12]
 800cd3c:	f423 7340 	bic.w	r3, r3, #768	@ 0x300
 800cd40:	60fb      	str	r3, [r7, #12]
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 800cd42:	683b      	ldr	r3, [r7, #0]
 800cd44:	68db      	ldr	r3, [r3, #12]
 800cd46:	68fa      	ldr	r2, [r7, #12]
 800cd48:	4313      	orrs	r3, r2
 800cd4a:	60fb      	str	r3, [r7, #12]
  }

  /* Set the auto-reload preload */
  MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
 800cd4c:	68fb      	ldr	r3, [r7, #12]
 800cd4e:	f023 0280 	bic.w	r2, r3, #128	@ 0x80
 800cd52:	683b      	ldr	r3, [r7, #0]
 800cd54:	695b      	ldr	r3, [r3, #20]
 800cd56:	4313      	orrs	r3, r2
 800cd58:	60fb      	str	r3, [r7, #12]

  TIMx->CR1 = tmpcr1;
 800cd5a:	687b      	ldr	r3, [r7, #4]
 800cd5c:	68fa      	ldr	r2, [r7, #12]
 800cd5e:	601a      	str	r2, [r3, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 800cd60:	683b      	ldr	r3, [r7, #0]
 800cd62:	689a      	ldr	r2, [r3, #8]
 800cd64:	687b      	ldr	r3, [r7, #4]
 800cd66:	62da      	str	r2, [r3, #44]	@ 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = Structure->Prescaler;
 800cd68:	683b      	ldr	r3, [r7, #0]
 800cd6a:	681a      	ldr	r2, [r3, #0]
 800cd6c:	687b      	ldr	r3, [r7, #4]
 800cd6e:	629a      	str	r2, [r3, #40]	@ 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 800cd70:	687b      	ldr	r3, [r7, #4]
 800cd72:	4a16      	ldr	r2, [pc, #88]	@ (800cdcc <TIM_Base_SetConfig+0x12c>)
 800cd74:	4293      	cmp	r3, r2
 800cd76:	d00f      	beq.n	800cd98 <TIM_Base_SetConfig+0xf8>
 800cd78:	687b      	ldr	r3, [r7, #4]
 800cd7a:	4a18      	ldr	r2, [pc, #96]	@ (800cddc <TIM_Base_SetConfig+0x13c>)
 800cd7c:	4293      	cmp	r3, r2
 800cd7e:	d00b      	beq.n	800cd98 <TIM_Base_SetConfig+0xf8>
 800cd80:	687b      	ldr	r3, [r7, #4]
 800cd82:	4a17      	ldr	r2, [pc, #92]	@ (800cde0 <TIM_Base_SetConfig+0x140>)
 800cd84:	4293      	cmp	r3, r2
 800cd86:	d007      	beq.n	800cd98 <TIM_Base_SetConfig+0xf8>
 800cd88:	687b      	ldr	r3, [r7, #4]
 800cd8a:	4a16      	ldr	r2, [pc, #88]	@ (800cde4 <TIM_Base_SetConfig+0x144>)
 800cd8c:	4293      	cmp	r3, r2
 800cd8e:	d003      	beq.n	800cd98 <TIM_Base_SetConfig+0xf8>
 800cd90:	687b      	ldr	r3, [r7, #4]
 800cd92:	4a15      	ldr	r2, [pc, #84]	@ (800cde8 <TIM_Base_SetConfig+0x148>)
 800cd94:	4293      	cmp	r3, r2
 800cd96:	d103      	bne.n	800cda0 <TIM_Base_SetConfig+0x100>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 800cd98:	683b      	ldr	r3, [r7, #0]
 800cd9a:	691a      	ldr	r2, [r3, #16]
 800cd9c:	687b      	ldr	r3, [r7, #4]
 800cd9e:	631a      	str	r2, [r3, #48]	@ 0x30
  }

  /* Generate an update event to reload the Prescaler
     and the repetition counter (only for advanced timer) value immediately */
  TIMx->EGR = TIM_EGR_UG;
 800cda0:	687b      	ldr	r3, [r7, #4]
 800cda2:	2201      	movs	r2, #1
 800cda4:	615a      	str	r2, [r3, #20]

  /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
  if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
 800cda6:	687b      	ldr	r3, [r7, #4]
 800cda8:	691b      	ldr	r3, [r3, #16]
 800cdaa:	f003 0301 	and.w	r3, r3, #1
 800cdae:	2b01      	cmp	r3, #1
 800cdb0:	d105      	bne.n	800cdbe <TIM_Base_SetConfig+0x11e>
  {
    /* Clear the update flag */
    CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
 800cdb2:	687b      	ldr	r3, [r7, #4]
 800cdb4:	691b      	ldr	r3, [r3, #16]
 800cdb6:	f023 0201 	bic.w	r2, r3, #1
 800cdba:	687b      	ldr	r3, [r7, #4]
 800cdbc:	611a      	str	r2, [r3, #16]
  }
}
 800cdbe:	bf00      	nop
 800cdc0:	3714      	adds	r7, #20
 800cdc2:	46bd      	mov	sp, r7
 800cdc4:	f85d 7b04 	ldr.w	r7, [sp], #4
 800cdc8:	4770      	bx	lr
 800cdca:	bf00      	nop
 800cdcc:	40010000 	.word	0x40010000
 800cdd0:	40000400 	.word	0x40000400
 800cdd4:	40000800 	.word	0x40000800
 800cdd8:	40000c00 	.word	0x40000c00
 800cddc:	40010400 	.word	0x40010400
 800cde0:	40014000 	.word	0x40014000
 800cde4:	40014400 	.word	0x40014400
 800cde8:	40014800 	.word	0x40014800

0800cdec <HAL_TIMEx_CommutCallback>:
  * @brief  Commutation callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
{
 800cdec:	b480      	push	{r7}
 800cdee:	b083      	sub	sp, #12
 800cdf0:	af00      	add	r7, sp, #0
 800cdf2:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIMEx_CommutCallback could be implemented in the user file
   */
}
 800cdf4:	bf00      	nop
 800cdf6:	370c      	adds	r7, #12
 800cdf8:	46bd      	mov	sp, r7
 800cdfa:	f85d 7b04 	ldr.w	r7, [sp], #4
 800cdfe:	4770      	bx	lr

0800ce00 <HAL_TIMEx_BreakCallback>:
  * @brief  Break detection callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 800ce00:	b480      	push	{r7}
 800ce02:	b083      	sub	sp, #12
 800ce04:	af00      	add	r7, sp, #0
 800ce06:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIMEx_BreakCallback could be implemented in the user file
   */
}
 800ce08:	bf00      	nop
 800ce0a:	370c      	adds	r7, #12
 800ce0c:	46bd      	mov	sp, r7
 800ce0e:	f85d 7b04 	ldr.w	r7, [sp], #4
 800ce12:	4770      	bx	lr

0800ce14 <HAL_TIMEx_Break2Callback>:
  * @brief  Break2 detection callback in non blocking mode
  * @param  htim: TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
{
 800ce14:	b480      	push	{r7}
 800ce16:	b083      	sub	sp, #12
 800ce18:	af00      	add	r7, sp, #0
 800ce1a:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_TIMEx_Break2Callback could be implemented in the user file
   */
}
 800ce1c:	bf00      	nop
 800ce1e:	370c      	adds	r7, #12
 800ce20:	46bd      	mov	sp, r7
 800ce22:	f85d 7b04 	ldr.w	r7, [sp], #4
 800ce26:	4770      	bx	lr

0800ce28 <HAL_UART_Init>:
  *        parameters in the UART_InitTypeDef and initialize the associated handle.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
 800ce28:	b580      	push	{r7, lr}
 800ce2a:	b082      	sub	sp, #8
 800ce2c:	af00      	add	r7, sp, #0
 800ce2e:	6078      	str	r0, [r7, #4]
  /* Check the UART handle allocation */
  if (huart == NULL)
 800ce30:	687b      	ldr	r3, [r7, #4]
 800ce32:	2b00      	cmp	r3, #0
 800ce34:	d101      	bne.n	800ce3a <HAL_UART_Init+0x12>
  {
    return HAL_ERROR;
 800ce36:	2301      	movs	r3, #1
 800ce38:	e042      	b.n	800cec0 <HAL_UART_Init+0x98>
  {
    /* Check the parameters */
    assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
  }

  if (huart->gState == HAL_UART_STATE_RESET)
 800ce3a:	687b      	ldr	r3, [r7, #4]
 800ce3c:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800ce40:	2b00      	cmp	r3, #0
 800ce42:	d106      	bne.n	800ce52 <HAL_UART_Init+0x2a>
  {
    /* Allocate lock resource and initialize it */
    huart->Lock = HAL_UNLOCKED;
 800ce44:	687b      	ldr	r3, [r7, #4]
 800ce46:	2200      	movs	r2, #0
 800ce48:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

    /* Init the low level hardware */
    huart->MspInitCallback(huart);
#else
    /* Init the low level hardware : GPIO, CLOCK */
    HAL_UART_MspInit(huart);
 800ce4c:	6878      	ldr	r0, [r7, #4]
 800ce4e:	f7f6 fadf 	bl	8003410 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
  }

  huart->gState = HAL_UART_STATE_BUSY;
 800ce52:	687b      	ldr	r3, [r7, #4]
 800ce54:	2224      	movs	r2, #36	@ 0x24
 800ce56:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  __HAL_UART_DISABLE(huart);
 800ce5a:	687b      	ldr	r3, [r7, #4]
 800ce5c:	681b      	ldr	r3, [r3, #0]
 800ce5e:	681a      	ldr	r2, [r3, #0]
 800ce60:	687b      	ldr	r3, [r7, #4]
 800ce62:	681b      	ldr	r3, [r3, #0]
 800ce64:	f022 0201 	bic.w	r2, r2, #1
 800ce68:	601a      	str	r2, [r3, #0]

  /* Perform advanced settings configuration */
  /* For some items, configuration requires to be done prior TE and RE bits are set */
  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
 800ce6a:	687b      	ldr	r3, [r7, #4]
 800ce6c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ce6e:	2b00      	cmp	r3, #0
 800ce70:	d002      	beq.n	800ce78 <HAL_UART_Init+0x50>
  {
    UART_AdvFeatureConfig(huart);
 800ce72:	6878      	ldr	r0, [r7, #4]
 800ce74:	f001 f9e8 	bl	800e248 <UART_AdvFeatureConfig>
  }

  /* Set the UART Communication parameters */
  if (UART_SetConfig(huart) == HAL_ERROR)
 800ce78:	6878      	ldr	r0, [r7, #4]
 800ce7a:	f000 fc7d 	bl	800d778 <UART_SetConfig>
 800ce7e:	4603      	mov	r3, r0
 800ce80:	2b01      	cmp	r3, #1
 800ce82:	d101      	bne.n	800ce88 <HAL_UART_Init+0x60>
  {
    return HAL_ERROR;
 800ce84:	2301      	movs	r3, #1
 800ce86:	e01b      	b.n	800cec0 <HAL_UART_Init+0x98>
  }

  /* In asynchronous mode, the following bits must be kept cleared:
  - LINEN and CLKEN bits in the USART_CR2 register,
  - SCEN, HDSEL and IREN  bits in the USART_CR3 register.*/
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 800ce88:	687b      	ldr	r3, [r7, #4]
 800ce8a:	681b      	ldr	r3, [r3, #0]
 800ce8c:	685a      	ldr	r2, [r3, #4]
 800ce8e:	687b      	ldr	r3, [r7, #4]
 800ce90:	681b      	ldr	r3, [r3, #0]
 800ce92:	f422 4290 	bic.w	r2, r2, #18432	@ 0x4800
 800ce96:	605a      	str	r2, [r3, #4]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 800ce98:	687b      	ldr	r3, [r7, #4]
 800ce9a:	681b      	ldr	r3, [r3, #0]
 800ce9c:	689a      	ldr	r2, [r3, #8]
 800ce9e:	687b      	ldr	r3, [r7, #4]
 800cea0:	681b      	ldr	r3, [r3, #0]
 800cea2:	f022 022a 	bic.w	r2, r2, #42	@ 0x2a
 800cea6:	609a      	str	r2, [r3, #8]

  __HAL_UART_ENABLE(huart);
 800cea8:	687b      	ldr	r3, [r7, #4]
 800ceaa:	681b      	ldr	r3, [r3, #0]
 800ceac:	681a      	ldr	r2, [r3, #0]
 800ceae:	687b      	ldr	r3, [r7, #4]
 800ceb0:	681b      	ldr	r3, [r3, #0]
 800ceb2:	f042 0201 	orr.w	r2, r2, #1
 800ceb6:	601a      	str	r2, [r3, #0]

  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
  return (UART_CheckIdleState(huart));
 800ceb8:	6878      	ldr	r0, [r7, #4]
 800ceba:	f001 fa67 	bl	800e38c <UART_CheckIdleState>
 800cebe:	4603      	mov	r3, r0
}
 800cec0:	4618      	mov	r0, r3
 800cec2:	3708      	adds	r7, #8
 800cec4:	46bd      	mov	sp, r7
 800cec6:	bd80      	pop	{r7, pc}

0800cec8 <HAL_UART_Transmit_IT>:
  * @param pData Pointer to data buffer (u8 or u16 data elements).
  * @param Size  Amount of data elements (u8 or u16) to be sent.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
{
 800cec8:	b480      	push	{r7}
 800ceca:	b091      	sub	sp, #68	@ 0x44
 800cecc:	af00      	add	r7, sp, #0
 800cece:	60f8      	str	r0, [r7, #12]
 800ced0:	60b9      	str	r1, [r7, #8]
 800ced2:	4613      	mov	r3, r2
 800ced4:	80fb      	strh	r3, [r7, #6]
  /* Check that a Tx process is not already ongoing */
  if (huart->gState == HAL_UART_STATE_READY)
 800ced6:	68fb      	ldr	r3, [r7, #12]
 800ced8:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800cedc:	2b20      	cmp	r3, #32
 800cede:	d178      	bne.n	800cfd2 <HAL_UART_Transmit_IT+0x10a>
  {
    if ((pData == NULL) || (Size == 0U))
 800cee0:	68bb      	ldr	r3, [r7, #8]
 800cee2:	2b00      	cmp	r3, #0
 800cee4:	d002      	beq.n	800ceec <HAL_UART_Transmit_IT+0x24>
 800cee6:	88fb      	ldrh	r3, [r7, #6]
 800cee8:	2b00      	cmp	r3, #0
 800ceea:	d101      	bne.n	800cef0 <HAL_UART_Transmit_IT+0x28>
    {
      return HAL_ERROR;
 800ceec:	2301      	movs	r3, #1
 800ceee:	e071      	b.n	800cfd4 <HAL_UART_Transmit_IT+0x10c>
    }

    huart->pTxBuffPtr  = pData;
 800cef0:	68fb      	ldr	r3, [r7, #12]
 800cef2:	68ba      	ldr	r2, [r7, #8]
 800cef4:	651a      	str	r2, [r3, #80]	@ 0x50
    huart->TxXferSize  = Size;
 800cef6:	68fb      	ldr	r3, [r7, #12]
 800cef8:	88fa      	ldrh	r2, [r7, #6]
 800cefa:	f8a3 2054 	strh.w	r2, [r3, #84]	@ 0x54
    huart->TxXferCount = Size;
 800cefe:	68fb      	ldr	r3, [r7, #12]
 800cf00:	88fa      	ldrh	r2, [r7, #6]
 800cf02:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    huart->TxISR       = NULL;
 800cf06:	68fb      	ldr	r3, [r7, #12]
 800cf08:	2200      	movs	r2, #0
 800cf0a:	679a      	str	r2, [r3, #120]	@ 0x78

    huart->ErrorCode = HAL_UART_ERROR_NONE;
 800cf0c:	68fb      	ldr	r3, [r7, #12]
 800cf0e:	2200      	movs	r2, #0
 800cf10:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    huart->gState = HAL_UART_STATE_BUSY_TX;
 800cf14:	68fb      	ldr	r3, [r7, #12]
 800cf16:	2221      	movs	r2, #33	@ 0x21
 800cf18:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

    /* Configure Tx interrupt processing */
    if (huart->FifoMode == UART_FIFOMODE_ENABLE)
 800cf1c:	68fb      	ldr	r3, [r7, #12]
 800cf1e:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800cf20:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800cf24:	d12a      	bne.n	800cf7c <HAL_UART_Transmit_IT+0xb4>
    {
      /* Set the Tx ISR function pointer according to the data word length */
      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800cf26:	68fb      	ldr	r3, [r7, #12]
 800cf28:	689b      	ldr	r3, [r3, #8]
 800cf2a:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800cf2e:	d107      	bne.n	800cf40 <HAL_UART_Transmit_IT+0x78>
 800cf30:	68fb      	ldr	r3, [r7, #12]
 800cf32:	691b      	ldr	r3, [r3, #16]
 800cf34:	2b00      	cmp	r3, #0
 800cf36:	d103      	bne.n	800cf40 <HAL_UART_Transmit_IT+0x78>
      {
        huart->TxISR = UART_TxISR_16BIT_FIFOEN;
 800cf38:	68fb      	ldr	r3, [r7, #12]
 800cf3a:	4a29      	ldr	r2, [pc, #164]	@ (800cfe0 <HAL_UART_Transmit_IT+0x118>)
 800cf3c:	679a      	str	r2, [r3, #120]	@ 0x78
 800cf3e:	e002      	b.n	800cf46 <HAL_UART_Transmit_IT+0x7e>
      }
      else
      {
        huart->TxISR = UART_TxISR_8BIT_FIFOEN;
 800cf40:	68fb      	ldr	r3, [r7, #12]
 800cf42:	4a28      	ldr	r2, [pc, #160]	@ (800cfe4 <HAL_UART_Transmit_IT+0x11c>)
 800cf44:	679a      	str	r2, [r3, #120]	@ 0x78
      }

      /* Enable the TX FIFO threshold interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800cf46:	68fb      	ldr	r3, [r7, #12]
 800cf48:	681b      	ldr	r3, [r3, #0]
 800cf4a:	3308      	adds	r3, #8
 800cf4c:	62bb      	str	r3, [r7, #40]	@ 0x28
 */
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
    uint32_t result;

   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800cf4e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800cf50:	e853 3f00 	ldrex	r3, [r3]
 800cf54:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800cf56:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800cf58:	f443 0300 	orr.w	r3, r3, #8388608	@ 0x800000
 800cf5c:	63bb      	str	r3, [r7, #56]	@ 0x38
 800cf5e:	68fb      	ldr	r3, [r7, #12]
 800cf60:	681b      	ldr	r3, [r3, #0]
 800cf62:	3308      	adds	r3, #8
 800cf64:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800cf66:	637a      	str	r2, [r7, #52]	@ 0x34
 800cf68:	633b      	str	r3, [r7, #48]	@ 0x30
 */
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
   uint32_t result;

   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800cf6a:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 800cf6c:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800cf6e:	e841 2300 	strex	r3, r2, [r1]
 800cf72:	62fb      	str	r3, [r7, #44]	@ 0x2c
   return(result);
 800cf74:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800cf76:	2b00      	cmp	r3, #0
 800cf78:	d1e5      	bne.n	800cf46 <HAL_UART_Transmit_IT+0x7e>
 800cf7a:	e028      	b.n	800cfce <HAL_UART_Transmit_IT+0x106>
    }
    else
    {
      /* Set the Tx ISR function pointer according to the data word length */
      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800cf7c:	68fb      	ldr	r3, [r7, #12]
 800cf7e:	689b      	ldr	r3, [r3, #8]
 800cf80:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800cf84:	d107      	bne.n	800cf96 <HAL_UART_Transmit_IT+0xce>
 800cf86:	68fb      	ldr	r3, [r7, #12]
 800cf88:	691b      	ldr	r3, [r3, #16]
 800cf8a:	2b00      	cmp	r3, #0
 800cf8c:	d103      	bne.n	800cf96 <HAL_UART_Transmit_IT+0xce>
      {
        huart->TxISR = UART_TxISR_16BIT;
 800cf8e:	68fb      	ldr	r3, [r7, #12]
 800cf90:	4a15      	ldr	r2, [pc, #84]	@ (800cfe8 <HAL_UART_Transmit_IT+0x120>)
 800cf92:	679a      	str	r2, [r3, #120]	@ 0x78
 800cf94:	e002      	b.n	800cf9c <HAL_UART_Transmit_IT+0xd4>
      }
      else
      {
        huart->TxISR = UART_TxISR_8BIT;
 800cf96:	68fb      	ldr	r3, [r7, #12]
 800cf98:	4a14      	ldr	r2, [pc, #80]	@ (800cfec <HAL_UART_Transmit_IT+0x124>)
 800cf9a:	679a      	str	r2, [r3, #120]	@ 0x78
      }

      /* Enable the Transmit Data Register Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800cf9c:	68fb      	ldr	r3, [r7, #12]
 800cf9e:	681b      	ldr	r3, [r3, #0]
 800cfa0:	617b      	str	r3, [r7, #20]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800cfa2:	697b      	ldr	r3, [r7, #20]
 800cfa4:	e853 3f00 	ldrex	r3, [r3]
 800cfa8:	613b      	str	r3, [r7, #16]
   return(result);
 800cfaa:	693b      	ldr	r3, [r7, #16]
 800cfac:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 800cfb0:	63fb      	str	r3, [r7, #60]	@ 0x3c
 800cfb2:	68fb      	ldr	r3, [r7, #12]
 800cfb4:	681b      	ldr	r3, [r3, #0]
 800cfb6:	461a      	mov	r2, r3
 800cfb8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800cfba:	623b      	str	r3, [r7, #32]
 800cfbc:	61fa      	str	r2, [r7, #28]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800cfbe:	69f9      	ldr	r1, [r7, #28]
 800cfc0:	6a3a      	ldr	r2, [r7, #32]
 800cfc2:	e841 2300 	strex	r3, r2, [r1]
 800cfc6:	61bb      	str	r3, [r7, #24]
   return(result);
 800cfc8:	69bb      	ldr	r3, [r7, #24]
 800cfca:	2b00      	cmp	r3, #0
 800cfcc:	d1e6      	bne.n	800cf9c <HAL_UART_Transmit_IT+0xd4>
    }

    return HAL_OK;
 800cfce:	2300      	movs	r3, #0
 800cfd0:	e000      	b.n	800cfd4 <HAL_UART_Transmit_IT+0x10c>
  }
  else
  {
    return HAL_BUSY;
 800cfd2:	2302      	movs	r3, #2
  }
}
 800cfd4:	4618      	mov	r0, r3
 800cfd6:	3744      	adds	r7, #68	@ 0x44
 800cfd8:	46bd      	mov	sp, r7
 800cfda:	f85d 7b04 	ldr.w	r7, [sp], #4
 800cfde:	4770      	bx	lr
 800cfe0:	0800eb53 	.word	0x0800eb53
 800cfe4:	0800ea73 	.word	0x0800ea73
 800cfe8:	0800e9b1 	.word	0x0800e9b1
 800cfec:	0800e8f9 	.word	0x0800e8f9

0800cff0 <HAL_UART_IRQHandler>:
  * @brief Handle UART interrupt request.
  * @param huart UART handle.
  * @retval None
  */
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
{
 800cff0:	b580      	push	{r7, lr}
 800cff2:	b0ba      	sub	sp, #232	@ 0xe8
 800cff4:	af00      	add	r7, sp, #0
 800cff6:	6078      	str	r0, [r7, #4]
  uint32_t isrflags   = READ_REG(huart->Instance->ISR);
 800cff8:	687b      	ldr	r3, [r7, #4]
 800cffa:	681b      	ldr	r3, [r3, #0]
 800cffc:	69db      	ldr	r3, [r3, #28]
 800cffe:	f8c7 30e4 	str.w	r3, [r7, #228]	@ 0xe4
  uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 800d002:	687b      	ldr	r3, [r7, #4]
 800d004:	681b      	ldr	r3, [r3, #0]
 800d006:	681b      	ldr	r3, [r3, #0]
 800d008:	f8c7 30e0 	str.w	r3, [r7, #224]	@ 0xe0
  uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 800d00c:	687b      	ldr	r3, [r7, #4]
 800d00e:	681b      	ldr	r3, [r3, #0]
 800d010:	689b      	ldr	r3, [r3, #8]
 800d012:	f8c7 30dc 	str.w	r3, [r7, #220]	@ 0xdc

  uint32_t errorflags;
  uint32_t errorcode;

  /* If no error occurs */
  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
 800d016:	f8d7 20e4 	ldr.w	r2, [r7, #228]	@ 0xe4
 800d01a:	f640 030f 	movw	r3, #2063	@ 0x80f
 800d01e:	4013      	ands	r3, r2
 800d020:	f8c7 30d8 	str.w	r3, [r7, #216]	@ 0xd8
  if (errorflags == 0U)
 800d024:	f8d7 30d8 	ldr.w	r3, [r7, #216]	@ 0xd8
 800d028:	2b00      	cmp	r3, #0
 800d02a:	d11b      	bne.n	800d064 <HAL_UART_IRQHandler+0x74>
  {
    /* UART in mode Receiver ---------------------------------------------------*/
    if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
 800d02c:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d030:	f003 0320 	and.w	r3, r3, #32
 800d034:	2b00      	cmp	r3, #0
 800d036:	d015      	beq.n	800d064 <HAL_UART_IRQHandler+0x74>
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
 800d038:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d03c:	f003 0320 	and.w	r3, r3, #32
 800d040:	2b00      	cmp	r3, #0
 800d042:	d105      	bne.n	800d050 <HAL_UART_IRQHandler+0x60>
            || ((cr3its & USART_CR3_RXFTIE) != 0U)))
 800d044:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800d048:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 800d04c:	2b00      	cmp	r3, #0
 800d04e:	d009      	beq.n	800d064 <HAL_UART_IRQHandler+0x74>
    {
      if (huart->RxISR != NULL)
 800d050:	687b      	ldr	r3, [r7, #4]
 800d052:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800d054:	2b00      	cmp	r3, #0
 800d056:	f000 8377 	beq.w	800d748 <HAL_UART_IRQHandler+0x758>
      {
        huart->RxISR(huart);
 800d05a:	687b      	ldr	r3, [r7, #4]
 800d05c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800d05e:	6878      	ldr	r0, [r7, #4]
 800d060:	4798      	blx	r3
      }
      return;
 800d062:	e371      	b.n	800d748 <HAL_UART_IRQHandler+0x758>
    }
  }

  /* If some errors occur */
  if ((errorflags != 0U)
 800d064:	f8d7 30d8 	ldr.w	r3, [r7, #216]	@ 0xd8
 800d068:	2b00      	cmp	r3, #0
 800d06a:	f000 8123 	beq.w	800d2b4 <HAL_UART_IRQHandler+0x2c4>
      && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
 800d06e:	f8d7 20dc 	ldr.w	r2, [r7, #220]	@ 0xdc
 800d072:	4b8d      	ldr	r3, [pc, #564]	@ (800d2a8 <HAL_UART_IRQHandler+0x2b8>)
 800d074:	4013      	ands	r3, r2
 800d076:	2b00      	cmp	r3, #0
 800d078:	d106      	bne.n	800d088 <HAL_UART_IRQHandler+0x98>
           || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))))
 800d07a:	f8d7 20e0 	ldr.w	r2, [r7, #224]	@ 0xe0
 800d07e:	4b8b      	ldr	r3, [pc, #556]	@ (800d2ac <HAL_UART_IRQHandler+0x2bc>)
 800d080:	4013      	ands	r3, r2
 800d082:	2b00      	cmp	r3, #0
 800d084:	f000 8116 	beq.w	800d2b4 <HAL_UART_IRQHandler+0x2c4>
  {
    /* UART parity error interrupt occurred -------------------------------------*/
    if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 800d088:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d08c:	f003 0301 	and.w	r3, r3, #1
 800d090:	2b00      	cmp	r3, #0
 800d092:	d011      	beq.n	800d0b8 <HAL_UART_IRQHandler+0xc8>
 800d094:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d098:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800d09c:	2b00      	cmp	r3, #0
 800d09e:	d00b      	beq.n	800d0b8 <HAL_UART_IRQHandler+0xc8>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 800d0a0:	687b      	ldr	r3, [r7, #4]
 800d0a2:	681b      	ldr	r3, [r3, #0]
 800d0a4:	2201      	movs	r2, #1
 800d0a6:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_PE;
 800d0a8:	687b      	ldr	r3, [r7, #4]
 800d0aa:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800d0ae:	f043 0201 	orr.w	r2, r3, #1
 800d0b2:	687b      	ldr	r3, [r7, #4]
 800d0b4:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART frame error interrupt occurred --------------------------------------*/
    if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800d0b8:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d0bc:	f003 0302 	and.w	r3, r3, #2
 800d0c0:	2b00      	cmp	r3, #0
 800d0c2:	d011      	beq.n	800d0e8 <HAL_UART_IRQHandler+0xf8>
 800d0c4:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800d0c8:	f003 0301 	and.w	r3, r3, #1
 800d0cc:	2b00      	cmp	r3, #0
 800d0ce:	d00b      	beq.n	800d0e8 <HAL_UART_IRQHandler+0xf8>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 800d0d0:	687b      	ldr	r3, [r7, #4]
 800d0d2:	681b      	ldr	r3, [r3, #0]
 800d0d4:	2202      	movs	r2, #2
 800d0d6:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_FE;
 800d0d8:	687b      	ldr	r3, [r7, #4]
 800d0da:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800d0de:	f043 0204 	orr.w	r2, r3, #4
 800d0e2:	687b      	ldr	r3, [r7, #4]
 800d0e4:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART noise error interrupt occurred --------------------------------------*/
    if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800d0e8:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d0ec:	f003 0304 	and.w	r3, r3, #4
 800d0f0:	2b00      	cmp	r3, #0
 800d0f2:	d011      	beq.n	800d118 <HAL_UART_IRQHandler+0x128>
 800d0f4:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800d0f8:	f003 0301 	and.w	r3, r3, #1
 800d0fc:	2b00      	cmp	r3, #0
 800d0fe:	d00b      	beq.n	800d118 <HAL_UART_IRQHandler+0x128>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 800d100:	687b      	ldr	r3, [r7, #4]
 800d102:	681b      	ldr	r3, [r3, #0]
 800d104:	2204      	movs	r2, #4
 800d106:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_NE;
 800d108:	687b      	ldr	r3, [r7, #4]
 800d10a:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800d10e:	f043 0202 	orr.w	r2, r3, #2
 800d112:	687b      	ldr	r3, [r7, #4]
 800d114:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART Over-Run interrupt occurred -----------------------------------------*/
    if (((isrflags & USART_ISR_ORE) != 0U)
 800d118:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d11c:	f003 0308 	and.w	r3, r3, #8
 800d120:	2b00      	cmp	r3, #0
 800d122:	d017      	beq.n	800d154 <HAL_UART_IRQHandler+0x164>
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
 800d124:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d128:	f003 0320 	and.w	r3, r3, #32
 800d12c:	2b00      	cmp	r3, #0
 800d12e:	d105      	bne.n	800d13c <HAL_UART_IRQHandler+0x14c>
            ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
 800d130:	f8d7 20dc 	ldr.w	r2, [r7, #220]	@ 0xdc
 800d134:	4b5c      	ldr	r3, [pc, #368]	@ (800d2a8 <HAL_UART_IRQHandler+0x2b8>)
 800d136:	4013      	ands	r3, r2
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
 800d138:	2b00      	cmp	r3, #0
 800d13a:	d00b      	beq.n	800d154 <HAL_UART_IRQHandler+0x164>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
 800d13c:	687b      	ldr	r3, [r7, #4]
 800d13e:	681b      	ldr	r3, [r3, #0]
 800d140:	2208      	movs	r2, #8
 800d142:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 800d144:	687b      	ldr	r3, [r7, #4]
 800d146:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800d14a:	f043 0208 	orr.w	r2, r3, #8
 800d14e:	687b      	ldr	r3, [r7, #4]
 800d150:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART Receiver Timeout interrupt occurred ---------------------------------*/
    if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
 800d154:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d158:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 800d15c:	2b00      	cmp	r3, #0
 800d15e:	d012      	beq.n	800d186 <HAL_UART_IRQHandler+0x196>
 800d160:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d164:	f003 6380 	and.w	r3, r3, #67108864	@ 0x4000000
 800d168:	2b00      	cmp	r3, #0
 800d16a:	d00c      	beq.n	800d186 <HAL_UART_IRQHandler+0x196>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
 800d16c:	687b      	ldr	r3, [r7, #4]
 800d16e:	681b      	ldr	r3, [r3, #0]
 800d170:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 800d174:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_RTO;
 800d176:	687b      	ldr	r3, [r7, #4]
 800d178:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800d17c:	f043 0220 	orr.w	r2, r3, #32
 800d180:	687b      	ldr	r3, [r7, #4]
 800d182:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* Call UART Error Call back function if need be ----------------------------*/
    if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 800d186:	687b      	ldr	r3, [r7, #4]
 800d188:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800d18c:	2b00      	cmp	r3, #0
 800d18e:	f000 82dd 	beq.w	800d74c <HAL_UART_IRQHandler+0x75c>
    {
      /* UART in mode Receiver --------------------------------------------------*/
      if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
 800d192:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d196:	f003 0320 	and.w	r3, r3, #32
 800d19a:	2b00      	cmp	r3, #0
 800d19c:	d013      	beq.n	800d1c6 <HAL_UART_IRQHandler+0x1d6>
          && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
 800d19e:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d1a2:	f003 0320 	and.w	r3, r3, #32
 800d1a6:	2b00      	cmp	r3, #0
 800d1a8:	d105      	bne.n	800d1b6 <HAL_UART_IRQHandler+0x1c6>
              || ((cr3its & USART_CR3_RXFTIE) != 0U)))
 800d1aa:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800d1ae:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 800d1b2:	2b00      	cmp	r3, #0
 800d1b4:	d007      	beq.n	800d1c6 <HAL_UART_IRQHandler+0x1d6>
      {
        if (huart->RxISR != NULL)
 800d1b6:	687b      	ldr	r3, [r7, #4]
 800d1b8:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800d1ba:	2b00      	cmp	r3, #0
 800d1bc:	d003      	beq.n	800d1c6 <HAL_UART_IRQHandler+0x1d6>
        {
          huart->RxISR(huart);
 800d1be:	687b      	ldr	r3, [r7, #4]
 800d1c0:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800d1c2:	6878      	ldr	r0, [r7, #4]
 800d1c4:	4798      	blx	r3
      /* If Error is to be considered as blocking :
          - Receiver Timeout error in Reception
          - Overrun error in Reception
          - any error occurs in DMA mode reception
      */
      errorcode = huart->ErrorCode;
 800d1c6:	687b      	ldr	r3, [r7, #4]
 800d1c8:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800d1cc:	f8c7 30d4 	str.w	r3, [r7, #212]	@ 0xd4
      if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
 800d1d0:	687b      	ldr	r3, [r7, #4]
 800d1d2:	681b      	ldr	r3, [r3, #0]
 800d1d4:	689b      	ldr	r3, [r3, #8]
 800d1d6:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d1da:	2b40      	cmp	r3, #64	@ 0x40
 800d1dc:	d005      	beq.n	800d1ea <HAL_UART_IRQHandler+0x1fa>
          ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
 800d1de:	f8d7 30d4 	ldr.w	r3, [r7, #212]	@ 0xd4
 800d1e2:	f003 0328 	and.w	r3, r3, #40	@ 0x28
      if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
 800d1e6:	2b00      	cmp	r3, #0
 800d1e8:	d054      	beq.n	800d294 <HAL_UART_IRQHandler+0x2a4>
      {
        /* Blocking error : transfer is aborted
           Set the UART state ready to be able to start again the process,
           Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
        UART_EndRxTransfer(huart);
 800d1ea:	6878      	ldr	r0, [r7, #4]
 800d1ec:	f001 fb08 	bl	800e800 <UART_EndRxTransfer>

        /* Abort the UART DMA Rx channel if enabled */
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800d1f0:	687b      	ldr	r3, [r7, #4]
 800d1f2:	681b      	ldr	r3, [r3, #0]
 800d1f4:	689b      	ldr	r3, [r3, #8]
 800d1f6:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d1fa:	2b40      	cmp	r3, #64	@ 0x40
 800d1fc:	d146      	bne.n	800d28c <HAL_UART_IRQHandler+0x29c>
        {
          /* Disable the UART DMA Rx request if enabled */
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 800d1fe:	687b      	ldr	r3, [r7, #4]
 800d200:	681b      	ldr	r3, [r3, #0]
 800d202:	3308      	adds	r3, #8
 800d204:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d208:	f8d7 309c 	ldr.w	r3, [r7, #156]	@ 0x9c
 800d20c:	e853 3f00 	ldrex	r3, [r3]
 800d210:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
   return(result);
 800d214:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 800d218:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800d21c:	f8c7 30d0 	str.w	r3, [r7, #208]	@ 0xd0
 800d220:	687b      	ldr	r3, [r7, #4]
 800d222:	681b      	ldr	r3, [r3, #0]
 800d224:	3308      	adds	r3, #8
 800d226:	f8d7 20d0 	ldr.w	r2, [r7, #208]	@ 0xd0
 800d22a:	f8c7 20a8 	str.w	r2, [r7, #168]	@ 0xa8
 800d22e:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d232:	f8d7 10a4 	ldr.w	r1, [r7, #164]	@ 0xa4
 800d236:	f8d7 20a8 	ldr.w	r2, [r7, #168]	@ 0xa8
 800d23a:	e841 2300 	strex	r3, r2, [r1]
 800d23e:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
   return(result);
 800d242:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800d246:	2b00      	cmp	r3, #0
 800d248:	d1d9      	bne.n	800d1fe <HAL_UART_IRQHandler+0x20e>

          /* Abort the UART DMA Rx channel */
          if (huart->hdmarx != NULL)
 800d24a:	687b      	ldr	r3, [r7, #4]
 800d24c:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d250:	2b00      	cmp	r3, #0
 800d252:	d017      	beq.n	800d284 <HAL_UART_IRQHandler+0x294>
          {
            /* Set the UART DMA Abort callback :
               will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 800d254:	687b      	ldr	r3, [r7, #4]
 800d256:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d25a:	4a15      	ldr	r2, [pc, #84]	@ (800d2b0 <HAL_UART_IRQHandler+0x2c0>)
 800d25c:	651a      	str	r2, [r3, #80]	@ 0x50

            /* Abort DMA RX */
            if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 800d25e:	687b      	ldr	r3, [r7, #4]
 800d260:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d264:	4618      	mov	r0, r3
 800d266:	f7f9 f915 	bl	8006494 <HAL_DMA_Abort_IT>
 800d26a:	4603      	mov	r3, r0
 800d26c:	2b00      	cmp	r3, #0
 800d26e:	d019      	beq.n	800d2a4 <HAL_UART_IRQHandler+0x2b4>
            {
              /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 800d270:	687b      	ldr	r3, [r7, #4]
 800d272:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d276:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800d278:	687a      	ldr	r2, [r7, #4]
 800d27a:	f8d2 2080 	ldr.w	r2, [r2, #128]	@ 0x80
 800d27e:	4610      	mov	r0, r2
 800d280:	4798      	blx	r3
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800d282:	e00f      	b.n	800d2a4 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
            /*Call registered error callback*/
            huart->ErrorCallback(huart);
#else
            /*Call legacy weak error callback*/
            HAL_UART_ErrorCallback(huart);
 800d284:	6878      	ldr	r0, [r7, #4]
 800d286:	f000 fa6d 	bl	800d764 <HAL_UART_ErrorCallback>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800d28a:	e00b      	b.n	800d2a4 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 800d28c:	6878      	ldr	r0, [r7, #4]
 800d28e:	f000 fa69 	bl	800d764 <HAL_UART_ErrorCallback>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800d292:	e007      	b.n	800d2a4 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered error callback*/
        huart->ErrorCallback(huart);
#else
        /*Call legacy weak error callback*/
        HAL_UART_ErrorCallback(huart);
 800d294:	6878      	ldr	r0, [r7, #4]
 800d296:	f000 fa65 	bl	800d764 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 800d29a:	687b      	ldr	r3, [r7, #4]
 800d29c:	2200      	movs	r2, #0
 800d29e:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
      }
    }
    return;
 800d2a2:	e253      	b.n	800d74c <HAL_UART_IRQHandler+0x75c>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800d2a4:	bf00      	nop
    return;
 800d2a6:	e251      	b.n	800d74c <HAL_UART_IRQHandler+0x75c>
 800d2a8:	10000001 	.word	0x10000001
 800d2ac:	04000120 	.word	0x04000120
 800d2b0:	0800e8cd 	.word	0x0800e8cd

  } /* End if some error occurs */

  /* Check current reception Mode :
     If Reception till IDLE event has been selected : */
  if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800d2b4:	687b      	ldr	r3, [r7, #4]
 800d2b6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800d2b8:	2b01      	cmp	r3, #1
 800d2ba:	f040 81e7 	bne.w	800d68c <HAL_UART_IRQHandler+0x69c>
      && ((isrflags & USART_ISR_IDLE) != 0U)
 800d2be:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d2c2:	f003 0310 	and.w	r3, r3, #16
 800d2c6:	2b00      	cmp	r3, #0
 800d2c8:	f000 81e0 	beq.w	800d68c <HAL_UART_IRQHandler+0x69c>
      && ((cr1its & USART_ISR_IDLE) != 0U))
 800d2cc:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d2d0:	f003 0310 	and.w	r3, r3, #16
 800d2d4:	2b00      	cmp	r3, #0
 800d2d6:	f000 81d9 	beq.w	800d68c <HAL_UART_IRQHandler+0x69c>
  {
    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800d2da:	687b      	ldr	r3, [r7, #4]
 800d2dc:	681b      	ldr	r3, [r3, #0]
 800d2de:	2210      	movs	r2, #16
 800d2e0:	621a      	str	r2, [r3, #32]

    /* Check if DMA mode is enabled in UART */
    if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800d2e2:	687b      	ldr	r3, [r7, #4]
 800d2e4:	681b      	ldr	r3, [r3, #0]
 800d2e6:	689b      	ldr	r3, [r3, #8]
 800d2e8:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d2ec:	2b40      	cmp	r3, #64	@ 0x40
 800d2ee:	f040 8151 	bne.w	800d594 <HAL_UART_IRQHandler+0x5a4>
    {
      /* DMA mode enabled */
      /* Check received length : If all expected data are received, do nothing,
         (DMA cplt callback will be called).
         Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
      uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
 800d2f2:	687b      	ldr	r3, [r7, #4]
 800d2f4:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d2f8:	681b      	ldr	r3, [r3, #0]
 800d2fa:	4a96      	ldr	r2, [pc, #600]	@ (800d554 <HAL_UART_IRQHandler+0x564>)
 800d2fc:	4293      	cmp	r3, r2
 800d2fe:	d068      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d300:	687b      	ldr	r3, [r7, #4]
 800d302:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d306:	681b      	ldr	r3, [r3, #0]
 800d308:	4a93      	ldr	r2, [pc, #588]	@ (800d558 <HAL_UART_IRQHandler+0x568>)
 800d30a:	4293      	cmp	r3, r2
 800d30c:	d061      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d30e:	687b      	ldr	r3, [r7, #4]
 800d310:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d314:	681b      	ldr	r3, [r3, #0]
 800d316:	4a91      	ldr	r2, [pc, #580]	@ (800d55c <HAL_UART_IRQHandler+0x56c>)
 800d318:	4293      	cmp	r3, r2
 800d31a:	d05a      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d31c:	687b      	ldr	r3, [r7, #4]
 800d31e:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d322:	681b      	ldr	r3, [r3, #0]
 800d324:	4a8e      	ldr	r2, [pc, #568]	@ (800d560 <HAL_UART_IRQHandler+0x570>)
 800d326:	4293      	cmp	r3, r2
 800d328:	d053      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d32a:	687b      	ldr	r3, [r7, #4]
 800d32c:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d330:	681b      	ldr	r3, [r3, #0]
 800d332:	4a8c      	ldr	r2, [pc, #560]	@ (800d564 <HAL_UART_IRQHandler+0x574>)
 800d334:	4293      	cmp	r3, r2
 800d336:	d04c      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d338:	687b      	ldr	r3, [r7, #4]
 800d33a:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d33e:	681b      	ldr	r3, [r3, #0]
 800d340:	4a89      	ldr	r2, [pc, #548]	@ (800d568 <HAL_UART_IRQHandler+0x578>)
 800d342:	4293      	cmp	r3, r2
 800d344:	d045      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d346:	687b      	ldr	r3, [r7, #4]
 800d348:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d34c:	681b      	ldr	r3, [r3, #0]
 800d34e:	4a87      	ldr	r2, [pc, #540]	@ (800d56c <HAL_UART_IRQHandler+0x57c>)
 800d350:	4293      	cmp	r3, r2
 800d352:	d03e      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d354:	687b      	ldr	r3, [r7, #4]
 800d356:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d35a:	681b      	ldr	r3, [r3, #0]
 800d35c:	4a84      	ldr	r2, [pc, #528]	@ (800d570 <HAL_UART_IRQHandler+0x580>)
 800d35e:	4293      	cmp	r3, r2
 800d360:	d037      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d362:	687b      	ldr	r3, [r7, #4]
 800d364:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d368:	681b      	ldr	r3, [r3, #0]
 800d36a:	4a82      	ldr	r2, [pc, #520]	@ (800d574 <HAL_UART_IRQHandler+0x584>)
 800d36c:	4293      	cmp	r3, r2
 800d36e:	d030      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d370:	687b      	ldr	r3, [r7, #4]
 800d372:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d376:	681b      	ldr	r3, [r3, #0]
 800d378:	4a7f      	ldr	r2, [pc, #508]	@ (800d578 <HAL_UART_IRQHandler+0x588>)
 800d37a:	4293      	cmp	r3, r2
 800d37c:	d029      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d37e:	687b      	ldr	r3, [r7, #4]
 800d380:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d384:	681b      	ldr	r3, [r3, #0]
 800d386:	4a7d      	ldr	r2, [pc, #500]	@ (800d57c <HAL_UART_IRQHandler+0x58c>)
 800d388:	4293      	cmp	r3, r2
 800d38a:	d022      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d38c:	687b      	ldr	r3, [r7, #4]
 800d38e:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d392:	681b      	ldr	r3, [r3, #0]
 800d394:	4a7a      	ldr	r2, [pc, #488]	@ (800d580 <HAL_UART_IRQHandler+0x590>)
 800d396:	4293      	cmp	r3, r2
 800d398:	d01b      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d39a:	687b      	ldr	r3, [r7, #4]
 800d39c:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d3a0:	681b      	ldr	r3, [r3, #0]
 800d3a2:	4a78      	ldr	r2, [pc, #480]	@ (800d584 <HAL_UART_IRQHandler+0x594>)
 800d3a4:	4293      	cmp	r3, r2
 800d3a6:	d014      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d3a8:	687b      	ldr	r3, [r7, #4]
 800d3aa:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d3ae:	681b      	ldr	r3, [r3, #0]
 800d3b0:	4a75      	ldr	r2, [pc, #468]	@ (800d588 <HAL_UART_IRQHandler+0x598>)
 800d3b2:	4293      	cmp	r3, r2
 800d3b4:	d00d      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d3b6:	687b      	ldr	r3, [r7, #4]
 800d3b8:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d3bc:	681b      	ldr	r3, [r3, #0]
 800d3be:	4a73      	ldr	r2, [pc, #460]	@ (800d58c <HAL_UART_IRQHandler+0x59c>)
 800d3c0:	4293      	cmp	r3, r2
 800d3c2:	d006      	beq.n	800d3d2 <HAL_UART_IRQHandler+0x3e2>
 800d3c4:	687b      	ldr	r3, [r7, #4]
 800d3c6:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d3ca:	681b      	ldr	r3, [r3, #0]
 800d3cc:	4a70      	ldr	r2, [pc, #448]	@ (800d590 <HAL_UART_IRQHandler+0x5a0>)
 800d3ce:	4293      	cmp	r3, r2
 800d3d0:	d106      	bne.n	800d3e0 <HAL_UART_IRQHandler+0x3f0>
 800d3d2:	687b      	ldr	r3, [r7, #4]
 800d3d4:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d3d8:	681b      	ldr	r3, [r3, #0]
 800d3da:	685b      	ldr	r3, [r3, #4]
 800d3dc:	b29b      	uxth	r3, r3
 800d3de:	e005      	b.n	800d3ec <HAL_UART_IRQHandler+0x3fc>
 800d3e0:	687b      	ldr	r3, [r7, #4]
 800d3e2:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d3e6:	681b      	ldr	r3, [r3, #0]
 800d3e8:	685b      	ldr	r3, [r3, #4]
 800d3ea:	b29b      	uxth	r3, r3
 800d3ec:	f8a7 30be 	strh.w	r3, [r7, #190]	@ 0xbe
      if ((nb_remaining_rx_data > 0U)
 800d3f0:	f8b7 30be 	ldrh.w	r3, [r7, #190]	@ 0xbe
 800d3f4:	2b00      	cmp	r3, #0
 800d3f6:	f000 81ab 	beq.w	800d750 <HAL_UART_IRQHandler+0x760>
          && (nb_remaining_rx_data < huart->RxXferSize))
 800d3fa:	687b      	ldr	r3, [r7, #4]
 800d3fc:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800d400:	f8b7 20be 	ldrh.w	r2, [r7, #190]	@ 0xbe
 800d404:	429a      	cmp	r2, r3
 800d406:	f080 81a3 	bcs.w	800d750 <HAL_UART_IRQHandler+0x760>
      {
        /* Reception is not complete */
        huart->RxXferCount = nb_remaining_rx_data;
 800d40a:	687b      	ldr	r3, [r7, #4]
 800d40c:	f8b7 20be 	ldrh.w	r2, [r7, #190]	@ 0xbe
 800d410:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

        /* In Normal mode, end DMA xfer and HAL UART Rx process*/
        if (huart->hdmarx->Init.Mode != DMA_CIRCULAR)
 800d414:	687b      	ldr	r3, [r7, #4]
 800d416:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d41a:	69db      	ldr	r3, [r3, #28]
 800d41c:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800d420:	f000 8087 	beq.w	800d532 <HAL_UART_IRQHandler+0x542>
        {
          /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800d424:	687b      	ldr	r3, [r7, #4]
 800d426:	681b      	ldr	r3, [r3, #0]
 800d428:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d42c:	f8d7 3088 	ldr.w	r3, [r7, #136]	@ 0x88
 800d430:	e853 3f00 	ldrex	r3, [r3]
 800d434:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
   return(result);
 800d438:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 800d43c:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800d440:	f8c7 30b8 	str.w	r3, [r7, #184]	@ 0xb8
 800d444:	687b      	ldr	r3, [r7, #4]
 800d446:	681b      	ldr	r3, [r3, #0]
 800d448:	461a      	mov	r2, r3
 800d44a:	f8d7 30b8 	ldr.w	r3, [r7, #184]	@ 0xb8
 800d44e:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800d452:	f8c7 2090 	str.w	r2, [r7, #144]	@ 0x90
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d456:	f8d7 1090 	ldr.w	r1, [r7, #144]	@ 0x90
 800d45a:	f8d7 2094 	ldr.w	r2, [r7, #148]	@ 0x94
 800d45e:	e841 2300 	strex	r3, r2, [r1]
 800d462:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
   return(result);
 800d466:	f8d7 308c 	ldr.w	r3, [r7, #140]	@ 0x8c
 800d46a:	2b00      	cmp	r3, #0
 800d46c:	d1da      	bne.n	800d424 <HAL_UART_IRQHandler+0x434>
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800d46e:	687b      	ldr	r3, [r7, #4]
 800d470:	681b      	ldr	r3, [r3, #0]
 800d472:	3308      	adds	r3, #8
 800d474:	677b      	str	r3, [r7, #116]	@ 0x74
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d476:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800d478:	e853 3f00 	ldrex	r3, [r3]
 800d47c:	673b      	str	r3, [r7, #112]	@ 0x70
   return(result);
 800d47e:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 800d480:	f023 0301 	bic.w	r3, r3, #1
 800d484:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
 800d488:	687b      	ldr	r3, [r7, #4]
 800d48a:	681b      	ldr	r3, [r3, #0]
 800d48c:	3308      	adds	r3, #8
 800d48e:	f8d7 20b4 	ldr.w	r2, [r7, #180]	@ 0xb4
 800d492:	f8c7 2080 	str.w	r2, [r7, #128]	@ 0x80
 800d496:	67fb      	str	r3, [r7, #124]	@ 0x7c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d498:	6ff9      	ldr	r1, [r7, #124]	@ 0x7c
 800d49a:	f8d7 2080 	ldr.w	r2, [r7, #128]	@ 0x80
 800d49e:	e841 2300 	strex	r3, r2, [r1]
 800d4a2:	67bb      	str	r3, [r7, #120]	@ 0x78
   return(result);
 800d4a4:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800d4a6:	2b00      	cmp	r3, #0
 800d4a8:	d1e1      	bne.n	800d46e <HAL_UART_IRQHandler+0x47e>

          /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
             in the UART CR3 register */
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 800d4aa:	687b      	ldr	r3, [r7, #4]
 800d4ac:	681b      	ldr	r3, [r3, #0]
 800d4ae:	3308      	adds	r3, #8
 800d4b0:	663b      	str	r3, [r7, #96]	@ 0x60
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d4b2:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800d4b4:	e853 3f00 	ldrex	r3, [r3]
 800d4b8:	65fb      	str	r3, [r7, #92]	@ 0x5c
   return(result);
 800d4ba:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800d4bc:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800d4c0:	f8c7 30b0 	str.w	r3, [r7, #176]	@ 0xb0
 800d4c4:	687b      	ldr	r3, [r7, #4]
 800d4c6:	681b      	ldr	r3, [r3, #0]
 800d4c8:	3308      	adds	r3, #8
 800d4ca:	f8d7 20b0 	ldr.w	r2, [r7, #176]	@ 0xb0
 800d4ce:	66fa      	str	r2, [r7, #108]	@ 0x6c
 800d4d0:	66bb      	str	r3, [r7, #104]	@ 0x68
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d4d2:	6eb9      	ldr	r1, [r7, #104]	@ 0x68
 800d4d4:	6efa      	ldr	r2, [r7, #108]	@ 0x6c
 800d4d6:	e841 2300 	strex	r3, r2, [r1]
 800d4da:	667b      	str	r3, [r7, #100]	@ 0x64
   return(result);
 800d4dc:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800d4de:	2b00      	cmp	r3, #0
 800d4e0:	d1e3      	bne.n	800d4aa <HAL_UART_IRQHandler+0x4ba>

          /* At end of Rx process, restore huart->RxState to Ready */
          huart->RxState = HAL_UART_STATE_READY;
 800d4e2:	687b      	ldr	r3, [r7, #4]
 800d4e4:	2220      	movs	r2, #32
 800d4e6:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800d4ea:	687b      	ldr	r3, [r7, #4]
 800d4ec:	2200      	movs	r2, #0
 800d4ee:	66da      	str	r2, [r3, #108]	@ 0x6c

          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800d4f0:	687b      	ldr	r3, [r7, #4]
 800d4f2:	681b      	ldr	r3, [r3, #0]
 800d4f4:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d4f6:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800d4f8:	e853 3f00 	ldrex	r3, [r3]
 800d4fc:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 800d4fe:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800d500:	f023 0310 	bic.w	r3, r3, #16
 800d504:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
 800d508:	687b      	ldr	r3, [r7, #4]
 800d50a:	681b      	ldr	r3, [r3, #0]
 800d50c:	461a      	mov	r2, r3
 800d50e:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800d512:	65bb      	str	r3, [r7, #88]	@ 0x58
 800d514:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d516:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 800d518:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800d51a:	e841 2300 	strex	r3, r2, [r1]
 800d51e:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 800d520:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800d522:	2b00      	cmp	r3, #0
 800d524:	d1e4      	bne.n	800d4f0 <HAL_UART_IRQHandler+0x500>

          /* Last bytes received, so no need as the abort is immediate */
          (void)HAL_DMA_Abort(huart->hdmarx);
 800d526:	687b      	ldr	r3, [r7, #4]
 800d528:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d52c:	4618      	mov	r0, r3
 800d52e:	f7f8 fc93 	bl	8005e58 <HAL_DMA_Abort>
        }

        /* Initialize type of RxEvent that correspond to RxEvent callback execution;
           In this case, Rx Event type is Idle Event */
        huart->RxEventType = HAL_UART_RXEVENT_IDLE;
 800d532:	687b      	ldr	r3, [r7, #4]
 800d534:	2202      	movs	r2, #2
 800d536:	671a      	str	r2, [r3, #112]	@ 0x70
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
 800d538:	687b      	ldr	r3, [r7, #4]
 800d53a:	f8b3 205c 	ldrh.w	r2, [r3, #92]	@ 0x5c
 800d53e:	687b      	ldr	r3, [r7, #4]
 800d540:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800d544:	b29b      	uxth	r3, r3
 800d546:	1ad3      	subs	r3, r2, r3
 800d548:	b29b      	uxth	r3, r3
 800d54a:	4619      	mov	r1, r3
 800d54c:	6878      	ldr	r0, [r7, #4]
 800d54e:	f7f6 fd61 	bl	8004014 <HAL_UARTEx_RxEventCallback>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
      }
      return;
 800d552:	e0fd      	b.n	800d750 <HAL_UART_IRQHandler+0x760>
 800d554:	40020010 	.word	0x40020010
 800d558:	40020028 	.word	0x40020028
 800d55c:	40020040 	.word	0x40020040
 800d560:	40020058 	.word	0x40020058
 800d564:	40020070 	.word	0x40020070
 800d568:	40020088 	.word	0x40020088
 800d56c:	400200a0 	.word	0x400200a0
 800d570:	400200b8 	.word	0x400200b8
 800d574:	40020410 	.word	0x40020410
 800d578:	40020428 	.word	0x40020428
 800d57c:	40020440 	.word	0x40020440
 800d580:	40020458 	.word	0x40020458
 800d584:	40020470 	.word	0x40020470
 800d588:	40020488 	.word	0x40020488
 800d58c:	400204a0 	.word	0x400204a0
 800d590:	400204b8 	.word	0x400204b8
    else
    {
      /* DMA mode not enabled */
      /* Check received length : If all expected data are received, do nothing.
         Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
      uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
 800d594:	687b      	ldr	r3, [r7, #4]
 800d596:	f8b3 205c 	ldrh.w	r2, [r3, #92]	@ 0x5c
 800d59a:	687b      	ldr	r3, [r7, #4]
 800d59c:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800d5a0:	b29b      	uxth	r3, r3
 800d5a2:	1ad3      	subs	r3, r2, r3
 800d5a4:	f8a7 30ce 	strh.w	r3, [r7, #206]	@ 0xce
      if ((huart->RxXferCount > 0U)
 800d5a8:	687b      	ldr	r3, [r7, #4]
 800d5aa:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800d5ae:	b29b      	uxth	r3, r3
 800d5b0:	2b00      	cmp	r3, #0
 800d5b2:	f000 80cf 	beq.w	800d754 <HAL_UART_IRQHandler+0x764>
          && (nb_rx_data > 0U))
 800d5b6:	f8b7 30ce 	ldrh.w	r3, [r7, #206]	@ 0xce
 800d5ba:	2b00      	cmp	r3, #0
 800d5bc:	f000 80ca 	beq.w	800d754 <HAL_UART_IRQHandler+0x764>
      {
        /* Disable the UART Parity Error Interrupt and RXNE interrupts */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800d5c0:	687b      	ldr	r3, [r7, #4]
 800d5c2:	681b      	ldr	r3, [r3, #0]
 800d5c4:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d5c6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800d5c8:	e853 3f00 	ldrex	r3, [r3]
 800d5cc:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800d5ce:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800d5d0:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800d5d4:	f8c7 30c8 	str.w	r3, [r7, #200]	@ 0xc8
 800d5d8:	687b      	ldr	r3, [r7, #4]
 800d5da:	681b      	ldr	r3, [r3, #0]
 800d5dc:	461a      	mov	r2, r3
 800d5de:	f8d7 30c8 	ldr.w	r3, [r7, #200]	@ 0xc8
 800d5e2:	647b      	str	r3, [r7, #68]	@ 0x44
 800d5e4:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d5e6:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800d5e8:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800d5ea:	e841 2300 	strex	r3, r2, [r1]
 800d5ee:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800d5f0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800d5f2:	2b00      	cmp	r3, #0
 800d5f4:	d1e4      	bne.n	800d5c0 <HAL_UART_IRQHandler+0x5d0>

        /* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800d5f6:	687b      	ldr	r3, [r7, #4]
 800d5f8:	681b      	ldr	r3, [r3, #0]
 800d5fa:	3308      	adds	r3, #8
 800d5fc:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d5fe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800d600:	e853 3f00 	ldrex	r3, [r3]
 800d604:	623b      	str	r3, [r7, #32]
   return(result);
 800d606:	6a3a      	ldr	r2, [r7, #32]
 800d608:	4b55      	ldr	r3, [pc, #340]	@ (800d760 <HAL_UART_IRQHandler+0x770>)
 800d60a:	4013      	ands	r3, r2
 800d60c:	f8c7 30c4 	str.w	r3, [r7, #196]	@ 0xc4
 800d610:	687b      	ldr	r3, [r7, #4]
 800d612:	681b      	ldr	r3, [r3, #0]
 800d614:	3308      	adds	r3, #8
 800d616:	f8d7 20c4 	ldr.w	r2, [r7, #196]	@ 0xc4
 800d61a:	633a      	str	r2, [r7, #48]	@ 0x30
 800d61c:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d61e:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800d620:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800d622:	e841 2300 	strex	r3, r2, [r1]
 800d626:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800d628:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800d62a:	2b00      	cmp	r3, #0
 800d62c:	d1e3      	bne.n	800d5f6 <HAL_UART_IRQHandler+0x606>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 800d62e:	687b      	ldr	r3, [r7, #4]
 800d630:	2220      	movs	r2, #32
 800d632:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800d636:	687b      	ldr	r3, [r7, #4]
 800d638:	2200      	movs	r2, #0
 800d63a:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 800d63c:	687b      	ldr	r3, [r7, #4]
 800d63e:	2200      	movs	r2, #0
 800d640:	675a      	str	r2, [r3, #116]	@ 0x74

        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800d642:	687b      	ldr	r3, [r7, #4]
 800d644:	681b      	ldr	r3, [r3, #0]
 800d646:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d648:	693b      	ldr	r3, [r7, #16]
 800d64a:	e853 3f00 	ldrex	r3, [r3]
 800d64e:	60fb      	str	r3, [r7, #12]
   return(result);
 800d650:	68fb      	ldr	r3, [r7, #12]
 800d652:	f023 0310 	bic.w	r3, r3, #16
 800d656:	f8c7 30c0 	str.w	r3, [r7, #192]	@ 0xc0
 800d65a:	687b      	ldr	r3, [r7, #4]
 800d65c:	681b      	ldr	r3, [r3, #0]
 800d65e:	461a      	mov	r2, r3
 800d660:	f8d7 30c0 	ldr.w	r3, [r7, #192]	@ 0xc0
 800d664:	61fb      	str	r3, [r7, #28]
 800d666:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d668:	69b9      	ldr	r1, [r7, #24]
 800d66a:	69fa      	ldr	r2, [r7, #28]
 800d66c:	e841 2300 	strex	r3, r2, [r1]
 800d670:	617b      	str	r3, [r7, #20]
   return(result);
 800d672:	697b      	ldr	r3, [r7, #20]
 800d674:	2b00      	cmp	r3, #0
 800d676:	d1e4      	bne.n	800d642 <HAL_UART_IRQHandler+0x652>

        /* Initialize type of RxEvent that correspond to RxEvent callback execution;
           In this case, Rx Event type is Idle Event */
        huart->RxEventType = HAL_UART_RXEVENT_IDLE;
 800d678:	687b      	ldr	r3, [r7, #4]
 800d67a:	2202      	movs	r2, #2
 800d67c:	671a      	str	r2, [r3, #112]	@ 0x70
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx complete callback*/
        huart->RxEventCallback(huart, nb_rx_data);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
 800d67e:	f8b7 30ce 	ldrh.w	r3, [r7, #206]	@ 0xce
 800d682:	4619      	mov	r1, r3
 800d684:	6878      	ldr	r0, [r7, #4]
 800d686:	f7f6 fcc5 	bl	8004014 <HAL_UARTEx_RxEventCallback>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
      }
      return;
 800d68a:	e063      	b.n	800d754 <HAL_UART_IRQHandler+0x764>
    }
  }

  /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
  if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
 800d68c:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d690:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 800d694:	2b00      	cmp	r3, #0
 800d696:	d00e      	beq.n	800d6b6 <HAL_UART_IRQHandler+0x6c6>
 800d698:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800d69c:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 800d6a0:	2b00      	cmp	r3, #0
 800d6a2:	d008      	beq.n	800d6b6 <HAL_UART_IRQHandler+0x6c6>
  {
    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
 800d6a4:	687b      	ldr	r3, [r7, #4]
 800d6a6:	681b      	ldr	r3, [r3, #0]
 800d6a8:	f44f 1280 	mov.w	r2, #1048576	@ 0x100000
 800d6ac:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Wakeup Callback */
    huart->WakeupCallback(huart);
#else
    /* Call legacy weak Wakeup Callback */
    HAL_UARTEx_WakeupCallback(huart);
 800d6ae:	6878      	ldr	r0, [r7, #4]
 800d6b0:	f002 f80c 	bl	800f6cc <HAL_UARTEx_WakeupCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800d6b4:	e051      	b.n	800d75a <HAL_UART_IRQHandler+0x76a>
  }

  /* UART in mode Transmitter ------------------------------------------------*/
  if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
 800d6b6:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d6ba:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800d6be:	2b00      	cmp	r3, #0
 800d6c0:	d014      	beq.n	800d6ec <HAL_UART_IRQHandler+0x6fc>
      && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
 800d6c2:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d6c6:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800d6ca:	2b00      	cmp	r3, #0
 800d6cc:	d105      	bne.n	800d6da <HAL_UART_IRQHandler+0x6ea>
          || ((cr3its & USART_CR3_TXFTIE) != 0U)))
 800d6ce:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800d6d2:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800d6d6:	2b00      	cmp	r3, #0
 800d6d8:	d008      	beq.n	800d6ec <HAL_UART_IRQHandler+0x6fc>
  {
    if (huart->TxISR != NULL)
 800d6da:	687b      	ldr	r3, [r7, #4]
 800d6dc:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800d6de:	2b00      	cmp	r3, #0
 800d6e0:	d03a      	beq.n	800d758 <HAL_UART_IRQHandler+0x768>
    {
      huart->TxISR(huart);
 800d6e2:	687b      	ldr	r3, [r7, #4]
 800d6e4:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800d6e6:	6878      	ldr	r0, [r7, #4]
 800d6e8:	4798      	blx	r3
    }
    return;
 800d6ea:	e035      	b.n	800d758 <HAL_UART_IRQHandler+0x768>
  }

  /* UART in mode Transmitter (transmission end) -----------------------------*/
  if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
 800d6ec:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d6f0:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d6f4:	2b00      	cmp	r3, #0
 800d6f6:	d009      	beq.n	800d70c <HAL_UART_IRQHandler+0x71c>
 800d6f8:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d6fc:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d700:	2b00      	cmp	r3, #0
 800d702:	d003      	beq.n	800d70c <HAL_UART_IRQHandler+0x71c>
  {
    UART_EndTransmit_IT(huart);
 800d704:	6878      	ldr	r0, [r7, #4]
 800d706:	f001 fa99 	bl	800ec3c <UART_EndTransmit_IT>
    return;
 800d70a:	e026      	b.n	800d75a <HAL_UART_IRQHandler+0x76a>
  }

  /* UART TX Fifo Empty occurred ----------------------------------------------*/
  if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
 800d70c:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d710:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800d714:	2b00      	cmp	r3, #0
 800d716:	d009      	beq.n	800d72c <HAL_UART_IRQHandler+0x73c>
 800d718:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d71c:	f003 4380 	and.w	r3, r3, #1073741824	@ 0x40000000
 800d720:	2b00      	cmp	r3, #0
 800d722:	d003      	beq.n	800d72c <HAL_UART_IRQHandler+0x73c>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Tx Fifo Empty Callback */
    huart->TxFifoEmptyCallback(huart);
#else
    /* Call legacy weak Tx Fifo Empty Callback */
    HAL_UARTEx_TxFifoEmptyCallback(huart);
 800d724:	6878      	ldr	r0, [r7, #4]
 800d726:	f001 ffe5 	bl	800f6f4 <HAL_UARTEx_TxFifoEmptyCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800d72a:	e016      	b.n	800d75a <HAL_UART_IRQHandler+0x76a>
  }

  /* UART RX Fifo Full occurred ----------------------------------------------*/
  if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
 800d72c:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d730:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 800d734:	2b00      	cmp	r3, #0
 800d736:	d010      	beq.n	800d75a <HAL_UART_IRQHandler+0x76a>
 800d738:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d73c:	2b00      	cmp	r3, #0
 800d73e:	da0c      	bge.n	800d75a <HAL_UART_IRQHandler+0x76a>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Rx Fifo Full Callback */
    huart->RxFifoFullCallback(huart);
#else
    /* Call legacy weak Rx Fifo Full Callback */
    HAL_UARTEx_RxFifoFullCallback(huart);
 800d740:	6878      	ldr	r0, [r7, #4]
 800d742:	f001 ffcd 	bl	800f6e0 <HAL_UARTEx_RxFifoFullCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800d746:	e008      	b.n	800d75a <HAL_UART_IRQHandler+0x76a>
      return;
 800d748:	bf00      	nop
 800d74a:	e006      	b.n	800d75a <HAL_UART_IRQHandler+0x76a>
    return;
 800d74c:	bf00      	nop
 800d74e:	e004      	b.n	800d75a <HAL_UART_IRQHandler+0x76a>
      return;
 800d750:	bf00      	nop
 800d752:	e002      	b.n	800d75a <HAL_UART_IRQHandler+0x76a>
      return;
 800d754:	bf00      	nop
 800d756:	e000      	b.n	800d75a <HAL_UART_IRQHandler+0x76a>
    return;
 800d758:	bf00      	nop
  }
}
 800d75a:	37e8      	adds	r7, #232	@ 0xe8
 800d75c:	46bd      	mov	sp, r7
 800d75e:	bd80      	pop	{r7, pc}
 800d760:	effffffe 	.word	0xeffffffe

0800d764 <HAL_UART_ErrorCallback>:
  * @brief  UART error callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
{
 800d764:	b480      	push	{r7}
 800d766:	b083      	sub	sp, #12
 800d768:	af00      	add	r7, sp, #0
 800d76a:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UART_ErrorCallback can be implemented in the user file.
   */
}
 800d76c:	bf00      	nop
 800d76e:	370c      	adds	r7, #12
 800d770:	46bd      	mov	sp, r7
 800d772:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d776:	4770      	bx	lr

0800d778 <UART_SetConfig>:
  * @brief Configure the UART peripheral.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
{
 800d778:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
 800d77c:	b092      	sub	sp, #72	@ 0x48
 800d77e:	af00      	add	r7, sp, #0
 800d780:	6178      	str	r0, [r7, #20]
  uint32_t tmpreg;
  uint16_t brrtemp;
  UART_ClockSourceTypeDef clocksource;
  uint32_t usartdiv;
  HAL_StatusTypeDef ret               = HAL_OK;
 800d782:	2300      	movs	r3, #0
 800d784:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
  *  the UART Word Length, Parity, Mode and oversampling:
  *  set the M bits according to huart->Init.WordLength value
  *  set PCE and PS bits according to huart->Init.Parity value
  *  set TE and RE bits according to huart->Init.Mode value
  *  set OVER8 bit according to huart->Init.OverSampling value */
  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
 800d788:	697b      	ldr	r3, [r7, #20]
 800d78a:	689a      	ldr	r2, [r3, #8]
 800d78c:	697b      	ldr	r3, [r7, #20]
 800d78e:	691b      	ldr	r3, [r3, #16]
 800d790:	431a      	orrs	r2, r3
 800d792:	697b      	ldr	r3, [r7, #20]
 800d794:	695b      	ldr	r3, [r3, #20]
 800d796:	431a      	orrs	r2, r3
 800d798:	697b      	ldr	r3, [r7, #20]
 800d79a:	69db      	ldr	r3, [r3, #28]
 800d79c:	4313      	orrs	r3, r2
 800d79e:	647b      	str	r3, [r7, #68]	@ 0x44
  MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
 800d7a0:	697b      	ldr	r3, [r7, #20]
 800d7a2:	681b      	ldr	r3, [r3, #0]
 800d7a4:	681a      	ldr	r2, [r3, #0]
 800d7a6:	4bbe      	ldr	r3, [pc, #760]	@ (800daa0 <UART_SetConfig+0x328>)
 800d7a8:	4013      	ands	r3, r2
 800d7aa:	697a      	ldr	r2, [r7, #20]
 800d7ac:	6812      	ldr	r2, [r2, #0]
 800d7ae:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800d7b0:	430b      	orrs	r3, r1
 800d7b2:	6013      	str	r3, [r2, #0]

  /*-------------------------- USART CR2 Configuration -----------------------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits according
  * to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 800d7b4:	697b      	ldr	r3, [r7, #20]
 800d7b6:	681b      	ldr	r3, [r3, #0]
 800d7b8:	685b      	ldr	r3, [r3, #4]
 800d7ba:	f423 5140 	bic.w	r1, r3, #12288	@ 0x3000
 800d7be:	697b      	ldr	r3, [r7, #20]
 800d7c0:	68da      	ldr	r2, [r3, #12]
 800d7c2:	697b      	ldr	r3, [r7, #20]
 800d7c4:	681b      	ldr	r3, [r3, #0]
 800d7c6:	430a      	orrs	r2, r1
 800d7c8:	605a      	str	r2, [r3, #4]
  /* Configure
  * - UART HardWare Flow Control: set CTSE and RTSE bits according
  *   to huart->Init.HwFlowCtl value
  * - one-bit sampling method versus three samples' majority rule according
  *   to huart->Init.OneBitSampling (not applicable to LPUART) */
  tmpreg = (uint32_t)huart->Init.HwFlowCtl;
 800d7ca:	697b      	ldr	r3, [r7, #20]
 800d7cc:	699b      	ldr	r3, [r3, #24]
 800d7ce:	647b      	str	r3, [r7, #68]	@ 0x44

  if (!(UART_INSTANCE_LOWPOWER(huart)))
 800d7d0:	697b      	ldr	r3, [r7, #20]
 800d7d2:	681b      	ldr	r3, [r3, #0]
 800d7d4:	4ab3      	ldr	r2, [pc, #716]	@ (800daa4 <UART_SetConfig+0x32c>)
 800d7d6:	4293      	cmp	r3, r2
 800d7d8:	d004      	beq.n	800d7e4 <UART_SetConfig+0x6c>
  {
    tmpreg |= huart->Init.OneBitSampling;
 800d7da:	697b      	ldr	r3, [r7, #20]
 800d7dc:	6a1b      	ldr	r3, [r3, #32]
 800d7de:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800d7e0:	4313      	orrs	r3, r2
 800d7e2:	647b      	str	r3, [r7, #68]	@ 0x44
  }
  MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
 800d7e4:	697b      	ldr	r3, [r7, #20]
 800d7e6:	681b      	ldr	r3, [r3, #0]
 800d7e8:	689a      	ldr	r2, [r3, #8]
 800d7ea:	4baf      	ldr	r3, [pc, #700]	@ (800daa8 <UART_SetConfig+0x330>)
 800d7ec:	4013      	ands	r3, r2
 800d7ee:	697a      	ldr	r2, [r7, #20]
 800d7f0:	6812      	ldr	r2, [r2, #0]
 800d7f2:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800d7f4:	430b      	orrs	r3, r1
 800d7f6:	6093      	str	r3, [r2, #8]

  /*-------------------------- USART PRESC Configuration -----------------------*/
  /* Configure
  * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */
  MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler);
 800d7f8:	697b      	ldr	r3, [r7, #20]
 800d7fa:	681b      	ldr	r3, [r3, #0]
 800d7fc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d7fe:	f023 010f 	bic.w	r1, r3, #15
 800d802:	697b      	ldr	r3, [r7, #20]
 800d804:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 800d806:	697b      	ldr	r3, [r7, #20]
 800d808:	681b      	ldr	r3, [r3, #0]
 800d80a:	430a      	orrs	r2, r1
 800d80c:	62da      	str	r2, [r3, #44]	@ 0x2c

  /*-------------------------- USART BRR Configuration -----------------------*/
  UART_GETCLOCKSOURCE(huart, clocksource);
 800d80e:	697b      	ldr	r3, [r7, #20]
 800d810:	681b      	ldr	r3, [r3, #0]
 800d812:	4aa6      	ldr	r2, [pc, #664]	@ (800daac <UART_SetConfig+0x334>)
 800d814:	4293      	cmp	r3, r2
 800d816:	d177      	bne.n	800d908 <UART_SetConfig+0x190>
 800d818:	4ba5      	ldr	r3, [pc, #660]	@ (800dab0 <UART_SetConfig+0x338>)
 800d81a:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800d81c:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800d820:	2b28      	cmp	r3, #40	@ 0x28
 800d822:	d86d      	bhi.n	800d900 <UART_SetConfig+0x188>
 800d824:	a201      	add	r2, pc, #4	@ (adr r2, 800d82c <UART_SetConfig+0xb4>)
 800d826:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800d82a:	bf00      	nop
 800d82c:	0800d8d1 	.word	0x0800d8d1
 800d830:	0800d901 	.word	0x0800d901
 800d834:	0800d901 	.word	0x0800d901
 800d838:	0800d901 	.word	0x0800d901
 800d83c:	0800d901 	.word	0x0800d901
 800d840:	0800d901 	.word	0x0800d901
 800d844:	0800d901 	.word	0x0800d901
 800d848:	0800d901 	.word	0x0800d901
 800d84c:	0800d8d9 	.word	0x0800d8d9
 800d850:	0800d901 	.word	0x0800d901
 800d854:	0800d901 	.word	0x0800d901
 800d858:	0800d901 	.word	0x0800d901
 800d85c:	0800d901 	.word	0x0800d901
 800d860:	0800d901 	.word	0x0800d901
 800d864:	0800d901 	.word	0x0800d901
 800d868:	0800d901 	.word	0x0800d901
 800d86c:	0800d8e1 	.word	0x0800d8e1
 800d870:	0800d901 	.word	0x0800d901
 800d874:	0800d901 	.word	0x0800d901
 800d878:	0800d901 	.word	0x0800d901
 800d87c:	0800d901 	.word	0x0800d901
 800d880:	0800d901 	.word	0x0800d901
 800d884:	0800d901 	.word	0x0800d901
 800d888:	0800d901 	.word	0x0800d901
 800d88c:	0800d8e9 	.word	0x0800d8e9
 800d890:	0800d901 	.word	0x0800d901
 800d894:	0800d901 	.word	0x0800d901
 800d898:	0800d901 	.word	0x0800d901
 800d89c:	0800d901 	.word	0x0800d901
 800d8a0:	0800d901 	.word	0x0800d901
 800d8a4:	0800d901 	.word	0x0800d901
 800d8a8:	0800d901 	.word	0x0800d901
 800d8ac:	0800d8f1 	.word	0x0800d8f1
 800d8b0:	0800d901 	.word	0x0800d901
 800d8b4:	0800d901 	.word	0x0800d901
 800d8b8:	0800d901 	.word	0x0800d901
 800d8bc:	0800d901 	.word	0x0800d901
 800d8c0:	0800d901 	.word	0x0800d901
 800d8c4:	0800d901 	.word	0x0800d901
 800d8c8:	0800d901 	.word	0x0800d901
 800d8cc:	0800d8f9 	.word	0x0800d8f9
 800d8d0:	2301      	movs	r3, #1
 800d8d2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d8d6:	e222      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d8d8:	2304      	movs	r3, #4
 800d8da:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d8de:	e21e      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d8e0:	2308      	movs	r3, #8
 800d8e2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d8e6:	e21a      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d8e8:	2310      	movs	r3, #16
 800d8ea:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d8ee:	e216      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d8f0:	2320      	movs	r3, #32
 800d8f2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d8f6:	e212      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d8f8:	2340      	movs	r3, #64	@ 0x40
 800d8fa:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d8fe:	e20e      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d900:	2380      	movs	r3, #128	@ 0x80
 800d902:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d906:	e20a      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d908:	697b      	ldr	r3, [r7, #20]
 800d90a:	681b      	ldr	r3, [r3, #0]
 800d90c:	4a69      	ldr	r2, [pc, #420]	@ (800dab4 <UART_SetConfig+0x33c>)
 800d90e:	4293      	cmp	r3, r2
 800d910:	d130      	bne.n	800d974 <UART_SetConfig+0x1fc>
 800d912:	4b67      	ldr	r3, [pc, #412]	@ (800dab0 <UART_SetConfig+0x338>)
 800d914:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800d916:	f003 0307 	and.w	r3, r3, #7
 800d91a:	2b05      	cmp	r3, #5
 800d91c:	d826      	bhi.n	800d96c <UART_SetConfig+0x1f4>
 800d91e:	a201      	add	r2, pc, #4	@ (adr r2, 800d924 <UART_SetConfig+0x1ac>)
 800d920:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800d924:	0800d93d 	.word	0x0800d93d
 800d928:	0800d945 	.word	0x0800d945
 800d92c:	0800d94d 	.word	0x0800d94d
 800d930:	0800d955 	.word	0x0800d955
 800d934:	0800d95d 	.word	0x0800d95d
 800d938:	0800d965 	.word	0x0800d965
 800d93c:	2300      	movs	r3, #0
 800d93e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d942:	e1ec      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d944:	2304      	movs	r3, #4
 800d946:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d94a:	e1e8      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d94c:	2308      	movs	r3, #8
 800d94e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d952:	e1e4      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d954:	2310      	movs	r3, #16
 800d956:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d95a:	e1e0      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d95c:	2320      	movs	r3, #32
 800d95e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d962:	e1dc      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d964:	2340      	movs	r3, #64	@ 0x40
 800d966:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d96a:	e1d8      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d96c:	2380      	movs	r3, #128	@ 0x80
 800d96e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d972:	e1d4      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d974:	697b      	ldr	r3, [r7, #20]
 800d976:	681b      	ldr	r3, [r3, #0]
 800d978:	4a4f      	ldr	r2, [pc, #316]	@ (800dab8 <UART_SetConfig+0x340>)
 800d97a:	4293      	cmp	r3, r2
 800d97c:	d130      	bne.n	800d9e0 <UART_SetConfig+0x268>
 800d97e:	4b4c      	ldr	r3, [pc, #304]	@ (800dab0 <UART_SetConfig+0x338>)
 800d980:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800d982:	f003 0307 	and.w	r3, r3, #7
 800d986:	2b05      	cmp	r3, #5
 800d988:	d826      	bhi.n	800d9d8 <UART_SetConfig+0x260>
 800d98a:	a201      	add	r2, pc, #4	@ (adr r2, 800d990 <UART_SetConfig+0x218>)
 800d98c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800d990:	0800d9a9 	.word	0x0800d9a9
 800d994:	0800d9b1 	.word	0x0800d9b1
 800d998:	0800d9b9 	.word	0x0800d9b9
 800d99c:	0800d9c1 	.word	0x0800d9c1
 800d9a0:	0800d9c9 	.word	0x0800d9c9
 800d9a4:	0800d9d1 	.word	0x0800d9d1
 800d9a8:	2300      	movs	r3, #0
 800d9aa:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d9ae:	e1b6      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d9b0:	2304      	movs	r3, #4
 800d9b2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d9b6:	e1b2      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d9b8:	2308      	movs	r3, #8
 800d9ba:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d9be:	e1ae      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d9c0:	2310      	movs	r3, #16
 800d9c2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d9c6:	e1aa      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d9c8:	2320      	movs	r3, #32
 800d9ca:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d9ce:	e1a6      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d9d0:	2340      	movs	r3, #64	@ 0x40
 800d9d2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d9d6:	e1a2      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d9d8:	2380      	movs	r3, #128	@ 0x80
 800d9da:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d9de:	e19e      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800d9e0:	697b      	ldr	r3, [r7, #20]
 800d9e2:	681b      	ldr	r3, [r3, #0]
 800d9e4:	4a35      	ldr	r2, [pc, #212]	@ (800dabc <UART_SetConfig+0x344>)
 800d9e6:	4293      	cmp	r3, r2
 800d9e8:	d130      	bne.n	800da4c <UART_SetConfig+0x2d4>
 800d9ea:	4b31      	ldr	r3, [pc, #196]	@ (800dab0 <UART_SetConfig+0x338>)
 800d9ec:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800d9ee:	f003 0307 	and.w	r3, r3, #7
 800d9f2:	2b05      	cmp	r3, #5
 800d9f4:	d826      	bhi.n	800da44 <UART_SetConfig+0x2cc>
 800d9f6:	a201      	add	r2, pc, #4	@ (adr r2, 800d9fc <UART_SetConfig+0x284>)
 800d9f8:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800d9fc:	0800da15 	.word	0x0800da15
 800da00:	0800da1d 	.word	0x0800da1d
 800da04:	0800da25 	.word	0x0800da25
 800da08:	0800da2d 	.word	0x0800da2d
 800da0c:	0800da35 	.word	0x0800da35
 800da10:	0800da3d 	.word	0x0800da3d
 800da14:	2300      	movs	r3, #0
 800da16:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800da1a:	e180      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800da1c:	2304      	movs	r3, #4
 800da1e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800da22:	e17c      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800da24:	2308      	movs	r3, #8
 800da26:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800da2a:	e178      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800da2c:	2310      	movs	r3, #16
 800da2e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800da32:	e174      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800da34:	2320      	movs	r3, #32
 800da36:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800da3a:	e170      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800da3c:	2340      	movs	r3, #64	@ 0x40
 800da3e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800da42:	e16c      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800da44:	2380      	movs	r3, #128	@ 0x80
 800da46:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800da4a:	e168      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800da4c:	697b      	ldr	r3, [r7, #20]
 800da4e:	681b      	ldr	r3, [r3, #0]
 800da50:	4a1b      	ldr	r2, [pc, #108]	@ (800dac0 <UART_SetConfig+0x348>)
 800da52:	4293      	cmp	r3, r2
 800da54:	d142      	bne.n	800dadc <UART_SetConfig+0x364>
 800da56:	4b16      	ldr	r3, [pc, #88]	@ (800dab0 <UART_SetConfig+0x338>)
 800da58:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800da5a:	f003 0307 	and.w	r3, r3, #7
 800da5e:	2b05      	cmp	r3, #5
 800da60:	d838      	bhi.n	800dad4 <UART_SetConfig+0x35c>
 800da62:	a201      	add	r2, pc, #4	@ (adr r2, 800da68 <UART_SetConfig+0x2f0>)
 800da64:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800da68:	0800da81 	.word	0x0800da81
 800da6c:	0800da89 	.word	0x0800da89
 800da70:	0800da91 	.word	0x0800da91
 800da74:	0800da99 	.word	0x0800da99
 800da78:	0800dac5 	.word	0x0800dac5
 800da7c:	0800dacd 	.word	0x0800dacd
 800da80:	2300      	movs	r3, #0
 800da82:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800da86:	e14a      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800da88:	2304      	movs	r3, #4
 800da8a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800da8e:	e146      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800da90:	2308      	movs	r3, #8
 800da92:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800da96:	e142      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800da98:	2310      	movs	r3, #16
 800da9a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800da9e:	e13e      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800daa0:	cfff69f3 	.word	0xcfff69f3
 800daa4:	58000c00 	.word	0x58000c00
 800daa8:	11fff4ff 	.word	0x11fff4ff
 800daac:	40011000 	.word	0x40011000
 800dab0:	58024400 	.word	0x58024400
 800dab4:	40004400 	.word	0x40004400
 800dab8:	40004800 	.word	0x40004800
 800dabc:	40004c00 	.word	0x40004c00
 800dac0:	40005000 	.word	0x40005000
 800dac4:	2320      	movs	r3, #32
 800dac6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800daca:	e128      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dacc:	2340      	movs	r3, #64	@ 0x40
 800dace:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dad2:	e124      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dad4:	2380      	movs	r3, #128	@ 0x80
 800dad6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dada:	e120      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dadc:	697b      	ldr	r3, [r7, #20]
 800dade:	681b      	ldr	r3, [r3, #0]
 800dae0:	4acb      	ldr	r2, [pc, #812]	@ (800de10 <UART_SetConfig+0x698>)
 800dae2:	4293      	cmp	r3, r2
 800dae4:	d176      	bne.n	800dbd4 <UART_SetConfig+0x45c>
 800dae6:	4bcb      	ldr	r3, [pc, #812]	@ (800de14 <UART_SetConfig+0x69c>)
 800dae8:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800daea:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800daee:	2b28      	cmp	r3, #40	@ 0x28
 800daf0:	d86c      	bhi.n	800dbcc <UART_SetConfig+0x454>
 800daf2:	a201      	add	r2, pc, #4	@ (adr r2, 800daf8 <UART_SetConfig+0x380>)
 800daf4:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800daf8:	0800db9d 	.word	0x0800db9d
 800dafc:	0800dbcd 	.word	0x0800dbcd
 800db00:	0800dbcd 	.word	0x0800dbcd
 800db04:	0800dbcd 	.word	0x0800dbcd
 800db08:	0800dbcd 	.word	0x0800dbcd
 800db0c:	0800dbcd 	.word	0x0800dbcd
 800db10:	0800dbcd 	.word	0x0800dbcd
 800db14:	0800dbcd 	.word	0x0800dbcd
 800db18:	0800dba5 	.word	0x0800dba5
 800db1c:	0800dbcd 	.word	0x0800dbcd
 800db20:	0800dbcd 	.word	0x0800dbcd
 800db24:	0800dbcd 	.word	0x0800dbcd
 800db28:	0800dbcd 	.word	0x0800dbcd
 800db2c:	0800dbcd 	.word	0x0800dbcd
 800db30:	0800dbcd 	.word	0x0800dbcd
 800db34:	0800dbcd 	.word	0x0800dbcd
 800db38:	0800dbad 	.word	0x0800dbad
 800db3c:	0800dbcd 	.word	0x0800dbcd
 800db40:	0800dbcd 	.word	0x0800dbcd
 800db44:	0800dbcd 	.word	0x0800dbcd
 800db48:	0800dbcd 	.word	0x0800dbcd
 800db4c:	0800dbcd 	.word	0x0800dbcd
 800db50:	0800dbcd 	.word	0x0800dbcd
 800db54:	0800dbcd 	.word	0x0800dbcd
 800db58:	0800dbb5 	.word	0x0800dbb5
 800db5c:	0800dbcd 	.word	0x0800dbcd
 800db60:	0800dbcd 	.word	0x0800dbcd
 800db64:	0800dbcd 	.word	0x0800dbcd
 800db68:	0800dbcd 	.word	0x0800dbcd
 800db6c:	0800dbcd 	.word	0x0800dbcd
 800db70:	0800dbcd 	.word	0x0800dbcd
 800db74:	0800dbcd 	.word	0x0800dbcd
 800db78:	0800dbbd 	.word	0x0800dbbd
 800db7c:	0800dbcd 	.word	0x0800dbcd
 800db80:	0800dbcd 	.word	0x0800dbcd
 800db84:	0800dbcd 	.word	0x0800dbcd
 800db88:	0800dbcd 	.word	0x0800dbcd
 800db8c:	0800dbcd 	.word	0x0800dbcd
 800db90:	0800dbcd 	.word	0x0800dbcd
 800db94:	0800dbcd 	.word	0x0800dbcd
 800db98:	0800dbc5 	.word	0x0800dbc5
 800db9c:	2301      	movs	r3, #1
 800db9e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dba2:	e0bc      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dba4:	2304      	movs	r3, #4
 800dba6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dbaa:	e0b8      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dbac:	2308      	movs	r3, #8
 800dbae:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dbb2:	e0b4      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dbb4:	2310      	movs	r3, #16
 800dbb6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dbba:	e0b0      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dbbc:	2320      	movs	r3, #32
 800dbbe:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dbc2:	e0ac      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dbc4:	2340      	movs	r3, #64	@ 0x40
 800dbc6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dbca:	e0a8      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dbcc:	2380      	movs	r3, #128	@ 0x80
 800dbce:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dbd2:	e0a4      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dbd4:	697b      	ldr	r3, [r7, #20]
 800dbd6:	681b      	ldr	r3, [r3, #0]
 800dbd8:	4a8f      	ldr	r2, [pc, #572]	@ (800de18 <UART_SetConfig+0x6a0>)
 800dbda:	4293      	cmp	r3, r2
 800dbdc:	d130      	bne.n	800dc40 <UART_SetConfig+0x4c8>
 800dbde:	4b8d      	ldr	r3, [pc, #564]	@ (800de14 <UART_SetConfig+0x69c>)
 800dbe0:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800dbe2:	f003 0307 	and.w	r3, r3, #7
 800dbe6:	2b05      	cmp	r3, #5
 800dbe8:	d826      	bhi.n	800dc38 <UART_SetConfig+0x4c0>
 800dbea:	a201      	add	r2, pc, #4	@ (adr r2, 800dbf0 <UART_SetConfig+0x478>)
 800dbec:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800dbf0:	0800dc09 	.word	0x0800dc09
 800dbf4:	0800dc11 	.word	0x0800dc11
 800dbf8:	0800dc19 	.word	0x0800dc19
 800dbfc:	0800dc21 	.word	0x0800dc21
 800dc00:	0800dc29 	.word	0x0800dc29
 800dc04:	0800dc31 	.word	0x0800dc31
 800dc08:	2300      	movs	r3, #0
 800dc0a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dc0e:	e086      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dc10:	2304      	movs	r3, #4
 800dc12:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dc16:	e082      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dc18:	2308      	movs	r3, #8
 800dc1a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dc1e:	e07e      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dc20:	2310      	movs	r3, #16
 800dc22:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dc26:	e07a      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dc28:	2320      	movs	r3, #32
 800dc2a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dc2e:	e076      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dc30:	2340      	movs	r3, #64	@ 0x40
 800dc32:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dc36:	e072      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dc38:	2380      	movs	r3, #128	@ 0x80
 800dc3a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dc3e:	e06e      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dc40:	697b      	ldr	r3, [r7, #20]
 800dc42:	681b      	ldr	r3, [r3, #0]
 800dc44:	4a75      	ldr	r2, [pc, #468]	@ (800de1c <UART_SetConfig+0x6a4>)
 800dc46:	4293      	cmp	r3, r2
 800dc48:	d130      	bne.n	800dcac <UART_SetConfig+0x534>
 800dc4a:	4b72      	ldr	r3, [pc, #456]	@ (800de14 <UART_SetConfig+0x69c>)
 800dc4c:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800dc4e:	f003 0307 	and.w	r3, r3, #7
 800dc52:	2b05      	cmp	r3, #5
 800dc54:	d826      	bhi.n	800dca4 <UART_SetConfig+0x52c>
 800dc56:	a201      	add	r2, pc, #4	@ (adr r2, 800dc5c <UART_SetConfig+0x4e4>)
 800dc58:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800dc5c:	0800dc75 	.word	0x0800dc75
 800dc60:	0800dc7d 	.word	0x0800dc7d
 800dc64:	0800dc85 	.word	0x0800dc85
 800dc68:	0800dc8d 	.word	0x0800dc8d
 800dc6c:	0800dc95 	.word	0x0800dc95
 800dc70:	0800dc9d 	.word	0x0800dc9d
 800dc74:	2300      	movs	r3, #0
 800dc76:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dc7a:	e050      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dc7c:	2304      	movs	r3, #4
 800dc7e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dc82:	e04c      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dc84:	2308      	movs	r3, #8
 800dc86:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dc8a:	e048      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dc8c:	2310      	movs	r3, #16
 800dc8e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dc92:	e044      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dc94:	2320      	movs	r3, #32
 800dc96:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dc9a:	e040      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dc9c:	2340      	movs	r3, #64	@ 0x40
 800dc9e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dca2:	e03c      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dca4:	2380      	movs	r3, #128	@ 0x80
 800dca6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dcaa:	e038      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dcac:	697b      	ldr	r3, [r7, #20]
 800dcae:	681b      	ldr	r3, [r3, #0]
 800dcb0:	4a5b      	ldr	r2, [pc, #364]	@ (800de20 <UART_SetConfig+0x6a8>)
 800dcb2:	4293      	cmp	r3, r2
 800dcb4:	d130      	bne.n	800dd18 <UART_SetConfig+0x5a0>
 800dcb6:	4b57      	ldr	r3, [pc, #348]	@ (800de14 <UART_SetConfig+0x69c>)
 800dcb8:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800dcba:	f003 0307 	and.w	r3, r3, #7
 800dcbe:	2b05      	cmp	r3, #5
 800dcc0:	d826      	bhi.n	800dd10 <UART_SetConfig+0x598>
 800dcc2:	a201      	add	r2, pc, #4	@ (adr r2, 800dcc8 <UART_SetConfig+0x550>)
 800dcc4:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800dcc8:	0800dce1 	.word	0x0800dce1
 800dccc:	0800dce9 	.word	0x0800dce9
 800dcd0:	0800dcf1 	.word	0x0800dcf1
 800dcd4:	0800dcf9 	.word	0x0800dcf9
 800dcd8:	0800dd01 	.word	0x0800dd01
 800dcdc:	0800dd09 	.word	0x0800dd09
 800dce0:	2302      	movs	r3, #2
 800dce2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dce6:	e01a      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dce8:	2304      	movs	r3, #4
 800dcea:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dcee:	e016      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dcf0:	2308      	movs	r3, #8
 800dcf2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dcf6:	e012      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dcf8:	2310      	movs	r3, #16
 800dcfa:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dcfe:	e00e      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dd00:	2320      	movs	r3, #32
 800dd02:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dd06:	e00a      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dd08:	2340      	movs	r3, #64	@ 0x40
 800dd0a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dd0e:	e006      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dd10:	2380      	movs	r3, #128	@ 0x80
 800dd12:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dd16:	e002      	b.n	800dd1e <UART_SetConfig+0x5a6>
 800dd18:	2380      	movs	r3, #128	@ 0x80
 800dd1a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43

  /* Check LPUART instance */
  if (UART_INSTANCE_LOWPOWER(huart))
 800dd1e:	697b      	ldr	r3, [r7, #20]
 800dd20:	681b      	ldr	r3, [r3, #0]
 800dd22:	4a3f      	ldr	r2, [pc, #252]	@ (800de20 <UART_SetConfig+0x6a8>)
 800dd24:	4293      	cmp	r3, r2
 800dd26:	f040 80f8 	bne.w	800df1a <UART_SetConfig+0x7a2>
  {
    /* Retrieve frequency clock */
    switch (clocksource)
 800dd2a:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800dd2e:	2b20      	cmp	r3, #32
 800dd30:	dc46      	bgt.n	800ddc0 <UART_SetConfig+0x648>
 800dd32:	2b02      	cmp	r3, #2
 800dd34:	f2c0 8082 	blt.w	800de3c <UART_SetConfig+0x6c4>
 800dd38:	3b02      	subs	r3, #2
 800dd3a:	2b1e      	cmp	r3, #30
 800dd3c:	d87e      	bhi.n	800de3c <UART_SetConfig+0x6c4>
 800dd3e:	a201      	add	r2, pc, #4	@ (adr r2, 800dd44 <UART_SetConfig+0x5cc>)
 800dd40:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800dd44:	0800ddc7 	.word	0x0800ddc7
 800dd48:	0800de3d 	.word	0x0800de3d
 800dd4c:	0800ddcf 	.word	0x0800ddcf
 800dd50:	0800de3d 	.word	0x0800de3d
 800dd54:	0800de3d 	.word	0x0800de3d
 800dd58:	0800de3d 	.word	0x0800de3d
 800dd5c:	0800dddf 	.word	0x0800dddf
 800dd60:	0800de3d 	.word	0x0800de3d
 800dd64:	0800de3d 	.word	0x0800de3d
 800dd68:	0800de3d 	.word	0x0800de3d
 800dd6c:	0800de3d 	.word	0x0800de3d
 800dd70:	0800de3d 	.word	0x0800de3d
 800dd74:	0800de3d 	.word	0x0800de3d
 800dd78:	0800de3d 	.word	0x0800de3d
 800dd7c:	0800ddef 	.word	0x0800ddef
 800dd80:	0800de3d 	.word	0x0800de3d
 800dd84:	0800de3d 	.word	0x0800de3d
 800dd88:	0800de3d 	.word	0x0800de3d
 800dd8c:	0800de3d 	.word	0x0800de3d
 800dd90:	0800de3d 	.word	0x0800de3d
 800dd94:	0800de3d 	.word	0x0800de3d
 800dd98:	0800de3d 	.word	0x0800de3d
 800dd9c:	0800de3d 	.word	0x0800de3d
 800dda0:	0800de3d 	.word	0x0800de3d
 800dda4:	0800de3d 	.word	0x0800de3d
 800dda8:	0800de3d 	.word	0x0800de3d
 800ddac:	0800de3d 	.word	0x0800de3d
 800ddb0:	0800de3d 	.word	0x0800de3d
 800ddb4:	0800de3d 	.word	0x0800de3d
 800ddb8:	0800de3d 	.word	0x0800de3d
 800ddbc:	0800de2f 	.word	0x0800de2f
 800ddc0:	2b40      	cmp	r3, #64	@ 0x40
 800ddc2:	d037      	beq.n	800de34 <UART_SetConfig+0x6bc>
 800ddc4:	e03a      	b.n	800de3c <UART_SetConfig+0x6c4>
    {
      case UART_CLOCKSOURCE_D3PCLK1:
        pclk = HAL_RCCEx_GetD3PCLK1Freq();
 800ddc6:	f7fe f887 	bl	800bed8 <HAL_RCCEx_GetD3PCLK1Freq>
 800ddca:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800ddcc:	e03c      	b.n	800de48 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800ddce:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800ddd2:	4618      	mov	r0, r3
 800ddd4:	f7fe f896 	bl	800bf04 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800ddd8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800ddda:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800dddc:	e034      	b.n	800de48 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800ddde:	f107 0318 	add.w	r3, r7, #24
 800dde2:	4618      	mov	r0, r3
 800dde4:	f7fe f9e2 	bl	800c1ac <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800dde8:	69fb      	ldr	r3, [r7, #28]
 800ddea:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800ddec:	e02c      	b.n	800de48 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800ddee:	4b09      	ldr	r3, [pc, #36]	@ (800de14 <UART_SetConfig+0x69c>)
 800ddf0:	681b      	ldr	r3, [r3, #0]
 800ddf2:	f003 0320 	and.w	r3, r3, #32
 800ddf6:	2b00      	cmp	r3, #0
 800ddf8:	d016      	beq.n	800de28 <UART_SetConfig+0x6b0>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800ddfa:	4b06      	ldr	r3, [pc, #24]	@ (800de14 <UART_SetConfig+0x69c>)
 800ddfc:	681b      	ldr	r3, [r3, #0]
 800ddfe:	08db      	lsrs	r3, r3, #3
 800de00:	f003 0303 	and.w	r3, r3, #3
 800de04:	4a07      	ldr	r2, [pc, #28]	@ (800de24 <UART_SetConfig+0x6ac>)
 800de06:	fa22 f303 	lsr.w	r3, r2, r3
 800de0a:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800de0c:	e01c      	b.n	800de48 <UART_SetConfig+0x6d0>
 800de0e:	bf00      	nop
 800de10:	40011400 	.word	0x40011400
 800de14:	58024400 	.word	0x58024400
 800de18:	40007800 	.word	0x40007800
 800de1c:	40007c00 	.word	0x40007c00
 800de20:	58000c00 	.word	0x58000c00
 800de24:	03d09000 	.word	0x03d09000
          pclk = (uint32_t) HSI_VALUE;
 800de28:	4b9d      	ldr	r3, [pc, #628]	@ (800e0a0 <UART_SetConfig+0x928>)
 800de2a:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800de2c:	e00c      	b.n	800de48 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800de2e:	4b9d      	ldr	r3, [pc, #628]	@ (800e0a4 <UART_SetConfig+0x92c>)
 800de30:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800de32:	e009      	b.n	800de48 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800de34:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800de38:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800de3a:	e005      	b.n	800de48 <UART_SetConfig+0x6d0>
      default:
        pclk = 0U;
 800de3c:	2300      	movs	r3, #0
 800de3e:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800de40:	2301      	movs	r3, #1
 800de42:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800de46:	bf00      	nop
    }

    /* If proper clock source reported */
    if (pclk != 0U)
 800de48:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800de4a:	2b00      	cmp	r3, #0
 800de4c:	f000 81de 	beq.w	800e20c <UART_SetConfig+0xa94>
    {
      /* Compute clock after Prescaler */
      lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]);
 800de50:	697b      	ldr	r3, [r7, #20]
 800de52:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800de54:	4a94      	ldr	r2, [pc, #592]	@ (800e0a8 <UART_SetConfig+0x930>)
 800de56:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800de5a:	461a      	mov	r2, r3
 800de5c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800de5e:	fbb3 f3f2 	udiv	r3, r3, r2
 800de62:	633b      	str	r3, [r7, #48]	@ 0x30

      /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
      if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
 800de64:	697b      	ldr	r3, [r7, #20]
 800de66:	685a      	ldr	r2, [r3, #4]
 800de68:	4613      	mov	r3, r2
 800de6a:	005b      	lsls	r3, r3, #1
 800de6c:	4413      	add	r3, r2
 800de6e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800de70:	429a      	cmp	r2, r3
 800de72:	d305      	bcc.n	800de80 <UART_SetConfig+0x708>
          (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate)))
 800de74:	697b      	ldr	r3, [r7, #20]
 800de76:	685b      	ldr	r3, [r3, #4]
 800de78:	031b      	lsls	r3, r3, #12
      if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
 800de7a:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800de7c:	429a      	cmp	r2, r3
 800de7e:	d903      	bls.n	800de88 <UART_SetConfig+0x710>
      {
        ret = HAL_ERROR;
 800de80:	2301      	movs	r3, #1
 800de82:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800de86:	e1c1      	b.n	800e20c <UART_SetConfig+0xa94>
      }
      else
      {
        /* Check computed UsartDiv value is in allocated range
           (it is forbidden to write values lower than 0x300 in the LPUART_BRR register) */
        usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800de88:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800de8a:	2200      	movs	r2, #0
 800de8c:	60bb      	str	r3, [r7, #8]
 800de8e:	60fa      	str	r2, [r7, #12]
 800de90:	697b      	ldr	r3, [r7, #20]
 800de92:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800de94:	4a84      	ldr	r2, [pc, #528]	@ (800e0a8 <UART_SetConfig+0x930>)
 800de96:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800de9a:	b29b      	uxth	r3, r3
 800de9c:	2200      	movs	r2, #0
 800de9e:	603b      	str	r3, [r7, #0]
 800dea0:	607a      	str	r2, [r7, #4]
 800dea2:	e9d7 2300 	ldrd	r2, r3, [r7]
 800dea6:	e9d7 0102 	ldrd	r0, r1, [r7, #8]
 800deaa:	f7f2 fc3d 	bl	8000728 <__aeabi_uldivmod>
 800deae:	4602      	mov	r2, r0
 800deb0:	460b      	mov	r3, r1
 800deb2:	4610      	mov	r0, r2
 800deb4:	4619      	mov	r1, r3
 800deb6:	f04f 0200 	mov.w	r2, #0
 800deba:	f04f 0300 	mov.w	r3, #0
 800debe:	020b      	lsls	r3, r1, #8
 800dec0:	ea43 6310 	orr.w	r3, r3, r0, lsr #24
 800dec4:	0202      	lsls	r2, r0, #8
 800dec6:	6979      	ldr	r1, [r7, #20]
 800dec8:	6849      	ldr	r1, [r1, #4]
 800deca:	0849      	lsrs	r1, r1, #1
 800decc:	2000      	movs	r0, #0
 800dece:	460c      	mov	r4, r1
 800ded0:	4605      	mov	r5, r0
 800ded2:	eb12 0804 	adds.w	r8, r2, r4
 800ded6:	eb43 0905 	adc.w	r9, r3, r5
 800deda:	697b      	ldr	r3, [r7, #20]
 800dedc:	685b      	ldr	r3, [r3, #4]
 800dede:	2200      	movs	r2, #0
 800dee0:	469a      	mov	sl, r3
 800dee2:	4693      	mov	fp, r2
 800dee4:	4652      	mov	r2, sl
 800dee6:	465b      	mov	r3, fp
 800dee8:	4640      	mov	r0, r8
 800deea:	4649      	mov	r1, r9
 800deec:	f7f2 fc1c 	bl	8000728 <__aeabi_uldivmod>
 800def0:	4602      	mov	r2, r0
 800def2:	460b      	mov	r3, r1
 800def4:	4613      	mov	r3, r2
 800def6:	63bb      	str	r3, [r7, #56]	@ 0x38
        if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
 800def8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800defa:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800defe:	d308      	bcc.n	800df12 <UART_SetConfig+0x79a>
 800df00:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800df02:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800df06:	d204      	bcs.n	800df12 <UART_SetConfig+0x79a>
        {
          huart->Instance->BRR = usartdiv;
 800df08:	697b      	ldr	r3, [r7, #20]
 800df0a:	681b      	ldr	r3, [r3, #0]
 800df0c:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800df0e:	60da      	str	r2, [r3, #12]
 800df10:	e17c      	b.n	800e20c <UART_SetConfig+0xa94>
        }
        else
        {
          ret = HAL_ERROR;
 800df12:	2301      	movs	r3, #1
 800df14:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800df18:	e178      	b.n	800e20c <UART_SetConfig+0xa94>
      } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) ||
                (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */
    } /* if (pclk != 0) */
  }
  /* Check UART Over Sampling to set Baud Rate Register */
  else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
 800df1a:	697b      	ldr	r3, [r7, #20]
 800df1c:	69db      	ldr	r3, [r3, #28]
 800df1e:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800df22:	f040 80c5 	bne.w	800e0b0 <UART_SetConfig+0x938>
  {
    switch (clocksource)
 800df26:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800df2a:	2b20      	cmp	r3, #32
 800df2c:	dc48      	bgt.n	800dfc0 <UART_SetConfig+0x848>
 800df2e:	2b00      	cmp	r3, #0
 800df30:	db7b      	blt.n	800e02a <UART_SetConfig+0x8b2>
 800df32:	2b20      	cmp	r3, #32
 800df34:	d879      	bhi.n	800e02a <UART_SetConfig+0x8b2>
 800df36:	a201      	add	r2, pc, #4	@ (adr r2, 800df3c <UART_SetConfig+0x7c4>)
 800df38:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800df3c:	0800dfc7 	.word	0x0800dfc7
 800df40:	0800dfcf 	.word	0x0800dfcf
 800df44:	0800e02b 	.word	0x0800e02b
 800df48:	0800e02b 	.word	0x0800e02b
 800df4c:	0800dfd7 	.word	0x0800dfd7
 800df50:	0800e02b 	.word	0x0800e02b
 800df54:	0800e02b 	.word	0x0800e02b
 800df58:	0800e02b 	.word	0x0800e02b
 800df5c:	0800dfe7 	.word	0x0800dfe7
 800df60:	0800e02b 	.word	0x0800e02b
 800df64:	0800e02b 	.word	0x0800e02b
 800df68:	0800e02b 	.word	0x0800e02b
 800df6c:	0800e02b 	.word	0x0800e02b
 800df70:	0800e02b 	.word	0x0800e02b
 800df74:	0800e02b 	.word	0x0800e02b
 800df78:	0800e02b 	.word	0x0800e02b
 800df7c:	0800dff7 	.word	0x0800dff7
 800df80:	0800e02b 	.word	0x0800e02b
 800df84:	0800e02b 	.word	0x0800e02b
 800df88:	0800e02b 	.word	0x0800e02b
 800df8c:	0800e02b 	.word	0x0800e02b
 800df90:	0800e02b 	.word	0x0800e02b
 800df94:	0800e02b 	.word	0x0800e02b
 800df98:	0800e02b 	.word	0x0800e02b
 800df9c:	0800e02b 	.word	0x0800e02b
 800dfa0:	0800e02b 	.word	0x0800e02b
 800dfa4:	0800e02b 	.word	0x0800e02b
 800dfa8:	0800e02b 	.word	0x0800e02b
 800dfac:	0800e02b 	.word	0x0800e02b
 800dfb0:	0800e02b 	.word	0x0800e02b
 800dfb4:	0800e02b 	.word	0x0800e02b
 800dfb8:	0800e02b 	.word	0x0800e02b
 800dfbc:	0800e01d 	.word	0x0800e01d
 800dfc0:	2b40      	cmp	r3, #64	@ 0x40
 800dfc2:	d02e      	beq.n	800e022 <UART_SetConfig+0x8aa>
 800dfc4:	e031      	b.n	800e02a <UART_SetConfig+0x8b2>
    {
      case UART_CLOCKSOURCE_D2PCLK1:
        pclk = HAL_RCC_GetPCLK1Freq();
 800dfc6:	f7fc fd2b 	bl	800aa20 <HAL_RCC_GetPCLK1Freq>
 800dfca:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800dfcc:	e033      	b.n	800e036 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_D2PCLK2:
        pclk = HAL_RCC_GetPCLK2Freq();
 800dfce:	f7fc fd3d 	bl	800aa4c <HAL_RCC_GetPCLK2Freq>
 800dfd2:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800dfd4:	e02f      	b.n	800e036 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800dfd6:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800dfda:	4618      	mov	r0, r3
 800dfdc:	f7fd ff92 	bl	800bf04 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800dfe0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800dfe2:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800dfe4:	e027      	b.n	800e036 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800dfe6:	f107 0318 	add.w	r3, r7, #24
 800dfea:	4618      	mov	r0, r3
 800dfec:	f7fe f8de 	bl	800c1ac <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800dff0:	69fb      	ldr	r3, [r7, #28]
 800dff2:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800dff4:	e01f      	b.n	800e036 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800dff6:	4b2d      	ldr	r3, [pc, #180]	@ (800e0ac <UART_SetConfig+0x934>)
 800dff8:	681b      	ldr	r3, [r3, #0]
 800dffa:	f003 0320 	and.w	r3, r3, #32
 800dffe:	2b00      	cmp	r3, #0
 800e000:	d009      	beq.n	800e016 <UART_SetConfig+0x89e>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800e002:	4b2a      	ldr	r3, [pc, #168]	@ (800e0ac <UART_SetConfig+0x934>)
 800e004:	681b      	ldr	r3, [r3, #0]
 800e006:	08db      	lsrs	r3, r3, #3
 800e008:	f003 0303 	and.w	r3, r3, #3
 800e00c:	4a24      	ldr	r2, [pc, #144]	@ (800e0a0 <UART_SetConfig+0x928>)
 800e00e:	fa22 f303 	lsr.w	r3, r2, r3
 800e012:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800e014:	e00f      	b.n	800e036 <UART_SetConfig+0x8be>
          pclk = (uint32_t) HSI_VALUE;
 800e016:	4b22      	ldr	r3, [pc, #136]	@ (800e0a0 <UART_SetConfig+0x928>)
 800e018:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e01a:	e00c      	b.n	800e036 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800e01c:	4b21      	ldr	r3, [pc, #132]	@ (800e0a4 <UART_SetConfig+0x92c>)
 800e01e:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e020:	e009      	b.n	800e036 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800e022:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800e026:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e028:	e005      	b.n	800e036 <UART_SetConfig+0x8be>
      default:
        pclk = 0U;
 800e02a:	2300      	movs	r3, #0
 800e02c:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800e02e:	2301      	movs	r3, #1
 800e030:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800e034:	bf00      	nop
    }

    /* USARTDIV must be greater than or equal to 0d16 */
    if (pclk != 0U)
 800e036:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e038:	2b00      	cmp	r3, #0
 800e03a:	f000 80e7 	beq.w	800e20c <UART_SetConfig+0xa94>
    {
      usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800e03e:	697b      	ldr	r3, [r7, #20]
 800e040:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800e042:	4a19      	ldr	r2, [pc, #100]	@ (800e0a8 <UART_SetConfig+0x930>)
 800e044:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800e048:	461a      	mov	r2, r3
 800e04a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e04c:	fbb3 f3f2 	udiv	r3, r3, r2
 800e050:	005a      	lsls	r2, r3, #1
 800e052:	697b      	ldr	r3, [r7, #20]
 800e054:	685b      	ldr	r3, [r3, #4]
 800e056:	085b      	lsrs	r3, r3, #1
 800e058:	441a      	add	r2, r3
 800e05a:	697b      	ldr	r3, [r7, #20]
 800e05c:	685b      	ldr	r3, [r3, #4]
 800e05e:	fbb2 f3f3 	udiv	r3, r2, r3
 800e062:	63bb      	str	r3, [r7, #56]	@ 0x38
      if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
 800e064:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e066:	2b0f      	cmp	r3, #15
 800e068:	d916      	bls.n	800e098 <UART_SetConfig+0x920>
 800e06a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e06c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800e070:	d212      	bcs.n	800e098 <UART_SetConfig+0x920>
      {
        brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
 800e072:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e074:	b29b      	uxth	r3, r3
 800e076:	f023 030f 	bic.w	r3, r3, #15
 800e07a:	86fb      	strh	r3, [r7, #54]	@ 0x36
        brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
 800e07c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e07e:	085b      	lsrs	r3, r3, #1
 800e080:	b29b      	uxth	r3, r3
 800e082:	f003 0307 	and.w	r3, r3, #7
 800e086:	b29a      	uxth	r2, r3
 800e088:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 800e08a:	4313      	orrs	r3, r2
 800e08c:	86fb      	strh	r3, [r7, #54]	@ 0x36
        huart->Instance->BRR = brrtemp;
 800e08e:	697b      	ldr	r3, [r7, #20]
 800e090:	681b      	ldr	r3, [r3, #0]
 800e092:	8efa      	ldrh	r2, [r7, #54]	@ 0x36
 800e094:	60da      	str	r2, [r3, #12]
 800e096:	e0b9      	b.n	800e20c <UART_SetConfig+0xa94>
      }
      else
      {
        ret = HAL_ERROR;
 800e098:	2301      	movs	r3, #1
 800e09a:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800e09e:	e0b5      	b.n	800e20c <UART_SetConfig+0xa94>
 800e0a0:	03d09000 	.word	0x03d09000
 800e0a4:	003d0900 	.word	0x003d0900
 800e0a8:	08030a94 	.word	0x08030a94
 800e0ac:	58024400 	.word	0x58024400
      }
    }
  }
  else
  {
    switch (clocksource)
 800e0b0:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800e0b4:	2b20      	cmp	r3, #32
 800e0b6:	dc49      	bgt.n	800e14c <UART_SetConfig+0x9d4>
 800e0b8:	2b00      	cmp	r3, #0
 800e0ba:	db7c      	blt.n	800e1b6 <UART_SetConfig+0xa3e>
 800e0bc:	2b20      	cmp	r3, #32
 800e0be:	d87a      	bhi.n	800e1b6 <UART_SetConfig+0xa3e>
 800e0c0:	a201      	add	r2, pc, #4	@ (adr r2, 800e0c8 <UART_SetConfig+0x950>)
 800e0c2:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e0c6:	bf00      	nop
 800e0c8:	0800e153 	.word	0x0800e153
 800e0cc:	0800e15b 	.word	0x0800e15b
 800e0d0:	0800e1b7 	.word	0x0800e1b7
 800e0d4:	0800e1b7 	.word	0x0800e1b7
 800e0d8:	0800e163 	.word	0x0800e163
 800e0dc:	0800e1b7 	.word	0x0800e1b7
 800e0e0:	0800e1b7 	.word	0x0800e1b7
 800e0e4:	0800e1b7 	.word	0x0800e1b7
 800e0e8:	0800e173 	.word	0x0800e173
 800e0ec:	0800e1b7 	.word	0x0800e1b7
 800e0f0:	0800e1b7 	.word	0x0800e1b7
 800e0f4:	0800e1b7 	.word	0x0800e1b7
 800e0f8:	0800e1b7 	.word	0x0800e1b7
 800e0fc:	0800e1b7 	.word	0x0800e1b7
 800e100:	0800e1b7 	.word	0x0800e1b7
 800e104:	0800e1b7 	.word	0x0800e1b7
 800e108:	0800e183 	.word	0x0800e183
 800e10c:	0800e1b7 	.word	0x0800e1b7
 800e110:	0800e1b7 	.word	0x0800e1b7
 800e114:	0800e1b7 	.word	0x0800e1b7
 800e118:	0800e1b7 	.word	0x0800e1b7
 800e11c:	0800e1b7 	.word	0x0800e1b7
 800e120:	0800e1b7 	.word	0x0800e1b7
 800e124:	0800e1b7 	.word	0x0800e1b7
 800e128:	0800e1b7 	.word	0x0800e1b7
 800e12c:	0800e1b7 	.word	0x0800e1b7
 800e130:	0800e1b7 	.word	0x0800e1b7
 800e134:	0800e1b7 	.word	0x0800e1b7
 800e138:	0800e1b7 	.word	0x0800e1b7
 800e13c:	0800e1b7 	.word	0x0800e1b7
 800e140:	0800e1b7 	.word	0x0800e1b7
 800e144:	0800e1b7 	.word	0x0800e1b7
 800e148:	0800e1a9 	.word	0x0800e1a9
 800e14c:	2b40      	cmp	r3, #64	@ 0x40
 800e14e:	d02e      	beq.n	800e1ae <UART_SetConfig+0xa36>
 800e150:	e031      	b.n	800e1b6 <UART_SetConfig+0xa3e>
    {
      case UART_CLOCKSOURCE_D2PCLK1:
        pclk = HAL_RCC_GetPCLK1Freq();
 800e152:	f7fc fc65 	bl	800aa20 <HAL_RCC_GetPCLK1Freq>
 800e156:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800e158:	e033      	b.n	800e1c2 <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_D2PCLK2:
        pclk = HAL_RCC_GetPCLK2Freq();
 800e15a:	f7fc fc77 	bl	800aa4c <HAL_RCC_GetPCLK2Freq>
 800e15e:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800e160:	e02f      	b.n	800e1c2 <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800e162:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800e166:	4618      	mov	r0, r3
 800e168:	f7fd fecc 	bl	800bf04 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800e16c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e16e:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e170:	e027      	b.n	800e1c2 <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800e172:	f107 0318 	add.w	r3, r7, #24
 800e176:	4618      	mov	r0, r3
 800e178:	f7fe f818 	bl	800c1ac <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800e17c:	69fb      	ldr	r3, [r7, #28]
 800e17e:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e180:	e01f      	b.n	800e1c2 <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800e182:	4b2d      	ldr	r3, [pc, #180]	@ (800e238 <UART_SetConfig+0xac0>)
 800e184:	681b      	ldr	r3, [r3, #0]
 800e186:	f003 0320 	and.w	r3, r3, #32
 800e18a:	2b00      	cmp	r3, #0
 800e18c:	d009      	beq.n	800e1a2 <UART_SetConfig+0xa2a>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800e18e:	4b2a      	ldr	r3, [pc, #168]	@ (800e238 <UART_SetConfig+0xac0>)
 800e190:	681b      	ldr	r3, [r3, #0]
 800e192:	08db      	lsrs	r3, r3, #3
 800e194:	f003 0303 	and.w	r3, r3, #3
 800e198:	4a28      	ldr	r2, [pc, #160]	@ (800e23c <UART_SetConfig+0xac4>)
 800e19a:	fa22 f303 	lsr.w	r3, r2, r3
 800e19e:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800e1a0:	e00f      	b.n	800e1c2 <UART_SetConfig+0xa4a>
          pclk = (uint32_t) HSI_VALUE;
 800e1a2:	4b26      	ldr	r3, [pc, #152]	@ (800e23c <UART_SetConfig+0xac4>)
 800e1a4:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e1a6:	e00c      	b.n	800e1c2 <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800e1a8:	4b25      	ldr	r3, [pc, #148]	@ (800e240 <UART_SetConfig+0xac8>)
 800e1aa:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e1ac:	e009      	b.n	800e1c2 <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800e1ae:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800e1b2:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e1b4:	e005      	b.n	800e1c2 <UART_SetConfig+0xa4a>
      default:
        pclk = 0U;
 800e1b6:	2300      	movs	r3, #0
 800e1b8:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800e1ba:	2301      	movs	r3, #1
 800e1bc:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800e1c0:	bf00      	nop
    }

    if (pclk != 0U)
 800e1c2:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e1c4:	2b00      	cmp	r3, #0
 800e1c6:	d021      	beq.n	800e20c <UART_SetConfig+0xa94>
    {
      /* USARTDIV must be greater than or equal to 0d16 */
      usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800e1c8:	697b      	ldr	r3, [r7, #20]
 800e1ca:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800e1cc:	4a1d      	ldr	r2, [pc, #116]	@ (800e244 <UART_SetConfig+0xacc>)
 800e1ce:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800e1d2:	461a      	mov	r2, r3
 800e1d4:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e1d6:	fbb3 f2f2 	udiv	r2, r3, r2
 800e1da:	697b      	ldr	r3, [r7, #20]
 800e1dc:	685b      	ldr	r3, [r3, #4]
 800e1de:	085b      	lsrs	r3, r3, #1
 800e1e0:	441a      	add	r2, r3
 800e1e2:	697b      	ldr	r3, [r7, #20]
 800e1e4:	685b      	ldr	r3, [r3, #4]
 800e1e6:	fbb2 f3f3 	udiv	r3, r2, r3
 800e1ea:	63bb      	str	r3, [r7, #56]	@ 0x38
      if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
 800e1ec:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e1ee:	2b0f      	cmp	r3, #15
 800e1f0:	d909      	bls.n	800e206 <UART_SetConfig+0xa8e>
 800e1f2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e1f4:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800e1f8:	d205      	bcs.n	800e206 <UART_SetConfig+0xa8e>
      {
        huart->Instance->BRR = (uint16_t)usartdiv;
 800e1fa:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e1fc:	b29a      	uxth	r2, r3
 800e1fe:	697b      	ldr	r3, [r7, #20]
 800e200:	681b      	ldr	r3, [r3, #0]
 800e202:	60da      	str	r2, [r3, #12]
 800e204:	e002      	b.n	800e20c <UART_SetConfig+0xa94>
      }
      else
      {
        ret = HAL_ERROR;
 800e206:	2301      	movs	r3, #1
 800e208:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
      }
    }
  }

  /* Initialize the number of data to process during RX/TX ISR execution */
  huart->NbTxDataToProcess = 1;
 800e20c:	697b      	ldr	r3, [r7, #20]
 800e20e:	2201      	movs	r2, #1
 800e210:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
  huart->NbRxDataToProcess = 1;
 800e214:	697b      	ldr	r3, [r7, #20]
 800e216:	2201      	movs	r2, #1
 800e218:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68

  /* Clear ISR function pointers */
  huart->RxISR = NULL;
 800e21c:	697b      	ldr	r3, [r7, #20]
 800e21e:	2200      	movs	r2, #0
 800e220:	675a      	str	r2, [r3, #116]	@ 0x74
  huart->TxISR = NULL;
 800e222:	697b      	ldr	r3, [r7, #20]
 800e224:	2200      	movs	r2, #0
 800e226:	679a      	str	r2, [r3, #120]	@ 0x78

  return ret;
 800e228:	f897 3042 	ldrb.w	r3, [r7, #66]	@ 0x42
}
 800e22c:	4618      	mov	r0, r3
 800e22e:	3748      	adds	r7, #72	@ 0x48
 800e230:	46bd      	mov	sp, r7
 800e232:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
 800e236:	bf00      	nop
 800e238:	58024400 	.word	0x58024400
 800e23c:	03d09000 	.word	0x03d09000
 800e240:	003d0900 	.word	0x003d0900
 800e244:	08030a94 	.word	0x08030a94

0800e248 <UART_AdvFeatureConfig>:
  * @brief Configure the UART peripheral advanced features.
  * @param huart UART handle.
  * @retval None
  */
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
{
 800e248:	b480      	push	{r7}
 800e24a:	b083      	sub	sp, #12
 800e24c:	af00      	add	r7, sp, #0
 800e24e:	6078      	str	r0, [r7, #4]
  /* Check whether the set of advanced features to configure is properly set */
  assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));

  /* if required, configure RX/TX pins swap */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
 800e250:	687b      	ldr	r3, [r7, #4]
 800e252:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e254:	f003 0308 	and.w	r3, r3, #8
 800e258:	2b00      	cmp	r3, #0
 800e25a:	d00a      	beq.n	800e272 <UART_AdvFeatureConfig+0x2a>
  {
    assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
 800e25c:	687b      	ldr	r3, [r7, #4]
 800e25e:	681b      	ldr	r3, [r3, #0]
 800e260:	685b      	ldr	r3, [r3, #4]
 800e262:	f423 4100 	bic.w	r1, r3, #32768	@ 0x8000
 800e266:	687b      	ldr	r3, [r7, #4]
 800e268:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 800e26a:	687b      	ldr	r3, [r7, #4]
 800e26c:	681b      	ldr	r3, [r3, #0]
 800e26e:	430a      	orrs	r2, r1
 800e270:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure TX pin active level inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
 800e272:	687b      	ldr	r3, [r7, #4]
 800e274:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e276:	f003 0301 	and.w	r3, r3, #1
 800e27a:	2b00      	cmp	r3, #0
 800e27c:	d00a      	beq.n	800e294 <UART_AdvFeatureConfig+0x4c>
  {
    assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
 800e27e:	687b      	ldr	r3, [r7, #4]
 800e280:	681b      	ldr	r3, [r3, #0]
 800e282:	685b      	ldr	r3, [r3, #4]
 800e284:	f423 3100 	bic.w	r1, r3, #131072	@ 0x20000
 800e288:	687b      	ldr	r3, [r7, #4]
 800e28a:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 800e28c:	687b      	ldr	r3, [r7, #4]
 800e28e:	681b      	ldr	r3, [r3, #0]
 800e290:	430a      	orrs	r2, r1
 800e292:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure RX pin active level inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
 800e294:	687b      	ldr	r3, [r7, #4]
 800e296:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e298:	f003 0302 	and.w	r3, r3, #2
 800e29c:	2b00      	cmp	r3, #0
 800e29e:	d00a      	beq.n	800e2b6 <UART_AdvFeatureConfig+0x6e>
  {
    assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
 800e2a0:	687b      	ldr	r3, [r7, #4]
 800e2a2:	681b      	ldr	r3, [r3, #0]
 800e2a4:	685b      	ldr	r3, [r3, #4]
 800e2a6:	f423 3180 	bic.w	r1, r3, #65536	@ 0x10000
 800e2aa:	687b      	ldr	r3, [r7, #4]
 800e2ac:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 800e2ae:	687b      	ldr	r3, [r7, #4]
 800e2b0:	681b      	ldr	r3, [r3, #0]
 800e2b2:	430a      	orrs	r2, r1
 800e2b4:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure data inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
 800e2b6:	687b      	ldr	r3, [r7, #4]
 800e2b8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e2ba:	f003 0304 	and.w	r3, r3, #4
 800e2be:	2b00      	cmp	r3, #0
 800e2c0:	d00a      	beq.n	800e2d8 <UART_AdvFeatureConfig+0x90>
  {
    assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
 800e2c2:	687b      	ldr	r3, [r7, #4]
 800e2c4:	681b      	ldr	r3, [r3, #0]
 800e2c6:	685b      	ldr	r3, [r3, #4]
 800e2c8:	f423 2180 	bic.w	r1, r3, #262144	@ 0x40000
 800e2cc:	687b      	ldr	r3, [r7, #4]
 800e2ce:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 800e2d0:	687b      	ldr	r3, [r7, #4]
 800e2d2:	681b      	ldr	r3, [r3, #0]
 800e2d4:	430a      	orrs	r2, r1
 800e2d6:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure RX overrun detection disabling */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
 800e2d8:	687b      	ldr	r3, [r7, #4]
 800e2da:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e2dc:	f003 0310 	and.w	r3, r3, #16
 800e2e0:	2b00      	cmp	r3, #0
 800e2e2:	d00a      	beq.n	800e2fa <UART_AdvFeatureConfig+0xb2>
  {
    assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
    MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
 800e2e4:	687b      	ldr	r3, [r7, #4]
 800e2e6:	681b      	ldr	r3, [r3, #0]
 800e2e8:	689b      	ldr	r3, [r3, #8]
 800e2ea:	f423 5180 	bic.w	r1, r3, #4096	@ 0x1000
 800e2ee:	687b      	ldr	r3, [r7, #4]
 800e2f0:	6bda      	ldr	r2, [r3, #60]	@ 0x3c
 800e2f2:	687b      	ldr	r3, [r7, #4]
 800e2f4:	681b      	ldr	r3, [r3, #0]
 800e2f6:	430a      	orrs	r2, r1
 800e2f8:	609a      	str	r2, [r3, #8]
  }

  /* if required, configure DMA disabling on reception error */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
 800e2fa:	687b      	ldr	r3, [r7, #4]
 800e2fc:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e2fe:	f003 0320 	and.w	r3, r3, #32
 800e302:	2b00      	cmp	r3, #0
 800e304:	d00a      	beq.n	800e31c <UART_AdvFeatureConfig+0xd4>
  {
    assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
    MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
 800e306:	687b      	ldr	r3, [r7, #4]
 800e308:	681b      	ldr	r3, [r3, #0]
 800e30a:	689b      	ldr	r3, [r3, #8]
 800e30c:	f423 5100 	bic.w	r1, r3, #8192	@ 0x2000
 800e310:	687b      	ldr	r3, [r7, #4]
 800e312:	6c1a      	ldr	r2, [r3, #64]	@ 0x40
 800e314:	687b      	ldr	r3, [r7, #4]
 800e316:	681b      	ldr	r3, [r3, #0]
 800e318:	430a      	orrs	r2, r1
 800e31a:	609a      	str	r2, [r3, #8]
  }

  /* if required, configure auto Baud rate detection scheme */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
 800e31c:	687b      	ldr	r3, [r7, #4]
 800e31e:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e320:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800e324:	2b00      	cmp	r3, #0
 800e326:	d01a      	beq.n	800e35e <UART_AdvFeatureConfig+0x116>
  {
    assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
    assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
 800e328:	687b      	ldr	r3, [r7, #4]
 800e32a:	681b      	ldr	r3, [r3, #0]
 800e32c:	685b      	ldr	r3, [r3, #4]
 800e32e:	f423 1180 	bic.w	r1, r3, #1048576	@ 0x100000
 800e332:	687b      	ldr	r3, [r7, #4]
 800e334:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 800e336:	687b      	ldr	r3, [r7, #4]
 800e338:	681b      	ldr	r3, [r3, #0]
 800e33a:	430a      	orrs	r2, r1
 800e33c:	605a      	str	r2, [r3, #4]
    /* set auto Baudrate detection parameters if detection is enabled */
    if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
 800e33e:	687b      	ldr	r3, [r7, #4]
 800e340:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800e342:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800e346:	d10a      	bne.n	800e35e <UART_AdvFeatureConfig+0x116>
    {
      assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
      MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
 800e348:	687b      	ldr	r3, [r7, #4]
 800e34a:	681b      	ldr	r3, [r3, #0]
 800e34c:	685b      	ldr	r3, [r3, #4]
 800e34e:	f423 01c0 	bic.w	r1, r3, #6291456	@ 0x600000
 800e352:	687b      	ldr	r3, [r7, #4]
 800e354:	6c9a      	ldr	r2, [r3, #72]	@ 0x48
 800e356:	687b      	ldr	r3, [r7, #4]
 800e358:	681b      	ldr	r3, [r3, #0]
 800e35a:	430a      	orrs	r2, r1
 800e35c:	605a      	str	r2, [r3, #4]
    }
  }

  /* if required, configure MSB first on communication line */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
 800e35e:	687b      	ldr	r3, [r7, #4]
 800e360:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e362:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800e366:	2b00      	cmp	r3, #0
 800e368:	d00a      	beq.n	800e380 <UART_AdvFeatureConfig+0x138>
  {
    assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
 800e36a:	687b      	ldr	r3, [r7, #4]
 800e36c:	681b      	ldr	r3, [r3, #0]
 800e36e:	685b      	ldr	r3, [r3, #4]
 800e370:	f423 2100 	bic.w	r1, r3, #524288	@ 0x80000
 800e374:	687b      	ldr	r3, [r7, #4]
 800e376:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 800e378:	687b      	ldr	r3, [r7, #4]
 800e37a:	681b      	ldr	r3, [r3, #0]
 800e37c:	430a      	orrs	r2, r1
 800e37e:	605a      	str	r2, [r3, #4]
  }
}
 800e380:	bf00      	nop
 800e382:	370c      	adds	r7, #12
 800e384:	46bd      	mov	sp, r7
 800e386:	f85d 7b04 	ldr.w	r7, [sp], #4
 800e38a:	4770      	bx	lr

0800e38c <UART_CheckIdleState>:
  * @brief Check the UART Idle State.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
{
 800e38c:	b580      	push	{r7, lr}
 800e38e:	b098      	sub	sp, #96	@ 0x60
 800e390:	af02      	add	r7, sp, #8
 800e392:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;

  /* Initialize the UART ErrorCode */
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 800e394:	687b      	ldr	r3, [r7, #4]
 800e396:	2200      	movs	r2, #0
 800e398:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

  /* Init tickstart for timeout management */
  tickstart = HAL_GetTick();
 800e39c:	f7f6 fe52 	bl	8005044 <HAL_GetTick>
 800e3a0:	6578      	str	r0, [r7, #84]	@ 0x54

  /* Check if the Transmitter is enabled */
  if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
 800e3a2:	687b      	ldr	r3, [r7, #4]
 800e3a4:	681b      	ldr	r3, [r3, #0]
 800e3a6:	681b      	ldr	r3, [r3, #0]
 800e3a8:	f003 0308 	and.w	r3, r3, #8
 800e3ac:	2b08      	cmp	r3, #8
 800e3ae:	d12f      	bne.n	800e410 <UART_CheckIdleState+0x84>
  {
    /* Wait until TEACK flag is set */
    if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
 800e3b0:	f06f 437e 	mvn.w	r3, #4261412864	@ 0xfe000000
 800e3b4:	9300      	str	r3, [sp, #0]
 800e3b6:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800e3b8:	2200      	movs	r2, #0
 800e3ba:	f44f 1100 	mov.w	r1, #2097152	@ 0x200000
 800e3be:	6878      	ldr	r0, [r7, #4]
 800e3c0:	f000 f88e 	bl	800e4e0 <UART_WaitOnFlagUntilTimeout>
 800e3c4:	4603      	mov	r3, r0
 800e3c6:	2b00      	cmp	r3, #0
 800e3c8:	d022      	beq.n	800e410 <UART_CheckIdleState+0x84>
    {
      /* Disable TXE interrupt for the interrupt process */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE));
 800e3ca:	687b      	ldr	r3, [r7, #4]
 800e3cc:	681b      	ldr	r3, [r3, #0]
 800e3ce:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e3d0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e3d2:	e853 3f00 	ldrex	r3, [r3]
 800e3d6:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800e3d8:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800e3da:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800e3de:	653b      	str	r3, [r7, #80]	@ 0x50
 800e3e0:	687b      	ldr	r3, [r7, #4]
 800e3e2:	681b      	ldr	r3, [r3, #0]
 800e3e4:	461a      	mov	r2, r3
 800e3e6:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800e3e8:	647b      	str	r3, [r7, #68]	@ 0x44
 800e3ea:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e3ec:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800e3ee:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800e3f0:	e841 2300 	strex	r3, r2, [r1]
 800e3f4:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800e3f6:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e3f8:	2b00      	cmp	r3, #0
 800e3fa:	d1e6      	bne.n	800e3ca <UART_CheckIdleState+0x3e>

      huart->gState = HAL_UART_STATE_READY;
 800e3fc:	687b      	ldr	r3, [r7, #4]
 800e3fe:	2220      	movs	r2, #32
 800e400:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

      __HAL_UNLOCK(huart);
 800e404:	687b      	ldr	r3, [r7, #4]
 800e406:	2200      	movs	r2, #0
 800e408:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

      /* Timeout occurred */
      return HAL_TIMEOUT;
 800e40c:	2303      	movs	r3, #3
 800e40e:	e063      	b.n	800e4d8 <UART_CheckIdleState+0x14c>
    }
  }

  /* Check if the Receiver is enabled */
  if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
 800e410:	687b      	ldr	r3, [r7, #4]
 800e412:	681b      	ldr	r3, [r3, #0]
 800e414:	681b      	ldr	r3, [r3, #0]
 800e416:	f003 0304 	and.w	r3, r3, #4
 800e41a:	2b04      	cmp	r3, #4
 800e41c:	d149      	bne.n	800e4b2 <UART_CheckIdleState+0x126>
  {
    /* Wait until REACK flag is set */
    if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
 800e41e:	f06f 437e 	mvn.w	r3, #4261412864	@ 0xfe000000
 800e422:	9300      	str	r3, [sp, #0]
 800e424:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800e426:	2200      	movs	r2, #0
 800e428:	f44f 0180 	mov.w	r1, #4194304	@ 0x400000
 800e42c:	6878      	ldr	r0, [r7, #4]
 800e42e:	f000 f857 	bl	800e4e0 <UART_WaitOnFlagUntilTimeout>
 800e432:	4603      	mov	r3, r0
 800e434:	2b00      	cmp	r3, #0
 800e436:	d03c      	beq.n	800e4b2 <UART_CheckIdleState+0x126>
    {
      /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error)
      interrupts for the interrupt process */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800e438:	687b      	ldr	r3, [r7, #4]
 800e43a:	681b      	ldr	r3, [r3, #0]
 800e43c:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e43e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800e440:	e853 3f00 	ldrex	r3, [r3]
 800e444:	623b      	str	r3, [r7, #32]
   return(result);
 800e446:	6a3b      	ldr	r3, [r7, #32]
 800e448:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800e44c:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800e44e:	687b      	ldr	r3, [r7, #4]
 800e450:	681b      	ldr	r3, [r3, #0]
 800e452:	461a      	mov	r2, r3
 800e454:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800e456:	633b      	str	r3, [r7, #48]	@ 0x30
 800e458:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e45a:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800e45c:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800e45e:	e841 2300 	strex	r3, r2, [r1]
 800e462:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800e464:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e466:	2b00      	cmp	r3, #0
 800e468:	d1e6      	bne.n	800e438 <UART_CheckIdleState+0xac>
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800e46a:	687b      	ldr	r3, [r7, #4]
 800e46c:	681b      	ldr	r3, [r3, #0]
 800e46e:	3308      	adds	r3, #8
 800e470:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e472:	693b      	ldr	r3, [r7, #16]
 800e474:	e853 3f00 	ldrex	r3, [r3]
 800e478:	60fb      	str	r3, [r7, #12]
   return(result);
 800e47a:	68fb      	ldr	r3, [r7, #12]
 800e47c:	f023 0301 	bic.w	r3, r3, #1
 800e480:	64bb      	str	r3, [r7, #72]	@ 0x48
 800e482:	687b      	ldr	r3, [r7, #4]
 800e484:	681b      	ldr	r3, [r3, #0]
 800e486:	3308      	adds	r3, #8
 800e488:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800e48a:	61fa      	str	r2, [r7, #28]
 800e48c:	61bb      	str	r3, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e48e:	69b9      	ldr	r1, [r7, #24]
 800e490:	69fa      	ldr	r2, [r7, #28]
 800e492:	e841 2300 	strex	r3, r2, [r1]
 800e496:	617b      	str	r3, [r7, #20]
   return(result);
 800e498:	697b      	ldr	r3, [r7, #20]
 800e49a:	2b00      	cmp	r3, #0
 800e49c:	d1e5      	bne.n	800e46a <UART_CheckIdleState+0xde>

      huart->RxState = HAL_UART_STATE_READY;
 800e49e:	687b      	ldr	r3, [r7, #4]
 800e4a0:	2220      	movs	r2, #32
 800e4a2:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      __HAL_UNLOCK(huart);
 800e4a6:	687b      	ldr	r3, [r7, #4]
 800e4a8:	2200      	movs	r2, #0
 800e4aa:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

      /* Timeout occurred */
      return HAL_TIMEOUT;
 800e4ae:	2303      	movs	r3, #3
 800e4b0:	e012      	b.n	800e4d8 <UART_CheckIdleState+0x14c>
    }
  }

  /* Initialize the UART State */
  huart->gState = HAL_UART_STATE_READY;
 800e4b2:	687b      	ldr	r3, [r7, #4]
 800e4b4:	2220      	movs	r2, #32
 800e4b6:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
  huart->RxState = HAL_UART_STATE_READY;
 800e4ba:	687b      	ldr	r3, [r7, #4]
 800e4bc:	2220      	movs	r2, #32
 800e4be:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800e4c2:	687b      	ldr	r3, [r7, #4]
 800e4c4:	2200      	movs	r2, #0
 800e4c6:	66da      	str	r2, [r3, #108]	@ 0x6c
  huart->RxEventType = HAL_UART_RXEVENT_TC;
 800e4c8:	687b      	ldr	r3, [r7, #4]
 800e4ca:	2200      	movs	r2, #0
 800e4cc:	671a      	str	r2, [r3, #112]	@ 0x70

  __HAL_UNLOCK(huart);
 800e4ce:	687b      	ldr	r3, [r7, #4]
 800e4d0:	2200      	movs	r2, #0
 800e4d2:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 800e4d6:	2300      	movs	r3, #0
}
 800e4d8:	4618      	mov	r0, r3
 800e4da:	3758      	adds	r7, #88	@ 0x58
 800e4dc:	46bd      	mov	sp, r7
 800e4de:	bd80      	pop	{r7, pc}

0800e4e0 <UART_WaitOnFlagUntilTimeout>:
  * @param Timeout   Timeout duration
  * @retval HAL status
  */
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
                                              uint32_t Tickstart, uint32_t Timeout)
{
 800e4e0:	b580      	push	{r7, lr}
 800e4e2:	b084      	sub	sp, #16
 800e4e4:	af00      	add	r7, sp, #0
 800e4e6:	60f8      	str	r0, [r7, #12]
 800e4e8:	60b9      	str	r1, [r7, #8]
 800e4ea:	603b      	str	r3, [r7, #0]
 800e4ec:	4613      	mov	r3, r2
 800e4ee:	71fb      	strb	r3, [r7, #7]
  /* Wait until flag is set */
  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
 800e4f0:	e04f      	b.n	800e592 <UART_WaitOnFlagUntilTimeout+0xb2>
  {
    /* Check for the Timeout */
    if (Timeout != HAL_MAX_DELAY)
 800e4f2:	69bb      	ldr	r3, [r7, #24]
 800e4f4:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 800e4f8:	d04b      	beq.n	800e592 <UART_WaitOnFlagUntilTimeout+0xb2>
    {
      if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
 800e4fa:	f7f6 fda3 	bl	8005044 <HAL_GetTick>
 800e4fe:	4602      	mov	r2, r0
 800e500:	683b      	ldr	r3, [r7, #0]
 800e502:	1ad3      	subs	r3, r2, r3
 800e504:	69ba      	ldr	r2, [r7, #24]
 800e506:	429a      	cmp	r2, r3
 800e508:	d302      	bcc.n	800e510 <UART_WaitOnFlagUntilTimeout+0x30>
 800e50a:	69bb      	ldr	r3, [r7, #24]
 800e50c:	2b00      	cmp	r3, #0
 800e50e:	d101      	bne.n	800e514 <UART_WaitOnFlagUntilTimeout+0x34>
      {

        return HAL_TIMEOUT;
 800e510:	2303      	movs	r3, #3
 800e512:	e04e      	b.n	800e5b2 <UART_WaitOnFlagUntilTimeout+0xd2>
      }

      if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
 800e514:	68fb      	ldr	r3, [r7, #12]
 800e516:	681b      	ldr	r3, [r3, #0]
 800e518:	681b      	ldr	r3, [r3, #0]
 800e51a:	f003 0304 	and.w	r3, r3, #4
 800e51e:	2b00      	cmp	r3, #0
 800e520:	d037      	beq.n	800e592 <UART_WaitOnFlagUntilTimeout+0xb2>
 800e522:	68bb      	ldr	r3, [r7, #8]
 800e524:	2b80      	cmp	r3, #128	@ 0x80
 800e526:	d034      	beq.n	800e592 <UART_WaitOnFlagUntilTimeout+0xb2>
 800e528:	68bb      	ldr	r3, [r7, #8]
 800e52a:	2b40      	cmp	r3, #64	@ 0x40
 800e52c:	d031      	beq.n	800e592 <UART_WaitOnFlagUntilTimeout+0xb2>
      {
        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
 800e52e:	68fb      	ldr	r3, [r7, #12]
 800e530:	681b      	ldr	r3, [r3, #0]
 800e532:	69db      	ldr	r3, [r3, #28]
 800e534:	f003 0308 	and.w	r3, r3, #8
 800e538:	2b08      	cmp	r3, #8
 800e53a:	d110      	bne.n	800e55e <UART_WaitOnFlagUntilTimeout+0x7e>
        {
          /* Clear Overrun Error flag*/
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
 800e53c:	68fb      	ldr	r3, [r7, #12]
 800e53e:	681b      	ldr	r3, [r3, #0]
 800e540:	2208      	movs	r2, #8
 800e542:	621a      	str	r2, [r3, #32]

          /* Blocking error : transfer is aborted
          Set the UART state ready to be able to start again the process,
          Disable Rx Interrupts if ongoing */
          UART_EndRxTransfer(huart);
 800e544:	68f8      	ldr	r0, [r7, #12]
 800e546:	f000 f95b 	bl	800e800 <UART_EndRxTransfer>

          huart->ErrorCode = HAL_UART_ERROR_ORE;
 800e54a:	68fb      	ldr	r3, [r7, #12]
 800e54c:	2208      	movs	r2, #8
 800e54e:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

          /* Process Unlocked */
          __HAL_UNLOCK(huart);
 800e552:	68fb      	ldr	r3, [r7, #12]
 800e554:	2200      	movs	r2, #0
 800e556:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

          return HAL_ERROR;
 800e55a:	2301      	movs	r3, #1
 800e55c:	e029      	b.n	800e5b2 <UART_WaitOnFlagUntilTimeout+0xd2>
        }
        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
 800e55e:	68fb      	ldr	r3, [r7, #12]
 800e560:	681b      	ldr	r3, [r3, #0]
 800e562:	69db      	ldr	r3, [r3, #28]
 800e564:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 800e568:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800e56c:	d111      	bne.n	800e592 <UART_WaitOnFlagUntilTimeout+0xb2>
        {
          /* Clear Receiver Timeout flag*/
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
 800e56e:	68fb      	ldr	r3, [r7, #12]
 800e570:	681b      	ldr	r3, [r3, #0]
 800e572:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 800e576:	621a      	str	r2, [r3, #32]

          /* Blocking error : transfer is aborted
          Set the UART state ready to be able to start again the process,
          Disable Rx Interrupts if ongoing */
          UART_EndRxTransfer(huart);
 800e578:	68f8      	ldr	r0, [r7, #12]
 800e57a:	f000 f941 	bl	800e800 <UART_EndRxTransfer>

          huart->ErrorCode = HAL_UART_ERROR_RTO;
 800e57e:	68fb      	ldr	r3, [r7, #12]
 800e580:	2220      	movs	r2, #32
 800e582:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

          /* Process Unlocked */
          __HAL_UNLOCK(huart);
 800e586:	68fb      	ldr	r3, [r7, #12]
 800e588:	2200      	movs	r2, #0
 800e58a:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

          return HAL_TIMEOUT;
 800e58e:	2303      	movs	r3, #3
 800e590:	e00f      	b.n	800e5b2 <UART_WaitOnFlagUntilTimeout+0xd2>
  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
 800e592:	68fb      	ldr	r3, [r7, #12]
 800e594:	681b      	ldr	r3, [r3, #0]
 800e596:	69da      	ldr	r2, [r3, #28]
 800e598:	68bb      	ldr	r3, [r7, #8]
 800e59a:	4013      	ands	r3, r2
 800e59c:	68ba      	ldr	r2, [r7, #8]
 800e59e:	429a      	cmp	r2, r3
 800e5a0:	bf0c      	ite	eq
 800e5a2:	2301      	moveq	r3, #1
 800e5a4:	2300      	movne	r3, #0
 800e5a6:	b2db      	uxtb	r3, r3
 800e5a8:	461a      	mov	r2, r3
 800e5aa:	79fb      	ldrb	r3, [r7, #7]
 800e5ac:	429a      	cmp	r2, r3
 800e5ae:	d0a0      	beq.n	800e4f2 <UART_WaitOnFlagUntilTimeout+0x12>
        }
      }
    }
  }
  return HAL_OK;
 800e5b0:	2300      	movs	r3, #0
}
 800e5b2:	4618      	mov	r0, r3
 800e5b4:	3710      	adds	r7, #16
 800e5b6:	46bd      	mov	sp, r7
 800e5b8:	bd80      	pop	{r7, pc}
	...

0800e5bc <UART_Start_Receive_IT>:
  * @param  pData Pointer to data buffer (u8 or u16 data elements).
  * @param  Size  Amount of data elements (u8 or u16) to be received.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
{
 800e5bc:	b480      	push	{r7}
 800e5be:	b0a3      	sub	sp, #140	@ 0x8c
 800e5c0:	af00      	add	r7, sp, #0
 800e5c2:	60f8      	str	r0, [r7, #12]
 800e5c4:	60b9      	str	r1, [r7, #8]
 800e5c6:	4613      	mov	r3, r2
 800e5c8:	80fb      	strh	r3, [r7, #6]
  huart->pRxBuffPtr  = pData;
 800e5ca:	68fb      	ldr	r3, [r7, #12]
 800e5cc:	68ba      	ldr	r2, [r7, #8]
 800e5ce:	659a      	str	r2, [r3, #88]	@ 0x58
  huart->RxXferSize  = Size;
 800e5d0:	68fb      	ldr	r3, [r7, #12]
 800e5d2:	88fa      	ldrh	r2, [r7, #6]
 800e5d4:	f8a3 205c 	strh.w	r2, [r3, #92]	@ 0x5c
  huart->RxXferCount = Size;
 800e5d8:	68fb      	ldr	r3, [r7, #12]
 800e5da:	88fa      	ldrh	r2, [r7, #6]
 800e5dc:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
  huart->RxISR       = NULL;
 800e5e0:	68fb      	ldr	r3, [r7, #12]
 800e5e2:	2200      	movs	r2, #0
 800e5e4:	675a      	str	r2, [r3, #116]	@ 0x74

  /* Computation of UART mask to apply to RDR register */
  UART_MASK_COMPUTATION(huart);
 800e5e6:	68fb      	ldr	r3, [r7, #12]
 800e5e8:	689b      	ldr	r3, [r3, #8]
 800e5ea:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800e5ee:	d10e      	bne.n	800e60e <UART_Start_Receive_IT+0x52>
 800e5f0:	68fb      	ldr	r3, [r7, #12]
 800e5f2:	691b      	ldr	r3, [r3, #16]
 800e5f4:	2b00      	cmp	r3, #0
 800e5f6:	d105      	bne.n	800e604 <UART_Start_Receive_IT+0x48>
 800e5f8:	68fb      	ldr	r3, [r7, #12]
 800e5fa:	f240 12ff 	movw	r2, #511	@ 0x1ff
 800e5fe:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800e602:	e02d      	b.n	800e660 <UART_Start_Receive_IT+0xa4>
 800e604:	68fb      	ldr	r3, [r7, #12]
 800e606:	22ff      	movs	r2, #255	@ 0xff
 800e608:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800e60c:	e028      	b.n	800e660 <UART_Start_Receive_IT+0xa4>
 800e60e:	68fb      	ldr	r3, [r7, #12]
 800e610:	689b      	ldr	r3, [r3, #8]
 800e612:	2b00      	cmp	r3, #0
 800e614:	d10d      	bne.n	800e632 <UART_Start_Receive_IT+0x76>
 800e616:	68fb      	ldr	r3, [r7, #12]
 800e618:	691b      	ldr	r3, [r3, #16]
 800e61a:	2b00      	cmp	r3, #0
 800e61c:	d104      	bne.n	800e628 <UART_Start_Receive_IT+0x6c>
 800e61e:	68fb      	ldr	r3, [r7, #12]
 800e620:	22ff      	movs	r2, #255	@ 0xff
 800e622:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800e626:	e01b      	b.n	800e660 <UART_Start_Receive_IT+0xa4>
 800e628:	68fb      	ldr	r3, [r7, #12]
 800e62a:	227f      	movs	r2, #127	@ 0x7f
 800e62c:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800e630:	e016      	b.n	800e660 <UART_Start_Receive_IT+0xa4>
 800e632:	68fb      	ldr	r3, [r7, #12]
 800e634:	689b      	ldr	r3, [r3, #8]
 800e636:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800e63a:	d10d      	bne.n	800e658 <UART_Start_Receive_IT+0x9c>
 800e63c:	68fb      	ldr	r3, [r7, #12]
 800e63e:	691b      	ldr	r3, [r3, #16]
 800e640:	2b00      	cmp	r3, #0
 800e642:	d104      	bne.n	800e64e <UART_Start_Receive_IT+0x92>
 800e644:	68fb      	ldr	r3, [r7, #12]
 800e646:	227f      	movs	r2, #127	@ 0x7f
 800e648:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800e64c:	e008      	b.n	800e660 <UART_Start_Receive_IT+0xa4>
 800e64e:	68fb      	ldr	r3, [r7, #12]
 800e650:	223f      	movs	r2, #63	@ 0x3f
 800e652:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800e656:	e003      	b.n	800e660 <UART_Start_Receive_IT+0xa4>
 800e658:	68fb      	ldr	r3, [r7, #12]
 800e65a:	2200      	movs	r2, #0
 800e65c:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60

  huart->ErrorCode = HAL_UART_ERROR_NONE;
 800e660:	68fb      	ldr	r3, [r7, #12]
 800e662:	2200      	movs	r2, #0
 800e664:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  huart->RxState = HAL_UART_STATE_BUSY_RX;
 800e668:	68fb      	ldr	r3, [r7, #12]
 800e66a:	2222      	movs	r2, #34	@ 0x22
 800e66c:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

  /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
  ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800e670:	68fb      	ldr	r3, [r7, #12]
 800e672:	681b      	ldr	r3, [r3, #0]
 800e674:	3308      	adds	r3, #8
 800e676:	667b      	str	r3, [r7, #100]	@ 0x64
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e678:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800e67a:	e853 3f00 	ldrex	r3, [r3]
 800e67e:	663b      	str	r3, [r7, #96]	@ 0x60
   return(result);
 800e680:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800e682:	f043 0301 	orr.w	r3, r3, #1
 800e686:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800e68a:	68fb      	ldr	r3, [r7, #12]
 800e68c:	681b      	ldr	r3, [r3, #0]
 800e68e:	3308      	adds	r3, #8
 800e690:	f8d7 2084 	ldr.w	r2, [r7, #132]	@ 0x84
 800e694:	673a      	str	r2, [r7, #112]	@ 0x70
 800e696:	66fb      	str	r3, [r7, #108]	@ 0x6c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e698:	6ef9      	ldr	r1, [r7, #108]	@ 0x6c
 800e69a:	6f3a      	ldr	r2, [r7, #112]	@ 0x70
 800e69c:	e841 2300 	strex	r3, r2, [r1]
 800e6a0:	66bb      	str	r3, [r7, #104]	@ 0x68
   return(result);
 800e6a2:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800e6a4:	2b00      	cmp	r3, #0
 800e6a6:	d1e3      	bne.n	800e670 <UART_Start_Receive_IT+0xb4>

  /* Configure Rx interrupt processing */
  if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
 800e6a8:	68fb      	ldr	r3, [r7, #12]
 800e6aa:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800e6ac:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800e6b0:	d14f      	bne.n	800e752 <UART_Start_Receive_IT+0x196>
 800e6b2:	68fb      	ldr	r3, [r7, #12]
 800e6b4:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800e6b8:	88fa      	ldrh	r2, [r7, #6]
 800e6ba:	429a      	cmp	r2, r3
 800e6bc:	d349      	bcc.n	800e752 <UART_Start_Receive_IT+0x196>
  {
    /* Set the Rx ISR function pointer according to the data word length */
    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800e6be:	68fb      	ldr	r3, [r7, #12]
 800e6c0:	689b      	ldr	r3, [r3, #8]
 800e6c2:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800e6c6:	d107      	bne.n	800e6d8 <UART_Start_Receive_IT+0x11c>
 800e6c8:	68fb      	ldr	r3, [r7, #12]
 800e6ca:	691b      	ldr	r3, [r3, #16]
 800e6cc:	2b00      	cmp	r3, #0
 800e6ce:	d103      	bne.n	800e6d8 <UART_Start_Receive_IT+0x11c>
    {
      huart->RxISR = UART_RxISR_16BIT_FIFOEN;
 800e6d0:	68fb      	ldr	r3, [r7, #12]
 800e6d2:	4a47      	ldr	r2, [pc, #284]	@ (800e7f0 <UART_Start_Receive_IT+0x234>)
 800e6d4:	675a      	str	r2, [r3, #116]	@ 0x74
 800e6d6:	e002      	b.n	800e6de <UART_Start_Receive_IT+0x122>
    }
    else
    {
      huart->RxISR = UART_RxISR_8BIT_FIFOEN;
 800e6d8:	68fb      	ldr	r3, [r7, #12]
 800e6da:	4a46      	ldr	r2, [pc, #280]	@ (800e7f4 <UART_Start_Receive_IT+0x238>)
 800e6dc:	675a      	str	r2, [r3, #116]	@ 0x74
    }

    /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
    if (huart->Init.Parity != UART_PARITY_NONE)
 800e6de:	68fb      	ldr	r3, [r7, #12]
 800e6e0:	691b      	ldr	r3, [r3, #16]
 800e6e2:	2b00      	cmp	r3, #0
 800e6e4:	d01a      	beq.n	800e71c <UART_Start_Receive_IT+0x160>
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800e6e6:	68fb      	ldr	r3, [r7, #12]
 800e6e8:	681b      	ldr	r3, [r3, #0]
 800e6ea:	653b      	str	r3, [r7, #80]	@ 0x50
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e6ec:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800e6ee:	e853 3f00 	ldrex	r3, [r3]
 800e6f2:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800e6f4:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800e6f6:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800e6fa:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800e6fe:	68fb      	ldr	r3, [r7, #12]
 800e700:	681b      	ldr	r3, [r3, #0]
 800e702:	461a      	mov	r2, r3
 800e704:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 800e708:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800e70a:	65ba      	str	r2, [r7, #88]	@ 0x58
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e70c:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 800e70e:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 800e710:	e841 2300 	strex	r3, r2, [r1]
 800e714:	657b      	str	r3, [r7, #84]	@ 0x54
   return(result);
 800e716:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800e718:	2b00      	cmp	r3, #0
 800e71a:	d1e4      	bne.n	800e6e6 <UART_Start_Receive_IT+0x12a>
    }
    ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 800e71c:	68fb      	ldr	r3, [r7, #12]
 800e71e:	681b      	ldr	r3, [r3, #0]
 800e720:	3308      	adds	r3, #8
 800e722:	63fb      	str	r3, [r7, #60]	@ 0x3c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e724:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e726:	e853 3f00 	ldrex	r3, [r3]
 800e72a:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800e72c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e72e:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
 800e732:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800e734:	68fb      	ldr	r3, [r7, #12]
 800e736:	681b      	ldr	r3, [r3, #0]
 800e738:	3308      	adds	r3, #8
 800e73a:	6ffa      	ldr	r2, [r7, #124]	@ 0x7c
 800e73c:	64ba      	str	r2, [r7, #72]	@ 0x48
 800e73e:	647b      	str	r3, [r7, #68]	@ 0x44
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e740:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800e742:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800e744:	e841 2300 	strex	r3, r2, [r1]
 800e748:	643b      	str	r3, [r7, #64]	@ 0x40
   return(result);
 800e74a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800e74c:	2b00      	cmp	r3, #0
 800e74e:	d1e5      	bne.n	800e71c <UART_Start_Receive_IT+0x160>
 800e750:	e046      	b.n	800e7e0 <UART_Start_Receive_IT+0x224>
  }
  else
  {
    /* Set the Rx ISR function pointer according to the data word length */
    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800e752:	68fb      	ldr	r3, [r7, #12]
 800e754:	689b      	ldr	r3, [r3, #8]
 800e756:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800e75a:	d107      	bne.n	800e76c <UART_Start_Receive_IT+0x1b0>
 800e75c:	68fb      	ldr	r3, [r7, #12]
 800e75e:	691b      	ldr	r3, [r3, #16]
 800e760:	2b00      	cmp	r3, #0
 800e762:	d103      	bne.n	800e76c <UART_Start_Receive_IT+0x1b0>
    {
      huart->RxISR = UART_RxISR_16BIT;
 800e764:	68fb      	ldr	r3, [r7, #12]
 800e766:	4a24      	ldr	r2, [pc, #144]	@ (800e7f8 <UART_Start_Receive_IT+0x23c>)
 800e768:	675a      	str	r2, [r3, #116]	@ 0x74
 800e76a:	e002      	b.n	800e772 <UART_Start_Receive_IT+0x1b6>
    }
    else
    {
      huart->RxISR = UART_RxISR_8BIT;
 800e76c:	68fb      	ldr	r3, [r7, #12]
 800e76e:	4a23      	ldr	r2, [pc, #140]	@ (800e7fc <UART_Start_Receive_IT+0x240>)
 800e770:	675a      	str	r2, [r3, #116]	@ 0x74
    }

    /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
    if (huart->Init.Parity != UART_PARITY_NONE)
 800e772:	68fb      	ldr	r3, [r7, #12]
 800e774:	691b      	ldr	r3, [r3, #16]
 800e776:	2b00      	cmp	r3, #0
 800e778:	d019      	beq.n	800e7ae <UART_Start_Receive_IT+0x1f2>
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
 800e77a:	68fb      	ldr	r3, [r7, #12]
 800e77c:	681b      	ldr	r3, [r3, #0]
 800e77e:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e780:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e782:	e853 3f00 	ldrex	r3, [r3]
 800e786:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800e788:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800e78a:	f443 7390 	orr.w	r3, r3, #288	@ 0x120
 800e78e:	677b      	str	r3, [r7, #116]	@ 0x74
 800e790:	68fb      	ldr	r3, [r7, #12]
 800e792:	681b      	ldr	r3, [r3, #0]
 800e794:	461a      	mov	r2, r3
 800e796:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800e798:	637b      	str	r3, [r7, #52]	@ 0x34
 800e79a:	633a      	str	r2, [r7, #48]	@ 0x30
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e79c:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 800e79e:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800e7a0:	e841 2300 	strex	r3, r2, [r1]
 800e7a4:	62fb      	str	r3, [r7, #44]	@ 0x2c
   return(result);
 800e7a6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800e7a8:	2b00      	cmp	r3, #0
 800e7aa:	d1e6      	bne.n	800e77a <UART_Start_Receive_IT+0x1be>
 800e7ac:	e018      	b.n	800e7e0 <UART_Start_Receive_IT+0x224>
    }
    else
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 800e7ae:	68fb      	ldr	r3, [r7, #12]
 800e7b0:	681b      	ldr	r3, [r3, #0]
 800e7b2:	617b      	str	r3, [r7, #20]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e7b4:	697b      	ldr	r3, [r7, #20]
 800e7b6:	e853 3f00 	ldrex	r3, [r3]
 800e7ba:	613b      	str	r3, [r7, #16]
   return(result);
 800e7bc:	693b      	ldr	r3, [r7, #16]
 800e7be:	f043 0320 	orr.w	r3, r3, #32
 800e7c2:	67bb      	str	r3, [r7, #120]	@ 0x78
 800e7c4:	68fb      	ldr	r3, [r7, #12]
 800e7c6:	681b      	ldr	r3, [r3, #0]
 800e7c8:	461a      	mov	r2, r3
 800e7ca:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800e7cc:	623b      	str	r3, [r7, #32]
 800e7ce:	61fa      	str	r2, [r7, #28]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e7d0:	69f9      	ldr	r1, [r7, #28]
 800e7d2:	6a3a      	ldr	r2, [r7, #32]
 800e7d4:	e841 2300 	strex	r3, r2, [r1]
 800e7d8:	61bb      	str	r3, [r7, #24]
   return(result);
 800e7da:	69bb      	ldr	r3, [r7, #24]
 800e7dc:	2b00      	cmp	r3, #0
 800e7de:	d1e6      	bne.n	800e7ae <UART_Start_Receive_IT+0x1f2>
    }
  }
  return HAL_OK;
 800e7e0:	2300      	movs	r3, #0
}
 800e7e2:	4618      	mov	r0, r3
 800e7e4:	378c      	adds	r7, #140	@ 0x8c
 800e7e6:	46bd      	mov	sp, r7
 800e7e8:	f85d 7b04 	ldr.w	r7, [sp], #4
 800e7ec:	4770      	bx	lr
 800e7ee:	bf00      	nop
 800e7f0:	0800f365 	.word	0x0800f365
 800e7f4:	0800f005 	.word	0x0800f005
 800e7f8:	0800ee4d 	.word	0x0800ee4d
 800e7fc:	0800ec95 	.word	0x0800ec95

0800e800 <UART_EndRxTransfer>:
  * @brief  End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
  * @param  huart UART handle.
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
 800e800:	b480      	push	{r7}
 800e802:	b095      	sub	sp, #84	@ 0x54
 800e804:	af00      	add	r7, sp, #0
 800e806:	6078      	str	r0, [r7, #4]
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800e808:	687b      	ldr	r3, [r7, #4]
 800e80a:	681b      	ldr	r3, [r3, #0]
 800e80c:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e80e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800e810:	e853 3f00 	ldrex	r3, [r3]
 800e814:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800e816:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800e818:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800e81c:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800e81e:	687b      	ldr	r3, [r7, #4]
 800e820:	681b      	ldr	r3, [r3, #0]
 800e822:	461a      	mov	r2, r3
 800e824:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800e826:	643b      	str	r3, [r7, #64]	@ 0x40
 800e828:	63fa      	str	r2, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e82a:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800e82c:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800e82e:	e841 2300 	strex	r3, r2, [r1]
 800e832:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800e834:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e836:	2b00      	cmp	r3, #0
 800e838:	d1e6      	bne.n	800e808 <UART_EndRxTransfer+0x8>
  ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800e83a:	687b      	ldr	r3, [r7, #4]
 800e83c:	681b      	ldr	r3, [r3, #0]
 800e83e:	3308      	adds	r3, #8
 800e840:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e842:	6a3b      	ldr	r3, [r7, #32]
 800e844:	e853 3f00 	ldrex	r3, [r3]
 800e848:	61fb      	str	r3, [r7, #28]
   return(result);
 800e84a:	69fa      	ldr	r2, [r7, #28]
 800e84c:	4b1e      	ldr	r3, [pc, #120]	@ (800e8c8 <UART_EndRxTransfer+0xc8>)
 800e84e:	4013      	ands	r3, r2
 800e850:	64bb      	str	r3, [r7, #72]	@ 0x48
 800e852:	687b      	ldr	r3, [r7, #4]
 800e854:	681b      	ldr	r3, [r3, #0]
 800e856:	3308      	adds	r3, #8
 800e858:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800e85a:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800e85c:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e85e:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800e860:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800e862:	e841 2300 	strex	r3, r2, [r1]
 800e866:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800e868:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800e86a:	2b00      	cmp	r3, #0
 800e86c:	d1e5      	bne.n	800e83a <UART_EndRxTransfer+0x3a>

  /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800e86e:	687b      	ldr	r3, [r7, #4]
 800e870:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800e872:	2b01      	cmp	r3, #1
 800e874:	d118      	bne.n	800e8a8 <UART_EndRxTransfer+0xa8>
  {
    ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800e876:	687b      	ldr	r3, [r7, #4]
 800e878:	681b      	ldr	r3, [r3, #0]
 800e87a:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e87c:	68fb      	ldr	r3, [r7, #12]
 800e87e:	e853 3f00 	ldrex	r3, [r3]
 800e882:	60bb      	str	r3, [r7, #8]
   return(result);
 800e884:	68bb      	ldr	r3, [r7, #8]
 800e886:	f023 0310 	bic.w	r3, r3, #16
 800e88a:	647b      	str	r3, [r7, #68]	@ 0x44
 800e88c:	687b      	ldr	r3, [r7, #4]
 800e88e:	681b      	ldr	r3, [r3, #0]
 800e890:	461a      	mov	r2, r3
 800e892:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800e894:	61bb      	str	r3, [r7, #24]
 800e896:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e898:	6979      	ldr	r1, [r7, #20]
 800e89a:	69ba      	ldr	r2, [r7, #24]
 800e89c:	e841 2300 	strex	r3, r2, [r1]
 800e8a0:	613b      	str	r3, [r7, #16]
   return(result);
 800e8a2:	693b      	ldr	r3, [r7, #16]
 800e8a4:	2b00      	cmp	r3, #0
 800e8a6:	d1e6      	bne.n	800e876 <UART_EndRxTransfer+0x76>
  }

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 800e8a8:	687b      	ldr	r3, [r7, #4]
 800e8aa:	2220      	movs	r2, #32
 800e8ac:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800e8b0:	687b      	ldr	r3, [r7, #4]
 800e8b2:	2200      	movs	r2, #0
 800e8b4:	66da      	str	r2, [r3, #108]	@ 0x6c

  /* Reset RxIsr function pointer */
  huart->RxISR = NULL;
 800e8b6:	687b      	ldr	r3, [r7, #4]
 800e8b8:	2200      	movs	r2, #0
 800e8ba:	675a      	str	r2, [r3, #116]	@ 0x74
}
 800e8bc:	bf00      	nop
 800e8be:	3754      	adds	r7, #84	@ 0x54
 800e8c0:	46bd      	mov	sp, r7
 800e8c2:	f85d 7b04 	ldr.w	r7, [sp], #4
 800e8c6:	4770      	bx	lr
 800e8c8:	effffffe 	.word	0xeffffffe

0800e8cc <UART_DMAAbortOnError>:
  *         (To be called at end of DMA Abort procedure following error occurrence).
  * @param  hdma DMA handle.
  * @retval None
  */
static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
{
 800e8cc:	b580      	push	{r7, lr}
 800e8ce:	b084      	sub	sp, #16
 800e8d0:	af00      	add	r7, sp, #0
 800e8d2:	6078      	str	r0, [r7, #4]
  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
 800e8d4:	687b      	ldr	r3, [r7, #4]
 800e8d6:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800e8d8:	60fb      	str	r3, [r7, #12]
  huart->RxXferCount = 0U;
 800e8da:	68fb      	ldr	r3, [r7, #12]
 800e8dc:	2200      	movs	r2, #0
 800e8de:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
  huart->TxXferCount = 0U;
 800e8e2:	68fb      	ldr	r3, [r7, #12]
 800e8e4:	2200      	movs	r2, #0
 800e8e6:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
  /*Call registered error callback*/
  huart->ErrorCallback(huart);
#else
  /*Call legacy weak error callback*/
  HAL_UART_ErrorCallback(huart);
 800e8ea:	68f8      	ldr	r0, [r7, #12]
 800e8ec:	f7fe ff3a 	bl	800d764 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
 800e8f0:	bf00      	nop
 800e8f2:	3710      	adds	r7, #16
 800e8f4:	46bd      	mov	sp, r7
 800e8f6:	bd80      	pop	{r7, pc}

0800e8f8 <UART_TxISR_8BIT>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
{
 800e8f8:	b480      	push	{r7}
 800e8fa:	b08f      	sub	sp, #60	@ 0x3c
 800e8fc:	af00      	add	r7, sp, #0
 800e8fe:	6078      	str	r0, [r7, #4]
  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800e900:	687b      	ldr	r3, [r7, #4]
 800e902:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800e906:	2b21      	cmp	r3, #33	@ 0x21
 800e908:	d14c      	bne.n	800e9a4 <UART_TxISR_8BIT+0xac>
  {
    if (huart->TxXferCount == 0U)
 800e90a:	687b      	ldr	r3, [r7, #4]
 800e90c:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800e910:	b29b      	uxth	r3, r3
 800e912:	2b00      	cmp	r3, #0
 800e914:	d132      	bne.n	800e97c <UART_TxISR_8BIT+0x84>
    {
      /* Disable the UART Transmit Data Register Empty Interrupt */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800e916:	687b      	ldr	r3, [r7, #4]
 800e918:	681b      	ldr	r3, [r3, #0]
 800e91a:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e91c:	6a3b      	ldr	r3, [r7, #32]
 800e91e:	e853 3f00 	ldrex	r3, [r3]
 800e922:	61fb      	str	r3, [r7, #28]
   return(result);
 800e924:	69fb      	ldr	r3, [r7, #28]
 800e926:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800e92a:	637b      	str	r3, [r7, #52]	@ 0x34
 800e92c:	687b      	ldr	r3, [r7, #4]
 800e92e:	681b      	ldr	r3, [r3, #0]
 800e930:	461a      	mov	r2, r3
 800e932:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800e934:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800e936:	62ba      	str	r2, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e938:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800e93a:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800e93c:	e841 2300 	strex	r3, r2, [r1]
 800e940:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800e942:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800e944:	2b00      	cmp	r3, #0
 800e946:	d1e6      	bne.n	800e916 <UART_TxISR_8BIT+0x1e>

      /* Enable the UART Transmit Complete Interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800e948:	687b      	ldr	r3, [r7, #4]
 800e94a:	681b      	ldr	r3, [r3, #0]
 800e94c:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e94e:	68fb      	ldr	r3, [r7, #12]
 800e950:	e853 3f00 	ldrex	r3, [r3]
 800e954:	60bb      	str	r3, [r7, #8]
   return(result);
 800e956:	68bb      	ldr	r3, [r7, #8]
 800e958:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800e95c:	633b      	str	r3, [r7, #48]	@ 0x30
 800e95e:	687b      	ldr	r3, [r7, #4]
 800e960:	681b      	ldr	r3, [r3, #0]
 800e962:	461a      	mov	r2, r3
 800e964:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800e966:	61bb      	str	r3, [r7, #24]
 800e968:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e96a:	6979      	ldr	r1, [r7, #20]
 800e96c:	69ba      	ldr	r2, [r7, #24]
 800e96e:	e841 2300 	strex	r3, r2, [r1]
 800e972:	613b      	str	r3, [r7, #16]
   return(result);
 800e974:	693b      	ldr	r3, [r7, #16]
 800e976:	2b00      	cmp	r3, #0
 800e978:	d1e6      	bne.n	800e948 <UART_TxISR_8BIT+0x50>
      huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
      huart->pTxBuffPtr++;
      huart->TxXferCount--;
    }
  }
}
 800e97a:	e013      	b.n	800e9a4 <UART_TxISR_8BIT+0xac>
      huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
 800e97c:	687b      	ldr	r3, [r7, #4]
 800e97e:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800e980:	781a      	ldrb	r2, [r3, #0]
 800e982:	687b      	ldr	r3, [r7, #4]
 800e984:	681b      	ldr	r3, [r3, #0]
 800e986:	629a      	str	r2, [r3, #40]	@ 0x28
      huart->pTxBuffPtr++;
 800e988:	687b      	ldr	r3, [r7, #4]
 800e98a:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800e98c:	1c5a      	adds	r2, r3, #1
 800e98e:	687b      	ldr	r3, [r7, #4]
 800e990:	651a      	str	r2, [r3, #80]	@ 0x50
      huart->TxXferCount--;
 800e992:	687b      	ldr	r3, [r7, #4]
 800e994:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800e998:	b29b      	uxth	r3, r3
 800e99a:	3b01      	subs	r3, #1
 800e99c:	b29a      	uxth	r2, r3
 800e99e:	687b      	ldr	r3, [r7, #4]
 800e9a0:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
}
 800e9a4:	bf00      	nop
 800e9a6:	373c      	adds	r7, #60	@ 0x3c
 800e9a8:	46bd      	mov	sp, r7
 800e9aa:	f85d 7b04 	ldr.w	r7, [sp], #4
 800e9ae:	4770      	bx	lr

0800e9b0 <UART_TxISR_16BIT>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
{
 800e9b0:	b480      	push	{r7}
 800e9b2:	b091      	sub	sp, #68	@ 0x44
 800e9b4:	af00      	add	r7, sp, #0
 800e9b6:	6078      	str	r0, [r7, #4]
  const uint16_t *tmp;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800e9b8:	687b      	ldr	r3, [r7, #4]
 800e9ba:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800e9be:	2b21      	cmp	r3, #33	@ 0x21
 800e9c0:	d151      	bne.n	800ea66 <UART_TxISR_16BIT+0xb6>
  {
    if (huart->TxXferCount == 0U)
 800e9c2:	687b      	ldr	r3, [r7, #4]
 800e9c4:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800e9c8:	b29b      	uxth	r3, r3
 800e9ca:	2b00      	cmp	r3, #0
 800e9cc:	d132      	bne.n	800ea34 <UART_TxISR_16BIT+0x84>
    {
      /* Disable the UART Transmit Data Register Empty Interrupt */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800e9ce:	687b      	ldr	r3, [r7, #4]
 800e9d0:	681b      	ldr	r3, [r3, #0]
 800e9d2:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e9d4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800e9d6:	e853 3f00 	ldrex	r3, [r3]
 800e9da:	623b      	str	r3, [r7, #32]
   return(result);
 800e9dc:	6a3b      	ldr	r3, [r7, #32]
 800e9de:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800e9e2:	63bb      	str	r3, [r7, #56]	@ 0x38
 800e9e4:	687b      	ldr	r3, [r7, #4]
 800e9e6:	681b      	ldr	r3, [r3, #0]
 800e9e8:	461a      	mov	r2, r3
 800e9ea:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e9ec:	633b      	str	r3, [r7, #48]	@ 0x30
 800e9ee:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e9f0:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800e9f2:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800e9f4:	e841 2300 	strex	r3, r2, [r1]
 800e9f8:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800e9fa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e9fc:	2b00      	cmp	r3, #0
 800e9fe:	d1e6      	bne.n	800e9ce <UART_TxISR_16BIT+0x1e>

      /* Enable the UART Transmit Complete Interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800ea00:	687b      	ldr	r3, [r7, #4]
 800ea02:	681b      	ldr	r3, [r3, #0]
 800ea04:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ea06:	693b      	ldr	r3, [r7, #16]
 800ea08:	e853 3f00 	ldrex	r3, [r3]
 800ea0c:	60fb      	str	r3, [r7, #12]
   return(result);
 800ea0e:	68fb      	ldr	r3, [r7, #12]
 800ea10:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800ea14:	637b      	str	r3, [r7, #52]	@ 0x34
 800ea16:	687b      	ldr	r3, [r7, #4]
 800ea18:	681b      	ldr	r3, [r3, #0]
 800ea1a:	461a      	mov	r2, r3
 800ea1c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800ea1e:	61fb      	str	r3, [r7, #28]
 800ea20:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ea22:	69b9      	ldr	r1, [r7, #24]
 800ea24:	69fa      	ldr	r2, [r7, #28]
 800ea26:	e841 2300 	strex	r3, r2, [r1]
 800ea2a:	617b      	str	r3, [r7, #20]
   return(result);
 800ea2c:	697b      	ldr	r3, [r7, #20]
 800ea2e:	2b00      	cmp	r3, #0
 800ea30:	d1e6      	bne.n	800ea00 <UART_TxISR_16BIT+0x50>
      huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
      huart->pTxBuffPtr += 2U;
      huart->TxXferCount--;
    }
  }
}
 800ea32:	e018      	b.n	800ea66 <UART_TxISR_16BIT+0xb6>
      tmp = (const uint16_t *) huart->pTxBuffPtr;
 800ea34:	687b      	ldr	r3, [r7, #4]
 800ea36:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800ea38:	63fb      	str	r3, [r7, #60]	@ 0x3c
      huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
 800ea3a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800ea3c:	881b      	ldrh	r3, [r3, #0]
 800ea3e:	461a      	mov	r2, r3
 800ea40:	687b      	ldr	r3, [r7, #4]
 800ea42:	681b      	ldr	r3, [r3, #0]
 800ea44:	f3c2 0208 	ubfx	r2, r2, #0, #9
 800ea48:	629a      	str	r2, [r3, #40]	@ 0x28
      huart->pTxBuffPtr += 2U;
 800ea4a:	687b      	ldr	r3, [r7, #4]
 800ea4c:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800ea4e:	1c9a      	adds	r2, r3, #2
 800ea50:	687b      	ldr	r3, [r7, #4]
 800ea52:	651a      	str	r2, [r3, #80]	@ 0x50
      huart->TxXferCount--;
 800ea54:	687b      	ldr	r3, [r7, #4]
 800ea56:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800ea5a:	b29b      	uxth	r3, r3
 800ea5c:	3b01      	subs	r3, #1
 800ea5e:	b29a      	uxth	r2, r3
 800ea60:	687b      	ldr	r3, [r7, #4]
 800ea62:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
}
 800ea66:	bf00      	nop
 800ea68:	3744      	adds	r7, #68	@ 0x44
 800ea6a:	46bd      	mov	sp, r7
 800ea6c:	f85d 7b04 	ldr.w	r7, [sp], #4
 800ea70:	4770      	bx	lr

0800ea72 <UART_TxISR_8BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800ea72:	b480      	push	{r7}
 800ea74:	b091      	sub	sp, #68	@ 0x44
 800ea76:	af00      	add	r7, sp, #0
 800ea78:	6078      	str	r0, [r7, #4]
  uint16_t  nb_tx_data;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800ea7a:	687b      	ldr	r3, [r7, #4]
 800ea7c:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800ea80:	2b21      	cmp	r3, #33	@ 0x21
 800ea82:	d160      	bne.n	800eb46 <UART_TxISR_8BIT_FIFOEN+0xd4>
  {
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800ea84:	687b      	ldr	r3, [r7, #4]
 800ea86:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 800ea8a:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800ea8c:	e057      	b.n	800eb3e <UART_TxISR_8BIT_FIFOEN+0xcc>
    {
      if (huart->TxXferCount == 0U)
 800ea8e:	687b      	ldr	r3, [r7, #4]
 800ea90:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800ea94:	b29b      	uxth	r3, r3
 800ea96:	2b00      	cmp	r3, #0
 800ea98:	d133      	bne.n	800eb02 <UART_TxISR_8BIT_FIFOEN+0x90>
      {
        /* Disable the TX FIFO threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800ea9a:	687b      	ldr	r3, [r7, #4]
 800ea9c:	681b      	ldr	r3, [r3, #0]
 800ea9e:	3308      	adds	r3, #8
 800eaa0:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800eaa2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800eaa4:	e853 3f00 	ldrex	r3, [r3]
 800eaa8:	623b      	str	r3, [r7, #32]
   return(result);
 800eaaa:	6a3b      	ldr	r3, [r7, #32]
 800eaac:	f423 0300 	bic.w	r3, r3, #8388608	@ 0x800000
 800eab0:	63bb      	str	r3, [r7, #56]	@ 0x38
 800eab2:	687b      	ldr	r3, [r7, #4]
 800eab4:	681b      	ldr	r3, [r3, #0]
 800eab6:	3308      	adds	r3, #8
 800eab8:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800eaba:	633a      	str	r2, [r7, #48]	@ 0x30
 800eabc:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800eabe:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800eac0:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800eac2:	e841 2300 	strex	r3, r2, [r1]
 800eac6:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800eac8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800eaca:	2b00      	cmp	r3, #0
 800eacc:	d1e5      	bne.n	800ea9a <UART_TxISR_8BIT_FIFOEN+0x28>

        /* Enable the UART Transmit Complete Interrupt */
        ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800eace:	687b      	ldr	r3, [r7, #4]
 800ead0:	681b      	ldr	r3, [r3, #0]
 800ead2:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ead4:	693b      	ldr	r3, [r7, #16]
 800ead6:	e853 3f00 	ldrex	r3, [r3]
 800eada:	60fb      	str	r3, [r7, #12]
   return(result);
 800eadc:	68fb      	ldr	r3, [r7, #12]
 800eade:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800eae2:	637b      	str	r3, [r7, #52]	@ 0x34
 800eae4:	687b      	ldr	r3, [r7, #4]
 800eae6:	681b      	ldr	r3, [r3, #0]
 800eae8:	461a      	mov	r2, r3
 800eaea:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800eaec:	61fb      	str	r3, [r7, #28]
 800eaee:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800eaf0:	69b9      	ldr	r1, [r7, #24]
 800eaf2:	69fa      	ldr	r2, [r7, #28]
 800eaf4:	e841 2300 	strex	r3, r2, [r1]
 800eaf8:	617b      	str	r3, [r7, #20]
   return(result);
 800eafa:	697b      	ldr	r3, [r7, #20]
 800eafc:	2b00      	cmp	r3, #0
 800eafe:	d1e6      	bne.n	800eace <UART_TxISR_8BIT_FIFOEN+0x5c>

        break; /* force exit loop */
 800eb00:	e021      	b.n	800eb46 <UART_TxISR_8BIT_FIFOEN+0xd4>
      }
      else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
 800eb02:	687b      	ldr	r3, [r7, #4]
 800eb04:	681b      	ldr	r3, [r3, #0]
 800eb06:	69db      	ldr	r3, [r3, #28]
 800eb08:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800eb0c:	2b00      	cmp	r3, #0
 800eb0e:	d013      	beq.n	800eb38 <UART_TxISR_8BIT_FIFOEN+0xc6>
      {
        huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
 800eb10:	687b      	ldr	r3, [r7, #4]
 800eb12:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800eb14:	781a      	ldrb	r2, [r3, #0]
 800eb16:	687b      	ldr	r3, [r7, #4]
 800eb18:	681b      	ldr	r3, [r3, #0]
 800eb1a:	629a      	str	r2, [r3, #40]	@ 0x28
        huart->pTxBuffPtr++;
 800eb1c:	687b      	ldr	r3, [r7, #4]
 800eb1e:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800eb20:	1c5a      	adds	r2, r3, #1
 800eb22:	687b      	ldr	r3, [r7, #4]
 800eb24:	651a      	str	r2, [r3, #80]	@ 0x50
        huart->TxXferCount--;
 800eb26:	687b      	ldr	r3, [r7, #4]
 800eb28:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800eb2c:	b29b      	uxth	r3, r3
 800eb2e:	3b01      	subs	r3, #1
 800eb30:	b29a      	uxth	r2, r3
 800eb32:	687b      	ldr	r3, [r7, #4]
 800eb34:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800eb38:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800eb3a:	3b01      	subs	r3, #1
 800eb3c:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800eb3e:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800eb40:	2b00      	cmp	r3, #0
 800eb42:	d1a4      	bne.n	800ea8e <UART_TxISR_8BIT_FIFOEN+0x1c>
      {
        /* Nothing to do */
      }
    }
  }
}
 800eb44:	e7ff      	b.n	800eb46 <UART_TxISR_8BIT_FIFOEN+0xd4>
 800eb46:	bf00      	nop
 800eb48:	3744      	adds	r7, #68	@ 0x44
 800eb4a:	46bd      	mov	sp, r7
 800eb4c:	f85d 7b04 	ldr.w	r7, [sp], #4
 800eb50:	4770      	bx	lr

0800eb52 <UART_TxISR_16BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800eb52:	b480      	push	{r7}
 800eb54:	b091      	sub	sp, #68	@ 0x44
 800eb56:	af00      	add	r7, sp, #0
 800eb58:	6078      	str	r0, [r7, #4]
  const uint16_t *tmp;
  uint16_t  nb_tx_data;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800eb5a:	687b      	ldr	r3, [r7, #4]
 800eb5c:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800eb60:	2b21      	cmp	r3, #33	@ 0x21
 800eb62:	d165      	bne.n	800ec30 <UART_TxISR_16BIT_FIFOEN+0xde>
  {
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800eb64:	687b      	ldr	r3, [r7, #4]
 800eb66:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 800eb6a:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800eb6c:	e05c      	b.n	800ec28 <UART_TxISR_16BIT_FIFOEN+0xd6>
    {
      if (huart->TxXferCount == 0U)
 800eb6e:	687b      	ldr	r3, [r7, #4]
 800eb70:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800eb74:	b29b      	uxth	r3, r3
 800eb76:	2b00      	cmp	r3, #0
 800eb78:	d133      	bne.n	800ebe2 <UART_TxISR_16BIT_FIFOEN+0x90>
      {
        /* Disable the TX FIFO threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800eb7a:	687b      	ldr	r3, [r7, #4]
 800eb7c:	681b      	ldr	r3, [r3, #0]
 800eb7e:	3308      	adds	r3, #8
 800eb80:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800eb82:	6a3b      	ldr	r3, [r7, #32]
 800eb84:	e853 3f00 	ldrex	r3, [r3]
 800eb88:	61fb      	str	r3, [r7, #28]
   return(result);
 800eb8a:	69fb      	ldr	r3, [r7, #28]
 800eb8c:	f423 0300 	bic.w	r3, r3, #8388608	@ 0x800000
 800eb90:	637b      	str	r3, [r7, #52]	@ 0x34
 800eb92:	687b      	ldr	r3, [r7, #4]
 800eb94:	681b      	ldr	r3, [r3, #0]
 800eb96:	3308      	adds	r3, #8
 800eb98:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800eb9a:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800eb9c:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800eb9e:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800eba0:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800eba2:	e841 2300 	strex	r3, r2, [r1]
 800eba6:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800eba8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ebaa:	2b00      	cmp	r3, #0
 800ebac:	d1e5      	bne.n	800eb7a <UART_TxISR_16BIT_FIFOEN+0x28>

        /* Enable the UART Transmit Complete Interrupt */
        ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800ebae:	687b      	ldr	r3, [r7, #4]
 800ebb0:	681b      	ldr	r3, [r3, #0]
 800ebb2:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ebb4:	68fb      	ldr	r3, [r7, #12]
 800ebb6:	e853 3f00 	ldrex	r3, [r3]
 800ebba:	60bb      	str	r3, [r7, #8]
   return(result);
 800ebbc:	68bb      	ldr	r3, [r7, #8]
 800ebbe:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800ebc2:	633b      	str	r3, [r7, #48]	@ 0x30
 800ebc4:	687b      	ldr	r3, [r7, #4]
 800ebc6:	681b      	ldr	r3, [r3, #0]
 800ebc8:	461a      	mov	r2, r3
 800ebca:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800ebcc:	61bb      	str	r3, [r7, #24]
 800ebce:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ebd0:	6979      	ldr	r1, [r7, #20]
 800ebd2:	69ba      	ldr	r2, [r7, #24]
 800ebd4:	e841 2300 	strex	r3, r2, [r1]
 800ebd8:	613b      	str	r3, [r7, #16]
   return(result);
 800ebda:	693b      	ldr	r3, [r7, #16]
 800ebdc:	2b00      	cmp	r3, #0
 800ebde:	d1e6      	bne.n	800ebae <UART_TxISR_16BIT_FIFOEN+0x5c>

        break; /* force exit loop */
 800ebe0:	e026      	b.n	800ec30 <UART_TxISR_16BIT_FIFOEN+0xde>
      }
      else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
 800ebe2:	687b      	ldr	r3, [r7, #4]
 800ebe4:	681b      	ldr	r3, [r3, #0]
 800ebe6:	69db      	ldr	r3, [r3, #28]
 800ebe8:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800ebec:	2b00      	cmp	r3, #0
 800ebee:	d018      	beq.n	800ec22 <UART_TxISR_16BIT_FIFOEN+0xd0>
      {
        tmp = (const uint16_t *) huart->pTxBuffPtr;
 800ebf0:	687b      	ldr	r3, [r7, #4]
 800ebf2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800ebf4:	63bb      	str	r3, [r7, #56]	@ 0x38
        huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
 800ebf6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ebf8:	881b      	ldrh	r3, [r3, #0]
 800ebfa:	461a      	mov	r2, r3
 800ebfc:	687b      	ldr	r3, [r7, #4]
 800ebfe:	681b      	ldr	r3, [r3, #0]
 800ec00:	f3c2 0208 	ubfx	r2, r2, #0, #9
 800ec04:	629a      	str	r2, [r3, #40]	@ 0x28
        huart->pTxBuffPtr += 2U;
 800ec06:	687b      	ldr	r3, [r7, #4]
 800ec08:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800ec0a:	1c9a      	adds	r2, r3, #2
 800ec0c:	687b      	ldr	r3, [r7, #4]
 800ec0e:	651a      	str	r2, [r3, #80]	@ 0x50
        huart->TxXferCount--;
 800ec10:	687b      	ldr	r3, [r7, #4]
 800ec12:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800ec16:	b29b      	uxth	r3, r3
 800ec18:	3b01      	subs	r3, #1
 800ec1a:	b29a      	uxth	r2, r3
 800ec1c:	687b      	ldr	r3, [r7, #4]
 800ec1e:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800ec22:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800ec24:	3b01      	subs	r3, #1
 800ec26:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800ec28:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800ec2a:	2b00      	cmp	r3, #0
 800ec2c:	d19f      	bne.n	800eb6e <UART_TxISR_16BIT_FIFOEN+0x1c>
      {
        /* Nothing to do */
      }
    }
  }
}
 800ec2e:	e7ff      	b.n	800ec30 <UART_TxISR_16BIT_FIFOEN+0xde>
 800ec30:	bf00      	nop
 800ec32:	3744      	adds	r7, #68	@ 0x44
 800ec34:	46bd      	mov	sp, r7
 800ec36:	f85d 7b04 	ldr.w	r7, [sp], #4
 800ec3a:	4770      	bx	lr

0800ec3c <UART_EndTransmit_IT>:
  * @param  huart pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
{
 800ec3c:	b580      	push	{r7, lr}
 800ec3e:	b088      	sub	sp, #32
 800ec40:	af00      	add	r7, sp, #0
 800ec42:	6078      	str	r0, [r7, #4]
  /* Disable the UART Transmit Complete Interrupt */
  ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800ec44:	687b      	ldr	r3, [r7, #4]
 800ec46:	681b      	ldr	r3, [r3, #0]
 800ec48:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ec4a:	68fb      	ldr	r3, [r7, #12]
 800ec4c:	e853 3f00 	ldrex	r3, [r3]
 800ec50:	60bb      	str	r3, [r7, #8]
   return(result);
 800ec52:	68bb      	ldr	r3, [r7, #8]
 800ec54:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800ec58:	61fb      	str	r3, [r7, #28]
 800ec5a:	687b      	ldr	r3, [r7, #4]
 800ec5c:	681b      	ldr	r3, [r3, #0]
 800ec5e:	461a      	mov	r2, r3
 800ec60:	69fb      	ldr	r3, [r7, #28]
 800ec62:	61bb      	str	r3, [r7, #24]
 800ec64:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ec66:	6979      	ldr	r1, [r7, #20]
 800ec68:	69ba      	ldr	r2, [r7, #24]
 800ec6a:	e841 2300 	strex	r3, r2, [r1]
 800ec6e:	613b      	str	r3, [r7, #16]
   return(result);
 800ec70:	693b      	ldr	r3, [r7, #16]
 800ec72:	2b00      	cmp	r3, #0
 800ec74:	d1e6      	bne.n	800ec44 <UART_EndTransmit_IT+0x8>

  /* Tx process is ended, restore huart->gState to Ready */
  huart->gState = HAL_UART_STATE_READY;
 800ec76:	687b      	ldr	r3, [r7, #4]
 800ec78:	2220      	movs	r2, #32
 800ec7a:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Cleat TxISR function pointer */
  huart->TxISR = NULL;
 800ec7e:	687b      	ldr	r3, [r7, #4]
 800ec80:	2200      	movs	r2, #0
 800ec82:	679a      	str	r2, [r3, #120]	@ 0x78
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
  /*Call registered Tx complete callback*/
  huart->TxCpltCallback(huart);
#else
  /*Call legacy weak Tx complete callback*/
  HAL_UART_TxCpltCallback(huart);
 800ec84:	6878      	ldr	r0, [r7, #4]
 800ec86:	f7f5 fa1f 	bl	80040c8 <HAL_UART_TxCpltCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
 800ec8a:	bf00      	nop
 800ec8c:	3720      	adds	r7, #32
 800ec8e:	46bd      	mov	sp, r7
 800ec90:	bd80      	pop	{r7, pc}
	...

0800ec94 <UART_RxISR_8BIT>:
  * @brief RX interrupt handler for 7 or 8 bits data word length .
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
{
 800ec94:	b580      	push	{r7, lr}
 800ec96:	b09c      	sub	sp, #112	@ 0x70
 800ec98:	af00      	add	r7, sp, #0
 800ec9a:	6078      	str	r0, [r7, #4]
  uint16_t uhMask = huart->Mask;
 800ec9c:	687b      	ldr	r3, [r7, #4]
 800ec9e:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800eca2:	f8a7 306e 	strh.w	r3, [r7, #110]	@ 0x6e
  uint16_t  uhdata;

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800eca6:	687b      	ldr	r3, [r7, #4]
 800eca8:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800ecac:	2b22      	cmp	r3, #34	@ 0x22
 800ecae:	f040 80be 	bne.w	800ee2e <UART_RxISR_8BIT+0x19a>
  {
    uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800ecb2:	687b      	ldr	r3, [r7, #4]
 800ecb4:	681b      	ldr	r3, [r3, #0]
 800ecb6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800ecb8:	f8a7 306c 	strh.w	r3, [r7, #108]	@ 0x6c
    *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
 800ecbc:	f8b7 306c 	ldrh.w	r3, [r7, #108]	@ 0x6c
 800ecc0:	b2d9      	uxtb	r1, r3
 800ecc2:	f8b7 306e 	ldrh.w	r3, [r7, #110]	@ 0x6e
 800ecc6:	b2da      	uxtb	r2, r3
 800ecc8:	687b      	ldr	r3, [r7, #4]
 800ecca:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800eccc:	400a      	ands	r2, r1
 800ecce:	b2d2      	uxtb	r2, r2
 800ecd0:	701a      	strb	r2, [r3, #0]
    huart->pRxBuffPtr++;
 800ecd2:	687b      	ldr	r3, [r7, #4]
 800ecd4:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800ecd6:	1c5a      	adds	r2, r3, #1
 800ecd8:	687b      	ldr	r3, [r7, #4]
 800ecda:	659a      	str	r2, [r3, #88]	@ 0x58
    huart->RxXferCount--;
 800ecdc:	687b      	ldr	r3, [r7, #4]
 800ecde:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800ece2:	b29b      	uxth	r3, r3
 800ece4:	3b01      	subs	r3, #1
 800ece6:	b29a      	uxth	r2, r3
 800ece8:	687b      	ldr	r3, [r7, #4]
 800ecea:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

    if (huart->RxXferCount == 0U)
 800ecee:	687b      	ldr	r3, [r7, #4]
 800ecf0:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800ecf4:	b29b      	uxth	r3, r3
 800ecf6:	2b00      	cmp	r3, #0
 800ecf8:	f040 80a1 	bne.w	800ee3e <UART_RxISR_8BIT+0x1aa>
    {
      /* Disable the UART Parity Error Interrupt and RXNE interrupts */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800ecfc:	687b      	ldr	r3, [r7, #4]
 800ecfe:	681b      	ldr	r3, [r3, #0]
 800ed00:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ed02:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800ed04:	e853 3f00 	ldrex	r3, [r3]
 800ed08:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 800ed0a:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800ed0c:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800ed10:	66bb      	str	r3, [r7, #104]	@ 0x68
 800ed12:	687b      	ldr	r3, [r7, #4]
 800ed14:	681b      	ldr	r3, [r3, #0]
 800ed16:	461a      	mov	r2, r3
 800ed18:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800ed1a:	65bb      	str	r3, [r7, #88]	@ 0x58
 800ed1c:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ed1e:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 800ed20:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800ed22:	e841 2300 	strex	r3, r2, [r1]
 800ed26:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 800ed28:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800ed2a:	2b00      	cmp	r3, #0
 800ed2c:	d1e6      	bne.n	800ecfc <UART_RxISR_8BIT+0x68>

      /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800ed2e:	687b      	ldr	r3, [r7, #4]
 800ed30:	681b      	ldr	r3, [r3, #0]
 800ed32:	3308      	adds	r3, #8
 800ed34:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ed36:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ed38:	e853 3f00 	ldrex	r3, [r3]
 800ed3c:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800ed3e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800ed40:	f023 0301 	bic.w	r3, r3, #1
 800ed44:	667b      	str	r3, [r7, #100]	@ 0x64
 800ed46:	687b      	ldr	r3, [r7, #4]
 800ed48:	681b      	ldr	r3, [r3, #0]
 800ed4a:	3308      	adds	r3, #8
 800ed4c:	6e7a      	ldr	r2, [r7, #100]	@ 0x64
 800ed4e:	647a      	str	r2, [r7, #68]	@ 0x44
 800ed50:	643b      	str	r3, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ed52:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800ed54:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800ed56:	e841 2300 	strex	r3, r2, [r1]
 800ed5a:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800ed5c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800ed5e:	2b00      	cmp	r3, #0
 800ed60:	d1e5      	bne.n	800ed2e <UART_RxISR_8BIT+0x9a>

      /* Rx process is completed, restore huart->RxState to Ready */
      huart->RxState = HAL_UART_STATE_READY;
 800ed62:	687b      	ldr	r3, [r7, #4]
 800ed64:	2220      	movs	r2, #32
 800ed66:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      /* Clear RxISR function pointer */
      huart->RxISR = NULL;
 800ed6a:	687b      	ldr	r3, [r7, #4]
 800ed6c:	2200      	movs	r2, #0
 800ed6e:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Initialize type of RxEvent to Transfer Complete */
      huart->RxEventType = HAL_UART_RXEVENT_TC;
 800ed70:	687b      	ldr	r3, [r7, #4]
 800ed72:	2200      	movs	r2, #0
 800ed74:	671a      	str	r2, [r3, #112]	@ 0x70

      if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800ed76:	687b      	ldr	r3, [r7, #4]
 800ed78:	681b      	ldr	r3, [r3, #0]
 800ed7a:	4a33      	ldr	r2, [pc, #204]	@ (800ee48 <UART_RxISR_8BIT+0x1b4>)
 800ed7c:	4293      	cmp	r3, r2
 800ed7e:	d01f      	beq.n	800edc0 <UART_RxISR_8BIT+0x12c>
      {
        /* Check that USART RTOEN bit is set */
        if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800ed80:	687b      	ldr	r3, [r7, #4]
 800ed82:	681b      	ldr	r3, [r3, #0]
 800ed84:	685b      	ldr	r3, [r3, #4]
 800ed86:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800ed8a:	2b00      	cmp	r3, #0
 800ed8c:	d018      	beq.n	800edc0 <UART_RxISR_8BIT+0x12c>
        {
          /* Enable the UART Receiver Timeout Interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800ed8e:	687b      	ldr	r3, [r7, #4]
 800ed90:	681b      	ldr	r3, [r3, #0]
 800ed92:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ed94:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ed96:	e853 3f00 	ldrex	r3, [r3]
 800ed9a:	623b      	str	r3, [r7, #32]
   return(result);
 800ed9c:	6a3b      	ldr	r3, [r7, #32]
 800ed9e:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800eda2:	663b      	str	r3, [r7, #96]	@ 0x60
 800eda4:	687b      	ldr	r3, [r7, #4]
 800eda6:	681b      	ldr	r3, [r3, #0]
 800eda8:	461a      	mov	r2, r3
 800edaa:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800edac:	633b      	str	r3, [r7, #48]	@ 0x30
 800edae:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800edb0:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800edb2:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800edb4:	e841 2300 	strex	r3, r2, [r1]
 800edb8:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800edba:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800edbc:	2b00      	cmp	r3, #0
 800edbe:	d1e6      	bne.n	800ed8e <UART_RxISR_8BIT+0xfa>
        }
      }

      /* Check current reception Mode :
         If Reception till IDLE event has been selected : */
      if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800edc0:	687b      	ldr	r3, [r7, #4]
 800edc2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800edc4:	2b01      	cmp	r3, #1
 800edc6:	d12e      	bne.n	800ee26 <UART_RxISR_8BIT+0x192>
      {
        /* Set reception type to Standard */
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800edc8:	687b      	ldr	r3, [r7, #4]
 800edca:	2200      	movs	r2, #0
 800edcc:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Disable IDLE interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800edce:	687b      	ldr	r3, [r7, #4]
 800edd0:	681b      	ldr	r3, [r3, #0]
 800edd2:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800edd4:	693b      	ldr	r3, [r7, #16]
 800edd6:	e853 3f00 	ldrex	r3, [r3]
 800edda:	60fb      	str	r3, [r7, #12]
   return(result);
 800eddc:	68fb      	ldr	r3, [r7, #12]
 800edde:	f023 0310 	bic.w	r3, r3, #16
 800ede2:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800ede4:	687b      	ldr	r3, [r7, #4]
 800ede6:	681b      	ldr	r3, [r3, #0]
 800ede8:	461a      	mov	r2, r3
 800edea:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800edec:	61fb      	str	r3, [r7, #28]
 800edee:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800edf0:	69b9      	ldr	r1, [r7, #24]
 800edf2:	69fa      	ldr	r2, [r7, #28]
 800edf4:	e841 2300 	strex	r3, r2, [r1]
 800edf8:	617b      	str	r3, [r7, #20]
   return(result);
 800edfa:	697b      	ldr	r3, [r7, #20]
 800edfc:	2b00      	cmp	r3, #0
 800edfe:	d1e6      	bne.n	800edce <UART_RxISR_8BIT+0x13a>

        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800ee00:	687b      	ldr	r3, [r7, #4]
 800ee02:	681b      	ldr	r3, [r3, #0]
 800ee04:	69db      	ldr	r3, [r3, #28]
 800ee06:	f003 0310 	and.w	r3, r3, #16
 800ee0a:	2b10      	cmp	r3, #16
 800ee0c:	d103      	bne.n	800ee16 <UART_RxISR_8BIT+0x182>
        {
          /* Clear IDLE Flag */
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800ee0e:	687b      	ldr	r3, [r7, #4]
 800ee10:	681b      	ldr	r3, [r3, #0]
 800ee12:	2210      	movs	r2, #16
 800ee14:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, huart->RxXferSize);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800ee16:	687b      	ldr	r3, [r7, #4]
 800ee18:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800ee1c:	4619      	mov	r1, r3
 800ee1e:	6878      	ldr	r0, [r7, #4]
 800ee20:	f7f5 f8f8 	bl	8004014 <HAL_UARTEx_RxEventCallback>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800ee24:	e00b      	b.n	800ee3e <UART_RxISR_8BIT+0x1aa>
        HAL_UART_RxCpltCallback(huart);
 800ee26:	6878      	ldr	r0, [r7, #4]
 800ee28:	f7f5 f8ea 	bl	8004000 <HAL_UART_RxCpltCallback>
}
 800ee2c:	e007      	b.n	800ee3e <UART_RxISR_8BIT+0x1aa>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800ee2e:	687b      	ldr	r3, [r7, #4]
 800ee30:	681b      	ldr	r3, [r3, #0]
 800ee32:	699a      	ldr	r2, [r3, #24]
 800ee34:	687b      	ldr	r3, [r7, #4]
 800ee36:	681b      	ldr	r3, [r3, #0]
 800ee38:	f042 0208 	orr.w	r2, r2, #8
 800ee3c:	619a      	str	r2, [r3, #24]
}
 800ee3e:	bf00      	nop
 800ee40:	3770      	adds	r7, #112	@ 0x70
 800ee42:	46bd      	mov	sp, r7
 800ee44:	bd80      	pop	{r7, pc}
 800ee46:	bf00      	nop
 800ee48:	58000c00 	.word	0x58000c00

0800ee4c <UART_RxISR_16BIT>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
{
 800ee4c:	b580      	push	{r7, lr}
 800ee4e:	b09c      	sub	sp, #112	@ 0x70
 800ee50:	af00      	add	r7, sp, #0
 800ee52:	6078      	str	r0, [r7, #4]
  uint16_t *tmp;
  uint16_t uhMask = huart->Mask;
 800ee54:	687b      	ldr	r3, [r7, #4]
 800ee56:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800ee5a:	f8a7 306e 	strh.w	r3, [r7, #110]	@ 0x6e
  uint16_t  uhdata;

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800ee5e:	687b      	ldr	r3, [r7, #4]
 800ee60:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800ee64:	2b22      	cmp	r3, #34	@ 0x22
 800ee66:	f040 80be 	bne.w	800efe6 <UART_RxISR_16BIT+0x19a>
  {
    uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800ee6a:	687b      	ldr	r3, [r7, #4]
 800ee6c:	681b      	ldr	r3, [r3, #0]
 800ee6e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800ee70:	f8a7 306c 	strh.w	r3, [r7, #108]	@ 0x6c
    tmp = (uint16_t *) huart->pRxBuffPtr ;
 800ee74:	687b      	ldr	r3, [r7, #4]
 800ee76:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800ee78:	66bb      	str	r3, [r7, #104]	@ 0x68
    *tmp = (uint16_t)(uhdata & uhMask);
 800ee7a:	f8b7 206c 	ldrh.w	r2, [r7, #108]	@ 0x6c
 800ee7e:	f8b7 306e 	ldrh.w	r3, [r7, #110]	@ 0x6e
 800ee82:	4013      	ands	r3, r2
 800ee84:	b29a      	uxth	r2, r3
 800ee86:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800ee88:	801a      	strh	r2, [r3, #0]
    huart->pRxBuffPtr += 2U;
 800ee8a:	687b      	ldr	r3, [r7, #4]
 800ee8c:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800ee8e:	1c9a      	adds	r2, r3, #2
 800ee90:	687b      	ldr	r3, [r7, #4]
 800ee92:	659a      	str	r2, [r3, #88]	@ 0x58
    huart->RxXferCount--;
 800ee94:	687b      	ldr	r3, [r7, #4]
 800ee96:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800ee9a:	b29b      	uxth	r3, r3
 800ee9c:	3b01      	subs	r3, #1
 800ee9e:	b29a      	uxth	r2, r3
 800eea0:	687b      	ldr	r3, [r7, #4]
 800eea2:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

    if (huart->RxXferCount == 0U)
 800eea6:	687b      	ldr	r3, [r7, #4]
 800eea8:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800eeac:	b29b      	uxth	r3, r3
 800eeae:	2b00      	cmp	r3, #0
 800eeb0:	f040 80a1 	bne.w	800eff6 <UART_RxISR_16BIT+0x1aa>
    {
      /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800eeb4:	687b      	ldr	r3, [r7, #4]
 800eeb6:	681b      	ldr	r3, [r3, #0]
 800eeb8:	64bb      	str	r3, [r7, #72]	@ 0x48
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800eeba:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800eebc:	e853 3f00 	ldrex	r3, [r3]
 800eec0:	647b      	str	r3, [r7, #68]	@ 0x44
   return(result);
 800eec2:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800eec4:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800eec8:	667b      	str	r3, [r7, #100]	@ 0x64
 800eeca:	687b      	ldr	r3, [r7, #4]
 800eecc:	681b      	ldr	r3, [r3, #0]
 800eece:	461a      	mov	r2, r3
 800eed0:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800eed2:	657b      	str	r3, [r7, #84]	@ 0x54
 800eed4:	653a      	str	r2, [r7, #80]	@ 0x50
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800eed6:	6d39      	ldr	r1, [r7, #80]	@ 0x50
 800eed8:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 800eeda:	e841 2300 	strex	r3, r2, [r1]
 800eede:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800eee0:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800eee2:	2b00      	cmp	r3, #0
 800eee4:	d1e6      	bne.n	800eeb4 <UART_RxISR_16BIT+0x68>

      /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800eee6:	687b      	ldr	r3, [r7, #4]
 800eee8:	681b      	ldr	r3, [r3, #0]
 800eeea:	3308      	adds	r3, #8
 800eeec:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800eeee:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800eef0:	e853 3f00 	ldrex	r3, [r3]
 800eef4:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800eef6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800eef8:	f023 0301 	bic.w	r3, r3, #1
 800eefc:	663b      	str	r3, [r7, #96]	@ 0x60
 800eefe:	687b      	ldr	r3, [r7, #4]
 800ef00:	681b      	ldr	r3, [r3, #0]
 800ef02:	3308      	adds	r3, #8
 800ef04:	6e3a      	ldr	r2, [r7, #96]	@ 0x60
 800ef06:	643a      	str	r2, [r7, #64]	@ 0x40
 800ef08:	63fb      	str	r3, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ef0a:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800ef0c:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800ef0e:	e841 2300 	strex	r3, r2, [r1]
 800ef12:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800ef14:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ef16:	2b00      	cmp	r3, #0
 800ef18:	d1e5      	bne.n	800eee6 <UART_RxISR_16BIT+0x9a>

      /* Rx process is completed, restore huart->RxState to Ready */
      huart->RxState = HAL_UART_STATE_READY;
 800ef1a:	687b      	ldr	r3, [r7, #4]
 800ef1c:	2220      	movs	r2, #32
 800ef1e:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      /* Clear RxISR function pointer */
      huart->RxISR = NULL;
 800ef22:	687b      	ldr	r3, [r7, #4]
 800ef24:	2200      	movs	r2, #0
 800ef26:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Initialize type of RxEvent to Transfer Complete */
      huart->RxEventType = HAL_UART_RXEVENT_TC;
 800ef28:	687b      	ldr	r3, [r7, #4]
 800ef2a:	2200      	movs	r2, #0
 800ef2c:	671a      	str	r2, [r3, #112]	@ 0x70

      if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800ef2e:	687b      	ldr	r3, [r7, #4]
 800ef30:	681b      	ldr	r3, [r3, #0]
 800ef32:	4a33      	ldr	r2, [pc, #204]	@ (800f000 <UART_RxISR_16BIT+0x1b4>)
 800ef34:	4293      	cmp	r3, r2
 800ef36:	d01f      	beq.n	800ef78 <UART_RxISR_16BIT+0x12c>
      {
        /* Check that USART RTOEN bit is set */
        if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800ef38:	687b      	ldr	r3, [r7, #4]
 800ef3a:	681b      	ldr	r3, [r3, #0]
 800ef3c:	685b      	ldr	r3, [r3, #4]
 800ef3e:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800ef42:	2b00      	cmp	r3, #0
 800ef44:	d018      	beq.n	800ef78 <UART_RxISR_16BIT+0x12c>
        {
          /* Enable the UART Receiver Timeout Interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800ef46:	687b      	ldr	r3, [r7, #4]
 800ef48:	681b      	ldr	r3, [r3, #0]
 800ef4a:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ef4c:	6a3b      	ldr	r3, [r7, #32]
 800ef4e:	e853 3f00 	ldrex	r3, [r3]
 800ef52:	61fb      	str	r3, [r7, #28]
   return(result);
 800ef54:	69fb      	ldr	r3, [r7, #28]
 800ef56:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800ef5a:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800ef5c:	687b      	ldr	r3, [r7, #4]
 800ef5e:	681b      	ldr	r3, [r3, #0]
 800ef60:	461a      	mov	r2, r3
 800ef62:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800ef64:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800ef66:	62ba      	str	r2, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ef68:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800ef6a:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800ef6c:	e841 2300 	strex	r3, r2, [r1]
 800ef70:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800ef72:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ef74:	2b00      	cmp	r3, #0
 800ef76:	d1e6      	bne.n	800ef46 <UART_RxISR_16BIT+0xfa>
        }
      }

      /* Check current reception Mode :
         If Reception till IDLE event has been selected : */
      if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800ef78:	687b      	ldr	r3, [r7, #4]
 800ef7a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800ef7c:	2b01      	cmp	r3, #1
 800ef7e:	d12e      	bne.n	800efde <UART_RxISR_16BIT+0x192>
      {
        /* Set reception type to Standard */
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800ef80:	687b      	ldr	r3, [r7, #4]
 800ef82:	2200      	movs	r2, #0
 800ef84:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Disable IDLE interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800ef86:	687b      	ldr	r3, [r7, #4]
 800ef88:	681b      	ldr	r3, [r3, #0]
 800ef8a:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ef8c:	68fb      	ldr	r3, [r7, #12]
 800ef8e:	e853 3f00 	ldrex	r3, [r3]
 800ef92:	60bb      	str	r3, [r7, #8]
   return(result);
 800ef94:	68bb      	ldr	r3, [r7, #8]
 800ef96:	f023 0310 	bic.w	r3, r3, #16
 800ef9a:	65bb      	str	r3, [r7, #88]	@ 0x58
 800ef9c:	687b      	ldr	r3, [r7, #4]
 800ef9e:	681b      	ldr	r3, [r3, #0]
 800efa0:	461a      	mov	r2, r3
 800efa2:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 800efa4:	61bb      	str	r3, [r7, #24]
 800efa6:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800efa8:	6979      	ldr	r1, [r7, #20]
 800efaa:	69ba      	ldr	r2, [r7, #24]
 800efac:	e841 2300 	strex	r3, r2, [r1]
 800efb0:	613b      	str	r3, [r7, #16]
   return(result);
 800efb2:	693b      	ldr	r3, [r7, #16]
 800efb4:	2b00      	cmp	r3, #0
 800efb6:	d1e6      	bne.n	800ef86 <UART_RxISR_16BIT+0x13a>

        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800efb8:	687b      	ldr	r3, [r7, #4]
 800efba:	681b      	ldr	r3, [r3, #0]
 800efbc:	69db      	ldr	r3, [r3, #28]
 800efbe:	f003 0310 	and.w	r3, r3, #16
 800efc2:	2b10      	cmp	r3, #16
 800efc4:	d103      	bne.n	800efce <UART_RxISR_16BIT+0x182>
        {
          /* Clear IDLE Flag */
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800efc6:	687b      	ldr	r3, [r7, #4]
 800efc8:	681b      	ldr	r3, [r3, #0]
 800efca:	2210      	movs	r2, #16
 800efcc:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, huart->RxXferSize);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800efce:	687b      	ldr	r3, [r7, #4]
 800efd0:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800efd4:	4619      	mov	r1, r3
 800efd6:	6878      	ldr	r0, [r7, #4]
 800efd8:	f7f5 f81c 	bl	8004014 <HAL_UARTEx_RxEventCallback>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800efdc:	e00b      	b.n	800eff6 <UART_RxISR_16BIT+0x1aa>
        HAL_UART_RxCpltCallback(huart);
 800efde:	6878      	ldr	r0, [r7, #4]
 800efe0:	f7f5 f80e 	bl	8004000 <HAL_UART_RxCpltCallback>
}
 800efe4:	e007      	b.n	800eff6 <UART_RxISR_16BIT+0x1aa>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800efe6:	687b      	ldr	r3, [r7, #4]
 800efe8:	681b      	ldr	r3, [r3, #0]
 800efea:	699a      	ldr	r2, [r3, #24]
 800efec:	687b      	ldr	r3, [r7, #4]
 800efee:	681b      	ldr	r3, [r3, #0]
 800eff0:	f042 0208 	orr.w	r2, r2, #8
 800eff4:	619a      	str	r2, [r3, #24]
}
 800eff6:	bf00      	nop
 800eff8:	3770      	adds	r7, #112	@ 0x70
 800effa:	46bd      	mov	sp, r7
 800effc:	bd80      	pop	{r7, pc}
 800effe:	bf00      	nop
 800f000:	58000c00 	.word	0x58000c00

0800f004 <UART_RxISR_8BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800f004:	b580      	push	{r7, lr}
 800f006:	b0ac      	sub	sp, #176	@ 0xb0
 800f008:	af00      	add	r7, sp, #0
 800f00a:	6078      	str	r0, [r7, #4]
  uint16_t  uhMask = huart->Mask;
 800f00c:	687b      	ldr	r3, [r7, #4]
 800f00e:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800f012:	f8a7 30aa 	strh.w	r3, [r7, #170]	@ 0xaa
  uint16_t  uhdata;
  uint16_t  nb_rx_data;
  uint16_t  rxdatacount;
  uint32_t  isrflags = READ_REG(huart->Instance->ISR);
 800f016:	687b      	ldr	r3, [r7, #4]
 800f018:	681b      	ldr	r3, [r3, #0]
 800f01a:	69db      	ldr	r3, [r3, #28]
 800f01c:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
  uint32_t  cr1its   = READ_REG(huart->Instance->CR1);
 800f020:	687b      	ldr	r3, [r7, #4]
 800f022:	681b      	ldr	r3, [r3, #0]
 800f024:	681b      	ldr	r3, [r3, #0]
 800f026:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
  uint32_t  cr3its   = READ_REG(huart->Instance->CR3);
 800f02a:	687b      	ldr	r3, [r7, #4]
 800f02c:	681b      	ldr	r3, [r3, #0]
 800f02e:	689b      	ldr	r3, [r3, #8]
 800f030:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800f034:	687b      	ldr	r3, [r7, #4]
 800f036:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800f03a:	2b22      	cmp	r3, #34	@ 0x22
 800f03c:	f040 8180 	bne.w	800f340 <UART_RxISR_8BIT_FIFOEN+0x33c>
  {
    nb_rx_data = huart->NbRxDataToProcess;
 800f040:	687b      	ldr	r3, [r7, #4]
 800f042:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800f046:	f8a7 309e 	strh.w	r3, [r7, #158]	@ 0x9e
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800f04a:	e123      	b.n	800f294 <UART_RxISR_8BIT_FIFOEN+0x290>
    {
      uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800f04c:	687b      	ldr	r3, [r7, #4]
 800f04e:	681b      	ldr	r3, [r3, #0]
 800f050:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800f052:	f8a7 309c 	strh.w	r3, [r7, #156]	@ 0x9c
      *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
 800f056:	f8b7 309c 	ldrh.w	r3, [r7, #156]	@ 0x9c
 800f05a:	b2d9      	uxtb	r1, r3
 800f05c:	f8b7 30aa 	ldrh.w	r3, [r7, #170]	@ 0xaa
 800f060:	b2da      	uxtb	r2, r3
 800f062:	687b      	ldr	r3, [r7, #4]
 800f064:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f066:	400a      	ands	r2, r1
 800f068:	b2d2      	uxtb	r2, r2
 800f06a:	701a      	strb	r2, [r3, #0]
      huart->pRxBuffPtr++;
 800f06c:	687b      	ldr	r3, [r7, #4]
 800f06e:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f070:	1c5a      	adds	r2, r3, #1
 800f072:	687b      	ldr	r3, [r7, #4]
 800f074:	659a      	str	r2, [r3, #88]	@ 0x58
      huart->RxXferCount--;
 800f076:	687b      	ldr	r3, [r7, #4]
 800f078:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f07c:	b29b      	uxth	r3, r3
 800f07e:	3b01      	subs	r3, #1
 800f080:	b29a      	uxth	r2, r3
 800f082:	687b      	ldr	r3, [r7, #4]
 800f084:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
      isrflags = READ_REG(huart->Instance->ISR);
 800f088:	687b      	ldr	r3, [r7, #4]
 800f08a:	681b      	ldr	r3, [r3, #0]
 800f08c:	69db      	ldr	r3, [r3, #28]
 800f08e:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac

      /* If some non blocking errors occurred */
      if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
 800f092:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800f096:	f003 0307 	and.w	r3, r3, #7
 800f09a:	2b00      	cmp	r3, #0
 800f09c:	d053      	beq.n	800f146 <UART_RxISR_8BIT_FIFOEN+0x142>
      {
        /* UART parity error interrupt occurred -------------------------------------*/
        if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 800f09e:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800f0a2:	f003 0301 	and.w	r3, r3, #1
 800f0a6:	2b00      	cmp	r3, #0
 800f0a8:	d011      	beq.n	800f0ce <UART_RxISR_8BIT_FIFOEN+0xca>
 800f0aa:	f8d7 30a4 	ldr.w	r3, [r7, #164]	@ 0xa4
 800f0ae:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800f0b2:	2b00      	cmp	r3, #0
 800f0b4:	d00b      	beq.n	800f0ce <UART_RxISR_8BIT_FIFOEN+0xca>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 800f0b6:	687b      	ldr	r3, [r7, #4]
 800f0b8:	681b      	ldr	r3, [r3, #0]
 800f0ba:	2201      	movs	r2, #1
 800f0bc:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_PE;
 800f0be:	687b      	ldr	r3, [r7, #4]
 800f0c0:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f0c4:	f043 0201 	orr.w	r2, r3, #1
 800f0c8:	687b      	ldr	r3, [r7, #4]
 800f0ca:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART frame error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800f0ce:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800f0d2:	f003 0302 	and.w	r3, r3, #2
 800f0d6:	2b00      	cmp	r3, #0
 800f0d8:	d011      	beq.n	800f0fe <UART_RxISR_8BIT_FIFOEN+0xfa>
 800f0da:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800f0de:	f003 0301 	and.w	r3, r3, #1
 800f0e2:	2b00      	cmp	r3, #0
 800f0e4:	d00b      	beq.n	800f0fe <UART_RxISR_8BIT_FIFOEN+0xfa>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 800f0e6:	687b      	ldr	r3, [r7, #4]
 800f0e8:	681b      	ldr	r3, [r3, #0]
 800f0ea:	2202      	movs	r2, #2
 800f0ec:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_FE;
 800f0ee:	687b      	ldr	r3, [r7, #4]
 800f0f0:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f0f4:	f043 0204 	orr.w	r2, r3, #4
 800f0f8:	687b      	ldr	r3, [r7, #4]
 800f0fa:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART noise error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800f0fe:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800f102:	f003 0304 	and.w	r3, r3, #4
 800f106:	2b00      	cmp	r3, #0
 800f108:	d011      	beq.n	800f12e <UART_RxISR_8BIT_FIFOEN+0x12a>
 800f10a:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800f10e:	f003 0301 	and.w	r3, r3, #1
 800f112:	2b00      	cmp	r3, #0
 800f114:	d00b      	beq.n	800f12e <UART_RxISR_8BIT_FIFOEN+0x12a>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 800f116:	687b      	ldr	r3, [r7, #4]
 800f118:	681b      	ldr	r3, [r3, #0]
 800f11a:	2204      	movs	r2, #4
 800f11c:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_NE;
 800f11e:	687b      	ldr	r3, [r7, #4]
 800f120:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f124:	f043 0202 	orr.w	r2, r3, #2
 800f128:	687b      	ldr	r3, [r7, #4]
 800f12a:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* Call UART Error Call back function if need be ----------------------------*/
        if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 800f12e:	687b      	ldr	r3, [r7, #4]
 800f130:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f134:	2b00      	cmp	r3, #0
 800f136:	d006      	beq.n	800f146 <UART_RxISR_8BIT_FIFOEN+0x142>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 800f138:	6878      	ldr	r0, [r7, #4]
 800f13a:	f7fe fb13 	bl	800d764 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
          huart->ErrorCode = HAL_UART_ERROR_NONE;
 800f13e:	687b      	ldr	r3, [r7, #4]
 800f140:	2200      	movs	r2, #0
 800f142:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }
      }

      if (huart->RxXferCount == 0U)
 800f146:	687b      	ldr	r3, [r7, #4]
 800f148:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f14c:	b29b      	uxth	r3, r3
 800f14e:	2b00      	cmp	r3, #0
 800f150:	f040 80a0 	bne.w	800f294 <UART_RxISR_8BIT_FIFOEN+0x290>
      {
        /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800f154:	687b      	ldr	r3, [r7, #4]
 800f156:	681b      	ldr	r3, [r3, #0]
 800f158:	673b      	str	r3, [r7, #112]	@ 0x70
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f15a:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 800f15c:	e853 3f00 	ldrex	r3, [r3]
 800f160:	66fb      	str	r3, [r7, #108]	@ 0x6c
   return(result);
 800f162:	6efb      	ldr	r3, [r7, #108]	@ 0x6c
 800f164:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800f168:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 800f16c:	687b      	ldr	r3, [r7, #4]
 800f16e:	681b      	ldr	r3, [r3, #0]
 800f170:	461a      	mov	r2, r3
 800f172:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 800f176:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800f178:	67ba      	str	r2, [r7, #120]	@ 0x78
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f17a:	6fb9      	ldr	r1, [r7, #120]	@ 0x78
 800f17c:	6ffa      	ldr	r2, [r7, #124]	@ 0x7c
 800f17e:	e841 2300 	strex	r3, r2, [r1]
 800f182:	677b      	str	r3, [r7, #116]	@ 0x74
   return(result);
 800f184:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800f186:	2b00      	cmp	r3, #0
 800f188:	d1e4      	bne.n	800f154 <UART_RxISR_8BIT_FIFOEN+0x150>

        /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
           and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800f18a:	687b      	ldr	r3, [r7, #4]
 800f18c:	681b      	ldr	r3, [r3, #0]
 800f18e:	3308      	adds	r3, #8
 800f190:	65fb      	str	r3, [r7, #92]	@ 0x5c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f192:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800f194:	e853 3f00 	ldrex	r3, [r3]
 800f198:	65bb      	str	r3, [r7, #88]	@ 0x58
   return(result);
 800f19a:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800f19c:	4b6e      	ldr	r3, [pc, #440]	@ (800f358 <UART_RxISR_8BIT_FIFOEN+0x354>)
 800f19e:	4013      	ands	r3, r2
 800f1a0:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800f1a4:	687b      	ldr	r3, [r7, #4]
 800f1a6:	681b      	ldr	r3, [r3, #0]
 800f1a8:	3308      	adds	r3, #8
 800f1aa:	f8d7 2094 	ldr.w	r2, [r7, #148]	@ 0x94
 800f1ae:	66ba      	str	r2, [r7, #104]	@ 0x68
 800f1b0:	667b      	str	r3, [r7, #100]	@ 0x64
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f1b2:	6e79      	ldr	r1, [r7, #100]	@ 0x64
 800f1b4:	6eba      	ldr	r2, [r7, #104]	@ 0x68
 800f1b6:	e841 2300 	strex	r3, r2, [r1]
 800f1ba:	663b      	str	r3, [r7, #96]	@ 0x60
   return(result);
 800f1bc:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800f1be:	2b00      	cmp	r3, #0
 800f1c0:	d1e3      	bne.n	800f18a <UART_RxISR_8BIT_FIFOEN+0x186>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 800f1c2:	687b      	ldr	r3, [r7, #4]
 800f1c4:	2220      	movs	r2, #32
 800f1c6:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 800f1ca:	687b      	ldr	r3, [r7, #4]
 800f1cc:	2200      	movs	r2, #0
 800f1ce:	675a      	str	r2, [r3, #116]	@ 0x74

        /* Initialize type of RxEvent to Transfer Complete */
        huart->RxEventType = HAL_UART_RXEVENT_TC;
 800f1d0:	687b      	ldr	r3, [r7, #4]
 800f1d2:	2200      	movs	r2, #0
 800f1d4:	671a      	str	r2, [r3, #112]	@ 0x70

        if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800f1d6:	687b      	ldr	r3, [r7, #4]
 800f1d8:	681b      	ldr	r3, [r3, #0]
 800f1da:	4a60      	ldr	r2, [pc, #384]	@ (800f35c <UART_RxISR_8BIT_FIFOEN+0x358>)
 800f1dc:	4293      	cmp	r3, r2
 800f1de:	d021      	beq.n	800f224 <UART_RxISR_8BIT_FIFOEN+0x220>
        {
          /* Check that USART RTOEN bit is set */
          if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800f1e0:	687b      	ldr	r3, [r7, #4]
 800f1e2:	681b      	ldr	r3, [r3, #0]
 800f1e4:	685b      	ldr	r3, [r3, #4]
 800f1e6:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800f1ea:	2b00      	cmp	r3, #0
 800f1ec:	d01a      	beq.n	800f224 <UART_RxISR_8BIT_FIFOEN+0x220>
          {
            /* Enable the UART Receiver Timeout Interrupt */
            ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800f1ee:	687b      	ldr	r3, [r7, #4]
 800f1f0:	681b      	ldr	r3, [r3, #0]
 800f1f2:	64bb      	str	r3, [r7, #72]	@ 0x48
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f1f4:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800f1f6:	e853 3f00 	ldrex	r3, [r3]
 800f1fa:	647b      	str	r3, [r7, #68]	@ 0x44
   return(result);
 800f1fc:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800f1fe:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800f202:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 800f206:	687b      	ldr	r3, [r7, #4]
 800f208:	681b      	ldr	r3, [r3, #0]
 800f20a:	461a      	mov	r2, r3
 800f20c:	f8d7 3090 	ldr.w	r3, [r7, #144]	@ 0x90
 800f210:	657b      	str	r3, [r7, #84]	@ 0x54
 800f212:	653a      	str	r2, [r7, #80]	@ 0x50
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f214:	6d39      	ldr	r1, [r7, #80]	@ 0x50
 800f216:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 800f218:	e841 2300 	strex	r3, r2, [r1]
 800f21c:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800f21e:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800f220:	2b00      	cmp	r3, #0
 800f222:	d1e4      	bne.n	800f1ee <UART_RxISR_8BIT_FIFOEN+0x1ea>
          }
        }

        /* Check current reception Mode :
           If Reception till IDLE event has been selected : */
        if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800f224:	687b      	ldr	r3, [r7, #4]
 800f226:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800f228:	2b01      	cmp	r3, #1
 800f22a:	d130      	bne.n	800f28e <UART_RxISR_8BIT_FIFOEN+0x28a>
        {
          /* Set reception type to Standard */
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800f22c:	687b      	ldr	r3, [r7, #4]
 800f22e:	2200      	movs	r2, #0
 800f230:	66da      	str	r2, [r3, #108]	@ 0x6c

          /* Disable IDLE interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800f232:	687b      	ldr	r3, [r7, #4]
 800f234:	681b      	ldr	r3, [r3, #0]
 800f236:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f238:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f23a:	e853 3f00 	ldrex	r3, [r3]
 800f23e:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800f240:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800f242:	f023 0310 	bic.w	r3, r3, #16
 800f246:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
 800f24a:	687b      	ldr	r3, [r7, #4]
 800f24c:	681b      	ldr	r3, [r3, #0]
 800f24e:	461a      	mov	r2, r3
 800f250:	f8d7 308c 	ldr.w	r3, [r7, #140]	@ 0x8c
 800f254:	643b      	str	r3, [r7, #64]	@ 0x40
 800f256:	63fa      	str	r2, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f258:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800f25a:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800f25c:	e841 2300 	strex	r3, r2, [r1]
 800f260:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800f262:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f264:	2b00      	cmp	r3, #0
 800f266:	d1e4      	bne.n	800f232 <UART_RxISR_8BIT_FIFOEN+0x22e>

          if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800f268:	687b      	ldr	r3, [r7, #4]
 800f26a:	681b      	ldr	r3, [r3, #0]
 800f26c:	69db      	ldr	r3, [r3, #28]
 800f26e:	f003 0310 	and.w	r3, r3, #16
 800f272:	2b10      	cmp	r3, #16
 800f274:	d103      	bne.n	800f27e <UART_RxISR_8BIT_FIFOEN+0x27a>
          {
            /* Clear IDLE Flag */
            __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800f276:	687b      	ldr	r3, [r7, #4]
 800f278:	681b      	ldr	r3, [r3, #0]
 800f27a:	2210      	movs	r2, #16
 800f27c:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx Event callback*/
          huart->RxEventCallback(huart, huart->RxXferSize);
#else
          /*Call legacy weak Rx Event callback*/
          HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800f27e:	687b      	ldr	r3, [r7, #4]
 800f280:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800f284:	4619      	mov	r1, r3
 800f286:	6878      	ldr	r0, [r7, #4]
 800f288:	f7f4 fec4 	bl	8004014 <HAL_UARTEx_RxEventCallback>
 800f28c:	e002      	b.n	800f294 <UART_RxISR_8BIT_FIFOEN+0x290>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx complete callback*/
          huart->RxCpltCallback(huart);
#else
          /*Call legacy weak Rx complete callback*/
          HAL_UART_RxCpltCallback(huart);
 800f28e:	6878      	ldr	r0, [r7, #4]
 800f290:	f7f4 feb6 	bl	8004000 <HAL_UART_RxCpltCallback>
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800f294:	f8b7 309e 	ldrh.w	r3, [r7, #158]	@ 0x9e
 800f298:	2b00      	cmp	r3, #0
 800f29a:	d006      	beq.n	800f2aa <UART_RxISR_8BIT_FIFOEN+0x2a6>
 800f29c:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800f2a0:	f003 0320 	and.w	r3, r3, #32
 800f2a4:	2b00      	cmp	r3, #0
 800f2a6:	f47f aed1 	bne.w	800f04c <UART_RxISR_8BIT_FIFOEN+0x48>

    /* When remaining number of bytes to receive is less than the RX FIFO
    threshold, next incoming frames are processed as if FIFO mode was
    disabled (i.e. one interrupt per received frame).
    */
    rxdatacount = huart->RxXferCount;
 800f2aa:	687b      	ldr	r3, [r7, #4]
 800f2ac:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f2b0:	f8a7 308a 	strh.w	r3, [r7, #138]	@ 0x8a
    if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
 800f2b4:	f8b7 308a 	ldrh.w	r3, [r7, #138]	@ 0x8a
 800f2b8:	2b00      	cmp	r3, #0
 800f2ba:	d049      	beq.n	800f350 <UART_RxISR_8BIT_FIFOEN+0x34c>
 800f2bc:	687b      	ldr	r3, [r7, #4]
 800f2be:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800f2c2:	f8b7 208a 	ldrh.w	r2, [r7, #138]	@ 0x8a
 800f2c6:	429a      	cmp	r2, r3
 800f2c8:	d242      	bcs.n	800f350 <UART_RxISR_8BIT_FIFOEN+0x34c>
    {
      /* Disable the UART RXFT interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 800f2ca:	687b      	ldr	r3, [r7, #4]
 800f2cc:	681b      	ldr	r3, [r3, #0]
 800f2ce:	3308      	adds	r3, #8
 800f2d0:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f2d2:	6a3b      	ldr	r3, [r7, #32]
 800f2d4:	e853 3f00 	ldrex	r3, [r3]
 800f2d8:	61fb      	str	r3, [r7, #28]
   return(result);
 800f2da:	69fb      	ldr	r3, [r7, #28]
 800f2dc:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 800f2e0:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800f2e4:	687b      	ldr	r3, [r7, #4]
 800f2e6:	681b      	ldr	r3, [r3, #0]
 800f2e8:	3308      	adds	r3, #8
 800f2ea:	f8d7 2084 	ldr.w	r2, [r7, #132]	@ 0x84
 800f2ee:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800f2f0:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f2f2:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800f2f4:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800f2f6:	e841 2300 	strex	r3, r2, [r1]
 800f2fa:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800f2fc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f2fe:	2b00      	cmp	r3, #0
 800f300:	d1e3      	bne.n	800f2ca <UART_RxISR_8BIT_FIFOEN+0x2c6>

      /* Update the RxISR function pointer */
      huart->RxISR = UART_RxISR_8BIT;
 800f302:	687b      	ldr	r3, [r7, #4]
 800f304:	4a16      	ldr	r2, [pc, #88]	@ (800f360 <UART_RxISR_8BIT_FIFOEN+0x35c>)
 800f306:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Enable the UART Data Register Not Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 800f308:	687b      	ldr	r3, [r7, #4]
 800f30a:	681b      	ldr	r3, [r3, #0]
 800f30c:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f30e:	68fb      	ldr	r3, [r7, #12]
 800f310:	e853 3f00 	ldrex	r3, [r3]
 800f314:	60bb      	str	r3, [r7, #8]
   return(result);
 800f316:	68bb      	ldr	r3, [r7, #8]
 800f318:	f043 0320 	orr.w	r3, r3, #32
 800f31c:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800f320:	687b      	ldr	r3, [r7, #4]
 800f322:	681b      	ldr	r3, [r3, #0]
 800f324:	461a      	mov	r2, r3
 800f326:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 800f32a:	61bb      	str	r3, [r7, #24]
 800f32c:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f32e:	6979      	ldr	r1, [r7, #20]
 800f330:	69ba      	ldr	r2, [r7, #24]
 800f332:	e841 2300 	strex	r3, r2, [r1]
 800f336:	613b      	str	r3, [r7, #16]
   return(result);
 800f338:	693b      	ldr	r3, [r7, #16]
 800f33a:	2b00      	cmp	r3, #0
 800f33c:	d1e4      	bne.n	800f308 <UART_RxISR_8BIT_FIFOEN+0x304>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800f33e:	e007      	b.n	800f350 <UART_RxISR_8BIT_FIFOEN+0x34c>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800f340:	687b      	ldr	r3, [r7, #4]
 800f342:	681b      	ldr	r3, [r3, #0]
 800f344:	699a      	ldr	r2, [r3, #24]
 800f346:	687b      	ldr	r3, [r7, #4]
 800f348:	681b      	ldr	r3, [r3, #0]
 800f34a:	f042 0208 	orr.w	r2, r2, #8
 800f34e:	619a      	str	r2, [r3, #24]
}
 800f350:	bf00      	nop
 800f352:	37b0      	adds	r7, #176	@ 0xb0
 800f354:	46bd      	mov	sp, r7
 800f356:	bd80      	pop	{r7, pc}
 800f358:	effffffe 	.word	0xeffffffe
 800f35c:	58000c00 	.word	0x58000c00
 800f360:	0800ec95 	.word	0x0800ec95

0800f364 <UART_RxISR_16BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800f364:	b580      	push	{r7, lr}
 800f366:	b0ae      	sub	sp, #184	@ 0xb8
 800f368:	af00      	add	r7, sp, #0
 800f36a:	6078      	str	r0, [r7, #4]
  uint16_t *tmp;
  uint16_t  uhMask = huart->Mask;
 800f36c:	687b      	ldr	r3, [r7, #4]
 800f36e:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800f372:	f8a7 30b2 	strh.w	r3, [r7, #178]	@ 0xb2
  uint16_t  uhdata;
  uint16_t  nb_rx_data;
  uint16_t  rxdatacount;
  uint32_t  isrflags = READ_REG(huart->Instance->ISR);
 800f376:	687b      	ldr	r3, [r7, #4]
 800f378:	681b      	ldr	r3, [r3, #0]
 800f37a:	69db      	ldr	r3, [r3, #28]
 800f37c:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
  uint32_t  cr1its   = READ_REG(huart->Instance->CR1);
 800f380:	687b      	ldr	r3, [r7, #4]
 800f382:	681b      	ldr	r3, [r3, #0]
 800f384:	681b      	ldr	r3, [r3, #0]
 800f386:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
  uint32_t  cr3its   = READ_REG(huart->Instance->CR3);
 800f38a:	687b      	ldr	r3, [r7, #4]
 800f38c:	681b      	ldr	r3, [r3, #0]
 800f38e:	689b      	ldr	r3, [r3, #8]
 800f390:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800f394:	687b      	ldr	r3, [r7, #4]
 800f396:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800f39a:	2b22      	cmp	r3, #34	@ 0x22
 800f39c:	f040 8184 	bne.w	800f6a8 <UART_RxISR_16BIT_FIFOEN+0x344>
  {
    nb_rx_data = huart->NbRxDataToProcess;
 800f3a0:	687b      	ldr	r3, [r7, #4]
 800f3a2:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800f3a6:	f8a7 30a6 	strh.w	r3, [r7, #166]	@ 0xa6
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800f3aa:	e127      	b.n	800f5fc <UART_RxISR_16BIT_FIFOEN+0x298>
    {
      uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800f3ac:	687b      	ldr	r3, [r7, #4]
 800f3ae:	681b      	ldr	r3, [r3, #0]
 800f3b0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800f3b2:	f8a7 30a4 	strh.w	r3, [r7, #164]	@ 0xa4
      tmp = (uint16_t *) huart->pRxBuffPtr ;
 800f3b6:	687b      	ldr	r3, [r7, #4]
 800f3b8:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f3ba:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
      *tmp = (uint16_t)(uhdata & uhMask);
 800f3be:	f8b7 20a4 	ldrh.w	r2, [r7, #164]	@ 0xa4
 800f3c2:	f8b7 30b2 	ldrh.w	r3, [r7, #178]	@ 0xb2
 800f3c6:	4013      	ands	r3, r2
 800f3c8:	b29a      	uxth	r2, r3
 800f3ca:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800f3ce:	801a      	strh	r2, [r3, #0]
      huart->pRxBuffPtr += 2U;
 800f3d0:	687b      	ldr	r3, [r7, #4]
 800f3d2:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f3d4:	1c9a      	adds	r2, r3, #2
 800f3d6:	687b      	ldr	r3, [r7, #4]
 800f3d8:	659a      	str	r2, [r3, #88]	@ 0x58
      huart->RxXferCount--;
 800f3da:	687b      	ldr	r3, [r7, #4]
 800f3dc:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f3e0:	b29b      	uxth	r3, r3
 800f3e2:	3b01      	subs	r3, #1
 800f3e4:	b29a      	uxth	r2, r3
 800f3e6:	687b      	ldr	r3, [r7, #4]
 800f3e8:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
      isrflags = READ_REG(huart->Instance->ISR);
 800f3ec:	687b      	ldr	r3, [r7, #4]
 800f3ee:	681b      	ldr	r3, [r3, #0]
 800f3f0:	69db      	ldr	r3, [r3, #28]
 800f3f2:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4

      /* If some non blocking errors occurred */
      if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
 800f3f6:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800f3fa:	f003 0307 	and.w	r3, r3, #7
 800f3fe:	2b00      	cmp	r3, #0
 800f400:	d053      	beq.n	800f4aa <UART_RxISR_16BIT_FIFOEN+0x146>
      {
        /* UART parity error interrupt occurred -------------------------------------*/
        if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 800f402:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800f406:	f003 0301 	and.w	r3, r3, #1
 800f40a:	2b00      	cmp	r3, #0
 800f40c:	d011      	beq.n	800f432 <UART_RxISR_16BIT_FIFOEN+0xce>
 800f40e:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800f412:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800f416:	2b00      	cmp	r3, #0
 800f418:	d00b      	beq.n	800f432 <UART_RxISR_16BIT_FIFOEN+0xce>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 800f41a:	687b      	ldr	r3, [r7, #4]
 800f41c:	681b      	ldr	r3, [r3, #0]
 800f41e:	2201      	movs	r2, #1
 800f420:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_PE;
 800f422:	687b      	ldr	r3, [r7, #4]
 800f424:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f428:	f043 0201 	orr.w	r2, r3, #1
 800f42c:	687b      	ldr	r3, [r7, #4]
 800f42e:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART frame error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800f432:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800f436:	f003 0302 	and.w	r3, r3, #2
 800f43a:	2b00      	cmp	r3, #0
 800f43c:	d011      	beq.n	800f462 <UART_RxISR_16BIT_FIFOEN+0xfe>
 800f43e:	f8d7 30a8 	ldr.w	r3, [r7, #168]	@ 0xa8
 800f442:	f003 0301 	and.w	r3, r3, #1
 800f446:	2b00      	cmp	r3, #0
 800f448:	d00b      	beq.n	800f462 <UART_RxISR_16BIT_FIFOEN+0xfe>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 800f44a:	687b      	ldr	r3, [r7, #4]
 800f44c:	681b      	ldr	r3, [r3, #0]
 800f44e:	2202      	movs	r2, #2
 800f450:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_FE;
 800f452:	687b      	ldr	r3, [r7, #4]
 800f454:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f458:	f043 0204 	orr.w	r2, r3, #4
 800f45c:	687b      	ldr	r3, [r7, #4]
 800f45e:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART noise error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800f462:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800f466:	f003 0304 	and.w	r3, r3, #4
 800f46a:	2b00      	cmp	r3, #0
 800f46c:	d011      	beq.n	800f492 <UART_RxISR_16BIT_FIFOEN+0x12e>
 800f46e:	f8d7 30a8 	ldr.w	r3, [r7, #168]	@ 0xa8
 800f472:	f003 0301 	and.w	r3, r3, #1
 800f476:	2b00      	cmp	r3, #0
 800f478:	d00b      	beq.n	800f492 <UART_RxISR_16BIT_FIFOEN+0x12e>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 800f47a:	687b      	ldr	r3, [r7, #4]
 800f47c:	681b      	ldr	r3, [r3, #0]
 800f47e:	2204      	movs	r2, #4
 800f480:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_NE;
 800f482:	687b      	ldr	r3, [r7, #4]
 800f484:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f488:	f043 0202 	orr.w	r2, r3, #2
 800f48c:	687b      	ldr	r3, [r7, #4]
 800f48e:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* Call UART Error Call back function if need be ----------------------------*/
        if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 800f492:	687b      	ldr	r3, [r7, #4]
 800f494:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f498:	2b00      	cmp	r3, #0
 800f49a:	d006      	beq.n	800f4aa <UART_RxISR_16BIT_FIFOEN+0x146>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 800f49c:	6878      	ldr	r0, [r7, #4]
 800f49e:	f7fe f961 	bl	800d764 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
          huart->ErrorCode = HAL_UART_ERROR_NONE;
 800f4a2:	687b      	ldr	r3, [r7, #4]
 800f4a4:	2200      	movs	r2, #0
 800f4a6:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }
      }

      if (huart->RxXferCount == 0U)
 800f4aa:	687b      	ldr	r3, [r7, #4]
 800f4ac:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f4b0:	b29b      	uxth	r3, r3
 800f4b2:	2b00      	cmp	r3, #0
 800f4b4:	f040 80a2 	bne.w	800f5fc <UART_RxISR_16BIT_FIFOEN+0x298>
      {
        /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800f4b8:	687b      	ldr	r3, [r7, #4]
 800f4ba:	681b      	ldr	r3, [r3, #0]
 800f4bc:	677b      	str	r3, [r7, #116]	@ 0x74
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f4be:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800f4c0:	e853 3f00 	ldrex	r3, [r3]
 800f4c4:	673b      	str	r3, [r7, #112]	@ 0x70
   return(result);
 800f4c6:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 800f4c8:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800f4cc:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
 800f4d0:	687b      	ldr	r3, [r7, #4]
 800f4d2:	681b      	ldr	r3, [r3, #0]
 800f4d4:	461a      	mov	r2, r3
 800f4d6:	f8d7 309c 	ldr.w	r3, [r7, #156]	@ 0x9c
 800f4da:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800f4de:	67fa      	str	r2, [r7, #124]	@ 0x7c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f4e0:	6ff9      	ldr	r1, [r7, #124]	@ 0x7c
 800f4e2:	f8d7 2080 	ldr.w	r2, [r7, #128]	@ 0x80
 800f4e6:	e841 2300 	strex	r3, r2, [r1]
 800f4ea:	67bb      	str	r3, [r7, #120]	@ 0x78
   return(result);
 800f4ec:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800f4ee:	2b00      	cmp	r3, #0
 800f4f0:	d1e2      	bne.n	800f4b8 <UART_RxISR_16BIT_FIFOEN+0x154>

        /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
           and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800f4f2:	687b      	ldr	r3, [r7, #4]
 800f4f4:	681b      	ldr	r3, [r3, #0]
 800f4f6:	3308      	adds	r3, #8
 800f4f8:	663b      	str	r3, [r7, #96]	@ 0x60
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f4fa:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800f4fc:	e853 3f00 	ldrex	r3, [r3]
 800f500:	65fb      	str	r3, [r7, #92]	@ 0x5c
   return(result);
 800f502:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 800f504:	4b6e      	ldr	r3, [pc, #440]	@ (800f6c0 <UART_RxISR_16BIT_FIFOEN+0x35c>)
 800f506:	4013      	ands	r3, r2
 800f508:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 800f50c:	687b      	ldr	r3, [r7, #4]
 800f50e:	681b      	ldr	r3, [r3, #0]
 800f510:	3308      	adds	r3, #8
 800f512:	f8d7 2098 	ldr.w	r2, [r7, #152]	@ 0x98
 800f516:	66fa      	str	r2, [r7, #108]	@ 0x6c
 800f518:	66bb      	str	r3, [r7, #104]	@ 0x68
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f51a:	6eb9      	ldr	r1, [r7, #104]	@ 0x68
 800f51c:	6efa      	ldr	r2, [r7, #108]	@ 0x6c
 800f51e:	e841 2300 	strex	r3, r2, [r1]
 800f522:	667b      	str	r3, [r7, #100]	@ 0x64
   return(result);
 800f524:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800f526:	2b00      	cmp	r3, #0
 800f528:	d1e3      	bne.n	800f4f2 <UART_RxISR_16BIT_FIFOEN+0x18e>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 800f52a:	687b      	ldr	r3, [r7, #4]
 800f52c:	2220      	movs	r2, #32
 800f52e:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 800f532:	687b      	ldr	r3, [r7, #4]
 800f534:	2200      	movs	r2, #0
 800f536:	675a      	str	r2, [r3, #116]	@ 0x74

        /* Initialize type of RxEvent to Transfer Complete */
        huart->RxEventType = HAL_UART_RXEVENT_TC;
 800f538:	687b      	ldr	r3, [r7, #4]
 800f53a:	2200      	movs	r2, #0
 800f53c:	671a      	str	r2, [r3, #112]	@ 0x70

        if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800f53e:	687b      	ldr	r3, [r7, #4]
 800f540:	681b      	ldr	r3, [r3, #0]
 800f542:	4a60      	ldr	r2, [pc, #384]	@ (800f6c4 <UART_RxISR_16BIT_FIFOEN+0x360>)
 800f544:	4293      	cmp	r3, r2
 800f546:	d021      	beq.n	800f58c <UART_RxISR_16BIT_FIFOEN+0x228>
        {
          /* Check that USART RTOEN bit is set */
          if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800f548:	687b      	ldr	r3, [r7, #4]
 800f54a:	681b      	ldr	r3, [r3, #0]
 800f54c:	685b      	ldr	r3, [r3, #4]
 800f54e:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800f552:	2b00      	cmp	r3, #0
 800f554:	d01a      	beq.n	800f58c <UART_RxISR_16BIT_FIFOEN+0x228>
          {
            /* Enable the UART Receiver Timeout Interrupt */
            ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800f556:	687b      	ldr	r3, [r7, #4]
 800f558:	681b      	ldr	r3, [r3, #0]
 800f55a:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f55c:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800f55e:	e853 3f00 	ldrex	r3, [r3]
 800f562:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 800f564:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800f566:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800f56a:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800f56e:	687b      	ldr	r3, [r7, #4]
 800f570:	681b      	ldr	r3, [r3, #0]
 800f572:	461a      	mov	r2, r3
 800f574:	f8d7 3094 	ldr.w	r3, [r7, #148]	@ 0x94
 800f578:	65bb      	str	r3, [r7, #88]	@ 0x58
 800f57a:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f57c:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 800f57e:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800f580:	e841 2300 	strex	r3, r2, [r1]
 800f584:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 800f586:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800f588:	2b00      	cmp	r3, #0
 800f58a:	d1e4      	bne.n	800f556 <UART_RxISR_16BIT_FIFOEN+0x1f2>
          }
        }

        /* Check current reception Mode :
           If Reception till IDLE event has been selected : */
        if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800f58c:	687b      	ldr	r3, [r7, #4]
 800f58e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800f590:	2b01      	cmp	r3, #1
 800f592:	d130      	bne.n	800f5f6 <UART_RxISR_16BIT_FIFOEN+0x292>
        {
          /* Set reception type to Standard */
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800f594:	687b      	ldr	r3, [r7, #4]
 800f596:	2200      	movs	r2, #0
 800f598:	66da      	str	r2, [r3, #108]	@ 0x6c

          /* Disable IDLE interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800f59a:	687b      	ldr	r3, [r7, #4]
 800f59c:	681b      	ldr	r3, [r3, #0]
 800f59e:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f5a0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f5a2:	e853 3f00 	ldrex	r3, [r3]
 800f5a6:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800f5a8:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f5aa:	f023 0310 	bic.w	r3, r3, #16
 800f5ae:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 800f5b2:	687b      	ldr	r3, [r7, #4]
 800f5b4:	681b      	ldr	r3, [r3, #0]
 800f5b6:	461a      	mov	r2, r3
 800f5b8:	f8d7 3090 	ldr.w	r3, [r7, #144]	@ 0x90
 800f5bc:	647b      	str	r3, [r7, #68]	@ 0x44
 800f5be:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f5c0:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800f5c2:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800f5c4:	e841 2300 	strex	r3, r2, [r1]
 800f5c8:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800f5ca:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800f5cc:	2b00      	cmp	r3, #0
 800f5ce:	d1e4      	bne.n	800f59a <UART_RxISR_16BIT_FIFOEN+0x236>

          if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800f5d0:	687b      	ldr	r3, [r7, #4]
 800f5d2:	681b      	ldr	r3, [r3, #0]
 800f5d4:	69db      	ldr	r3, [r3, #28]
 800f5d6:	f003 0310 	and.w	r3, r3, #16
 800f5da:	2b10      	cmp	r3, #16
 800f5dc:	d103      	bne.n	800f5e6 <UART_RxISR_16BIT_FIFOEN+0x282>
          {
            /* Clear IDLE Flag */
            __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800f5de:	687b      	ldr	r3, [r7, #4]
 800f5e0:	681b      	ldr	r3, [r3, #0]
 800f5e2:	2210      	movs	r2, #16
 800f5e4:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx Event callback*/
          huart->RxEventCallback(huart, huart->RxXferSize);
#else
          /*Call legacy weak Rx Event callback*/
          HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800f5e6:	687b      	ldr	r3, [r7, #4]
 800f5e8:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800f5ec:	4619      	mov	r1, r3
 800f5ee:	6878      	ldr	r0, [r7, #4]
 800f5f0:	f7f4 fd10 	bl	8004014 <HAL_UARTEx_RxEventCallback>
 800f5f4:	e002      	b.n	800f5fc <UART_RxISR_16BIT_FIFOEN+0x298>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx complete callback*/
          huart->RxCpltCallback(huart);
#else
          /*Call legacy weak Rx complete callback*/
          HAL_UART_RxCpltCallback(huart);
 800f5f6:	6878      	ldr	r0, [r7, #4]
 800f5f8:	f7f4 fd02 	bl	8004000 <HAL_UART_RxCpltCallback>
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800f5fc:	f8b7 30a6 	ldrh.w	r3, [r7, #166]	@ 0xa6
 800f600:	2b00      	cmp	r3, #0
 800f602:	d006      	beq.n	800f612 <UART_RxISR_16BIT_FIFOEN+0x2ae>
 800f604:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800f608:	f003 0320 	and.w	r3, r3, #32
 800f60c:	2b00      	cmp	r3, #0
 800f60e:	f47f aecd 	bne.w	800f3ac <UART_RxISR_16BIT_FIFOEN+0x48>

    /* When remaining number of bytes to receive is less than the RX FIFO
    threshold, next incoming frames are processed as if FIFO mode was
    disabled (i.e. one interrupt per received frame).
    */
    rxdatacount = huart->RxXferCount;
 800f612:	687b      	ldr	r3, [r7, #4]
 800f614:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f618:	f8a7 308e 	strh.w	r3, [r7, #142]	@ 0x8e
    if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
 800f61c:	f8b7 308e 	ldrh.w	r3, [r7, #142]	@ 0x8e
 800f620:	2b00      	cmp	r3, #0
 800f622:	d049      	beq.n	800f6b8 <UART_RxISR_16BIT_FIFOEN+0x354>
 800f624:	687b      	ldr	r3, [r7, #4]
 800f626:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800f62a:	f8b7 208e 	ldrh.w	r2, [r7, #142]	@ 0x8e
 800f62e:	429a      	cmp	r2, r3
 800f630:	d242      	bcs.n	800f6b8 <UART_RxISR_16BIT_FIFOEN+0x354>
    {
      /* Disable the UART RXFT interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 800f632:	687b      	ldr	r3, [r7, #4]
 800f634:	681b      	ldr	r3, [r3, #0]
 800f636:	3308      	adds	r3, #8
 800f638:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f63a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f63c:	e853 3f00 	ldrex	r3, [r3]
 800f640:	623b      	str	r3, [r7, #32]
   return(result);
 800f642:	6a3b      	ldr	r3, [r7, #32]
 800f644:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 800f648:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
 800f64c:	687b      	ldr	r3, [r7, #4]
 800f64e:	681b      	ldr	r3, [r3, #0]
 800f650:	3308      	adds	r3, #8
 800f652:	f8d7 2088 	ldr.w	r2, [r7, #136]	@ 0x88
 800f656:	633a      	str	r2, [r7, #48]	@ 0x30
 800f658:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f65a:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800f65c:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800f65e:	e841 2300 	strex	r3, r2, [r1]
 800f662:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800f664:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800f666:	2b00      	cmp	r3, #0
 800f668:	d1e3      	bne.n	800f632 <UART_RxISR_16BIT_FIFOEN+0x2ce>

      /* Update the RxISR function pointer */
      huart->RxISR = UART_RxISR_16BIT;
 800f66a:	687b      	ldr	r3, [r7, #4]
 800f66c:	4a16      	ldr	r2, [pc, #88]	@ (800f6c8 <UART_RxISR_16BIT_FIFOEN+0x364>)
 800f66e:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Enable the UART Data Register Not Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 800f670:	687b      	ldr	r3, [r7, #4]
 800f672:	681b      	ldr	r3, [r3, #0]
 800f674:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f676:	693b      	ldr	r3, [r7, #16]
 800f678:	e853 3f00 	ldrex	r3, [r3]
 800f67c:	60fb      	str	r3, [r7, #12]
   return(result);
 800f67e:	68fb      	ldr	r3, [r7, #12]
 800f680:	f043 0320 	orr.w	r3, r3, #32
 800f684:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800f688:	687b      	ldr	r3, [r7, #4]
 800f68a:	681b      	ldr	r3, [r3, #0]
 800f68c:	461a      	mov	r2, r3
 800f68e:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 800f692:	61fb      	str	r3, [r7, #28]
 800f694:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f696:	69b9      	ldr	r1, [r7, #24]
 800f698:	69fa      	ldr	r2, [r7, #28]
 800f69a:	e841 2300 	strex	r3, r2, [r1]
 800f69e:	617b      	str	r3, [r7, #20]
   return(result);
 800f6a0:	697b      	ldr	r3, [r7, #20]
 800f6a2:	2b00      	cmp	r3, #0
 800f6a4:	d1e4      	bne.n	800f670 <UART_RxISR_16BIT_FIFOEN+0x30c>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800f6a6:	e007      	b.n	800f6b8 <UART_RxISR_16BIT_FIFOEN+0x354>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800f6a8:	687b      	ldr	r3, [r7, #4]
 800f6aa:	681b      	ldr	r3, [r3, #0]
 800f6ac:	699a      	ldr	r2, [r3, #24]
 800f6ae:	687b      	ldr	r3, [r7, #4]
 800f6b0:	681b      	ldr	r3, [r3, #0]
 800f6b2:	f042 0208 	orr.w	r2, r2, #8
 800f6b6:	619a      	str	r2, [r3, #24]
}
 800f6b8:	bf00      	nop
 800f6ba:	37b8      	adds	r7, #184	@ 0xb8
 800f6bc:	46bd      	mov	sp, r7
 800f6be:	bd80      	pop	{r7, pc}
 800f6c0:	effffffe 	.word	0xeffffffe
 800f6c4:	58000c00 	.word	0x58000c00
 800f6c8:	0800ee4d 	.word	0x0800ee4d

0800f6cc <HAL_UARTEx_WakeupCallback>:
  * @brief UART wakeup from Stop mode callback.
  * @param huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
{
 800f6cc:	b480      	push	{r7}
 800f6ce:	b083      	sub	sp, #12
 800f6d0:	af00      	add	r7, sp, #0
 800f6d2:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_WakeupCallback can be implemented in the user file.
   */
}
 800f6d4:	bf00      	nop
 800f6d6:	370c      	adds	r7, #12
 800f6d8:	46bd      	mov	sp, r7
 800f6da:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f6de:	4770      	bx	lr

0800f6e0 <HAL_UARTEx_RxFifoFullCallback>:
  * @brief  UART RX Fifo full callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart)
{
 800f6e0:	b480      	push	{r7}
 800f6e2:	b083      	sub	sp, #12
 800f6e4:	af00      	add	r7, sp, #0
 800f6e6:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_RxFifoFullCallback can be implemented in the user file.
   */
}
 800f6e8:	bf00      	nop
 800f6ea:	370c      	adds	r7, #12
 800f6ec:	46bd      	mov	sp, r7
 800f6ee:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f6f2:	4770      	bx	lr

0800f6f4 <HAL_UARTEx_TxFifoEmptyCallback>:
  * @brief  UART TX Fifo empty callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart)
{
 800f6f4:	b480      	push	{r7}
 800f6f6:	b083      	sub	sp, #12
 800f6f8:	af00      	add	r7, sp, #0
 800f6fa:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_TxFifoEmptyCallback can be implemented in the user file.
   */
}
 800f6fc:	bf00      	nop
 800f6fe:	370c      	adds	r7, #12
 800f700:	46bd      	mov	sp, r7
 800f702:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f706:	4770      	bx	lr

0800f708 <HAL_UARTEx_DisableFifoMode>:
  * @brief  Disable the FIFO mode.
  * @param huart      UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart)
{
 800f708:	b480      	push	{r7}
 800f70a:	b085      	sub	sp, #20
 800f70c:	af00      	add	r7, sp, #0
 800f70e:	6078      	str	r0, [r7, #4]

  /* Check parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));

  /* Process Locked */
  __HAL_LOCK(huart);
 800f710:	687b      	ldr	r3, [r7, #4]
 800f712:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 800f716:	2b01      	cmp	r3, #1
 800f718:	d101      	bne.n	800f71e <HAL_UARTEx_DisableFifoMode+0x16>
 800f71a:	2302      	movs	r3, #2
 800f71c:	e027      	b.n	800f76e <HAL_UARTEx_DisableFifoMode+0x66>
 800f71e:	687b      	ldr	r3, [r7, #4]
 800f720:	2201      	movs	r2, #1
 800f722:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 800f726:	687b      	ldr	r3, [r7, #4]
 800f728:	2224      	movs	r2, #36	@ 0x24
 800f72a:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 800f72e:	687b      	ldr	r3, [r7, #4]
 800f730:	681b      	ldr	r3, [r3, #0]
 800f732:	681b      	ldr	r3, [r3, #0]
 800f734:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 800f736:	687b      	ldr	r3, [r7, #4]
 800f738:	681b      	ldr	r3, [r3, #0]
 800f73a:	681a      	ldr	r2, [r3, #0]
 800f73c:	687b      	ldr	r3, [r7, #4]
 800f73e:	681b      	ldr	r3, [r3, #0]
 800f740:	f022 0201 	bic.w	r2, r2, #1
 800f744:	601a      	str	r2, [r3, #0]

  /* Enable FIFO mode */
  CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN);
 800f746:	68fb      	ldr	r3, [r7, #12]
 800f748:	f023 5300 	bic.w	r3, r3, #536870912	@ 0x20000000
 800f74c:	60fb      	str	r3, [r7, #12]
  huart->FifoMode = UART_FIFOMODE_DISABLE;
 800f74e:	687b      	ldr	r3, [r7, #4]
 800f750:	2200      	movs	r2, #0
 800f752:	665a      	str	r2, [r3, #100]	@ 0x64

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 800f754:	687b      	ldr	r3, [r7, #4]
 800f756:	681b      	ldr	r3, [r3, #0]
 800f758:	68fa      	ldr	r2, [r7, #12]
 800f75a:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 800f75c:	687b      	ldr	r3, [r7, #4]
 800f75e:	2220      	movs	r2, #32
 800f760:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 800f764:	687b      	ldr	r3, [r7, #4]
 800f766:	2200      	movs	r2, #0
 800f768:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 800f76c:	2300      	movs	r3, #0
}
 800f76e:	4618      	mov	r0, r3
 800f770:	3714      	adds	r7, #20
 800f772:	46bd      	mov	sp, r7
 800f774:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f778:	4770      	bx	lr

0800f77a <HAL_UARTEx_SetTxFifoThreshold>:
  *            @arg @ref UART_TXFIFO_THRESHOLD_7_8
  *            @arg @ref UART_TXFIFO_THRESHOLD_8_8
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
{
 800f77a:	b580      	push	{r7, lr}
 800f77c:	b084      	sub	sp, #16
 800f77e:	af00      	add	r7, sp, #0
 800f780:	6078      	str	r0, [r7, #4]
 800f782:	6039      	str	r1, [r7, #0]
  /* Check parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
  assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold));

  /* Process Locked */
  __HAL_LOCK(huart);
 800f784:	687b      	ldr	r3, [r7, #4]
 800f786:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 800f78a:	2b01      	cmp	r3, #1
 800f78c:	d101      	bne.n	800f792 <HAL_UARTEx_SetTxFifoThreshold+0x18>
 800f78e:	2302      	movs	r3, #2
 800f790:	e02d      	b.n	800f7ee <HAL_UARTEx_SetTxFifoThreshold+0x74>
 800f792:	687b      	ldr	r3, [r7, #4]
 800f794:	2201      	movs	r2, #1
 800f796:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 800f79a:	687b      	ldr	r3, [r7, #4]
 800f79c:	2224      	movs	r2, #36	@ 0x24
 800f79e:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 800f7a2:	687b      	ldr	r3, [r7, #4]
 800f7a4:	681b      	ldr	r3, [r3, #0]
 800f7a6:	681b      	ldr	r3, [r3, #0]
 800f7a8:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 800f7aa:	687b      	ldr	r3, [r7, #4]
 800f7ac:	681b      	ldr	r3, [r3, #0]
 800f7ae:	681a      	ldr	r2, [r3, #0]
 800f7b0:	687b      	ldr	r3, [r7, #4]
 800f7b2:	681b      	ldr	r3, [r3, #0]
 800f7b4:	f022 0201 	bic.w	r2, r2, #1
 800f7b8:	601a      	str	r2, [r3, #0]

  /* Update TX threshold configuration */
  MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold);
 800f7ba:	687b      	ldr	r3, [r7, #4]
 800f7bc:	681b      	ldr	r3, [r3, #0]
 800f7be:	689b      	ldr	r3, [r3, #8]
 800f7c0:	f023 4160 	bic.w	r1, r3, #3758096384	@ 0xe0000000
 800f7c4:	687b      	ldr	r3, [r7, #4]
 800f7c6:	681b      	ldr	r3, [r3, #0]
 800f7c8:	683a      	ldr	r2, [r7, #0]
 800f7ca:	430a      	orrs	r2, r1
 800f7cc:	609a      	str	r2, [r3, #8]

  /* Determine the number of data to process during RX/TX ISR execution */
  UARTEx_SetNbDataToProcess(huart);
 800f7ce:	6878      	ldr	r0, [r7, #4]
 800f7d0:	f000 f8a0 	bl	800f914 <UARTEx_SetNbDataToProcess>

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 800f7d4:	687b      	ldr	r3, [r7, #4]
 800f7d6:	681b      	ldr	r3, [r3, #0]
 800f7d8:	68fa      	ldr	r2, [r7, #12]
 800f7da:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 800f7dc:	687b      	ldr	r3, [r7, #4]
 800f7de:	2220      	movs	r2, #32
 800f7e0:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 800f7e4:	687b      	ldr	r3, [r7, #4]
 800f7e6:	2200      	movs	r2, #0
 800f7e8:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 800f7ec:	2300      	movs	r3, #0
}
 800f7ee:	4618      	mov	r0, r3
 800f7f0:	3710      	adds	r7, #16
 800f7f2:	46bd      	mov	sp, r7
 800f7f4:	bd80      	pop	{r7, pc}

0800f7f6 <HAL_UARTEx_SetRxFifoThreshold>:
  *            @arg @ref UART_RXFIFO_THRESHOLD_7_8
  *            @arg @ref UART_RXFIFO_THRESHOLD_8_8
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
{
 800f7f6:	b580      	push	{r7, lr}
 800f7f8:	b084      	sub	sp, #16
 800f7fa:	af00      	add	r7, sp, #0
 800f7fc:	6078      	str	r0, [r7, #4]
 800f7fe:	6039      	str	r1, [r7, #0]
  /* Check the parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
  assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold));

  /* Process Locked */
  __HAL_LOCK(huart);
 800f800:	687b      	ldr	r3, [r7, #4]
 800f802:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 800f806:	2b01      	cmp	r3, #1
 800f808:	d101      	bne.n	800f80e <HAL_UARTEx_SetRxFifoThreshold+0x18>
 800f80a:	2302      	movs	r3, #2
 800f80c:	e02d      	b.n	800f86a <HAL_UARTEx_SetRxFifoThreshold+0x74>
 800f80e:	687b      	ldr	r3, [r7, #4]
 800f810:	2201      	movs	r2, #1
 800f812:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 800f816:	687b      	ldr	r3, [r7, #4]
 800f818:	2224      	movs	r2, #36	@ 0x24
 800f81a:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 800f81e:	687b      	ldr	r3, [r7, #4]
 800f820:	681b      	ldr	r3, [r3, #0]
 800f822:	681b      	ldr	r3, [r3, #0]
 800f824:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 800f826:	687b      	ldr	r3, [r7, #4]
 800f828:	681b      	ldr	r3, [r3, #0]
 800f82a:	681a      	ldr	r2, [r3, #0]
 800f82c:	687b      	ldr	r3, [r7, #4]
 800f82e:	681b      	ldr	r3, [r3, #0]
 800f830:	f022 0201 	bic.w	r2, r2, #1
 800f834:	601a      	str	r2, [r3, #0]

  /* Update RX threshold configuration */
  MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold);
 800f836:	687b      	ldr	r3, [r7, #4]
 800f838:	681b      	ldr	r3, [r3, #0]
 800f83a:	689b      	ldr	r3, [r3, #8]
 800f83c:	f023 6160 	bic.w	r1, r3, #234881024	@ 0xe000000
 800f840:	687b      	ldr	r3, [r7, #4]
 800f842:	681b      	ldr	r3, [r3, #0]
 800f844:	683a      	ldr	r2, [r7, #0]
 800f846:	430a      	orrs	r2, r1
 800f848:	609a      	str	r2, [r3, #8]

  /* Determine the number of data to process during RX/TX ISR execution */
  UARTEx_SetNbDataToProcess(huart);
 800f84a:	6878      	ldr	r0, [r7, #4]
 800f84c:	f000 f862 	bl	800f914 <UARTEx_SetNbDataToProcess>

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 800f850:	687b      	ldr	r3, [r7, #4]
 800f852:	681b      	ldr	r3, [r3, #0]
 800f854:	68fa      	ldr	r2, [r7, #12]
 800f856:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 800f858:	687b      	ldr	r3, [r7, #4]
 800f85a:	2220      	movs	r2, #32
 800f85c:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 800f860:	687b      	ldr	r3, [r7, #4]
 800f862:	2200      	movs	r2, #0
 800f864:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 800f868:	2300      	movs	r3, #0
}
 800f86a:	4618      	mov	r0, r3
 800f86c:	3710      	adds	r7, #16
 800f86e:	46bd      	mov	sp, r7
 800f870:	bd80      	pop	{r7, pc}

0800f872 <HAL_UARTEx_ReceiveToIdle_IT>:
  * @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
  * @param Size  Amount of data elements (uint8_t or uint16_t) to be received.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
{
 800f872:	b580      	push	{r7, lr}
 800f874:	b08c      	sub	sp, #48	@ 0x30
 800f876:	af00      	add	r7, sp, #0
 800f878:	60f8      	str	r0, [r7, #12]
 800f87a:	60b9      	str	r1, [r7, #8]
 800f87c:	4613      	mov	r3, r2
 800f87e:	80fb      	strh	r3, [r7, #6]
  HAL_StatusTypeDef status = HAL_OK;
 800f880:	2300      	movs	r3, #0
 800f882:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f

  /* Check that a Rx process is not already ongoing */
  if (huart->RxState == HAL_UART_STATE_READY)
 800f886:	68fb      	ldr	r3, [r7, #12]
 800f888:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800f88c:	2b20      	cmp	r3, #32
 800f88e:	d13b      	bne.n	800f908 <HAL_UARTEx_ReceiveToIdle_IT+0x96>
  {
    if ((pData == NULL) || (Size == 0U))
 800f890:	68bb      	ldr	r3, [r7, #8]
 800f892:	2b00      	cmp	r3, #0
 800f894:	d002      	beq.n	800f89c <HAL_UARTEx_ReceiveToIdle_IT+0x2a>
 800f896:	88fb      	ldrh	r3, [r7, #6]
 800f898:	2b00      	cmp	r3, #0
 800f89a:	d101      	bne.n	800f8a0 <HAL_UARTEx_ReceiveToIdle_IT+0x2e>
    {
      return HAL_ERROR;
 800f89c:	2301      	movs	r3, #1
 800f89e:	e034      	b.n	800f90a <HAL_UARTEx_ReceiveToIdle_IT+0x98>
    }

    /* Set Reception type to reception till IDLE Event*/
    huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
 800f8a0:	68fb      	ldr	r3, [r7, #12]
 800f8a2:	2201      	movs	r2, #1
 800f8a4:	66da      	str	r2, [r3, #108]	@ 0x6c
    huart->RxEventType = HAL_UART_RXEVENT_TC;
 800f8a6:	68fb      	ldr	r3, [r7, #12]
 800f8a8:	2200      	movs	r2, #0
 800f8aa:	671a      	str	r2, [r3, #112]	@ 0x70

    (void)UART_Start_Receive_IT(huart, pData, Size);
 800f8ac:	88fb      	ldrh	r3, [r7, #6]
 800f8ae:	461a      	mov	r2, r3
 800f8b0:	68b9      	ldr	r1, [r7, #8]
 800f8b2:	68f8      	ldr	r0, [r7, #12]
 800f8b4:	f7fe fe82 	bl	800e5bc <UART_Start_Receive_IT>

    if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800f8b8:	68fb      	ldr	r3, [r7, #12]
 800f8ba:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800f8bc:	2b01      	cmp	r3, #1
 800f8be:	d11d      	bne.n	800f8fc <HAL_UARTEx_ReceiveToIdle_IT+0x8a>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800f8c0:	68fb      	ldr	r3, [r7, #12]
 800f8c2:	681b      	ldr	r3, [r3, #0]
 800f8c4:	2210      	movs	r2, #16
 800f8c6:	621a      	str	r2, [r3, #32]
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800f8c8:	68fb      	ldr	r3, [r7, #12]
 800f8ca:	681b      	ldr	r3, [r3, #0]
 800f8cc:	61bb      	str	r3, [r7, #24]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f8ce:	69bb      	ldr	r3, [r7, #24]
 800f8d0:	e853 3f00 	ldrex	r3, [r3]
 800f8d4:	617b      	str	r3, [r7, #20]
   return(result);
 800f8d6:	697b      	ldr	r3, [r7, #20]
 800f8d8:	f043 0310 	orr.w	r3, r3, #16
 800f8dc:	62bb      	str	r3, [r7, #40]	@ 0x28
 800f8de:	68fb      	ldr	r3, [r7, #12]
 800f8e0:	681b      	ldr	r3, [r3, #0]
 800f8e2:	461a      	mov	r2, r3
 800f8e4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800f8e6:	627b      	str	r3, [r7, #36]	@ 0x24
 800f8e8:	623a      	str	r2, [r7, #32]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f8ea:	6a39      	ldr	r1, [r7, #32]
 800f8ec:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 800f8ee:	e841 2300 	strex	r3, r2, [r1]
 800f8f2:	61fb      	str	r3, [r7, #28]
   return(result);
 800f8f4:	69fb      	ldr	r3, [r7, #28]
 800f8f6:	2b00      	cmp	r3, #0
 800f8f8:	d1e6      	bne.n	800f8c8 <HAL_UARTEx_ReceiveToIdle_IT+0x56>
 800f8fa:	e002      	b.n	800f902 <HAL_UARTEx_ReceiveToIdle_IT+0x90>
    {
      /* In case of errors already pending when reception is started,
         Interrupts may have already been raised and lead to reception abortion.
         (Overrun error for instance).
         In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
      status = HAL_ERROR;
 800f8fc:	2301      	movs	r3, #1
 800f8fe:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
    }

    return status;
 800f902:	f897 302f 	ldrb.w	r3, [r7, #47]	@ 0x2f
 800f906:	e000      	b.n	800f90a <HAL_UARTEx_ReceiveToIdle_IT+0x98>
  }
  else
  {
    return HAL_BUSY;
 800f908:	2302      	movs	r3, #2
  }
}
 800f90a:	4618      	mov	r0, r3
 800f90c:	3730      	adds	r7, #48	@ 0x30
 800f90e:	46bd      	mov	sp, r7
 800f910:	bd80      	pop	{r7, pc}
	...

0800f914 <UARTEx_SetNbDataToProcess>:
  *       the UART configuration registers.
  * @param huart UART handle.
  * @retval None
  */
static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart)
{
 800f914:	b480      	push	{r7}
 800f916:	b085      	sub	sp, #20
 800f918:	af00      	add	r7, sp, #0
 800f91a:	6078      	str	r0, [r7, #4]
  uint8_t rx_fifo_threshold;
  uint8_t tx_fifo_threshold;
  static const uint8_t numerator[] = {1U, 1U, 1U, 3U, 7U, 1U, 0U, 0U};
  static const uint8_t denominator[] = {8U, 4U, 2U, 4U, 8U, 1U, 1U, 1U};

  if (huart->FifoMode == UART_FIFOMODE_DISABLE)
 800f91c:	687b      	ldr	r3, [r7, #4]
 800f91e:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800f920:	2b00      	cmp	r3, #0
 800f922:	d108      	bne.n	800f936 <UARTEx_SetNbDataToProcess+0x22>
  {
    huart->NbTxDataToProcess = 1U;
 800f924:	687b      	ldr	r3, [r7, #4]
 800f926:	2201      	movs	r2, #1
 800f928:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
    huart->NbRxDataToProcess = 1U;
 800f92c:	687b      	ldr	r3, [r7, #4]
 800f92e:	2201      	movs	r2, #1
 800f930:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
                               (uint16_t)denominator[tx_fifo_threshold];
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
                               (uint16_t)denominator[rx_fifo_threshold];
  }
}
 800f934:	e031      	b.n	800f99a <UARTEx_SetNbDataToProcess+0x86>
    rx_fifo_depth = RX_FIFO_DEPTH;
 800f936:	2310      	movs	r3, #16
 800f938:	73fb      	strb	r3, [r7, #15]
    tx_fifo_depth = TX_FIFO_DEPTH;
 800f93a:	2310      	movs	r3, #16
 800f93c:	73bb      	strb	r3, [r7, #14]
    rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
 800f93e:	687b      	ldr	r3, [r7, #4]
 800f940:	681b      	ldr	r3, [r3, #0]
 800f942:	689b      	ldr	r3, [r3, #8]
 800f944:	0e5b      	lsrs	r3, r3, #25
 800f946:	b2db      	uxtb	r3, r3
 800f948:	f003 0307 	and.w	r3, r3, #7
 800f94c:	737b      	strb	r3, [r7, #13]
    tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
 800f94e:	687b      	ldr	r3, [r7, #4]
 800f950:	681b      	ldr	r3, [r3, #0]
 800f952:	689b      	ldr	r3, [r3, #8]
 800f954:	0f5b      	lsrs	r3, r3, #29
 800f956:	b2db      	uxtb	r3, r3
 800f958:	f003 0307 	and.w	r3, r3, #7
 800f95c:	733b      	strb	r3, [r7, #12]
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
 800f95e:	7bbb      	ldrb	r3, [r7, #14]
 800f960:	7b3a      	ldrb	r2, [r7, #12]
 800f962:	4911      	ldr	r1, [pc, #68]	@ (800f9a8 <UARTEx_SetNbDataToProcess+0x94>)
 800f964:	5c8a      	ldrb	r2, [r1, r2]
 800f966:	fb02 f303 	mul.w	r3, r2, r3
                               (uint16_t)denominator[tx_fifo_threshold];
 800f96a:	7b3a      	ldrb	r2, [r7, #12]
 800f96c:	490f      	ldr	r1, [pc, #60]	@ (800f9ac <UARTEx_SetNbDataToProcess+0x98>)
 800f96e:	5c8a      	ldrb	r2, [r1, r2]
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
 800f970:	fb93 f3f2 	sdiv	r3, r3, r2
 800f974:	b29a      	uxth	r2, r3
 800f976:	687b      	ldr	r3, [r7, #4]
 800f978:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
 800f97c:	7bfb      	ldrb	r3, [r7, #15]
 800f97e:	7b7a      	ldrb	r2, [r7, #13]
 800f980:	4909      	ldr	r1, [pc, #36]	@ (800f9a8 <UARTEx_SetNbDataToProcess+0x94>)
 800f982:	5c8a      	ldrb	r2, [r1, r2]
 800f984:	fb02 f303 	mul.w	r3, r2, r3
                               (uint16_t)denominator[rx_fifo_threshold];
 800f988:	7b7a      	ldrb	r2, [r7, #13]
 800f98a:	4908      	ldr	r1, [pc, #32]	@ (800f9ac <UARTEx_SetNbDataToProcess+0x98>)
 800f98c:	5c8a      	ldrb	r2, [r1, r2]
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
 800f98e:	fb93 f3f2 	sdiv	r3, r3, r2
 800f992:	b29a      	uxth	r2, r3
 800f994:	687b      	ldr	r3, [r7, #4]
 800f996:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
}
 800f99a:	bf00      	nop
 800f99c:	3714      	adds	r7, #20
 800f99e:	46bd      	mov	sp, r7
 800f9a0:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f9a4:	4770      	bx	lr
 800f9a6:	bf00      	nop
 800f9a8:	08030aac 	.word	0x08030aac
 800f9ac:	08030ab4 	.word	0x08030ab4

0800f9b0 <tcpip_init_wrap>:
/* USER CODE END OS_THREAD_ATTR_CMSIS_RTOS_V2 */

/* USER CODE BEGIN 2 */
/* ETH_CODE: workaround to call LOCK_TCPIP_CORE after tcpip_init in MX_LWIP_Init
 * This is to keep the code after MX code re-generation */
static inline void tcpip_init_wrap(tcpip_init_done_fn tcpip_init_done, void *arg){
 800f9b0:	b580      	push	{r7, lr}
 800f9b2:	b082      	sub	sp, #8
 800f9b4:	af00      	add	r7, sp, #0
 800f9b6:	6078      	str	r0, [r7, #4]
 800f9b8:	6039      	str	r1, [r7, #0]
	tcpip_init(tcpip_init_done, arg);
 800f9ba:	6839      	ldr	r1, [r7, #0]
 800f9bc:	6878      	ldr	r0, [r7, #4]
 800f9be:	f009 f869 	bl	8018a94 <tcpip_init>
	LOCK_TCPIP_CORE();
 800f9c2:	f000 fda1 	bl	8010508 <sys_lock_tcpip_core>
}
 800f9c6:	bf00      	nop
 800f9c8:	3708      	adds	r7, #8
 800f9ca:	46bd      	mov	sp, r7
 800f9cc:	bd80      	pop	{r7, pc}
	...

0800f9d0 <is_link_up>:
#define tcpip_init tcpip_init_wrap

uint8_t is_link_up(void)
{
 800f9d0:	b480      	push	{r7}
 800f9d2:	af00      	add	r7, sp, #0
	return netif_is_up(&gnetif);
 800f9d4:	4b05      	ldr	r3, [pc, #20]	@ (800f9ec <is_link_up+0x1c>)
 800f9d6:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 800f9da:	f003 0301 	and.w	r3, r3, #1
 800f9de:	b2db      	uxtb	r3, r3
}
 800f9e0:	4618      	mov	r0, r3
 800f9e2:	46bd      	mov	sp, r7
 800f9e4:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f9e8:	4770      	bx	lr
 800f9ea:	bf00      	nop
 800f9ec:	24002174 	.word	0x24002174

0800f9f0 <MX_LWIP_Init>:

/**
  * LwIP initialization function
  */
void MX_LWIP_Init(void)
{
 800f9f0:	b580      	push	{r7, lr}
 800f9f2:	b084      	sub	sp, #16
 800f9f4:	af04      	add	r7, sp, #16
  /* IP addresses initialization without DHCP (IPv4) */
	ipaddr_aton(STATIC_IP, &ipaddr);
	ipaddr_aton(STATIC_MASK, &netmask);
	ipaddr_aton(STATIC_GW, &gw);
#else
    ip_addr_set_zero_ip4(&ipaddr);
 800f9f6:	4b27      	ldr	r3, [pc, #156]	@ (800fa94 <MX_LWIP_Init+0xa4>)
 800f9f8:	2200      	movs	r2, #0
 800f9fa:	601a      	str	r2, [r3, #0]
    ip_addr_set_zero_ip4(&netmask);
 800f9fc:	4b26      	ldr	r3, [pc, #152]	@ (800fa98 <MX_LWIP_Init+0xa8>)
 800f9fe:	2200      	movs	r2, #0
 800fa00:	601a      	str	r2, [r3, #0]
    ip_addr_set_zero_ip4(&gw);
 800fa02:	4b26      	ldr	r3, [pc, #152]	@ (800fa9c <MX_LWIP_Init+0xac>)
 800fa04:	2200      	movs	r2, #0
 800fa06:	601a      	str	r2, [r3, #0]
#endif
	/* USER CODE END IP_ADDRESSES */

  /* Initilialize the LwIP stack with RTOS */
  tcpip_init( NULL, NULL );
 800fa08:	2100      	movs	r1, #0
 800fa0a:	2000      	movs	r0, #0
 800fa0c:	f7ff ffd0 	bl	800f9b0 <tcpip_init_wrap>
//  IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]);
//  IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1] , NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]);
//  IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]);

  /* add the network interface (IPv4/IPv6) with RTOS */
  netif_add(&gnetif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &tcpip_input);
 800fa10:	4b23      	ldr	r3, [pc, #140]	@ (800faa0 <MX_LWIP_Init+0xb0>)
 800fa12:	9302      	str	r3, [sp, #8]
 800fa14:	4b23      	ldr	r3, [pc, #140]	@ (800faa4 <MX_LWIP_Init+0xb4>)
 800fa16:	9301      	str	r3, [sp, #4]
 800fa18:	2300      	movs	r3, #0
 800fa1a:	9300      	str	r3, [sp, #0]
 800fa1c:	4b1f      	ldr	r3, [pc, #124]	@ (800fa9c <MX_LWIP_Init+0xac>)
 800fa1e:	4a1e      	ldr	r2, [pc, #120]	@ (800fa98 <MX_LWIP_Init+0xa8>)
 800fa20:	491c      	ldr	r1, [pc, #112]	@ (800fa94 <MX_LWIP_Init+0xa4>)
 800fa22:	4821      	ldr	r0, [pc, #132]	@ (800faa8 <MX_LWIP_Init+0xb8>)
 800fa24:	f009 fea6 	bl	8019774 <netif_add>

  /* Registers the default network interface */
  netif_set_default(&gnetif);
 800fa28:	481f      	ldr	r0, [pc, #124]	@ (800faa8 <MX_LWIP_Init+0xb8>)
 800fa2a:	f00a f861 	bl	8019af0 <netif_set_default>

  if (netif_is_link_up(&gnetif))
 800fa2e:	4b1e      	ldr	r3, [pc, #120]	@ (800faa8 <MX_LWIP_Init+0xb8>)
 800fa30:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 800fa34:	089b      	lsrs	r3, r3, #2
 800fa36:	f003 0301 	and.w	r3, r3, #1
 800fa3a:	b2db      	uxtb	r3, r3
 800fa3c:	2b00      	cmp	r3, #0
 800fa3e:	d003      	beq.n	800fa48 <MX_LWIP_Init+0x58>
  {
    /* When the netif is fully configured this function must be called */
    netif_set_up(&gnetif);
 800fa40:	4819      	ldr	r0, [pc, #100]	@ (800faa8 <MX_LWIP_Init+0xb8>)
 800fa42:	f00a f865 	bl	8019b10 <netif_set_up>
 800fa46:	e002      	b.n	800fa4e <MX_LWIP_Init+0x5e>
  }
  else
  {
    /* When the netif link is down this function must be called */
    netif_set_down(&gnetif);
 800fa48:	4817      	ldr	r0, [pc, #92]	@ (800faa8 <MX_LWIP_Init+0xb8>)
 800fa4a:	f00a f8cf 	bl	8019bec <netif_set_down>
  }

  /* Set the link callback function, this function is called on change of link status*/
  netif_set_link_callback(&gnetif, ethernet_link_status_updated);
 800fa4e:	4917      	ldr	r1, [pc, #92]	@ (800faac <MX_LWIP_Init+0xbc>)
 800fa50:	4815      	ldr	r0, [pc, #84]	@ (800faa8 <MX_LWIP_Init+0xb8>)
 800fa52:	f00a f96b 	bl	8019d2c <netif_set_link_callback>

  /* Create the Ethernet link handler thread */
/* USER CODE BEGIN H7_OS_THREAD_NEW_CMSIS_RTOS_V2 */
  memset(&attributes, 0x0, sizeof(osThreadAttr_t));
 800fa56:	2224      	movs	r2, #36	@ 0x24
 800fa58:	2100      	movs	r1, #0
 800fa5a:	4815      	ldr	r0, [pc, #84]	@ (800fab0 <MX_LWIP_Init+0xc0>)
 800fa5c:	f01a f950 	bl	8029d00 <memset>
  attributes.name = "EthLink";
 800fa60:	4b13      	ldr	r3, [pc, #76]	@ (800fab0 <MX_LWIP_Init+0xc0>)
 800fa62:	4a14      	ldr	r2, [pc, #80]	@ (800fab4 <MX_LWIP_Init+0xc4>)
 800fa64:	601a      	str	r2, [r3, #0]
  attributes.stack_size = INTERFACE_THREAD_STACK_SIZE * 2;
 800fa66:	4b12      	ldr	r3, [pc, #72]	@ (800fab0 <MX_LWIP_Init+0xc0>)
 800fa68:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 800fa6c:	615a      	str	r2, [r3, #20]
  attributes.priority = osPriorityBelowNormal;
 800fa6e:	4b10      	ldr	r3, [pc, #64]	@ (800fab0 <MX_LWIP_Init+0xc0>)
 800fa70:	2210      	movs	r2, #16
 800fa72:	619a      	str	r2, [r3, #24]
  osThreadNew(ethernet_link_thread, &gnetif, &attributes);
 800fa74:	4a0e      	ldr	r2, [pc, #56]	@ (800fab0 <MX_LWIP_Init+0xc0>)
 800fa76:	490c      	ldr	r1, [pc, #48]	@ (800faa8 <MX_LWIP_Init+0xb8>)
 800fa78:	480f      	ldr	r0, [pc, #60]	@ (800fab8 <MX_LWIP_Init+0xc8>)
 800fa7a:	f000 feee 	bl	801085a <osThreadNew>
/* USER CODE END H7_OS_THREAD_NEW_CMSIS_RTOS_V2 */

/* USER CODE BEGIN 3 */
  /* Start DHCP negotiation for a network interface (IPv4) */
#if USE_DHCP
  netif_set_up(&gnetif);
 800fa7e:	480a      	ldr	r0, [pc, #40]	@ (800faa8 <MX_LWIP_Init+0xb8>)
 800fa80:	f00a f846 	bl	8019b10 <netif_set_up>
  dhcp_start(&gnetif);
 800fa84:	4808      	ldr	r0, [pc, #32]	@ (800faa8 <MX_LWIP_Init+0xb8>)
 800fa86:	f012 fb33 	bl	80220f0 <dhcp_start>
#else
  netif_set_addr(&gnetif, ip_2_ip4(&ipaddr), ip_2_ip4(&netmask), ip_2_ip4(&gw));
#endif
  /* ETH_CODE: call UNLOCK_TCPIP_CORE after we are done */
  UNLOCK_TCPIP_CORE();
 800fa8a:	f000 fd4d 	bl	8010528 <sys_unlock_tcpip_core>

/* USER CODE END 3 */
}
 800fa8e:	bf00      	nop
 800fa90:	46bd      	mov	sp, r7
 800fa92:	bd80      	pop	{r7, pc}
 800fa94:	240021ac 	.word	0x240021ac
 800fa98:	240021b0 	.word	0x240021b0
 800fa9c:	240021b4 	.word	0x240021b4
 800faa0:	080189ad 	.word	0x080189ad
 800faa4:	0800ff71 	.word	0x0800ff71
 800faa8:	24002174 	.word	0x24002174
 800faac:	0800fabd 	.word	0x0800fabd
 800fab0:	240021b8 	.word	0x240021b8
 800fab4:	0802ca20 	.word	0x0802ca20
 800fab8:	08010241 	.word	0x08010241

0800fabc <ethernet_link_status_updated>:
  * @brief  Notify the User about the network interface config status
  * @param  netif: the network interface
  * @retval None
  */
static void ethernet_link_status_updated(struct netif *netif)
{
 800fabc:	b480      	push	{r7}
 800fabe:	b083      	sub	sp, #12
 800fac0:	af00      	add	r7, sp, #0
 800fac2:	6078      	str	r0, [r7, #4]
  else /* netif is down */
  {
/* USER CODE BEGIN 6 */
/* USER CODE END 6 */
  }
}
 800fac4:	bf00      	nop
 800fac6:	370c      	adds	r7, #12
 800fac8:	46bd      	mov	sp, r7
 800faca:	f85d 7b04 	ldr.w	r7, [sp], #4
 800face:	4770      	bx	lr

0800fad0 <HAL_ETH_RxCpltCallback>:
  * @brief  Ethernet Rx Transfer completed callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *handlerEth)
{
 800fad0:	b580      	push	{r7, lr}
 800fad2:	b082      	sub	sp, #8
 800fad4:	af00      	add	r7, sp, #0
 800fad6:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(RxPktSemaphore);
 800fad8:	4b04      	ldr	r3, [pc, #16]	@ (800faec <HAL_ETH_RxCpltCallback+0x1c>)
 800fada:	681b      	ldr	r3, [r3, #0]
 800fadc:	4618      	mov	r0, r3
 800fade:	f001 f95f 	bl	8010da0 <osSemaphoreRelease>
}
 800fae2:	bf00      	nop
 800fae4:	3708      	adds	r7, #8
 800fae6:	46bd      	mov	sp, r7
 800fae8:	bd80      	pop	{r7, pc}
 800faea:	bf00      	nop
 800faec:	240021e4 	.word	0x240021e4

0800faf0 <HAL_ETH_TxCpltCallback>:
  * @brief  Ethernet Tx Transfer completed callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth)
{
 800faf0:	b580      	push	{r7, lr}
 800faf2:	b082      	sub	sp, #8
 800faf4:	af00      	add	r7, sp, #0
 800faf6:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(TxPktSemaphore);
 800faf8:	4b04      	ldr	r3, [pc, #16]	@ (800fb0c <HAL_ETH_TxCpltCallback+0x1c>)
 800fafa:	681b      	ldr	r3, [r3, #0]
 800fafc:	4618      	mov	r0, r3
 800fafe:	f001 f94f 	bl	8010da0 <osSemaphoreRelease>
}
 800fb02:	bf00      	nop
 800fb04:	3708      	adds	r7, #8
 800fb06:	46bd      	mov	sp, r7
 800fb08:	bd80      	pop	{r7, pc}
 800fb0a:	bf00      	nop
 800fb0c:	240021e8 	.word	0x240021e8

0800fb10 <HAL_ETH_ErrorCallback>:
  * @brief  Ethernet DMA transfer error callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth)
{
 800fb10:	b580      	push	{r7, lr}
 800fb12:	b082      	sub	sp, #8
 800fb14:	af00      	add	r7, sp, #0
 800fb16:	6078      	str	r0, [r7, #4]
  if((HAL_ETH_GetDMAError(handlerEth) & ETH_DMACSR_RBU) == ETH_DMACSR_RBU)
 800fb18:	6878      	ldr	r0, [r7, #4]
 800fb1a:	f7f9 f833 	bl	8008b84 <HAL_ETH_GetDMAError>
 800fb1e:	4603      	mov	r3, r0
 800fb20:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800fb24:	2b80      	cmp	r3, #128	@ 0x80
 800fb26:	d104      	bne.n	800fb32 <HAL_ETH_ErrorCallback+0x22>
  {
     osSemaphoreRelease(RxPktSemaphore);
 800fb28:	4b04      	ldr	r3, [pc, #16]	@ (800fb3c <HAL_ETH_ErrorCallback+0x2c>)
 800fb2a:	681b      	ldr	r3, [r3, #0]
 800fb2c:	4618      	mov	r0, r3
 800fb2e:	f001 f937 	bl	8010da0 <osSemaphoreRelease>
  }
}
 800fb32:	bf00      	nop
 800fb34:	3708      	adds	r7, #8
 800fb36:	46bd      	mov	sp, r7
 800fb38:	bd80      	pop	{r7, pc}
 800fb3a:	bf00      	nop
 800fb3c:	240021e4 	.word	0x240021e4

0800fb40 <low_level_init>:
 *
 * @param netif the already initialized lwip network interface structure
 *        for this ethernetif
 */
static void low_level_init(struct netif *netif)
{
 800fb40:	b580      	push	{r7, lr}
 800fb42:	b0aa      	sub	sp, #168	@ 0xa8
 800fb44:	af00      	add	r7, sp, #0
 800fb46:	6078      	str	r0, [r7, #4]
  HAL_StatusTypeDef hal_eth_init_status = HAL_OK;
 800fb48:	2300      	movs	r3, #0
 800fb4a:	f887 309f 	strb.w	r3, [r7, #159]	@ 0x9f
/* USER CODE BEGIN OS_THREAD_ATTR_CMSIS_RTOS_V2 */
  osThreadAttr_t attributes;
/* USER CODE END OS_THREAD_ATTR_CMSIS_RTOS_V2 */
  uint32_t duplex, speed = 0;
 800fb4e:	2300      	movs	r3, #0
 800fb50:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
  int32_t PHYLinkState = 0;
 800fb54:	2300      	movs	r3, #0
 800fb56:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
  ETH_MACConfigTypeDef MACConf = {0};
 800fb5a:	f107 0310 	add.w	r3, r7, #16
 800fb5e:	2264      	movs	r2, #100	@ 0x64
 800fb60:	2100      	movs	r1, #0
 800fb62:	4618      	mov	r0, r3
 800fb64:	f01a f8cc 	bl	8029d00 <memset>
  /* Start ETH HAL Init */

   uint8_t MACAddr[6] ;
  heth.Instance = ETH;
 800fb68:	4b86      	ldr	r3, [pc, #536]	@ (800fd84 <low_level_init+0x244>)
 800fb6a:	4a87      	ldr	r2, [pc, #540]	@ (800fd88 <low_level_init+0x248>)
 800fb6c:	601a      	str	r2, [r3, #0]
//  MACAddr[1] = 0x80;
//  MACAddr[2] = 0xE1;
//  MACAddr[3] = 0x00;
//  MACAddr[4] = 0x00;
//  MACAddr[5] = 0x00;
    MACAddr[0] = 0x7C;
 800fb6e:	237c      	movs	r3, #124	@ 0x7c
 800fb70:	723b      	strb	r3, [r7, #8]
    MACAddr[1] = 0xF6;
 800fb72:	23f6      	movs	r3, #246	@ 0xf6
 800fb74:	727b      	strb	r3, [r7, #9]
    MACAddr[2] = 0x66;
 800fb76:	2366      	movs	r3, #102	@ 0x66
 800fb78:	72bb      	strb	r3, [r7, #10]
    MACAddr[3] = 0xE4;
 800fb7a:	23e4      	movs	r3, #228	@ 0xe4
 800fb7c:	72fb      	strb	r3, [r7, #11]
    MACAddr[4] = 0xB5;
 800fb7e:	23b5      	movs	r3, #181	@ 0xb5
 800fb80:	733b      	strb	r3, [r7, #12]
    MACAddr[5] = 0x41;
 800fb82:	2341      	movs	r3, #65	@ 0x41
 800fb84:	737b      	strb	r3, [r7, #13]
  heth.Init.MACAddr = &MACAddr[0];
 800fb86:	4a7f      	ldr	r2, [pc, #508]	@ (800fd84 <low_level_init+0x244>)
 800fb88:	f107 0308 	add.w	r3, r7, #8
 800fb8c:	6053      	str	r3, [r2, #4]
  heth.Init.MediaInterface = HAL_ETH_MII_MODE;
 800fb8e:	4b7d      	ldr	r3, [pc, #500]	@ (800fd84 <low_level_init+0x244>)
 800fb90:	2200      	movs	r2, #0
 800fb92:	721a      	strb	r2, [r3, #8]
  heth.Init.TxDesc = DMATxDscrTab;
 800fb94:	4b7b      	ldr	r3, [pc, #492]	@ (800fd84 <low_level_init+0x244>)
 800fb96:	4a7d      	ldr	r2, [pc, #500]	@ (800fd8c <low_level_init+0x24c>)
 800fb98:	60da      	str	r2, [r3, #12]
  heth.Init.RxDesc = DMARxDscrTab;
 800fb9a:	4b7a      	ldr	r3, [pc, #488]	@ (800fd84 <low_level_init+0x244>)
 800fb9c:	4a7c      	ldr	r2, [pc, #496]	@ (800fd90 <low_level_init+0x250>)
 800fb9e:	611a      	str	r2, [r3, #16]
  heth.Init.RxBuffLen = 1536;
 800fba0:	4b78      	ldr	r3, [pc, #480]	@ (800fd84 <low_level_init+0x244>)
 800fba2:	f44f 62c0 	mov.w	r2, #1536	@ 0x600
 800fba6:	615a      	str	r2, [r3, #20]

  /* USER CODE BEGIN MACADDRESS */

  /* USER CODE END MACADDRESS */

  hal_eth_init_status = HAL_ETH_Init(&heth);
 800fba8:	4876      	ldr	r0, [pc, #472]	@ (800fd84 <low_level_init+0x244>)
 800fbaa:	f7f8 f81f 	bl	8007bec <HAL_ETH_Init>
 800fbae:	4603      	mov	r3, r0
 800fbb0:	f887 309f 	strb.w	r3, [r7, #159]	@ 0x9f

  memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
 800fbb4:	2238      	movs	r2, #56	@ 0x38
 800fbb6:	2100      	movs	r1, #0
 800fbb8:	4876      	ldr	r0, [pc, #472]	@ (800fd94 <low_level_init+0x254>)
 800fbba:	f01a f8a1 	bl	8029d00 <memset>
  TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
 800fbbe:	4b75      	ldr	r3, [pc, #468]	@ (800fd94 <low_level_init+0x254>)
 800fbc0:	2221      	movs	r2, #33	@ 0x21
 800fbc2:	601a      	str	r2, [r3, #0]
  TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
 800fbc4:	4b73      	ldr	r3, [pc, #460]	@ (800fd94 <low_level_init+0x254>)
 800fbc6:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 800fbca:	615a      	str	r2, [r3, #20]
  TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
 800fbcc:	4b71      	ldr	r3, [pc, #452]	@ (800fd94 <low_level_init+0x254>)
 800fbce:	2200      	movs	r2, #0
 800fbd0:	611a      	str	r2, [r3, #16]

  /* End ETH HAL Init */

  /* Initialize the RX POOL */
  LWIP_MEMPOOL_INIT(RX_POOL);
 800fbd2:	4871      	ldr	r0, [pc, #452]	@ (800fd98 <low_level_init+0x258>)
 800fbd4:	f009 fc88 	bl	80194e8 <memp_init_pool>

#if LWIP_ARP || LWIP_ETHERNET

  /* set MAC hardware address length */
  netif->hwaddr_len = ETH_HWADDR_LEN;
 800fbd8:	687b      	ldr	r3, [r7, #4]
 800fbda:	2206      	movs	r2, #6
 800fbdc:	f883 2030 	strb.w	r2, [r3, #48]	@ 0x30

  /* set MAC hardware address */
  netif->hwaddr[0] =  heth.Init.MACAddr[0];
 800fbe0:	4b68      	ldr	r3, [pc, #416]	@ (800fd84 <low_level_init+0x244>)
 800fbe2:	685b      	ldr	r3, [r3, #4]
 800fbe4:	781a      	ldrb	r2, [r3, #0]
 800fbe6:	687b      	ldr	r3, [r7, #4]
 800fbe8:	f883 202a 	strb.w	r2, [r3, #42]	@ 0x2a
  netif->hwaddr[1] =  heth.Init.MACAddr[1];
 800fbec:	4b65      	ldr	r3, [pc, #404]	@ (800fd84 <low_level_init+0x244>)
 800fbee:	685b      	ldr	r3, [r3, #4]
 800fbf0:	785a      	ldrb	r2, [r3, #1]
 800fbf2:	687b      	ldr	r3, [r7, #4]
 800fbf4:	f883 202b 	strb.w	r2, [r3, #43]	@ 0x2b
  netif->hwaddr[2] =  heth.Init.MACAddr[2];
 800fbf8:	4b62      	ldr	r3, [pc, #392]	@ (800fd84 <low_level_init+0x244>)
 800fbfa:	685b      	ldr	r3, [r3, #4]
 800fbfc:	789a      	ldrb	r2, [r3, #2]
 800fbfe:	687b      	ldr	r3, [r7, #4]
 800fc00:	f883 202c 	strb.w	r2, [r3, #44]	@ 0x2c
  netif->hwaddr[3] =  heth.Init.MACAddr[3];
 800fc04:	4b5f      	ldr	r3, [pc, #380]	@ (800fd84 <low_level_init+0x244>)
 800fc06:	685b      	ldr	r3, [r3, #4]
 800fc08:	78da      	ldrb	r2, [r3, #3]
 800fc0a:	687b      	ldr	r3, [r7, #4]
 800fc0c:	f883 202d 	strb.w	r2, [r3, #45]	@ 0x2d
  netif->hwaddr[4] =  heth.Init.MACAddr[4];
 800fc10:	4b5c      	ldr	r3, [pc, #368]	@ (800fd84 <low_level_init+0x244>)
 800fc12:	685b      	ldr	r3, [r3, #4]
 800fc14:	791a      	ldrb	r2, [r3, #4]
 800fc16:	687b      	ldr	r3, [r7, #4]
 800fc18:	f883 202e 	strb.w	r2, [r3, #46]	@ 0x2e
  netif->hwaddr[5] =  heth.Init.MACAddr[5];
 800fc1c:	4b59      	ldr	r3, [pc, #356]	@ (800fd84 <low_level_init+0x244>)
 800fc1e:	685b      	ldr	r3, [r3, #4]
 800fc20:	795a      	ldrb	r2, [r3, #5]
 800fc22:	687b      	ldr	r3, [r7, #4]
 800fc24:	f883 202f 	strb.w	r2, [r3, #47]	@ 0x2f

  /* maximum transfer unit */
  netif->mtu = ETH_MAX_PAYLOAD;
 800fc28:	687b      	ldr	r3, [r7, #4]
 800fc2a:	f240 52dc 	movw	r2, #1500	@ 0x5dc
 800fc2e:	851a      	strh	r2, [r3, #40]	@ 0x28

  /* Accept broadcast address and ARP traffic */
  /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
  #if LWIP_ARP
    netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
 800fc30:	687b      	ldr	r3, [r7, #4]
 800fc32:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 800fc36:	f043 030a 	orr.w	r3, r3, #10
 800fc3a:	b2da      	uxtb	r2, r3
 800fc3c:	687b      	ldr	r3, [r7, #4]
 800fc3e:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
  #else
    netif->flags |= NETIF_FLAG_BROADCAST;
  #endif /* LWIP_ARP */

  /* create a binary semaphore used for informing ethernetif of frame reception */
  RxPktSemaphore = osSemaphoreNew(1, 1, NULL);
 800fc42:	2200      	movs	r2, #0
 800fc44:	2101      	movs	r1, #1
 800fc46:	2001      	movs	r0, #1
 800fc48:	f000 ffce 	bl	8010be8 <osSemaphoreNew>
 800fc4c:	4603      	mov	r3, r0
 800fc4e:	4a53      	ldr	r2, [pc, #332]	@ (800fd9c <low_level_init+0x25c>)
 800fc50:	6013      	str	r3, [r2, #0]

  /* create a binary semaphore used for informing ethernetif of frame transmission */
  TxPktSemaphore = osSemaphoreNew(1, 1, NULL);
 800fc52:	2200      	movs	r2, #0
 800fc54:	2101      	movs	r1, #1
 800fc56:	2001      	movs	r0, #1
 800fc58:	f000 ffc6 	bl	8010be8 <osSemaphoreNew>
 800fc5c:	4603      	mov	r3, r0
 800fc5e:	4a50      	ldr	r2, [pc, #320]	@ (800fda0 <low_level_init+0x260>)
 800fc60:	6013      	str	r3, [r2, #0]

  /* create the task that handles the ETH_MAC */
/* USER CODE BEGIN OS_THREAD_NEW_CMSIS_RTOS_V2 */
  memset(&attributes, 0x0, sizeof(osThreadAttr_t));
 800fc62:	f107 0374 	add.w	r3, r7, #116	@ 0x74
 800fc66:	2224      	movs	r2, #36	@ 0x24
 800fc68:	2100      	movs	r1, #0
 800fc6a:	4618      	mov	r0, r3
 800fc6c:	f01a f848 	bl	8029d00 <memset>
  attributes.name = "EthIf";
 800fc70:	4b4c      	ldr	r3, [pc, #304]	@ (800fda4 <low_level_init+0x264>)
 800fc72:	677b      	str	r3, [r7, #116]	@ 0x74
  attributes.stack_size = INTERFACE_THREAD_STACK_SIZE;
 800fc74:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 800fc78:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
  attributes.priority = osPriorityRealtime;
 800fc7c:	2330      	movs	r3, #48	@ 0x30
 800fc7e:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
  osThreadNew(ethernetif_input, netif, &attributes);
 800fc82:	f107 0374 	add.w	r3, r7, #116	@ 0x74
 800fc86:	461a      	mov	r2, r3
 800fc88:	6879      	ldr	r1, [r7, #4]
 800fc8a:	4847      	ldr	r0, [pc, #284]	@ (800fda8 <low_level_init+0x268>)
 800fc8c:	f000 fde5 	bl	801085a <osThreadNew>

/* USER CODE BEGIN PHY_PRE_CONFIG */

/* USER CODE END PHY_PRE_CONFIG */
  /* Set PHY IO functions */
  DP83848_RegisterBusIO(&DP83848, &DP83848_IOCtx);
 800fc90:	4946      	ldr	r1, [pc, #280]	@ (800fdac <low_level_init+0x26c>)
 800fc92:	4847      	ldr	r0, [pc, #284]	@ (800fdb0 <low_level_init+0x270>)
 800fc94:	f7f5 f87f 	bl	8004d96 <DP83848_RegisterBusIO>

  /* Initialize the DP83848 ETH PHY */
  DP83848_Init(&DP83848);
 800fc98:	4845      	ldr	r0, [pc, #276]	@ (800fdb0 <low_level_init+0x270>)
 800fc9a:	f7f5 f8ae 	bl	8004dfa <DP83848_Init>

  if (hal_eth_init_status == HAL_OK)
 800fc9e:	f897 309f 	ldrb.w	r3, [r7, #159]	@ 0x9f
 800fca2:	2b00      	cmp	r3, #0
 800fca4:	d168      	bne.n	800fd78 <low_level_init+0x238>
  {
    PHYLinkState = DP83848_GetLinkState(&DP83848);
 800fca6:	4842      	ldr	r0, [pc, #264]	@ (800fdb0 <low_level_init+0x270>)
 800fca8:	f7f5 f8f4 	bl	8004e94 <DP83848_GetLinkState>
 800fcac:	f8c7 0098 	str.w	r0, [r7, #152]	@ 0x98

    /* Get link state */
    if(PHYLinkState <= DP83848_STATUS_LINK_DOWN)
 800fcb0:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 800fcb4:	2b01      	cmp	r3, #1
 800fcb6:	dc06      	bgt.n	800fcc6 <low_level_init+0x186>
    {
      netif_set_link_down(netif);
 800fcb8:	6878      	ldr	r0, [r7, #4]
 800fcba:	f00a f805 	bl	8019cc8 <netif_set_link_down>
      netif_set_down(netif);
 800fcbe:	6878      	ldr	r0, [r7, #4]
 800fcc0:	f009 ff94 	bl	8019bec <netif_set_down>
#endif /* LWIP_ARP || LWIP_ETHERNET */

/* USER CODE BEGIN LOW_LEVEL_INIT */

/* USER CODE END LOW_LEVEL_INIT */
}
 800fcc4:	e05a      	b.n	800fd7c <low_level_init+0x23c>
      switch (PHYLinkState)
 800fcc6:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 800fcca:	3b02      	subs	r3, #2
 800fccc:	2b03      	cmp	r3, #3
 800fcce:	d82b      	bhi.n	800fd28 <low_level_init+0x1e8>
 800fcd0:	a201      	add	r2, pc, #4	@ (adr r2, 800fcd8 <low_level_init+0x198>)
 800fcd2:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800fcd6:	bf00      	nop
 800fcd8:	0800fce9 	.word	0x0800fce9
 800fcdc:	0800fcfb 	.word	0x0800fcfb
 800fce0:	0800fd0b 	.word	0x0800fd0b
 800fce4:	0800fd1b 	.word	0x0800fd1b
        duplex = ETH_FULLDUPLEX_MODE;
 800fce8:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 800fcec:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 800fcf0:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 800fcf4:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 800fcf8:	e01f      	b.n	800fd3a <low_level_init+0x1fa>
        duplex = ETH_HALFDUPLEX_MODE;
 800fcfa:	2300      	movs	r3, #0
 800fcfc:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 800fd00:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 800fd04:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 800fd08:	e017      	b.n	800fd3a <low_level_init+0x1fa>
        duplex = ETH_FULLDUPLEX_MODE;
 800fd0a:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 800fd0e:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_10M;
 800fd12:	2300      	movs	r3, #0
 800fd14:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 800fd18:	e00f      	b.n	800fd3a <low_level_init+0x1fa>
        duplex = ETH_HALFDUPLEX_MODE;
 800fd1a:	2300      	movs	r3, #0
 800fd1c:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_10M;
 800fd20:	2300      	movs	r3, #0
 800fd22:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 800fd26:	e008      	b.n	800fd3a <low_level_init+0x1fa>
        duplex = ETH_FULLDUPLEX_MODE;
 800fd28:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 800fd2c:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 800fd30:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 800fd34:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 800fd38:	bf00      	nop
    HAL_ETH_GetMACConfig(&heth, &MACConf);
 800fd3a:	f107 0310 	add.w	r3, r7, #16
 800fd3e:	4619      	mov	r1, r3
 800fd40:	4810      	ldr	r0, [pc, #64]	@ (800fd84 <low_level_init+0x244>)
 800fd42:	f7f8 fce1 	bl	8008708 <HAL_ETH_GetMACConfig>
    MACConf.DuplexMode = duplex;
 800fd46:	f8d7 30a4 	ldr.w	r3, [r7, #164]	@ 0xa4
 800fd4a:	62bb      	str	r3, [r7, #40]	@ 0x28
    MACConf.Speed = speed;
 800fd4c:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800fd50:	627b      	str	r3, [r7, #36]	@ 0x24
    HAL_ETH_SetMACConfig(&heth, &MACConf);
 800fd52:	f107 0310 	add.w	r3, r7, #16
 800fd56:	4619      	mov	r1, r3
 800fd58:	480a      	ldr	r0, [pc, #40]	@ (800fd84 <low_level_init+0x244>)
 800fd5a:	f7f8 fea9 	bl	8008ab0 <HAL_ETH_SetMACConfig>
    HAL_ETH_Start_IT(&heth);
 800fd5e:	4809      	ldr	r0, [pc, #36]	@ (800fd84 <low_level_init+0x244>)
 800fd60:	f7f8 f842 	bl	8007de8 <HAL_ETH_Start_IT>
    netif_set_up(netif);
 800fd64:	6878      	ldr	r0, [r7, #4]
 800fd66:	f009 fed3 	bl	8019b10 <netif_set_up>
    netif_set_link_up(netif);
 800fd6a:	6878      	ldr	r0, [r7, #4]
 800fd6c:	f009 ff72 	bl	8019c54 <netif_set_link_up>
    ethernetif_notify_conn_changed(netif);
 800fd70:	6878      	ldr	r0, [r7, #4]
 800fd72:	f000 fb1b 	bl	80103ac <ethernetif_notify_conn_changed>
}
 800fd76:	e001      	b.n	800fd7c <low_level_init+0x23c>
    Error_Handler();
 800fd78:	f7f2 fbc6 	bl	8002508 <Error_Handler>
}
 800fd7c:	bf00      	nop
 800fd7e:	37a8      	adds	r7, #168	@ 0xa8
 800fd80:	46bd      	mov	sp, r7
 800fd82:	bd80      	pop	{r7, pc}
 800fd84:	240021ec 	.word	0x240021ec
 800fd88:	40028000 	.word	0x40028000
 800fd8c:	24040100 	.word	0x24040100
 800fd90:	24040000 	.word	0x24040000
 800fd94:	2400229c 	.word	0x2400229c
 800fd98:	08030abc 	.word	0x08030abc
 800fd9c:	240021e4 	.word	0x240021e4
 800fda0:	240021e8 	.word	0x240021e8
 800fda4:	0802ca40 	.word	0x0802ca40
 800fda8:	0800ff1d 	.word	0x0800ff1d
 800fdac:	24000034 	.word	0x24000034
 800fdb0:	240022d4 	.word	0x240022d4

0800fdb4 <low_level_output>:
 *       to become available since the stack doesn't retry to send a packet
 *       dropped because of memory failure (except for the TCP timers).
 */

static err_t low_level_output(struct netif *netif, struct pbuf *p)
{
 800fdb4:	b580      	push	{r7, lr}
 800fdb6:	b092      	sub	sp, #72	@ 0x48
 800fdb8:	af00      	add	r7, sp, #0
 800fdba:	6078      	str	r0, [r7, #4]
 800fdbc:	6039      	str	r1, [r7, #0]
  uint32_t i = 0U;
 800fdbe:	2300      	movs	r3, #0
 800fdc0:	647b      	str	r3, [r7, #68]	@ 0x44
  struct pbuf *q = NULL;
 800fdc2:	2300      	movs	r3, #0
 800fdc4:	643b      	str	r3, [r7, #64]	@ 0x40
  err_t errval = ERR_OK;
 800fdc6:	2300      	movs	r3, #0
 800fdc8:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
  ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0};
 800fdcc:	f107 030c 	add.w	r3, r7, #12
 800fdd0:	2230      	movs	r2, #48	@ 0x30
 800fdd2:	2100      	movs	r1, #0
 800fdd4:	4618      	mov	r0, r3
 800fdd6:	f019 ff93 	bl	8029d00 <memset>

  memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef));
 800fdda:	f107 030c 	add.w	r3, r7, #12
 800fdde:	2230      	movs	r2, #48	@ 0x30
 800fde0:	2100      	movs	r1, #0
 800fde2:	4618      	mov	r0, r3
 800fde4:	f019 ff8c 	bl	8029d00 <memset>

  for(q = p; q != NULL; q = q->next)
 800fde8:	683b      	ldr	r3, [r7, #0]
 800fdea:	643b      	str	r3, [r7, #64]	@ 0x40
 800fdec:	e045      	b.n	800fe7a <low_level_output+0xc6>
  {
    if(i >= ETH_TX_DESC_CNT)
 800fdee:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800fdf0:	2b03      	cmp	r3, #3
 800fdf2:	d902      	bls.n	800fdfa <low_level_output+0x46>
      return ERR_IF;
 800fdf4:	f06f 030b 	mvn.w	r3, #11
 800fdf8:	e06c      	b.n	800fed4 <low_level_output+0x120>

    Txbuffer[i].buffer = q->payload;
 800fdfa:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800fdfc:	6859      	ldr	r1, [r3, #4]
 800fdfe:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800fe00:	4613      	mov	r3, r2
 800fe02:	005b      	lsls	r3, r3, #1
 800fe04:	4413      	add	r3, r2
 800fe06:	009b      	lsls	r3, r3, #2
 800fe08:	3348      	adds	r3, #72	@ 0x48
 800fe0a:	443b      	add	r3, r7
 800fe0c:	3b3c      	subs	r3, #60	@ 0x3c
 800fe0e:	6019      	str	r1, [r3, #0]
    Txbuffer[i].len = q->len;
 800fe10:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800fe12:	895b      	ldrh	r3, [r3, #10]
 800fe14:	4619      	mov	r1, r3
 800fe16:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800fe18:	4613      	mov	r3, r2
 800fe1a:	005b      	lsls	r3, r3, #1
 800fe1c:	4413      	add	r3, r2
 800fe1e:	009b      	lsls	r3, r3, #2
 800fe20:	3348      	adds	r3, #72	@ 0x48
 800fe22:	443b      	add	r3, r7
 800fe24:	3b38      	subs	r3, #56	@ 0x38
 800fe26:	6019      	str	r1, [r3, #0]

    if(i>0)
 800fe28:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800fe2a:	2b00      	cmp	r3, #0
 800fe2c:	d011      	beq.n	800fe52 <low_level_output+0x9e>
    {
      Txbuffer[i-1].next = &Txbuffer[i];
 800fe2e:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800fe30:	1e5a      	subs	r2, r3, #1
 800fe32:	f107 000c 	add.w	r0, r7, #12
 800fe36:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800fe38:	460b      	mov	r3, r1
 800fe3a:	005b      	lsls	r3, r3, #1
 800fe3c:	440b      	add	r3, r1
 800fe3e:	009b      	lsls	r3, r3, #2
 800fe40:	18c1      	adds	r1, r0, r3
 800fe42:	4613      	mov	r3, r2
 800fe44:	005b      	lsls	r3, r3, #1
 800fe46:	4413      	add	r3, r2
 800fe48:	009b      	lsls	r3, r3, #2
 800fe4a:	3348      	adds	r3, #72	@ 0x48
 800fe4c:	443b      	add	r3, r7
 800fe4e:	3b34      	subs	r3, #52	@ 0x34
 800fe50:	6019      	str	r1, [r3, #0]
    }

    if(q->next == NULL)
 800fe52:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800fe54:	681b      	ldr	r3, [r3, #0]
 800fe56:	2b00      	cmp	r3, #0
 800fe58:	d109      	bne.n	800fe6e <low_level_output+0xba>
    {
      Txbuffer[i].next = NULL;
 800fe5a:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800fe5c:	4613      	mov	r3, r2
 800fe5e:	005b      	lsls	r3, r3, #1
 800fe60:	4413      	add	r3, r2
 800fe62:	009b      	lsls	r3, r3, #2
 800fe64:	3348      	adds	r3, #72	@ 0x48
 800fe66:	443b      	add	r3, r7
 800fe68:	3b34      	subs	r3, #52	@ 0x34
 800fe6a:	2200      	movs	r2, #0
 800fe6c:	601a      	str	r2, [r3, #0]
    }

    i++;
 800fe6e:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800fe70:	3301      	adds	r3, #1
 800fe72:	647b      	str	r3, [r7, #68]	@ 0x44
  for(q = p; q != NULL; q = q->next)
 800fe74:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800fe76:	681b      	ldr	r3, [r3, #0]
 800fe78:	643b      	str	r3, [r7, #64]	@ 0x40
 800fe7a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800fe7c:	2b00      	cmp	r3, #0
 800fe7e:	d1b6      	bne.n	800fdee <low_level_output+0x3a>
  }

  TxConfig.Length = p->tot_len;
 800fe80:	683b      	ldr	r3, [r7, #0]
 800fe82:	891b      	ldrh	r3, [r3, #8]
 800fe84:	461a      	mov	r2, r3
 800fe86:	4b15      	ldr	r3, [pc, #84]	@ (800fedc <low_level_output+0x128>)
 800fe88:	605a      	str	r2, [r3, #4]
  TxConfig.TxBuffer = Txbuffer;
 800fe8a:	4a14      	ldr	r2, [pc, #80]	@ (800fedc <low_level_output+0x128>)
 800fe8c:	f107 030c 	add.w	r3, r7, #12
 800fe90:	6093      	str	r3, [r2, #8]
  TxConfig.pData = p;
 800fe92:	4a12      	ldr	r2, [pc, #72]	@ (800fedc <low_level_output+0x128>)
 800fe94:	683b      	ldr	r3, [r7, #0]
 800fe96:	6353      	str	r3, [r2, #52]	@ 0x34

  pbuf_ref(p);
 800fe98:	6838      	ldr	r0, [r7, #0]
 800fe9a:	f00a fbcd 	bl	801a638 <pbuf_ref>
#if 1
  if (HAL_ETH_Transmit_IT(&heth, &TxConfig) == HAL_OK) {
 800fe9e:	490f      	ldr	r1, [pc, #60]	@ (800fedc <low_level_output+0x128>)
 800fea0:	480f      	ldr	r0, [pc, #60]	@ (800fee0 <low_level_output+0x12c>)
 800fea2:	f7f8 f88d 	bl	8007fc0 <HAL_ETH_Transmit_IT>
 800fea6:	4603      	mov	r3, r0
 800fea8:	2b00      	cmp	r3, #0
 800feaa:	d10e      	bne.n	800feca <low_level_output+0x116>
    while(osSemaphoreAcquire(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK)
 800feac:	bf00      	nop
 800feae:	4b0d      	ldr	r3, [pc, #52]	@ (800fee4 <low_level_output+0x130>)
 800feb0:	681b      	ldr	r3, [r3, #0]
 800feb2:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800feb6:	4618      	mov	r0, r3
 800feb8:	f000 ff20 	bl	8010cfc <osSemaphoreAcquire>
 800febc:	4603      	mov	r3, r0
 800febe:	2b00      	cmp	r3, #0
 800fec0:	d1f5      	bne.n	800feae <low_level_output+0xfa>
    {
    }
//	osSemaphoreAcquire(TxPktSemaphore, pdMS_TO_TICKS(1000));
    HAL_ETH_ReleaseTxPacket(&heth);
 800fec2:	4807      	ldr	r0, [pc, #28]	@ (800fee0 <low_level_output+0x12c>)
 800fec4:	f7f8 fa03 	bl	80082ce <HAL_ETH_ReleaseTxPacket>
 800fec8:	e002      	b.n	800fed0 <low_level_output+0x11c>
  } else {
    pbuf_free(p);
 800feca:	6838      	ldr	r0, [r7, #0]
 800fecc:	f00a fb0e 	bl	801a4ec <pbuf_free>
  HAL_ETH_Transmit_IT(&heth, &TxConfig);
  osSemaphoreAcquire(TxPktSemaphore, pdMS_TO_TICKS(100));
  HAL_ETH_ReleaseTxPacket(&heth);
#endif

  return errval;
 800fed0:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
}
 800fed4:	4618      	mov	r0, r3
 800fed6:	3748      	adds	r7, #72	@ 0x48
 800fed8:	46bd      	mov	sp, r7
 800feda:	bd80      	pop	{r7, pc}
 800fedc:	2400229c 	.word	0x2400229c
 800fee0:	240021ec 	.word	0x240021ec
 800fee4:	240021e8 	.word	0x240021e8

0800fee8 <low_level_input>:
 * @param netif the lwip network interface structure for this ethernetif
 * @return a pbuf filled with the received packet (including MAC header)
 *         NULL on memory error
   */
static struct pbuf * low_level_input(struct netif *netif)
{
 800fee8:	b580      	push	{r7, lr}
 800feea:	b084      	sub	sp, #16
 800feec:	af00      	add	r7, sp, #0
 800feee:	6078      	str	r0, [r7, #4]
  struct pbuf *p = NULL;
 800fef0:	2300      	movs	r3, #0
 800fef2:	60fb      	str	r3, [r7, #12]

  if(RxAllocStatus == RX_ALLOC_OK)
 800fef4:	4b07      	ldr	r3, [pc, #28]	@ (800ff14 <low_level_input+0x2c>)
 800fef6:	781b      	ldrb	r3, [r3, #0]
 800fef8:	2b00      	cmp	r3, #0
 800fefa:	d105      	bne.n	800ff08 <low_level_input+0x20>
  {
    HAL_ETH_ReadData(&heth, (void **)&p);
 800fefc:	f107 030c 	add.w	r3, r7, #12
 800ff00:	4619      	mov	r1, r3
 800ff02:	4805      	ldr	r0, [pc, #20]	@ (800ff18 <low_level_input+0x30>)
 800ff04:	f7f8 f8ad 	bl	8008062 <HAL_ETH_ReadData>
  }

  return p;
 800ff08:	68fb      	ldr	r3, [r7, #12]
}
 800ff0a:	4618      	mov	r0, r3
 800ff0c:	3710      	adds	r7, #16
 800ff0e:	46bd      	mov	sp, r7
 800ff10:	bd80      	pop	{r7, pc}
 800ff12:	bf00      	nop
 800ff14:	240021e0 	.word	0x240021e0
 800ff18:	240021ec 	.word	0x240021ec

0800ff1c <ethernetif_input>:
 * the appropriate input function is called.
 *
 * @param netif the lwip network interface structure for this ethernetif
 */
void ethernetif_input(void* argument)
{
 800ff1c:	b580      	push	{r7, lr}
 800ff1e:	b084      	sub	sp, #16
 800ff20:	af00      	add	r7, sp, #0
 800ff22:	6078      	str	r0, [r7, #4]
  struct pbuf *p = NULL;
 800ff24:	2300      	movs	r3, #0
 800ff26:	60fb      	str	r3, [r7, #12]
  struct netif *netif = (struct netif *) argument;
 800ff28:	687b      	ldr	r3, [r7, #4]
 800ff2a:	60bb      	str	r3, [r7, #8]

  for( ;; )
  {
    if (osSemaphoreAcquire(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
 800ff2c:	4b0f      	ldr	r3, [pc, #60]	@ (800ff6c <ethernetif_input+0x50>)
 800ff2e:	681b      	ldr	r3, [r3, #0]
 800ff30:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800ff34:	4618      	mov	r0, r3
 800ff36:	f000 fee1 	bl	8010cfc <osSemaphoreAcquire>
 800ff3a:	4603      	mov	r3, r0
 800ff3c:	2b00      	cmp	r3, #0
 800ff3e:	d1f5      	bne.n	800ff2c <ethernetif_input+0x10>
    {
      do
      {
        p = low_level_input( netif );
 800ff40:	68b8      	ldr	r0, [r7, #8]
 800ff42:	f7ff ffd1 	bl	800fee8 <low_level_input>
 800ff46:	60f8      	str	r0, [r7, #12]
        if (p != NULL)
 800ff48:	68fb      	ldr	r3, [r7, #12]
 800ff4a:	2b00      	cmp	r3, #0
 800ff4c:	d00a      	beq.n	800ff64 <ethernetif_input+0x48>
        {
          if (netif->input( p, netif) != ERR_OK )
 800ff4e:	68bb      	ldr	r3, [r7, #8]
 800ff50:	691b      	ldr	r3, [r3, #16]
 800ff52:	68b9      	ldr	r1, [r7, #8]
 800ff54:	68f8      	ldr	r0, [r7, #12]
 800ff56:	4798      	blx	r3
 800ff58:	4603      	mov	r3, r0
 800ff5a:	2b00      	cmp	r3, #0
 800ff5c:	d002      	beq.n	800ff64 <ethernetif_input+0x48>
          {
            pbuf_free(p);
 800ff5e:	68f8      	ldr	r0, [r7, #12]
 800ff60:	f00a fac4 	bl	801a4ec <pbuf_free>
          }
        }
      } while(p!=NULL);
 800ff64:	68fb      	ldr	r3, [r7, #12]
 800ff66:	2b00      	cmp	r3, #0
 800ff68:	d1ea      	bne.n	800ff40 <ethernetif_input+0x24>
    if (osSemaphoreAcquire(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
 800ff6a:	e7df      	b.n	800ff2c <ethernetif_input+0x10>
 800ff6c:	240021e4 	.word	0x240021e4

0800ff70 <ethernetif_init>:
 * @return ERR_OK if the loopif is initialized
 *         ERR_MEM if private data couldn't be allocated
 *         any other err_t on error
 */
err_t ethernetif_init(struct netif *netif)
{
 800ff70:	b580      	push	{r7, lr}
 800ff72:	b082      	sub	sp, #8
 800ff74:	af00      	add	r7, sp, #0
 800ff76:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("netif != NULL", (netif != NULL));
 800ff78:	687b      	ldr	r3, [r7, #4]
 800ff7a:	2b00      	cmp	r3, #0
 800ff7c:	d106      	bne.n	800ff8c <ethernetif_init+0x1c>
 800ff7e:	4b0e      	ldr	r3, [pc, #56]	@ (800ffb8 <ethernetif_init+0x48>)
 800ff80:	f240 2235 	movw	r2, #565	@ 0x235
 800ff84:	490d      	ldr	r1, [pc, #52]	@ (800ffbc <ethernetif_init+0x4c>)
 800ff86:	480e      	ldr	r0, [pc, #56]	@ (800ffc0 <ethernetif_init+0x50>)
 800ff88:	f019 fd28 	bl	80299dc <iprintf>
   * The last argument should be replaced with your link speed, in units
   * of bits per second.
   */
  // MIB2_INIT_NETIF(netif, snmp_ifType_ethernet_csmacd, LINK_SPEED_OF_YOUR_NETIF_IN_BPS);

  netif->name[0] = IFNAME0;
 800ff8c:	687b      	ldr	r3, [r7, #4]
 800ff8e:	2273      	movs	r2, #115	@ 0x73
 800ff90:	f883 2032 	strb.w	r2, [r3, #50]	@ 0x32
  netif->name[1] = IFNAME1;
 800ff94:	687b      	ldr	r3, [r7, #4]
 800ff96:	2274      	movs	r2, #116	@ 0x74
 800ff98:	f883 2033 	strb.w	r2, [r3, #51]	@ 0x33
   * is available...) */

#if LWIP_IPV4
#if LWIP_ARP || LWIP_ETHERNET
#if LWIP_ARP
  netif->output = etharp_output;
 800ff9c:	687b      	ldr	r3, [r7, #4]
 800ff9e:	4a09      	ldr	r2, [pc, #36]	@ (800ffc4 <ethernetif_init+0x54>)
 800ffa0:	615a      	str	r2, [r3, #20]

#if LWIP_IPV6
  netif->output_ip6 = ethip6_output;
#endif /* LWIP_IPV6 */

  netif->linkoutput = low_level_output;
 800ffa2:	687b      	ldr	r3, [r7, #4]
 800ffa4:	4a08      	ldr	r2, [pc, #32]	@ (800ffc8 <ethernetif_init+0x58>)
 800ffa6:	619a      	str	r2, [r3, #24]

  /* initialize the hardware */
  low_level_init(netif);
 800ffa8:	6878      	ldr	r0, [r7, #4]
 800ffaa:	f7ff fdc9 	bl	800fb40 <low_level_init>

  return ERR_OK;
 800ffae:	2300      	movs	r3, #0
}
 800ffb0:	4618      	mov	r0, r3
 800ffb2:	3708      	adds	r7, #8
 800ffb4:	46bd      	mov	sp, r7
 800ffb6:	bd80      	pop	{r7, pc}
 800ffb8:	0802ca48 	.word	0x0802ca48
 800ffbc:	0802ca64 	.word	0x0802ca64
 800ffc0:	0802ca74 	.word	0x0802ca74
 800ffc4:	0802404d 	.word	0x0802404d
 800ffc8:	0800fdb5 	.word	0x0800fdb5

0800ffcc <pbuf_free_custom>:
  * @brief  Custom Rx pbuf free callback
  * @param  pbuf: pbuf to be freed
  * @retval None
  */
void pbuf_free_custom(struct pbuf *p)
{
 800ffcc:	b580      	push	{r7, lr}
 800ffce:	b084      	sub	sp, #16
 800ffd0:	af00      	add	r7, sp, #0
 800ffd2:	6078      	str	r0, [r7, #4]
  struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p;
 800ffd4:	687b      	ldr	r3, [r7, #4]
 800ffd6:	60fb      	str	r3, [r7, #12]
  LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
 800ffd8:	68f9      	ldr	r1, [r7, #12]
 800ffda:	4809      	ldr	r0, [pc, #36]	@ (8010000 <pbuf_free_custom+0x34>)
 800ffdc:	f009 fb74 	bl	80196c8 <memp_free_pool>

  /* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to
   * call HAL_ETH_GetRxDataBuffer to rebuild the Rx descriptors. */

  if (RxAllocStatus == RX_ALLOC_ERROR)
 800ffe0:	4b08      	ldr	r3, [pc, #32]	@ (8010004 <pbuf_free_custom+0x38>)
 800ffe2:	781b      	ldrb	r3, [r3, #0]
 800ffe4:	2b01      	cmp	r3, #1
 800ffe6:	d107      	bne.n	800fff8 <pbuf_free_custom+0x2c>
  {
    RxAllocStatus = RX_ALLOC_OK;
 800ffe8:	4b06      	ldr	r3, [pc, #24]	@ (8010004 <pbuf_free_custom+0x38>)
 800ffea:	2200      	movs	r2, #0
 800ffec:	701a      	strb	r2, [r3, #0]
    osSemaphoreRelease(RxPktSemaphore);
 800ffee:	4b06      	ldr	r3, [pc, #24]	@ (8010008 <pbuf_free_custom+0x3c>)
 800fff0:	681b      	ldr	r3, [r3, #0]
 800fff2:	4618      	mov	r0, r3
 800fff4:	f000 fed4 	bl	8010da0 <osSemaphoreRelease>
  }
}
 800fff8:	bf00      	nop
 800fffa:	3710      	adds	r7, #16
 800fffc:	46bd      	mov	sp, r7
 800fffe:	bd80      	pop	{r7, pc}
 8010000:	08030abc 	.word	0x08030abc
 8010004:	240021e0 	.word	0x240021e0
 8010008:	240021e4 	.word	0x240021e4

0801000c <sys_now>:
*         when LWIP_TIMERS == 1 and NO_SYS == 1
* @param  None
* @retval Current Time value
*/
u32_t sys_now(void)
{
 801000c:	b580      	push	{r7, lr}
 801000e:	af00      	add	r7, sp, #0
  return HAL_GetTick();
 8010010:	f7f5 f818 	bl	8005044 <HAL_GetTick>
 8010014:	4603      	mov	r3, r0
}
 8010016:	4618      	mov	r0, r3
 8010018:	bd80      	pop	{r7, pc}
	...

0801001c <HAL_ETH_MspInit>:
  * @param  ethHandle: ETH handle
  * @retval None
  */

void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
{
 801001c:	b580      	push	{r7, lr}
 801001e:	b08e      	sub	sp, #56	@ 0x38
 8010020:	af00      	add	r7, sp, #0
 8010022:	6078      	str	r0, [r7, #4]
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8010024:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010028:	2200      	movs	r2, #0
 801002a:	601a      	str	r2, [r3, #0]
 801002c:	605a      	str	r2, [r3, #4]
 801002e:	609a      	str	r2, [r3, #8]
 8010030:	60da      	str	r2, [r3, #12]
 8010032:	611a      	str	r2, [r3, #16]
  if(ethHandle->Instance==ETH)
 8010034:	687b      	ldr	r3, [r7, #4]
 8010036:	681b      	ldr	r3, [r3, #0]
 8010038:	4a55      	ldr	r2, [pc, #340]	@ (8010190 <HAL_ETH_MspInit+0x174>)
 801003a:	4293      	cmp	r3, r2
 801003c:	f040 80a4 	bne.w	8010188 <HAL_ETH_MspInit+0x16c>
  {
  /* USER CODE BEGIN ETH_MspInit 0 */

  /* USER CODE END ETH_MspInit 0 */
    /* Enable Peripheral clock */
    __HAL_RCC_ETH1MAC_CLK_ENABLE();
 8010040:	4b54      	ldr	r3, [pc, #336]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 8010042:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010046:	4a53      	ldr	r2, [pc, #332]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 8010048:	f443 4300 	orr.w	r3, r3, #32768	@ 0x8000
 801004c:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 8010050:	4b50      	ldr	r3, [pc, #320]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 8010052:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010056:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 801005a:	623b      	str	r3, [r7, #32]
 801005c:	6a3b      	ldr	r3, [r7, #32]
    __HAL_RCC_ETH1TX_CLK_ENABLE();
 801005e:	4b4d      	ldr	r3, [pc, #308]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 8010060:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010064:	4a4b      	ldr	r2, [pc, #300]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 8010066:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 801006a:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 801006e:	4b49      	ldr	r3, [pc, #292]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 8010070:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010074:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8010078:	61fb      	str	r3, [r7, #28]
 801007a:	69fb      	ldr	r3, [r7, #28]
    __HAL_RCC_ETH1RX_CLK_ENABLE();
 801007c:	4b45      	ldr	r3, [pc, #276]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 801007e:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010082:	4a44      	ldr	r2, [pc, #272]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 8010084:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 8010088:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 801008c:	4b41      	ldr	r3, [pc, #260]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 801008e:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010092:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8010096:	61bb      	str	r3, [r7, #24]
 8010098:	69bb      	ldr	r3, [r7, #24]

    __HAL_RCC_GPIOC_CLK_ENABLE();
 801009a:	4b3e      	ldr	r3, [pc, #248]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 801009c:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80100a0:	4a3c      	ldr	r2, [pc, #240]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 80100a2:	f043 0304 	orr.w	r3, r3, #4
 80100a6:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80100aa:	4b3a      	ldr	r3, [pc, #232]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 80100ac:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80100b0:	f003 0304 	and.w	r3, r3, #4
 80100b4:	617b      	str	r3, [r7, #20]
 80100b6:	697b      	ldr	r3, [r7, #20]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 80100b8:	4b36      	ldr	r3, [pc, #216]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 80100ba:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80100be:	4a35      	ldr	r2, [pc, #212]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 80100c0:	f043 0301 	orr.w	r3, r3, #1
 80100c4:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80100c8:	4b32      	ldr	r3, [pc, #200]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 80100ca:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80100ce:	f003 0301 	and.w	r3, r3, #1
 80100d2:	613b      	str	r3, [r7, #16]
 80100d4:	693b      	ldr	r3, [r7, #16]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 80100d6:	4b2f      	ldr	r3, [pc, #188]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 80100d8:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80100dc:	4a2d      	ldr	r2, [pc, #180]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 80100de:	f043 0302 	orr.w	r3, r3, #2
 80100e2:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80100e6:	4b2b      	ldr	r3, [pc, #172]	@ (8010194 <HAL_ETH_MspInit+0x178>)
 80100e8:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80100ec:	f003 0302 	and.w	r3, r3, #2
 80100f0:	60fb      	str	r3, [r7, #12]
 80100f2:	68fb      	ldr	r3, [r7, #12]
    PB11     ------> ETH_TX_EN
    PB12     ------> ETH_TXD0
    PB13     ------> ETH_TXD1
    PB8     ------> ETH_TXD3
    */
    GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4
 80100f4:	233e      	movs	r3, #62	@ 0x3e
 80100f6:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_5;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 80100f8:	2302      	movs	r3, #2
 80100fa:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 80100fc:	2300      	movs	r3, #0
 80100fe:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8010100:	2303      	movs	r3, #3
 8010102:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 8010104:	230b      	movs	r3, #11
 8010106:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8010108:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 801010c:	4619      	mov	r1, r3
 801010e:	4822      	ldr	r0, [pc, #136]	@ (8010198 <HAL_ETH_MspInit+0x17c>)
 8010110:	f7f9 fac8 	bl	80096a4 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
 8010114:	238f      	movs	r3, #143	@ 0x8f
 8010116:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_7;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8010118:	2302      	movs	r3, #2
 801011a:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 801011c:	2300      	movs	r3, #0
 801011e:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8010120:	2303      	movs	r3, #3
 8010122:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 8010124:	230b      	movs	r3, #11
 8010126:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8010128:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 801012c:	4619      	mov	r1, r3
 801012e:	481b      	ldr	r0, [pc, #108]	@ (801019c <HAL_ETH_MspInit+0x180>)
 8010130:	f7f9 fab8 	bl	80096a4 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_11|GPIO_PIN_12
 8010134:	f643 1303 	movw	r3, #14595	@ 0x3903
 8010138:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_13|GPIO_PIN_8;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 801013a:	2302      	movs	r3, #2
 801013c:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 801013e:	2300      	movs	r3, #0
 8010140:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8010142:	2303      	movs	r3, #3
 8010144:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 8010146:	230b      	movs	r3, #11
 8010148:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 801014a:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 801014e:	4619      	mov	r1, r3
 8010150:	4813      	ldr	r0, [pc, #76]	@ (80101a0 <HAL_ETH_MspInit+0x184>)
 8010152:	f7f9 faa7 	bl	80096a4 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8010156:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 801015a:	627b      	str	r3, [r7, #36]	@ 0x24
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 801015c:	2302      	movs	r3, #2
 801015e:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8010160:	2300      	movs	r3, #0
 8010162:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8010164:	2303      	movs	r3, #3
 8010166:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 8010168:	230b      	movs	r3, #11
 801016a:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 801016c:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010170:	4619      	mov	r1, r3
 8010172:	480b      	ldr	r0, [pc, #44]	@ (80101a0 <HAL_ETH_MspInit+0x184>)
 8010174:	f7f9 fa96 	bl	80096a4 <HAL_GPIO_Init>

    /* Peripheral interrupt init */
    HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
 8010178:	2200      	movs	r2, #0
 801017a:	2105      	movs	r1, #5
 801017c:	203d      	movs	r0, #61	@ 0x3d
 801017e:	f7f5 f869 	bl	8005254 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(ETH_IRQn);
 8010182:	203d      	movs	r0, #61	@ 0x3d
 8010184:	f7f5 f880 	bl	8005288 <HAL_NVIC_EnableIRQ>
  /* USER CODE BEGIN ETH_MspInit 1 */

  /* USER CODE END ETH_MspInit 1 */
  }
}
 8010188:	bf00      	nop
 801018a:	3738      	adds	r7, #56	@ 0x38
 801018c:	46bd      	mov	sp, r7
 801018e:	bd80      	pop	{r7, pc}
 8010190:	40028000 	.word	0x40028000
 8010194:	58024400 	.word	0x58024400
 8010198:	58020800 	.word	0x58020800
 801019c:	58020000 	.word	0x58020000
 80101a0:	58020400 	.word	0x58020400

080101a4 <ETH_PHY_IO_Init>:
  * @brief  Initializes the MDIO interface GPIO and clocks.
  * @param  None
  * @retval 0 if OK, -1 if ERROR
  */
int32_t ETH_PHY_IO_Init(void)
{
 80101a4:	b580      	push	{r7, lr}
 80101a6:	af00      	add	r7, sp, #0
  /* We assume that MDIO GPIO configuration is already done
     in the ETH_MspInit() else it should be done here
  */

  /* Configure the MDIO Clock */
  HAL_ETH_SetMDIOClockRange(&heth);
 80101a8:	4802      	ldr	r0, [pc, #8]	@ (80101b4 <ETH_PHY_IO_Init+0x10>)
 80101aa:	f7f8 fc9b 	bl	8008ae4 <HAL_ETH_SetMDIOClockRange>

  return 0;
 80101ae:	2300      	movs	r3, #0
}
 80101b0:	4618      	mov	r0, r3
 80101b2:	bd80      	pop	{r7, pc}
 80101b4:	240021ec 	.word	0x240021ec

080101b8 <ETH_PHY_IO_DeInit>:
  * @brief  De-Initializes the MDIO interface .
  * @param  None
  * @retval 0 if OK, -1 if ERROR
  */
int32_t ETH_PHY_IO_DeInit (void)
{
 80101b8:	b480      	push	{r7}
 80101ba:	af00      	add	r7, sp, #0
  return 0;
 80101bc:	2300      	movs	r3, #0
}
 80101be:	4618      	mov	r0, r3
 80101c0:	46bd      	mov	sp, r7
 80101c2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80101c6:	4770      	bx	lr

080101c8 <ETH_PHY_IO_ReadReg>:
  * @param  RegAddr: PHY register address
  * @param  pRegVal: pointer to hold the register value
  * @retval 0 if OK -1 if Error
  */
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal)
{
 80101c8:	b580      	push	{r7, lr}
 80101ca:	b084      	sub	sp, #16
 80101cc:	af00      	add	r7, sp, #0
 80101ce:	60f8      	str	r0, [r7, #12]
 80101d0:	60b9      	str	r1, [r7, #8]
 80101d2:	607a      	str	r2, [r7, #4]
  if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
 80101d4:	687b      	ldr	r3, [r7, #4]
 80101d6:	68ba      	ldr	r2, [r7, #8]
 80101d8:	68f9      	ldr	r1, [r7, #12]
 80101da:	4807      	ldr	r0, [pc, #28]	@ (80101f8 <ETH_PHY_IO_ReadReg+0x30>)
 80101dc:	f7f8 f9ec 	bl	80085b8 <HAL_ETH_ReadPHYRegister>
 80101e0:	4603      	mov	r3, r0
 80101e2:	2b00      	cmp	r3, #0
 80101e4:	d002      	beq.n	80101ec <ETH_PHY_IO_ReadReg+0x24>
  {
    return -1;
 80101e6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80101ea:	e000      	b.n	80101ee <ETH_PHY_IO_ReadReg+0x26>
  }

  return 0;
 80101ec:	2300      	movs	r3, #0
}
 80101ee:	4618      	mov	r0, r3
 80101f0:	3710      	adds	r7, #16
 80101f2:	46bd      	mov	sp, r7
 80101f4:	bd80      	pop	{r7, pc}
 80101f6:	bf00      	nop
 80101f8:	240021ec 	.word	0x240021ec

080101fc <ETH_PHY_IO_WriteReg>:
  * @param  RegAddr: PHY register address
  * @param  RegVal: Value to be written
  * @retval 0 if OK -1 if Error
  */
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
{
 80101fc:	b580      	push	{r7, lr}
 80101fe:	b084      	sub	sp, #16
 8010200:	af00      	add	r7, sp, #0
 8010202:	60f8      	str	r0, [r7, #12]
 8010204:	60b9      	str	r1, [r7, #8]
 8010206:	607a      	str	r2, [r7, #4]
  if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
 8010208:	687b      	ldr	r3, [r7, #4]
 801020a:	68ba      	ldr	r2, [r7, #8]
 801020c:	68f9      	ldr	r1, [r7, #12]
 801020e:	4807      	ldr	r0, [pc, #28]	@ (801022c <ETH_PHY_IO_WriteReg+0x30>)
 8010210:	f7f8 fa26 	bl	8008660 <HAL_ETH_WritePHYRegister>
 8010214:	4603      	mov	r3, r0
 8010216:	2b00      	cmp	r3, #0
 8010218:	d002      	beq.n	8010220 <ETH_PHY_IO_WriteReg+0x24>
  {
    return -1;
 801021a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801021e:	e000      	b.n	8010222 <ETH_PHY_IO_WriteReg+0x26>
  }

  return 0;
 8010220:	2300      	movs	r3, #0
}
 8010222:	4618      	mov	r0, r3
 8010224:	3710      	adds	r7, #16
 8010226:	46bd      	mov	sp, r7
 8010228:	bd80      	pop	{r7, pc}
 801022a:	bf00      	nop
 801022c:	240021ec 	.word	0x240021ec

08010230 <ETH_PHY_IO_GetTick>:
/**
  * @brief  Get the time in millisecons used for internal PHY driver process.
  * @retval Time value
  */
int32_t ETH_PHY_IO_GetTick(void)
{
 8010230:	b580      	push	{r7, lr}
 8010232:	af00      	add	r7, sp, #0
  return HAL_GetTick();
 8010234:	f7f4 ff06 	bl	8005044 <HAL_GetTick>
 8010238:	4603      	mov	r3, r0
}
 801023a:	4618      	mov	r0, r3
 801023c:	bd80      	pop	{r7, pc}
	...

08010240 <ethernet_link_thread>:
/**
  * @brief  Check the ETH link state then update ETH driver and netif link accordingly.
  * @retval None
  */
void ethernet_link_thread(void* argument)
{
 8010240:	b580      	push	{r7, lr}
 8010242:	b0a2      	sub	sp, #136	@ 0x88
 8010244:	af00      	add	r7, sp, #0
 8010246:	6078      	str	r0, [r7, #4]
  ETH_MACConfigTypeDef MACConf = {0};
 8010248:	f107 0310 	add.w	r3, r7, #16
 801024c:	2264      	movs	r2, #100	@ 0x64
 801024e:	2100      	movs	r1, #0
 8010250:	4618      	mov	r0, r3
 8010252:	f019 fd55 	bl	8029d00 <memset>
  int32_t PHYLinkState = 0;
 8010256:	2300      	movs	r3, #0
 8010258:	67bb      	str	r3, [r7, #120]	@ 0x78
  uint32_t linkchanged = 0U, speed = 0U, duplex = 0U;
 801025a:	2300      	movs	r3, #0
 801025c:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 8010260:	2300      	movs	r3, #0
 8010262:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 8010266:	2300      	movs	r3, #0
 8010268:	67fb      	str	r3, [r7, #124]	@ 0x7c

  struct netif *netif = (struct netif *) argument;
 801026a:	687b      	ldr	r3, [r7, #4]
 801026c:	677b      	str	r3, [r7, #116]	@ 0x74
/* USER CODE BEGIN ETH link init */

#if USE_DHCP
  enum dhcp_states DHCP_state = DHCP_START;
 801026e:	2301      	movs	r3, #1
 8010270:	73fb      	strb	r3, [r7, #15]
//  LOCK_TCPIP_CORE();
/* USER CODE END ETH link init */

  for(;;)
  {
  PHYLinkState = DP83848_GetLinkState(&DP83848);
 8010272:	484a      	ldr	r0, [pc, #296]	@ (801039c <ethernet_link_thread+0x15c>)
 8010274:	f7f4 fe0e 	bl	8004e94 <DP83848_GetLinkState>
 8010278:	67b8      	str	r0, [r7, #120]	@ 0x78

  if(netif_is_link_up(netif) && (PHYLinkState <= DP83848_STATUS_LINK_DOWN))
 801027a:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 801027c:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8010280:	089b      	lsrs	r3, r3, #2
 8010282:	f003 0301 	and.w	r3, r3, #1
 8010286:	b2db      	uxtb	r3, r3
 8010288:	2b00      	cmp	r3, #0
 801028a:	d013      	beq.n	80102b4 <ethernet_link_thread+0x74>
 801028c:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 801028e:	2b01      	cmp	r3, #1
 8010290:	dc10      	bgt.n	80102b4 <ethernet_link_thread+0x74>
  {
    HAL_ETH_Stop_IT(&heth);
 8010292:	4843      	ldr	r0, [pc, #268]	@ (80103a0 <ethernet_link_thread+0x160>)
 8010294:	f7f7 fe1c 	bl	8007ed0 <HAL_ETH_Stop_IT>
    LOCK_TCPIP_CORE();
 8010298:	f000 f936 	bl	8010508 <sys_lock_tcpip_core>
    netif_set_down(netif);
 801029c:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 801029e:	f009 fca5 	bl	8019bec <netif_set_down>
    netif_set_link_down(netif);
 80102a2:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 80102a4:	f009 fd10 	bl	8019cc8 <netif_set_link_down>
    UNLOCK_TCPIP_CORE();
 80102a8:	f000 f93e 	bl	8010528 <sys_unlock_tcpip_core>
    printf("Link down...\r\n");
 80102ac:	483d      	ldr	r0, [pc, #244]	@ (80103a4 <ethernet_link_thread+0x164>)
 80102ae:	f019 fbfd 	bl	8029aac <puts>
 80102b2:	e067      	b.n	8010384 <ethernet_link_thread+0x144>
  }
  else if(!netif_is_link_up(netif) && (PHYLinkState > DP83848_STATUS_LINK_DOWN))
 80102b4:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 80102b6:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80102ba:	f003 0304 	and.w	r3, r3, #4
 80102be:	2b00      	cmp	r3, #0
 80102c0:	d160      	bne.n	8010384 <ethernet_link_thread+0x144>
 80102c2:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 80102c4:	2b01      	cmp	r3, #1
 80102c6:	dd5d      	ble.n	8010384 <ethernet_link_thread+0x144>
  {
    switch (PHYLinkState)
 80102c8:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 80102ca:	3b02      	subs	r3, #2
 80102cc:	2b03      	cmp	r3, #3
 80102ce:	d833      	bhi.n	8010338 <ethernet_link_thread+0xf8>
 80102d0:	a201      	add	r2, pc, #4	@ (adr r2, 80102d8 <ethernet_link_thread+0x98>)
 80102d2:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80102d6:	bf00      	nop
 80102d8:	080102e9 	.word	0x080102e9
 80102dc:	080102ff 	.word	0x080102ff
 80102e0:	08010313 	.word	0x08010313
 80102e4:	08010327 	.word	0x08010327
    {
    case DP83848_STATUS_100MBITS_FULLDUPLEX:
      duplex = ETH_FULLDUPLEX_MODE;
 80102e8:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 80102ec:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_100M;
 80102ee:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 80102f2:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 80102f6:	2301      	movs	r3, #1
 80102f8:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 80102fc:	e01d      	b.n	801033a <ethernet_link_thread+0xfa>
    case DP83848_STATUS_100MBITS_HALFDUPLEX:
      duplex = ETH_HALFDUPLEX_MODE;
 80102fe:	2300      	movs	r3, #0
 8010300:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_100M;
 8010302:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 8010306:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 801030a:	2301      	movs	r3, #1
 801030c:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 8010310:	e013      	b.n	801033a <ethernet_link_thread+0xfa>
    case DP83848_STATUS_10MBITS_FULLDUPLEX:
      duplex = ETH_FULLDUPLEX_MODE;
 8010312:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 8010316:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_10M;
 8010318:	2300      	movs	r3, #0
 801031a:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 801031e:	2301      	movs	r3, #1
 8010320:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 8010324:	e009      	b.n	801033a <ethernet_link_thread+0xfa>
    case DP83848_STATUS_10MBITS_HALFDUPLEX:
      duplex = ETH_HALFDUPLEX_MODE;
 8010326:	2300      	movs	r3, #0
 8010328:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_10M;
 801032a:	2300      	movs	r3, #0
 801032c:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 8010330:	2301      	movs	r3, #1
 8010332:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 8010336:	e000      	b.n	801033a <ethernet_link_thread+0xfa>
    default:
      break;
 8010338:	bf00      	nop
    }

    if(linkchanged)
 801033a:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 801033e:	2b00      	cmp	r3, #0
 8010340:	d020      	beq.n	8010384 <ethernet_link_thread+0x144>
    {
      /* Get MAC Config MAC */
      HAL_ETH_GetMACConfig(&heth, &MACConf);
 8010342:	f107 0310 	add.w	r3, r7, #16
 8010346:	4619      	mov	r1, r3
 8010348:	4815      	ldr	r0, [pc, #84]	@ (80103a0 <ethernet_link_thread+0x160>)
 801034a:	f7f8 f9dd 	bl	8008708 <HAL_ETH_GetMACConfig>
      MACConf.DuplexMode = duplex;
 801034e:	6ffb      	ldr	r3, [r7, #124]	@ 0x7c
 8010350:	62bb      	str	r3, [r7, #40]	@ 0x28
      MACConf.Speed = speed;
 8010352:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 8010356:	627b      	str	r3, [r7, #36]	@ 0x24
      HAL_ETH_SetMACConfig(&heth, &MACConf);
 8010358:	f107 0310 	add.w	r3, r7, #16
 801035c:	4619      	mov	r1, r3
 801035e:	4810      	ldr	r0, [pc, #64]	@ (80103a0 <ethernet_link_thread+0x160>)
 8010360:	f7f8 fba6 	bl	8008ab0 <HAL_ETH_SetMACConfig>
      HAL_ETH_Start_IT(&heth);
 8010364:	480e      	ldr	r0, [pc, #56]	@ (80103a0 <ethernet_link_thread+0x160>)
 8010366:	f7f7 fd3f 	bl	8007de8 <HAL_ETH_Start_IT>
      LOCK_TCPIP_CORE();
 801036a:	f000 f8cd 	bl	8010508 <sys_lock_tcpip_core>
      netif_set_up(netif);
 801036e:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 8010370:	f009 fbce 	bl	8019b10 <netif_set_up>
      netif_set_link_up(netif);
 8010374:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 8010376:	f009 fc6d 	bl	8019c54 <netif_set_link_up>
      UNLOCK_TCPIP_CORE();
 801037a:	f000 f8d5 	bl	8010528 <sys_unlock_tcpip_core>
      printf("Link up...\r\n");
 801037e:	480a      	ldr	r0, [pc, #40]	@ (80103a8 <ethernet_link_thread+0x168>)
 8010380:	f019 fb94 	bl	8029aac <puts>
    }
  }

/* USER CODE BEGIN ETH link Thread core code for User BSP */
#if USE_DHCP
  dhcp_sm(netif, &DHCP_state);
 8010384:	f107 030f 	add.w	r3, r7, #15
 8010388:	4619      	mov	r1, r3
 801038a:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 801038c:	f000 f922 	bl	80105d4 <dhcp_sm>
#endif
  /* ETH_CODE: workaround to call LOCK_TCPIP_CORE when accessing netif link functions*/
//  UNLOCK_TCPIP_CORE();
  osDelay(pdMS_TO_TICKS(500));
 8010390:	f44f 70fa 	mov.w	r0, #500	@ 0x1f4
 8010394:	f000 faff 	bl	8010996 <osDelay>
//  LOCK_TCPIP_CORE();
  continue; /* skip next osDelay */
 8010398:	bf00      	nop
  PHYLinkState = DP83848_GetLinkState(&DP83848);
 801039a:	e76a      	b.n	8010272 <ethernet_link_thread+0x32>
 801039c:	240022d4 	.word	0x240022d4
 80103a0:	240021ec 	.word	0x240021ec
 80103a4:	0802ca9c 	.word	0x0802ca9c
 80103a8:	0802caac 	.word	0x0802caac

080103ac <ethernetif_notify_conn_changed>:
  * @brief  This function notify user about link status changement.
  * @param  netif: the network interface
  * @retval None
  */
__weak void ethernetif_notify_conn_changed(struct netif *netif)
{
 80103ac:	b480      	push	{r7}
 80103ae:	b083      	sub	sp, #12
 80103b0:	af00      	add	r7, sp, #0
 80103b2:	6078      	str	r0, [r7, #4]
  /* NOTE : This is function could be implemented in user file
            when the callback is needed,
  */
}
 80103b4:	bf00      	nop
 80103b6:	370c      	adds	r7, #12
 80103b8:	46bd      	mov	sp, r7
 80103ba:	f85d 7b04 	ldr.w	r7, [sp], #4
 80103be:	4770      	bx	lr

080103c0 <HAL_ETH_RxAllocateCallback>:
void HAL_ETH_RxAllocateCallback(uint8_t **buff)
{
 80103c0:	b580      	push	{r7, lr}
 80103c2:	b086      	sub	sp, #24
 80103c4:	af02      	add	r7, sp, #8
 80103c6:	6078      	str	r0, [r7, #4]
/* USER CODE BEGIN HAL ETH RxAllocateCallback */
  struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL);
 80103c8:	4812      	ldr	r0, [pc, #72]	@ (8010414 <HAL_ETH_RxAllocateCallback+0x54>)
 80103ca:	f009 f909 	bl	80195e0 <memp_malloc_pool>
 80103ce:	60f8      	str	r0, [r7, #12]
  if (p)
 80103d0:	68fb      	ldr	r3, [r7, #12]
 80103d2:	2b00      	cmp	r3, #0
 80103d4:	d014      	beq.n	8010400 <HAL_ETH_RxAllocateCallback+0x40>
  {
    /* Get the buff from the struct pbuf address. */
    *buff = (uint8_t *)p + offsetof(RxBuff_t, buff);
 80103d6:	68fb      	ldr	r3, [r7, #12]
 80103d8:	f103 0220 	add.w	r2, r3, #32
 80103dc:	687b      	ldr	r3, [r7, #4]
 80103de:	601a      	str	r2, [r3, #0]
    p->custom_free_function = pbuf_free_custom;
 80103e0:	68fb      	ldr	r3, [r7, #12]
 80103e2:	4a0d      	ldr	r2, [pc, #52]	@ (8010418 <HAL_ETH_RxAllocateCallback+0x58>)
 80103e4:	611a      	str	r2, [r3, #16]
    /* Initialize the struct pbuf.
    * This must be performed whenever a buffer's allocated because it may be
    * changed by lwIP or the app, e.g., pbuf_free decrements ref. */
    pbuf_alloced_custom(PBUF_RAW, 0, PBUF_REF, p, *buff, ETH_RX_BUFFER_SIZE);
 80103e6:	687b      	ldr	r3, [r7, #4]
 80103e8:	681b      	ldr	r3, [r3, #0]
 80103ea:	f44f 62c0 	mov.w	r2, #1536	@ 0x600
 80103ee:	9201      	str	r2, [sp, #4]
 80103f0:	9300      	str	r3, [sp, #0]
 80103f2:	68fb      	ldr	r3, [r7, #12]
 80103f4:	2241      	movs	r2, #65	@ 0x41
 80103f6:	2100      	movs	r1, #0
 80103f8:	2000      	movs	r0, #0
 80103fa:	f009 fe8d 	bl	801a118 <pbuf_alloced_custom>
  {
    RxAllocStatus = RX_ALLOC_ERROR;
    *buff = NULL;
  }
/* USER CODE END HAL ETH RxAllocateCallback */
}
 80103fe:	e005      	b.n	801040c <HAL_ETH_RxAllocateCallback+0x4c>
    RxAllocStatus = RX_ALLOC_ERROR;
 8010400:	4b06      	ldr	r3, [pc, #24]	@ (801041c <HAL_ETH_RxAllocateCallback+0x5c>)
 8010402:	2201      	movs	r2, #1
 8010404:	701a      	strb	r2, [r3, #0]
    *buff = NULL;
 8010406:	687b      	ldr	r3, [r7, #4]
 8010408:	2200      	movs	r2, #0
 801040a:	601a      	str	r2, [r3, #0]
}
 801040c:	bf00      	nop
 801040e:	3710      	adds	r7, #16
 8010410:	46bd      	mov	sp, r7
 8010412:	bd80      	pop	{r7, pc}
 8010414:	08030abc 	.word	0x08030abc
 8010418:	0800ffcd 	.word	0x0800ffcd
 801041c:	240021e0 	.word	0x240021e0

08010420 <HAL_ETH_RxLinkCallback>:

void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length)
{
 8010420:	b480      	push	{r7}
 8010422:	b08d      	sub	sp, #52	@ 0x34
 8010424:	af00      	add	r7, sp, #0
 8010426:	60f8      	str	r0, [r7, #12]
 8010428:	60b9      	str	r1, [r7, #8]
 801042a:	607a      	str	r2, [r7, #4]
 801042c:	807b      	strh	r3, [r7, #2]
/* USER CODE BEGIN HAL ETH RxLinkCallback */

  struct pbuf **ppStart = (struct pbuf **)pStart;
 801042e:	68fb      	ldr	r3, [r7, #12]
 8010430:	62bb      	str	r3, [r7, #40]	@ 0x28
  struct pbuf **ppEnd = (struct pbuf **)pEnd;
 8010432:	68bb      	ldr	r3, [r7, #8]
 8010434:	627b      	str	r3, [r7, #36]	@ 0x24
  struct pbuf *p = NULL;
 8010436:	2300      	movs	r3, #0
 8010438:	62fb      	str	r3, [r7, #44]	@ 0x2c

  /* Get the struct pbuf from the buff address. */
  p = (struct pbuf *)(buff - offsetof(RxBuff_t, buff));
 801043a:	687b      	ldr	r3, [r7, #4]
 801043c:	3b20      	subs	r3, #32
 801043e:	62fb      	str	r3, [r7, #44]	@ 0x2c
  p->next = NULL;
 8010440:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010442:	2200      	movs	r2, #0
 8010444:	601a      	str	r2, [r3, #0]
  p->tot_len = 0;
 8010446:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010448:	2200      	movs	r2, #0
 801044a:	811a      	strh	r2, [r3, #8]
  p->len = Length;
 801044c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801044e:	887a      	ldrh	r2, [r7, #2]
 8010450:	815a      	strh	r2, [r3, #10]

  /* Chain the buffer. */
  if (!*ppStart)
 8010452:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8010454:	681b      	ldr	r3, [r3, #0]
 8010456:	2b00      	cmp	r3, #0
 8010458:	d103      	bne.n	8010462 <HAL_ETH_RxLinkCallback+0x42>
  {
    /* The first buffer of the packet. */
    *ppStart = p;
 801045a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801045c:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801045e:	601a      	str	r2, [r3, #0]
 8010460:	e003      	b.n	801046a <HAL_ETH_RxLinkCallback+0x4a>
  }
  else
  {
    /* Chain the buffer to the end of the packet. */
    (*ppEnd)->next = p;
 8010462:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8010464:	681b      	ldr	r3, [r3, #0]
 8010466:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8010468:	601a      	str	r2, [r3, #0]
  }
  *ppEnd  = p;
 801046a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801046c:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801046e:	601a      	str	r2, [r3, #0]

  /* Update the total length of all the buffers of the chain. Each pbuf in the chain should have its tot_len
   * set to its own length, plus the length of all the following pbufs in the chain. */
  for (p = *ppStart; p != NULL; p = p->next)
 8010470:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8010472:	681b      	ldr	r3, [r3, #0]
 8010474:	62fb      	str	r3, [r7, #44]	@ 0x2c
 8010476:	e009      	b.n	801048c <HAL_ETH_RxLinkCallback+0x6c>
  {
    p->tot_len += Length;
 8010478:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801047a:	891a      	ldrh	r2, [r3, #8]
 801047c:	887b      	ldrh	r3, [r7, #2]
 801047e:	4413      	add	r3, r2
 8010480:	b29a      	uxth	r2, r3
 8010482:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010484:	811a      	strh	r2, [r3, #8]
  for (p = *ppStart; p != NULL; p = p->next)
 8010486:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010488:	681b      	ldr	r3, [r3, #0]
 801048a:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801048c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801048e:	2b00      	cmp	r3, #0
 8010490:	d1f2      	bne.n	8010478 <HAL_ETH_RxLinkCallback+0x58>
  }

  /* Invalidate data cache because Rx DMA's writing to physical memory makes it stale. */
  SCB_InvalidateDCache_by_Addr((uint32_t *)buff, Length);
 8010492:	887b      	ldrh	r3, [r7, #2]
 8010494:	687a      	ldr	r2, [r7, #4]
 8010496:	623a      	str	r2, [r7, #32]
 8010498:	61fb      	str	r3, [r7, #28]
    if ( dsize > 0 ) { 
 801049a:	69fb      	ldr	r3, [r7, #28]
 801049c:	2b00      	cmp	r3, #0
 801049e:	dd1d      	ble.n	80104dc <HAL_ETH_RxLinkCallback+0xbc>
       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
 80104a0:	6a3b      	ldr	r3, [r7, #32]
 80104a2:	f003 021f 	and.w	r2, r3, #31
 80104a6:	69fb      	ldr	r3, [r7, #28]
 80104a8:	4413      	add	r3, r2
 80104aa:	61bb      	str	r3, [r7, #24]
      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
 80104ac:	6a3b      	ldr	r3, [r7, #32]
 80104ae:	617b      	str	r3, [r7, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 80104b0:	f3bf 8f4f 	dsb	sy
}
 80104b4:	bf00      	nop
        SCB->DCIMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
 80104b6:	4a0d      	ldr	r2, [pc, #52]	@ (80104ec <HAL_ETH_RxLinkCallback+0xcc>)
 80104b8:	697b      	ldr	r3, [r7, #20]
 80104ba:	f8c2 325c 	str.w	r3, [r2, #604]	@ 0x25c
        op_addr += __SCB_DCACHE_LINE_SIZE;
 80104be:	697b      	ldr	r3, [r7, #20]
 80104c0:	3320      	adds	r3, #32
 80104c2:	617b      	str	r3, [r7, #20]
        op_size -= __SCB_DCACHE_LINE_SIZE;
 80104c4:	69bb      	ldr	r3, [r7, #24]
 80104c6:	3b20      	subs	r3, #32
 80104c8:	61bb      	str	r3, [r7, #24]
      } while ( op_size > 0 );
 80104ca:	69bb      	ldr	r3, [r7, #24]
 80104cc:	2b00      	cmp	r3, #0
 80104ce:	dcf2      	bgt.n	80104b6 <HAL_ETH_RxLinkCallback+0x96>
  __ASM volatile ("dsb 0xF":::"memory");
 80104d0:	f3bf 8f4f 	dsb	sy
}
 80104d4:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 80104d6:	f3bf 8f6f 	isb	sy
}
 80104da:	bf00      	nop
}
 80104dc:	bf00      	nop

/* USER CODE END HAL ETH RxLinkCallback */
}
 80104de:	bf00      	nop
 80104e0:	3734      	adds	r7, #52	@ 0x34
 80104e2:	46bd      	mov	sp, r7
 80104e4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80104e8:	4770      	bx	lr
 80104ea:	bf00      	nop
 80104ec:	e000ed00 	.word	0xe000ed00

080104f0 <HAL_ETH_TxFreeCallback>:

void HAL_ETH_TxFreeCallback(uint32_t * buff)
{
 80104f0:	b580      	push	{r7, lr}
 80104f2:	b082      	sub	sp, #8
 80104f4:	af00      	add	r7, sp, #0
 80104f6:	6078      	str	r0, [r7, #4]
/* USER CODE BEGIN HAL ETH TxFreeCallback */

  pbuf_free((struct pbuf *)buff);
 80104f8:	6878      	ldr	r0, [r7, #4]
 80104fa:	f009 fff7 	bl	801a4ec <pbuf_free>

/* USER CODE END HAL ETH TxFreeCallback */
}
 80104fe:	bf00      	nop
 8010500:	3708      	adds	r7, #8
 8010502:	46bd      	mov	sp, r7
 8010504:	bd80      	pop	{r7, pc}
	...

08010508 <sys_lock_tcpip_core>:
/* ETH_CODE: add functions needed for proper multithreading support and check */

static osThreadId_t lwip_core_lock_holder_thread_id;
static osThreadId_t lwip_tcpip_thread_id;

void sys_lock_tcpip_core(void){
 8010508:	b580      	push	{r7, lr}
 801050a:	af00      	add	r7, sp, #0
	sys_mutex_lock(&lock_tcpip_core);
 801050c:	4804      	ldr	r0, [pc, #16]	@ (8010520 <sys_lock_tcpip_core+0x18>)
 801050e:	f015 ff93 	bl	8026438 <sys_mutex_lock>
	lwip_core_lock_holder_thread_id = osThreadGetId();
 8010512:	f000 fa35 	bl	8010980 <osThreadGetId>
 8010516:	4603      	mov	r3, r0
 8010518:	4a02      	ldr	r2, [pc, #8]	@ (8010524 <sys_lock_tcpip_core+0x1c>)
 801051a:	6013      	str	r3, [r2, #0]
}
 801051c:	bf00      	nop
 801051e:	bd80      	pop	{r7, pc}
 8010520:	24024334 	.word	0x24024334
 8010524:	240022f4 	.word	0x240022f4

08010528 <sys_unlock_tcpip_core>:

void sys_unlock_tcpip_core(void){
 8010528:	b580      	push	{r7, lr}
 801052a:	af00      	add	r7, sp, #0
	lwip_core_lock_holder_thread_id = 0;
 801052c:	4b03      	ldr	r3, [pc, #12]	@ (801053c <sys_unlock_tcpip_core+0x14>)
 801052e:	2200      	movs	r2, #0
 8010530:	601a      	str	r2, [r3, #0]
	sys_mutex_unlock(&lock_tcpip_core);
 8010532:	4803      	ldr	r0, [pc, #12]	@ (8010540 <sys_unlock_tcpip_core+0x18>)
 8010534:	f015 ff8f 	bl	8026456 <sys_mutex_unlock>
}
 8010538:	bf00      	nop
 801053a:	bd80      	pop	{r7, pc}
 801053c:	240022f4 	.word	0x240022f4
 8010540:	24024334 	.word	0x24024334

08010544 <sys_check_core_locking>:

void sys_check_core_locking(void){
 8010544:	b580      	push	{r7, lr}
 8010546:	b082      	sub	sp, #8
 8010548:	af00      	add	r7, sp, #0
  /* Embedded systems should check we are NOT in an interrupt context here */

  LWIP_ASSERT("Function called from interrupt context", (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0);
 801054a:	4b15      	ldr	r3, [pc, #84]	@ (80105a0 <sys_check_core_locking+0x5c>)
 801054c:	685b      	ldr	r3, [r3, #4]
 801054e:	f3c3 0308 	ubfx	r3, r3, #0, #9
 8010552:	2b00      	cmp	r3, #0
 8010554:	d006      	beq.n	8010564 <sys_check_core_locking+0x20>
 8010556:	4b13      	ldr	r3, [pc, #76]	@ (80105a4 <sys_check_core_locking+0x60>)
 8010558:	f240 4216 	movw	r2, #1046	@ 0x416
 801055c:	4912      	ldr	r1, [pc, #72]	@ (80105a8 <sys_check_core_locking+0x64>)
 801055e:	4813      	ldr	r0, [pc, #76]	@ (80105ac <sys_check_core_locking+0x68>)
 8010560:	f019 fa3c 	bl	80299dc <iprintf>

  if (lwip_tcpip_thread_id != 0) {
 8010564:	4b12      	ldr	r3, [pc, #72]	@ (80105b0 <sys_check_core_locking+0x6c>)
 8010566:	681b      	ldr	r3, [r3, #0]
 8010568:	2b00      	cmp	r3, #0
 801056a:	d014      	beq.n	8010596 <sys_check_core_locking+0x52>
	  osThreadId_t current_thread_id = osThreadGetId();
 801056c:	f000 fa08 	bl	8010980 <osThreadGetId>
 8010570:	6078      	str	r0, [r7, #4]

#if LWIP_TCPIP_CORE_LOCKING
	LWIP_ASSERT("Function called without core lock", current_thread_id == lwip_core_lock_holder_thread_id);
 8010572:	4b10      	ldr	r3, [pc, #64]	@ (80105b4 <sys_check_core_locking+0x70>)
 8010574:	681b      	ldr	r3, [r3, #0]
 8010576:	687a      	ldr	r2, [r7, #4]
 8010578:	429a      	cmp	r2, r3
 801057a:	d006      	beq.n	801058a <sys_check_core_locking+0x46>
 801057c:	4b09      	ldr	r3, [pc, #36]	@ (80105a4 <sys_check_core_locking+0x60>)
 801057e:	f240 421c 	movw	r2, #1052	@ 0x41c
 8010582:	490d      	ldr	r1, [pc, #52]	@ (80105b8 <sys_check_core_locking+0x74>)
 8010584:	4809      	ldr	r0, [pc, #36]	@ (80105ac <sys_check_core_locking+0x68>)
 8010586:	f019 fa29 	bl	80299dc <iprintf>
	/* ETH_CODE: to easily check that example has correct handling of core lock
	 * This will trigger breakpoint (__BKPT)
	 */
#warning Below check should be removed in production code
	if(current_thread_id != lwip_core_lock_holder_thread_id) __BKPT(0);
 801058a:	4b0a      	ldr	r3, [pc, #40]	@ (80105b4 <sys_check_core_locking+0x70>)
 801058c:	681b      	ldr	r3, [r3, #0]
 801058e:	687a      	ldr	r2, [r7, #4]
 8010590:	429a      	cmp	r2, r3
 8010592:	d000      	beq.n	8010596 <sys_check_core_locking+0x52>
 8010594:	be00      	bkpt	0x0000
#else /* LWIP_TCPIP_CORE_LOCKING */
	LWIP_ASSERT("Function called from wrong thread", current_thread_id == lwip_tcpip_thread_id);
#endif /* LWIP_TCPIP_CORE_LOCKING */
	LWIP_UNUSED_ARG(current_thread_id); /* for LWIP_NOASSERT */
  }
}
 8010596:	bf00      	nop
 8010598:	3708      	adds	r7, #8
 801059a:	46bd      	mov	sp, r7
 801059c:	bd80      	pop	{r7, pc}
 801059e:	bf00      	nop
 80105a0:	e000ed00 	.word	0xe000ed00
 80105a4:	0802ca48 	.word	0x0802ca48
 80105a8:	0802cab8 	.word	0x0802cab8
 80105ac:	0802ca74 	.word	0x0802ca74
 80105b0:	240022f8 	.word	0x240022f8
 80105b4:	240022f4 	.word	0x240022f4
 80105b8:	0802cae0 	.word	0x0802cae0

080105bc <sys_mark_tcpip_thread>:
void sys_mark_tcpip_thread(void){
 80105bc:	b580      	push	{r7, lr}
 80105be:	af00      	add	r7, sp, #0
	lwip_tcpip_thread_id = osThreadGetId();
 80105c0:	f000 f9de 	bl	8010980 <osThreadGetId>
 80105c4:	4603      	mov	r3, r0
 80105c6:	4a02      	ldr	r2, [pc, #8]	@ (80105d0 <sys_mark_tcpip_thread+0x14>)
 80105c8:	6013      	str	r3, [r2, #0]
}
 80105ca:	bf00      	nop
 80105cc:	bd80      	pop	{r7, pc}
 80105ce:	bf00      	nop
 80105d0:	240022f8 	.word	0x240022f8

080105d4 <dhcp_sm>:

#if USE_DHCP
void dhcp_sm(struct netif *netif, enum dhcp_states *state)
{
 80105d4:	b580      	push	{r7, lr}
 80105d6:	b08c      	sub	sp, #48	@ 0x30
 80105d8:	af00      	add	r7, sp, #0
 80105da:	6078      	str	r0, [r7, #4]
 80105dc:	6039      	str	r1, [r7, #0]
	ip_addr_t gw;
#ifdef DHCP_USER_LOGS
	uint8_t iptxt[20];
#endif

	switch(*state)
 80105de:	683b      	ldr	r3, [r7, #0]
 80105e0:	781b      	ldrb	r3, [r3, #0]
 80105e2:	2b03      	cmp	r3, #3
 80105e4:	d072      	beq.n	80106cc <dhcp_sm+0xf8>
 80105e6:	2b03      	cmp	r3, #3
 80105e8:	dc7b      	bgt.n	80106e2 <dhcp_sm+0x10e>
 80105ea:	2b01      	cmp	r3, #1
 80105ec:	d002      	beq.n	80105f4 <dhcp_sm+0x20>
 80105ee:	2b02      	cmp	r3, #2
 80105f0:	d00a      	beq.n	8010608 <dhcp_sm+0x34>
	    	{
	    		*state = DHCP_START;
	    	}
	    	break;
	    default:
	    	break;
 80105f2:	e076      	b.n	80106e2 <dhcp_sm+0x10e>
	    	*state = DHCP_WAIT_ADDRESS;
 80105f4:	683b      	ldr	r3, [r7, #0]
 80105f6:	2202      	movs	r2, #2
 80105f8:	701a      	strb	r2, [r3, #0]
	    	dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 80105fa:	687b      	ldr	r3, [r7, #4]
 80105fc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80105fe:	62fb      	str	r3, [r7, #44]	@ 0x2c
			printf("  State: Looking for DHCP server ...\n");
 8010600:	483c      	ldr	r0, [pc, #240]	@ (80106f4 <dhcp_sm+0x120>)
 8010602:	f019 fa53 	bl	8029aac <puts>
	    	break;
 8010606:	e071      	b.n	80106ec <dhcp_sm+0x118>
	    	if (dhcp_supplied_address(netif))
 8010608:	6878      	ldr	r0, [r7, #4]
 801060a:	f013 f879 	bl	8023700 <dhcp_supplied_address>
 801060e:	4603      	mov	r3, r0
 8010610:	2b00      	cmp	r3, #0
 8010612:	d015      	beq.n	8010640 <dhcp_sm+0x6c>
	    		*state = DHCP_ADDRESS_ASSIGNED;
 8010614:	683b      	ldr	r3, [r7, #0]
 8010616:	2203      	movs	r2, #3
 8010618:	701a      	strb	r2, [r3, #0]
				sprintf((char *)iptxt, "%s", ip4addr_ntoa((const ip4_addr_t *)&netif->ip_addr));
 801061a:	687b      	ldr	r3, [r7, #4]
 801061c:	3304      	adds	r3, #4
 801061e:	4618      	mov	r0, r3
 8010620:	f014 fe06 	bl	8025230 <ip4addr_ntoa>
 8010624:	4602      	mov	r2, r0
 8010626:	f107 030c 	add.w	r3, r7, #12
 801062a:	4933      	ldr	r1, [pc, #204]	@ (80106f8 <dhcp_sm+0x124>)
 801062c:	4618      	mov	r0, r3
 801062e:	f019 fa45 	bl	8029abc <siprintf>
				printf("IP address assigned by a DHCP server: %s\n", iptxt);
 8010632:	f107 030c 	add.w	r3, r7, #12
 8010636:	4619      	mov	r1, r3
 8010638:	4830      	ldr	r0, [pc, #192]	@ (80106fc <dhcp_sm+0x128>)
 801063a:	f019 f9cf 	bl	80299dc <iprintf>
	    	break;
 801063e:	e052      	b.n	80106e6 <dhcp_sm+0x112>
	    		dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 8010640:	687b      	ldr	r3, [r7, #4]
 8010642:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8010644:	62fb      	str	r3, [r7, #44]	@ 0x2c
				if (dhcp->tries > MAX_DHCP_TRIES)
 8010646:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010648:	799b      	ldrb	r3, [r3, #6]
 801064a:	2b04      	cmp	r3, #4
 801064c:	d94b      	bls.n	80106e6 <dhcp_sm+0x112>
					*state = DHCP_TIMEOUT;
 801064e:	683b      	ldr	r3, [r7, #0]
 8010650:	2204      	movs	r2, #4
 8010652:	701a      	strb	r2, [r3, #0]
					LOCK_TCPIP_CORE();
 8010654:	f7ff ff58 	bl	8010508 <sys_lock_tcpip_core>
					dhcp_stop(netif);
 8010658:	6878      	ldr	r0, [r7, #4]
 801065a:	f012 faa9 	bl	8022bb0 <dhcp_stop>
					UNLOCK_TCPIP_CORE();
 801065e:	f7ff ff63 	bl	8010528 <sys_unlock_tcpip_core>
					ipaddr_aton(STATIC_IP, &ipaddr);
 8010662:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8010666:	4619      	mov	r1, r3
 8010668:	4825      	ldr	r0, [pc, #148]	@ (8010700 <dhcp_sm+0x12c>)
 801066a:	f014 fcb7 	bl	8024fdc <ip4addr_aton>
					ipaddr_aton(STATIC_MASK, &netmask);
 801066e:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010672:	4619      	mov	r1, r3
 8010674:	4823      	ldr	r0, [pc, #140]	@ (8010704 <dhcp_sm+0x130>)
 8010676:	f014 fcb1 	bl	8024fdc <ip4addr_aton>
					ipaddr_aton(STATIC_GW, &gw);
 801067a:	f107 0320 	add.w	r3, r7, #32
 801067e:	4619      	mov	r1, r3
 8010680:	4821      	ldr	r0, [pc, #132]	@ (8010708 <dhcp_sm+0x134>)
 8010682:	f014 fcab 	bl	8024fdc <ip4addr_aton>
					LOCK_TCPIP_CORE();
 8010686:	f7ff ff3f 	bl	8010508 <sys_lock_tcpip_core>
					netif_set_addr(netif, ip_2_ip4(&ipaddr), ip_2_ip4(&netmask), ip_2_ip4(&gw));
 801068a:	f107 0320 	add.w	r3, r7, #32
 801068e:	f107 0224 	add.w	r2, r7, #36	@ 0x24
 8010692:	f107 0128 	add.w	r1, r7, #40	@ 0x28
 8010696:	6878      	ldr	r0, [r7, #4]
 8010698:	f009 f9de 	bl	8019a58 <netif_set_addr>
					UNLOCK_TCPIP_CORE();
 801069c:	f7ff ff44 	bl	8010528 <sys_unlock_tcpip_core>
					sprintf((char *)iptxt, "%s", ip4addr_ntoa((const ip4_addr_t *)&netif->ip_addr));
 80106a0:	687b      	ldr	r3, [r7, #4]
 80106a2:	3304      	adds	r3, #4
 80106a4:	4618      	mov	r0, r3
 80106a6:	f014 fdc3 	bl	8025230 <ip4addr_ntoa>
 80106aa:	4602      	mov	r2, r0
 80106ac:	f107 030c 	add.w	r3, r7, #12
 80106b0:	4911      	ldr	r1, [pc, #68]	@ (80106f8 <dhcp_sm+0x124>)
 80106b2:	4618      	mov	r0, r3
 80106b4:	f019 fa02 	bl	8029abc <siprintf>
					printf("DHCP Timeout !! \n");
 80106b8:	4814      	ldr	r0, [pc, #80]	@ (801070c <dhcp_sm+0x138>)
 80106ba:	f019 f9f7 	bl	8029aac <puts>
					printf("Static IP address: %s\n", iptxt);
 80106be:	f107 030c 	add.w	r3, r7, #12
 80106c2:	4619      	mov	r1, r3
 80106c4:	4812      	ldr	r0, [pc, #72]	@ (8010710 <dhcp_sm+0x13c>)
 80106c6:	f019 f989 	bl	80299dc <iprintf>
	    	break;
 80106ca:	e00c      	b.n	80106e6 <dhcp_sm+0x112>
	    	dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 80106cc:	687b      	ldr	r3, [r7, #4]
 80106ce:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80106d0:	62fb      	str	r3, [r7, #44]	@ 0x2c
	    	if(dhcp->state == 3)
 80106d2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80106d4:	795b      	ldrb	r3, [r3, #5]
 80106d6:	2b03      	cmp	r3, #3
 80106d8:	d107      	bne.n	80106ea <dhcp_sm+0x116>
	    		*state = DHCP_START;
 80106da:	683b      	ldr	r3, [r7, #0]
 80106dc:	2201      	movs	r2, #1
 80106de:	701a      	strb	r2, [r3, #0]
	    	break;
 80106e0:	e003      	b.n	80106ea <dhcp_sm+0x116>
	    	break;
 80106e2:	bf00      	nop
 80106e4:	e002      	b.n	80106ec <dhcp_sm+0x118>
	    	break;
 80106e6:	bf00      	nop
 80106e8:	e000      	b.n	80106ec <dhcp_sm+0x118>
	    	break;
 80106ea:	bf00      	nop
	    }
}
 80106ec:	bf00      	nop
 80106ee:	3730      	adds	r7, #48	@ 0x30
 80106f0:	46bd      	mov	sp, r7
 80106f2:	bd80      	pop	{r7, pc}
 80106f4:	0802cb04 	.word	0x0802cb04
 80106f8:	0802cb2c 	.word	0x0802cb2c
 80106fc:	0802cb30 	.word	0x0802cb30
 8010700:	0802cb5c 	.word	0x0802cb5c
 8010704:	0802cb6c 	.word	0x0802cb6c
 8010708:	0802cb7c 	.word	0x0802cb7c
 801070c:	0802cb88 	.word	0x0802cb88
 8010710:	0802cb9c 	.word	0x0802cb9c

08010714 <__NVIC_SetPriority>:
{
 8010714:	b480      	push	{r7}
 8010716:	b083      	sub	sp, #12
 8010718:	af00      	add	r7, sp, #0
 801071a:	4603      	mov	r3, r0
 801071c:	6039      	str	r1, [r7, #0]
 801071e:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 8010720:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8010724:	2b00      	cmp	r3, #0
 8010726:	db0a      	blt.n	801073e <__NVIC_SetPriority+0x2a>
    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8010728:	683b      	ldr	r3, [r7, #0]
 801072a:	b2da      	uxtb	r2, r3
 801072c:	490c      	ldr	r1, [pc, #48]	@ (8010760 <__NVIC_SetPriority+0x4c>)
 801072e:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8010732:	0112      	lsls	r2, r2, #4
 8010734:	b2d2      	uxtb	r2, r2
 8010736:	440b      	add	r3, r1
 8010738:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
}
 801073c:	e00a      	b.n	8010754 <__NVIC_SetPriority+0x40>
    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 801073e:	683b      	ldr	r3, [r7, #0]
 8010740:	b2da      	uxtb	r2, r3
 8010742:	4908      	ldr	r1, [pc, #32]	@ (8010764 <__NVIC_SetPriority+0x50>)
 8010744:	88fb      	ldrh	r3, [r7, #6]
 8010746:	f003 030f 	and.w	r3, r3, #15
 801074a:	3b04      	subs	r3, #4
 801074c:	0112      	lsls	r2, r2, #4
 801074e:	b2d2      	uxtb	r2, r2
 8010750:	440b      	add	r3, r1
 8010752:	761a      	strb	r2, [r3, #24]
}
 8010754:	bf00      	nop
 8010756:	370c      	adds	r7, #12
 8010758:	46bd      	mov	sp, r7
 801075a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801075e:	4770      	bx	lr
 8010760:	e000e100 	.word	0xe000e100
 8010764:	e000ed00 	.word	0xe000ed00

08010768 <SysTick_Handler>:

/*
  SysTick handler implementation that also clears overflow flag.
*/
#if (USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION == 0)
void SysTick_Handler (void) {
 8010768:	b580      	push	{r7, lr}
 801076a:	af00      	add	r7, sp, #0
  /* Clear overflow flag */
  SysTick->CTRL;
 801076c:	4b05      	ldr	r3, [pc, #20]	@ (8010784 <SysTick_Handler+0x1c>)
 801076e:	681b      	ldr	r3, [r3, #0]

  if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
 8010770:	f003 f946 	bl	8013a00 <xTaskGetSchedulerState>
 8010774:	4603      	mov	r3, r0
 8010776:	2b01      	cmp	r3, #1
 8010778:	d001      	beq.n	801077e <SysTick_Handler+0x16>
    /* Call tick handler */
    xPortSysTickHandler();
 801077a:	f004 fa6d 	bl	8014c58 <xPortSysTickHandler>
  }
}
 801077e:	bf00      	nop
 8010780:	bd80      	pop	{r7, pc}
 8010782:	bf00      	nop
 8010784:	e000e010 	.word	0xe000e010

08010788 <SVC_Setup>:
#endif /* SysTick */

/*
  Setup SVC to reset value.
*/
__STATIC_INLINE void SVC_Setup (void) {
 8010788:	b580      	push	{r7, lr}
 801078a:	af00      	add	r7, sp, #0
#if (__ARM_ARCH_7A__ == 0U)
  /* Service Call interrupt might be configured before kernel start     */
  /* and when its priority is lower or equal to BASEPRI, svc intruction */
  /* causes a Hard Fault.                                               */
  NVIC_SetPriority (SVCall_IRQ_NBR, 0U);
 801078c:	2100      	movs	r1, #0
 801078e:	f06f 0004 	mvn.w	r0, #4
 8010792:	f7ff ffbf 	bl	8010714 <__NVIC_SetPriority>
#endif
}
 8010796:	bf00      	nop
 8010798:	bd80      	pop	{r7, pc}
	...

0801079c <osKernelInitialize>:
static uint32_t OS_Tick_GetOverflow (void);
/* Get OS Tick interval */
static uint32_t OS_Tick_GetInterval (void);
/*---------------------------------------------------------------------------*/

osStatus_t osKernelInitialize (void) {
 801079c:	b480      	push	{r7}
 801079e:	b083      	sub	sp, #12
 80107a0:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80107a2:	f3ef 8305 	mrs	r3, IPSR
 80107a6:	603b      	str	r3, [r7, #0]
  return(result);
 80107a8:	683b      	ldr	r3, [r7, #0]
  osStatus_t stat;

  if (IS_IRQ()) {
 80107aa:	2b00      	cmp	r3, #0
 80107ac:	d003      	beq.n	80107b6 <osKernelInitialize+0x1a>
    stat = osErrorISR;
 80107ae:	f06f 0305 	mvn.w	r3, #5
 80107b2:	607b      	str	r3, [r7, #4]
 80107b4:	e00c      	b.n	80107d0 <osKernelInitialize+0x34>
  }
  else {
    if (KernelState == osKernelInactive) {
 80107b6:	4b0a      	ldr	r3, [pc, #40]	@ (80107e0 <osKernelInitialize+0x44>)
 80107b8:	681b      	ldr	r3, [r3, #0]
 80107ba:	2b00      	cmp	r3, #0
 80107bc:	d105      	bne.n	80107ca <osKernelInitialize+0x2e>
        EvrFreeRTOSSetup(0U);
      #endif
      #if defined(USE_FreeRTOS_HEAP_5) && (HEAP_5_REGION_SETUP == 1)
        vPortDefineHeapRegions (configHEAP_5_REGIONS);
      #endif
      KernelState = osKernelReady;
 80107be:	4b08      	ldr	r3, [pc, #32]	@ (80107e0 <osKernelInitialize+0x44>)
 80107c0:	2201      	movs	r2, #1
 80107c2:	601a      	str	r2, [r3, #0]
      stat = osOK;
 80107c4:	2300      	movs	r3, #0
 80107c6:	607b      	str	r3, [r7, #4]
 80107c8:	e002      	b.n	80107d0 <osKernelInitialize+0x34>
    } else {
      stat = osError;
 80107ca:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80107ce:	607b      	str	r3, [r7, #4]
    }
  }

  return (stat);
 80107d0:	687b      	ldr	r3, [r7, #4]
}
 80107d2:	4618      	mov	r0, r3
 80107d4:	370c      	adds	r7, #12
 80107d6:	46bd      	mov	sp, r7
 80107d8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80107dc:	4770      	bx	lr
 80107de:	bf00      	nop
 80107e0:	240022fc 	.word	0x240022fc

080107e4 <osKernelStart>:
  }

  return (state);
}

osStatus_t osKernelStart (void) {
 80107e4:	b580      	push	{r7, lr}
 80107e6:	b082      	sub	sp, #8
 80107e8:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80107ea:	f3ef 8305 	mrs	r3, IPSR
 80107ee:	603b      	str	r3, [r7, #0]
  return(result);
 80107f0:	683b      	ldr	r3, [r7, #0]
  osStatus_t stat;

  if (IS_IRQ()) {
 80107f2:	2b00      	cmp	r3, #0
 80107f4:	d003      	beq.n	80107fe <osKernelStart+0x1a>
    stat = osErrorISR;
 80107f6:	f06f 0305 	mvn.w	r3, #5
 80107fa:	607b      	str	r3, [r7, #4]
 80107fc:	e010      	b.n	8010820 <osKernelStart+0x3c>
  }
  else {
    if (KernelState == osKernelReady) {
 80107fe:	4b0b      	ldr	r3, [pc, #44]	@ (801082c <osKernelStart+0x48>)
 8010800:	681b      	ldr	r3, [r3, #0]
 8010802:	2b01      	cmp	r3, #1
 8010804:	d109      	bne.n	801081a <osKernelStart+0x36>
      /* Ensure SVC priority is at the reset value */
      SVC_Setup();
 8010806:	f7ff ffbf 	bl	8010788 <SVC_Setup>
      /* Change state to enable IRQ masking check */
      KernelState = osKernelRunning;
 801080a:	4b08      	ldr	r3, [pc, #32]	@ (801082c <osKernelStart+0x48>)
 801080c:	2202      	movs	r2, #2
 801080e:	601a      	str	r2, [r3, #0]
      /* Start the kernel scheduler */
      vTaskStartScheduler();
 8010810:	f002 fc3a 	bl	8013088 <vTaskStartScheduler>
      stat = osOK;
 8010814:	2300      	movs	r3, #0
 8010816:	607b      	str	r3, [r7, #4]
 8010818:	e002      	b.n	8010820 <osKernelStart+0x3c>
    } else {
      stat = osError;
 801081a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801081e:	607b      	str	r3, [r7, #4]
    }
  }

  return (stat);
 8010820:	687b      	ldr	r3, [r7, #4]
}
 8010822:	4618      	mov	r0, r3
 8010824:	3708      	adds	r7, #8
 8010826:	46bd      	mov	sp, r7
 8010828:	bd80      	pop	{r7, pc}
 801082a:	bf00      	nop
 801082c:	240022fc 	.word	0x240022fc

08010830 <osKernelGetTickCount>:
  }

  return (lock);
}

uint32_t osKernelGetTickCount (void) {
 8010830:	b580      	push	{r7, lr}
 8010832:	b082      	sub	sp, #8
 8010834:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010836:	f3ef 8305 	mrs	r3, IPSR
 801083a:	603b      	str	r3, [r7, #0]
  return(result);
 801083c:	683b      	ldr	r3, [r7, #0]
  TickType_t ticks;

  if (IS_IRQ()) {
 801083e:	2b00      	cmp	r3, #0
 8010840:	d003      	beq.n	801084a <osKernelGetTickCount+0x1a>
    ticks = xTaskGetTickCountFromISR();
 8010842:	f002 fd4d 	bl	80132e0 <xTaskGetTickCountFromISR>
 8010846:	6078      	str	r0, [r7, #4]
 8010848:	e002      	b.n	8010850 <osKernelGetTickCount+0x20>
  } else {
    ticks = xTaskGetTickCount();
 801084a:	f002 fd39 	bl	80132c0 <xTaskGetTickCount>
 801084e:	6078      	str	r0, [r7, #4]
  }

  return (ticks);
 8010850:	687b      	ldr	r3, [r7, #4]
}
 8010852:	4618      	mov	r0, r3
 8010854:	3708      	adds	r7, #8
 8010856:	46bd      	mov	sp, r7
 8010858:	bd80      	pop	{r7, pc}

0801085a <osThreadNew>:
  return (configCPU_CLOCK_HZ);
}

/*---------------------------------------------------------------------------*/

osThreadId_t osThreadNew (osThreadFunc_t func, void *argument, const osThreadAttr_t *attr) {
 801085a:	b580      	push	{r7, lr}
 801085c:	b08e      	sub	sp, #56	@ 0x38
 801085e:	af04      	add	r7, sp, #16
 8010860:	60f8      	str	r0, [r7, #12]
 8010862:	60b9      	str	r1, [r7, #8]
 8010864:	607a      	str	r2, [r7, #4]
  uint32_t stack;
  TaskHandle_t hTask;
  UBaseType_t prio;
  int32_t mem;

  hTask = NULL;
 8010866:	2300      	movs	r3, #0
 8010868:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 801086a:	f3ef 8305 	mrs	r3, IPSR
 801086e:	617b      	str	r3, [r7, #20]
  return(result);
 8010870:	697b      	ldr	r3, [r7, #20]

  if (!IS_IRQ() && (func != NULL)) {
 8010872:	2b00      	cmp	r3, #0
 8010874:	d17f      	bne.n	8010976 <osThreadNew+0x11c>
 8010876:	68fb      	ldr	r3, [r7, #12]
 8010878:	2b00      	cmp	r3, #0
 801087a:	d07c      	beq.n	8010976 <osThreadNew+0x11c>
    stack = configMINIMAL_STACK_SIZE;
 801087c:	f44f 7300 	mov.w	r3, #512	@ 0x200
 8010880:	623b      	str	r3, [r7, #32]
    prio  = (UBaseType_t)osPriorityNormal;
 8010882:	2318      	movs	r3, #24
 8010884:	61fb      	str	r3, [r7, #28]

    name = NULL;
 8010886:	2300      	movs	r3, #0
 8010888:	627b      	str	r3, [r7, #36]	@ 0x24
    mem  = -1;
 801088a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801088e:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 8010890:	687b      	ldr	r3, [r7, #4]
 8010892:	2b00      	cmp	r3, #0
 8010894:	d045      	beq.n	8010922 <osThreadNew+0xc8>
      if (attr->name != NULL) {
 8010896:	687b      	ldr	r3, [r7, #4]
 8010898:	681b      	ldr	r3, [r3, #0]
 801089a:	2b00      	cmp	r3, #0
 801089c:	d002      	beq.n	80108a4 <osThreadNew+0x4a>
        name = attr->name;
 801089e:	687b      	ldr	r3, [r7, #4]
 80108a0:	681b      	ldr	r3, [r3, #0]
 80108a2:	627b      	str	r3, [r7, #36]	@ 0x24
      }
      if (attr->priority != osPriorityNone) {
 80108a4:	687b      	ldr	r3, [r7, #4]
 80108a6:	699b      	ldr	r3, [r3, #24]
 80108a8:	2b00      	cmp	r3, #0
 80108aa:	d002      	beq.n	80108b2 <osThreadNew+0x58>
        prio = (UBaseType_t)attr->priority;
 80108ac:	687b      	ldr	r3, [r7, #4]
 80108ae:	699b      	ldr	r3, [r3, #24]
 80108b0:	61fb      	str	r3, [r7, #28]
      }

      if ((prio < osPriorityIdle) || (prio > osPriorityISR) || ((attr->attr_bits & osThreadJoinable) == osThreadJoinable)) {
 80108b2:	69fb      	ldr	r3, [r7, #28]
 80108b4:	2b00      	cmp	r3, #0
 80108b6:	d008      	beq.n	80108ca <osThreadNew+0x70>
 80108b8:	69fb      	ldr	r3, [r7, #28]
 80108ba:	2b38      	cmp	r3, #56	@ 0x38
 80108bc:	d805      	bhi.n	80108ca <osThreadNew+0x70>
 80108be:	687b      	ldr	r3, [r7, #4]
 80108c0:	685b      	ldr	r3, [r3, #4]
 80108c2:	f003 0301 	and.w	r3, r3, #1
 80108c6:	2b00      	cmp	r3, #0
 80108c8:	d001      	beq.n	80108ce <osThreadNew+0x74>
        return (NULL);
 80108ca:	2300      	movs	r3, #0
 80108cc:	e054      	b.n	8010978 <osThreadNew+0x11e>
      }

      if (attr->stack_size > 0U) {
 80108ce:	687b      	ldr	r3, [r7, #4]
 80108d0:	695b      	ldr	r3, [r3, #20]
 80108d2:	2b00      	cmp	r3, #0
 80108d4:	d003      	beq.n	80108de <osThreadNew+0x84>
        /* In FreeRTOS stack is not in bytes, but in sizeof(StackType_t) which is 4 on ARM ports.       */
        /* Stack size should be therefore 4 byte aligned in order to avoid division caused side effects */
        stack = attr->stack_size / sizeof(StackType_t);
 80108d6:	687b      	ldr	r3, [r7, #4]
 80108d8:	695b      	ldr	r3, [r3, #20]
 80108da:	089b      	lsrs	r3, r3, #2
 80108dc:	623b      	str	r3, [r7, #32]
      }

      if ((attr->cb_mem    != NULL) && (attr->cb_size    >= sizeof(StaticTask_t)) &&
 80108de:	687b      	ldr	r3, [r7, #4]
 80108e0:	689b      	ldr	r3, [r3, #8]
 80108e2:	2b00      	cmp	r3, #0
 80108e4:	d00e      	beq.n	8010904 <osThreadNew+0xaa>
 80108e6:	687b      	ldr	r3, [r7, #4]
 80108e8:	68db      	ldr	r3, [r3, #12]
 80108ea:	2ba7      	cmp	r3, #167	@ 0xa7
 80108ec:	d90a      	bls.n	8010904 <osThreadNew+0xaa>
          (attr->stack_mem != NULL) && (attr->stack_size >  0U)) {
 80108ee:	687b      	ldr	r3, [r7, #4]
 80108f0:	691b      	ldr	r3, [r3, #16]
      if ((attr->cb_mem    != NULL) && (attr->cb_size    >= sizeof(StaticTask_t)) &&
 80108f2:	2b00      	cmp	r3, #0
 80108f4:	d006      	beq.n	8010904 <osThreadNew+0xaa>
          (attr->stack_mem != NULL) && (attr->stack_size >  0U)) {
 80108f6:	687b      	ldr	r3, [r7, #4]
 80108f8:	695b      	ldr	r3, [r3, #20]
 80108fa:	2b00      	cmp	r3, #0
 80108fc:	d002      	beq.n	8010904 <osThreadNew+0xaa>
        mem = 1;
 80108fe:	2301      	movs	r3, #1
 8010900:	61bb      	str	r3, [r7, #24]
 8010902:	e010      	b.n	8010926 <osThreadNew+0xcc>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) && (attr->stack_mem == NULL)) {
 8010904:	687b      	ldr	r3, [r7, #4]
 8010906:	689b      	ldr	r3, [r3, #8]
 8010908:	2b00      	cmp	r3, #0
 801090a:	d10c      	bne.n	8010926 <osThreadNew+0xcc>
 801090c:	687b      	ldr	r3, [r7, #4]
 801090e:	68db      	ldr	r3, [r3, #12]
 8010910:	2b00      	cmp	r3, #0
 8010912:	d108      	bne.n	8010926 <osThreadNew+0xcc>
 8010914:	687b      	ldr	r3, [r7, #4]
 8010916:	691b      	ldr	r3, [r3, #16]
 8010918:	2b00      	cmp	r3, #0
 801091a:	d104      	bne.n	8010926 <osThreadNew+0xcc>
          mem = 0;
 801091c:	2300      	movs	r3, #0
 801091e:	61bb      	str	r3, [r7, #24]
 8010920:	e001      	b.n	8010926 <osThreadNew+0xcc>
        }
      }
    }
    else {
      mem = 0;
 8010922:	2300      	movs	r3, #0
 8010924:	61bb      	str	r3, [r7, #24]
    }

    if (mem == 1) {
 8010926:	69bb      	ldr	r3, [r7, #24]
 8010928:	2b01      	cmp	r3, #1
 801092a:	d110      	bne.n	801094e <osThreadNew+0xf4>
      #if (configSUPPORT_STATIC_ALLOCATION == 1)
        hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t  *)attr->stack_mem,
 801092c:	687b      	ldr	r3, [r7, #4]
 801092e:	691b      	ldr	r3, [r3, #16]
                                                                                      (StaticTask_t *)attr->cb_mem);
 8010930:	687a      	ldr	r2, [r7, #4]
 8010932:	6892      	ldr	r2, [r2, #8]
        hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t  *)attr->stack_mem,
 8010934:	9202      	str	r2, [sp, #8]
 8010936:	9301      	str	r3, [sp, #4]
 8010938:	69fb      	ldr	r3, [r7, #28]
 801093a:	9300      	str	r3, [sp, #0]
 801093c:	68bb      	ldr	r3, [r7, #8]
 801093e:	6a3a      	ldr	r2, [r7, #32]
 8010940:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8010942:	68f8      	ldr	r0, [r7, #12]
 8010944:	f002 f9ac 	bl	8012ca0 <xTaskCreateStatic>
 8010948:	4603      	mov	r3, r0
 801094a:	613b      	str	r3, [r7, #16]
 801094c:	e013      	b.n	8010976 <osThreadNew+0x11c>
      #endif
    }
    else {
      if (mem == 0) {
 801094e:	69bb      	ldr	r3, [r7, #24]
 8010950:	2b00      	cmp	r3, #0
 8010952:	d110      	bne.n	8010976 <osThreadNew+0x11c>
        #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
          if (xTaskCreate ((TaskFunction_t)func, name, (uint16_t)stack, argument, prio, &hTask) != pdPASS) {
 8010954:	6a3b      	ldr	r3, [r7, #32]
 8010956:	b29a      	uxth	r2, r3
 8010958:	f107 0310 	add.w	r3, r7, #16
 801095c:	9301      	str	r3, [sp, #4]
 801095e:	69fb      	ldr	r3, [r7, #28]
 8010960:	9300      	str	r3, [sp, #0]
 8010962:	68bb      	ldr	r3, [r7, #8]
 8010964:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8010966:	68f8      	ldr	r0, [r7, #12]
 8010968:	f002 f9fa 	bl	8012d60 <xTaskCreate>
 801096c:	4603      	mov	r3, r0
 801096e:	2b01      	cmp	r3, #1
 8010970:	d001      	beq.n	8010976 <osThreadNew+0x11c>
            hTask = NULL;
 8010972:	2300      	movs	r3, #0
 8010974:	613b      	str	r3, [r7, #16]
        #endif
      }
    }
  }

  return ((osThreadId_t)hTask);
 8010976:	693b      	ldr	r3, [r7, #16]
}
 8010978:	4618      	mov	r0, r3
 801097a:	3728      	adds	r7, #40	@ 0x28
 801097c:	46bd      	mov	sp, r7
 801097e:	bd80      	pop	{r7, pc}

08010980 <osThreadGetId>:
  }

  return (name);
}

osThreadId_t osThreadGetId (void) {
 8010980:	b580      	push	{r7, lr}
 8010982:	b082      	sub	sp, #8
 8010984:	af00      	add	r7, sp, #0
  osThreadId_t id;

  id = (osThreadId_t)xTaskGetCurrentTaskHandle();
 8010986:	f003 f82b 	bl	80139e0 <xTaskGetCurrentTaskHandle>
 801098a:	6078      	str	r0, [r7, #4]

  return (id);
 801098c:	687b      	ldr	r3, [r7, #4]
}
 801098e:	4618      	mov	r0, r3
 8010990:	3708      	adds	r7, #8
 8010992:	46bd      	mov	sp, r7
 8010994:	bd80      	pop	{r7, pc}

08010996 <osDelay>:
  /* Return flags before clearing */
  return (rflags);
}
#endif /* (configUSE_OS2_THREAD_FLAGS == 1) */

osStatus_t osDelay (uint32_t ticks) {
 8010996:	b580      	push	{r7, lr}
 8010998:	b084      	sub	sp, #16
 801099a:	af00      	add	r7, sp, #0
 801099c:	6078      	str	r0, [r7, #4]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 801099e:	f3ef 8305 	mrs	r3, IPSR
 80109a2:	60bb      	str	r3, [r7, #8]
  return(result);
 80109a4:	68bb      	ldr	r3, [r7, #8]
  osStatus_t stat;

  if (IS_IRQ()) {
 80109a6:	2b00      	cmp	r3, #0
 80109a8:	d003      	beq.n	80109b2 <osDelay+0x1c>
    stat = osErrorISR;
 80109aa:	f06f 0305 	mvn.w	r3, #5
 80109ae:	60fb      	str	r3, [r7, #12]
 80109b0:	e007      	b.n	80109c2 <osDelay+0x2c>
  }
  else {
    stat = osOK;
 80109b2:	2300      	movs	r3, #0
 80109b4:	60fb      	str	r3, [r7, #12]

    if (ticks != 0U) {
 80109b6:	687b      	ldr	r3, [r7, #4]
 80109b8:	2b00      	cmp	r3, #0
 80109ba:	d002      	beq.n	80109c2 <osDelay+0x2c>
      vTaskDelay(ticks);
 80109bc:	6878      	ldr	r0, [r7, #4]
 80109be:	f002 fb2d 	bl	801301c <vTaskDelay>
    }
  }

  return (stat);
 80109c2:	68fb      	ldr	r3, [r7, #12]
}
 80109c4:	4618      	mov	r0, r3
 80109c6:	3710      	adds	r7, #16
 80109c8:	46bd      	mov	sp, r7
 80109ca:	bd80      	pop	{r7, pc}

080109cc <osMutexNew>:
}

/*---------------------------------------------------------------------------*/
#if (configUSE_OS2_MUTEX == 1)

osMutexId_t osMutexNew (const osMutexAttr_t *attr) {
 80109cc:	b580      	push	{r7, lr}
 80109ce:	b088      	sub	sp, #32
 80109d0:	af00      	add	r7, sp, #0
 80109d2:	6078      	str	r0, [r7, #4]
  int32_t  mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hMutex = NULL;
 80109d4:	2300      	movs	r3, #0
 80109d6:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80109d8:	f3ef 8305 	mrs	r3, IPSR
 80109dc:	60bb      	str	r3, [r7, #8]
  return(result);
 80109de:	68bb      	ldr	r3, [r7, #8]

  if (!IS_IRQ()) {
 80109e0:	2b00      	cmp	r3, #0
 80109e2:	d174      	bne.n	8010ace <osMutexNew+0x102>
    if (attr != NULL) {
 80109e4:	687b      	ldr	r3, [r7, #4]
 80109e6:	2b00      	cmp	r3, #0
 80109e8:	d003      	beq.n	80109f2 <osMutexNew+0x26>
      type = attr->attr_bits;
 80109ea:	687b      	ldr	r3, [r7, #4]
 80109ec:	685b      	ldr	r3, [r3, #4]
 80109ee:	61bb      	str	r3, [r7, #24]
 80109f0:	e001      	b.n	80109f6 <osMutexNew+0x2a>
    } else {
      type = 0U;
 80109f2:	2300      	movs	r3, #0
 80109f4:	61bb      	str	r3, [r7, #24]
    }

    if ((type & osMutexRecursive) == osMutexRecursive) {
 80109f6:	69bb      	ldr	r3, [r7, #24]
 80109f8:	f003 0301 	and.w	r3, r3, #1
 80109fc:	2b00      	cmp	r3, #0
 80109fe:	d002      	beq.n	8010a06 <osMutexNew+0x3a>
      rmtx = 1U;
 8010a00:	2301      	movs	r3, #1
 8010a02:	617b      	str	r3, [r7, #20]
 8010a04:	e001      	b.n	8010a0a <osMutexNew+0x3e>
    } else {
      rmtx = 0U;
 8010a06:	2300      	movs	r3, #0
 8010a08:	617b      	str	r3, [r7, #20]
    }

    if ((type & osMutexRobust) != osMutexRobust) {
 8010a0a:	69bb      	ldr	r3, [r7, #24]
 8010a0c:	f003 0308 	and.w	r3, r3, #8
 8010a10:	2b00      	cmp	r3, #0
 8010a12:	d15c      	bne.n	8010ace <osMutexNew+0x102>
      mem = -1;
 8010a14:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010a18:	613b      	str	r3, [r7, #16]

      if (attr != NULL) {
 8010a1a:	687b      	ldr	r3, [r7, #4]
 8010a1c:	2b00      	cmp	r3, #0
 8010a1e:	d015      	beq.n	8010a4c <osMutexNew+0x80>
        if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticSemaphore_t))) {
 8010a20:	687b      	ldr	r3, [r7, #4]
 8010a22:	689b      	ldr	r3, [r3, #8]
 8010a24:	2b00      	cmp	r3, #0
 8010a26:	d006      	beq.n	8010a36 <osMutexNew+0x6a>
 8010a28:	687b      	ldr	r3, [r7, #4]
 8010a2a:	68db      	ldr	r3, [r3, #12]
 8010a2c:	2b4f      	cmp	r3, #79	@ 0x4f
 8010a2e:	d902      	bls.n	8010a36 <osMutexNew+0x6a>
          mem = 1;
 8010a30:	2301      	movs	r3, #1
 8010a32:	613b      	str	r3, [r7, #16]
 8010a34:	e00c      	b.n	8010a50 <osMutexNew+0x84>
        }
        else {
          if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
 8010a36:	687b      	ldr	r3, [r7, #4]
 8010a38:	689b      	ldr	r3, [r3, #8]
 8010a3a:	2b00      	cmp	r3, #0
 8010a3c:	d108      	bne.n	8010a50 <osMutexNew+0x84>
 8010a3e:	687b      	ldr	r3, [r7, #4]
 8010a40:	68db      	ldr	r3, [r3, #12]
 8010a42:	2b00      	cmp	r3, #0
 8010a44:	d104      	bne.n	8010a50 <osMutexNew+0x84>
            mem = 0;
 8010a46:	2300      	movs	r3, #0
 8010a48:	613b      	str	r3, [r7, #16]
 8010a4a:	e001      	b.n	8010a50 <osMutexNew+0x84>
          }
        }
      }
      else {
        mem = 0;
 8010a4c:	2300      	movs	r3, #0
 8010a4e:	613b      	str	r3, [r7, #16]
      }

      if (mem == 1) {
 8010a50:	693b      	ldr	r3, [r7, #16]
 8010a52:	2b01      	cmp	r3, #1
 8010a54:	d112      	bne.n	8010a7c <osMutexNew+0xb0>
        #if (configSUPPORT_STATIC_ALLOCATION == 1)
          if (rmtx != 0U) {
 8010a56:	697b      	ldr	r3, [r7, #20]
 8010a58:	2b00      	cmp	r3, #0
 8010a5a:	d007      	beq.n	8010a6c <osMutexNew+0xa0>
            #if (configUSE_RECURSIVE_MUTEXES == 1)
            hMutex = xSemaphoreCreateRecursiveMutexStatic (attr->cb_mem);
 8010a5c:	687b      	ldr	r3, [r7, #4]
 8010a5e:	689b      	ldr	r3, [r3, #8]
 8010a60:	4619      	mov	r1, r3
 8010a62:	2004      	movs	r0, #4
 8010a64:	f000 fdd9 	bl	801161a <xQueueCreateMutexStatic>
 8010a68:	61f8      	str	r0, [r7, #28]
 8010a6a:	e016      	b.n	8010a9a <osMutexNew+0xce>
            #endif
          }
          else {
            hMutex = xSemaphoreCreateMutexStatic (attr->cb_mem);
 8010a6c:	687b      	ldr	r3, [r7, #4]
 8010a6e:	689b      	ldr	r3, [r3, #8]
 8010a70:	4619      	mov	r1, r3
 8010a72:	2001      	movs	r0, #1
 8010a74:	f000 fdd1 	bl	801161a <xQueueCreateMutexStatic>
 8010a78:	61f8      	str	r0, [r7, #28]
 8010a7a:	e00e      	b.n	8010a9a <osMutexNew+0xce>
          }
        #endif
      }
      else {
        if (mem == 0) {
 8010a7c:	693b      	ldr	r3, [r7, #16]
 8010a7e:	2b00      	cmp	r3, #0
 8010a80:	d10b      	bne.n	8010a9a <osMutexNew+0xce>
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            if (rmtx != 0U) {
 8010a82:	697b      	ldr	r3, [r7, #20]
 8010a84:	2b00      	cmp	r3, #0
 8010a86:	d004      	beq.n	8010a92 <osMutexNew+0xc6>
              #if (configUSE_RECURSIVE_MUTEXES == 1)
              hMutex = xSemaphoreCreateRecursiveMutex ();
 8010a88:	2004      	movs	r0, #4
 8010a8a:	f000 fdae 	bl	80115ea <xQueueCreateMutex>
 8010a8e:	61f8      	str	r0, [r7, #28]
 8010a90:	e003      	b.n	8010a9a <osMutexNew+0xce>
              #endif
            } else {
              hMutex = xSemaphoreCreateMutex ();
 8010a92:	2001      	movs	r0, #1
 8010a94:	f000 fda9 	bl	80115ea <xQueueCreateMutex>
 8010a98:	61f8      	str	r0, [r7, #28]
          #endif
        }
      }

      #if (configQUEUE_REGISTRY_SIZE > 0)
      if (hMutex != NULL) {
 8010a9a:	69fb      	ldr	r3, [r7, #28]
 8010a9c:	2b00      	cmp	r3, #0
 8010a9e:	d00c      	beq.n	8010aba <osMutexNew+0xee>
        if (attr != NULL) {
 8010aa0:	687b      	ldr	r3, [r7, #4]
 8010aa2:	2b00      	cmp	r3, #0
 8010aa4:	d003      	beq.n	8010aae <osMutexNew+0xe2>
          name = attr->name;
 8010aa6:	687b      	ldr	r3, [r7, #4]
 8010aa8:	681b      	ldr	r3, [r3, #0]
 8010aaa:	60fb      	str	r3, [r7, #12]
 8010aac:	e001      	b.n	8010ab2 <osMutexNew+0xe6>
        } else {
          name = NULL;
 8010aae:	2300      	movs	r3, #0
 8010ab0:	60fb      	str	r3, [r7, #12]
        }
        vQueueAddToRegistry (hMutex, name);
 8010ab2:	68f9      	ldr	r1, [r7, #12]
 8010ab4:	69f8      	ldr	r0, [r7, #28]
 8010ab6:	f001 fcd3 	bl	8012460 <vQueueAddToRegistry>
      }
      #endif

      if ((hMutex != NULL) && (rmtx != 0U)) {
 8010aba:	69fb      	ldr	r3, [r7, #28]
 8010abc:	2b00      	cmp	r3, #0
 8010abe:	d006      	beq.n	8010ace <osMutexNew+0x102>
 8010ac0:	697b      	ldr	r3, [r7, #20]
 8010ac2:	2b00      	cmp	r3, #0
 8010ac4:	d003      	beq.n	8010ace <osMutexNew+0x102>
        hMutex = (SemaphoreHandle_t)((uint32_t)hMutex | 1U);
 8010ac6:	69fb      	ldr	r3, [r7, #28]
 8010ac8:	f043 0301 	orr.w	r3, r3, #1
 8010acc:	61fb      	str	r3, [r7, #28]
      }
    }
  }

  return ((osMutexId_t)hMutex);
 8010ace:	69fb      	ldr	r3, [r7, #28]
}
 8010ad0:	4618      	mov	r0, r3
 8010ad2:	3720      	adds	r7, #32
 8010ad4:	46bd      	mov	sp, r7
 8010ad6:	bd80      	pop	{r7, pc}

08010ad8 <osMutexAcquire>:

osStatus_t osMutexAcquire (osMutexId_t mutex_id, uint32_t timeout) {
 8010ad8:	b580      	push	{r7, lr}
 8010ada:	b086      	sub	sp, #24
 8010adc:	af00      	add	r7, sp, #0
 8010ade:	6078      	str	r0, [r7, #4]
 8010ae0:	6039      	str	r1, [r7, #0]
  SemaphoreHandle_t hMutex;
  osStatus_t stat;
  uint32_t rmtx;

  hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U);
 8010ae2:	687b      	ldr	r3, [r7, #4]
 8010ae4:	f023 0301 	bic.w	r3, r3, #1
 8010ae8:	613b      	str	r3, [r7, #16]

  rmtx = (uint32_t)mutex_id & 1U;
 8010aea:	687b      	ldr	r3, [r7, #4]
 8010aec:	f003 0301 	and.w	r3, r3, #1
 8010af0:	60fb      	str	r3, [r7, #12]

  stat = osOK;
 8010af2:	2300      	movs	r3, #0
 8010af4:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010af6:	f3ef 8305 	mrs	r3, IPSR
 8010afa:	60bb      	str	r3, [r7, #8]
  return(result);
 8010afc:	68bb      	ldr	r3, [r7, #8]

  if (IS_IRQ()) {
 8010afe:	2b00      	cmp	r3, #0
 8010b00:	d003      	beq.n	8010b0a <osMutexAcquire+0x32>
    stat = osErrorISR;
 8010b02:	f06f 0305 	mvn.w	r3, #5
 8010b06:	617b      	str	r3, [r7, #20]
 8010b08:	e02c      	b.n	8010b64 <osMutexAcquire+0x8c>
  }
  else if (hMutex == NULL) {
 8010b0a:	693b      	ldr	r3, [r7, #16]
 8010b0c:	2b00      	cmp	r3, #0
 8010b0e:	d103      	bne.n	8010b18 <osMutexAcquire+0x40>
    stat = osErrorParameter;
 8010b10:	f06f 0303 	mvn.w	r3, #3
 8010b14:	617b      	str	r3, [r7, #20]
 8010b16:	e025      	b.n	8010b64 <osMutexAcquire+0x8c>
  }
  else {
    if (rmtx != 0U) {
 8010b18:	68fb      	ldr	r3, [r7, #12]
 8010b1a:	2b00      	cmp	r3, #0
 8010b1c:	d011      	beq.n	8010b42 <osMutexAcquire+0x6a>
      #if (configUSE_RECURSIVE_MUTEXES == 1)
      if (xSemaphoreTakeRecursive (hMutex, timeout) != pdPASS) {
 8010b1e:	6839      	ldr	r1, [r7, #0]
 8010b20:	6938      	ldr	r0, [r7, #16]
 8010b22:	f000 fdca 	bl	80116ba <xQueueTakeMutexRecursive>
 8010b26:	4603      	mov	r3, r0
 8010b28:	2b01      	cmp	r3, #1
 8010b2a:	d01b      	beq.n	8010b64 <osMutexAcquire+0x8c>
        if (timeout != 0U) {
 8010b2c:	683b      	ldr	r3, [r7, #0]
 8010b2e:	2b00      	cmp	r3, #0
 8010b30:	d003      	beq.n	8010b3a <osMutexAcquire+0x62>
          stat = osErrorTimeout;
 8010b32:	f06f 0301 	mvn.w	r3, #1
 8010b36:	617b      	str	r3, [r7, #20]
 8010b38:	e014      	b.n	8010b64 <osMutexAcquire+0x8c>
        } else {
          stat = osErrorResource;
 8010b3a:	f06f 0302 	mvn.w	r3, #2
 8010b3e:	617b      	str	r3, [r7, #20]
 8010b40:	e010      	b.n	8010b64 <osMutexAcquire+0x8c>
        }
      }
      #endif
    }
    else {
      if (xSemaphoreTake (hMutex, timeout) != pdPASS) {
 8010b42:	6839      	ldr	r1, [r7, #0]
 8010b44:	6938      	ldr	r0, [r7, #16]
 8010b46:	f001 f96f 	bl	8011e28 <xQueueSemaphoreTake>
 8010b4a:	4603      	mov	r3, r0
 8010b4c:	2b01      	cmp	r3, #1
 8010b4e:	d009      	beq.n	8010b64 <osMutexAcquire+0x8c>
        if (timeout != 0U) {
 8010b50:	683b      	ldr	r3, [r7, #0]
 8010b52:	2b00      	cmp	r3, #0
 8010b54:	d003      	beq.n	8010b5e <osMutexAcquire+0x86>
          stat = osErrorTimeout;
 8010b56:	f06f 0301 	mvn.w	r3, #1
 8010b5a:	617b      	str	r3, [r7, #20]
 8010b5c:	e002      	b.n	8010b64 <osMutexAcquire+0x8c>
        } else {
          stat = osErrorResource;
 8010b5e:	f06f 0302 	mvn.w	r3, #2
 8010b62:	617b      	str	r3, [r7, #20]
        }
      }
    }
  }

  return (stat);
 8010b64:	697b      	ldr	r3, [r7, #20]
}
 8010b66:	4618      	mov	r0, r3
 8010b68:	3718      	adds	r7, #24
 8010b6a:	46bd      	mov	sp, r7
 8010b6c:	bd80      	pop	{r7, pc}

08010b6e <osMutexRelease>:

osStatus_t osMutexRelease (osMutexId_t mutex_id) {
 8010b6e:	b580      	push	{r7, lr}
 8010b70:	b086      	sub	sp, #24
 8010b72:	af00      	add	r7, sp, #0
 8010b74:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hMutex;
  osStatus_t stat;
  uint32_t rmtx;

  hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U);
 8010b76:	687b      	ldr	r3, [r7, #4]
 8010b78:	f023 0301 	bic.w	r3, r3, #1
 8010b7c:	613b      	str	r3, [r7, #16]

  rmtx = (uint32_t)mutex_id & 1U;
 8010b7e:	687b      	ldr	r3, [r7, #4]
 8010b80:	f003 0301 	and.w	r3, r3, #1
 8010b84:	60fb      	str	r3, [r7, #12]

  stat = osOK;
 8010b86:	2300      	movs	r3, #0
 8010b88:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010b8a:	f3ef 8305 	mrs	r3, IPSR
 8010b8e:	60bb      	str	r3, [r7, #8]
  return(result);
 8010b90:	68bb      	ldr	r3, [r7, #8]

  if (IS_IRQ()) {
 8010b92:	2b00      	cmp	r3, #0
 8010b94:	d003      	beq.n	8010b9e <osMutexRelease+0x30>
    stat = osErrorISR;
 8010b96:	f06f 0305 	mvn.w	r3, #5
 8010b9a:	617b      	str	r3, [r7, #20]
 8010b9c:	e01f      	b.n	8010bde <osMutexRelease+0x70>
  }
  else if (hMutex == NULL) {
 8010b9e:	693b      	ldr	r3, [r7, #16]
 8010ba0:	2b00      	cmp	r3, #0
 8010ba2:	d103      	bne.n	8010bac <osMutexRelease+0x3e>
    stat = osErrorParameter;
 8010ba4:	f06f 0303 	mvn.w	r3, #3
 8010ba8:	617b      	str	r3, [r7, #20]
 8010baa:	e018      	b.n	8010bde <osMutexRelease+0x70>
  }
  else {
    if (rmtx != 0U) {
 8010bac:	68fb      	ldr	r3, [r7, #12]
 8010bae:	2b00      	cmp	r3, #0
 8010bb0:	d009      	beq.n	8010bc6 <osMutexRelease+0x58>
      #if (configUSE_RECURSIVE_MUTEXES == 1)
      if (xSemaphoreGiveRecursive (hMutex) != pdPASS) {
 8010bb2:	6938      	ldr	r0, [r7, #16]
 8010bb4:	f000 fd4c 	bl	8011650 <xQueueGiveMutexRecursive>
 8010bb8:	4603      	mov	r3, r0
 8010bba:	2b01      	cmp	r3, #1
 8010bbc:	d00f      	beq.n	8010bde <osMutexRelease+0x70>
        stat = osErrorResource;
 8010bbe:	f06f 0302 	mvn.w	r3, #2
 8010bc2:	617b      	str	r3, [r7, #20]
 8010bc4:	e00b      	b.n	8010bde <osMutexRelease+0x70>
      }
      #endif
    }
    else {
      if (xSemaphoreGive (hMutex) != pdPASS) {
 8010bc6:	2300      	movs	r3, #0
 8010bc8:	2200      	movs	r2, #0
 8010bca:	2100      	movs	r1, #0
 8010bcc:	6938      	ldr	r0, [r7, #16]
 8010bce:	f000 fe19 	bl	8011804 <xQueueGenericSend>
 8010bd2:	4603      	mov	r3, r0
 8010bd4:	2b01      	cmp	r3, #1
 8010bd6:	d002      	beq.n	8010bde <osMutexRelease+0x70>
        stat = osErrorResource;
 8010bd8:	f06f 0302 	mvn.w	r3, #2
 8010bdc:	617b      	str	r3, [r7, #20]
      }
    }
  }

  return (stat);
 8010bde:	697b      	ldr	r3, [r7, #20]
}
 8010be0:	4618      	mov	r0, r3
 8010be2:	3718      	adds	r7, #24
 8010be4:	46bd      	mov	sp, r7
 8010be6:	bd80      	pop	{r7, pc}

08010be8 <osSemaphoreNew>:
}
#endif /* (configUSE_OS2_MUTEX == 1) */

/*---------------------------------------------------------------------------*/

osSemaphoreId_t osSemaphoreNew (uint32_t max_count, uint32_t initial_count, const osSemaphoreAttr_t *attr) {
 8010be8:	b580      	push	{r7, lr}
 8010bea:	b08a      	sub	sp, #40	@ 0x28
 8010bec:	af02      	add	r7, sp, #8
 8010bee:	60f8      	str	r0, [r7, #12]
 8010bf0:	60b9      	str	r1, [r7, #8]
 8010bf2:	607a      	str	r2, [r7, #4]
  int32_t mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hSemaphore = NULL;
 8010bf4:	2300      	movs	r3, #0
 8010bf6:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010bf8:	f3ef 8305 	mrs	r3, IPSR
 8010bfc:	613b      	str	r3, [r7, #16]
  return(result);
 8010bfe:	693b      	ldr	r3, [r7, #16]

  if (!IS_IRQ() && (max_count > 0U) && (initial_count <= max_count)) {
 8010c00:	2b00      	cmp	r3, #0
 8010c02:	d175      	bne.n	8010cf0 <osSemaphoreNew+0x108>
 8010c04:	68fb      	ldr	r3, [r7, #12]
 8010c06:	2b00      	cmp	r3, #0
 8010c08:	d072      	beq.n	8010cf0 <osSemaphoreNew+0x108>
 8010c0a:	68ba      	ldr	r2, [r7, #8]
 8010c0c:	68fb      	ldr	r3, [r7, #12]
 8010c0e:	429a      	cmp	r2, r3
 8010c10:	d86e      	bhi.n	8010cf0 <osSemaphoreNew+0x108>
    mem = -1;
 8010c12:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010c16:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 8010c18:	687b      	ldr	r3, [r7, #4]
 8010c1a:	2b00      	cmp	r3, #0
 8010c1c:	d015      	beq.n	8010c4a <osSemaphoreNew+0x62>
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticSemaphore_t))) {
 8010c1e:	687b      	ldr	r3, [r7, #4]
 8010c20:	689b      	ldr	r3, [r3, #8]
 8010c22:	2b00      	cmp	r3, #0
 8010c24:	d006      	beq.n	8010c34 <osSemaphoreNew+0x4c>
 8010c26:	687b      	ldr	r3, [r7, #4]
 8010c28:	68db      	ldr	r3, [r3, #12]
 8010c2a:	2b4f      	cmp	r3, #79	@ 0x4f
 8010c2c:	d902      	bls.n	8010c34 <osSemaphoreNew+0x4c>
        mem = 1;
 8010c2e:	2301      	movs	r3, #1
 8010c30:	61bb      	str	r3, [r7, #24]
 8010c32:	e00c      	b.n	8010c4e <osSemaphoreNew+0x66>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
 8010c34:	687b      	ldr	r3, [r7, #4]
 8010c36:	689b      	ldr	r3, [r3, #8]
 8010c38:	2b00      	cmp	r3, #0
 8010c3a:	d108      	bne.n	8010c4e <osSemaphoreNew+0x66>
 8010c3c:	687b      	ldr	r3, [r7, #4]
 8010c3e:	68db      	ldr	r3, [r3, #12]
 8010c40:	2b00      	cmp	r3, #0
 8010c42:	d104      	bne.n	8010c4e <osSemaphoreNew+0x66>
          mem = 0;
 8010c44:	2300      	movs	r3, #0
 8010c46:	61bb      	str	r3, [r7, #24]
 8010c48:	e001      	b.n	8010c4e <osSemaphoreNew+0x66>
        }
      }
    }
    else {
      mem = 0;
 8010c4a:	2300      	movs	r3, #0
 8010c4c:	61bb      	str	r3, [r7, #24]
    }

    if (mem != -1) {
 8010c4e:	69bb      	ldr	r3, [r7, #24]
 8010c50:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8010c54:	d04c      	beq.n	8010cf0 <osSemaphoreNew+0x108>
      if (max_count == 1U) {
 8010c56:	68fb      	ldr	r3, [r7, #12]
 8010c58:	2b01      	cmp	r3, #1
 8010c5a:	d128      	bne.n	8010cae <osSemaphoreNew+0xc6>
        if (mem == 1) {
 8010c5c:	69bb      	ldr	r3, [r7, #24]
 8010c5e:	2b01      	cmp	r3, #1
 8010c60:	d10a      	bne.n	8010c78 <osSemaphoreNew+0x90>
          #if (configSUPPORT_STATIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateBinaryStatic ((StaticSemaphore_t *)attr->cb_mem);
 8010c62:	687b      	ldr	r3, [r7, #4]
 8010c64:	689b      	ldr	r3, [r3, #8]
 8010c66:	2203      	movs	r2, #3
 8010c68:	9200      	str	r2, [sp, #0]
 8010c6a:	2200      	movs	r2, #0
 8010c6c:	2100      	movs	r1, #0
 8010c6e:	2001      	movs	r0, #1
 8010c70:	f000 fbc6 	bl	8011400 <xQueueGenericCreateStatic>
 8010c74:	61f8      	str	r0, [r7, #28]
 8010c76:	e005      	b.n	8010c84 <osSemaphoreNew+0x9c>
          #endif
        }
        else {
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateBinary();
 8010c78:	2203      	movs	r2, #3
 8010c7a:	2100      	movs	r1, #0
 8010c7c:	2001      	movs	r0, #1
 8010c7e:	f000 fc3c 	bl	80114fa <xQueueGenericCreate>
 8010c82:	61f8      	str	r0, [r7, #28]
          #endif
        }

        if ((hSemaphore != NULL) && (initial_count != 0U)) {
 8010c84:	69fb      	ldr	r3, [r7, #28]
 8010c86:	2b00      	cmp	r3, #0
 8010c88:	d022      	beq.n	8010cd0 <osSemaphoreNew+0xe8>
 8010c8a:	68bb      	ldr	r3, [r7, #8]
 8010c8c:	2b00      	cmp	r3, #0
 8010c8e:	d01f      	beq.n	8010cd0 <osSemaphoreNew+0xe8>
          if (xSemaphoreGive (hSemaphore) != pdPASS) {
 8010c90:	2300      	movs	r3, #0
 8010c92:	2200      	movs	r2, #0
 8010c94:	2100      	movs	r1, #0
 8010c96:	69f8      	ldr	r0, [r7, #28]
 8010c98:	f000 fdb4 	bl	8011804 <xQueueGenericSend>
 8010c9c:	4603      	mov	r3, r0
 8010c9e:	2b01      	cmp	r3, #1
 8010ca0:	d016      	beq.n	8010cd0 <osSemaphoreNew+0xe8>
            vSemaphoreDelete (hSemaphore);
 8010ca2:	69f8      	ldr	r0, [r7, #28]
 8010ca4:	f001 fa90 	bl	80121c8 <vQueueDelete>
            hSemaphore = NULL;
 8010ca8:	2300      	movs	r3, #0
 8010caa:	61fb      	str	r3, [r7, #28]
 8010cac:	e010      	b.n	8010cd0 <osSemaphoreNew+0xe8>
          }
        }
      }
      else {
        if (mem == 1) {
 8010cae:	69bb      	ldr	r3, [r7, #24]
 8010cb0:	2b01      	cmp	r3, #1
 8010cb2:	d108      	bne.n	8010cc6 <osSemaphoreNew+0xde>
          #if (configSUPPORT_STATIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateCountingStatic (max_count, initial_count, (StaticSemaphore_t *)attr->cb_mem);
 8010cb4:	687b      	ldr	r3, [r7, #4]
 8010cb6:	689b      	ldr	r3, [r3, #8]
 8010cb8:	461a      	mov	r2, r3
 8010cba:	68b9      	ldr	r1, [r7, #8]
 8010cbc:	68f8      	ldr	r0, [r7, #12]
 8010cbe:	f000 fd33 	bl	8011728 <xQueueCreateCountingSemaphoreStatic>
 8010cc2:	61f8      	str	r0, [r7, #28]
 8010cc4:	e004      	b.n	8010cd0 <osSemaphoreNew+0xe8>
          #endif
        }
        else {
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateCounting (max_count, initial_count);
 8010cc6:	68b9      	ldr	r1, [r7, #8]
 8010cc8:	68f8      	ldr	r0, [r7, #12]
 8010cca:	f000 fd66 	bl	801179a <xQueueCreateCountingSemaphore>
 8010cce:	61f8      	str	r0, [r7, #28]
          #endif
        }
      }
      
      #if (configQUEUE_REGISTRY_SIZE > 0)
      if (hSemaphore != NULL) {
 8010cd0:	69fb      	ldr	r3, [r7, #28]
 8010cd2:	2b00      	cmp	r3, #0
 8010cd4:	d00c      	beq.n	8010cf0 <osSemaphoreNew+0x108>
        if (attr != NULL) {
 8010cd6:	687b      	ldr	r3, [r7, #4]
 8010cd8:	2b00      	cmp	r3, #0
 8010cda:	d003      	beq.n	8010ce4 <osSemaphoreNew+0xfc>
          name = attr->name;
 8010cdc:	687b      	ldr	r3, [r7, #4]
 8010cde:	681b      	ldr	r3, [r3, #0]
 8010ce0:	617b      	str	r3, [r7, #20]
 8010ce2:	e001      	b.n	8010ce8 <osSemaphoreNew+0x100>
        } else {
          name = NULL;
 8010ce4:	2300      	movs	r3, #0
 8010ce6:	617b      	str	r3, [r7, #20]
        }
        vQueueAddToRegistry (hSemaphore, name);
 8010ce8:	6979      	ldr	r1, [r7, #20]
 8010cea:	69f8      	ldr	r0, [r7, #28]
 8010cec:	f001 fbb8 	bl	8012460 <vQueueAddToRegistry>
      }
      #endif
    }
  }

  return ((osSemaphoreId_t)hSemaphore);
 8010cf0:	69fb      	ldr	r3, [r7, #28]
}
 8010cf2:	4618      	mov	r0, r3
 8010cf4:	3720      	adds	r7, #32
 8010cf6:	46bd      	mov	sp, r7
 8010cf8:	bd80      	pop	{r7, pc}
	...

08010cfc <osSemaphoreAcquire>:

osStatus_t osSemaphoreAcquire (osSemaphoreId_t semaphore_id, uint32_t timeout) {
 8010cfc:	b580      	push	{r7, lr}
 8010cfe:	b086      	sub	sp, #24
 8010d00:	af00      	add	r7, sp, #0
 8010d02:	6078      	str	r0, [r7, #4]
 8010d04:	6039      	str	r1, [r7, #0]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 8010d06:	687b      	ldr	r3, [r7, #4]
 8010d08:	613b      	str	r3, [r7, #16]
  osStatus_t stat;
  BaseType_t yield;

  stat = osOK;
 8010d0a:	2300      	movs	r3, #0
 8010d0c:	617b      	str	r3, [r7, #20]

  if (hSemaphore == NULL) {
 8010d0e:	693b      	ldr	r3, [r7, #16]
 8010d10:	2b00      	cmp	r3, #0
 8010d12:	d103      	bne.n	8010d1c <osSemaphoreAcquire+0x20>
    stat = osErrorParameter;
 8010d14:	f06f 0303 	mvn.w	r3, #3
 8010d18:	617b      	str	r3, [r7, #20]
 8010d1a:	e039      	b.n	8010d90 <osSemaphoreAcquire+0x94>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010d1c:	f3ef 8305 	mrs	r3, IPSR
 8010d20:	60fb      	str	r3, [r7, #12]
  return(result);
 8010d22:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 8010d24:	2b00      	cmp	r3, #0
 8010d26:	d022      	beq.n	8010d6e <osSemaphoreAcquire+0x72>
    if (timeout != 0U) {
 8010d28:	683b      	ldr	r3, [r7, #0]
 8010d2a:	2b00      	cmp	r3, #0
 8010d2c:	d003      	beq.n	8010d36 <osSemaphoreAcquire+0x3a>
      stat = osErrorParameter;
 8010d2e:	f06f 0303 	mvn.w	r3, #3
 8010d32:	617b      	str	r3, [r7, #20]
 8010d34:	e02c      	b.n	8010d90 <osSemaphoreAcquire+0x94>
    }
    else {
      yield = pdFALSE;
 8010d36:	2300      	movs	r3, #0
 8010d38:	60bb      	str	r3, [r7, #8]

      if (xSemaphoreTakeFromISR (hSemaphore, &yield) != pdPASS) {
 8010d3a:	f107 0308 	add.w	r3, r7, #8
 8010d3e:	461a      	mov	r2, r3
 8010d40:	2100      	movs	r1, #0
 8010d42:	6938      	ldr	r0, [r7, #16]
 8010d44:	f001 f980 	bl	8012048 <xQueueReceiveFromISR>
 8010d48:	4603      	mov	r3, r0
 8010d4a:	2b01      	cmp	r3, #1
 8010d4c:	d003      	beq.n	8010d56 <osSemaphoreAcquire+0x5a>
        stat = osErrorResource;
 8010d4e:	f06f 0302 	mvn.w	r3, #2
 8010d52:	617b      	str	r3, [r7, #20]
 8010d54:	e01c      	b.n	8010d90 <osSemaphoreAcquire+0x94>
      } else {
        portYIELD_FROM_ISR (yield);
 8010d56:	68bb      	ldr	r3, [r7, #8]
 8010d58:	2b00      	cmp	r3, #0
 8010d5a:	d019      	beq.n	8010d90 <osSemaphoreAcquire+0x94>
 8010d5c:	4b0f      	ldr	r3, [pc, #60]	@ (8010d9c <osSemaphoreAcquire+0xa0>)
 8010d5e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8010d62:	601a      	str	r2, [r3, #0]
 8010d64:	f3bf 8f4f 	dsb	sy
 8010d68:	f3bf 8f6f 	isb	sy
 8010d6c:	e010      	b.n	8010d90 <osSemaphoreAcquire+0x94>
      }
    }
  }
  else {
    if (xSemaphoreTake (hSemaphore, (TickType_t)timeout) != pdPASS) {
 8010d6e:	6839      	ldr	r1, [r7, #0]
 8010d70:	6938      	ldr	r0, [r7, #16]
 8010d72:	f001 f859 	bl	8011e28 <xQueueSemaphoreTake>
 8010d76:	4603      	mov	r3, r0
 8010d78:	2b01      	cmp	r3, #1
 8010d7a:	d009      	beq.n	8010d90 <osSemaphoreAcquire+0x94>
      if (timeout != 0U) {
 8010d7c:	683b      	ldr	r3, [r7, #0]
 8010d7e:	2b00      	cmp	r3, #0
 8010d80:	d003      	beq.n	8010d8a <osSemaphoreAcquire+0x8e>
        stat = osErrorTimeout;
 8010d82:	f06f 0301 	mvn.w	r3, #1
 8010d86:	617b      	str	r3, [r7, #20]
 8010d88:	e002      	b.n	8010d90 <osSemaphoreAcquire+0x94>
      } else {
        stat = osErrorResource;
 8010d8a:	f06f 0302 	mvn.w	r3, #2
 8010d8e:	617b      	str	r3, [r7, #20]
      }
    }
  }

  return (stat);
 8010d90:	697b      	ldr	r3, [r7, #20]
}
 8010d92:	4618      	mov	r0, r3
 8010d94:	3718      	adds	r7, #24
 8010d96:	46bd      	mov	sp, r7
 8010d98:	bd80      	pop	{r7, pc}
 8010d9a:	bf00      	nop
 8010d9c:	e000ed04 	.word	0xe000ed04

08010da0 <osSemaphoreRelease>:

osStatus_t osSemaphoreRelease (osSemaphoreId_t semaphore_id) {
 8010da0:	b580      	push	{r7, lr}
 8010da2:	b086      	sub	sp, #24
 8010da4:	af00      	add	r7, sp, #0
 8010da6:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 8010da8:	687b      	ldr	r3, [r7, #4]
 8010daa:	613b      	str	r3, [r7, #16]
  osStatus_t stat;
  BaseType_t yield;

  stat = osOK;
 8010dac:	2300      	movs	r3, #0
 8010dae:	617b      	str	r3, [r7, #20]

  if (hSemaphore == NULL) {
 8010db0:	693b      	ldr	r3, [r7, #16]
 8010db2:	2b00      	cmp	r3, #0
 8010db4:	d103      	bne.n	8010dbe <osSemaphoreRelease+0x1e>
    stat = osErrorParameter;
 8010db6:	f06f 0303 	mvn.w	r3, #3
 8010dba:	617b      	str	r3, [r7, #20]
 8010dbc:	e02c      	b.n	8010e18 <osSemaphoreRelease+0x78>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010dbe:	f3ef 8305 	mrs	r3, IPSR
 8010dc2:	60fb      	str	r3, [r7, #12]
  return(result);
 8010dc4:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 8010dc6:	2b00      	cmp	r3, #0
 8010dc8:	d01a      	beq.n	8010e00 <osSemaphoreRelease+0x60>
    yield = pdFALSE;
 8010dca:	2300      	movs	r3, #0
 8010dcc:	60bb      	str	r3, [r7, #8]

    if (xSemaphoreGiveFromISR (hSemaphore, &yield) != pdTRUE) {
 8010dce:	f107 0308 	add.w	r3, r7, #8
 8010dd2:	4619      	mov	r1, r3
 8010dd4:	6938      	ldr	r0, [r7, #16]
 8010dd6:	f000 feb5 	bl	8011b44 <xQueueGiveFromISR>
 8010dda:	4603      	mov	r3, r0
 8010ddc:	2b01      	cmp	r3, #1
 8010dde:	d003      	beq.n	8010de8 <osSemaphoreRelease+0x48>
      stat = osErrorResource;
 8010de0:	f06f 0302 	mvn.w	r3, #2
 8010de4:	617b      	str	r3, [r7, #20]
 8010de6:	e017      	b.n	8010e18 <osSemaphoreRelease+0x78>
    } else {
      portYIELD_FROM_ISR (yield);
 8010de8:	68bb      	ldr	r3, [r7, #8]
 8010dea:	2b00      	cmp	r3, #0
 8010dec:	d014      	beq.n	8010e18 <osSemaphoreRelease+0x78>
 8010dee:	4b0d      	ldr	r3, [pc, #52]	@ (8010e24 <osSemaphoreRelease+0x84>)
 8010df0:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8010df4:	601a      	str	r2, [r3, #0]
 8010df6:	f3bf 8f4f 	dsb	sy
 8010dfa:	f3bf 8f6f 	isb	sy
 8010dfe:	e00b      	b.n	8010e18 <osSemaphoreRelease+0x78>
    }
  }
  else {
    if (xSemaphoreGive (hSemaphore) != pdPASS) {
 8010e00:	2300      	movs	r3, #0
 8010e02:	2200      	movs	r2, #0
 8010e04:	2100      	movs	r1, #0
 8010e06:	6938      	ldr	r0, [r7, #16]
 8010e08:	f000 fcfc 	bl	8011804 <xQueueGenericSend>
 8010e0c:	4603      	mov	r3, r0
 8010e0e:	2b01      	cmp	r3, #1
 8010e10:	d002      	beq.n	8010e18 <osSemaphoreRelease+0x78>
      stat = osErrorResource;
 8010e12:	f06f 0302 	mvn.w	r3, #2
 8010e16:	617b      	str	r3, [r7, #20]
    }
  }

  return (stat);
 8010e18:	697b      	ldr	r3, [r7, #20]
}
 8010e1a:	4618      	mov	r0, r3
 8010e1c:	3718      	adds	r7, #24
 8010e1e:	46bd      	mov	sp, r7
 8010e20:	bd80      	pop	{r7, pc}
 8010e22:	bf00      	nop
 8010e24:	e000ed04 	.word	0xe000ed04

08010e28 <osSemaphoreDelete>:
  }

  return (count);
}

osStatus_t osSemaphoreDelete (osSemaphoreId_t semaphore_id) {
 8010e28:	b580      	push	{r7, lr}
 8010e2a:	b086      	sub	sp, #24
 8010e2c:	af00      	add	r7, sp, #0
 8010e2e:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 8010e30:	687b      	ldr	r3, [r7, #4]
 8010e32:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010e34:	f3ef 8305 	mrs	r3, IPSR
 8010e38:	60fb      	str	r3, [r7, #12]
  return(result);
 8010e3a:	68fb      	ldr	r3, [r7, #12]
  osStatus_t stat;

#ifndef USE_FreeRTOS_HEAP_1
  if (IS_IRQ()) {
 8010e3c:	2b00      	cmp	r3, #0
 8010e3e:	d003      	beq.n	8010e48 <osSemaphoreDelete+0x20>
    stat = osErrorISR;
 8010e40:	f06f 0305 	mvn.w	r3, #5
 8010e44:	617b      	str	r3, [r7, #20]
 8010e46:	e00e      	b.n	8010e66 <osSemaphoreDelete+0x3e>
  }
  else if (hSemaphore == NULL) {
 8010e48:	693b      	ldr	r3, [r7, #16]
 8010e4a:	2b00      	cmp	r3, #0
 8010e4c:	d103      	bne.n	8010e56 <osSemaphoreDelete+0x2e>
    stat = osErrorParameter;
 8010e4e:	f06f 0303 	mvn.w	r3, #3
 8010e52:	617b      	str	r3, [r7, #20]
 8010e54:	e007      	b.n	8010e66 <osSemaphoreDelete+0x3e>
  }
  else {
    #if (configQUEUE_REGISTRY_SIZE > 0)
    vQueueUnregisterQueue (hSemaphore);
 8010e56:	6938      	ldr	r0, [r7, #16]
 8010e58:	f001 fb2c 	bl	80124b4 <vQueueUnregisterQueue>
    #endif

    stat = osOK;
 8010e5c:	2300      	movs	r3, #0
 8010e5e:	617b      	str	r3, [r7, #20]
    vSemaphoreDelete (hSemaphore);
 8010e60:	6938      	ldr	r0, [r7, #16]
 8010e62:	f001 f9b1 	bl	80121c8 <vQueueDelete>
  }
#else
  stat = osError;
#endif

  return (stat);
 8010e66:	697b      	ldr	r3, [r7, #20]
}
 8010e68:	4618      	mov	r0, r3
 8010e6a:	3718      	adds	r7, #24
 8010e6c:	46bd      	mov	sp, r7
 8010e6e:	bd80      	pop	{r7, pc}

08010e70 <osMessageQueueNew>:

/*---------------------------------------------------------------------------*/

osMessageQueueId_t osMessageQueueNew (uint32_t msg_count, uint32_t msg_size, const osMessageQueueAttr_t *attr) {
 8010e70:	b580      	push	{r7, lr}
 8010e72:	b08a      	sub	sp, #40	@ 0x28
 8010e74:	af02      	add	r7, sp, #8
 8010e76:	60f8      	str	r0, [r7, #12]
 8010e78:	60b9      	str	r1, [r7, #8]
 8010e7a:	607a      	str	r2, [r7, #4]
  int32_t mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hQueue = NULL;
 8010e7c:	2300      	movs	r3, #0
 8010e7e:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010e80:	f3ef 8305 	mrs	r3, IPSR
 8010e84:	613b      	str	r3, [r7, #16]
  return(result);
 8010e86:	693b      	ldr	r3, [r7, #16]

  if (!IS_IRQ() && (msg_count > 0U) && (msg_size > 0U)) {
 8010e88:	2b00      	cmp	r3, #0
 8010e8a:	d15f      	bne.n	8010f4c <osMessageQueueNew+0xdc>
 8010e8c:	68fb      	ldr	r3, [r7, #12]
 8010e8e:	2b00      	cmp	r3, #0
 8010e90:	d05c      	beq.n	8010f4c <osMessageQueueNew+0xdc>
 8010e92:	68bb      	ldr	r3, [r7, #8]
 8010e94:	2b00      	cmp	r3, #0
 8010e96:	d059      	beq.n	8010f4c <osMessageQueueNew+0xdc>
    mem = -1;
 8010e98:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010e9c:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 8010e9e:	687b      	ldr	r3, [r7, #4]
 8010ea0:	2b00      	cmp	r3, #0
 8010ea2:	d029      	beq.n	8010ef8 <osMessageQueueNew+0x88>
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) &&
 8010ea4:	687b      	ldr	r3, [r7, #4]
 8010ea6:	689b      	ldr	r3, [r3, #8]
 8010ea8:	2b00      	cmp	r3, #0
 8010eaa:	d012      	beq.n	8010ed2 <osMessageQueueNew+0x62>
 8010eac:	687b      	ldr	r3, [r7, #4]
 8010eae:	68db      	ldr	r3, [r3, #12]
 8010eb0:	2b4f      	cmp	r3, #79	@ 0x4f
 8010eb2:	d90e      	bls.n	8010ed2 <osMessageQueueNew+0x62>
          (attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) {
 8010eb4:	687b      	ldr	r3, [r7, #4]
 8010eb6:	691b      	ldr	r3, [r3, #16]
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) &&
 8010eb8:	2b00      	cmp	r3, #0
 8010eba:	d00a      	beq.n	8010ed2 <osMessageQueueNew+0x62>
          (attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) {
 8010ebc:	687b      	ldr	r3, [r7, #4]
 8010ebe:	695a      	ldr	r2, [r3, #20]
 8010ec0:	68fb      	ldr	r3, [r7, #12]
 8010ec2:	68b9      	ldr	r1, [r7, #8]
 8010ec4:	fb01 f303 	mul.w	r3, r1, r3
 8010ec8:	429a      	cmp	r2, r3
 8010eca:	d302      	bcc.n	8010ed2 <osMessageQueueNew+0x62>
        mem = 1;
 8010ecc:	2301      	movs	r3, #1
 8010ece:	61bb      	str	r3, [r7, #24]
 8010ed0:	e014      	b.n	8010efc <osMessageQueueNew+0x8c>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) &&
 8010ed2:	687b      	ldr	r3, [r7, #4]
 8010ed4:	689b      	ldr	r3, [r3, #8]
 8010ed6:	2b00      	cmp	r3, #0
 8010ed8:	d110      	bne.n	8010efc <osMessageQueueNew+0x8c>
 8010eda:	687b      	ldr	r3, [r7, #4]
 8010edc:	68db      	ldr	r3, [r3, #12]
 8010ede:	2b00      	cmp	r3, #0
 8010ee0:	d10c      	bne.n	8010efc <osMessageQueueNew+0x8c>
            (attr->mq_mem == NULL) && (attr->mq_size == 0U)) {
 8010ee2:	687b      	ldr	r3, [r7, #4]
 8010ee4:	691b      	ldr	r3, [r3, #16]
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) &&
 8010ee6:	2b00      	cmp	r3, #0
 8010ee8:	d108      	bne.n	8010efc <osMessageQueueNew+0x8c>
            (attr->mq_mem == NULL) && (attr->mq_size == 0U)) {
 8010eea:	687b      	ldr	r3, [r7, #4]
 8010eec:	695b      	ldr	r3, [r3, #20]
 8010eee:	2b00      	cmp	r3, #0
 8010ef0:	d104      	bne.n	8010efc <osMessageQueueNew+0x8c>
          mem = 0;
 8010ef2:	2300      	movs	r3, #0
 8010ef4:	61bb      	str	r3, [r7, #24]
 8010ef6:	e001      	b.n	8010efc <osMessageQueueNew+0x8c>
        }
      }
    }
    else {
      mem = 0;
 8010ef8:	2300      	movs	r3, #0
 8010efa:	61bb      	str	r3, [r7, #24]
    }

    if (mem == 1) {
 8010efc:	69bb      	ldr	r3, [r7, #24]
 8010efe:	2b01      	cmp	r3, #1
 8010f00:	d10b      	bne.n	8010f1a <osMessageQueueNew+0xaa>
      #if (configSUPPORT_STATIC_ALLOCATION == 1)
        hQueue = xQueueCreateStatic (msg_count, msg_size, attr->mq_mem, attr->cb_mem);
 8010f02:	687b      	ldr	r3, [r7, #4]
 8010f04:	691a      	ldr	r2, [r3, #16]
 8010f06:	687b      	ldr	r3, [r7, #4]
 8010f08:	689b      	ldr	r3, [r3, #8]
 8010f0a:	2100      	movs	r1, #0
 8010f0c:	9100      	str	r1, [sp, #0]
 8010f0e:	68b9      	ldr	r1, [r7, #8]
 8010f10:	68f8      	ldr	r0, [r7, #12]
 8010f12:	f000 fa75 	bl	8011400 <xQueueGenericCreateStatic>
 8010f16:	61f8      	str	r0, [r7, #28]
 8010f18:	e008      	b.n	8010f2c <osMessageQueueNew+0xbc>
      #endif
    }
    else {
      if (mem == 0) {
 8010f1a:	69bb      	ldr	r3, [r7, #24]
 8010f1c:	2b00      	cmp	r3, #0
 8010f1e:	d105      	bne.n	8010f2c <osMessageQueueNew+0xbc>
        #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
          hQueue = xQueueCreate (msg_count, msg_size);
 8010f20:	2200      	movs	r2, #0
 8010f22:	68b9      	ldr	r1, [r7, #8]
 8010f24:	68f8      	ldr	r0, [r7, #12]
 8010f26:	f000 fae8 	bl	80114fa <xQueueGenericCreate>
 8010f2a:	61f8      	str	r0, [r7, #28]
        #endif
      }
    }

    #if (configQUEUE_REGISTRY_SIZE > 0)
    if (hQueue != NULL) {
 8010f2c:	69fb      	ldr	r3, [r7, #28]
 8010f2e:	2b00      	cmp	r3, #0
 8010f30:	d00c      	beq.n	8010f4c <osMessageQueueNew+0xdc>
      if (attr != NULL) {
 8010f32:	687b      	ldr	r3, [r7, #4]
 8010f34:	2b00      	cmp	r3, #0
 8010f36:	d003      	beq.n	8010f40 <osMessageQueueNew+0xd0>
        name = attr->name;
 8010f38:	687b      	ldr	r3, [r7, #4]
 8010f3a:	681b      	ldr	r3, [r3, #0]
 8010f3c:	617b      	str	r3, [r7, #20]
 8010f3e:	e001      	b.n	8010f44 <osMessageQueueNew+0xd4>
      } else {
        name = NULL;
 8010f40:	2300      	movs	r3, #0
 8010f42:	617b      	str	r3, [r7, #20]
      }
      vQueueAddToRegistry (hQueue, name);
 8010f44:	6979      	ldr	r1, [r7, #20]
 8010f46:	69f8      	ldr	r0, [r7, #28]
 8010f48:	f001 fa8a 	bl	8012460 <vQueueAddToRegistry>
    }
    #endif

  }

  return ((osMessageQueueId_t)hQueue);
 8010f4c:	69fb      	ldr	r3, [r7, #28]
}
 8010f4e:	4618      	mov	r0, r3
 8010f50:	3720      	adds	r7, #32
 8010f52:	46bd      	mov	sp, r7
 8010f54:	bd80      	pop	{r7, pc}
	...

08010f58 <osMessageQueuePut>:

osStatus_t osMessageQueuePut (osMessageQueueId_t mq_id, const void *msg_ptr, uint8_t msg_prio, uint32_t timeout) {
 8010f58:	b580      	push	{r7, lr}
 8010f5a:	b088      	sub	sp, #32
 8010f5c:	af00      	add	r7, sp, #0
 8010f5e:	60f8      	str	r0, [r7, #12]
 8010f60:	60b9      	str	r1, [r7, #8]
 8010f62:	603b      	str	r3, [r7, #0]
 8010f64:	4613      	mov	r3, r2
 8010f66:	71fb      	strb	r3, [r7, #7]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8010f68:	68fb      	ldr	r3, [r7, #12]
 8010f6a:	61bb      	str	r3, [r7, #24]
  osStatus_t stat;
  BaseType_t yield;

  (void)msg_prio; /* Message priority is ignored */

  stat = osOK;
 8010f6c:	2300      	movs	r3, #0
 8010f6e:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010f70:	f3ef 8305 	mrs	r3, IPSR
 8010f74:	617b      	str	r3, [r7, #20]
  return(result);
 8010f76:	697b      	ldr	r3, [r7, #20]

  if (IS_IRQ()) {
 8010f78:	2b00      	cmp	r3, #0
 8010f7a:	d028      	beq.n	8010fce <osMessageQueuePut+0x76>
    if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) {
 8010f7c:	69bb      	ldr	r3, [r7, #24]
 8010f7e:	2b00      	cmp	r3, #0
 8010f80:	d005      	beq.n	8010f8e <osMessageQueuePut+0x36>
 8010f82:	68bb      	ldr	r3, [r7, #8]
 8010f84:	2b00      	cmp	r3, #0
 8010f86:	d002      	beq.n	8010f8e <osMessageQueuePut+0x36>
 8010f88:	683b      	ldr	r3, [r7, #0]
 8010f8a:	2b00      	cmp	r3, #0
 8010f8c:	d003      	beq.n	8010f96 <osMessageQueuePut+0x3e>
      stat = osErrorParameter;
 8010f8e:	f06f 0303 	mvn.w	r3, #3
 8010f92:	61fb      	str	r3, [r7, #28]
 8010f94:	e038      	b.n	8011008 <osMessageQueuePut+0xb0>
    }
    else {
      yield = pdFALSE;
 8010f96:	2300      	movs	r3, #0
 8010f98:	613b      	str	r3, [r7, #16]

      if (xQueueSendToBackFromISR (hQueue, msg_ptr, &yield) != pdTRUE) {
 8010f9a:	f107 0210 	add.w	r2, r7, #16
 8010f9e:	2300      	movs	r3, #0
 8010fa0:	68b9      	ldr	r1, [r7, #8]
 8010fa2:	69b8      	ldr	r0, [r7, #24]
 8010fa4:	f000 fd30 	bl	8011a08 <xQueueGenericSendFromISR>
 8010fa8:	4603      	mov	r3, r0
 8010faa:	2b01      	cmp	r3, #1
 8010fac:	d003      	beq.n	8010fb6 <osMessageQueuePut+0x5e>
        stat = osErrorResource;
 8010fae:	f06f 0302 	mvn.w	r3, #2
 8010fb2:	61fb      	str	r3, [r7, #28]
 8010fb4:	e028      	b.n	8011008 <osMessageQueuePut+0xb0>
      } else {
        portYIELD_FROM_ISR (yield);
 8010fb6:	693b      	ldr	r3, [r7, #16]
 8010fb8:	2b00      	cmp	r3, #0
 8010fba:	d025      	beq.n	8011008 <osMessageQueuePut+0xb0>
 8010fbc:	4b15      	ldr	r3, [pc, #84]	@ (8011014 <osMessageQueuePut+0xbc>)
 8010fbe:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8010fc2:	601a      	str	r2, [r3, #0]
 8010fc4:	f3bf 8f4f 	dsb	sy
 8010fc8:	f3bf 8f6f 	isb	sy
 8010fcc:	e01c      	b.n	8011008 <osMessageQueuePut+0xb0>
      }
    }
  }
  else {
    if ((hQueue == NULL) || (msg_ptr == NULL)) {
 8010fce:	69bb      	ldr	r3, [r7, #24]
 8010fd0:	2b00      	cmp	r3, #0
 8010fd2:	d002      	beq.n	8010fda <osMessageQueuePut+0x82>
 8010fd4:	68bb      	ldr	r3, [r7, #8]
 8010fd6:	2b00      	cmp	r3, #0
 8010fd8:	d103      	bne.n	8010fe2 <osMessageQueuePut+0x8a>
      stat = osErrorParameter;
 8010fda:	f06f 0303 	mvn.w	r3, #3
 8010fde:	61fb      	str	r3, [r7, #28]
 8010fe0:	e012      	b.n	8011008 <osMessageQueuePut+0xb0>
    }
    else {
      if (xQueueSendToBack (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) {
 8010fe2:	2300      	movs	r3, #0
 8010fe4:	683a      	ldr	r2, [r7, #0]
 8010fe6:	68b9      	ldr	r1, [r7, #8]
 8010fe8:	69b8      	ldr	r0, [r7, #24]
 8010fea:	f000 fc0b 	bl	8011804 <xQueueGenericSend>
 8010fee:	4603      	mov	r3, r0
 8010ff0:	2b01      	cmp	r3, #1
 8010ff2:	d009      	beq.n	8011008 <osMessageQueuePut+0xb0>
        if (timeout != 0U) {
 8010ff4:	683b      	ldr	r3, [r7, #0]
 8010ff6:	2b00      	cmp	r3, #0
 8010ff8:	d003      	beq.n	8011002 <osMessageQueuePut+0xaa>
          stat = osErrorTimeout;
 8010ffa:	f06f 0301 	mvn.w	r3, #1
 8010ffe:	61fb      	str	r3, [r7, #28]
 8011000:	e002      	b.n	8011008 <osMessageQueuePut+0xb0>
        } else {
          stat = osErrorResource;
 8011002:	f06f 0302 	mvn.w	r3, #2
 8011006:	61fb      	str	r3, [r7, #28]
        }
      }
    }
  }

  return (stat);
 8011008:	69fb      	ldr	r3, [r7, #28]
}
 801100a:	4618      	mov	r0, r3
 801100c:	3720      	adds	r7, #32
 801100e:	46bd      	mov	sp, r7
 8011010:	bd80      	pop	{r7, pc}
 8011012:	bf00      	nop
 8011014:	e000ed04 	.word	0xe000ed04

08011018 <osMessageQueueGet>:

osStatus_t osMessageQueueGet (osMessageQueueId_t mq_id, void *msg_ptr, uint8_t *msg_prio, uint32_t timeout) {
 8011018:	b580      	push	{r7, lr}
 801101a:	b088      	sub	sp, #32
 801101c:	af00      	add	r7, sp, #0
 801101e:	60f8      	str	r0, [r7, #12]
 8011020:	60b9      	str	r1, [r7, #8]
 8011022:	607a      	str	r2, [r7, #4]
 8011024:	603b      	str	r3, [r7, #0]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8011026:	68fb      	ldr	r3, [r7, #12]
 8011028:	61bb      	str	r3, [r7, #24]
  osStatus_t stat;
  BaseType_t yield;

  (void)msg_prio; /* Message priority is ignored */

  stat = osOK;
 801102a:	2300      	movs	r3, #0
 801102c:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 801102e:	f3ef 8305 	mrs	r3, IPSR
 8011032:	617b      	str	r3, [r7, #20]
  return(result);
 8011034:	697b      	ldr	r3, [r7, #20]

  if (IS_IRQ()) {
 8011036:	2b00      	cmp	r3, #0
 8011038:	d028      	beq.n	801108c <osMessageQueueGet+0x74>
    if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) {
 801103a:	69bb      	ldr	r3, [r7, #24]
 801103c:	2b00      	cmp	r3, #0
 801103e:	d005      	beq.n	801104c <osMessageQueueGet+0x34>
 8011040:	68bb      	ldr	r3, [r7, #8]
 8011042:	2b00      	cmp	r3, #0
 8011044:	d002      	beq.n	801104c <osMessageQueueGet+0x34>
 8011046:	683b      	ldr	r3, [r7, #0]
 8011048:	2b00      	cmp	r3, #0
 801104a:	d003      	beq.n	8011054 <osMessageQueueGet+0x3c>
      stat = osErrorParameter;
 801104c:	f06f 0303 	mvn.w	r3, #3
 8011050:	61fb      	str	r3, [r7, #28]
 8011052:	e037      	b.n	80110c4 <osMessageQueueGet+0xac>
    }
    else {
      yield = pdFALSE;
 8011054:	2300      	movs	r3, #0
 8011056:	613b      	str	r3, [r7, #16]

      if (xQueueReceiveFromISR (hQueue, msg_ptr, &yield) != pdPASS) {
 8011058:	f107 0310 	add.w	r3, r7, #16
 801105c:	461a      	mov	r2, r3
 801105e:	68b9      	ldr	r1, [r7, #8]
 8011060:	69b8      	ldr	r0, [r7, #24]
 8011062:	f000 fff1 	bl	8012048 <xQueueReceiveFromISR>
 8011066:	4603      	mov	r3, r0
 8011068:	2b01      	cmp	r3, #1
 801106a:	d003      	beq.n	8011074 <osMessageQueueGet+0x5c>
        stat = osErrorResource;
 801106c:	f06f 0302 	mvn.w	r3, #2
 8011070:	61fb      	str	r3, [r7, #28]
 8011072:	e027      	b.n	80110c4 <osMessageQueueGet+0xac>
      } else {
        portYIELD_FROM_ISR (yield);
 8011074:	693b      	ldr	r3, [r7, #16]
 8011076:	2b00      	cmp	r3, #0
 8011078:	d024      	beq.n	80110c4 <osMessageQueueGet+0xac>
 801107a:	4b15      	ldr	r3, [pc, #84]	@ (80110d0 <osMessageQueueGet+0xb8>)
 801107c:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011080:	601a      	str	r2, [r3, #0]
 8011082:	f3bf 8f4f 	dsb	sy
 8011086:	f3bf 8f6f 	isb	sy
 801108a:	e01b      	b.n	80110c4 <osMessageQueueGet+0xac>
      }
    }
  }
  else {
    if ((hQueue == NULL) || (msg_ptr == NULL)) {
 801108c:	69bb      	ldr	r3, [r7, #24]
 801108e:	2b00      	cmp	r3, #0
 8011090:	d002      	beq.n	8011098 <osMessageQueueGet+0x80>
 8011092:	68bb      	ldr	r3, [r7, #8]
 8011094:	2b00      	cmp	r3, #0
 8011096:	d103      	bne.n	80110a0 <osMessageQueueGet+0x88>
      stat = osErrorParameter;
 8011098:	f06f 0303 	mvn.w	r3, #3
 801109c:	61fb      	str	r3, [r7, #28]
 801109e:	e011      	b.n	80110c4 <osMessageQueueGet+0xac>
    }
    else {
      if (xQueueReceive (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) {
 80110a0:	683a      	ldr	r2, [r7, #0]
 80110a2:	68b9      	ldr	r1, [r7, #8]
 80110a4:	69b8      	ldr	r0, [r7, #24]
 80110a6:	f000 fddd 	bl	8011c64 <xQueueReceive>
 80110aa:	4603      	mov	r3, r0
 80110ac:	2b01      	cmp	r3, #1
 80110ae:	d009      	beq.n	80110c4 <osMessageQueueGet+0xac>
        if (timeout != 0U) {
 80110b0:	683b      	ldr	r3, [r7, #0]
 80110b2:	2b00      	cmp	r3, #0
 80110b4:	d003      	beq.n	80110be <osMessageQueueGet+0xa6>
          stat = osErrorTimeout;
 80110b6:	f06f 0301 	mvn.w	r3, #1
 80110ba:	61fb      	str	r3, [r7, #28]
 80110bc:	e002      	b.n	80110c4 <osMessageQueueGet+0xac>
        } else {
          stat = osErrorResource;
 80110be:	f06f 0302 	mvn.w	r3, #2
 80110c2:	61fb      	str	r3, [r7, #28]
        }
      }
    }
  }

  return (stat);
 80110c4:	69fb      	ldr	r3, [r7, #28]
}
 80110c6:	4618      	mov	r0, r3
 80110c8:	3720      	adds	r7, #32
 80110ca:	46bd      	mov	sp, r7
 80110cc:	bd80      	pop	{r7, pc}
 80110ce:	bf00      	nop
 80110d0:	e000ed04 	.word	0xe000ed04

080110d4 <osMessageQueueGetCount>:
  }

  return (size);
}

uint32_t osMessageQueueGetCount (osMessageQueueId_t mq_id) {
 80110d4:	b580      	push	{r7, lr}
 80110d6:	b086      	sub	sp, #24
 80110d8:	af00      	add	r7, sp, #0
 80110da:	6078      	str	r0, [r7, #4]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 80110dc:	687b      	ldr	r3, [r7, #4]
 80110de:	613b      	str	r3, [r7, #16]
  UBaseType_t count;

  if (hQueue == NULL) {
 80110e0:	693b      	ldr	r3, [r7, #16]
 80110e2:	2b00      	cmp	r3, #0
 80110e4:	d102      	bne.n	80110ec <osMessageQueueGetCount+0x18>
    count = 0U;
 80110e6:	2300      	movs	r3, #0
 80110e8:	617b      	str	r3, [r7, #20]
 80110ea:	e00e      	b.n	801110a <osMessageQueueGetCount+0x36>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80110ec:	f3ef 8305 	mrs	r3, IPSR
 80110f0:	60fb      	str	r3, [r7, #12]
  return(result);
 80110f2:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 80110f4:	2b00      	cmp	r3, #0
 80110f6:	d004      	beq.n	8011102 <osMessageQueueGetCount+0x2e>
    count = uxQueueMessagesWaitingFromISR (hQueue);
 80110f8:	6938      	ldr	r0, [r7, #16]
 80110fa:	f001 f846 	bl	801218a <uxQueueMessagesWaitingFromISR>
 80110fe:	6178      	str	r0, [r7, #20]
 8011100:	e003      	b.n	801110a <osMessageQueueGetCount+0x36>
  }
  else {
    count = uxQueueMessagesWaiting (hQueue);
 8011102:	6938      	ldr	r0, [r7, #16]
 8011104:	f001 f822 	bl	801214c <uxQueueMessagesWaiting>
 8011108:	6178      	str	r0, [r7, #20]
  }

  return ((uint32_t)count);
 801110a:	697b      	ldr	r3, [r7, #20]
}
 801110c:	4618      	mov	r0, r3
 801110e:	3718      	adds	r7, #24
 8011110:	46bd      	mov	sp, r7
 8011112:	bd80      	pop	{r7, pc}

08011114 <osMessageQueueDelete>:
  }

  return (stat);
}

osStatus_t osMessageQueueDelete (osMessageQueueId_t mq_id) {
 8011114:	b580      	push	{r7, lr}
 8011116:	b086      	sub	sp, #24
 8011118:	af00      	add	r7, sp, #0
 801111a:	6078      	str	r0, [r7, #4]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 801111c:	687b      	ldr	r3, [r7, #4]
 801111e:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011120:	f3ef 8305 	mrs	r3, IPSR
 8011124:	60fb      	str	r3, [r7, #12]
  return(result);
 8011126:	68fb      	ldr	r3, [r7, #12]
  osStatus_t stat;

#ifndef USE_FreeRTOS_HEAP_1
  if (IS_IRQ()) {
 8011128:	2b00      	cmp	r3, #0
 801112a:	d003      	beq.n	8011134 <osMessageQueueDelete+0x20>
    stat = osErrorISR;
 801112c:	f06f 0305 	mvn.w	r3, #5
 8011130:	617b      	str	r3, [r7, #20]
 8011132:	e00e      	b.n	8011152 <osMessageQueueDelete+0x3e>
  }
  else if (hQueue == NULL) {
 8011134:	693b      	ldr	r3, [r7, #16]
 8011136:	2b00      	cmp	r3, #0
 8011138:	d103      	bne.n	8011142 <osMessageQueueDelete+0x2e>
    stat = osErrorParameter;
 801113a:	f06f 0303 	mvn.w	r3, #3
 801113e:	617b      	str	r3, [r7, #20]
 8011140:	e007      	b.n	8011152 <osMessageQueueDelete+0x3e>
  }
  else {
    #if (configQUEUE_REGISTRY_SIZE > 0)
    vQueueUnregisterQueue (hQueue);
 8011142:	6938      	ldr	r0, [r7, #16]
 8011144:	f001 f9b6 	bl	80124b4 <vQueueUnregisterQueue>
    #endif

    stat = osOK;
 8011148:	2300      	movs	r3, #0
 801114a:	617b      	str	r3, [r7, #20]
    vQueueDelete (hQueue);
 801114c:	6938      	ldr	r0, [r7, #16]
 801114e:	f001 f83b 	bl	80121c8 <vQueueDelete>
  }
#else
  stat = osError;
#endif

  return (stat);
 8011152:	697b      	ldr	r3, [r7, #20]
}
 8011154:	4618      	mov	r0, r3
 8011156:	3718      	adds	r7, #24
 8011158:	46bd      	mov	sp, r7
 801115a:	bd80      	pop	{r7, pc}

0801115c <vApplicationGetIdleTaskMemory>:

/*
  vApplicationGetIdleTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
  equals to 1 and is required for static memory allocation support.
*/
__WEAK void vApplicationGetIdleTaskMemory (StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize) {
 801115c:	b480      	push	{r7}
 801115e:	b085      	sub	sp, #20
 8011160:	af00      	add	r7, sp, #0
 8011162:	60f8      	str	r0, [r7, #12]
 8011164:	60b9      	str	r1, [r7, #8]
 8011166:	607a      	str	r2, [r7, #4]
  /* Idle task control block and stack */
  static StaticTask_t Idle_TCB;
  static StackType_t  Idle_Stack[configMINIMAL_STACK_SIZE];

  *ppxIdleTaskTCBBuffer   = &Idle_TCB;
 8011168:	68fb      	ldr	r3, [r7, #12]
 801116a:	4a07      	ldr	r2, [pc, #28]	@ (8011188 <vApplicationGetIdleTaskMemory+0x2c>)
 801116c:	601a      	str	r2, [r3, #0]
  *ppxIdleTaskStackBuffer = &Idle_Stack[0];
 801116e:	68bb      	ldr	r3, [r7, #8]
 8011170:	4a06      	ldr	r2, [pc, #24]	@ (801118c <vApplicationGetIdleTaskMemory+0x30>)
 8011172:	601a      	str	r2, [r3, #0]
  *pulIdleTaskStackSize   = (uint32_t)configMINIMAL_STACK_SIZE;
 8011174:	687b      	ldr	r3, [r7, #4]
 8011176:	f44f 7200 	mov.w	r2, #512	@ 0x200
 801117a:	601a      	str	r2, [r3, #0]
}
 801117c:	bf00      	nop
 801117e:	3714      	adds	r7, #20
 8011180:	46bd      	mov	sp, r7
 8011182:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011186:	4770      	bx	lr
 8011188:	24002300 	.word	0x24002300
 801118c:	240023a8 	.word	0x240023a8

08011190 <vApplicationGetTimerTaskMemory>:

/*
  vApplicationGetTimerTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
  equals to 1 and is required for static memory allocation support.
*/
__WEAK void vApplicationGetTimerTaskMemory (StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize) {
 8011190:	b480      	push	{r7}
 8011192:	b085      	sub	sp, #20
 8011194:	af00      	add	r7, sp, #0
 8011196:	60f8      	str	r0, [r7, #12]
 8011198:	60b9      	str	r1, [r7, #8]
 801119a:	607a      	str	r2, [r7, #4]
  /* Timer task control block and stack */
  static StaticTask_t Timer_TCB;
  static StackType_t  Timer_Stack[configTIMER_TASK_STACK_DEPTH];

  *ppxTimerTaskTCBBuffer   = &Timer_TCB;
 801119c:	68fb      	ldr	r3, [r7, #12]
 801119e:	4a07      	ldr	r2, [pc, #28]	@ (80111bc <vApplicationGetTimerTaskMemory+0x2c>)
 80111a0:	601a      	str	r2, [r3, #0]
  *ppxTimerTaskStackBuffer = &Timer_Stack[0];
 80111a2:	68bb      	ldr	r3, [r7, #8]
 80111a4:	4a06      	ldr	r2, [pc, #24]	@ (80111c0 <vApplicationGetTimerTaskMemory+0x30>)
 80111a6:	601a      	str	r2, [r3, #0]
  *pulTimerTaskStackSize   = (uint32_t)configTIMER_TASK_STACK_DEPTH;
 80111a8:	687b      	ldr	r3, [r7, #4]
 80111aa:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 80111ae:	601a      	str	r2, [r3, #0]
}
 80111b0:	bf00      	nop
 80111b2:	3714      	adds	r7, #20
 80111b4:	46bd      	mov	sp, r7
 80111b6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80111ba:	4770      	bx	lr
 80111bc:	24002ba8 	.word	0x24002ba8
 80111c0:	24002c50 	.word	0x24002c50

080111c4 <vListInitialise>:
/*-----------------------------------------------------------
 * PUBLIC LIST API documented in list.h
 *----------------------------------------------------------*/

void vListInitialise( List_t * const pxList )
{
 80111c4:	b480      	push	{r7}
 80111c6:	b083      	sub	sp, #12
 80111c8:	af00      	add	r7, sp, #0
 80111ca:	6078      	str	r0, [r7, #4]
	/* The list structure contains a list item which is used to mark the
	end of the list.  To initialise the list the list end is inserted
	as the only list entry. */
	pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );			/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 80111cc:	687b      	ldr	r3, [r7, #4]
 80111ce:	f103 0208 	add.w	r2, r3, #8
 80111d2:	687b      	ldr	r3, [r7, #4]
 80111d4:	605a      	str	r2, [r3, #4]

	/* The list end value is the highest possible value in the list to
	ensure it remains at the end of the list. */
	pxList->xListEnd.xItemValue = portMAX_DELAY;
 80111d6:	687b      	ldr	r3, [r7, #4]
 80111d8:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 80111dc:	609a      	str	r2, [r3, #8]

	/* The list end next and previous pointers point to itself so we know
	when the list is empty. */
	pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );	/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 80111de:	687b      	ldr	r3, [r7, #4]
 80111e0:	f103 0208 	add.w	r2, r3, #8
 80111e4:	687b      	ldr	r3, [r7, #4]
 80111e6:	60da      	str	r2, [r3, #12]
	pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 80111e8:	687b      	ldr	r3, [r7, #4]
 80111ea:	f103 0208 	add.w	r2, r3, #8
 80111ee:	687b      	ldr	r3, [r7, #4]
 80111f0:	611a      	str	r2, [r3, #16]

	pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
 80111f2:	687b      	ldr	r3, [r7, #4]
 80111f4:	2200      	movs	r2, #0
 80111f6:	601a      	str	r2, [r3, #0]

	/* Write known values into the list if
	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
	listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
	listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
}
 80111f8:	bf00      	nop
 80111fa:	370c      	adds	r7, #12
 80111fc:	46bd      	mov	sp, r7
 80111fe:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011202:	4770      	bx	lr

08011204 <vListInitialiseItem>:
/*-----------------------------------------------------------*/

void vListInitialiseItem( ListItem_t * const pxItem )
{
 8011204:	b480      	push	{r7}
 8011206:	b083      	sub	sp, #12
 8011208:	af00      	add	r7, sp, #0
 801120a:	6078      	str	r0, [r7, #4]
	/* Make sure the list item is not recorded as being on a list. */
	pxItem->pxContainer = NULL;
 801120c:	687b      	ldr	r3, [r7, #4]
 801120e:	2200      	movs	r2, #0
 8011210:	611a      	str	r2, [r3, #16]

	/* Write known values into the list item if
	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
	listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
}
 8011212:	bf00      	nop
 8011214:	370c      	adds	r7, #12
 8011216:	46bd      	mov	sp, r7
 8011218:	f85d 7b04 	ldr.w	r7, [sp], #4
 801121c:	4770      	bx	lr

0801121e <vListInsertEnd>:
/*-----------------------------------------------------------*/

void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
{
 801121e:	b480      	push	{r7}
 8011220:	b085      	sub	sp, #20
 8011222:	af00      	add	r7, sp, #0
 8011224:	6078      	str	r0, [r7, #4]
 8011226:	6039      	str	r1, [r7, #0]
ListItem_t * const pxIndex = pxList->pxIndex;
 8011228:	687b      	ldr	r3, [r7, #4]
 801122a:	685b      	ldr	r3, [r3, #4]
 801122c:	60fb      	str	r3, [r7, #12]
	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );

	/* Insert a new list item into pxList, but rather than sort the list,
	makes the new list item the last item to be removed by a call to
	listGET_OWNER_OF_NEXT_ENTRY(). */
	pxNewListItem->pxNext = pxIndex;
 801122e:	683b      	ldr	r3, [r7, #0]
 8011230:	68fa      	ldr	r2, [r7, #12]
 8011232:	605a      	str	r2, [r3, #4]
	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
 8011234:	68fb      	ldr	r3, [r7, #12]
 8011236:	689a      	ldr	r2, [r3, #8]
 8011238:	683b      	ldr	r3, [r7, #0]
 801123a:	609a      	str	r2, [r3, #8]

	/* Only used during decision coverage testing. */
	mtCOVERAGE_TEST_DELAY();

	pxIndex->pxPrevious->pxNext = pxNewListItem;
 801123c:	68fb      	ldr	r3, [r7, #12]
 801123e:	689b      	ldr	r3, [r3, #8]
 8011240:	683a      	ldr	r2, [r7, #0]
 8011242:	605a      	str	r2, [r3, #4]
	pxIndex->pxPrevious = pxNewListItem;
 8011244:	68fb      	ldr	r3, [r7, #12]
 8011246:	683a      	ldr	r2, [r7, #0]
 8011248:	609a      	str	r2, [r3, #8]

	/* Remember which list the item is in. */
	pxNewListItem->pxContainer = pxList;
 801124a:	683b      	ldr	r3, [r7, #0]
 801124c:	687a      	ldr	r2, [r7, #4]
 801124e:	611a      	str	r2, [r3, #16]

	( pxList->uxNumberOfItems )++;
 8011250:	687b      	ldr	r3, [r7, #4]
 8011252:	681b      	ldr	r3, [r3, #0]
 8011254:	1c5a      	adds	r2, r3, #1
 8011256:	687b      	ldr	r3, [r7, #4]
 8011258:	601a      	str	r2, [r3, #0]
}
 801125a:	bf00      	nop
 801125c:	3714      	adds	r7, #20
 801125e:	46bd      	mov	sp, r7
 8011260:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011264:	4770      	bx	lr

08011266 <vListInsert>:
/*-----------------------------------------------------------*/

void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
{
 8011266:	b480      	push	{r7}
 8011268:	b085      	sub	sp, #20
 801126a:	af00      	add	r7, sp, #0
 801126c:	6078      	str	r0, [r7, #4]
 801126e:	6039      	str	r1, [r7, #0]
ListItem_t *pxIterator;
const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
 8011270:	683b      	ldr	r3, [r7, #0]
 8011272:	681b      	ldr	r3, [r3, #0]
 8011274:	60bb      	str	r3, [r7, #8]
	new list item should be placed after it.  This ensures that TCBs which are
	stored in ready lists (all of which have the same xItemValue value) get a
	share of the CPU.  However, if the xItemValue is the same as the back marker
	the iteration loop below will not end.  Therefore the value is checked
	first, and the algorithm slightly modified if necessary. */
	if( xValueOfInsertion == portMAX_DELAY )
 8011276:	68bb      	ldr	r3, [r7, #8]
 8011278:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801127c:	d103      	bne.n	8011286 <vListInsert+0x20>
	{
		pxIterator = pxList->xListEnd.pxPrevious;
 801127e:	687b      	ldr	r3, [r7, #4]
 8011280:	691b      	ldr	r3, [r3, #16]
 8011282:	60fb      	str	r3, [r7, #12]
 8011284:	e00c      	b.n	80112a0 <vListInsert+0x3a>
			4) Using a queue or semaphore before it has been initialised or
			   before the scheduler has been started (are interrupts firing
			   before vTaskStartScheduler() has been called?).
		**********************************************************************/

		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
 8011286:	687b      	ldr	r3, [r7, #4]
 8011288:	3308      	adds	r3, #8
 801128a:	60fb      	str	r3, [r7, #12]
 801128c:	e002      	b.n	8011294 <vListInsert+0x2e>
 801128e:	68fb      	ldr	r3, [r7, #12]
 8011290:	685b      	ldr	r3, [r3, #4]
 8011292:	60fb      	str	r3, [r7, #12]
 8011294:	68fb      	ldr	r3, [r7, #12]
 8011296:	685b      	ldr	r3, [r3, #4]
 8011298:	681b      	ldr	r3, [r3, #0]
 801129a:	68ba      	ldr	r2, [r7, #8]
 801129c:	429a      	cmp	r2, r3
 801129e:	d2f6      	bcs.n	801128e <vListInsert+0x28>
			/* There is nothing to do here, just iterating to the wanted
			insertion position. */
		}
	}

	pxNewListItem->pxNext = pxIterator->pxNext;
 80112a0:	68fb      	ldr	r3, [r7, #12]
 80112a2:	685a      	ldr	r2, [r3, #4]
 80112a4:	683b      	ldr	r3, [r7, #0]
 80112a6:	605a      	str	r2, [r3, #4]
	pxNewListItem->pxNext->pxPrevious = pxNewListItem;
 80112a8:	683b      	ldr	r3, [r7, #0]
 80112aa:	685b      	ldr	r3, [r3, #4]
 80112ac:	683a      	ldr	r2, [r7, #0]
 80112ae:	609a      	str	r2, [r3, #8]
	pxNewListItem->pxPrevious = pxIterator;
 80112b0:	683b      	ldr	r3, [r7, #0]
 80112b2:	68fa      	ldr	r2, [r7, #12]
 80112b4:	609a      	str	r2, [r3, #8]
	pxIterator->pxNext = pxNewListItem;
 80112b6:	68fb      	ldr	r3, [r7, #12]
 80112b8:	683a      	ldr	r2, [r7, #0]
 80112ba:	605a      	str	r2, [r3, #4]

	/* Remember which list the item is in.  This allows fast removal of the
	item later. */
	pxNewListItem->pxContainer = pxList;
 80112bc:	683b      	ldr	r3, [r7, #0]
 80112be:	687a      	ldr	r2, [r7, #4]
 80112c0:	611a      	str	r2, [r3, #16]

	( pxList->uxNumberOfItems )++;
 80112c2:	687b      	ldr	r3, [r7, #4]
 80112c4:	681b      	ldr	r3, [r3, #0]
 80112c6:	1c5a      	adds	r2, r3, #1
 80112c8:	687b      	ldr	r3, [r7, #4]
 80112ca:	601a      	str	r2, [r3, #0]
}
 80112cc:	bf00      	nop
 80112ce:	3714      	adds	r7, #20
 80112d0:	46bd      	mov	sp, r7
 80112d2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80112d6:	4770      	bx	lr

080112d8 <uxListRemove>:
/*-----------------------------------------------------------*/

UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
{
 80112d8:	b480      	push	{r7}
 80112da:	b085      	sub	sp, #20
 80112dc:	af00      	add	r7, sp, #0
 80112de:	6078      	str	r0, [r7, #4]
/* The list item knows which list it is in.  Obtain the list from the list
item. */
List_t * const pxList = pxItemToRemove->pxContainer;
 80112e0:	687b      	ldr	r3, [r7, #4]
 80112e2:	691b      	ldr	r3, [r3, #16]
 80112e4:	60fb      	str	r3, [r7, #12]

	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
 80112e6:	687b      	ldr	r3, [r7, #4]
 80112e8:	685b      	ldr	r3, [r3, #4]
 80112ea:	687a      	ldr	r2, [r7, #4]
 80112ec:	6892      	ldr	r2, [r2, #8]
 80112ee:	609a      	str	r2, [r3, #8]
	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
 80112f0:	687b      	ldr	r3, [r7, #4]
 80112f2:	689b      	ldr	r3, [r3, #8]
 80112f4:	687a      	ldr	r2, [r7, #4]
 80112f6:	6852      	ldr	r2, [r2, #4]
 80112f8:	605a      	str	r2, [r3, #4]

	/* Only used during decision coverage testing. */
	mtCOVERAGE_TEST_DELAY();

	/* Make sure the index is left pointing to a valid item. */
	if( pxList->pxIndex == pxItemToRemove )
 80112fa:	68fb      	ldr	r3, [r7, #12]
 80112fc:	685b      	ldr	r3, [r3, #4]
 80112fe:	687a      	ldr	r2, [r7, #4]
 8011300:	429a      	cmp	r2, r3
 8011302:	d103      	bne.n	801130c <uxListRemove+0x34>
	{
		pxList->pxIndex = pxItemToRemove->pxPrevious;
 8011304:	687b      	ldr	r3, [r7, #4]
 8011306:	689a      	ldr	r2, [r3, #8]
 8011308:	68fb      	ldr	r3, [r7, #12]
 801130a:	605a      	str	r2, [r3, #4]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxItemToRemove->pxContainer = NULL;
 801130c:	687b      	ldr	r3, [r7, #4]
 801130e:	2200      	movs	r2, #0
 8011310:	611a      	str	r2, [r3, #16]
	( pxList->uxNumberOfItems )--;
 8011312:	68fb      	ldr	r3, [r7, #12]
 8011314:	681b      	ldr	r3, [r3, #0]
 8011316:	1e5a      	subs	r2, r3, #1
 8011318:	68fb      	ldr	r3, [r7, #12]
 801131a:	601a      	str	r2, [r3, #0]

	return pxList->uxNumberOfItems;
 801131c:	68fb      	ldr	r3, [r7, #12]
 801131e:	681b      	ldr	r3, [r3, #0]
}
 8011320:	4618      	mov	r0, r3
 8011322:	3714      	adds	r7, #20
 8011324:	46bd      	mov	sp, r7
 8011326:	f85d 7b04 	ldr.w	r7, [sp], #4
 801132a:	4770      	bx	lr

0801132c <xQueueGenericReset>:
	}														\
	taskEXIT_CRITICAL()
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )
{
 801132c:	b580      	push	{r7, lr}
 801132e:	b084      	sub	sp, #16
 8011330:	af00      	add	r7, sp, #0
 8011332:	6078      	str	r0, [r7, #4]
 8011334:	6039      	str	r1, [r7, #0]
Queue_t * const pxQueue = xQueue;
 8011336:	687b      	ldr	r3, [r7, #4]
 8011338:	60fb      	str	r3, [r7, #12]

	configASSERT( pxQueue );
 801133a:	68fb      	ldr	r3, [r7, #12]
 801133c:	2b00      	cmp	r3, #0
 801133e:	d10b      	bne.n	8011358 <xQueueGenericReset+0x2c>

portFORCE_INLINE static void vPortRaiseBASEPRI( void )
{
uint32_t ulNewBASEPRI;

	__asm volatile
 8011340:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011344:	f383 8811 	msr	BASEPRI, r3
 8011348:	f3bf 8f6f 	isb	sy
 801134c:	f3bf 8f4f 	dsb	sy
 8011350:	60bb      	str	r3, [r7, #8]
		"	msr basepri, %0											\n" \
		"	isb														\n" \
		"	dsb														\n" \
		:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
	);
}
 8011352:	bf00      	nop
 8011354:	bf00      	nop
 8011356:	e7fd      	b.n	8011354 <xQueueGenericReset+0x28>

	taskENTER_CRITICAL();
 8011358:	f003 fbee 	bl	8014b38 <vPortEnterCritical>
	{
		pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 801135c:	68fb      	ldr	r3, [r7, #12]
 801135e:	681a      	ldr	r2, [r3, #0]
 8011360:	68fb      	ldr	r3, [r7, #12]
 8011362:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8011364:	68f9      	ldr	r1, [r7, #12]
 8011366:	6c09      	ldr	r1, [r1, #64]	@ 0x40
 8011368:	fb01 f303 	mul.w	r3, r1, r3
 801136c:	441a      	add	r2, r3
 801136e:	68fb      	ldr	r3, [r7, #12]
 8011370:	609a      	str	r2, [r3, #8]
		pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
 8011372:	68fb      	ldr	r3, [r7, #12]
 8011374:	2200      	movs	r2, #0
 8011376:	639a      	str	r2, [r3, #56]	@ 0x38
		pxQueue->pcWriteTo = pxQueue->pcHead;
 8011378:	68fb      	ldr	r3, [r7, #12]
 801137a:	681a      	ldr	r2, [r3, #0]
 801137c:	68fb      	ldr	r3, [r7, #12]
 801137e:	605a      	str	r2, [r3, #4]
		pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 8011380:	68fb      	ldr	r3, [r7, #12]
 8011382:	681a      	ldr	r2, [r3, #0]
 8011384:	68fb      	ldr	r3, [r7, #12]
 8011386:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8011388:	3b01      	subs	r3, #1
 801138a:	68f9      	ldr	r1, [r7, #12]
 801138c:	6c09      	ldr	r1, [r1, #64]	@ 0x40
 801138e:	fb01 f303 	mul.w	r3, r1, r3
 8011392:	441a      	add	r2, r3
 8011394:	68fb      	ldr	r3, [r7, #12]
 8011396:	60da      	str	r2, [r3, #12]
		pxQueue->cRxLock = queueUNLOCKED;
 8011398:	68fb      	ldr	r3, [r7, #12]
 801139a:	22ff      	movs	r2, #255	@ 0xff
 801139c:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
		pxQueue->cTxLock = queueUNLOCKED;
 80113a0:	68fb      	ldr	r3, [r7, #12]
 80113a2:	22ff      	movs	r2, #255	@ 0xff
 80113a4:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45

		if( xNewQueue == pdFALSE )
 80113a8:	683b      	ldr	r3, [r7, #0]
 80113aa:	2b00      	cmp	r3, #0
 80113ac:	d114      	bne.n	80113d8 <xQueueGenericReset+0xac>
			/* If there are tasks blocked waiting to read from the queue, then
			the tasks will remain blocked as after this function exits the queue
			will still be empty.  If there are tasks blocked waiting to write to
			the queue, then one should be unblocked as after this function exits
			it will be possible to write to it. */
			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 80113ae:	68fb      	ldr	r3, [r7, #12]
 80113b0:	691b      	ldr	r3, [r3, #16]
 80113b2:	2b00      	cmp	r3, #0
 80113b4:	d01a      	beq.n	80113ec <xQueueGenericReset+0xc0>
			{
				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 80113b6:	68fb      	ldr	r3, [r7, #12]
 80113b8:	3310      	adds	r3, #16
 80113ba:	4618      	mov	r0, r3
 80113bc:	f002 f922 	bl	8013604 <xTaskRemoveFromEventList>
 80113c0:	4603      	mov	r3, r0
 80113c2:	2b00      	cmp	r3, #0
 80113c4:	d012      	beq.n	80113ec <xQueueGenericReset+0xc0>
				{
					queueYIELD_IF_USING_PREEMPTION();
 80113c6:	4b0d      	ldr	r3, [pc, #52]	@ (80113fc <xQueueGenericReset+0xd0>)
 80113c8:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80113cc:	601a      	str	r2, [r3, #0]
 80113ce:	f3bf 8f4f 	dsb	sy
 80113d2:	f3bf 8f6f 	isb	sy
 80113d6:	e009      	b.n	80113ec <xQueueGenericReset+0xc0>
			}
		}
		else
		{
			/* Ensure the event queues start in the correct state. */
			vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
 80113d8:	68fb      	ldr	r3, [r7, #12]
 80113da:	3310      	adds	r3, #16
 80113dc:	4618      	mov	r0, r3
 80113de:	f7ff fef1 	bl	80111c4 <vListInitialise>
			vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
 80113e2:	68fb      	ldr	r3, [r7, #12]
 80113e4:	3324      	adds	r3, #36	@ 0x24
 80113e6:	4618      	mov	r0, r3
 80113e8:	f7ff feec 	bl	80111c4 <vListInitialise>
		}
	}
	taskEXIT_CRITICAL();
 80113ec:	f003 fbd6 	bl	8014b9c <vPortExitCritical>

	/* A value is returned for calling semantic consistency with previous
	versions. */
	return pdPASS;
 80113f0:	2301      	movs	r3, #1
}
 80113f2:	4618      	mov	r0, r3
 80113f4:	3710      	adds	r7, #16
 80113f6:	46bd      	mov	sp, r7
 80113f8:	bd80      	pop	{r7, pc}
 80113fa:	bf00      	nop
 80113fc:	e000ed04 	.word	0xe000ed04

08011400 <xQueueGenericCreateStatic>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_STATIC_ALLOCATION == 1 )

	QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )
	{
 8011400:	b580      	push	{r7, lr}
 8011402:	b08e      	sub	sp, #56	@ 0x38
 8011404:	af02      	add	r7, sp, #8
 8011406:	60f8      	str	r0, [r7, #12]
 8011408:	60b9      	str	r1, [r7, #8]
 801140a:	607a      	str	r2, [r7, #4]
 801140c:	603b      	str	r3, [r7, #0]
	Queue_t *pxNewQueue;

		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
 801140e:	68fb      	ldr	r3, [r7, #12]
 8011410:	2b00      	cmp	r3, #0
 8011412:	d10b      	bne.n	801142c <xQueueGenericCreateStatic+0x2c>
	__asm volatile
 8011414:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011418:	f383 8811 	msr	BASEPRI, r3
 801141c:	f3bf 8f6f 	isb	sy
 8011420:	f3bf 8f4f 	dsb	sy
 8011424:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 8011426:	bf00      	nop
 8011428:	bf00      	nop
 801142a:	e7fd      	b.n	8011428 <xQueueGenericCreateStatic+0x28>

		/* The StaticQueue_t structure and the queue storage area must be
		supplied. */
		configASSERT( pxStaticQueue != NULL );
 801142c:	683b      	ldr	r3, [r7, #0]
 801142e:	2b00      	cmp	r3, #0
 8011430:	d10b      	bne.n	801144a <xQueueGenericCreateStatic+0x4a>
	__asm volatile
 8011432:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011436:	f383 8811 	msr	BASEPRI, r3
 801143a:	f3bf 8f6f 	isb	sy
 801143e:	f3bf 8f4f 	dsb	sy
 8011442:	627b      	str	r3, [r7, #36]	@ 0x24
}
 8011444:	bf00      	nop
 8011446:	bf00      	nop
 8011448:	e7fd      	b.n	8011446 <xQueueGenericCreateStatic+0x46>

		/* A queue storage area should be provided if the item size is not 0, and
		should not be provided if the item size is 0. */
		configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
 801144a:	687b      	ldr	r3, [r7, #4]
 801144c:	2b00      	cmp	r3, #0
 801144e:	d002      	beq.n	8011456 <xQueueGenericCreateStatic+0x56>
 8011450:	68bb      	ldr	r3, [r7, #8]
 8011452:	2b00      	cmp	r3, #0
 8011454:	d001      	beq.n	801145a <xQueueGenericCreateStatic+0x5a>
 8011456:	2301      	movs	r3, #1
 8011458:	e000      	b.n	801145c <xQueueGenericCreateStatic+0x5c>
 801145a:	2300      	movs	r3, #0
 801145c:	2b00      	cmp	r3, #0
 801145e:	d10b      	bne.n	8011478 <xQueueGenericCreateStatic+0x78>
	__asm volatile
 8011460:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011464:	f383 8811 	msr	BASEPRI, r3
 8011468:	f3bf 8f6f 	isb	sy
 801146c:	f3bf 8f4f 	dsb	sy
 8011470:	623b      	str	r3, [r7, #32]
}
 8011472:	bf00      	nop
 8011474:	bf00      	nop
 8011476:	e7fd      	b.n	8011474 <xQueueGenericCreateStatic+0x74>
		configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
 8011478:	687b      	ldr	r3, [r7, #4]
 801147a:	2b00      	cmp	r3, #0
 801147c:	d102      	bne.n	8011484 <xQueueGenericCreateStatic+0x84>
 801147e:	68bb      	ldr	r3, [r7, #8]
 8011480:	2b00      	cmp	r3, #0
 8011482:	d101      	bne.n	8011488 <xQueueGenericCreateStatic+0x88>
 8011484:	2301      	movs	r3, #1
 8011486:	e000      	b.n	801148a <xQueueGenericCreateStatic+0x8a>
 8011488:	2300      	movs	r3, #0
 801148a:	2b00      	cmp	r3, #0
 801148c:	d10b      	bne.n	80114a6 <xQueueGenericCreateStatic+0xa6>
	__asm volatile
 801148e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011492:	f383 8811 	msr	BASEPRI, r3
 8011496:	f3bf 8f6f 	isb	sy
 801149a:	f3bf 8f4f 	dsb	sy
 801149e:	61fb      	str	r3, [r7, #28]
}
 80114a0:	bf00      	nop
 80114a2:	bf00      	nop
 80114a4:	e7fd      	b.n	80114a2 <xQueueGenericCreateStatic+0xa2>
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticQueue_t or StaticSemaphore_t equals the size of
			the real queue and semaphore structures. */
			volatile size_t xSize = sizeof( StaticQueue_t );
 80114a6:	2350      	movs	r3, #80	@ 0x50
 80114a8:	617b      	str	r3, [r7, #20]
			configASSERT( xSize == sizeof( Queue_t ) );
 80114aa:	697b      	ldr	r3, [r7, #20]
 80114ac:	2b50      	cmp	r3, #80	@ 0x50
 80114ae:	d00b      	beq.n	80114c8 <xQueueGenericCreateStatic+0xc8>
	__asm volatile
 80114b0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80114b4:	f383 8811 	msr	BASEPRI, r3
 80114b8:	f3bf 8f6f 	isb	sy
 80114bc:	f3bf 8f4f 	dsb	sy
 80114c0:	61bb      	str	r3, [r7, #24]
}
 80114c2:	bf00      	nop
 80114c4:	bf00      	nop
 80114c6:	e7fd      	b.n	80114c4 <xQueueGenericCreateStatic+0xc4>
			( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
 80114c8:	697b      	ldr	r3, [r7, #20]
		#endif /* configASSERT_DEFINED */

		/* The address of a statically allocated queue was passed in, use it.
		The address of a statically allocated storage area was also passed in
		but is already set. */
		pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 80114ca:	683b      	ldr	r3, [r7, #0]
 80114cc:	62fb      	str	r3, [r7, #44]	@ 0x2c

		if( pxNewQueue != NULL )
 80114ce:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80114d0:	2b00      	cmp	r3, #0
 80114d2:	d00d      	beq.n	80114f0 <xQueueGenericCreateStatic+0xf0>
			#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
			{
				/* Queues can be allocated wither statically or dynamically, so
				note this queue was allocated statically in case the queue is
				later deleted. */
				pxNewQueue->ucStaticallyAllocated = pdTRUE;
 80114d4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80114d6:	2201      	movs	r2, #1
 80114d8:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
			}
			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */

			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
 80114dc:	f897 2038 	ldrb.w	r2, [r7, #56]	@ 0x38
 80114e0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80114e2:	9300      	str	r3, [sp, #0]
 80114e4:	4613      	mov	r3, r2
 80114e6:	687a      	ldr	r2, [r7, #4]
 80114e8:	68b9      	ldr	r1, [r7, #8]
 80114ea:	68f8      	ldr	r0, [r7, #12]
 80114ec:	f000 f840 	bl	8011570 <prvInitialiseNewQueue>
		{
			traceQUEUE_CREATE_FAILED( ucQueueType );
			mtCOVERAGE_TEST_MARKER();
		}

		return pxNewQueue;
 80114f0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
	}
 80114f2:	4618      	mov	r0, r3
 80114f4:	3730      	adds	r7, #48	@ 0x30
 80114f6:	46bd      	mov	sp, r7
 80114f8:	bd80      	pop	{r7, pc}

080114fa <xQueueGenericCreate>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )

	QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )
	{
 80114fa:	b580      	push	{r7, lr}
 80114fc:	b08a      	sub	sp, #40	@ 0x28
 80114fe:	af02      	add	r7, sp, #8
 8011500:	60f8      	str	r0, [r7, #12]
 8011502:	60b9      	str	r1, [r7, #8]
 8011504:	4613      	mov	r3, r2
 8011506:	71fb      	strb	r3, [r7, #7]
	Queue_t *pxNewQueue;
	size_t xQueueSizeInBytes;
	uint8_t *pucQueueStorage;

		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
 8011508:	68fb      	ldr	r3, [r7, #12]
 801150a:	2b00      	cmp	r3, #0
 801150c:	d10b      	bne.n	8011526 <xQueueGenericCreate+0x2c>
	__asm volatile
 801150e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011512:	f383 8811 	msr	BASEPRI, r3
 8011516:	f3bf 8f6f 	isb	sy
 801151a:	f3bf 8f4f 	dsb	sy
 801151e:	613b      	str	r3, [r7, #16]
}
 8011520:	bf00      	nop
 8011522:	bf00      	nop
 8011524:	e7fd      	b.n	8011522 <xQueueGenericCreate+0x28>

		/* Allocate enough space to hold the maximum number of items that
		can be in the queue at any time.  It is valid for uxItemSize to be
		zero in the case the queue is used as a semaphore. */
		xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8011526:	68fb      	ldr	r3, [r7, #12]
 8011528:	68ba      	ldr	r2, [r7, #8]
 801152a:	fb02 f303 	mul.w	r3, r2, r3
 801152e:	61fb      	str	r3, [r7, #28]
		alignment requirements of the Queue_t structure - which in this case
		is an int8_t *.  Therefore, whenever the stack alignment requirements
		are greater than or equal to the pointer to char requirements the cast
		is safe.  In other cases alignment requirements are not strict (one or
		two bytes). */
		pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */
 8011530:	69fb      	ldr	r3, [r7, #28]
 8011532:	3350      	adds	r3, #80	@ 0x50
 8011534:	4618      	mov	r0, r3
 8011536:	f003 fc21 	bl	8014d7c <pvPortMalloc>
 801153a:	61b8      	str	r0, [r7, #24]

		if( pxNewQueue != NULL )
 801153c:	69bb      	ldr	r3, [r7, #24]
 801153e:	2b00      	cmp	r3, #0
 8011540:	d011      	beq.n	8011566 <xQueueGenericCreate+0x6c>
		{
			/* Jump past the queue structure to find the location of the queue
			storage area. */
			pucQueueStorage = ( uint8_t * ) pxNewQueue;
 8011542:	69bb      	ldr	r3, [r7, #24]
 8011544:	617b      	str	r3, [r7, #20]
			pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 8011546:	697b      	ldr	r3, [r7, #20]
 8011548:	3350      	adds	r3, #80	@ 0x50
 801154a:	617b      	str	r3, [r7, #20]
			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
			{
				/* Queues can be created either statically or dynamically, so
				note this task was created dynamically in case it is later
				deleted. */
				pxNewQueue->ucStaticallyAllocated = pdFALSE;
 801154c:	69bb      	ldr	r3, [r7, #24]
 801154e:	2200      	movs	r2, #0
 8011550:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
			}
			#endif /* configSUPPORT_STATIC_ALLOCATION */

			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
 8011554:	79fa      	ldrb	r2, [r7, #7]
 8011556:	69bb      	ldr	r3, [r7, #24]
 8011558:	9300      	str	r3, [sp, #0]
 801155a:	4613      	mov	r3, r2
 801155c:	697a      	ldr	r2, [r7, #20]
 801155e:	68b9      	ldr	r1, [r7, #8]
 8011560:	68f8      	ldr	r0, [r7, #12]
 8011562:	f000 f805 	bl	8011570 <prvInitialiseNewQueue>
		{
			traceQUEUE_CREATE_FAILED( ucQueueType );
			mtCOVERAGE_TEST_MARKER();
		}

		return pxNewQueue;
 8011566:	69bb      	ldr	r3, [r7, #24]
	}
 8011568:	4618      	mov	r0, r3
 801156a:	3720      	adds	r7, #32
 801156c:	46bd      	mov	sp, r7
 801156e:	bd80      	pop	{r7, pc}

08011570 <prvInitialiseNewQueue>:

#endif /* configSUPPORT_STATIC_ALLOCATION */
/*-----------------------------------------------------------*/

static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )
{
 8011570:	b580      	push	{r7, lr}
 8011572:	b084      	sub	sp, #16
 8011574:	af00      	add	r7, sp, #0
 8011576:	60f8      	str	r0, [r7, #12]
 8011578:	60b9      	str	r1, [r7, #8]
 801157a:	607a      	str	r2, [r7, #4]
 801157c:	70fb      	strb	r3, [r7, #3]
	/* Remove compiler warnings about unused parameters should
	configUSE_TRACE_FACILITY not be set to 1. */
	( void ) ucQueueType;

	if( uxItemSize == ( UBaseType_t ) 0 )
 801157e:	68bb      	ldr	r3, [r7, #8]
 8011580:	2b00      	cmp	r3, #0
 8011582:	d103      	bne.n	801158c <prvInitialiseNewQueue+0x1c>
	{
		/* No RAM was allocated for the queue storage area, but PC head cannot
		be set to NULL because NULL is used as a key to say the queue is used as
		a mutex.  Therefore just set pcHead to point to the queue as a benign
		value that is known to be within the memory map. */
		pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
 8011584:	69bb      	ldr	r3, [r7, #24]
 8011586:	69ba      	ldr	r2, [r7, #24]
 8011588:	601a      	str	r2, [r3, #0]
 801158a:	e002      	b.n	8011592 <prvInitialiseNewQueue+0x22>
	}
	else
	{
		/* Set the head to the start of the queue storage area. */
		pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
 801158c:	69bb      	ldr	r3, [r7, #24]
 801158e:	687a      	ldr	r2, [r7, #4]
 8011590:	601a      	str	r2, [r3, #0]
	}

	/* Initialise the queue members as described where the queue type is
	defined. */
	pxNewQueue->uxLength = uxQueueLength;
 8011592:	69bb      	ldr	r3, [r7, #24]
 8011594:	68fa      	ldr	r2, [r7, #12]
 8011596:	63da      	str	r2, [r3, #60]	@ 0x3c
	pxNewQueue->uxItemSize = uxItemSize;
 8011598:	69bb      	ldr	r3, [r7, #24]
 801159a:	68ba      	ldr	r2, [r7, #8]
 801159c:	641a      	str	r2, [r3, #64]	@ 0x40
	( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
 801159e:	2101      	movs	r1, #1
 80115a0:	69b8      	ldr	r0, [r7, #24]
 80115a2:	f7ff fec3 	bl	801132c <xQueueGenericReset>

	#if ( configUSE_TRACE_FACILITY == 1 )
	{
		pxNewQueue->ucQueueType = ucQueueType;
 80115a6:	69bb      	ldr	r3, [r7, #24]
 80115a8:	78fa      	ldrb	r2, [r7, #3]
 80115aa:	f883 204c 	strb.w	r2, [r3, #76]	@ 0x4c
		pxNewQueue->pxQueueSetContainer = NULL;
	}
	#endif /* configUSE_QUEUE_SETS */

	traceQUEUE_CREATE( pxNewQueue );
}
 80115ae:	bf00      	nop
 80115b0:	3710      	adds	r7, #16
 80115b2:	46bd      	mov	sp, r7
 80115b4:	bd80      	pop	{r7, pc}

080115b6 <prvInitialiseMutex>:
/*-----------------------------------------------------------*/

#if( configUSE_MUTEXES == 1 )

	static void prvInitialiseMutex( Queue_t *pxNewQueue )
	{
 80115b6:	b580      	push	{r7, lr}
 80115b8:	b082      	sub	sp, #8
 80115ba:	af00      	add	r7, sp, #0
 80115bc:	6078      	str	r0, [r7, #4]
		if( pxNewQueue != NULL )
 80115be:	687b      	ldr	r3, [r7, #4]
 80115c0:	2b00      	cmp	r3, #0
 80115c2:	d00e      	beq.n	80115e2 <prvInitialiseMutex+0x2c>
		{
			/* The queue create function will set all the queue structure members
			correctly for a generic queue, but this function is creating a
			mutex.  Overwrite those members that need to be set differently -
			in particular the information required for priority inheritance. */
			pxNewQueue->u.xSemaphore.xMutexHolder = NULL;
 80115c4:	687b      	ldr	r3, [r7, #4]
 80115c6:	2200      	movs	r2, #0
 80115c8:	609a      	str	r2, [r3, #8]
			pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
 80115ca:	687b      	ldr	r3, [r7, #4]
 80115cc:	2200      	movs	r2, #0
 80115ce:	601a      	str	r2, [r3, #0]

			/* In case this is a recursive mutex. */
			pxNewQueue->u.xSemaphore.uxRecursiveCallCount = 0;
 80115d0:	687b      	ldr	r3, [r7, #4]
 80115d2:	2200      	movs	r2, #0
 80115d4:	60da      	str	r2, [r3, #12]

			traceCREATE_MUTEX( pxNewQueue );

			/* Start with the semaphore in the expected state. */
			( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );
 80115d6:	2300      	movs	r3, #0
 80115d8:	2200      	movs	r2, #0
 80115da:	2100      	movs	r1, #0
 80115dc:	6878      	ldr	r0, [r7, #4]
 80115de:	f000 f911 	bl	8011804 <xQueueGenericSend>
		}
		else
		{
			traceCREATE_MUTEX_FAILED();
		}
	}
 80115e2:	bf00      	nop
 80115e4:	3708      	adds	r7, #8
 80115e6:	46bd      	mov	sp, r7
 80115e8:	bd80      	pop	{r7, pc}

080115ea <xQueueCreateMutex>:
/*-----------------------------------------------------------*/

#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )
	{
 80115ea:	b580      	push	{r7, lr}
 80115ec:	b086      	sub	sp, #24
 80115ee:	af00      	add	r7, sp, #0
 80115f0:	4603      	mov	r3, r0
 80115f2:	71fb      	strb	r3, [r7, #7]
	QueueHandle_t xNewQueue;
	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
 80115f4:	2301      	movs	r3, #1
 80115f6:	617b      	str	r3, [r7, #20]
 80115f8:	2300      	movs	r3, #0
 80115fa:	613b      	str	r3, [r7, #16]

		xNewQueue = xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );
 80115fc:	79fb      	ldrb	r3, [r7, #7]
 80115fe:	461a      	mov	r2, r3
 8011600:	6939      	ldr	r1, [r7, #16]
 8011602:	6978      	ldr	r0, [r7, #20]
 8011604:	f7ff ff79 	bl	80114fa <xQueueGenericCreate>
 8011608:	60f8      	str	r0, [r7, #12]
		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
 801160a:	68f8      	ldr	r0, [r7, #12]
 801160c:	f7ff ffd3 	bl	80115b6 <prvInitialiseMutex>

		return xNewQueue;
 8011610:	68fb      	ldr	r3, [r7, #12]
	}
 8011612:	4618      	mov	r0, r3
 8011614:	3718      	adds	r7, #24
 8011616:	46bd      	mov	sp, r7
 8011618:	bd80      	pop	{r7, pc}

0801161a <xQueueCreateMutexStatic>:
/*-----------------------------------------------------------*/

#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )
	{
 801161a:	b580      	push	{r7, lr}
 801161c:	b088      	sub	sp, #32
 801161e:	af02      	add	r7, sp, #8
 8011620:	4603      	mov	r3, r0
 8011622:	6039      	str	r1, [r7, #0]
 8011624:	71fb      	strb	r3, [r7, #7]
	QueueHandle_t xNewQueue;
	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
 8011626:	2301      	movs	r3, #1
 8011628:	617b      	str	r3, [r7, #20]
 801162a:	2300      	movs	r3, #0
 801162c:	613b      	str	r3, [r7, #16]

		/* Prevent compiler warnings about unused parameters if
		configUSE_TRACE_FACILITY does not equal 1. */
		( void ) ucQueueType;

		xNewQueue = xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );
 801162e:	79fb      	ldrb	r3, [r7, #7]
 8011630:	9300      	str	r3, [sp, #0]
 8011632:	683b      	ldr	r3, [r7, #0]
 8011634:	2200      	movs	r2, #0
 8011636:	6939      	ldr	r1, [r7, #16]
 8011638:	6978      	ldr	r0, [r7, #20]
 801163a:	f7ff fee1 	bl	8011400 <xQueueGenericCreateStatic>
 801163e:	60f8      	str	r0, [r7, #12]
		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
 8011640:	68f8      	ldr	r0, [r7, #12]
 8011642:	f7ff ffb8 	bl	80115b6 <prvInitialiseMutex>

		return xNewQueue;
 8011646:	68fb      	ldr	r3, [r7, #12]
	}
 8011648:	4618      	mov	r0, r3
 801164a:	3718      	adds	r7, #24
 801164c:	46bd      	mov	sp, r7
 801164e:	bd80      	pop	{r7, pc}

08011650 <xQueueGiveMutexRecursive>:
/*-----------------------------------------------------------*/

#if ( configUSE_RECURSIVE_MUTEXES == 1 )

	BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex )
	{
 8011650:	b590      	push	{r4, r7, lr}
 8011652:	b087      	sub	sp, #28
 8011654:	af00      	add	r7, sp, #0
 8011656:	6078      	str	r0, [r7, #4]
	BaseType_t xReturn;
	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
 8011658:	687b      	ldr	r3, [r7, #4]
 801165a:	613b      	str	r3, [r7, #16]

		configASSERT( pxMutex );
 801165c:	693b      	ldr	r3, [r7, #16]
 801165e:	2b00      	cmp	r3, #0
 8011660:	d10b      	bne.n	801167a <xQueueGiveMutexRecursive+0x2a>
	__asm volatile
 8011662:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011666:	f383 8811 	msr	BASEPRI, r3
 801166a:	f3bf 8f6f 	isb	sy
 801166e:	f3bf 8f4f 	dsb	sy
 8011672:	60fb      	str	r3, [r7, #12]
}
 8011674:	bf00      	nop
 8011676:	bf00      	nop
 8011678:	e7fd      	b.n	8011676 <xQueueGiveMutexRecursive+0x26>
		change outside of this task.  If this task does not hold the mutex then
		pxMutexHolder can never coincidentally equal the tasks handle, and as
		this is the only condition we are interested in it does not matter if
		pxMutexHolder is accessed simultaneously by another task.  Therefore no
		mutual exclusion is required to test the pxMutexHolder variable. */
		if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
 801167a:	693b      	ldr	r3, [r7, #16]
 801167c:	689c      	ldr	r4, [r3, #8]
 801167e:	f002 f9af 	bl	80139e0 <xTaskGetCurrentTaskHandle>
 8011682:	4603      	mov	r3, r0
 8011684:	429c      	cmp	r4, r3
 8011686:	d111      	bne.n	80116ac <xQueueGiveMutexRecursive+0x5c>
			/* uxRecursiveCallCount cannot be zero if xMutexHolder is equal to
			the task handle, therefore no underflow check is required.  Also,
			uxRecursiveCallCount is only modified by the mutex holder, and as
			there can only be one, no mutual exclusion is required to modify the
			uxRecursiveCallCount member. */
			( pxMutex->u.xSemaphore.uxRecursiveCallCount )--;
 8011688:	693b      	ldr	r3, [r7, #16]
 801168a:	68db      	ldr	r3, [r3, #12]
 801168c:	1e5a      	subs	r2, r3, #1
 801168e:	693b      	ldr	r3, [r7, #16]
 8011690:	60da      	str	r2, [r3, #12]

			/* Has the recursive call count unwound to 0? */
			if( pxMutex->u.xSemaphore.uxRecursiveCallCount == ( UBaseType_t ) 0 )
 8011692:	693b      	ldr	r3, [r7, #16]
 8011694:	68db      	ldr	r3, [r3, #12]
 8011696:	2b00      	cmp	r3, #0
 8011698:	d105      	bne.n	80116a6 <xQueueGiveMutexRecursive+0x56>
			{
				/* Return the mutex.  This will automatically unblock any other
				task that might be waiting to access the mutex. */
				( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK );
 801169a:	2300      	movs	r3, #0
 801169c:	2200      	movs	r2, #0
 801169e:	2100      	movs	r1, #0
 80116a0:	6938      	ldr	r0, [r7, #16]
 80116a2:	f000 f8af 	bl	8011804 <xQueueGenericSend>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}

			xReturn = pdPASS;
 80116a6:	2301      	movs	r3, #1
 80116a8:	617b      	str	r3, [r7, #20]
 80116aa:	e001      	b.n	80116b0 <xQueueGiveMutexRecursive+0x60>
		}
		else
		{
			/* The mutex cannot be given because the calling task is not the
			holder. */
			xReturn = pdFAIL;
 80116ac:	2300      	movs	r3, #0
 80116ae:	617b      	str	r3, [r7, #20]

			traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex );
		}

		return xReturn;
 80116b0:	697b      	ldr	r3, [r7, #20]
	}
 80116b2:	4618      	mov	r0, r3
 80116b4:	371c      	adds	r7, #28
 80116b6:	46bd      	mov	sp, r7
 80116b8:	bd90      	pop	{r4, r7, pc}

080116ba <xQueueTakeMutexRecursive>:
/*-----------------------------------------------------------*/

#if ( configUSE_RECURSIVE_MUTEXES == 1 )

	BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait )
	{
 80116ba:	b590      	push	{r4, r7, lr}
 80116bc:	b087      	sub	sp, #28
 80116be:	af00      	add	r7, sp, #0
 80116c0:	6078      	str	r0, [r7, #4]
 80116c2:	6039      	str	r1, [r7, #0]
	BaseType_t xReturn;
	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
 80116c4:	687b      	ldr	r3, [r7, #4]
 80116c6:	613b      	str	r3, [r7, #16]

		configASSERT( pxMutex );
 80116c8:	693b      	ldr	r3, [r7, #16]
 80116ca:	2b00      	cmp	r3, #0
 80116cc:	d10b      	bne.n	80116e6 <xQueueTakeMutexRecursive+0x2c>
	__asm volatile
 80116ce:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80116d2:	f383 8811 	msr	BASEPRI, r3
 80116d6:	f3bf 8f6f 	isb	sy
 80116da:	f3bf 8f4f 	dsb	sy
 80116de:	60fb      	str	r3, [r7, #12]
}
 80116e0:	bf00      	nop
 80116e2:	bf00      	nop
 80116e4:	e7fd      	b.n	80116e2 <xQueueTakeMutexRecursive+0x28>
		/* Comments regarding mutual exclusion as per those within
		xQueueGiveMutexRecursive(). */

		traceTAKE_MUTEX_RECURSIVE( pxMutex );

		if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
 80116e6:	693b      	ldr	r3, [r7, #16]
 80116e8:	689c      	ldr	r4, [r3, #8]
 80116ea:	f002 f979 	bl	80139e0 <xTaskGetCurrentTaskHandle>
 80116ee:	4603      	mov	r3, r0
 80116f0:	429c      	cmp	r4, r3
 80116f2:	d107      	bne.n	8011704 <xQueueTakeMutexRecursive+0x4a>
		{
			( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
 80116f4:	693b      	ldr	r3, [r7, #16]
 80116f6:	68db      	ldr	r3, [r3, #12]
 80116f8:	1c5a      	adds	r2, r3, #1
 80116fa:	693b      	ldr	r3, [r7, #16]
 80116fc:	60da      	str	r2, [r3, #12]
			xReturn = pdPASS;
 80116fe:	2301      	movs	r3, #1
 8011700:	617b      	str	r3, [r7, #20]
 8011702:	e00c      	b.n	801171e <xQueueTakeMutexRecursive+0x64>
		}
		else
		{
			xReturn = xQueueSemaphoreTake( pxMutex, xTicksToWait );
 8011704:	6839      	ldr	r1, [r7, #0]
 8011706:	6938      	ldr	r0, [r7, #16]
 8011708:	f000 fb8e 	bl	8011e28 <xQueueSemaphoreTake>
 801170c:	6178      	str	r0, [r7, #20]

			/* pdPASS will only be returned if the mutex was successfully
			obtained.  The calling task may have entered the Blocked state
			before reaching here. */
			if( xReturn != pdFAIL )
 801170e:	697b      	ldr	r3, [r7, #20]
 8011710:	2b00      	cmp	r3, #0
 8011712:	d004      	beq.n	801171e <xQueueTakeMutexRecursive+0x64>
			{
				( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
 8011714:	693b      	ldr	r3, [r7, #16]
 8011716:	68db      	ldr	r3, [r3, #12]
 8011718:	1c5a      	adds	r2, r3, #1
 801171a:	693b      	ldr	r3, [r7, #16]
 801171c:	60da      	str	r2, [r3, #12]
			{
				traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex );
			}
		}

		return xReturn;
 801171e:	697b      	ldr	r3, [r7, #20]
	}
 8011720:	4618      	mov	r0, r3
 8011722:	371c      	adds	r7, #28
 8011724:	46bd      	mov	sp, r7
 8011726:	bd90      	pop	{r4, r7, pc}

08011728 <xQueueCreateCountingSemaphoreStatic>:
/*-----------------------------------------------------------*/

#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue )
	{
 8011728:	b580      	push	{r7, lr}
 801172a:	b08a      	sub	sp, #40	@ 0x28
 801172c:	af02      	add	r7, sp, #8
 801172e:	60f8      	str	r0, [r7, #12]
 8011730:	60b9      	str	r1, [r7, #8]
 8011732:	607a      	str	r2, [r7, #4]
	QueueHandle_t xHandle;

		configASSERT( uxMaxCount != 0 );
 8011734:	68fb      	ldr	r3, [r7, #12]
 8011736:	2b00      	cmp	r3, #0
 8011738:	d10b      	bne.n	8011752 <xQueueCreateCountingSemaphoreStatic+0x2a>
	__asm volatile
 801173a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801173e:	f383 8811 	msr	BASEPRI, r3
 8011742:	f3bf 8f6f 	isb	sy
 8011746:	f3bf 8f4f 	dsb	sy
 801174a:	61bb      	str	r3, [r7, #24]
}
 801174c:	bf00      	nop
 801174e:	bf00      	nop
 8011750:	e7fd      	b.n	801174e <xQueueCreateCountingSemaphoreStatic+0x26>
		configASSERT( uxInitialCount <= uxMaxCount );
 8011752:	68ba      	ldr	r2, [r7, #8]
 8011754:	68fb      	ldr	r3, [r7, #12]
 8011756:	429a      	cmp	r2, r3
 8011758:	d90b      	bls.n	8011772 <xQueueCreateCountingSemaphoreStatic+0x4a>
	__asm volatile
 801175a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801175e:	f383 8811 	msr	BASEPRI, r3
 8011762:	f3bf 8f6f 	isb	sy
 8011766:	f3bf 8f4f 	dsb	sy
 801176a:	617b      	str	r3, [r7, #20]
}
 801176c:	bf00      	nop
 801176e:	bf00      	nop
 8011770:	e7fd      	b.n	801176e <xQueueCreateCountingSemaphoreStatic+0x46>

		xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
 8011772:	2302      	movs	r3, #2
 8011774:	9300      	str	r3, [sp, #0]
 8011776:	687b      	ldr	r3, [r7, #4]
 8011778:	2200      	movs	r2, #0
 801177a:	2100      	movs	r1, #0
 801177c:	68f8      	ldr	r0, [r7, #12]
 801177e:	f7ff fe3f 	bl	8011400 <xQueueGenericCreateStatic>
 8011782:	61f8      	str	r0, [r7, #28]

		if( xHandle != NULL )
 8011784:	69fb      	ldr	r3, [r7, #28]
 8011786:	2b00      	cmp	r3, #0
 8011788:	d002      	beq.n	8011790 <xQueueCreateCountingSemaphoreStatic+0x68>
		{
			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
 801178a:	69fb      	ldr	r3, [r7, #28]
 801178c:	68ba      	ldr	r2, [r7, #8]
 801178e:	639a      	str	r2, [r3, #56]	@ 0x38
		else
		{
			traceCREATE_COUNTING_SEMAPHORE_FAILED();
		}

		return xHandle;
 8011790:	69fb      	ldr	r3, [r7, #28]
	}
 8011792:	4618      	mov	r0, r3
 8011794:	3720      	adds	r7, #32
 8011796:	46bd      	mov	sp, r7
 8011798:	bd80      	pop	{r7, pc}

0801179a <xQueueCreateCountingSemaphore>:
/*-----------------------------------------------------------*/

#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount )
	{
 801179a:	b580      	push	{r7, lr}
 801179c:	b086      	sub	sp, #24
 801179e:	af00      	add	r7, sp, #0
 80117a0:	6078      	str	r0, [r7, #4]
 80117a2:	6039      	str	r1, [r7, #0]
	QueueHandle_t xHandle;

		configASSERT( uxMaxCount != 0 );
 80117a4:	687b      	ldr	r3, [r7, #4]
 80117a6:	2b00      	cmp	r3, #0
 80117a8:	d10b      	bne.n	80117c2 <xQueueCreateCountingSemaphore+0x28>
	__asm volatile
 80117aa:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80117ae:	f383 8811 	msr	BASEPRI, r3
 80117b2:	f3bf 8f6f 	isb	sy
 80117b6:	f3bf 8f4f 	dsb	sy
 80117ba:	613b      	str	r3, [r7, #16]
}
 80117bc:	bf00      	nop
 80117be:	bf00      	nop
 80117c0:	e7fd      	b.n	80117be <xQueueCreateCountingSemaphore+0x24>
		configASSERT( uxInitialCount <= uxMaxCount );
 80117c2:	683a      	ldr	r2, [r7, #0]
 80117c4:	687b      	ldr	r3, [r7, #4]
 80117c6:	429a      	cmp	r2, r3
 80117c8:	d90b      	bls.n	80117e2 <xQueueCreateCountingSemaphore+0x48>
	__asm volatile
 80117ca:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80117ce:	f383 8811 	msr	BASEPRI, r3
 80117d2:	f3bf 8f6f 	isb	sy
 80117d6:	f3bf 8f4f 	dsb	sy
 80117da:	60fb      	str	r3, [r7, #12]
}
 80117dc:	bf00      	nop
 80117de:	bf00      	nop
 80117e0:	e7fd      	b.n	80117de <xQueueCreateCountingSemaphore+0x44>

		xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
 80117e2:	2202      	movs	r2, #2
 80117e4:	2100      	movs	r1, #0
 80117e6:	6878      	ldr	r0, [r7, #4]
 80117e8:	f7ff fe87 	bl	80114fa <xQueueGenericCreate>
 80117ec:	6178      	str	r0, [r7, #20]

		if( xHandle != NULL )
 80117ee:	697b      	ldr	r3, [r7, #20]
 80117f0:	2b00      	cmp	r3, #0
 80117f2:	d002      	beq.n	80117fa <xQueueCreateCountingSemaphore+0x60>
		{
			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
 80117f4:	697b      	ldr	r3, [r7, #20]
 80117f6:	683a      	ldr	r2, [r7, #0]
 80117f8:	639a      	str	r2, [r3, #56]	@ 0x38
		else
		{
			traceCREATE_COUNTING_SEMAPHORE_FAILED();
		}

		return xHandle;
 80117fa:	697b      	ldr	r3, [r7, #20]
	}
 80117fc:	4618      	mov	r0, r3
 80117fe:	3718      	adds	r7, #24
 8011800:	46bd      	mov	sp, r7
 8011802:	bd80      	pop	{r7, pc}

08011804 <xQueueGenericSend>:

#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
{
 8011804:	b580      	push	{r7, lr}
 8011806:	b08e      	sub	sp, #56	@ 0x38
 8011808:	af00      	add	r7, sp, #0
 801180a:	60f8      	str	r0, [r7, #12]
 801180c:	60b9      	str	r1, [r7, #8]
 801180e:	607a      	str	r2, [r7, #4]
 8011810:	603b      	str	r3, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
 8011812:	2300      	movs	r3, #0
 8011814:	637b      	str	r3, [r7, #52]	@ 0x34
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 8011816:	68fb      	ldr	r3, [r7, #12]
 8011818:	633b      	str	r3, [r7, #48]	@ 0x30

	configASSERT( pxQueue );
 801181a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801181c:	2b00      	cmp	r3, #0
 801181e:	d10b      	bne.n	8011838 <xQueueGenericSend+0x34>
	__asm volatile
 8011820:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011824:	f383 8811 	msr	BASEPRI, r3
 8011828:	f3bf 8f6f 	isb	sy
 801182c:	f3bf 8f4f 	dsb	sy
 8011830:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 8011832:	bf00      	nop
 8011834:	bf00      	nop
 8011836:	e7fd      	b.n	8011834 <xQueueGenericSend+0x30>
	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 8011838:	68bb      	ldr	r3, [r7, #8]
 801183a:	2b00      	cmp	r3, #0
 801183c:	d103      	bne.n	8011846 <xQueueGenericSend+0x42>
 801183e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011840:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011842:	2b00      	cmp	r3, #0
 8011844:	d101      	bne.n	801184a <xQueueGenericSend+0x46>
 8011846:	2301      	movs	r3, #1
 8011848:	e000      	b.n	801184c <xQueueGenericSend+0x48>
 801184a:	2300      	movs	r3, #0
 801184c:	2b00      	cmp	r3, #0
 801184e:	d10b      	bne.n	8011868 <xQueueGenericSend+0x64>
	__asm volatile
 8011850:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011854:	f383 8811 	msr	BASEPRI, r3
 8011858:	f3bf 8f6f 	isb	sy
 801185c:	f3bf 8f4f 	dsb	sy
 8011860:	627b      	str	r3, [r7, #36]	@ 0x24
}
 8011862:	bf00      	nop
 8011864:	bf00      	nop
 8011866:	e7fd      	b.n	8011864 <xQueueGenericSend+0x60>
	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 8011868:	683b      	ldr	r3, [r7, #0]
 801186a:	2b02      	cmp	r3, #2
 801186c:	d103      	bne.n	8011876 <xQueueGenericSend+0x72>
 801186e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011870:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8011872:	2b01      	cmp	r3, #1
 8011874:	d101      	bne.n	801187a <xQueueGenericSend+0x76>
 8011876:	2301      	movs	r3, #1
 8011878:	e000      	b.n	801187c <xQueueGenericSend+0x78>
 801187a:	2300      	movs	r3, #0
 801187c:	2b00      	cmp	r3, #0
 801187e:	d10b      	bne.n	8011898 <xQueueGenericSend+0x94>
	__asm volatile
 8011880:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011884:	f383 8811 	msr	BASEPRI, r3
 8011888:	f3bf 8f6f 	isb	sy
 801188c:	f3bf 8f4f 	dsb	sy
 8011890:	623b      	str	r3, [r7, #32]
}
 8011892:	bf00      	nop
 8011894:	bf00      	nop
 8011896:	e7fd      	b.n	8011894 <xQueueGenericSend+0x90>
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 8011898:	f002 f8b2 	bl	8013a00 <xTaskGetSchedulerState>
 801189c:	4603      	mov	r3, r0
 801189e:	2b00      	cmp	r3, #0
 80118a0:	d102      	bne.n	80118a8 <xQueueGenericSend+0xa4>
 80118a2:	687b      	ldr	r3, [r7, #4]
 80118a4:	2b00      	cmp	r3, #0
 80118a6:	d101      	bne.n	80118ac <xQueueGenericSend+0xa8>
 80118a8:	2301      	movs	r3, #1
 80118aa:	e000      	b.n	80118ae <xQueueGenericSend+0xaa>
 80118ac:	2300      	movs	r3, #0
 80118ae:	2b00      	cmp	r3, #0
 80118b0:	d10b      	bne.n	80118ca <xQueueGenericSend+0xc6>
	__asm volatile
 80118b2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80118b6:	f383 8811 	msr	BASEPRI, r3
 80118ba:	f3bf 8f6f 	isb	sy
 80118be:	f3bf 8f4f 	dsb	sy
 80118c2:	61fb      	str	r3, [r7, #28]
}
 80118c4:	bf00      	nop
 80118c6:	bf00      	nop
 80118c8:	e7fd      	b.n	80118c6 <xQueueGenericSend+0xc2>
	/*lint -save -e904 This function relaxes the coding standard somewhat to
	allow return statements within the function itself.  This is done in the
	interest of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 80118ca:	f003 f935 	bl	8014b38 <vPortEnterCritical>
		{
			/* Is there room on the queue now?  The running task must be the
			highest priority task wanting to access the queue.  If the head item
			in the queue is to be overwritten then it does not matter if the
			queue is full. */
			if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
 80118ce:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80118d0:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 80118d2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80118d4:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80118d6:	429a      	cmp	r2, r3
 80118d8:	d302      	bcc.n	80118e0 <xQueueGenericSend+0xdc>
 80118da:	683b      	ldr	r3, [r7, #0]
 80118dc:	2b02      	cmp	r3, #2
 80118de:	d129      	bne.n	8011934 <xQueueGenericSend+0x130>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 80118e0:	683a      	ldr	r2, [r7, #0]
 80118e2:	68b9      	ldr	r1, [r7, #8]
 80118e4:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80118e6:	f000 fcab 	bl	8012240 <prvCopyDataToQueue>
 80118ea:	62f8      	str	r0, [r7, #44]	@ 0x2c

					/* If there was a task waiting for data to arrive on the
					queue then unblock it now. */
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 80118ec:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80118ee:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80118f0:	2b00      	cmp	r3, #0
 80118f2:	d010      	beq.n	8011916 <xQueueGenericSend+0x112>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 80118f4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80118f6:	3324      	adds	r3, #36	@ 0x24
 80118f8:	4618      	mov	r0, r3
 80118fa:	f001 fe83 	bl	8013604 <xTaskRemoveFromEventList>
 80118fe:	4603      	mov	r3, r0
 8011900:	2b00      	cmp	r3, #0
 8011902:	d013      	beq.n	801192c <xQueueGenericSend+0x128>
						{
							/* The unblocked task has a priority higher than
							our own so yield immediately.  Yes it is ok to do
							this from within the critical section - the kernel
							takes care of that. */
							queueYIELD_IF_USING_PREEMPTION();
 8011904:	4b3f      	ldr	r3, [pc, #252]	@ (8011a04 <xQueueGenericSend+0x200>)
 8011906:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 801190a:	601a      	str	r2, [r3, #0]
 801190c:	f3bf 8f4f 	dsb	sy
 8011910:	f3bf 8f6f 	isb	sy
 8011914:	e00a      	b.n	801192c <xQueueGenericSend+0x128>
						else
						{
							mtCOVERAGE_TEST_MARKER();
						}
					}
					else if( xYieldRequired != pdFALSE )
 8011916:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011918:	2b00      	cmp	r3, #0
 801191a:	d007      	beq.n	801192c <xQueueGenericSend+0x128>
					{
						/* This path is a special case that will only get
						executed if the task was holding multiple mutexes and
						the mutexes were given back in an order that is
						different to that in which they were taken. */
						queueYIELD_IF_USING_PREEMPTION();
 801191c:	4b39      	ldr	r3, [pc, #228]	@ (8011a04 <xQueueGenericSend+0x200>)
 801191e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011922:	601a      	str	r2, [r3, #0]
 8011924:	f3bf 8f4f 	dsb	sy
 8011928:	f3bf 8f6f 	isb	sy
						mtCOVERAGE_TEST_MARKER();
					}
				}
				#endif /* configUSE_QUEUE_SETS */

				taskEXIT_CRITICAL();
 801192c:	f003 f936 	bl	8014b9c <vPortExitCritical>
				return pdPASS;
 8011930:	2301      	movs	r3, #1
 8011932:	e063      	b.n	80119fc <xQueueGenericSend+0x1f8>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 8011934:	687b      	ldr	r3, [r7, #4]
 8011936:	2b00      	cmp	r3, #0
 8011938:	d103      	bne.n	8011942 <xQueueGenericSend+0x13e>
				{
					/* The queue was full and no block time is specified (or
					the block time has expired) so leave now. */
					taskEXIT_CRITICAL();
 801193a:	f003 f92f 	bl	8014b9c <vPortExitCritical>

					/* Return to the original privilege level before exiting
					the function. */
					traceQUEUE_SEND_FAILED( pxQueue );
					return errQUEUE_FULL;
 801193e:	2300      	movs	r3, #0
 8011940:	e05c      	b.n	80119fc <xQueueGenericSend+0x1f8>
				}
				else if( xEntryTimeSet == pdFALSE )
 8011942:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8011944:	2b00      	cmp	r3, #0
 8011946:	d106      	bne.n	8011956 <xQueueGenericSend+0x152>
				{
					/* The queue was full and a block time was specified so
					configure the timeout structure. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 8011948:	f107 0314 	add.w	r3, r7, #20
 801194c:	4618      	mov	r0, r3
 801194e:	f001 fee5 	bl	801371c <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 8011952:	2301      	movs	r3, #1
 8011954:	637b      	str	r3, [r7, #52]	@ 0x34
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 8011956:	f003 f921 	bl	8014b9c <vPortExitCritical>

		/* Interrupts and other tasks can send to and receive from the queue
		now the critical section has been exited. */

		vTaskSuspendAll();
 801195a:	f001 fc05 	bl	8013168 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 801195e:	f003 f8eb 	bl	8014b38 <vPortEnterCritical>
 8011962:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011964:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8011968:	b25b      	sxtb	r3, r3
 801196a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801196e:	d103      	bne.n	8011978 <xQueueGenericSend+0x174>
 8011970:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011972:	2200      	movs	r2, #0
 8011974:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 8011978:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801197a:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 801197e:	b25b      	sxtb	r3, r3
 8011980:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011984:	d103      	bne.n	801198e <xQueueGenericSend+0x18a>
 8011986:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011988:	2200      	movs	r2, #0
 801198a:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 801198e:	f003 f905 	bl	8014b9c <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 8011992:	1d3a      	adds	r2, r7, #4
 8011994:	f107 0314 	add.w	r3, r7, #20
 8011998:	4611      	mov	r1, r2
 801199a:	4618      	mov	r0, r3
 801199c:	f001 fed4 	bl	8013748 <xTaskCheckForTimeOut>
 80119a0:	4603      	mov	r3, r0
 80119a2:	2b00      	cmp	r3, #0
 80119a4:	d124      	bne.n	80119f0 <xQueueGenericSend+0x1ec>
		{
			if( prvIsQueueFull( pxQueue ) != pdFALSE )
 80119a6:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80119a8:	f000 fd42 	bl	8012430 <prvIsQueueFull>
 80119ac:	4603      	mov	r3, r0
 80119ae:	2b00      	cmp	r3, #0
 80119b0:	d018      	beq.n	80119e4 <xQueueGenericSend+0x1e0>
			{
				traceBLOCKING_ON_QUEUE_SEND( pxQueue );
				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
 80119b2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80119b4:	3310      	adds	r3, #16
 80119b6:	687a      	ldr	r2, [r7, #4]
 80119b8:	4611      	mov	r1, r2
 80119ba:	4618      	mov	r0, r3
 80119bc:	f001 fdd0 	bl	8013560 <vTaskPlaceOnEventList>
				/* Unlocking the queue means queue events can effect the
				event list.  It is possible that interrupts occurring now
				remove this task from the event list again - but as the
				scheduler is suspended the task will go onto the pending
				ready last instead of the actual ready list. */
				prvUnlockQueue( pxQueue );
 80119c0:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80119c2:	f000 fccd 	bl	8012360 <prvUnlockQueue>
				/* Resuming the scheduler will move tasks from the pending
				ready list into the ready list - so it is feasible that this
				task is already in a ready list before it yields - in which
				case the yield will not cause a context switch unless there
				is also a higher priority task in the pending ready list. */
				if( xTaskResumeAll() == pdFALSE )
 80119c6:	f001 fbdd 	bl	8013184 <xTaskResumeAll>
 80119ca:	4603      	mov	r3, r0
 80119cc:	2b00      	cmp	r3, #0
 80119ce:	f47f af7c 	bne.w	80118ca <xQueueGenericSend+0xc6>
				{
					portYIELD_WITHIN_API();
 80119d2:	4b0c      	ldr	r3, [pc, #48]	@ (8011a04 <xQueueGenericSend+0x200>)
 80119d4:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80119d8:	601a      	str	r2, [r3, #0]
 80119da:	f3bf 8f4f 	dsb	sy
 80119de:	f3bf 8f6f 	isb	sy
 80119e2:	e772      	b.n	80118ca <xQueueGenericSend+0xc6>
				}
			}
			else
			{
				/* Try again. */
				prvUnlockQueue( pxQueue );
 80119e4:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80119e6:	f000 fcbb 	bl	8012360 <prvUnlockQueue>
				( void ) xTaskResumeAll();
 80119ea:	f001 fbcb 	bl	8013184 <xTaskResumeAll>
 80119ee:	e76c      	b.n	80118ca <xQueueGenericSend+0xc6>
			}
		}
		else
		{
			/* The timeout has expired. */
			prvUnlockQueue( pxQueue );
 80119f0:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80119f2:	f000 fcb5 	bl	8012360 <prvUnlockQueue>
			( void ) xTaskResumeAll();
 80119f6:	f001 fbc5 	bl	8013184 <xTaskResumeAll>

			traceQUEUE_SEND_FAILED( pxQueue );
			return errQUEUE_FULL;
 80119fa:	2300      	movs	r3, #0
		}
	} /*lint -restore */
}
 80119fc:	4618      	mov	r0, r3
 80119fe:	3738      	adds	r7, #56	@ 0x38
 8011a00:	46bd      	mov	sp, r7
 8011a02:	bd80      	pop	{r7, pc}
 8011a04:	e000ed04 	.word	0xe000ed04

08011a08 <xQueueGenericSendFromISR>:
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )
{
 8011a08:	b580      	push	{r7, lr}
 8011a0a:	b090      	sub	sp, #64	@ 0x40
 8011a0c:	af00      	add	r7, sp, #0
 8011a0e:	60f8      	str	r0, [r7, #12]
 8011a10:	60b9      	str	r1, [r7, #8]
 8011a12:	607a      	str	r2, [r7, #4]
 8011a14:	603b      	str	r3, [r7, #0]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 8011a16:	68fb      	ldr	r3, [r7, #12]
 8011a18:	63bb      	str	r3, [r7, #56]	@ 0x38

	configASSERT( pxQueue );
 8011a1a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8011a1c:	2b00      	cmp	r3, #0
 8011a1e:	d10b      	bne.n	8011a38 <xQueueGenericSendFromISR+0x30>
	__asm volatile
 8011a20:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011a24:	f383 8811 	msr	BASEPRI, r3
 8011a28:	f3bf 8f6f 	isb	sy
 8011a2c:	f3bf 8f4f 	dsb	sy
 8011a30:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 8011a32:	bf00      	nop
 8011a34:	bf00      	nop
 8011a36:	e7fd      	b.n	8011a34 <xQueueGenericSendFromISR+0x2c>
	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 8011a38:	68bb      	ldr	r3, [r7, #8]
 8011a3a:	2b00      	cmp	r3, #0
 8011a3c:	d103      	bne.n	8011a46 <xQueueGenericSendFromISR+0x3e>
 8011a3e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8011a40:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011a42:	2b00      	cmp	r3, #0
 8011a44:	d101      	bne.n	8011a4a <xQueueGenericSendFromISR+0x42>
 8011a46:	2301      	movs	r3, #1
 8011a48:	e000      	b.n	8011a4c <xQueueGenericSendFromISR+0x44>
 8011a4a:	2300      	movs	r3, #0
 8011a4c:	2b00      	cmp	r3, #0
 8011a4e:	d10b      	bne.n	8011a68 <xQueueGenericSendFromISR+0x60>
	__asm volatile
 8011a50:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011a54:	f383 8811 	msr	BASEPRI, r3
 8011a58:	f3bf 8f6f 	isb	sy
 8011a5c:	f3bf 8f4f 	dsb	sy
 8011a60:	627b      	str	r3, [r7, #36]	@ 0x24
}
 8011a62:	bf00      	nop
 8011a64:	bf00      	nop
 8011a66:	e7fd      	b.n	8011a64 <xQueueGenericSendFromISR+0x5c>
	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 8011a68:	683b      	ldr	r3, [r7, #0]
 8011a6a:	2b02      	cmp	r3, #2
 8011a6c:	d103      	bne.n	8011a76 <xQueueGenericSendFromISR+0x6e>
 8011a6e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8011a70:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8011a72:	2b01      	cmp	r3, #1
 8011a74:	d101      	bne.n	8011a7a <xQueueGenericSendFromISR+0x72>
 8011a76:	2301      	movs	r3, #1
 8011a78:	e000      	b.n	8011a7c <xQueueGenericSendFromISR+0x74>
 8011a7a:	2300      	movs	r3, #0
 8011a7c:	2b00      	cmp	r3, #0
 8011a7e:	d10b      	bne.n	8011a98 <xQueueGenericSendFromISR+0x90>
	__asm volatile
 8011a80:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011a84:	f383 8811 	msr	BASEPRI, r3
 8011a88:	f3bf 8f6f 	isb	sy
 8011a8c:	f3bf 8f4f 	dsb	sy
 8011a90:	623b      	str	r3, [r7, #32]
}
 8011a92:	bf00      	nop
 8011a94:	bf00      	nop
 8011a96:	e7fd      	b.n	8011a94 <xQueueGenericSendFromISR+0x8c>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8011a98:	f003 f92e 	bl	8014cf8 <vPortValidateInterruptPriority>

portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
{
uint32_t ulOriginalBASEPRI, ulNewBASEPRI;

	__asm volatile
 8011a9c:	f3ef 8211 	mrs	r2, BASEPRI
 8011aa0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011aa4:	f383 8811 	msr	BASEPRI, r3
 8011aa8:	f3bf 8f6f 	isb	sy
 8011aac:	f3bf 8f4f 	dsb	sy
 8011ab0:	61fa      	str	r2, [r7, #28]
 8011ab2:	61bb      	str	r3, [r7, #24]
		:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
	);

	/* This return will not be reached but is necessary to prevent compiler
	warnings. */
	return ulOriginalBASEPRI;
 8011ab4:	69fb      	ldr	r3, [r7, #28]
	/* Similar to xQueueGenericSend, except without blocking if there is no room
	in the queue.  Also don't directly wake a task that was blocked on a queue
	read, instead return a flag to say whether a context switch is required or
	not (i.e. has a task with a higher priority than us been woken by this
	post). */
	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8011ab6:	637b      	str	r3, [r7, #52]	@ 0x34
	{
		if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
 8011ab8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8011aba:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 8011abc:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8011abe:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8011ac0:	429a      	cmp	r2, r3
 8011ac2:	d302      	bcc.n	8011aca <xQueueGenericSendFromISR+0xc2>
 8011ac4:	683b      	ldr	r3, [r7, #0]
 8011ac6:	2b02      	cmp	r3, #2
 8011ac8:	d12f      	bne.n	8011b2a <xQueueGenericSendFromISR+0x122>
		{
			const int8_t cTxLock = pxQueue->cTxLock;
 8011aca:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8011acc:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8011ad0:	f887 3033 	strb.w	r3, [r7, #51]	@ 0x33
			const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
 8011ad4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8011ad6:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8011ad8:	62fb      	str	r3, [r7, #44]	@ 0x2c
			/* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
			semaphore or mutex.  That means prvCopyDataToQueue() cannot result
			in a task disinheriting a priority and prvCopyDataToQueue() can be
			called here even though the disinherit function does not check if
			the scheduler is suspended before accessing the ready lists. */
			( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 8011ada:	683a      	ldr	r2, [r7, #0]
 8011adc:	68b9      	ldr	r1, [r7, #8]
 8011ade:	6bb8      	ldr	r0, [r7, #56]	@ 0x38
 8011ae0:	f000 fbae 	bl	8012240 <prvCopyDataToQueue>

			/* The event list is not altered if the queue is locked.  This will
			be done when the queue is unlocked later. */
			if( cTxLock == queueUNLOCKED )
 8011ae4:	f997 3033 	ldrsb.w	r3, [r7, #51]	@ 0x33
 8011ae8:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011aec:	d112      	bne.n	8011b14 <xQueueGenericSendFromISR+0x10c>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 8011aee:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8011af0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8011af2:	2b00      	cmp	r3, #0
 8011af4:	d016      	beq.n	8011b24 <xQueueGenericSendFromISR+0x11c>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 8011af6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8011af8:	3324      	adds	r3, #36	@ 0x24
 8011afa:	4618      	mov	r0, r3
 8011afc:	f001 fd82 	bl	8013604 <xTaskRemoveFromEventList>
 8011b00:	4603      	mov	r3, r0
 8011b02:	2b00      	cmp	r3, #0
 8011b04:	d00e      	beq.n	8011b24 <xQueueGenericSendFromISR+0x11c>
						{
							/* The task waiting has a higher priority so record that a
							context	switch is required. */
							if( pxHigherPriorityTaskWoken != NULL )
 8011b06:	687b      	ldr	r3, [r7, #4]
 8011b08:	2b00      	cmp	r3, #0
 8011b0a:	d00b      	beq.n	8011b24 <xQueueGenericSendFromISR+0x11c>
							{
								*pxHigherPriorityTaskWoken = pdTRUE;
 8011b0c:	687b      	ldr	r3, [r7, #4]
 8011b0e:	2201      	movs	r2, #1
 8011b10:	601a      	str	r2, [r3, #0]
 8011b12:	e007      	b.n	8011b24 <xQueueGenericSendFromISR+0x11c>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was posted while it was locked. */
				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
 8011b14:	f897 3033 	ldrb.w	r3, [r7, #51]	@ 0x33
 8011b18:	3301      	adds	r3, #1
 8011b1a:	b2db      	uxtb	r3, r3
 8011b1c:	b25a      	sxtb	r2, r3
 8011b1e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8011b20:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
			}

			xReturn = pdPASS;
 8011b24:	2301      	movs	r3, #1
 8011b26:	63fb      	str	r3, [r7, #60]	@ 0x3c
		{
 8011b28:	e001      	b.n	8011b2e <xQueueGenericSendFromISR+0x126>
		}
		else
		{
			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
			xReturn = errQUEUE_FULL;
 8011b2a:	2300      	movs	r3, #0
 8011b2c:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8011b2e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8011b30:	617b      	str	r3, [r7, #20]
}
/*-----------------------------------------------------------*/

portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
{
	__asm volatile
 8011b32:	697b      	ldr	r3, [r7, #20]
 8011b34:	f383 8811 	msr	BASEPRI, r3
	(
		"	msr basepri, %0	" :: "r" ( ulNewMaskValue ) : "memory"
	);
}
 8011b38:	bf00      	nop
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 8011b3a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
}
 8011b3c:	4618      	mov	r0, r3
 8011b3e:	3740      	adds	r7, #64	@ 0x40
 8011b40:	46bd      	mov	sp, r7
 8011b42:	bd80      	pop	{r7, pc}

08011b44 <xQueueGiveFromISR>:
/*-----------------------------------------------------------*/

BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken )
{
 8011b44:	b580      	push	{r7, lr}
 8011b46:	b08e      	sub	sp, #56	@ 0x38
 8011b48:	af00      	add	r7, sp, #0
 8011b4a:	6078      	str	r0, [r7, #4]
 8011b4c:	6039      	str	r1, [r7, #0]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 8011b4e:	687b      	ldr	r3, [r7, #4]
 8011b50:	633b      	str	r3, [r7, #48]	@ 0x30
	item size is 0.  Don't directly wake a task that was blocked on a queue
	read, instead return a flag to say whether a context switch is required or
	not (i.e. has a task with a higher priority than us been woken by this
	post). */

	configASSERT( pxQueue );
 8011b52:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011b54:	2b00      	cmp	r3, #0
 8011b56:	d10b      	bne.n	8011b70 <xQueueGiveFromISR+0x2c>
	__asm volatile
 8011b58:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011b5c:	f383 8811 	msr	BASEPRI, r3
 8011b60:	f3bf 8f6f 	isb	sy
 8011b64:	f3bf 8f4f 	dsb	sy
 8011b68:	623b      	str	r3, [r7, #32]
}
 8011b6a:	bf00      	nop
 8011b6c:	bf00      	nop
 8011b6e:	e7fd      	b.n	8011b6c <xQueueGiveFromISR+0x28>

	/* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR()
	if the item size is not 0. */
	configASSERT( pxQueue->uxItemSize == 0 );
 8011b70:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011b72:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011b74:	2b00      	cmp	r3, #0
 8011b76:	d00b      	beq.n	8011b90 <xQueueGiveFromISR+0x4c>
	__asm volatile
 8011b78:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011b7c:	f383 8811 	msr	BASEPRI, r3
 8011b80:	f3bf 8f6f 	isb	sy
 8011b84:	f3bf 8f4f 	dsb	sy
 8011b88:	61fb      	str	r3, [r7, #28]
}
 8011b8a:	bf00      	nop
 8011b8c:	bf00      	nop
 8011b8e:	e7fd      	b.n	8011b8c <xQueueGiveFromISR+0x48>

	/* Normally a mutex would not be given from an interrupt, especially if
	there is a mutex holder, as priority inheritance makes no sense for an
	interrupts, only tasks. */
	configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->u.xSemaphore.xMutexHolder != NULL ) ) );
 8011b90:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011b92:	681b      	ldr	r3, [r3, #0]
 8011b94:	2b00      	cmp	r3, #0
 8011b96:	d103      	bne.n	8011ba0 <xQueueGiveFromISR+0x5c>
 8011b98:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011b9a:	689b      	ldr	r3, [r3, #8]
 8011b9c:	2b00      	cmp	r3, #0
 8011b9e:	d101      	bne.n	8011ba4 <xQueueGiveFromISR+0x60>
 8011ba0:	2301      	movs	r3, #1
 8011ba2:	e000      	b.n	8011ba6 <xQueueGiveFromISR+0x62>
 8011ba4:	2300      	movs	r3, #0
 8011ba6:	2b00      	cmp	r3, #0
 8011ba8:	d10b      	bne.n	8011bc2 <xQueueGiveFromISR+0x7e>
	__asm volatile
 8011baa:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011bae:	f383 8811 	msr	BASEPRI, r3
 8011bb2:	f3bf 8f6f 	isb	sy
 8011bb6:	f3bf 8f4f 	dsb	sy
 8011bba:	61bb      	str	r3, [r7, #24]
}
 8011bbc:	bf00      	nop
 8011bbe:	bf00      	nop
 8011bc0:	e7fd      	b.n	8011bbe <xQueueGiveFromISR+0x7a>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8011bc2:	f003 f899 	bl	8014cf8 <vPortValidateInterruptPriority>
	__asm volatile
 8011bc6:	f3ef 8211 	mrs	r2, BASEPRI
 8011bca:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011bce:	f383 8811 	msr	BASEPRI, r3
 8011bd2:	f3bf 8f6f 	isb	sy
 8011bd6:	f3bf 8f4f 	dsb	sy
 8011bda:	617a      	str	r2, [r7, #20]
 8011bdc:	613b      	str	r3, [r7, #16]
	return ulOriginalBASEPRI;
 8011bde:	697b      	ldr	r3, [r7, #20]

	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8011be0:	62fb      	str	r3, [r7, #44]	@ 0x2c
	{
		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 8011be2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011be4:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8011be6:	62bb      	str	r3, [r7, #40]	@ 0x28

		/* When the queue is used to implement a semaphore no data is ever
		moved through the queue but it is still valid to see if the queue 'has
		space'. */
		if( uxMessagesWaiting < pxQueue->uxLength )
 8011be8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011bea:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8011bec:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8011bee:	429a      	cmp	r2, r3
 8011bf0:	d22b      	bcs.n	8011c4a <xQueueGiveFromISR+0x106>
		{
			const int8_t cTxLock = pxQueue->cTxLock;
 8011bf2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011bf4:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8011bf8:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			holder - and if there is a mutex holder then the mutex cannot be
			given from an ISR.  As this is the ISR version of the function it
			can be assumed there is no mutex holder and no need to determine if
			priority disinheritance is needed.  Simply increase the count of
			messages (semaphores) available. */
			pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
 8011bfc:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011bfe:	1c5a      	adds	r2, r3, #1
 8011c00:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011c02:	639a      	str	r2, [r3, #56]	@ 0x38

			/* The event list is not altered if the queue is locked.  This will
			be done when the queue is unlocked later. */
			if( cTxLock == queueUNLOCKED )
 8011c04:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8011c08:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011c0c:	d112      	bne.n	8011c34 <xQueueGiveFromISR+0xf0>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 8011c0e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011c10:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8011c12:	2b00      	cmp	r3, #0
 8011c14:	d016      	beq.n	8011c44 <xQueueGiveFromISR+0x100>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 8011c16:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011c18:	3324      	adds	r3, #36	@ 0x24
 8011c1a:	4618      	mov	r0, r3
 8011c1c:	f001 fcf2 	bl	8013604 <xTaskRemoveFromEventList>
 8011c20:	4603      	mov	r3, r0
 8011c22:	2b00      	cmp	r3, #0
 8011c24:	d00e      	beq.n	8011c44 <xQueueGiveFromISR+0x100>
						{
							/* The task waiting has a higher priority so record that a
							context	switch is required. */
							if( pxHigherPriorityTaskWoken != NULL )
 8011c26:	683b      	ldr	r3, [r7, #0]
 8011c28:	2b00      	cmp	r3, #0
 8011c2a:	d00b      	beq.n	8011c44 <xQueueGiveFromISR+0x100>
							{
								*pxHigherPriorityTaskWoken = pdTRUE;
 8011c2c:	683b      	ldr	r3, [r7, #0]
 8011c2e:	2201      	movs	r2, #1
 8011c30:	601a      	str	r2, [r3, #0]
 8011c32:	e007      	b.n	8011c44 <xQueueGiveFromISR+0x100>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was posted while it was locked. */
				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
 8011c34:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8011c38:	3301      	adds	r3, #1
 8011c3a:	b2db      	uxtb	r3, r3
 8011c3c:	b25a      	sxtb	r2, r3
 8011c3e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011c40:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
			}

			xReturn = pdPASS;
 8011c44:	2301      	movs	r3, #1
 8011c46:	637b      	str	r3, [r7, #52]	@ 0x34
 8011c48:	e001      	b.n	8011c4e <xQueueGiveFromISR+0x10a>
		}
		else
		{
			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
			xReturn = errQUEUE_FULL;
 8011c4a:	2300      	movs	r3, #0
 8011c4c:	637b      	str	r3, [r7, #52]	@ 0x34
 8011c4e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011c50:	60fb      	str	r3, [r7, #12]
	__asm volatile
 8011c52:	68fb      	ldr	r3, [r7, #12]
 8011c54:	f383 8811 	msr	BASEPRI, r3
}
 8011c58:	bf00      	nop
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 8011c5a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 8011c5c:	4618      	mov	r0, r3
 8011c5e:	3738      	adds	r7, #56	@ 0x38
 8011c60:	46bd      	mov	sp, r7
 8011c62:	bd80      	pop	{r7, pc}

08011c64 <xQueueReceive>:
/*-----------------------------------------------------------*/

BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait )
{
 8011c64:	b580      	push	{r7, lr}
 8011c66:	b08c      	sub	sp, #48	@ 0x30
 8011c68:	af00      	add	r7, sp, #0
 8011c6a:	60f8      	str	r0, [r7, #12]
 8011c6c:	60b9      	str	r1, [r7, #8]
 8011c6e:	607a      	str	r2, [r7, #4]
BaseType_t xEntryTimeSet = pdFALSE;
 8011c70:	2300      	movs	r3, #0
 8011c72:	62fb      	str	r3, [r7, #44]	@ 0x2c
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 8011c74:	68fb      	ldr	r3, [r7, #12]
 8011c76:	62bb      	str	r3, [r7, #40]	@ 0x28

	/* Check the pointer is not NULL. */
	configASSERT( ( pxQueue ) );
 8011c78:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011c7a:	2b00      	cmp	r3, #0
 8011c7c:	d10b      	bne.n	8011c96 <xQueueReceive+0x32>
	__asm volatile
 8011c7e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011c82:	f383 8811 	msr	BASEPRI, r3
 8011c86:	f3bf 8f6f 	isb	sy
 8011c8a:	f3bf 8f4f 	dsb	sy
 8011c8e:	623b      	str	r3, [r7, #32]
}
 8011c90:	bf00      	nop
 8011c92:	bf00      	nop
 8011c94:	e7fd      	b.n	8011c92 <xQueueReceive+0x2e>

	/* The buffer into which data is received can only be NULL if the data size
	is zero (so no data is copied into the buffer. */
	configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
 8011c96:	68bb      	ldr	r3, [r7, #8]
 8011c98:	2b00      	cmp	r3, #0
 8011c9a:	d103      	bne.n	8011ca4 <xQueueReceive+0x40>
 8011c9c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011c9e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011ca0:	2b00      	cmp	r3, #0
 8011ca2:	d101      	bne.n	8011ca8 <xQueueReceive+0x44>
 8011ca4:	2301      	movs	r3, #1
 8011ca6:	e000      	b.n	8011caa <xQueueReceive+0x46>
 8011ca8:	2300      	movs	r3, #0
 8011caa:	2b00      	cmp	r3, #0
 8011cac:	d10b      	bne.n	8011cc6 <xQueueReceive+0x62>
	__asm volatile
 8011cae:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011cb2:	f383 8811 	msr	BASEPRI, r3
 8011cb6:	f3bf 8f6f 	isb	sy
 8011cba:	f3bf 8f4f 	dsb	sy
 8011cbe:	61fb      	str	r3, [r7, #28]
}
 8011cc0:	bf00      	nop
 8011cc2:	bf00      	nop
 8011cc4:	e7fd      	b.n	8011cc2 <xQueueReceive+0x5e>

	/* Cannot block if the scheduler is suspended. */
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 8011cc6:	f001 fe9b 	bl	8013a00 <xTaskGetSchedulerState>
 8011cca:	4603      	mov	r3, r0
 8011ccc:	2b00      	cmp	r3, #0
 8011cce:	d102      	bne.n	8011cd6 <xQueueReceive+0x72>
 8011cd0:	687b      	ldr	r3, [r7, #4]
 8011cd2:	2b00      	cmp	r3, #0
 8011cd4:	d101      	bne.n	8011cda <xQueueReceive+0x76>
 8011cd6:	2301      	movs	r3, #1
 8011cd8:	e000      	b.n	8011cdc <xQueueReceive+0x78>
 8011cda:	2300      	movs	r3, #0
 8011cdc:	2b00      	cmp	r3, #0
 8011cde:	d10b      	bne.n	8011cf8 <xQueueReceive+0x94>
	__asm volatile
 8011ce0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011ce4:	f383 8811 	msr	BASEPRI, r3
 8011ce8:	f3bf 8f6f 	isb	sy
 8011cec:	f3bf 8f4f 	dsb	sy
 8011cf0:	61bb      	str	r3, [r7, #24]
}
 8011cf2:	bf00      	nop
 8011cf4:	bf00      	nop
 8011cf6:	e7fd      	b.n	8011cf4 <xQueueReceive+0x90>
	/*lint -save -e904  This function relaxes the coding standard somewhat to
	allow return statements within the function itself.  This is done in the
	interest of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 8011cf8:	f002 ff1e 	bl	8014b38 <vPortEnterCritical>
		{
			const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 8011cfc:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011cfe:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8011d00:	627b      	str	r3, [r7, #36]	@ 0x24

			/* Is there data in the queue now?  To be running the calling task
			must be the highest priority task wanting to access the queue. */
			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 8011d02:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8011d04:	2b00      	cmp	r3, #0
 8011d06:	d01f      	beq.n	8011d48 <xQueueReceive+0xe4>
			{
				/* Data available, remove one item. */
				prvCopyDataFromQueue( pxQueue, pvBuffer );
 8011d08:	68b9      	ldr	r1, [r7, #8]
 8011d0a:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8011d0c:	f000 fb02 	bl	8012314 <prvCopyDataFromQueue>
				traceQUEUE_RECEIVE( pxQueue );
				pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 8011d10:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8011d12:	1e5a      	subs	r2, r3, #1
 8011d14:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011d16:	639a      	str	r2, [r3, #56]	@ 0x38

				/* There is now space in the queue, were any tasks waiting to
				post to the queue?  If so, unblock the highest priority waiting
				task. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8011d18:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011d1a:	691b      	ldr	r3, [r3, #16]
 8011d1c:	2b00      	cmp	r3, #0
 8011d1e:	d00f      	beq.n	8011d40 <xQueueReceive+0xdc>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8011d20:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011d22:	3310      	adds	r3, #16
 8011d24:	4618      	mov	r0, r3
 8011d26:	f001 fc6d 	bl	8013604 <xTaskRemoveFromEventList>
 8011d2a:	4603      	mov	r3, r0
 8011d2c:	2b00      	cmp	r3, #0
 8011d2e:	d007      	beq.n	8011d40 <xQueueReceive+0xdc>
					{
						queueYIELD_IF_USING_PREEMPTION();
 8011d30:	4b3c      	ldr	r3, [pc, #240]	@ (8011e24 <xQueueReceive+0x1c0>)
 8011d32:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011d36:	601a      	str	r2, [r3, #0]
 8011d38:	f3bf 8f4f 	dsb	sy
 8011d3c:	f3bf 8f6f 	isb	sy
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				taskEXIT_CRITICAL();
 8011d40:	f002 ff2c 	bl	8014b9c <vPortExitCritical>
				return pdPASS;
 8011d44:	2301      	movs	r3, #1
 8011d46:	e069      	b.n	8011e1c <xQueueReceive+0x1b8>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 8011d48:	687b      	ldr	r3, [r7, #4]
 8011d4a:	2b00      	cmp	r3, #0
 8011d4c:	d103      	bne.n	8011d56 <xQueueReceive+0xf2>
				{
					/* The queue was empty and no block time is specified (or
					the block time has expired) so leave now. */
					taskEXIT_CRITICAL();
 8011d4e:	f002 ff25 	bl	8014b9c <vPortExitCritical>
					traceQUEUE_RECEIVE_FAILED( pxQueue );
					return errQUEUE_EMPTY;
 8011d52:	2300      	movs	r3, #0
 8011d54:	e062      	b.n	8011e1c <xQueueReceive+0x1b8>
				}
				else if( xEntryTimeSet == pdFALSE )
 8011d56:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011d58:	2b00      	cmp	r3, #0
 8011d5a:	d106      	bne.n	8011d6a <xQueueReceive+0x106>
				{
					/* The queue was empty and a block time was specified so
					configure the timeout structure. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 8011d5c:	f107 0310 	add.w	r3, r7, #16
 8011d60:	4618      	mov	r0, r3
 8011d62:	f001 fcdb 	bl	801371c <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 8011d66:	2301      	movs	r3, #1
 8011d68:	62fb      	str	r3, [r7, #44]	@ 0x2c
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 8011d6a:	f002 ff17 	bl	8014b9c <vPortExitCritical>

		/* Interrupts and other tasks can send to and receive from the queue
		now the critical section has been exited. */

		vTaskSuspendAll();
 8011d6e:	f001 f9fb 	bl	8013168 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 8011d72:	f002 fee1 	bl	8014b38 <vPortEnterCritical>
 8011d76:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011d78:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8011d7c:	b25b      	sxtb	r3, r3
 8011d7e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011d82:	d103      	bne.n	8011d8c <xQueueReceive+0x128>
 8011d84:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011d86:	2200      	movs	r2, #0
 8011d88:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 8011d8c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011d8e:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8011d92:	b25b      	sxtb	r3, r3
 8011d94:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011d98:	d103      	bne.n	8011da2 <xQueueReceive+0x13e>
 8011d9a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011d9c:	2200      	movs	r2, #0
 8011d9e:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 8011da2:	f002 fefb 	bl	8014b9c <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 8011da6:	1d3a      	adds	r2, r7, #4
 8011da8:	f107 0310 	add.w	r3, r7, #16
 8011dac:	4611      	mov	r1, r2
 8011dae:	4618      	mov	r0, r3
 8011db0:	f001 fcca 	bl	8013748 <xTaskCheckForTimeOut>
 8011db4:	4603      	mov	r3, r0
 8011db6:	2b00      	cmp	r3, #0
 8011db8:	d123      	bne.n	8011e02 <xQueueReceive+0x19e>
		{
			/* The timeout has not expired.  If the queue is still empty place
			the task on the list of tasks waiting to receive from the queue. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8011dba:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8011dbc:	f000 fb22 	bl	8012404 <prvIsQueueEmpty>
 8011dc0:	4603      	mov	r3, r0
 8011dc2:	2b00      	cmp	r3, #0
 8011dc4:	d017      	beq.n	8011df6 <xQueueReceive+0x192>
			{
				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
 8011dc6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011dc8:	3324      	adds	r3, #36	@ 0x24
 8011dca:	687a      	ldr	r2, [r7, #4]
 8011dcc:	4611      	mov	r1, r2
 8011dce:	4618      	mov	r0, r3
 8011dd0:	f001 fbc6 	bl	8013560 <vTaskPlaceOnEventList>
				prvUnlockQueue( pxQueue );
 8011dd4:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8011dd6:	f000 fac3 	bl	8012360 <prvUnlockQueue>
				if( xTaskResumeAll() == pdFALSE )
 8011dda:	f001 f9d3 	bl	8013184 <xTaskResumeAll>
 8011dde:	4603      	mov	r3, r0
 8011de0:	2b00      	cmp	r3, #0
 8011de2:	d189      	bne.n	8011cf8 <xQueueReceive+0x94>
				{
					portYIELD_WITHIN_API();
 8011de4:	4b0f      	ldr	r3, [pc, #60]	@ (8011e24 <xQueueReceive+0x1c0>)
 8011de6:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011dea:	601a      	str	r2, [r3, #0]
 8011dec:	f3bf 8f4f 	dsb	sy
 8011df0:	f3bf 8f6f 	isb	sy
 8011df4:	e780      	b.n	8011cf8 <xQueueReceive+0x94>
			}
			else
			{
				/* The queue contains data again.  Loop back to try and read the
				data. */
				prvUnlockQueue( pxQueue );
 8011df6:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8011df8:	f000 fab2 	bl	8012360 <prvUnlockQueue>
				( void ) xTaskResumeAll();
 8011dfc:	f001 f9c2 	bl	8013184 <xTaskResumeAll>
 8011e00:	e77a      	b.n	8011cf8 <xQueueReceive+0x94>
		}
		else
		{
			/* Timed out.  If there is no data in the queue exit, otherwise loop
			back and attempt to read the data. */
			prvUnlockQueue( pxQueue );
 8011e02:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8011e04:	f000 faac 	bl	8012360 <prvUnlockQueue>
			( void ) xTaskResumeAll();
 8011e08:	f001 f9bc 	bl	8013184 <xTaskResumeAll>

			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8011e0c:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8011e0e:	f000 faf9 	bl	8012404 <prvIsQueueEmpty>
 8011e12:	4603      	mov	r3, r0
 8011e14:	2b00      	cmp	r3, #0
 8011e16:	f43f af6f 	beq.w	8011cf8 <xQueueReceive+0x94>
			{
				traceQUEUE_RECEIVE_FAILED( pxQueue );
				return errQUEUE_EMPTY;
 8011e1a:	2300      	movs	r3, #0
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	} /*lint -restore */
}
 8011e1c:	4618      	mov	r0, r3
 8011e1e:	3730      	adds	r7, #48	@ 0x30
 8011e20:	46bd      	mov	sp, r7
 8011e22:	bd80      	pop	{r7, pc}
 8011e24:	e000ed04 	.word	0xe000ed04

08011e28 <xQueueSemaphoreTake>:
/*-----------------------------------------------------------*/

BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait )
{
 8011e28:	b580      	push	{r7, lr}
 8011e2a:	b08e      	sub	sp, #56	@ 0x38
 8011e2c:	af00      	add	r7, sp, #0
 8011e2e:	6078      	str	r0, [r7, #4]
 8011e30:	6039      	str	r1, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE;
 8011e32:	2300      	movs	r3, #0
 8011e34:	637b      	str	r3, [r7, #52]	@ 0x34
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 8011e36:	687b      	ldr	r3, [r7, #4]
 8011e38:	62fb      	str	r3, [r7, #44]	@ 0x2c

#if( configUSE_MUTEXES == 1 )
	BaseType_t xInheritanceOccurred = pdFALSE;
 8011e3a:	2300      	movs	r3, #0
 8011e3c:	633b      	str	r3, [r7, #48]	@ 0x30
#endif

	/* Check the queue pointer is not NULL. */
	configASSERT( ( pxQueue ) );
 8011e3e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011e40:	2b00      	cmp	r3, #0
 8011e42:	d10b      	bne.n	8011e5c <xQueueSemaphoreTake+0x34>
	__asm volatile
 8011e44:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011e48:	f383 8811 	msr	BASEPRI, r3
 8011e4c:	f3bf 8f6f 	isb	sy
 8011e50:	f3bf 8f4f 	dsb	sy
 8011e54:	623b      	str	r3, [r7, #32]
}
 8011e56:	bf00      	nop
 8011e58:	bf00      	nop
 8011e5a:	e7fd      	b.n	8011e58 <xQueueSemaphoreTake+0x30>

	/* Check this really is a semaphore, in which case the item size will be
	0. */
	configASSERT( pxQueue->uxItemSize == 0 );
 8011e5c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011e5e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011e60:	2b00      	cmp	r3, #0
 8011e62:	d00b      	beq.n	8011e7c <xQueueSemaphoreTake+0x54>
	__asm volatile
 8011e64:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011e68:	f383 8811 	msr	BASEPRI, r3
 8011e6c:	f3bf 8f6f 	isb	sy
 8011e70:	f3bf 8f4f 	dsb	sy
 8011e74:	61fb      	str	r3, [r7, #28]
}
 8011e76:	bf00      	nop
 8011e78:	bf00      	nop
 8011e7a:	e7fd      	b.n	8011e78 <xQueueSemaphoreTake+0x50>

	/* Cannot block if the scheduler is suspended. */
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 8011e7c:	f001 fdc0 	bl	8013a00 <xTaskGetSchedulerState>
 8011e80:	4603      	mov	r3, r0
 8011e82:	2b00      	cmp	r3, #0
 8011e84:	d102      	bne.n	8011e8c <xQueueSemaphoreTake+0x64>
 8011e86:	683b      	ldr	r3, [r7, #0]
 8011e88:	2b00      	cmp	r3, #0
 8011e8a:	d101      	bne.n	8011e90 <xQueueSemaphoreTake+0x68>
 8011e8c:	2301      	movs	r3, #1
 8011e8e:	e000      	b.n	8011e92 <xQueueSemaphoreTake+0x6a>
 8011e90:	2300      	movs	r3, #0
 8011e92:	2b00      	cmp	r3, #0
 8011e94:	d10b      	bne.n	8011eae <xQueueSemaphoreTake+0x86>
	__asm volatile
 8011e96:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011e9a:	f383 8811 	msr	BASEPRI, r3
 8011e9e:	f3bf 8f6f 	isb	sy
 8011ea2:	f3bf 8f4f 	dsb	sy
 8011ea6:	61bb      	str	r3, [r7, #24]
}
 8011ea8:	bf00      	nop
 8011eaa:	bf00      	nop
 8011eac:	e7fd      	b.n	8011eaa <xQueueSemaphoreTake+0x82>
	/*lint -save -e904 This function relaxes the coding standard somewhat to allow return
	statements within the function itself.  This is done in the interest
	of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 8011eae:	f002 fe43 	bl	8014b38 <vPortEnterCritical>
		{
			/* Semaphores are queues with an item size of 0, and where the
			number of messages in the queue is the semaphore's count value. */
			const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting;
 8011eb2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011eb4:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8011eb6:	62bb      	str	r3, [r7, #40]	@ 0x28

			/* Is there data in the queue now?  To be running the calling task
			must be the highest priority task wanting to access the queue. */
			if( uxSemaphoreCount > ( UBaseType_t ) 0 )
 8011eb8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011eba:	2b00      	cmp	r3, #0
 8011ebc:	d024      	beq.n	8011f08 <xQueueSemaphoreTake+0xe0>
			{
				traceQUEUE_RECEIVE( pxQueue );

				/* Semaphores are queues with a data size of zero and where the
				messages waiting is the semaphore's count.  Reduce the count. */
				pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1;
 8011ebe:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011ec0:	1e5a      	subs	r2, r3, #1
 8011ec2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011ec4:	639a      	str	r2, [r3, #56]	@ 0x38

				#if ( configUSE_MUTEXES == 1 )
				{
					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 8011ec6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011ec8:	681b      	ldr	r3, [r3, #0]
 8011eca:	2b00      	cmp	r3, #0
 8011ecc:	d104      	bne.n	8011ed8 <xQueueSemaphoreTake+0xb0>
					{
						/* Record the information required to implement
						priority inheritance should it become necessary. */
						pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount();
 8011ece:	f001 ff11 	bl	8013cf4 <pvTaskIncrementMutexHeldCount>
 8011ed2:	4602      	mov	r2, r0
 8011ed4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011ed6:	609a      	str	r2, [r3, #8]
				}
				#endif /* configUSE_MUTEXES */

				/* Check to see if other tasks are blocked waiting to give the
				semaphore, and if so, unblock the highest priority such task. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8011ed8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011eda:	691b      	ldr	r3, [r3, #16]
 8011edc:	2b00      	cmp	r3, #0
 8011ede:	d00f      	beq.n	8011f00 <xQueueSemaphoreTake+0xd8>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8011ee0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011ee2:	3310      	adds	r3, #16
 8011ee4:	4618      	mov	r0, r3
 8011ee6:	f001 fb8d 	bl	8013604 <xTaskRemoveFromEventList>
 8011eea:	4603      	mov	r3, r0
 8011eec:	2b00      	cmp	r3, #0
 8011eee:	d007      	beq.n	8011f00 <xQueueSemaphoreTake+0xd8>
					{
						queueYIELD_IF_USING_PREEMPTION();
 8011ef0:	4b54      	ldr	r3, [pc, #336]	@ (8012044 <xQueueSemaphoreTake+0x21c>)
 8011ef2:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011ef6:	601a      	str	r2, [r3, #0]
 8011ef8:	f3bf 8f4f 	dsb	sy
 8011efc:	f3bf 8f6f 	isb	sy
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				taskEXIT_CRITICAL();
 8011f00:	f002 fe4c 	bl	8014b9c <vPortExitCritical>
				return pdPASS;
 8011f04:	2301      	movs	r3, #1
 8011f06:	e098      	b.n	801203a <xQueueSemaphoreTake+0x212>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 8011f08:	683b      	ldr	r3, [r7, #0]
 8011f0a:	2b00      	cmp	r3, #0
 8011f0c:	d112      	bne.n	8011f34 <xQueueSemaphoreTake+0x10c>
					/* For inheritance to have occurred there must have been an
					initial timeout, and an adjusted timeout cannot become 0, as
					if it were 0 the function would have exited. */
					#if( configUSE_MUTEXES == 1 )
					{
						configASSERT( xInheritanceOccurred == pdFALSE );
 8011f0e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011f10:	2b00      	cmp	r3, #0
 8011f12:	d00b      	beq.n	8011f2c <xQueueSemaphoreTake+0x104>
	__asm volatile
 8011f14:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011f18:	f383 8811 	msr	BASEPRI, r3
 8011f1c:	f3bf 8f6f 	isb	sy
 8011f20:	f3bf 8f4f 	dsb	sy
 8011f24:	617b      	str	r3, [r7, #20]
}
 8011f26:	bf00      	nop
 8011f28:	bf00      	nop
 8011f2a:	e7fd      	b.n	8011f28 <xQueueSemaphoreTake+0x100>
					}
					#endif /* configUSE_MUTEXES */

					/* The semaphore count was 0 and no block time is specified
					(or the block time has expired) so exit now. */
					taskEXIT_CRITICAL();
 8011f2c:	f002 fe36 	bl	8014b9c <vPortExitCritical>
					traceQUEUE_RECEIVE_FAILED( pxQueue );
					return errQUEUE_EMPTY;
 8011f30:	2300      	movs	r3, #0
 8011f32:	e082      	b.n	801203a <xQueueSemaphoreTake+0x212>
				}
				else if( xEntryTimeSet == pdFALSE )
 8011f34:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8011f36:	2b00      	cmp	r3, #0
 8011f38:	d106      	bne.n	8011f48 <xQueueSemaphoreTake+0x120>
				{
					/* The semaphore count was 0 and a block time was specified
					so configure the timeout structure ready to block. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 8011f3a:	f107 030c 	add.w	r3, r7, #12
 8011f3e:	4618      	mov	r0, r3
 8011f40:	f001 fbec 	bl	801371c <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 8011f44:	2301      	movs	r3, #1
 8011f46:	637b      	str	r3, [r7, #52]	@ 0x34
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 8011f48:	f002 fe28 	bl	8014b9c <vPortExitCritical>

		/* Interrupts and other tasks can give to and take from the semaphore
		now the critical section has been exited. */

		vTaskSuspendAll();
 8011f4c:	f001 f90c 	bl	8013168 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 8011f50:	f002 fdf2 	bl	8014b38 <vPortEnterCritical>
 8011f54:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011f56:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8011f5a:	b25b      	sxtb	r3, r3
 8011f5c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011f60:	d103      	bne.n	8011f6a <xQueueSemaphoreTake+0x142>
 8011f62:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011f64:	2200      	movs	r2, #0
 8011f66:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 8011f6a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011f6c:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8011f70:	b25b      	sxtb	r3, r3
 8011f72:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011f76:	d103      	bne.n	8011f80 <xQueueSemaphoreTake+0x158>
 8011f78:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011f7a:	2200      	movs	r2, #0
 8011f7c:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 8011f80:	f002 fe0c 	bl	8014b9c <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 8011f84:	463a      	mov	r2, r7
 8011f86:	f107 030c 	add.w	r3, r7, #12
 8011f8a:	4611      	mov	r1, r2
 8011f8c:	4618      	mov	r0, r3
 8011f8e:	f001 fbdb 	bl	8013748 <xTaskCheckForTimeOut>
 8011f92:	4603      	mov	r3, r0
 8011f94:	2b00      	cmp	r3, #0
 8011f96:	d132      	bne.n	8011ffe <xQueueSemaphoreTake+0x1d6>
		{
			/* A block time is specified and not expired.  If the semaphore
			count is 0 then enter the Blocked state to wait for a semaphore to
			become available.  As semaphores are implemented with queues the
			queue being empty is equivalent to the semaphore count being 0. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8011f98:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8011f9a:	f000 fa33 	bl	8012404 <prvIsQueueEmpty>
 8011f9e:	4603      	mov	r3, r0
 8011fa0:	2b00      	cmp	r3, #0
 8011fa2:	d026      	beq.n	8011ff2 <xQueueSemaphoreTake+0x1ca>
			{
				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );

				#if ( configUSE_MUTEXES == 1 )
				{
					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 8011fa4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011fa6:	681b      	ldr	r3, [r3, #0]
 8011fa8:	2b00      	cmp	r3, #0
 8011faa:	d109      	bne.n	8011fc0 <xQueueSemaphoreTake+0x198>
					{
						taskENTER_CRITICAL();
 8011fac:	f002 fdc4 	bl	8014b38 <vPortEnterCritical>
						{
							xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder );
 8011fb0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011fb2:	689b      	ldr	r3, [r3, #8]
 8011fb4:	4618      	mov	r0, r3
 8011fb6:	f001 fd41 	bl	8013a3c <xTaskPriorityInherit>
 8011fba:	6338      	str	r0, [r7, #48]	@ 0x30
						}
						taskEXIT_CRITICAL();
 8011fbc:	f002 fdee 	bl	8014b9c <vPortExitCritical>
						mtCOVERAGE_TEST_MARKER();
					}
				}
				#endif

				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
 8011fc0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011fc2:	3324      	adds	r3, #36	@ 0x24
 8011fc4:	683a      	ldr	r2, [r7, #0]
 8011fc6:	4611      	mov	r1, r2
 8011fc8:	4618      	mov	r0, r3
 8011fca:	f001 fac9 	bl	8013560 <vTaskPlaceOnEventList>
				prvUnlockQueue( pxQueue );
 8011fce:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8011fd0:	f000 f9c6 	bl	8012360 <prvUnlockQueue>
				if( xTaskResumeAll() == pdFALSE )
 8011fd4:	f001 f8d6 	bl	8013184 <xTaskResumeAll>
 8011fd8:	4603      	mov	r3, r0
 8011fda:	2b00      	cmp	r3, #0
 8011fdc:	f47f af67 	bne.w	8011eae <xQueueSemaphoreTake+0x86>
				{
					portYIELD_WITHIN_API();
 8011fe0:	4b18      	ldr	r3, [pc, #96]	@ (8012044 <xQueueSemaphoreTake+0x21c>)
 8011fe2:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011fe6:	601a      	str	r2, [r3, #0]
 8011fe8:	f3bf 8f4f 	dsb	sy
 8011fec:	f3bf 8f6f 	isb	sy
 8011ff0:	e75d      	b.n	8011eae <xQueueSemaphoreTake+0x86>
			}
			else
			{
				/* There was no timeout and the semaphore count was not 0, so
				attempt to take the semaphore again. */
				prvUnlockQueue( pxQueue );
 8011ff2:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8011ff4:	f000 f9b4 	bl	8012360 <prvUnlockQueue>
				( void ) xTaskResumeAll();
 8011ff8:	f001 f8c4 	bl	8013184 <xTaskResumeAll>
 8011ffc:	e757      	b.n	8011eae <xQueueSemaphoreTake+0x86>
			}
		}
		else
		{
			/* Timed out. */
			prvUnlockQueue( pxQueue );
 8011ffe:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012000:	f000 f9ae 	bl	8012360 <prvUnlockQueue>
			( void ) xTaskResumeAll();
 8012004:	f001 f8be 	bl	8013184 <xTaskResumeAll>

			/* If the semaphore count is 0 exit now as the timeout has
			expired.  Otherwise return to attempt to take the semaphore that is
			known to be available.  As semaphores are implemented by queues the
			queue being empty is equivalent to the semaphore count being 0. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8012008:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801200a:	f000 f9fb 	bl	8012404 <prvIsQueueEmpty>
 801200e:	4603      	mov	r3, r0
 8012010:	2b00      	cmp	r3, #0
 8012012:	f43f af4c 	beq.w	8011eae <xQueueSemaphoreTake+0x86>
				#if ( configUSE_MUTEXES == 1 )
				{
					/* xInheritanceOccurred could only have be set if
					pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to
					test the mutex type again to check it is actually a mutex. */
					if( xInheritanceOccurred != pdFALSE )
 8012016:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012018:	2b00      	cmp	r3, #0
 801201a:	d00d      	beq.n	8012038 <xQueueSemaphoreTake+0x210>
					{
						taskENTER_CRITICAL();
 801201c:	f002 fd8c 	bl	8014b38 <vPortEnterCritical>
							/* This task blocking on the mutex caused another
							task to inherit this task's priority.  Now this task
							has timed out the priority should be disinherited
							again, but only as low as the next highest priority
							task that is waiting for the same mutex. */
							uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue );
 8012020:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012022:	f000 f8f5 	bl	8012210 <prvGetDisinheritPriorityAfterTimeout>
 8012026:	6278      	str	r0, [r7, #36]	@ 0x24
							vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority );
 8012028:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801202a:	689b      	ldr	r3, [r3, #8]
 801202c:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 801202e:	4618      	mov	r0, r3
 8012030:	f001 fddc 	bl	8013bec <vTaskPriorityDisinheritAfterTimeout>
						}
						taskEXIT_CRITICAL();
 8012034:	f002 fdb2 	bl	8014b9c <vPortExitCritical>
					}
				}
				#endif /* configUSE_MUTEXES */

				traceQUEUE_RECEIVE_FAILED( pxQueue );
				return errQUEUE_EMPTY;
 8012038:	2300      	movs	r3, #0
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	} /*lint -restore */
}
 801203a:	4618      	mov	r0, r3
 801203c:	3738      	adds	r7, #56	@ 0x38
 801203e:	46bd      	mov	sp, r7
 8012040:	bd80      	pop	{r7, pc}
 8012042:	bf00      	nop
 8012044:	e000ed04 	.word	0xe000ed04

08012048 <xQueueReceiveFromISR>:
	} /*lint -restore */
}
/*-----------------------------------------------------------*/

BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken )
{
 8012048:	b580      	push	{r7, lr}
 801204a:	b08e      	sub	sp, #56	@ 0x38
 801204c:	af00      	add	r7, sp, #0
 801204e:	60f8      	str	r0, [r7, #12]
 8012050:	60b9      	str	r1, [r7, #8]
 8012052:	607a      	str	r2, [r7, #4]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 8012054:	68fb      	ldr	r3, [r7, #12]
 8012056:	633b      	str	r3, [r7, #48]	@ 0x30

	configASSERT( pxQueue );
 8012058:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801205a:	2b00      	cmp	r3, #0
 801205c:	d10b      	bne.n	8012076 <xQueueReceiveFromISR+0x2e>
	__asm volatile
 801205e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012062:	f383 8811 	msr	BASEPRI, r3
 8012066:	f3bf 8f6f 	isb	sy
 801206a:	f3bf 8f4f 	dsb	sy
 801206e:	623b      	str	r3, [r7, #32]
}
 8012070:	bf00      	nop
 8012072:	bf00      	nop
 8012074:	e7fd      	b.n	8012072 <xQueueReceiveFromISR+0x2a>
	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 8012076:	68bb      	ldr	r3, [r7, #8]
 8012078:	2b00      	cmp	r3, #0
 801207a:	d103      	bne.n	8012084 <xQueueReceiveFromISR+0x3c>
 801207c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801207e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012080:	2b00      	cmp	r3, #0
 8012082:	d101      	bne.n	8012088 <xQueueReceiveFromISR+0x40>
 8012084:	2301      	movs	r3, #1
 8012086:	e000      	b.n	801208a <xQueueReceiveFromISR+0x42>
 8012088:	2300      	movs	r3, #0
 801208a:	2b00      	cmp	r3, #0
 801208c:	d10b      	bne.n	80120a6 <xQueueReceiveFromISR+0x5e>
	__asm volatile
 801208e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012092:	f383 8811 	msr	BASEPRI, r3
 8012096:	f3bf 8f6f 	isb	sy
 801209a:	f3bf 8f4f 	dsb	sy
 801209e:	61fb      	str	r3, [r7, #28]
}
 80120a0:	bf00      	nop
 80120a2:	bf00      	nop
 80120a4:	e7fd      	b.n	80120a2 <xQueueReceiveFromISR+0x5a>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 80120a6:	f002 fe27 	bl	8014cf8 <vPortValidateInterruptPriority>
	__asm volatile
 80120aa:	f3ef 8211 	mrs	r2, BASEPRI
 80120ae:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80120b2:	f383 8811 	msr	BASEPRI, r3
 80120b6:	f3bf 8f6f 	isb	sy
 80120ba:	f3bf 8f4f 	dsb	sy
 80120be:	61ba      	str	r2, [r7, #24]
 80120c0:	617b      	str	r3, [r7, #20]
	return ulOriginalBASEPRI;
 80120c2:	69bb      	ldr	r3, [r7, #24]

	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 80120c4:	62fb      	str	r3, [r7, #44]	@ 0x2c
	{
		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 80120c6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80120c8:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 80120ca:	62bb      	str	r3, [r7, #40]	@ 0x28

		/* Cannot block in an ISR, so check there is data available. */
		if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 80120cc:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80120ce:	2b00      	cmp	r3, #0
 80120d0:	d02f      	beq.n	8012132 <xQueueReceiveFromISR+0xea>
		{
			const int8_t cRxLock = pxQueue->cRxLock;
 80120d2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80120d4:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 80120d8:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27

			traceQUEUE_RECEIVE_FROM_ISR( pxQueue );

			prvCopyDataFromQueue( pxQueue, pvBuffer );
 80120dc:	68b9      	ldr	r1, [r7, #8]
 80120de:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80120e0:	f000 f918 	bl	8012314 <prvCopyDataFromQueue>
			pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 80120e4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80120e6:	1e5a      	subs	r2, r3, #1
 80120e8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80120ea:	639a      	str	r2, [r3, #56]	@ 0x38

			/* If the queue is locked the event list will not be modified.
			Instead update the lock count so the task that unlocks the queue
			will know that an ISR has removed data while the queue was
			locked. */
			if( cRxLock == queueUNLOCKED )
 80120ec:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 80120f0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80120f4:	d112      	bne.n	801211c <xQueueReceiveFromISR+0xd4>
			{
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 80120f6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80120f8:	691b      	ldr	r3, [r3, #16]
 80120fa:	2b00      	cmp	r3, #0
 80120fc:	d016      	beq.n	801212c <xQueueReceiveFromISR+0xe4>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 80120fe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012100:	3310      	adds	r3, #16
 8012102:	4618      	mov	r0, r3
 8012104:	f001 fa7e 	bl	8013604 <xTaskRemoveFromEventList>
 8012108:	4603      	mov	r3, r0
 801210a:	2b00      	cmp	r3, #0
 801210c:	d00e      	beq.n	801212c <xQueueReceiveFromISR+0xe4>
					{
						/* The task waiting has a higher priority than us so
						force a context switch. */
						if( pxHigherPriorityTaskWoken != NULL )
 801210e:	687b      	ldr	r3, [r7, #4]
 8012110:	2b00      	cmp	r3, #0
 8012112:	d00b      	beq.n	801212c <xQueueReceiveFromISR+0xe4>
						{
							*pxHigherPriorityTaskWoken = pdTRUE;
 8012114:	687b      	ldr	r3, [r7, #4]
 8012116:	2201      	movs	r2, #1
 8012118:	601a      	str	r2, [r3, #0]
 801211a:	e007      	b.n	801212c <xQueueReceiveFromISR+0xe4>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was removed while it was locked. */
				pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
 801211c:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8012120:	3301      	adds	r3, #1
 8012122:	b2db      	uxtb	r3, r3
 8012124:	b25a      	sxtb	r2, r3
 8012126:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012128:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
			}

			xReturn = pdPASS;
 801212c:	2301      	movs	r3, #1
 801212e:	637b      	str	r3, [r7, #52]	@ 0x34
 8012130:	e001      	b.n	8012136 <xQueueReceiveFromISR+0xee>
		}
		else
		{
			xReturn = pdFAIL;
 8012132:	2300      	movs	r3, #0
 8012134:	637b      	str	r3, [r7, #52]	@ 0x34
 8012136:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012138:	613b      	str	r3, [r7, #16]
	__asm volatile
 801213a:	693b      	ldr	r3, [r7, #16]
 801213c:	f383 8811 	msr	BASEPRI, r3
}
 8012140:	bf00      	nop
			traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 8012142:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 8012144:	4618      	mov	r0, r3
 8012146:	3738      	adds	r7, #56	@ 0x38
 8012148:	46bd      	mov	sp, r7
 801214a:	bd80      	pop	{r7, pc}

0801214c <uxQueueMessagesWaiting>:
	return xReturn;
}
/*-----------------------------------------------------------*/

UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue )
{
 801214c:	b580      	push	{r7, lr}
 801214e:	b084      	sub	sp, #16
 8012150:	af00      	add	r7, sp, #0
 8012152:	6078      	str	r0, [r7, #4]
UBaseType_t uxReturn;

	configASSERT( xQueue );
 8012154:	687b      	ldr	r3, [r7, #4]
 8012156:	2b00      	cmp	r3, #0
 8012158:	d10b      	bne.n	8012172 <uxQueueMessagesWaiting+0x26>
	__asm volatile
 801215a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801215e:	f383 8811 	msr	BASEPRI, r3
 8012162:	f3bf 8f6f 	isb	sy
 8012166:	f3bf 8f4f 	dsb	sy
 801216a:	60bb      	str	r3, [r7, #8]
}
 801216c:	bf00      	nop
 801216e:	bf00      	nop
 8012170:	e7fd      	b.n	801216e <uxQueueMessagesWaiting+0x22>

	taskENTER_CRITICAL();
 8012172:	f002 fce1 	bl	8014b38 <vPortEnterCritical>
	{
		uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
 8012176:	687b      	ldr	r3, [r7, #4]
 8012178:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 801217a:	60fb      	str	r3, [r7, #12]
	}
	taskEXIT_CRITICAL();
 801217c:	f002 fd0e 	bl	8014b9c <vPortExitCritical>

	return uxReturn;
 8012180:	68fb      	ldr	r3, [r7, #12]
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 8012182:	4618      	mov	r0, r3
 8012184:	3710      	adds	r7, #16
 8012186:	46bd      	mov	sp, r7
 8012188:	bd80      	pop	{r7, pc}

0801218a <uxQueueMessagesWaitingFromISR>:
	return uxReturn;
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
/*-----------------------------------------------------------*/

UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue )
{
 801218a:	b480      	push	{r7}
 801218c:	b087      	sub	sp, #28
 801218e:	af00      	add	r7, sp, #0
 8012190:	6078      	str	r0, [r7, #4]
UBaseType_t uxReturn;
Queue_t * const pxQueue = xQueue;
 8012192:	687b      	ldr	r3, [r7, #4]
 8012194:	617b      	str	r3, [r7, #20]

	configASSERT( pxQueue );
 8012196:	697b      	ldr	r3, [r7, #20]
 8012198:	2b00      	cmp	r3, #0
 801219a:	d10b      	bne.n	80121b4 <uxQueueMessagesWaitingFromISR+0x2a>
	__asm volatile
 801219c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80121a0:	f383 8811 	msr	BASEPRI, r3
 80121a4:	f3bf 8f6f 	isb	sy
 80121a8:	f3bf 8f4f 	dsb	sy
 80121ac:	60fb      	str	r3, [r7, #12]
}
 80121ae:	bf00      	nop
 80121b0:	bf00      	nop
 80121b2:	e7fd      	b.n	80121b0 <uxQueueMessagesWaitingFromISR+0x26>
	uxReturn = pxQueue->uxMessagesWaiting;
 80121b4:	697b      	ldr	r3, [r7, #20]
 80121b6:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 80121b8:	613b      	str	r3, [r7, #16]

	return uxReturn;
 80121ba:	693b      	ldr	r3, [r7, #16]
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 80121bc:	4618      	mov	r0, r3
 80121be:	371c      	adds	r7, #28
 80121c0:	46bd      	mov	sp, r7
 80121c2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80121c6:	4770      	bx	lr

080121c8 <vQueueDelete>:
/*-----------------------------------------------------------*/

void vQueueDelete( QueueHandle_t xQueue )
{
 80121c8:	b580      	push	{r7, lr}
 80121ca:	b084      	sub	sp, #16
 80121cc:	af00      	add	r7, sp, #0
 80121ce:	6078      	str	r0, [r7, #4]
Queue_t * const pxQueue = xQueue;
 80121d0:	687b      	ldr	r3, [r7, #4]
 80121d2:	60fb      	str	r3, [r7, #12]

	configASSERT( pxQueue );
 80121d4:	68fb      	ldr	r3, [r7, #12]
 80121d6:	2b00      	cmp	r3, #0
 80121d8:	d10b      	bne.n	80121f2 <vQueueDelete+0x2a>
	__asm volatile
 80121da:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80121de:	f383 8811 	msr	BASEPRI, r3
 80121e2:	f3bf 8f6f 	isb	sy
 80121e6:	f3bf 8f4f 	dsb	sy
 80121ea:	60bb      	str	r3, [r7, #8]
}
 80121ec:	bf00      	nop
 80121ee:	bf00      	nop
 80121f0:	e7fd      	b.n	80121ee <vQueueDelete+0x26>
	traceQUEUE_DELETE( pxQueue );

	#if ( configQUEUE_REGISTRY_SIZE > 0 )
	{
		vQueueUnregisterQueue( pxQueue );
 80121f2:	68f8      	ldr	r0, [r7, #12]
 80121f4:	f000 f95e 	bl	80124b4 <vQueueUnregisterQueue>
	}
	#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
	{
		/* The queue could have been allocated statically or dynamically, so
		check before attempting to free the memory. */
		if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
 80121f8:	68fb      	ldr	r3, [r7, #12]
 80121fa:	f893 3046 	ldrb.w	r3, [r3, #70]	@ 0x46
 80121fe:	2b00      	cmp	r3, #0
 8012200:	d102      	bne.n	8012208 <vQueueDelete+0x40>
		{
			vPortFree( pxQueue );
 8012202:	68f8      	ldr	r0, [r7, #12]
 8012204:	f002 fe88 	bl	8014f18 <vPortFree>
		/* The queue must have been statically allocated, so is not going to be
		deleted.  Avoid compiler warnings about the unused parameter. */
		( void ) pxQueue;
	}
	#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
}
 8012208:	bf00      	nop
 801220a:	3710      	adds	r7, #16
 801220c:	46bd      	mov	sp, r7
 801220e:	bd80      	pop	{r7, pc}

08012210 <prvGetDisinheritPriorityAfterTimeout>:
/*-----------------------------------------------------------*/

#if( configUSE_MUTEXES == 1 )

	static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue )
	{
 8012210:	b480      	push	{r7}
 8012212:	b085      	sub	sp, #20
 8012214:	af00      	add	r7, sp, #0
 8012216:	6078      	str	r0, [r7, #4]
		priority, but the waiting task times out, then the holder should
		disinherit the priority - but only down to the highest priority of any
		other tasks that are waiting for the same mutex.  For this purpose,
		return the priority of the highest priority task that is waiting for the
		mutex. */
		if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U )
 8012218:	687b      	ldr	r3, [r7, #4]
 801221a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801221c:	2b00      	cmp	r3, #0
 801221e:	d006      	beq.n	801222e <prvGetDisinheritPriorityAfterTimeout+0x1e>
		{
			uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) );
 8012220:	687b      	ldr	r3, [r7, #4]
 8012222:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8012224:	681b      	ldr	r3, [r3, #0]
 8012226:	f1c3 0338 	rsb	r3, r3, #56	@ 0x38
 801222a:	60fb      	str	r3, [r7, #12]
 801222c:	e001      	b.n	8012232 <prvGetDisinheritPriorityAfterTimeout+0x22>
		}
		else
		{
			uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY;
 801222e:	2300      	movs	r3, #0
 8012230:	60fb      	str	r3, [r7, #12]
		}

		return uxHighestPriorityOfWaitingTasks;
 8012232:	68fb      	ldr	r3, [r7, #12]
	}
 8012234:	4618      	mov	r0, r3
 8012236:	3714      	adds	r7, #20
 8012238:	46bd      	mov	sp, r7
 801223a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801223e:	4770      	bx	lr

08012240 <prvCopyDataToQueue>:

#endif /* configUSE_MUTEXES */
/*-----------------------------------------------------------*/

static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
{
 8012240:	b580      	push	{r7, lr}
 8012242:	b086      	sub	sp, #24
 8012244:	af00      	add	r7, sp, #0
 8012246:	60f8      	str	r0, [r7, #12]
 8012248:	60b9      	str	r1, [r7, #8]
 801224a:	607a      	str	r2, [r7, #4]
BaseType_t xReturn = pdFALSE;
 801224c:	2300      	movs	r3, #0
 801224e:	617b      	str	r3, [r7, #20]
UBaseType_t uxMessagesWaiting;

	/* This function is called from a critical section. */

	uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 8012250:	68fb      	ldr	r3, [r7, #12]
 8012252:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012254:	613b      	str	r3, [r7, #16]

	if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
 8012256:	68fb      	ldr	r3, [r7, #12]
 8012258:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 801225a:	2b00      	cmp	r3, #0
 801225c:	d10d      	bne.n	801227a <prvCopyDataToQueue+0x3a>
	{
		#if ( configUSE_MUTEXES == 1 )
		{
			if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 801225e:	68fb      	ldr	r3, [r7, #12]
 8012260:	681b      	ldr	r3, [r3, #0]
 8012262:	2b00      	cmp	r3, #0
 8012264:	d14d      	bne.n	8012302 <prvCopyDataToQueue+0xc2>
			{
				/* The mutex is no longer being held. */
				xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder );
 8012266:	68fb      	ldr	r3, [r7, #12]
 8012268:	689b      	ldr	r3, [r3, #8]
 801226a:	4618      	mov	r0, r3
 801226c:	f001 fc4e 	bl	8013b0c <xTaskPriorityDisinherit>
 8012270:	6178      	str	r0, [r7, #20]
				pxQueue->u.xSemaphore.xMutexHolder = NULL;
 8012272:	68fb      	ldr	r3, [r7, #12]
 8012274:	2200      	movs	r2, #0
 8012276:	609a      	str	r2, [r3, #8]
 8012278:	e043      	b.n	8012302 <prvCopyDataToQueue+0xc2>
				mtCOVERAGE_TEST_MARKER();
			}
		}
		#endif /* configUSE_MUTEXES */
	}
	else if( xPosition == queueSEND_TO_BACK )
 801227a:	687b      	ldr	r3, [r7, #4]
 801227c:	2b00      	cmp	r3, #0
 801227e:	d119      	bne.n	80122b4 <prvCopyDataToQueue+0x74>
	{
		( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
 8012280:	68fb      	ldr	r3, [r7, #12]
 8012282:	6858      	ldr	r0, [r3, #4]
 8012284:	68fb      	ldr	r3, [r7, #12]
 8012286:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012288:	461a      	mov	r2, r3
 801228a:	68b9      	ldr	r1, [r7, #8]
 801228c:	f017 fe2f 	bl	8029eee <memcpy>
		pxQueue->pcWriteTo += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
 8012290:	68fb      	ldr	r3, [r7, #12]
 8012292:	685a      	ldr	r2, [r3, #4]
 8012294:	68fb      	ldr	r3, [r7, #12]
 8012296:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012298:	441a      	add	r2, r3
 801229a:	68fb      	ldr	r3, [r7, #12]
 801229c:	605a      	str	r2, [r3, #4]
		if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
 801229e:	68fb      	ldr	r3, [r7, #12]
 80122a0:	685a      	ldr	r2, [r3, #4]
 80122a2:	68fb      	ldr	r3, [r7, #12]
 80122a4:	689b      	ldr	r3, [r3, #8]
 80122a6:	429a      	cmp	r2, r3
 80122a8:	d32b      	bcc.n	8012302 <prvCopyDataToQueue+0xc2>
		{
			pxQueue->pcWriteTo = pxQueue->pcHead;
 80122aa:	68fb      	ldr	r3, [r7, #12]
 80122ac:	681a      	ldr	r2, [r3, #0]
 80122ae:	68fb      	ldr	r3, [r7, #12]
 80122b0:	605a      	str	r2, [r3, #4]
 80122b2:	e026      	b.n	8012302 <prvCopyDataToQueue+0xc2>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes.  Assert checks null pointer only used when length is 0. */
 80122b4:	68fb      	ldr	r3, [r7, #12]
 80122b6:	68d8      	ldr	r0, [r3, #12]
 80122b8:	68fb      	ldr	r3, [r7, #12]
 80122ba:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80122bc:	461a      	mov	r2, r3
 80122be:	68b9      	ldr	r1, [r7, #8]
 80122c0:	f017 fe15 	bl	8029eee <memcpy>
		pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize;
 80122c4:	68fb      	ldr	r3, [r7, #12]
 80122c6:	68da      	ldr	r2, [r3, #12]
 80122c8:	68fb      	ldr	r3, [r7, #12]
 80122ca:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80122cc:	425b      	negs	r3, r3
 80122ce:	441a      	add	r2, r3
 80122d0:	68fb      	ldr	r3, [r7, #12]
 80122d2:	60da      	str	r2, [r3, #12]
		if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
 80122d4:	68fb      	ldr	r3, [r7, #12]
 80122d6:	68da      	ldr	r2, [r3, #12]
 80122d8:	68fb      	ldr	r3, [r7, #12]
 80122da:	681b      	ldr	r3, [r3, #0]
 80122dc:	429a      	cmp	r2, r3
 80122de:	d207      	bcs.n	80122f0 <prvCopyDataToQueue+0xb0>
		{
			pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize );
 80122e0:	68fb      	ldr	r3, [r7, #12]
 80122e2:	689a      	ldr	r2, [r3, #8]
 80122e4:	68fb      	ldr	r3, [r7, #12]
 80122e6:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80122e8:	425b      	negs	r3, r3
 80122ea:	441a      	add	r2, r3
 80122ec:	68fb      	ldr	r3, [r7, #12]
 80122ee:	60da      	str	r2, [r3, #12]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		if( xPosition == queueOVERWRITE )
 80122f0:	687b      	ldr	r3, [r7, #4]
 80122f2:	2b02      	cmp	r3, #2
 80122f4:	d105      	bne.n	8012302 <prvCopyDataToQueue+0xc2>
		{
			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 80122f6:	693b      	ldr	r3, [r7, #16]
 80122f8:	2b00      	cmp	r3, #0
 80122fa:	d002      	beq.n	8012302 <prvCopyDataToQueue+0xc2>
			{
				/* An item is not being added but overwritten, so subtract
				one from the recorded number of items in the queue so when
				one is added again below the number of recorded items remains
				correct. */
				--uxMessagesWaiting;
 80122fc:	693b      	ldr	r3, [r7, #16]
 80122fe:	3b01      	subs	r3, #1
 8012300:	613b      	str	r3, [r7, #16]
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}

	pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
 8012302:	693b      	ldr	r3, [r7, #16]
 8012304:	1c5a      	adds	r2, r3, #1
 8012306:	68fb      	ldr	r3, [r7, #12]
 8012308:	639a      	str	r2, [r3, #56]	@ 0x38

	return xReturn;
 801230a:	697b      	ldr	r3, [r7, #20]
}
 801230c:	4618      	mov	r0, r3
 801230e:	3718      	adds	r7, #24
 8012310:	46bd      	mov	sp, r7
 8012312:	bd80      	pop	{r7, pc}

08012314 <prvCopyDataFromQueue>:
/*-----------------------------------------------------------*/

static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )
{
 8012314:	b580      	push	{r7, lr}
 8012316:	b082      	sub	sp, #8
 8012318:	af00      	add	r7, sp, #0
 801231a:	6078      	str	r0, [r7, #4]
 801231c:	6039      	str	r1, [r7, #0]
	if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
 801231e:	687b      	ldr	r3, [r7, #4]
 8012320:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012322:	2b00      	cmp	r3, #0
 8012324:	d018      	beq.n	8012358 <prvCopyDataFromQueue+0x44>
	{
		pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
 8012326:	687b      	ldr	r3, [r7, #4]
 8012328:	68da      	ldr	r2, [r3, #12]
 801232a:	687b      	ldr	r3, [r7, #4]
 801232c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 801232e:	441a      	add	r2, r3
 8012330:	687b      	ldr	r3, [r7, #4]
 8012332:	60da      	str	r2, [r3, #12]
		if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
 8012334:	687b      	ldr	r3, [r7, #4]
 8012336:	68da      	ldr	r2, [r3, #12]
 8012338:	687b      	ldr	r3, [r7, #4]
 801233a:	689b      	ldr	r3, [r3, #8]
 801233c:	429a      	cmp	r2, r3
 801233e:	d303      	bcc.n	8012348 <prvCopyDataFromQueue+0x34>
		{
			pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
 8012340:	687b      	ldr	r3, [r7, #4]
 8012342:	681a      	ldr	r2, [r3, #0]
 8012344:	687b      	ldr	r3, [r7, #4]
 8012346:	60da      	str	r2, [r3, #12]
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
		( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports.  Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
 8012348:	687b      	ldr	r3, [r7, #4]
 801234a:	68d9      	ldr	r1, [r3, #12]
 801234c:	687b      	ldr	r3, [r7, #4]
 801234e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012350:	461a      	mov	r2, r3
 8012352:	6838      	ldr	r0, [r7, #0]
 8012354:	f017 fdcb 	bl	8029eee <memcpy>
	}
}
 8012358:	bf00      	nop
 801235a:	3708      	adds	r7, #8
 801235c:	46bd      	mov	sp, r7
 801235e:	bd80      	pop	{r7, pc}

08012360 <prvUnlockQueue>:
/*-----------------------------------------------------------*/

static void prvUnlockQueue( Queue_t * const pxQueue )
{
 8012360:	b580      	push	{r7, lr}
 8012362:	b084      	sub	sp, #16
 8012364:	af00      	add	r7, sp, #0
 8012366:	6078      	str	r0, [r7, #4]

	/* The lock counts contains the number of extra data items placed or
	removed from the queue while the queue was locked.  When a queue is
	locked items can be added or removed, but the event lists cannot be
	updated. */
	taskENTER_CRITICAL();
 8012368:	f002 fbe6 	bl	8014b38 <vPortEnterCritical>
	{
		int8_t cTxLock = pxQueue->cTxLock;
 801236c:	687b      	ldr	r3, [r7, #4]
 801236e:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8012372:	73fb      	strb	r3, [r7, #15]

		/* See if data was added to the queue while it was locked. */
		while( cTxLock > queueLOCKED_UNMODIFIED )
 8012374:	e011      	b.n	801239a <prvUnlockQueue+0x3a>
			}
			#else /* configUSE_QUEUE_SETS */
			{
				/* Tasks that are removed from the event list will get added to
				the pending ready list as the scheduler is still suspended. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 8012376:	687b      	ldr	r3, [r7, #4]
 8012378:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801237a:	2b00      	cmp	r3, #0
 801237c:	d012      	beq.n	80123a4 <prvUnlockQueue+0x44>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 801237e:	687b      	ldr	r3, [r7, #4]
 8012380:	3324      	adds	r3, #36	@ 0x24
 8012382:	4618      	mov	r0, r3
 8012384:	f001 f93e 	bl	8013604 <xTaskRemoveFromEventList>
 8012388:	4603      	mov	r3, r0
 801238a:	2b00      	cmp	r3, #0
 801238c:	d001      	beq.n	8012392 <prvUnlockQueue+0x32>
					{
						/* The task waiting has a higher priority so record that
						a context switch is required. */
						vTaskMissedYield();
 801238e:	f001 fa3f 	bl	8013810 <vTaskMissedYield>
					break;
				}
			}
			#endif /* configUSE_QUEUE_SETS */

			--cTxLock;
 8012392:	7bfb      	ldrb	r3, [r7, #15]
 8012394:	3b01      	subs	r3, #1
 8012396:	b2db      	uxtb	r3, r3
 8012398:	73fb      	strb	r3, [r7, #15]
		while( cTxLock > queueLOCKED_UNMODIFIED )
 801239a:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801239e:	2b00      	cmp	r3, #0
 80123a0:	dce9      	bgt.n	8012376 <prvUnlockQueue+0x16>
 80123a2:	e000      	b.n	80123a6 <prvUnlockQueue+0x46>
					break;
 80123a4:	bf00      	nop
		}

		pxQueue->cTxLock = queueUNLOCKED;
 80123a6:	687b      	ldr	r3, [r7, #4]
 80123a8:	22ff      	movs	r2, #255	@ 0xff
 80123aa:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
	}
	taskEXIT_CRITICAL();
 80123ae:	f002 fbf5 	bl	8014b9c <vPortExitCritical>

	/* Do the same for the Rx lock. */
	taskENTER_CRITICAL();
 80123b2:	f002 fbc1 	bl	8014b38 <vPortEnterCritical>
	{
		int8_t cRxLock = pxQueue->cRxLock;
 80123b6:	687b      	ldr	r3, [r7, #4]
 80123b8:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 80123bc:	73bb      	strb	r3, [r7, #14]

		while( cRxLock > queueLOCKED_UNMODIFIED )
 80123be:	e011      	b.n	80123e4 <prvUnlockQueue+0x84>
		{
			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 80123c0:	687b      	ldr	r3, [r7, #4]
 80123c2:	691b      	ldr	r3, [r3, #16]
 80123c4:	2b00      	cmp	r3, #0
 80123c6:	d012      	beq.n	80123ee <prvUnlockQueue+0x8e>
			{
				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 80123c8:	687b      	ldr	r3, [r7, #4]
 80123ca:	3310      	adds	r3, #16
 80123cc:	4618      	mov	r0, r3
 80123ce:	f001 f919 	bl	8013604 <xTaskRemoveFromEventList>
 80123d2:	4603      	mov	r3, r0
 80123d4:	2b00      	cmp	r3, #0
 80123d6:	d001      	beq.n	80123dc <prvUnlockQueue+0x7c>
				{
					vTaskMissedYield();
 80123d8:	f001 fa1a 	bl	8013810 <vTaskMissedYield>
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				--cRxLock;
 80123dc:	7bbb      	ldrb	r3, [r7, #14]
 80123de:	3b01      	subs	r3, #1
 80123e0:	b2db      	uxtb	r3, r3
 80123e2:	73bb      	strb	r3, [r7, #14]
		while( cRxLock > queueLOCKED_UNMODIFIED )
 80123e4:	f997 300e 	ldrsb.w	r3, [r7, #14]
 80123e8:	2b00      	cmp	r3, #0
 80123ea:	dce9      	bgt.n	80123c0 <prvUnlockQueue+0x60>
 80123ec:	e000      	b.n	80123f0 <prvUnlockQueue+0x90>
			}
			else
			{
				break;
 80123ee:	bf00      	nop
			}
		}

		pxQueue->cRxLock = queueUNLOCKED;
 80123f0:	687b      	ldr	r3, [r7, #4]
 80123f2:	22ff      	movs	r2, #255	@ 0xff
 80123f4:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
	}
	taskEXIT_CRITICAL();
 80123f8:	f002 fbd0 	bl	8014b9c <vPortExitCritical>
}
 80123fc:	bf00      	nop
 80123fe:	3710      	adds	r7, #16
 8012400:	46bd      	mov	sp, r7
 8012402:	bd80      	pop	{r7, pc}

08012404 <prvIsQueueEmpty>:
/*-----------------------------------------------------------*/

static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )
{
 8012404:	b580      	push	{r7, lr}
 8012406:	b084      	sub	sp, #16
 8012408:	af00      	add	r7, sp, #0
 801240a:	6078      	str	r0, [r7, #4]
BaseType_t xReturn;

	taskENTER_CRITICAL();
 801240c:	f002 fb94 	bl	8014b38 <vPortEnterCritical>
	{
		if( pxQueue->uxMessagesWaiting == ( UBaseType_t )  0 )
 8012410:	687b      	ldr	r3, [r7, #4]
 8012412:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012414:	2b00      	cmp	r3, #0
 8012416:	d102      	bne.n	801241e <prvIsQueueEmpty+0x1a>
		{
			xReturn = pdTRUE;
 8012418:	2301      	movs	r3, #1
 801241a:	60fb      	str	r3, [r7, #12]
 801241c:	e001      	b.n	8012422 <prvIsQueueEmpty+0x1e>
		}
		else
		{
			xReturn = pdFALSE;
 801241e:	2300      	movs	r3, #0
 8012420:	60fb      	str	r3, [r7, #12]
		}
	}
	taskEXIT_CRITICAL();
 8012422:	f002 fbbb 	bl	8014b9c <vPortExitCritical>

	return xReturn;
 8012426:	68fb      	ldr	r3, [r7, #12]
}
 8012428:	4618      	mov	r0, r3
 801242a:	3710      	adds	r7, #16
 801242c:	46bd      	mov	sp, r7
 801242e:	bd80      	pop	{r7, pc}

08012430 <prvIsQueueFull>:
	return xReturn;
} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
/*-----------------------------------------------------------*/

static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
{
 8012430:	b580      	push	{r7, lr}
 8012432:	b084      	sub	sp, #16
 8012434:	af00      	add	r7, sp, #0
 8012436:	6078      	str	r0, [r7, #4]
BaseType_t xReturn;

	taskENTER_CRITICAL();
 8012438:	f002 fb7e 	bl	8014b38 <vPortEnterCritical>
	{
		if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
 801243c:	687b      	ldr	r3, [r7, #4]
 801243e:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 8012440:	687b      	ldr	r3, [r7, #4]
 8012442:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8012444:	429a      	cmp	r2, r3
 8012446:	d102      	bne.n	801244e <prvIsQueueFull+0x1e>
		{
			xReturn = pdTRUE;
 8012448:	2301      	movs	r3, #1
 801244a:	60fb      	str	r3, [r7, #12]
 801244c:	e001      	b.n	8012452 <prvIsQueueFull+0x22>
		}
		else
		{
			xReturn = pdFALSE;
 801244e:	2300      	movs	r3, #0
 8012450:	60fb      	str	r3, [r7, #12]
		}
	}
	taskEXIT_CRITICAL();
 8012452:	f002 fba3 	bl	8014b9c <vPortExitCritical>

	return xReturn;
 8012456:	68fb      	ldr	r3, [r7, #12]
}
 8012458:	4618      	mov	r0, r3
 801245a:	3710      	adds	r7, #16
 801245c:	46bd      	mov	sp, r7
 801245e:	bd80      	pop	{r7, pc}

08012460 <vQueueAddToRegistry>:
/*-----------------------------------------------------------*/

#if ( configQUEUE_REGISTRY_SIZE > 0 )

	void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
	{
 8012460:	b480      	push	{r7}
 8012462:	b085      	sub	sp, #20
 8012464:	af00      	add	r7, sp, #0
 8012466:	6078      	str	r0, [r7, #4]
 8012468:	6039      	str	r1, [r7, #0]
	UBaseType_t ux;

		/* See if there is an empty space in the registry.  A NULL name denotes
		a free slot. */
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 801246a:	2300      	movs	r3, #0
 801246c:	60fb      	str	r3, [r7, #12]
 801246e:	e014      	b.n	801249a <vQueueAddToRegistry+0x3a>
		{
			if( xQueueRegistry[ ux ].pcQueueName == NULL )
 8012470:	4a0f      	ldr	r2, [pc, #60]	@ (80124b0 <vQueueAddToRegistry+0x50>)
 8012472:	68fb      	ldr	r3, [r7, #12]
 8012474:	f852 3033 	ldr.w	r3, [r2, r3, lsl #3]
 8012478:	2b00      	cmp	r3, #0
 801247a:	d10b      	bne.n	8012494 <vQueueAddToRegistry+0x34>
			{
				/* Store the information on this queue. */
				xQueueRegistry[ ux ].pcQueueName = pcQueueName;
 801247c:	490c      	ldr	r1, [pc, #48]	@ (80124b0 <vQueueAddToRegistry+0x50>)
 801247e:	68fb      	ldr	r3, [r7, #12]
 8012480:	683a      	ldr	r2, [r7, #0]
 8012482:	f841 2033 	str.w	r2, [r1, r3, lsl #3]
				xQueueRegistry[ ux ].xHandle = xQueue;
 8012486:	4a0a      	ldr	r2, [pc, #40]	@ (80124b0 <vQueueAddToRegistry+0x50>)
 8012488:	68fb      	ldr	r3, [r7, #12]
 801248a:	00db      	lsls	r3, r3, #3
 801248c:	4413      	add	r3, r2
 801248e:	687a      	ldr	r2, [r7, #4]
 8012490:	605a      	str	r2, [r3, #4]

				traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName );
				break;
 8012492:	e006      	b.n	80124a2 <vQueueAddToRegistry+0x42>
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8012494:	68fb      	ldr	r3, [r7, #12]
 8012496:	3301      	adds	r3, #1
 8012498:	60fb      	str	r3, [r7, #12]
 801249a:	68fb      	ldr	r3, [r7, #12]
 801249c:	2b07      	cmp	r3, #7
 801249e:	d9e7      	bls.n	8012470 <vQueueAddToRegistry+0x10>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	}
 80124a0:	bf00      	nop
 80124a2:	bf00      	nop
 80124a4:	3714      	adds	r7, #20
 80124a6:	46bd      	mov	sp, r7
 80124a8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80124ac:	4770      	bx	lr
 80124ae:	bf00      	nop
 80124b0:	24003c50 	.word	0x24003c50

080124b4 <vQueueUnregisterQueue>:
/*-----------------------------------------------------------*/

#if ( configQUEUE_REGISTRY_SIZE > 0 )

	void vQueueUnregisterQueue( QueueHandle_t xQueue )
	{
 80124b4:	b480      	push	{r7}
 80124b6:	b085      	sub	sp, #20
 80124b8:	af00      	add	r7, sp, #0
 80124ba:	6078      	str	r0, [r7, #4]
	UBaseType_t ux;

		/* See if the handle of the queue being unregistered in actually in the
		registry. */
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 80124bc:	2300      	movs	r3, #0
 80124be:	60fb      	str	r3, [r7, #12]
 80124c0:	e016      	b.n	80124f0 <vQueueUnregisterQueue+0x3c>
		{
			if( xQueueRegistry[ ux ].xHandle == xQueue )
 80124c2:	4a10      	ldr	r2, [pc, #64]	@ (8012504 <vQueueUnregisterQueue+0x50>)
 80124c4:	68fb      	ldr	r3, [r7, #12]
 80124c6:	00db      	lsls	r3, r3, #3
 80124c8:	4413      	add	r3, r2
 80124ca:	685b      	ldr	r3, [r3, #4]
 80124cc:	687a      	ldr	r2, [r7, #4]
 80124ce:	429a      	cmp	r2, r3
 80124d0:	d10b      	bne.n	80124ea <vQueueUnregisterQueue+0x36>
			{
				/* Set the name to NULL to show that this slot if free again. */
				xQueueRegistry[ ux ].pcQueueName = NULL;
 80124d2:	4a0c      	ldr	r2, [pc, #48]	@ (8012504 <vQueueUnregisterQueue+0x50>)
 80124d4:	68fb      	ldr	r3, [r7, #12]
 80124d6:	2100      	movs	r1, #0
 80124d8:	f842 1033 	str.w	r1, [r2, r3, lsl #3]

				/* Set the handle to NULL to ensure the same queue handle cannot
				appear in the registry twice if it is added, removed, then
				added again. */
				xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0;
 80124dc:	4a09      	ldr	r2, [pc, #36]	@ (8012504 <vQueueUnregisterQueue+0x50>)
 80124de:	68fb      	ldr	r3, [r7, #12]
 80124e0:	00db      	lsls	r3, r3, #3
 80124e2:	4413      	add	r3, r2
 80124e4:	2200      	movs	r2, #0
 80124e6:	605a      	str	r2, [r3, #4]
				break;
 80124e8:	e006      	b.n	80124f8 <vQueueUnregisterQueue+0x44>
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 80124ea:	68fb      	ldr	r3, [r7, #12]
 80124ec:	3301      	adds	r3, #1
 80124ee:	60fb      	str	r3, [r7, #12]
 80124f0:	68fb      	ldr	r3, [r7, #12]
 80124f2:	2b07      	cmp	r3, #7
 80124f4:	d9e5      	bls.n	80124c2 <vQueueUnregisterQueue+0xe>
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}

	} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
 80124f6:	bf00      	nop
 80124f8:	bf00      	nop
 80124fa:	3714      	adds	r7, #20
 80124fc:	46bd      	mov	sp, r7
 80124fe:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012502:	4770      	bx	lr
 8012504:	24003c50 	.word	0x24003c50

08012508 <vQueueWaitForMessageRestricted>:
/*-----------------------------------------------------------*/

#if ( configUSE_TIMERS == 1 )

	void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
	{
 8012508:	b580      	push	{r7, lr}
 801250a:	b086      	sub	sp, #24
 801250c:	af00      	add	r7, sp, #0
 801250e:	60f8      	str	r0, [r7, #12]
 8012510:	60b9      	str	r1, [r7, #8]
 8012512:	607a      	str	r2, [r7, #4]
	Queue_t * const pxQueue = xQueue;
 8012514:	68fb      	ldr	r3, [r7, #12]
 8012516:	617b      	str	r3, [r7, #20]
		will not actually cause the task to block, just place it on a blocked
		list.  It will not block until the scheduler is unlocked - at which
		time a yield will be performed.  If an item is added to the queue while
		the queue is locked, and the calling task blocks on the queue, then the
		calling task will be immediately unblocked when the queue is unlocked. */
		prvLockQueue( pxQueue );
 8012518:	f002 fb0e 	bl	8014b38 <vPortEnterCritical>
 801251c:	697b      	ldr	r3, [r7, #20]
 801251e:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8012522:	b25b      	sxtb	r3, r3
 8012524:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012528:	d103      	bne.n	8012532 <vQueueWaitForMessageRestricted+0x2a>
 801252a:	697b      	ldr	r3, [r7, #20]
 801252c:	2200      	movs	r2, #0
 801252e:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 8012532:	697b      	ldr	r3, [r7, #20]
 8012534:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8012538:	b25b      	sxtb	r3, r3
 801253a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801253e:	d103      	bne.n	8012548 <vQueueWaitForMessageRestricted+0x40>
 8012540:	697b      	ldr	r3, [r7, #20]
 8012542:	2200      	movs	r2, #0
 8012544:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 8012548:	f002 fb28 	bl	8014b9c <vPortExitCritical>
		if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
 801254c:	697b      	ldr	r3, [r7, #20]
 801254e:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012550:	2b00      	cmp	r3, #0
 8012552:	d106      	bne.n	8012562 <vQueueWaitForMessageRestricted+0x5a>
		{
			/* There is nothing in the queue, block for the specified period. */
			vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
 8012554:	697b      	ldr	r3, [r7, #20]
 8012556:	3324      	adds	r3, #36	@ 0x24
 8012558:	687a      	ldr	r2, [r7, #4]
 801255a:	68b9      	ldr	r1, [r7, #8]
 801255c:	4618      	mov	r0, r3
 801255e:	f001 f825 	bl	80135ac <vTaskPlaceOnEventListRestricted>
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
		prvUnlockQueue( pxQueue );
 8012562:	6978      	ldr	r0, [r7, #20]
 8012564:	f7ff fefc 	bl	8012360 <prvUnlockQueue>
	}
 8012568:	bf00      	nop
 801256a:	3718      	adds	r7, #24
 801256c:	46bd      	mov	sp, r7
 801256e:	bd80      	pop	{r7, pc}

08012570 <xStreamBufferGenericCreate>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )

	StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer )
	{
 8012570:	b580      	push	{r7, lr}
 8012572:	b08c      	sub	sp, #48	@ 0x30
 8012574:	af02      	add	r7, sp, #8
 8012576:	60f8      	str	r0, [r7, #12]
 8012578:	60b9      	str	r1, [r7, #8]
 801257a:	607a      	str	r2, [r7, #4]

		/* In case the stream buffer is going to be used as a message buffer
		(that is, it will hold discrete messages with a little meta data that
		says how big the next message is) check the buffer will be large enough
		to hold at least one message. */
		if( xIsMessageBuffer == pdTRUE )
 801257c:	687b      	ldr	r3, [r7, #4]
 801257e:	2b01      	cmp	r3, #1
 8012580:	d111      	bne.n	80125a6 <xStreamBufferGenericCreate+0x36>
		{
			/* Is a message buffer but not statically allocated. */
			ucFlags = sbFLAGS_IS_MESSAGE_BUFFER;
 8012582:	2301      	movs	r3, #1
 8012584:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH );
 8012588:	68fb      	ldr	r3, [r7, #12]
 801258a:	2b04      	cmp	r3, #4
 801258c:	d81d      	bhi.n	80125ca <xStreamBufferGenericCreate+0x5a>
	__asm volatile
 801258e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012592:	f383 8811 	msr	BASEPRI, r3
 8012596:	f3bf 8f6f 	isb	sy
 801259a:	f3bf 8f4f 	dsb	sy
 801259e:	61fb      	str	r3, [r7, #28]
}
 80125a0:	bf00      	nop
 80125a2:	bf00      	nop
 80125a4:	e7fd      	b.n	80125a2 <xStreamBufferGenericCreate+0x32>
		}
		else
		{
			/* Not a message buffer and not statically allocated. */
			ucFlags = 0;
 80125a6:	2300      	movs	r3, #0
 80125a8:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			configASSERT( xBufferSizeBytes > 0 );
 80125ac:	68fb      	ldr	r3, [r7, #12]
 80125ae:	2b00      	cmp	r3, #0
 80125b0:	d10b      	bne.n	80125ca <xStreamBufferGenericCreate+0x5a>
	__asm volatile
 80125b2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80125b6:	f383 8811 	msr	BASEPRI, r3
 80125ba:	f3bf 8f6f 	isb	sy
 80125be:	f3bf 8f4f 	dsb	sy
 80125c2:	61bb      	str	r3, [r7, #24]
}
 80125c4:	bf00      	nop
 80125c6:	bf00      	nop
 80125c8:	e7fd      	b.n	80125c6 <xStreamBufferGenericCreate+0x56>
		}
		configASSERT( xTriggerLevelBytes <= xBufferSizeBytes );
 80125ca:	68ba      	ldr	r2, [r7, #8]
 80125cc:	68fb      	ldr	r3, [r7, #12]
 80125ce:	429a      	cmp	r2, r3
 80125d0:	d90b      	bls.n	80125ea <xStreamBufferGenericCreate+0x7a>
	__asm volatile
 80125d2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80125d6:	f383 8811 	msr	BASEPRI, r3
 80125da:	f3bf 8f6f 	isb	sy
 80125de:	f3bf 8f4f 	dsb	sy
 80125e2:	617b      	str	r3, [r7, #20]
}
 80125e4:	bf00      	nop
 80125e6:	bf00      	nop
 80125e8:	e7fd      	b.n	80125e6 <xStreamBufferGenericCreate+0x76>

		/* A trigger level of 0 would cause a waiting task to unblock even when
		the buffer was empty. */
		if( xTriggerLevelBytes == ( size_t ) 0 )
 80125ea:	68bb      	ldr	r3, [r7, #8]
 80125ec:	2b00      	cmp	r3, #0
 80125ee:	d101      	bne.n	80125f4 <xStreamBufferGenericCreate+0x84>
		{
			xTriggerLevelBytes = ( size_t ) 1;
 80125f0:	2301      	movs	r3, #1
 80125f2:	60bb      	str	r3, [r7, #8]
		and the buffer follows immediately after.  The requested size is
		incremented so the free space is returned as the user would expect -
		this is a quirk of the implementation that means otherwise the free
		space would be reported as one byte smaller than would be logically
		expected. */
		xBufferSizeBytes++;
 80125f4:	68fb      	ldr	r3, [r7, #12]
 80125f6:	3301      	adds	r3, #1
 80125f8:	60fb      	str	r3, [r7, #12]
		pucAllocatedMemory = ( uint8_t * ) pvPortMalloc( xBufferSizeBytes + sizeof( StreamBuffer_t ) ); /*lint !e9079 malloc() only returns void*. */
 80125fa:	68fb      	ldr	r3, [r7, #12]
 80125fc:	3324      	adds	r3, #36	@ 0x24
 80125fe:	4618      	mov	r0, r3
 8012600:	f002 fbbc 	bl	8014d7c <pvPortMalloc>
 8012604:	6238      	str	r0, [r7, #32]

		if( pucAllocatedMemory != NULL )
 8012606:	6a3b      	ldr	r3, [r7, #32]
 8012608:	2b00      	cmp	r3, #0
 801260a:	d00a      	beq.n	8012622 <xStreamBufferGenericCreate+0xb2>
		{
			prvInitialiseNewStreamBuffer( ( StreamBuffer_t * ) pucAllocatedMemory, /* Structure at the start of the allocated memory. */ /*lint !e9087 Safe cast as allocated memory is aligned. */ /*lint !e826 Area is not too small and alignment is guaranteed provided malloc() behaves as expected and returns aligned buffer. */
 801260c:	6a3b      	ldr	r3, [r7, #32]
 801260e:	f103 0124 	add.w	r1, r3, #36	@ 0x24
 8012612:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8012616:	9300      	str	r3, [sp, #0]
 8012618:	68bb      	ldr	r3, [r7, #8]
 801261a:	68fa      	ldr	r2, [r7, #12]
 801261c:	6a38      	ldr	r0, [r7, #32]
 801261e:	f000 fb0b 	bl	8012c38 <prvInitialiseNewStreamBuffer>
		else
		{
			traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer );
		}

		return ( StreamBufferHandle_t ) pucAllocatedMemory; /*lint !e9087 !e826 Safe cast as allocated memory is aligned. */
 8012622:	6a3b      	ldr	r3, [r7, #32]
	}
 8012624:	4618      	mov	r0, r3
 8012626:	3728      	adds	r7, #40	@ 0x28
 8012628:	46bd      	mov	sp, r7
 801262a:	bd80      	pop	{r7, pc}

0801262c <xStreamBufferSpacesAvailable>:
	return xReturn;
}
/*-----------------------------------------------------------*/

size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer )
{
 801262c:	b480      	push	{r7}
 801262e:	b087      	sub	sp, #28
 8012630:	af00      	add	r7, sp, #0
 8012632:	6078      	str	r0, [r7, #4]
const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 8012634:	687b      	ldr	r3, [r7, #4]
 8012636:	613b      	str	r3, [r7, #16]
size_t xSpace;

	configASSERT( pxStreamBuffer );
 8012638:	693b      	ldr	r3, [r7, #16]
 801263a:	2b00      	cmp	r3, #0
 801263c:	d10b      	bne.n	8012656 <xStreamBufferSpacesAvailable+0x2a>
	__asm volatile
 801263e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012642:	f383 8811 	msr	BASEPRI, r3
 8012646:	f3bf 8f6f 	isb	sy
 801264a:	f3bf 8f4f 	dsb	sy
 801264e:	60fb      	str	r3, [r7, #12]
}
 8012650:	bf00      	nop
 8012652:	bf00      	nop
 8012654:	e7fd      	b.n	8012652 <xStreamBufferSpacesAvailable+0x26>

	xSpace = pxStreamBuffer->xLength + pxStreamBuffer->xTail;
 8012656:	693b      	ldr	r3, [r7, #16]
 8012658:	689a      	ldr	r2, [r3, #8]
 801265a:	693b      	ldr	r3, [r7, #16]
 801265c:	681b      	ldr	r3, [r3, #0]
 801265e:	4413      	add	r3, r2
 8012660:	617b      	str	r3, [r7, #20]
	xSpace -= pxStreamBuffer->xHead;
 8012662:	693b      	ldr	r3, [r7, #16]
 8012664:	685b      	ldr	r3, [r3, #4]
 8012666:	697a      	ldr	r2, [r7, #20]
 8012668:	1ad3      	subs	r3, r2, r3
 801266a:	617b      	str	r3, [r7, #20]
	xSpace -= ( size_t ) 1;
 801266c:	697b      	ldr	r3, [r7, #20]
 801266e:	3b01      	subs	r3, #1
 8012670:	617b      	str	r3, [r7, #20]

	if( xSpace >= pxStreamBuffer->xLength )
 8012672:	693b      	ldr	r3, [r7, #16]
 8012674:	689b      	ldr	r3, [r3, #8]
 8012676:	697a      	ldr	r2, [r7, #20]
 8012678:	429a      	cmp	r2, r3
 801267a:	d304      	bcc.n	8012686 <xStreamBufferSpacesAvailable+0x5a>
	{
		xSpace -= pxStreamBuffer->xLength;
 801267c:	693b      	ldr	r3, [r7, #16]
 801267e:	689b      	ldr	r3, [r3, #8]
 8012680:	697a      	ldr	r2, [r7, #20]
 8012682:	1ad3      	subs	r3, r2, r3
 8012684:	617b      	str	r3, [r7, #20]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xSpace;
 8012686:	697b      	ldr	r3, [r7, #20]
}
 8012688:	4618      	mov	r0, r3
 801268a:	371c      	adds	r7, #28
 801268c:	46bd      	mov	sp, r7
 801268e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012692:	4770      	bx	lr

08012694 <xStreamBufferSend>:

size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
						  const void *pvTxData,
						  size_t xDataLengthBytes,
						  TickType_t xTicksToWait )
{
 8012694:	b580      	push	{r7, lr}
 8012696:	b090      	sub	sp, #64	@ 0x40
 8012698:	af02      	add	r7, sp, #8
 801269a:	60f8      	str	r0, [r7, #12]
 801269c:	60b9      	str	r1, [r7, #8]
 801269e:	607a      	str	r2, [r7, #4]
 80126a0:	603b      	str	r3, [r7, #0]
StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 80126a2:	68fb      	ldr	r3, [r7, #12]
 80126a4:	62fb      	str	r3, [r7, #44]	@ 0x2c
size_t xReturn, xSpace = 0;
 80126a6:	2300      	movs	r3, #0
 80126a8:	637b      	str	r3, [r7, #52]	@ 0x34
size_t xRequiredSpace = xDataLengthBytes;
 80126aa:	687b      	ldr	r3, [r7, #4]
 80126ac:	633b      	str	r3, [r7, #48]	@ 0x30
TimeOut_t xTimeOut;

	configASSERT( pvTxData );
 80126ae:	68bb      	ldr	r3, [r7, #8]
 80126b0:	2b00      	cmp	r3, #0
 80126b2:	d10b      	bne.n	80126cc <xStreamBufferSend+0x38>
	__asm volatile
 80126b4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80126b8:	f383 8811 	msr	BASEPRI, r3
 80126bc:	f3bf 8f6f 	isb	sy
 80126c0:	f3bf 8f4f 	dsb	sy
 80126c4:	627b      	str	r3, [r7, #36]	@ 0x24
}
 80126c6:	bf00      	nop
 80126c8:	bf00      	nop
 80126ca:	e7fd      	b.n	80126c8 <xStreamBufferSend+0x34>
	configASSERT( pxStreamBuffer );
 80126cc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80126ce:	2b00      	cmp	r3, #0
 80126d0:	d10b      	bne.n	80126ea <xStreamBufferSend+0x56>
	__asm volatile
 80126d2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80126d6:	f383 8811 	msr	BASEPRI, r3
 80126da:	f3bf 8f6f 	isb	sy
 80126de:	f3bf 8f4f 	dsb	sy
 80126e2:	623b      	str	r3, [r7, #32]
}
 80126e4:	bf00      	nop
 80126e6:	bf00      	nop
 80126e8:	e7fd      	b.n	80126e6 <xStreamBufferSend+0x52>

	/* This send function is used to write to both message buffers and stream
	buffers.  If this is a message buffer then the space needed must be
	increased by the amount of bytes needed to store the length of the
	message. */
	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 80126ea:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80126ec:	7f1b      	ldrb	r3, [r3, #28]
 80126ee:	f003 0301 	and.w	r3, r3, #1
 80126f2:	2b00      	cmp	r3, #0
 80126f4:	d012      	beq.n	801271c <xStreamBufferSend+0x88>
	{
		xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
 80126f6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80126f8:	3304      	adds	r3, #4
 80126fa:	633b      	str	r3, [r7, #48]	@ 0x30

		/* Overflow? */
		configASSERT( xRequiredSpace > xDataLengthBytes );
 80126fc:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 80126fe:	687b      	ldr	r3, [r7, #4]
 8012700:	429a      	cmp	r2, r3
 8012702:	d80b      	bhi.n	801271c <xStreamBufferSend+0x88>
	__asm volatile
 8012704:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012708:	f383 8811 	msr	BASEPRI, r3
 801270c:	f3bf 8f6f 	isb	sy
 8012710:	f3bf 8f4f 	dsb	sy
 8012714:	61fb      	str	r3, [r7, #28]
}
 8012716:	bf00      	nop
 8012718:	bf00      	nop
 801271a:	e7fd      	b.n	8012718 <xStreamBufferSend+0x84>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	if( xTicksToWait != ( TickType_t ) 0 )
 801271c:	683b      	ldr	r3, [r7, #0]
 801271e:	2b00      	cmp	r3, #0
 8012720:	d03f      	beq.n	80127a2 <xStreamBufferSend+0x10e>
	{
		vTaskSetTimeOutState( &xTimeOut );
 8012722:	f107 0310 	add.w	r3, r7, #16
 8012726:	4618      	mov	r0, r3
 8012728:	f000 ffd0 	bl	80136cc <vTaskSetTimeOutState>

		do
		{
			/* Wait until the required number of bytes are free in the message
			buffer. */
			taskENTER_CRITICAL();
 801272c:	f002 fa04 	bl	8014b38 <vPortEnterCritical>
			{
				xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
 8012730:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012732:	f7ff ff7b 	bl	801262c <xStreamBufferSpacesAvailable>
 8012736:	6378      	str	r0, [r7, #52]	@ 0x34

				if( xSpace < xRequiredSpace )
 8012738:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 801273a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801273c:	429a      	cmp	r2, r3
 801273e:	d218      	bcs.n	8012772 <xStreamBufferSend+0xde>
				{
					/* Clear notification state as going to wait for space. */
					( void ) xTaskNotifyStateClear( NULL );
 8012740:	2000      	movs	r0, #0
 8012742:	f001 fcf3 	bl	801412c <xTaskNotifyStateClear>

					/* Should only be one writer. */
					configASSERT( pxStreamBuffer->xTaskWaitingToSend == NULL );
 8012746:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012748:	695b      	ldr	r3, [r3, #20]
 801274a:	2b00      	cmp	r3, #0
 801274c:	d00b      	beq.n	8012766 <xStreamBufferSend+0xd2>
	__asm volatile
 801274e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012752:	f383 8811 	msr	BASEPRI, r3
 8012756:	f3bf 8f6f 	isb	sy
 801275a:	f3bf 8f4f 	dsb	sy
 801275e:	61bb      	str	r3, [r7, #24]
}
 8012760:	bf00      	nop
 8012762:	bf00      	nop
 8012764:	e7fd      	b.n	8012762 <xStreamBufferSend+0xce>
					pxStreamBuffer->xTaskWaitingToSend = xTaskGetCurrentTaskHandle();
 8012766:	f001 f93b 	bl	80139e0 <xTaskGetCurrentTaskHandle>
 801276a:	4602      	mov	r2, r0
 801276c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801276e:	615a      	str	r2, [r3, #20]
 8012770:	e002      	b.n	8012778 <xStreamBufferSend+0xe4>
				}
				else
				{
					taskEXIT_CRITICAL();
 8012772:	f002 fa13 	bl	8014b9c <vPortExitCritical>
					break;
 8012776:	e014      	b.n	80127a2 <xStreamBufferSend+0x10e>
				}
			}
			taskEXIT_CRITICAL();
 8012778:	f002 fa10 	bl	8014b9c <vPortExitCritical>

			traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer );
			( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
 801277c:	683b      	ldr	r3, [r7, #0]
 801277e:	2200      	movs	r2, #0
 8012780:	2100      	movs	r1, #0
 8012782:	2000      	movs	r0, #0
 8012784:	f001 faca 	bl	8013d1c <xTaskNotifyWait>
			pxStreamBuffer->xTaskWaitingToSend = NULL;
 8012788:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801278a:	2200      	movs	r2, #0
 801278c:	615a      	str	r2, [r3, #20]

		} while( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE );
 801278e:	463a      	mov	r2, r7
 8012790:	f107 0310 	add.w	r3, r7, #16
 8012794:	4611      	mov	r1, r2
 8012796:	4618      	mov	r0, r3
 8012798:	f000 ffd6 	bl	8013748 <xTaskCheckForTimeOut>
 801279c:	4603      	mov	r3, r0
 801279e:	2b00      	cmp	r3, #0
 80127a0:	d0c4      	beq.n	801272c <xStreamBufferSend+0x98>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	if( xSpace == ( size_t ) 0 )
 80127a2:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80127a4:	2b00      	cmp	r3, #0
 80127a6:	d103      	bne.n	80127b0 <xStreamBufferSend+0x11c>
	{
		xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
 80127a8:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 80127aa:	f7ff ff3f 	bl	801262c <xStreamBufferSpacesAvailable>
 80127ae:	6378      	str	r0, [r7, #52]	@ 0x34
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
 80127b0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80127b2:	9300      	str	r3, [sp, #0]
 80127b4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80127b6:	687a      	ldr	r2, [r7, #4]
 80127b8:	68b9      	ldr	r1, [r7, #8]
 80127ba:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 80127bc:	f000 f823 	bl	8012806 <prvWriteMessageToBuffer>
 80127c0:	62b8      	str	r0, [r7, #40]	@ 0x28

	if( xReturn > ( size_t ) 0 )
 80127c2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80127c4:	2b00      	cmp	r3, #0
 80127c6:	d019      	beq.n	80127fc <xStreamBufferSend+0x168>
	{
		traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn );

		/* Was a task waiting for the data? */
		if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
 80127c8:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 80127ca:	f000 fa15 	bl	8012bf8 <prvBytesInBuffer>
 80127ce:	4602      	mov	r2, r0
 80127d0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80127d2:	68db      	ldr	r3, [r3, #12]
 80127d4:	429a      	cmp	r2, r3
 80127d6:	d311      	bcc.n	80127fc <xStreamBufferSend+0x168>
		{
			sbSEND_COMPLETED( pxStreamBuffer );
 80127d8:	f000 fcc6 	bl	8013168 <vTaskSuspendAll>
 80127dc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80127de:	691b      	ldr	r3, [r3, #16]
 80127e0:	2b00      	cmp	r3, #0
 80127e2:	d009      	beq.n	80127f8 <xStreamBufferSend+0x164>
 80127e4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80127e6:	6918      	ldr	r0, [r3, #16]
 80127e8:	2300      	movs	r3, #0
 80127ea:	2200      	movs	r2, #0
 80127ec:	2100      	movs	r1, #0
 80127ee:	f001 faf5 	bl	8013ddc <xTaskGenericNotify>
 80127f2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80127f4:	2200      	movs	r2, #0
 80127f6:	611a      	str	r2, [r3, #16]
 80127f8:	f000 fcc4 	bl	8013184 <xTaskResumeAll>
	{
		mtCOVERAGE_TEST_MARKER();
		traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer );
	}

	return xReturn;
 80127fc:	6abb      	ldr	r3, [r7, #40]	@ 0x28
}
 80127fe:	4618      	mov	r0, r3
 8012800:	3738      	adds	r7, #56	@ 0x38
 8012802:	46bd      	mov	sp, r7
 8012804:	bd80      	pop	{r7, pc}

08012806 <prvWriteMessageToBuffer>:
static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer,
									   const void * pvTxData,
									   size_t xDataLengthBytes,
									   size_t xSpace,
									   size_t xRequiredSpace )
{
 8012806:	b580      	push	{r7, lr}
 8012808:	b086      	sub	sp, #24
 801280a:	af00      	add	r7, sp, #0
 801280c:	60f8      	str	r0, [r7, #12]
 801280e:	60b9      	str	r1, [r7, #8]
 8012810:	607a      	str	r2, [r7, #4]
 8012812:	603b      	str	r3, [r7, #0]
	BaseType_t xShouldWrite;
	size_t xReturn;

	if( xSpace == ( size_t ) 0 )
 8012814:	683b      	ldr	r3, [r7, #0]
 8012816:	2b00      	cmp	r3, #0
 8012818:	d102      	bne.n	8012820 <prvWriteMessageToBuffer+0x1a>
	{
		/* Doesn't matter if this is a stream buffer or a message buffer, there
		is no space to write. */
		xShouldWrite = pdFALSE;
 801281a:	2300      	movs	r3, #0
 801281c:	617b      	str	r3, [r7, #20]
 801281e:	e01d      	b.n	801285c <prvWriteMessageToBuffer+0x56>
	}
	else if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) == ( uint8_t ) 0 )
 8012820:	68fb      	ldr	r3, [r7, #12]
 8012822:	7f1b      	ldrb	r3, [r3, #28]
 8012824:	f003 0301 	and.w	r3, r3, #1
 8012828:	2b00      	cmp	r3, #0
 801282a:	d108      	bne.n	801283e <prvWriteMessageToBuffer+0x38>
	{
		/* This is a stream buffer, as opposed to a message buffer, so writing a
		stream of bytes rather than discrete messages.  Write as many bytes as
		possible. */
		xShouldWrite = pdTRUE;
 801282c:	2301      	movs	r3, #1
 801282e:	617b      	str	r3, [r7, #20]
		xDataLengthBytes = configMIN( xDataLengthBytes, xSpace );
 8012830:	687a      	ldr	r2, [r7, #4]
 8012832:	683b      	ldr	r3, [r7, #0]
 8012834:	4293      	cmp	r3, r2
 8012836:	bf28      	it	cs
 8012838:	4613      	movcs	r3, r2
 801283a:	607b      	str	r3, [r7, #4]
 801283c:	e00e      	b.n	801285c <prvWriteMessageToBuffer+0x56>
	}
	else if( xSpace >= xRequiredSpace )
 801283e:	683a      	ldr	r2, [r7, #0]
 8012840:	6a3b      	ldr	r3, [r7, #32]
 8012842:	429a      	cmp	r2, r3
 8012844:	d308      	bcc.n	8012858 <prvWriteMessageToBuffer+0x52>
	{
		/* This is a message buffer, as opposed to a stream buffer, and there
		is enough space to write both the message length and the message itself
		into the buffer.  Start by writing the length of the data, the data
		itself will be written later in this function. */
		xShouldWrite = pdTRUE;
 8012846:	2301      	movs	r3, #1
 8012848:	617b      	str	r3, [r7, #20]
		( void ) prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) &( xDataLengthBytes ), sbBYTES_TO_STORE_MESSAGE_LENGTH );
 801284a:	1d3b      	adds	r3, r7, #4
 801284c:	2204      	movs	r2, #4
 801284e:	4619      	mov	r1, r3
 8012850:	68f8      	ldr	r0, [r7, #12]
 8012852:	f000 f8df 	bl	8012a14 <prvWriteBytesToBuffer>
 8012856:	e001      	b.n	801285c <prvWriteMessageToBuffer+0x56>
	}
	else
	{
		/* There is space available, but not enough space. */
		xShouldWrite = pdFALSE;
 8012858:	2300      	movs	r3, #0
 801285a:	617b      	str	r3, [r7, #20]
	}

	if( xShouldWrite != pdFALSE )
 801285c:	697b      	ldr	r3, [r7, #20]
 801285e:	2b00      	cmp	r3, #0
 8012860:	d007      	beq.n	8012872 <prvWriteMessageToBuffer+0x6c>
	{
		/* Writes the data itself. */
		xReturn = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) pvTxData, xDataLengthBytes ); /*lint !e9079 Storage buffer is implemented as uint8_t for ease of sizing, alighment and access. */
 8012862:	687b      	ldr	r3, [r7, #4]
 8012864:	461a      	mov	r2, r3
 8012866:	68b9      	ldr	r1, [r7, #8]
 8012868:	68f8      	ldr	r0, [r7, #12]
 801286a:	f000 f8d3 	bl	8012a14 <prvWriteBytesToBuffer>
 801286e:	6138      	str	r0, [r7, #16]
 8012870:	e001      	b.n	8012876 <prvWriteMessageToBuffer+0x70>
	}
	else
	{
		xReturn = 0;
 8012872:	2300      	movs	r3, #0
 8012874:	613b      	str	r3, [r7, #16]
	}

	return xReturn;
 8012876:	693b      	ldr	r3, [r7, #16]
}
 8012878:	4618      	mov	r0, r3
 801287a:	3718      	adds	r7, #24
 801287c:	46bd      	mov	sp, r7
 801287e:	bd80      	pop	{r7, pc}

08012880 <xStreamBufferReceive>:

size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
							 void *pvRxData,
							 size_t xBufferLengthBytes,
							 TickType_t xTicksToWait )
{
 8012880:	b580      	push	{r7, lr}
 8012882:	b08e      	sub	sp, #56	@ 0x38
 8012884:	af02      	add	r7, sp, #8
 8012886:	60f8      	str	r0, [r7, #12]
 8012888:	60b9      	str	r1, [r7, #8]
 801288a:	607a      	str	r2, [r7, #4]
 801288c:	603b      	str	r3, [r7, #0]
StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 801288e:	68fb      	ldr	r3, [r7, #12]
 8012890:	623b      	str	r3, [r7, #32]
size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength;
 8012892:	2300      	movs	r3, #0
 8012894:	62fb      	str	r3, [r7, #44]	@ 0x2c

	configASSERT( pvRxData );
 8012896:	68bb      	ldr	r3, [r7, #8]
 8012898:	2b00      	cmp	r3, #0
 801289a:	d10b      	bne.n	80128b4 <xStreamBufferReceive+0x34>
	__asm volatile
 801289c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80128a0:	f383 8811 	msr	BASEPRI, r3
 80128a4:	f3bf 8f6f 	isb	sy
 80128a8:	f3bf 8f4f 	dsb	sy
 80128ac:	61fb      	str	r3, [r7, #28]
}
 80128ae:	bf00      	nop
 80128b0:	bf00      	nop
 80128b2:	e7fd      	b.n	80128b0 <xStreamBufferReceive+0x30>
	configASSERT( pxStreamBuffer );
 80128b4:	6a3b      	ldr	r3, [r7, #32]
 80128b6:	2b00      	cmp	r3, #0
 80128b8:	d10b      	bne.n	80128d2 <xStreamBufferReceive+0x52>
	__asm volatile
 80128ba:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80128be:	f383 8811 	msr	BASEPRI, r3
 80128c2:	f3bf 8f6f 	isb	sy
 80128c6:	f3bf 8f4f 	dsb	sy
 80128ca:	61bb      	str	r3, [r7, #24]
}
 80128cc:	bf00      	nop
 80128ce:	bf00      	nop
 80128d0:	e7fd      	b.n	80128ce <xStreamBufferReceive+0x4e>
	/* This receive function is used by both message buffers, which store
	discrete messages, and stream buffers, which store a continuous stream of
	bytes.  Discrete messages include an additional
	sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the
	message. */
	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 80128d2:	6a3b      	ldr	r3, [r7, #32]
 80128d4:	7f1b      	ldrb	r3, [r3, #28]
 80128d6:	f003 0301 	and.w	r3, r3, #1
 80128da:	2b00      	cmp	r3, #0
 80128dc:	d002      	beq.n	80128e4 <xStreamBufferReceive+0x64>
	{
		xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
 80128de:	2304      	movs	r3, #4
 80128e0:	627b      	str	r3, [r7, #36]	@ 0x24
 80128e2:	e001      	b.n	80128e8 <xStreamBufferReceive+0x68>
	}
	else
	{
		xBytesToStoreMessageLength = 0;
 80128e4:	2300      	movs	r3, #0
 80128e6:	627b      	str	r3, [r7, #36]	@ 0x24
	}

	if( xTicksToWait != ( TickType_t ) 0 )
 80128e8:	683b      	ldr	r3, [r7, #0]
 80128ea:	2b00      	cmp	r3, #0
 80128ec:	d035      	beq.n	801295a <xStreamBufferReceive+0xda>
	{
		/* Checking if there is data and clearing the notification state must be
		performed atomically. */
		taskENTER_CRITICAL();
 80128ee:	f002 f923 	bl	8014b38 <vPortEnterCritical>
		{
			xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 80128f2:	6a38      	ldr	r0, [r7, #32]
 80128f4:	f000 f980 	bl	8012bf8 <prvBytesInBuffer>
 80128f8:	62b8      	str	r0, [r7, #40]	@ 0x28
			/* If this function was invoked by a message buffer read then
			xBytesToStoreMessageLength holds the number of bytes used to hold
			the length of the next discrete message.  If this function was
			invoked by a stream buffer read then xBytesToStoreMessageLength will
			be 0. */
			if( xBytesAvailable <= xBytesToStoreMessageLength )
 80128fa:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80128fc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80128fe:	429a      	cmp	r2, r3
 8012900:	d817      	bhi.n	8012932 <xStreamBufferReceive+0xb2>
			{
				/* Clear notification state as going to wait for data. */
				( void ) xTaskNotifyStateClear( NULL );
 8012902:	2000      	movs	r0, #0
 8012904:	f001 fc12 	bl	801412c <xTaskNotifyStateClear>

				/* Should only be one reader. */
				configASSERT( pxStreamBuffer->xTaskWaitingToReceive == NULL );
 8012908:	6a3b      	ldr	r3, [r7, #32]
 801290a:	691b      	ldr	r3, [r3, #16]
 801290c:	2b00      	cmp	r3, #0
 801290e:	d00b      	beq.n	8012928 <xStreamBufferReceive+0xa8>
	__asm volatile
 8012910:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012914:	f383 8811 	msr	BASEPRI, r3
 8012918:	f3bf 8f6f 	isb	sy
 801291c:	f3bf 8f4f 	dsb	sy
 8012920:	617b      	str	r3, [r7, #20]
}
 8012922:	bf00      	nop
 8012924:	bf00      	nop
 8012926:	e7fd      	b.n	8012924 <xStreamBufferReceive+0xa4>
				pxStreamBuffer->xTaskWaitingToReceive = xTaskGetCurrentTaskHandle();
 8012928:	f001 f85a 	bl	80139e0 <xTaskGetCurrentTaskHandle>
 801292c:	4602      	mov	r2, r0
 801292e:	6a3b      	ldr	r3, [r7, #32]
 8012930:	611a      	str	r2, [r3, #16]
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 8012932:	f002 f933 	bl	8014b9c <vPortExitCritical>

		if( xBytesAvailable <= xBytesToStoreMessageLength )
 8012936:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8012938:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801293a:	429a      	cmp	r2, r3
 801293c:	d811      	bhi.n	8012962 <xStreamBufferReceive+0xe2>
		{
			/* Wait for data to be available. */
			traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer );
			( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
 801293e:	683b      	ldr	r3, [r7, #0]
 8012940:	2200      	movs	r2, #0
 8012942:	2100      	movs	r1, #0
 8012944:	2000      	movs	r0, #0
 8012946:	f001 f9e9 	bl	8013d1c <xTaskNotifyWait>
			pxStreamBuffer->xTaskWaitingToReceive = NULL;
 801294a:	6a3b      	ldr	r3, [r7, #32]
 801294c:	2200      	movs	r2, #0
 801294e:	611a      	str	r2, [r3, #16]

			/* Recheck the data available after blocking. */
			xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 8012950:	6a38      	ldr	r0, [r7, #32]
 8012952:	f000 f951 	bl	8012bf8 <prvBytesInBuffer>
 8012956:	62b8      	str	r0, [r7, #40]	@ 0x28
 8012958:	e003      	b.n	8012962 <xStreamBufferReceive+0xe2>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 801295a:	6a38      	ldr	r0, [r7, #32]
 801295c:	f000 f94c 	bl	8012bf8 <prvBytesInBuffer>
 8012960:	62b8      	str	r0, [r7, #40]	@ 0x28
	/* Whether receiving a discrete message (where xBytesToStoreMessageLength
	holds the number of bytes used to store the message length) or a stream of
	bytes (where xBytesToStoreMessageLength is zero), the number of bytes
	available must be greater than xBytesToStoreMessageLength to be able to
	read bytes from the buffer. */
	if( xBytesAvailable > xBytesToStoreMessageLength )
 8012962:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8012964:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012966:	429a      	cmp	r2, r3
 8012968:	d91d      	bls.n	80129a6 <xStreamBufferReceive+0x126>
	{
		xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable, xBytesToStoreMessageLength );
 801296a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801296c:	9300      	str	r3, [sp, #0]
 801296e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012970:	687a      	ldr	r2, [r7, #4]
 8012972:	68b9      	ldr	r1, [r7, #8]
 8012974:	6a38      	ldr	r0, [r7, #32]
 8012976:	f000 f81b 	bl	80129b0 <prvReadMessageFromBuffer>
 801297a:	62f8      	str	r0, [r7, #44]	@ 0x2c

		/* Was a task waiting for space in the buffer? */
		if( xReceivedLength != ( size_t ) 0 )
 801297c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801297e:	2b00      	cmp	r3, #0
 8012980:	d011      	beq.n	80129a6 <xStreamBufferReceive+0x126>
		{
			traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength );
			sbRECEIVE_COMPLETED( pxStreamBuffer );
 8012982:	f000 fbf1 	bl	8013168 <vTaskSuspendAll>
 8012986:	6a3b      	ldr	r3, [r7, #32]
 8012988:	695b      	ldr	r3, [r3, #20]
 801298a:	2b00      	cmp	r3, #0
 801298c:	d009      	beq.n	80129a2 <xStreamBufferReceive+0x122>
 801298e:	6a3b      	ldr	r3, [r7, #32]
 8012990:	6958      	ldr	r0, [r3, #20]
 8012992:	2300      	movs	r3, #0
 8012994:	2200      	movs	r2, #0
 8012996:	2100      	movs	r1, #0
 8012998:	f001 fa20 	bl	8013ddc <xTaskGenericNotify>
 801299c:	6a3b      	ldr	r3, [r7, #32]
 801299e:	2200      	movs	r2, #0
 80129a0:	615a      	str	r2, [r3, #20]
 80129a2:	f000 fbef 	bl	8013184 <xTaskResumeAll>
	{
		traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer );
		mtCOVERAGE_TEST_MARKER();
	}

	return xReceivedLength;
 80129a6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
}
 80129a8:	4618      	mov	r0, r3
 80129aa:	3730      	adds	r7, #48	@ 0x30
 80129ac:	46bd      	mov	sp, r7
 80129ae:	bd80      	pop	{r7, pc}

080129b0 <prvReadMessageFromBuffer>:
static size_t prvReadMessageFromBuffer( StreamBuffer_t *pxStreamBuffer,
										void *pvRxData,
										size_t xBufferLengthBytes,
										size_t xBytesAvailable,
										size_t xBytesToStoreMessageLength )
{
 80129b0:	b580      	push	{r7, lr}
 80129b2:	b088      	sub	sp, #32
 80129b4:	af00      	add	r7, sp, #0
 80129b6:	60f8      	str	r0, [r7, #12]
 80129b8:	60b9      	str	r1, [r7, #8]
 80129ba:	607a      	str	r2, [r7, #4]
 80129bc:	603b      	str	r3, [r7, #0]
size_t xOriginalTail, xReceivedLength, xNextMessageLength;
configMESSAGE_BUFFER_LENGTH_TYPE xTempNextMessageLength;

	if( xBytesToStoreMessageLength != ( size_t ) 0 )
 80129be:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80129c0:	2b00      	cmp	r3, #0
 80129c2:	d019      	beq.n	80129f8 <prvReadMessageFromBuffer+0x48>
	{
		/* A discrete message is being received.  First receive the length
		of the message.  A copy of the tail is stored so the buffer can be
		returned to its prior state if the length of the message is too
		large for the provided buffer. */
		xOriginalTail = pxStreamBuffer->xTail;
 80129c4:	68fb      	ldr	r3, [r7, #12]
 80129c6:	681b      	ldr	r3, [r3, #0]
 80129c8:	61bb      	str	r3, [r7, #24]
		( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempNextMessageLength, xBytesToStoreMessageLength, xBytesAvailable );
 80129ca:	f107 0110 	add.w	r1, r7, #16
 80129ce:	683b      	ldr	r3, [r7, #0]
 80129d0:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80129d2:	68f8      	ldr	r0, [r7, #12]
 80129d4:	f000 f893 	bl	8012afe <prvReadBytesFromBuffer>
		xNextMessageLength = ( size_t ) xTempNextMessageLength;
 80129d8:	693b      	ldr	r3, [r7, #16]
 80129da:	61fb      	str	r3, [r7, #28]

		/* Reduce the number of bytes available by the number of bytes just
		read out. */
		xBytesAvailable -= xBytesToStoreMessageLength;
 80129dc:	683a      	ldr	r2, [r7, #0]
 80129de:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80129e0:	1ad3      	subs	r3, r2, r3
 80129e2:	603b      	str	r3, [r7, #0]

		/* Check there is enough space in the buffer provided by the
		user. */
		if( xNextMessageLength > xBufferLengthBytes )
 80129e4:	69fa      	ldr	r2, [r7, #28]
 80129e6:	687b      	ldr	r3, [r7, #4]
 80129e8:	429a      	cmp	r2, r3
 80129ea:	d907      	bls.n	80129fc <prvReadMessageFromBuffer+0x4c>
		{
			/* The user has provided insufficient space to read the message
			so return the buffer to its previous state (so the length of
			the message is in the buffer again). */
			pxStreamBuffer->xTail = xOriginalTail;
 80129ec:	68fb      	ldr	r3, [r7, #12]
 80129ee:	69ba      	ldr	r2, [r7, #24]
 80129f0:	601a      	str	r2, [r3, #0]
			xNextMessageLength = 0;
 80129f2:	2300      	movs	r3, #0
 80129f4:	61fb      	str	r3, [r7, #28]
 80129f6:	e001      	b.n	80129fc <prvReadMessageFromBuffer+0x4c>
	}
	else
	{
		/* A stream of bytes is being received (as opposed to a discrete
		message), so read as many bytes as possible. */
		xNextMessageLength = xBufferLengthBytes;
 80129f8:	687b      	ldr	r3, [r7, #4]
 80129fa:	61fb      	str	r3, [r7, #28]
	}

	/* Read the actual data. */
	xReceivedLength = prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) pvRxData, xNextMessageLength, xBytesAvailable ); /*lint !e9079 Data storage area is implemented as uint8_t array for ease of sizing, indexing and alignment. */
 80129fc:	683b      	ldr	r3, [r7, #0]
 80129fe:	69fa      	ldr	r2, [r7, #28]
 8012a00:	68b9      	ldr	r1, [r7, #8]
 8012a02:	68f8      	ldr	r0, [r7, #12]
 8012a04:	f000 f87b 	bl	8012afe <prvReadBytesFromBuffer>
 8012a08:	6178      	str	r0, [r7, #20]

	return xReceivedLength;
 8012a0a:	697b      	ldr	r3, [r7, #20]
}
 8012a0c:	4618      	mov	r0, r3
 8012a0e:	3720      	adds	r7, #32
 8012a10:	46bd      	mov	sp, r7
 8012a12:	bd80      	pop	{r7, pc}

08012a14 <prvWriteBytesToBuffer>:
	return xReturn;
}
/*-----------------------------------------------------------*/

static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, const uint8_t *pucData, size_t xCount )
{
 8012a14:	b580      	push	{r7, lr}
 8012a16:	b08a      	sub	sp, #40	@ 0x28
 8012a18:	af00      	add	r7, sp, #0
 8012a1a:	60f8      	str	r0, [r7, #12]
 8012a1c:	60b9      	str	r1, [r7, #8]
 8012a1e:	607a      	str	r2, [r7, #4]
size_t xNextHead, xFirstLength;

	configASSERT( xCount > ( size_t ) 0 );
 8012a20:	687b      	ldr	r3, [r7, #4]
 8012a22:	2b00      	cmp	r3, #0
 8012a24:	d10b      	bne.n	8012a3e <prvWriteBytesToBuffer+0x2a>
	__asm volatile
 8012a26:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012a2a:	f383 8811 	msr	BASEPRI, r3
 8012a2e:	f3bf 8f6f 	isb	sy
 8012a32:	f3bf 8f4f 	dsb	sy
 8012a36:	61fb      	str	r3, [r7, #28]
}
 8012a38:	bf00      	nop
 8012a3a:	bf00      	nop
 8012a3c:	e7fd      	b.n	8012a3a <prvWriteBytesToBuffer+0x26>

	xNextHead = pxStreamBuffer->xHead;
 8012a3e:	68fb      	ldr	r3, [r7, #12]
 8012a40:	685b      	ldr	r3, [r3, #4]
 8012a42:	627b      	str	r3, [r7, #36]	@ 0x24

	/* Calculate the number of bytes that can be added in the first write -
	which may be less than the total number of bytes that need to be added if
	the buffer will wrap back to the beginning. */
	xFirstLength = configMIN( pxStreamBuffer->xLength - xNextHead, xCount );
 8012a44:	68fb      	ldr	r3, [r7, #12]
 8012a46:	689a      	ldr	r2, [r3, #8]
 8012a48:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012a4a:	1ad3      	subs	r3, r2, r3
 8012a4c:	687a      	ldr	r2, [r7, #4]
 8012a4e:	4293      	cmp	r3, r2
 8012a50:	bf28      	it	cs
 8012a52:	4613      	movcs	r3, r2
 8012a54:	623b      	str	r3, [r7, #32]

	/* Write as many bytes as can be written in the first write. */
	configASSERT( ( xNextHead + xFirstLength ) <= pxStreamBuffer->xLength );
 8012a56:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012a58:	6a3b      	ldr	r3, [r7, #32]
 8012a5a:	441a      	add	r2, r3
 8012a5c:	68fb      	ldr	r3, [r7, #12]
 8012a5e:	689b      	ldr	r3, [r3, #8]
 8012a60:	429a      	cmp	r2, r3
 8012a62:	d90b      	bls.n	8012a7c <prvWriteBytesToBuffer+0x68>
	__asm volatile
 8012a64:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012a68:	f383 8811 	msr	BASEPRI, r3
 8012a6c:	f3bf 8f6f 	isb	sy
 8012a70:	f3bf 8f4f 	dsb	sy
 8012a74:	61bb      	str	r3, [r7, #24]
}
 8012a76:	bf00      	nop
 8012a78:	bf00      	nop
 8012a7a:	e7fd      	b.n	8012a78 <prvWriteBytesToBuffer+0x64>
	( void ) memcpy( ( void* ) ( &( pxStreamBuffer->pucBuffer[ xNextHead ] ) ), ( const void * ) pucData, xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 8012a7c:	68fb      	ldr	r3, [r7, #12]
 8012a7e:	699a      	ldr	r2, [r3, #24]
 8012a80:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012a82:	4413      	add	r3, r2
 8012a84:	6a3a      	ldr	r2, [r7, #32]
 8012a86:	68b9      	ldr	r1, [r7, #8]
 8012a88:	4618      	mov	r0, r3
 8012a8a:	f017 fa30 	bl	8029eee <memcpy>

	/* If the number of bytes written was less than the number that could be
	written in the first write... */
	if( xCount > xFirstLength )
 8012a8e:	687a      	ldr	r2, [r7, #4]
 8012a90:	6a3b      	ldr	r3, [r7, #32]
 8012a92:	429a      	cmp	r2, r3
 8012a94:	d91d      	bls.n	8012ad2 <prvWriteBytesToBuffer+0xbe>
	{
		/* ...then write the remaining bytes to the start of the buffer. */
		configASSERT( ( xCount - xFirstLength ) <= pxStreamBuffer->xLength );
 8012a96:	687a      	ldr	r2, [r7, #4]
 8012a98:	6a3b      	ldr	r3, [r7, #32]
 8012a9a:	1ad2      	subs	r2, r2, r3
 8012a9c:	68fb      	ldr	r3, [r7, #12]
 8012a9e:	689b      	ldr	r3, [r3, #8]
 8012aa0:	429a      	cmp	r2, r3
 8012aa2:	d90b      	bls.n	8012abc <prvWriteBytesToBuffer+0xa8>
	__asm volatile
 8012aa4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012aa8:	f383 8811 	msr	BASEPRI, r3
 8012aac:	f3bf 8f6f 	isb	sy
 8012ab0:	f3bf 8f4f 	dsb	sy
 8012ab4:	617b      	str	r3, [r7, #20]
}
 8012ab6:	bf00      	nop
 8012ab8:	bf00      	nop
 8012aba:	e7fd      	b.n	8012ab8 <prvWriteBytesToBuffer+0xa4>
		( void ) memcpy( ( void * ) pxStreamBuffer->pucBuffer, ( const void * ) &( pucData[ xFirstLength ] ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 8012abc:	68fb      	ldr	r3, [r7, #12]
 8012abe:	6998      	ldr	r0, [r3, #24]
 8012ac0:	68ba      	ldr	r2, [r7, #8]
 8012ac2:	6a3b      	ldr	r3, [r7, #32]
 8012ac4:	18d1      	adds	r1, r2, r3
 8012ac6:	687a      	ldr	r2, [r7, #4]
 8012ac8:	6a3b      	ldr	r3, [r7, #32]
 8012aca:	1ad3      	subs	r3, r2, r3
 8012acc:	461a      	mov	r2, r3
 8012ace:	f017 fa0e 	bl	8029eee <memcpy>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	xNextHead += xCount;
 8012ad2:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012ad4:	687b      	ldr	r3, [r7, #4]
 8012ad6:	4413      	add	r3, r2
 8012ad8:	627b      	str	r3, [r7, #36]	@ 0x24
	if( xNextHead >= pxStreamBuffer->xLength )
 8012ada:	68fb      	ldr	r3, [r7, #12]
 8012adc:	689b      	ldr	r3, [r3, #8]
 8012ade:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012ae0:	429a      	cmp	r2, r3
 8012ae2:	d304      	bcc.n	8012aee <prvWriteBytesToBuffer+0xda>
	{
		xNextHead -= pxStreamBuffer->xLength;
 8012ae4:	68fb      	ldr	r3, [r7, #12]
 8012ae6:	689b      	ldr	r3, [r3, #8]
 8012ae8:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012aea:	1ad3      	subs	r3, r2, r3
 8012aec:	627b      	str	r3, [r7, #36]	@ 0x24
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxStreamBuffer->xHead = xNextHead;
 8012aee:	68fb      	ldr	r3, [r7, #12]
 8012af0:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012af2:	605a      	str	r2, [r3, #4]

	return xCount;
 8012af4:	687b      	ldr	r3, [r7, #4]
}
 8012af6:	4618      	mov	r0, r3
 8012af8:	3728      	adds	r7, #40	@ 0x28
 8012afa:	46bd      	mov	sp, r7
 8012afc:	bd80      	pop	{r7, pc}

08012afe <prvReadBytesFromBuffer>:
/*-----------------------------------------------------------*/

static size_t prvReadBytesFromBuffer( StreamBuffer_t *pxStreamBuffer, uint8_t *pucData, size_t xMaxCount, size_t xBytesAvailable )
{
 8012afe:	b580      	push	{r7, lr}
 8012b00:	b08a      	sub	sp, #40	@ 0x28
 8012b02:	af00      	add	r7, sp, #0
 8012b04:	60f8      	str	r0, [r7, #12]
 8012b06:	60b9      	str	r1, [r7, #8]
 8012b08:	607a      	str	r2, [r7, #4]
 8012b0a:	603b      	str	r3, [r7, #0]
size_t xCount, xFirstLength, xNextTail;

	/* Use the minimum of the wanted bytes and the available bytes. */
	xCount = configMIN( xBytesAvailable, xMaxCount );
 8012b0c:	687a      	ldr	r2, [r7, #4]
 8012b0e:	683b      	ldr	r3, [r7, #0]
 8012b10:	4293      	cmp	r3, r2
 8012b12:	bf28      	it	cs
 8012b14:	4613      	movcs	r3, r2
 8012b16:	623b      	str	r3, [r7, #32]

	if( xCount > ( size_t ) 0 )
 8012b18:	6a3b      	ldr	r3, [r7, #32]
 8012b1a:	2b00      	cmp	r3, #0
 8012b1c:	d067      	beq.n	8012bee <prvReadBytesFromBuffer+0xf0>
	{
		xNextTail = pxStreamBuffer->xTail;
 8012b1e:	68fb      	ldr	r3, [r7, #12]
 8012b20:	681b      	ldr	r3, [r3, #0]
 8012b22:	627b      	str	r3, [r7, #36]	@ 0x24

		/* Calculate the number of bytes that can be read - which may be
		less than the number wanted if the data wraps around to the start of
		the buffer. */
		xFirstLength = configMIN( pxStreamBuffer->xLength - xNextTail, xCount );
 8012b24:	68fb      	ldr	r3, [r7, #12]
 8012b26:	689a      	ldr	r2, [r3, #8]
 8012b28:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012b2a:	1ad3      	subs	r3, r2, r3
 8012b2c:	6a3a      	ldr	r2, [r7, #32]
 8012b2e:	4293      	cmp	r3, r2
 8012b30:	bf28      	it	cs
 8012b32:	4613      	movcs	r3, r2
 8012b34:	61fb      	str	r3, [r7, #28]

		/* Obtain the number of bytes it is possible to obtain in the first
		read.  Asserts check bounds of read and write. */
		configASSERT( xFirstLength <= xMaxCount );
 8012b36:	69fa      	ldr	r2, [r7, #28]
 8012b38:	687b      	ldr	r3, [r7, #4]
 8012b3a:	429a      	cmp	r2, r3
 8012b3c:	d90b      	bls.n	8012b56 <prvReadBytesFromBuffer+0x58>
	__asm volatile
 8012b3e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012b42:	f383 8811 	msr	BASEPRI, r3
 8012b46:	f3bf 8f6f 	isb	sy
 8012b4a:	f3bf 8f4f 	dsb	sy
 8012b4e:	61bb      	str	r3, [r7, #24]
}
 8012b50:	bf00      	nop
 8012b52:	bf00      	nop
 8012b54:	e7fd      	b.n	8012b52 <prvReadBytesFromBuffer+0x54>
		configASSERT( ( xNextTail + xFirstLength ) <= pxStreamBuffer->xLength );
 8012b56:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012b58:	69fb      	ldr	r3, [r7, #28]
 8012b5a:	441a      	add	r2, r3
 8012b5c:	68fb      	ldr	r3, [r7, #12]
 8012b5e:	689b      	ldr	r3, [r3, #8]
 8012b60:	429a      	cmp	r2, r3
 8012b62:	d90b      	bls.n	8012b7c <prvReadBytesFromBuffer+0x7e>
	__asm volatile
 8012b64:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012b68:	f383 8811 	msr	BASEPRI, r3
 8012b6c:	f3bf 8f6f 	isb	sy
 8012b70:	f3bf 8f4f 	dsb	sy
 8012b74:	617b      	str	r3, [r7, #20]
}
 8012b76:	bf00      	nop
 8012b78:	bf00      	nop
 8012b7a:	e7fd      	b.n	8012b78 <prvReadBytesFromBuffer+0x7a>
		( void ) memcpy( ( void * ) pucData, ( const void * ) &( pxStreamBuffer->pucBuffer[ xNextTail ] ), xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 8012b7c:	68fb      	ldr	r3, [r7, #12]
 8012b7e:	699a      	ldr	r2, [r3, #24]
 8012b80:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012b82:	4413      	add	r3, r2
 8012b84:	69fa      	ldr	r2, [r7, #28]
 8012b86:	4619      	mov	r1, r3
 8012b88:	68b8      	ldr	r0, [r7, #8]
 8012b8a:	f017 f9b0 	bl	8029eee <memcpy>

		/* If the total number of wanted bytes is greater than the number
		that could be read in the first read... */
		if( xCount > xFirstLength )
 8012b8e:	6a3a      	ldr	r2, [r7, #32]
 8012b90:	69fb      	ldr	r3, [r7, #28]
 8012b92:	429a      	cmp	r2, r3
 8012b94:	d91a      	bls.n	8012bcc <prvReadBytesFromBuffer+0xce>
		{
			/*...then read the remaining bytes from the start of the buffer. */
			configASSERT( xCount <= xMaxCount );
 8012b96:	6a3a      	ldr	r2, [r7, #32]
 8012b98:	687b      	ldr	r3, [r7, #4]
 8012b9a:	429a      	cmp	r2, r3
 8012b9c:	d90b      	bls.n	8012bb6 <prvReadBytesFromBuffer+0xb8>
	__asm volatile
 8012b9e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012ba2:	f383 8811 	msr	BASEPRI, r3
 8012ba6:	f3bf 8f6f 	isb	sy
 8012baa:	f3bf 8f4f 	dsb	sy
 8012bae:	613b      	str	r3, [r7, #16]
}
 8012bb0:	bf00      	nop
 8012bb2:	bf00      	nop
 8012bb4:	e7fd      	b.n	8012bb2 <prvReadBytesFromBuffer+0xb4>
			( void ) memcpy( ( void * ) &( pucData[ xFirstLength ] ), ( void * ) ( pxStreamBuffer->pucBuffer ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 8012bb6:	68ba      	ldr	r2, [r7, #8]
 8012bb8:	69fb      	ldr	r3, [r7, #28]
 8012bba:	18d0      	adds	r0, r2, r3
 8012bbc:	68fb      	ldr	r3, [r7, #12]
 8012bbe:	6999      	ldr	r1, [r3, #24]
 8012bc0:	6a3a      	ldr	r2, [r7, #32]
 8012bc2:	69fb      	ldr	r3, [r7, #28]
 8012bc4:	1ad3      	subs	r3, r2, r3
 8012bc6:	461a      	mov	r2, r3
 8012bc8:	f017 f991 	bl	8029eee <memcpy>
			mtCOVERAGE_TEST_MARKER();
		}

		/* Move the tail pointer to effectively remove the data read from
		the buffer. */
		xNextTail += xCount;
 8012bcc:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012bce:	6a3b      	ldr	r3, [r7, #32]
 8012bd0:	4413      	add	r3, r2
 8012bd2:	627b      	str	r3, [r7, #36]	@ 0x24

		if( xNextTail >= pxStreamBuffer->xLength )
 8012bd4:	68fb      	ldr	r3, [r7, #12]
 8012bd6:	689b      	ldr	r3, [r3, #8]
 8012bd8:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012bda:	429a      	cmp	r2, r3
 8012bdc:	d304      	bcc.n	8012be8 <prvReadBytesFromBuffer+0xea>
		{
			xNextTail -= pxStreamBuffer->xLength;
 8012bde:	68fb      	ldr	r3, [r7, #12]
 8012be0:	689b      	ldr	r3, [r3, #8]
 8012be2:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012be4:	1ad3      	subs	r3, r2, r3
 8012be6:	627b      	str	r3, [r7, #36]	@ 0x24
		}

		pxStreamBuffer->xTail = xNextTail;
 8012be8:	68fb      	ldr	r3, [r7, #12]
 8012bea:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012bec:	601a      	str	r2, [r3, #0]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xCount;
 8012bee:	6a3b      	ldr	r3, [r7, #32]
}
 8012bf0:	4618      	mov	r0, r3
 8012bf2:	3728      	adds	r7, #40	@ 0x28
 8012bf4:	46bd      	mov	sp, r7
 8012bf6:	bd80      	pop	{r7, pc}

08012bf8 <prvBytesInBuffer>:
/*-----------------------------------------------------------*/

static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer )
{
 8012bf8:	b480      	push	{r7}
 8012bfa:	b085      	sub	sp, #20
 8012bfc:	af00      	add	r7, sp, #0
 8012bfe:	6078      	str	r0, [r7, #4]
/* Returns the distance between xTail and xHead. */
size_t xCount;

	xCount = pxStreamBuffer->xLength + pxStreamBuffer->xHead;
 8012c00:	687b      	ldr	r3, [r7, #4]
 8012c02:	689a      	ldr	r2, [r3, #8]
 8012c04:	687b      	ldr	r3, [r7, #4]
 8012c06:	685b      	ldr	r3, [r3, #4]
 8012c08:	4413      	add	r3, r2
 8012c0a:	60fb      	str	r3, [r7, #12]
	xCount -= pxStreamBuffer->xTail;
 8012c0c:	687b      	ldr	r3, [r7, #4]
 8012c0e:	681b      	ldr	r3, [r3, #0]
 8012c10:	68fa      	ldr	r2, [r7, #12]
 8012c12:	1ad3      	subs	r3, r2, r3
 8012c14:	60fb      	str	r3, [r7, #12]
	if ( xCount >= pxStreamBuffer->xLength )
 8012c16:	687b      	ldr	r3, [r7, #4]
 8012c18:	689b      	ldr	r3, [r3, #8]
 8012c1a:	68fa      	ldr	r2, [r7, #12]
 8012c1c:	429a      	cmp	r2, r3
 8012c1e:	d304      	bcc.n	8012c2a <prvBytesInBuffer+0x32>
	{
		xCount -= pxStreamBuffer->xLength;
 8012c20:	687b      	ldr	r3, [r7, #4]
 8012c22:	689b      	ldr	r3, [r3, #8]
 8012c24:	68fa      	ldr	r2, [r7, #12]
 8012c26:	1ad3      	subs	r3, r2, r3
 8012c28:	60fb      	str	r3, [r7, #12]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xCount;
 8012c2a:	68fb      	ldr	r3, [r7, #12]
}
 8012c2c:	4618      	mov	r0, r3
 8012c2e:	3714      	adds	r7, #20
 8012c30:	46bd      	mov	sp, r7
 8012c32:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012c36:	4770      	bx	lr

08012c38 <prvInitialiseNewStreamBuffer>:
static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
										  uint8_t * const pucBuffer,
										  size_t xBufferSizeBytes,
										  size_t xTriggerLevelBytes,
										  uint8_t ucFlags )
{
 8012c38:	b580      	push	{r7, lr}
 8012c3a:	b086      	sub	sp, #24
 8012c3c:	af00      	add	r7, sp, #0
 8012c3e:	60f8      	str	r0, [r7, #12]
 8012c40:	60b9      	str	r1, [r7, #8]
 8012c42:	607a      	str	r2, [r7, #4]
 8012c44:	603b      	str	r3, [r7, #0]
	#if( configASSERT_DEFINED == 1 )
	{
		/* The value written just has to be identifiable when looking at the
		memory.  Don't use 0xA5 as that is the stack fill value and could
		result in confusion as to what is actually being observed. */
		const BaseType_t xWriteValue = 0x55;
 8012c46:	2355      	movs	r3, #85	@ 0x55
 8012c48:	617b      	str	r3, [r7, #20]
		configASSERT( memset( pucBuffer, ( int ) xWriteValue, xBufferSizeBytes ) == pucBuffer );
 8012c4a:	687a      	ldr	r2, [r7, #4]
 8012c4c:	6979      	ldr	r1, [r7, #20]
 8012c4e:	68b8      	ldr	r0, [r7, #8]
 8012c50:	f017 f856 	bl	8029d00 <memset>
 8012c54:	4602      	mov	r2, r0
 8012c56:	68bb      	ldr	r3, [r7, #8]
 8012c58:	4293      	cmp	r3, r2
 8012c5a:	d00b      	beq.n	8012c74 <prvInitialiseNewStreamBuffer+0x3c>
	__asm volatile
 8012c5c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012c60:	f383 8811 	msr	BASEPRI, r3
 8012c64:	f3bf 8f6f 	isb	sy
 8012c68:	f3bf 8f4f 	dsb	sy
 8012c6c:	613b      	str	r3, [r7, #16]
}
 8012c6e:	bf00      	nop
 8012c70:	bf00      	nop
 8012c72:	e7fd      	b.n	8012c70 <prvInitialiseNewStreamBuffer+0x38>
	} /*lint !e529 !e438 xWriteValue is only used if configASSERT() is defined. */
	#endif

	( void ) memset( ( void * ) pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) ); /*lint !e9087 memset() requires void *. */
 8012c74:	2224      	movs	r2, #36	@ 0x24
 8012c76:	2100      	movs	r1, #0
 8012c78:	68f8      	ldr	r0, [r7, #12]
 8012c7a:	f017 f841 	bl	8029d00 <memset>
	pxStreamBuffer->pucBuffer = pucBuffer;
 8012c7e:	68fb      	ldr	r3, [r7, #12]
 8012c80:	68ba      	ldr	r2, [r7, #8]
 8012c82:	619a      	str	r2, [r3, #24]
	pxStreamBuffer->xLength = xBufferSizeBytes;
 8012c84:	68fb      	ldr	r3, [r7, #12]
 8012c86:	687a      	ldr	r2, [r7, #4]
 8012c88:	609a      	str	r2, [r3, #8]
	pxStreamBuffer->xTriggerLevelBytes = xTriggerLevelBytes;
 8012c8a:	68fb      	ldr	r3, [r7, #12]
 8012c8c:	683a      	ldr	r2, [r7, #0]
 8012c8e:	60da      	str	r2, [r3, #12]
	pxStreamBuffer->ucFlags = ucFlags;
 8012c90:	68fb      	ldr	r3, [r7, #12]
 8012c92:	f897 2020 	ldrb.w	r2, [r7, #32]
 8012c96:	771a      	strb	r2, [r3, #28]
}
 8012c98:	bf00      	nop
 8012c9a:	3718      	adds	r7, #24
 8012c9c:	46bd      	mov	sp, r7
 8012c9e:	bd80      	pop	{r7, pc}

08012ca0 <xTaskCreateStatic>:
									const uint32_t ulStackDepth,
									void * const pvParameters,
									UBaseType_t uxPriority,
									StackType_t * const puxStackBuffer,
									StaticTask_t * const pxTaskBuffer )
	{
 8012ca0:	b580      	push	{r7, lr}
 8012ca2:	b08e      	sub	sp, #56	@ 0x38
 8012ca4:	af04      	add	r7, sp, #16
 8012ca6:	60f8      	str	r0, [r7, #12]
 8012ca8:	60b9      	str	r1, [r7, #8]
 8012caa:	607a      	str	r2, [r7, #4]
 8012cac:	603b      	str	r3, [r7, #0]
	TCB_t *pxNewTCB;
	TaskHandle_t xReturn;

		configASSERT( puxStackBuffer != NULL );
 8012cae:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8012cb0:	2b00      	cmp	r3, #0
 8012cb2:	d10b      	bne.n	8012ccc <xTaskCreateStatic+0x2c>
	__asm volatile
 8012cb4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012cb8:	f383 8811 	msr	BASEPRI, r3
 8012cbc:	f3bf 8f6f 	isb	sy
 8012cc0:	f3bf 8f4f 	dsb	sy
 8012cc4:	623b      	str	r3, [r7, #32]
}
 8012cc6:	bf00      	nop
 8012cc8:	bf00      	nop
 8012cca:	e7fd      	b.n	8012cc8 <xTaskCreateStatic+0x28>
		configASSERT( pxTaskBuffer != NULL );
 8012ccc:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012cce:	2b00      	cmp	r3, #0
 8012cd0:	d10b      	bne.n	8012cea <xTaskCreateStatic+0x4a>
	__asm volatile
 8012cd2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012cd6:	f383 8811 	msr	BASEPRI, r3
 8012cda:	f3bf 8f6f 	isb	sy
 8012cde:	f3bf 8f4f 	dsb	sy
 8012ce2:	61fb      	str	r3, [r7, #28]
}
 8012ce4:	bf00      	nop
 8012ce6:	bf00      	nop
 8012ce8:	e7fd      	b.n	8012ce6 <xTaskCreateStatic+0x46>
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticTask_t equals the size of the real task
			structure. */
			volatile size_t xSize = sizeof( StaticTask_t );
 8012cea:	23a8      	movs	r3, #168	@ 0xa8
 8012cec:	613b      	str	r3, [r7, #16]
			configASSERT( xSize == sizeof( TCB_t ) );
 8012cee:	693b      	ldr	r3, [r7, #16]
 8012cf0:	2ba8      	cmp	r3, #168	@ 0xa8
 8012cf2:	d00b      	beq.n	8012d0c <xTaskCreateStatic+0x6c>
	__asm volatile
 8012cf4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012cf8:	f383 8811 	msr	BASEPRI, r3
 8012cfc:	f3bf 8f6f 	isb	sy
 8012d00:	f3bf 8f4f 	dsb	sy
 8012d04:	61bb      	str	r3, [r7, #24]
}
 8012d06:	bf00      	nop
 8012d08:	bf00      	nop
 8012d0a:	e7fd      	b.n	8012d08 <xTaskCreateStatic+0x68>
			( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
 8012d0c:	693b      	ldr	r3, [r7, #16]
		}
		#endif /* configASSERT_DEFINED */


		if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
 8012d0e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012d10:	2b00      	cmp	r3, #0
 8012d12:	d01e      	beq.n	8012d52 <xTaskCreateStatic+0xb2>
 8012d14:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8012d16:	2b00      	cmp	r3, #0
 8012d18:	d01b      	beq.n	8012d52 <xTaskCreateStatic+0xb2>
		{
			/* The memory used for the task's TCB and stack are passed into this
			function - use them. */
			pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 8012d1a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012d1c:	627b      	str	r3, [r7, #36]	@ 0x24
			pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
 8012d1e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012d20:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 8012d22:	631a      	str	r2, [r3, #48]	@ 0x30

			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
			{
				/* Tasks can be created statically or dynamically, so note this
				task was created statically in case the task is later deleted. */
				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
 8012d24:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012d26:	2202      	movs	r2, #2
 8012d28:	f883 20a5 	strb.w	r2, [r3, #165]	@ 0xa5
			}
			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */

			prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
 8012d2c:	2300      	movs	r3, #0
 8012d2e:	9303      	str	r3, [sp, #12]
 8012d30:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012d32:	9302      	str	r3, [sp, #8]
 8012d34:	f107 0314 	add.w	r3, r7, #20
 8012d38:	9301      	str	r3, [sp, #4]
 8012d3a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012d3c:	9300      	str	r3, [sp, #0]
 8012d3e:	683b      	ldr	r3, [r7, #0]
 8012d40:	687a      	ldr	r2, [r7, #4]
 8012d42:	68b9      	ldr	r1, [r7, #8]
 8012d44:	68f8      	ldr	r0, [r7, #12]
 8012d46:	f000 f851 	bl	8012dec <prvInitialiseNewTask>
			prvAddNewTaskToReadyList( pxNewTCB );
 8012d4a:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8012d4c:	f000 f8f6 	bl	8012f3c <prvAddNewTaskToReadyList>
 8012d50:	e001      	b.n	8012d56 <xTaskCreateStatic+0xb6>
		}
		else
		{
			xReturn = NULL;
 8012d52:	2300      	movs	r3, #0
 8012d54:	617b      	str	r3, [r7, #20]
		}

		return xReturn;
 8012d56:	697b      	ldr	r3, [r7, #20]
	}
 8012d58:	4618      	mov	r0, r3
 8012d5a:	3728      	adds	r7, #40	@ 0x28
 8012d5c:	46bd      	mov	sp, r7
 8012d5e:	bd80      	pop	{r7, pc}

08012d60 <xTaskCreate>:
							const char * const pcName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
							const configSTACK_DEPTH_TYPE usStackDepth,
							void * const pvParameters,
							UBaseType_t uxPriority,
							TaskHandle_t * const pxCreatedTask )
	{
 8012d60:	b580      	push	{r7, lr}
 8012d62:	b08c      	sub	sp, #48	@ 0x30
 8012d64:	af04      	add	r7, sp, #16
 8012d66:	60f8      	str	r0, [r7, #12]
 8012d68:	60b9      	str	r1, [r7, #8]
 8012d6a:	603b      	str	r3, [r7, #0]
 8012d6c:	4613      	mov	r3, r2
 8012d6e:	80fb      	strh	r3, [r7, #6]
		#else /* portSTACK_GROWTH */
		{
		StackType_t *pxStack;

			/* Allocate space for the stack used by the task being created. */
			pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
 8012d70:	88fb      	ldrh	r3, [r7, #6]
 8012d72:	009b      	lsls	r3, r3, #2
 8012d74:	4618      	mov	r0, r3
 8012d76:	f002 f801 	bl	8014d7c <pvPortMalloc>
 8012d7a:	6178      	str	r0, [r7, #20]

			if( pxStack != NULL )
 8012d7c:	697b      	ldr	r3, [r7, #20]
 8012d7e:	2b00      	cmp	r3, #0
 8012d80:	d00e      	beq.n	8012da0 <xTaskCreate+0x40>
			{
				/* Allocate space for the TCB. */
				pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
 8012d82:	20a8      	movs	r0, #168	@ 0xa8
 8012d84:	f001 fffa 	bl	8014d7c <pvPortMalloc>
 8012d88:	61f8      	str	r0, [r7, #28]

				if( pxNewTCB != NULL )
 8012d8a:	69fb      	ldr	r3, [r7, #28]
 8012d8c:	2b00      	cmp	r3, #0
 8012d8e:	d003      	beq.n	8012d98 <xTaskCreate+0x38>
				{
					/* Store the stack location in the TCB. */
					pxNewTCB->pxStack = pxStack;
 8012d90:	69fb      	ldr	r3, [r7, #28]
 8012d92:	697a      	ldr	r2, [r7, #20]
 8012d94:	631a      	str	r2, [r3, #48]	@ 0x30
 8012d96:	e005      	b.n	8012da4 <xTaskCreate+0x44>
				}
				else
				{
					/* The stack cannot be used as the TCB was not created.  Free
					it again. */
					vPortFree( pxStack );
 8012d98:	6978      	ldr	r0, [r7, #20]
 8012d9a:	f002 f8bd 	bl	8014f18 <vPortFree>
 8012d9e:	e001      	b.n	8012da4 <xTaskCreate+0x44>
				}
			}
			else
			{
				pxNewTCB = NULL;
 8012da0:	2300      	movs	r3, #0
 8012da2:	61fb      	str	r3, [r7, #28]
			}
		}
		#endif /* portSTACK_GROWTH */

		if( pxNewTCB != NULL )
 8012da4:	69fb      	ldr	r3, [r7, #28]
 8012da6:	2b00      	cmp	r3, #0
 8012da8:	d017      	beq.n	8012dda <xTaskCreate+0x7a>
		{
			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */
			{
				/* Tasks can be created statically or dynamically, so note this
				task was created dynamically in case it is later deleted. */
				pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
 8012daa:	69fb      	ldr	r3, [r7, #28]
 8012dac:	2200      	movs	r2, #0
 8012dae:	f883 20a5 	strb.w	r2, [r3, #165]	@ 0xa5
			}
			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */

			prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
 8012db2:	88fa      	ldrh	r2, [r7, #6]
 8012db4:	2300      	movs	r3, #0
 8012db6:	9303      	str	r3, [sp, #12]
 8012db8:	69fb      	ldr	r3, [r7, #28]
 8012dba:	9302      	str	r3, [sp, #8]
 8012dbc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012dbe:	9301      	str	r3, [sp, #4]
 8012dc0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012dc2:	9300      	str	r3, [sp, #0]
 8012dc4:	683b      	ldr	r3, [r7, #0]
 8012dc6:	68b9      	ldr	r1, [r7, #8]
 8012dc8:	68f8      	ldr	r0, [r7, #12]
 8012dca:	f000 f80f 	bl	8012dec <prvInitialiseNewTask>
			prvAddNewTaskToReadyList( pxNewTCB );
 8012dce:	69f8      	ldr	r0, [r7, #28]
 8012dd0:	f000 f8b4 	bl	8012f3c <prvAddNewTaskToReadyList>
			xReturn = pdPASS;
 8012dd4:	2301      	movs	r3, #1
 8012dd6:	61bb      	str	r3, [r7, #24]
 8012dd8:	e002      	b.n	8012de0 <xTaskCreate+0x80>
		}
		else
		{
			xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
 8012dda:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8012dde:	61bb      	str	r3, [r7, #24]
		}

		return xReturn;
 8012de0:	69bb      	ldr	r3, [r7, #24]
	}
 8012de2:	4618      	mov	r0, r3
 8012de4:	3720      	adds	r7, #32
 8012de6:	46bd      	mov	sp, r7
 8012de8:	bd80      	pop	{r7, pc}
	...

08012dec <prvInitialiseNewTask>:
									void * const pvParameters,
									UBaseType_t uxPriority,
									TaskHandle_t * const pxCreatedTask,
									TCB_t *pxNewTCB,
									const MemoryRegion_t * const xRegions )
{
 8012dec:	b580      	push	{r7, lr}
 8012dee:	b088      	sub	sp, #32
 8012df0:	af00      	add	r7, sp, #0
 8012df2:	60f8      	str	r0, [r7, #12]
 8012df4:	60b9      	str	r1, [r7, #8]
 8012df6:	607a      	str	r2, [r7, #4]
 8012df8:	603b      	str	r3, [r7, #0]

	/* Avoid dependency on memset() if it is not required. */
	#if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 )
	{
		/* Fill the stack with a known value to assist debugging. */
		( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
 8012dfa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012dfc:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8012dfe:	687b      	ldr	r3, [r7, #4]
 8012e00:	009b      	lsls	r3, r3, #2
 8012e02:	461a      	mov	r2, r3
 8012e04:	21a5      	movs	r1, #165	@ 0xa5
 8012e06:	f016 ff7b 	bl	8029d00 <memset>
	grows from high memory to low (as per the 80x86) or vice versa.
	portSTACK_GROWTH is used to make the result positive or negative as required
	by the port. */
	#if( portSTACK_GROWTH < 0 )
	{
		pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
 8012e0a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012e0c:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 8012e0e:	6879      	ldr	r1, [r7, #4]
 8012e10:	f06f 4340 	mvn.w	r3, #3221225472	@ 0xc0000000
 8012e14:	440b      	add	r3, r1
 8012e16:	009b      	lsls	r3, r3, #2
 8012e18:	4413      	add	r3, r2
 8012e1a:	61bb      	str	r3, [r7, #24]
		pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type.  Checked by assert(). */
 8012e1c:	69bb      	ldr	r3, [r7, #24]
 8012e1e:	f023 0307 	bic.w	r3, r3, #7
 8012e22:	61bb      	str	r3, [r7, #24]

		/* Check the alignment of the calculated top of stack is correct. */
		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
 8012e24:	69bb      	ldr	r3, [r7, #24]
 8012e26:	f003 0307 	and.w	r3, r3, #7
 8012e2a:	2b00      	cmp	r3, #0
 8012e2c:	d00b      	beq.n	8012e46 <prvInitialiseNewTask+0x5a>
	__asm volatile
 8012e2e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012e32:	f383 8811 	msr	BASEPRI, r3
 8012e36:	f3bf 8f6f 	isb	sy
 8012e3a:	f3bf 8f4f 	dsb	sy
 8012e3e:	617b      	str	r3, [r7, #20]
}
 8012e40:	bf00      	nop
 8012e42:	bf00      	nop
 8012e44:	e7fd      	b.n	8012e42 <prvInitialiseNewTask+0x56>
		pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
	}
	#endif /* portSTACK_GROWTH */

	/* Store the task name in the TCB. */
	if( pcName != NULL )
 8012e46:	68bb      	ldr	r3, [r7, #8]
 8012e48:	2b00      	cmp	r3, #0
 8012e4a:	d01f      	beq.n	8012e8c <prvInitialiseNewTask+0xa0>
	{
		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
 8012e4c:	2300      	movs	r3, #0
 8012e4e:	61fb      	str	r3, [r7, #28]
 8012e50:	e012      	b.n	8012e78 <prvInitialiseNewTask+0x8c>
		{
			pxNewTCB->pcTaskName[ x ] = pcName[ x ];
 8012e52:	68ba      	ldr	r2, [r7, #8]
 8012e54:	69fb      	ldr	r3, [r7, #28]
 8012e56:	4413      	add	r3, r2
 8012e58:	7819      	ldrb	r1, [r3, #0]
 8012e5a:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8012e5c:	69fb      	ldr	r3, [r7, #28]
 8012e5e:	4413      	add	r3, r2
 8012e60:	3334      	adds	r3, #52	@ 0x34
 8012e62:	460a      	mov	r2, r1
 8012e64:	701a      	strb	r2, [r3, #0]

			/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
			configMAX_TASK_NAME_LEN characters just in case the memory after the
			string is not accessible (extremely unlikely). */
			if( pcName[ x ] == ( char ) 0x00 )
 8012e66:	68ba      	ldr	r2, [r7, #8]
 8012e68:	69fb      	ldr	r3, [r7, #28]
 8012e6a:	4413      	add	r3, r2
 8012e6c:	781b      	ldrb	r3, [r3, #0]
 8012e6e:	2b00      	cmp	r3, #0
 8012e70:	d006      	beq.n	8012e80 <prvInitialiseNewTask+0x94>
		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
 8012e72:	69fb      	ldr	r3, [r7, #28]
 8012e74:	3301      	adds	r3, #1
 8012e76:	61fb      	str	r3, [r7, #28]
 8012e78:	69fb      	ldr	r3, [r7, #28]
 8012e7a:	2b0f      	cmp	r3, #15
 8012e7c:	d9e9      	bls.n	8012e52 <prvInitialiseNewTask+0x66>
 8012e7e:	e000      	b.n	8012e82 <prvInitialiseNewTask+0x96>
			{
				break;
 8012e80:	bf00      	nop
			}
		}

		/* Ensure the name string is terminated in the case that the string length
		was greater or equal to configMAX_TASK_NAME_LEN. */
		pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
 8012e82:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012e84:	2200      	movs	r2, #0
 8012e86:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
 8012e8a:	e003      	b.n	8012e94 <prvInitialiseNewTask+0xa8>
	}
	else
	{
		/* The task has not been given a name, so just ensure there is a NULL
		terminator when it is read out. */
		pxNewTCB->pcTaskName[ 0 ] = 0x00;
 8012e8c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012e8e:	2200      	movs	r2, #0
 8012e90:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
	}

	/* This is used as an array index so must ensure it's not too large.  First
	remove the privilege bit if one is present. */
	if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
 8012e94:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012e96:	2b37      	cmp	r3, #55	@ 0x37
 8012e98:	d901      	bls.n	8012e9e <prvInitialiseNewTask+0xb2>
	{
		uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
 8012e9a:	2337      	movs	r3, #55	@ 0x37
 8012e9c:	62bb      	str	r3, [r7, #40]	@ 0x28
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxNewTCB->uxPriority = uxPriority;
 8012e9e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012ea0:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8012ea2:	62da      	str	r2, [r3, #44]	@ 0x2c
	#if ( configUSE_MUTEXES == 1 )
	{
		pxNewTCB->uxBasePriority = uxPriority;
 8012ea4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012ea6:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8012ea8:	64da      	str	r2, [r3, #76]	@ 0x4c
		pxNewTCB->uxMutexesHeld = 0;
 8012eaa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012eac:	2200      	movs	r2, #0
 8012eae:	651a      	str	r2, [r3, #80]	@ 0x50
	}
	#endif /* configUSE_MUTEXES */

	vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
 8012eb0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012eb2:	3304      	adds	r3, #4
 8012eb4:	4618      	mov	r0, r3
 8012eb6:	f7fe f9a5 	bl	8011204 <vListInitialiseItem>
	vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
 8012eba:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012ebc:	3318      	adds	r3, #24
 8012ebe:	4618      	mov	r0, r3
 8012ec0:	f7fe f9a0 	bl	8011204 <vListInitialiseItem>

	/* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
	back to	the containing TCB from a generic item in a list. */
	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
 8012ec4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012ec6:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8012ec8:	611a      	str	r2, [r3, #16]

	/* Event lists are always in priority order. */
	listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8012eca:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012ecc:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 8012ed0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012ed2:	619a      	str	r2, [r3, #24]
	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
 8012ed4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012ed6:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8012ed8:	625a      	str	r2, [r3, #36]	@ 0x24
	}
	#endif

	#if ( configUSE_TASK_NOTIFICATIONS == 1 )
	{
		pxNewTCB->ulNotifiedValue = 0;
 8012eda:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012edc:	2200      	movs	r2, #0
 8012ede:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
		pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 8012ee2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012ee4:	2200      	movs	r2, #0
 8012ee6:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
	#if ( configUSE_NEWLIB_REENTRANT == 1 )
	{
		/* Initialise this task's Newlib reent structure.
		See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
		for additional information. */
		_REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
 8012eea:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012eec:	3354      	adds	r3, #84	@ 0x54
 8012eee:	224c      	movs	r2, #76	@ 0x4c
 8012ef0:	2100      	movs	r1, #0
 8012ef2:	4618      	mov	r0, r3
 8012ef4:	f016 ff04 	bl	8029d00 <memset>
 8012ef8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012efa:	4a0d      	ldr	r2, [pc, #52]	@ (8012f30 <prvInitialiseNewTask+0x144>)
 8012efc:	659a      	str	r2, [r3, #88]	@ 0x58
 8012efe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012f00:	4a0c      	ldr	r2, [pc, #48]	@ (8012f34 <prvInitialiseNewTask+0x148>)
 8012f02:	65da      	str	r2, [r3, #92]	@ 0x5c
 8012f04:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012f06:	4a0c      	ldr	r2, [pc, #48]	@ (8012f38 <prvInitialiseNewTask+0x14c>)
 8012f08:	661a      	str	r2, [r3, #96]	@ 0x60
			}
			#endif /* portSTACK_GROWTH */
		}
		#else /* portHAS_STACK_OVERFLOW_CHECKING */
		{
			pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
 8012f0a:	683a      	ldr	r2, [r7, #0]
 8012f0c:	68f9      	ldr	r1, [r7, #12]
 8012f0e:	69b8      	ldr	r0, [r7, #24]
 8012f10:	f001 fce0 	bl	80148d4 <pxPortInitialiseStack>
 8012f14:	4602      	mov	r2, r0
 8012f16:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012f18:	601a      	str	r2, [r3, #0]
		}
		#endif /* portHAS_STACK_OVERFLOW_CHECKING */
	}
	#endif /* portUSING_MPU_WRAPPERS */

	if( pxCreatedTask != NULL )
 8012f1a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012f1c:	2b00      	cmp	r3, #0
 8012f1e:	d002      	beq.n	8012f26 <prvInitialiseNewTask+0x13a>
	{
		/* Pass the handle out in an anonymous way.  The handle can be used to
		change the created task's priority, delete the created task, etc.*/
		*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
 8012f20:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012f22:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8012f24:	601a      	str	r2, [r3, #0]
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8012f26:	bf00      	nop
 8012f28:	3720      	adds	r7, #32
 8012f2a:	46bd      	mov	sp, r7
 8012f2c:	bd80      	pop	{r7, pc}
 8012f2e:	bf00      	nop
 8012f30:	2402b044 	.word	0x2402b044
 8012f34:	2402b0ac 	.word	0x2402b0ac
 8012f38:	2402b114 	.word	0x2402b114

08012f3c <prvAddNewTaskToReadyList>:
/*-----------------------------------------------------------*/

static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
{
 8012f3c:	b580      	push	{r7, lr}
 8012f3e:	b082      	sub	sp, #8
 8012f40:	af00      	add	r7, sp, #0
 8012f42:	6078      	str	r0, [r7, #4]
	/* Ensure interrupts don't access the task lists while the lists are being
	updated. */
	taskENTER_CRITICAL();
 8012f44:	f001 fdf8 	bl	8014b38 <vPortEnterCritical>
	{
		uxCurrentNumberOfTasks++;
 8012f48:	4b2d      	ldr	r3, [pc, #180]	@ (8013000 <prvAddNewTaskToReadyList+0xc4>)
 8012f4a:	681b      	ldr	r3, [r3, #0]
 8012f4c:	3301      	adds	r3, #1
 8012f4e:	4a2c      	ldr	r2, [pc, #176]	@ (8013000 <prvAddNewTaskToReadyList+0xc4>)
 8012f50:	6013      	str	r3, [r2, #0]
		if( pxCurrentTCB == NULL )
 8012f52:	4b2c      	ldr	r3, [pc, #176]	@ (8013004 <prvAddNewTaskToReadyList+0xc8>)
 8012f54:	681b      	ldr	r3, [r3, #0]
 8012f56:	2b00      	cmp	r3, #0
 8012f58:	d109      	bne.n	8012f6e <prvAddNewTaskToReadyList+0x32>
		{
			/* There are no other tasks, or all the other tasks are in
			the suspended state - make this the current task. */
			pxCurrentTCB = pxNewTCB;
 8012f5a:	4a2a      	ldr	r2, [pc, #168]	@ (8013004 <prvAddNewTaskToReadyList+0xc8>)
 8012f5c:	687b      	ldr	r3, [r7, #4]
 8012f5e:	6013      	str	r3, [r2, #0]

			if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
 8012f60:	4b27      	ldr	r3, [pc, #156]	@ (8013000 <prvAddNewTaskToReadyList+0xc4>)
 8012f62:	681b      	ldr	r3, [r3, #0]
 8012f64:	2b01      	cmp	r3, #1
 8012f66:	d110      	bne.n	8012f8a <prvAddNewTaskToReadyList+0x4e>
			{
				/* This is the first task to be created so do the preliminary
				initialisation required.  We will not recover if this call
				fails, but we will report the failure. */
				prvInitialiseTaskLists();
 8012f68:	f000 fc76 	bl	8013858 <prvInitialiseTaskLists>
 8012f6c:	e00d      	b.n	8012f8a <prvAddNewTaskToReadyList+0x4e>
		else
		{
			/* If the scheduler is not already running, make this task the
			current task if it is the highest priority task to be created
			so far. */
			if( xSchedulerRunning == pdFALSE )
 8012f6e:	4b26      	ldr	r3, [pc, #152]	@ (8013008 <prvAddNewTaskToReadyList+0xcc>)
 8012f70:	681b      	ldr	r3, [r3, #0]
 8012f72:	2b00      	cmp	r3, #0
 8012f74:	d109      	bne.n	8012f8a <prvAddNewTaskToReadyList+0x4e>
			{
				if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
 8012f76:	4b23      	ldr	r3, [pc, #140]	@ (8013004 <prvAddNewTaskToReadyList+0xc8>)
 8012f78:	681b      	ldr	r3, [r3, #0]
 8012f7a:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012f7c:	687b      	ldr	r3, [r7, #4]
 8012f7e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8012f80:	429a      	cmp	r2, r3
 8012f82:	d802      	bhi.n	8012f8a <prvAddNewTaskToReadyList+0x4e>
				{
					pxCurrentTCB = pxNewTCB;
 8012f84:	4a1f      	ldr	r2, [pc, #124]	@ (8013004 <prvAddNewTaskToReadyList+0xc8>)
 8012f86:	687b      	ldr	r3, [r7, #4]
 8012f88:	6013      	str	r3, [r2, #0]
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}

		uxTaskNumber++;
 8012f8a:	4b20      	ldr	r3, [pc, #128]	@ (801300c <prvAddNewTaskToReadyList+0xd0>)
 8012f8c:	681b      	ldr	r3, [r3, #0]
 8012f8e:	3301      	adds	r3, #1
 8012f90:	4a1e      	ldr	r2, [pc, #120]	@ (801300c <prvAddNewTaskToReadyList+0xd0>)
 8012f92:	6013      	str	r3, [r2, #0]

		#if ( configUSE_TRACE_FACILITY == 1 )
		{
			/* Add a counter into the TCB for tracing only. */
			pxNewTCB->uxTCBNumber = uxTaskNumber;
 8012f94:	4b1d      	ldr	r3, [pc, #116]	@ (801300c <prvAddNewTaskToReadyList+0xd0>)
 8012f96:	681a      	ldr	r2, [r3, #0]
 8012f98:	687b      	ldr	r3, [r7, #4]
 8012f9a:	645a      	str	r2, [r3, #68]	@ 0x44
		}
		#endif /* configUSE_TRACE_FACILITY */
		traceTASK_CREATE( pxNewTCB );

		prvAddTaskToReadyList( pxNewTCB );
 8012f9c:	687b      	ldr	r3, [r7, #4]
 8012f9e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012fa0:	4b1b      	ldr	r3, [pc, #108]	@ (8013010 <prvAddNewTaskToReadyList+0xd4>)
 8012fa2:	681b      	ldr	r3, [r3, #0]
 8012fa4:	429a      	cmp	r2, r3
 8012fa6:	d903      	bls.n	8012fb0 <prvAddNewTaskToReadyList+0x74>
 8012fa8:	687b      	ldr	r3, [r7, #4]
 8012faa:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8012fac:	4a18      	ldr	r2, [pc, #96]	@ (8013010 <prvAddNewTaskToReadyList+0xd4>)
 8012fae:	6013      	str	r3, [r2, #0]
 8012fb0:	687b      	ldr	r3, [r7, #4]
 8012fb2:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012fb4:	4613      	mov	r3, r2
 8012fb6:	009b      	lsls	r3, r3, #2
 8012fb8:	4413      	add	r3, r2
 8012fba:	009b      	lsls	r3, r3, #2
 8012fbc:	4a15      	ldr	r2, [pc, #84]	@ (8013014 <prvAddNewTaskToReadyList+0xd8>)
 8012fbe:	441a      	add	r2, r3
 8012fc0:	687b      	ldr	r3, [r7, #4]
 8012fc2:	3304      	adds	r3, #4
 8012fc4:	4619      	mov	r1, r3
 8012fc6:	4610      	mov	r0, r2
 8012fc8:	f7fe f929 	bl	801121e <vListInsertEnd>

		portSETUP_TCB( pxNewTCB );
	}
	taskEXIT_CRITICAL();
 8012fcc:	f001 fde6 	bl	8014b9c <vPortExitCritical>

	if( xSchedulerRunning != pdFALSE )
 8012fd0:	4b0d      	ldr	r3, [pc, #52]	@ (8013008 <prvAddNewTaskToReadyList+0xcc>)
 8012fd2:	681b      	ldr	r3, [r3, #0]
 8012fd4:	2b00      	cmp	r3, #0
 8012fd6:	d00e      	beq.n	8012ff6 <prvAddNewTaskToReadyList+0xba>
	{
		/* If the created task is of a higher priority than the current task
		then it should run now. */
		if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
 8012fd8:	4b0a      	ldr	r3, [pc, #40]	@ (8013004 <prvAddNewTaskToReadyList+0xc8>)
 8012fda:	681b      	ldr	r3, [r3, #0]
 8012fdc:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012fde:	687b      	ldr	r3, [r7, #4]
 8012fe0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8012fe2:	429a      	cmp	r2, r3
 8012fe4:	d207      	bcs.n	8012ff6 <prvAddNewTaskToReadyList+0xba>
		{
			taskYIELD_IF_USING_PREEMPTION();
 8012fe6:	4b0c      	ldr	r3, [pc, #48]	@ (8013018 <prvAddNewTaskToReadyList+0xdc>)
 8012fe8:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012fec:	601a      	str	r2, [r3, #0]
 8012fee:	f3bf 8f4f 	dsb	sy
 8012ff2:	f3bf 8f6f 	isb	sy
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8012ff6:	bf00      	nop
 8012ff8:	3708      	adds	r7, #8
 8012ffa:	46bd      	mov	sp, r7
 8012ffc:	bd80      	pop	{r7, pc}
 8012ffe:	bf00      	nop
 8013000:	24004164 	.word	0x24004164
 8013004:	24003c90 	.word	0x24003c90
 8013008:	24004170 	.word	0x24004170
 801300c:	24004180 	.word	0x24004180
 8013010:	2400416c 	.word	0x2400416c
 8013014:	24003c94 	.word	0x24003c94
 8013018:	e000ed04 	.word	0xe000ed04

0801301c <vTaskDelay>:
/*-----------------------------------------------------------*/

#if ( INCLUDE_vTaskDelay == 1 )

	void vTaskDelay( const TickType_t xTicksToDelay )
	{
 801301c:	b580      	push	{r7, lr}
 801301e:	b084      	sub	sp, #16
 8013020:	af00      	add	r7, sp, #0
 8013022:	6078      	str	r0, [r7, #4]
	BaseType_t xAlreadyYielded = pdFALSE;
 8013024:	2300      	movs	r3, #0
 8013026:	60fb      	str	r3, [r7, #12]

		/* A delay time of zero just forces a reschedule. */
		if( xTicksToDelay > ( TickType_t ) 0U )
 8013028:	687b      	ldr	r3, [r7, #4]
 801302a:	2b00      	cmp	r3, #0
 801302c:	d018      	beq.n	8013060 <vTaskDelay+0x44>
		{
			configASSERT( uxSchedulerSuspended == 0 );
 801302e:	4b14      	ldr	r3, [pc, #80]	@ (8013080 <vTaskDelay+0x64>)
 8013030:	681b      	ldr	r3, [r3, #0]
 8013032:	2b00      	cmp	r3, #0
 8013034:	d00b      	beq.n	801304e <vTaskDelay+0x32>
	__asm volatile
 8013036:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801303a:	f383 8811 	msr	BASEPRI, r3
 801303e:	f3bf 8f6f 	isb	sy
 8013042:	f3bf 8f4f 	dsb	sy
 8013046:	60bb      	str	r3, [r7, #8]
}
 8013048:	bf00      	nop
 801304a:	bf00      	nop
 801304c:	e7fd      	b.n	801304a <vTaskDelay+0x2e>
			vTaskSuspendAll();
 801304e:	f000 f88b 	bl	8013168 <vTaskSuspendAll>
				list or removed from the blocked list until the scheduler
				is resumed.

				This task cannot be in an event list as it is the currently
				executing task. */
				prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
 8013052:	2100      	movs	r1, #0
 8013054:	6878      	ldr	r0, [r7, #4]
 8013056:	f001 f88f 	bl	8014178 <prvAddCurrentTaskToDelayedList>
			}
			xAlreadyYielded = xTaskResumeAll();
 801305a:	f000 f893 	bl	8013184 <xTaskResumeAll>
 801305e:	60f8      	str	r0, [r7, #12]
			mtCOVERAGE_TEST_MARKER();
		}

		/* Force a reschedule if xTaskResumeAll has not already done so, we may
		have put ourselves to sleep. */
		if( xAlreadyYielded == pdFALSE )
 8013060:	68fb      	ldr	r3, [r7, #12]
 8013062:	2b00      	cmp	r3, #0
 8013064:	d107      	bne.n	8013076 <vTaskDelay+0x5a>
		{
			portYIELD_WITHIN_API();
 8013066:	4b07      	ldr	r3, [pc, #28]	@ (8013084 <vTaskDelay+0x68>)
 8013068:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 801306c:	601a      	str	r2, [r3, #0]
 801306e:	f3bf 8f4f 	dsb	sy
 8013072:	f3bf 8f6f 	isb	sy
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
 8013076:	bf00      	nop
 8013078:	3710      	adds	r7, #16
 801307a:	46bd      	mov	sp, r7
 801307c:	bd80      	pop	{r7, pc}
 801307e:	bf00      	nop
 8013080:	2400418c 	.word	0x2400418c
 8013084:	e000ed04 	.word	0xe000ed04

08013088 <vTaskStartScheduler>:

#endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
/*-----------------------------------------------------------*/

void vTaskStartScheduler( void )
{
 8013088:	b580      	push	{r7, lr}
 801308a:	b08a      	sub	sp, #40	@ 0x28
 801308c:	af04      	add	r7, sp, #16
BaseType_t xReturn;

	/* Add the idle task at the lowest priority. */
	#if( configSUPPORT_STATIC_ALLOCATION == 1 )
	{
		StaticTask_t *pxIdleTaskTCBBuffer = NULL;
 801308e:	2300      	movs	r3, #0
 8013090:	60bb      	str	r3, [r7, #8]
		StackType_t *pxIdleTaskStackBuffer = NULL;
 8013092:	2300      	movs	r3, #0
 8013094:	607b      	str	r3, [r7, #4]
		uint32_t ulIdleTaskStackSize;

		/* The Idle task is created using user provided RAM - obtain the
		address of the RAM then create the idle task. */
		vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
 8013096:	463a      	mov	r2, r7
 8013098:	1d39      	adds	r1, r7, #4
 801309a:	f107 0308 	add.w	r3, r7, #8
 801309e:	4618      	mov	r0, r3
 80130a0:	f7fe f85c 	bl	801115c <vApplicationGetIdleTaskMemory>
		xIdleTaskHandle = xTaskCreateStatic(	prvIdleTask,
 80130a4:	6839      	ldr	r1, [r7, #0]
 80130a6:	687b      	ldr	r3, [r7, #4]
 80130a8:	68ba      	ldr	r2, [r7, #8]
 80130aa:	9202      	str	r2, [sp, #8]
 80130ac:	9301      	str	r3, [sp, #4]
 80130ae:	2300      	movs	r3, #0
 80130b0:	9300      	str	r3, [sp, #0]
 80130b2:	2300      	movs	r3, #0
 80130b4:	460a      	mov	r2, r1
 80130b6:	4924      	ldr	r1, [pc, #144]	@ (8013148 <vTaskStartScheduler+0xc0>)
 80130b8:	4824      	ldr	r0, [pc, #144]	@ (801314c <vTaskStartScheduler+0xc4>)
 80130ba:	f7ff fdf1 	bl	8012ca0 <xTaskCreateStatic>
 80130be:	4603      	mov	r3, r0
 80130c0:	4a23      	ldr	r2, [pc, #140]	@ (8013150 <vTaskStartScheduler+0xc8>)
 80130c2:	6013      	str	r3, [r2, #0]
												( void * ) NULL, /*lint !e961.  The cast is not redundant for all compilers. */
												portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
												pxIdleTaskStackBuffer,
												pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */

		if( xIdleTaskHandle != NULL )
 80130c4:	4b22      	ldr	r3, [pc, #136]	@ (8013150 <vTaskStartScheduler+0xc8>)
 80130c6:	681b      	ldr	r3, [r3, #0]
 80130c8:	2b00      	cmp	r3, #0
 80130ca:	d002      	beq.n	80130d2 <vTaskStartScheduler+0x4a>
		{
			xReturn = pdPASS;
 80130cc:	2301      	movs	r3, #1
 80130ce:	617b      	str	r3, [r7, #20]
 80130d0:	e001      	b.n	80130d6 <vTaskStartScheduler+0x4e>
		}
		else
		{
			xReturn = pdFAIL;
 80130d2:	2300      	movs	r3, #0
 80130d4:	617b      	str	r3, [r7, #20]
	}
	#endif /* configSUPPORT_STATIC_ALLOCATION */

	#if ( configUSE_TIMERS == 1 )
	{
		if( xReturn == pdPASS )
 80130d6:	697b      	ldr	r3, [r7, #20]
 80130d8:	2b01      	cmp	r3, #1
 80130da:	d102      	bne.n	80130e2 <vTaskStartScheduler+0x5a>
		{
			xReturn = xTimerCreateTimerTask();
 80130dc:	f001 f8a0 	bl	8014220 <xTimerCreateTimerTask>
 80130e0:	6178      	str	r0, [r7, #20]
			mtCOVERAGE_TEST_MARKER();
		}
	}
	#endif /* configUSE_TIMERS */

	if( xReturn == pdPASS )
 80130e2:	697b      	ldr	r3, [r7, #20]
 80130e4:	2b01      	cmp	r3, #1
 80130e6:	d11b      	bne.n	8013120 <vTaskStartScheduler+0x98>
	__asm volatile
 80130e8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80130ec:	f383 8811 	msr	BASEPRI, r3
 80130f0:	f3bf 8f6f 	isb	sy
 80130f4:	f3bf 8f4f 	dsb	sy
 80130f8:	613b      	str	r3, [r7, #16]
}
 80130fa:	bf00      	nop
		{
			/* Switch Newlib's _impure_ptr variable to point to the _reent
			structure specific to the task that will run first.
			See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
			for additional information. */
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
 80130fc:	4b15      	ldr	r3, [pc, #84]	@ (8013154 <vTaskStartScheduler+0xcc>)
 80130fe:	681b      	ldr	r3, [r3, #0]
 8013100:	3354      	adds	r3, #84	@ 0x54
 8013102:	4a15      	ldr	r2, [pc, #84]	@ (8013158 <vTaskStartScheduler+0xd0>)
 8013104:	6013      	str	r3, [r2, #0]
		}
		#endif /* configUSE_NEWLIB_REENTRANT */

		xNextTaskUnblockTime = portMAX_DELAY;
 8013106:	4b15      	ldr	r3, [pc, #84]	@ (801315c <vTaskStartScheduler+0xd4>)
 8013108:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 801310c:	601a      	str	r2, [r3, #0]
		xSchedulerRunning = pdTRUE;
 801310e:	4b14      	ldr	r3, [pc, #80]	@ (8013160 <vTaskStartScheduler+0xd8>)
 8013110:	2201      	movs	r2, #1
 8013112:	601a      	str	r2, [r3, #0]
		xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
 8013114:	4b13      	ldr	r3, [pc, #76]	@ (8013164 <vTaskStartScheduler+0xdc>)
 8013116:	2200      	movs	r2, #0
 8013118:	601a      	str	r2, [r3, #0]

		traceTASK_SWITCHED_IN();

		/* Setting up the timer tick is hardware specific and thus in the
		portable interface. */
		if( xPortStartScheduler() != pdFALSE )
 801311a:	f001 fc69 	bl	80149f0 <xPortStartScheduler>
	}

	/* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
	meaning xIdleTaskHandle is not used anywhere else. */
	( void ) xIdleTaskHandle;
}
 801311e:	e00f      	b.n	8013140 <vTaskStartScheduler+0xb8>
		configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
 8013120:	697b      	ldr	r3, [r7, #20]
 8013122:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8013126:	d10b      	bne.n	8013140 <vTaskStartScheduler+0xb8>
	__asm volatile
 8013128:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801312c:	f383 8811 	msr	BASEPRI, r3
 8013130:	f3bf 8f6f 	isb	sy
 8013134:	f3bf 8f4f 	dsb	sy
 8013138:	60fb      	str	r3, [r7, #12]
}
 801313a:	bf00      	nop
 801313c:	bf00      	nop
 801313e:	e7fd      	b.n	801313c <vTaskStartScheduler+0xb4>
}
 8013140:	bf00      	nop
 8013142:	3718      	adds	r7, #24
 8013144:	46bd      	mov	sp, r7
 8013146:	bd80      	pop	{r7, pc}
 8013148:	0802cbb4 	.word	0x0802cbb4
 801314c:	08013829 	.word	0x08013829
 8013150:	24004188 	.word	0x24004188
 8013154:	24003c90 	.word	0x24003c90
 8013158:	240001d4 	.word	0x240001d4
 801315c:	24004184 	.word	0x24004184
 8013160:	24004170 	.word	0x24004170
 8013164:	24004168 	.word	0x24004168

08013168 <vTaskSuspendAll>:
	vPortEndScheduler();
}
/*----------------------------------------------------------*/

void vTaskSuspendAll( void )
{
 8013168:	b480      	push	{r7}
 801316a:	af00      	add	r7, sp, #0
	do not otherwise exhibit real time behaviour. */
	portSOFTWARE_BARRIER();

	/* The scheduler is suspended if uxSchedulerSuspended is non-zero.  An increment
	is used to allow calls to vTaskSuspendAll() to nest. */
	++uxSchedulerSuspended;
 801316c:	4b04      	ldr	r3, [pc, #16]	@ (8013180 <vTaskSuspendAll+0x18>)
 801316e:	681b      	ldr	r3, [r3, #0]
 8013170:	3301      	adds	r3, #1
 8013172:	4a03      	ldr	r2, [pc, #12]	@ (8013180 <vTaskSuspendAll+0x18>)
 8013174:	6013      	str	r3, [r2, #0]

	/* Enforces ordering for ports and optimised compilers that may otherwise place
	the above increment elsewhere. */
	portMEMORY_BARRIER();
}
 8013176:	bf00      	nop
 8013178:	46bd      	mov	sp, r7
 801317a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801317e:	4770      	bx	lr
 8013180:	2400418c 	.word	0x2400418c

08013184 <xTaskResumeAll>:

#endif /* configUSE_TICKLESS_IDLE */
/*----------------------------------------------------------*/

BaseType_t xTaskResumeAll( void )
{
 8013184:	b580      	push	{r7, lr}
 8013186:	b084      	sub	sp, #16
 8013188:	af00      	add	r7, sp, #0
TCB_t *pxTCB = NULL;
 801318a:	2300      	movs	r3, #0
 801318c:	60fb      	str	r3, [r7, #12]
BaseType_t xAlreadyYielded = pdFALSE;
 801318e:	2300      	movs	r3, #0
 8013190:	60bb      	str	r3, [r7, #8]

	/* If uxSchedulerSuspended is zero then this function does not match a
	previous call to vTaskSuspendAll(). */
	configASSERT( uxSchedulerSuspended );
 8013192:	4b42      	ldr	r3, [pc, #264]	@ (801329c <xTaskResumeAll+0x118>)
 8013194:	681b      	ldr	r3, [r3, #0]
 8013196:	2b00      	cmp	r3, #0
 8013198:	d10b      	bne.n	80131b2 <xTaskResumeAll+0x2e>
	__asm volatile
 801319a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801319e:	f383 8811 	msr	BASEPRI, r3
 80131a2:	f3bf 8f6f 	isb	sy
 80131a6:	f3bf 8f4f 	dsb	sy
 80131aa:	603b      	str	r3, [r7, #0]
}
 80131ac:	bf00      	nop
 80131ae:	bf00      	nop
 80131b0:	e7fd      	b.n	80131ae <xTaskResumeAll+0x2a>
	/* It is possible that an ISR caused a task to be removed from an event
	list while the scheduler was suspended.  If this was the case then the
	removed task will have been added to the xPendingReadyList.  Once the
	scheduler has been resumed it is safe to move all the pending ready
	tasks from this list into their appropriate ready list. */
	taskENTER_CRITICAL();
 80131b2:	f001 fcc1 	bl	8014b38 <vPortEnterCritical>
	{
		--uxSchedulerSuspended;
 80131b6:	4b39      	ldr	r3, [pc, #228]	@ (801329c <xTaskResumeAll+0x118>)
 80131b8:	681b      	ldr	r3, [r3, #0]
 80131ba:	3b01      	subs	r3, #1
 80131bc:	4a37      	ldr	r2, [pc, #220]	@ (801329c <xTaskResumeAll+0x118>)
 80131be:	6013      	str	r3, [r2, #0]

		if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 80131c0:	4b36      	ldr	r3, [pc, #216]	@ (801329c <xTaskResumeAll+0x118>)
 80131c2:	681b      	ldr	r3, [r3, #0]
 80131c4:	2b00      	cmp	r3, #0
 80131c6:	d162      	bne.n	801328e <xTaskResumeAll+0x10a>
		{
			if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
 80131c8:	4b35      	ldr	r3, [pc, #212]	@ (80132a0 <xTaskResumeAll+0x11c>)
 80131ca:	681b      	ldr	r3, [r3, #0]
 80131cc:	2b00      	cmp	r3, #0
 80131ce:	d05e      	beq.n	801328e <xTaskResumeAll+0x10a>
			{
				/* Move any readied tasks from the pending list into the
				appropriate ready list. */
				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
 80131d0:	e02f      	b.n	8013232 <xTaskResumeAll+0xae>
				{
					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 80131d2:	4b34      	ldr	r3, [pc, #208]	@ (80132a4 <xTaskResumeAll+0x120>)
 80131d4:	68db      	ldr	r3, [r3, #12]
 80131d6:	68db      	ldr	r3, [r3, #12]
 80131d8:	60fb      	str	r3, [r7, #12]
					( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 80131da:	68fb      	ldr	r3, [r7, #12]
 80131dc:	3318      	adds	r3, #24
 80131de:	4618      	mov	r0, r3
 80131e0:	f7fe f87a 	bl	80112d8 <uxListRemove>
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 80131e4:	68fb      	ldr	r3, [r7, #12]
 80131e6:	3304      	adds	r3, #4
 80131e8:	4618      	mov	r0, r3
 80131ea:	f7fe f875 	bl	80112d8 <uxListRemove>
					prvAddTaskToReadyList( pxTCB );
 80131ee:	68fb      	ldr	r3, [r7, #12]
 80131f0:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80131f2:	4b2d      	ldr	r3, [pc, #180]	@ (80132a8 <xTaskResumeAll+0x124>)
 80131f4:	681b      	ldr	r3, [r3, #0]
 80131f6:	429a      	cmp	r2, r3
 80131f8:	d903      	bls.n	8013202 <xTaskResumeAll+0x7e>
 80131fa:	68fb      	ldr	r3, [r7, #12]
 80131fc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80131fe:	4a2a      	ldr	r2, [pc, #168]	@ (80132a8 <xTaskResumeAll+0x124>)
 8013200:	6013      	str	r3, [r2, #0]
 8013202:	68fb      	ldr	r3, [r7, #12]
 8013204:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013206:	4613      	mov	r3, r2
 8013208:	009b      	lsls	r3, r3, #2
 801320a:	4413      	add	r3, r2
 801320c:	009b      	lsls	r3, r3, #2
 801320e:	4a27      	ldr	r2, [pc, #156]	@ (80132ac <xTaskResumeAll+0x128>)
 8013210:	441a      	add	r2, r3
 8013212:	68fb      	ldr	r3, [r7, #12]
 8013214:	3304      	adds	r3, #4
 8013216:	4619      	mov	r1, r3
 8013218:	4610      	mov	r0, r2
 801321a:	f7fe f800 	bl	801121e <vListInsertEnd>

					/* If the moved task has a priority higher than the current
					task then a yield must be performed. */
					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 801321e:	68fb      	ldr	r3, [r7, #12]
 8013220:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013222:	4b23      	ldr	r3, [pc, #140]	@ (80132b0 <xTaskResumeAll+0x12c>)
 8013224:	681b      	ldr	r3, [r3, #0]
 8013226:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013228:	429a      	cmp	r2, r3
 801322a:	d302      	bcc.n	8013232 <xTaskResumeAll+0xae>
					{
						xYieldPending = pdTRUE;
 801322c:	4b21      	ldr	r3, [pc, #132]	@ (80132b4 <xTaskResumeAll+0x130>)
 801322e:	2201      	movs	r2, #1
 8013230:	601a      	str	r2, [r3, #0]
				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
 8013232:	4b1c      	ldr	r3, [pc, #112]	@ (80132a4 <xTaskResumeAll+0x120>)
 8013234:	681b      	ldr	r3, [r3, #0]
 8013236:	2b00      	cmp	r3, #0
 8013238:	d1cb      	bne.n	80131d2 <xTaskResumeAll+0x4e>
					{
						mtCOVERAGE_TEST_MARKER();
					}
				}

				if( pxTCB != NULL )
 801323a:	68fb      	ldr	r3, [r7, #12]
 801323c:	2b00      	cmp	r3, #0
 801323e:	d001      	beq.n	8013244 <xTaskResumeAll+0xc0>
					which may have prevented the next unblock time from being
					re-calculated, in which case re-calculate it now.  Mainly
					important for low power tickless implementations, where
					this can prevent an unnecessary exit from low power
					state. */
					prvResetNextTaskUnblockTime();
 8013240:	f000 fbae 	bl	80139a0 <prvResetNextTaskUnblockTime>
				/* If any ticks occurred while the scheduler was suspended then
				they should be processed now.  This ensures the tick count does
				not	slip, and that any delayed tasks are resumed at the correct
				time. */
				{
					TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
 8013244:	4b1c      	ldr	r3, [pc, #112]	@ (80132b8 <xTaskResumeAll+0x134>)
 8013246:	681b      	ldr	r3, [r3, #0]
 8013248:	607b      	str	r3, [r7, #4]

					if( xPendedCounts > ( TickType_t ) 0U )
 801324a:	687b      	ldr	r3, [r7, #4]
 801324c:	2b00      	cmp	r3, #0
 801324e:	d010      	beq.n	8013272 <xTaskResumeAll+0xee>
					{
						do
						{
							if( xTaskIncrementTick() != pdFALSE )
 8013250:	f000 f858 	bl	8013304 <xTaskIncrementTick>
 8013254:	4603      	mov	r3, r0
 8013256:	2b00      	cmp	r3, #0
 8013258:	d002      	beq.n	8013260 <xTaskResumeAll+0xdc>
							{
								xYieldPending = pdTRUE;
 801325a:	4b16      	ldr	r3, [pc, #88]	@ (80132b4 <xTaskResumeAll+0x130>)
 801325c:	2201      	movs	r2, #1
 801325e:	601a      	str	r2, [r3, #0]
							}
							else
							{
								mtCOVERAGE_TEST_MARKER();
							}
							--xPendedCounts;
 8013260:	687b      	ldr	r3, [r7, #4]
 8013262:	3b01      	subs	r3, #1
 8013264:	607b      	str	r3, [r7, #4]
						} while( xPendedCounts > ( TickType_t ) 0U );
 8013266:	687b      	ldr	r3, [r7, #4]
 8013268:	2b00      	cmp	r3, #0
 801326a:	d1f1      	bne.n	8013250 <xTaskResumeAll+0xcc>

						xPendedTicks = 0;
 801326c:	4b12      	ldr	r3, [pc, #72]	@ (80132b8 <xTaskResumeAll+0x134>)
 801326e:	2200      	movs	r2, #0
 8013270:	601a      	str	r2, [r3, #0]
					{
						mtCOVERAGE_TEST_MARKER();
					}
				}

				if( xYieldPending != pdFALSE )
 8013272:	4b10      	ldr	r3, [pc, #64]	@ (80132b4 <xTaskResumeAll+0x130>)
 8013274:	681b      	ldr	r3, [r3, #0]
 8013276:	2b00      	cmp	r3, #0
 8013278:	d009      	beq.n	801328e <xTaskResumeAll+0x10a>
				{
					#if( configUSE_PREEMPTION != 0 )
					{
						xAlreadyYielded = pdTRUE;
 801327a:	2301      	movs	r3, #1
 801327c:	60bb      	str	r3, [r7, #8]
					}
					#endif
					taskYIELD_IF_USING_PREEMPTION();
 801327e:	4b0f      	ldr	r3, [pc, #60]	@ (80132bc <xTaskResumeAll+0x138>)
 8013280:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8013284:	601a      	str	r2, [r3, #0]
 8013286:	f3bf 8f4f 	dsb	sy
 801328a:	f3bf 8f6f 	isb	sy
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
	taskEXIT_CRITICAL();
 801328e:	f001 fc85 	bl	8014b9c <vPortExitCritical>

	return xAlreadyYielded;
 8013292:	68bb      	ldr	r3, [r7, #8]
}
 8013294:	4618      	mov	r0, r3
 8013296:	3710      	adds	r7, #16
 8013298:	46bd      	mov	sp, r7
 801329a:	bd80      	pop	{r7, pc}
 801329c:	2400418c 	.word	0x2400418c
 80132a0:	24004164 	.word	0x24004164
 80132a4:	24004124 	.word	0x24004124
 80132a8:	2400416c 	.word	0x2400416c
 80132ac:	24003c94 	.word	0x24003c94
 80132b0:	24003c90 	.word	0x24003c90
 80132b4:	24004178 	.word	0x24004178
 80132b8:	24004174 	.word	0x24004174
 80132bc:	e000ed04 	.word	0xe000ed04

080132c0 <xTaskGetTickCount>:
/*-----------------------------------------------------------*/

TickType_t xTaskGetTickCount( void )
{
 80132c0:	b480      	push	{r7}
 80132c2:	b083      	sub	sp, #12
 80132c4:	af00      	add	r7, sp, #0
TickType_t xTicks;

	/* Critical section required if running on a 16 bit processor. */
	portTICK_TYPE_ENTER_CRITICAL();
	{
		xTicks = xTickCount;
 80132c6:	4b05      	ldr	r3, [pc, #20]	@ (80132dc <xTaskGetTickCount+0x1c>)
 80132c8:	681b      	ldr	r3, [r3, #0]
 80132ca:	607b      	str	r3, [r7, #4]
	}
	portTICK_TYPE_EXIT_CRITICAL();

	return xTicks;
 80132cc:	687b      	ldr	r3, [r7, #4]
}
 80132ce:	4618      	mov	r0, r3
 80132d0:	370c      	adds	r7, #12
 80132d2:	46bd      	mov	sp, r7
 80132d4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80132d8:	4770      	bx	lr
 80132da:	bf00      	nop
 80132dc:	24004168 	.word	0x24004168

080132e0 <xTaskGetTickCountFromISR>:
/*-----------------------------------------------------------*/

TickType_t xTaskGetTickCountFromISR( void )
{
 80132e0:	b580      	push	{r7, lr}
 80132e2:	b082      	sub	sp, #8
 80132e4:	af00      	add	r7, sp, #0
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: https://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 80132e6:	f001 fd07 	bl	8014cf8 <vPortValidateInterruptPriority>

	uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
 80132ea:	2300      	movs	r3, #0
 80132ec:	607b      	str	r3, [r7, #4]
	{
		xReturn = xTickCount;
 80132ee:	4b04      	ldr	r3, [pc, #16]	@ (8013300 <xTaskGetTickCountFromISR+0x20>)
 80132f0:	681b      	ldr	r3, [r3, #0]
 80132f2:	603b      	str	r3, [r7, #0]
	}
	portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 80132f4:	683b      	ldr	r3, [r7, #0]
}
 80132f6:	4618      	mov	r0, r3
 80132f8:	3708      	adds	r7, #8
 80132fa:	46bd      	mov	sp, r7
 80132fc:	bd80      	pop	{r7, pc}
 80132fe:	bf00      	nop
 8013300:	24004168 	.word	0x24004168

08013304 <xTaskIncrementTick>:

#endif /* INCLUDE_xTaskAbortDelay */
/*----------------------------------------------------------*/

BaseType_t xTaskIncrementTick( void )
{
 8013304:	b580      	push	{r7, lr}
 8013306:	b086      	sub	sp, #24
 8013308:	af00      	add	r7, sp, #0
TCB_t * pxTCB;
TickType_t xItemValue;
BaseType_t xSwitchRequired = pdFALSE;
 801330a:	2300      	movs	r3, #0
 801330c:	617b      	str	r3, [r7, #20]

	/* Called by the portable layer each time a tick interrupt occurs.
	Increments the tick then checks to see if the new tick value will cause any
	tasks to be unblocked. */
	traceTASK_INCREMENT_TICK( xTickCount );
	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 801330e:	4b4f      	ldr	r3, [pc, #316]	@ (801344c <xTaskIncrementTick+0x148>)
 8013310:	681b      	ldr	r3, [r3, #0]
 8013312:	2b00      	cmp	r3, #0
 8013314:	f040 8090 	bne.w	8013438 <xTaskIncrementTick+0x134>
	{
		/* Minor optimisation.  The tick count cannot change in this
		block. */
		const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
 8013318:	4b4d      	ldr	r3, [pc, #308]	@ (8013450 <xTaskIncrementTick+0x14c>)
 801331a:	681b      	ldr	r3, [r3, #0]
 801331c:	3301      	adds	r3, #1
 801331e:	613b      	str	r3, [r7, #16]

		/* Increment the RTOS tick, switching the delayed and overflowed
		delayed lists if it wraps to 0. */
		xTickCount = xConstTickCount;
 8013320:	4a4b      	ldr	r2, [pc, #300]	@ (8013450 <xTaskIncrementTick+0x14c>)
 8013322:	693b      	ldr	r3, [r7, #16]
 8013324:	6013      	str	r3, [r2, #0]

		if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
 8013326:	693b      	ldr	r3, [r7, #16]
 8013328:	2b00      	cmp	r3, #0
 801332a:	d121      	bne.n	8013370 <xTaskIncrementTick+0x6c>
		{
			taskSWITCH_DELAYED_LISTS();
 801332c:	4b49      	ldr	r3, [pc, #292]	@ (8013454 <xTaskIncrementTick+0x150>)
 801332e:	681b      	ldr	r3, [r3, #0]
 8013330:	681b      	ldr	r3, [r3, #0]
 8013332:	2b00      	cmp	r3, #0
 8013334:	d00b      	beq.n	801334e <xTaskIncrementTick+0x4a>
	__asm volatile
 8013336:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801333a:	f383 8811 	msr	BASEPRI, r3
 801333e:	f3bf 8f6f 	isb	sy
 8013342:	f3bf 8f4f 	dsb	sy
 8013346:	603b      	str	r3, [r7, #0]
}
 8013348:	bf00      	nop
 801334a:	bf00      	nop
 801334c:	e7fd      	b.n	801334a <xTaskIncrementTick+0x46>
 801334e:	4b41      	ldr	r3, [pc, #260]	@ (8013454 <xTaskIncrementTick+0x150>)
 8013350:	681b      	ldr	r3, [r3, #0]
 8013352:	60fb      	str	r3, [r7, #12]
 8013354:	4b40      	ldr	r3, [pc, #256]	@ (8013458 <xTaskIncrementTick+0x154>)
 8013356:	681b      	ldr	r3, [r3, #0]
 8013358:	4a3e      	ldr	r2, [pc, #248]	@ (8013454 <xTaskIncrementTick+0x150>)
 801335a:	6013      	str	r3, [r2, #0]
 801335c:	4a3e      	ldr	r2, [pc, #248]	@ (8013458 <xTaskIncrementTick+0x154>)
 801335e:	68fb      	ldr	r3, [r7, #12]
 8013360:	6013      	str	r3, [r2, #0]
 8013362:	4b3e      	ldr	r3, [pc, #248]	@ (801345c <xTaskIncrementTick+0x158>)
 8013364:	681b      	ldr	r3, [r3, #0]
 8013366:	3301      	adds	r3, #1
 8013368:	4a3c      	ldr	r2, [pc, #240]	@ (801345c <xTaskIncrementTick+0x158>)
 801336a:	6013      	str	r3, [r2, #0]
 801336c:	f000 fb18 	bl	80139a0 <prvResetNextTaskUnblockTime>

		/* See if this tick has made a timeout expire.  Tasks are stored in
		the	queue in the order of their wake time - meaning once one task
		has been found whose block time has not expired there is no need to
		look any further down the list. */
		if( xConstTickCount >= xNextTaskUnblockTime )
 8013370:	4b3b      	ldr	r3, [pc, #236]	@ (8013460 <xTaskIncrementTick+0x15c>)
 8013372:	681b      	ldr	r3, [r3, #0]
 8013374:	693a      	ldr	r2, [r7, #16]
 8013376:	429a      	cmp	r2, r3
 8013378:	d349      	bcc.n	801340e <xTaskIncrementTick+0x10a>
		{
			for( ;; )
			{
				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 801337a:	4b36      	ldr	r3, [pc, #216]	@ (8013454 <xTaskIncrementTick+0x150>)
 801337c:	681b      	ldr	r3, [r3, #0]
 801337e:	681b      	ldr	r3, [r3, #0]
 8013380:	2b00      	cmp	r3, #0
 8013382:	d104      	bne.n	801338e <xTaskIncrementTick+0x8a>
					/* The delayed list is empty.  Set xNextTaskUnblockTime
					to the maximum possible value so it is extremely
					unlikely that the
					if( xTickCount >= xNextTaskUnblockTime ) test will pass
					next time through. */
					xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8013384:	4b36      	ldr	r3, [pc, #216]	@ (8013460 <xTaskIncrementTick+0x15c>)
 8013386:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 801338a:	601a      	str	r2, [r3, #0]
					break;
 801338c:	e03f      	b.n	801340e <xTaskIncrementTick+0x10a>
				{
					/* The delayed list is not empty, get the value of the
					item at the head of the delayed list.  This is the time
					at which the task at the head of the delayed list must
					be removed from the Blocked state. */
					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 801338e:	4b31      	ldr	r3, [pc, #196]	@ (8013454 <xTaskIncrementTick+0x150>)
 8013390:	681b      	ldr	r3, [r3, #0]
 8013392:	68db      	ldr	r3, [r3, #12]
 8013394:	68db      	ldr	r3, [r3, #12]
 8013396:	60bb      	str	r3, [r7, #8]
					xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
 8013398:	68bb      	ldr	r3, [r7, #8]
 801339a:	685b      	ldr	r3, [r3, #4]
 801339c:	607b      	str	r3, [r7, #4]

					if( xConstTickCount < xItemValue )
 801339e:	693a      	ldr	r2, [r7, #16]
 80133a0:	687b      	ldr	r3, [r7, #4]
 80133a2:	429a      	cmp	r2, r3
 80133a4:	d203      	bcs.n	80133ae <xTaskIncrementTick+0xaa>
						/* It is not time to unblock this item yet, but the
						item value is the time at which the task at the head
						of the blocked list must be removed from the Blocked
						state -	so record the item value in
						xNextTaskUnblockTime. */
						xNextTaskUnblockTime = xItemValue;
 80133a6:	4a2e      	ldr	r2, [pc, #184]	@ (8013460 <xTaskIncrementTick+0x15c>)
 80133a8:	687b      	ldr	r3, [r7, #4]
 80133aa:	6013      	str	r3, [r2, #0]
						break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
 80133ac:	e02f      	b.n	801340e <xTaskIncrementTick+0x10a>
					{
						mtCOVERAGE_TEST_MARKER();
					}

					/* It is time to remove the item from the Blocked state. */
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 80133ae:	68bb      	ldr	r3, [r7, #8]
 80133b0:	3304      	adds	r3, #4
 80133b2:	4618      	mov	r0, r3
 80133b4:	f7fd ff90 	bl	80112d8 <uxListRemove>

					/* Is the task waiting on an event also?  If so remove
					it from the event list. */
					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
 80133b8:	68bb      	ldr	r3, [r7, #8]
 80133ba:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80133bc:	2b00      	cmp	r3, #0
 80133be:	d004      	beq.n	80133ca <xTaskIncrementTick+0xc6>
					{
						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 80133c0:	68bb      	ldr	r3, [r7, #8]
 80133c2:	3318      	adds	r3, #24
 80133c4:	4618      	mov	r0, r3
 80133c6:	f7fd ff87 	bl	80112d8 <uxListRemove>
						mtCOVERAGE_TEST_MARKER();
					}

					/* Place the unblocked task into the appropriate ready
					list. */
					prvAddTaskToReadyList( pxTCB );
 80133ca:	68bb      	ldr	r3, [r7, #8]
 80133cc:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80133ce:	4b25      	ldr	r3, [pc, #148]	@ (8013464 <xTaskIncrementTick+0x160>)
 80133d0:	681b      	ldr	r3, [r3, #0]
 80133d2:	429a      	cmp	r2, r3
 80133d4:	d903      	bls.n	80133de <xTaskIncrementTick+0xda>
 80133d6:	68bb      	ldr	r3, [r7, #8]
 80133d8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80133da:	4a22      	ldr	r2, [pc, #136]	@ (8013464 <xTaskIncrementTick+0x160>)
 80133dc:	6013      	str	r3, [r2, #0]
 80133de:	68bb      	ldr	r3, [r7, #8]
 80133e0:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80133e2:	4613      	mov	r3, r2
 80133e4:	009b      	lsls	r3, r3, #2
 80133e6:	4413      	add	r3, r2
 80133e8:	009b      	lsls	r3, r3, #2
 80133ea:	4a1f      	ldr	r2, [pc, #124]	@ (8013468 <xTaskIncrementTick+0x164>)
 80133ec:	441a      	add	r2, r3
 80133ee:	68bb      	ldr	r3, [r7, #8]
 80133f0:	3304      	adds	r3, #4
 80133f2:	4619      	mov	r1, r3
 80133f4:	4610      	mov	r0, r2
 80133f6:	f7fd ff12 	bl	801121e <vListInsertEnd>
					{
						/* Preemption is on, but a context switch should
						only be performed if the unblocked task has a
						priority that is equal to or higher than the
						currently executing task. */
						if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 80133fa:	68bb      	ldr	r3, [r7, #8]
 80133fc:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80133fe:	4b1b      	ldr	r3, [pc, #108]	@ (801346c <xTaskIncrementTick+0x168>)
 8013400:	681b      	ldr	r3, [r3, #0]
 8013402:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013404:	429a      	cmp	r2, r3
 8013406:	d3b8      	bcc.n	801337a <xTaskIncrementTick+0x76>
						{
							xSwitchRequired = pdTRUE;
 8013408:	2301      	movs	r3, #1
 801340a:	617b      	str	r3, [r7, #20]
				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 801340c:	e7b5      	b.n	801337a <xTaskIncrementTick+0x76>
		/* Tasks of equal priority to the currently running task will share
		processing time (time slice) if preemption is on, and the application
		writer has not explicitly turned time slicing off. */
		#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
		{
			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
 801340e:	4b17      	ldr	r3, [pc, #92]	@ (801346c <xTaskIncrementTick+0x168>)
 8013410:	681b      	ldr	r3, [r3, #0]
 8013412:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013414:	4914      	ldr	r1, [pc, #80]	@ (8013468 <xTaskIncrementTick+0x164>)
 8013416:	4613      	mov	r3, r2
 8013418:	009b      	lsls	r3, r3, #2
 801341a:	4413      	add	r3, r2
 801341c:	009b      	lsls	r3, r3, #2
 801341e:	440b      	add	r3, r1
 8013420:	681b      	ldr	r3, [r3, #0]
 8013422:	2b01      	cmp	r3, #1
 8013424:	d901      	bls.n	801342a <xTaskIncrementTick+0x126>
			{
				xSwitchRequired = pdTRUE;
 8013426:	2301      	movs	r3, #1
 8013428:	617b      	str	r3, [r7, #20]
		}
		#endif /* configUSE_TICK_HOOK */

		#if ( configUSE_PREEMPTION == 1 )
		{
			if( xYieldPending != pdFALSE )
 801342a:	4b11      	ldr	r3, [pc, #68]	@ (8013470 <xTaskIncrementTick+0x16c>)
 801342c:	681b      	ldr	r3, [r3, #0]
 801342e:	2b00      	cmp	r3, #0
 8013430:	d007      	beq.n	8013442 <xTaskIncrementTick+0x13e>
			{
				xSwitchRequired = pdTRUE;
 8013432:	2301      	movs	r3, #1
 8013434:	617b      	str	r3, [r7, #20]
 8013436:	e004      	b.n	8013442 <xTaskIncrementTick+0x13e>
		}
		#endif /* configUSE_PREEMPTION */
	}
	else
	{
		++xPendedTicks;
 8013438:	4b0e      	ldr	r3, [pc, #56]	@ (8013474 <xTaskIncrementTick+0x170>)
 801343a:	681b      	ldr	r3, [r3, #0]
 801343c:	3301      	adds	r3, #1
 801343e:	4a0d      	ldr	r2, [pc, #52]	@ (8013474 <xTaskIncrementTick+0x170>)
 8013440:	6013      	str	r3, [r2, #0]
			vApplicationTickHook();
		}
		#endif
	}

	return xSwitchRequired;
 8013442:	697b      	ldr	r3, [r7, #20]
}
 8013444:	4618      	mov	r0, r3
 8013446:	3718      	adds	r7, #24
 8013448:	46bd      	mov	sp, r7
 801344a:	bd80      	pop	{r7, pc}
 801344c:	2400418c 	.word	0x2400418c
 8013450:	24004168 	.word	0x24004168
 8013454:	2400411c 	.word	0x2400411c
 8013458:	24004120 	.word	0x24004120
 801345c:	2400417c 	.word	0x2400417c
 8013460:	24004184 	.word	0x24004184
 8013464:	2400416c 	.word	0x2400416c
 8013468:	24003c94 	.word	0x24003c94
 801346c:	24003c90 	.word	0x24003c90
 8013470:	24004178 	.word	0x24004178
 8013474:	24004174 	.word	0x24004174

08013478 <vTaskSwitchContext>:

#endif /* configUSE_APPLICATION_TASK_TAG */
/*-----------------------------------------------------------*/

void vTaskSwitchContext( void )
{
 8013478:	b580      	push	{r7, lr}
 801347a:	b084      	sub	sp, #16
 801347c:	af00      	add	r7, sp, #0
	if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
 801347e:	4b32      	ldr	r3, [pc, #200]	@ (8013548 <vTaskSwitchContext+0xd0>)
 8013480:	681b      	ldr	r3, [r3, #0]
 8013482:	2b00      	cmp	r3, #0
 8013484:	d003      	beq.n	801348e <vTaskSwitchContext+0x16>
	{
		/* The scheduler is currently suspended - do not allow a context
		switch. */
		xYieldPending = pdTRUE;
 8013486:	4b31      	ldr	r3, [pc, #196]	@ (801354c <vTaskSwitchContext+0xd4>)
 8013488:	2201      	movs	r2, #1
 801348a:	601a      	str	r2, [r3, #0]
			for additional information. */
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
		}
		#endif /* configUSE_NEWLIB_REENTRANT */
	}
}
 801348c:	e058      	b.n	8013540 <vTaskSwitchContext+0xc8>
		xYieldPending = pdFALSE;
 801348e:	4b2f      	ldr	r3, [pc, #188]	@ (801354c <vTaskSwitchContext+0xd4>)
 8013490:	2200      	movs	r2, #0
 8013492:	601a      	str	r2, [r3, #0]
		taskCHECK_FOR_STACK_OVERFLOW();
 8013494:	4b2e      	ldr	r3, [pc, #184]	@ (8013550 <vTaskSwitchContext+0xd8>)
 8013496:	681b      	ldr	r3, [r3, #0]
 8013498:	681a      	ldr	r2, [r3, #0]
 801349a:	4b2d      	ldr	r3, [pc, #180]	@ (8013550 <vTaskSwitchContext+0xd8>)
 801349c:	681b      	ldr	r3, [r3, #0]
 801349e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80134a0:	429a      	cmp	r2, r3
 80134a2:	d808      	bhi.n	80134b6 <vTaskSwitchContext+0x3e>
 80134a4:	4b2a      	ldr	r3, [pc, #168]	@ (8013550 <vTaskSwitchContext+0xd8>)
 80134a6:	681a      	ldr	r2, [r3, #0]
 80134a8:	4b29      	ldr	r3, [pc, #164]	@ (8013550 <vTaskSwitchContext+0xd8>)
 80134aa:	681b      	ldr	r3, [r3, #0]
 80134ac:	3334      	adds	r3, #52	@ 0x34
 80134ae:	4619      	mov	r1, r3
 80134b0:	4610      	mov	r0, r2
 80134b2:	f7ee fbf6 	bl	8001ca2 <vApplicationStackOverflowHook>
		taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 80134b6:	4b27      	ldr	r3, [pc, #156]	@ (8013554 <vTaskSwitchContext+0xdc>)
 80134b8:	681b      	ldr	r3, [r3, #0]
 80134ba:	60fb      	str	r3, [r7, #12]
 80134bc:	e011      	b.n	80134e2 <vTaskSwitchContext+0x6a>
 80134be:	68fb      	ldr	r3, [r7, #12]
 80134c0:	2b00      	cmp	r3, #0
 80134c2:	d10b      	bne.n	80134dc <vTaskSwitchContext+0x64>
	__asm volatile
 80134c4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80134c8:	f383 8811 	msr	BASEPRI, r3
 80134cc:	f3bf 8f6f 	isb	sy
 80134d0:	f3bf 8f4f 	dsb	sy
 80134d4:	607b      	str	r3, [r7, #4]
}
 80134d6:	bf00      	nop
 80134d8:	bf00      	nop
 80134da:	e7fd      	b.n	80134d8 <vTaskSwitchContext+0x60>
 80134dc:	68fb      	ldr	r3, [r7, #12]
 80134de:	3b01      	subs	r3, #1
 80134e0:	60fb      	str	r3, [r7, #12]
 80134e2:	491d      	ldr	r1, [pc, #116]	@ (8013558 <vTaskSwitchContext+0xe0>)
 80134e4:	68fa      	ldr	r2, [r7, #12]
 80134e6:	4613      	mov	r3, r2
 80134e8:	009b      	lsls	r3, r3, #2
 80134ea:	4413      	add	r3, r2
 80134ec:	009b      	lsls	r3, r3, #2
 80134ee:	440b      	add	r3, r1
 80134f0:	681b      	ldr	r3, [r3, #0]
 80134f2:	2b00      	cmp	r3, #0
 80134f4:	d0e3      	beq.n	80134be <vTaskSwitchContext+0x46>
 80134f6:	68fa      	ldr	r2, [r7, #12]
 80134f8:	4613      	mov	r3, r2
 80134fa:	009b      	lsls	r3, r3, #2
 80134fc:	4413      	add	r3, r2
 80134fe:	009b      	lsls	r3, r3, #2
 8013500:	4a15      	ldr	r2, [pc, #84]	@ (8013558 <vTaskSwitchContext+0xe0>)
 8013502:	4413      	add	r3, r2
 8013504:	60bb      	str	r3, [r7, #8]
 8013506:	68bb      	ldr	r3, [r7, #8]
 8013508:	685b      	ldr	r3, [r3, #4]
 801350a:	685a      	ldr	r2, [r3, #4]
 801350c:	68bb      	ldr	r3, [r7, #8]
 801350e:	605a      	str	r2, [r3, #4]
 8013510:	68bb      	ldr	r3, [r7, #8]
 8013512:	685a      	ldr	r2, [r3, #4]
 8013514:	68bb      	ldr	r3, [r7, #8]
 8013516:	3308      	adds	r3, #8
 8013518:	429a      	cmp	r2, r3
 801351a:	d104      	bne.n	8013526 <vTaskSwitchContext+0xae>
 801351c:	68bb      	ldr	r3, [r7, #8]
 801351e:	685b      	ldr	r3, [r3, #4]
 8013520:	685a      	ldr	r2, [r3, #4]
 8013522:	68bb      	ldr	r3, [r7, #8]
 8013524:	605a      	str	r2, [r3, #4]
 8013526:	68bb      	ldr	r3, [r7, #8]
 8013528:	685b      	ldr	r3, [r3, #4]
 801352a:	68db      	ldr	r3, [r3, #12]
 801352c:	4a08      	ldr	r2, [pc, #32]	@ (8013550 <vTaskSwitchContext+0xd8>)
 801352e:	6013      	str	r3, [r2, #0]
 8013530:	4a08      	ldr	r2, [pc, #32]	@ (8013554 <vTaskSwitchContext+0xdc>)
 8013532:	68fb      	ldr	r3, [r7, #12]
 8013534:	6013      	str	r3, [r2, #0]
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
 8013536:	4b06      	ldr	r3, [pc, #24]	@ (8013550 <vTaskSwitchContext+0xd8>)
 8013538:	681b      	ldr	r3, [r3, #0]
 801353a:	3354      	adds	r3, #84	@ 0x54
 801353c:	4a07      	ldr	r2, [pc, #28]	@ (801355c <vTaskSwitchContext+0xe4>)
 801353e:	6013      	str	r3, [r2, #0]
}
 8013540:	bf00      	nop
 8013542:	3710      	adds	r7, #16
 8013544:	46bd      	mov	sp, r7
 8013546:	bd80      	pop	{r7, pc}
 8013548:	2400418c 	.word	0x2400418c
 801354c:	24004178 	.word	0x24004178
 8013550:	24003c90 	.word	0x24003c90
 8013554:	2400416c 	.word	0x2400416c
 8013558:	24003c94 	.word	0x24003c94
 801355c:	240001d4 	.word	0x240001d4

08013560 <vTaskPlaceOnEventList>:
/*-----------------------------------------------------------*/

void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
{
 8013560:	b580      	push	{r7, lr}
 8013562:	b084      	sub	sp, #16
 8013564:	af00      	add	r7, sp, #0
 8013566:	6078      	str	r0, [r7, #4]
 8013568:	6039      	str	r1, [r7, #0]
	configASSERT( pxEventList );
 801356a:	687b      	ldr	r3, [r7, #4]
 801356c:	2b00      	cmp	r3, #0
 801356e:	d10b      	bne.n	8013588 <vTaskPlaceOnEventList+0x28>
	__asm volatile
 8013570:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013574:	f383 8811 	msr	BASEPRI, r3
 8013578:	f3bf 8f6f 	isb	sy
 801357c:	f3bf 8f4f 	dsb	sy
 8013580:	60fb      	str	r3, [r7, #12]
}
 8013582:	bf00      	nop
 8013584:	bf00      	nop
 8013586:	e7fd      	b.n	8013584 <vTaskPlaceOnEventList+0x24>

	/* Place the event list item of the TCB in the appropriate event list.
	This is placed in the list in priority order so the highest priority task
	is the first to be woken by the event.  The queue that contains the event
	list is locked, preventing simultaneous access from interrupts. */
	vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 8013588:	4b07      	ldr	r3, [pc, #28]	@ (80135a8 <vTaskPlaceOnEventList+0x48>)
 801358a:	681b      	ldr	r3, [r3, #0]
 801358c:	3318      	adds	r3, #24
 801358e:	4619      	mov	r1, r3
 8013590:	6878      	ldr	r0, [r7, #4]
 8013592:	f7fd fe68 	bl	8011266 <vListInsert>

	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 8013596:	2101      	movs	r1, #1
 8013598:	6838      	ldr	r0, [r7, #0]
 801359a:	f000 fded 	bl	8014178 <prvAddCurrentTaskToDelayedList>
}
 801359e:	bf00      	nop
 80135a0:	3710      	adds	r7, #16
 80135a2:	46bd      	mov	sp, r7
 80135a4:	bd80      	pop	{r7, pc}
 80135a6:	bf00      	nop
 80135a8:	24003c90 	.word	0x24003c90

080135ac <vTaskPlaceOnEventListRestricted>:
/*-----------------------------------------------------------*/

#if( configUSE_TIMERS == 1 )

	void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
	{
 80135ac:	b580      	push	{r7, lr}
 80135ae:	b086      	sub	sp, #24
 80135b0:	af00      	add	r7, sp, #0
 80135b2:	60f8      	str	r0, [r7, #12]
 80135b4:	60b9      	str	r1, [r7, #8]
 80135b6:	607a      	str	r2, [r7, #4]
		configASSERT( pxEventList );
 80135b8:	68fb      	ldr	r3, [r7, #12]
 80135ba:	2b00      	cmp	r3, #0
 80135bc:	d10b      	bne.n	80135d6 <vTaskPlaceOnEventListRestricted+0x2a>
	__asm volatile
 80135be:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80135c2:	f383 8811 	msr	BASEPRI, r3
 80135c6:	f3bf 8f6f 	isb	sy
 80135ca:	f3bf 8f4f 	dsb	sy
 80135ce:	617b      	str	r3, [r7, #20]
}
 80135d0:	bf00      	nop
 80135d2:	bf00      	nop
 80135d4:	e7fd      	b.n	80135d2 <vTaskPlaceOnEventListRestricted+0x26>

		/* Place the event list item of the TCB in the appropriate event list.
		In this case it is assume that this is the only task that is going to
		be waiting on this event list, so the faster vListInsertEnd() function
		can be used in place of vListInsert. */
		vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 80135d6:	4b0a      	ldr	r3, [pc, #40]	@ (8013600 <vTaskPlaceOnEventListRestricted+0x54>)
 80135d8:	681b      	ldr	r3, [r3, #0]
 80135da:	3318      	adds	r3, #24
 80135dc:	4619      	mov	r1, r3
 80135de:	68f8      	ldr	r0, [r7, #12]
 80135e0:	f7fd fe1d 	bl	801121e <vListInsertEnd>

		/* If the task should block indefinitely then set the block time to a
		value that will be recognised as an indefinite delay inside the
		prvAddCurrentTaskToDelayedList() function. */
		if( xWaitIndefinitely != pdFALSE )
 80135e4:	687b      	ldr	r3, [r7, #4]
 80135e6:	2b00      	cmp	r3, #0
 80135e8:	d002      	beq.n	80135f0 <vTaskPlaceOnEventListRestricted+0x44>
		{
			xTicksToWait = portMAX_DELAY;
 80135ea:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80135ee:	60bb      	str	r3, [r7, #8]
		}

		traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) );
		prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely );
 80135f0:	6879      	ldr	r1, [r7, #4]
 80135f2:	68b8      	ldr	r0, [r7, #8]
 80135f4:	f000 fdc0 	bl	8014178 <prvAddCurrentTaskToDelayedList>
	}
 80135f8:	bf00      	nop
 80135fa:	3718      	adds	r7, #24
 80135fc:	46bd      	mov	sp, r7
 80135fe:	bd80      	pop	{r7, pc}
 8013600:	24003c90 	.word	0x24003c90

08013604 <xTaskRemoveFromEventList>:

#endif /* configUSE_TIMERS */
/*-----------------------------------------------------------*/

BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
{
 8013604:	b580      	push	{r7, lr}
 8013606:	b086      	sub	sp, #24
 8013608:	af00      	add	r7, sp, #0
 801360a:	6078      	str	r0, [r7, #4]
	get called - the lock count on the queue will get modified instead.  This
	means exclusive access to the event list is guaranteed here.

	This function assumes that a check has already been made to ensure that
	pxEventList is not empty. */
	pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 801360c:	687b      	ldr	r3, [r7, #4]
 801360e:	68db      	ldr	r3, [r3, #12]
 8013610:	68db      	ldr	r3, [r3, #12]
 8013612:	613b      	str	r3, [r7, #16]
	configASSERT( pxUnblockedTCB );
 8013614:	693b      	ldr	r3, [r7, #16]
 8013616:	2b00      	cmp	r3, #0
 8013618:	d10b      	bne.n	8013632 <xTaskRemoveFromEventList+0x2e>
	__asm volatile
 801361a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801361e:	f383 8811 	msr	BASEPRI, r3
 8013622:	f3bf 8f6f 	isb	sy
 8013626:	f3bf 8f4f 	dsb	sy
 801362a:	60fb      	str	r3, [r7, #12]
}
 801362c:	bf00      	nop
 801362e:	bf00      	nop
 8013630:	e7fd      	b.n	801362e <xTaskRemoveFromEventList+0x2a>
	( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
 8013632:	693b      	ldr	r3, [r7, #16]
 8013634:	3318      	adds	r3, #24
 8013636:	4618      	mov	r0, r3
 8013638:	f7fd fe4e 	bl	80112d8 <uxListRemove>

	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 801363c:	4b1d      	ldr	r3, [pc, #116]	@ (80136b4 <xTaskRemoveFromEventList+0xb0>)
 801363e:	681b      	ldr	r3, [r3, #0]
 8013640:	2b00      	cmp	r3, #0
 8013642:	d11d      	bne.n	8013680 <xTaskRemoveFromEventList+0x7c>
	{
		( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
 8013644:	693b      	ldr	r3, [r7, #16]
 8013646:	3304      	adds	r3, #4
 8013648:	4618      	mov	r0, r3
 801364a:	f7fd fe45 	bl	80112d8 <uxListRemove>
		prvAddTaskToReadyList( pxUnblockedTCB );
 801364e:	693b      	ldr	r3, [r7, #16]
 8013650:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013652:	4b19      	ldr	r3, [pc, #100]	@ (80136b8 <xTaskRemoveFromEventList+0xb4>)
 8013654:	681b      	ldr	r3, [r3, #0]
 8013656:	429a      	cmp	r2, r3
 8013658:	d903      	bls.n	8013662 <xTaskRemoveFromEventList+0x5e>
 801365a:	693b      	ldr	r3, [r7, #16]
 801365c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801365e:	4a16      	ldr	r2, [pc, #88]	@ (80136b8 <xTaskRemoveFromEventList+0xb4>)
 8013660:	6013      	str	r3, [r2, #0]
 8013662:	693b      	ldr	r3, [r7, #16]
 8013664:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013666:	4613      	mov	r3, r2
 8013668:	009b      	lsls	r3, r3, #2
 801366a:	4413      	add	r3, r2
 801366c:	009b      	lsls	r3, r3, #2
 801366e:	4a13      	ldr	r2, [pc, #76]	@ (80136bc <xTaskRemoveFromEventList+0xb8>)
 8013670:	441a      	add	r2, r3
 8013672:	693b      	ldr	r3, [r7, #16]
 8013674:	3304      	adds	r3, #4
 8013676:	4619      	mov	r1, r3
 8013678:	4610      	mov	r0, r2
 801367a:	f7fd fdd0 	bl	801121e <vListInsertEnd>
 801367e:	e005      	b.n	801368c <xTaskRemoveFromEventList+0x88>
	}
	else
	{
		/* The delayed and ready lists cannot be accessed, so hold this task
		pending until the scheduler is resumed. */
		vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
 8013680:	693b      	ldr	r3, [r7, #16]
 8013682:	3318      	adds	r3, #24
 8013684:	4619      	mov	r1, r3
 8013686:	480e      	ldr	r0, [pc, #56]	@ (80136c0 <xTaskRemoveFromEventList+0xbc>)
 8013688:	f7fd fdc9 	bl	801121e <vListInsertEnd>
	}

	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
 801368c:	693b      	ldr	r3, [r7, #16]
 801368e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013690:	4b0c      	ldr	r3, [pc, #48]	@ (80136c4 <xTaskRemoveFromEventList+0xc0>)
 8013692:	681b      	ldr	r3, [r3, #0]
 8013694:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013696:	429a      	cmp	r2, r3
 8013698:	d905      	bls.n	80136a6 <xTaskRemoveFromEventList+0xa2>
	{
		/* Return true if the task removed from the event list has a higher
		priority than the calling task.  This allows the calling task to know if
		it should force a context switch now. */
		xReturn = pdTRUE;
 801369a:	2301      	movs	r3, #1
 801369c:	617b      	str	r3, [r7, #20]

		/* Mark that a yield is pending in case the user is not using the
		"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
		xYieldPending = pdTRUE;
 801369e:	4b0a      	ldr	r3, [pc, #40]	@ (80136c8 <xTaskRemoveFromEventList+0xc4>)
 80136a0:	2201      	movs	r2, #1
 80136a2:	601a      	str	r2, [r3, #0]
 80136a4:	e001      	b.n	80136aa <xTaskRemoveFromEventList+0xa6>
	}
	else
	{
		xReturn = pdFALSE;
 80136a6:	2300      	movs	r3, #0
 80136a8:	617b      	str	r3, [r7, #20]
	}

	return xReturn;
 80136aa:	697b      	ldr	r3, [r7, #20]
}
 80136ac:	4618      	mov	r0, r3
 80136ae:	3718      	adds	r7, #24
 80136b0:	46bd      	mov	sp, r7
 80136b2:	bd80      	pop	{r7, pc}
 80136b4:	2400418c 	.word	0x2400418c
 80136b8:	2400416c 	.word	0x2400416c
 80136bc:	24003c94 	.word	0x24003c94
 80136c0:	24004124 	.word	0x24004124
 80136c4:	24003c90 	.word	0x24003c90
 80136c8:	24004178 	.word	0x24004178

080136cc <vTaskSetTimeOutState>:
	}
}
/*-----------------------------------------------------------*/

void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )
{
 80136cc:	b580      	push	{r7, lr}
 80136ce:	b084      	sub	sp, #16
 80136d0:	af00      	add	r7, sp, #0
 80136d2:	6078      	str	r0, [r7, #4]
	configASSERT( pxTimeOut );
 80136d4:	687b      	ldr	r3, [r7, #4]
 80136d6:	2b00      	cmp	r3, #0
 80136d8:	d10b      	bne.n	80136f2 <vTaskSetTimeOutState+0x26>
	__asm volatile
 80136da:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80136de:	f383 8811 	msr	BASEPRI, r3
 80136e2:	f3bf 8f6f 	isb	sy
 80136e6:	f3bf 8f4f 	dsb	sy
 80136ea:	60fb      	str	r3, [r7, #12]
}
 80136ec:	bf00      	nop
 80136ee:	bf00      	nop
 80136f0:	e7fd      	b.n	80136ee <vTaskSetTimeOutState+0x22>
	taskENTER_CRITICAL();
 80136f2:	f001 fa21 	bl	8014b38 <vPortEnterCritical>
	{
		pxTimeOut->xOverflowCount = xNumOfOverflows;
 80136f6:	4b07      	ldr	r3, [pc, #28]	@ (8013714 <vTaskSetTimeOutState+0x48>)
 80136f8:	681a      	ldr	r2, [r3, #0]
 80136fa:	687b      	ldr	r3, [r7, #4]
 80136fc:	601a      	str	r2, [r3, #0]
		pxTimeOut->xTimeOnEntering = xTickCount;
 80136fe:	4b06      	ldr	r3, [pc, #24]	@ (8013718 <vTaskSetTimeOutState+0x4c>)
 8013700:	681a      	ldr	r2, [r3, #0]
 8013702:	687b      	ldr	r3, [r7, #4]
 8013704:	605a      	str	r2, [r3, #4]
	}
	taskEXIT_CRITICAL();
 8013706:	f001 fa49 	bl	8014b9c <vPortExitCritical>
}
 801370a:	bf00      	nop
 801370c:	3710      	adds	r7, #16
 801370e:	46bd      	mov	sp, r7
 8013710:	bd80      	pop	{r7, pc}
 8013712:	bf00      	nop
 8013714:	2400417c 	.word	0x2400417c
 8013718:	24004168 	.word	0x24004168

0801371c <vTaskInternalSetTimeOutState>:
/*-----------------------------------------------------------*/

void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
{
 801371c:	b480      	push	{r7}
 801371e:	b083      	sub	sp, #12
 8013720:	af00      	add	r7, sp, #0
 8013722:	6078      	str	r0, [r7, #4]
	/* For internal use only as it does not use a critical section. */
	pxTimeOut->xOverflowCount = xNumOfOverflows;
 8013724:	4b06      	ldr	r3, [pc, #24]	@ (8013740 <vTaskInternalSetTimeOutState+0x24>)
 8013726:	681a      	ldr	r2, [r3, #0]
 8013728:	687b      	ldr	r3, [r7, #4]
 801372a:	601a      	str	r2, [r3, #0]
	pxTimeOut->xTimeOnEntering = xTickCount;
 801372c:	4b05      	ldr	r3, [pc, #20]	@ (8013744 <vTaskInternalSetTimeOutState+0x28>)
 801372e:	681a      	ldr	r2, [r3, #0]
 8013730:	687b      	ldr	r3, [r7, #4]
 8013732:	605a      	str	r2, [r3, #4]
}
 8013734:	bf00      	nop
 8013736:	370c      	adds	r7, #12
 8013738:	46bd      	mov	sp, r7
 801373a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801373e:	4770      	bx	lr
 8013740:	2400417c 	.word	0x2400417c
 8013744:	24004168 	.word	0x24004168

08013748 <xTaskCheckForTimeOut>:
/*-----------------------------------------------------------*/

BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
{
 8013748:	b580      	push	{r7, lr}
 801374a:	b088      	sub	sp, #32
 801374c:	af00      	add	r7, sp, #0
 801374e:	6078      	str	r0, [r7, #4]
 8013750:	6039      	str	r1, [r7, #0]
BaseType_t xReturn;

	configASSERT( pxTimeOut );
 8013752:	687b      	ldr	r3, [r7, #4]
 8013754:	2b00      	cmp	r3, #0
 8013756:	d10b      	bne.n	8013770 <xTaskCheckForTimeOut+0x28>
	__asm volatile
 8013758:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801375c:	f383 8811 	msr	BASEPRI, r3
 8013760:	f3bf 8f6f 	isb	sy
 8013764:	f3bf 8f4f 	dsb	sy
 8013768:	613b      	str	r3, [r7, #16]
}
 801376a:	bf00      	nop
 801376c:	bf00      	nop
 801376e:	e7fd      	b.n	801376c <xTaskCheckForTimeOut+0x24>
	configASSERT( pxTicksToWait );
 8013770:	683b      	ldr	r3, [r7, #0]
 8013772:	2b00      	cmp	r3, #0
 8013774:	d10b      	bne.n	801378e <xTaskCheckForTimeOut+0x46>
	__asm volatile
 8013776:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801377a:	f383 8811 	msr	BASEPRI, r3
 801377e:	f3bf 8f6f 	isb	sy
 8013782:	f3bf 8f4f 	dsb	sy
 8013786:	60fb      	str	r3, [r7, #12]
}
 8013788:	bf00      	nop
 801378a:	bf00      	nop
 801378c:	e7fd      	b.n	801378a <xTaskCheckForTimeOut+0x42>

	taskENTER_CRITICAL();
 801378e:	f001 f9d3 	bl	8014b38 <vPortEnterCritical>
	{
		/* Minor optimisation.  The tick count cannot change in this block. */
		const TickType_t xConstTickCount = xTickCount;
 8013792:	4b1d      	ldr	r3, [pc, #116]	@ (8013808 <xTaskCheckForTimeOut+0xc0>)
 8013794:	681b      	ldr	r3, [r3, #0]
 8013796:	61bb      	str	r3, [r7, #24]
		const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
 8013798:	687b      	ldr	r3, [r7, #4]
 801379a:	685b      	ldr	r3, [r3, #4]
 801379c:	69ba      	ldr	r2, [r7, #24]
 801379e:	1ad3      	subs	r3, r2, r3
 80137a0:	617b      	str	r3, [r7, #20]
			}
			else
		#endif

		#if ( INCLUDE_vTaskSuspend == 1 )
			if( *pxTicksToWait == portMAX_DELAY )
 80137a2:	683b      	ldr	r3, [r7, #0]
 80137a4:	681b      	ldr	r3, [r3, #0]
 80137a6:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80137aa:	d102      	bne.n	80137b2 <xTaskCheckForTimeOut+0x6a>
			{
				/* If INCLUDE_vTaskSuspend is set to 1 and the block time
				specified is the maximum block time then the task should block
				indefinitely, and therefore never time out. */
				xReturn = pdFALSE;
 80137ac:	2300      	movs	r3, #0
 80137ae:	61fb      	str	r3, [r7, #28]
 80137b0:	e023      	b.n	80137fa <xTaskCheckForTimeOut+0xb2>
			}
			else
		#endif

		if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
 80137b2:	687b      	ldr	r3, [r7, #4]
 80137b4:	681a      	ldr	r2, [r3, #0]
 80137b6:	4b15      	ldr	r3, [pc, #84]	@ (801380c <xTaskCheckForTimeOut+0xc4>)
 80137b8:	681b      	ldr	r3, [r3, #0]
 80137ba:	429a      	cmp	r2, r3
 80137bc:	d007      	beq.n	80137ce <xTaskCheckForTimeOut+0x86>
 80137be:	687b      	ldr	r3, [r7, #4]
 80137c0:	685b      	ldr	r3, [r3, #4]
 80137c2:	69ba      	ldr	r2, [r7, #24]
 80137c4:	429a      	cmp	r2, r3
 80137c6:	d302      	bcc.n	80137ce <xTaskCheckForTimeOut+0x86>
			/* The tick count is greater than the time at which
			vTaskSetTimeout() was called, but has also overflowed since
			vTaskSetTimeOut() was called.  It must have wrapped all the way
			around and gone past again. This passed since vTaskSetTimeout()
			was called. */
			xReturn = pdTRUE;
 80137c8:	2301      	movs	r3, #1
 80137ca:	61fb      	str	r3, [r7, #28]
 80137cc:	e015      	b.n	80137fa <xTaskCheckForTimeOut+0xb2>
		}
		else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
 80137ce:	683b      	ldr	r3, [r7, #0]
 80137d0:	681b      	ldr	r3, [r3, #0]
 80137d2:	697a      	ldr	r2, [r7, #20]
 80137d4:	429a      	cmp	r2, r3
 80137d6:	d20b      	bcs.n	80137f0 <xTaskCheckForTimeOut+0xa8>
		{
			/* Not a genuine timeout. Adjust parameters for time remaining. */
			*pxTicksToWait -= xElapsedTime;
 80137d8:	683b      	ldr	r3, [r7, #0]
 80137da:	681a      	ldr	r2, [r3, #0]
 80137dc:	697b      	ldr	r3, [r7, #20]
 80137de:	1ad2      	subs	r2, r2, r3
 80137e0:	683b      	ldr	r3, [r7, #0]
 80137e2:	601a      	str	r2, [r3, #0]
			vTaskInternalSetTimeOutState( pxTimeOut );
 80137e4:	6878      	ldr	r0, [r7, #4]
 80137e6:	f7ff ff99 	bl	801371c <vTaskInternalSetTimeOutState>
			xReturn = pdFALSE;
 80137ea:	2300      	movs	r3, #0
 80137ec:	61fb      	str	r3, [r7, #28]
 80137ee:	e004      	b.n	80137fa <xTaskCheckForTimeOut+0xb2>
		}
		else
		{
			*pxTicksToWait = 0;
 80137f0:	683b      	ldr	r3, [r7, #0]
 80137f2:	2200      	movs	r2, #0
 80137f4:	601a      	str	r2, [r3, #0]
			xReturn = pdTRUE;
 80137f6:	2301      	movs	r3, #1
 80137f8:	61fb      	str	r3, [r7, #28]
		}
	}
	taskEXIT_CRITICAL();
 80137fa:	f001 f9cf 	bl	8014b9c <vPortExitCritical>

	return xReturn;
 80137fe:	69fb      	ldr	r3, [r7, #28]
}
 8013800:	4618      	mov	r0, r3
 8013802:	3720      	adds	r7, #32
 8013804:	46bd      	mov	sp, r7
 8013806:	bd80      	pop	{r7, pc}
 8013808:	24004168 	.word	0x24004168
 801380c:	2400417c 	.word	0x2400417c

08013810 <vTaskMissedYield>:
/*-----------------------------------------------------------*/

void vTaskMissedYield( void )
{
 8013810:	b480      	push	{r7}
 8013812:	af00      	add	r7, sp, #0
	xYieldPending = pdTRUE;
 8013814:	4b03      	ldr	r3, [pc, #12]	@ (8013824 <vTaskMissedYield+0x14>)
 8013816:	2201      	movs	r2, #1
 8013818:	601a      	str	r2, [r3, #0]
}
 801381a:	bf00      	nop
 801381c:	46bd      	mov	sp, r7
 801381e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013822:	4770      	bx	lr
 8013824:	24004178 	.word	0x24004178

08013828 <prvIdleTask>:
 *
 * void prvIdleTask( void *pvParameters );
 *
 */
static portTASK_FUNCTION( prvIdleTask, pvParameters )
{
 8013828:	b580      	push	{r7, lr}
 801382a:	b082      	sub	sp, #8
 801382c:	af00      	add	r7, sp, #0
 801382e:	6078      	str	r0, [r7, #4]

	for( ;; )
	{
		/* See if any tasks have deleted themselves - if so then the idle task
		is responsible for freeing the deleted task's TCB and stack. */
		prvCheckTasksWaitingTermination();
 8013830:	f000 f852 	bl	80138d8 <prvCheckTasksWaitingTermination>

			A critical region is not required here as we are just reading from
			the list, and an occasional incorrect value will not matter.  If
			the ready list at the idle priority contains more than one task
			then a task other than the idle task is ready to execute. */
			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
 8013834:	4b06      	ldr	r3, [pc, #24]	@ (8013850 <prvIdleTask+0x28>)
 8013836:	681b      	ldr	r3, [r3, #0]
 8013838:	2b01      	cmp	r3, #1
 801383a:	d9f9      	bls.n	8013830 <prvIdleTask+0x8>
			{
				taskYIELD();
 801383c:	4b05      	ldr	r3, [pc, #20]	@ (8013854 <prvIdleTask+0x2c>)
 801383e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8013842:	601a      	str	r2, [r3, #0]
 8013844:	f3bf 8f4f 	dsb	sy
 8013848:	f3bf 8f6f 	isb	sy
		prvCheckTasksWaitingTermination();
 801384c:	e7f0      	b.n	8013830 <prvIdleTask+0x8>
 801384e:	bf00      	nop
 8013850:	24003c94 	.word	0x24003c94
 8013854:	e000ed04 	.word	0xe000ed04

08013858 <prvInitialiseTaskLists>:

#endif /* portUSING_MPU_WRAPPERS */
/*-----------------------------------------------------------*/

static void prvInitialiseTaskLists( void )
{
 8013858:	b580      	push	{r7, lr}
 801385a:	b082      	sub	sp, #8
 801385c:	af00      	add	r7, sp, #0
UBaseType_t uxPriority;

	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
 801385e:	2300      	movs	r3, #0
 8013860:	607b      	str	r3, [r7, #4]
 8013862:	e00c      	b.n	801387e <prvInitialiseTaskLists+0x26>
	{
		vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
 8013864:	687a      	ldr	r2, [r7, #4]
 8013866:	4613      	mov	r3, r2
 8013868:	009b      	lsls	r3, r3, #2
 801386a:	4413      	add	r3, r2
 801386c:	009b      	lsls	r3, r3, #2
 801386e:	4a12      	ldr	r2, [pc, #72]	@ (80138b8 <prvInitialiseTaskLists+0x60>)
 8013870:	4413      	add	r3, r2
 8013872:	4618      	mov	r0, r3
 8013874:	f7fd fca6 	bl	80111c4 <vListInitialise>
	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
 8013878:	687b      	ldr	r3, [r7, #4]
 801387a:	3301      	adds	r3, #1
 801387c:	607b      	str	r3, [r7, #4]
 801387e:	687b      	ldr	r3, [r7, #4]
 8013880:	2b37      	cmp	r3, #55	@ 0x37
 8013882:	d9ef      	bls.n	8013864 <prvInitialiseTaskLists+0xc>
	}

	vListInitialise( &xDelayedTaskList1 );
 8013884:	480d      	ldr	r0, [pc, #52]	@ (80138bc <prvInitialiseTaskLists+0x64>)
 8013886:	f7fd fc9d 	bl	80111c4 <vListInitialise>
	vListInitialise( &xDelayedTaskList2 );
 801388a:	480d      	ldr	r0, [pc, #52]	@ (80138c0 <prvInitialiseTaskLists+0x68>)
 801388c:	f7fd fc9a 	bl	80111c4 <vListInitialise>
	vListInitialise( &xPendingReadyList );
 8013890:	480c      	ldr	r0, [pc, #48]	@ (80138c4 <prvInitialiseTaskLists+0x6c>)
 8013892:	f7fd fc97 	bl	80111c4 <vListInitialise>

	#if ( INCLUDE_vTaskDelete == 1 )
	{
		vListInitialise( &xTasksWaitingTermination );
 8013896:	480c      	ldr	r0, [pc, #48]	@ (80138c8 <prvInitialiseTaskLists+0x70>)
 8013898:	f7fd fc94 	bl	80111c4 <vListInitialise>
	}
	#endif /* INCLUDE_vTaskDelete */

	#if ( INCLUDE_vTaskSuspend == 1 )
	{
		vListInitialise( &xSuspendedTaskList );
 801389c:	480b      	ldr	r0, [pc, #44]	@ (80138cc <prvInitialiseTaskLists+0x74>)
 801389e:	f7fd fc91 	bl	80111c4 <vListInitialise>
	}
	#endif /* INCLUDE_vTaskSuspend */

	/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
	using list2. */
	pxDelayedTaskList = &xDelayedTaskList1;
 80138a2:	4b0b      	ldr	r3, [pc, #44]	@ (80138d0 <prvInitialiseTaskLists+0x78>)
 80138a4:	4a05      	ldr	r2, [pc, #20]	@ (80138bc <prvInitialiseTaskLists+0x64>)
 80138a6:	601a      	str	r2, [r3, #0]
	pxOverflowDelayedTaskList = &xDelayedTaskList2;
 80138a8:	4b0a      	ldr	r3, [pc, #40]	@ (80138d4 <prvInitialiseTaskLists+0x7c>)
 80138aa:	4a05      	ldr	r2, [pc, #20]	@ (80138c0 <prvInitialiseTaskLists+0x68>)
 80138ac:	601a      	str	r2, [r3, #0]
}
 80138ae:	bf00      	nop
 80138b0:	3708      	adds	r7, #8
 80138b2:	46bd      	mov	sp, r7
 80138b4:	bd80      	pop	{r7, pc}
 80138b6:	bf00      	nop
 80138b8:	24003c94 	.word	0x24003c94
 80138bc:	240040f4 	.word	0x240040f4
 80138c0:	24004108 	.word	0x24004108
 80138c4:	24004124 	.word	0x24004124
 80138c8:	24004138 	.word	0x24004138
 80138cc:	24004150 	.word	0x24004150
 80138d0:	2400411c 	.word	0x2400411c
 80138d4:	24004120 	.word	0x24004120

080138d8 <prvCheckTasksWaitingTermination>:
/*-----------------------------------------------------------*/

static void prvCheckTasksWaitingTermination( void )
{
 80138d8:	b580      	push	{r7, lr}
 80138da:	b082      	sub	sp, #8
 80138dc:	af00      	add	r7, sp, #0
	{
		TCB_t *pxTCB;

		/* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL()
		being called too often in the idle task. */
		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
 80138de:	e019      	b.n	8013914 <prvCheckTasksWaitingTermination+0x3c>
		{
			taskENTER_CRITICAL();
 80138e0:	f001 f92a 	bl	8014b38 <vPortEnterCritical>
			{
				pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 80138e4:	4b10      	ldr	r3, [pc, #64]	@ (8013928 <prvCheckTasksWaitingTermination+0x50>)
 80138e6:	68db      	ldr	r3, [r3, #12]
 80138e8:	68db      	ldr	r3, [r3, #12]
 80138ea:	607b      	str	r3, [r7, #4]
				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 80138ec:	687b      	ldr	r3, [r7, #4]
 80138ee:	3304      	adds	r3, #4
 80138f0:	4618      	mov	r0, r3
 80138f2:	f7fd fcf1 	bl	80112d8 <uxListRemove>
				--uxCurrentNumberOfTasks;
 80138f6:	4b0d      	ldr	r3, [pc, #52]	@ (801392c <prvCheckTasksWaitingTermination+0x54>)
 80138f8:	681b      	ldr	r3, [r3, #0]
 80138fa:	3b01      	subs	r3, #1
 80138fc:	4a0b      	ldr	r2, [pc, #44]	@ (801392c <prvCheckTasksWaitingTermination+0x54>)
 80138fe:	6013      	str	r3, [r2, #0]
				--uxDeletedTasksWaitingCleanUp;
 8013900:	4b0b      	ldr	r3, [pc, #44]	@ (8013930 <prvCheckTasksWaitingTermination+0x58>)
 8013902:	681b      	ldr	r3, [r3, #0]
 8013904:	3b01      	subs	r3, #1
 8013906:	4a0a      	ldr	r2, [pc, #40]	@ (8013930 <prvCheckTasksWaitingTermination+0x58>)
 8013908:	6013      	str	r3, [r2, #0]
			}
			taskEXIT_CRITICAL();
 801390a:	f001 f947 	bl	8014b9c <vPortExitCritical>

			prvDeleteTCB( pxTCB );
 801390e:	6878      	ldr	r0, [r7, #4]
 8013910:	f000 f810 	bl	8013934 <prvDeleteTCB>
		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
 8013914:	4b06      	ldr	r3, [pc, #24]	@ (8013930 <prvCheckTasksWaitingTermination+0x58>)
 8013916:	681b      	ldr	r3, [r3, #0]
 8013918:	2b00      	cmp	r3, #0
 801391a:	d1e1      	bne.n	80138e0 <prvCheckTasksWaitingTermination+0x8>
		}
	}
	#endif /* INCLUDE_vTaskDelete */
}
 801391c:	bf00      	nop
 801391e:	bf00      	nop
 8013920:	3708      	adds	r7, #8
 8013922:	46bd      	mov	sp, r7
 8013924:	bd80      	pop	{r7, pc}
 8013926:	bf00      	nop
 8013928:	24004138 	.word	0x24004138
 801392c:	24004164 	.word	0x24004164
 8013930:	2400414c 	.word	0x2400414c

08013934 <prvDeleteTCB>:
/*-----------------------------------------------------------*/

#if ( INCLUDE_vTaskDelete == 1 )

	static void prvDeleteTCB( TCB_t *pxTCB )
	{
 8013934:	b580      	push	{r7, lr}
 8013936:	b084      	sub	sp, #16
 8013938:	af00      	add	r7, sp, #0
 801393a:	6078      	str	r0, [r7, #4]
		to the task to free any memory allocated at the application level.
		See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
		for additional information. */
		#if ( configUSE_NEWLIB_REENTRANT == 1 )
		{
			_reclaim_reent( &( pxTCB->xNewLib_reent ) );
 801393c:	687b      	ldr	r3, [r7, #4]
 801393e:	3354      	adds	r3, #84	@ 0x54
 8013940:	4618      	mov	r0, r3
 8013942:	f016 fa0b 	bl	8029d5c <_reclaim_reent>
		#elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
		{
			/* The task could have been allocated statically or dynamically, so
			check what was statically allocated before trying to free the
			memory. */
			if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
 8013946:	687b      	ldr	r3, [r7, #4]
 8013948:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 801394c:	2b00      	cmp	r3, #0
 801394e:	d108      	bne.n	8013962 <prvDeleteTCB+0x2e>
			{
				/* Both the stack and TCB were allocated dynamically, so both
				must be freed. */
				vPortFree( pxTCB->pxStack );
 8013950:	687b      	ldr	r3, [r7, #4]
 8013952:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8013954:	4618      	mov	r0, r3
 8013956:	f001 fadf 	bl	8014f18 <vPortFree>
				vPortFree( pxTCB );
 801395a:	6878      	ldr	r0, [r7, #4]
 801395c:	f001 fadc 	bl	8014f18 <vPortFree>
				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
				mtCOVERAGE_TEST_MARKER();
			}
		}
		#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
	}
 8013960:	e019      	b.n	8013996 <prvDeleteTCB+0x62>
			else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
 8013962:	687b      	ldr	r3, [r7, #4]
 8013964:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 8013968:	2b01      	cmp	r3, #1
 801396a:	d103      	bne.n	8013974 <prvDeleteTCB+0x40>
				vPortFree( pxTCB );
 801396c:	6878      	ldr	r0, [r7, #4]
 801396e:	f001 fad3 	bl	8014f18 <vPortFree>
	}
 8013972:	e010      	b.n	8013996 <prvDeleteTCB+0x62>
				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
 8013974:	687b      	ldr	r3, [r7, #4]
 8013976:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 801397a:	2b02      	cmp	r3, #2
 801397c:	d00b      	beq.n	8013996 <prvDeleteTCB+0x62>
	__asm volatile
 801397e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013982:	f383 8811 	msr	BASEPRI, r3
 8013986:	f3bf 8f6f 	isb	sy
 801398a:	f3bf 8f4f 	dsb	sy
 801398e:	60fb      	str	r3, [r7, #12]
}
 8013990:	bf00      	nop
 8013992:	bf00      	nop
 8013994:	e7fd      	b.n	8013992 <prvDeleteTCB+0x5e>
	}
 8013996:	bf00      	nop
 8013998:	3710      	adds	r7, #16
 801399a:	46bd      	mov	sp, r7
 801399c:	bd80      	pop	{r7, pc}
	...

080139a0 <prvResetNextTaskUnblockTime>:

#endif /* INCLUDE_vTaskDelete */
/*-----------------------------------------------------------*/

static void prvResetNextTaskUnblockTime( void )
{
 80139a0:	b480      	push	{r7}
 80139a2:	b083      	sub	sp, #12
 80139a4:	af00      	add	r7, sp, #0
TCB_t *pxTCB;

	if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 80139a6:	4b0c      	ldr	r3, [pc, #48]	@ (80139d8 <prvResetNextTaskUnblockTime+0x38>)
 80139a8:	681b      	ldr	r3, [r3, #0]
 80139aa:	681b      	ldr	r3, [r3, #0]
 80139ac:	2b00      	cmp	r3, #0
 80139ae:	d104      	bne.n	80139ba <prvResetNextTaskUnblockTime+0x1a>
	{
		/* The new current delayed list is empty.  Set xNextTaskUnblockTime to
		the maximum possible value so it is	extremely unlikely that the
		if( xTickCount >= xNextTaskUnblockTime ) test will pass until
		there is an item in the delayed list. */
		xNextTaskUnblockTime = portMAX_DELAY;
 80139b0:	4b0a      	ldr	r3, [pc, #40]	@ (80139dc <prvResetNextTaskUnblockTime+0x3c>)
 80139b2:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 80139b6:	601a      	str	r2, [r3, #0]
		which the task at the head of the delayed list should be removed
		from the Blocked state. */
		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
	}
}
 80139b8:	e008      	b.n	80139cc <prvResetNextTaskUnblockTime+0x2c>
		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 80139ba:	4b07      	ldr	r3, [pc, #28]	@ (80139d8 <prvResetNextTaskUnblockTime+0x38>)
 80139bc:	681b      	ldr	r3, [r3, #0]
 80139be:	68db      	ldr	r3, [r3, #12]
 80139c0:	68db      	ldr	r3, [r3, #12]
 80139c2:	607b      	str	r3, [r7, #4]
		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
 80139c4:	687b      	ldr	r3, [r7, #4]
 80139c6:	685b      	ldr	r3, [r3, #4]
 80139c8:	4a04      	ldr	r2, [pc, #16]	@ (80139dc <prvResetNextTaskUnblockTime+0x3c>)
 80139ca:	6013      	str	r3, [r2, #0]
}
 80139cc:	bf00      	nop
 80139ce:	370c      	adds	r7, #12
 80139d0:	46bd      	mov	sp, r7
 80139d2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80139d6:	4770      	bx	lr
 80139d8:	2400411c 	.word	0x2400411c
 80139dc:	24004184 	.word	0x24004184

080139e0 <xTaskGetCurrentTaskHandle>:
/*-----------------------------------------------------------*/

#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) )

	TaskHandle_t xTaskGetCurrentTaskHandle( void )
	{
 80139e0:	b480      	push	{r7}
 80139e2:	b083      	sub	sp, #12
 80139e4:	af00      	add	r7, sp, #0
	TaskHandle_t xReturn;

		/* A critical section is not required as this is not called from
		an interrupt and the current TCB will always be the same for any
		individual execution thread. */
		xReturn = pxCurrentTCB;
 80139e6:	4b05      	ldr	r3, [pc, #20]	@ (80139fc <xTaskGetCurrentTaskHandle+0x1c>)
 80139e8:	681b      	ldr	r3, [r3, #0]
 80139ea:	607b      	str	r3, [r7, #4]

		return xReturn;
 80139ec:	687b      	ldr	r3, [r7, #4]
	}
 80139ee:	4618      	mov	r0, r3
 80139f0:	370c      	adds	r7, #12
 80139f2:	46bd      	mov	sp, r7
 80139f4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80139f8:	4770      	bx	lr
 80139fa:	bf00      	nop
 80139fc:	24003c90 	.word	0x24003c90

08013a00 <xTaskGetSchedulerState>:
/*-----------------------------------------------------------*/

#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )

	BaseType_t xTaskGetSchedulerState( void )
	{
 8013a00:	b480      	push	{r7}
 8013a02:	b083      	sub	sp, #12
 8013a04:	af00      	add	r7, sp, #0
	BaseType_t xReturn;

		if( xSchedulerRunning == pdFALSE )
 8013a06:	4b0b      	ldr	r3, [pc, #44]	@ (8013a34 <xTaskGetSchedulerState+0x34>)
 8013a08:	681b      	ldr	r3, [r3, #0]
 8013a0a:	2b00      	cmp	r3, #0
 8013a0c:	d102      	bne.n	8013a14 <xTaskGetSchedulerState+0x14>
		{
			xReturn = taskSCHEDULER_NOT_STARTED;
 8013a0e:	2301      	movs	r3, #1
 8013a10:	607b      	str	r3, [r7, #4]
 8013a12:	e008      	b.n	8013a26 <xTaskGetSchedulerState+0x26>
		}
		else
		{
			if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8013a14:	4b08      	ldr	r3, [pc, #32]	@ (8013a38 <xTaskGetSchedulerState+0x38>)
 8013a16:	681b      	ldr	r3, [r3, #0]
 8013a18:	2b00      	cmp	r3, #0
 8013a1a:	d102      	bne.n	8013a22 <xTaskGetSchedulerState+0x22>
			{
				xReturn = taskSCHEDULER_RUNNING;
 8013a1c:	2302      	movs	r3, #2
 8013a1e:	607b      	str	r3, [r7, #4]
 8013a20:	e001      	b.n	8013a26 <xTaskGetSchedulerState+0x26>
			}
			else
			{
				xReturn = taskSCHEDULER_SUSPENDED;
 8013a22:	2300      	movs	r3, #0
 8013a24:	607b      	str	r3, [r7, #4]
			}
		}

		return xReturn;
 8013a26:	687b      	ldr	r3, [r7, #4]
	}
 8013a28:	4618      	mov	r0, r3
 8013a2a:	370c      	adds	r7, #12
 8013a2c:	46bd      	mov	sp, r7
 8013a2e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013a32:	4770      	bx	lr
 8013a34:	24004170 	.word	0x24004170
 8013a38:	2400418c 	.word	0x2400418c

08013a3c <xTaskPriorityInherit>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
	{
 8013a3c:	b580      	push	{r7, lr}
 8013a3e:	b084      	sub	sp, #16
 8013a40:	af00      	add	r7, sp, #0
 8013a42:	6078      	str	r0, [r7, #4]
	TCB_t * const pxMutexHolderTCB = pxMutexHolder;
 8013a44:	687b      	ldr	r3, [r7, #4]
 8013a46:	60bb      	str	r3, [r7, #8]
	BaseType_t xReturn = pdFALSE;
 8013a48:	2300      	movs	r3, #0
 8013a4a:	60fb      	str	r3, [r7, #12]

		/* If the mutex was given back by an interrupt while the queue was
		locked then the mutex holder might now be NULL.  _RB_ Is this still
		needed as interrupts can no longer use mutexes? */
		if( pxMutexHolder != NULL )
 8013a4c:	687b      	ldr	r3, [r7, #4]
 8013a4e:	2b00      	cmp	r3, #0
 8013a50:	d051      	beq.n	8013af6 <xTaskPriorityInherit+0xba>
		{
			/* If the holder of the mutex has a priority below the priority of
			the task attempting to obtain the mutex then it will temporarily
			inherit the priority of the task attempting to obtain the mutex. */
			if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority )
 8013a52:	68bb      	ldr	r3, [r7, #8]
 8013a54:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013a56:	4b2a      	ldr	r3, [pc, #168]	@ (8013b00 <xTaskPriorityInherit+0xc4>)
 8013a58:	681b      	ldr	r3, [r3, #0]
 8013a5a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013a5c:	429a      	cmp	r2, r3
 8013a5e:	d241      	bcs.n	8013ae4 <xTaskPriorityInherit+0xa8>
			{
				/* Adjust the mutex holder state to account for its new
				priority.  Only reset the event list item value if the value is
				not being used for anything else. */
				if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
 8013a60:	68bb      	ldr	r3, [r7, #8]
 8013a62:	699b      	ldr	r3, [r3, #24]
 8013a64:	2b00      	cmp	r3, #0
 8013a66:	db06      	blt.n	8013a76 <xTaskPriorityInherit+0x3a>
				{
					listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8013a68:	4b25      	ldr	r3, [pc, #148]	@ (8013b00 <xTaskPriorityInherit+0xc4>)
 8013a6a:	681b      	ldr	r3, [r3, #0]
 8013a6c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013a6e:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 8013a72:	68bb      	ldr	r3, [r7, #8]
 8013a74:	619a      	str	r2, [r3, #24]
					mtCOVERAGE_TEST_MARKER();
				}

				/* If the task being modified is in the ready state it will need
				to be moved into a new list. */
				if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE )
 8013a76:	68bb      	ldr	r3, [r7, #8]
 8013a78:	6959      	ldr	r1, [r3, #20]
 8013a7a:	68bb      	ldr	r3, [r7, #8]
 8013a7c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013a7e:	4613      	mov	r3, r2
 8013a80:	009b      	lsls	r3, r3, #2
 8013a82:	4413      	add	r3, r2
 8013a84:	009b      	lsls	r3, r3, #2
 8013a86:	4a1f      	ldr	r2, [pc, #124]	@ (8013b04 <xTaskPriorityInherit+0xc8>)
 8013a88:	4413      	add	r3, r2
 8013a8a:	4299      	cmp	r1, r3
 8013a8c:	d122      	bne.n	8013ad4 <xTaskPriorityInherit+0x98>
				{
					if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 8013a8e:	68bb      	ldr	r3, [r7, #8]
 8013a90:	3304      	adds	r3, #4
 8013a92:	4618      	mov	r0, r3
 8013a94:	f7fd fc20 	bl	80112d8 <uxListRemove>
					{
						mtCOVERAGE_TEST_MARKER();
					}

					/* Inherit the priority before being moved into the new list. */
					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
 8013a98:	4b19      	ldr	r3, [pc, #100]	@ (8013b00 <xTaskPriorityInherit+0xc4>)
 8013a9a:	681b      	ldr	r3, [r3, #0]
 8013a9c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013a9e:	68bb      	ldr	r3, [r7, #8]
 8013aa0:	62da      	str	r2, [r3, #44]	@ 0x2c
					prvAddTaskToReadyList( pxMutexHolderTCB );
 8013aa2:	68bb      	ldr	r3, [r7, #8]
 8013aa4:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013aa6:	4b18      	ldr	r3, [pc, #96]	@ (8013b08 <xTaskPriorityInherit+0xcc>)
 8013aa8:	681b      	ldr	r3, [r3, #0]
 8013aaa:	429a      	cmp	r2, r3
 8013aac:	d903      	bls.n	8013ab6 <xTaskPriorityInherit+0x7a>
 8013aae:	68bb      	ldr	r3, [r7, #8]
 8013ab0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013ab2:	4a15      	ldr	r2, [pc, #84]	@ (8013b08 <xTaskPriorityInherit+0xcc>)
 8013ab4:	6013      	str	r3, [r2, #0]
 8013ab6:	68bb      	ldr	r3, [r7, #8]
 8013ab8:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013aba:	4613      	mov	r3, r2
 8013abc:	009b      	lsls	r3, r3, #2
 8013abe:	4413      	add	r3, r2
 8013ac0:	009b      	lsls	r3, r3, #2
 8013ac2:	4a10      	ldr	r2, [pc, #64]	@ (8013b04 <xTaskPriorityInherit+0xc8>)
 8013ac4:	441a      	add	r2, r3
 8013ac6:	68bb      	ldr	r3, [r7, #8]
 8013ac8:	3304      	adds	r3, #4
 8013aca:	4619      	mov	r1, r3
 8013acc:	4610      	mov	r0, r2
 8013ace:	f7fd fba6 	bl	801121e <vListInsertEnd>
 8013ad2:	e004      	b.n	8013ade <xTaskPriorityInherit+0xa2>
				}
				else
				{
					/* Just inherit the priority. */
					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
 8013ad4:	4b0a      	ldr	r3, [pc, #40]	@ (8013b00 <xTaskPriorityInherit+0xc4>)
 8013ad6:	681b      	ldr	r3, [r3, #0]
 8013ad8:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013ada:	68bb      	ldr	r3, [r7, #8]
 8013adc:	62da      	str	r2, [r3, #44]	@ 0x2c
				}

				traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority );

				/* Inheritance occurred. */
				xReturn = pdTRUE;
 8013ade:	2301      	movs	r3, #1
 8013ae0:	60fb      	str	r3, [r7, #12]
 8013ae2:	e008      	b.n	8013af6 <xTaskPriorityInherit+0xba>
			}
			else
			{
				if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority )
 8013ae4:	68bb      	ldr	r3, [r7, #8]
 8013ae6:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 8013ae8:	4b05      	ldr	r3, [pc, #20]	@ (8013b00 <xTaskPriorityInherit+0xc4>)
 8013aea:	681b      	ldr	r3, [r3, #0]
 8013aec:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013aee:	429a      	cmp	r2, r3
 8013af0:	d201      	bcs.n	8013af6 <xTaskPriorityInherit+0xba>
					current priority of the mutex holder is not lower than the
					priority of the task attempting to take the mutex.
					Therefore the mutex holder must have already inherited a
					priority, but inheritance would have occurred if that had
					not been the case. */
					xReturn = pdTRUE;
 8013af2:	2301      	movs	r3, #1
 8013af4:	60fb      	str	r3, [r7, #12]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		return xReturn;
 8013af6:	68fb      	ldr	r3, [r7, #12]
	}
 8013af8:	4618      	mov	r0, r3
 8013afa:	3710      	adds	r7, #16
 8013afc:	46bd      	mov	sp, r7
 8013afe:	bd80      	pop	{r7, pc}
 8013b00:	24003c90 	.word	0x24003c90
 8013b04:	24003c94 	.word	0x24003c94
 8013b08:	2400416c 	.word	0x2400416c

08013b0c <xTaskPriorityDisinherit>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
	{
 8013b0c:	b580      	push	{r7, lr}
 8013b0e:	b086      	sub	sp, #24
 8013b10:	af00      	add	r7, sp, #0
 8013b12:	6078      	str	r0, [r7, #4]
	TCB_t * const pxTCB = pxMutexHolder;
 8013b14:	687b      	ldr	r3, [r7, #4]
 8013b16:	613b      	str	r3, [r7, #16]
	BaseType_t xReturn = pdFALSE;
 8013b18:	2300      	movs	r3, #0
 8013b1a:	617b      	str	r3, [r7, #20]

		if( pxMutexHolder != NULL )
 8013b1c:	687b      	ldr	r3, [r7, #4]
 8013b1e:	2b00      	cmp	r3, #0
 8013b20:	d058      	beq.n	8013bd4 <xTaskPriorityDisinherit+0xc8>
		{
			/* A task can only have an inherited priority if it holds the mutex.
			If the mutex is held by a task then it cannot be given from an
			interrupt, and if a mutex is given by the holding task then it must
			be the running state task. */
			configASSERT( pxTCB == pxCurrentTCB );
 8013b22:	4b2f      	ldr	r3, [pc, #188]	@ (8013be0 <xTaskPriorityDisinherit+0xd4>)
 8013b24:	681b      	ldr	r3, [r3, #0]
 8013b26:	693a      	ldr	r2, [r7, #16]
 8013b28:	429a      	cmp	r2, r3
 8013b2a:	d00b      	beq.n	8013b44 <xTaskPriorityDisinherit+0x38>
	__asm volatile
 8013b2c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013b30:	f383 8811 	msr	BASEPRI, r3
 8013b34:	f3bf 8f6f 	isb	sy
 8013b38:	f3bf 8f4f 	dsb	sy
 8013b3c:	60fb      	str	r3, [r7, #12]
}
 8013b3e:	bf00      	nop
 8013b40:	bf00      	nop
 8013b42:	e7fd      	b.n	8013b40 <xTaskPriorityDisinherit+0x34>
			configASSERT( pxTCB->uxMutexesHeld );
 8013b44:	693b      	ldr	r3, [r7, #16]
 8013b46:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8013b48:	2b00      	cmp	r3, #0
 8013b4a:	d10b      	bne.n	8013b64 <xTaskPriorityDisinherit+0x58>
	__asm volatile
 8013b4c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013b50:	f383 8811 	msr	BASEPRI, r3
 8013b54:	f3bf 8f6f 	isb	sy
 8013b58:	f3bf 8f4f 	dsb	sy
 8013b5c:	60bb      	str	r3, [r7, #8]
}
 8013b5e:	bf00      	nop
 8013b60:	bf00      	nop
 8013b62:	e7fd      	b.n	8013b60 <xTaskPriorityDisinherit+0x54>
			( pxTCB->uxMutexesHeld )--;
 8013b64:	693b      	ldr	r3, [r7, #16]
 8013b66:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8013b68:	1e5a      	subs	r2, r3, #1
 8013b6a:	693b      	ldr	r3, [r7, #16]
 8013b6c:	651a      	str	r2, [r3, #80]	@ 0x50

			/* Has the holder of the mutex inherited the priority of another
			task? */
			if( pxTCB->uxPriority != pxTCB->uxBasePriority )
 8013b6e:	693b      	ldr	r3, [r7, #16]
 8013b70:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013b72:	693b      	ldr	r3, [r7, #16]
 8013b74:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8013b76:	429a      	cmp	r2, r3
 8013b78:	d02c      	beq.n	8013bd4 <xTaskPriorityDisinherit+0xc8>
			{
				/* Only disinherit if no other mutexes are held. */
				if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
 8013b7a:	693b      	ldr	r3, [r7, #16]
 8013b7c:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8013b7e:	2b00      	cmp	r3, #0
 8013b80:	d128      	bne.n	8013bd4 <xTaskPriorityDisinherit+0xc8>
					/* A task can only have an inherited priority if it holds
					the mutex.  If the mutex is held by a task then it cannot be
					given from an interrupt, and if a mutex is given by the
					holding task then it must be the running state task.  Remove
					the holding task from the ready/delayed list. */
					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 8013b82:	693b      	ldr	r3, [r7, #16]
 8013b84:	3304      	adds	r3, #4
 8013b86:	4618      	mov	r0, r3
 8013b88:	f7fd fba6 	bl	80112d8 <uxListRemove>
					}

					/* Disinherit the priority before adding the task into the
					new	ready list. */
					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
					pxTCB->uxPriority = pxTCB->uxBasePriority;
 8013b8c:	693b      	ldr	r3, [r7, #16]
 8013b8e:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 8013b90:	693b      	ldr	r3, [r7, #16]
 8013b92:	62da      	str	r2, [r3, #44]	@ 0x2c

					/* Reset the event list item value.  It cannot be in use for
					any other purpose if this task is running, and it must be
					running to give back the mutex. */
					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8013b94:	693b      	ldr	r3, [r7, #16]
 8013b96:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013b98:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 8013b9c:	693b      	ldr	r3, [r7, #16]
 8013b9e:	619a      	str	r2, [r3, #24]
					prvAddTaskToReadyList( pxTCB );
 8013ba0:	693b      	ldr	r3, [r7, #16]
 8013ba2:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013ba4:	4b0f      	ldr	r3, [pc, #60]	@ (8013be4 <xTaskPriorityDisinherit+0xd8>)
 8013ba6:	681b      	ldr	r3, [r3, #0]
 8013ba8:	429a      	cmp	r2, r3
 8013baa:	d903      	bls.n	8013bb4 <xTaskPriorityDisinherit+0xa8>
 8013bac:	693b      	ldr	r3, [r7, #16]
 8013bae:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013bb0:	4a0c      	ldr	r2, [pc, #48]	@ (8013be4 <xTaskPriorityDisinherit+0xd8>)
 8013bb2:	6013      	str	r3, [r2, #0]
 8013bb4:	693b      	ldr	r3, [r7, #16]
 8013bb6:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013bb8:	4613      	mov	r3, r2
 8013bba:	009b      	lsls	r3, r3, #2
 8013bbc:	4413      	add	r3, r2
 8013bbe:	009b      	lsls	r3, r3, #2
 8013bc0:	4a09      	ldr	r2, [pc, #36]	@ (8013be8 <xTaskPriorityDisinherit+0xdc>)
 8013bc2:	441a      	add	r2, r3
 8013bc4:	693b      	ldr	r3, [r7, #16]
 8013bc6:	3304      	adds	r3, #4
 8013bc8:	4619      	mov	r1, r3
 8013bca:	4610      	mov	r0, r2
 8013bcc:	f7fd fb27 	bl	801121e <vListInsertEnd>
					in an order different to that in which they were taken.
					If a context switch did not occur when the first mutex was
					returned, even if a task was waiting on it, then a context
					switch should occur when the last mutex is returned whether
					a task is waiting on it or not. */
					xReturn = pdTRUE;
 8013bd0:	2301      	movs	r3, #1
 8013bd2:	617b      	str	r3, [r7, #20]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		return xReturn;
 8013bd4:	697b      	ldr	r3, [r7, #20]
	}
 8013bd6:	4618      	mov	r0, r3
 8013bd8:	3718      	adds	r7, #24
 8013bda:	46bd      	mov	sp, r7
 8013bdc:	bd80      	pop	{r7, pc}
 8013bde:	bf00      	nop
 8013be0:	24003c90 	.word	0x24003c90
 8013be4:	2400416c 	.word	0x2400416c
 8013be8:	24003c94 	.word	0x24003c94

08013bec <vTaskPriorityDisinheritAfterTimeout>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask )
	{
 8013bec:	b580      	push	{r7, lr}
 8013bee:	b088      	sub	sp, #32
 8013bf0:	af00      	add	r7, sp, #0
 8013bf2:	6078      	str	r0, [r7, #4]
 8013bf4:	6039      	str	r1, [r7, #0]
	TCB_t * const pxTCB = pxMutexHolder;
 8013bf6:	687b      	ldr	r3, [r7, #4]
 8013bf8:	61bb      	str	r3, [r7, #24]
	UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse;
	const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1;
 8013bfa:	2301      	movs	r3, #1
 8013bfc:	617b      	str	r3, [r7, #20]

		if( pxMutexHolder != NULL )
 8013bfe:	687b      	ldr	r3, [r7, #4]
 8013c00:	2b00      	cmp	r3, #0
 8013c02:	d06c      	beq.n	8013cde <vTaskPriorityDisinheritAfterTimeout+0xf2>
		{
			/* If pxMutexHolder is not NULL then the holder must hold at least
			one mutex. */
			configASSERT( pxTCB->uxMutexesHeld );
 8013c04:	69bb      	ldr	r3, [r7, #24]
 8013c06:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8013c08:	2b00      	cmp	r3, #0
 8013c0a:	d10b      	bne.n	8013c24 <vTaskPriorityDisinheritAfterTimeout+0x38>
	__asm volatile
 8013c0c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013c10:	f383 8811 	msr	BASEPRI, r3
 8013c14:	f3bf 8f6f 	isb	sy
 8013c18:	f3bf 8f4f 	dsb	sy
 8013c1c:	60fb      	str	r3, [r7, #12]
}
 8013c1e:	bf00      	nop
 8013c20:	bf00      	nop
 8013c22:	e7fd      	b.n	8013c20 <vTaskPriorityDisinheritAfterTimeout+0x34>

			/* Determine the priority to which the priority of the task that
			holds the mutex should be set.  This will be the greater of the
			holding task's base priority and the priority of the highest
			priority task that is waiting to obtain the mutex. */
			if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask )
 8013c24:	69bb      	ldr	r3, [r7, #24]
 8013c26:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8013c28:	683a      	ldr	r2, [r7, #0]
 8013c2a:	429a      	cmp	r2, r3
 8013c2c:	d902      	bls.n	8013c34 <vTaskPriorityDisinheritAfterTimeout+0x48>
			{
				uxPriorityToUse = uxHighestPriorityWaitingTask;
 8013c2e:	683b      	ldr	r3, [r7, #0]
 8013c30:	61fb      	str	r3, [r7, #28]
 8013c32:	e002      	b.n	8013c3a <vTaskPriorityDisinheritAfterTimeout+0x4e>
			}
			else
			{
				uxPriorityToUse = pxTCB->uxBasePriority;
 8013c34:	69bb      	ldr	r3, [r7, #24]
 8013c36:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8013c38:	61fb      	str	r3, [r7, #28]
			}

			/* Does the priority need to change? */
			if( pxTCB->uxPriority != uxPriorityToUse )
 8013c3a:	69bb      	ldr	r3, [r7, #24]
 8013c3c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013c3e:	69fa      	ldr	r2, [r7, #28]
 8013c40:	429a      	cmp	r2, r3
 8013c42:	d04c      	beq.n	8013cde <vTaskPriorityDisinheritAfterTimeout+0xf2>
			{
				/* Only disinherit if no other mutexes are held.  This is a
				simplification in the priority inheritance implementation.  If
				the task that holds the mutex is also holding other mutexes then
				the other mutexes may have caused the priority inheritance. */
				if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld )
 8013c44:	69bb      	ldr	r3, [r7, #24]
 8013c46:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8013c48:	697a      	ldr	r2, [r7, #20]
 8013c4a:	429a      	cmp	r2, r3
 8013c4c:	d147      	bne.n	8013cde <vTaskPriorityDisinheritAfterTimeout+0xf2>
				{
					/* If a task has timed out because it already holds the
					mutex it was trying to obtain then it cannot of inherited
					its own priority. */
					configASSERT( pxTCB != pxCurrentTCB );
 8013c4e:	4b26      	ldr	r3, [pc, #152]	@ (8013ce8 <vTaskPriorityDisinheritAfterTimeout+0xfc>)
 8013c50:	681b      	ldr	r3, [r3, #0]
 8013c52:	69ba      	ldr	r2, [r7, #24]
 8013c54:	429a      	cmp	r2, r3
 8013c56:	d10b      	bne.n	8013c70 <vTaskPriorityDisinheritAfterTimeout+0x84>
	__asm volatile
 8013c58:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013c5c:	f383 8811 	msr	BASEPRI, r3
 8013c60:	f3bf 8f6f 	isb	sy
 8013c64:	f3bf 8f4f 	dsb	sy
 8013c68:	60bb      	str	r3, [r7, #8]
}
 8013c6a:	bf00      	nop
 8013c6c:	bf00      	nop
 8013c6e:	e7fd      	b.n	8013c6c <vTaskPriorityDisinheritAfterTimeout+0x80>

					/* Disinherit the priority, remembering the previous
					priority to facilitate determining the subject task's
					state. */
					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
					uxPriorityUsedOnEntry = pxTCB->uxPriority;
 8013c70:	69bb      	ldr	r3, [r7, #24]
 8013c72:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013c74:	613b      	str	r3, [r7, #16]
					pxTCB->uxPriority = uxPriorityToUse;
 8013c76:	69bb      	ldr	r3, [r7, #24]
 8013c78:	69fa      	ldr	r2, [r7, #28]
 8013c7a:	62da      	str	r2, [r3, #44]	@ 0x2c

					/* Only reset the event list item value if the value is not
					being used for anything else. */
					if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
 8013c7c:	69bb      	ldr	r3, [r7, #24]
 8013c7e:	699b      	ldr	r3, [r3, #24]
 8013c80:	2b00      	cmp	r3, #0
 8013c82:	db04      	blt.n	8013c8e <vTaskPriorityDisinheritAfterTimeout+0xa2>
					{
						listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8013c84:	69fb      	ldr	r3, [r7, #28]
 8013c86:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 8013c8a:	69bb      	ldr	r3, [r7, #24]
 8013c8c:	619a      	str	r2, [r3, #24]
					then the task that holds the mutex could be in either the
					Ready, Blocked or Suspended states.  Only remove the task
					from its current state list if it is in the Ready state as
					the task's priority is going to change and there is one
					Ready list per priority. */
					if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
 8013c8e:	69bb      	ldr	r3, [r7, #24]
 8013c90:	6959      	ldr	r1, [r3, #20]
 8013c92:	693a      	ldr	r2, [r7, #16]
 8013c94:	4613      	mov	r3, r2
 8013c96:	009b      	lsls	r3, r3, #2
 8013c98:	4413      	add	r3, r2
 8013c9a:	009b      	lsls	r3, r3, #2
 8013c9c:	4a13      	ldr	r2, [pc, #76]	@ (8013cec <vTaskPriorityDisinheritAfterTimeout+0x100>)
 8013c9e:	4413      	add	r3, r2
 8013ca0:	4299      	cmp	r1, r3
 8013ca2:	d11c      	bne.n	8013cde <vTaskPriorityDisinheritAfterTimeout+0xf2>
					{
						if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 8013ca4:	69bb      	ldr	r3, [r7, #24]
 8013ca6:	3304      	adds	r3, #4
 8013ca8:	4618      	mov	r0, r3
 8013caa:	f7fd fb15 	bl	80112d8 <uxListRemove>
						else
						{
							mtCOVERAGE_TEST_MARKER();
						}

						prvAddTaskToReadyList( pxTCB );
 8013cae:	69bb      	ldr	r3, [r7, #24]
 8013cb0:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013cb2:	4b0f      	ldr	r3, [pc, #60]	@ (8013cf0 <vTaskPriorityDisinheritAfterTimeout+0x104>)
 8013cb4:	681b      	ldr	r3, [r3, #0]
 8013cb6:	429a      	cmp	r2, r3
 8013cb8:	d903      	bls.n	8013cc2 <vTaskPriorityDisinheritAfterTimeout+0xd6>
 8013cba:	69bb      	ldr	r3, [r7, #24]
 8013cbc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013cbe:	4a0c      	ldr	r2, [pc, #48]	@ (8013cf0 <vTaskPriorityDisinheritAfterTimeout+0x104>)
 8013cc0:	6013      	str	r3, [r2, #0]
 8013cc2:	69bb      	ldr	r3, [r7, #24]
 8013cc4:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013cc6:	4613      	mov	r3, r2
 8013cc8:	009b      	lsls	r3, r3, #2
 8013cca:	4413      	add	r3, r2
 8013ccc:	009b      	lsls	r3, r3, #2
 8013cce:	4a07      	ldr	r2, [pc, #28]	@ (8013cec <vTaskPriorityDisinheritAfterTimeout+0x100>)
 8013cd0:	441a      	add	r2, r3
 8013cd2:	69bb      	ldr	r3, [r7, #24]
 8013cd4:	3304      	adds	r3, #4
 8013cd6:	4619      	mov	r1, r3
 8013cd8:	4610      	mov	r0, r2
 8013cda:	f7fd faa0 	bl	801121e <vListInsertEnd>
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
 8013cde:	bf00      	nop
 8013ce0:	3720      	adds	r7, #32
 8013ce2:	46bd      	mov	sp, r7
 8013ce4:	bd80      	pop	{r7, pc}
 8013ce6:	bf00      	nop
 8013ce8:	24003c90 	.word	0x24003c90
 8013cec:	24003c94 	.word	0x24003c94
 8013cf0:	2400416c 	.word	0x2400416c

08013cf4 <pvTaskIncrementMutexHeldCount>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	TaskHandle_t pvTaskIncrementMutexHeldCount( void )
	{
 8013cf4:	b480      	push	{r7}
 8013cf6:	af00      	add	r7, sp, #0
		/* If xSemaphoreCreateMutex() is called before any tasks have been created
		then pxCurrentTCB will be NULL. */
		if( pxCurrentTCB != NULL )
 8013cf8:	4b07      	ldr	r3, [pc, #28]	@ (8013d18 <pvTaskIncrementMutexHeldCount+0x24>)
 8013cfa:	681b      	ldr	r3, [r3, #0]
 8013cfc:	2b00      	cmp	r3, #0
 8013cfe:	d004      	beq.n	8013d0a <pvTaskIncrementMutexHeldCount+0x16>
		{
			( pxCurrentTCB->uxMutexesHeld )++;
 8013d00:	4b05      	ldr	r3, [pc, #20]	@ (8013d18 <pvTaskIncrementMutexHeldCount+0x24>)
 8013d02:	681b      	ldr	r3, [r3, #0]
 8013d04:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 8013d06:	3201      	adds	r2, #1
 8013d08:	651a      	str	r2, [r3, #80]	@ 0x50
		}

		return pxCurrentTCB;
 8013d0a:	4b03      	ldr	r3, [pc, #12]	@ (8013d18 <pvTaskIncrementMutexHeldCount+0x24>)
 8013d0c:	681b      	ldr	r3, [r3, #0]
	}
 8013d0e:	4618      	mov	r0, r3
 8013d10:	46bd      	mov	sp, r7
 8013d12:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013d16:	4770      	bx	lr
 8013d18:	24003c90 	.word	0x24003c90

08013d1c <xTaskNotifyWait>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait )
	{
 8013d1c:	b580      	push	{r7, lr}
 8013d1e:	b086      	sub	sp, #24
 8013d20:	af00      	add	r7, sp, #0
 8013d22:	60f8      	str	r0, [r7, #12]
 8013d24:	60b9      	str	r1, [r7, #8]
 8013d26:	607a      	str	r2, [r7, #4]
 8013d28:	603b      	str	r3, [r7, #0]
	BaseType_t xReturn;

		taskENTER_CRITICAL();
 8013d2a:	f000 ff05 	bl	8014b38 <vPortEnterCritical>
		{
			/* Only block if a notification is not already pending. */
			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
 8013d2e:	4b29      	ldr	r3, [pc, #164]	@ (8013dd4 <xTaskNotifyWait+0xb8>)
 8013d30:	681b      	ldr	r3, [r3, #0]
 8013d32:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8013d36:	b2db      	uxtb	r3, r3
 8013d38:	2b02      	cmp	r3, #2
 8013d3a:	d01c      	beq.n	8013d76 <xTaskNotifyWait+0x5a>
			{
				/* Clear bits in the task's notification value as bits may get
				set	by the notifying task or interrupt.  This can be used to
				clear the value to zero. */
				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnEntry;
 8013d3c:	4b25      	ldr	r3, [pc, #148]	@ (8013dd4 <xTaskNotifyWait+0xb8>)
 8013d3e:	681b      	ldr	r3, [r3, #0]
 8013d40:	f8d3 10a0 	ldr.w	r1, [r3, #160]	@ 0xa0
 8013d44:	68fa      	ldr	r2, [r7, #12]
 8013d46:	43d2      	mvns	r2, r2
 8013d48:	400a      	ands	r2, r1
 8013d4a:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0

				/* Mark this task as waiting for a notification. */
				pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
 8013d4e:	4b21      	ldr	r3, [pc, #132]	@ (8013dd4 <xTaskNotifyWait+0xb8>)
 8013d50:	681b      	ldr	r3, [r3, #0]
 8013d52:	2201      	movs	r2, #1
 8013d54:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

				if( xTicksToWait > ( TickType_t ) 0 )
 8013d58:	683b      	ldr	r3, [r7, #0]
 8013d5a:	2b00      	cmp	r3, #0
 8013d5c:	d00b      	beq.n	8013d76 <xTaskNotifyWait+0x5a>
				{
					prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 8013d5e:	2101      	movs	r1, #1
 8013d60:	6838      	ldr	r0, [r7, #0]
 8013d62:	f000 fa09 	bl	8014178 <prvAddCurrentTaskToDelayedList>

					/* All ports are written to allow a yield in a critical
					section (some will yield immediately, others wait until the
					critical section exits) - but it is not something that
					application code should ever do. */
					portYIELD_WITHIN_API();
 8013d66:	4b1c      	ldr	r3, [pc, #112]	@ (8013dd8 <xTaskNotifyWait+0xbc>)
 8013d68:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8013d6c:	601a      	str	r2, [r3, #0]
 8013d6e:	f3bf 8f4f 	dsb	sy
 8013d72:	f3bf 8f6f 	isb	sy
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 8013d76:	f000 ff11 	bl	8014b9c <vPortExitCritical>

		taskENTER_CRITICAL();
 8013d7a:	f000 fedd 	bl	8014b38 <vPortEnterCritical>
		{
			traceTASK_NOTIFY_WAIT();

			if( pulNotificationValue != NULL )
 8013d7e:	687b      	ldr	r3, [r7, #4]
 8013d80:	2b00      	cmp	r3, #0
 8013d82:	d005      	beq.n	8013d90 <xTaskNotifyWait+0x74>
			{
				/* Output the current notification value, which may or may not
				have changed. */
				*pulNotificationValue = pxCurrentTCB->ulNotifiedValue;
 8013d84:	4b13      	ldr	r3, [pc, #76]	@ (8013dd4 <xTaskNotifyWait+0xb8>)
 8013d86:	681b      	ldr	r3, [r3, #0]
 8013d88:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8013d8c:	687b      	ldr	r3, [r7, #4]
 8013d8e:	601a      	str	r2, [r3, #0]

			/* If ucNotifyValue is set then either the task never entered the
			blocked state (because a notification was already pending) or the
			task unblocked because of a notification.  Otherwise the task
			unblocked because of a timeout. */
			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
 8013d90:	4b10      	ldr	r3, [pc, #64]	@ (8013dd4 <xTaskNotifyWait+0xb8>)
 8013d92:	681b      	ldr	r3, [r3, #0]
 8013d94:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8013d98:	b2db      	uxtb	r3, r3
 8013d9a:	2b02      	cmp	r3, #2
 8013d9c:	d002      	beq.n	8013da4 <xTaskNotifyWait+0x88>
			{
				/* A notification was not received. */
				xReturn = pdFALSE;
 8013d9e:	2300      	movs	r3, #0
 8013da0:	617b      	str	r3, [r7, #20]
 8013da2:	e00a      	b.n	8013dba <xTaskNotifyWait+0x9e>
			}
			else
			{
				/* A notification was already pending or a notification was
				received while the task was waiting. */
				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnExit;
 8013da4:	4b0b      	ldr	r3, [pc, #44]	@ (8013dd4 <xTaskNotifyWait+0xb8>)
 8013da6:	681b      	ldr	r3, [r3, #0]
 8013da8:	f8d3 10a0 	ldr.w	r1, [r3, #160]	@ 0xa0
 8013dac:	68ba      	ldr	r2, [r7, #8]
 8013dae:	43d2      	mvns	r2, r2
 8013db0:	400a      	ands	r2, r1
 8013db2:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
				xReturn = pdTRUE;
 8013db6:	2301      	movs	r3, #1
 8013db8:	617b      	str	r3, [r7, #20]
			}

			pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 8013dba:	4b06      	ldr	r3, [pc, #24]	@ (8013dd4 <xTaskNotifyWait+0xb8>)
 8013dbc:	681b      	ldr	r3, [r3, #0]
 8013dbe:	2200      	movs	r2, #0
 8013dc0:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
		}
		taskEXIT_CRITICAL();
 8013dc4:	f000 feea 	bl	8014b9c <vPortExitCritical>

		return xReturn;
 8013dc8:	697b      	ldr	r3, [r7, #20]
	}
 8013dca:	4618      	mov	r0, r3
 8013dcc:	3718      	adds	r7, #24
 8013dce:	46bd      	mov	sp, r7
 8013dd0:	bd80      	pop	{r7, pc}
 8013dd2:	bf00      	nop
 8013dd4:	24003c90 	.word	0x24003c90
 8013dd8:	e000ed04 	.word	0xe000ed04

08013ddc <xTaskGenericNotify>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue )
	{
 8013ddc:	b580      	push	{r7, lr}
 8013dde:	b08a      	sub	sp, #40	@ 0x28
 8013de0:	af00      	add	r7, sp, #0
 8013de2:	60f8      	str	r0, [r7, #12]
 8013de4:	60b9      	str	r1, [r7, #8]
 8013de6:	603b      	str	r3, [r7, #0]
 8013de8:	4613      	mov	r3, r2
 8013dea:	71fb      	strb	r3, [r7, #7]
	TCB_t * pxTCB;
	BaseType_t xReturn = pdPASS;
 8013dec:	2301      	movs	r3, #1
 8013dee:	627b      	str	r3, [r7, #36]	@ 0x24
	uint8_t ucOriginalNotifyState;

		configASSERT( xTaskToNotify );
 8013df0:	68fb      	ldr	r3, [r7, #12]
 8013df2:	2b00      	cmp	r3, #0
 8013df4:	d10b      	bne.n	8013e0e <xTaskGenericNotify+0x32>
	__asm volatile
 8013df6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013dfa:	f383 8811 	msr	BASEPRI, r3
 8013dfe:	f3bf 8f6f 	isb	sy
 8013e02:	f3bf 8f4f 	dsb	sy
 8013e06:	61bb      	str	r3, [r7, #24]
}
 8013e08:	bf00      	nop
 8013e0a:	bf00      	nop
 8013e0c:	e7fd      	b.n	8013e0a <xTaskGenericNotify+0x2e>
		pxTCB = xTaskToNotify;
 8013e0e:	68fb      	ldr	r3, [r7, #12]
 8013e10:	623b      	str	r3, [r7, #32]

		taskENTER_CRITICAL();
 8013e12:	f000 fe91 	bl	8014b38 <vPortEnterCritical>
		{
			if( pulPreviousNotificationValue != NULL )
 8013e16:	683b      	ldr	r3, [r7, #0]
 8013e18:	2b00      	cmp	r3, #0
 8013e1a:	d004      	beq.n	8013e26 <xTaskGenericNotify+0x4a>
			{
				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
 8013e1c:	6a3b      	ldr	r3, [r7, #32]
 8013e1e:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8013e22:	683b      	ldr	r3, [r7, #0]
 8013e24:	601a      	str	r2, [r3, #0]
			}

			ucOriginalNotifyState = pxTCB->ucNotifyState;
 8013e26:	6a3b      	ldr	r3, [r7, #32]
 8013e28:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8013e2c:	77fb      	strb	r3, [r7, #31]

			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
 8013e2e:	6a3b      	ldr	r3, [r7, #32]
 8013e30:	2202      	movs	r2, #2
 8013e32:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

			switch( eAction )
 8013e36:	79fb      	ldrb	r3, [r7, #7]
 8013e38:	2b04      	cmp	r3, #4
 8013e3a:	d82e      	bhi.n	8013e9a <xTaskGenericNotify+0xbe>
 8013e3c:	a201      	add	r2, pc, #4	@ (adr r2, 8013e44 <xTaskGenericNotify+0x68>)
 8013e3e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8013e42:	bf00      	nop
 8013e44:	08013ebf 	.word	0x08013ebf
 8013e48:	08013e59 	.word	0x08013e59
 8013e4c:	08013e6b 	.word	0x08013e6b
 8013e50:	08013e7b 	.word	0x08013e7b
 8013e54:	08013e85 	.word	0x08013e85
			{
				case eSetBits	:
					pxTCB->ulNotifiedValue |= ulValue;
 8013e58:	6a3b      	ldr	r3, [r7, #32]
 8013e5a:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8013e5e:	68bb      	ldr	r3, [r7, #8]
 8013e60:	431a      	orrs	r2, r3
 8013e62:	6a3b      	ldr	r3, [r7, #32]
 8013e64:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8013e68:	e02c      	b.n	8013ec4 <xTaskGenericNotify+0xe8>

				case eIncrement	:
					( pxTCB->ulNotifiedValue )++;
 8013e6a:	6a3b      	ldr	r3, [r7, #32]
 8013e6c:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 8013e70:	1c5a      	adds	r2, r3, #1
 8013e72:	6a3b      	ldr	r3, [r7, #32]
 8013e74:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8013e78:	e024      	b.n	8013ec4 <xTaskGenericNotify+0xe8>

				case eSetValueWithOverwrite	:
					pxTCB->ulNotifiedValue = ulValue;
 8013e7a:	6a3b      	ldr	r3, [r7, #32]
 8013e7c:	68ba      	ldr	r2, [r7, #8]
 8013e7e:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8013e82:	e01f      	b.n	8013ec4 <xTaskGenericNotify+0xe8>

				case eSetValueWithoutOverwrite :
					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
 8013e84:	7ffb      	ldrb	r3, [r7, #31]
 8013e86:	2b02      	cmp	r3, #2
 8013e88:	d004      	beq.n	8013e94 <xTaskGenericNotify+0xb8>
					{
						pxTCB->ulNotifiedValue = ulValue;
 8013e8a:	6a3b      	ldr	r3, [r7, #32]
 8013e8c:	68ba      	ldr	r2, [r7, #8]
 8013e8e:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					else
					{
						/* The value could not be written to the task. */
						xReturn = pdFAIL;
					}
					break;
 8013e92:	e017      	b.n	8013ec4 <xTaskGenericNotify+0xe8>
						xReturn = pdFAIL;
 8013e94:	2300      	movs	r3, #0
 8013e96:	627b      	str	r3, [r7, #36]	@ 0x24
					break;
 8013e98:	e014      	b.n	8013ec4 <xTaskGenericNotify+0xe8>

				default:
					/* Should not get here if all enums are handled.
					Artificially force an assert by testing a value the
					compiler can't assume is const. */
					configASSERT( pxTCB->ulNotifiedValue == ~0UL );
 8013e9a:	6a3b      	ldr	r3, [r7, #32]
 8013e9c:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 8013ea0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8013ea4:	d00d      	beq.n	8013ec2 <xTaskGenericNotify+0xe6>
	__asm volatile
 8013ea6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013eaa:	f383 8811 	msr	BASEPRI, r3
 8013eae:	f3bf 8f6f 	isb	sy
 8013eb2:	f3bf 8f4f 	dsb	sy
 8013eb6:	617b      	str	r3, [r7, #20]
}
 8013eb8:	bf00      	nop
 8013eba:	bf00      	nop
 8013ebc:	e7fd      	b.n	8013eba <xTaskGenericNotify+0xde>
					break;
 8013ebe:	bf00      	nop
 8013ec0:	e000      	b.n	8013ec4 <xTaskGenericNotify+0xe8>

					break;
 8013ec2:	bf00      	nop

			traceTASK_NOTIFY();

			/* If the task is in the blocked state specifically to wait for a
			notification then unblock it now. */
			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
 8013ec4:	7ffb      	ldrb	r3, [r7, #31]
 8013ec6:	2b01      	cmp	r3, #1
 8013ec8:	d13b      	bne.n	8013f42 <xTaskGenericNotify+0x166>
			{
				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8013eca:	6a3b      	ldr	r3, [r7, #32]
 8013ecc:	3304      	adds	r3, #4
 8013ece:	4618      	mov	r0, r3
 8013ed0:	f7fd fa02 	bl	80112d8 <uxListRemove>
				prvAddTaskToReadyList( pxTCB );
 8013ed4:	6a3b      	ldr	r3, [r7, #32]
 8013ed6:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013ed8:	4b1d      	ldr	r3, [pc, #116]	@ (8013f50 <xTaskGenericNotify+0x174>)
 8013eda:	681b      	ldr	r3, [r3, #0]
 8013edc:	429a      	cmp	r2, r3
 8013ede:	d903      	bls.n	8013ee8 <xTaskGenericNotify+0x10c>
 8013ee0:	6a3b      	ldr	r3, [r7, #32]
 8013ee2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013ee4:	4a1a      	ldr	r2, [pc, #104]	@ (8013f50 <xTaskGenericNotify+0x174>)
 8013ee6:	6013      	str	r3, [r2, #0]
 8013ee8:	6a3b      	ldr	r3, [r7, #32]
 8013eea:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013eec:	4613      	mov	r3, r2
 8013eee:	009b      	lsls	r3, r3, #2
 8013ef0:	4413      	add	r3, r2
 8013ef2:	009b      	lsls	r3, r3, #2
 8013ef4:	4a17      	ldr	r2, [pc, #92]	@ (8013f54 <xTaskGenericNotify+0x178>)
 8013ef6:	441a      	add	r2, r3
 8013ef8:	6a3b      	ldr	r3, [r7, #32]
 8013efa:	3304      	adds	r3, #4
 8013efc:	4619      	mov	r1, r3
 8013efe:	4610      	mov	r0, r2
 8013f00:	f7fd f98d 	bl	801121e <vListInsertEnd>

				/* The task should not have been on an event list. */
				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 8013f04:	6a3b      	ldr	r3, [r7, #32]
 8013f06:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8013f08:	2b00      	cmp	r3, #0
 8013f0a:	d00b      	beq.n	8013f24 <xTaskGenericNotify+0x148>
	__asm volatile
 8013f0c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013f10:	f383 8811 	msr	BASEPRI, r3
 8013f14:	f3bf 8f6f 	isb	sy
 8013f18:	f3bf 8f4f 	dsb	sy
 8013f1c:	613b      	str	r3, [r7, #16]
}
 8013f1e:	bf00      	nop
 8013f20:	bf00      	nop
 8013f22:	e7fd      	b.n	8013f20 <xTaskGenericNotify+0x144>
					earliest possible time. */
					prvResetNextTaskUnblockTime();
				}
				#endif

				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 8013f24:	6a3b      	ldr	r3, [r7, #32]
 8013f26:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013f28:	4b0b      	ldr	r3, [pc, #44]	@ (8013f58 <xTaskGenericNotify+0x17c>)
 8013f2a:	681b      	ldr	r3, [r3, #0]
 8013f2c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013f2e:	429a      	cmp	r2, r3
 8013f30:	d907      	bls.n	8013f42 <xTaskGenericNotify+0x166>
				{
					/* The notified task has a priority above the currently
					executing task so a yield is required. */
					taskYIELD_IF_USING_PREEMPTION();
 8013f32:	4b0a      	ldr	r3, [pc, #40]	@ (8013f5c <xTaskGenericNotify+0x180>)
 8013f34:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8013f38:	601a      	str	r2, [r3, #0]
 8013f3a:	f3bf 8f4f 	dsb	sy
 8013f3e:	f3bf 8f6f 	isb	sy
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 8013f42:	f000 fe2b 	bl	8014b9c <vPortExitCritical>

		return xReturn;
 8013f46:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
	}
 8013f48:	4618      	mov	r0, r3
 8013f4a:	3728      	adds	r7, #40	@ 0x28
 8013f4c:	46bd      	mov	sp, r7
 8013f4e:	bd80      	pop	{r7, pc}
 8013f50:	2400416c 	.word	0x2400416c
 8013f54:	24003c94 	.word	0x24003c94
 8013f58:	24003c90 	.word	0x24003c90
 8013f5c:	e000ed04 	.word	0xe000ed04

08013f60 <xTaskGenericNotifyFromISR>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken )
	{
 8013f60:	b580      	push	{r7, lr}
 8013f62:	b08e      	sub	sp, #56	@ 0x38
 8013f64:	af00      	add	r7, sp, #0
 8013f66:	60f8      	str	r0, [r7, #12]
 8013f68:	60b9      	str	r1, [r7, #8]
 8013f6a:	603b      	str	r3, [r7, #0]
 8013f6c:	4613      	mov	r3, r2
 8013f6e:	71fb      	strb	r3, [r7, #7]
	TCB_t * pxTCB;
	uint8_t ucOriginalNotifyState;
	BaseType_t xReturn = pdPASS;
 8013f70:	2301      	movs	r3, #1
 8013f72:	637b      	str	r3, [r7, #52]	@ 0x34
	UBaseType_t uxSavedInterruptStatus;

		configASSERT( xTaskToNotify );
 8013f74:	68fb      	ldr	r3, [r7, #12]
 8013f76:	2b00      	cmp	r3, #0
 8013f78:	d10b      	bne.n	8013f92 <xTaskGenericNotifyFromISR+0x32>
	__asm volatile
 8013f7a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013f7e:	f383 8811 	msr	BASEPRI, r3
 8013f82:	f3bf 8f6f 	isb	sy
 8013f86:	f3bf 8f4f 	dsb	sy
 8013f8a:	627b      	str	r3, [r7, #36]	@ 0x24
}
 8013f8c:	bf00      	nop
 8013f8e:	bf00      	nop
 8013f90:	e7fd      	b.n	8013f8e <xTaskGenericNotifyFromISR+0x2e>
		below the maximum system call interrupt priority.  FreeRTOS maintains a
		separate interrupt safe API to ensure interrupt entry is as fast and as
		simple as possible.  More information (albeit Cortex-M specific) is
		provided on the following link:
		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8013f92:	f000 feb1 	bl	8014cf8 <vPortValidateInterruptPriority>

		pxTCB = xTaskToNotify;
 8013f96:	68fb      	ldr	r3, [r7, #12]
 8013f98:	633b      	str	r3, [r7, #48]	@ 0x30
	__asm volatile
 8013f9a:	f3ef 8211 	mrs	r2, BASEPRI
 8013f9e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013fa2:	f383 8811 	msr	BASEPRI, r3
 8013fa6:	f3bf 8f6f 	isb	sy
 8013faa:	f3bf 8f4f 	dsb	sy
 8013fae:	623a      	str	r2, [r7, #32]
 8013fb0:	61fb      	str	r3, [r7, #28]
	return ulOriginalBASEPRI;
 8013fb2:	6a3b      	ldr	r3, [r7, #32]

		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8013fb4:	62fb      	str	r3, [r7, #44]	@ 0x2c
		{
			if( pulPreviousNotificationValue != NULL )
 8013fb6:	683b      	ldr	r3, [r7, #0]
 8013fb8:	2b00      	cmp	r3, #0
 8013fba:	d004      	beq.n	8013fc6 <xTaskGenericNotifyFromISR+0x66>
			{
				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
 8013fbc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013fbe:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8013fc2:	683b      	ldr	r3, [r7, #0]
 8013fc4:	601a      	str	r2, [r3, #0]
			}

			ucOriginalNotifyState = pxTCB->ucNotifyState;
 8013fc6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013fc8:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8013fcc:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
 8013fd0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013fd2:	2202      	movs	r2, #2
 8013fd4:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

			switch( eAction )
 8013fd8:	79fb      	ldrb	r3, [r7, #7]
 8013fda:	2b04      	cmp	r3, #4
 8013fdc:	d82e      	bhi.n	801403c <xTaskGenericNotifyFromISR+0xdc>
 8013fde:	a201      	add	r2, pc, #4	@ (adr r2, 8013fe4 <xTaskGenericNotifyFromISR+0x84>)
 8013fe0:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8013fe4:	08014061 	.word	0x08014061
 8013fe8:	08013ff9 	.word	0x08013ff9
 8013fec:	0801400b 	.word	0x0801400b
 8013ff0:	0801401b 	.word	0x0801401b
 8013ff4:	08014025 	.word	0x08014025
			{
				case eSetBits	:
					pxTCB->ulNotifiedValue |= ulValue;
 8013ff8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013ffa:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8013ffe:	68bb      	ldr	r3, [r7, #8]
 8014000:	431a      	orrs	r2, r3
 8014002:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014004:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014008:	e02d      	b.n	8014066 <xTaskGenericNotifyFromISR+0x106>

				case eIncrement	:
					( pxTCB->ulNotifiedValue )++;
 801400a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801400c:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 8014010:	1c5a      	adds	r2, r3, #1
 8014012:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014014:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014018:	e025      	b.n	8014066 <xTaskGenericNotifyFromISR+0x106>

				case eSetValueWithOverwrite	:
					pxTCB->ulNotifiedValue = ulValue;
 801401a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801401c:	68ba      	ldr	r2, [r7, #8]
 801401e:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014022:	e020      	b.n	8014066 <xTaskGenericNotifyFromISR+0x106>

				case eSetValueWithoutOverwrite :
					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
 8014024:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8014028:	2b02      	cmp	r3, #2
 801402a:	d004      	beq.n	8014036 <xTaskGenericNotifyFromISR+0xd6>
					{
						pxTCB->ulNotifiedValue = ulValue;
 801402c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801402e:	68ba      	ldr	r2, [r7, #8]
 8014030:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					else
					{
						/* The value could not be written to the task. */
						xReturn = pdFAIL;
					}
					break;
 8014034:	e017      	b.n	8014066 <xTaskGenericNotifyFromISR+0x106>
						xReturn = pdFAIL;
 8014036:	2300      	movs	r3, #0
 8014038:	637b      	str	r3, [r7, #52]	@ 0x34
					break;
 801403a:	e014      	b.n	8014066 <xTaskGenericNotifyFromISR+0x106>

				default:
					/* Should not get here if all enums are handled.
					Artificially force an assert by testing a value the
					compiler can't assume is const. */
					configASSERT( pxTCB->ulNotifiedValue == ~0UL );
 801403c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801403e:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 8014042:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8014046:	d00d      	beq.n	8014064 <xTaskGenericNotifyFromISR+0x104>
	__asm volatile
 8014048:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801404c:	f383 8811 	msr	BASEPRI, r3
 8014050:	f3bf 8f6f 	isb	sy
 8014054:	f3bf 8f4f 	dsb	sy
 8014058:	61bb      	str	r3, [r7, #24]
}
 801405a:	bf00      	nop
 801405c:	bf00      	nop
 801405e:	e7fd      	b.n	801405c <xTaskGenericNotifyFromISR+0xfc>
					break;
 8014060:	bf00      	nop
 8014062:	e000      	b.n	8014066 <xTaskGenericNotifyFromISR+0x106>
					break;
 8014064:	bf00      	nop

			traceTASK_NOTIFY_FROM_ISR();

			/* If the task is in the blocked state specifically to wait for a
			notification then unblock it now. */
			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
 8014066:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 801406a:	2b01      	cmp	r3, #1
 801406c:	d147      	bne.n	80140fe <xTaskGenericNotifyFromISR+0x19e>
			{
				/* The task should not have been on an event list. */
				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 801406e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014070:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8014072:	2b00      	cmp	r3, #0
 8014074:	d00b      	beq.n	801408e <xTaskGenericNotifyFromISR+0x12e>
	__asm volatile
 8014076:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801407a:	f383 8811 	msr	BASEPRI, r3
 801407e:	f3bf 8f6f 	isb	sy
 8014082:	f3bf 8f4f 	dsb	sy
 8014086:	617b      	str	r3, [r7, #20]
}
 8014088:	bf00      	nop
 801408a:	bf00      	nop
 801408c:	e7fd      	b.n	801408a <xTaskGenericNotifyFromISR+0x12a>

				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 801408e:	4b21      	ldr	r3, [pc, #132]	@ (8014114 <xTaskGenericNotifyFromISR+0x1b4>)
 8014090:	681b      	ldr	r3, [r3, #0]
 8014092:	2b00      	cmp	r3, #0
 8014094:	d11d      	bne.n	80140d2 <xTaskGenericNotifyFromISR+0x172>
				{
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8014096:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014098:	3304      	adds	r3, #4
 801409a:	4618      	mov	r0, r3
 801409c:	f7fd f91c 	bl	80112d8 <uxListRemove>
					prvAddTaskToReadyList( pxTCB );
 80140a0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80140a2:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80140a4:	4b1c      	ldr	r3, [pc, #112]	@ (8014118 <xTaskGenericNotifyFromISR+0x1b8>)
 80140a6:	681b      	ldr	r3, [r3, #0]
 80140a8:	429a      	cmp	r2, r3
 80140aa:	d903      	bls.n	80140b4 <xTaskGenericNotifyFromISR+0x154>
 80140ac:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80140ae:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80140b0:	4a19      	ldr	r2, [pc, #100]	@ (8014118 <xTaskGenericNotifyFromISR+0x1b8>)
 80140b2:	6013      	str	r3, [r2, #0]
 80140b4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80140b6:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80140b8:	4613      	mov	r3, r2
 80140ba:	009b      	lsls	r3, r3, #2
 80140bc:	4413      	add	r3, r2
 80140be:	009b      	lsls	r3, r3, #2
 80140c0:	4a16      	ldr	r2, [pc, #88]	@ (801411c <xTaskGenericNotifyFromISR+0x1bc>)
 80140c2:	441a      	add	r2, r3
 80140c4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80140c6:	3304      	adds	r3, #4
 80140c8:	4619      	mov	r1, r3
 80140ca:	4610      	mov	r0, r2
 80140cc:	f7fd f8a7 	bl	801121e <vListInsertEnd>
 80140d0:	e005      	b.n	80140de <xTaskGenericNotifyFromISR+0x17e>
				}
				else
				{
					/* The delayed and ready lists cannot be accessed, so hold
					this task pending until the scheduler is resumed. */
					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
 80140d2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80140d4:	3318      	adds	r3, #24
 80140d6:	4619      	mov	r1, r3
 80140d8:	4811      	ldr	r0, [pc, #68]	@ (8014120 <xTaskGenericNotifyFromISR+0x1c0>)
 80140da:	f7fd f8a0 	bl	801121e <vListInsertEnd>
				}

				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 80140de:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80140e0:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80140e2:	4b10      	ldr	r3, [pc, #64]	@ (8014124 <xTaskGenericNotifyFromISR+0x1c4>)
 80140e4:	681b      	ldr	r3, [r3, #0]
 80140e6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80140e8:	429a      	cmp	r2, r3
 80140ea:	d908      	bls.n	80140fe <xTaskGenericNotifyFromISR+0x19e>
				{
					/* The notified task has a priority above the currently
					executing task so a yield is required. */
					if( pxHigherPriorityTaskWoken != NULL )
 80140ec:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80140ee:	2b00      	cmp	r3, #0
 80140f0:	d002      	beq.n	80140f8 <xTaskGenericNotifyFromISR+0x198>
					{
						*pxHigherPriorityTaskWoken = pdTRUE;
 80140f2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80140f4:	2201      	movs	r2, #1
 80140f6:	601a      	str	r2, [r3, #0]
					}

					/* Mark that a yield is pending in case the user is not
					using the "xHigherPriorityTaskWoken" parameter to an ISR
					safe FreeRTOS function. */
					xYieldPending = pdTRUE;
 80140f8:	4b0b      	ldr	r3, [pc, #44]	@ (8014128 <xTaskGenericNotifyFromISR+0x1c8>)
 80140fa:	2201      	movs	r2, #1
 80140fc:	601a      	str	r2, [r3, #0]
 80140fe:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014100:	613b      	str	r3, [r7, #16]
	__asm volatile
 8014102:	693b      	ldr	r3, [r7, #16]
 8014104:	f383 8811 	msr	BASEPRI, r3
}
 8014108:	bf00      	nop
				}
			}
		}
		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

		return xReturn;
 801410a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
	}
 801410c:	4618      	mov	r0, r3
 801410e:	3738      	adds	r7, #56	@ 0x38
 8014110:	46bd      	mov	sp, r7
 8014112:	bd80      	pop	{r7, pc}
 8014114:	2400418c 	.word	0x2400418c
 8014118:	2400416c 	.word	0x2400416c
 801411c:	24003c94 	.word	0x24003c94
 8014120:	24004124 	.word	0x24004124
 8014124:	24003c90 	.word	0x24003c90
 8014128:	24004178 	.word	0x24004178

0801412c <xTaskNotifyStateClear>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask )
	{
 801412c:	b580      	push	{r7, lr}
 801412e:	b084      	sub	sp, #16
 8014130:	af00      	add	r7, sp, #0
 8014132:	6078      	str	r0, [r7, #4]
	TCB_t *pxTCB;
	BaseType_t xReturn;

		/* If null is passed in here then it is the calling task that is having
		its notification state cleared. */
		pxTCB = prvGetTCBFromHandle( xTask );
 8014134:	687b      	ldr	r3, [r7, #4]
 8014136:	2b00      	cmp	r3, #0
 8014138:	d102      	bne.n	8014140 <xTaskNotifyStateClear+0x14>
 801413a:	4b0e      	ldr	r3, [pc, #56]	@ (8014174 <xTaskNotifyStateClear+0x48>)
 801413c:	681b      	ldr	r3, [r3, #0]
 801413e:	e000      	b.n	8014142 <xTaskNotifyStateClear+0x16>
 8014140:	687b      	ldr	r3, [r7, #4]
 8014142:	60bb      	str	r3, [r7, #8]

		taskENTER_CRITICAL();
 8014144:	f000 fcf8 	bl	8014b38 <vPortEnterCritical>
		{
			if( pxTCB->ucNotifyState == taskNOTIFICATION_RECEIVED )
 8014148:	68bb      	ldr	r3, [r7, #8]
 801414a:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 801414e:	b2db      	uxtb	r3, r3
 8014150:	2b02      	cmp	r3, #2
 8014152:	d106      	bne.n	8014162 <xTaskNotifyStateClear+0x36>
			{
				pxTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 8014154:	68bb      	ldr	r3, [r7, #8]
 8014156:	2200      	movs	r2, #0
 8014158:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
				xReturn = pdPASS;
 801415c:	2301      	movs	r3, #1
 801415e:	60fb      	str	r3, [r7, #12]
 8014160:	e001      	b.n	8014166 <xTaskNotifyStateClear+0x3a>
			}
			else
			{
				xReturn = pdFAIL;
 8014162:	2300      	movs	r3, #0
 8014164:	60fb      	str	r3, [r7, #12]
			}
		}
		taskEXIT_CRITICAL();
 8014166:	f000 fd19 	bl	8014b9c <vPortExitCritical>

		return xReturn;
 801416a:	68fb      	ldr	r3, [r7, #12]
	}
 801416c:	4618      	mov	r0, r3
 801416e:	3710      	adds	r7, #16
 8014170:	46bd      	mov	sp, r7
 8014172:	bd80      	pop	{r7, pc}
 8014174:	24003c90 	.word	0x24003c90

08014178 <prvAddCurrentTaskToDelayedList>:

#endif
/*-----------------------------------------------------------*/

static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
{
 8014178:	b580      	push	{r7, lr}
 801417a:	b084      	sub	sp, #16
 801417c:	af00      	add	r7, sp, #0
 801417e:	6078      	str	r0, [r7, #4]
 8014180:	6039      	str	r1, [r7, #0]
TickType_t xTimeToWake;
const TickType_t xConstTickCount = xTickCount;
 8014182:	4b21      	ldr	r3, [pc, #132]	@ (8014208 <prvAddCurrentTaskToDelayedList+0x90>)
 8014184:	681b      	ldr	r3, [r3, #0]
 8014186:	60fb      	str	r3, [r7, #12]
	}
	#endif

	/* Remove the task from the ready list before adding it to the blocked list
	as the same list item is used for both lists. */
	if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 8014188:	4b20      	ldr	r3, [pc, #128]	@ (801420c <prvAddCurrentTaskToDelayedList+0x94>)
 801418a:	681b      	ldr	r3, [r3, #0]
 801418c:	3304      	adds	r3, #4
 801418e:	4618      	mov	r0, r3
 8014190:	f7fd f8a2 	bl	80112d8 <uxListRemove>
		mtCOVERAGE_TEST_MARKER();
	}

	#if ( INCLUDE_vTaskSuspend == 1 )
	{
		if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
 8014194:	687b      	ldr	r3, [r7, #4]
 8014196:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801419a:	d10a      	bne.n	80141b2 <prvAddCurrentTaskToDelayedList+0x3a>
 801419c:	683b      	ldr	r3, [r7, #0]
 801419e:	2b00      	cmp	r3, #0
 80141a0:	d007      	beq.n	80141b2 <prvAddCurrentTaskToDelayedList+0x3a>
		{
			/* Add the task to the suspended task list instead of a delayed task
			list to ensure it is not woken by a timing event.  It will block
			indefinitely. */
			vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
 80141a2:	4b1a      	ldr	r3, [pc, #104]	@ (801420c <prvAddCurrentTaskToDelayedList+0x94>)
 80141a4:	681b      	ldr	r3, [r3, #0]
 80141a6:	3304      	adds	r3, #4
 80141a8:	4619      	mov	r1, r3
 80141aa:	4819      	ldr	r0, [pc, #100]	@ (8014210 <prvAddCurrentTaskToDelayedList+0x98>)
 80141ac:	f7fd f837 	bl	801121e <vListInsertEnd>

		/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
		( void ) xCanBlockIndefinitely;
	}
	#endif /* INCLUDE_vTaskSuspend */
}
 80141b0:	e026      	b.n	8014200 <prvAddCurrentTaskToDelayedList+0x88>
			xTimeToWake = xConstTickCount + xTicksToWait;
 80141b2:	68fa      	ldr	r2, [r7, #12]
 80141b4:	687b      	ldr	r3, [r7, #4]
 80141b6:	4413      	add	r3, r2
 80141b8:	60bb      	str	r3, [r7, #8]
			listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
 80141ba:	4b14      	ldr	r3, [pc, #80]	@ (801420c <prvAddCurrentTaskToDelayedList+0x94>)
 80141bc:	681b      	ldr	r3, [r3, #0]
 80141be:	68ba      	ldr	r2, [r7, #8]
 80141c0:	605a      	str	r2, [r3, #4]
			if( xTimeToWake < xConstTickCount )
 80141c2:	68ba      	ldr	r2, [r7, #8]
 80141c4:	68fb      	ldr	r3, [r7, #12]
 80141c6:	429a      	cmp	r2, r3
 80141c8:	d209      	bcs.n	80141de <prvAddCurrentTaskToDelayedList+0x66>
				vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 80141ca:	4b12      	ldr	r3, [pc, #72]	@ (8014214 <prvAddCurrentTaskToDelayedList+0x9c>)
 80141cc:	681a      	ldr	r2, [r3, #0]
 80141ce:	4b0f      	ldr	r3, [pc, #60]	@ (801420c <prvAddCurrentTaskToDelayedList+0x94>)
 80141d0:	681b      	ldr	r3, [r3, #0]
 80141d2:	3304      	adds	r3, #4
 80141d4:	4619      	mov	r1, r3
 80141d6:	4610      	mov	r0, r2
 80141d8:	f7fd f845 	bl	8011266 <vListInsert>
}
 80141dc:	e010      	b.n	8014200 <prvAddCurrentTaskToDelayedList+0x88>
				vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 80141de:	4b0e      	ldr	r3, [pc, #56]	@ (8014218 <prvAddCurrentTaskToDelayedList+0xa0>)
 80141e0:	681a      	ldr	r2, [r3, #0]
 80141e2:	4b0a      	ldr	r3, [pc, #40]	@ (801420c <prvAddCurrentTaskToDelayedList+0x94>)
 80141e4:	681b      	ldr	r3, [r3, #0]
 80141e6:	3304      	adds	r3, #4
 80141e8:	4619      	mov	r1, r3
 80141ea:	4610      	mov	r0, r2
 80141ec:	f7fd f83b 	bl	8011266 <vListInsert>
				if( xTimeToWake < xNextTaskUnblockTime )
 80141f0:	4b0a      	ldr	r3, [pc, #40]	@ (801421c <prvAddCurrentTaskToDelayedList+0xa4>)
 80141f2:	681b      	ldr	r3, [r3, #0]
 80141f4:	68ba      	ldr	r2, [r7, #8]
 80141f6:	429a      	cmp	r2, r3
 80141f8:	d202      	bcs.n	8014200 <prvAddCurrentTaskToDelayedList+0x88>
					xNextTaskUnblockTime = xTimeToWake;
 80141fa:	4a08      	ldr	r2, [pc, #32]	@ (801421c <prvAddCurrentTaskToDelayedList+0xa4>)
 80141fc:	68bb      	ldr	r3, [r7, #8]
 80141fe:	6013      	str	r3, [r2, #0]
}
 8014200:	bf00      	nop
 8014202:	3710      	adds	r7, #16
 8014204:	46bd      	mov	sp, r7
 8014206:	bd80      	pop	{r7, pc}
 8014208:	24004168 	.word	0x24004168
 801420c:	24003c90 	.word	0x24003c90
 8014210:	24004150 	.word	0x24004150
 8014214:	24004120 	.word	0x24004120
 8014218:	2400411c 	.word	0x2400411c
 801421c:	24004184 	.word	0x24004184

08014220 <xTimerCreateTimerTask>:
									TimerCallbackFunction_t pxCallbackFunction,
									Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION;
/*-----------------------------------------------------------*/

BaseType_t xTimerCreateTimerTask( void )
{
 8014220:	b580      	push	{r7, lr}
 8014222:	b08a      	sub	sp, #40	@ 0x28
 8014224:	af04      	add	r7, sp, #16
BaseType_t xReturn = pdFAIL;
 8014226:	2300      	movs	r3, #0
 8014228:	617b      	str	r3, [r7, #20]

	/* This function is called when the scheduler is started if
	configUSE_TIMERS is set to 1.  Check that the infrastructure used by the
	timer service task has been created/initialised.  If timers have already
	been created then the initialisation will already have been performed. */
	prvCheckForValidListAndQueue();
 801422a:	f000 fb13 	bl	8014854 <prvCheckForValidListAndQueue>

	if( xTimerQueue != NULL )
 801422e:	4b1d      	ldr	r3, [pc, #116]	@ (80142a4 <xTimerCreateTimerTask+0x84>)
 8014230:	681b      	ldr	r3, [r3, #0]
 8014232:	2b00      	cmp	r3, #0
 8014234:	d021      	beq.n	801427a <xTimerCreateTimerTask+0x5a>
	{
		#if( configSUPPORT_STATIC_ALLOCATION == 1 )
		{
			StaticTask_t *pxTimerTaskTCBBuffer = NULL;
 8014236:	2300      	movs	r3, #0
 8014238:	60fb      	str	r3, [r7, #12]
			StackType_t *pxTimerTaskStackBuffer = NULL;
 801423a:	2300      	movs	r3, #0
 801423c:	60bb      	str	r3, [r7, #8]
			uint32_t ulTimerTaskStackSize;

			vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize );
 801423e:	1d3a      	adds	r2, r7, #4
 8014240:	f107 0108 	add.w	r1, r7, #8
 8014244:	f107 030c 	add.w	r3, r7, #12
 8014248:	4618      	mov	r0, r3
 801424a:	f7fc ffa1 	bl	8011190 <vApplicationGetTimerTaskMemory>
			xTimerTaskHandle = xTaskCreateStatic(	prvTimerTask,
 801424e:	6879      	ldr	r1, [r7, #4]
 8014250:	68bb      	ldr	r3, [r7, #8]
 8014252:	68fa      	ldr	r2, [r7, #12]
 8014254:	9202      	str	r2, [sp, #8]
 8014256:	9301      	str	r3, [sp, #4]
 8014258:	2302      	movs	r3, #2
 801425a:	9300      	str	r3, [sp, #0]
 801425c:	2300      	movs	r3, #0
 801425e:	460a      	mov	r2, r1
 8014260:	4911      	ldr	r1, [pc, #68]	@ (80142a8 <xTimerCreateTimerTask+0x88>)
 8014262:	4812      	ldr	r0, [pc, #72]	@ (80142ac <xTimerCreateTimerTask+0x8c>)
 8014264:	f7fe fd1c 	bl	8012ca0 <xTaskCreateStatic>
 8014268:	4603      	mov	r3, r0
 801426a:	4a11      	ldr	r2, [pc, #68]	@ (80142b0 <xTimerCreateTimerTask+0x90>)
 801426c:	6013      	str	r3, [r2, #0]
													NULL,
													( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
													pxTimerTaskStackBuffer,
													pxTimerTaskTCBBuffer );

			if( xTimerTaskHandle != NULL )
 801426e:	4b10      	ldr	r3, [pc, #64]	@ (80142b0 <xTimerCreateTimerTask+0x90>)
 8014270:	681b      	ldr	r3, [r3, #0]
 8014272:	2b00      	cmp	r3, #0
 8014274:	d001      	beq.n	801427a <xTimerCreateTimerTask+0x5a>
			{
				xReturn = pdPASS;
 8014276:	2301      	movs	r3, #1
 8014278:	617b      	str	r3, [r7, #20]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	configASSERT( xReturn );
 801427a:	697b      	ldr	r3, [r7, #20]
 801427c:	2b00      	cmp	r3, #0
 801427e:	d10b      	bne.n	8014298 <xTimerCreateTimerTask+0x78>
	__asm volatile
 8014280:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014284:	f383 8811 	msr	BASEPRI, r3
 8014288:	f3bf 8f6f 	isb	sy
 801428c:	f3bf 8f4f 	dsb	sy
 8014290:	613b      	str	r3, [r7, #16]
}
 8014292:	bf00      	nop
 8014294:	bf00      	nop
 8014296:	e7fd      	b.n	8014294 <xTimerCreateTimerTask+0x74>
	return xReturn;
 8014298:	697b      	ldr	r3, [r7, #20]
}
 801429a:	4618      	mov	r0, r3
 801429c:	3718      	adds	r7, #24
 801429e:	46bd      	mov	sp, r7
 80142a0:	bd80      	pop	{r7, pc}
 80142a2:	bf00      	nop
 80142a4:	240041c0 	.word	0x240041c0
 80142a8:	0802cbbc 	.word	0x0802cbbc
 80142ac:	080143ed 	.word	0x080143ed
 80142b0:	240041c4 	.word	0x240041c4

080142b4 <xTimerGenericCommand>:
	}
}
/*-----------------------------------------------------------*/

BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait )
{
 80142b4:	b580      	push	{r7, lr}
 80142b6:	b08a      	sub	sp, #40	@ 0x28
 80142b8:	af00      	add	r7, sp, #0
 80142ba:	60f8      	str	r0, [r7, #12]
 80142bc:	60b9      	str	r1, [r7, #8]
 80142be:	607a      	str	r2, [r7, #4]
 80142c0:	603b      	str	r3, [r7, #0]
BaseType_t xReturn = pdFAIL;
 80142c2:	2300      	movs	r3, #0
 80142c4:	627b      	str	r3, [r7, #36]	@ 0x24
DaemonTaskMessage_t xMessage;

	configASSERT( xTimer );
 80142c6:	68fb      	ldr	r3, [r7, #12]
 80142c8:	2b00      	cmp	r3, #0
 80142ca:	d10b      	bne.n	80142e4 <xTimerGenericCommand+0x30>
	__asm volatile
 80142cc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80142d0:	f383 8811 	msr	BASEPRI, r3
 80142d4:	f3bf 8f6f 	isb	sy
 80142d8:	f3bf 8f4f 	dsb	sy
 80142dc:	623b      	str	r3, [r7, #32]
}
 80142de:	bf00      	nop
 80142e0:	bf00      	nop
 80142e2:	e7fd      	b.n	80142e0 <xTimerGenericCommand+0x2c>

	/* Send a message to the timer service task to perform a particular action
	on a particular timer definition. */
	if( xTimerQueue != NULL )
 80142e4:	4b19      	ldr	r3, [pc, #100]	@ (801434c <xTimerGenericCommand+0x98>)
 80142e6:	681b      	ldr	r3, [r3, #0]
 80142e8:	2b00      	cmp	r3, #0
 80142ea:	d02a      	beq.n	8014342 <xTimerGenericCommand+0x8e>
	{
		/* Send a command to the timer service task to start the xTimer timer. */
		xMessage.xMessageID = xCommandID;
 80142ec:	68bb      	ldr	r3, [r7, #8]
 80142ee:	613b      	str	r3, [r7, #16]
		xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;
 80142f0:	687b      	ldr	r3, [r7, #4]
 80142f2:	617b      	str	r3, [r7, #20]
		xMessage.u.xTimerParameters.pxTimer = xTimer;
 80142f4:	68fb      	ldr	r3, [r7, #12]
 80142f6:	61bb      	str	r3, [r7, #24]

		if( xCommandID < tmrFIRST_FROM_ISR_COMMAND )
 80142f8:	68bb      	ldr	r3, [r7, #8]
 80142fa:	2b05      	cmp	r3, #5
 80142fc:	dc18      	bgt.n	8014330 <xTimerGenericCommand+0x7c>
		{
			if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
 80142fe:	f7ff fb7f 	bl	8013a00 <xTaskGetSchedulerState>
 8014302:	4603      	mov	r3, r0
 8014304:	2b02      	cmp	r3, #2
 8014306:	d109      	bne.n	801431c <xTimerGenericCommand+0x68>
			{
				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
 8014308:	4b10      	ldr	r3, [pc, #64]	@ (801434c <xTimerGenericCommand+0x98>)
 801430a:	6818      	ldr	r0, [r3, #0]
 801430c:	f107 0110 	add.w	r1, r7, #16
 8014310:	2300      	movs	r3, #0
 8014312:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8014314:	f7fd fa76 	bl	8011804 <xQueueGenericSend>
 8014318:	6278      	str	r0, [r7, #36]	@ 0x24
 801431a:	e012      	b.n	8014342 <xTimerGenericCommand+0x8e>
			}
			else
			{
				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
 801431c:	4b0b      	ldr	r3, [pc, #44]	@ (801434c <xTimerGenericCommand+0x98>)
 801431e:	6818      	ldr	r0, [r3, #0]
 8014320:	f107 0110 	add.w	r1, r7, #16
 8014324:	2300      	movs	r3, #0
 8014326:	2200      	movs	r2, #0
 8014328:	f7fd fa6c 	bl	8011804 <xQueueGenericSend>
 801432c:	6278      	str	r0, [r7, #36]	@ 0x24
 801432e:	e008      	b.n	8014342 <xTimerGenericCommand+0x8e>
			}
		}
		else
		{
			xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
 8014330:	4b06      	ldr	r3, [pc, #24]	@ (801434c <xTimerGenericCommand+0x98>)
 8014332:	6818      	ldr	r0, [r3, #0]
 8014334:	f107 0110 	add.w	r1, r7, #16
 8014338:	2300      	movs	r3, #0
 801433a:	683a      	ldr	r2, [r7, #0]
 801433c:	f7fd fb64 	bl	8011a08 <xQueueGenericSendFromISR>
 8014340:	6278      	str	r0, [r7, #36]	@ 0x24
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xReturn;
 8014342:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8014344:	4618      	mov	r0, r3
 8014346:	3728      	adds	r7, #40	@ 0x28
 8014348:	46bd      	mov	sp, r7
 801434a:	bd80      	pop	{r7, pc}
 801434c:	240041c0 	.word	0x240041c0

08014350 <prvProcessExpiredTimer>:
	return pxTimer->pcTimerName;
}
/*-----------------------------------------------------------*/

static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow )
{
 8014350:	b580      	push	{r7, lr}
 8014352:	b088      	sub	sp, #32
 8014354:	af02      	add	r7, sp, #8
 8014356:	6078      	str	r0, [r7, #4]
 8014358:	6039      	str	r1, [r7, #0]
BaseType_t xResult;
Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 801435a:	4b23      	ldr	r3, [pc, #140]	@ (80143e8 <prvProcessExpiredTimer+0x98>)
 801435c:	681b      	ldr	r3, [r3, #0]
 801435e:	68db      	ldr	r3, [r3, #12]
 8014360:	68db      	ldr	r3, [r3, #12]
 8014362:	617b      	str	r3, [r7, #20]

	/* Remove the timer from the list of active timers.  A check has already
	been performed to ensure the list is not empty. */
	( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 8014364:	697b      	ldr	r3, [r7, #20]
 8014366:	3304      	adds	r3, #4
 8014368:	4618      	mov	r0, r3
 801436a:	f7fc ffb5 	bl	80112d8 <uxListRemove>
	traceTIMER_EXPIRED( pxTimer );

	/* If the timer is an auto-reload timer then calculate the next
	expiry time and re-insert the timer in the list of active timers. */
	if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 801436e:	697b      	ldr	r3, [r7, #20]
 8014370:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014374:	f003 0304 	and.w	r3, r3, #4
 8014378:	2b00      	cmp	r3, #0
 801437a:	d023      	beq.n	80143c4 <prvProcessExpiredTimer+0x74>
	{
		/* The timer is inserted into a list using a time relative to anything
		other than the current time.  It will therefore be inserted into the
		correct list relative to the time this task thinks it is now. */
		if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE )
 801437c:	697b      	ldr	r3, [r7, #20]
 801437e:	699a      	ldr	r2, [r3, #24]
 8014380:	687b      	ldr	r3, [r7, #4]
 8014382:	18d1      	adds	r1, r2, r3
 8014384:	687b      	ldr	r3, [r7, #4]
 8014386:	683a      	ldr	r2, [r7, #0]
 8014388:	6978      	ldr	r0, [r7, #20]
 801438a:	f000 f8d5 	bl	8014538 <prvInsertTimerInActiveList>
 801438e:	4603      	mov	r3, r0
 8014390:	2b00      	cmp	r3, #0
 8014392:	d020      	beq.n	80143d6 <prvProcessExpiredTimer+0x86>
		{
			/* The timer expired before it was added to the active timer
			list.  Reload it now.  */
			xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
 8014394:	2300      	movs	r3, #0
 8014396:	9300      	str	r3, [sp, #0]
 8014398:	2300      	movs	r3, #0
 801439a:	687a      	ldr	r2, [r7, #4]
 801439c:	2100      	movs	r1, #0
 801439e:	6978      	ldr	r0, [r7, #20]
 80143a0:	f7ff ff88 	bl	80142b4 <xTimerGenericCommand>
 80143a4:	6138      	str	r0, [r7, #16]
			configASSERT( xResult );
 80143a6:	693b      	ldr	r3, [r7, #16]
 80143a8:	2b00      	cmp	r3, #0
 80143aa:	d114      	bne.n	80143d6 <prvProcessExpiredTimer+0x86>
	__asm volatile
 80143ac:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80143b0:	f383 8811 	msr	BASEPRI, r3
 80143b4:	f3bf 8f6f 	isb	sy
 80143b8:	f3bf 8f4f 	dsb	sy
 80143bc:	60fb      	str	r3, [r7, #12]
}
 80143be:	bf00      	nop
 80143c0:	bf00      	nop
 80143c2:	e7fd      	b.n	80143c0 <prvProcessExpiredTimer+0x70>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 80143c4:	697b      	ldr	r3, [r7, #20]
 80143c6:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80143ca:	f023 0301 	bic.w	r3, r3, #1
 80143ce:	b2da      	uxtb	r2, r3
 80143d0:	697b      	ldr	r3, [r7, #20]
 80143d2:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
		mtCOVERAGE_TEST_MARKER();
	}

	/* Call the timer callback. */
	pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 80143d6:	697b      	ldr	r3, [r7, #20]
 80143d8:	6a1b      	ldr	r3, [r3, #32]
 80143da:	6978      	ldr	r0, [r7, #20]
 80143dc:	4798      	blx	r3
}
 80143de:	bf00      	nop
 80143e0:	3718      	adds	r7, #24
 80143e2:	46bd      	mov	sp, r7
 80143e4:	bd80      	pop	{r7, pc}
 80143e6:	bf00      	nop
 80143e8:	240041b8 	.word	0x240041b8

080143ec <prvTimerTask>:
/*-----------------------------------------------------------*/

static portTASK_FUNCTION( prvTimerTask, pvParameters )
{
 80143ec:	b580      	push	{r7, lr}
 80143ee:	b084      	sub	sp, #16
 80143f0:	af00      	add	r7, sp, #0
 80143f2:	6078      	str	r0, [r7, #4]

	for( ;; )
	{
		/* Query the timers list to see if it contains any timers, and if so,
		obtain the time at which the next timer will expire. */
		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
 80143f4:	f107 0308 	add.w	r3, r7, #8
 80143f8:	4618      	mov	r0, r3
 80143fa:	f000 f859 	bl	80144b0 <prvGetNextExpireTime>
 80143fe:	60f8      	str	r0, [r7, #12]

		/* If a timer has expired, process it.  Otherwise, block this task
		until either a timer does expire, or a command is received. */
		prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
 8014400:	68bb      	ldr	r3, [r7, #8]
 8014402:	4619      	mov	r1, r3
 8014404:	68f8      	ldr	r0, [r7, #12]
 8014406:	f000 f805 	bl	8014414 <prvProcessTimerOrBlockTask>

		/* Empty the command queue. */
		prvProcessReceivedCommands();
 801440a:	f000 f8d7 	bl	80145bc <prvProcessReceivedCommands>
		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
 801440e:	bf00      	nop
 8014410:	e7f0      	b.n	80143f4 <prvTimerTask+0x8>
	...

08014414 <prvProcessTimerOrBlockTask>:
	}
}
/*-----------------------------------------------------------*/

static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty )
{
 8014414:	b580      	push	{r7, lr}
 8014416:	b084      	sub	sp, #16
 8014418:	af00      	add	r7, sp, #0
 801441a:	6078      	str	r0, [r7, #4]
 801441c:	6039      	str	r1, [r7, #0]
TickType_t xTimeNow;
BaseType_t xTimerListsWereSwitched;

	vTaskSuspendAll();
 801441e:	f7fe fea3 	bl	8013168 <vTaskSuspendAll>
		/* Obtain the time now to make an assessment as to whether the timer
		has expired or not.  If obtaining the time causes the lists to switch
		then don't process this timer as any timers that remained in the list
		when the lists were switched will have been processed within the
		prvSampleTimeNow() function. */
		xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 8014422:	f107 0308 	add.w	r3, r7, #8
 8014426:	4618      	mov	r0, r3
 8014428:	f000 f866 	bl	80144f8 <prvSampleTimeNow>
 801442c:	60f8      	str	r0, [r7, #12]
		if( xTimerListsWereSwitched == pdFALSE )
 801442e:	68bb      	ldr	r3, [r7, #8]
 8014430:	2b00      	cmp	r3, #0
 8014432:	d130      	bne.n	8014496 <prvProcessTimerOrBlockTask+0x82>
		{
			/* The tick count has not overflowed, has the timer expired? */
			if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
 8014434:	683b      	ldr	r3, [r7, #0]
 8014436:	2b00      	cmp	r3, #0
 8014438:	d10a      	bne.n	8014450 <prvProcessTimerOrBlockTask+0x3c>
 801443a:	687a      	ldr	r2, [r7, #4]
 801443c:	68fb      	ldr	r3, [r7, #12]
 801443e:	429a      	cmp	r2, r3
 8014440:	d806      	bhi.n	8014450 <prvProcessTimerOrBlockTask+0x3c>
			{
				( void ) xTaskResumeAll();
 8014442:	f7fe fe9f 	bl	8013184 <xTaskResumeAll>
				prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
 8014446:	68f9      	ldr	r1, [r7, #12]
 8014448:	6878      	ldr	r0, [r7, #4]
 801444a:	f7ff ff81 	bl	8014350 <prvProcessExpiredTimer>
		else
		{
			( void ) xTaskResumeAll();
		}
	}
}
 801444e:	e024      	b.n	801449a <prvProcessTimerOrBlockTask+0x86>
				if( xListWasEmpty != pdFALSE )
 8014450:	683b      	ldr	r3, [r7, #0]
 8014452:	2b00      	cmp	r3, #0
 8014454:	d008      	beq.n	8014468 <prvProcessTimerOrBlockTask+0x54>
					xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
 8014456:	4b13      	ldr	r3, [pc, #76]	@ (80144a4 <prvProcessTimerOrBlockTask+0x90>)
 8014458:	681b      	ldr	r3, [r3, #0]
 801445a:	681b      	ldr	r3, [r3, #0]
 801445c:	2b00      	cmp	r3, #0
 801445e:	d101      	bne.n	8014464 <prvProcessTimerOrBlockTask+0x50>
 8014460:	2301      	movs	r3, #1
 8014462:	e000      	b.n	8014466 <prvProcessTimerOrBlockTask+0x52>
 8014464:	2300      	movs	r3, #0
 8014466:	603b      	str	r3, [r7, #0]
				vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
 8014468:	4b0f      	ldr	r3, [pc, #60]	@ (80144a8 <prvProcessTimerOrBlockTask+0x94>)
 801446a:	6818      	ldr	r0, [r3, #0]
 801446c:	687a      	ldr	r2, [r7, #4]
 801446e:	68fb      	ldr	r3, [r7, #12]
 8014470:	1ad3      	subs	r3, r2, r3
 8014472:	683a      	ldr	r2, [r7, #0]
 8014474:	4619      	mov	r1, r3
 8014476:	f7fe f847 	bl	8012508 <vQueueWaitForMessageRestricted>
				if( xTaskResumeAll() == pdFALSE )
 801447a:	f7fe fe83 	bl	8013184 <xTaskResumeAll>
 801447e:	4603      	mov	r3, r0
 8014480:	2b00      	cmp	r3, #0
 8014482:	d10a      	bne.n	801449a <prvProcessTimerOrBlockTask+0x86>
					portYIELD_WITHIN_API();
 8014484:	4b09      	ldr	r3, [pc, #36]	@ (80144ac <prvProcessTimerOrBlockTask+0x98>)
 8014486:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 801448a:	601a      	str	r2, [r3, #0]
 801448c:	f3bf 8f4f 	dsb	sy
 8014490:	f3bf 8f6f 	isb	sy
}
 8014494:	e001      	b.n	801449a <prvProcessTimerOrBlockTask+0x86>
			( void ) xTaskResumeAll();
 8014496:	f7fe fe75 	bl	8013184 <xTaskResumeAll>
}
 801449a:	bf00      	nop
 801449c:	3710      	adds	r7, #16
 801449e:	46bd      	mov	sp, r7
 80144a0:	bd80      	pop	{r7, pc}
 80144a2:	bf00      	nop
 80144a4:	240041bc 	.word	0x240041bc
 80144a8:	240041c0 	.word	0x240041c0
 80144ac:	e000ed04 	.word	0xe000ed04

080144b0 <prvGetNextExpireTime>:
/*-----------------------------------------------------------*/

static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )
{
 80144b0:	b480      	push	{r7}
 80144b2:	b085      	sub	sp, #20
 80144b4:	af00      	add	r7, sp, #0
 80144b6:	6078      	str	r0, [r7, #4]
	the timer with the nearest expiry time will expire.  If there are no
	active timers then just set the next expire time to 0.  That will cause
	this task to unblock when the tick count overflows, at which point the
	timer lists will be switched and the next expiry time can be
	re-assessed.  */
	*pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
 80144b8:	4b0e      	ldr	r3, [pc, #56]	@ (80144f4 <prvGetNextExpireTime+0x44>)
 80144ba:	681b      	ldr	r3, [r3, #0]
 80144bc:	681b      	ldr	r3, [r3, #0]
 80144be:	2b00      	cmp	r3, #0
 80144c0:	d101      	bne.n	80144c6 <prvGetNextExpireTime+0x16>
 80144c2:	2201      	movs	r2, #1
 80144c4:	e000      	b.n	80144c8 <prvGetNextExpireTime+0x18>
 80144c6:	2200      	movs	r2, #0
 80144c8:	687b      	ldr	r3, [r7, #4]
 80144ca:	601a      	str	r2, [r3, #0]
	if( *pxListWasEmpty == pdFALSE )
 80144cc:	687b      	ldr	r3, [r7, #4]
 80144ce:	681b      	ldr	r3, [r3, #0]
 80144d0:	2b00      	cmp	r3, #0
 80144d2:	d105      	bne.n	80144e0 <prvGetNextExpireTime+0x30>
	{
		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 80144d4:	4b07      	ldr	r3, [pc, #28]	@ (80144f4 <prvGetNextExpireTime+0x44>)
 80144d6:	681b      	ldr	r3, [r3, #0]
 80144d8:	68db      	ldr	r3, [r3, #12]
 80144da:	681b      	ldr	r3, [r3, #0]
 80144dc:	60fb      	str	r3, [r7, #12]
 80144de:	e001      	b.n	80144e4 <prvGetNextExpireTime+0x34>
	}
	else
	{
		/* Ensure the task unblocks when the tick count rolls over. */
		xNextExpireTime = ( TickType_t ) 0U;
 80144e0:	2300      	movs	r3, #0
 80144e2:	60fb      	str	r3, [r7, #12]
	}

	return xNextExpireTime;
 80144e4:	68fb      	ldr	r3, [r7, #12]
}
 80144e6:	4618      	mov	r0, r3
 80144e8:	3714      	adds	r7, #20
 80144ea:	46bd      	mov	sp, r7
 80144ec:	f85d 7b04 	ldr.w	r7, [sp], #4
 80144f0:	4770      	bx	lr
 80144f2:	bf00      	nop
 80144f4:	240041b8 	.word	0x240041b8

080144f8 <prvSampleTimeNow>:
/*-----------------------------------------------------------*/

static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )
{
 80144f8:	b580      	push	{r7, lr}
 80144fa:	b084      	sub	sp, #16
 80144fc:	af00      	add	r7, sp, #0
 80144fe:	6078      	str	r0, [r7, #4]
TickType_t xTimeNow;
PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */

	xTimeNow = xTaskGetTickCount();
 8014500:	f7fe fede 	bl	80132c0 <xTaskGetTickCount>
 8014504:	60f8      	str	r0, [r7, #12]

	if( xTimeNow < xLastTime )
 8014506:	4b0b      	ldr	r3, [pc, #44]	@ (8014534 <prvSampleTimeNow+0x3c>)
 8014508:	681b      	ldr	r3, [r3, #0]
 801450a:	68fa      	ldr	r2, [r7, #12]
 801450c:	429a      	cmp	r2, r3
 801450e:	d205      	bcs.n	801451c <prvSampleTimeNow+0x24>
	{
		prvSwitchTimerLists();
 8014510:	f000 f93a 	bl	8014788 <prvSwitchTimerLists>
		*pxTimerListsWereSwitched = pdTRUE;
 8014514:	687b      	ldr	r3, [r7, #4]
 8014516:	2201      	movs	r2, #1
 8014518:	601a      	str	r2, [r3, #0]
 801451a:	e002      	b.n	8014522 <prvSampleTimeNow+0x2a>
	}
	else
	{
		*pxTimerListsWereSwitched = pdFALSE;
 801451c:	687b      	ldr	r3, [r7, #4]
 801451e:	2200      	movs	r2, #0
 8014520:	601a      	str	r2, [r3, #0]
	}

	xLastTime = xTimeNow;
 8014522:	4a04      	ldr	r2, [pc, #16]	@ (8014534 <prvSampleTimeNow+0x3c>)
 8014524:	68fb      	ldr	r3, [r7, #12]
 8014526:	6013      	str	r3, [r2, #0]

	return xTimeNow;
 8014528:	68fb      	ldr	r3, [r7, #12]
}
 801452a:	4618      	mov	r0, r3
 801452c:	3710      	adds	r7, #16
 801452e:	46bd      	mov	sp, r7
 8014530:	bd80      	pop	{r7, pc}
 8014532:	bf00      	nop
 8014534:	240041c8 	.word	0x240041c8

08014538 <prvInsertTimerInActiveList>:
/*-----------------------------------------------------------*/

static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime )
{
 8014538:	b580      	push	{r7, lr}
 801453a:	b086      	sub	sp, #24
 801453c:	af00      	add	r7, sp, #0
 801453e:	60f8      	str	r0, [r7, #12]
 8014540:	60b9      	str	r1, [r7, #8]
 8014542:	607a      	str	r2, [r7, #4]
 8014544:	603b      	str	r3, [r7, #0]
BaseType_t xProcessTimerNow = pdFALSE;
 8014546:	2300      	movs	r3, #0
 8014548:	617b      	str	r3, [r7, #20]

	listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
 801454a:	68fb      	ldr	r3, [r7, #12]
 801454c:	68ba      	ldr	r2, [r7, #8]
 801454e:	605a      	str	r2, [r3, #4]
	listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
 8014550:	68fb      	ldr	r3, [r7, #12]
 8014552:	68fa      	ldr	r2, [r7, #12]
 8014554:	611a      	str	r2, [r3, #16]

	if( xNextExpiryTime <= xTimeNow )
 8014556:	68ba      	ldr	r2, [r7, #8]
 8014558:	687b      	ldr	r3, [r7, #4]
 801455a:	429a      	cmp	r2, r3
 801455c:	d812      	bhi.n	8014584 <prvInsertTimerInActiveList+0x4c>
	{
		/* Has the expiry time elapsed between the command to start/reset a
		timer was issued, and the time the command was processed? */
		if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 801455e:	687a      	ldr	r2, [r7, #4]
 8014560:	683b      	ldr	r3, [r7, #0]
 8014562:	1ad2      	subs	r2, r2, r3
 8014564:	68fb      	ldr	r3, [r7, #12]
 8014566:	699b      	ldr	r3, [r3, #24]
 8014568:	429a      	cmp	r2, r3
 801456a:	d302      	bcc.n	8014572 <prvInsertTimerInActiveList+0x3a>
		{
			/* The time between a command being issued and the command being
			processed actually exceeds the timers period.  */
			xProcessTimerNow = pdTRUE;
 801456c:	2301      	movs	r3, #1
 801456e:	617b      	str	r3, [r7, #20]
 8014570:	e01b      	b.n	80145aa <prvInsertTimerInActiveList+0x72>
		}
		else
		{
			vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
 8014572:	4b10      	ldr	r3, [pc, #64]	@ (80145b4 <prvInsertTimerInActiveList+0x7c>)
 8014574:	681a      	ldr	r2, [r3, #0]
 8014576:	68fb      	ldr	r3, [r7, #12]
 8014578:	3304      	adds	r3, #4
 801457a:	4619      	mov	r1, r3
 801457c:	4610      	mov	r0, r2
 801457e:	f7fc fe72 	bl	8011266 <vListInsert>
 8014582:	e012      	b.n	80145aa <prvInsertTimerInActiveList+0x72>
		}
	}
	else
	{
		if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
 8014584:	687a      	ldr	r2, [r7, #4]
 8014586:	683b      	ldr	r3, [r7, #0]
 8014588:	429a      	cmp	r2, r3
 801458a:	d206      	bcs.n	801459a <prvInsertTimerInActiveList+0x62>
 801458c:	68ba      	ldr	r2, [r7, #8]
 801458e:	683b      	ldr	r3, [r7, #0]
 8014590:	429a      	cmp	r2, r3
 8014592:	d302      	bcc.n	801459a <prvInsertTimerInActiveList+0x62>
		{
			/* If, since the command was issued, the tick count has overflowed
			but the expiry time has not, then the timer must have already passed
			its expiry time and should be processed immediately. */
			xProcessTimerNow = pdTRUE;
 8014594:	2301      	movs	r3, #1
 8014596:	617b      	str	r3, [r7, #20]
 8014598:	e007      	b.n	80145aa <prvInsertTimerInActiveList+0x72>
		}
		else
		{
			vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
 801459a:	4b07      	ldr	r3, [pc, #28]	@ (80145b8 <prvInsertTimerInActiveList+0x80>)
 801459c:	681a      	ldr	r2, [r3, #0]
 801459e:	68fb      	ldr	r3, [r7, #12]
 80145a0:	3304      	adds	r3, #4
 80145a2:	4619      	mov	r1, r3
 80145a4:	4610      	mov	r0, r2
 80145a6:	f7fc fe5e 	bl	8011266 <vListInsert>
		}
	}

	return xProcessTimerNow;
 80145aa:	697b      	ldr	r3, [r7, #20]
}
 80145ac:	4618      	mov	r0, r3
 80145ae:	3718      	adds	r7, #24
 80145b0:	46bd      	mov	sp, r7
 80145b2:	bd80      	pop	{r7, pc}
 80145b4:	240041bc 	.word	0x240041bc
 80145b8:	240041b8 	.word	0x240041b8

080145bc <prvProcessReceivedCommands>:
/*-----------------------------------------------------------*/

static void	prvProcessReceivedCommands( void )
{
 80145bc:	b580      	push	{r7, lr}
 80145be:	b08e      	sub	sp, #56	@ 0x38
 80145c0:	af02      	add	r7, sp, #8
DaemonTaskMessage_t xMessage;
Timer_t *pxTimer;
BaseType_t xTimerListsWereSwitched, xResult;
TickType_t xTimeNow;

	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
 80145c2:	e0ce      	b.n	8014762 <prvProcessReceivedCommands+0x1a6>
	{
		#if ( INCLUDE_xTimerPendFunctionCall == 1 )
		{
			/* Negative commands are pended function calls rather than timer
			commands. */
			if( xMessage.xMessageID < ( BaseType_t ) 0 )
 80145c4:	687b      	ldr	r3, [r7, #4]
 80145c6:	2b00      	cmp	r3, #0
 80145c8:	da19      	bge.n	80145fe <prvProcessReceivedCommands+0x42>
			{
				const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );
 80145ca:	1d3b      	adds	r3, r7, #4
 80145cc:	3304      	adds	r3, #4
 80145ce:	62fb      	str	r3, [r7, #44]	@ 0x2c

				/* The timer uses the xCallbackParameters member to request a
				callback be executed.  Check the callback is not NULL. */
				configASSERT( pxCallback );
 80145d0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80145d2:	2b00      	cmp	r3, #0
 80145d4:	d10b      	bne.n	80145ee <prvProcessReceivedCommands+0x32>
	__asm volatile
 80145d6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80145da:	f383 8811 	msr	BASEPRI, r3
 80145de:	f3bf 8f6f 	isb	sy
 80145e2:	f3bf 8f4f 	dsb	sy
 80145e6:	61fb      	str	r3, [r7, #28]
}
 80145e8:	bf00      	nop
 80145ea:	bf00      	nop
 80145ec:	e7fd      	b.n	80145ea <prvProcessReceivedCommands+0x2e>

				/* Call the function. */
				pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 );
 80145ee:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80145f0:	681b      	ldr	r3, [r3, #0]
 80145f2:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 80145f4:	6850      	ldr	r0, [r2, #4]
 80145f6:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 80145f8:	6892      	ldr	r2, [r2, #8]
 80145fa:	4611      	mov	r1, r2
 80145fc:	4798      	blx	r3
		}
		#endif /* INCLUDE_xTimerPendFunctionCall */

		/* Commands that are positive are timer commands rather than pended
		function calls. */
		if( xMessage.xMessageID >= ( BaseType_t ) 0 )
 80145fe:	687b      	ldr	r3, [r7, #4]
 8014600:	2b00      	cmp	r3, #0
 8014602:	f2c0 80ae 	blt.w	8014762 <prvProcessReceivedCommands+0x1a6>
		{
			/* The messages uses the xTimerParameters member to work on a
			software timer. */
			pxTimer = xMessage.u.xTimerParameters.pxTimer;
 8014606:	68fb      	ldr	r3, [r7, #12]
 8014608:	62bb      	str	r3, [r7, #40]	@ 0x28

			if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */
 801460a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801460c:	695b      	ldr	r3, [r3, #20]
 801460e:	2b00      	cmp	r3, #0
 8014610:	d004      	beq.n	801461c <prvProcessReceivedCommands+0x60>
			{
				/* The timer is in a list, remove it. */
				( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 8014612:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014614:	3304      	adds	r3, #4
 8014616:	4618      	mov	r0, r3
 8014618:	f7fc fe5e 	bl	80112d8 <uxListRemove>
			it must be present in the function call.  prvSampleTimeNow() must be
			called after the message is received from xTimerQueue so there is no
			possibility of a higher priority task adding a message to the message
			queue with a time that is ahead of the timer daemon task (because it
			pre-empted the timer daemon task after the xTimeNow value was set). */
			xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 801461c:	463b      	mov	r3, r7
 801461e:	4618      	mov	r0, r3
 8014620:	f7ff ff6a 	bl	80144f8 <prvSampleTimeNow>
 8014624:	6278      	str	r0, [r7, #36]	@ 0x24

			switch( xMessage.xMessageID )
 8014626:	687b      	ldr	r3, [r7, #4]
 8014628:	2b09      	cmp	r3, #9
 801462a:	f200 8097 	bhi.w	801475c <prvProcessReceivedCommands+0x1a0>
 801462e:	a201      	add	r2, pc, #4	@ (adr r2, 8014634 <prvProcessReceivedCommands+0x78>)
 8014630:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8014634:	0801465d 	.word	0x0801465d
 8014638:	0801465d 	.word	0x0801465d
 801463c:	0801465d 	.word	0x0801465d
 8014640:	080146d3 	.word	0x080146d3
 8014644:	080146e7 	.word	0x080146e7
 8014648:	08014733 	.word	0x08014733
 801464c:	0801465d 	.word	0x0801465d
 8014650:	0801465d 	.word	0x0801465d
 8014654:	080146d3 	.word	0x080146d3
 8014658:	080146e7 	.word	0x080146e7
				case tmrCOMMAND_START_FROM_ISR :
				case tmrCOMMAND_RESET :
				case tmrCOMMAND_RESET_FROM_ISR :
				case tmrCOMMAND_START_DONT_TRACE :
					/* Start or restart a timer. */
					pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
 801465c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801465e:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014662:	f043 0301 	orr.w	r3, r3, #1
 8014666:	b2da      	uxtb	r2, r3
 8014668:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801466a:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					if( prvInsertTimerInActiveList( pxTimer,  xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE )
 801466e:	68ba      	ldr	r2, [r7, #8]
 8014670:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014672:	699b      	ldr	r3, [r3, #24]
 8014674:	18d1      	adds	r1, r2, r3
 8014676:	68bb      	ldr	r3, [r7, #8]
 8014678:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801467a:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 801467c:	f7ff ff5c 	bl	8014538 <prvInsertTimerInActiveList>
 8014680:	4603      	mov	r3, r0
 8014682:	2b00      	cmp	r3, #0
 8014684:	d06c      	beq.n	8014760 <prvProcessReceivedCommands+0x1a4>
					{
						/* The timer expired before it was added to the active
						timer list.  Process it now. */
						pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 8014686:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014688:	6a1b      	ldr	r3, [r3, #32]
 801468a:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 801468c:	4798      	blx	r3
						traceTIMER_EXPIRED( pxTimer );

						if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 801468e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014690:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014694:	f003 0304 	and.w	r3, r3, #4
 8014698:	2b00      	cmp	r3, #0
 801469a:	d061      	beq.n	8014760 <prvProcessReceivedCommands+0x1a4>
						{
							xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );
 801469c:	68ba      	ldr	r2, [r7, #8]
 801469e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80146a0:	699b      	ldr	r3, [r3, #24]
 80146a2:	441a      	add	r2, r3
 80146a4:	2300      	movs	r3, #0
 80146a6:	9300      	str	r3, [sp, #0]
 80146a8:	2300      	movs	r3, #0
 80146aa:	2100      	movs	r1, #0
 80146ac:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 80146ae:	f7ff fe01 	bl	80142b4 <xTimerGenericCommand>
 80146b2:	6238      	str	r0, [r7, #32]
							configASSERT( xResult );
 80146b4:	6a3b      	ldr	r3, [r7, #32]
 80146b6:	2b00      	cmp	r3, #0
 80146b8:	d152      	bne.n	8014760 <prvProcessReceivedCommands+0x1a4>
	__asm volatile
 80146ba:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80146be:	f383 8811 	msr	BASEPRI, r3
 80146c2:	f3bf 8f6f 	isb	sy
 80146c6:	f3bf 8f4f 	dsb	sy
 80146ca:	61bb      	str	r3, [r7, #24]
}
 80146cc:	bf00      	nop
 80146ce:	bf00      	nop
 80146d0:	e7fd      	b.n	80146ce <prvProcessReceivedCommands+0x112>
					break;

				case tmrCOMMAND_STOP :
				case tmrCOMMAND_STOP_FROM_ISR :
					/* The timer has already been removed from the active list. */
					pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 80146d2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80146d4:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80146d8:	f023 0301 	bic.w	r3, r3, #1
 80146dc:	b2da      	uxtb	r2, r3
 80146de:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80146e0:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					break;
 80146e4:	e03d      	b.n	8014762 <prvProcessReceivedCommands+0x1a6>

				case tmrCOMMAND_CHANGE_PERIOD :
				case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR :
					pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
 80146e6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80146e8:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80146ec:	f043 0301 	orr.w	r3, r3, #1
 80146f0:	b2da      	uxtb	r2, r3
 80146f2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80146f4:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue;
 80146f8:	68ba      	ldr	r2, [r7, #8]
 80146fa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80146fc:	619a      	str	r2, [r3, #24]
					configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
 80146fe:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014700:	699b      	ldr	r3, [r3, #24]
 8014702:	2b00      	cmp	r3, #0
 8014704:	d10b      	bne.n	801471e <prvProcessReceivedCommands+0x162>
	__asm volatile
 8014706:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801470a:	f383 8811 	msr	BASEPRI, r3
 801470e:	f3bf 8f6f 	isb	sy
 8014712:	f3bf 8f4f 	dsb	sy
 8014716:	617b      	str	r3, [r7, #20]
}
 8014718:	bf00      	nop
 801471a:	bf00      	nop
 801471c:	e7fd      	b.n	801471a <prvProcessReceivedCommands+0x15e>
					be longer or shorter than the old one.  The command time is
					therefore set to the current time, and as the period cannot
					be zero the next expiry time can only be in the future,
					meaning (unlike for the xTimerStart() case above) there is
					no fail case that needs to be handled here. */
					( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
 801471e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014720:	699a      	ldr	r2, [r3, #24]
 8014722:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014724:	18d1      	adds	r1, r2, r3
 8014726:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014728:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801472a:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 801472c:	f7ff ff04 	bl	8014538 <prvInsertTimerInActiveList>
					break;
 8014730:	e017      	b.n	8014762 <prvProcessReceivedCommands+0x1a6>
					#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
					{
						/* The timer has already been removed from the active list,
						just free up the memory if the memory was dynamically
						allocated. */
						if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) 0 )
 8014732:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014734:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014738:	f003 0302 	and.w	r3, r3, #2
 801473c:	2b00      	cmp	r3, #0
 801473e:	d103      	bne.n	8014748 <prvProcessReceivedCommands+0x18c>
						{
							vPortFree( pxTimer );
 8014740:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8014742:	f000 fbe9 	bl	8014f18 <vPortFree>
						no need to free the memory - just mark the timer as
						"not active". */
						pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
					}
					#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
					break;
 8014746:	e00c      	b.n	8014762 <prvProcessReceivedCommands+0x1a6>
							pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 8014748:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801474a:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801474e:	f023 0301 	bic.w	r3, r3, #1
 8014752:	b2da      	uxtb	r2, r3
 8014754:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014756:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					break;
 801475a:	e002      	b.n	8014762 <prvProcessReceivedCommands+0x1a6>

				default	:
					/* Don't expect to get here. */
					break;
 801475c:	bf00      	nop
 801475e:	e000      	b.n	8014762 <prvProcessReceivedCommands+0x1a6>
					break;
 8014760:	bf00      	nop
	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
 8014762:	4b08      	ldr	r3, [pc, #32]	@ (8014784 <prvProcessReceivedCommands+0x1c8>)
 8014764:	681b      	ldr	r3, [r3, #0]
 8014766:	1d39      	adds	r1, r7, #4
 8014768:	2200      	movs	r2, #0
 801476a:	4618      	mov	r0, r3
 801476c:	f7fd fa7a 	bl	8011c64 <xQueueReceive>
 8014770:	4603      	mov	r3, r0
 8014772:	2b00      	cmp	r3, #0
 8014774:	f47f af26 	bne.w	80145c4 <prvProcessReceivedCommands+0x8>
			}
		}
	}
}
 8014778:	bf00      	nop
 801477a:	bf00      	nop
 801477c:	3730      	adds	r7, #48	@ 0x30
 801477e:	46bd      	mov	sp, r7
 8014780:	bd80      	pop	{r7, pc}
 8014782:	bf00      	nop
 8014784:	240041c0 	.word	0x240041c0

08014788 <prvSwitchTimerLists>:
/*-----------------------------------------------------------*/

static void prvSwitchTimerLists( void )
{
 8014788:	b580      	push	{r7, lr}
 801478a:	b088      	sub	sp, #32
 801478c:	af02      	add	r7, sp, #8

	/* The tick count has overflowed.  The timer lists must be switched.
	If there are any timers still referenced from the current timer list
	then they must have expired and should be processed before the lists
	are switched. */
	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
 801478e:	e049      	b.n	8014824 <prvSwitchTimerLists+0x9c>
	{
		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 8014790:	4b2e      	ldr	r3, [pc, #184]	@ (801484c <prvSwitchTimerLists+0xc4>)
 8014792:	681b      	ldr	r3, [r3, #0]
 8014794:	68db      	ldr	r3, [r3, #12]
 8014796:	681b      	ldr	r3, [r3, #0]
 8014798:	613b      	str	r3, [r7, #16]

		/* Remove the timer from the list. */
		pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 801479a:	4b2c      	ldr	r3, [pc, #176]	@ (801484c <prvSwitchTimerLists+0xc4>)
 801479c:	681b      	ldr	r3, [r3, #0]
 801479e:	68db      	ldr	r3, [r3, #12]
 80147a0:	68db      	ldr	r3, [r3, #12]
 80147a2:	60fb      	str	r3, [r7, #12]
		( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 80147a4:	68fb      	ldr	r3, [r7, #12]
 80147a6:	3304      	adds	r3, #4
 80147a8:	4618      	mov	r0, r3
 80147aa:	f7fc fd95 	bl	80112d8 <uxListRemove>
		traceTIMER_EXPIRED( pxTimer );

		/* Execute its callback, then send a command to restart the timer if
		it is an auto-reload timer.  It cannot be restarted here as the lists
		have not yet been switched. */
		pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 80147ae:	68fb      	ldr	r3, [r7, #12]
 80147b0:	6a1b      	ldr	r3, [r3, #32]
 80147b2:	68f8      	ldr	r0, [r7, #12]
 80147b4:	4798      	blx	r3

		if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 80147b6:	68fb      	ldr	r3, [r7, #12]
 80147b8:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80147bc:	f003 0304 	and.w	r3, r3, #4
 80147c0:	2b00      	cmp	r3, #0
 80147c2:	d02f      	beq.n	8014824 <prvSwitchTimerLists+0x9c>
			the timer going into the same timer list then it has already expired
			and the timer should be re-inserted into the current list so it is
			processed again within this loop.  Otherwise a command should be sent
			to restart the timer to ensure it is only inserted into a list after
			the lists have been swapped. */
			xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks );
 80147c4:	68fb      	ldr	r3, [r7, #12]
 80147c6:	699b      	ldr	r3, [r3, #24]
 80147c8:	693a      	ldr	r2, [r7, #16]
 80147ca:	4413      	add	r3, r2
 80147cc:	60bb      	str	r3, [r7, #8]
			if( xReloadTime > xNextExpireTime )
 80147ce:	68ba      	ldr	r2, [r7, #8]
 80147d0:	693b      	ldr	r3, [r7, #16]
 80147d2:	429a      	cmp	r2, r3
 80147d4:	d90e      	bls.n	80147f4 <prvSwitchTimerLists+0x6c>
			{
				listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime );
 80147d6:	68fb      	ldr	r3, [r7, #12]
 80147d8:	68ba      	ldr	r2, [r7, #8]
 80147da:	605a      	str	r2, [r3, #4]
				listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
 80147dc:	68fb      	ldr	r3, [r7, #12]
 80147de:	68fa      	ldr	r2, [r7, #12]
 80147e0:	611a      	str	r2, [r3, #16]
				vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
 80147e2:	4b1a      	ldr	r3, [pc, #104]	@ (801484c <prvSwitchTimerLists+0xc4>)
 80147e4:	681a      	ldr	r2, [r3, #0]
 80147e6:	68fb      	ldr	r3, [r7, #12]
 80147e8:	3304      	adds	r3, #4
 80147ea:	4619      	mov	r1, r3
 80147ec:	4610      	mov	r0, r2
 80147ee:	f7fc fd3a 	bl	8011266 <vListInsert>
 80147f2:	e017      	b.n	8014824 <prvSwitchTimerLists+0x9c>
			}
			else
			{
				xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
 80147f4:	2300      	movs	r3, #0
 80147f6:	9300      	str	r3, [sp, #0]
 80147f8:	2300      	movs	r3, #0
 80147fa:	693a      	ldr	r2, [r7, #16]
 80147fc:	2100      	movs	r1, #0
 80147fe:	68f8      	ldr	r0, [r7, #12]
 8014800:	f7ff fd58 	bl	80142b4 <xTimerGenericCommand>
 8014804:	6078      	str	r0, [r7, #4]
				configASSERT( xResult );
 8014806:	687b      	ldr	r3, [r7, #4]
 8014808:	2b00      	cmp	r3, #0
 801480a:	d10b      	bne.n	8014824 <prvSwitchTimerLists+0x9c>
	__asm volatile
 801480c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014810:	f383 8811 	msr	BASEPRI, r3
 8014814:	f3bf 8f6f 	isb	sy
 8014818:	f3bf 8f4f 	dsb	sy
 801481c:	603b      	str	r3, [r7, #0]
}
 801481e:	bf00      	nop
 8014820:	bf00      	nop
 8014822:	e7fd      	b.n	8014820 <prvSwitchTimerLists+0x98>
	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
 8014824:	4b09      	ldr	r3, [pc, #36]	@ (801484c <prvSwitchTimerLists+0xc4>)
 8014826:	681b      	ldr	r3, [r3, #0]
 8014828:	681b      	ldr	r3, [r3, #0]
 801482a:	2b00      	cmp	r3, #0
 801482c:	d1b0      	bne.n	8014790 <prvSwitchTimerLists+0x8>
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}

	pxTemp = pxCurrentTimerList;
 801482e:	4b07      	ldr	r3, [pc, #28]	@ (801484c <prvSwitchTimerLists+0xc4>)
 8014830:	681b      	ldr	r3, [r3, #0]
 8014832:	617b      	str	r3, [r7, #20]
	pxCurrentTimerList = pxOverflowTimerList;
 8014834:	4b06      	ldr	r3, [pc, #24]	@ (8014850 <prvSwitchTimerLists+0xc8>)
 8014836:	681b      	ldr	r3, [r3, #0]
 8014838:	4a04      	ldr	r2, [pc, #16]	@ (801484c <prvSwitchTimerLists+0xc4>)
 801483a:	6013      	str	r3, [r2, #0]
	pxOverflowTimerList = pxTemp;
 801483c:	4a04      	ldr	r2, [pc, #16]	@ (8014850 <prvSwitchTimerLists+0xc8>)
 801483e:	697b      	ldr	r3, [r7, #20]
 8014840:	6013      	str	r3, [r2, #0]
}
 8014842:	bf00      	nop
 8014844:	3718      	adds	r7, #24
 8014846:	46bd      	mov	sp, r7
 8014848:	bd80      	pop	{r7, pc}
 801484a:	bf00      	nop
 801484c:	240041b8 	.word	0x240041b8
 8014850:	240041bc 	.word	0x240041bc

08014854 <prvCheckForValidListAndQueue>:
/*-----------------------------------------------------------*/

static void prvCheckForValidListAndQueue( void )
{
 8014854:	b580      	push	{r7, lr}
 8014856:	b082      	sub	sp, #8
 8014858:	af02      	add	r7, sp, #8
	/* Check that the list from which active timers are referenced, and the
	queue used to communicate with the timer service, have been
	initialised. */
	taskENTER_CRITICAL();
 801485a:	f000 f96d 	bl	8014b38 <vPortEnterCritical>
	{
		if( xTimerQueue == NULL )
 801485e:	4b15      	ldr	r3, [pc, #84]	@ (80148b4 <prvCheckForValidListAndQueue+0x60>)
 8014860:	681b      	ldr	r3, [r3, #0]
 8014862:	2b00      	cmp	r3, #0
 8014864:	d120      	bne.n	80148a8 <prvCheckForValidListAndQueue+0x54>
		{
			vListInitialise( &xActiveTimerList1 );
 8014866:	4814      	ldr	r0, [pc, #80]	@ (80148b8 <prvCheckForValidListAndQueue+0x64>)
 8014868:	f7fc fcac 	bl	80111c4 <vListInitialise>
			vListInitialise( &xActiveTimerList2 );
 801486c:	4813      	ldr	r0, [pc, #76]	@ (80148bc <prvCheckForValidListAndQueue+0x68>)
 801486e:	f7fc fca9 	bl	80111c4 <vListInitialise>
			pxCurrentTimerList = &xActiveTimerList1;
 8014872:	4b13      	ldr	r3, [pc, #76]	@ (80148c0 <prvCheckForValidListAndQueue+0x6c>)
 8014874:	4a10      	ldr	r2, [pc, #64]	@ (80148b8 <prvCheckForValidListAndQueue+0x64>)
 8014876:	601a      	str	r2, [r3, #0]
			pxOverflowTimerList = &xActiveTimerList2;
 8014878:	4b12      	ldr	r3, [pc, #72]	@ (80148c4 <prvCheckForValidListAndQueue+0x70>)
 801487a:	4a10      	ldr	r2, [pc, #64]	@ (80148bc <prvCheckForValidListAndQueue+0x68>)
 801487c:	601a      	str	r2, [r3, #0]
				/* The timer queue is allocated statically in case
				configSUPPORT_DYNAMIC_ALLOCATION is 0. */
				static StaticQueue_t xStaticTimerQueue; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
				static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */

				xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );
 801487e:	2300      	movs	r3, #0
 8014880:	9300      	str	r3, [sp, #0]
 8014882:	4b11      	ldr	r3, [pc, #68]	@ (80148c8 <prvCheckForValidListAndQueue+0x74>)
 8014884:	4a11      	ldr	r2, [pc, #68]	@ (80148cc <prvCheckForValidListAndQueue+0x78>)
 8014886:	2110      	movs	r1, #16
 8014888:	200a      	movs	r0, #10
 801488a:	f7fc fdb9 	bl	8011400 <xQueueGenericCreateStatic>
 801488e:	4603      	mov	r3, r0
 8014890:	4a08      	ldr	r2, [pc, #32]	@ (80148b4 <prvCheckForValidListAndQueue+0x60>)
 8014892:	6013      	str	r3, [r2, #0]
			}
			#endif

			#if ( configQUEUE_REGISTRY_SIZE > 0 )
			{
				if( xTimerQueue != NULL )
 8014894:	4b07      	ldr	r3, [pc, #28]	@ (80148b4 <prvCheckForValidListAndQueue+0x60>)
 8014896:	681b      	ldr	r3, [r3, #0]
 8014898:	2b00      	cmp	r3, #0
 801489a:	d005      	beq.n	80148a8 <prvCheckForValidListAndQueue+0x54>
				{
					vQueueAddToRegistry( xTimerQueue, "TmrQ" );
 801489c:	4b05      	ldr	r3, [pc, #20]	@ (80148b4 <prvCheckForValidListAndQueue+0x60>)
 801489e:	681b      	ldr	r3, [r3, #0]
 80148a0:	490b      	ldr	r1, [pc, #44]	@ (80148d0 <prvCheckForValidListAndQueue+0x7c>)
 80148a2:	4618      	mov	r0, r3
 80148a4:	f7fd fddc 	bl	8012460 <vQueueAddToRegistry>
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
	taskEXIT_CRITICAL();
 80148a8:	f000 f978 	bl	8014b9c <vPortExitCritical>
}
 80148ac:	bf00      	nop
 80148ae:	46bd      	mov	sp, r7
 80148b0:	bd80      	pop	{r7, pc}
 80148b2:	bf00      	nop
 80148b4:	240041c0 	.word	0x240041c0
 80148b8:	24004190 	.word	0x24004190
 80148bc:	240041a4 	.word	0x240041a4
 80148c0:	240041b8 	.word	0x240041b8
 80148c4:	240041bc 	.word	0x240041bc
 80148c8:	2400426c 	.word	0x2400426c
 80148cc:	240041cc 	.word	0x240041cc
 80148d0:	0802cbc4 	.word	0x0802cbc4

080148d4 <pxPortInitialiseStack>:

/*
 * See header file for description.
 */
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
 80148d4:	b480      	push	{r7}
 80148d6:	b085      	sub	sp, #20
 80148d8:	af00      	add	r7, sp, #0
 80148da:	60f8      	str	r0, [r7, #12]
 80148dc:	60b9      	str	r1, [r7, #8]
 80148de:	607a      	str	r2, [r7, #4]
	/* Simulate the stack frame as it would be created by a context switch
	interrupt. */

	/* Offset added to account for the way the MCU uses the stack on entry/exit
	of interrupts, and to ensure alignment. */
	pxTopOfStack--;
 80148e0:	68fb      	ldr	r3, [r7, #12]
 80148e2:	3b04      	subs	r3, #4
 80148e4:	60fb      	str	r3, [r7, #12]

	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
 80148e6:	68fb      	ldr	r3, [r7, #12]
 80148e8:	f04f 7280 	mov.w	r2, #16777216	@ 0x1000000
 80148ec:	601a      	str	r2, [r3, #0]
	pxTopOfStack--;
 80148ee:	68fb      	ldr	r3, [r7, #12]
 80148f0:	3b04      	subs	r3, #4
 80148f2:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
 80148f4:	68bb      	ldr	r3, [r7, #8]
 80148f6:	f023 0201 	bic.w	r2, r3, #1
 80148fa:	68fb      	ldr	r3, [r7, #12]
 80148fc:	601a      	str	r2, [r3, #0]
	pxTopOfStack--;
 80148fe:	68fb      	ldr	r3, [r7, #12]
 8014900:	3b04      	subs	r3, #4
 8014902:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
 8014904:	4a0c      	ldr	r2, [pc, #48]	@ (8014938 <pxPortInitialiseStack+0x64>)
 8014906:	68fb      	ldr	r3, [r7, #12]
 8014908:	601a      	str	r2, [r3, #0]

	/* Save code space by skipping register initialisation. */
	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
 801490a:	68fb      	ldr	r3, [r7, #12]
 801490c:	3b14      	subs	r3, #20
 801490e:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
 8014910:	687a      	ldr	r2, [r7, #4]
 8014912:	68fb      	ldr	r3, [r7, #12]
 8014914:	601a      	str	r2, [r3, #0]

	/* A save method is being used that requires each task to maintain its
	own exec return value. */
	pxTopOfStack--;
 8014916:	68fb      	ldr	r3, [r7, #12]
 8014918:	3b04      	subs	r3, #4
 801491a:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = portINITIAL_EXC_RETURN;
 801491c:	68fb      	ldr	r3, [r7, #12]
 801491e:	f06f 0202 	mvn.w	r2, #2
 8014922:	601a      	str	r2, [r3, #0]

	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
 8014924:	68fb      	ldr	r3, [r7, #12]
 8014926:	3b20      	subs	r3, #32
 8014928:	60fb      	str	r3, [r7, #12]

	return pxTopOfStack;
 801492a:	68fb      	ldr	r3, [r7, #12]
}
 801492c:	4618      	mov	r0, r3
 801492e:	3714      	adds	r7, #20
 8014930:	46bd      	mov	sp, r7
 8014932:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014936:	4770      	bx	lr
 8014938:	0801493d 	.word	0x0801493d

0801493c <prvTaskExitError>:
/*-----------------------------------------------------------*/

static void prvTaskExitError( void )
{
 801493c:	b480      	push	{r7}
 801493e:	b085      	sub	sp, #20
 8014940:	af00      	add	r7, sp, #0
volatile uint32_t ulDummy = 0;
 8014942:	2300      	movs	r3, #0
 8014944:	607b      	str	r3, [r7, #4]
	its caller as there is nothing to return to.  If a task wants to exit it
	should instead call vTaskDelete( NULL ).

	Artificially force an assert() to be triggered if configASSERT() is
	defined, then stop here so application writers can catch the error. */
	configASSERT( uxCriticalNesting == ~0UL );
 8014946:	4b13      	ldr	r3, [pc, #76]	@ (8014994 <prvTaskExitError+0x58>)
 8014948:	681b      	ldr	r3, [r3, #0]
 801494a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801494e:	d00b      	beq.n	8014968 <prvTaskExitError+0x2c>
	__asm volatile
 8014950:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014954:	f383 8811 	msr	BASEPRI, r3
 8014958:	f3bf 8f6f 	isb	sy
 801495c:	f3bf 8f4f 	dsb	sy
 8014960:	60fb      	str	r3, [r7, #12]
}
 8014962:	bf00      	nop
 8014964:	bf00      	nop
 8014966:	e7fd      	b.n	8014964 <prvTaskExitError+0x28>
	__asm volatile
 8014968:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801496c:	f383 8811 	msr	BASEPRI, r3
 8014970:	f3bf 8f6f 	isb	sy
 8014974:	f3bf 8f4f 	dsb	sy
 8014978:	60bb      	str	r3, [r7, #8]
}
 801497a:	bf00      	nop
	portDISABLE_INTERRUPTS();
	while( ulDummy == 0 )
 801497c:	bf00      	nop
 801497e:	687b      	ldr	r3, [r7, #4]
 8014980:	2b00      	cmp	r3, #0
 8014982:	d0fc      	beq.n	801497e <prvTaskExitError+0x42>
		about code appearing after this function is called - making ulDummy
		volatile makes the compiler think the function could return and
		therefore not output an 'unreachable code' warning for code that appears
		after it. */
	}
}
 8014984:	bf00      	nop
 8014986:	bf00      	nop
 8014988:	3714      	adds	r7, #20
 801498a:	46bd      	mov	sp, r7
 801498c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014990:	4770      	bx	lr
 8014992:	bf00      	nop
 8014994:	24000048 	.word	0x24000048
	...

080149a0 <SVC_Handler>:
/*-----------------------------------------------------------*/

void vPortSVCHandler( void )
{
	__asm volatile (
 80149a0:	4b07      	ldr	r3, [pc, #28]	@ (80149c0 <pxCurrentTCBConst2>)
 80149a2:	6819      	ldr	r1, [r3, #0]
 80149a4:	6808      	ldr	r0, [r1, #0]
 80149a6:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 80149aa:	f380 8809 	msr	PSP, r0
 80149ae:	f3bf 8f6f 	isb	sy
 80149b2:	f04f 0000 	mov.w	r0, #0
 80149b6:	f380 8811 	msr	BASEPRI, r0
 80149ba:	4770      	bx	lr
 80149bc:	f3af 8000 	nop.w

080149c0 <pxCurrentTCBConst2>:
 80149c0:	24003c90 	.word	0x24003c90
					"	bx r14							\n"
					"									\n"
					"	.align 4						\n"
					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
				);
}
 80149c4:	bf00      	nop
 80149c6:	bf00      	nop

080149c8 <prvPortStartFirstTask>:
{
	/* Start the first task.  This also clears the bit that indicates the FPU is
	in use in case the FPU was used before the scheduler was started - which
	would otherwise result in the unnecessary leaving of space in the SVC stack
	for lazy saving of FPU registers. */
	__asm volatile(
 80149c8:	4808      	ldr	r0, [pc, #32]	@ (80149ec <prvPortStartFirstTask+0x24>)
 80149ca:	6800      	ldr	r0, [r0, #0]
 80149cc:	6800      	ldr	r0, [r0, #0]
 80149ce:	f380 8808 	msr	MSP, r0
 80149d2:	f04f 0000 	mov.w	r0, #0
 80149d6:	f380 8814 	msr	CONTROL, r0
 80149da:	b662      	cpsie	i
 80149dc:	b661      	cpsie	f
 80149de:	f3bf 8f4f 	dsb	sy
 80149e2:	f3bf 8f6f 	isb	sy
 80149e6:	df00      	svc	0
 80149e8:	bf00      	nop
					" dsb					\n"
					" isb					\n"
					" svc 0					\n" /* System call to start first task. */
					" nop					\n"
				);
}
 80149ea:	bf00      	nop
 80149ec:	e000ed08 	.word	0xe000ed08

080149f0 <xPortStartScheduler>:

/*
 * See header file for description.
 */
BaseType_t xPortStartScheduler( void )
{
 80149f0:	b580      	push	{r7, lr}
 80149f2:	b086      	sub	sp, #24
 80149f4:	af00      	add	r7, sp, #0
	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );

	/* This port can be used on all revisions of the Cortex-M7 core other than
	the r0p1 parts.  r0p1 parts should use the port from the
	/source/portable/GCC/ARM_CM7/r0p1 directory. */
	configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
 80149f6:	4b47      	ldr	r3, [pc, #284]	@ (8014b14 <xPortStartScheduler+0x124>)
 80149f8:	681b      	ldr	r3, [r3, #0]
 80149fa:	4a47      	ldr	r2, [pc, #284]	@ (8014b18 <xPortStartScheduler+0x128>)
 80149fc:	4293      	cmp	r3, r2
 80149fe:	d10b      	bne.n	8014a18 <xPortStartScheduler+0x28>
	__asm volatile
 8014a00:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014a04:	f383 8811 	msr	BASEPRI, r3
 8014a08:	f3bf 8f6f 	isb	sy
 8014a0c:	f3bf 8f4f 	dsb	sy
 8014a10:	613b      	str	r3, [r7, #16]
}
 8014a12:	bf00      	nop
 8014a14:	bf00      	nop
 8014a16:	e7fd      	b.n	8014a14 <xPortStartScheduler+0x24>
	configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
 8014a18:	4b3e      	ldr	r3, [pc, #248]	@ (8014b14 <xPortStartScheduler+0x124>)
 8014a1a:	681b      	ldr	r3, [r3, #0]
 8014a1c:	4a3f      	ldr	r2, [pc, #252]	@ (8014b1c <xPortStartScheduler+0x12c>)
 8014a1e:	4293      	cmp	r3, r2
 8014a20:	d10b      	bne.n	8014a3a <xPortStartScheduler+0x4a>
	__asm volatile
 8014a22:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014a26:	f383 8811 	msr	BASEPRI, r3
 8014a2a:	f3bf 8f6f 	isb	sy
 8014a2e:	f3bf 8f4f 	dsb	sy
 8014a32:	60fb      	str	r3, [r7, #12]
}
 8014a34:	bf00      	nop
 8014a36:	bf00      	nop
 8014a38:	e7fd      	b.n	8014a36 <xPortStartScheduler+0x46>

	#if( configASSERT_DEFINED == 1 )
	{
		volatile uint32_t ulOriginalPriority;
		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
 8014a3a:	4b39      	ldr	r3, [pc, #228]	@ (8014b20 <xPortStartScheduler+0x130>)
 8014a3c:	617b      	str	r3, [r7, #20]
		functions can be called.  ISR safe functions are those that end in
		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
		ensure interrupt entry is as fast and simple as possible.

		Save the interrupt priority value that is about to be clobbered. */
		ulOriginalPriority = *pucFirstUserPriorityRegister;
 8014a3e:	697b      	ldr	r3, [r7, #20]
 8014a40:	781b      	ldrb	r3, [r3, #0]
 8014a42:	b2db      	uxtb	r3, r3
 8014a44:	607b      	str	r3, [r7, #4]

		/* Determine the number of priority bits available.  First write to all
		possible bits. */
		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 8014a46:	697b      	ldr	r3, [r7, #20]
 8014a48:	22ff      	movs	r2, #255	@ 0xff
 8014a4a:	701a      	strb	r2, [r3, #0]

		/* Read the value back to see how many bits stuck. */
		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 8014a4c:	697b      	ldr	r3, [r7, #20]
 8014a4e:	781b      	ldrb	r3, [r3, #0]
 8014a50:	b2db      	uxtb	r3, r3
 8014a52:	70fb      	strb	r3, [r7, #3]

		/* Use the same mask on the maximum system call priority. */
		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 8014a54:	78fb      	ldrb	r3, [r7, #3]
 8014a56:	b2db      	uxtb	r3, r3
 8014a58:	f003 0350 	and.w	r3, r3, #80	@ 0x50
 8014a5c:	b2da      	uxtb	r2, r3
 8014a5e:	4b31      	ldr	r3, [pc, #196]	@ (8014b24 <xPortStartScheduler+0x134>)
 8014a60:	701a      	strb	r2, [r3, #0]

		/* Calculate the maximum acceptable priority group value for the number
		of bits read back. */
		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 8014a62:	4b31      	ldr	r3, [pc, #196]	@ (8014b28 <xPortStartScheduler+0x138>)
 8014a64:	2207      	movs	r2, #7
 8014a66:	601a      	str	r2, [r3, #0]
		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
 8014a68:	e009      	b.n	8014a7e <xPortStartScheduler+0x8e>
		{
			ulMaxPRIGROUPValue--;
 8014a6a:	4b2f      	ldr	r3, [pc, #188]	@ (8014b28 <xPortStartScheduler+0x138>)
 8014a6c:	681b      	ldr	r3, [r3, #0]
 8014a6e:	3b01      	subs	r3, #1
 8014a70:	4a2d      	ldr	r2, [pc, #180]	@ (8014b28 <xPortStartScheduler+0x138>)
 8014a72:	6013      	str	r3, [r2, #0]
			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
 8014a74:	78fb      	ldrb	r3, [r7, #3]
 8014a76:	b2db      	uxtb	r3, r3
 8014a78:	005b      	lsls	r3, r3, #1
 8014a7a:	b2db      	uxtb	r3, r3
 8014a7c:	70fb      	strb	r3, [r7, #3]
		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
 8014a7e:	78fb      	ldrb	r3, [r7, #3]
 8014a80:	b2db      	uxtb	r3, r3
 8014a82:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 8014a86:	2b80      	cmp	r3, #128	@ 0x80
 8014a88:	d0ef      	beq.n	8014a6a <xPortStartScheduler+0x7a>
		#ifdef configPRIO_BITS
		{
			/* Check the FreeRTOS configuration that defines the number of
			priority bits matches the number of priority bits actually queried
			from the hardware. */
			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
 8014a8a:	4b27      	ldr	r3, [pc, #156]	@ (8014b28 <xPortStartScheduler+0x138>)
 8014a8c:	681b      	ldr	r3, [r3, #0]
 8014a8e:	f1c3 0307 	rsb	r3, r3, #7
 8014a92:	2b04      	cmp	r3, #4
 8014a94:	d00b      	beq.n	8014aae <xPortStartScheduler+0xbe>
	__asm volatile
 8014a96:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014a9a:	f383 8811 	msr	BASEPRI, r3
 8014a9e:	f3bf 8f6f 	isb	sy
 8014aa2:	f3bf 8f4f 	dsb	sy
 8014aa6:	60bb      	str	r3, [r7, #8]
}
 8014aa8:	bf00      	nop
 8014aaa:	bf00      	nop
 8014aac:	e7fd      	b.n	8014aaa <xPortStartScheduler+0xba>
		}
		#endif

		/* Shift the priority group value back to its position within the AIRCR
		register. */
		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
 8014aae:	4b1e      	ldr	r3, [pc, #120]	@ (8014b28 <xPortStartScheduler+0x138>)
 8014ab0:	681b      	ldr	r3, [r3, #0]
 8014ab2:	021b      	lsls	r3, r3, #8
 8014ab4:	4a1c      	ldr	r2, [pc, #112]	@ (8014b28 <xPortStartScheduler+0x138>)
 8014ab6:	6013      	str	r3, [r2, #0]
		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 8014ab8:	4b1b      	ldr	r3, [pc, #108]	@ (8014b28 <xPortStartScheduler+0x138>)
 8014aba:	681b      	ldr	r3, [r3, #0]
 8014abc:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 8014ac0:	4a19      	ldr	r2, [pc, #100]	@ (8014b28 <xPortStartScheduler+0x138>)
 8014ac2:	6013      	str	r3, [r2, #0]

		/* Restore the clobbered interrupt priority register to its original
		value. */
		*pucFirstUserPriorityRegister = ulOriginalPriority;
 8014ac4:	687b      	ldr	r3, [r7, #4]
 8014ac6:	b2da      	uxtb	r2, r3
 8014ac8:	697b      	ldr	r3, [r7, #20]
 8014aca:	701a      	strb	r2, [r3, #0]
	}
	#endif /* conifgASSERT_DEFINED */

	/* Make PendSV and SysTick the lowest priority interrupts. */
	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
 8014acc:	4b17      	ldr	r3, [pc, #92]	@ (8014b2c <xPortStartScheduler+0x13c>)
 8014ace:	681b      	ldr	r3, [r3, #0]
 8014ad0:	4a16      	ldr	r2, [pc, #88]	@ (8014b2c <xPortStartScheduler+0x13c>)
 8014ad2:	f443 0370 	orr.w	r3, r3, #15728640	@ 0xf00000
 8014ad6:	6013      	str	r3, [r2, #0]
	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
 8014ad8:	4b14      	ldr	r3, [pc, #80]	@ (8014b2c <xPortStartScheduler+0x13c>)
 8014ada:	681b      	ldr	r3, [r3, #0]
 8014adc:	4a13      	ldr	r2, [pc, #76]	@ (8014b2c <xPortStartScheduler+0x13c>)
 8014ade:	f043 4370 	orr.w	r3, r3, #4026531840	@ 0xf0000000
 8014ae2:	6013      	str	r3, [r2, #0]

	/* Start the timer that generates the tick ISR.  Interrupts are disabled
	here already. */
	vPortSetupTimerInterrupt();
 8014ae4:	f000 f8da 	bl	8014c9c <vPortSetupTimerInterrupt>

	/* Initialise the critical nesting count ready for the first task. */
	uxCriticalNesting = 0;
 8014ae8:	4b11      	ldr	r3, [pc, #68]	@ (8014b30 <xPortStartScheduler+0x140>)
 8014aea:	2200      	movs	r2, #0
 8014aec:	601a      	str	r2, [r3, #0]

	/* Ensure the VFP is enabled - it should be anyway. */
	vPortEnableVFP();
 8014aee:	f000 f8f9 	bl	8014ce4 <vPortEnableVFP>

	/* Lazy save always. */
	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 8014af2:	4b10      	ldr	r3, [pc, #64]	@ (8014b34 <xPortStartScheduler+0x144>)
 8014af4:	681b      	ldr	r3, [r3, #0]
 8014af6:	4a0f      	ldr	r2, [pc, #60]	@ (8014b34 <xPortStartScheduler+0x144>)
 8014af8:	f043 4340 	orr.w	r3, r3, #3221225472	@ 0xc0000000
 8014afc:	6013      	str	r3, [r2, #0]

	/* Start the first task. */
	prvPortStartFirstTask();
 8014afe:	f7ff ff63 	bl	80149c8 <prvPortStartFirstTask>
	exit error function to prevent compiler warnings about a static function
	not being called in the case that the application writer overrides this
	functionality by defining configTASK_RETURN_ADDRESS.  Call
	vTaskSwitchContext() so link time optimisation does not remove the
	symbol. */
	vTaskSwitchContext();
 8014b02:	f7fe fcb9 	bl	8013478 <vTaskSwitchContext>
	prvTaskExitError();
 8014b06:	f7ff ff19 	bl	801493c <prvTaskExitError>

	/* Should not get here! */
	return 0;
 8014b0a:	2300      	movs	r3, #0
}
 8014b0c:	4618      	mov	r0, r3
 8014b0e:	3718      	adds	r7, #24
 8014b10:	46bd      	mov	sp, r7
 8014b12:	bd80      	pop	{r7, pc}
 8014b14:	e000ed00 	.word	0xe000ed00
 8014b18:	410fc271 	.word	0x410fc271
 8014b1c:	410fc270 	.word	0x410fc270
 8014b20:	e000e400 	.word	0xe000e400
 8014b24:	240042bc 	.word	0x240042bc
 8014b28:	240042c0 	.word	0x240042c0
 8014b2c:	e000ed20 	.word	0xe000ed20
 8014b30:	24000048 	.word	0x24000048
 8014b34:	e000ef34 	.word	0xe000ef34

08014b38 <vPortEnterCritical>:
	configASSERT( uxCriticalNesting == 1000UL );
}
/*-----------------------------------------------------------*/

void vPortEnterCritical( void )
{
 8014b38:	b480      	push	{r7}
 8014b3a:	b083      	sub	sp, #12
 8014b3c:	af00      	add	r7, sp, #0
	__asm volatile
 8014b3e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014b42:	f383 8811 	msr	BASEPRI, r3
 8014b46:	f3bf 8f6f 	isb	sy
 8014b4a:	f3bf 8f4f 	dsb	sy
 8014b4e:	607b      	str	r3, [r7, #4]
}
 8014b50:	bf00      	nop
	portDISABLE_INTERRUPTS();
	uxCriticalNesting++;
 8014b52:	4b10      	ldr	r3, [pc, #64]	@ (8014b94 <vPortEnterCritical+0x5c>)
 8014b54:	681b      	ldr	r3, [r3, #0]
 8014b56:	3301      	adds	r3, #1
 8014b58:	4a0e      	ldr	r2, [pc, #56]	@ (8014b94 <vPortEnterCritical+0x5c>)
 8014b5a:	6013      	str	r3, [r2, #0]
	/* This is not the interrupt safe version of the enter critical function so
	assert() if it is being called from an interrupt context.  Only API
	functions that end in "FromISR" can be used in an interrupt.  Only assert if
	the critical nesting count is 1 to protect against recursive calls if the
	assert function also uses a critical section. */
	if( uxCriticalNesting == 1 )
 8014b5c:	4b0d      	ldr	r3, [pc, #52]	@ (8014b94 <vPortEnterCritical+0x5c>)
 8014b5e:	681b      	ldr	r3, [r3, #0]
 8014b60:	2b01      	cmp	r3, #1
 8014b62:	d110      	bne.n	8014b86 <vPortEnterCritical+0x4e>
	{
		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
 8014b64:	4b0c      	ldr	r3, [pc, #48]	@ (8014b98 <vPortEnterCritical+0x60>)
 8014b66:	681b      	ldr	r3, [r3, #0]
 8014b68:	b2db      	uxtb	r3, r3
 8014b6a:	2b00      	cmp	r3, #0
 8014b6c:	d00b      	beq.n	8014b86 <vPortEnterCritical+0x4e>
	__asm volatile
 8014b6e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014b72:	f383 8811 	msr	BASEPRI, r3
 8014b76:	f3bf 8f6f 	isb	sy
 8014b7a:	f3bf 8f4f 	dsb	sy
 8014b7e:	603b      	str	r3, [r7, #0]
}
 8014b80:	bf00      	nop
 8014b82:	bf00      	nop
 8014b84:	e7fd      	b.n	8014b82 <vPortEnterCritical+0x4a>
	}
}
 8014b86:	bf00      	nop
 8014b88:	370c      	adds	r7, #12
 8014b8a:	46bd      	mov	sp, r7
 8014b8c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014b90:	4770      	bx	lr
 8014b92:	bf00      	nop
 8014b94:	24000048 	.word	0x24000048
 8014b98:	e000ed04 	.word	0xe000ed04

08014b9c <vPortExitCritical>:
/*-----------------------------------------------------------*/

void vPortExitCritical( void )
{
 8014b9c:	b480      	push	{r7}
 8014b9e:	b083      	sub	sp, #12
 8014ba0:	af00      	add	r7, sp, #0
	configASSERT( uxCriticalNesting );
 8014ba2:	4b12      	ldr	r3, [pc, #72]	@ (8014bec <vPortExitCritical+0x50>)
 8014ba4:	681b      	ldr	r3, [r3, #0]
 8014ba6:	2b00      	cmp	r3, #0
 8014ba8:	d10b      	bne.n	8014bc2 <vPortExitCritical+0x26>
	__asm volatile
 8014baa:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014bae:	f383 8811 	msr	BASEPRI, r3
 8014bb2:	f3bf 8f6f 	isb	sy
 8014bb6:	f3bf 8f4f 	dsb	sy
 8014bba:	607b      	str	r3, [r7, #4]
}
 8014bbc:	bf00      	nop
 8014bbe:	bf00      	nop
 8014bc0:	e7fd      	b.n	8014bbe <vPortExitCritical+0x22>
	uxCriticalNesting--;
 8014bc2:	4b0a      	ldr	r3, [pc, #40]	@ (8014bec <vPortExitCritical+0x50>)
 8014bc4:	681b      	ldr	r3, [r3, #0]
 8014bc6:	3b01      	subs	r3, #1
 8014bc8:	4a08      	ldr	r2, [pc, #32]	@ (8014bec <vPortExitCritical+0x50>)
 8014bca:	6013      	str	r3, [r2, #0]
	if( uxCriticalNesting == 0 )
 8014bcc:	4b07      	ldr	r3, [pc, #28]	@ (8014bec <vPortExitCritical+0x50>)
 8014bce:	681b      	ldr	r3, [r3, #0]
 8014bd0:	2b00      	cmp	r3, #0
 8014bd2:	d105      	bne.n	8014be0 <vPortExitCritical+0x44>
 8014bd4:	2300      	movs	r3, #0
 8014bd6:	603b      	str	r3, [r7, #0]
	__asm volatile
 8014bd8:	683b      	ldr	r3, [r7, #0]
 8014bda:	f383 8811 	msr	BASEPRI, r3
}
 8014bde:	bf00      	nop
	{
		portENABLE_INTERRUPTS();
	}
}
 8014be0:	bf00      	nop
 8014be2:	370c      	adds	r7, #12
 8014be4:	46bd      	mov	sp, r7
 8014be6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014bea:	4770      	bx	lr
 8014bec:	24000048 	.word	0x24000048

08014bf0 <PendSV_Handler>:

void xPortPendSVHandler( void )
{
	/* This is a naked function. */

	__asm volatile
 8014bf0:	f3ef 8009 	mrs	r0, PSP
 8014bf4:	f3bf 8f6f 	isb	sy
 8014bf8:	4b15      	ldr	r3, [pc, #84]	@ (8014c50 <pxCurrentTCBConst>)
 8014bfa:	681a      	ldr	r2, [r3, #0]
 8014bfc:	f01e 0f10 	tst.w	lr, #16
 8014c00:	bf08      	it	eq
 8014c02:	ed20 8a10 	vstmdbeq	r0!, {s16-s31}
 8014c06:	e920 4ff0 	stmdb	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8014c0a:	6010      	str	r0, [r2, #0]
 8014c0c:	e92d 0009 	stmdb	sp!, {r0, r3}
 8014c10:	f04f 0050 	mov.w	r0, #80	@ 0x50
 8014c14:	f380 8811 	msr	BASEPRI, r0
 8014c18:	f3bf 8f4f 	dsb	sy
 8014c1c:	f3bf 8f6f 	isb	sy
 8014c20:	f7fe fc2a 	bl	8013478 <vTaskSwitchContext>
 8014c24:	f04f 0000 	mov.w	r0, #0
 8014c28:	f380 8811 	msr	BASEPRI, r0
 8014c2c:	bc09      	pop	{r0, r3}
 8014c2e:	6819      	ldr	r1, [r3, #0]
 8014c30:	6808      	ldr	r0, [r1, #0]
 8014c32:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8014c36:	f01e 0f10 	tst.w	lr, #16
 8014c3a:	bf08      	it	eq
 8014c3c:	ecb0 8a10 	vldmiaeq	r0!, {s16-s31}
 8014c40:	f380 8809 	msr	PSP, r0
 8014c44:	f3bf 8f6f 	isb	sy
 8014c48:	4770      	bx	lr
 8014c4a:	bf00      	nop
 8014c4c:	f3af 8000 	nop.w

08014c50 <pxCurrentTCBConst>:
 8014c50:	24003c90 	.word	0x24003c90
	"										\n"
	"	.align 4							\n"
	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
	);
}
 8014c54:	bf00      	nop
 8014c56:	bf00      	nop

08014c58 <xPortSysTickHandler>:
/*-----------------------------------------------------------*/

void xPortSysTickHandler( void )
{
 8014c58:	b580      	push	{r7, lr}
 8014c5a:	b082      	sub	sp, #8
 8014c5c:	af00      	add	r7, sp, #0
	__asm volatile
 8014c5e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014c62:	f383 8811 	msr	BASEPRI, r3
 8014c66:	f3bf 8f6f 	isb	sy
 8014c6a:	f3bf 8f4f 	dsb	sy
 8014c6e:	607b      	str	r3, [r7, #4]
}
 8014c70:	bf00      	nop
	save and then restore the interrupt mask value as its value is already
	known. */
	portDISABLE_INTERRUPTS();
	{
		/* Increment the RTOS tick. */
		if( xTaskIncrementTick() != pdFALSE )
 8014c72:	f7fe fb47 	bl	8013304 <xTaskIncrementTick>
 8014c76:	4603      	mov	r3, r0
 8014c78:	2b00      	cmp	r3, #0
 8014c7a:	d003      	beq.n	8014c84 <xPortSysTickHandler+0x2c>
		{
			/* A context switch is required.  Context switching is performed in
			the PendSV interrupt.  Pend the PendSV interrupt. */
			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 8014c7c:	4b06      	ldr	r3, [pc, #24]	@ (8014c98 <xPortSysTickHandler+0x40>)
 8014c7e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8014c82:	601a      	str	r2, [r3, #0]
 8014c84:	2300      	movs	r3, #0
 8014c86:	603b      	str	r3, [r7, #0]
	__asm volatile
 8014c88:	683b      	ldr	r3, [r7, #0]
 8014c8a:	f383 8811 	msr	BASEPRI, r3
}
 8014c8e:	bf00      	nop
		}
	}
	portENABLE_INTERRUPTS();
}
 8014c90:	bf00      	nop
 8014c92:	3708      	adds	r7, #8
 8014c94:	46bd      	mov	sp, r7
 8014c96:	bd80      	pop	{r7, pc}
 8014c98:	e000ed04 	.word	0xe000ed04

08014c9c <vPortSetupTimerInterrupt>:
/*
 * Setup the systick timer to generate the tick interrupts at the required
 * frequency.
 */
__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
{
 8014c9c:	b480      	push	{r7}
 8014c9e:	af00      	add	r7, sp, #0
		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
	}
	#endif /* configUSE_TICKLESS_IDLE */

	/* Stop and clear the SysTick. */
	portNVIC_SYSTICK_CTRL_REG = 0UL;
 8014ca0:	4b0b      	ldr	r3, [pc, #44]	@ (8014cd0 <vPortSetupTimerInterrupt+0x34>)
 8014ca2:	2200      	movs	r2, #0
 8014ca4:	601a      	str	r2, [r3, #0]
	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 8014ca6:	4b0b      	ldr	r3, [pc, #44]	@ (8014cd4 <vPortSetupTimerInterrupt+0x38>)
 8014ca8:	2200      	movs	r2, #0
 8014caa:	601a      	str	r2, [r3, #0]

	/* Configure SysTick to interrupt at the requested rate. */
	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
 8014cac:	4b0a      	ldr	r3, [pc, #40]	@ (8014cd8 <vPortSetupTimerInterrupt+0x3c>)
 8014cae:	681b      	ldr	r3, [r3, #0]
 8014cb0:	4a0a      	ldr	r2, [pc, #40]	@ (8014cdc <vPortSetupTimerInterrupt+0x40>)
 8014cb2:	fba2 2303 	umull	r2, r3, r2, r3
 8014cb6:	099b      	lsrs	r3, r3, #6
 8014cb8:	4a09      	ldr	r2, [pc, #36]	@ (8014ce0 <vPortSetupTimerInterrupt+0x44>)
 8014cba:	3b01      	subs	r3, #1
 8014cbc:	6013      	str	r3, [r2, #0]
	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 8014cbe:	4b04      	ldr	r3, [pc, #16]	@ (8014cd0 <vPortSetupTimerInterrupt+0x34>)
 8014cc0:	2207      	movs	r2, #7
 8014cc2:	601a      	str	r2, [r3, #0]
}
 8014cc4:	bf00      	nop
 8014cc6:	46bd      	mov	sp, r7
 8014cc8:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014ccc:	4770      	bx	lr
 8014cce:	bf00      	nop
 8014cd0:	e000e010 	.word	0xe000e010
 8014cd4:	e000e018 	.word	0xe000e018
 8014cd8:	2400000c 	.word	0x2400000c
 8014cdc:	10624dd3 	.word	0x10624dd3
 8014ce0:	e000e014 	.word	0xe000e014

08014ce4 <vPortEnableVFP>:
/*-----------------------------------------------------------*/

/* This is a naked function. */
static void vPortEnableVFP( void )
{
	__asm volatile
 8014ce4:	f8df 000c 	ldr.w	r0, [pc, #12]	@ 8014cf4 <vPortEnableVFP+0x10>
 8014ce8:	6801      	ldr	r1, [r0, #0]
 8014cea:	f441 0170 	orr.w	r1, r1, #15728640	@ 0xf00000
 8014cee:	6001      	str	r1, [r0, #0]
 8014cf0:	4770      	bx	lr
		"								\n"
		"	orr r1, r1, #( 0xf << 20 )	\n" /* Enable CP10 and CP11 coprocessors, then save back. */
		"	str r1, [r0]				\n"
		"	bx r14						"
	);
}
 8014cf2:	bf00      	nop
 8014cf4:	e000ed88 	.word	0xe000ed88

08014cf8 <vPortValidateInterruptPriority>:
/*-----------------------------------------------------------*/

#if( configASSERT_DEFINED == 1 )

	void vPortValidateInterruptPriority( void )
	{
 8014cf8:	b480      	push	{r7}
 8014cfa:	b085      	sub	sp, #20
 8014cfc:	af00      	add	r7, sp, #0
	uint32_t ulCurrentInterrupt;
	uint8_t ucCurrentPriority;

		/* Obtain the number of the currently executing interrupt. */
		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
 8014cfe:	f3ef 8305 	mrs	r3, IPSR
 8014d02:	60fb      	str	r3, [r7, #12]

		/* Is the interrupt number a user defined interrupt? */
		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
 8014d04:	68fb      	ldr	r3, [r7, #12]
 8014d06:	2b0f      	cmp	r3, #15
 8014d08:	d915      	bls.n	8014d36 <vPortValidateInterruptPriority+0x3e>
		{
			/* Look up the interrupt's priority. */
			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 8014d0a:	4a18      	ldr	r2, [pc, #96]	@ (8014d6c <vPortValidateInterruptPriority+0x74>)
 8014d0c:	68fb      	ldr	r3, [r7, #12]
 8014d0e:	4413      	add	r3, r2
 8014d10:	781b      	ldrb	r3, [r3, #0]
 8014d12:	72fb      	strb	r3, [r7, #11]
			interrupt entry is as fast and simple as possible.

			The following links provide detailed information:
			http://www.freertos.org/RTOS-Cortex-M3-M4.html
			http://www.freertos.org/FAQHelp.html */
			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
 8014d14:	4b16      	ldr	r3, [pc, #88]	@ (8014d70 <vPortValidateInterruptPriority+0x78>)
 8014d16:	781b      	ldrb	r3, [r3, #0]
 8014d18:	7afa      	ldrb	r2, [r7, #11]
 8014d1a:	429a      	cmp	r2, r3
 8014d1c:	d20b      	bcs.n	8014d36 <vPortValidateInterruptPriority+0x3e>
	__asm volatile
 8014d1e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014d22:	f383 8811 	msr	BASEPRI, r3
 8014d26:	f3bf 8f6f 	isb	sy
 8014d2a:	f3bf 8f4f 	dsb	sy
 8014d2e:	607b      	str	r3, [r7, #4]
}
 8014d30:	bf00      	nop
 8014d32:	bf00      	nop
 8014d34:	e7fd      	b.n	8014d32 <vPortValidateInterruptPriority+0x3a>
		configuration then the correct setting can be achieved on all Cortex-M
		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
		scheduler.  Note however that some vendor specific peripheral libraries
		assume a non-zero priority group setting, in which cases using a value
		of zero will result in unpredictable behaviour. */
		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
 8014d36:	4b0f      	ldr	r3, [pc, #60]	@ (8014d74 <vPortValidateInterruptPriority+0x7c>)
 8014d38:	681b      	ldr	r3, [r3, #0]
 8014d3a:	f403 62e0 	and.w	r2, r3, #1792	@ 0x700
 8014d3e:	4b0e      	ldr	r3, [pc, #56]	@ (8014d78 <vPortValidateInterruptPriority+0x80>)
 8014d40:	681b      	ldr	r3, [r3, #0]
 8014d42:	429a      	cmp	r2, r3
 8014d44:	d90b      	bls.n	8014d5e <vPortValidateInterruptPriority+0x66>
	__asm volatile
 8014d46:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014d4a:	f383 8811 	msr	BASEPRI, r3
 8014d4e:	f3bf 8f6f 	isb	sy
 8014d52:	f3bf 8f4f 	dsb	sy
 8014d56:	603b      	str	r3, [r7, #0]
}
 8014d58:	bf00      	nop
 8014d5a:	bf00      	nop
 8014d5c:	e7fd      	b.n	8014d5a <vPortValidateInterruptPriority+0x62>
	}
 8014d5e:	bf00      	nop
 8014d60:	3714      	adds	r7, #20
 8014d62:	46bd      	mov	sp, r7
 8014d64:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014d68:	4770      	bx	lr
 8014d6a:	bf00      	nop
 8014d6c:	e000e3f0 	.word	0xe000e3f0
 8014d70:	240042bc 	.word	0x240042bc
 8014d74:	e000ed0c 	.word	0xe000ed0c
 8014d78:	240042c0 	.word	0x240042c0

08014d7c <pvPortMalloc>:
static size_t xBlockAllocatedBit = 0;

/*-----------------------------------------------------------*/

void *pvPortMalloc( size_t xWantedSize )
{
 8014d7c:	b580      	push	{r7, lr}
 8014d7e:	b08a      	sub	sp, #40	@ 0x28
 8014d80:	af00      	add	r7, sp, #0
 8014d82:	6078      	str	r0, [r7, #4]
BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
void *pvReturn = NULL;
 8014d84:	2300      	movs	r3, #0
 8014d86:	61fb      	str	r3, [r7, #28]

	vTaskSuspendAll();
 8014d88:	f7fe f9ee 	bl	8013168 <vTaskSuspendAll>
	{
		/* If this is the first call to malloc then the heap will require
		initialisation to setup the list of free blocks. */
		if( pxEnd == NULL )
 8014d8c:	4b5c      	ldr	r3, [pc, #368]	@ (8014f00 <pvPortMalloc+0x184>)
 8014d8e:	681b      	ldr	r3, [r3, #0]
 8014d90:	2b00      	cmp	r3, #0
 8014d92:	d101      	bne.n	8014d98 <pvPortMalloc+0x1c>
		{
			prvHeapInit();
 8014d94:	f000 f924 	bl	8014fe0 <prvHeapInit>

		/* Check the requested block size is not so large that the top bit is
		set.  The top bit of the block size member of the BlockLink_t structure
		is used to determine who owns the block - the application or the
		kernel, so it must be free. */
		if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
 8014d98:	4b5a      	ldr	r3, [pc, #360]	@ (8014f04 <pvPortMalloc+0x188>)
 8014d9a:	681a      	ldr	r2, [r3, #0]
 8014d9c:	687b      	ldr	r3, [r7, #4]
 8014d9e:	4013      	ands	r3, r2
 8014da0:	2b00      	cmp	r3, #0
 8014da2:	f040 8095 	bne.w	8014ed0 <pvPortMalloc+0x154>
		{
			/* The wanted size is increased so it can contain a BlockLink_t
			structure in addition to the requested amount of bytes. */
			if( xWantedSize > 0 )
 8014da6:	687b      	ldr	r3, [r7, #4]
 8014da8:	2b00      	cmp	r3, #0
 8014daa:	d01e      	beq.n	8014dea <pvPortMalloc+0x6e>
			{
				xWantedSize += xHeapStructSize;
 8014dac:	2208      	movs	r2, #8
 8014dae:	687b      	ldr	r3, [r7, #4]
 8014db0:	4413      	add	r3, r2
 8014db2:	607b      	str	r3, [r7, #4]

				/* Ensure that blocks are always aligned to the required number
				of bytes. */
				if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
 8014db4:	687b      	ldr	r3, [r7, #4]
 8014db6:	f003 0307 	and.w	r3, r3, #7
 8014dba:	2b00      	cmp	r3, #0
 8014dbc:	d015      	beq.n	8014dea <pvPortMalloc+0x6e>
				{
					/* Byte alignment required. */
					xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
 8014dbe:	687b      	ldr	r3, [r7, #4]
 8014dc0:	f023 0307 	bic.w	r3, r3, #7
 8014dc4:	3308      	adds	r3, #8
 8014dc6:	607b      	str	r3, [r7, #4]
					configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
 8014dc8:	687b      	ldr	r3, [r7, #4]
 8014dca:	f003 0307 	and.w	r3, r3, #7
 8014dce:	2b00      	cmp	r3, #0
 8014dd0:	d00b      	beq.n	8014dea <pvPortMalloc+0x6e>
	__asm volatile
 8014dd2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014dd6:	f383 8811 	msr	BASEPRI, r3
 8014dda:	f3bf 8f6f 	isb	sy
 8014dde:	f3bf 8f4f 	dsb	sy
 8014de2:	617b      	str	r3, [r7, #20]
}
 8014de4:	bf00      	nop
 8014de6:	bf00      	nop
 8014de8:	e7fd      	b.n	8014de6 <pvPortMalloc+0x6a>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}

			if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
 8014dea:	687b      	ldr	r3, [r7, #4]
 8014dec:	2b00      	cmp	r3, #0
 8014dee:	d06f      	beq.n	8014ed0 <pvPortMalloc+0x154>
 8014df0:	4b45      	ldr	r3, [pc, #276]	@ (8014f08 <pvPortMalloc+0x18c>)
 8014df2:	681b      	ldr	r3, [r3, #0]
 8014df4:	687a      	ldr	r2, [r7, #4]
 8014df6:	429a      	cmp	r2, r3
 8014df8:	d86a      	bhi.n	8014ed0 <pvPortMalloc+0x154>
			{
				/* Traverse the list from the start	(lowest address) block until
				one	of adequate size is found. */
				pxPreviousBlock = &xStart;
 8014dfa:	4b44      	ldr	r3, [pc, #272]	@ (8014f0c <pvPortMalloc+0x190>)
 8014dfc:	623b      	str	r3, [r7, #32]
				pxBlock = xStart.pxNextFreeBlock;
 8014dfe:	4b43      	ldr	r3, [pc, #268]	@ (8014f0c <pvPortMalloc+0x190>)
 8014e00:	681b      	ldr	r3, [r3, #0]
 8014e02:	627b      	str	r3, [r7, #36]	@ 0x24
				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
 8014e04:	e004      	b.n	8014e10 <pvPortMalloc+0x94>
				{
					pxPreviousBlock = pxBlock;
 8014e06:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014e08:	623b      	str	r3, [r7, #32]
					pxBlock = pxBlock->pxNextFreeBlock;
 8014e0a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014e0c:	681b      	ldr	r3, [r3, #0]
 8014e0e:	627b      	str	r3, [r7, #36]	@ 0x24
				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
 8014e10:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014e12:	685b      	ldr	r3, [r3, #4]
 8014e14:	687a      	ldr	r2, [r7, #4]
 8014e16:	429a      	cmp	r2, r3
 8014e18:	d903      	bls.n	8014e22 <pvPortMalloc+0xa6>
 8014e1a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014e1c:	681b      	ldr	r3, [r3, #0]
 8014e1e:	2b00      	cmp	r3, #0
 8014e20:	d1f1      	bne.n	8014e06 <pvPortMalloc+0x8a>
				}

				/* If the end marker was reached then a block of adequate size
				was	not found. */
				if( pxBlock != pxEnd )
 8014e22:	4b37      	ldr	r3, [pc, #220]	@ (8014f00 <pvPortMalloc+0x184>)
 8014e24:	681b      	ldr	r3, [r3, #0]
 8014e26:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8014e28:	429a      	cmp	r2, r3
 8014e2a:	d051      	beq.n	8014ed0 <pvPortMalloc+0x154>
				{
					/* Return the memory space pointed to - jumping over the
					BlockLink_t structure at its start. */
					pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
 8014e2c:	6a3b      	ldr	r3, [r7, #32]
 8014e2e:	681b      	ldr	r3, [r3, #0]
 8014e30:	2208      	movs	r2, #8
 8014e32:	4413      	add	r3, r2
 8014e34:	61fb      	str	r3, [r7, #28]

					/* This block is being returned for use so must be taken out
					of the list of free blocks. */
					pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
 8014e36:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014e38:	681a      	ldr	r2, [r3, #0]
 8014e3a:	6a3b      	ldr	r3, [r7, #32]
 8014e3c:	601a      	str	r2, [r3, #0]

					/* If the block is larger than required it can be split into
					two. */
					if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
 8014e3e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014e40:	685a      	ldr	r2, [r3, #4]
 8014e42:	687b      	ldr	r3, [r7, #4]
 8014e44:	1ad2      	subs	r2, r2, r3
 8014e46:	2308      	movs	r3, #8
 8014e48:	005b      	lsls	r3, r3, #1
 8014e4a:	429a      	cmp	r2, r3
 8014e4c:	d920      	bls.n	8014e90 <pvPortMalloc+0x114>
					{
						/* This block is to be split into two.  Create a new
						block following the number of bytes requested. The void
						cast is used to prevent byte alignment warnings from the
						compiler. */
						pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
 8014e4e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8014e50:	687b      	ldr	r3, [r7, #4]
 8014e52:	4413      	add	r3, r2
 8014e54:	61bb      	str	r3, [r7, #24]
						configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
 8014e56:	69bb      	ldr	r3, [r7, #24]
 8014e58:	f003 0307 	and.w	r3, r3, #7
 8014e5c:	2b00      	cmp	r3, #0
 8014e5e:	d00b      	beq.n	8014e78 <pvPortMalloc+0xfc>
	__asm volatile
 8014e60:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014e64:	f383 8811 	msr	BASEPRI, r3
 8014e68:	f3bf 8f6f 	isb	sy
 8014e6c:	f3bf 8f4f 	dsb	sy
 8014e70:	613b      	str	r3, [r7, #16]
}
 8014e72:	bf00      	nop
 8014e74:	bf00      	nop
 8014e76:	e7fd      	b.n	8014e74 <pvPortMalloc+0xf8>

						/* Calculate the sizes of two blocks split from the
						single block. */
						pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
 8014e78:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014e7a:	685a      	ldr	r2, [r3, #4]
 8014e7c:	687b      	ldr	r3, [r7, #4]
 8014e7e:	1ad2      	subs	r2, r2, r3
 8014e80:	69bb      	ldr	r3, [r7, #24]
 8014e82:	605a      	str	r2, [r3, #4]
						pxBlock->xBlockSize = xWantedSize;
 8014e84:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014e86:	687a      	ldr	r2, [r7, #4]
 8014e88:	605a      	str	r2, [r3, #4]

						/* Insert the new block into the list of free blocks. */
						prvInsertBlockIntoFreeList( pxNewBlockLink );
 8014e8a:	69b8      	ldr	r0, [r7, #24]
 8014e8c:	f000 f90a 	bl	80150a4 <prvInsertBlockIntoFreeList>
					else
					{
						mtCOVERAGE_TEST_MARKER();
					}

					xFreeBytesRemaining -= pxBlock->xBlockSize;
 8014e90:	4b1d      	ldr	r3, [pc, #116]	@ (8014f08 <pvPortMalloc+0x18c>)
 8014e92:	681a      	ldr	r2, [r3, #0]
 8014e94:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014e96:	685b      	ldr	r3, [r3, #4]
 8014e98:	1ad3      	subs	r3, r2, r3
 8014e9a:	4a1b      	ldr	r2, [pc, #108]	@ (8014f08 <pvPortMalloc+0x18c>)
 8014e9c:	6013      	str	r3, [r2, #0]

					if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
 8014e9e:	4b1a      	ldr	r3, [pc, #104]	@ (8014f08 <pvPortMalloc+0x18c>)
 8014ea0:	681a      	ldr	r2, [r3, #0]
 8014ea2:	4b1b      	ldr	r3, [pc, #108]	@ (8014f10 <pvPortMalloc+0x194>)
 8014ea4:	681b      	ldr	r3, [r3, #0]
 8014ea6:	429a      	cmp	r2, r3
 8014ea8:	d203      	bcs.n	8014eb2 <pvPortMalloc+0x136>
					{
						xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
 8014eaa:	4b17      	ldr	r3, [pc, #92]	@ (8014f08 <pvPortMalloc+0x18c>)
 8014eac:	681b      	ldr	r3, [r3, #0]
 8014eae:	4a18      	ldr	r2, [pc, #96]	@ (8014f10 <pvPortMalloc+0x194>)
 8014eb0:	6013      	str	r3, [r2, #0]
						mtCOVERAGE_TEST_MARKER();
					}

					/* The block is being returned - it is allocated and owned
					by the application and has no "next" block. */
					pxBlock->xBlockSize |= xBlockAllocatedBit;
 8014eb2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014eb4:	685a      	ldr	r2, [r3, #4]
 8014eb6:	4b13      	ldr	r3, [pc, #76]	@ (8014f04 <pvPortMalloc+0x188>)
 8014eb8:	681b      	ldr	r3, [r3, #0]
 8014eba:	431a      	orrs	r2, r3
 8014ebc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014ebe:	605a      	str	r2, [r3, #4]
					pxBlock->pxNextFreeBlock = NULL;
 8014ec0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014ec2:	2200      	movs	r2, #0
 8014ec4:	601a      	str	r2, [r3, #0]
					xNumberOfSuccessfulAllocations++;
 8014ec6:	4b13      	ldr	r3, [pc, #76]	@ (8014f14 <pvPortMalloc+0x198>)
 8014ec8:	681b      	ldr	r3, [r3, #0]
 8014eca:	3301      	adds	r3, #1
 8014ecc:	4a11      	ldr	r2, [pc, #68]	@ (8014f14 <pvPortMalloc+0x198>)
 8014ece:	6013      	str	r3, [r2, #0]
			mtCOVERAGE_TEST_MARKER();
		}

		traceMALLOC( pvReturn, xWantedSize );
	}
	( void ) xTaskResumeAll();
 8014ed0:	f7fe f958 	bl	8013184 <xTaskResumeAll>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	#endif

	configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
 8014ed4:	69fb      	ldr	r3, [r7, #28]
 8014ed6:	f003 0307 	and.w	r3, r3, #7
 8014eda:	2b00      	cmp	r3, #0
 8014edc:	d00b      	beq.n	8014ef6 <pvPortMalloc+0x17a>
	__asm volatile
 8014ede:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014ee2:	f383 8811 	msr	BASEPRI, r3
 8014ee6:	f3bf 8f6f 	isb	sy
 8014eea:	f3bf 8f4f 	dsb	sy
 8014eee:	60fb      	str	r3, [r7, #12]
}
 8014ef0:	bf00      	nop
 8014ef2:	bf00      	nop
 8014ef4:	e7fd      	b.n	8014ef2 <pvPortMalloc+0x176>
	return pvReturn;
 8014ef6:	69fb      	ldr	r3, [r7, #28]
}
 8014ef8:	4618      	mov	r0, r3
 8014efa:	3728      	adds	r7, #40	@ 0x28
 8014efc:	46bd      	mov	sp, r7
 8014efe:	bd80      	pop	{r7, pc}
 8014f00:	240242cc 	.word	0x240242cc
 8014f04:	240242e0 	.word	0x240242e0
 8014f08:	240242d0 	.word	0x240242d0
 8014f0c:	240242c4 	.word	0x240242c4
 8014f10:	240242d4 	.word	0x240242d4
 8014f14:	240242d8 	.word	0x240242d8

08014f18 <vPortFree>:
/*-----------------------------------------------------------*/

void vPortFree( void *pv )
{
 8014f18:	b580      	push	{r7, lr}
 8014f1a:	b086      	sub	sp, #24
 8014f1c:	af00      	add	r7, sp, #0
 8014f1e:	6078      	str	r0, [r7, #4]
uint8_t *puc = ( uint8_t * ) pv;
 8014f20:	687b      	ldr	r3, [r7, #4]
 8014f22:	617b      	str	r3, [r7, #20]
BlockLink_t *pxLink;

	if( pv != NULL )
 8014f24:	687b      	ldr	r3, [r7, #4]
 8014f26:	2b00      	cmp	r3, #0
 8014f28:	d04f      	beq.n	8014fca <vPortFree+0xb2>
	{
		/* The memory being freed will have an BlockLink_t structure immediately
		before it. */
		puc -= xHeapStructSize;
 8014f2a:	2308      	movs	r3, #8
 8014f2c:	425b      	negs	r3, r3
 8014f2e:	697a      	ldr	r2, [r7, #20]
 8014f30:	4413      	add	r3, r2
 8014f32:	617b      	str	r3, [r7, #20]

		/* This casting is to keep the compiler from issuing warnings. */
		pxLink = ( void * ) puc;
 8014f34:	697b      	ldr	r3, [r7, #20]
 8014f36:	613b      	str	r3, [r7, #16]

		/* Check the block is actually allocated. */
		configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
 8014f38:	693b      	ldr	r3, [r7, #16]
 8014f3a:	685a      	ldr	r2, [r3, #4]
 8014f3c:	4b25      	ldr	r3, [pc, #148]	@ (8014fd4 <vPortFree+0xbc>)
 8014f3e:	681b      	ldr	r3, [r3, #0]
 8014f40:	4013      	ands	r3, r2
 8014f42:	2b00      	cmp	r3, #0
 8014f44:	d10b      	bne.n	8014f5e <vPortFree+0x46>
	__asm volatile
 8014f46:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014f4a:	f383 8811 	msr	BASEPRI, r3
 8014f4e:	f3bf 8f6f 	isb	sy
 8014f52:	f3bf 8f4f 	dsb	sy
 8014f56:	60fb      	str	r3, [r7, #12]
}
 8014f58:	bf00      	nop
 8014f5a:	bf00      	nop
 8014f5c:	e7fd      	b.n	8014f5a <vPortFree+0x42>
		configASSERT( pxLink->pxNextFreeBlock == NULL );
 8014f5e:	693b      	ldr	r3, [r7, #16]
 8014f60:	681b      	ldr	r3, [r3, #0]
 8014f62:	2b00      	cmp	r3, #0
 8014f64:	d00b      	beq.n	8014f7e <vPortFree+0x66>
	__asm volatile
 8014f66:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014f6a:	f383 8811 	msr	BASEPRI, r3
 8014f6e:	f3bf 8f6f 	isb	sy
 8014f72:	f3bf 8f4f 	dsb	sy
 8014f76:	60bb      	str	r3, [r7, #8]
}
 8014f78:	bf00      	nop
 8014f7a:	bf00      	nop
 8014f7c:	e7fd      	b.n	8014f7a <vPortFree+0x62>

		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
 8014f7e:	693b      	ldr	r3, [r7, #16]
 8014f80:	685a      	ldr	r2, [r3, #4]
 8014f82:	4b14      	ldr	r3, [pc, #80]	@ (8014fd4 <vPortFree+0xbc>)
 8014f84:	681b      	ldr	r3, [r3, #0]
 8014f86:	4013      	ands	r3, r2
 8014f88:	2b00      	cmp	r3, #0
 8014f8a:	d01e      	beq.n	8014fca <vPortFree+0xb2>
		{
			if( pxLink->pxNextFreeBlock == NULL )
 8014f8c:	693b      	ldr	r3, [r7, #16]
 8014f8e:	681b      	ldr	r3, [r3, #0]
 8014f90:	2b00      	cmp	r3, #0
 8014f92:	d11a      	bne.n	8014fca <vPortFree+0xb2>
			{
				/* The block is being returned to the heap - it is no longer
				allocated. */
				pxLink->xBlockSize &= ~xBlockAllocatedBit;
 8014f94:	693b      	ldr	r3, [r7, #16]
 8014f96:	685a      	ldr	r2, [r3, #4]
 8014f98:	4b0e      	ldr	r3, [pc, #56]	@ (8014fd4 <vPortFree+0xbc>)
 8014f9a:	681b      	ldr	r3, [r3, #0]
 8014f9c:	43db      	mvns	r3, r3
 8014f9e:	401a      	ands	r2, r3
 8014fa0:	693b      	ldr	r3, [r7, #16]
 8014fa2:	605a      	str	r2, [r3, #4]

				vTaskSuspendAll();
 8014fa4:	f7fe f8e0 	bl	8013168 <vTaskSuspendAll>
				{
					/* Add this block to the list of free blocks. */
					xFreeBytesRemaining += pxLink->xBlockSize;
 8014fa8:	693b      	ldr	r3, [r7, #16]
 8014faa:	685a      	ldr	r2, [r3, #4]
 8014fac:	4b0a      	ldr	r3, [pc, #40]	@ (8014fd8 <vPortFree+0xc0>)
 8014fae:	681b      	ldr	r3, [r3, #0]
 8014fb0:	4413      	add	r3, r2
 8014fb2:	4a09      	ldr	r2, [pc, #36]	@ (8014fd8 <vPortFree+0xc0>)
 8014fb4:	6013      	str	r3, [r2, #0]
					traceFREE( pv, pxLink->xBlockSize );
					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
 8014fb6:	6938      	ldr	r0, [r7, #16]
 8014fb8:	f000 f874 	bl	80150a4 <prvInsertBlockIntoFreeList>
					xNumberOfSuccessfulFrees++;
 8014fbc:	4b07      	ldr	r3, [pc, #28]	@ (8014fdc <vPortFree+0xc4>)
 8014fbe:	681b      	ldr	r3, [r3, #0]
 8014fc0:	3301      	adds	r3, #1
 8014fc2:	4a06      	ldr	r2, [pc, #24]	@ (8014fdc <vPortFree+0xc4>)
 8014fc4:	6013      	str	r3, [r2, #0]
				}
				( void ) xTaskResumeAll();
 8014fc6:	f7fe f8dd 	bl	8013184 <xTaskResumeAll>
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
}
 8014fca:	bf00      	nop
 8014fcc:	3718      	adds	r7, #24
 8014fce:	46bd      	mov	sp, r7
 8014fd0:	bd80      	pop	{r7, pc}
 8014fd2:	bf00      	nop
 8014fd4:	240242e0 	.word	0x240242e0
 8014fd8:	240242d0 	.word	0x240242d0
 8014fdc:	240242dc 	.word	0x240242dc

08014fe0 <prvHeapInit>:
	/* This just exists to keep the linker quiet. */
}
/*-----------------------------------------------------------*/

static void prvHeapInit( void )
{
 8014fe0:	b480      	push	{r7}
 8014fe2:	b085      	sub	sp, #20
 8014fe4:	af00      	add	r7, sp, #0
BlockLink_t *pxFirstFreeBlock;
uint8_t *pucAlignedHeap;
size_t uxAddress;
size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
 8014fe6:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
 8014fea:	60bb      	str	r3, [r7, #8]

	/* Ensure the heap starts on a correctly aligned boundary. */
	uxAddress = ( size_t ) ucHeap;
 8014fec:	4b27      	ldr	r3, [pc, #156]	@ (801508c <prvHeapInit+0xac>)
 8014fee:	60fb      	str	r3, [r7, #12]

	if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
 8014ff0:	68fb      	ldr	r3, [r7, #12]
 8014ff2:	f003 0307 	and.w	r3, r3, #7
 8014ff6:	2b00      	cmp	r3, #0
 8014ff8:	d00c      	beq.n	8015014 <prvHeapInit+0x34>
	{
		uxAddress += ( portBYTE_ALIGNMENT - 1 );
 8014ffa:	68fb      	ldr	r3, [r7, #12]
 8014ffc:	3307      	adds	r3, #7
 8014ffe:	60fb      	str	r3, [r7, #12]
		uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 8015000:	68fb      	ldr	r3, [r7, #12]
 8015002:	f023 0307 	bic.w	r3, r3, #7
 8015006:	60fb      	str	r3, [r7, #12]
		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
 8015008:	68ba      	ldr	r2, [r7, #8]
 801500a:	68fb      	ldr	r3, [r7, #12]
 801500c:	1ad3      	subs	r3, r2, r3
 801500e:	4a1f      	ldr	r2, [pc, #124]	@ (801508c <prvHeapInit+0xac>)
 8015010:	4413      	add	r3, r2
 8015012:	60bb      	str	r3, [r7, #8]
	}

	pucAlignedHeap = ( uint8_t * ) uxAddress;
 8015014:	68fb      	ldr	r3, [r7, #12]
 8015016:	607b      	str	r3, [r7, #4]

	/* xStart is used to hold a pointer to the first item in the list of free
	blocks.  The void cast is used to prevent compiler warnings. */
	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
 8015018:	4a1d      	ldr	r2, [pc, #116]	@ (8015090 <prvHeapInit+0xb0>)
 801501a:	687b      	ldr	r3, [r7, #4]
 801501c:	6013      	str	r3, [r2, #0]
	xStart.xBlockSize = ( size_t ) 0;
 801501e:	4b1c      	ldr	r3, [pc, #112]	@ (8015090 <prvHeapInit+0xb0>)
 8015020:	2200      	movs	r2, #0
 8015022:	605a      	str	r2, [r3, #4]

	/* pxEnd is used to mark the end of the list of free blocks and is inserted
	at the end of the heap space. */
	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
 8015024:	687b      	ldr	r3, [r7, #4]
 8015026:	68ba      	ldr	r2, [r7, #8]
 8015028:	4413      	add	r3, r2
 801502a:	60fb      	str	r3, [r7, #12]
	uxAddress -= xHeapStructSize;
 801502c:	2208      	movs	r2, #8
 801502e:	68fb      	ldr	r3, [r7, #12]
 8015030:	1a9b      	subs	r3, r3, r2
 8015032:	60fb      	str	r3, [r7, #12]
	uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 8015034:	68fb      	ldr	r3, [r7, #12]
 8015036:	f023 0307 	bic.w	r3, r3, #7
 801503a:	60fb      	str	r3, [r7, #12]
	pxEnd = ( void * ) uxAddress;
 801503c:	68fb      	ldr	r3, [r7, #12]
 801503e:	4a15      	ldr	r2, [pc, #84]	@ (8015094 <prvHeapInit+0xb4>)
 8015040:	6013      	str	r3, [r2, #0]
	pxEnd->xBlockSize = 0;
 8015042:	4b14      	ldr	r3, [pc, #80]	@ (8015094 <prvHeapInit+0xb4>)
 8015044:	681b      	ldr	r3, [r3, #0]
 8015046:	2200      	movs	r2, #0
 8015048:	605a      	str	r2, [r3, #4]
	pxEnd->pxNextFreeBlock = NULL;
 801504a:	4b12      	ldr	r3, [pc, #72]	@ (8015094 <prvHeapInit+0xb4>)
 801504c:	681b      	ldr	r3, [r3, #0]
 801504e:	2200      	movs	r2, #0
 8015050:	601a      	str	r2, [r3, #0]

	/* To start with there is a single free block that is sized to take up the
	entire heap space, minus the space taken by pxEnd. */
	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
 8015052:	687b      	ldr	r3, [r7, #4]
 8015054:	603b      	str	r3, [r7, #0]
	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
 8015056:	683b      	ldr	r3, [r7, #0]
 8015058:	68fa      	ldr	r2, [r7, #12]
 801505a:	1ad2      	subs	r2, r2, r3
 801505c:	683b      	ldr	r3, [r7, #0]
 801505e:	605a      	str	r2, [r3, #4]
	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
 8015060:	4b0c      	ldr	r3, [pc, #48]	@ (8015094 <prvHeapInit+0xb4>)
 8015062:	681a      	ldr	r2, [r3, #0]
 8015064:	683b      	ldr	r3, [r7, #0]
 8015066:	601a      	str	r2, [r3, #0]

	/* Only one block exists - and it covers the entire usable heap space. */
	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 8015068:	683b      	ldr	r3, [r7, #0]
 801506a:	685b      	ldr	r3, [r3, #4]
 801506c:	4a0a      	ldr	r2, [pc, #40]	@ (8015098 <prvHeapInit+0xb8>)
 801506e:	6013      	str	r3, [r2, #0]
	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 8015070:	683b      	ldr	r3, [r7, #0]
 8015072:	685b      	ldr	r3, [r3, #4]
 8015074:	4a09      	ldr	r2, [pc, #36]	@ (801509c <prvHeapInit+0xbc>)
 8015076:	6013      	str	r3, [r2, #0]

	/* Work out the position of the top bit in a size_t variable. */
	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
 8015078:	4b09      	ldr	r3, [pc, #36]	@ (80150a0 <prvHeapInit+0xc0>)
 801507a:	f04f 4200 	mov.w	r2, #2147483648	@ 0x80000000
 801507e:	601a      	str	r2, [r3, #0]
}
 8015080:	bf00      	nop
 8015082:	3714      	adds	r7, #20
 8015084:	46bd      	mov	sp, r7
 8015086:	f85d 7b04 	ldr.w	r7, [sp], #4
 801508a:	4770      	bx	lr
 801508c:	240042c4 	.word	0x240042c4
 8015090:	240242c4 	.word	0x240242c4
 8015094:	240242cc 	.word	0x240242cc
 8015098:	240242d4 	.word	0x240242d4
 801509c:	240242d0 	.word	0x240242d0
 80150a0:	240242e0 	.word	0x240242e0

080150a4 <prvInsertBlockIntoFreeList>:
/*-----------------------------------------------------------*/

static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
{
 80150a4:	b480      	push	{r7}
 80150a6:	b085      	sub	sp, #20
 80150a8:	af00      	add	r7, sp, #0
 80150aa:	6078      	str	r0, [r7, #4]
BlockLink_t *pxIterator;
uint8_t *puc;

	/* Iterate through the list until a block is found that has a higher address
	than the block being inserted. */
	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
 80150ac:	4b28      	ldr	r3, [pc, #160]	@ (8015150 <prvInsertBlockIntoFreeList+0xac>)
 80150ae:	60fb      	str	r3, [r7, #12]
 80150b0:	e002      	b.n	80150b8 <prvInsertBlockIntoFreeList+0x14>
 80150b2:	68fb      	ldr	r3, [r7, #12]
 80150b4:	681b      	ldr	r3, [r3, #0]
 80150b6:	60fb      	str	r3, [r7, #12]
 80150b8:	68fb      	ldr	r3, [r7, #12]
 80150ba:	681b      	ldr	r3, [r3, #0]
 80150bc:	687a      	ldr	r2, [r7, #4]
 80150be:	429a      	cmp	r2, r3
 80150c0:	d8f7      	bhi.n	80150b2 <prvInsertBlockIntoFreeList+0xe>
		/* Nothing to do here, just iterate to the right position. */
	}

	/* Do the block being inserted, and the block it is being inserted after
	make a contiguous block of memory? */
	puc = ( uint8_t * ) pxIterator;
 80150c2:	68fb      	ldr	r3, [r7, #12]
 80150c4:	60bb      	str	r3, [r7, #8]
	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
 80150c6:	68fb      	ldr	r3, [r7, #12]
 80150c8:	685b      	ldr	r3, [r3, #4]
 80150ca:	68ba      	ldr	r2, [r7, #8]
 80150cc:	4413      	add	r3, r2
 80150ce:	687a      	ldr	r2, [r7, #4]
 80150d0:	429a      	cmp	r2, r3
 80150d2:	d108      	bne.n	80150e6 <prvInsertBlockIntoFreeList+0x42>
	{
		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
 80150d4:	68fb      	ldr	r3, [r7, #12]
 80150d6:	685a      	ldr	r2, [r3, #4]
 80150d8:	687b      	ldr	r3, [r7, #4]
 80150da:	685b      	ldr	r3, [r3, #4]
 80150dc:	441a      	add	r2, r3
 80150de:	68fb      	ldr	r3, [r7, #12]
 80150e0:	605a      	str	r2, [r3, #4]
		pxBlockToInsert = pxIterator;
 80150e2:	68fb      	ldr	r3, [r7, #12]
 80150e4:	607b      	str	r3, [r7, #4]
		mtCOVERAGE_TEST_MARKER();
	}

	/* Do the block being inserted, and the block it is being inserted before
	make a contiguous block of memory? */
	puc = ( uint8_t * ) pxBlockToInsert;
 80150e6:	687b      	ldr	r3, [r7, #4]
 80150e8:	60bb      	str	r3, [r7, #8]
	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
 80150ea:	687b      	ldr	r3, [r7, #4]
 80150ec:	685b      	ldr	r3, [r3, #4]
 80150ee:	68ba      	ldr	r2, [r7, #8]
 80150f0:	441a      	add	r2, r3
 80150f2:	68fb      	ldr	r3, [r7, #12]
 80150f4:	681b      	ldr	r3, [r3, #0]
 80150f6:	429a      	cmp	r2, r3
 80150f8:	d118      	bne.n	801512c <prvInsertBlockIntoFreeList+0x88>
	{
		if( pxIterator->pxNextFreeBlock != pxEnd )
 80150fa:	68fb      	ldr	r3, [r7, #12]
 80150fc:	681a      	ldr	r2, [r3, #0]
 80150fe:	4b15      	ldr	r3, [pc, #84]	@ (8015154 <prvInsertBlockIntoFreeList+0xb0>)
 8015100:	681b      	ldr	r3, [r3, #0]
 8015102:	429a      	cmp	r2, r3
 8015104:	d00d      	beq.n	8015122 <prvInsertBlockIntoFreeList+0x7e>
		{
			/* Form one big block from the two blocks. */
			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
 8015106:	687b      	ldr	r3, [r7, #4]
 8015108:	685a      	ldr	r2, [r3, #4]
 801510a:	68fb      	ldr	r3, [r7, #12]
 801510c:	681b      	ldr	r3, [r3, #0]
 801510e:	685b      	ldr	r3, [r3, #4]
 8015110:	441a      	add	r2, r3
 8015112:	687b      	ldr	r3, [r7, #4]
 8015114:	605a      	str	r2, [r3, #4]
			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
 8015116:	68fb      	ldr	r3, [r7, #12]
 8015118:	681b      	ldr	r3, [r3, #0]
 801511a:	681a      	ldr	r2, [r3, #0]
 801511c:	687b      	ldr	r3, [r7, #4]
 801511e:	601a      	str	r2, [r3, #0]
 8015120:	e008      	b.n	8015134 <prvInsertBlockIntoFreeList+0x90>
		}
		else
		{
			pxBlockToInsert->pxNextFreeBlock = pxEnd;
 8015122:	4b0c      	ldr	r3, [pc, #48]	@ (8015154 <prvInsertBlockIntoFreeList+0xb0>)
 8015124:	681a      	ldr	r2, [r3, #0]
 8015126:	687b      	ldr	r3, [r7, #4]
 8015128:	601a      	str	r2, [r3, #0]
 801512a:	e003      	b.n	8015134 <prvInsertBlockIntoFreeList+0x90>
		}
	}
	else
	{
		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
 801512c:	68fb      	ldr	r3, [r7, #12]
 801512e:	681a      	ldr	r2, [r3, #0]
 8015130:	687b      	ldr	r3, [r7, #4]
 8015132:	601a      	str	r2, [r3, #0]

	/* If the block being inserted plugged a gab, so was merged with the block
	before and the block after, then it's pxNextFreeBlock pointer will have
	already been set, and should not be set here as that would make it point
	to itself. */
	if( pxIterator != pxBlockToInsert )
 8015134:	68fa      	ldr	r2, [r7, #12]
 8015136:	687b      	ldr	r3, [r7, #4]
 8015138:	429a      	cmp	r2, r3
 801513a:	d002      	beq.n	8015142 <prvInsertBlockIntoFreeList+0x9e>
	{
		pxIterator->pxNextFreeBlock = pxBlockToInsert;
 801513c:	68fb      	ldr	r3, [r7, #12]
 801513e:	687a      	ldr	r2, [r7, #4]
 8015140:	601a      	str	r2, [r3, #0]
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8015142:	bf00      	nop
 8015144:	3714      	adds	r7, #20
 8015146:	46bd      	mov	sp, r7
 8015148:	f85d 7b04 	ldr.w	r7, [sp], #4
 801514c:	4770      	bx	lr
 801514e:	bf00      	nop
 8015150:	240242c4 	.word	0x240242c4
 8015154:	240242cc 	.word	0x240242cc

08015158 <netconn_apimsg>:
 * @param apimsg a struct containing the function to call and its parameters
 * @return ERR_OK if the function was called, another err_t if not
 */
static err_t
netconn_apimsg(tcpip_callback_fn fn, struct api_msg *apimsg)
{
 8015158:	b580      	push	{r7, lr}
 801515a:	b084      	sub	sp, #16
 801515c:	af00      	add	r7, sp, #0
 801515e:	6078      	str	r0, [r7, #4]
 8015160:	6039      	str	r1, [r7, #0]
  err_t err;

#ifdef LWIP_DEBUG
  /* catch functions that don't set err */
  apimsg->err = ERR_VAL;
 8015162:	683b      	ldr	r3, [r7, #0]
 8015164:	22fa      	movs	r2, #250	@ 0xfa
 8015166:	711a      	strb	r2, [r3, #4]

#if LWIP_NETCONN_SEM_PER_THREAD
  apimsg->op_completed_sem = LWIP_NETCONN_THREAD_SEM_GET();
#endif /* LWIP_NETCONN_SEM_PER_THREAD */

  err = tcpip_send_msg_wait_sem(fn, apimsg, LWIP_API_MSG_SEM(apimsg));
 8015168:	683b      	ldr	r3, [r7, #0]
 801516a:	681b      	ldr	r3, [r3, #0]
 801516c:	330c      	adds	r3, #12
 801516e:	461a      	mov	r2, r3
 8015170:	6839      	ldr	r1, [r7, #0]
 8015172:	6878      	ldr	r0, [r7, #4]
 8015174:	f003 fc7c 	bl	8018a70 <tcpip_send_msg_wait_sem>
 8015178:	4603      	mov	r3, r0
 801517a:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 801517c:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8015180:	2b00      	cmp	r3, #0
 8015182:	d103      	bne.n	801518c <netconn_apimsg+0x34>
    return apimsg->err;
 8015184:	683b      	ldr	r3, [r7, #0]
 8015186:	f993 3004 	ldrsb.w	r3, [r3, #4]
 801518a:	e001      	b.n	8015190 <netconn_apimsg+0x38>
  }
  return err;
 801518c:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8015190:	4618      	mov	r0, r3
 8015192:	3710      	adds	r7, #16
 8015194:	46bd      	mov	sp, r7
 8015196:	bd80      	pop	{r7, pc}

08015198 <netconn_new_with_proto_and_callback>:
 * @return a newly allocated struct netconn or
 *         NULL on memory error
 */
struct netconn *
netconn_new_with_proto_and_callback(enum netconn_type t, u8_t proto, netconn_callback callback)
{
 8015198:	b580      	push	{r7, lr}
 801519a:	b08c      	sub	sp, #48	@ 0x30
 801519c:	af00      	add	r7, sp, #0
 801519e:	4603      	mov	r3, r0
 80151a0:	603a      	str	r2, [r7, #0]
 80151a2:	71fb      	strb	r3, [r7, #7]
 80151a4:	460b      	mov	r3, r1
 80151a6:	71bb      	strb	r3, [r7, #6]
  struct netconn *conn;
  API_MSG_VAR_DECLARE(msg);
  API_MSG_VAR_ALLOC_RETURN_NULL(msg);

  conn = netconn_alloc(t, callback);
 80151a8:	79fb      	ldrb	r3, [r7, #7]
 80151aa:	6839      	ldr	r1, [r7, #0]
 80151ac:	4618      	mov	r0, r3
 80151ae:	f001 f8ad 	bl	801630c <netconn_alloc>
 80151b2:	62f8      	str	r0, [r7, #44]	@ 0x2c
  if (conn != NULL) {
 80151b4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80151b6:	2b00      	cmp	r3, #0
 80151b8:	d054      	beq.n	8015264 <netconn_new_with_proto_and_callback+0xcc>
    err_t err;

    API_MSG_VAR_REF(msg).msg.n.proto = proto;
 80151ba:	79bb      	ldrb	r3, [r7, #6]
 80151bc:	743b      	strb	r3, [r7, #16]
    API_MSG_VAR_REF(msg).conn = conn;
 80151be:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80151c0:	60bb      	str	r3, [r7, #8]
    err = netconn_apimsg(lwip_netconn_do_newconn, &API_MSG_VAR_REF(msg));
 80151c2:	f107 0308 	add.w	r3, r7, #8
 80151c6:	4619      	mov	r1, r3
 80151c8:	4829      	ldr	r0, [pc, #164]	@ (8015270 <netconn_new_with_proto_and_callback+0xd8>)
 80151ca:	f7ff ffc5 	bl	8015158 <netconn_apimsg>
 80151ce:	4603      	mov	r3, r0
 80151d0:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
    if (err != ERR_OK) {
 80151d4:	f997 302b 	ldrsb.w	r3, [r7, #43]	@ 0x2b
 80151d8:	2b00      	cmp	r3, #0
 80151da:	d043      	beq.n	8015264 <netconn_new_with_proto_and_callback+0xcc>
      LWIP_ASSERT("freeing conn without freeing pcb", conn->pcb.tcp == NULL);
 80151dc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80151de:	685b      	ldr	r3, [r3, #4]
 80151e0:	2b00      	cmp	r3, #0
 80151e2:	d005      	beq.n	80151f0 <netconn_new_with_proto_and_callback+0x58>
 80151e4:	4b23      	ldr	r3, [pc, #140]	@ (8015274 <netconn_new_with_proto_and_callback+0xdc>)
 80151e6:	22a3      	movs	r2, #163	@ 0xa3
 80151e8:	4923      	ldr	r1, [pc, #140]	@ (8015278 <netconn_new_with_proto_and_callback+0xe0>)
 80151ea:	4824      	ldr	r0, [pc, #144]	@ (801527c <netconn_new_with_proto_and_callback+0xe4>)
 80151ec:	f014 fbf6 	bl	80299dc <iprintf>
      LWIP_ASSERT("conn has no recvmbox", sys_mbox_valid(&conn->recvmbox));
 80151f0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80151f2:	3310      	adds	r3, #16
 80151f4:	4618      	mov	r0, r3
 80151f6:	f011 f851 	bl	802629c <sys_mbox_valid>
 80151fa:	4603      	mov	r3, r0
 80151fc:	2b00      	cmp	r3, #0
 80151fe:	d105      	bne.n	801520c <netconn_new_with_proto_and_callback+0x74>
 8015200:	4b1c      	ldr	r3, [pc, #112]	@ (8015274 <netconn_new_with_proto_and_callback+0xdc>)
 8015202:	22a4      	movs	r2, #164	@ 0xa4
 8015204:	491e      	ldr	r1, [pc, #120]	@ (8015280 <netconn_new_with_proto_and_callback+0xe8>)
 8015206:	481d      	ldr	r0, [pc, #116]	@ (801527c <netconn_new_with_proto_and_callback+0xe4>)
 8015208:	f014 fbe8 	bl	80299dc <iprintf>
#if LWIP_TCP
      LWIP_ASSERT("conn->acceptmbox shouldn't exist", !sys_mbox_valid(&conn->acceptmbox));
 801520c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801520e:	3314      	adds	r3, #20
 8015210:	4618      	mov	r0, r3
 8015212:	f011 f843 	bl	802629c <sys_mbox_valid>
 8015216:	4603      	mov	r3, r0
 8015218:	2b00      	cmp	r3, #0
 801521a:	d005      	beq.n	8015228 <netconn_new_with_proto_and_callback+0x90>
 801521c:	4b15      	ldr	r3, [pc, #84]	@ (8015274 <netconn_new_with_proto_and_callback+0xdc>)
 801521e:	22a6      	movs	r2, #166	@ 0xa6
 8015220:	4918      	ldr	r1, [pc, #96]	@ (8015284 <netconn_new_with_proto_and_callback+0xec>)
 8015222:	4816      	ldr	r0, [pc, #88]	@ (801527c <netconn_new_with_proto_and_callback+0xe4>)
 8015224:	f014 fbda 	bl	80299dc <iprintf>
#endif /* LWIP_TCP */
#if !LWIP_NETCONN_SEM_PER_THREAD
      LWIP_ASSERT("conn has no op_completed", sys_sem_valid(&conn->op_completed));
 8015228:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801522a:	330c      	adds	r3, #12
 801522c:	4618      	mov	r0, r3
 801522e:	f011 f8c3 	bl	80263b8 <sys_sem_valid>
 8015232:	4603      	mov	r3, r0
 8015234:	2b00      	cmp	r3, #0
 8015236:	d105      	bne.n	8015244 <netconn_new_with_proto_and_callback+0xac>
 8015238:	4b0e      	ldr	r3, [pc, #56]	@ (8015274 <netconn_new_with_proto_and_callback+0xdc>)
 801523a:	22a9      	movs	r2, #169	@ 0xa9
 801523c:	4912      	ldr	r1, [pc, #72]	@ (8015288 <netconn_new_with_proto_and_callback+0xf0>)
 801523e:	480f      	ldr	r0, [pc, #60]	@ (801527c <netconn_new_with_proto_and_callback+0xe4>)
 8015240:	f014 fbcc 	bl	80299dc <iprintf>
      sys_sem_free(&conn->op_completed);
 8015244:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015246:	330c      	adds	r3, #12
 8015248:	4618      	mov	r0, r3
 801524a:	f011 f8a8 	bl	802639e <sys_sem_free>
#endif /* !LWIP_NETCONN_SEM_PER_THREAD */
      sys_mbox_free(&conn->recvmbox);
 801524e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015250:	3310      	adds	r3, #16
 8015252:	4618      	mov	r0, r3
 8015254:	f010 ffae 	bl	80261b4 <sys_mbox_free>
      memp_free(MEMP_NETCONN, conn);
 8015258:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 801525a:	2007      	movs	r0, #7
 801525c:	f004 fa58 	bl	8019710 <memp_free>
      API_MSG_VAR_FREE(msg);
      return NULL;
 8015260:	2300      	movs	r3, #0
 8015262:	e000      	b.n	8015266 <netconn_new_with_proto_and_callback+0xce>
    }
  }
  API_MSG_VAR_FREE(msg);
  return conn;
 8015264:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
}
 8015266:	4618      	mov	r0, r3
 8015268:	3730      	adds	r7, #48	@ 0x30
 801526a:	46bd      	mov	sp, r7
 801526c:	bd80      	pop	{r7, pc}
 801526e:	bf00      	nop
 8015270:	080162e1 	.word	0x080162e1
 8015274:	0802cbcc 	.word	0x0802cbcc
 8015278:	0802cc00 	.word	0x0802cc00
 801527c:	0802cc24 	.word	0x0802cc24
 8015280:	0802cc4c 	.word	0x0802cc4c
 8015284:	0802cc64 	.word	0x0802cc64
 8015288:	0802cc88 	.word	0x0802cc88

0801528c <netconn_prepare_delete>:
 * @param conn the netconn to delete
 * @return ERR_OK if the connection was deleted
 */
err_t
netconn_prepare_delete(struct netconn *conn)
{
 801528c:	b580      	push	{r7, lr}
 801528e:	b08c      	sub	sp, #48	@ 0x30
 8015290:	af00      	add	r7, sp, #0
 8015292:	6078      	str	r0, [r7, #4]
  err_t err;
  API_MSG_VAR_DECLARE(msg);

  /* No ASSERT here because possible to get a (conn == NULL) if we got an accept error */
  if (conn == NULL) {
 8015294:	687b      	ldr	r3, [r7, #4]
 8015296:	2b00      	cmp	r3, #0
 8015298:	d101      	bne.n	801529e <netconn_prepare_delete+0x12>
    return ERR_OK;
 801529a:	2300      	movs	r3, #0
 801529c:	e014      	b.n	80152c8 <netconn_prepare_delete+0x3c>
  }

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 801529e:	687b      	ldr	r3, [r7, #4]
 80152a0:	60fb      	str	r3, [r7, #12]
  /* get the time we started, which is later compared to
     sys_now() + conn->send_timeout */
  API_MSG_VAR_REF(msg).msg.sd.time_started = sys_now();
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
#if LWIP_TCP
  API_MSG_VAR_REF(msg).msg.sd.polls_left =
 80152a2:	2329      	movs	r3, #41	@ 0x29
 80152a4:	757b      	strb	r3, [r7, #21]
    ((LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT + TCP_SLOW_INTERVAL - 1) / TCP_SLOW_INTERVAL) + 1;
#endif /* LWIP_TCP */
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
  err = netconn_apimsg(lwip_netconn_do_delconn, &API_MSG_VAR_REF(msg));
 80152a6:	f107 030c 	add.w	r3, r7, #12
 80152aa:	4619      	mov	r1, r3
 80152ac:	4808      	ldr	r0, [pc, #32]	@ (80152d0 <netconn_prepare_delete+0x44>)
 80152ae:	f7ff ff53 	bl	8015158 <netconn_apimsg>
 80152b2:	4603      	mov	r3, r0
 80152b4:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  if (err != ERR_OK) {
 80152b8:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
 80152bc:	2b00      	cmp	r3, #0
 80152be:	d002      	beq.n	80152c6 <netconn_prepare_delete+0x3a>
    return err;
 80152c0:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
 80152c4:	e000      	b.n	80152c8 <netconn_prepare_delete+0x3c>
  }
  return ERR_OK;
 80152c6:	2300      	movs	r3, #0
}
 80152c8:	4618      	mov	r0, r3
 80152ca:	3730      	adds	r7, #48	@ 0x30
 80152cc:	46bd      	mov	sp, r7
 80152ce:	bd80      	pop	{r7, pc}
 80152d0:	08016865 	.word	0x08016865

080152d4 <netconn_delete>:
 * @param conn the netconn to delete
 * @return ERR_OK if the connection was deleted
 */
err_t
netconn_delete(struct netconn *conn)
{
 80152d4:	b580      	push	{r7, lr}
 80152d6:	b084      	sub	sp, #16
 80152d8:	af00      	add	r7, sp, #0
 80152da:	6078      	str	r0, [r7, #4]
  err_t err;

  /* No ASSERT here because possible to get a (conn == NULL) if we got an accept error */
  if (conn == NULL) {
 80152dc:	687b      	ldr	r3, [r7, #4]
 80152de:	2b00      	cmp	r3, #0
 80152e0:	d101      	bne.n	80152e6 <netconn_delete+0x12>
    return ERR_OK;
 80152e2:	2300      	movs	r3, #0
 80152e4:	e00d      	b.n	8015302 <netconn_delete+0x2e>
    /* Already called netconn_prepare_delete() before */
    err = ERR_OK;
  } else
#endif /* LWIP_NETCONN_FULLDUPLEX */
  {
    err = netconn_prepare_delete(conn);
 80152e6:	6878      	ldr	r0, [r7, #4]
 80152e8:	f7ff ffd0 	bl	801528c <netconn_prepare_delete>
 80152ec:	4603      	mov	r3, r0
 80152ee:	73fb      	strb	r3, [r7, #15]
  }
  if (err == ERR_OK) {
 80152f0:	f997 300f 	ldrsb.w	r3, [r7, #15]
 80152f4:	2b00      	cmp	r3, #0
 80152f6:	d102      	bne.n	80152fe <netconn_delete+0x2a>
    netconn_free(conn);
 80152f8:	6878      	ldr	r0, [r7, #4]
 80152fa:	f001 f881 	bl	8016400 <netconn_free>
  }
  return err;
 80152fe:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8015302:	4618      	mov	r0, r3
 8015304:	3710      	adds	r7, #16
 8015306:	46bd      	mov	sp, r7
 8015308:	bd80      	pop	{r7, pc}
	...

0801530c <netconn_getaddr>:
 * @return ERR_CONN for invalid connections
 *         ERR_OK if the information was retrieved
 */
err_t
netconn_getaddr(struct netconn *conn, ip_addr_t *addr, u16_t *port, u8_t local)
{
 801530c:	b580      	push	{r7, lr}
 801530e:	b08e      	sub	sp, #56	@ 0x38
 8015310:	af00      	add	r7, sp, #0
 8015312:	60f8      	str	r0, [r7, #12]
 8015314:	60b9      	str	r1, [r7, #8]
 8015316:	607a      	str	r2, [r7, #4]
 8015318:	70fb      	strb	r3, [r7, #3]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_getaddr: invalid conn", (conn != NULL), return ERR_ARG;);
 801531a:	68fb      	ldr	r3, [r7, #12]
 801531c:	2b00      	cmp	r3, #0
 801531e:	d109      	bne.n	8015334 <netconn_getaddr+0x28>
 8015320:	4b1d      	ldr	r3, [pc, #116]	@ (8015398 <netconn_getaddr+0x8c>)
 8015322:	f44f 7289 	mov.w	r2, #274	@ 0x112
 8015326:	491d      	ldr	r1, [pc, #116]	@ (801539c <netconn_getaddr+0x90>)
 8015328:	481d      	ldr	r0, [pc, #116]	@ (80153a0 <netconn_getaddr+0x94>)
 801532a:	f014 fb57 	bl	80299dc <iprintf>
 801532e:	f06f 030f 	mvn.w	r3, #15
 8015332:	e02d      	b.n	8015390 <netconn_getaddr+0x84>
  LWIP_ERROR("netconn_getaddr: invalid addr", (addr != NULL), return ERR_ARG;);
 8015334:	68bb      	ldr	r3, [r7, #8]
 8015336:	2b00      	cmp	r3, #0
 8015338:	d109      	bne.n	801534e <netconn_getaddr+0x42>
 801533a:	4b17      	ldr	r3, [pc, #92]	@ (8015398 <netconn_getaddr+0x8c>)
 801533c:	f240 1213 	movw	r2, #275	@ 0x113
 8015340:	4918      	ldr	r1, [pc, #96]	@ (80153a4 <netconn_getaddr+0x98>)
 8015342:	4817      	ldr	r0, [pc, #92]	@ (80153a0 <netconn_getaddr+0x94>)
 8015344:	f014 fb4a 	bl	80299dc <iprintf>
 8015348:	f06f 030f 	mvn.w	r3, #15
 801534c:	e020      	b.n	8015390 <netconn_getaddr+0x84>
  LWIP_ERROR("netconn_getaddr: invalid port", (port != NULL), return ERR_ARG;);
 801534e:	687b      	ldr	r3, [r7, #4]
 8015350:	2b00      	cmp	r3, #0
 8015352:	d109      	bne.n	8015368 <netconn_getaddr+0x5c>
 8015354:	4b10      	ldr	r3, [pc, #64]	@ (8015398 <netconn_getaddr+0x8c>)
 8015356:	f44f 728a 	mov.w	r2, #276	@ 0x114
 801535a:	4913      	ldr	r1, [pc, #76]	@ (80153a8 <netconn_getaddr+0x9c>)
 801535c:	4810      	ldr	r0, [pc, #64]	@ (80153a0 <netconn_getaddr+0x94>)
 801535e:	f014 fb3d 	bl	80299dc <iprintf>
 8015362:	f06f 030f 	mvn.w	r3, #15
 8015366:	e013      	b.n	8015390 <netconn_getaddr+0x84>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8015368:	68fb      	ldr	r3, [r7, #12]
 801536a:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.ad.local = local;
 801536c:	78fb      	ldrb	r3, [r7, #3]
 801536e:	f887 3024 	strb.w	r3, [r7, #36]	@ 0x24
#if LWIP_MPU_COMPATIBLE
  err = netconn_apimsg(lwip_netconn_do_getaddr, &API_MSG_VAR_REF(msg));
  *addr = msg->msg.ad.ipaddr;
  *port = msg->msg.ad.port;
#else /* LWIP_MPU_COMPATIBLE */
  msg.msg.ad.ipaddr = addr;
 8015372:	68bb      	ldr	r3, [r7, #8]
 8015374:	61fb      	str	r3, [r7, #28]
  msg.msg.ad.port = port;
 8015376:	687b      	ldr	r3, [r7, #4]
 8015378:	623b      	str	r3, [r7, #32]
  err = netconn_apimsg(lwip_netconn_do_getaddr, &msg);
 801537a:	f107 0314 	add.w	r3, r7, #20
 801537e:	4619      	mov	r1, r3
 8015380:	480a      	ldr	r0, [pc, #40]	@ (80153ac <netconn_getaddr+0xa0>)
 8015382:	f7ff fee9 	bl	8015158 <netconn_apimsg>
 8015386:	4603      	mov	r3, r0
 8015388:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
#endif /* LWIP_MPU_COMPATIBLE */
  API_MSG_VAR_FREE(msg);

  return err;
 801538c:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 8015390:	4618      	mov	r0, r3
 8015392:	3738      	adds	r7, #56	@ 0x38
 8015394:	46bd      	mov	sp, r7
 8015396:	bd80      	pop	{r7, pc}
 8015398:	0802cbcc 	.word	0x0802cbcc
 801539c:	0802cca4 	.word	0x0802cca4
 80153a0:	0802cc24 	.word	0x0802cc24
 80153a4:	0802ccc4 	.word	0x0802ccc4
 80153a8:	0802cce4 	.word	0x0802cce4
 80153ac:	080172c1 	.word	0x080172c1

080153b0 <netconn_connect>:
 * @param port the remote port to connect to (no used for RAW)
 * @return ERR_OK if connected, return value of tcp_/udp_/raw_connect otherwise
 */
err_t
netconn_connect(struct netconn *conn, const ip_addr_t *addr, u16_t port)
{
 80153b0:	b580      	push	{r7, lr}
 80153b2:	b08e      	sub	sp, #56	@ 0x38
 80153b4:	af00      	add	r7, sp, #0
 80153b6:	60f8      	str	r0, [r7, #12]
 80153b8:	60b9      	str	r1, [r7, #8]
 80153ba:	4613      	mov	r3, r2
 80153bc:	80fb      	strh	r3, [r7, #6]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_connect: invalid conn", (conn != NULL), return ERR_ARG;);
 80153be:	68fb      	ldr	r3, [r7, #12]
 80153c0:	2b00      	cmp	r3, #0
 80153c2:	d109      	bne.n	80153d8 <netconn_connect+0x28>
 80153c4:	4b11      	ldr	r3, [pc, #68]	@ (801540c <netconn_connect+0x5c>)
 80153c6:	f44f 72bf 	mov.w	r2, #382	@ 0x17e
 80153ca:	4911      	ldr	r1, [pc, #68]	@ (8015410 <netconn_connect+0x60>)
 80153cc:	4811      	ldr	r0, [pc, #68]	@ (8015414 <netconn_connect+0x64>)
 80153ce:	f014 fb05 	bl	80299dc <iprintf>
 80153d2:	f06f 030f 	mvn.w	r3, #15
 80153d6:	e015      	b.n	8015404 <netconn_connect+0x54>

#if LWIP_IPV4
  /* Don't propagate NULL pointer (IP_ADDR_ANY alias) to subsequent functions */
  if (addr == NULL) {
 80153d8:	68bb      	ldr	r3, [r7, #8]
 80153da:	2b00      	cmp	r3, #0
 80153dc:	d101      	bne.n	80153e2 <netconn_connect+0x32>
    addr = IP4_ADDR_ANY;
 80153de:	4b0e      	ldr	r3, [pc, #56]	@ (8015418 <netconn_connect+0x68>)
 80153e0:	60bb      	str	r3, [r7, #8]
  }
#endif /* LWIP_IPV4 */

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 80153e2:	68fb      	ldr	r3, [r7, #12]
 80153e4:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.bc.ipaddr = API_MSG_VAR_REF(addr);
 80153e6:	68bb      	ldr	r3, [r7, #8]
 80153e8:	61fb      	str	r3, [r7, #28]
  API_MSG_VAR_REF(msg).msg.bc.port = port;
 80153ea:	88fb      	ldrh	r3, [r7, #6]
 80153ec:	843b      	strh	r3, [r7, #32]
  err = netconn_apimsg(lwip_netconn_do_connect, &API_MSG_VAR_REF(msg));
 80153ee:	f107 0314 	add.w	r3, r7, #20
 80153f2:	4619      	mov	r1, r3
 80153f4:	4809      	ldr	r0, [pc, #36]	@ (801541c <netconn_connect+0x6c>)
 80153f6:	f7ff feaf 	bl	8015158 <netconn_apimsg>
 80153fa:	4603      	mov	r3, r0
 80153fc:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
  API_MSG_VAR_FREE(msg);

  return err;
 8015400:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 8015404:	4618      	mov	r0, r3
 8015406:	3738      	adds	r7, #56	@ 0x38
 8015408:	46bd      	mov	sp, r7
 801540a:	bd80      	pop	{r7, pc}
 801540c:	0802cbcc 	.word	0x0802cbcc
 8015410:	0802cd40 	.word	0x0802cd40
 8015414:	0802cc24 	.word	0x0802cc24
 8015418:	08030c68 	.word	0x08030c68
 801541c:	08016b51 	.word	0x08016b51

08015420 <netconn_disconnect>:
 * @param conn the netconn to disconnect
 * @return See @ref err_t
 */
err_t
netconn_disconnect(struct netconn *conn)
{
 8015420:	b580      	push	{r7, lr}
 8015422:	b08c      	sub	sp, #48	@ 0x30
 8015424:	af00      	add	r7, sp, #0
 8015426:	6078      	str	r0, [r7, #4]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_disconnect: invalid conn", (conn != NULL), return ERR_ARG;);
 8015428:	687b      	ldr	r3, [r7, #4]
 801542a:	2b00      	cmp	r3, #0
 801542c:	d109      	bne.n	8015442 <netconn_disconnect+0x22>
 801542e:	4b0d      	ldr	r3, [pc, #52]	@ (8015464 <netconn_disconnect+0x44>)
 8015430:	f44f 72cf 	mov.w	r2, #414	@ 0x19e
 8015434:	490c      	ldr	r1, [pc, #48]	@ (8015468 <netconn_disconnect+0x48>)
 8015436:	480d      	ldr	r0, [pc, #52]	@ (801546c <netconn_disconnect+0x4c>)
 8015438:	f014 fad0 	bl	80299dc <iprintf>
 801543c:	f06f 030f 	mvn.w	r3, #15
 8015440:	e00c      	b.n	801545c <netconn_disconnect+0x3c>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8015442:	687b      	ldr	r3, [r7, #4]
 8015444:	60fb      	str	r3, [r7, #12]
  err = netconn_apimsg(lwip_netconn_do_disconnect, &API_MSG_VAR_REF(msg));
 8015446:	f107 030c 	add.w	r3, r7, #12
 801544a:	4619      	mov	r1, r3
 801544c:	4808      	ldr	r0, [pc, #32]	@ (8015470 <netconn_disconnect+0x50>)
 801544e:	f7ff fe83 	bl	8015158 <netconn_apimsg>
 8015452:	4603      	mov	r3, r0
 8015454:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 8015458:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 801545c:	4618      	mov	r0, r3
 801545e:	3730      	adds	r7, #48	@ 0x30
 8015460:	46bd      	mov	sp, r7
 8015462:	bd80      	pop	{r7, pc}
 8015464:	0802cbcc 	.word	0x0802cbcc
 8015468:	0802cd60 	.word	0x0802cd60
 801546c:	0802cc24 	.word	0x0802cc24
 8015470:	08016cd1 	.word	0x08016cd1

08015474 <netconn_recv_data>:
 *         ERR_WOULDBLOCK if the netconn is nonblocking but would block to wait for data
 *         ERR_TIMEOUT if the netconn has a receive timeout and no data was received
 */
static err_t
netconn_recv_data(struct netconn *conn, void **new_buf, u8_t apiflags)
{
 8015474:	b580      	push	{r7, lr}
 8015476:	b08a      	sub	sp, #40	@ 0x28
 8015478:	af00      	add	r7, sp, #0
 801547a:	60f8      	str	r0, [r7, #12]
 801547c:	60b9      	str	r1, [r7, #8]
 801547e:	4613      	mov	r3, r2
 8015480:	71fb      	strb	r3, [r7, #7]
  void *buf = NULL;
 8015482:	2300      	movs	r3, #0
 8015484:	61bb      	str	r3, [r7, #24]
  u16_t len;

  LWIP_ERROR("netconn_recv: invalid pointer", (new_buf != NULL), return ERR_ARG;);
 8015486:	68bb      	ldr	r3, [r7, #8]
 8015488:	2b00      	cmp	r3, #0
 801548a:	d109      	bne.n	80154a0 <netconn_recv_data+0x2c>
 801548c:	4b64      	ldr	r3, [pc, #400]	@ (8015620 <netconn_recv_data+0x1ac>)
 801548e:	f44f 7212 	mov.w	r2, #584	@ 0x248
 8015492:	4964      	ldr	r1, [pc, #400]	@ (8015624 <netconn_recv_data+0x1b0>)
 8015494:	4864      	ldr	r0, [pc, #400]	@ (8015628 <netconn_recv_data+0x1b4>)
 8015496:	f014 faa1 	bl	80299dc <iprintf>
 801549a:	f06f 030f 	mvn.w	r3, #15
 801549e:	e0bb      	b.n	8015618 <netconn_recv_data+0x1a4>
  *new_buf = NULL;
 80154a0:	68bb      	ldr	r3, [r7, #8]
 80154a2:	2200      	movs	r2, #0
 80154a4:	601a      	str	r2, [r3, #0]
  LWIP_ERROR("netconn_recv: invalid conn",    (conn != NULL),    return ERR_ARG;);
 80154a6:	68fb      	ldr	r3, [r7, #12]
 80154a8:	2b00      	cmp	r3, #0
 80154aa:	d109      	bne.n	80154c0 <netconn_recv_data+0x4c>
 80154ac:	4b5c      	ldr	r3, [pc, #368]	@ (8015620 <netconn_recv_data+0x1ac>)
 80154ae:	f240 224a 	movw	r2, #586	@ 0x24a
 80154b2:	495e      	ldr	r1, [pc, #376]	@ (801562c <netconn_recv_data+0x1b8>)
 80154b4:	485c      	ldr	r0, [pc, #368]	@ (8015628 <netconn_recv_data+0x1b4>)
 80154b6:	f014 fa91 	bl	80299dc <iprintf>
 80154ba:	f06f 030f 	mvn.w	r3, #15
 80154be:	e0ab      	b.n	8015618 <netconn_recv_data+0x1a4>

  if (!NETCONN_RECVMBOX_WAITABLE(conn)) {
 80154c0:	68fb      	ldr	r3, [r7, #12]
 80154c2:	3310      	adds	r3, #16
 80154c4:	4618      	mov	r0, r3
 80154c6:	f010 fee9 	bl	802629c <sys_mbox_valid>
 80154ca:	4603      	mov	r3, r0
 80154cc:	2b00      	cmp	r3, #0
 80154ce:	d10e      	bne.n	80154ee <netconn_recv_data+0x7a>
    err_t err = netconn_err(conn);
 80154d0:	68f8      	ldr	r0, [r7, #12]
 80154d2:	f000 fb1f 	bl	8015b14 <netconn_err>
 80154d6:	4603      	mov	r3, r0
 80154d8:	77fb      	strb	r3, [r7, #31]
    if (err != ERR_OK) {
 80154da:	f997 301f 	ldrsb.w	r3, [r7, #31]
 80154de:	2b00      	cmp	r3, #0
 80154e0:	d002      	beq.n	80154e8 <netconn_recv_data+0x74>
      /* return pending error */
      return err;
 80154e2:	f997 301f 	ldrsb.w	r3, [r7, #31]
 80154e6:	e097      	b.n	8015618 <netconn_recv_data+0x1a4>
    }
    return ERR_CONN;
 80154e8:	f06f 030a 	mvn.w	r3, #10
 80154ec:	e094      	b.n	8015618 <netconn_recv_data+0x1a4>
  }

  NETCONN_MBOX_WAITING_INC(conn);
  if (netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK) ||
 80154ee:	68fb      	ldr	r3, [r7, #12]
 80154f0:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80154f4:	f003 0302 	and.w	r3, r3, #2
 80154f8:	2b00      	cmp	r3, #0
 80154fa:	d110      	bne.n	801551e <netconn_recv_data+0xaa>
 80154fc:	79fb      	ldrb	r3, [r7, #7]
 80154fe:	f003 0304 	and.w	r3, r3, #4
 8015502:	2b00      	cmp	r3, #0
 8015504:	d10b      	bne.n	801551e <netconn_recv_data+0xaa>
      (conn->flags & NETCONN_FLAG_MBOXCLOSED) || (conn->pending_err != ERR_OK)) {
 8015506:	68fb      	ldr	r3, [r7, #12]
 8015508:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801550c:	f003 0301 	and.w	r3, r3, #1
  if (netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK) ||
 8015510:	2b00      	cmp	r3, #0
 8015512:	d104      	bne.n	801551e <netconn_recv_data+0xaa>
      (conn->flags & NETCONN_FLAG_MBOXCLOSED) || (conn->pending_err != ERR_OK)) {
 8015514:	68fb      	ldr	r3, [r7, #12]
 8015516:	f993 3008 	ldrsb.w	r3, [r3, #8]
 801551a:	2b00      	cmp	r3, #0
 801551c:	d025      	beq.n	801556a <netconn_recv_data+0xf6>
    if (sys_arch_mbox_tryfetch(&conn->recvmbox, &buf) == SYS_ARCH_TIMEOUT) {
 801551e:	68fb      	ldr	r3, [r7, #12]
 8015520:	3310      	adds	r3, #16
 8015522:	f107 0218 	add.w	r2, r7, #24
 8015526:	4611      	mov	r1, r2
 8015528:	4618      	mov	r0, r3
 801552a:	f010 fea0 	bl	802626e <sys_arch_mbox_tryfetch>
 801552e:	4603      	mov	r3, r0
 8015530:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8015534:	d12a      	bne.n	801558c <netconn_recv_data+0x118>
      err_t err;
      NETCONN_MBOX_WAITING_DEC(conn);
      err = netconn_err(conn);
 8015536:	68f8      	ldr	r0, [r7, #12]
 8015538:	f000 faec 	bl	8015b14 <netconn_err>
 801553c:	4603      	mov	r3, r0
 801553e:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
      if (err != ERR_OK) {
 8015542:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 8015546:	2b00      	cmp	r3, #0
 8015548:	d002      	beq.n	8015550 <netconn_recv_data+0xdc>
        /* return pending error */
        return err;
 801554a:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 801554e:	e063      	b.n	8015618 <netconn_recv_data+0x1a4>
      }
      if (conn->flags & NETCONN_FLAG_MBOXCLOSED) {
 8015550:	68fb      	ldr	r3, [r7, #12]
 8015552:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015556:	f003 0301 	and.w	r3, r3, #1
 801555a:	2b00      	cmp	r3, #0
 801555c:	d002      	beq.n	8015564 <netconn_recv_data+0xf0>
        return ERR_CONN;
 801555e:	f06f 030a 	mvn.w	r3, #10
 8015562:	e059      	b.n	8015618 <netconn_recv_data+0x1a4>
      }
      return ERR_WOULDBLOCK;
 8015564:	f06f 0306 	mvn.w	r3, #6
 8015568:	e056      	b.n	8015618 <netconn_recv_data+0x1a4>
    }
  } else {
#if LWIP_SO_RCVTIMEO
    if (sys_arch_mbox_fetch(&conn->recvmbox, &buf, conn->recv_timeout) == SYS_ARCH_TIMEOUT) {
 801556a:	68fb      	ldr	r3, [r7, #12]
 801556c:	f103 0010 	add.w	r0, r3, #16
 8015570:	68fb      	ldr	r3, [r7, #12]
 8015572:	69da      	ldr	r2, [r3, #28]
 8015574:	f107 0318 	add.w	r3, r7, #24
 8015578:	4619      	mov	r1, r3
 801557a:	f010 fe47 	bl	802620c <sys_arch_mbox_fetch>
 801557e:	4603      	mov	r3, r0
 8015580:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8015584:	d102      	bne.n	801558c <netconn_recv_data+0x118>
      NETCONN_MBOX_WAITING_DEC(conn);
      return ERR_TIMEOUT;
 8015586:	f06f 0302 	mvn.w	r3, #2
 801558a:	e045      	b.n	8015618 <netconn_recv_data+0x1a4>
  }
#endif

#if LWIP_TCP
#if (LWIP_UDP || LWIP_RAW)
  if (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP)
 801558c:	68fb      	ldr	r3, [r7, #12]
 801558e:	781b      	ldrb	r3, [r3, #0]
 8015590:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8015594:	2b10      	cmp	r3, #16
 8015596:	d117      	bne.n	80155c8 <netconn_recv_data+0x154>
#endif /* (LWIP_UDP || LWIP_RAW) */
  {
    err_t err;
    /* Check if this is an error message or a pbuf */
    if (lwip_netconn_is_err_msg(buf, &err)) {
 8015598:	69bb      	ldr	r3, [r7, #24]
 801559a:	f107 0217 	add.w	r2, r7, #23
 801559e:	4611      	mov	r1, r2
 80155a0:	4618      	mov	r0, r3
 80155a2:	f000 fb09 	bl	8015bb8 <lwip_netconn_is_err_msg>
 80155a6:	4603      	mov	r3, r0
 80155a8:	2b00      	cmp	r3, #0
 80155aa:	d009      	beq.n	80155c0 <netconn_recv_data+0x14c>
      /* new_buf has been zeroed above already */
      if (err == ERR_CLSD) {
 80155ac:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80155b0:	f113 0f0f 	cmn.w	r3, #15
 80155b4:	d101      	bne.n	80155ba <netconn_recv_data+0x146>
        /* connection closed translates to ERR_OK with *new_buf == NULL */
        return ERR_OK;
 80155b6:	2300      	movs	r3, #0
 80155b8:	e02e      	b.n	8015618 <netconn_recv_data+0x1a4>
      }
      return err;
 80155ba:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80155be:	e02b      	b.n	8015618 <netconn_recv_data+0x1a4>
    }
    len = ((struct pbuf *)buf)->tot_len;
 80155c0:	69bb      	ldr	r3, [r7, #24]
 80155c2:	891b      	ldrh	r3, [r3, #8]
 80155c4:	84fb      	strh	r3, [r7, #38]	@ 0x26
 80155c6:	e00d      	b.n	80155e4 <netconn_recv_data+0x170>
#if LWIP_TCP && (LWIP_UDP || LWIP_RAW)
  else
#endif /* LWIP_TCP && (LWIP_UDP || LWIP_RAW) */
#if (LWIP_UDP || LWIP_RAW)
  {
    LWIP_ASSERT("buf != NULL", buf != NULL);
 80155c8:	69bb      	ldr	r3, [r7, #24]
 80155ca:	2b00      	cmp	r3, #0
 80155cc:	d106      	bne.n	80155dc <netconn_recv_data+0x168>
 80155ce:	4b14      	ldr	r3, [pc, #80]	@ (8015620 <netconn_recv_data+0x1ac>)
 80155d0:	f240 2291 	movw	r2, #657	@ 0x291
 80155d4:	4916      	ldr	r1, [pc, #88]	@ (8015630 <netconn_recv_data+0x1bc>)
 80155d6:	4814      	ldr	r0, [pc, #80]	@ (8015628 <netconn_recv_data+0x1b4>)
 80155d8:	f014 fa00 	bl	80299dc <iprintf>
    len = netbuf_len((struct netbuf *)buf);
 80155dc:	69bb      	ldr	r3, [r7, #24]
 80155de:	681b      	ldr	r3, [r3, #0]
 80155e0:	891b      	ldrh	r3, [r3, #8]
 80155e2:	84fb      	strh	r3, [r7, #38]	@ 0x26
  }
#endif /* (LWIP_UDP || LWIP_RAW) */

#if LWIP_SO_RCVBUF
  SYS_ARCH_DEC(conn->recv_avail, len);
 80155e4:	f010 ff64 	bl	80264b0 <sys_arch_protect>
 80155e8:	6238      	str	r0, [r7, #32]
 80155ea:	68fb      	ldr	r3, [r7, #12]
 80155ec:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 80155ee:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 80155f0:	1ad2      	subs	r2, r2, r3
 80155f2:	68fb      	ldr	r3, [r7, #12]
 80155f4:	625a      	str	r2, [r3, #36]	@ 0x24
 80155f6:	6a38      	ldr	r0, [r7, #32]
 80155f8:	f010 ff68 	bl	80264cc <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
  /* Register event with callback */
  API_EVENT(conn, NETCONN_EVT_RCVMINUS, len);
 80155fc:	68fb      	ldr	r3, [r7, #12]
 80155fe:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015600:	2b00      	cmp	r3, #0
 8015602:	d005      	beq.n	8015610 <netconn_recv_data+0x19c>
 8015604:	68fb      	ldr	r3, [r7, #12]
 8015606:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015608:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 801560a:	2101      	movs	r1, #1
 801560c:	68f8      	ldr	r0, [r7, #12]
 801560e:	4798      	blx	r3

  LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_recv_data: received %p, len=%"U16_F"\n", buf, len));

  *new_buf = buf;
 8015610:	69ba      	ldr	r2, [r7, #24]
 8015612:	68bb      	ldr	r3, [r7, #8]
 8015614:	601a      	str	r2, [r3, #0]
  /* don't set conn->last_err: it's only ERR_OK, anyway */
  return ERR_OK;
 8015616:	2300      	movs	r3, #0
}
 8015618:	4618      	mov	r0, r3
 801561a:	3728      	adds	r7, #40	@ 0x28
 801561c:	46bd      	mov	sp, r7
 801561e:	bd80      	pop	{r7, pc}
 8015620:	0802cbcc 	.word	0x0802cbcc
 8015624:	0802cde4 	.word	0x0802cde4
 8015628:	0802cc24 	.word	0x0802cc24
 801562c:	0802ce04 	.word	0x0802ce04
 8015630:	0802ce20 	.word	0x0802ce20

08015634 <netconn_tcp_recvd_msg>:

#if LWIP_TCP
static err_t
netconn_tcp_recvd_msg(struct netconn *conn, size_t len, struct api_msg *msg)
{
 8015634:	b580      	push	{r7, lr}
 8015636:	b084      	sub	sp, #16
 8015638:	af00      	add	r7, sp, #0
 801563a:	60f8      	str	r0, [r7, #12]
 801563c:	60b9      	str	r1, [r7, #8]
 801563e:	607a      	str	r2, [r7, #4]
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 8015640:	68fb      	ldr	r3, [r7, #12]
 8015642:	2b00      	cmp	r3, #0
 8015644:	d005      	beq.n	8015652 <netconn_tcp_recvd_msg+0x1e>
 8015646:	68fb      	ldr	r3, [r7, #12]
 8015648:	781b      	ldrb	r3, [r3, #0]
 801564a:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801564e:	2b10      	cmp	r3, #16
 8015650:	d009      	beq.n	8015666 <netconn_tcp_recvd_msg+0x32>
 8015652:	4b0c      	ldr	r3, [pc, #48]	@ (8015684 <netconn_tcp_recvd_msg+0x50>)
 8015654:	f240 22a7 	movw	r2, #679	@ 0x2a7
 8015658:	490b      	ldr	r1, [pc, #44]	@ (8015688 <netconn_tcp_recvd_msg+0x54>)
 801565a:	480c      	ldr	r0, [pc, #48]	@ (801568c <netconn_tcp_recvd_msg+0x58>)
 801565c:	f014 f9be 	bl	80299dc <iprintf>
 8015660:	f06f 030f 	mvn.w	r3, #15
 8015664:	e00a      	b.n	801567c <netconn_tcp_recvd_msg+0x48>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  msg->conn = conn;
 8015666:	687b      	ldr	r3, [r7, #4]
 8015668:	68fa      	ldr	r2, [r7, #12]
 801566a:	601a      	str	r2, [r3, #0]
  msg->msg.r.len = len;
 801566c:	687b      	ldr	r3, [r7, #4]
 801566e:	68ba      	ldr	r2, [r7, #8]
 8015670:	609a      	str	r2, [r3, #8]

  return netconn_apimsg(lwip_netconn_do_recv, msg);
 8015672:	6879      	ldr	r1, [r7, #4]
 8015674:	4806      	ldr	r0, [pc, #24]	@ (8015690 <netconn_tcp_recvd_msg+0x5c>)
 8015676:	f7ff fd6f 	bl	8015158 <netconn_apimsg>
 801567a:	4603      	mov	r3, r0
}
 801567c:	4618      	mov	r0, r3
 801567e:	3710      	adds	r7, #16
 8015680:	46bd      	mov	sp, r7
 8015682:	bd80      	pop	{r7, pc}
 8015684:	0802cbcc 	.word	0x0802cbcc
 8015688:	0802ce2c 	.word	0x0802ce2c
 801568c:	0802cc24 	.word	0x0802cc24
 8015690:	08016da7 	.word	0x08016da7

08015694 <netconn_tcp_recvd>:

err_t
netconn_tcp_recvd(struct netconn *conn, size_t len)
{
 8015694:	b580      	push	{r7, lr}
 8015696:	b08c      	sub	sp, #48	@ 0x30
 8015698:	af00      	add	r7, sp, #0
 801569a:	6078      	str	r0, [r7, #4]
 801569c:	6039      	str	r1, [r7, #0]
  err_t err;
  API_MSG_VAR_DECLARE(msg);
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 801569e:	687b      	ldr	r3, [r7, #4]
 80156a0:	2b00      	cmp	r3, #0
 80156a2:	d005      	beq.n	80156b0 <netconn_tcp_recvd+0x1c>
 80156a4:	687b      	ldr	r3, [r7, #4]
 80156a6:	781b      	ldrb	r3, [r3, #0]
 80156a8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80156ac:	2b10      	cmp	r3, #16
 80156ae:	d009      	beq.n	80156c4 <netconn_tcp_recvd+0x30>
 80156b0:	4b0c      	ldr	r3, [pc, #48]	@ (80156e4 <netconn_tcp_recvd+0x50>)
 80156b2:	f240 22b5 	movw	r2, #693	@ 0x2b5
 80156b6:	490c      	ldr	r1, [pc, #48]	@ (80156e8 <netconn_tcp_recvd+0x54>)
 80156b8:	480c      	ldr	r0, [pc, #48]	@ (80156ec <netconn_tcp_recvd+0x58>)
 80156ba:	f014 f98f 	bl	80299dc <iprintf>
 80156be:	f06f 030f 	mvn.w	r3, #15
 80156c2:	e00b      	b.n	80156dc <netconn_tcp_recvd+0x48>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  API_MSG_VAR_ALLOC(msg);
  err = netconn_tcp_recvd_msg(conn, len, &API_VAR_REF(msg));
 80156c4:	f107 030c 	add.w	r3, r7, #12
 80156c8:	461a      	mov	r2, r3
 80156ca:	6839      	ldr	r1, [r7, #0]
 80156cc:	6878      	ldr	r0, [r7, #4]
 80156ce:	f7ff ffb1 	bl	8015634 <netconn_tcp_recvd_msg>
 80156d2:	4603      	mov	r3, r0
 80156d4:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);
  return err;
 80156d8:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 80156dc:	4618      	mov	r0, r3
 80156de:	3730      	adds	r7, #48	@ 0x30
 80156e0:	46bd      	mov	sp, r7
 80156e2:	bd80      	pop	{r7, pc}
 80156e4:	0802cbcc 	.word	0x0802cbcc
 80156e8:	0802ce2c 	.word	0x0802ce2c
 80156ec:	0802cc24 	.word	0x0802cc24

080156f0 <netconn_recv_data_tcp>:

static err_t
netconn_recv_data_tcp(struct netconn *conn, struct pbuf **new_buf, u8_t apiflags)
{
 80156f0:	b580      	push	{r7, lr}
 80156f2:	b090      	sub	sp, #64	@ 0x40
 80156f4:	af00      	add	r7, sp, #0
 80156f6:	60f8      	str	r0, [r7, #12]
 80156f8:	60b9      	str	r1, [r7, #8]
 80156fa:	4613      	mov	r3, r2
 80156fc:	71fb      	strb	r3, [r7, #7]
  API_MSG_VAR_DECLARE(msg);
#if LWIP_MPU_COMPATIBLE
  msg = NULL;
#endif

  if (!NETCONN_RECVMBOX_WAITABLE(conn)) {
 80156fe:	68fb      	ldr	r3, [r7, #12]
 8015700:	3310      	adds	r3, #16
 8015702:	4618      	mov	r0, r3
 8015704:	f010 fdca 	bl	802629c <sys_mbox_valid>
 8015708:	4603      	mov	r3, r0
 801570a:	2b00      	cmp	r3, #0
 801570c:	d102      	bne.n	8015714 <netconn_recv_data_tcp+0x24>
    /* This only happens when calling this function more than once *after* receiving FIN */
    return ERR_CONN;
 801570e:	f06f 030a 	mvn.w	r3, #10
 8015712:	e072      	b.n	80157fa <netconn_recv_data_tcp+0x10a>
  }
  if (netconn_is_flag_set(conn, NETCONN_FIN_RX_PENDING)) {
 8015714:	68fb      	ldr	r3, [r7, #12]
 8015716:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801571a:	b25b      	sxtb	r3, r3
 801571c:	2b00      	cmp	r3, #0
 801571e:	da09      	bge.n	8015734 <netconn_recv_data_tcp+0x44>
    netconn_clear_flags(conn, NETCONN_FIN_RX_PENDING);
 8015720:	68fb      	ldr	r3, [r7, #12]
 8015722:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015726:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 801572a:	b2da      	uxtb	r2, r3
 801572c:	68fb      	ldr	r3, [r7, #12]
 801572e:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
    goto handle_fin;
 8015732:	e03b      	b.n	80157ac <netconn_recv_data_tcp+0xbc>
    /* need to allocate API message here so empty message pool does not result in event loss
      * see bug #47512: MPU_COMPATIBLE may fail on empty pool */
    API_MSG_VAR_ALLOC(msg);
  }

  err = netconn_recv_data(conn, (void **)new_buf, apiflags);
 8015734:	79fb      	ldrb	r3, [r7, #7]
 8015736:	461a      	mov	r2, r3
 8015738:	68b9      	ldr	r1, [r7, #8]
 801573a:	68f8      	ldr	r0, [r7, #12]
 801573c:	f7ff fe9a 	bl	8015474 <netconn_recv_data>
 8015740:	4603      	mov	r3, r0
 8015742:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
  if (err != ERR_OK) {
 8015746:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 801574a:	2b00      	cmp	r3, #0
 801574c:	d002      	beq.n	8015754 <netconn_recv_data_tcp+0x64>
    if (!(apiflags & NETCONN_NOAUTORCVD)) {
      API_MSG_VAR_FREE(msg);
    }
    return err;
 801574e:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 8015752:	e052      	b.n	80157fa <netconn_recv_data_tcp+0x10a>
  }
  buf = *new_buf;
 8015754:	68bb      	ldr	r3, [r7, #8]
 8015756:	681b      	ldr	r3, [r3, #0]
 8015758:	63bb      	str	r3, [r7, #56]	@ 0x38
  if (!(apiflags & NETCONN_NOAUTORCVD)) {
 801575a:	79fb      	ldrb	r3, [r7, #7]
 801575c:	f003 0308 	and.w	r3, r3, #8
 8015760:	2b00      	cmp	r3, #0
 8015762:	d10e      	bne.n	8015782 <netconn_recv_data_tcp+0x92>
    /* Let the stack know that we have taken the data. */
    u16_t len = buf ? buf->tot_len : 1;
 8015764:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8015766:	2b00      	cmp	r3, #0
 8015768:	d002      	beq.n	8015770 <netconn_recv_data_tcp+0x80>
 801576a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801576c:	891b      	ldrh	r3, [r3, #8]
 801576e:	e000      	b.n	8015772 <netconn_recv_data_tcp+0x82>
 8015770:	2301      	movs	r3, #1
 8015772:	86fb      	strh	r3, [r7, #54]	@ 0x36
    /* don't care for the return value of lwip_netconn_do_recv */
    /* @todo: this should really be fixed, e.g. by retrying in poll on error */
    netconn_tcp_recvd_msg(conn, len,  &API_VAR_REF(msg));
 8015774:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 8015776:	f107 0214 	add.w	r2, r7, #20
 801577a:	4619      	mov	r1, r3
 801577c:	68f8      	ldr	r0, [r7, #12]
 801577e:	f7ff ff59 	bl	8015634 <netconn_tcp_recvd_msg>
    API_MSG_VAR_FREE(msg);
  }

  /* If we are closed, we indicate that we no longer wish to use the socket */
  if (buf == NULL) {
 8015782:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8015784:	2b00      	cmp	r3, #0
 8015786:	d136      	bne.n	80157f6 <netconn_recv_data_tcp+0x106>
    if (apiflags & NETCONN_NOFIN) {
 8015788:	79fb      	ldrb	r3, [r7, #7]
 801578a:	f003 0310 	and.w	r3, r3, #16
 801578e:	2b00      	cmp	r3, #0
 8015790:	d00b      	beq.n	80157aa <netconn_recv_data_tcp+0xba>
      /* received a FIN but the caller cannot handle it right now:
         re-enqueue it and return "no data" */
      netconn_set_flags(conn, NETCONN_FIN_RX_PENDING);
 8015792:	68fb      	ldr	r3, [r7, #12]
 8015794:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015798:	f063 037f 	orn	r3, r3, #127	@ 0x7f
 801579c:	b2da      	uxtb	r2, r3
 801579e:	68fb      	ldr	r3, [r7, #12]
 80157a0:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      return ERR_WOULDBLOCK;
 80157a4:	f06f 0306 	mvn.w	r3, #6
 80157a8:	e027      	b.n	80157fa <netconn_recv_data_tcp+0x10a>
    } else {
handle_fin:
 80157aa:	bf00      	nop
      API_EVENT(conn, NETCONN_EVT_RCVMINUS, 0);
 80157ac:	68fb      	ldr	r3, [r7, #12]
 80157ae:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80157b0:	2b00      	cmp	r3, #0
 80157b2:	d005      	beq.n	80157c0 <netconn_recv_data_tcp+0xd0>
 80157b4:	68fb      	ldr	r3, [r7, #12]
 80157b6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80157b8:	2200      	movs	r2, #0
 80157ba:	2101      	movs	r1, #1
 80157bc:	68f8      	ldr	r0, [r7, #12]
 80157be:	4798      	blx	r3
      if (conn->pcb.ip == NULL) {
 80157c0:	68fb      	ldr	r3, [r7, #12]
 80157c2:	685b      	ldr	r3, [r3, #4]
 80157c4:	2b00      	cmp	r3, #0
 80157c6:	d10f      	bne.n	80157e8 <netconn_recv_data_tcp+0xf8>
        /* race condition: RST during recv */
        err = netconn_err(conn);
 80157c8:	68f8      	ldr	r0, [r7, #12]
 80157ca:	f000 f9a3 	bl	8015b14 <netconn_err>
 80157ce:	4603      	mov	r3, r0
 80157d0:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
        if (err != ERR_OK) {
 80157d4:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 80157d8:	2b00      	cmp	r3, #0
 80157da:	d002      	beq.n	80157e2 <netconn_recv_data_tcp+0xf2>
          return err;
 80157dc:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 80157e0:	e00b      	b.n	80157fa <netconn_recv_data_tcp+0x10a>
        }
        return ERR_RST;
 80157e2:	f06f 030d 	mvn.w	r3, #13
 80157e6:	e008      	b.n	80157fa <netconn_recv_data_tcp+0x10a>
      }
      /* RX side is closed, so deallocate the recvmbox */
      netconn_close_shutdown(conn, NETCONN_SHUT_RD);
 80157e8:	2101      	movs	r1, #1
 80157ea:	68f8      	ldr	r0, [r7, #12]
 80157ec:	f000 f962 	bl	8015ab4 <netconn_close_shutdown>
      /* Don' store ERR_CLSD as conn->err since we are only half-closed */
      return ERR_CLSD;
 80157f0:	f06f 030e 	mvn.w	r3, #14
 80157f4:	e001      	b.n	80157fa <netconn_recv_data_tcp+0x10a>
    }
  }
  return err;
 80157f6:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
}
 80157fa:	4618      	mov	r0, r3
 80157fc:	3740      	adds	r7, #64	@ 0x40
 80157fe:	46bd      	mov	sp, r7
 8015800:	bd80      	pop	{r7, pc}
	...

08015804 <netconn_recv_tcp_pbuf_flags>:
 *                memory error or another error, @see netconn_recv_data)
 *         ERR_ARG if conn is not a TCP netconn
 */
err_t
netconn_recv_tcp_pbuf_flags(struct netconn *conn, struct pbuf **new_buf, u8_t apiflags)
{
 8015804:	b580      	push	{r7, lr}
 8015806:	b084      	sub	sp, #16
 8015808:	af00      	add	r7, sp, #0
 801580a:	60f8      	str	r0, [r7, #12]
 801580c:	60b9      	str	r1, [r7, #8]
 801580e:	4613      	mov	r3, r2
 8015810:	71fb      	strb	r3, [r7, #7]
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 8015812:	68fb      	ldr	r3, [r7, #12]
 8015814:	2b00      	cmp	r3, #0
 8015816:	d005      	beq.n	8015824 <netconn_recv_tcp_pbuf_flags+0x20>
 8015818:	68fb      	ldr	r3, [r7, #12]
 801581a:	781b      	ldrb	r3, [r3, #0]
 801581c:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8015820:	2b10      	cmp	r3, #16
 8015822:	d009      	beq.n	8015838 <netconn_recv_tcp_pbuf_flags+0x34>
 8015824:	4b0a      	ldr	r3, [pc, #40]	@ (8015850 <netconn_recv_tcp_pbuf_flags+0x4c>)
 8015826:	f240 3225 	movw	r2, #805	@ 0x325
 801582a:	490a      	ldr	r1, [pc, #40]	@ (8015854 <netconn_recv_tcp_pbuf_flags+0x50>)
 801582c:	480a      	ldr	r0, [pc, #40]	@ (8015858 <netconn_recv_tcp_pbuf_flags+0x54>)
 801582e:	f014 f8d5 	bl	80299dc <iprintf>
 8015832:	f06f 030f 	mvn.w	r3, #15
 8015836:	e006      	b.n	8015846 <netconn_recv_tcp_pbuf_flags+0x42>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  return netconn_recv_data_tcp(conn, new_buf, apiflags);
 8015838:	79fb      	ldrb	r3, [r7, #7]
 801583a:	461a      	mov	r2, r3
 801583c:	68b9      	ldr	r1, [r7, #8]
 801583e:	68f8      	ldr	r0, [r7, #12]
 8015840:	f7ff ff56 	bl	80156f0 <netconn_recv_data_tcp>
 8015844:	4603      	mov	r3, r0
}
 8015846:	4618      	mov	r0, r3
 8015848:	3710      	adds	r7, #16
 801584a:	46bd      	mov	sp, r7
 801584c:	bd80      	pop	{r7, pc}
 801584e:	bf00      	nop
 8015850:	0802cbcc 	.word	0x0802cbcc
 8015854:	0802ce2c 	.word	0x0802ce2c
 8015858:	0802cc24 	.word	0x0802cc24

0801585c <netconn_recv_udp_raw_netbuf_flags>:
 *                memory error or another error)
 *         ERR_ARG if conn is not a UDP/RAW netconn
 */
err_t
netconn_recv_udp_raw_netbuf_flags(struct netconn *conn, struct netbuf **new_buf, u8_t apiflags)
{
 801585c:	b580      	push	{r7, lr}
 801585e:	b084      	sub	sp, #16
 8015860:	af00      	add	r7, sp, #0
 8015862:	60f8      	str	r0, [r7, #12]
 8015864:	60b9      	str	r1, [r7, #8]
 8015866:	4613      	mov	r3, r2
 8015868:	71fb      	strb	r3, [r7, #7]
  LWIP_ERROR("netconn_recv_udp_raw_netbuf: invalid conn", (conn != NULL) &&
 801586a:	68fb      	ldr	r3, [r7, #12]
 801586c:	2b00      	cmp	r3, #0
 801586e:	d005      	beq.n	801587c <netconn_recv_udp_raw_netbuf_flags+0x20>
 8015870:	68fb      	ldr	r3, [r7, #12]
 8015872:	781b      	ldrb	r3, [r3, #0]
 8015874:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8015878:	2b10      	cmp	r3, #16
 801587a:	d109      	bne.n	8015890 <netconn_recv_udp_raw_netbuf_flags+0x34>
 801587c:	4b0a      	ldr	r3, [pc, #40]	@ (80158a8 <netconn_recv_udp_raw_netbuf_flags+0x4c>)
 801587e:	f44f 7253 	mov.w	r2, #844	@ 0x34c
 8015882:	490a      	ldr	r1, [pc, #40]	@ (80158ac <netconn_recv_udp_raw_netbuf_flags+0x50>)
 8015884:	480a      	ldr	r0, [pc, #40]	@ (80158b0 <netconn_recv_udp_raw_netbuf_flags+0x54>)
 8015886:	f014 f8a9 	bl	80299dc <iprintf>
 801588a:	f06f 030f 	mvn.w	r3, #15
 801588e:	e006      	b.n	801589e <netconn_recv_udp_raw_netbuf_flags+0x42>
             NETCONNTYPE_GROUP(netconn_type(conn)) != NETCONN_TCP, return ERR_ARG;);

  return netconn_recv_data(conn, (void **)new_buf, apiflags);
 8015890:	79fb      	ldrb	r3, [r7, #7]
 8015892:	461a      	mov	r2, r3
 8015894:	68b9      	ldr	r1, [r7, #8]
 8015896:	68f8      	ldr	r0, [r7, #12]
 8015898:	f7ff fdec 	bl	8015474 <netconn_recv_data>
 801589c:	4603      	mov	r3, r0
}
 801589e:	4618      	mov	r0, r3
 80158a0:	3710      	adds	r7, #16
 80158a2:	46bd      	mov	sp, r7
 80158a4:	bd80      	pop	{r7, pc}
 80158a6:	bf00      	nop
 80158a8:	0802cbcc 	.word	0x0802cbcc
 80158ac:	0802ce50 	.word	0x0802ce50
 80158b0:	0802cc24 	.word	0x0802cc24

080158b4 <netconn_send>:
 * @param buf a netbuf containing the data to send
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_send(struct netconn *conn, struct netbuf *buf)
{
 80158b4:	b580      	push	{r7, lr}
 80158b6:	b08c      	sub	sp, #48	@ 0x30
 80158b8:	af00      	add	r7, sp, #0
 80158ba:	6078      	str	r0, [r7, #4]
 80158bc:	6039      	str	r1, [r7, #0]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_send: invalid conn",  (conn != NULL), return ERR_ARG;);
 80158be:	687b      	ldr	r3, [r7, #4]
 80158c0:	2b00      	cmp	r3, #0
 80158c2:	d109      	bne.n	80158d8 <netconn_send+0x24>
 80158c4:	4b0e      	ldr	r3, [pc, #56]	@ (8015900 <netconn_send+0x4c>)
 80158c6:	f240 32b2 	movw	r2, #946	@ 0x3b2
 80158ca:	490e      	ldr	r1, [pc, #56]	@ (8015904 <netconn_send+0x50>)
 80158cc:	480e      	ldr	r0, [pc, #56]	@ (8015908 <netconn_send+0x54>)
 80158ce:	f014 f885 	bl	80299dc <iprintf>
 80158d2:	f06f 030f 	mvn.w	r3, #15
 80158d6:	e00e      	b.n	80158f6 <netconn_send+0x42>

  LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_send: sending %"U16_F" bytes\n", buf->p->tot_len));

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 80158d8:	687b      	ldr	r3, [r7, #4]
 80158da:	60fb      	str	r3, [r7, #12]
  API_MSG_VAR_REF(msg).msg.b = buf;
 80158dc:	683b      	ldr	r3, [r7, #0]
 80158de:	617b      	str	r3, [r7, #20]
  err = netconn_apimsg(lwip_netconn_do_send, &API_MSG_VAR_REF(msg));
 80158e0:	f107 030c 	add.w	r3, r7, #12
 80158e4:	4619      	mov	r1, r3
 80158e6:	4809      	ldr	r0, [pc, #36]	@ (801590c <netconn_send+0x58>)
 80158e8:	f7ff fc36 	bl	8015158 <netconn_apimsg>
 80158ec:	4603      	mov	r3, r0
 80158ee:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 80158f2:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 80158f6:	4618      	mov	r0, r3
 80158f8:	3730      	adds	r7, #48	@ 0x30
 80158fa:	46bd      	mov	sp, r7
 80158fc:	bd80      	pop	{r7, pc}
 80158fe:	bf00      	nop
 8015900:	0802cbcc 	.word	0x0802cbcc
 8015904:	0802ce88 	.word	0x0802ce88
 8015908:	0802cc24 	.word	0x0802cc24
 801590c:	08016d0d 	.word	0x08016d0d

08015910 <netconn_write_partly>:
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_write_partly(struct netconn *conn, const void *dataptr, size_t size,
                     u8_t apiflags, size_t *bytes_written)
{
 8015910:	b580      	push	{r7, lr}
 8015912:	b088      	sub	sp, #32
 8015914:	af02      	add	r7, sp, #8
 8015916:	60f8      	str	r0, [r7, #12]
 8015918:	60b9      	str	r1, [r7, #8]
 801591a:	607a      	str	r2, [r7, #4]
 801591c:	70fb      	strb	r3, [r7, #3]
  struct netvector vector;
  vector.ptr = dataptr;
 801591e:	68bb      	ldr	r3, [r7, #8]
 8015920:	613b      	str	r3, [r7, #16]
  vector.len = size;
 8015922:	687b      	ldr	r3, [r7, #4]
 8015924:	617b      	str	r3, [r7, #20]
  return netconn_write_vectors_partly(conn, &vector, 1, apiflags, bytes_written);
 8015926:	78fa      	ldrb	r2, [r7, #3]
 8015928:	f107 0110 	add.w	r1, r7, #16
 801592c:	6a3b      	ldr	r3, [r7, #32]
 801592e:	9300      	str	r3, [sp, #0]
 8015930:	4613      	mov	r3, r2
 8015932:	2201      	movs	r2, #1
 8015934:	68f8      	ldr	r0, [r7, #12]
 8015936:	f000 f805 	bl	8015944 <netconn_write_vectors_partly>
 801593a:	4603      	mov	r3, r0
}
 801593c:	4618      	mov	r0, r3
 801593e:	3718      	adds	r7, #24
 8015940:	46bd      	mov	sp, r7
 8015942:	bd80      	pop	{r7, pc}

08015944 <netconn_write_vectors_partly>:
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_write_vectors_partly(struct netconn *conn, struct netvector *vectors, u16_t vectorcnt,
                             u8_t apiflags, size_t *bytes_written)
{
 8015944:	b580      	push	{r7, lr}
 8015946:	b092      	sub	sp, #72	@ 0x48
 8015948:	af00      	add	r7, sp, #0
 801594a:	60f8      	str	r0, [r7, #12]
 801594c:	60b9      	str	r1, [r7, #8]
 801594e:	4611      	mov	r1, r2
 8015950:	461a      	mov	r2, r3
 8015952:	460b      	mov	r3, r1
 8015954:	80fb      	strh	r3, [r7, #6]
 8015956:	4613      	mov	r3, r2
 8015958:	717b      	strb	r3, [r7, #5]
  err_t err;
  u8_t dontblock;
  size_t size;
  int i;

  LWIP_ERROR("netconn_write: invalid conn",  (conn != NULL), return ERR_ARG;);
 801595a:	68fb      	ldr	r3, [r7, #12]
 801595c:	2b00      	cmp	r3, #0
 801595e:	d109      	bne.n	8015974 <netconn_write_vectors_partly+0x30>
 8015960:	4b4e      	ldr	r3, [pc, #312]	@ (8015a9c <netconn_write_vectors_partly+0x158>)
 8015962:	f240 32ee 	movw	r2, #1006	@ 0x3ee
 8015966:	494e      	ldr	r1, [pc, #312]	@ (8015aa0 <netconn_write_vectors_partly+0x15c>)
 8015968:	484e      	ldr	r0, [pc, #312]	@ (8015aa4 <netconn_write_vectors_partly+0x160>)
 801596a:	f014 f837 	bl	80299dc <iprintf>
 801596e:	f06f 030f 	mvn.w	r3, #15
 8015972:	e08f      	b.n	8015a94 <netconn_write_vectors_partly+0x150>
  LWIP_ERROR("netconn_write: invalid conn->type",  (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP), return ERR_VAL;);
 8015974:	68fb      	ldr	r3, [r7, #12]
 8015976:	781b      	ldrb	r3, [r3, #0]
 8015978:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801597c:	2b10      	cmp	r3, #16
 801597e:	d009      	beq.n	8015994 <netconn_write_vectors_partly+0x50>
 8015980:	4b46      	ldr	r3, [pc, #280]	@ (8015a9c <netconn_write_vectors_partly+0x158>)
 8015982:	f240 32ef 	movw	r2, #1007	@ 0x3ef
 8015986:	4948      	ldr	r1, [pc, #288]	@ (8015aa8 <netconn_write_vectors_partly+0x164>)
 8015988:	4846      	ldr	r0, [pc, #280]	@ (8015aa4 <netconn_write_vectors_partly+0x160>)
 801598a:	f014 f827 	bl	80299dc <iprintf>
 801598e:	f06f 0305 	mvn.w	r3, #5
 8015992:	e07f      	b.n	8015a94 <netconn_write_vectors_partly+0x150>
  dontblock = netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK);
 8015994:	68fb      	ldr	r3, [r7, #12]
 8015996:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801599a:	f003 0302 	and.w	r3, r3, #2
 801599e:	2b00      	cmp	r3, #0
 80159a0:	d104      	bne.n	80159ac <netconn_write_vectors_partly+0x68>
 80159a2:	797b      	ldrb	r3, [r7, #5]
 80159a4:	f003 0304 	and.w	r3, r3, #4
 80159a8:	2b00      	cmp	r3, #0
 80159aa:	d001      	beq.n	80159b0 <netconn_write_vectors_partly+0x6c>
 80159ac:	2301      	movs	r3, #1
 80159ae:	e000      	b.n	80159b2 <netconn_write_vectors_partly+0x6e>
 80159b0:	2300      	movs	r3, #0
 80159b2:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
#if LWIP_SO_SNDTIMEO
  if (conn->send_timeout != 0) {
    dontblock = 1;
  }
#endif /* LWIP_SO_SNDTIMEO */
  if (dontblock && !bytes_written) {
 80159b6:	f897 303f 	ldrb.w	r3, [r7, #63]	@ 0x3f
 80159ba:	2b00      	cmp	r3, #0
 80159bc:	d005      	beq.n	80159ca <netconn_write_vectors_partly+0x86>
 80159be:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80159c0:	2b00      	cmp	r3, #0
 80159c2:	d102      	bne.n	80159ca <netconn_write_vectors_partly+0x86>
    /* This implies netconn_write() cannot be used for non-blocking send, since
       it has no way to return the number of bytes written. */
    return ERR_VAL;
 80159c4:	f06f 0305 	mvn.w	r3, #5
 80159c8:	e064      	b.n	8015a94 <netconn_write_vectors_partly+0x150>
  }

  /* sum up the total size */
  size = 0;
 80159ca:	2300      	movs	r3, #0
 80159cc:	647b      	str	r3, [r7, #68]	@ 0x44
  for (i = 0; i < vectorcnt; i++) {
 80159ce:	2300      	movs	r3, #0
 80159d0:	643b      	str	r3, [r7, #64]	@ 0x40
 80159d2:	e015      	b.n	8015a00 <netconn_write_vectors_partly+0xbc>
    size += vectors[i].len;
 80159d4:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80159d6:	00db      	lsls	r3, r3, #3
 80159d8:	68ba      	ldr	r2, [r7, #8]
 80159da:	4413      	add	r3, r2
 80159dc:	685b      	ldr	r3, [r3, #4]
 80159de:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 80159e0:	4413      	add	r3, r2
 80159e2:	647b      	str	r3, [r7, #68]	@ 0x44
    if (size < vectors[i].len) {
 80159e4:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80159e6:	00db      	lsls	r3, r3, #3
 80159e8:	68ba      	ldr	r2, [r7, #8]
 80159ea:	4413      	add	r3, r2
 80159ec:	685b      	ldr	r3, [r3, #4]
 80159ee:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 80159f0:	429a      	cmp	r2, r3
 80159f2:	d202      	bcs.n	80159fa <netconn_write_vectors_partly+0xb6>
      /* overflow */
      return ERR_VAL;
 80159f4:	f06f 0305 	mvn.w	r3, #5
 80159f8:	e04c      	b.n	8015a94 <netconn_write_vectors_partly+0x150>
  for (i = 0; i < vectorcnt; i++) {
 80159fa:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80159fc:	3301      	adds	r3, #1
 80159fe:	643b      	str	r3, [r7, #64]	@ 0x40
 8015a00:	88fb      	ldrh	r3, [r7, #6]
 8015a02:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8015a04:	429a      	cmp	r2, r3
 8015a06:	dbe5      	blt.n	80159d4 <netconn_write_vectors_partly+0x90>
    }
  }
  if (size == 0) {
 8015a08:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8015a0a:	2b00      	cmp	r3, #0
 8015a0c:	d101      	bne.n	8015a12 <netconn_write_vectors_partly+0xce>
    return ERR_OK;
 8015a0e:	2300      	movs	r3, #0
 8015a10:	e040      	b.n	8015a94 <netconn_write_vectors_partly+0x150>
  } else if (size > SSIZE_MAX) {
 8015a12:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8015a14:	2b00      	cmp	r3, #0
 8015a16:	da0a      	bge.n	8015a2e <netconn_write_vectors_partly+0xea>
    ssize_t limited;
    /* this is required by the socket layer (cannot send full size_t range) */
    if (!bytes_written) {
 8015a18:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8015a1a:	2b00      	cmp	r3, #0
 8015a1c:	d102      	bne.n	8015a24 <netconn_write_vectors_partly+0xe0>
      return ERR_VAL;
 8015a1e:	f06f 0305 	mvn.w	r3, #5
 8015a22:	e037      	b.n	8015a94 <netconn_write_vectors_partly+0x150>
    }
    /* limit the amount of data to send */
    limited = SSIZE_MAX;
 8015a24:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 8015a28:	63bb      	str	r3, [r7, #56]	@ 0x38
    size = (size_t)limited;
 8015a2a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8015a2c:	647b      	str	r3, [r7, #68]	@ 0x44
  }

  API_MSG_VAR_ALLOC(msg);
  /* non-blocking write sends as much  */
  API_MSG_VAR_REF(msg).conn = conn;
 8015a2e:	68fb      	ldr	r3, [r7, #12]
 8015a30:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.w.vector = vectors;
 8015a32:	68bb      	ldr	r3, [r7, #8]
 8015a34:	61fb      	str	r3, [r7, #28]
  API_MSG_VAR_REF(msg).msg.w.vector_cnt = vectorcnt;
 8015a36:	88fb      	ldrh	r3, [r7, #6]
 8015a38:	843b      	strh	r3, [r7, #32]
  API_MSG_VAR_REF(msg).msg.w.vector_off = 0;
 8015a3a:	2300      	movs	r3, #0
 8015a3c:	627b      	str	r3, [r7, #36]	@ 0x24
  API_MSG_VAR_REF(msg).msg.w.apiflags = apiflags;
 8015a3e:	797b      	ldrb	r3, [r7, #5]
 8015a40:	f887 3030 	strb.w	r3, [r7, #48]	@ 0x30
  API_MSG_VAR_REF(msg).msg.w.len = size;
 8015a44:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8015a46:	62bb      	str	r3, [r7, #40]	@ 0x28
  API_MSG_VAR_REF(msg).msg.w.offset = 0;
 8015a48:	2300      	movs	r3, #0
 8015a4a:	62fb      	str	r3, [r7, #44]	@ 0x2c
#endif /* LWIP_SO_SNDTIMEO */

  /* For locking the core: this _can_ be delayed on low memory/low send buffer,
     but if it is, this is done inside api_msg.c:do_write(), so we can use the
     non-blocking version here. */
  err = netconn_apimsg(lwip_netconn_do_write, &API_MSG_VAR_REF(msg));
 8015a4c:	f107 0314 	add.w	r3, r7, #20
 8015a50:	4619      	mov	r1, r3
 8015a52:	4816      	ldr	r0, [pc, #88]	@ (8015aac <netconn_write_vectors_partly+0x168>)
 8015a54:	f7ff fb80 	bl	8015158 <netconn_apimsg>
 8015a58:	4603      	mov	r3, r0
 8015a5a:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
  if (err == ERR_OK) {
 8015a5e:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
 8015a62:	2b00      	cmp	r3, #0
 8015a64:	d114      	bne.n	8015a90 <netconn_write_vectors_partly+0x14c>
    if (bytes_written != NULL) {
 8015a66:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8015a68:	2b00      	cmp	r3, #0
 8015a6a:	d002      	beq.n	8015a72 <netconn_write_vectors_partly+0x12e>
      *bytes_written = API_MSG_VAR_REF(msg).msg.w.offset;
 8015a6c:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8015a6e:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8015a70:	601a      	str	r2, [r3, #0]
    }
    /* for blocking, check all requested bytes were written, NOTE: send_timeout is
       treated as dontblock (see dontblock assignment above) */
    if (!dontblock) {
 8015a72:	f897 303f 	ldrb.w	r3, [r7, #63]	@ 0x3f
 8015a76:	2b00      	cmp	r3, #0
 8015a78:	d10a      	bne.n	8015a90 <netconn_write_vectors_partly+0x14c>
      LWIP_ASSERT("do_write failed to write all bytes", API_MSG_VAR_REF(msg).msg.w.offset == size);
 8015a7a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015a7c:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8015a7e:	429a      	cmp	r2, r3
 8015a80:	d006      	beq.n	8015a90 <netconn_write_vectors_partly+0x14c>
 8015a82:	4b06      	ldr	r3, [pc, #24]	@ (8015a9c <netconn_write_vectors_partly+0x158>)
 8015a84:	f44f 6286 	mov.w	r2, #1072	@ 0x430
 8015a88:	4909      	ldr	r1, [pc, #36]	@ (8015ab0 <netconn_write_vectors_partly+0x16c>)
 8015a8a:	4806      	ldr	r0, [pc, #24]	@ (8015aa4 <netconn_write_vectors_partly+0x160>)
 8015a8c:	f013 ffa6 	bl	80299dc <iprintf>
    }
  }
  API_MSG_VAR_FREE(msg);

  return err;
 8015a90:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 8015a94:	4618      	mov	r0, r3
 8015a96:	3748      	adds	r7, #72	@ 0x48
 8015a98:	46bd      	mov	sp, r7
 8015a9a:	bd80      	pop	{r7, pc}
 8015a9c:	0802cbcc 	.word	0x0802cbcc
 8015aa0:	0802cea4 	.word	0x0802cea4
 8015aa4:	0802cc24 	.word	0x0802cc24
 8015aa8:	0802cec0 	.word	0x0802cec0
 8015aac:	080171b1 	.word	0x080171b1
 8015ab0:	0802cee4 	.word	0x0802cee4

08015ab4 <netconn_close_shutdown>:
 * @param how fully close or only shutdown one side?
 * @return ERR_OK if the netconn was closed, any other err_t on error
 */
static err_t
netconn_close_shutdown(struct netconn *conn, u8_t how)
{
 8015ab4:	b580      	push	{r7, lr}
 8015ab6:	b08c      	sub	sp, #48	@ 0x30
 8015ab8:	af00      	add	r7, sp, #0
 8015aba:	6078      	str	r0, [r7, #4]
 8015abc:	460b      	mov	r3, r1
 8015abe:	70fb      	strb	r3, [r7, #3]
  API_MSG_VAR_DECLARE(msg);
  err_t err;
  LWIP_UNUSED_ARG(how);

  LWIP_ERROR("netconn_close: invalid conn",  (conn != NULL), return ERR_ARG;);
 8015ac0:	687b      	ldr	r3, [r7, #4]
 8015ac2:	2b00      	cmp	r3, #0
 8015ac4:	d109      	bne.n	8015ada <netconn_close_shutdown+0x26>
 8015ac6:	4b0f      	ldr	r3, [pc, #60]	@ (8015b04 <netconn_close_shutdown+0x50>)
 8015ac8:	f240 4247 	movw	r2, #1095	@ 0x447
 8015acc:	490e      	ldr	r1, [pc, #56]	@ (8015b08 <netconn_close_shutdown+0x54>)
 8015ace:	480f      	ldr	r0, [pc, #60]	@ (8015b0c <netconn_close_shutdown+0x58>)
 8015ad0:	f013 ff84 	bl	80299dc <iprintf>
 8015ad4:	f06f 030f 	mvn.w	r3, #15
 8015ad8:	e010      	b.n	8015afc <netconn_close_shutdown+0x48>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8015ada:	687b      	ldr	r3, [r7, #4]
 8015adc:	60fb      	str	r3, [r7, #12]
#if LWIP_TCP
  /* shutting down both ends is the same as closing */
  API_MSG_VAR_REF(msg).msg.sd.shut = how;
 8015ade:	78fb      	ldrb	r3, [r7, #3]
 8015ae0:	753b      	strb	r3, [r7, #20]
#if LWIP_SO_SNDTIMEO || LWIP_SO_LINGER
  /* get the time we started, which is later compared to
     sys_now() + conn->send_timeout */
  API_MSG_VAR_REF(msg).msg.sd.time_started = sys_now();
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
  API_MSG_VAR_REF(msg).msg.sd.polls_left =
 8015ae2:	2329      	movs	r3, #41	@ 0x29
 8015ae4:	757b      	strb	r3, [r7, #21]
    ((LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT + TCP_SLOW_INTERVAL - 1) / TCP_SLOW_INTERVAL) + 1;
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
#endif /* LWIP_TCP */
  err = netconn_apimsg(lwip_netconn_do_close, &API_MSG_VAR_REF(msg));
 8015ae6:	f107 030c 	add.w	r3, r7, #12
 8015aea:	4619      	mov	r1, r3
 8015aec:	4808      	ldr	r0, [pc, #32]	@ (8015b10 <netconn_close_shutdown+0x5c>)
 8015aee:	f7ff fb33 	bl	8015158 <netconn_apimsg>
 8015af2:	4603      	mov	r3, r0
 8015af4:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 8015af8:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 8015afc:	4618      	mov	r0, r3
 8015afe:	3730      	adds	r7, #48	@ 0x30
 8015b00:	46bd      	mov	sp, r7
 8015b02:	bd80      	pop	{r7, pc}
 8015b04:	0802cbcc 	.word	0x0802cbcc
 8015b08:	0802cf08 	.word	0x0802cf08
 8015b0c:	0802cc24 	.word	0x0802cc24
 8015b10:	080173cd 	.word	0x080173cd

08015b14 <netconn_err>:
 * @param conn the netconn to get the error from
 * @return and pending error or ERR_OK if no error was pending
 */
err_t
netconn_err(struct netconn *conn)
{
 8015b14:	b580      	push	{r7, lr}
 8015b16:	b084      	sub	sp, #16
 8015b18:	af00      	add	r7, sp, #0
 8015b1a:	6078      	str	r0, [r7, #4]
  err_t err;
  SYS_ARCH_DECL_PROTECT(lev);
  if (conn == NULL) {
 8015b1c:	687b      	ldr	r3, [r7, #4]
 8015b1e:	2b00      	cmp	r3, #0
 8015b20:	d101      	bne.n	8015b26 <netconn_err+0x12>
    return ERR_OK;
 8015b22:	2300      	movs	r3, #0
 8015b24:	e00d      	b.n	8015b42 <netconn_err+0x2e>
  }
  SYS_ARCH_PROTECT(lev);
 8015b26:	f010 fcc3 	bl	80264b0 <sys_arch_protect>
 8015b2a:	60f8      	str	r0, [r7, #12]
  err = conn->pending_err;
 8015b2c:	687b      	ldr	r3, [r7, #4]
 8015b2e:	7a1b      	ldrb	r3, [r3, #8]
 8015b30:	72fb      	strb	r3, [r7, #11]
  conn->pending_err = ERR_OK;
 8015b32:	687b      	ldr	r3, [r7, #4]
 8015b34:	2200      	movs	r2, #0
 8015b36:	721a      	strb	r2, [r3, #8]
  SYS_ARCH_UNPROTECT(lev);
 8015b38:	68f8      	ldr	r0, [r7, #12]
 8015b3a:	f010 fcc7 	bl	80264cc <sys_arch_unprotect>
  return err;
 8015b3e:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 8015b42:	4618      	mov	r0, r3
 8015b44:	3710      	adds	r7, #16
 8015b46:	46bd      	mov	sp, r7
 8015b48:	bd80      	pop	{r7, pc}
	...

08015b4c <lwip_netconn_err_to_msg>:
const u8_t netconn_closed = 0;

/** Translate an error to a unique void* passed via an mbox */
static void *
lwip_netconn_err_to_msg(err_t err)
{
 8015b4c:	b580      	push	{r7, lr}
 8015b4e:	b082      	sub	sp, #8
 8015b50:	af00      	add	r7, sp, #0
 8015b52:	4603      	mov	r3, r0
 8015b54:	71fb      	strb	r3, [r7, #7]
  switch (err) {
 8015b56:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8015b5a:	f113 0f0d 	cmn.w	r3, #13
 8015b5e:	d009      	beq.n	8015b74 <lwip_netconn_err_to_msg+0x28>
 8015b60:	f113 0f0d 	cmn.w	r3, #13
 8015b64:	dc0c      	bgt.n	8015b80 <lwip_netconn_err_to_msg+0x34>
 8015b66:	f113 0f0f 	cmn.w	r3, #15
 8015b6a:	d007      	beq.n	8015b7c <lwip_netconn_err_to_msg+0x30>
 8015b6c:	f113 0f0e 	cmn.w	r3, #14
 8015b70:	d002      	beq.n	8015b78 <lwip_netconn_err_to_msg+0x2c>
 8015b72:	e005      	b.n	8015b80 <lwip_netconn_err_to_msg+0x34>
    case ERR_ABRT:
      return LWIP_CONST_CAST(void *, &netconn_aborted);
 8015b74:	4b0a      	ldr	r3, [pc, #40]	@ (8015ba0 <lwip_netconn_err_to_msg+0x54>)
 8015b76:	e00e      	b.n	8015b96 <lwip_netconn_err_to_msg+0x4a>
    case ERR_RST:
      return LWIP_CONST_CAST(void *, &netconn_reset);
 8015b78:	4b0a      	ldr	r3, [pc, #40]	@ (8015ba4 <lwip_netconn_err_to_msg+0x58>)
 8015b7a:	e00c      	b.n	8015b96 <lwip_netconn_err_to_msg+0x4a>
    case ERR_CLSD:
      return LWIP_CONST_CAST(void *, &netconn_closed);
 8015b7c:	4b0a      	ldr	r3, [pc, #40]	@ (8015ba8 <lwip_netconn_err_to_msg+0x5c>)
 8015b7e:	e00a      	b.n	8015b96 <lwip_netconn_err_to_msg+0x4a>
    default:
      LWIP_ASSERT("unhandled error", err == ERR_OK);
 8015b80:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8015b84:	2b00      	cmp	r3, #0
 8015b86:	d005      	beq.n	8015b94 <lwip_netconn_err_to_msg+0x48>
 8015b88:	4b08      	ldr	r3, [pc, #32]	@ (8015bac <lwip_netconn_err_to_msg+0x60>)
 8015b8a:	227d      	movs	r2, #125	@ 0x7d
 8015b8c:	4908      	ldr	r1, [pc, #32]	@ (8015bb0 <lwip_netconn_err_to_msg+0x64>)
 8015b8e:	4809      	ldr	r0, [pc, #36]	@ (8015bb4 <lwip_netconn_err_to_msg+0x68>)
 8015b90:	f013 ff24 	bl	80299dc <iprintf>
      return NULL;
 8015b94:	2300      	movs	r3, #0
  }
}
 8015b96:	4618      	mov	r0, r3
 8015b98:	3708      	adds	r7, #8
 8015b9a:	46bd      	mov	sp, r7
 8015b9c:	bd80      	pop	{r7, pc}
 8015b9e:	bf00      	nop
 8015ba0:	08030acc 	.word	0x08030acc
 8015ba4:	08030acd 	.word	0x08030acd
 8015ba8:	08030ace 	.word	0x08030ace
 8015bac:	0802cf24 	.word	0x0802cf24
 8015bb0:	0802cf58 	.word	0x0802cf58
 8015bb4:	0802cf68 	.word	0x0802cf68

08015bb8 <lwip_netconn_is_err_msg>:

int
lwip_netconn_is_err_msg(void *msg, err_t *err)
{
 8015bb8:	b580      	push	{r7, lr}
 8015bba:	b082      	sub	sp, #8
 8015bbc:	af00      	add	r7, sp, #0
 8015bbe:	6078      	str	r0, [r7, #4]
 8015bc0:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("err != NULL", err != NULL);
 8015bc2:	683b      	ldr	r3, [r7, #0]
 8015bc4:	2b00      	cmp	r3, #0
 8015bc6:	d105      	bne.n	8015bd4 <lwip_netconn_is_err_msg+0x1c>
 8015bc8:	4b12      	ldr	r3, [pc, #72]	@ (8015c14 <lwip_netconn_is_err_msg+0x5c>)
 8015bca:	2285      	movs	r2, #133	@ 0x85
 8015bcc:	4912      	ldr	r1, [pc, #72]	@ (8015c18 <lwip_netconn_is_err_msg+0x60>)
 8015bce:	4813      	ldr	r0, [pc, #76]	@ (8015c1c <lwip_netconn_is_err_msg+0x64>)
 8015bd0:	f013 ff04 	bl	80299dc <iprintf>

  if (msg == &netconn_aborted) {
 8015bd4:	687b      	ldr	r3, [r7, #4]
 8015bd6:	4a12      	ldr	r2, [pc, #72]	@ (8015c20 <lwip_netconn_is_err_msg+0x68>)
 8015bd8:	4293      	cmp	r3, r2
 8015bda:	d104      	bne.n	8015be6 <lwip_netconn_is_err_msg+0x2e>
    *err = ERR_ABRT;
 8015bdc:	683b      	ldr	r3, [r7, #0]
 8015bde:	22f3      	movs	r2, #243	@ 0xf3
 8015be0:	701a      	strb	r2, [r3, #0]
    return 1;
 8015be2:	2301      	movs	r3, #1
 8015be4:	e012      	b.n	8015c0c <lwip_netconn_is_err_msg+0x54>
  } else if (msg == &netconn_reset) {
 8015be6:	687b      	ldr	r3, [r7, #4]
 8015be8:	4a0e      	ldr	r2, [pc, #56]	@ (8015c24 <lwip_netconn_is_err_msg+0x6c>)
 8015bea:	4293      	cmp	r3, r2
 8015bec:	d104      	bne.n	8015bf8 <lwip_netconn_is_err_msg+0x40>
    *err = ERR_RST;
 8015bee:	683b      	ldr	r3, [r7, #0]
 8015bf0:	22f2      	movs	r2, #242	@ 0xf2
 8015bf2:	701a      	strb	r2, [r3, #0]
    return 1;
 8015bf4:	2301      	movs	r3, #1
 8015bf6:	e009      	b.n	8015c0c <lwip_netconn_is_err_msg+0x54>
  } else if (msg == &netconn_closed) {
 8015bf8:	687b      	ldr	r3, [r7, #4]
 8015bfa:	4a0b      	ldr	r2, [pc, #44]	@ (8015c28 <lwip_netconn_is_err_msg+0x70>)
 8015bfc:	4293      	cmp	r3, r2
 8015bfe:	d104      	bne.n	8015c0a <lwip_netconn_is_err_msg+0x52>
    *err = ERR_CLSD;
 8015c00:	683b      	ldr	r3, [r7, #0]
 8015c02:	22f1      	movs	r2, #241	@ 0xf1
 8015c04:	701a      	strb	r2, [r3, #0]
    return 1;
 8015c06:	2301      	movs	r3, #1
 8015c08:	e000      	b.n	8015c0c <lwip_netconn_is_err_msg+0x54>
  }
  return 0;
 8015c0a:	2300      	movs	r3, #0
}
 8015c0c:	4618      	mov	r0, r3
 8015c0e:	3708      	adds	r7, #8
 8015c10:	46bd      	mov	sp, r7
 8015c12:	bd80      	pop	{r7, pc}
 8015c14:	0802cf24 	.word	0x0802cf24
 8015c18:	0802cf90 	.word	0x0802cf90
 8015c1c:	0802cf68 	.word	0x0802cf68
 8015c20:	08030acc 	.word	0x08030acc
 8015c24:	08030acd 	.word	0x08030acd
 8015c28:	08030ace 	.word	0x08030ace

08015c2c <recv_udp>:
 * @see udp.h (struct udp_pcb.recv) for parameters
 */
static void
recv_udp(void *arg, struct udp_pcb *pcb, struct pbuf *p,
         const ip_addr_t *addr, u16_t port)
{
 8015c2c:	b580      	push	{r7, lr}
 8015c2e:	b08a      	sub	sp, #40	@ 0x28
 8015c30:	af00      	add	r7, sp, #0
 8015c32:	60f8      	str	r0, [r7, #12]
 8015c34:	60b9      	str	r1, [r7, #8]
 8015c36:	607a      	str	r2, [r7, #4]
 8015c38:	603b      	str	r3, [r7, #0]
#if LWIP_SO_RCVBUF
  int recv_avail;
#endif /* LWIP_SO_RCVBUF */

  LWIP_UNUSED_ARG(pcb); /* only used for asserts... */
  LWIP_ASSERT("recv_udp must have a pcb argument", pcb != NULL);
 8015c3a:	68bb      	ldr	r3, [r7, #8]
 8015c3c:	2b00      	cmp	r3, #0
 8015c3e:	d105      	bne.n	8015c4c <recv_udp+0x20>
 8015c40:	4b43      	ldr	r3, [pc, #268]	@ (8015d50 <recv_udp+0x124>)
 8015c42:	22e5      	movs	r2, #229	@ 0xe5
 8015c44:	4943      	ldr	r1, [pc, #268]	@ (8015d54 <recv_udp+0x128>)
 8015c46:	4844      	ldr	r0, [pc, #272]	@ (8015d58 <recv_udp+0x12c>)
 8015c48:	f013 fec8 	bl	80299dc <iprintf>
  LWIP_ASSERT("recv_udp must have an argument", arg != NULL);
 8015c4c:	68fb      	ldr	r3, [r7, #12]
 8015c4e:	2b00      	cmp	r3, #0
 8015c50:	d105      	bne.n	8015c5e <recv_udp+0x32>
 8015c52:	4b3f      	ldr	r3, [pc, #252]	@ (8015d50 <recv_udp+0x124>)
 8015c54:	22e6      	movs	r2, #230	@ 0xe6
 8015c56:	4941      	ldr	r1, [pc, #260]	@ (8015d5c <recv_udp+0x130>)
 8015c58:	483f      	ldr	r0, [pc, #252]	@ (8015d58 <recv_udp+0x12c>)
 8015c5a:	f013 febf 	bl	80299dc <iprintf>
  conn = (struct netconn *)arg;
 8015c5e:	68fb      	ldr	r3, [r7, #12]
 8015c60:	627b      	str	r3, [r7, #36]	@ 0x24

  if (conn == NULL) {
 8015c62:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015c64:	2b00      	cmp	r3, #0
 8015c66:	d103      	bne.n	8015c70 <recv_udp+0x44>
    pbuf_free(p);
 8015c68:	6878      	ldr	r0, [r7, #4]
 8015c6a:	f004 fc3f 	bl	801a4ec <pbuf_free>
    return;
 8015c6e:	e06b      	b.n	8015d48 <recv_udp+0x11c>
  }

  LWIP_ASSERT("recv_udp: recv for wrong pcb!", conn->pcb.udp == pcb);
 8015c70:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015c72:	685b      	ldr	r3, [r3, #4]
 8015c74:	68ba      	ldr	r2, [r7, #8]
 8015c76:	429a      	cmp	r2, r3
 8015c78:	d005      	beq.n	8015c86 <recv_udp+0x5a>
 8015c7a:	4b35      	ldr	r3, [pc, #212]	@ (8015d50 <recv_udp+0x124>)
 8015c7c:	22ee      	movs	r2, #238	@ 0xee
 8015c7e:	4938      	ldr	r1, [pc, #224]	@ (8015d60 <recv_udp+0x134>)
 8015c80:	4835      	ldr	r0, [pc, #212]	@ (8015d58 <recv_udp+0x12c>)
 8015c82:	f013 feab 	bl	80299dc <iprintf>

#if LWIP_SO_RCVBUF
  SYS_ARCH_GET(conn->recv_avail, recv_avail);
 8015c86:	f010 fc13 	bl	80264b0 <sys_arch_protect>
 8015c8a:	6238      	str	r0, [r7, #32]
 8015c8c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015c8e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8015c90:	61fb      	str	r3, [r7, #28]
 8015c92:	6a38      	ldr	r0, [r7, #32]
 8015c94:	f010 fc1a 	bl	80264cc <sys_arch_unprotect>
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox) ||
 8015c98:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015c9a:	3310      	adds	r3, #16
 8015c9c:	4618      	mov	r0, r3
 8015c9e:	f010 fafd 	bl	802629c <sys_mbox_valid>
 8015ca2:	4603      	mov	r3, r0
 8015ca4:	2b00      	cmp	r3, #0
 8015ca6:	d008      	beq.n	8015cba <recv_udp+0x8e>
      ((recv_avail + (int)(p->tot_len)) > conn->recv_bufsize)) {
 8015ca8:	687b      	ldr	r3, [r7, #4]
 8015caa:	891b      	ldrh	r3, [r3, #8]
 8015cac:	461a      	mov	r2, r3
 8015cae:	69fb      	ldr	r3, [r7, #28]
 8015cb0:	441a      	add	r2, r3
 8015cb2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015cb4:	6a1b      	ldr	r3, [r3, #32]
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox) ||
 8015cb6:	429a      	cmp	r2, r3
 8015cb8:	dd03      	ble.n	8015cc2 <recv_udp+0x96>
#else  /* LWIP_SO_RCVBUF */
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
#endif /* LWIP_SO_RCVBUF */
    pbuf_free(p);
 8015cba:	6878      	ldr	r0, [r7, #4]
 8015cbc:	f004 fc16 	bl	801a4ec <pbuf_free>
    return;
 8015cc0:	e042      	b.n	8015d48 <recv_udp+0x11c>
  }

  buf = (struct netbuf *)memp_malloc(MEMP_NETBUF);
 8015cc2:	2006      	movs	r0, #6
 8015cc4:	f003 fcae 	bl	8019624 <memp_malloc>
 8015cc8:	61b8      	str	r0, [r7, #24]
  if (buf == NULL) {
 8015cca:	69bb      	ldr	r3, [r7, #24]
 8015ccc:	2b00      	cmp	r3, #0
 8015cce:	d103      	bne.n	8015cd8 <recv_udp+0xac>
    pbuf_free(p);
 8015cd0:	6878      	ldr	r0, [r7, #4]
 8015cd2:	f004 fc0b 	bl	801a4ec <pbuf_free>
    return;
 8015cd6:	e037      	b.n	8015d48 <recv_udp+0x11c>
  } else {
    buf->p = p;
 8015cd8:	69bb      	ldr	r3, [r7, #24]
 8015cda:	687a      	ldr	r2, [r7, #4]
 8015cdc:	601a      	str	r2, [r3, #0]
    buf->ptr = p;
 8015cde:	69bb      	ldr	r3, [r7, #24]
 8015ce0:	687a      	ldr	r2, [r7, #4]
 8015ce2:	605a      	str	r2, [r3, #4]
    ip_addr_set(&buf->addr, addr);
 8015ce4:	683b      	ldr	r3, [r7, #0]
 8015ce6:	2b00      	cmp	r3, #0
 8015ce8:	d002      	beq.n	8015cf0 <recv_udp+0xc4>
 8015cea:	683b      	ldr	r3, [r7, #0]
 8015cec:	681b      	ldr	r3, [r3, #0]
 8015cee:	e000      	b.n	8015cf2 <recv_udp+0xc6>
 8015cf0:	2300      	movs	r3, #0
 8015cf2:	69ba      	ldr	r2, [r7, #24]
 8015cf4:	6093      	str	r3, [r2, #8]
    buf->port = port;
 8015cf6:	69bb      	ldr	r3, [r7, #24]
 8015cf8:	8e3a      	ldrh	r2, [r7, #48]	@ 0x30
 8015cfa:	819a      	strh	r2, [r3, #12]
      buf->toport_chksum = udphdr->dest;
    }
#endif /* LWIP_NETBUF_RECVINFO */
  }

  len = p->tot_len;
 8015cfc:	687b      	ldr	r3, [r7, #4]
 8015cfe:	891b      	ldrh	r3, [r3, #8]
 8015d00:	82fb      	strh	r3, [r7, #22]
  if (sys_mbox_trypost(&conn->recvmbox, buf) != ERR_OK) {
 8015d02:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015d04:	3310      	adds	r3, #16
 8015d06:	69b9      	ldr	r1, [r7, #24]
 8015d08:	4618      	mov	r0, r3
 8015d0a:	f010 fa65 	bl	80261d8 <sys_mbox_trypost>
 8015d0e:	4603      	mov	r3, r0
 8015d10:	2b00      	cmp	r3, #0
 8015d12:	d003      	beq.n	8015d1c <recv_udp+0xf0>
    netbuf_delete(buf);
 8015d14:	69b8      	ldr	r0, [r7, #24]
 8015d16:	f001 fbff 	bl	8017518 <netbuf_delete>
    return;
 8015d1a:	e015      	b.n	8015d48 <recv_udp+0x11c>
  } else {
#if LWIP_SO_RCVBUF
    SYS_ARCH_INC(conn->recv_avail, len);
 8015d1c:	f010 fbc8 	bl	80264b0 <sys_arch_protect>
 8015d20:	6138      	str	r0, [r7, #16]
 8015d22:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015d24:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8015d26:	8afb      	ldrh	r3, [r7, #22]
 8015d28:	441a      	add	r2, r3
 8015d2a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015d2c:	625a      	str	r2, [r3, #36]	@ 0x24
 8015d2e:	6938      	ldr	r0, [r7, #16]
 8015d30:	f010 fbcc 	bl	80264cc <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
    /* Register event with callback */
    API_EVENT(conn, NETCONN_EVT_RCVPLUS, len);
 8015d34:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015d36:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015d38:	2b00      	cmp	r3, #0
 8015d3a:	d005      	beq.n	8015d48 <recv_udp+0x11c>
 8015d3c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015d3e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015d40:	8afa      	ldrh	r2, [r7, #22]
 8015d42:	2100      	movs	r1, #0
 8015d44:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8015d46:	4798      	blx	r3
  }
}
 8015d48:	3728      	adds	r7, #40	@ 0x28
 8015d4a:	46bd      	mov	sp, r7
 8015d4c:	bd80      	pop	{r7, pc}
 8015d4e:	bf00      	nop
 8015d50:	0802cf24 	.word	0x0802cf24
 8015d54:	0802cf9c 	.word	0x0802cf9c
 8015d58:	0802cf68 	.word	0x0802cf68
 8015d5c:	0802cfc0 	.word	0x0802cfc0
 8015d60:	0802cfe0 	.word	0x0802cfe0

08015d64 <recv_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.recv) for parameters and return value
 */
static err_t
recv_tcp(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
{
 8015d64:	b580      	push	{r7, lr}
 8015d66:	b088      	sub	sp, #32
 8015d68:	af00      	add	r7, sp, #0
 8015d6a:	60f8      	str	r0, [r7, #12]
 8015d6c:	60b9      	str	r1, [r7, #8]
 8015d6e:	607a      	str	r2, [r7, #4]
 8015d70:	70fb      	strb	r3, [r7, #3]
  struct netconn *conn;
  u16_t len;
  void *msg;

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("recv_tcp must have a pcb argument", pcb != NULL);
 8015d72:	68bb      	ldr	r3, [r7, #8]
 8015d74:	2b00      	cmp	r3, #0
 8015d76:	d106      	bne.n	8015d86 <recv_tcp+0x22>
 8015d78:	4b3c      	ldr	r3, [pc, #240]	@ (8015e6c <recv_tcp+0x108>)
 8015d7a:	f44f 7296 	mov.w	r2, #300	@ 0x12c
 8015d7e:	493c      	ldr	r1, [pc, #240]	@ (8015e70 <recv_tcp+0x10c>)
 8015d80:	483c      	ldr	r0, [pc, #240]	@ (8015e74 <recv_tcp+0x110>)
 8015d82:	f013 fe2b 	bl	80299dc <iprintf>
  LWIP_ASSERT("recv_tcp must have an argument", arg != NULL);
 8015d86:	68fb      	ldr	r3, [r7, #12]
 8015d88:	2b00      	cmp	r3, #0
 8015d8a:	d106      	bne.n	8015d9a <recv_tcp+0x36>
 8015d8c:	4b37      	ldr	r3, [pc, #220]	@ (8015e6c <recv_tcp+0x108>)
 8015d8e:	f240 122d 	movw	r2, #301	@ 0x12d
 8015d92:	4939      	ldr	r1, [pc, #228]	@ (8015e78 <recv_tcp+0x114>)
 8015d94:	4837      	ldr	r0, [pc, #220]	@ (8015e74 <recv_tcp+0x110>)
 8015d96:	f013 fe21 	bl	80299dc <iprintf>
  LWIP_ASSERT("err != ERR_OK unhandled", err == ERR_OK);
 8015d9a:	f997 3003 	ldrsb.w	r3, [r7, #3]
 8015d9e:	2b00      	cmp	r3, #0
 8015da0:	d006      	beq.n	8015db0 <recv_tcp+0x4c>
 8015da2:	4b32      	ldr	r3, [pc, #200]	@ (8015e6c <recv_tcp+0x108>)
 8015da4:	f44f 7297 	mov.w	r2, #302	@ 0x12e
 8015da8:	4934      	ldr	r1, [pc, #208]	@ (8015e7c <recv_tcp+0x118>)
 8015daa:	4832      	ldr	r0, [pc, #200]	@ (8015e74 <recv_tcp+0x110>)
 8015dac:	f013 fe16 	bl	80299dc <iprintf>
  LWIP_UNUSED_ARG(err); /* for LWIP_NOASSERT */
  conn = (struct netconn *)arg;
 8015db0:	68fb      	ldr	r3, [r7, #12]
 8015db2:	617b      	str	r3, [r7, #20]

  if (conn == NULL) {
 8015db4:	697b      	ldr	r3, [r7, #20]
 8015db6:	2b00      	cmp	r3, #0
 8015db8:	d102      	bne.n	8015dc0 <recv_tcp+0x5c>
    return ERR_VAL;
 8015dba:	f06f 0305 	mvn.w	r3, #5
 8015dbe:	e051      	b.n	8015e64 <recv_tcp+0x100>
  }
  LWIP_ASSERT("recv_tcp: recv for wrong pcb!", conn->pcb.tcp == pcb);
 8015dc0:	697b      	ldr	r3, [r7, #20]
 8015dc2:	685b      	ldr	r3, [r3, #4]
 8015dc4:	68ba      	ldr	r2, [r7, #8]
 8015dc6:	429a      	cmp	r2, r3
 8015dc8:	d006      	beq.n	8015dd8 <recv_tcp+0x74>
 8015dca:	4b28      	ldr	r3, [pc, #160]	@ (8015e6c <recv_tcp+0x108>)
 8015dcc:	f240 1235 	movw	r2, #309	@ 0x135
 8015dd0:	492b      	ldr	r1, [pc, #172]	@ (8015e80 <recv_tcp+0x11c>)
 8015dd2:	4828      	ldr	r0, [pc, #160]	@ (8015e74 <recv_tcp+0x110>)
 8015dd4:	f013 fe02 	bl	80299dc <iprintf>

  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
 8015dd8:	697b      	ldr	r3, [r7, #20]
 8015dda:	3310      	adds	r3, #16
 8015ddc:	4618      	mov	r0, r3
 8015dde:	f010 fa5d 	bl	802629c <sys_mbox_valid>
 8015de2:	4603      	mov	r3, r0
 8015de4:	2b00      	cmp	r3, #0
 8015de6:	d10d      	bne.n	8015e04 <recv_tcp+0xa0>
    /* recvmbox already deleted */
    if (p != NULL) {
 8015de8:	687b      	ldr	r3, [r7, #4]
 8015dea:	2b00      	cmp	r3, #0
 8015dec:	d008      	beq.n	8015e00 <recv_tcp+0x9c>
      tcp_recved(pcb, p->tot_len);
 8015dee:	687b      	ldr	r3, [r7, #4]
 8015df0:	891b      	ldrh	r3, [r3, #8]
 8015df2:	4619      	mov	r1, r3
 8015df4:	68b8      	ldr	r0, [r7, #8]
 8015df6:	f005 f9e5 	bl	801b1c4 <tcp_recved>
      pbuf_free(p);
 8015dfa:	6878      	ldr	r0, [r7, #4]
 8015dfc:	f004 fb76 	bl	801a4ec <pbuf_free>
    }
    return ERR_OK;
 8015e00:	2300      	movs	r3, #0
 8015e02:	e02f      	b.n	8015e64 <recv_tcp+0x100>
  }
  /* Unlike for UDP or RAW pcbs, don't check for available space
     using recv_avail since that could break the connection
     (data is already ACKed) */

  if (p != NULL) {
 8015e04:	687b      	ldr	r3, [r7, #4]
 8015e06:	2b00      	cmp	r3, #0
 8015e08:	d005      	beq.n	8015e16 <recv_tcp+0xb2>
    msg = p;
 8015e0a:	687b      	ldr	r3, [r7, #4]
 8015e0c:	61bb      	str	r3, [r7, #24]
    len = p->tot_len;
 8015e0e:	687b      	ldr	r3, [r7, #4]
 8015e10:	891b      	ldrh	r3, [r3, #8]
 8015e12:	83fb      	strh	r3, [r7, #30]
 8015e14:	e003      	b.n	8015e1e <recv_tcp+0xba>
  } else {
    msg = LWIP_CONST_CAST(void *, &netconn_closed);
 8015e16:	4b1b      	ldr	r3, [pc, #108]	@ (8015e84 <recv_tcp+0x120>)
 8015e18:	61bb      	str	r3, [r7, #24]
    len = 0;
 8015e1a:	2300      	movs	r3, #0
 8015e1c:	83fb      	strh	r3, [r7, #30]
  }

  if (sys_mbox_trypost(&conn->recvmbox, msg) != ERR_OK) {
 8015e1e:	697b      	ldr	r3, [r7, #20]
 8015e20:	3310      	adds	r3, #16
 8015e22:	69b9      	ldr	r1, [r7, #24]
 8015e24:	4618      	mov	r0, r3
 8015e26:	f010 f9d7 	bl	80261d8 <sys_mbox_trypost>
 8015e2a:	4603      	mov	r3, r0
 8015e2c:	2b00      	cmp	r3, #0
 8015e2e:	d002      	beq.n	8015e36 <recv_tcp+0xd2>
    /* don't deallocate p: it is presented to us later again from tcp_fasttmr! */
    return ERR_MEM;
 8015e30:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8015e34:	e016      	b.n	8015e64 <recv_tcp+0x100>
  } else {
#if LWIP_SO_RCVBUF
    SYS_ARCH_INC(conn->recv_avail, len);
 8015e36:	f010 fb3b 	bl	80264b0 <sys_arch_protect>
 8015e3a:	6138      	str	r0, [r7, #16]
 8015e3c:	697b      	ldr	r3, [r7, #20]
 8015e3e:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8015e40:	8bfb      	ldrh	r3, [r7, #30]
 8015e42:	441a      	add	r2, r3
 8015e44:	697b      	ldr	r3, [r7, #20]
 8015e46:	625a      	str	r2, [r3, #36]	@ 0x24
 8015e48:	6938      	ldr	r0, [r7, #16]
 8015e4a:	f010 fb3f 	bl	80264cc <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
    /* Register event with callback */
    API_EVENT(conn, NETCONN_EVT_RCVPLUS, len);
 8015e4e:	697b      	ldr	r3, [r7, #20]
 8015e50:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015e52:	2b00      	cmp	r3, #0
 8015e54:	d005      	beq.n	8015e62 <recv_tcp+0xfe>
 8015e56:	697b      	ldr	r3, [r7, #20]
 8015e58:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015e5a:	8bfa      	ldrh	r2, [r7, #30]
 8015e5c:	2100      	movs	r1, #0
 8015e5e:	6978      	ldr	r0, [r7, #20]
 8015e60:	4798      	blx	r3
  }

  return ERR_OK;
 8015e62:	2300      	movs	r3, #0
}
 8015e64:	4618      	mov	r0, r3
 8015e66:	3720      	adds	r7, #32
 8015e68:	46bd      	mov	sp, r7
 8015e6a:	bd80      	pop	{r7, pc}
 8015e6c:	0802cf24 	.word	0x0802cf24
 8015e70:	0802d000 	.word	0x0802d000
 8015e74:	0802cf68 	.word	0x0802cf68
 8015e78:	0802d024 	.word	0x0802d024
 8015e7c:	0802d044 	.word	0x0802d044
 8015e80:	0802d05c 	.word	0x0802d05c
 8015e84:	08030ace 	.word	0x08030ace

08015e88 <poll_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.poll) for parameters and return value
 */
static err_t
poll_tcp(void *arg, struct tcp_pcb *pcb)
{
 8015e88:	b580      	push	{r7, lr}
 8015e8a:	b084      	sub	sp, #16
 8015e8c:	af00      	add	r7, sp, #0
 8015e8e:	6078      	str	r0, [r7, #4]
 8015e90:	6039      	str	r1, [r7, #0]
  struct netconn *conn = (struct netconn *)arg;
 8015e92:	687b      	ldr	r3, [r7, #4]
 8015e94:	60fb      	str	r3, [r7, #12]

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 8015e96:	68fb      	ldr	r3, [r7, #12]
 8015e98:	2b00      	cmp	r3, #0
 8015e9a:	d106      	bne.n	8015eaa <poll_tcp+0x22>
 8015e9c:	4b2b      	ldr	r3, [pc, #172]	@ (8015f4c <poll_tcp+0xc4>)
 8015e9e:	f44f 72b5 	mov.w	r2, #362	@ 0x16a
 8015ea2:	492b      	ldr	r1, [pc, #172]	@ (8015f50 <poll_tcp+0xc8>)
 8015ea4:	482b      	ldr	r0, [pc, #172]	@ (8015f54 <poll_tcp+0xcc>)
 8015ea6:	f013 fd99 	bl	80299dc <iprintf>

  if (conn->state == NETCONN_WRITE) {
 8015eaa:	68fb      	ldr	r3, [r7, #12]
 8015eac:	785b      	ldrb	r3, [r3, #1]
 8015eae:	2b01      	cmp	r3, #1
 8015eb0:	d104      	bne.n	8015ebc <poll_tcp+0x34>
    lwip_netconn_do_writemore(conn  WRITE_DELAYED);
 8015eb2:	2101      	movs	r1, #1
 8015eb4:	68f8      	ldr	r0, [r7, #12]
 8015eb6:	f000 ffab 	bl	8016e10 <lwip_netconn_do_writemore>
 8015eba:	e016      	b.n	8015eea <poll_tcp+0x62>
  } else if (conn->state == NETCONN_CLOSE) {
 8015ebc:	68fb      	ldr	r3, [r7, #12]
 8015ebe:	785b      	ldrb	r3, [r3, #1]
 8015ec0:	2b04      	cmp	r3, #4
 8015ec2:	d112      	bne.n	8015eea <poll_tcp+0x62>
#if !LWIP_SO_SNDTIMEO && !LWIP_SO_LINGER
    if (conn->current_msg && conn->current_msg->msg.sd.polls_left) {
 8015ec4:	68fb      	ldr	r3, [r7, #12]
 8015ec6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8015ec8:	2b00      	cmp	r3, #0
 8015eca:	d00a      	beq.n	8015ee2 <poll_tcp+0x5a>
 8015ecc:	68fb      	ldr	r3, [r7, #12]
 8015ece:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8015ed0:	7a5b      	ldrb	r3, [r3, #9]
 8015ed2:	2b00      	cmp	r3, #0
 8015ed4:	d005      	beq.n	8015ee2 <poll_tcp+0x5a>
      conn->current_msg->msg.sd.polls_left--;
 8015ed6:	68fb      	ldr	r3, [r7, #12]
 8015ed8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8015eda:	7a5a      	ldrb	r2, [r3, #9]
 8015edc:	3a01      	subs	r2, #1
 8015ede:	b2d2      	uxtb	r2, r2
 8015ee0:	725a      	strb	r2, [r3, #9]
    }
#endif /* !LWIP_SO_SNDTIMEO && !LWIP_SO_LINGER */
    lwip_netconn_do_close_internal(conn  WRITE_DELAYED);
 8015ee2:	2101      	movs	r1, #1
 8015ee4:	68f8      	ldr	r0, [r7, #12]
 8015ee6:	f000 fb53 	bl	8016590 <lwip_netconn_do_close_internal>
  }
  /* @todo: implement connect timeout here? */

  /* Did a nonblocking write fail before? Then check available write-space. */
  if (conn->flags & NETCONN_FLAG_CHECK_WRITESPACE) {
 8015eea:	68fb      	ldr	r3, [r7, #12]
 8015eec:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015ef0:	f003 0310 	and.w	r3, r3, #16
 8015ef4:	2b00      	cmp	r3, #0
 8015ef6:	d024      	beq.n	8015f42 <poll_tcp+0xba>
    /* If the queued byte- or pbuf-count drops below the configured low-water limit,
       let select mark this pcb as writable again. */
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8015ef8:	68fb      	ldr	r3, [r7, #12]
 8015efa:	685b      	ldr	r3, [r3, #4]
 8015efc:	2b00      	cmp	r3, #0
 8015efe:	d020      	beq.n	8015f42 <poll_tcp+0xba>
 8015f00:	68fb      	ldr	r3, [r7, #12]
 8015f02:	685b      	ldr	r3, [r3, #4]
 8015f04:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8015f08:	f640 3269 	movw	r2, #2921	@ 0xb69
 8015f0c:	4293      	cmp	r3, r2
 8015f0e:	d918      	bls.n	8015f42 <poll_tcp+0xba>
        (tcp_sndqueuelen(conn->pcb.tcp) < TCP_SNDQUEUELOWAT)) {
 8015f10:	68fb      	ldr	r3, [r7, #12]
 8015f12:	685b      	ldr	r3, [r3, #4]
 8015f14:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8015f18:	2b07      	cmp	r3, #7
 8015f1a:	d812      	bhi.n	8015f42 <poll_tcp+0xba>
      netconn_clear_flags(conn, NETCONN_FLAG_CHECK_WRITESPACE);
 8015f1c:	68fb      	ldr	r3, [r7, #12]
 8015f1e:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015f22:	f023 0310 	bic.w	r3, r3, #16
 8015f26:	b2da      	uxtb	r2, r3
 8015f28:	68fb      	ldr	r3, [r7, #12]
 8015f2a:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 8015f2e:	68fb      	ldr	r3, [r7, #12]
 8015f30:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015f32:	2b00      	cmp	r3, #0
 8015f34:	d005      	beq.n	8015f42 <poll_tcp+0xba>
 8015f36:	68fb      	ldr	r3, [r7, #12]
 8015f38:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015f3a:	2200      	movs	r2, #0
 8015f3c:	2102      	movs	r1, #2
 8015f3e:	68f8      	ldr	r0, [r7, #12]
 8015f40:	4798      	blx	r3
    }
  }

  return ERR_OK;
 8015f42:	2300      	movs	r3, #0
}
 8015f44:	4618      	mov	r0, r3
 8015f46:	3710      	adds	r7, #16
 8015f48:	46bd      	mov	sp, r7
 8015f4a:	bd80      	pop	{r7, pc}
 8015f4c:	0802cf24 	.word	0x0802cf24
 8015f50:	0802d07c 	.word	0x0802d07c
 8015f54:	0802cf68 	.word	0x0802cf68

08015f58 <sent_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.sent) for parameters and return value
 */
static err_t
sent_tcp(void *arg, struct tcp_pcb *pcb, u16_t len)
{
 8015f58:	b580      	push	{r7, lr}
 8015f5a:	b086      	sub	sp, #24
 8015f5c:	af00      	add	r7, sp, #0
 8015f5e:	60f8      	str	r0, [r7, #12]
 8015f60:	60b9      	str	r1, [r7, #8]
 8015f62:	4613      	mov	r3, r2
 8015f64:	80fb      	strh	r3, [r7, #6]
  struct netconn *conn = (struct netconn *)arg;
 8015f66:	68fb      	ldr	r3, [r7, #12]
 8015f68:	617b      	str	r3, [r7, #20]

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 8015f6a:	697b      	ldr	r3, [r7, #20]
 8015f6c:	2b00      	cmp	r3, #0
 8015f6e:	d106      	bne.n	8015f7e <sent_tcp+0x26>
 8015f70:	4b22      	ldr	r3, [pc, #136]	@ (8015ffc <sent_tcp+0xa4>)
 8015f72:	f240 1293 	movw	r2, #403	@ 0x193
 8015f76:	4922      	ldr	r1, [pc, #136]	@ (8016000 <sent_tcp+0xa8>)
 8015f78:	4822      	ldr	r0, [pc, #136]	@ (8016004 <sent_tcp+0xac>)
 8015f7a:	f013 fd2f 	bl	80299dc <iprintf>

  if (conn) {
 8015f7e:	697b      	ldr	r3, [r7, #20]
 8015f80:	2b00      	cmp	r3, #0
 8015f82:	d035      	beq.n	8015ff0 <sent_tcp+0x98>
    if (conn->state == NETCONN_WRITE) {
 8015f84:	697b      	ldr	r3, [r7, #20]
 8015f86:	785b      	ldrb	r3, [r3, #1]
 8015f88:	2b01      	cmp	r3, #1
 8015f8a:	d104      	bne.n	8015f96 <sent_tcp+0x3e>
      lwip_netconn_do_writemore(conn  WRITE_DELAYED);
 8015f8c:	2101      	movs	r1, #1
 8015f8e:	6978      	ldr	r0, [r7, #20]
 8015f90:	f000 ff3e 	bl	8016e10 <lwip_netconn_do_writemore>
 8015f94:	e007      	b.n	8015fa6 <sent_tcp+0x4e>
    } else if (conn->state == NETCONN_CLOSE) {
 8015f96:	697b      	ldr	r3, [r7, #20]
 8015f98:	785b      	ldrb	r3, [r3, #1]
 8015f9a:	2b04      	cmp	r3, #4
 8015f9c:	d103      	bne.n	8015fa6 <sent_tcp+0x4e>
      lwip_netconn_do_close_internal(conn  WRITE_DELAYED);
 8015f9e:	2101      	movs	r1, #1
 8015fa0:	6978      	ldr	r0, [r7, #20]
 8015fa2:	f000 faf5 	bl	8016590 <lwip_netconn_do_close_internal>
    }

    /* If the queued byte- or pbuf-count drops below the configured low-water limit,
       let select mark this pcb as writable again. */
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8015fa6:	697b      	ldr	r3, [r7, #20]
 8015fa8:	685b      	ldr	r3, [r3, #4]
 8015faa:	2b00      	cmp	r3, #0
 8015fac:	d020      	beq.n	8015ff0 <sent_tcp+0x98>
 8015fae:	697b      	ldr	r3, [r7, #20]
 8015fb0:	685b      	ldr	r3, [r3, #4]
 8015fb2:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8015fb6:	f640 3269 	movw	r2, #2921	@ 0xb69
 8015fba:	4293      	cmp	r3, r2
 8015fbc:	d918      	bls.n	8015ff0 <sent_tcp+0x98>
        (tcp_sndqueuelen(conn->pcb.tcp) < TCP_SNDQUEUELOWAT)) {
 8015fbe:	697b      	ldr	r3, [r7, #20]
 8015fc0:	685b      	ldr	r3, [r3, #4]
 8015fc2:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8015fc6:	2b07      	cmp	r3, #7
 8015fc8:	d812      	bhi.n	8015ff0 <sent_tcp+0x98>
      netconn_clear_flags(conn, NETCONN_FLAG_CHECK_WRITESPACE);
 8015fca:	697b      	ldr	r3, [r7, #20]
 8015fcc:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015fd0:	f023 0310 	bic.w	r3, r3, #16
 8015fd4:	b2da      	uxtb	r2, r3
 8015fd6:	697b      	ldr	r3, [r7, #20]
 8015fd8:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      API_EVENT(conn, NETCONN_EVT_SENDPLUS, len);
 8015fdc:	697b      	ldr	r3, [r7, #20]
 8015fde:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015fe0:	2b00      	cmp	r3, #0
 8015fe2:	d005      	beq.n	8015ff0 <sent_tcp+0x98>
 8015fe4:	697b      	ldr	r3, [r7, #20]
 8015fe6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015fe8:	88fa      	ldrh	r2, [r7, #6]
 8015fea:	2102      	movs	r1, #2
 8015fec:	6978      	ldr	r0, [r7, #20]
 8015fee:	4798      	blx	r3
    }
  }

  return ERR_OK;
 8015ff0:	2300      	movs	r3, #0
}
 8015ff2:	4618      	mov	r0, r3
 8015ff4:	3718      	adds	r7, #24
 8015ff6:	46bd      	mov	sp, r7
 8015ff8:	bd80      	pop	{r7, pc}
 8015ffa:	bf00      	nop
 8015ffc:	0802cf24 	.word	0x0802cf24
 8016000:	0802d07c 	.word	0x0802d07c
 8016004:	0802cf68 	.word	0x0802cf68

08016008 <err_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.err) for parameters
 */
static void
err_tcp(void *arg, err_t err)
{
 8016008:	b580      	push	{r7, lr}
 801600a:	b088      	sub	sp, #32
 801600c:	af00      	add	r7, sp, #0
 801600e:	6078      	str	r0, [r7, #4]
 8016010:	460b      	mov	r3, r1
 8016012:	70fb      	strb	r3, [r7, #3]
  struct netconn *conn;
  enum netconn_state old_state;
  void *mbox_msg;
  SYS_ARCH_DECL_PROTECT(lev);

  conn = (struct netconn *)arg;
 8016014:	687b      	ldr	r3, [r7, #4]
 8016016:	61fb      	str	r3, [r7, #28]
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 8016018:	69fb      	ldr	r3, [r7, #28]
 801601a:	2b00      	cmp	r3, #0
 801601c:	d106      	bne.n	801602c <err_tcp+0x24>
 801601e:	4b61      	ldr	r3, [pc, #388]	@ (80161a4 <err_tcp+0x19c>)
 8016020:	f44f 72dc 	mov.w	r2, #440	@ 0x1b8
 8016024:	4960      	ldr	r1, [pc, #384]	@ (80161a8 <err_tcp+0x1a0>)
 8016026:	4861      	ldr	r0, [pc, #388]	@ (80161ac <err_tcp+0x1a4>)
 8016028:	f013 fcd8 	bl	80299dc <iprintf>

  SYS_ARCH_PROTECT(lev);
 801602c:	f010 fa40 	bl	80264b0 <sys_arch_protect>
 8016030:	61b8      	str	r0, [r7, #24]

  /* when err is called, the pcb is deallocated, so delete the reference */
  conn->pcb.tcp = NULL;
 8016032:	69fb      	ldr	r3, [r7, #28]
 8016034:	2200      	movs	r2, #0
 8016036:	605a      	str	r2, [r3, #4]
  /* store pending error */
  conn->pending_err = err;
 8016038:	69fb      	ldr	r3, [r7, #28]
 801603a:	78fa      	ldrb	r2, [r7, #3]
 801603c:	721a      	strb	r2, [r3, #8]
  /* prevent application threads from blocking on 'recvmbox'/'acceptmbox' */
  conn->flags |= NETCONN_FLAG_MBOXCLOSED;
 801603e:	69fb      	ldr	r3, [r7, #28]
 8016040:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016044:	f043 0301 	orr.w	r3, r3, #1
 8016048:	b2da      	uxtb	r2, r3
 801604a:	69fb      	ldr	r3, [r7, #28]
 801604c:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28

  /* reset conn->state now before waking up other threads */
  old_state = conn->state;
 8016050:	69fb      	ldr	r3, [r7, #28]
 8016052:	785b      	ldrb	r3, [r3, #1]
 8016054:	75fb      	strb	r3, [r7, #23]
  conn->state = NETCONN_NONE;
 8016056:	69fb      	ldr	r3, [r7, #28]
 8016058:	2200      	movs	r2, #0
 801605a:	705a      	strb	r2, [r3, #1]

  SYS_ARCH_UNPROTECT(lev);
 801605c:	69b8      	ldr	r0, [r7, #24]
 801605e:	f010 fa35 	bl	80264cc <sys_arch_unprotect>

  /* Notify the user layer about a connection error. Used to signal select. */
  API_EVENT(conn, NETCONN_EVT_ERROR, 0);
 8016062:	69fb      	ldr	r3, [r7, #28]
 8016064:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016066:	2b00      	cmp	r3, #0
 8016068:	d005      	beq.n	8016076 <err_tcp+0x6e>
 801606a:	69fb      	ldr	r3, [r7, #28]
 801606c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801606e:	2200      	movs	r2, #0
 8016070:	2104      	movs	r1, #4
 8016072:	69f8      	ldr	r0, [r7, #28]
 8016074:	4798      	blx	r3
  /* Try to release selects pending on 'read' or 'write', too.
     They will get an error if they actually try to read or write. */
  API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0);
 8016076:	69fb      	ldr	r3, [r7, #28]
 8016078:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801607a:	2b00      	cmp	r3, #0
 801607c:	d005      	beq.n	801608a <err_tcp+0x82>
 801607e:	69fb      	ldr	r3, [r7, #28]
 8016080:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016082:	2200      	movs	r2, #0
 8016084:	2100      	movs	r1, #0
 8016086:	69f8      	ldr	r0, [r7, #28]
 8016088:	4798      	blx	r3
  API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 801608a:	69fb      	ldr	r3, [r7, #28]
 801608c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801608e:	2b00      	cmp	r3, #0
 8016090:	d005      	beq.n	801609e <err_tcp+0x96>
 8016092:	69fb      	ldr	r3, [r7, #28]
 8016094:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016096:	2200      	movs	r2, #0
 8016098:	2102      	movs	r1, #2
 801609a:	69f8      	ldr	r0, [r7, #28]
 801609c:	4798      	blx	r3

  mbox_msg = lwip_netconn_err_to_msg(err);
 801609e:	f997 3003 	ldrsb.w	r3, [r7, #3]
 80160a2:	4618      	mov	r0, r3
 80160a4:	f7ff fd52 	bl	8015b4c <lwip_netconn_err_to_msg>
 80160a8:	6138      	str	r0, [r7, #16]
  /* pass error message to recvmbox to wake up pending recv */
  if (NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
 80160aa:	69fb      	ldr	r3, [r7, #28]
 80160ac:	3310      	adds	r3, #16
 80160ae:	4618      	mov	r0, r3
 80160b0:	f010 f8f4 	bl	802629c <sys_mbox_valid>
 80160b4:	4603      	mov	r3, r0
 80160b6:	2b00      	cmp	r3, #0
 80160b8:	d005      	beq.n	80160c6 <err_tcp+0xbe>
    /* use trypost to prevent deadlock */
    sys_mbox_trypost(&conn->recvmbox, mbox_msg);
 80160ba:	69fb      	ldr	r3, [r7, #28]
 80160bc:	3310      	adds	r3, #16
 80160be:	6939      	ldr	r1, [r7, #16]
 80160c0:	4618      	mov	r0, r3
 80160c2:	f010 f889 	bl	80261d8 <sys_mbox_trypost>
  }
  /* pass error message to acceptmbox to wake up pending accept */
  if (NETCONN_MBOX_VALID(conn, &conn->acceptmbox)) {
 80160c6:	69fb      	ldr	r3, [r7, #28]
 80160c8:	3314      	adds	r3, #20
 80160ca:	4618      	mov	r0, r3
 80160cc:	f010 f8e6 	bl	802629c <sys_mbox_valid>
 80160d0:	4603      	mov	r3, r0
 80160d2:	2b00      	cmp	r3, #0
 80160d4:	d005      	beq.n	80160e2 <err_tcp+0xda>
    /* use trypost to preven deadlock */
    sys_mbox_trypost(&conn->acceptmbox, mbox_msg);
 80160d6:	69fb      	ldr	r3, [r7, #28]
 80160d8:	3314      	adds	r3, #20
 80160da:	6939      	ldr	r1, [r7, #16]
 80160dc:	4618      	mov	r0, r3
 80160de:	f010 f87b 	bl	80261d8 <sys_mbox_trypost>
  }

  if ((old_state == NETCONN_WRITE) || (old_state == NETCONN_CLOSE) ||
 80160e2:	7dfb      	ldrb	r3, [r7, #23]
 80160e4:	2b01      	cmp	r3, #1
 80160e6:	d005      	beq.n	80160f4 <err_tcp+0xec>
 80160e8:	7dfb      	ldrb	r3, [r7, #23]
 80160ea:	2b04      	cmp	r3, #4
 80160ec:	d002      	beq.n	80160f4 <err_tcp+0xec>
 80160ee:	7dfb      	ldrb	r3, [r7, #23]
 80160f0:	2b03      	cmp	r3, #3
 80160f2:	d146      	bne.n	8016182 <err_tcp+0x17a>
      (old_state == NETCONN_CONNECT)) {
    /* calling lwip_netconn_do_writemore/lwip_netconn_do_close_internal is not necessary
       since the pcb has already been deleted! */
    int was_nonblocking_connect = IN_NONBLOCKING_CONNECT(conn);
 80160f4:	69fb      	ldr	r3, [r7, #28]
 80160f6:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80160fa:	f003 0304 	and.w	r3, r3, #4
 80160fe:	2b00      	cmp	r3, #0
 8016100:	bf14      	ite	ne
 8016102:	2301      	movne	r3, #1
 8016104:	2300      	moveq	r3, #0
 8016106:	b2db      	uxtb	r3, r3
 8016108:	60fb      	str	r3, [r7, #12]
    SET_NONBLOCKING_CONNECT(conn, 0);
 801610a:	69fb      	ldr	r3, [r7, #28]
 801610c:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016110:	f023 0304 	bic.w	r3, r3, #4
 8016114:	b2da      	uxtb	r2, r3
 8016116:	69fb      	ldr	r3, [r7, #28]
 8016118:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28

    if (!was_nonblocking_connect) {
 801611c:	68fb      	ldr	r3, [r7, #12]
 801611e:	2b00      	cmp	r3, #0
 8016120:	d13b      	bne.n	801619a <err_tcp+0x192>
      sys_sem_t *op_completed_sem;
      /* set error return code */
      LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 8016122:	69fb      	ldr	r3, [r7, #28]
 8016124:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016126:	2b00      	cmp	r3, #0
 8016128:	d106      	bne.n	8016138 <err_tcp+0x130>
 801612a:	4b1e      	ldr	r3, [pc, #120]	@ (80161a4 <err_tcp+0x19c>)
 801612c:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 8016130:	491f      	ldr	r1, [pc, #124]	@ (80161b0 <err_tcp+0x1a8>)
 8016132:	481e      	ldr	r0, [pc, #120]	@ (80161ac <err_tcp+0x1a4>)
 8016134:	f013 fc52 	bl	80299dc <iprintf>
      if (old_state == NETCONN_CLOSE) {
 8016138:	7dfb      	ldrb	r3, [r7, #23]
 801613a:	2b04      	cmp	r3, #4
 801613c:	d104      	bne.n	8016148 <err_tcp+0x140>
        /* let close succeed: the connection is closed after all... */
        conn->current_msg->err = ERR_OK;
 801613e:	69fb      	ldr	r3, [r7, #28]
 8016140:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016142:	2200      	movs	r2, #0
 8016144:	711a      	strb	r2, [r3, #4]
 8016146:	e003      	b.n	8016150 <err_tcp+0x148>
      } else {
        /* Write and connect fail */
        conn->current_msg->err = err;
 8016148:	69fb      	ldr	r3, [r7, #28]
 801614a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801614c:	78fa      	ldrb	r2, [r7, #3]
 801614e:	711a      	strb	r2, [r3, #4]
      }
      op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 8016150:	69fb      	ldr	r3, [r7, #28]
 8016152:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016154:	681b      	ldr	r3, [r3, #0]
 8016156:	330c      	adds	r3, #12
 8016158:	60bb      	str	r3, [r7, #8]
      LWIP_ASSERT("inavlid op_completed_sem", sys_sem_valid(op_completed_sem));
 801615a:	68b8      	ldr	r0, [r7, #8]
 801615c:	f010 f92c 	bl	80263b8 <sys_sem_valid>
 8016160:	4603      	mov	r3, r0
 8016162:	2b00      	cmp	r3, #0
 8016164:	d106      	bne.n	8016174 <err_tcp+0x16c>
 8016166:	4b0f      	ldr	r3, [pc, #60]	@ (80161a4 <err_tcp+0x19c>)
 8016168:	f240 12ef 	movw	r2, #495	@ 0x1ef
 801616c:	4911      	ldr	r1, [pc, #68]	@ (80161b4 <err_tcp+0x1ac>)
 801616e:	480f      	ldr	r0, [pc, #60]	@ (80161ac <err_tcp+0x1a4>)
 8016170:	f013 fc34 	bl	80299dc <iprintf>
      conn->current_msg = NULL;
 8016174:	69fb      	ldr	r3, [r7, #28]
 8016176:	2200      	movs	r2, #0
 8016178:	62da      	str	r2, [r3, #44]	@ 0x2c
      /* wake up the waiting task */
      sys_sem_signal(op_completed_sem);
 801617a:	68b8      	ldr	r0, [r7, #8]
 801617c:	f010 f902 	bl	8026384 <sys_sem_signal>
      (old_state == NETCONN_CONNECT)) {
 8016180:	e00b      	b.n	801619a <err_tcp+0x192>
    } else {
      /* @todo: test what happens for error on nonblocking connect */
    }
  } else {
    LWIP_ASSERT("conn->current_msg == NULL", conn->current_msg == NULL);
 8016182:	69fb      	ldr	r3, [r7, #28]
 8016184:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016186:	2b00      	cmp	r3, #0
 8016188:	d008      	beq.n	801619c <err_tcp+0x194>
 801618a:	4b06      	ldr	r3, [pc, #24]	@ (80161a4 <err_tcp+0x19c>)
 801618c:	f240 12f7 	movw	r2, #503	@ 0x1f7
 8016190:	4909      	ldr	r1, [pc, #36]	@ (80161b8 <err_tcp+0x1b0>)
 8016192:	4806      	ldr	r0, [pc, #24]	@ (80161ac <err_tcp+0x1a4>)
 8016194:	f013 fc22 	bl	80299dc <iprintf>
  }
}
 8016198:	e000      	b.n	801619c <err_tcp+0x194>
      (old_state == NETCONN_CONNECT)) {
 801619a:	bf00      	nop
}
 801619c:	bf00      	nop
 801619e:	3720      	adds	r7, #32
 80161a0:	46bd      	mov	sp, r7
 80161a2:	bd80      	pop	{r7, pc}
 80161a4:	0802cf24 	.word	0x0802cf24
 80161a8:	0802d07c 	.word	0x0802d07c
 80161ac:	0802cf68 	.word	0x0802cf68
 80161b0:	0802d08c 	.word	0x0802d08c
 80161b4:	0802d0a8 	.word	0x0802d0a8
 80161b8:	0802d0c4 	.word	0x0802d0c4

080161bc <setup_tcp>:
 *
 * @param conn the TCP netconn to setup
 */
static void
setup_tcp(struct netconn *conn)
{
 80161bc:	b580      	push	{r7, lr}
 80161be:	b084      	sub	sp, #16
 80161c0:	af00      	add	r7, sp, #0
 80161c2:	6078      	str	r0, [r7, #4]
  struct tcp_pcb *pcb;

  pcb = conn->pcb.tcp;
 80161c4:	687b      	ldr	r3, [r7, #4]
 80161c6:	685b      	ldr	r3, [r3, #4]
 80161c8:	60fb      	str	r3, [r7, #12]
  tcp_arg(pcb, conn);
 80161ca:	6879      	ldr	r1, [r7, #4]
 80161cc:	68f8      	ldr	r0, [r7, #12]
 80161ce:	f005 ffe3 	bl	801c198 <tcp_arg>
  tcp_recv(pcb, recv_tcp);
 80161d2:	490a      	ldr	r1, [pc, #40]	@ (80161fc <setup_tcp+0x40>)
 80161d4:	68f8      	ldr	r0, [r7, #12]
 80161d6:	f005 fff1 	bl	801c1bc <tcp_recv>
  tcp_sent(pcb, sent_tcp);
 80161da:	4909      	ldr	r1, [pc, #36]	@ (8016200 <setup_tcp+0x44>)
 80161dc:	68f8      	ldr	r0, [r7, #12]
 80161de:	f006 f811 	bl	801c204 <tcp_sent>
  tcp_poll(pcb, poll_tcp, NETCONN_TCP_POLL_INTERVAL);
 80161e2:	2202      	movs	r2, #2
 80161e4:	4907      	ldr	r1, [pc, #28]	@ (8016204 <setup_tcp+0x48>)
 80161e6:	68f8      	ldr	r0, [r7, #12]
 80161e8:	f006 f86c 	bl	801c2c4 <tcp_poll>
  tcp_err(pcb, err_tcp);
 80161ec:	4906      	ldr	r1, [pc, #24]	@ (8016208 <setup_tcp+0x4c>)
 80161ee:	68f8      	ldr	r0, [r7, #12]
 80161f0:	f006 f82c 	bl	801c24c <tcp_err>
}
 80161f4:	bf00      	nop
 80161f6:	3710      	adds	r7, #16
 80161f8:	46bd      	mov	sp, r7
 80161fa:	bd80      	pop	{r7, pc}
 80161fc:	08015d65 	.word	0x08015d65
 8016200:	08015f59 	.word	0x08015f59
 8016204:	08015e89 	.word	0x08015e89
 8016208:	08016009 	.word	0x08016009

0801620c <pcb_new>:
 *
 * @param msg the api_msg describing the connection type
 */
static void
pcb_new(struct api_msg *msg)
{
 801620c:	b590      	push	{r4, r7, lr}
 801620e:	b085      	sub	sp, #20
 8016210:	af00      	add	r7, sp, #0
 8016212:	6078      	str	r0, [r7, #4]
  enum lwip_ip_addr_type iptype = IPADDR_TYPE_V4;
 8016214:	2300      	movs	r3, #0
 8016216:	73fb      	strb	r3, [r7, #15]

  LWIP_ASSERT("pcb_new: pcb already allocated", msg->conn->pcb.tcp == NULL);
 8016218:	687b      	ldr	r3, [r7, #4]
 801621a:	681b      	ldr	r3, [r3, #0]
 801621c:	685b      	ldr	r3, [r3, #4]
 801621e:	2b00      	cmp	r3, #0
 8016220:	d006      	beq.n	8016230 <pcb_new+0x24>
 8016222:	4b2b      	ldr	r3, [pc, #172]	@ (80162d0 <pcb_new+0xc4>)
 8016224:	f240 2265 	movw	r2, #613	@ 0x265
 8016228:	492a      	ldr	r1, [pc, #168]	@ (80162d4 <pcb_new+0xc8>)
 801622a:	482b      	ldr	r0, [pc, #172]	@ (80162d8 <pcb_new+0xcc>)
 801622c:	f013 fbd6 	bl	80299dc <iprintf>
    iptype = IPADDR_TYPE_ANY;
  }
#endif

  /* Allocate a PCB for this connection */
  switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8016230:	687b      	ldr	r3, [r7, #4]
 8016232:	681b      	ldr	r3, [r3, #0]
 8016234:	781b      	ldrb	r3, [r3, #0]
 8016236:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801623a:	2b10      	cmp	r3, #16
 801623c:	d022      	beq.n	8016284 <pcb_new+0x78>
 801623e:	2b20      	cmp	r3, #32
 8016240:	d133      	bne.n	80162aa <pcb_new+0x9e>
      }
      break;
#endif /* LWIP_RAW */
#if LWIP_UDP
    case NETCONN_UDP:
      msg->conn->pcb.udp = udp_new_ip_type(iptype);
 8016242:	687b      	ldr	r3, [r7, #4]
 8016244:	681c      	ldr	r4, [r3, #0]
 8016246:	7bfb      	ldrb	r3, [r7, #15]
 8016248:	4618      	mov	r0, r3
 801624a:	f00b fb94 	bl	8021976 <udp_new_ip_type>
 801624e:	4603      	mov	r3, r0
 8016250:	6063      	str	r3, [r4, #4]
      if (msg->conn->pcb.udp != NULL) {
 8016252:	687b      	ldr	r3, [r7, #4]
 8016254:	681b      	ldr	r3, [r3, #0]
 8016256:	685b      	ldr	r3, [r3, #4]
 8016258:	2b00      	cmp	r3, #0
 801625a:	d02a      	beq.n	80162b2 <pcb_new+0xa6>
#if LWIP_UDPLITE
        if (NETCONNTYPE_ISUDPLITE(msg->conn->type)) {
          udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_UDPLITE);
        }
#endif /* LWIP_UDPLITE */
        if (NETCONNTYPE_ISUDPNOCHKSUM(msg->conn->type)) {
 801625c:	687b      	ldr	r3, [r7, #4]
 801625e:	681b      	ldr	r3, [r3, #0]
 8016260:	781b      	ldrb	r3, [r3, #0]
 8016262:	2b22      	cmp	r3, #34	@ 0x22
 8016264:	d104      	bne.n	8016270 <pcb_new+0x64>
          udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_NOCHKSUM);
 8016266:	687b      	ldr	r3, [r7, #4]
 8016268:	681b      	ldr	r3, [r3, #0]
 801626a:	685b      	ldr	r3, [r3, #4]
 801626c:	2201      	movs	r2, #1
 801626e:	741a      	strb	r2, [r3, #16]
        }
        udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn);
 8016270:	687b      	ldr	r3, [r7, #4]
 8016272:	681b      	ldr	r3, [r3, #0]
 8016274:	6858      	ldr	r0, [r3, #4]
 8016276:	687b      	ldr	r3, [r7, #4]
 8016278:	681b      	ldr	r3, [r3, #0]
 801627a:	461a      	mov	r2, r3
 801627c:	4917      	ldr	r1, [pc, #92]	@ (80162dc <pcb_new+0xd0>)
 801627e:	f00b fafb 	bl	8021878 <udp_recv>
      }
      break;
 8016282:	e016      	b.n	80162b2 <pcb_new+0xa6>
#endif /* LWIP_UDP */
#if LWIP_TCP
    case NETCONN_TCP:
      msg->conn->pcb.tcp = tcp_new_ip_type(iptype);
 8016284:	687b      	ldr	r3, [r7, #4]
 8016286:	681c      	ldr	r4, [r3, #0]
 8016288:	7bfb      	ldrb	r3, [r7, #15]
 801628a:	4618      	mov	r0, r3
 801628c:	f005 ff76 	bl	801c17c <tcp_new_ip_type>
 8016290:	4603      	mov	r3, r0
 8016292:	6063      	str	r3, [r4, #4]
      if (msg->conn->pcb.tcp != NULL) {
 8016294:	687b      	ldr	r3, [r7, #4]
 8016296:	681b      	ldr	r3, [r3, #0]
 8016298:	685b      	ldr	r3, [r3, #4]
 801629a:	2b00      	cmp	r3, #0
 801629c:	d00b      	beq.n	80162b6 <pcb_new+0xaa>
        setup_tcp(msg->conn);
 801629e:	687b      	ldr	r3, [r7, #4]
 80162a0:	681b      	ldr	r3, [r3, #0]
 80162a2:	4618      	mov	r0, r3
 80162a4:	f7ff ff8a 	bl	80161bc <setup_tcp>
      }
      break;
 80162a8:	e005      	b.n	80162b6 <pcb_new+0xaa>
#endif /* LWIP_TCP */
    default:
      /* Unsupported netconn type, e.g. protocol disabled */
      msg->err = ERR_VAL;
 80162aa:	687b      	ldr	r3, [r7, #4]
 80162ac:	22fa      	movs	r2, #250	@ 0xfa
 80162ae:	711a      	strb	r2, [r3, #4]
      return;
 80162b0:	e00a      	b.n	80162c8 <pcb_new+0xbc>
      break;
 80162b2:	bf00      	nop
 80162b4:	e000      	b.n	80162b8 <pcb_new+0xac>
      break;
 80162b6:	bf00      	nop
  }
  if (msg->conn->pcb.ip == NULL) {
 80162b8:	687b      	ldr	r3, [r7, #4]
 80162ba:	681b      	ldr	r3, [r3, #0]
 80162bc:	685b      	ldr	r3, [r3, #4]
 80162be:	2b00      	cmp	r3, #0
 80162c0:	d102      	bne.n	80162c8 <pcb_new+0xbc>
    msg->err = ERR_MEM;
 80162c2:	687b      	ldr	r3, [r7, #4]
 80162c4:	22ff      	movs	r2, #255	@ 0xff
 80162c6:	711a      	strb	r2, [r3, #4]
  }
}
 80162c8:	3714      	adds	r7, #20
 80162ca:	46bd      	mov	sp, r7
 80162cc:	bd90      	pop	{r4, r7, pc}
 80162ce:	bf00      	nop
 80162d0:	0802cf24 	.word	0x0802cf24
 80162d4:	0802d108 	.word	0x0802d108
 80162d8:	0802cf68 	.word	0x0802cf68
 80162dc:	08015c2d 	.word	0x08015c2d

080162e0 <lwip_netconn_do_newconn>:
 *
 * @param m the api_msg describing the connection type
 */
void
lwip_netconn_do_newconn(void *m)
{
 80162e0:	b580      	push	{r7, lr}
 80162e2:	b084      	sub	sp, #16
 80162e4:	af00      	add	r7, sp, #0
 80162e6:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 80162e8:	687b      	ldr	r3, [r7, #4]
 80162ea:	60fb      	str	r3, [r7, #12]

  msg->err = ERR_OK;
 80162ec:	68fb      	ldr	r3, [r7, #12]
 80162ee:	2200      	movs	r2, #0
 80162f0:	711a      	strb	r2, [r3, #4]
  if (msg->conn->pcb.tcp == NULL) {
 80162f2:	68fb      	ldr	r3, [r7, #12]
 80162f4:	681b      	ldr	r3, [r3, #0]
 80162f6:	685b      	ldr	r3, [r3, #4]
 80162f8:	2b00      	cmp	r3, #0
 80162fa:	d102      	bne.n	8016302 <lwip_netconn_do_newconn+0x22>
    pcb_new(msg);
 80162fc:	68f8      	ldr	r0, [r7, #12]
 80162fe:	f7ff ff85 	bl	801620c <pcb_new>
  /* Else? This "new" connection already has a PCB allocated. */
  /* Is this an error condition? Should it be deleted? */
  /* We currently just are happy and return. */

  TCPIP_APIMSG_ACK(msg);
}
 8016302:	bf00      	nop
 8016304:	3710      	adds	r7, #16
 8016306:	46bd      	mov	sp, r7
 8016308:	bd80      	pop	{r7, pc}
	...

0801630c <netconn_alloc>:
 * @return a newly allocated struct netconn or
 *         NULL on memory error
 */
struct netconn *
netconn_alloc(enum netconn_type t, netconn_callback callback)
{
 801630c:	b580      	push	{r7, lr}
 801630e:	b086      	sub	sp, #24
 8016310:	af00      	add	r7, sp, #0
 8016312:	4603      	mov	r3, r0
 8016314:	6039      	str	r1, [r7, #0]
 8016316:	71fb      	strb	r3, [r7, #7]
  struct netconn *conn;
  int size;
  u8_t init_flags = 0;
 8016318:	2300      	movs	r3, #0
 801631a:	74fb      	strb	r3, [r7, #19]

  conn = (struct netconn *)memp_malloc(MEMP_NETCONN);
 801631c:	2007      	movs	r0, #7
 801631e:	f003 f981 	bl	8019624 <memp_malloc>
 8016322:	60f8      	str	r0, [r7, #12]
  if (conn == NULL) {
 8016324:	68fb      	ldr	r3, [r7, #12]
 8016326:	2b00      	cmp	r3, #0
 8016328:	d101      	bne.n	801632e <netconn_alloc+0x22>
    return NULL;
 801632a:	2300      	movs	r3, #0
 801632c:	e05c      	b.n	80163e8 <netconn_alloc+0xdc>
  }

  conn->pending_err = ERR_OK;
 801632e:	68fb      	ldr	r3, [r7, #12]
 8016330:	2200      	movs	r2, #0
 8016332:	721a      	strb	r2, [r3, #8]
  conn->type = t;
 8016334:	68fb      	ldr	r3, [r7, #12]
 8016336:	79fa      	ldrb	r2, [r7, #7]
 8016338:	701a      	strb	r2, [r3, #0]
  conn->pcb.tcp = NULL;
 801633a:	68fb      	ldr	r3, [r7, #12]
 801633c:	2200      	movs	r2, #0
 801633e:	605a      	str	r2, [r3, #4]

  /* If all sizes are the same, every compiler should optimize this switch to nothing */
  switch (NETCONNTYPE_GROUP(t)) {
 8016340:	79fb      	ldrb	r3, [r7, #7]
 8016342:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016346:	2b10      	cmp	r3, #16
 8016348:	d004      	beq.n	8016354 <netconn_alloc+0x48>
 801634a:	2b20      	cmp	r3, #32
 801634c:	d105      	bne.n	801635a <netconn_alloc+0x4e>
      size = DEFAULT_RAW_RECVMBOX_SIZE;
      break;
#endif /* LWIP_RAW */
#if LWIP_UDP
    case NETCONN_UDP:
      size = DEFAULT_UDP_RECVMBOX_SIZE;
 801634e:	2306      	movs	r3, #6
 8016350:	617b      	str	r3, [r7, #20]
#if LWIP_NETBUF_RECVINFO
      init_flags |= NETCONN_FLAG_PKTINFO;
#endif /* LWIP_NETBUF_RECVINFO */
      break;
 8016352:	e00a      	b.n	801636a <netconn_alloc+0x5e>
#endif /* LWIP_UDP */
#if LWIP_TCP
    case NETCONN_TCP:
      size = DEFAULT_TCP_RECVMBOX_SIZE;
 8016354:	2306      	movs	r3, #6
 8016356:	617b      	str	r3, [r7, #20]
      break;
 8016358:	e007      	b.n	801636a <netconn_alloc+0x5e>
#endif /* LWIP_TCP */
    default:
      LWIP_ASSERT("netconn_alloc: undefined netconn_type", 0);
 801635a:	4b25      	ldr	r3, [pc, #148]	@ (80163f0 <netconn_alloc+0xe4>)
 801635c:	f240 22e5 	movw	r2, #741	@ 0x2e5
 8016360:	4924      	ldr	r1, [pc, #144]	@ (80163f4 <netconn_alloc+0xe8>)
 8016362:	4825      	ldr	r0, [pc, #148]	@ (80163f8 <netconn_alloc+0xec>)
 8016364:	f013 fb3a 	bl	80299dc <iprintf>
      goto free_and_return;
 8016368:	e039      	b.n	80163de <netconn_alloc+0xd2>
  }

  if (sys_mbox_new(&conn->recvmbox, size) != ERR_OK) {
 801636a:	68fb      	ldr	r3, [r7, #12]
 801636c:	3310      	adds	r3, #16
 801636e:	6979      	ldr	r1, [r7, #20]
 8016370:	4618      	mov	r0, r3
 8016372:	f00f ff05 	bl	8026180 <sys_mbox_new>
 8016376:	4603      	mov	r3, r0
 8016378:	2b00      	cmp	r3, #0
 801637a:	d12f      	bne.n	80163dc <netconn_alloc+0xd0>
    goto free_and_return;
  }
#if !LWIP_NETCONN_SEM_PER_THREAD
  if (sys_sem_new(&conn->op_completed, 0) != ERR_OK) {
 801637c:	68fb      	ldr	r3, [r7, #12]
 801637e:	330c      	adds	r3, #12
 8016380:	2100      	movs	r1, #0
 8016382:	4618      	mov	r0, r3
 8016384:	f00f ffa8 	bl	80262d8 <sys_sem_new>
 8016388:	4603      	mov	r3, r0
 801638a:	2b00      	cmp	r3, #0
 801638c:	d005      	beq.n	801639a <netconn_alloc+0x8e>
    sys_mbox_free(&conn->recvmbox);
 801638e:	68fb      	ldr	r3, [r7, #12]
 8016390:	3310      	adds	r3, #16
 8016392:	4618      	mov	r0, r3
 8016394:	f00f ff0e 	bl	80261b4 <sys_mbox_free>
    goto free_and_return;
 8016398:	e021      	b.n	80163de <netconn_alloc+0xd2>
  }
#endif

#if LWIP_TCP
  sys_mbox_set_invalid(&conn->acceptmbox);
 801639a:	68fb      	ldr	r3, [r7, #12]
 801639c:	3314      	adds	r3, #20
 801639e:	4618      	mov	r0, r3
 80163a0:	f00f ff8d 	bl	80262be <sys_mbox_set_invalid>
#endif
  conn->state        = NETCONN_NONE;
 80163a4:	68fb      	ldr	r3, [r7, #12]
 80163a6:	2200      	movs	r2, #0
 80163a8:	705a      	strb	r2, [r3, #1]
#if LWIP_SOCKET
  /* initialize socket to -1 since 0 is a valid socket */
  conn->socket       = -1;
 80163aa:	68fb      	ldr	r3, [r7, #12]
 80163ac:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 80163b0:	619a      	str	r2, [r3, #24]
#endif /* LWIP_SOCKET */
  conn->callback     = callback;
 80163b2:	68fb      	ldr	r3, [r7, #12]
 80163b4:	683a      	ldr	r2, [r7, #0]
 80163b6:	631a      	str	r2, [r3, #48]	@ 0x30
#if LWIP_TCP
  conn->current_msg  = NULL;
 80163b8:	68fb      	ldr	r3, [r7, #12]
 80163ba:	2200      	movs	r2, #0
 80163bc:	62da      	str	r2, [r3, #44]	@ 0x2c
#endif /* LWIP_TCP */
#if LWIP_SO_SNDTIMEO
  conn->send_timeout = 0;
#endif /* LWIP_SO_SNDTIMEO */
#if LWIP_SO_RCVTIMEO
  conn->recv_timeout = 0;
 80163be:	68fb      	ldr	r3, [r7, #12]
 80163c0:	2200      	movs	r2, #0
 80163c2:	61da      	str	r2, [r3, #28]
#endif /* LWIP_SO_RCVTIMEO */
#if LWIP_SO_RCVBUF
  conn->recv_bufsize = RECV_BUFSIZE_DEFAULT;
 80163c4:	68fb      	ldr	r3, [r7, #12]
 80163c6:	4a0d      	ldr	r2, [pc, #52]	@ (80163fc <netconn_alloc+0xf0>)
 80163c8:	621a      	str	r2, [r3, #32]
  conn->recv_avail   = 0;
 80163ca:	68fb      	ldr	r3, [r7, #12]
 80163cc:	2200      	movs	r2, #0
 80163ce:	625a      	str	r2, [r3, #36]	@ 0x24
#endif /* LWIP_SO_RCVBUF */
#if LWIP_SO_LINGER
  conn->linger = -1;
#endif /* LWIP_SO_LINGER */
  conn->flags = init_flags;
 80163d0:	68fb      	ldr	r3, [r7, #12]
 80163d2:	7cfa      	ldrb	r2, [r7, #19]
 80163d4:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  return conn;
 80163d8:	68fb      	ldr	r3, [r7, #12]
 80163da:	e005      	b.n	80163e8 <netconn_alloc+0xdc>
    goto free_and_return;
 80163dc:	bf00      	nop
free_and_return:
  memp_free(MEMP_NETCONN, conn);
 80163de:	68f9      	ldr	r1, [r7, #12]
 80163e0:	2007      	movs	r0, #7
 80163e2:	f003 f995 	bl	8019710 <memp_free>
  return NULL;
 80163e6:	2300      	movs	r3, #0
}
 80163e8:	4618      	mov	r0, r3
 80163ea:	3718      	adds	r7, #24
 80163ec:	46bd      	mov	sp, r7
 80163ee:	bd80      	pop	{r7, pc}
 80163f0:	0802cf24 	.word	0x0802cf24
 80163f4:	0802d128 	.word	0x0802d128
 80163f8:	0802cf68 	.word	0x0802cf68
 80163fc:	77359400 	.word	0x77359400

08016400 <netconn_free>:
 *
 * @param conn the netconn to free
 */
void
netconn_free(struct netconn *conn)
{
 8016400:	b580      	push	{r7, lr}
 8016402:	b082      	sub	sp, #8
 8016404:	af00      	add	r7, sp, #0
 8016406:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("PCB must be deallocated outside this function", conn->pcb.tcp == NULL);
 8016408:	687b      	ldr	r3, [r7, #4]
 801640a:	685b      	ldr	r3, [r3, #4]
 801640c:	2b00      	cmp	r3, #0
 801640e:	d006      	beq.n	801641e <netconn_free+0x1e>
 8016410:	4b1b      	ldr	r3, [pc, #108]	@ (8016480 <netconn_free+0x80>)
 8016412:	f44f 7247 	mov.w	r2, #796	@ 0x31c
 8016416:	491b      	ldr	r1, [pc, #108]	@ (8016484 <netconn_free+0x84>)
 8016418:	481b      	ldr	r0, [pc, #108]	@ (8016488 <netconn_free+0x88>)
 801641a:	f013 fadf 	bl	80299dc <iprintf>
#if LWIP_NETCONN_FULLDUPLEX
  /* in fullduplex, netconn is drained here */
  netconn_drain(conn);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  LWIP_ASSERT("recvmbox must be deallocated before calling this function",
 801641e:	687b      	ldr	r3, [r7, #4]
 8016420:	3310      	adds	r3, #16
 8016422:	4618      	mov	r0, r3
 8016424:	f00f ff3a 	bl	802629c <sys_mbox_valid>
 8016428:	4603      	mov	r3, r0
 801642a:	2b00      	cmp	r3, #0
 801642c:	d006      	beq.n	801643c <netconn_free+0x3c>
 801642e:	4b14      	ldr	r3, [pc, #80]	@ (8016480 <netconn_free+0x80>)
 8016430:	f240 3223 	movw	r2, #803	@ 0x323
 8016434:	4915      	ldr	r1, [pc, #84]	@ (801648c <netconn_free+0x8c>)
 8016436:	4814      	ldr	r0, [pc, #80]	@ (8016488 <netconn_free+0x88>)
 8016438:	f013 fad0 	bl	80299dc <iprintf>
              !sys_mbox_valid(&conn->recvmbox));
#if LWIP_TCP
  LWIP_ASSERT("acceptmbox must be deallocated before calling this function",
 801643c:	687b      	ldr	r3, [r7, #4]
 801643e:	3314      	adds	r3, #20
 8016440:	4618      	mov	r0, r3
 8016442:	f00f ff2b 	bl	802629c <sys_mbox_valid>
 8016446:	4603      	mov	r3, r0
 8016448:	2b00      	cmp	r3, #0
 801644a:	d006      	beq.n	801645a <netconn_free+0x5a>
 801644c:	4b0c      	ldr	r3, [pc, #48]	@ (8016480 <netconn_free+0x80>)
 801644e:	f240 3226 	movw	r2, #806	@ 0x326
 8016452:	490f      	ldr	r1, [pc, #60]	@ (8016490 <netconn_free+0x90>)
 8016454:	480c      	ldr	r0, [pc, #48]	@ (8016488 <netconn_free+0x88>)
 8016456:	f013 fac1 	bl	80299dc <iprintf>
              !sys_mbox_valid(&conn->acceptmbox));
#endif /* LWIP_TCP */

#if !LWIP_NETCONN_SEM_PER_THREAD
  sys_sem_free(&conn->op_completed);
 801645a:	687b      	ldr	r3, [r7, #4]
 801645c:	330c      	adds	r3, #12
 801645e:	4618      	mov	r0, r3
 8016460:	f00f ff9d 	bl	802639e <sys_sem_free>
  sys_sem_set_invalid(&conn->op_completed);
 8016464:	687b      	ldr	r3, [r7, #4]
 8016466:	330c      	adds	r3, #12
 8016468:	4618      	mov	r0, r3
 801646a:	f00f ffb6 	bl	80263da <sys_sem_set_invalid>
#endif

  memp_free(MEMP_NETCONN, conn);
 801646e:	6879      	ldr	r1, [r7, #4]
 8016470:	2007      	movs	r0, #7
 8016472:	f003 f94d 	bl	8019710 <memp_free>
}
 8016476:	bf00      	nop
 8016478:	3708      	adds	r7, #8
 801647a:	46bd      	mov	sp, r7
 801647c:	bd80      	pop	{r7, pc}
 801647e:	bf00      	nop
 8016480:	0802cf24 	.word	0x0802cf24
 8016484:	0802d150 	.word	0x0802d150
 8016488:	0802cf68 	.word	0x0802cf68
 801648c:	0802d180 	.word	0x0802d180
 8016490:	0802d1bc 	.word	0x0802d1bc

08016494 <netconn_drain>:
 * @bytes_drained bytes drained from recvmbox
 * @accepts_drained pending connections drained from acceptmbox
 */
static void
netconn_drain(struct netconn *conn)
{
 8016494:	b580      	push	{r7, lr}
 8016496:	b086      	sub	sp, #24
 8016498:	af00      	add	r7, sp, #0
 801649a:	6078      	str	r0, [r7, #4]
#if LWIP_NETCONN_FULLDUPLEX
  LWIP_ASSERT("netconn marked closed", conn->flags & NETCONN_FLAG_MBOXINVALID);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  /* Delete and drain the recvmbox. */
  if (sys_mbox_valid(&conn->recvmbox)) {
 801649c:	687b      	ldr	r3, [r7, #4]
 801649e:	3310      	adds	r3, #16
 80164a0:	4618      	mov	r0, r3
 80164a2:	f00f fefb 	bl	802629c <sys_mbox_valid>
 80164a6:	4603      	mov	r3, r0
 80164a8:	2b00      	cmp	r3, #0
 80164aa:	d02f      	beq.n	801650c <netconn_drain+0x78>
    while (sys_mbox_tryfetch(&conn->recvmbox, &mem) != SYS_MBOX_EMPTY) {
 80164ac:	e018      	b.n	80164e0 <netconn_drain+0x4c>
#if LWIP_NETCONN_FULLDUPLEX
      if (!lwip_netconn_is_deallocated_msg(mem))
#endif /* LWIP_NETCONN_FULLDUPLEX */
      {
#if LWIP_TCP
        if (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP) {
 80164ae:	687b      	ldr	r3, [r7, #4]
 80164b0:	781b      	ldrb	r3, [r3, #0]
 80164b2:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80164b6:	2b10      	cmp	r3, #16
 80164b8:	d10e      	bne.n	80164d8 <netconn_drain+0x44>
          err_t err;
          if (!lwip_netconn_is_err_msg(mem, &err)) {
 80164ba:	693b      	ldr	r3, [r7, #16]
 80164bc:	f107 020f 	add.w	r2, r7, #15
 80164c0:	4611      	mov	r1, r2
 80164c2:	4618      	mov	r0, r3
 80164c4:	f7ff fb78 	bl	8015bb8 <lwip_netconn_is_err_msg>
 80164c8:	4603      	mov	r3, r0
 80164ca:	2b00      	cmp	r3, #0
 80164cc:	d108      	bne.n	80164e0 <netconn_drain+0x4c>
            pbuf_free((struct pbuf *)mem);
 80164ce:	693b      	ldr	r3, [r7, #16]
 80164d0:	4618      	mov	r0, r3
 80164d2:	f004 f80b 	bl	801a4ec <pbuf_free>
 80164d6:	e003      	b.n	80164e0 <netconn_drain+0x4c>
          }
        } else
#endif /* LWIP_TCP */
        {
          netbuf_delete((struct netbuf *)mem);
 80164d8:	693b      	ldr	r3, [r7, #16]
 80164da:	4618      	mov	r0, r3
 80164dc:	f001 f81c 	bl	8017518 <netbuf_delete>
    while (sys_mbox_tryfetch(&conn->recvmbox, &mem) != SYS_MBOX_EMPTY) {
 80164e0:	687b      	ldr	r3, [r7, #4]
 80164e2:	3310      	adds	r3, #16
 80164e4:	f107 0210 	add.w	r2, r7, #16
 80164e8:	4611      	mov	r1, r2
 80164ea:	4618      	mov	r0, r3
 80164ec:	f00f febf 	bl	802626e <sys_arch_mbox_tryfetch>
 80164f0:	4603      	mov	r3, r0
 80164f2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80164f6:	d1da      	bne.n	80164ae <netconn_drain+0x1a>
        }
      }
    }
    sys_mbox_free(&conn->recvmbox);
 80164f8:	687b      	ldr	r3, [r7, #4]
 80164fa:	3310      	adds	r3, #16
 80164fc:	4618      	mov	r0, r3
 80164fe:	f00f fe59 	bl	80261b4 <sys_mbox_free>
    sys_mbox_set_invalid(&conn->recvmbox);
 8016502:	687b      	ldr	r3, [r7, #4]
 8016504:	3310      	adds	r3, #16
 8016506:	4618      	mov	r0, r3
 8016508:	f00f fed9 	bl	80262be <sys_mbox_set_invalid>
  }

  /* Delete and drain the acceptmbox. */
#if LWIP_TCP
  if (sys_mbox_valid(&conn->acceptmbox)) {
 801650c:	687b      	ldr	r3, [r7, #4]
 801650e:	3314      	adds	r3, #20
 8016510:	4618      	mov	r0, r3
 8016512:	f00f fec3 	bl	802629c <sys_mbox_valid>
 8016516:	4603      	mov	r3, r0
 8016518:	2b00      	cmp	r3, #0
 801651a:	d034      	beq.n	8016586 <netconn_drain+0xf2>
    while (sys_mbox_tryfetch(&conn->acceptmbox, &mem) != SYS_MBOX_EMPTY) {
 801651c:	e01d      	b.n	801655a <netconn_drain+0xc6>
#if LWIP_NETCONN_FULLDUPLEX
      if (!lwip_netconn_is_deallocated_msg(mem))
#endif /* LWIP_NETCONN_FULLDUPLEX */
      {
        err_t err;
        if (!lwip_netconn_is_err_msg(mem, &err)) {
 801651e:	693b      	ldr	r3, [r7, #16]
 8016520:	f107 020e 	add.w	r2, r7, #14
 8016524:	4611      	mov	r1, r2
 8016526:	4618      	mov	r0, r3
 8016528:	f7ff fb46 	bl	8015bb8 <lwip_netconn_is_err_msg>
 801652c:	4603      	mov	r3, r0
 801652e:	2b00      	cmp	r3, #0
 8016530:	d113      	bne.n	801655a <netconn_drain+0xc6>
          struct netconn *newconn = (struct netconn *)mem;
 8016532:	693b      	ldr	r3, [r7, #16]
 8016534:	617b      	str	r3, [r7, #20]
          /* Only tcp pcbs have an acceptmbox, so no need to check conn->type */
          /* pcb might be set to NULL already by err_tcp() */
          /* drain recvmbox */
          netconn_drain(newconn);
 8016536:	6978      	ldr	r0, [r7, #20]
 8016538:	f7ff ffac 	bl	8016494 <netconn_drain>
          if (newconn->pcb.tcp != NULL) {
 801653c:	697b      	ldr	r3, [r7, #20]
 801653e:	685b      	ldr	r3, [r3, #4]
 8016540:	2b00      	cmp	r3, #0
 8016542:	d007      	beq.n	8016554 <netconn_drain+0xc0>
            tcp_abort(newconn->pcb.tcp);
 8016544:	697b      	ldr	r3, [r7, #20]
 8016546:	685b      	ldr	r3, [r3, #4]
 8016548:	4618      	mov	r0, r3
 801654a:	f004 fdd5 	bl	801b0f8 <tcp_abort>
            newconn->pcb.tcp = NULL;
 801654e:	697b      	ldr	r3, [r7, #20]
 8016550:	2200      	movs	r2, #0
 8016552:	605a      	str	r2, [r3, #4]
          }
          netconn_free(newconn);
 8016554:	6978      	ldr	r0, [r7, #20]
 8016556:	f7ff ff53 	bl	8016400 <netconn_free>
    while (sys_mbox_tryfetch(&conn->acceptmbox, &mem) != SYS_MBOX_EMPTY) {
 801655a:	687b      	ldr	r3, [r7, #4]
 801655c:	3314      	adds	r3, #20
 801655e:	f107 0210 	add.w	r2, r7, #16
 8016562:	4611      	mov	r1, r2
 8016564:	4618      	mov	r0, r3
 8016566:	f00f fe82 	bl	802626e <sys_arch_mbox_tryfetch>
 801656a:	4603      	mov	r3, r0
 801656c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8016570:	d1d5      	bne.n	801651e <netconn_drain+0x8a>
        }
      }
    }
    sys_mbox_free(&conn->acceptmbox);
 8016572:	687b      	ldr	r3, [r7, #4]
 8016574:	3314      	adds	r3, #20
 8016576:	4618      	mov	r0, r3
 8016578:	f00f fe1c 	bl	80261b4 <sys_mbox_free>
    sys_mbox_set_invalid(&conn->acceptmbox);
 801657c:	687b      	ldr	r3, [r7, #4]
 801657e:	3314      	adds	r3, #20
 8016580:	4618      	mov	r0, r3
 8016582:	f00f fe9c 	bl	80262be <sys_mbox_set_invalid>
  }
#endif /* LWIP_TCP */
}
 8016586:	bf00      	nop
 8016588:	3718      	adds	r7, #24
 801658a:	46bd      	mov	sp, r7
 801658c:	bd80      	pop	{r7, pc}
	...

08016590 <lwip_netconn_do_close_internal>:
 *
 * @param conn the TCP netconn to close
 */
static err_t
lwip_netconn_do_close_internal(struct netconn *conn  WRITE_DELAYED_PARAM)
{
 8016590:	b580      	push	{r7, lr}
 8016592:	b086      	sub	sp, #24
 8016594:	af00      	add	r7, sp, #0
 8016596:	6078      	str	r0, [r7, #4]
 8016598:	460b      	mov	r3, r1
 801659a:	70fb      	strb	r3, [r7, #3]
  err_t err;
  u8_t shut, shut_rx, shut_tx, shut_close;
  u8_t close_finished = 0;
 801659c:	2300      	movs	r3, #0
 801659e:	757b      	strb	r3, [r7, #21]
  struct tcp_pcb *tpcb;
#if LWIP_SO_LINGER
  u8_t linger_wait_required = 0;
#endif /* LWIP_SO_LINGER */

  LWIP_ASSERT("invalid conn", (conn != NULL));
 80165a0:	687b      	ldr	r3, [r7, #4]
 80165a2:	2b00      	cmp	r3, #0
 80165a4:	d106      	bne.n	80165b4 <lwip_netconn_do_close_internal+0x24>
 80165a6:	4b87      	ldr	r3, [pc, #540]	@ (80167c4 <lwip_netconn_do_close_internal+0x234>)
 80165a8:	f240 32a2 	movw	r2, #930	@ 0x3a2
 80165ac:	4986      	ldr	r1, [pc, #536]	@ (80167c8 <lwip_netconn_do_close_internal+0x238>)
 80165ae:	4887      	ldr	r0, [pc, #540]	@ (80167cc <lwip_netconn_do_close_internal+0x23c>)
 80165b0:	f013 fa14 	bl	80299dc <iprintf>
  LWIP_ASSERT("this is for tcp netconns only", (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP));
 80165b4:	687b      	ldr	r3, [r7, #4]
 80165b6:	781b      	ldrb	r3, [r3, #0]
 80165b8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80165bc:	2b10      	cmp	r3, #16
 80165be:	d006      	beq.n	80165ce <lwip_netconn_do_close_internal+0x3e>
 80165c0:	4b80      	ldr	r3, [pc, #512]	@ (80167c4 <lwip_netconn_do_close_internal+0x234>)
 80165c2:	f240 32a3 	movw	r2, #931	@ 0x3a3
 80165c6:	4982      	ldr	r1, [pc, #520]	@ (80167d0 <lwip_netconn_do_close_internal+0x240>)
 80165c8:	4880      	ldr	r0, [pc, #512]	@ (80167cc <lwip_netconn_do_close_internal+0x23c>)
 80165ca:	f013 fa07 	bl	80299dc <iprintf>
  LWIP_ASSERT("conn must be in state NETCONN_CLOSE", (conn->state == NETCONN_CLOSE));
 80165ce:	687b      	ldr	r3, [r7, #4]
 80165d0:	785b      	ldrb	r3, [r3, #1]
 80165d2:	2b04      	cmp	r3, #4
 80165d4:	d006      	beq.n	80165e4 <lwip_netconn_do_close_internal+0x54>
 80165d6:	4b7b      	ldr	r3, [pc, #492]	@ (80167c4 <lwip_netconn_do_close_internal+0x234>)
 80165d8:	f44f 7269 	mov.w	r2, #932	@ 0x3a4
 80165dc:	497d      	ldr	r1, [pc, #500]	@ (80167d4 <lwip_netconn_do_close_internal+0x244>)
 80165de:	487b      	ldr	r0, [pc, #492]	@ (80167cc <lwip_netconn_do_close_internal+0x23c>)
 80165e0:	f013 f9fc 	bl	80299dc <iprintf>
  LWIP_ASSERT("pcb already closed", (conn->pcb.tcp != NULL));
 80165e4:	687b      	ldr	r3, [r7, #4]
 80165e6:	685b      	ldr	r3, [r3, #4]
 80165e8:	2b00      	cmp	r3, #0
 80165ea:	d106      	bne.n	80165fa <lwip_netconn_do_close_internal+0x6a>
 80165ec:	4b75      	ldr	r3, [pc, #468]	@ (80167c4 <lwip_netconn_do_close_internal+0x234>)
 80165ee:	f240 32a5 	movw	r2, #933	@ 0x3a5
 80165f2:	4979      	ldr	r1, [pc, #484]	@ (80167d8 <lwip_netconn_do_close_internal+0x248>)
 80165f4:	4875      	ldr	r0, [pc, #468]	@ (80167cc <lwip_netconn_do_close_internal+0x23c>)
 80165f6:	f013 f9f1 	bl	80299dc <iprintf>
  LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 80165fa:	687b      	ldr	r3, [r7, #4]
 80165fc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80165fe:	2b00      	cmp	r3, #0
 8016600:	d106      	bne.n	8016610 <lwip_netconn_do_close_internal+0x80>
 8016602:	4b70      	ldr	r3, [pc, #448]	@ (80167c4 <lwip_netconn_do_close_internal+0x234>)
 8016604:	f240 32a6 	movw	r2, #934	@ 0x3a6
 8016608:	4974      	ldr	r1, [pc, #464]	@ (80167dc <lwip_netconn_do_close_internal+0x24c>)
 801660a:	4870      	ldr	r0, [pc, #448]	@ (80167cc <lwip_netconn_do_close_internal+0x23c>)
 801660c:	f013 f9e6 	bl	80299dc <iprintf>

  tpcb = conn->pcb.tcp;
 8016610:	687b      	ldr	r3, [r7, #4]
 8016612:	685b      	ldr	r3, [r3, #4]
 8016614:	613b      	str	r3, [r7, #16]
  shut = conn->current_msg->msg.sd.shut;
 8016616:	687b      	ldr	r3, [r7, #4]
 8016618:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801661a:	7a1b      	ldrb	r3, [r3, #8]
 801661c:	73fb      	strb	r3, [r7, #15]
  shut_rx = shut & NETCONN_SHUT_RD;
 801661e:	7bfb      	ldrb	r3, [r7, #15]
 8016620:	f003 0301 	and.w	r3, r3, #1
 8016624:	73bb      	strb	r3, [r7, #14]
  shut_tx = shut & NETCONN_SHUT_WR;
 8016626:	7bfb      	ldrb	r3, [r7, #15]
 8016628:	f003 0302 	and.w	r3, r3, #2
 801662c:	737b      	strb	r3, [r7, #13]
  /* shutting down both ends is the same as closing
     (also if RD or WR side was shut down before already) */
  if (shut == NETCONN_SHUT_RDWR) {
 801662e:	7bfb      	ldrb	r3, [r7, #15]
 8016630:	2b03      	cmp	r3, #3
 8016632:	d102      	bne.n	801663a <lwip_netconn_do_close_internal+0xaa>
    shut_close = 1;
 8016634:	2301      	movs	r3, #1
 8016636:	75bb      	strb	r3, [r7, #22]
 8016638:	e01f      	b.n	801667a <lwip_netconn_do_close_internal+0xea>
  } else if (shut_rx &&
 801663a:	7bbb      	ldrb	r3, [r7, #14]
 801663c:	2b00      	cmp	r3, #0
 801663e:	d00e      	beq.n	801665e <lwip_netconn_do_close_internal+0xce>
             ((tpcb->state == FIN_WAIT_1) ||
 8016640:	693b      	ldr	r3, [r7, #16]
 8016642:	7d1b      	ldrb	r3, [r3, #20]
  } else if (shut_rx &&
 8016644:	2b05      	cmp	r3, #5
 8016646:	d007      	beq.n	8016658 <lwip_netconn_do_close_internal+0xc8>
              (tpcb->state == FIN_WAIT_2) ||
 8016648:	693b      	ldr	r3, [r7, #16]
 801664a:	7d1b      	ldrb	r3, [r3, #20]
             ((tpcb->state == FIN_WAIT_1) ||
 801664c:	2b06      	cmp	r3, #6
 801664e:	d003      	beq.n	8016658 <lwip_netconn_do_close_internal+0xc8>
              (tpcb->state == CLOSING))) {
 8016650:	693b      	ldr	r3, [r7, #16]
 8016652:	7d1b      	ldrb	r3, [r3, #20]
              (tpcb->state == FIN_WAIT_2) ||
 8016654:	2b08      	cmp	r3, #8
 8016656:	d102      	bne.n	801665e <lwip_netconn_do_close_internal+0xce>
    shut_close = 1;
 8016658:	2301      	movs	r3, #1
 801665a:	75bb      	strb	r3, [r7, #22]
 801665c:	e00d      	b.n	801667a <lwip_netconn_do_close_internal+0xea>
  } else if (shut_tx && ((tpcb->flags & TF_RXCLOSED) != 0)) {
 801665e:	7b7b      	ldrb	r3, [r7, #13]
 8016660:	2b00      	cmp	r3, #0
 8016662:	d008      	beq.n	8016676 <lwip_netconn_do_close_internal+0xe6>
 8016664:	693b      	ldr	r3, [r7, #16]
 8016666:	8b5b      	ldrh	r3, [r3, #26]
 8016668:	f003 0310 	and.w	r3, r3, #16
 801666c:	2b00      	cmp	r3, #0
 801666e:	d002      	beq.n	8016676 <lwip_netconn_do_close_internal+0xe6>
    shut_close = 1;
 8016670:	2301      	movs	r3, #1
 8016672:	75bb      	strb	r3, [r7, #22]
 8016674:	e001      	b.n	801667a <lwip_netconn_do_close_internal+0xea>
  } else {
    shut_close = 0;
 8016676:	2300      	movs	r3, #0
 8016678:	75bb      	strb	r3, [r7, #22]
  }

  /* Set back some callback pointers */
  if (shut_close) {
 801667a:	7dbb      	ldrb	r3, [r7, #22]
 801667c:	2b00      	cmp	r3, #0
 801667e:	d003      	beq.n	8016688 <lwip_netconn_do_close_internal+0xf8>
    tcp_arg(tpcb, NULL);
 8016680:	2100      	movs	r1, #0
 8016682:	6938      	ldr	r0, [r7, #16]
 8016684:	f005 fd88 	bl	801c198 <tcp_arg>
  }
  if (tpcb->state == LISTEN) {
 8016688:	693b      	ldr	r3, [r7, #16]
 801668a:	7d1b      	ldrb	r3, [r3, #20]
 801668c:	2b01      	cmp	r3, #1
 801668e:	d104      	bne.n	801669a <lwip_netconn_do_close_internal+0x10a>
    tcp_accept(tpcb, NULL);
 8016690:	2100      	movs	r1, #0
 8016692:	6938      	ldr	r0, [r7, #16]
 8016694:	f005 fdfe 	bl	801c294 <tcp_accept>
 8016698:	e01d      	b.n	80166d6 <lwip_netconn_do_close_internal+0x146>
  } else {
    /* some callbacks have to be reset if tcp_close is not successful */
    if (shut_rx) {
 801669a:	7bbb      	ldrb	r3, [r7, #14]
 801669c:	2b00      	cmp	r3, #0
 801669e:	d007      	beq.n	80166b0 <lwip_netconn_do_close_internal+0x120>
      tcp_recv(tpcb, NULL);
 80166a0:	2100      	movs	r1, #0
 80166a2:	6938      	ldr	r0, [r7, #16]
 80166a4:	f005 fd8a 	bl	801c1bc <tcp_recv>
      tcp_accept(tpcb, NULL);
 80166a8:	2100      	movs	r1, #0
 80166aa:	6938      	ldr	r0, [r7, #16]
 80166ac:	f005 fdf2 	bl	801c294 <tcp_accept>
    }
    if (shut_tx) {
 80166b0:	7b7b      	ldrb	r3, [r7, #13]
 80166b2:	2b00      	cmp	r3, #0
 80166b4:	d003      	beq.n	80166be <lwip_netconn_do_close_internal+0x12e>
      tcp_sent(tpcb, NULL);
 80166b6:	2100      	movs	r1, #0
 80166b8:	6938      	ldr	r0, [r7, #16]
 80166ba:	f005 fda3 	bl	801c204 <tcp_sent>
    }
    if (shut_close) {
 80166be:	7dbb      	ldrb	r3, [r7, #22]
 80166c0:	2b00      	cmp	r3, #0
 80166c2:	d008      	beq.n	80166d6 <lwip_netconn_do_close_internal+0x146>
      tcp_poll(tpcb, NULL, 0);
 80166c4:	2200      	movs	r2, #0
 80166c6:	2100      	movs	r1, #0
 80166c8:	6938      	ldr	r0, [r7, #16]
 80166ca:	f005 fdfb 	bl	801c2c4 <tcp_poll>
      tcp_err(tpcb, NULL);
 80166ce:	2100      	movs	r1, #0
 80166d0:	6938      	ldr	r0, [r7, #16]
 80166d2:	f005 fdbb 	bl	801c24c <tcp_err>
    }
  }
  /* Try to close the connection */
  if (shut_close) {
 80166d6:	7dbb      	ldrb	r3, [r7, #22]
 80166d8:	2b00      	cmp	r3, #0
 80166da:	d005      	beq.n	80166e8 <lwip_netconn_do_close_internal+0x158>
      }
    }
    if ((err == ERR_OK) && (tpcb != NULL))
#endif /* LWIP_SO_LINGER */
    {
      err = tcp_close(tpcb);
 80166dc:	6938      	ldr	r0, [r7, #16]
 80166de:	f004 fbbf 	bl	801ae60 <tcp_close>
 80166e2:	4603      	mov	r3, r0
 80166e4:	75fb      	strb	r3, [r7, #23]
 80166e6:	e007      	b.n	80166f8 <lwip_netconn_do_close_internal+0x168>
    }
  } else {
    err = tcp_shutdown(tpcb, shut_rx, shut_tx);
 80166e8:	7bbb      	ldrb	r3, [r7, #14]
 80166ea:	7b7a      	ldrb	r2, [r7, #13]
 80166ec:	4619      	mov	r1, r3
 80166ee:	6938      	ldr	r0, [r7, #16]
 80166f0:	f004 fbe4 	bl	801aebc <tcp_shutdown>
 80166f4:	4603      	mov	r3, r0
 80166f6:	75fb      	strb	r3, [r7, #23]
  }
  if (err == ERR_OK) {
 80166f8:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80166fc:	2b00      	cmp	r3, #0
 80166fe:	d102      	bne.n	8016706 <lwip_netconn_do_close_internal+0x176>
    close_finished = 1;
 8016700:	2301      	movs	r3, #1
 8016702:	757b      	strb	r3, [r7, #21]
 8016704:	e016      	b.n	8016734 <lwip_netconn_do_close_internal+0x1a4>
      close_finished = 0;
      err = ERR_INPROGRESS;
    }
#endif /* LWIP_SO_LINGER */
  } else {
    if (err == ERR_MEM) {
 8016706:	f997 3017 	ldrsb.w	r3, [r7, #23]
 801670a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801670e:	d10f      	bne.n	8016730 <lwip_netconn_do_close_internal+0x1a0>
        close_timeout = conn->linger * 1000U;
      }
#endif
      if ((s32_t)(sys_now() - conn->current_msg->msg.sd.time_started) >= close_timeout) {
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
      if (conn->current_msg->msg.sd.polls_left == 0) {
 8016710:	687b      	ldr	r3, [r7, #4]
 8016712:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016714:	7a5b      	ldrb	r3, [r3, #9]
 8016716:	2b00      	cmp	r3, #0
 8016718:	d10c      	bne.n	8016734 <lwip_netconn_do_close_internal+0x1a4>
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
        close_finished = 1;
 801671a:	2301      	movs	r3, #1
 801671c:	757b      	strb	r3, [r7, #21]
        if (shut_close) {
 801671e:	7dbb      	ldrb	r3, [r7, #22]
 8016720:	2b00      	cmp	r3, #0
 8016722:	d007      	beq.n	8016734 <lwip_netconn_do_close_internal+0x1a4>
          /* in this case, we want to RST the connection */
          tcp_abort(tpcb);
 8016724:	6938      	ldr	r0, [r7, #16]
 8016726:	f004 fce7 	bl	801b0f8 <tcp_abort>
          err = ERR_OK;
 801672a:	2300      	movs	r3, #0
 801672c:	75fb      	strb	r3, [r7, #23]
 801672e:	e001      	b.n	8016734 <lwip_netconn_do_close_internal+0x1a4>
        }
      }
    } else {
      /* Closing failed for a non-memory error: give up */
      close_finished = 1;
 8016730:	2301      	movs	r3, #1
 8016732:	757b      	strb	r3, [r7, #21]
    }
  }
  if (close_finished) {
 8016734:	7d7b      	ldrb	r3, [r7, #21]
 8016736:	2b00      	cmp	r3, #0
 8016738:	d052      	beq.n	80167e0 <lwip_netconn_do_close_internal+0x250>
    /* Closing done (succeeded, non-memory error, nonblocking error or timeout) */
    sys_sem_t *op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 801673a:	687b      	ldr	r3, [r7, #4]
 801673c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801673e:	681b      	ldr	r3, [r3, #0]
 8016740:	330c      	adds	r3, #12
 8016742:	60bb      	str	r3, [r7, #8]
    conn->current_msg->err = err;
 8016744:	687b      	ldr	r3, [r7, #4]
 8016746:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016748:	7dfa      	ldrb	r2, [r7, #23]
 801674a:	711a      	strb	r2, [r3, #4]
    conn->current_msg = NULL;
 801674c:	687b      	ldr	r3, [r7, #4]
 801674e:	2200      	movs	r2, #0
 8016750:	62da      	str	r2, [r3, #44]	@ 0x2c
    conn->state = NETCONN_NONE;
 8016752:	687b      	ldr	r3, [r7, #4]
 8016754:	2200      	movs	r2, #0
 8016756:	705a      	strb	r2, [r3, #1]
    if (err == ERR_OK) {
 8016758:	f997 3017 	ldrsb.w	r3, [r7, #23]
 801675c:	2b00      	cmp	r3, #0
 801675e:	d129      	bne.n	80167b4 <lwip_netconn_do_close_internal+0x224>
      if (shut_close) {
 8016760:	7dbb      	ldrb	r3, [r7, #22]
 8016762:	2b00      	cmp	r3, #0
 8016764:	d00c      	beq.n	8016780 <lwip_netconn_do_close_internal+0x1f0>
        /* Set back some callback pointers as conn is going away */
        conn->pcb.tcp = NULL;
 8016766:	687b      	ldr	r3, [r7, #4]
 8016768:	2200      	movs	r2, #0
 801676a:	605a      	str	r2, [r3, #4]
        /* Trigger select() in socket layer. Make sure everybody notices activity
         on the connection, error first! */
        API_EVENT(conn, NETCONN_EVT_ERROR, 0);
 801676c:	687b      	ldr	r3, [r7, #4]
 801676e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016770:	2b00      	cmp	r3, #0
 8016772:	d005      	beq.n	8016780 <lwip_netconn_do_close_internal+0x1f0>
 8016774:	687b      	ldr	r3, [r7, #4]
 8016776:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016778:	2200      	movs	r2, #0
 801677a:	2104      	movs	r1, #4
 801677c:	6878      	ldr	r0, [r7, #4]
 801677e:	4798      	blx	r3
      }
      if (shut_rx) {
 8016780:	7bbb      	ldrb	r3, [r7, #14]
 8016782:	2b00      	cmp	r3, #0
 8016784:	d009      	beq.n	801679a <lwip_netconn_do_close_internal+0x20a>
        API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0);
 8016786:	687b      	ldr	r3, [r7, #4]
 8016788:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801678a:	2b00      	cmp	r3, #0
 801678c:	d005      	beq.n	801679a <lwip_netconn_do_close_internal+0x20a>
 801678e:	687b      	ldr	r3, [r7, #4]
 8016790:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016792:	2200      	movs	r2, #0
 8016794:	2100      	movs	r1, #0
 8016796:	6878      	ldr	r0, [r7, #4]
 8016798:	4798      	blx	r3
      }
      if (shut_tx) {
 801679a:	7b7b      	ldrb	r3, [r7, #13]
 801679c:	2b00      	cmp	r3, #0
 801679e:	d009      	beq.n	80167b4 <lwip_netconn_do_close_internal+0x224>
        API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 80167a0:	687b      	ldr	r3, [r7, #4]
 80167a2:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80167a4:	2b00      	cmp	r3, #0
 80167a6:	d005      	beq.n	80167b4 <lwip_netconn_do_close_internal+0x224>
 80167a8:	687b      	ldr	r3, [r7, #4]
 80167aa:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80167ac:	2200      	movs	r2, #0
 80167ae:	2102      	movs	r1, #2
 80167b0:	6878      	ldr	r0, [r7, #4]
 80167b2:	4798      	blx	r3
      }
    }
#if LWIP_TCPIP_CORE_LOCKING
    if (delayed)
 80167b4:	78fb      	ldrb	r3, [r7, #3]
 80167b6:	2b00      	cmp	r3, #0
 80167b8:	d002      	beq.n	80167c0 <lwip_netconn_do_close_internal+0x230>
#endif
    {
      /* wake up the application task */
      sys_sem_signal(op_completed_sem);
 80167ba:	68b8      	ldr	r0, [r7, #8]
 80167bc:	f00f fde2 	bl	8026384 <sys_sem_signal>
    }
    return ERR_OK;
 80167c0:	2300      	movs	r3, #0
 80167c2:	e03c      	b.n	801683e <lwip_netconn_do_close_internal+0x2ae>
 80167c4:	0802cf24 	.word	0x0802cf24
 80167c8:	0802d1f8 	.word	0x0802d1f8
 80167cc:	0802cf68 	.word	0x0802cf68
 80167d0:	0802d208 	.word	0x0802d208
 80167d4:	0802d228 	.word	0x0802d228
 80167d8:	0802d24c 	.word	0x0802d24c
 80167dc:	0802d08c 	.word	0x0802d08c
  }
  if (!close_finished) {
 80167e0:	7d7b      	ldrb	r3, [r7, #21]
 80167e2:	2b00      	cmp	r3, #0
 80167e4:	d11e      	bne.n	8016824 <lwip_netconn_do_close_internal+0x294>
    /* Closing failed and we want to wait: restore some of the callbacks */
    /* Closing of listen pcb will never fail! */
    LWIP_ASSERT("Closing a listen pcb may not fail!", (tpcb->state != LISTEN));
 80167e6:	693b      	ldr	r3, [r7, #16]
 80167e8:	7d1b      	ldrb	r3, [r3, #20]
 80167ea:	2b01      	cmp	r3, #1
 80167ec:	d106      	bne.n	80167fc <lwip_netconn_do_close_internal+0x26c>
 80167ee:	4b16      	ldr	r3, [pc, #88]	@ (8016848 <lwip_netconn_do_close_internal+0x2b8>)
 80167f0:	f240 4241 	movw	r2, #1089	@ 0x441
 80167f4:	4915      	ldr	r1, [pc, #84]	@ (801684c <lwip_netconn_do_close_internal+0x2bc>)
 80167f6:	4816      	ldr	r0, [pc, #88]	@ (8016850 <lwip_netconn_do_close_internal+0x2c0>)
 80167f8:	f013 f8f0 	bl	80299dc <iprintf>
    if (shut_tx) {
 80167fc:	7b7b      	ldrb	r3, [r7, #13]
 80167fe:	2b00      	cmp	r3, #0
 8016800:	d003      	beq.n	801680a <lwip_netconn_do_close_internal+0x27a>
      tcp_sent(tpcb, sent_tcp);
 8016802:	4914      	ldr	r1, [pc, #80]	@ (8016854 <lwip_netconn_do_close_internal+0x2c4>)
 8016804:	6938      	ldr	r0, [r7, #16]
 8016806:	f005 fcfd 	bl	801c204 <tcp_sent>
    }
    /* when waiting for close, set up poll interval to 500ms */
    tcp_poll(tpcb, poll_tcp, 1);
 801680a:	2201      	movs	r2, #1
 801680c:	4912      	ldr	r1, [pc, #72]	@ (8016858 <lwip_netconn_do_close_internal+0x2c8>)
 801680e:	6938      	ldr	r0, [r7, #16]
 8016810:	f005 fd58 	bl	801c2c4 <tcp_poll>
    tcp_err(tpcb, err_tcp);
 8016814:	4911      	ldr	r1, [pc, #68]	@ (801685c <lwip_netconn_do_close_internal+0x2cc>)
 8016816:	6938      	ldr	r0, [r7, #16]
 8016818:	f005 fd18 	bl	801c24c <tcp_err>
    tcp_arg(tpcb, conn);
 801681c:	6879      	ldr	r1, [r7, #4]
 801681e:	6938      	ldr	r0, [r7, #16]
 8016820:	f005 fcba 	bl	801c198 <tcp_arg>
    /* don't restore recv callback: we don't want to receive any more data */
  }
  /* If closing didn't succeed, we get called again either
     from poll_tcp or from sent_tcp */
  LWIP_ASSERT("err != ERR_OK", err != ERR_OK);
 8016824:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8016828:	2b00      	cmp	r3, #0
 801682a:	d106      	bne.n	801683a <lwip_netconn_do_close_internal+0x2aa>
 801682c:	4b06      	ldr	r3, [pc, #24]	@ (8016848 <lwip_netconn_do_close_internal+0x2b8>)
 801682e:	f240 424d 	movw	r2, #1101	@ 0x44d
 8016832:	490b      	ldr	r1, [pc, #44]	@ (8016860 <lwip_netconn_do_close_internal+0x2d0>)
 8016834:	4806      	ldr	r0, [pc, #24]	@ (8016850 <lwip_netconn_do_close_internal+0x2c0>)
 8016836:	f013 f8d1 	bl	80299dc <iprintf>
  return err;
 801683a:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 801683e:	4618      	mov	r0, r3
 8016840:	3718      	adds	r7, #24
 8016842:	46bd      	mov	sp, r7
 8016844:	bd80      	pop	{r7, pc}
 8016846:	bf00      	nop
 8016848:	0802cf24 	.word	0x0802cf24
 801684c:	0802d260 	.word	0x0802d260
 8016850:	0802cf68 	.word	0x0802cf68
 8016854:	08015f59 	.word	0x08015f59
 8016858:	08015e89 	.word	0x08015e89
 801685c:	08016009 	.word	0x08016009
 8016860:	0802d284 	.word	0x0802d284

08016864 <lwip_netconn_do_delconn>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_delconn(void *m)
{
 8016864:	b580      	push	{r7, lr}
 8016866:	b084      	sub	sp, #16
 8016868:	af00      	add	r7, sp, #0
 801686a:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 801686c:	687b      	ldr	r3, [r7, #4]
 801686e:	60fb      	str	r3, [r7, #12]

  enum netconn_state state = msg->conn->state;
 8016870:	68fb      	ldr	r3, [r7, #12]
 8016872:	681b      	ldr	r3, [r3, #0]
 8016874:	785b      	ldrb	r3, [r3, #1]
 8016876:	72fb      	strb	r3, [r7, #11]
  LWIP_ASSERT("netconn state error", /* this only happens for TCP netconns */
 8016878:	7afb      	ldrb	r3, [r7, #11]
 801687a:	2b00      	cmp	r3, #0
 801687c:	d00d      	beq.n	801689a <lwip_netconn_do_delconn+0x36>
 801687e:	68fb      	ldr	r3, [r7, #12]
 8016880:	681b      	ldr	r3, [r3, #0]
 8016882:	781b      	ldrb	r3, [r3, #0]
 8016884:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016888:	2b10      	cmp	r3, #16
 801688a:	d006      	beq.n	801689a <lwip_netconn_do_delconn+0x36>
 801688c:	4b60      	ldr	r3, [pc, #384]	@ (8016a10 <lwip_netconn_do_delconn+0x1ac>)
 801688e:	f240 425e 	movw	r2, #1118	@ 0x45e
 8016892:	4960      	ldr	r1, [pc, #384]	@ (8016a14 <lwip_netconn_do_delconn+0x1b0>)
 8016894:	4860      	ldr	r0, [pc, #384]	@ (8016a18 <lwip_netconn_do_delconn+0x1b4>)
 8016896:	f013 f8a1 	bl	80299dc <iprintf>
      msg->conn->state = NETCONN_NONE;
      sys_sem_signal(op_completed_sem);
    }
  }
#else /* LWIP_NETCONN_FULLDUPLEX */
  if (((state != NETCONN_NONE) &&
 801689a:	7afb      	ldrb	r3, [r7, #11]
 801689c:	2b00      	cmp	r3, #0
 801689e:	d005      	beq.n	80168ac <lwip_netconn_do_delconn+0x48>
 80168a0:	7afb      	ldrb	r3, [r7, #11]
 80168a2:	2b02      	cmp	r3, #2
 80168a4:	d002      	beq.n	80168ac <lwip_netconn_do_delconn+0x48>
       (state != NETCONN_LISTEN) &&
 80168a6:	7afb      	ldrb	r3, [r7, #11]
 80168a8:	2b03      	cmp	r3, #3
 80168aa:	d10a      	bne.n	80168c2 <lwip_netconn_do_delconn+0x5e>
       (state != NETCONN_CONNECT)) ||
 80168ac:	7afb      	ldrb	r3, [r7, #11]
 80168ae:	2b03      	cmp	r3, #3
 80168b0:	d10b      	bne.n	80168ca <lwip_netconn_do_delconn+0x66>
      ((state == NETCONN_CONNECT) && !IN_NONBLOCKING_CONNECT(msg->conn))) {
 80168b2:	68fb      	ldr	r3, [r7, #12]
 80168b4:	681b      	ldr	r3, [r3, #0]
 80168b6:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80168ba:	f003 0304 	and.w	r3, r3, #4
 80168be:	2b00      	cmp	r3, #0
 80168c0:	d103      	bne.n	80168ca <lwip_netconn_do_delconn+0x66>
    /* This means either a blocking write or blocking connect is running
       (nonblocking write returns and sets state to NONE) */
    msg->err = ERR_INPROGRESS;
 80168c2:	68fb      	ldr	r3, [r7, #12]
 80168c4:	22fb      	movs	r2, #251	@ 0xfb
 80168c6:	711a      	strb	r2, [r3, #4]
 80168c8:	e096      	b.n	80169f8 <lwip_netconn_do_delconn+0x194>
  } else
#endif /* LWIP_NETCONN_FULLDUPLEX */
  {
    LWIP_ASSERT("blocking connect in progress",
 80168ca:	7afb      	ldrb	r3, [r7, #11]
 80168cc:	2b03      	cmp	r3, #3
 80168ce:	d10e      	bne.n	80168ee <lwip_netconn_do_delconn+0x8a>
 80168d0:	68fb      	ldr	r3, [r7, #12]
 80168d2:	681b      	ldr	r3, [r3, #0]
 80168d4:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80168d8:	f003 0304 	and.w	r3, r3, #4
 80168dc:	2b00      	cmp	r3, #0
 80168de:	d106      	bne.n	80168ee <lwip_netconn_do_delconn+0x8a>
 80168e0:	4b4b      	ldr	r3, [pc, #300]	@ (8016a10 <lwip_netconn_do_delconn+0x1ac>)
 80168e2:	f240 427a 	movw	r2, #1146	@ 0x47a
 80168e6:	494d      	ldr	r1, [pc, #308]	@ (8016a1c <lwip_netconn_do_delconn+0x1b8>)
 80168e8:	484b      	ldr	r0, [pc, #300]	@ (8016a18 <lwip_netconn_do_delconn+0x1b4>)
 80168ea:	f013 f877 	bl	80299dc <iprintf>
                (state != NETCONN_CONNECT) || IN_NONBLOCKING_CONNECT(msg->conn));
    msg->err = ERR_OK;
 80168ee:	68fb      	ldr	r3, [r7, #12]
 80168f0:	2200      	movs	r2, #0
 80168f2:	711a      	strb	r2, [r3, #4]
#if LWIP_NETCONN_FULLDUPLEX
    /* Mark mboxes invalid */
    netconn_mark_mbox_invalid(msg->conn);
#else /* LWIP_NETCONN_FULLDUPLEX */
    netconn_drain(msg->conn);
 80168f4:	68fb      	ldr	r3, [r7, #12]
 80168f6:	681b      	ldr	r3, [r3, #0]
 80168f8:	4618      	mov	r0, r3
 80168fa:	f7ff fdcb 	bl	8016494 <netconn_drain>
#endif /* LWIP_NETCONN_FULLDUPLEX */

    if (msg->conn->pcb.tcp != NULL) {
 80168fe:	68fb      	ldr	r3, [r7, #12]
 8016900:	681b      	ldr	r3, [r3, #0]
 8016902:	685b      	ldr	r3, [r3, #4]
 8016904:	2b00      	cmp	r3, #0
 8016906:	d05d      	beq.n	80169c4 <lwip_netconn_do_delconn+0x160>

      switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8016908:	68fb      	ldr	r3, [r7, #12]
 801690a:	681b      	ldr	r3, [r3, #0]
 801690c:	781b      	ldrb	r3, [r3, #0]
 801690e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016912:	2b10      	cmp	r3, #16
 8016914:	d00d      	beq.n	8016932 <lwip_netconn_do_delconn+0xce>
 8016916:	2b20      	cmp	r3, #32
 8016918:	d14f      	bne.n	80169ba <lwip_netconn_do_delconn+0x156>
          raw_remove(msg->conn->pcb.raw);
          break;
#endif /* LWIP_RAW */
#if LWIP_UDP
        case NETCONN_UDP:
          msg->conn->pcb.udp->recv_arg = NULL;
 801691a:	68fb      	ldr	r3, [r7, #12]
 801691c:	681b      	ldr	r3, [r3, #0]
 801691e:	685b      	ldr	r3, [r3, #4]
 8016920:	2200      	movs	r2, #0
 8016922:	61da      	str	r2, [r3, #28]
          udp_remove(msg->conn->pcb.udp);
 8016924:	68fb      	ldr	r3, [r7, #12]
 8016926:	681b      	ldr	r3, [r3, #0]
 8016928:	685b      	ldr	r3, [r3, #4]
 801692a:	4618      	mov	r0, r3
 801692c:	f00a ffc6 	bl	80218bc <udp_remove>
          break;
 8016930:	e044      	b.n	80169bc <lwip_netconn_do_delconn+0x158>
#endif /* LWIP_UDP */
#if LWIP_TCP
        case NETCONN_TCP:
          LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 8016932:	68fb      	ldr	r3, [r7, #12]
 8016934:	681b      	ldr	r3, [r3, #0]
 8016936:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016938:	2b00      	cmp	r3, #0
 801693a:	d006      	beq.n	801694a <lwip_netconn_do_delconn+0xe6>
 801693c:	4b34      	ldr	r3, [pc, #208]	@ (8016a10 <lwip_netconn_do_delconn+0x1ac>)
 801693e:	f240 4294 	movw	r2, #1172	@ 0x494
 8016942:	4937      	ldr	r1, [pc, #220]	@ (8016a20 <lwip_netconn_do_delconn+0x1bc>)
 8016944:	4834      	ldr	r0, [pc, #208]	@ (8016a18 <lwip_netconn_do_delconn+0x1b4>)
 8016946:	f013 f849 	bl	80299dc <iprintf>
          msg->conn->state = NETCONN_CLOSE;
 801694a:	68fb      	ldr	r3, [r7, #12]
 801694c:	681b      	ldr	r3, [r3, #0]
 801694e:	2204      	movs	r2, #4
 8016950:	705a      	strb	r2, [r3, #1]
          msg->msg.sd.shut = NETCONN_SHUT_RDWR;
 8016952:	68fb      	ldr	r3, [r7, #12]
 8016954:	2203      	movs	r2, #3
 8016956:	721a      	strb	r2, [r3, #8]
          msg->conn->current_msg = msg;
 8016958:	68fb      	ldr	r3, [r7, #12]
 801695a:	681b      	ldr	r3, [r3, #0]
 801695c:	68fa      	ldr	r2, [r7, #12]
 801695e:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
          if (lwip_netconn_do_close_internal(msg->conn, 0) != ERR_OK) {
 8016960:	68fb      	ldr	r3, [r7, #12]
 8016962:	681b      	ldr	r3, [r3, #0]
 8016964:	2100      	movs	r1, #0
 8016966:	4618      	mov	r0, r3
 8016968:	f7ff fe12 	bl	8016590 <lwip_netconn_do_close_internal>
 801696c:	4603      	mov	r3, r0
 801696e:	2b00      	cmp	r3, #0
 8016970:	d049      	beq.n	8016a06 <lwip_netconn_do_delconn+0x1a2>
            LWIP_ASSERT("state!", msg->conn->state == NETCONN_CLOSE);
 8016972:	68fb      	ldr	r3, [r7, #12]
 8016974:	681b      	ldr	r3, [r3, #0]
 8016976:	785b      	ldrb	r3, [r3, #1]
 8016978:	2b04      	cmp	r3, #4
 801697a:	d006      	beq.n	801698a <lwip_netconn_do_delconn+0x126>
 801697c:	4b24      	ldr	r3, [pc, #144]	@ (8016a10 <lwip_netconn_do_delconn+0x1ac>)
 801697e:	f240 429a 	movw	r2, #1178	@ 0x49a
 8016982:	4928      	ldr	r1, [pc, #160]	@ (8016a24 <lwip_netconn_do_delconn+0x1c0>)
 8016984:	4824      	ldr	r0, [pc, #144]	@ (8016a18 <lwip_netconn_do_delconn+0x1b4>)
 8016986:	f013 f829 	bl	80299dc <iprintf>
            UNLOCK_TCPIP_CORE();
 801698a:	f7f9 fdcd 	bl	8010528 <sys_unlock_tcpip_core>
            sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 801698e:	68fb      	ldr	r3, [r7, #12]
 8016990:	681b      	ldr	r3, [r3, #0]
 8016992:	330c      	adds	r3, #12
 8016994:	2100      	movs	r1, #0
 8016996:	4618      	mov	r0, r3
 8016998:	f00f fcc3 	bl	8026322 <sys_arch_sem_wait>
            LOCK_TCPIP_CORE();
 801699c:	f7f9 fdb4 	bl	8010508 <sys_lock_tcpip_core>
            LWIP_ASSERT("state!", msg->conn->state == NETCONN_NONE);
 80169a0:	68fb      	ldr	r3, [r7, #12]
 80169a2:	681b      	ldr	r3, [r3, #0]
 80169a4:	785b      	ldrb	r3, [r3, #1]
 80169a6:	2b00      	cmp	r3, #0
 80169a8:	d02d      	beq.n	8016a06 <lwip_netconn_do_delconn+0x1a2>
 80169aa:	4b19      	ldr	r3, [pc, #100]	@ (8016a10 <lwip_netconn_do_delconn+0x1ac>)
 80169ac:	f240 429e 	movw	r2, #1182	@ 0x49e
 80169b0:	491c      	ldr	r1, [pc, #112]	@ (8016a24 <lwip_netconn_do_delconn+0x1c0>)
 80169b2:	4819      	ldr	r0, [pc, #100]	@ (8016a18 <lwip_netconn_do_delconn+0x1b4>)
 80169b4:	f013 f812 	bl	80299dc <iprintf>
#else /* LWIP_TCPIP_CORE_LOCKING */
          lwip_netconn_do_close_internal(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
          /* API_EVENT is called inside lwip_netconn_do_close_internal, before releasing
             the application thread, so we can return at this point! */
          return;
 80169b8:	e025      	b.n	8016a06 <lwip_netconn_do_delconn+0x1a2>
#endif /* LWIP_TCP */
        default:
          break;
 80169ba:	bf00      	nop
      }
      msg->conn->pcb.tcp = NULL;
 80169bc:	68fb      	ldr	r3, [r7, #12]
 80169be:	681b      	ldr	r3, [r3, #0]
 80169c0:	2200      	movs	r2, #0
 80169c2:	605a      	str	r2, [r3, #4]
    }
    /* tcp netconns don't come here! */

    /* @todo: this lets select make the socket readable and writable,
       which is wrong! errfd instead? */
    API_EVENT(msg->conn, NETCONN_EVT_RCVPLUS, 0);
 80169c4:	68fb      	ldr	r3, [r7, #12]
 80169c6:	681b      	ldr	r3, [r3, #0]
 80169c8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80169ca:	2b00      	cmp	r3, #0
 80169cc:	d007      	beq.n	80169de <lwip_netconn_do_delconn+0x17a>
 80169ce:	68fb      	ldr	r3, [r7, #12]
 80169d0:	681b      	ldr	r3, [r3, #0]
 80169d2:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80169d4:	68fa      	ldr	r2, [r7, #12]
 80169d6:	6810      	ldr	r0, [r2, #0]
 80169d8:	2200      	movs	r2, #0
 80169da:	2100      	movs	r1, #0
 80169dc:	4798      	blx	r3
    API_EVENT(msg->conn, NETCONN_EVT_SENDPLUS, 0);
 80169de:	68fb      	ldr	r3, [r7, #12]
 80169e0:	681b      	ldr	r3, [r3, #0]
 80169e2:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80169e4:	2b00      	cmp	r3, #0
 80169e6:	d007      	beq.n	80169f8 <lwip_netconn_do_delconn+0x194>
 80169e8:	68fb      	ldr	r3, [r7, #12]
 80169ea:	681b      	ldr	r3, [r3, #0]
 80169ec:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80169ee:	68fa      	ldr	r2, [r7, #12]
 80169f0:	6810      	ldr	r0, [r2, #0]
 80169f2:	2200      	movs	r2, #0
 80169f4:	2102      	movs	r1, #2
 80169f6:	4798      	blx	r3
  }
  if (sys_sem_valid(LWIP_API_MSG_SEM(msg))) {
 80169f8:	68fb      	ldr	r3, [r7, #12]
 80169fa:	681b      	ldr	r3, [r3, #0]
 80169fc:	330c      	adds	r3, #12
 80169fe:	4618      	mov	r0, r3
 8016a00:	f00f fcda 	bl	80263b8 <sys_sem_valid>
 8016a04:	e000      	b.n	8016a08 <lwip_netconn_do_delconn+0x1a4>
          return;
 8016a06:	bf00      	nop
    TCPIP_APIMSG_ACK(msg);
  }
}
 8016a08:	3710      	adds	r7, #16
 8016a0a:	46bd      	mov	sp, r7
 8016a0c:	bd80      	pop	{r7, pc}
 8016a0e:	bf00      	nop
 8016a10:	0802cf24 	.word	0x0802cf24
 8016a14:	0802d294 	.word	0x0802d294
 8016a18:	0802cf68 	.word	0x0802cf68
 8016a1c:	0802d2a8 	.word	0x0802d2a8
 8016a20:	0802d2c8 	.word	0x0802d2c8
 8016a24:	0802d2e4 	.word	0x0802d2e4

08016a28 <lwip_netconn_do_connected>:
 *
 * @see tcp.h (struct tcp_pcb.connected) for parameters and return values
 */
static err_t
lwip_netconn_do_connected(void *arg, struct tcp_pcb *pcb, err_t err)
{
 8016a28:	b580      	push	{r7, lr}
 8016a2a:	b088      	sub	sp, #32
 8016a2c:	af00      	add	r7, sp, #0
 8016a2e:	60f8      	str	r0, [r7, #12]
 8016a30:	60b9      	str	r1, [r7, #8]
 8016a32:	4613      	mov	r3, r2
 8016a34:	71fb      	strb	r3, [r7, #7]
  struct netconn *conn;
  int was_blocking;
  sys_sem_t *op_completed_sem = NULL;
 8016a36:	2300      	movs	r3, #0
 8016a38:	61fb      	str	r3, [r7, #28]

  LWIP_UNUSED_ARG(pcb);

  conn = (struct netconn *)arg;
 8016a3a:	68fb      	ldr	r3, [r7, #12]
 8016a3c:	61bb      	str	r3, [r7, #24]

  if (conn == NULL) {
 8016a3e:	69bb      	ldr	r3, [r7, #24]
 8016a40:	2b00      	cmp	r3, #0
 8016a42:	d102      	bne.n	8016a4a <lwip_netconn_do_connected+0x22>
    return ERR_VAL;
 8016a44:	f06f 0305 	mvn.w	r3, #5
 8016a48:	e074      	b.n	8016b34 <lwip_netconn_do_connected+0x10c>
  }

  LWIP_ASSERT("conn->state == NETCONN_CONNECT", conn->state == NETCONN_CONNECT);
 8016a4a:	69bb      	ldr	r3, [r7, #24]
 8016a4c:	785b      	ldrb	r3, [r3, #1]
 8016a4e:	2b03      	cmp	r3, #3
 8016a50:	d006      	beq.n	8016a60 <lwip_netconn_do_connected+0x38>
 8016a52:	4b3a      	ldr	r3, [pc, #232]	@ (8016b3c <lwip_netconn_do_connected+0x114>)
 8016a54:	f240 5223 	movw	r2, #1315	@ 0x523
 8016a58:	4939      	ldr	r1, [pc, #228]	@ (8016b40 <lwip_netconn_do_connected+0x118>)
 8016a5a:	483a      	ldr	r0, [pc, #232]	@ (8016b44 <lwip_netconn_do_connected+0x11c>)
 8016a5c:	f012 ffbe 	bl	80299dc <iprintf>
  LWIP_ASSERT("(conn->current_msg != NULL) || conn->in_non_blocking_connect",
 8016a60:	69bb      	ldr	r3, [r7, #24]
 8016a62:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016a64:	2b00      	cmp	r3, #0
 8016a66:	d10d      	bne.n	8016a84 <lwip_netconn_do_connected+0x5c>
 8016a68:	69bb      	ldr	r3, [r7, #24]
 8016a6a:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016a6e:	f003 0304 	and.w	r3, r3, #4
 8016a72:	2b00      	cmp	r3, #0
 8016a74:	d106      	bne.n	8016a84 <lwip_netconn_do_connected+0x5c>
 8016a76:	4b31      	ldr	r3, [pc, #196]	@ (8016b3c <lwip_netconn_do_connected+0x114>)
 8016a78:	f240 5224 	movw	r2, #1316	@ 0x524
 8016a7c:	4932      	ldr	r1, [pc, #200]	@ (8016b48 <lwip_netconn_do_connected+0x120>)
 8016a7e:	4831      	ldr	r0, [pc, #196]	@ (8016b44 <lwip_netconn_do_connected+0x11c>)
 8016a80:	f012 ffac 	bl	80299dc <iprintf>
              (conn->current_msg != NULL) || IN_NONBLOCKING_CONNECT(conn));

  if (conn->current_msg != NULL) {
 8016a84:	69bb      	ldr	r3, [r7, #24]
 8016a86:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016a88:	2b00      	cmp	r3, #0
 8016a8a:	d008      	beq.n	8016a9e <lwip_netconn_do_connected+0x76>
    conn->current_msg->err = err;
 8016a8c:	69bb      	ldr	r3, [r7, #24]
 8016a8e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016a90:	79fa      	ldrb	r2, [r7, #7]
 8016a92:	711a      	strb	r2, [r3, #4]
    op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 8016a94:	69bb      	ldr	r3, [r7, #24]
 8016a96:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016a98:	681b      	ldr	r3, [r3, #0]
 8016a9a:	330c      	adds	r3, #12
 8016a9c:	61fb      	str	r3, [r7, #28]
  }
  if ((NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP) && (err == ERR_OK)) {
 8016a9e:	69bb      	ldr	r3, [r7, #24]
 8016aa0:	781b      	ldrb	r3, [r3, #0]
 8016aa2:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016aa6:	2b10      	cmp	r3, #16
 8016aa8:	d106      	bne.n	8016ab8 <lwip_netconn_do_connected+0x90>
 8016aaa:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8016aae:	2b00      	cmp	r3, #0
 8016ab0:	d102      	bne.n	8016ab8 <lwip_netconn_do_connected+0x90>
    setup_tcp(conn);
 8016ab2:	69b8      	ldr	r0, [r7, #24]
 8016ab4:	f7ff fb82 	bl	80161bc <setup_tcp>
  }
  was_blocking = !IN_NONBLOCKING_CONNECT(conn);
 8016ab8:	69bb      	ldr	r3, [r7, #24]
 8016aba:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016abe:	f003 0304 	and.w	r3, r3, #4
 8016ac2:	2b00      	cmp	r3, #0
 8016ac4:	bf0c      	ite	eq
 8016ac6:	2301      	moveq	r3, #1
 8016ac8:	2300      	movne	r3, #0
 8016aca:	b2db      	uxtb	r3, r3
 8016acc:	617b      	str	r3, [r7, #20]
  SET_NONBLOCKING_CONNECT(conn, 0);
 8016ace:	69bb      	ldr	r3, [r7, #24]
 8016ad0:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016ad4:	f023 0304 	bic.w	r3, r3, #4
 8016ad8:	b2da      	uxtb	r2, r3
 8016ada:	69bb      	ldr	r3, [r7, #24]
 8016adc:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  LWIP_ASSERT("blocking connect state error",
 8016ae0:	697b      	ldr	r3, [r7, #20]
 8016ae2:	2b00      	cmp	r3, #0
 8016ae4:	d002      	beq.n	8016aec <lwip_netconn_do_connected+0xc4>
 8016ae6:	69fb      	ldr	r3, [r7, #28]
 8016ae8:	2b00      	cmp	r3, #0
 8016aea:	d10c      	bne.n	8016b06 <lwip_netconn_do_connected+0xde>
 8016aec:	697b      	ldr	r3, [r7, #20]
 8016aee:	2b00      	cmp	r3, #0
 8016af0:	d102      	bne.n	8016af8 <lwip_netconn_do_connected+0xd0>
 8016af2:	69fb      	ldr	r3, [r7, #28]
 8016af4:	2b00      	cmp	r3, #0
 8016af6:	d006      	beq.n	8016b06 <lwip_netconn_do_connected+0xde>
 8016af8:	4b10      	ldr	r3, [pc, #64]	@ (8016b3c <lwip_netconn_do_connected+0x114>)
 8016afa:	f44f 62a6 	mov.w	r2, #1328	@ 0x530
 8016afe:	4913      	ldr	r1, [pc, #76]	@ (8016b4c <lwip_netconn_do_connected+0x124>)
 8016b00:	4810      	ldr	r0, [pc, #64]	@ (8016b44 <lwip_netconn_do_connected+0x11c>)
 8016b02:	f012 ff6b 	bl	80299dc <iprintf>
              (was_blocking && op_completed_sem != NULL) ||
              (!was_blocking && op_completed_sem == NULL));
  conn->current_msg = NULL;
 8016b06:	69bb      	ldr	r3, [r7, #24]
 8016b08:	2200      	movs	r2, #0
 8016b0a:	62da      	str	r2, [r3, #44]	@ 0x2c
  conn->state = NETCONN_NONE;
 8016b0c:	69bb      	ldr	r3, [r7, #24]
 8016b0e:	2200      	movs	r2, #0
 8016b10:	705a      	strb	r2, [r3, #1]
  API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 8016b12:	69bb      	ldr	r3, [r7, #24]
 8016b14:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016b16:	2b00      	cmp	r3, #0
 8016b18:	d005      	beq.n	8016b26 <lwip_netconn_do_connected+0xfe>
 8016b1a:	69bb      	ldr	r3, [r7, #24]
 8016b1c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016b1e:	2200      	movs	r2, #0
 8016b20:	2102      	movs	r1, #2
 8016b22:	69b8      	ldr	r0, [r7, #24]
 8016b24:	4798      	blx	r3

  if (was_blocking) {
 8016b26:	697b      	ldr	r3, [r7, #20]
 8016b28:	2b00      	cmp	r3, #0
 8016b2a:	d002      	beq.n	8016b32 <lwip_netconn_do_connected+0x10a>
    sys_sem_signal(op_completed_sem);
 8016b2c:	69f8      	ldr	r0, [r7, #28]
 8016b2e:	f00f fc29 	bl	8026384 <sys_sem_signal>
  }
  return ERR_OK;
 8016b32:	2300      	movs	r3, #0
}
 8016b34:	4618      	mov	r0, r3
 8016b36:	3720      	adds	r7, #32
 8016b38:	46bd      	mov	sp, r7
 8016b3a:	bd80      	pop	{r7, pc}
 8016b3c:	0802cf24 	.word	0x0802cf24
 8016b40:	0802d2ec 	.word	0x0802d2ec
 8016b44:	0802cf68 	.word	0x0802cf68
 8016b48:	0802d30c 	.word	0x0802d30c
 8016b4c:	0802d34c 	.word	0x0802d34c

08016b50 <lwip_netconn_do_connect>:
 * @param m the api_msg pointing to the connection and containing
 *          the IP address and port to connect to
 */
void
lwip_netconn_do_connect(void *m)
{
 8016b50:	b580      	push	{r7, lr}
 8016b52:	b086      	sub	sp, #24
 8016b54:	af00      	add	r7, sp, #0
 8016b56:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8016b58:	687b      	ldr	r3, [r7, #4]
 8016b5a:	613b      	str	r3, [r7, #16]
  err_t err;

  if (msg->conn->pcb.tcp == NULL) {
 8016b5c:	693b      	ldr	r3, [r7, #16]
 8016b5e:	681b      	ldr	r3, [r3, #0]
 8016b60:	685b      	ldr	r3, [r3, #4]
 8016b62:	2b00      	cmp	r3, #0
 8016b64:	d102      	bne.n	8016b6c <lwip_netconn_do_connect+0x1c>
    /* This may happen when calling netconn_connect() a second time */
    err = ERR_CLSD;
 8016b66:	23f1      	movs	r3, #241	@ 0xf1
 8016b68:	75fb      	strb	r3, [r7, #23]
 8016b6a:	e09e      	b.n	8016caa <lwip_netconn_do_connect+0x15a>
  } else {
    switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8016b6c:	693b      	ldr	r3, [r7, #16]
 8016b6e:	681b      	ldr	r3, [r3, #0]
 8016b70:	781b      	ldrb	r3, [r3, #0]
 8016b72:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016b76:	2b10      	cmp	r3, #16
 8016b78:	d00f      	beq.n	8016b9a <lwip_netconn_do_connect+0x4a>
 8016b7a:	2b20      	cmp	r3, #32
 8016b7c:	f040 808a 	bne.w	8016c94 <lwip_netconn_do_connect+0x144>
        err = raw_connect(msg->conn->pcb.raw, API_EXPR_REF(msg->msg.bc.ipaddr));
        break;
#endif /* LWIP_RAW */
#if LWIP_UDP
      case NETCONN_UDP:
        err = udp_connect(msg->conn->pcb.udp, API_EXPR_REF(msg->msg.bc.ipaddr), msg->msg.bc.port);
 8016b80:	693b      	ldr	r3, [r7, #16]
 8016b82:	681b      	ldr	r3, [r3, #0]
 8016b84:	6858      	ldr	r0, [r3, #4]
 8016b86:	693b      	ldr	r3, [r7, #16]
 8016b88:	6899      	ldr	r1, [r3, #8]
 8016b8a:	693b      	ldr	r3, [r7, #16]
 8016b8c:	899b      	ldrh	r3, [r3, #12]
 8016b8e:	461a      	mov	r2, r3
 8016b90:	f00a fdd8 	bl	8021744 <udp_connect>
 8016b94:	4603      	mov	r3, r0
 8016b96:	75fb      	strb	r3, [r7, #23]
        break;
 8016b98:	e087      	b.n	8016caa <lwip_netconn_do_connect+0x15a>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case NETCONN_TCP:
        /* Prevent connect while doing any other action. */
        if (msg->conn->state == NETCONN_CONNECT) {
 8016b9a:	693b      	ldr	r3, [r7, #16]
 8016b9c:	681b      	ldr	r3, [r3, #0]
 8016b9e:	785b      	ldrb	r3, [r3, #1]
 8016ba0:	2b03      	cmp	r3, #3
 8016ba2:	d102      	bne.n	8016baa <lwip_netconn_do_connect+0x5a>
          err = ERR_ALREADY;
 8016ba4:	23f7      	movs	r3, #247	@ 0xf7
 8016ba6:	75fb      	strb	r3, [r7, #23]
#endif /* LWIP_TCPIP_CORE_LOCKING */
              return;
            }
          }
        }
        break;
 8016ba8:	e07e      	b.n	8016ca8 <lwip_netconn_do_connect+0x158>
        } else if (msg->conn->state != NETCONN_NONE) {
 8016baa:	693b      	ldr	r3, [r7, #16]
 8016bac:	681b      	ldr	r3, [r3, #0]
 8016bae:	785b      	ldrb	r3, [r3, #1]
 8016bb0:	2b00      	cmp	r3, #0
 8016bb2:	d002      	beq.n	8016bba <lwip_netconn_do_connect+0x6a>
          err = ERR_ISCONN;
 8016bb4:	23f6      	movs	r3, #246	@ 0xf6
 8016bb6:	75fb      	strb	r3, [r7, #23]
        break;
 8016bb8:	e076      	b.n	8016ca8 <lwip_netconn_do_connect+0x158>
          setup_tcp(msg->conn);
 8016bba:	693b      	ldr	r3, [r7, #16]
 8016bbc:	681b      	ldr	r3, [r3, #0]
 8016bbe:	4618      	mov	r0, r3
 8016bc0:	f7ff fafc 	bl	80161bc <setup_tcp>
          err = tcp_connect(msg->conn->pcb.tcp, API_EXPR_REF(msg->msg.bc.ipaddr),
 8016bc4:	693b      	ldr	r3, [r7, #16]
 8016bc6:	681b      	ldr	r3, [r3, #0]
 8016bc8:	6858      	ldr	r0, [r3, #4]
 8016bca:	693b      	ldr	r3, [r7, #16]
 8016bcc:	6899      	ldr	r1, [r3, #8]
 8016bce:	693b      	ldr	r3, [r7, #16]
 8016bd0:	899a      	ldrh	r2, [r3, #12]
 8016bd2:	4b3a      	ldr	r3, [pc, #232]	@ (8016cbc <lwip_netconn_do_connect+0x16c>)
 8016bd4:	f004 fb90 	bl	801b2f8 <tcp_connect>
 8016bd8:	4603      	mov	r3, r0
 8016bda:	75fb      	strb	r3, [r7, #23]
          if (err == ERR_OK) {
 8016bdc:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8016be0:	2b00      	cmp	r3, #0
 8016be2:	d161      	bne.n	8016ca8 <lwip_netconn_do_connect+0x158>
            u8_t non_blocking = netconn_is_nonblocking(msg->conn);
 8016be4:	693b      	ldr	r3, [r7, #16]
 8016be6:	681b      	ldr	r3, [r3, #0]
 8016be8:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016bec:	f003 0302 	and.w	r3, r3, #2
 8016bf0:	2b00      	cmp	r3, #0
 8016bf2:	bf14      	ite	ne
 8016bf4:	2301      	movne	r3, #1
 8016bf6:	2300      	moveq	r3, #0
 8016bf8:	b2db      	uxtb	r3, r3
 8016bfa:	73fb      	strb	r3, [r7, #15]
            msg->conn->state = NETCONN_CONNECT;
 8016bfc:	693b      	ldr	r3, [r7, #16]
 8016bfe:	681b      	ldr	r3, [r3, #0]
 8016c00:	2203      	movs	r2, #3
 8016c02:	705a      	strb	r2, [r3, #1]
            SET_NONBLOCKING_CONNECT(msg->conn, non_blocking);
 8016c04:	7bfb      	ldrb	r3, [r7, #15]
 8016c06:	2b00      	cmp	r3, #0
 8016c08:	d00b      	beq.n	8016c22 <lwip_netconn_do_connect+0xd2>
 8016c0a:	693b      	ldr	r3, [r7, #16]
 8016c0c:	681b      	ldr	r3, [r3, #0]
 8016c0e:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 8016c12:	693b      	ldr	r3, [r7, #16]
 8016c14:	681b      	ldr	r3, [r3, #0]
 8016c16:	f042 0204 	orr.w	r2, r2, #4
 8016c1a:	b2d2      	uxtb	r2, r2
 8016c1c:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 8016c20:	e00a      	b.n	8016c38 <lwip_netconn_do_connect+0xe8>
 8016c22:	693b      	ldr	r3, [r7, #16]
 8016c24:	681b      	ldr	r3, [r3, #0]
 8016c26:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 8016c2a:	693b      	ldr	r3, [r7, #16]
 8016c2c:	681b      	ldr	r3, [r3, #0]
 8016c2e:	f022 0204 	bic.w	r2, r2, #4
 8016c32:	b2d2      	uxtb	r2, r2
 8016c34:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
            if (non_blocking) {
 8016c38:	7bfb      	ldrb	r3, [r7, #15]
 8016c3a:	2b00      	cmp	r3, #0
 8016c3c:	d002      	beq.n	8016c44 <lwip_netconn_do_connect+0xf4>
              err = ERR_INPROGRESS;
 8016c3e:	23fb      	movs	r3, #251	@ 0xfb
 8016c40:	75fb      	strb	r3, [r7, #23]
        break;
 8016c42:	e031      	b.n	8016ca8 <lwip_netconn_do_connect+0x158>
              msg->conn->current_msg = msg;
 8016c44:	693b      	ldr	r3, [r7, #16]
 8016c46:	681b      	ldr	r3, [r3, #0]
 8016c48:	693a      	ldr	r2, [r7, #16]
 8016c4a:	62da      	str	r2, [r3, #44]	@ 0x2c
              LWIP_ASSERT("state!", msg->conn->state == NETCONN_CONNECT);
 8016c4c:	693b      	ldr	r3, [r7, #16]
 8016c4e:	681b      	ldr	r3, [r3, #0]
 8016c50:	785b      	ldrb	r3, [r3, #1]
 8016c52:	2b03      	cmp	r3, #3
 8016c54:	d006      	beq.n	8016c64 <lwip_netconn_do_connect+0x114>
 8016c56:	4b1a      	ldr	r3, [pc, #104]	@ (8016cc0 <lwip_netconn_do_connect+0x170>)
 8016c58:	f44f 62ae 	mov.w	r2, #1392	@ 0x570
 8016c5c:	4919      	ldr	r1, [pc, #100]	@ (8016cc4 <lwip_netconn_do_connect+0x174>)
 8016c5e:	481a      	ldr	r0, [pc, #104]	@ (8016cc8 <lwip_netconn_do_connect+0x178>)
 8016c60:	f012 febc 	bl	80299dc <iprintf>
              UNLOCK_TCPIP_CORE();
 8016c64:	f7f9 fc60 	bl	8010528 <sys_unlock_tcpip_core>
              sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 8016c68:	693b      	ldr	r3, [r7, #16]
 8016c6a:	681b      	ldr	r3, [r3, #0]
 8016c6c:	330c      	adds	r3, #12
 8016c6e:	2100      	movs	r1, #0
 8016c70:	4618      	mov	r0, r3
 8016c72:	f00f fb56 	bl	8026322 <sys_arch_sem_wait>
              LOCK_TCPIP_CORE();
 8016c76:	f7f9 fc47 	bl	8010508 <sys_lock_tcpip_core>
              LWIP_ASSERT("state!", msg->conn->state != NETCONN_CONNECT);
 8016c7a:	693b      	ldr	r3, [r7, #16]
 8016c7c:	681b      	ldr	r3, [r3, #0]
 8016c7e:	785b      	ldrb	r3, [r3, #1]
 8016c80:	2b03      	cmp	r3, #3
 8016c82:	d116      	bne.n	8016cb2 <lwip_netconn_do_connect+0x162>
 8016c84:	4b0e      	ldr	r3, [pc, #56]	@ (8016cc0 <lwip_netconn_do_connect+0x170>)
 8016c86:	f240 5274 	movw	r2, #1396	@ 0x574
 8016c8a:	490e      	ldr	r1, [pc, #56]	@ (8016cc4 <lwip_netconn_do_connect+0x174>)
 8016c8c:	480e      	ldr	r0, [pc, #56]	@ (8016cc8 <lwip_netconn_do_connect+0x178>)
 8016c8e:	f012 fea5 	bl	80299dc <iprintf>
              return;
 8016c92:	e00e      	b.n	8016cb2 <lwip_netconn_do_connect+0x162>
#endif /* LWIP_TCP */
      default:
        LWIP_ERROR("Invalid netconn type", 0, do {
 8016c94:	4b0a      	ldr	r3, [pc, #40]	@ (8016cc0 <lwip_netconn_do_connect+0x170>)
 8016c96:	f240 527d 	movw	r2, #1405	@ 0x57d
 8016c9a:	490c      	ldr	r1, [pc, #48]	@ (8016ccc <lwip_netconn_do_connect+0x17c>)
 8016c9c:	480a      	ldr	r0, [pc, #40]	@ (8016cc8 <lwip_netconn_do_connect+0x178>)
 8016c9e:	f012 fe9d 	bl	80299dc <iprintf>
 8016ca2:	23fa      	movs	r3, #250	@ 0xfa
 8016ca4:	75fb      	strb	r3, [r7, #23]
          err = ERR_VAL;
        } while (0));
        break;
 8016ca6:	e000      	b.n	8016caa <lwip_netconn_do_connect+0x15a>
        break;
 8016ca8:	bf00      	nop
    }
  }
  msg->err = err;
 8016caa:	693b      	ldr	r3, [r7, #16]
 8016cac:	7dfa      	ldrb	r2, [r7, #23]
 8016cae:	711a      	strb	r2, [r3, #4]
 8016cb0:	e000      	b.n	8016cb4 <lwip_netconn_do_connect+0x164>
              return;
 8016cb2:	bf00      	nop
  /* For all other protocols, netconn_connect() calls netconn_apimsg(),
     so use TCPIP_APIMSG_ACK() here. */
  TCPIP_APIMSG_ACK(msg);
}
 8016cb4:	3718      	adds	r7, #24
 8016cb6:	46bd      	mov	sp, r7
 8016cb8:	bd80      	pop	{r7, pc}
 8016cba:	bf00      	nop
 8016cbc:	08016a29 	.word	0x08016a29
 8016cc0:	0802cf24 	.word	0x0802cf24
 8016cc4:	0802d2e4 	.word	0x0802d2e4
 8016cc8:	0802cf68 	.word	0x0802cf68
 8016ccc:	0802d36c 	.word	0x0802d36c

08016cd0 <lwip_netconn_do_disconnect>:
 *
 * @param m the api_msg pointing to the connection to disconnect
 */
void
lwip_netconn_do_disconnect(void *m)
{
 8016cd0:	b580      	push	{r7, lr}
 8016cd2:	b084      	sub	sp, #16
 8016cd4:	af00      	add	r7, sp, #0
 8016cd6:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8016cd8:	687b      	ldr	r3, [r7, #4]
 8016cda:	60fb      	str	r3, [r7, #12]

#if LWIP_UDP
  if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_UDP) {
 8016cdc:	68fb      	ldr	r3, [r7, #12]
 8016cde:	681b      	ldr	r3, [r3, #0]
 8016ce0:	781b      	ldrb	r3, [r3, #0]
 8016ce2:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016ce6:	2b20      	cmp	r3, #32
 8016ce8:	d109      	bne.n	8016cfe <lwip_netconn_do_disconnect+0x2e>
    udp_disconnect(msg->conn->pcb.udp);
 8016cea:	68fb      	ldr	r3, [r7, #12]
 8016cec:	681b      	ldr	r3, [r3, #0]
 8016cee:	685b      	ldr	r3, [r3, #4]
 8016cf0:	4618      	mov	r0, r3
 8016cf2:	f00a fd97 	bl	8021824 <udp_disconnect>
    msg->err = ERR_OK;
 8016cf6:	68fb      	ldr	r3, [r7, #12]
 8016cf8:	2200      	movs	r2, #0
 8016cfa:	711a      	strb	r2, [r3, #4]
#endif /* LWIP_UDP */
  {
    msg->err = ERR_VAL;
  }
  TCPIP_APIMSG_ACK(msg);
}
 8016cfc:	e002      	b.n	8016d04 <lwip_netconn_do_disconnect+0x34>
    msg->err = ERR_VAL;
 8016cfe:	68fb      	ldr	r3, [r7, #12]
 8016d00:	22fa      	movs	r2, #250	@ 0xfa
 8016d02:	711a      	strb	r2, [r3, #4]
}
 8016d04:	bf00      	nop
 8016d06:	3710      	adds	r7, #16
 8016d08:	46bd      	mov	sp, r7
 8016d0a:	bd80      	pop	{r7, pc}

08016d0c <lwip_netconn_do_send>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_send(void *m)
{
 8016d0c:	b580      	push	{r7, lr}
 8016d0e:	b084      	sub	sp, #16
 8016d10:	af00      	add	r7, sp, #0
 8016d12:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8016d14:	687b      	ldr	r3, [r7, #4]
 8016d16:	60bb      	str	r3, [r7, #8]

  err_t err = netconn_err(msg->conn);
 8016d18:	68bb      	ldr	r3, [r7, #8]
 8016d1a:	681b      	ldr	r3, [r3, #0]
 8016d1c:	4618      	mov	r0, r3
 8016d1e:	f7fe fef9 	bl	8015b14 <netconn_err>
 8016d22:	4603      	mov	r3, r0
 8016d24:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 8016d26:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8016d2a:	2b00      	cmp	r3, #0
 8016d2c:	d134      	bne.n	8016d98 <lwip_netconn_do_send+0x8c>
    if (msg->conn->pcb.tcp != NULL) {
 8016d2e:	68bb      	ldr	r3, [r7, #8]
 8016d30:	681b      	ldr	r3, [r3, #0]
 8016d32:	685b      	ldr	r3, [r3, #4]
 8016d34:	2b00      	cmp	r3, #0
 8016d36:	d02d      	beq.n	8016d94 <lwip_netconn_do_send+0x88>
      switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8016d38:	68bb      	ldr	r3, [r7, #8]
 8016d3a:	681b      	ldr	r3, [r3, #0]
 8016d3c:	781b      	ldrb	r3, [r3, #0]
 8016d3e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016d42:	2b20      	cmp	r3, #32
 8016d44:	d123      	bne.n	8016d8e <lwip_netconn_do_send+0x82>
            err = udp_sendto_chksum(msg->conn->pcb.udp, msg->msg.b->p,
                                    &msg->msg.b->addr, msg->msg.b->port,
                                    msg->msg.b->flags & NETBUF_FLAG_CHKSUM, msg->msg.b->toport_chksum);
          }
#else /* LWIP_CHECKSUM_ON_COPY */
          if (ip_addr_isany_val(msg->msg.b->addr) || IP_IS_ANY_TYPE_VAL(msg->msg.b->addr)) {
 8016d46:	68bb      	ldr	r3, [r7, #8]
 8016d48:	689b      	ldr	r3, [r3, #8]
 8016d4a:	689b      	ldr	r3, [r3, #8]
 8016d4c:	2b00      	cmp	r3, #0
 8016d4e:	d10c      	bne.n	8016d6a <lwip_netconn_do_send+0x5e>
            err = udp_send(msg->conn->pcb.udp, msg->msg.b->p);
 8016d50:	68bb      	ldr	r3, [r7, #8]
 8016d52:	681b      	ldr	r3, [r3, #0]
 8016d54:	685a      	ldr	r2, [r3, #4]
 8016d56:	68bb      	ldr	r3, [r7, #8]
 8016d58:	689b      	ldr	r3, [r3, #8]
 8016d5a:	681b      	ldr	r3, [r3, #0]
 8016d5c:	4619      	mov	r1, r3
 8016d5e:	4610      	mov	r0, r2
 8016d60:	f00a fa7a 	bl	8021258 <udp_send>
 8016d64:	4603      	mov	r3, r0
 8016d66:	73fb      	strb	r3, [r7, #15]
          } else {
            err = udp_sendto(msg->conn->pcb.udp, msg->msg.b->p, &msg->msg.b->addr, msg->msg.b->port);
          }
#endif /* LWIP_CHECKSUM_ON_COPY */
          break;
 8016d68:	e016      	b.n	8016d98 <lwip_netconn_do_send+0x8c>
            err = udp_sendto(msg->conn->pcb.udp, msg->msg.b->p, &msg->msg.b->addr, msg->msg.b->port);
 8016d6a:	68bb      	ldr	r3, [r7, #8]
 8016d6c:	681b      	ldr	r3, [r3, #0]
 8016d6e:	6858      	ldr	r0, [r3, #4]
 8016d70:	68bb      	ldr	r3, [r7, #8]
 8016d72:	689b      	ldr	r3, [r3, #8]
 8016d74:	6819      	ldr	r1, [r3, #0]
 8016d76:	68bb      	ldr	r3, [r7, #8]
 8016d78:	689b      	ldr	r3, [r3, #8]
 8016d7a:	f103 0208 	add.w	r2, r3, #8
 8016d7e:	68bb      	ldr	r3, [r7, #8]
 8016d80:	689b      	ldr	r3, [r3, #8]
 8016d82:	899b      	ldrh	r3, [r3, #12]
 8016d84:	f00a fa9c 	bl	80212c0 <udp_sendto>
 8016d88:	4603      	mov	r3, r0
 8016d8a:	73fb      	strb	r3, [r7, #15]
          break;
 8016d8c:	e004      	b.n	8016d98 <lwip_netconn_do_send+0x8c>
#endif /* LWIP_UDP */
        default:
          err = ERR_CONN;
 8016d8e:	23f5      	movs	r3, #245	@ 0xf5
 8016d90:	73fb      	strb	r3, [r7, #15]
          break;
 8016d92:	e001      	b.n	8016d98 <lwip_netconn_do_send+0x8c>
      }
    } else {
      err = ERR_CONN;
 8016d94:	23f5      	movs	r3, #245	@ 0xf5
 8016d96:	73fb      	strb	r3, [r7, #15]
    }
  }
  msg->err = err;
 8016d98:	68bb      	ldr	r3, [r7, #8]
 8016d9a:	7bfa      	ldrb	r2, [r7, #15]
 8016d9c:	711a      	strb	r2, [r3, #4]
  TCPIP_APIMSG_ACK(msg);
}
 8016d9e:	bf00      	nop
 8016da0:	3710      	adds	r7, #16
 8016da2:	46bd      	mov	sp, r7
 8016da4:	bd80      	pop	{r7, pc}

08016da6 <lwip_netconn_do_recv>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_recv(void *m)
{
 8016da6:	b580      	push	{r7, lr}
 8016da8:	b086      	sub	sp, #24
 8016daa:	af00      	add	r7, sp, #0
 8016dac:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8016dae:	687b      	ldr	r3, [r7, #4]
 8016db0:	613b      	str	r3, [r7, #16]

  msg->err = ERR_OK;
 8016db2:	693b      	ldr	r3, [r7, #16]
 8016db4:	2200      	movs	r2, #0
 8016db6:	711a      	strb	r2, [r3, #4]
  if (msg->conn->pcb.tcp != NULL) {
 8016db8:	693b      	ldr	r3, [r7, #16]
 8016dba:	681b      	ldr	r3, [r3, #0]
 8016dbc:	685b      	ldr	r3, [r3, #4]
 8016dbe:	2b00      	cmp	r3, #0
 8016dc0:	d022      	beq.n	8016e08 <lwip_netconn_do_recv+0x62>
    if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) {
 8016dc2:	693b      	ldr	r3, [r7, #16]
 8016dc4:	681b      	ldr	r3, [r3, #0]
 8016dc6:	781b      	ldrb	r3, [r3, #0]
 8016dc8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016dcc:	2b10      	cmp	r3, #16
 8016dce:	d11b      	bne.n	8016e08 <lwip_netconn_do_recv+0x62>
      size_t remaining = msg->msg.r.len;
 8016dd0:	693b      	ldr	r3, [r7, #16]
 8016dd2:	689b      	ldr	r3, [r3, #8]
 8016dd4:	617b      	str	r3, [r7, #20]
      do {
        u16_t recved = (u16_t)((remaining > 0xffff) ? 0xffff : remaining);
 8016dd6:	697b      	ldr	r3, [r7, #20]
 8016dd8:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8016ddc:	d202      	bcs.n	8016de4 <lwip_netconn_do_recv+0x3e>
 8016dde:	697b      	ldr	r3, [r7, #20]
 8016de0:	b29b      	uxth	r3, r3
 8016de2:	e001      	b.n	8016de8 <lwip_netconn_do_recv+0x42>
 8016de4:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8016de8:	81fb      	strh	r3, [r7, #14]
        tcp_recved(msg->conn->pcb.tcp, recved);
 8016dea:	693b      	ldr	r3, [r7, #16]
 8016dec:	681b      	ldr	r3, [r3, #0]
 8016dee:	685b      	ldr	r3, [r3, #4]
 8016df0:	89fa      	ldrh	r2, [r7, #14]
 8016df2:	4611      	mov	r1, r2
 8016df4:	4618      	mov	r0, r3
 8016df6:	f004 f9e5 	bl	801b1c4 <tcp_recved>
        remaining -= recved;
 8016dfa:	89fb      	ldrh	r3, [r7, #14]
 8016dfc:	697a      	ldr	r2, [r7, #20]
 8016dfe:	1ad3      	subs	r3, r2, r3
 8016e00:	617b      	str	r3, [r7, #20]
      } while (remaining != 0);
 8016e02:	697b      	ldr	r3, [r7, #20]
 8016e04:	2b00      	cmp	r3, #0
 8016e06:	d1e6      	bne.n	8016dd6 <lwip_netconn_do_recv+0x30>
    }
  }
  TCPIP_APIMSG_ACK(msg);
}
 8016e08:	bf00      	nop
 8016e0a:	3718      	adds	r7, #24
 8016e0c:	46bd      	mov	sp, r7
 8016e0e:	bd80      	pop	{r7, pc}

08016e10 <lwip_netconn_do_writemore>:
 * @return ERR_OK
 *         ERR_MEM if LWIP_TCPIP_CORE_LOCKING=1 and sending hasn't yet finished
 */
static err_t
lwip_netconn_do_writemore(struct netconn *conn  WRITE_DELAYED_PARAM)
{
 8016e10:	b580      	push	{r7, lr}
 8016e12:	b088      	sub	sp, #32
 8016e14:	af00      	add	r7, sp, #0
 8016e16:	6078      	str	r0, [r7, #4]
 8016e18:	460b      	mov	r3, r1
 8016e1a:	70fb      	strb	r3, [r7, #3]
  err_t err;
  const void *dataptr;
  u16_t len, available;
  u8_t write_finished = 0;
 8016e1c:	2300      	movs	r3, #0
 8016e1e:	76fb      	strb	r3, [r7, #27]
  size_t diff;
  u8_t dontblock;
  u8_t apiflags;
  u8_t write_more;

  LWIP_ASSERT("conn != NULL", conn != NULL);
 8016e20:	687b      	ldr	r3, [r7, #4]
 8016e22:	2b00      	cmp	r3, #0
 8016e24:	d106      	bne.n	8016e34 <lwip_netconn_do_writemore+0x24>
 8016e26:	4b61      	ldr	r3, [pc, #388]	@ (8016fac <lwip_netconn_do_writemore+0x19c>)
 8016e28:	f240 6273 	movw	r2, #1651	@ 0x673
 8016e2c:	4960      	ldr	r1, [pc, #384]	@ (8016fb0 <lwip_netconn_do_writemore+0x1a0>)
 8016e2e:	4861      	ldr	r0, [pc, #388]	@ (8016fb4 <lwip_netconn_do_writemore+0x1a4>)
 8016e30:	f012 fdd4 	bl	80299dc <iprintf>
  LWIP_ASSERT("conn->state == NETCONN_WRITE", (conn->state == NETCONN_WRITE));
 8016e34:	687b      	ldr	r3, [r7, #4]
 8016e36:	785b      	ldrb	r3, [r3, #1]
 8016e38:	2b01      	cmp	r3, #1
 8016e3a:	d006      	beq.n	8016e4a <lwip_netconn_do_writemore+0x3a>
 8016e3c:	4b5b      	ldr	r3, [pc, #364]	@ (8016fac <lwip_netconn_do_writemore+0x19c>)
 8016e3e:	f240 6274 	movw	r2, #1652	@ 0x674
 8016e42:	495d      	ldr	r1, [pc, #372]	@ (8016fb8 <lwip_netconn_do_writemore+0x1a8>)
 8016e44:	485b      	ldr	r0, [pc, #364]	@ (8016fb4 <lwip_netconn_do_writemore+0x1a4>)
 8016e46:	f012 fdc9 	bl	80299dc <iprintf>
  LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 8016e4a:	687b      	ldr	r3, [r7, #4]
 8016e4c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016e4e:	2b00      	cmp	r3, #0
 8016e50:	d106      	bne.n	8016e60 <lwip_netconn_do_writemore+0x50>
 8016e52:	4b56      	ldr	r3, [pc, #344]	@ (8016fac <lwip_netconn_do_writemore+0x19c>)
 8016e54:	f240 6275 	movw	r2, #1653	@ 0x675
 8016e58:	4958      	ldr	r1, [pc, #352]	@ (8016fbc <lwip_netconn_do_writemore+0x1ac>)
 8016e5a:	4856      	ldr	r0, [pc, #344]	@ (8016fb4 <lwip_netconn_do_writemore+0x1a4>)
 8016e5c:	f012 fdbe 	bl	80299dc <iprintf>
  LWIP_ASSERT("conn->pcb.tcp != NULL", conn->pcb.tcp != NULL);
 8016e60:	687b      	ldr	r3, [r7, #4]
 8016e62:	685b      	ldr	r3, [r3, #4]
 8016e64:	2b00      	cmp	r3, #0
 8016e66:	d106      	bne.n	8016e76 <lwip_netconn_do_writemore+0x66>
 8016e68:	4b50      	ldr	r3, [pc, #320]	@ (8016fac <lwip_netconn_do_writemore+0x19c>)
 8016e6a:	f240 6276 	movw	r2, #1654	@ 0x676
 8016e6e:	4954      	ldr	r1, [pc, #336]	@ (8016fc0 <lwip_netconn_do_writemore+0x1b0>)
 8016e70:	4850      	ldr	r0, [pc, #320]	@ (8016fb4 <lwip_netconn_do_writemore+0x1a4>)
 8016e72:	f012 fdb3 	bl	80299dc <iprintf>
  LWIP_ASSERT("conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len",
 8016e76:	687b      	ldr	r3, [r7, #4]
 8016e78:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016e7a:	699a      	ldr	r2, [r3, #24]
 8016e7c:	687b      	ldr	r3, [r7, #4]
 8016e7e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016e80:	695b      	ldr	r3, [r3, #20]
 8016e82:	429a      	cmp	r2, r3
 8016e84:	d306      	bcc.n	8016e94 <lwip_netconn_do_writemore+0x84>
 8016e86:	4b49      	ldr	r3, [pc, #292]	@ (8016fac <lwip_netconn_do_writemore+0x19c>)
 8016e88:	f240 6277 	movw	r2, #1655	@ 0x677
 8016e8c:	494d      	ldr	r1, [pc, #308]	@ (8016fc4 <lwip_netconn_do_writemore+0x1b4>)
 8016e8e:	4849      	ldr	r0, [pc, #292]	@ (8016fb4 <lwip_netconn_do_writemore+0x1a4>)
 8016e90:	f012 fda4 	bl	80299dc <iprintf>
              conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len);
  LWIP_ASSERT("conn->current_msg->msg.w.vector_cnt > 0", conn->current_msg->msg.w.vector_cnt > 0);
 8016e94:	687b      	ldr	r3, [r7, #4]
 8016e96:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016e98:	899b      	ldrh	r3, [r3, #12]
 8016e9a:	2b00      	cmp	r3, #0
 8016e9c:	d106      	bne.n	8016eac <lwip_netconn_do_writemore+0x9c>
 8016e9e:	4b43      	ldr	r3, [pc, #268]	@ (8016fac <lwip_netconn_do_writemore+0x19c>)
 8016ea0:	f240 6279 	movw	r2, #1657	@ 0x679
 8016ea4:	4948      	ldr	r1, [pc, #288]	@ (8016fc8 <lwip_netconn_do_writemore+0x1b8>)
 8016ea6:	4843      	ldr	r0, [pc, #268]	@ (8016fb4 <lwip_netconn_do_writemore+0x1a4>)
 8016ea8:	f012 fd98 	bl	80299dc <iprintf>

  apiflags = conn->current_msg->msg.w.apiflags;
 8016eac:	687b      	ldr	r3, [r7, #4]
 8016eae:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016eb0:	7f1b      	ldrb	r3, [r3, #28]
 8016eb2:	76bb      	strb	r3, [r7, #26]
  dontblock = netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK);
 8016eb4:	687b      	ldr	r3, [r7, #4]
 8016eb6:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016eba:	f003 0302 	and.w	r3, r3, #2
 8016ebe:	2b00      	cmp	r3, #0
 8016ec0:	d104      	bne.n	8016ecc <lwip_netconn_do_writemore+0xbc>
 8016ec2:	7ebb      	ldrb	r3, [r7, #26]
 8016ec4:	f003 0304 	and.w	r3, r3, #4
 8016ec8:	2b00      	cmp	r3, #0
 8016eca:	d001      	beq.n	8016ed0 <lwip_netconn_do_writemore+0xc0>
 8016ecc:	2301      	movs	r3, #1
 8016ece:	e000      	b.n	8016ed2 <lwip_netconn_do_writemore+0xc2>
 8016ed0:	2300      	movs	r3, #0
 8016ed2:	763b      	strb	r3, [r7, #24]
    }
  } else
#endif /* LWIP_SO_SNDTIMEO */
  {
    do {
      dataptr = (const u8_t *)conn->current_msg->msg.w.vector->ptr + conn->current_msg->msg.w.vector_off;
 8016ed4:	687b      	ldr	r3, [r7, #4]
 8016ed6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016ed8:	689b      	ldr	r3, [r3, #8]
 8016eda:	681a      	ldr	r2, [r3, #0]
 8016edc:	687b      	ldr	r3, [r7, #4]
 8016ede:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016ee0:	691b      	ldr	r3, [r3, #16]
 8016ee2:	4413      	add	r3, r2
 8016ee4:	617b      	str	r3, [r7, #20]
      diff = conn->current_msg->msg.w.vector->len - conn->current_msg->msg.w.vector_off;
 8016ee6:	687b      	ldr	r3, [r7, #4]
 8016ee8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016eea:	689b      	ldr	r3, [r3, #8]
 8016eec:	685a      	ldr	r2, [r3, #4]
 8016eee:	687b      	ldr	r3, [r7, #4]
 8016ef0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016ef2:	691b      	ldr	r3, [r3, #16]
 8016ef4:	1ad3      	subs	r3, r2, r3
 8016ef6:	613b      	str	r3, [r7, #16]
      if (diff > 0xffffUL) { /* max_u16_t */
 8016ef8:	693b      	ldr	r3, [r7, #16]
 8016efa:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8016efe:	d307      	bcc.n	8016f10 <lwip_netconn_do_writemore+0x100>
        len = 0xffff;
 8016f00:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8016f04:	83bb      	strh	r3, [r7, #28]
        apiflags |= TCP_WRITE_FLAG_MORE;
 8016f06:	7ebb      	ldrb	r3, [r7, #26]
 8016f08:	f043 0302 	orr.w	r3, r3, #2
 8016f0c:	76bb      	strb	r3, [r7, #26]
 8016f0e:	e001      	b.n	8016f14 <lwip_netconn_do_writemore+0x104>
      } else {
        len = (u16_t)diff;
 8016f10:	693b      	ldr	r3, [r7, #16]
 8016f12:	83bb      	strh	r3, [r7, #28]
      }
      available = tcp_sndbuf(conn->pcb.tcp);
 8016f14:	687b      	ldr	r3, [r7, #4]
 8016f16:	685b      	ldr	r3, [r3, #4]
 8016f18:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8016f1c:	81fb      	strh	r3, [r7, #14]
      if (available < len) {
 8016f1e:	89fa      	ldrh	r2, [r7, #14]
 8016f20:	8bbb      	ldrh	r3, [r7, #28]
 8016f22:	429a      	cmp	r2, r3
 8016f24:	d216      	bcs.n	8016f54 <lwip_netconn_do_writemore+0x144>
        /* don't try to write more than sendbuf */
        len = available;
 8016f26:	89fb      	ldrh	r3, [r7, #14]
 8016f28:	83bb      	strh	r3, [r7, #28]
        if (dontblock) {
 8016f2a:	7e3b      	ldrb	r3, [r7, #24]
 8016f2c:	2b00      	cmp	r3, #0
 8016f2e:	d00d      	beq.n	8016f4c <lwip_netconn_do_writemore+0x13c>
          if (!len) {
 8016f30:	8bbb      	ldrh	r3, [r7, #28]
 8016f32:	2b00      	cmp	r3, #0
 8016f34:	d10e      	bne.n	8016f54 <lwip_netconn_do_writemore+0x144>
            /* set error according to partial write or not */
            err = (conn->current_msg->msg.w.offset == 0) ? ERR_WOULDBLOCK : ERR_OK;
 8016f36:	687b      	ldr	r3, [r7, #4]
 8016f38:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016f3a:	699b      	ldr	r3, [r3, #24]
 8016f3c:	2b00      	cmp	r3, #0
 8016f3e:	d102      	bne.n	8016f46 <lwip_netconn_do_writemore+0x136>
 8016f40:	f06f 0306 	mvn.w	r3, #6
 8016f44:	e000      	b.n	8016f48 <lwip_netconn_do_writemore+0x138>
 8016f46:	2300      	movs	r3, #0
 8016f48:	77fb      	strb	r3, [r7, #31]
            goto err_mem;
 8016f4a:	e08f      	b.n	801706c <lwip_netconn_do_writemore+0x25c>
          }
        } else {
          apiflags |= TCP_WRITE_FLAG_MORE;
 8016f4c:	7ebb      	ldrb	r3, [r7, #26]
 8016f4e:	f043 0302 	orr.w	r3, r3, #2
 8016f52:	76bb      	strb	r3, [r7, #26]
        }
      }
      LWIP_ASSERT("lwip_netconn_do_writemore: invalid length!",
 8016f54:	687b      	ldr	r3, [r7, #4]
 8016f56:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016f58:	691a      	ldr	r2, [r3, #16]
 8016f5a:	8bbb      	ldrh	r3, [r7, #28]
 8016f5c:	441a      	add	r2, r3
 8016f5e:	687b      	ldr	r3, [r7, #4]
 8016f60:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016f62:	689b      	ldr	r3, [r3, #8]
 8016f64:	685b      	ldr	r3, [r3, #4]
 8016f66:	429a      	cmp	r2, r3
 8016f68:	d906      	bls.n	8016f78 <lwip_netconn_do_writemore+0x168>
 8016f6a:	4b10      	ldr	r3, [pc, #64]	@ (8016fac <lwip_netconn_do_writemore+0x19c>)
 8016f6c:	f240 62a3 	movw	r2, #1699	@ 0x6a3
 8016f70:	4916      	ldr	r1, [pc, #88]	@ (8016fcc <lwip_netconn_do_writemore+0x1bc>)
 8016f72:	4810      	ldr	r0, [pc, #64]	@ (8016fb4 <lwip_netconn_do_writemore+0x1a4>)
 8016f74:	f012 fd32 	bl	80299dc <iprintf>
                  ((conn->current_msg->msg.w.vector_off + len) <= conn->current_msg->msg.w.vector->len));
      /* we should loop around for more sending in the following cases:
           1) We couldn't finish the current vector because of 16-bit size limitations.
              tcp_write() and tcp_sndbuf() both are limited to 16-bit sizes
           2) We are sending the remainder of the current vector and have more */
      if ((len == 0xffff && diff > 0xffffUL) ||
 8016f78:	8bbb      	ldrh	r3, [r7, #28]
 8016f7a:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 8016f7e:	4293      	cmp	r3, r2
 8016f80:	d103      	bne.n	8016f8a <lwip_netconn_do_writemore+0x17a>
 8016f82:	693b      	ldr	r3, [r7, #16]
 8016f84:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8016f88:	d209      	bcs.n	8016f9e <lwip_netconn_do_writemore+0x18e>
          (len == (u16_t)diff && conn->current_msg->msg.w.vector_cnt > 1)) {
 8016f8a:	693b      	ldr	r3, [r7, #16]
 8016f8c:	b29b      	uxth	r3, r3
      if ((len == 0xffff && diff > 0xffffUL) ||
 8016f8e:	8bba      	ldrh	r2, [r7, #28]
 8016f90:	429a      	cmp	r2, r3
 8016f92:	d11d      	bne.n	8016fd0 <lwip_netconn_do_writemore+0x1c0>
          (len == (u16_t)diff && conn->current_msg->msg.w.vector_cnt > 1)) {
 8016f94:	687b      	ldr	r3, [r7, #4]
 8016f96:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016f98:	899b      	ldrh	r3, [r3, #12]
 8016f9a:	2b01      	cmp	r3, #1
 8016f9c:	d918      	bls.n	8016fd0 <lwip_netconn_do_writemore+0x1c0>
        write_more = 1;
 8016f9e:	2301      	movs	r3, #1
 8016fa0:	767b      	strb	r3, [r7, #25]
        apiflags |= TCP_WRITE_FLAG_MORE;
 8016fa2:	7ebb      	ldrb	r3, [r7, #26]
 8016fa4:	f043 0302 	orr.w	r3, r3, #2
 8016fa8:	76bb      	strb	r3, [r7, #26]
 8016faa:	e013      	b.n	8016fd4 <lwip_netconn_do_writemore+0x1c4>
 8016fac:	0802cf24 	.word	0x0802cf24
 8016fb0:	0802d07c 	.word	0x0802d07c
 8016fb4:	0802cf68 	.word	0x0802cf68
 8016fb8:	0802d384 	.word	0x0802d384
 8016fbc:	0802d08c 	.word	0x0802d08c
 8016fc0:	0802d3a4 	.word	0x0802d3a4
 8016fc4:	0802d3bc 	.word	0x0802d3bc
 8016fc8:	0802d3fc 	.word	0x0802d3fc
 8016fcc:	0802d424 	.word	0x0802d424
      } else {
        write_more = 0;
 8016fd0:	2300      	movs	r3, #0
 8016fd2:	767b      	strb	r3, [r7, #25]
      }
      err = tcp_write(conn->pcb.tcp, dataptr, len, apiflags);
 8016fd4:	687b      	ldr	r3, [r7, #4]
 8016fd6:	6858      	ldr	r0, [r3, #4]
 8016fd8:	7ebb      	ldrb	r3, [r7, #26]
 8016fda:	8bba      	ldrh	r2, [r7, #28]
 8016fdc:	6979      	ldr	r1, [r7, #20]
 8016fde:	f008 f827 	bl	801f030 <tcp_write>
 8016fe2:	4603      	mov	r3, r0
 8016fe4:	77fb      	strb	r3, [r7, #31]
      if (err == ERR_OK) {
 8016fe6:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8016fea:	2b00      	cmp	r3, #0
 8016fec:	d12c      	bne.n	8017048 <lwip_netconn_do_writemore+0x238>
        conn->current_msg->msg.w.offset += len;
 8016fee:	687b      	ldr	r3, [r7, #4]
 8016ff0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016ff2:	6999      	ldr	r1, [r3, #24]
 8016ff4:	8bba      	ldrh	r2, [r7, #28]
 8016ff6:	687b      	ldr	r3, [r7, #4]
 8016ff8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016ffa:	440a      	add	r2, r1
 8016ffc:	619a      	str	r2, [r3, #24]
        conn->current_msg->msg.w.vector_off += len;
 8016ffe:	687b      	ldr	r3, [r7, #4]
 8017000:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017002:	6919      	ldr	r1, [r3, #16]
 8017004:	8bba      	ldrh	r2, [r7, #28]
 8017006:	687b      	ldr	r3, [r7, #4]
 8017008:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801700a:	440a      	add	r2, r1
 801700c:	611a      	str	r2, [r3, #16]
        /* check if current vector is finished */
        if (conn->current_msg->msg.w.vector_off == conn->current_msg->msg.w.vector->len) {
 801700e:	687b      	ldr	r3, [r7, #4]
 8017010:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017012:	691a      	ldr	r2, [r3, #16]
 8017014:	687b      	ldr	r3, [r7, #4]
 8017016:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017018:	689b      	ldr	r3, [r3, #8]
 801701a:	685b      	ldr	r3, [r3, #4]
 801701c:	429a      	cmp	r2, r3
 801701e:	d113      	bne.n	8017048 <lwip_netconn_do_writemore+0x238>
          conn->current_msg->msg.w.vector_cnt--;
 8017020:	687b      	ldr	r3, [r7, #4]
 8017022:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017024:	899a      	ldrh	r2, [r3, #12]
 8017026:	3a01      	subs	r2, #1
 8017028:	b292      	uxth	r2, r2
 801702a:	819a      	strh	r2, [r3, #12]
          /* if we have additional vectors, move on to them */
          if (conn->current_msg->msg.w.vector_cnt > 0) {
 801702c:	687b      	ldr	r3, [r7, #4]
 801702e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017030:	899b      	ldrh	r3, [r3, #12]
 8017032:	2b00      	cmp	r3, #0
 8017034:	d008      	beq.n	8017048 <lwip_netconn_do_writemore+0x238>
            conn->current_msg->msg.w.vector++;
 8017036:	687b      	ldr	r3, [r7, #4]
 8017038:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801703a:	689a      	ldr	r2, [r3, #8]
 801703c:	3208      	adds	r2, #8
 801703e:	609a      	str	r2, [r3, #8]
            conn->current_msg->msg.w.vector_off = 0;
 8017040:	687b      	ldr	r3, [r7, #4]
 8017042:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017044:	2200      	movs	r2, #0
 8017046:	611a      	str	r2, [r3, #16]
          }
        }
      }
    } while (write_more && err == ERR_OK);
 8017048:	7e7b      	ldrb	r3, [r7, #25]
 801704a:	2b00      	cmp	r3, #0
 801704c:	d004      	beq.n	8017058 <lwip_netconn_do_writemore+0x248>
 801704e:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8017052:	2b00      	cmp	r3, #0
 8017054:	f43f af3e 	beq.w	8016ed4 <lwip_netconn_do_writemore+0xc4>
    /* if OK or memory error, check available space */
    if ((err == ERR_OK) || (err == ERR_MEM)) {
 8017058:	f997 301f 	ldrsb.w	r3, [r7, #31]
 801705c:	2b00      	cmp	r3, #0
 801705e:	d004      	beq.n	801706a <lwip_netconn_do_writemore+0x25a>
 8017060:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8017064:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8017068:	d137      	bne.n	80170da <lwip_netconn_do_writemore+0x2ca>
err_mem:
 801706a:	bf00      	nop
      if (dontblock && (conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len)) {
 801706c:	7e3b      	ldrb	r3, [r7, #24]
 801706e:	2b00      	cmp	r3, #0
 8017070:	d01b      	beq.n	80170aa <lwip_netconn_do_writemore+0x29a>
 8017072:	687b      	ldr	r3, [r7, #4]
 8017074:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017076:	699a      	ldr	r2, [r3, #24]
 8017078:	687b      	ldr	r3, [r7, #4]
 801707a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801707c:	695b      	ldr	r3, [r3, #20]
 801707e:	429a      	cmp	r2, r3
 8017080:	d213      	bcs.n	80170aa <lwip_netconn_do_writemore+0x29a>
        /* non-blocking write did not write everything: mark the pcb non-writable
           and let poll_tcp check writable space to mark the pcb writable again */
        API_EVENT(conn, NETCONN_EVT_SENDMINUS, 0);
 8017082:	687b      	ldr	r3, [r7, #4]
 8017084:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017086:	2b00      	cmp	r3, #0
 8017088:	d005      	beq.n	8017096 <lwip_netconn_do_writemore+0x286>
 801708a:	687b      	ldr	r3, [r7, #4]
 801708c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801708e:	2200      	movs	r2, #0
 8017090:	2103      	movs	r1, #3
 8017092:	6878      	ldr	r0, [r7, #4]
 8017094:	4798      	blx	r3
        conn->flags |= NETCONN_FLAG_CHECK_WRITESPACE;
 8017096:	687b      	ldr	r3, [r7, #4]
 8017098:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801709c:	f043 0310 	orr.w	r3, r3, #16
 80170a0:	b2da      	uxtb	r2, r3
 80170a2:	687b      	ldr	r3, [r7, #4]
 80170a4:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 80170a8:	e017      	b.n	80170da <lwip_netconn_do_writemore+0x2ca>
      } else if ((tcp_sndbuf(conn->pcb.tcp) <= TCP_SNDLOWAT) ||
 80170aa:	687b      	ldr	r3, [r7, #4]
 80170ac:	685b      	ldr	r3, [r3, #4]
 80170ae:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 80170b2:	f640 3269 	movw	r2, #2921	@ 0xb69
 80170b6:	4293      	cmp	r3, r2
 80170b8:	d905      	bls.n	80170c6 <lwip_netconn_do_writemore+0x2b6>
                 (tcp_sndqueuelen(conn->pcb.tcp) >= TCP_SNDQUEUELOWAT)) {
 80170ba:	687b      	ldr	r3, [r7, #4]
 80170bc:	685b      	ldr	r3, [r3, #4]
 80170be:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
      } else if ((tcp_sndbuf(conn->pcb.tcp) <= TCP_SNDLOWAT) ||
 80170c2:	2b07      	cmp	r3, #7
 80170c4:	d909      	bls.n	80170da <lwip_netconn_do_writemore+0x2ca>
        /* The queued byte- or pbuf-count exceeds the configured low-water limit,
           let select mark this pcb as non-writable. */
        API_EVENT(conn, NETCONN_EVT_SENDMINUS, 0);
 80170c6:	687b      	ldr	r3, [r7, #4]
 80170c8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80170ca:	2b00      	cmp	r3, #0
 80170cc:	d005      	beq.n	80170da <lwip_netconn_do_writemore+0x2ca>
 80170ce:	687b      	ldr	r3, [r7, #4]
 80170d0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80170d2:	2200      	movs	r2, #0
 80170d4:	2103      	movs	r1, #3
 80170d6:	6878      	ldr	r0, [r7, #4]
 80170d8:	4798      	blx	r3
      }
    }

    if (err == ERR_OK) {
 80170da:	f997 301f 	ldrsb.w	r3, [r7, #31]
 80170de:	2b00      	cmp	r3, #0
 80170e0:	d11d      	bne.n	801711e <lwip_netconn_do_writemore+0x30e>
      err_t out_err;
      if ((conn->current_msg->msg.w.offset == conn->current_msg->msg.w.len) || dontblock) {
 80170e2:	687b      	ldr	r3, [r7, #4]
 80170e4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80170e6:	699a      	ldr	r2, [r3, #24]
 80170e8:	687b      	ldr	r3, [r7, #4]
 80170ea:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80170ec:	695b      	ldr	r3, [r3, #20]
 80170ee:	429a      	cmp	r2, r3
 80170f0:	d002      	beq.n	80170f8 <lwip_netconn_do_writemore+0x2e8>
 80170f2:	7e3b      	ldrb	r3, [r7, #24]
 80170f4:	2b00      	cmp	r3, #0
 80170f6:	d001      	beq.n	80170fc <lwip_netconn_do_writemore+0x2ec>
        /* return sent length (caller reads length from msg.w.offset) */
        write_finished = 1;
 80170f8:	2301      	movs	r3, #1
 80170fa:	76fb      	strb	r3, [r7, #27]
      }
      out_err = tcp_output(conn->pcb.tcp);
 80170fc:	687b      	ldr	r3, [r7, #4]
 80170fe:	685b      	ldr	r3, [r3, #4]
 8017100:	4618      	mov	r0, r3
 8017102:	f008 fddf 	bl	801fcc4 <tcp_output>
 8017106:	4603      	mov	r3, r0
 8017108:	733b      	strb	r3, [r7, #12]
      if (out_err == ERR_RTE) {
 801710a:	f997 300c 	ldrsb.w	r3, [r7, #12]
 801710e:	f113 0f04 	cmn.w	r3, #4
 8017112:	d12c      	bne.n	801716e <lwip_netconn_do_writemore+0x35e>
        /* If tcp_output fails because no route is found,
           don't try writing any more but return the error
           to the application thread. */
        err = out_err;
 8017114:	7b3b      	ldrb	r3, [r7, #12]
 8017116:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 8017118:	2301      	movs	r3, #1
 801711a:	76fb      	strb	r3, [r7, #27]
 801711c:	e027      	b.n	801716e <lwip_netconn_do_writemore+0x35e>
      }
    } else if (err == ERR_MEM) {
 801711e:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8017122:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8017126:	d120      	bne.n	801716a <lwip_netconn_do_writemore+0x35a>
         For blocking sockets, we do NOT return to the application
         thread, since ERR_MEM is only a temporary error! Non-blocking
         will remain non-writable until sent_tcp/poll_tcp is called */

      /* tcp_write returned ERR_MEM, try tcp_output anyway */
      err_t out_err = tcp_output(conn->pcb.tcp);
 8017128:	687b      	ldr	r3, [r7, #4]
 801712a:	685b      	ldr	r3, [r3, #4]
 801712c:	4618      	mov	r0, r3
 801712e:	f008 fdc9 	bl	801fcc4 <tcp_output>
 8017132:	4603      	mov	r3, r0
 8017134:	737b      	strb	r3, [r7, #13]
      if (out_err == ERR_RTE) {
 8017136:	f997 300d 	ldrsb.w	r3, [r7, #13]
 801713a:	f113 0f04 	cmn.w	r3, #4
 801713e:	d104      	bne.n	801714a <lwip_netconn_do_writemore+0x33a>
        /* If tcp_output fails because no route is found,
           don't try writing any more but return the error
           to the application thread. */
        err = out_err;
 8017140:	7b7b      	ldrb	r3, [r7, #13]
 8017142:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 8017144:	2301      	movs	r3, #1
 8017146:	76fb      	strb	r3, [r7, #27]
 8017148:	e011      	b.n	801716e <lwip_netconn_do_writemore+0x35e>
      } else if (dontblock) {
 801714a:	7e3b      	ldrb	r3, [r7, #24]
 801714c:	2b00      	cmp	r3, #0
 801714e:	d00e      	beq.n	801716e <lwip_netconn_do_writemore+0x35e>
        /* non-blocking write is done on ERR_MEM, set error according
           to partial write or not */
        err = (conn->current_msg->msg.w.offset == 0) ? ERR_WOULDBLOCK : ERR_OK;
 8017150:	687b      	ldr	r3, [r7, #4]
 8017152:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017154:	699b      	ldr	r3, [r3, #24]
 8017156:	2b00      	cmp	r3, #0
 8017158:	d102      	bne.n	8017160 <lwip_netconn_do_writemore+0x350>
 801715a:	f06f 0306 	mvn.w	r3, #6
 801715e:	e000      	b.n	8017162 <lwip_netconn_do_writemore+0x352>
 8017160:	2300      	movs	r3, #0
 8017162:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 8017164:	2301      	movs	r3, #1
 8017166:	76fb      	strb	r3, [r7, #27]
 8017168:	e001      	b.n	801716e <lwip_netconn_do_writemore+0x35e>
      }
    } else {
      /* On errors != ERR_MEM, we don't try writing any more but return
         the error to the application thread. */
      write_finished = 1;
 801716a:	2301      	movs	r3, #1
 801716c:	76fb      	strb	r3, [r7, #27]
    }
  }
  if (write_finished) {
 801716e:	7efb      	ldrb	r3, [r7, #27]
 8017170:	2b00      	cmp	r3, #0
 8017172:	d015      	beq.n	80171a0 <lwip_netconn_do_writemore+0x390>
    /* everything was written: set back connection state
       and back to application task */
    sys_sem_t *op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 8017174:	687b      	ldr	r3, [r7, #4]
 8017176:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017178:	681b      	ldr	r3, [r3, #0]
 801717a:	330c      	adds	r3, #12
 801717c:	60bb      	str	r3, [r7, #8]
    conn->current_msg->err = err;
 801717e:	687b      	ldr	r3, [r7, #4]
 8017180:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017182:	7ffa      	ldrb	r2, [r7, #31]
 8017184:	711a      	strb	r2, [r3, #4]
    conn->current_msg = NULL;
 8017186:	687b      	ldr	r3, [r7, #4]
 8017188:	2200      	movs	r2, #0
 801718a:	62da      	str	r2, [r3, #44]	@ 0x2c
    conn->state = NETCONN_NONE;
 801718c:	687b      	ldr	r3, [r7, #4]
 801718e:	2200      	movs	r2, #0
 8017190:	705a      	strb	r2, [r3, #1]
#if LWIP_TCPIP_CORE_LOCKING
    if (delayed)
 8017192:	78fb      	ldrb	r3, [r7, #3]
 8017194:	2b00      	cmp	r3, #0
 8017196:	d006      	beq.n	80171a6 <lwip_netconn_do_writemore+0x396>
#endif
    {
      sys_sem_signal(op_completed_sem);
 8017198:	68b8      	ldr	r0, [r7, #8]
 801719a:	f00f f8f3 	bl	8026384 <sys_sem_signal>
 801719e:	e002      	b.n	80171a6 <lwip_netconn_do_writemore+0x396>
    }
  }
#if LWIP_TCPIP_CORE_LOCKING
  else {
    return ERR_MEM;
 80171a0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80171a4:	e000      	b.n	80171a8 <lwip_netconn_do_writemore+0x398>
  }
#endif
  return ERR_OK;
 80171a6:	2300      	movs	r3, #0
}
 80171a8:	4618      	mov	r0, r3
 80171aa:	3720      	adds	r7, #32
 80171ac:	46bd      	mov	sp, r7
 80171ae:	bd80      	pop	{r7, pc}

080171b0 <lwip_netconn_do_write>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_write(void *m)
{
 80171b0:	b580      	push	{r7, lr}
 80171b2:	b084      	sub	sp, #16
 80171b4:	af00      	add	r7, sp, #0
 80171b6:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 80171b8:	687b      	ldr	r3, [r7, #4]
 80171ba:	60bb      	str	r3, [r7, #8]

  err_t err = netconn_err(msg->conn);
 80171bc:	68bb      	ldr	r3, [r7, #8]
 80171be:	681b      	ldr	r3, [r3, #0]
 80171c0:	4618      	mov	r0, r3
 80171c2:	f7fe fca7 	bl	8015b14 <netconn_err>
 80171c6:	4603      	mov	r3, r0
 80171c8:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 80171ca:	f997 300f 	ldrsb.w	r3, [r7, #15]
 80171ce:	2b00      	cmp	r3, #0
 80171d0:	d164      	bne.n	801729c <lwip_netconn_do_write+0xec>
    if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) {
 80171d2:	68bb      	ldr	r3, [r7, #8]
 80171d4:	681b      	ldr	r3, [r3, #0]
 80171d6:	781b      	ldrb	r3, [r3, #0]
 80171d8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80171dc:	2b10      	cmp	r3, #16
 80171de:	d15b      	bne.n	8017298 <lwip_netconn_do_write+0xe8>
#if LWIP_TCP
      if (msg->conn->state != NETCONN_NONE) {
 80171e0:	68bb      	ldr	r3, [r7, #8]
 80171e2:	681b      	ldr	r3, [r3, #0]
 80171e4:	785b      	ldrb	r3, [r3, #1]
 80171e6:	2b00      	cmp	r3, #0
 80171e8:	d002      	beq.n	80171f0 <lwip_netconn_do_write+0x40>
        /* netconn is connecting, closing or in blocking write */
        err = ERR_INPROGRESS;
 80171ea:	23fb      	movs	r3, #251	@ 0xfb
 80171ec:	73fb      	strb	r3, [r7, #15]
 80171ee:	e055      	b.n	801729c <lwip_netconn_do_write+0xec>
      } else if (msg->conn->pcb.tcp != NULL) {
 80171f0:	68bb      	ldr	r3, [r7, #8]
 80171f2:	681b      	ldr	r3, [r3, #0]
 80171f4:	685b      	ldr	r3, [r3, #4]
 80171f6:	2b00      	cmp	r3, #0
 80171f8:	d04b      	beq.n	8017292 <lwip_netconn_do_write+0xe2>
        msg->conn->state = NETCONN_WRITE;
 80171fa:	68bb      	ldr	r3, [r7, #8]
 80171fc:	681b      	ldr	r3, [r3, #0]
 80171fe:	2201      	movs	r2, #1
 8017200:	705a      	strb	r2, [r3, #1]
        /* set all the variables used by lwip_netconn_do_writemore */
        LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 8017202:	68bb      	ldr	r3, [r7, #8]
 8017204:	681b      	ldr	r3, [r3, #0]
 8017206:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017208:	2b00      	cmp	r3, #0
 801720a:	d006      	beq.n	801721a <lwip_netconn_do_write+0x6a>
 801720c:	4b27      	ldr	r3, [pc, #156]	@ (80172ac <lwip_netconn_do_write+0xfc>)
 801720e:	f240 7223 	movw	r2, #1827	@ 0x723
 8017212:	4927      	ldr	r1, [pc, #156]	@ (80172b0 <lwip_netconn_do_write+0x100>)
 8017214:	4827      	ldr	r0, [pc, #156]	@ (80172b4 <lwip_netconn_do_write+0x104>)
 8017216:	f012 fbe1 	bl	80299dc <iprintf>
        LWIP_ASSERT("msg->msg.w.len != 0", msg->msg.w.len != 0);
 801721a:	68bb      	ldr	r3, [r7, #8]
 801721c:	695b      	ldr	r3, [r3, #20]
 801721e:	2b00      	cmp	r3, #0
 8017220:	d106      	bne.n	8017230 <lwip_netconn_do_write+0x80>
 8017222:	4b22      	ldr	r3, [pc, #136]	@ (80172ac <lwip_netconn_do_write+0xfc>)
 8017224:	f240 7224 	movw	r2, #1828	@ 0x724
 8017228:	4923      	ldr	r1, [pc, #140]	@ (80172b8 <lwip_netconn_do_write+0x108>)
 801722a:	4822      	ldr	r0, [pc, #136]	@ (80172b4 <lwip_netconn_do_write+0x104>)
 801722c:	f012 fbd6 	bl	80299dc <iprintf>
        msg->conn->current_msg = msg;
 8017230:	68bb      	ldr	r3, [r7, #8]
 8017232:	681b      	ldr	r3, [r3, #0]
 8017234:	68ba      	ldr	r2, [r7, #8]
 8017236:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
        if (lwip_netconn_do_writemore(msg->conn, 0) != ERR_OK) {
 8017238:	68bb      	ldr	r3, [r7, #8]
 801723a:	681b      	ldr	r3, [r3, #0]
 801723c:	2100      	movs	r1, #0
 801723e:	4618      	mov	r0, r3
 8017240:	f7ff fde6 	bl	8016e10 <lwip_netconn_do_writemore>
 8017244:	4603      	mov	r3, r0
 8017246:	2b00      	cmp	r3, #0
 8017248:	d02c      	beq.n	80172a4 <lwip_netconn_do_write+0xf4>
          LWIP_ASSERT("state!", msg->conn->state == NETCONN_WRITE);
 801724a:	68bb      	ldr	r3, [r7, #8]
 801724c:	681b      	ldr	r3, [r3, #0]
 801724e:	785b      	ldrb	r3, [r3, #1]
 8017250:	2b01      	cmp	r3, #1
 8017252:	d006      	beq.n	8017262 <lwip_netconn_do_write+0xb2>
 8017254:	4b15      	ldr	r3, [pc, #84]	@ (80172ac <lwip_netconn_do_write+0xfc>)
 8017256:	f44f 62e5 	mov.w	r2, #1832	@ 0x728
 801725a:	4918      	ldr	r1, [pc, #96]	@ (80172bc <lwip_netconn_do_write+0x10c>)
 801725c:	4815      	ldr	r0, [pc, #84]	@ (80172b4 <lwip_netconn_do_write+0x104>)
 801725e:	f012 fbbd 	bl	80299dc <iprintf>
          UNLOCK_TCPIP_CORE();
 8017262:	f7f9 f961 	bl	8010528 <sys_unlock_tcpip_core>
          sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 8017266:	68bb      	ldr	r3, [r7, #8]
 8017268:	681b      	ldr	r3, [r3, #0]
 801726a:	330c      	adds	r3, #12
 801726c:	2100      	movs	r1, #0
 801726e:	4618      	mov	r0, r3
 8017270:	f00f f857 	bl	8026322 <sys_arch_sem_wait>
          LOCK_TCPIP_CORE();
 8017274:	f7f9 f948 	bl	8010508 <sys_lock_tcpip_core>
          LWIP_ASSERT("state!", msg->conn->state != NETCONN_WRITE);
 8017278:	68bb      	ldr	r3, [r7, #8]
 801727a:	681b      	ldr	r3, [r3, #0]
 801727c:	785b      	ldrb	r3, [r3, #1]
 801727e:	2b01      	cmp	r3, #1
 8017280:	d110      	bne.n	80172a4 <lwip_netconn_do_write+0xf4>
 8017282:	4b0a      	ldr	r3, [pc, #40]	@ (80172ac <lwip_netconn_do_write+0xfc>)
 8017284:	f240 722c 	movw	r2, #1836	@ 0x72c
 8017288:	490c      	ldr	r1, [pc, #48]	@ (80172bc <lwip_netconn_do_write+0x10c>)
 801728a:	480a      	ldr	r0, [pc, #40]	@ (80172b4 <lwip_netconn_do_write+0x104>)
 801728c:	f012 fba6 	bl	80299dc <iprintf>
#else /* LWIP_TCPIP_CORE_LOCKING */
        lwip_netconn_do_writemore(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
        /* for both cases: if lwip_netconn_do_writemore was called, don't ACK the APIMSG
           since lwip_netconn_do_writemore ACKs it! */
        return;
 8017290:	e008      	b.n	80172a4 <lwip_netconn_do_write+0xf4>
      } else {
        err = ERR_CONN;
 8017292:	23f5      	movs	r3, #245	@ 0xf5
 8017294:	73fb      	strb	r3, [r7, #15]
 8017296:	e001      	b.n	801729c <lwip_netconn_do_write+0xec>
#else /* LWIP_TCP */
      err = ERR_VAL;
#endif /* LWIP_TCP */
#if (LWIP_UDP || LWIP_RAW)
    } else {
      err = ERR_VAL;
 8017298:	23fa      	movs	r3, #250	@ 0xfa
 801729a:	73fb      	strb	r3, [r7, #15]
#endif /* (LWIP_UDP || LWIP_RAW) */
    }
  }
  msg->err = err;
 801729c:	68bb      	ldr	r3, [r7, #8]
 801729e:	7bfa      	ldrb	r2, [r7, #15]
 80172a0:	711a      	strb	r2, [r3, #4]
 80172a2:	e000      	b.n	80172a6 <lwip_netconn_do_write+0xf6>
        return;
 80172a4:	bf00      	nop
  TCPIP_APIMSG_ACK(msg);
}
 80172a6:	3710      	adds	r7, #16
 80172a8:	46bd      	mov	sp, r7
 80172aa:	bd80      	pop	{r7, pc}
 80172ac:	0802cf24 	.word	0x0802cf24
 80172b0:	0802d2c8 	.word	0x0802d2c8
 80172b4:	0802cf68 	.word	0x0802cf68
 80172b8:	0802d450 	.word	0x0802d450
 80172bc:	0802d2e4 	.word	0x0802d2e4

080172c0 <lwip_netconn_do_getaddr>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_getaddr(void *m)
{
 80172c0:	b580      	push	{r7, lr}
 80172c2:	b084      	sub	sp, #16
 80172c4:	af00      	add	r7, sp, #0
 80172c6:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 80172c8:	687b      	ldr	r3, [r7, #4]
 80172ca:	60fb      	str	r3, [r7, #12]

  if (msg->conn->pcb.ip != NULL) {
 80172cc:	68fb      	ldr	r3, [r7, #12]
 80172ce:	681b      	ldr	r3, [r3, #0]
 80172d0:	685b      	ldr	r3, [r3, #4]
 80172d2:	2b00      	cmp	r3, #0
 80172d4:	d06b      	beq.n	80173ae <lwip_netconn_do_getaddr+0xee>
    if (msg->msg.ad.local) {
 80172d6:	68fb      	ldr	r3, [r7, #12]
 80172d8:	7c1b      	ldrb	r3, [r3, #16]
 80172da:	2b00      	cmp	r3, #0
 80172dc:	d007      	beq.n	80172ee <lwip_netconn_do_getaddr+0x2e>
      ip_addr_copy(API_EXPR_DEREF(msg->msg.ad.ipaddr),
 80172de:	68fb      	ldr	r3, [r7, #12]
 80172e0:	681b      	ldr	r3, [r3, #0]
 80172e2:	685a      	ldr	r2, [r3, #4]
 80172e4:	68fb      	ldr	r3, [r7, #12]
 80172e6:	689b      	ldr	r3, [r3, #8]
 80172e8:	6812      	ldr	r2, [r2, #0]
 80172ea:	601a      	str	r2, [r3, #0]
 80172ec:	e006      	b.n	80172fc <lwip_netconn_do_getaddr+0x3c>
                   msg->conn->pcb.ip->local_ip);
    } else {
      ip_addr_copy(API_EXPR_DEREF(msg->msg.ad.ipaddr),
 80172ee:	68fb      	ldr	r3, [r7, #12]
 80172f0:	681b      	ldr	r3, [r3, #0]
 80172f2:	685a      	ldr	r2, [r3, #4]
 80172f4:	68fb      	ldr	r3, [r7, #12]
 80172f6:	689b      	ldr	r3, [r3, #8]
 80172f8:	6852      	ldr	r2, [r2, #4]
 80172fa:	601a      	str	r2, [r3, #0]
                   msg->conn->pcb.ip->remote_ip);
    }

    msg->err = ERR_OK;
 80172fc:	68fb      	ldr	r3, [r7, #12]
 80172fe:	2200      	movs	r2, #0
 8017300:	711a      	strb	r2, [r3, #4]
    switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8017302:	68fb      	ldr	r3, [r7, #12]
 8017304:	681b      	ldr	r3, [r3, #0]
 8017306:	781b      	ldrb	r3, [r3, #0]
 8017308:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801730c:	2b10      	cmp	r3, #16
 801730e:	d021      	beq.n	8017354 <lwip_netconn_do_getaddr+0x94>
 8017310:	2b20      	cmp	r3, #32
 8017312:	d144      	bne.n	801739e <lwip_netconn_do_getaddr+0xde>
        }
        break;
#endif /* LWIP_RAW */
#if LWIP_UDP
      case NETCONN_UDP:
        if (msg->msg.ad.local) {
 8017314:	68fb      	ldr	r3, [r7, #12]
 8017316:	7c1b      	ldrb	r3, [r3, #16]
 8017318:	2b00      	cmp	r3, #0
 801731a:	d007      	beq.n	801732c <lwip_netconn_do_getaddr+0x6c>
          API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->local_port;
 801731c:	68fb      	ldr	r3, [r7, #12]
 801731e:	681b      	ldr	r3, [r3, #0]
 8017320:	685a      	ldr	r2, [r3, #4]
 8017322:	68fb      	ldr	r3, [r7, #12]
 8017324:	68db      	ldr	r3, [r3, #12]
 8017326:	8a52      	ldrh	r2, [r2, #18]
 8017328:	801a      	strh	r2, [r3, #0]
            msg->err = ERR_CONN;
          } else {
            API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->remote_port;
          }
        }
        break;
 801732a:	e044      	b.n	80173b6 <lwip_netconn_do_getaddr+0xf6>
          if ((msg->conn->pcb.udp->flags & UDP_FLAGS_CONNECTED) == 0) {
 801732c:	68fb      	ldr	r3, [r7, #12]
 801732e:	681b      	ldr	r3, [r3, #0]
 8017330:	685b      	ldr	r3, [r3, #4]
 8017332:	7c1b      	ldrb	r3, [r3, #16]
 8017334:	f003 0304 	and.w	r3, r3, #4
 8017338:	2b00      	cmp	r3, #0
 801733a:	d103      	bne.n	8017344 <lwip_netconn_do_getaddr+0x84>
            msg->err = ERR_CONN;
 801733c:	68fb      	ldr	r3, [r7, #12]
 801733e:	22f5      	movs	r2, #245	@ 0xf5
 8017340:	711a      	strb	r2, [r3, #4]
        break;
 8017342:	e038      	b.n	80173b6 <lwip_netconn_do_getaddr+0xf6>
            API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->remote_port;
 8017344:	68fb      	ldr	r3, [r7, #12]
 8017346:	681b      	ldr	r3, [r3, #0]
 8017348:	685a      	ldr	r2, [r3, #4]
 801734a:	68fb      	ldr	r3, [r7, #12]
 801734c:	68db      	ldr	r3, [r3, #12]
 801734e:	8a92      	ldrh	r2, [r2, #20]
 8017350:	801a      	strh	r2, [r3, #0]
        break;
 8017352:	e030      	b.n	80173b6 <lwip_netconn_do_getaddr+0xf6>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case NETCONN_TCP:
        if ((msg->msg.ad.local == 0) &&
 8017354:	68fb      	ldr	r3, [r7, #12]
 8017356:	7c1b      	ldrb	r3, [r3, #16]
 8017358:	2b00      	cmp	r3, #0
 801735a:	d10f      	bne.n	801737c <lwip_netconn_do_getaddr+0xbc>
            ((msg->conn->pcb.tcp->state == CLOSED) || (msg->conn->pcb.tcp->state == LISTEN))) {
 801735c:	68fb      	ldr	r3, [r7, #12]
 801735e:	681b      	ldr	r3, [r3, #0]
 8017360:	685b      	ldr	r3, [r3, #4]
 8017362:	7d1b      	ldrb	r3, [r3, #20]
        if ((msg->msg.ad.local == 0) &&
 8017364:	2b00      	cmp	r3, #0
 8017366:	d005      	beq.n	8017374 <lwip_netconn_do_getaddr+0xb4>
            ((msg->conn->pcb.tcp->state == CLOSED) || (msg->conn->pcb.tcp->state == LISTEN))) {
 8017368:	68fb      	ldr	r3, [r7, #12]
 801736a:	681b      	ldr	r3, [r3, #0]
 801736c:	685b      	ldr	r3, [r3, #4]
 801736e:	7d1b      	ldrb	r3, [r3, #20]
 8017370:	2b01      	cmp	r3, #1
 8017372:	d103      	bne.n	801737c <lwip_netconn_do_getaddr+0xbc>
          /* pcb is not connected and remote name is requested */
          msg->err = ERR_CONN;
 8017374:	68fb      	ldr	r3, [r7, #12]
 8017376:	22f5      	movs	r2, #245	@ 0xf5
 8017378:	711a      	strb	r2, [r3, #4]
        } else {
          API_EXPR_DEREF(msg->msg.ad.port) = (msg->msg.ad.local ? msg->conn->pcb.tcp->local_port : msg->conn->pcb.tcp->remote_port);
        }
        break;
 801737a:	e01c      	b.n	80173b6 <lwip_netconn_do_getaddr+0xf6>
          API_EXPR_DEREF(msg->msg.ad.port) = (msg->msg.ad.local ? msg->conn->pcb.tcp->local_port : msg->conn->pcb.tcp->remote_port);
 801737c:	68fb      	ldr	r3, [r7, #12]
 801737e:	7c1b      	ldrb	r3, [r3, #16]
 8017380:	2b00      	cmp	r3, #0
 8017382:	d004      	beq.n	801738e <lwip_netconn_do_getaddr+0xce>
 8017384:	68fb      	ldr	r3, [r7, #12]
 8017386:	681b      	ldr	r3, [r3, #0]
 8017388:	685b      	ldr	r3, [r3, #4]
 801738a:	8adb      	ldrh	r3, [r3, #22]
 801738c:	e003      	b.n	8017396 <lwip_netconn_do_getaddr+0xd6>
 801738e:	68fb      	ldr	r3, [r7, #12]
 8017390:	681b      	ldr	r3, [r3, #0]
 8017392:	685b      	ldr	r3, [r3, #4]
 8017394:	8b1b      	ldrh	r3, [r3, #24]
 8017396:	68fa      	ldr	r2, [r7, #12]
 8017398:	68d2      	ldr	r2, [r2, #12]
 801739a:	8013      	strh	r3, [r2, #0]
        break;
 801739c:	e00b      	b.n	80173b6 <lwip_netconn_do_getaddr+0xf6>
#endif /* LWIP_TCP */
      default:
        LWIP_ASSERT("invalid netconn_type", 0);
 801739e:	4b08      	ldr	r3, [pc, #32]	@ (80173c0 <lwip_netconn_do_getaddr+0x100>)
 80173a0:	f240 727d 	movw	r2, #1917	@ 0x77d
 80173a4:	4907      	ldr	r1, [pc, #28]	@ (80173c4 <lwip_netconn_do_getaddr+0x104>)
 80173a6:	4808      	ldr	r0, [pc, #32]	@ (80173c8 <lwip_netconn_do_getaddr+0x108>)
 80173a8:	f012 fb18 	bl	80299dc <iprintf>
        break;
 80173ac:	e003      	b.n	80173b6 <lwip_netconn_do_getaddr+0xf6>
    }
  } else {
    msg->err = ERR_CONN;
 80173ae:	68fb      	ldr	r3, [r7, #12]
 80173b0:	22f5      	movs	r2, #245	@ 0xf5
 80173b2:	711a      	strb	r2, [r3, #4]
  }
  TCPIP_APIMSG_ACK(msg);
}
 80173b4:	bf00      	nop
 80173b6:	bf00      	nop
 80173b8:	3710      	adds	r7, #16
 80173ba:	46bd      	mov	sp, r7
 80173bc:	bd80      	pop	{r7, pc}
 80173be:	bf00      	nop
 80173c0:	0802cf24 	.word	0x0802cf24
 80173c4:	0802d464 	.word	0x0802d464
 80173c8:	0802cf68 	.word	0x0802cf68

080173cc <lwip_netconn_do_close>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_close(void *m)
{
 80173cc:	b580      	push	{r7, lr}
 80173ce:	b084      	sub	sp, #16
 80173d0:	af00      	add	r7, sp, #0
 80173d2:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 80173d4:	687b      	ldr	r3, [r7, #4]
 80173d6:	60fb      	str	r3, [r7, #12]

#if LWIP_TCP
  enum netconn_state state = msg->conn->state;
 80173d8:	68fb      	ldr	r3, [r7, #12]
 80173da:	681b      	ldr	r3, [r3, #0]
 80173dc:	785b      	ldrb	r3, [r3, #1]
 80173de:	72fb      	strb	r3, [r7, #11]
  /* First check if this is a TCP netconn and if it is in a correct state
      (LISTEN doesn't support half shutdown) */
  if ((msg->conn->pcb.tcp != NULL) &&
 80173e0:	68fb      	ldr	r3, [r7, #12]
 80173e2:	681b      	ldr	r3, [r3, #0]
 80173e4:	685b      	ldr	r3, [r3, #4]
 80173e6:	2b00      	cmp	r3, #0
 80173e8:	d067      	beq.n	80174ba <lwip_netconn_do_close+0xee>
      (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) &&
 80173ea:	68fb      	ldr	r3, [r7, #12]
 80173ec:	681b      	ldr	r3, [r3, #0]
 80173ee:	781b      	ldrb	r3, [r3, #0]
 80173f0:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if ((msg->conn->pcb.tcp != NULL) &&
 80173f4:	2b10      	cmp	r3, #16
 80173f6:	d160      	bne.n	80174ba <lwip_netconn_do_close+0xee>
      ((msg->msg.sd.shut == NETCONN_SHUT_RDWR) || (state != NETCONN_LISTEN))) {
 80173f8:	68fb      	ldr	r3, [r7, #12]
 80173fa:	7a1b      	ldrb	r3, [r3, #8]
      (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) &&
 80173fc:	2b03      	cmp	r3, #3
 80173fe:	d002      	beq.n	8017406 <lwip_netconn_do_close+0x3a>
      ((msg->msg.sd.shut == NETCONN_SHUT_RDWR) || (state != NETCONN_LISTEN))) {
 8017400:	7afb      	ldrb	r3, [r7, #11]
 8017402:	2b02      	cmp	r3, #2
 8017404:	d059      	beq.n	80174ba <lwip_netconn_do_close+0xee>
    /* Check if we are in a connected state */
    if (state == NETCONN_CONNECT) {
 8017406:	7afb      	ldrb	r3, [r7, #11]
 8017408:	2b03      	cmp	r3, #3
 801740a:	d103      	bne.n	8017414 <lwip_netconn_do_close+0x48>
      /* TCP connect in progress: cannot shutdown */
      msg->err = ERR_CONN;
 801740c:	68fb      	ldr	r3, [r7, #12]
 801740e:	22f5      	movs	r2, #245	@ 0xf5
 8017410:	711a      	strb	r2, [r3, #4]
    if (state == NETCONN_CONNECT) {
 8017412:	e057      	b.n	80174c4 <lwip_netconn_do_close+0xf8>
    } else if (state == NETCONN_WRITE) {
 8017414:	7afb      	ldrb	r3, [r7, #11]
 8017416:	2b01      	cmp	r3, #1
 8017418:	d103      	bne.n	8017422 <lwip_netconn_do_close+0x56>
        msg->err = tcp_shutdown(msg->conn->pcb.tcp, 1, 0);
      }
    }
    if (state == NETCONN_NONE) {
#else /* LWIP_NETCONN_FULLDUPLEX */
      msg->err = ERR_INPROGRESS;
 801741a:	68fb      	ldr	r3, [r7, #12]
 801741c:	22fb      	movs	r2, #251	@ 0xfb
 801741e:	711a      	strb	r2, [r3, #4]
    if (state == NETCONN_CONNECT) {
 8017420:	e050      	b.n	80174c4 <lwip_netconn_do_close+0xf8>
    } else {
#endif /* LWIP_NETCONN_FULLDUPLEX */
      if (msg->msg.sd.shut & NETCONN_SHUT_RD) {
 8017422:	68fb      	ldr	r3, [r7, #12]
 8017424:	7a1b      	ldrb	r3, [r3, #8]
 8017426:	f003 0301 	and.w	r3, r3, #1
 801742a:	2b00      	cmp	r3, #0
 801742c:	d004      	beq.n	8017438 <lwip_netconn_do_close+0x6c>
#if LWIP_NETCONN_FULLDUPLEX
        /* Mark mboxes invalid */
        netconn_mark_mbox_invalid(msg->conn);
#else /* LWIP_NETCONN_FULLDUPLEX */
        netconn_drain(msg->conn);
 801742e:	68fb      	ldr	r3, [r7, #12]
 8017430:	681b      	ldr	r3, [r3, #0]
 8017432:	4618      	mov	r0, r3
 8017434:	f7ff f82e 	bl	8016494 <netconn_drain>
#endif /* LWIP_NETCONN_FULLDUPLEX */
      }
      LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 8017438:	68fb      	ldr	r3, [r7, #12]
 801743a:	681b      	ldr	r3, [r3, #0]
 801743c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801743e:	2b00      	cmp	r3, #0
 8017440:	d006      	beq.n	8017450 <lwip_netconn_do_close+0x84>
 8017442:	4b22      	ldr	r3, [pc, #136]	@ (80174cc <lwip_netconn_do_close+0x100>)
 8017444:	f240 72bd 	movw	r2, #1981	@ 0x7bd
 8017448:	4921      	ldr	r1, [pc, #132]	@ (80174d0 <lwip_netconn_do_close+0x104>)
 801744a:	4822      	ldr	r0, [pc, #136]	@ (80174d4 <lwip_netconn_do_close+0x108>)
 801744c:	f012 fac6 	bl	80299dc <iprintf>
      msg->conn->state = NETCONN_CLOSE;
 8017450:	68fb      	ldr	r3, [r7, #12]
 8017452:	681b      	ldr	r3, [r3, #0]
 8017454:	2204      	movs	r2, #4
 8017456:	705a      	strb	r2, [r3, #1]
      msg->conn->current_msg = msg;
 8017458:	68fb      	ldr	r3, [r7, #12]
 801745a:	681b      	ldr	r3, [r3, #0]
 801745c:	68fa      	ldr	r2, [r7, #12]
 801745e:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
      if (lwip_netconn_do_close_internal(msg->conn, 0) != ERR_OK) {
 8017460:	68fb      	ldr	r3, [r7, #12]
 8017462:	681b      	ldr	r3, [r3, #0]
 8017464:	2100      	movs	r1, #0
 8017466:	4618      	mov	r0, r3
 8017468:	f7ff f892 	bl	8016590 <lwip_netconn_do_close_internal>
 801746c:	4603      	mov	r3, r0
 801746e:	2b00      	cmp	r3, #0
 8017470:	d027      	beq.n	80174c2 <lwip_netconn_do_close+0xf6>
        LWIP_ASSERT("state!", msg->conn->state == NETCONN_CLOSE);
 8017472:	68fb      	ldr	r3, [r7, #12]
 8017474:	681b      	ldr	r3, [r3, #0]
 8017476:	785b      	ldrb	r3, [r3, #1]
 8017478:	2b04      	cmp	r3, #4
 801747a:	d006      	beq.n	801748a <lwip_netconn_do_close+0xbe>
 801747c:	4b13      	ldr	r3, [pc, #76]	@ (80174cc <lwip_netconn_do_close+0x100>)
 801747e:	f240 72c2 	movw	r2, #1986	@ 0x7c2
 8017482:	4915      	ldr	r1, [pc, #84]	@ (80174d8 <lwip_netconn_do_close+0x10c>)
 8017484:	4813      	ldr	r0, [pc, #76]	@ (80174d4 <lwip_netconn_do_close+0x108>)
 8017486:	f012 faa9 	bl	80299dc <iprintf>
        UNLOCK_TCPIP_CORE();
 801748a:	f7f9 f84d 	bl	8010528 <sys_unlock_tcpip_core>
        sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 801748e:	68fb      	ldr	r3, [r7, #12]
 8017490:	681b      	ldr	r3, [r3, #0]
 8017492:	330c      	adds	r3, #12
 8017494:	2100      	movs	r1, #0
 8017496:	4618      	mov	r0, r3
 8017498:	f00e ff43 	bl	8026322 <sys_arch_sem_wait>
        LOCK_TCPIP_CORE();
 801749c:	f7f9 f834 	bl	8010508 <sys_lock_tcpip_core>
        LWIP_ASSERT("state!", msg->conn->state == NETCONN_NONE);
 80174a0:	68fb      	ldr	r3, [r7, #12]
 80174a2:	681b      	ldr	r3, [r3, #0]
 80174a4:	785b      	ldrb	r3, [r3, #1]
 80174a6:	2b00      	cmp	r3, #0
 80174a8:	d00b      	beq.n	80174c2 <lwip_netconn_do_close+0xf6>
 80174aa:	4b08      	ldr	r3, [pc, #32]	@ (80174cc <lwip_netconn_do_close+0x100>)
 80174ac:	f240 72c6 	movw	r2, #1990	@ 0x7c6
 80174b0:	4909      	ldr	r1, [pc, #36]	@ (80174d8 <lwip_netconn_do_close+0x10c>)
 80174b2:	4808      	ldr	r0, [pc, #32]	@ (80174d4 <lwip_netconn_do_close+0x108>)
 80174b4:	f012 fa92 	bl	80299dc <iprintf>
      }
#else /* LWIP_TCPIP_CORE_LOCKING */
      lwip_netconn_do_close_internal(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
      /* for tcp netconns, lwip_netconn_do_close_internal ACKs the message */
      return;
 80174b8:	e003      	b.n	80174c2 <lwip_netconn_do_close+0xf6>
    }
  } else
#endif /* LWIP_TCP */
  {
    msg->err = ERR_CONN;
 80174ba:	68fb      	ldr	r3, [r7, #12]
 80174bc:	22f5      	movs	r2, #245	@ 0xf5
 80174be:	711a      	strb	r2, [r3, #4]
 80174c0:	e000      	b.n	80174c4 <lwip_netconn_do_close+0xf8>
      return;
 80174c2:	bf00      	nop
  }
  TCPIP_APIMSG_ACK(msg);
}
 80174c4:	3710      	adds	r7, #16
 80174c6:	46bd      	mov	sp, r7
 80174c8:	bd80      	pop	{r7, pc}
 80174ca:	bf00      	nop
 80174cc:	0802cf24 	.word	0x0802cf24
 80174d0:	0802d2c8 	.word	0x0802d2c8
 80174d4:	0802cf68 	.word	0x0802cf68
 80174d8:	0802d2e4 	.word	0x0802d2e4

080174dc <err_to_errno>:
  EIO            /* ERR_ARG        -16     Illegal argument.        */
};

int
err_to_errno(err_t err)
{
 80174dc:	b480      	push	{r7}
 80174de:	b083      	sub	sp, #12
 80174e0:	af00      	add	r7, sp, #0
 80174e2:	4603      	mov	r3, r0
 80174e4:	71fb      	strb	r3, [r7, #7]
  if ((err > 0) || (-err >= (err_t)LWIP_ARRAYSIZE(err_to_errno_table))) {
 80174e6:	f997 3007 	ldrsb.w	r3, [r7, #7]
 80174ea:	2b00      	cmp	r3, #0
 80174ec:	dc04      	bgt.n	80174f8 <err_to_errno+0x1c>
 80174ee:	f997 3007 	ldrsb.w	r3, [r7, #7]
 80174f2:	f113 0f10 	cmn.w	r3, #16
 80174f6:	da01      	bge.n	80174fc <err_to_errno+0x20>
    return EIO;
 80174f8:	2305      	movs	r3, #5
 80174fa:	e005      	b.n	8017508 <err_to_errno+0x2c>
  }
  return err_to_errno_table[-err];
 80174fc:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8017500:	425b      	negs	r3, r3
 8017502:	4a04      	ldr	r2, [pc, #16]	@ (8017514 <err_to_errno+0x38>)
 8017504:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
}
 8017508:	4618      	mov	r0, r3
 801750a:	370c      	adds	r7, #12
 801750c:	46bd      	mov	sp, r7
 801750e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8017512:	4770      	bx	lr
 8017514:	08030ad0 	.word	0x08030ad0

08017518 <netbuf_delete>:
 *
 * @param buf pointer to a netbuf allocated by netbuf_new()
 */
void
netbuf_delete(struct netbuf *buf)
{
 8017518:	b580      	push	{r7, lr}
 801751a:	b082      	sub	sp, #8
 801751c:	af00      	add	r7, sp, #0
 801751e:	6078      	str	r0, [r7, #4]
  if (buf != NULL) {
 8017520:	687b      	ldr	r3, [r7, #4]
 8017522:	2b00      	cmp	r3, #0
 8017524:	d013      	beq.n	801754e <netbuf_delete+0x36>
    if (buf->p != NULL) {
 8017526:	687b      	ldr	r3, [r7, #4]
 8017528:	681b      	ldr	r3, [r3, #0]
 801752a:	2b00      	cmp	r3, #0
 801752c:	d00b      	beq.n	8017546 <netbuf_delete+0x2e>
      pbuf_free(buf->p);
 801752e:	687b      	ldr	r3, [r7, #4]
 8017530:	681b      	ldr	r3, [r3, #0]
 8017532:	4618      	mov	r0, r3
 8017534:	f002 ffda 	bl	801a4ec <pbuf_free>
      buf->p = buf->ptr = NULL;
 8017538:	687b      	ldr	r3, [r7, #4]
 801753a:	2200      	movs	r2, #0
 801753c:	605a      	str	r2, [r3, #4]
 801753e:	687b      	ldr	r3, [r7, #4]
 8017540:	685a      	ldr	r2, [r3, #4]
 8017542:	687b      	ldr	r3, [r7, #4]
 8017544:	601a      	str	r2, [r3, #0]
    }
    memp_free(MEMP_NETBUF, buf);
 8017546:	6879      	ldr	r1, [r7, #4]
 8017548:	2006      	movs	r0, #6
 801754a:	f002 f8e1 	bl	8019710 <memp_free>
  }
}
 801754e:	bf00      	nop
 8017550:	3708      	adds	r7, #8
 8017552:	46bd      	mov	sp, r7
 8017554:	bd80      	pop	{r7, pc}
	...

08017558 <netbuf_free>:
 *
 * @param buf pointer to the netbuf which contains the packet buffer to free
 */
void
netbuf_free(struct netbuf *buf)
{
 8017558:	b580      	push	{r7, lr}
 801755a:	b082      	sub	sp, #8
 801755c:	af00      	add	r7, sp, #0
 801755e:	6078      	str	r0, [r7, #4]
  LWIP_ERROR("netbuf_free: invalid buf", (buf != NULL), return;);
 8017560:	687b      	ldr	r3, [r7, #4]
 8017562:	2b00      	cmp	r3, #0
 8017564:	d106      	bne.n	8017574 <netbuf_free+0x1c>
 8017566:	4b0d      	ldr	r3, [pc, #52]	@ (801759c <netbuf_free+0x44>)
 8017568:	2281      	movs	r2, #129	@ 0x81
 801756a:	490d      	ldr	r1, [pc, #52]	@ (80175a0 <netbuf_free+0x48>)
 801756c:	480d      	ldr	r0, [pc, #52]	@ (80175a4 <netbuf_free+0x4c>)
 801756e:	f012 fa35 	bl	80299dc <iprintf>
 8017572:	e00f      	b.n	8017594 <netbuf_free+0x3c>
  if (buf->p != NULL) {
 8017574:	687b      	ldr	r3, [r7, #4]
 8017576:	681b      	ldr	r3, [r3, #0]
 8017578:	2b00      	cmp	r3, #0
 801757a:	d004      	beq.n	8017586 <netbuf_free+0x2e>
    pbuf_free(buf->p);
 801757c:	687b      	ldr	r3, [r7, #4]
 801757e:	681b      	ldr	r3, [r3, #0]
 8017580:	4618      	mov	r0, r3
 8017582:	f002 ffb3 	bl	801a4ec <pbuf_free>
  }
  buf->p = buf->ptr = NULL;
 8017586:	687b      	ldr	r3, [r7, #4]
 8017588:	2200      	movs	r2, #0
 801758a:	605a      	str	r2, [r3, #4]
 801758c:	687b      	ldr	r3, [r7, #4]
 801758e:	685a      	ldr	r2, [r3, #4]
 8017590:	687b      	ldr	r3, [r7, #4]
 8017592:	601a      	str	r2, [r3, #0]
#if LWIP_CHECKSUM_ON_COPY
  buf->flags = 0;
  buf->toport_chksum = 0;
#endif /* LWIP_CHECKSUM_ON_COPY */
}
 8017594:	3708      	adds	r7, #8
 8017596:	46bd      	mov	sp, r7
 8017598:	bd80      	pop	{r7, pc}
 801759a:	bf00      	nop
 801759c:	0802d47c 	.word	0x0802d47c
 80175a0:	0802d518 	.word	0x0802d518
 80175a4:	0802d4cc 	.word	0x0802d4cc

080175a8 <netbuf_ref>:
 * @return ERR_OK if data is referenced
 *         ERR_MEM if data couldn't be referenced due to lack of memory
 */
err_t
netbuf_ref(struct netbuf *buf, const void *dataptr, u16_t size)
{
 80175a8:	b580      	push	{r7, lr}
 80175aa:	b084      	sub	sp, #16
 80175ac:	af00      	add	r7, sp, #0
 80175ae:	60f8      	str	r0, [r7, #12]
 80175b0:	60b9      	str	r1, [r7, #8]
 80175b2:	4613      	mov	r3, r2
 80175b4:	80fb      	strh	r3, [r7, #6]
  LWIP_ERROR("netbuf_ref: invalid buf", (buf != NULL), return ERR_ARG;);
 80175b6:	68fb      	ldr	r3, [r7, #12]
 80175b8:	2b00      	cmp	r3, #0
 80175ba:	d108      	bne.n	80175ce <netbuf_ref+0x26>
 80175bc:	4b1c      	ldr	r3, [pc, #112]	@ (8017630 <netbuf_ref+0x88>)
 80175be:	2299      	movs	r2, #153	@ 0x99
 80175c0:	491c      	ldr	r1, [pc, #112]	@ (8017634 <netbuf_ref+0x8c>)
 80175c2:	481d      	ldr	r0, [pc, #116]	@ (8017638 <netbuf_ref+0x90>)
 80175c4:	f012 fa0a 	bl	80299dc <iprintf>
 80175c8:	f06f 030f 	mvn.w	r3, #15
 80175cc:	e02b      	b.n	8017626 <netbuf_ref+0x7e>
  if (buf->p != NULL) {
 80175ce:	68fb      	ldr	r3, [r7, #12]
 80175d0:	681b      	ldr	r3, [r3, #0]
 80175d2:	2b00      	cmp	r3, #0
 80175d4:	d004      	beq.n	80175e0 <netbuf_ref+0x38>
    pbuf_free(buf->p);
 80175d6:	68fb      	ldr	r3, [r7, #12]
 80175d8:	681b      	ldr	r3, [r3, #0]
 80175da:	4618      	mov	r0, r3
 80175dc:	f002 ff86 	bl	801a4ec <pbuf_free>
  }
  buf->p = pbuf_alloc(PBUF_TRANSPORT, 0, PBUF_REF);
 80175e0:	2241      	movs	r2, #65	@ 0x41
 80175e2:	2100      	movs	r1, #0
 80175e4:	2036      	movs	r0, #54	@ 0x36
 80175e6:	f002 fc6b 	bl	8019ec0 <pbuf_alloc>
 80175ea:	4602      	mov	r2, r0
 80175ec:	68fb      	ldr	r3, [r7, #12]
 80175ee:	601a      	str	r2, [r3, #0]
  if (buf->p == NULL) {
 80175f0:	68fb      	ldr	r3, [r7, #12]
 80175f2:	681b      	ldr	r3, [r3, #0]
 80175f4:	2b00      	cmp	r3, #0
 80175f6:	d105      	bne.n	8017604 <netbuf_ref+0x5c>
    buf->ptr = NULL;
 80175f8:	68fb      	ldr	r3, [r7, #12]
 80175fa:	2200      	movs	r2, #0
 80175fc:	605a      	str	r2, [r3, #4]
    return ERR_MEM;
 80175fe:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017602:	e010      	b.n	8017626 <netbuf_ref+0x7e>
  }
  ((struct pbuf_rom *)buf->p)->payload = dataptr;
 8017604:	68fb      	ldr	r3, [r7, #12]
 8017606:	681b      	ldr	r3, [r3, #0]
 8017608:	68ba      	ldr	r2, [r7, #8]
 801760a:	605a      	str	r2, [r3, #4]
  buf->p->len = buf->p->tot_len = size;
 801760c:	68fb      	ldr	r3, [r7, #12]
 801760e:	681b      	ldr	r3, [r3, #0]
 8017610:	88fa      	ldrh	r2, [r7, #6]
 8017612:	811a      	strh	r2, [r3, #8]
 8017614:	68fa      	ldr	r2, [r7, #12]
 8017616:	6812      	ldr	r2, [r2, #0]
 8017618:	891b      	ldrh	r3, [r3, #8]
 801761a:	8153      	strh	r3, [r2, #10]
  buf->ptr = buf->p;
 801761c:	68fb      	ldr	r3, [r7, #12]
 801761e:	681a      	ldr	r2, [r3, #0]
 8017620:	68fb      	ldr	r3, [r7, #12]
 8017622:	605a      	str	r2, [r3, #4]
  return ERR_OK;
 8017624:	2300      	movs	r3, #0
}
 8017626:	4618      	mov	r0, r3
 8017628:	3710      	adds	r7, #16
 801762a:	46bd      	mov	sp, r7
 801762c:	bd80      	pop	{r7, pc}
 801762e:	bf00      	nop
 8017630:	0802d47c 	.word	0x0802d47c
 8017634:	0802d534 	.word	0x0802d534
 8017638:	0802d4cc 	.word	0x0802d4cc

0801763c <tryget_socket_unconn_nouse>:
#endif /* LWIP_NETCONN_FULLDUPLEX */

/* Translate a socket 'int' into a pointer (only fails if the index is invalid) */
static struct lwip_sock *
tryget_socket_unconn_nouse(int fd)
{
 801763c:	b480      	push	{r7}
 801763e:	b085      	sub	sp, #20
 8017640:	af00      	add	r7, sp, #0
 8017642:	6078      	str	r0, [r7, #4]
  int s = fd - LWIP_SOCKET_OFFSET;
 8017644:	687b      	ldr	r3, [r7, #4]
 8017646:	60fb      	str	r3, [r7, #12]
  if ((s < 0) || (s >= NUM_SOCKETS)) {
 8017648:	68fb      	ldr	r3, [r7, #12]
 801764a:	2b00      	cmp	r3, #0
 801764c:	db02      	blt.n	8017654 <tryget_socket_unconn_nouse+0x18>
 801764e:	68fb      	ldr	r3, [r7, #12]
 8017650:	2b03      	cmp	r3, #3
 8017652:	dd01      	ble.n	8017658 <tryget_socket_unconn_nouse+0x1c>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("tryget_socket_unconn(%d): invalid\n", fd));
    return NULL;
 8017654:	2300      	movs	r3, #0
 8017656:	e003      	b.n	8017660 <tryget_socket_unconn_nouse+0x24>
  }
  return &sockets[s];
 8017658:	68fb      	ldr	r3, [r7, #12]
 801765a:	011b      	lsls	r3, r3, #4
 801765c:	4a03      	ldr	r2, [pc, #12]	@ (801766c <tryget_socket_unconn_nouse+0x30>)
 801765e:	4413      	add	r3, r2
}
 8017660:	4618      	mov	r0, r3
 8017662:	3714      	adds	r7, #20
 8017664:	46bd      	mov	sp, r7
 8017666:	f85d 7b04 	ldr.w	r7, [sp], #4
 801766a:	4770      	bx	lr
 801766c:	240242e4 	.word	0x240242e4

08017670 <tryget_socket_unconn>:
}

/* Translate a socket 'int' into a pointer (only fails if the index is invalid) */
static struct lwip_sock *
tryget_socket_unconn(int fd)
{
 8017670:	b580      	push	{r7, lr}
 8017672:	b084      	sub	sp, #16
 8017674:	af00      	add	r7, sp, #0
 8017676:	6078      	str	r0, [r7, #4]
  struct lwip_sock *ret = tryget_socket_unconn_nouse(fd);
 8017678:	6878      	ldr	r0, [r7, #4]
 801767a:	f7ff ffdf 	bl	801763c <tryget_socket_unconn_nouse>
 801767e:	60f8      	str	r0, [r7, #12]
  if (ret != NULL) {
    if (!sock_inc_used(ret)) {
      return NULL;
    }
  }
  return ret;
 8017680:	68fb      	ldr	r3, [r7, #12]
}
 8017682:	4618      	mov	r0, r3
 8017684:	3710      	adds	r7, #16
 8017686:	46bd      	mov	sp, r7
 8017688:	bd80      	pop	{r7, pc}

0801768a <tryget_socket>:
 * @param fd externally used socket index
 * @return struct lwip_sock for the socket or NULL if not found
 */
static struct lwip_sock *
tryget_socket(int fd)
{
 801768a:	b580      	push	{r7, lr}
 801768c:	b084      	sub	sp, #16
 801768e:	af00      	add	r7, sp, #0
 8017690:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock = tryget_socket_unconn(fd);
 8017692:	6878      	ldr	r0, [r7, #4]
 8017694:	f7ff ffec 	bl	8017670 <tryget_socket_unconn>
 8017698:	60f8      	str	r0, [r7, #12]
  if (sock != NULL) {
 801769a:	68fb      	ldr	r3, [r7, #12]
 801769c:	2b00      	cmp	r3, #0
 801769e:	d005      	beq.n	80176ac <tryget_socket+0x22>
    if (sock->conn) {
 80176a0:	68fb      	ldr	r3, [r7, #12]
 80176a2:	681b      	ldr	r3, [r3, #0]
 80176a4:	2b00      	cmp	r3, #0
 80176a6:	d001      	beq.n	80176ac <tryget_socket+0x22>
      return sock;
 80176a8:	68fb      	ldr	r3, [r7, #12]
 80176aa:	e000      	b.n	80176ae <tryget_socket+0x24>
    }
    done_socket(sock);
  }
  return NULL;
 80176ac:	2300      	movs	r3, #0
}
 80176ae:	4618      	mov	r0, r3
 80176b0:	3710      	adds	r7, #16
 80176b2:	46bd      	mov	sp, r7
 80176b4:	bd80      	pop	{r7, pc}
	...

080176b8 <get_socket>:
 * @param fd externally used socket index
 * @return struct lwip_sock for the socket or NULL if not found
 */
static struct lwip_sock *
get_socket(int fd)
{
 80176b8:	b580      	push	{r7, lr}
 80176ba:	b084      	sub	sp, #16
 80176bc:	af00      	add	r7, sp, #0
 80176be:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock = tryget_socket(fd);
 80176c0:	6878      	ldr	r0, [r7, #4]
 80176c2:	f7ff ffe2 	bl	801768a <tryget_socket>
 80176c6:	60f8      	str	r0, [r7, #12]
  if (!sock) {
 80176c8:	68fb      	ldr	r3, [r7, #12]
 80176ca:	2b00      	cmp	r3, #0
 80176cc:	d104      	bne.n	80176d8 <get_socket+0x20>
    if ((fd < LWIP_SOCKET_OFFSET) || (fd >= (LWIP_SOCKET_OFFSET + NUM_SOCKETS))) {
      LWIP_DEBUGF(SOCKETS_DEBUG, ("get_socket(%d): invalid\n", fd));
    }
    set_errno(EBADF);
 80176ce:	4b05      	ldr	r3, [pc, #20]	@ (80176e4 <get_socket+0x2c>)
 80176d0:	2209      	movs	r2, #9
 80176d2:	601a      	str	r2, [r3, #0]
    return NULL;
 80176d4:	2300      	movs	r3, #0
 80176d6:	e000      	b.n	80176da <get_socket+0x22>
  }
  return sock;
 80176d8:	68fb      	ldr	r3, [r7, #12]
}
 80176da:	4618      	mov	r0, r3
 80176dc:	3710      	adds	r7, #16
 80176de:	46bd      	mov	sp, r7
 80176e0:	bd80      	pop	{r7, pc}
 80176e2:	bf00      	nop
 80176e4:	2402b180 	.word	0x2402b180

080176e8 <alloc_socket>:
 *                 0 if socket has been created by socket()
 * @return the index of the new socket; -1 on error
 */
static int
alloc_socket(struct netconn *newconn, int accepted)
{
 80176e8:	b580      	push	{r7, lr}
 80176ea:	b084      	sub	sp, #16
 80176ec:	af00      	add	r7, sp, #0
 80176ee:	6078      	str	r0, [r7, #4]
 80176f0:	6039      	str	r1, [r7, #0]
  int i;
  SYS_ARCH_DECL_PROTECT(lev);
  LWIP_UNUSED_ARG(accepted);

  /* allocate a new socket identifier */
  for (i = 0; i < NUM_SOCKETS; ++i) {
 80176f2:	2300      	movs	r3, #0
 80176f4:	60fb      	str	r3, [r7, #12]
 80176f6:	e052      	b.n	801779e <alloc_socket+0xb6>
    /* Protect socket array */
    SYS_ARCH_PROTECT(lev);
 80176f8:	f00e feda 	bl	80264b0 <sys_arch_protect>
 80176fc:	60b8      	str	r0, [r7, #8]
    if (!sockets[i].conn) {
 80176fe:	4a2c      	ldr	r2, [pc, #176]	@ (80177b0 <alloc_socket+0xc8>)
 8017700:	68fb      	ldr	r3, [r7, #12]
 8017702:	011b      	lsls	r3, r3, #4
 8017704:	4413      	add	r3, r2
 8017706:	681b      	ldr	r3, [r3, #0]
 8017708:	2b00      	cmp	r3, #0
 801770a:	d142      	bne.n	8017792 <alloc_socket+0xaa>
        continue;
      }
      sockets[i].fd_used    = 1;
      sockets[i].fd_free_pending = 0;
#endif
      sockets[i].conn       = newconn;
 801770c:	4a28      	ldr	r2, [pc, #160]	@ (80177b0 <alloc_socket+0xc8>)
 801770e:	68fb      	ldr	r3, [r7, #12]
 8017710:	011b      	lsls	r3, r3, #4
 8017712:	4413      	add	r3, r2
 8017714:	687a      	ldr	r2, [r7, #4]
 8017716:	601a      	str	r2, [r3, #0]
      /* The socket is not yet known to anyone, so no need to protect
         after having marked it as used. */
      SYS_ARCH_UNPROTECT(lev);
 8017718:	68b8      	ldr	r0, [r7, #8]
 801771a:	f00e fed7 	bl	80264cc <sys_arch_unprotect>
      sockets[i].lastdata.pbuf = NULL;
 801771e:	4a24      	ldr	r2, [pc, #144]	@ (80177b0 <alloc_socket+0xc8>)
 8017720:	68fb      	ldr	r3, [r7, #12]
 8017722:	011b      	lsls	r3, r3, #4
 8017724:	4413      	add	r3, r2
 8017726:	3304      	adds	r3, #4
 8017728:	2200      	movs	r2, #0
 801772a:	601a      	str	r2, [r3, #0]
#if LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL
      LWIP_ASSERT("sockets[i].select_waiting == 0", sockets[i].select_waiting == 0);
 801772c:	4a20      	ldr	r2, [pc, #128]	@ (80177b0 <alloc_socket+0xc8>)
 801772e:	68fb      	ldr	r3, [r7, #12]
 8017730:	011b      	lsls	r3, r3, #4
 8017732:	4413      	add	r3, r2
 8017734:	330e      	adds	r3, #14
 8017736:	781b      	ldrb	r3, [r3, #0]
 8017738:	2b00      	cmp	r3, #0
 801773a:	d006      	beq.n	801774a <alloc_socket+0x62>
 801773c:	4b1d      	ldr	r3, [pc, #116]	@ (80177b4 <alloc_socket+0xcc>)
 801773e:	f240 220e 	movw	r2, #526	@ 0x20e
 8017742:	491d      	ldr	r1, [pc, #116]	@ (80177b8 <alloc_socket+0xd0>)
 8017744:	481d      	ldr	r0, [pc, #116]	@ (80177bc <alloc_socket+0xd4>)
 8017746:	f012 f949 	bl	80299dc <iprintf>
      sockets[i].rcvevent   = 0;
 801774a:	4a19      	ldr	r2, [pc, #100]	@ (80177b0 <alloc_socket+0xc8>)
 801774c:	68fb      	ldr	r3, [r7, #12]
 801774e:	011b      	lsls	r3, r3, #4
 8017750:	4413      	add	r3, r2
 8017752:	3308      	adds	r3, #8
 8017754:	2200      	movs	r2, #0
 8017756:	801a      	strh	r2, [r3, #0]
      /* TCP sendbuf is empty, but the socket is not yet writable until connected
       * (unless it has been created by accept()). */
      sockets[i].sendevent  = (NETCONNTYPE_GROUP(newconn->type) == NETCONN_TCP ? (accepted != 0) : 1);
 8017758:	687b      	ldr	r3, [r7, #4]
 801775a:	781b      	ldrb	r3, [r3, #0]
 801775c:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017760:	2b10      	cmp	r3, #16
 8017762:	d102      	bne.n	801776a <alloc_socket+0x82>
 8017764:	683b      	ldr	r3, [r7, #0]
 8017766:	2b00      	cmp	r3, #0
 8017768:	d001      	beq.n	801776e <alloc_socket+0x86>
 801776a:	2301      	movs	r3, #1
 801776c:	e000      	b.n	8017770 <alloc_socket+0x88>
 801776e:	2300      	movs	r3, #0
 8017770:	b299      	uxth	r1, r3
 8017772:	4a0f      	ldr	r2, [pc, #60]	@ (80177b0 <alloc_socket+0xc8>)
 8017774:	68fb      	ldr	r3, [r7, #12]
 8017776:	011b      	lsls	r3, r3, #4
 8017778:	4413      	add	r3, r2
 801777a:	330a      	adds	r3, #10
 801777c:	460a      	mov	r2, r1
 801777e:	801a      	strh	r2, [r3, #0]
      sockets[i].errevent   = 0;
 8017780:	4a0b      	ldr	r2, [pc, #44]	@ (80177b0 <alloc_socket+0xc8>)
 8017782:	68fb      	ldr	r3, [r7, #12]
 8017784:	011b      	lsls	r3, r3, #4
 8017786:	4413      	add	r3, r2
 8017788:	330c      	adds	r3, #12
 801778a:	2200      	movs	r2, #0
 801778c:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL */
      return i + LWIP_SOCKET_OFFSET;
 801778e:	68fb      	ldr	r3, [r7, #12]
 8017790:	e00a      	b.n	80177a8 <alloc_socket+0xc0>
    }
    SYS_ARCH_UNPROTECT(lev);
 8017792:	68b8      	ldr	r0, [r7, #8]
 8017794:	f00e fe9a 	bl	80264cc <sys_arch_unprotect>
  for (i = 0; i < NUM_SOCKETS; ++i) {
 8017798:	68fb      	ldr	r3, [r7, #12]
 801779a:	3301      	adds	r3, #1
 801779c:	60fb      	str	r3, [r7, #12]
 801779e:	68fb      	ldr	r3, [r7, #12]
 80177a0:	2b03      	cmp	r3, #3
 80177a2:	dda9      	ble.n	80176f8 <alloc_socket+0x10>
  }
  return -1;
 80177a4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 80177a8:	4618      	mov	r0, r3
 80177aa:	3710      	adds	r7, #16
 80177ac:	46bd      	mov	sp, r7
 80177ae:	bd80      	pop	{r7, pc}
 80177b0:	240242e4 	.word	0x240242e4
 80177b4:	0802d614 	.word	0x0802d614
 80177b8:	0802d648 	.word	0x0802d648
 80177bc:	0802d668 	.word	0x0802d668

080177c0 <free_socket_locked>:
 * @param lastdata lastdata is stored here, must be freed externally
 */
static int
free_socket_locked(struct lwip_sock *sock, int is_tcp, struct netconn **conn,
                   union lwip_sock_lastdata *lastdata)
{
 80177c0:	b480      	push	{r7}
 80177c2:	b085      	sub	sp, #20
 80177c4:	af00      	add	r7, sp, #0
 80177c6:	60f8      	str	r0, [r7, #12]
 80177c8:	60b9      	str	r1, [r7, #8]
 80177ca:	607a      	str	r2, [r7, #4]
 80177cc:	603b      	str	r3, [r7, #0]
  }
#else /* LWIP_NETCONN_FULLDUPLEX */
  LWIP_UNUSED_ARG(is_tcp);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  *lastdata = sock->lastdata;
 80177ce:	683b      	ldr	r3, [r7, #0]
 80177d0:	68fa      	ldr	r2, [r7, #12]
 80177d2:	6852      	ldr	r2, [r2, #4]
 80177d4:	601a      	str	r2, [r3, #0]
  sock->lastdata.pbuf = NULL;
 80177d6:	68fb      	ldr	r3, [r7, #12]
 80177d8:	2200      	movs	r2, #0
 80177da:	605a      	str	r2, [r3, #4]
  *conn = sock->conn;
 80177dc:	68fb      	ldr	r3, [r7, #12]
 80177de:	681a      	ldr	r2, [r3, #0]
 80177e0:	687b      	ldr	r3, [r7, #4]
 80177e2:	601a      	str	r2, [r3, #0]
  sock->conn = NULL;
 80177e4:	68fb      	ldr	r3, [r7, #12]
 80177e6:	2200      	movs	r2, #0
 80177e8:	601a      	str	r2, [r3, #0]
  return 1;
 80177ea:	2301      	movs	r3, #1
}
 80177ec:	4618      	mov	r0, r3
 80177ee:	3714      	adds	r7, #20
 80177f0:	46bd      	mov	sp, r7
 80177f2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80177f6:	4770      	bx	lr

080177f8 <free_socket_free_elements>:

/** Free a socket's leftover members.
 */
static void
free_socket_free_elements(int is_tcp, struct netconn *conn, union lwip_sock_lastdata *lastdata)
{
 80177f8:	b580      	push	{r7, lr}
 80177fa:	b084      	sub	sp, #16
 80177fc:	af00      	add	r7, sp, #0
 80177fe:	60f8      	str	r0, [r7, #12]
 8017800:	60b9      	str	r1, [r7, #8]
 8017802:	607a      	str	r2, [r7, #4]
  if (lastdata->pbuf != NULL) {
 8017804:	687b      	ldr	r3, [r7, #4]
 8017806:	681b      	ldr	r3, [r3, #0]
 8017808:	2b00      	cmp	r3, #0
 801780a:	d00d      	beq.n	8017828 <free_socket_free_elements+0x30>
    if (is_tcp) {
 801780c:	68fb      	ldr	r3, [r7, #12]
 801780e:	2b00      	cmp	r3, #0
 8017810:	d005      	beq.n	801781e <free_socket_free_elements+0x26>
      pbuf_free(lastdata->pbuf);
 8017812:	687b      	ldr	r3, [r7, #4]
 8017814:	681b      	ldr	r3, [r3, #0]
 8017816:	4618      	mov	r0, r3
 8017818:	f002 fe68 	bl	801a4ec <pbuf_free>
 801781c:	e004      	b.n	8017828 <free_socket_free_elements+0x30>
    } else {
      netbuf_delete(lastdata->netbuf);
 801781e:	687b      	ldr	r3, [r7, #4]
 8017820:	681b      	ldr	r3, [r3, #0]
 8017822:	4618      	mov	r0, r3
 8017824:	f7ff fe78 	bl	8017518 <netbuf_delete>
    }
  }
  if (conn != NULL) {
 8017828:	68bb      	ldr	r3, [r7, #8]
 801782a:	2b00      	cmp	r3, #0
 801782c:	d002      	beq.n	8017834 <free_socket_free_elements+0x3c>
    /* netconn_prepare_delete() has already been called, here we only free the conn */
    netconn_delete(conn);
 801782e:	68b8      	ldr	r0, [r7, #8]
 8017830:	f7fd fd50 	bl	80152d4 <netconn_delete>
  }
}
 8017834:	bf00      	nop
 8017836:	3710      	adds	r7, #16
 8017838:	46bd      	mov	sp, r7
 801783a:	bd80      	pop	{r7, pc}

0801783c <free_socket>:
 * @param sock the socket to free
 * @param is_tcp != 0 for TCP sockets, used to free lastdata
 */
static void
free_socket(struct lwip_sock *sock, int is_tcp)
{
 801783c:	b580      	push	{r7, lr}
 801783e:	b086      	sub	sp, #24
 8017840:	af00      	add	r7, sp, #0
 8017842:	6078      	str	r0, [r7, #4]
 8017844:	6039      	str	r1, [r7, #0]
  struct netconn *conn;
  union lwip_sock_lastdata lastdata;
  SYS_ARCH_DECL_PROTECT(lev);

  /* Protect socket array */
  SYS_ARCH_PROTECT(lev);
 8017846:	f00e fe33 	bl	80264b0 <sys_arch_protect>
 801784a:	6178      	str	r0, [r7, #20]

  freed = free_socket_locked(sock, is_tcp, &conn, &lastdata);
 801784c:	f107 0308 	add.w	r3, r7, #8
 8017850:	f107 020c 	add.w	r2, r7, #12
 8017854:	6839      	ldr	r1, [r7, #0]
 8017856:	6878      	ldr	r0, [r7, #4]
 8017858:	f7ff ffb2 	bl	80177c0 <free_socket_locked>
 801785c:	6138      	str	r0, [r7, #16]
  SYS_ARCH_UNPROTECT(lev);
 801785e:	6978      	ldr	r0, [r7, #20]
 8017860:	f00e fe34 	bl	80264cc <sys_arch_unprotect>
  /* don't use 'sock' after this line, as another task might have allocated it */

  if (freed) {
 8017864:	693b      	ldr	r3, [r7, #16]
 8017866:	2b00      	cmp	r3, #0
 8017868:	d006      	beq.n	8017878 <free_socket+0x3c>
    free_socket_free_elements(is_tcp, conn, &lastdata);
 801786a:	68fb      	ldr	r3, [r7, #12]
 801786c:	f107 0208 	add.w	r2, r7, #8
 8017870:	4619      	mov	r1, r3
 8017872:	6838      	ldr	r0, [r7, #0]
 8017874:	f7ff ffc0 	bl	80177f8 <free_socket_free_elements>
  }
}
 8017878:	bf00      	nop
 801787a:	3718      	adds	r7, #24
 801787c:	46bd      	mov	sp, r7
 801787e:	bd80      	pop	{r7, pc}

08017880 <lwip_close>:
  return 0;
}

int
lwip_close(int s)
{
 8017880:	b580      	push	{r7, lr}
 8017882:	b086      	sub	sp, #24
 8017884:	af00      	add	r7, sp, #0
 8017886:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock;
  int is_tcp = 0;
 8017888:	2300      	movs	r3, #0
 801788a:	617b      	str	r3, [r7, #20]
  err_t err;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_close(%d)\n", s));

  sock = get_socket(s);
 801788c:	6878      	ldr	r0, [r7, #4]
 801788e:	f7ff ff13 	bl	80176b8 <get_socket>
 8017892:	6138      	str	r0, [r7, #16]
  if (!sock) {
 8017894:	693b      	ldr	r3, [r7, #16]
 8017896:	2b00      	cmp	r3, #0
 8017898:	d102      	bne.n	80178a0 <lwip_close+0x20>
    return -1;
 801789a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801789e:	e039      	b.n	8017914 <lwip_close+0x94>
  }

  if (sock->conn != NULL) {
 80178a0:	693b      	ldr	r3, [r7, #16]
 80178a2:	681b      	ldr	r3, [r3, #0]
 80178a4:	2b00      	cmp	r3, #0
 80178a6:	d00b      	beq.n	80178c0 <lwip_close+0x40>
    is_tcp = NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP;
 80178a8:	693b      	ldr	r3, [r7, #16]
 80178aa:	681b      	ldr	r3, [r3, #0]
 80178ac:	781b      	ldrb	r3, [r3, #0]
 80178ae:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80178b2:	2b10      	cmp	r3, #16
 80178b4:	bf0c      	ite	eq
 80178b6:	2301      	moveq	r3, #1
 80178b8:	2300      	movne	r3, #0
 80178ba:	b2db      	uxtb	r3, r3
 80178bc:	617b      	str	r3, [r7, #20]
 80178be:	e00a      	b.n	80178d6 <lwip_close+0x56>
  } else {
    LWIP_ASSERT("sock->lastdata == NULL", sock->lastdata.pbuf == NULL);
 80178c0:	693b      	ldr	r3, [r7, #16]
 80178c2:	685b      	ldr	r3, [r3, #4]
 80178c4:	2b00      	cmp	r3, #0
 80178c6:	d006      	beq.n	80178d6 <lwip_close+0x56>
 80178c8:	4b14      	ldr	r3, [pc, #80]	@ (801791c <lwip_close+0x9c>)
 80178ca:	f44f 7245 	mov.w	r2, #788	@ 0x314
 80178ce:	4914      	ldr	r1, [pc, #80]	@ (8017920 <lwip_close+0xa0>)
 80178d0:	4814      	ldr	r0, [pc, #80]	@ (8017924 <lwip_close+0xa4>)
 80178d2:	f012 f883 	bl	80299dc <iprintf>
#if LWIP_IPV6_MLD
  /* drop all possibly joined MLD6 memberships */
  lwip_socket_drop_registered_mld6_memberships(s);
#endif /* LWIP_IPV6_MLD */

  err = netconn_prepare_delete(sock->conn);
 80178d6:	693b      	ldr	r3, [r7, #16]
 80178d8:	681b      	ldr	r3, [r3, #0]
 80178da:	4618      	mov	r0, r3
 80178dc:	f7fd fcd6 	bl	801528c <netconn_prepare_delete>
 80178e0:	4603      	mov	r3, r0
 80178e2:	73fb      	strb	r3, [r7, #15]
  if (err != ERR_OK) {
 80178e4:	f997 300f 	ldrsb.w	r3, [r7, #15]
 80178e8:	2b00      	cmp	r3, #0
 80178ea:	d00e      	beq.n	801790a <lwip_close+0x8a>
    sock_set_errno(sock, err_to_errno(err));
 80178ec:	f997 300f 	ldrsb.w	r3, [r7, #15]
 80178f0:	4618      	mov	r0, r3
 80178f2:	f7ff fdf3 	bl	80174dc <err_to_errno>
 80178f6:	60b8      	str	r0, [r7, #8]
 80178f8:	68bb      	ldr	r3, [r7, #8]
 80178fa:	2b00      	cmp	r3, #0
 80178fc:	d002      	beq.n	8017904 <lwip_close+0x84>
 80178fe:	4a0a      	ldr	r2, [pc, #40]	@ (8017928 <lwip_close+0xa8>)
 8017900:	68bb      	ldr	r3, [r7, #8]
 8017902:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 8017904:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017908:	e004      	b.n	8017914 <lwip_close+0x94>
  }

  free_socket(sock, is_tcp);
 801790a:	6979      	ldr	r1, [r7, #20]
 801790c:	6938      	ldr	r0, [r7, #16]
 801790e:	f7ff ff95 	bl	801783c <free_socket>
  set_errno(0);
  return 0;
 8017912:	2300      	movs	r3, #0
}
 8017914:	4618      	mov	r0, r3
 8017916:	3718      	adds	r7, #24
 8017918:	46bd      	mov	sp, r7
 801791a:	bd80      	pop	{r7, pc}
 801791c:	0802d614 	.word	0x0802d614
 8017920:	0802d6d4 	.word	0x0802d6d4
 8017924:	0802d668 	.word	0x0802d668
 8017928:	2402b180 	.word	0x2402b180

0801792c <lwip_connect>:

int
lwip_connect(int s, const struct sockaddr *name, socklen_t namelen)
{
 801792c:	b580      	push	{r7, lr}
 801792e:	b08a      	sub	sp, #40	@ 0x28
 8017930:	af00      	add	r7, sp, #0
 8017932:	60f8      	str	r0, [r7, #12]
 8017934:	60b9      	str	r1, [r7, #8]
 8017936:	607a      	str	r2, [r7, #4]
  struct lwip_sock *sock;
  err_t err;

  sock = get_socket(s);
 8017938:	68f8      	ldr	r0, [r7, #12]
 801793a:	f7ff febd 	bl	80176b8 <get_socket>
 801793e:	6278      	str	r0, [r7, #36]	@ 0x24
  if (!sock) {
 8017940:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8017942:	2b00      	cmp	r3, #0
 8017944:	d102      	bne.n	801794c <lwip_connect+0x20>
    return -1;
 8017946:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801794a:	e062      	b.n	8017a12 <lwip_connect+0xe6>
    done_socket(sock);
    return -1;
  }

  LWIP_UNUSED_ARG(namelen);
  if (name->sa_family == AF_UNSPEC) {
 801794c:	68bb      	ldr	r3, [r7, #8]
 801794e:	785b      	ldrb	r3, [r3, #1]
 8017950:	2b00      	cmp	r3, #0
 8017952:	d108      	bne.n	8017966 <lwip_connect+0x3a>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d, AF_UNSPEC)\n", s));
    err = netconn_disconnect(sock->conn);
 8017954:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8017956:	681b      	ldr	r3, [r3, #0]
 8017958:	4618      	mov	r0, r3
 801795a:	f7fd fd61 	bl	8015420 <netconn_disconnect>
 801795e:	4603      	mov	r3, r0
 8017960:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
 8017964:	e039      	b.n	80179da <lwip_connect+0xae>
  } else {
    ip_addr_t remote_addr;
    u16_t remote_port;

    /* check size, family and alignment of 'name' */
    LWIP_ERROR("lwip_connect: invalid address", IS_SOCK_ADDR_LEN_VALID(namelen) &&
 8017966:	687b      	ldr	r3, [r7, #4]
 8017968:	2b10      	cmp	r3, #16
 801796a:	d10c      	bne.n	8017986 <lwip_connect+0x5a>
 801796c:	68bb      	ldr	r3, [r7, #8]
 801796e:	785b      	ldrb	r3, [r3, #1]
 8017970:	2b00      	cmp	r3, #0
 8017972:	d003      	beq.n	801797c <lwip_connect+0x50>
 8017974:	68bb      	ldr	r3, [r7, #8]
 8017976:	785b      	ldrb	r3, [r3, #1]
 8017978:	2b02      	cmp	r3, #2
 801797a:	d104      	bne.n	8017986 <lwip_connect+0x5a>
 801797c:	68bb      	ldr	r3, [r7, #8]
 801797e:	f003 0303 	and.w	r3, r3, #3
 8017982:	2b00      	cmp	r3, #0
 8017984:	d014      	beq.n	80179b0 <lwip_connect+0x84>
 8017986:	4b25      	ldr	r3, [pc, #148]	@ (8017a1c <lwip_connect+0xf0>)
 8017988:	f240 3247 	movw	r2, #839	@ 0x347
 801798c:	4924      	ldr	r1, [pc, #144]	@ (8017a20 <lwip_connect+0xf4>)
 801798e:	4825      	ldr	r0, [pc, #148]	@ (8017a24 <lwip_connect+0xf8>)
 8017990:	f012 f824 	bl	80299dc <iprintf>
 8017994:	f06f 000f 	mvn.w	r0, #15
 8017998:	f7ff fda0 	bl	80174dc <err_to_errno>
 801799c:	61f8      	str	r0, [r7, #28]
 801799e:	69fb      	ldr	r3, [r7, #28]
 80179a0:	2b00      	cmp	r3, #0
 80179a2:	d002      	beq.n	80179aa <lwip_connect+0x7e>
 80179a4:	4a20      	ldr	r2, [pc, #128]	@ (8017a28 <lwip_connect+0xfc>)
 80179a6:	69fb      	ldr	r3, [r7, #28]
 80179a8:	6013      	str	r3, [r2, #0]
 80179aa:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80179ae:	e030      	b.n	8017a12 <lwip_connect+0xe6>
               IS_SOCK_ADDR_TYPE_VALID_OR_UNSPEC(name) && IS_SOCK_ADDR_ALIGNED(name),
               sock_set_errno(sock, err_to_errno(ERR_ARG)); done_socket(sock); return -1;);

    SOCKADDR_TO_IPADDR_PORT(name, &remote_addr, remote_port);
 80179b0:	68bb      	ldr	r3, [r7, #8]
 80179b2:	685b      	ldr	r3, [r3, #4]
 80179b4:	613b      	str	r3, [r7, #16]
 80179b6:	68bb      	ldr	r3, [r7, #8]
 80179b8:	885b      	ldrh	r3, [r3, #2]
 80179ba:	4618      	mov	r0, r3
 80179bc:	f001 f8b4 	bl	8018b28 <lwip_htons>
 80179c0:	4603      	mov	r3, r0
 80179c2:	847b      	strh	r3, [r7, #34]	@ 0x22
      unmap_ipv4_mapped_ipv6(ip_2_ip4(&remote_addr), ip_2_ip6(&remote_addr));
      IP_SET_TYPE_VAL(remote_addr, IPADDR_TYPE_V4);
    }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

    err = netconn_connect(sock->conn, &remote_addr, remote_port);
 80179c4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80179c6:	681b      	ldr	r3, [r3, #0]
 80179c8:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 80179ca:	f107 0110 	add.w	r1, r7, #16
 80179ce:	4618      	mov	r0, r3
 80179d0:	f7fd fcee 	bl	80153b0 <netconn_connect>
 80179d4:	4603      	mov	r3, r0
 80179d6:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
  }

  if (err != ERR_OK) {
 80179da:	f997 3021 	ldrsb.w	r3, [r7, #33]	@ 0x21
 80179de:	2b00      	cmp	r3, #0
 80179e0:	d00e      	beq.n	8017a00 <lwip_connect+0xd4>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) failed, err=%d\n", s, err));
    sock_set_errno(sock, err_to_errno(err));
 80179e2:	f997 3021 	ldrsb.w	r3, [r7, #33]	@ 0x21
 80179e6:	4618      	mov	r0, r3
 80179e8:	f7ff fd78 	bl	80174dc <err_to_errno>
 80179ec:	6178      	str	r0, [r7, #20]
 80179ee:	697b      	ldr	r3, [r7, #20]
 80179f0:	2b00      	cmp	r3, #0
 80179f2:	d002      	beq.n	80179fa <lwip_connect+0xce>
 80179f4:	4a0c      	ldr	r2, [pc, #48]	@ (8017a28 <lwip_connect+0xfc>)
 80179f6:	697b      	ldr	r3, [r7, #20]
 80179f8:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 80179fa:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80179fe:	e008      	b.n	8017a12 <lwip_connect+0xe6>
  }

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) succeeded\n", s));
  sock_set_errno(sock, 0);
 8017a00:	2300      	movs	r3, #0
 8017a02:	61bb      	str	r3, [r7, #24]
 8017a04:	69bb      	ldr	r3, [r7, #24]
 8017a06:	2b00      	cmp	r3, #0
 8017a08:	d002      	beq.n	8017a10 <lwip_connect+0xe4>
 8017a0a:	4a07      	ldr	r2, [pc, #28]	@ (8017a28 <lwip_connect+0xfc>)
 8017a0c:	69bb      	ldr	r3, [r7, #24]
 8017a0e:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return 0;
 8017a10:	2300      	movs	r3, #0
}
 8017a12:	4618      	mov	r0, r3
 8017a14:	3728      	adds	r7, #40	@ 0x28
 8017a16:	46bd      	mov	sp, r7
 8017a18:	bd80      	pop	{r7, pc}
 8017a1a:	bf00      	nop
 8017a1c:	0802d614 	.word	0x0802d614
 8017a20:	0802d6ec 	.word	0x0802d6ec
 8017a24:	0802d668 	.word	0x0802d668
 8017a28:	2402b180 	.word	0x2402b180

08017a2c <lwip_recv_tcp>:
 * until "len" bytes are received or we're otherwise done.
 * Keeps sock->lastdata for peeking or partly copying.
 */
static ssize_t
lwip_recv_tcp(struct lwip_sock *sock, void *mem, size_t len, int flags)
{
 8017a2c:	b580      	push	{r7, lr}
 8017a2e:	b08c      	sub	sp, #48	@ 0x30
 8017a30:	af00      	add	r7, sp, #0
 8017a32:	60f8      	str	r0, [r7, #12]
 8017a34:	60b9      	str	r1, [r7, #8]
 8017a36:	607a      	str	r2, [r7, #4]
 8017a38:	603b      	str	r3, [r7, #0]
  u8_t apiflags = NETCONN_NOAUTORCVD;
 8017a3a:	2308      	movs	r3, #8
 8017a3c:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  ssize_t recvd = 0;
 8017a40:	2300      	movs	r3, #0
 8017a42:	62bb      	str	r3, [r7, #40]	@ 0x28
  ssize_t recv_left = (len <= SSIZE_MAX) ? (ssize_t)len : SSIZE_MAX;
 8017a44:	687b      	ldr	r3, [r7, #4]
 8017a46:	2b00      	cmp	r3, #0
 8017a48:	db01      	blt.n	8017a4e <lwip_recv_tcp+0x22>
 8017a4a:	687b      	ldr	r3, [r7, #4]
 8017a4c:	e001      	b.n	8017a52 <lwip_recv_tcp+0x26>
 8017a4e:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 8017a52:	627b      	str	r3, [r7, #36]	@ 0x24

  LWIP_ASSERT("no socket given", sock != NULL);
 8017a54:	68fb      	ldr	r3, [r7, #12]
 8017a56:	2b00      	cmp	r3, #0
 8017a58:	d106      	bne.n	8017a68 <lwip_recv_tcp+0x3c>
 8017a5a:	4b74      	ldr	r3, [pc, #464]	@ (8017c2c <lwip_recv_tcp+0x200>)
 8017a5c:	f240 329e 	movw	r2, #926	@ 0x39e
 8017a60:	4973      	ldr	r1, [pc, #460]	@ (8017c30 <lwip_recv_tcp+0x204>)
 8017a62:	4874      	ldr	r0, [pc, #464]	@ (8017c34 <lwip_recv_tcp+0x208>)
 8017a64:	f011 ffba 	bl	80299dc <iprintf>
  LWIP_ASSERT("this should be checked internally", NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP);
 8017a68:	68fb      	ldr	r3, [r7, #12]
 8017a6a:	681b      	ldr	r3, [r3, #0]
 8017a6c:	781b      	ldrb	r3, [r3, #0]
 8017a6e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017a72:	2b10      	cmp	r3, #16
 8017a74:	d006      	beq.n	8017a84 <lwip_recv_tcp+0x58>
 8017a76:	4b6d      	ldr	r3, [pc, #436]	@ (8017c2c <lwip_recv_tcp+0x200>)
 8017a78:	f240 329f 	movw	r2, #927	@ 0x39f
 8017a7c:	496e      	ldr	r1, [pc, #440]	@ (8017c38 <lwip_recv_tcp+0x20c>)
 8017a7e:	486d      	ldr	r0, [pc, #436]	@ (8017c34 <lwip_recv_tcp+0x208>)
 8017a80:	f011 ffac 	bl	80299dc <iprintf>

  if (flags & MSG_DONTWAIT) {
 8017a84:	683b      	ldr	r3, [r7, #0]
 8017a86:	f003 0308 	and.w	r3, r3, #8
 8017a8a:	2b00      	cmp	r3, #0
 8017a8c:	d005      	beq.n	8017a9a <lwip_recv_tcp+0x6e>
    apiflags |= NETCONN_DONTBLOCK;
 8017a8e:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8017a92:	f043 0304 	orr.w	r3, r3, #4
 8017a96:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    err_t err;
    u16_t copylen;

    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: top while sock->lastdata=%p\n", (void *)sock->lastdata.pbuf));
    /* Check if there is data left from the last recv operation. */
    if (sock->lastdata.pbuf) {
 8017a9a:	68fb      	ldr	r3, [r7, #12]
 8017a9c:	685b      	ldr	r3, [r3, #4]
 8017a9e:	2b00      	cmp	r3, #0
 8017aa0:	d003      	beq.n	8017aaa <lwip_recv_tcp+0x7e>
      p = sock->lastdata.pbuf;
 8017aa2:	68fb      	ldr	r3, [r7, #12]
 8017aa4:	685b      	ldr	r3, [r3, #4]
 8017aa6:	617b      	str	r3, [r7, #20]
 8017aa8:	e036      	b.n	8017b18 <lwip_recv_tcp+0xec>
    } else {
      /* No data was left from the previous operation, so we try to get
         some from the network. */
      err = netconn_recv_tcp_pbuf_flags(sock->conn, &p, apiflags);
 8017aaa:	68fb      	ldr	r3, [r7, #12]
 8017aac:	681b      	ldr	r3, [r3, #0]
 8017aae:	f897 2023 	ldrb.w	r2, [r7, #35]	@ 0x23
 8017ab2:	f107 0114 	add.w	r1, r7, #20
 8017ab6:	4618      	mov	r0, r3
 8017ab8:	f7fd fea4 	bl	8015804 <netconn_recv_tcp_pbuf_flags>
 8017abc:	4603      	mov	r3, r0
 8017abe:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: netconn_recv err=%d, pbuf=%p\n",
                                  err, (void *)p));

      if (err != ERR_OK) {
 8017ac2:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 8017ac6:	2b00      	cmp	r3, #0
 8017ac8:	d019      	beq.n	8017afe <lwip_recv_tcp+0xd2>
        if (recvd > 0) {
 8017aca:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8017acc:	2b00      	cmp	r3, #0
 8017ace:	f300 808d 	bgt.w	8017bec <lwip_recv_tcp+0x1c0>
          goto lwip_recv_tcp_done;
        }
        /* We should really do some error checking here. */
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: p == NULL, error is \"%s\"!\n",
                                    lwip_strerr(err)));
        sock_set_errno(sock, err_to_errno(err));
 8017ad2:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 8017ad6:	4618      	mov	r0, r3
 8017ad8:	f7ff fd00 	bl	80174dc <err_to_errno>
 8017adc:	61f8      	str	r0, [r7, #28]
 8017ade:	69fb      	ldr	r3, [r7, #28]
 8017ae0:	2b00      	cmp	r3, #0
 8017ae2:	d002      	beq.n	8017aea <lwip_recv_tcp+0xbe>
 8017ae4:	4a55      	ldr	r2, [pc, #340]	@ (8017c3c <lwip_recv_tcp+0x210>)
 8017ae6:	69fb      	ldr	r3, [r7, #28]
 8017ae8:	6013      	str	r3, [r2, #0]
        if (err == ERR_CLSD) {
 8017aea:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 8017aee:	f113 0f0f 	cmn.w	r3, #15
 8017af2:	d101      	bne.n	8017af8 <lwip_recv_tcp+0xcc>
          return 0;
 8017af4:	2300      	movs	r3, #0
 8017af6:	e094      	b.n	8017c22 <lwip_recv_tcp+0x1f6>
        } else {
          return -1;
 8017af8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017afc:	e091      	b.n	8017c22 <lwip_recv_tcp+0x1f6>
        }
      }
      LWIP_ASSERT("p != NULL", p != NULL);
 8017afe:	697b      	ldr	r3, [r7, #20]
 8017b00:	2b00      	cmp	r3, #0
 8017b02:	d106      	bne.n	8017b12 <lwip_recv_tcp+0xe6>
 8017b04:	4b49      	ldr	r3, [pc, #292]	@ (8017c2c <lwip_recv_tcp+0x200>)
 8017b06:	f240 32c5 	movw	r2, #965	@ 0x3c5
 8017b0a:	494d      	ldr	r1, [pc, #308]	@ (8017c40 <lwip_recv_tcp+0x214>)
 8017b0c:	4849      	ldr	r0, [pc, #292]	@ (8017c34 <lwip_recv_tcp+0x208>)
 8017b0e:	f011 ff65 	bl	80299dc <iprintf>
      sock->lastdata.pbuf = p;
 8017b12:	697a      	ldr	r2, [r7, #20]
 8017b14:	68fb      	ldr	r3, [r7, #12]
 8017b16:	605a      	str	r2, [r3, #4]
    }

    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: buflen=%"U16_F" recv_left=%d off=%d\n",
                                p->tot_len, (int)recv_left, (int)recvd));

    if (recv_left > p->tot_len) {
 8017b18:	697b      	ldr	r3, [r7, #20]
 8017b1a:	891b      	ldrh	r3, [r3, #8]
 8017b1c:	461a      	mov	r2, r3
 8017b1e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8017b20:	4293      	cmp	r3, r2
 8017b22:	dd03      	ble.n	8017b2c <lwip_recv_tcp+0x100>
      copylen = p->tot_len;
 8017b24:	697b      	ldr	r3, [r7, #20]
 8017b26:	891b      	ldrh	r3, [r3, #8]
 8017b28:	85fb      	strh	r3, [r7, #46]	@ 0x2e
 8017b2a:	e001      	b.n	8017b30 <lwip_recv_tcp+0x104>
    } else {
      copylen = (u16_t)recv_left;
 8017b2c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8017b2e:	85fb      	strh	r3, [r7, #46]	@ 0x2e
    }
    if (recvd + copylen < recvd) {
 8017b30:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 8017b32:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8017b34:	4413      	add	r3, r2
 8017b36:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8017b38:	429a      	cmp	r2, r3
 8017b3a:	dd03      	ble.n	8017b44 <lwip_recv_tcp+0x118>
      /* overflow */
      copylen = (u16_t)(SSIZE_MAX - recvd);
 8017b3c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8017b3e:	b29b      	uxth	r3, r3
 8017b40:	43db      	mvns	r3, r3
 8017b42:	85fb      	strh	r3, [r7, #46]	@ 0x2e
    }

    /* copy the contents of the received buffer into
    the supplied memory pointer mem */
    pbuf_copy_partial(p, (u8_t *)mem + recvd, copylen, 0);
 8017b44:	6978      	ldr	r0, [r7, #20]
 8017b46:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8017b48:	68ba      	ldr	r2, [r7, #8]
 8017b4a:	18d1      	adds	r1, r2, r3
 8017b4c:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 8017b4e:	2300      	movs	r3, #0
 8017b50:	f002 fed2 	bl	801a8f8 <pbuf_copy_partial>

    recvd += copylen;
 8017b54:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8017b56:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8017b58:	4413      	add	r3, r2
 8017b5a:	62bb      	str	r3, [r7, #40]	@ 0x28

    /* TCP combines multiple pbufs for one recv */
    LWIP_ASSERT("invalid copylen, len would underflow", recv_left >= copylen);
 8017b5c:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8017b5e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8017b60:	429a      	cmp	r2, r3
 8017b62:	da06      	bge.n	8017b72 <lwip_recv_tcp+0x146>
 8017b64:	4b31      	ldr	r3, [pc, #196]	@ (8017c2c <lwip_recv_tcp+0x200>)
 8017b66:	f240 32dd 	movw	r2, #989	@ 0x3dd
 8017b6a:	4936      	ldr	r1, [pc, #216]	@ (8017c44 <lwip_recv_tcp+0x218>)
 8017b6c:	4831      	ldr	r0, [pc, #196]	@ (8017c34 <lwip_recv_tcp+0x208>)
 8017b6e:	f011 ff35 	bl	80299dc <iprintf>
    recv_left -= copylen;
 8017b72:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8017b74:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8017b76:	1ad3      	subs	r3, r2, r3
 8017b78:	627b      	str	r3, [r7, #36]	@ 0x24

    /* Unless we peek the incoming message... */
    if ((flags & MSG_PEEK) == 0) {
 8017b7a:	683b      	ldr	r3, [r7, #0]
 8017b7c:	f003 0301 	and.w	r3, r3, #1
 8017b80:	2b00      	cmp	r3, #0
 8017b82:	d123      	bne.n	8017bcc <lwip_recv_tcp+0x1a0>
      /* ... check if there is data left in the pbuf */
      LWIP_ASSERT("invalid copylen", p->tot_len >= copylen);
 8017b84:	697b      	ldr	r3, [r7, #20]
 8017b86:	891b      	ldrh	r3, [r3, #8]
 8017b88:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 8017b8a:	429a      	cmp	r2, r3
 8017b8c:	d906      	bls.n	8017b9c <lwip_recv_tcp+0x170>
 8017b8e:	4b27      	ldr	r3, [pc, #156]	@ (8017c2c <lwip_recv_tcp+0x200>)
 8017b90:	f240 32e3 	movw	r2, #995	@ 0x3e3
 8017b94:	492c      	ldr	r1, [pc, #176]	@ (8017c48 <lwip_recv_tcp+0x21c>)
 8017b96:	4827      	ldr	r0, [pc, #156]	@ (8017c34 <lwip_recv_tcp+0x208>)
 8017b98:	f011 ff20 	bl	80299dc <iprintf>
      if (p->tot_len - copylen > 0) {
 8017b9c:	697b      	ldr	r3, [r7, #20]
 8017b9e:	891b      	ldrh	r3, [r3, #8]
 8017ba0:	461a      	mov	r2, r3
 8017ba2:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8017ba4:	1ad3      	subs	r3, r2, r3
 8017ba6:	2b00      	cmp	r3, #0
 8017ba8:	dd09      	ble.n	8017bbe <lwip_recv_tcp+0x192>
        /* If so, it should be saved in the sock structure for the next recv call.
           We store the pbuf but hide/free the consumed data: */
        sock->lastdata.pbuf = pbuf_free_header(p, copylen);
 8017baa:	697b      	ldr	r3, [r7, #20]
 8017bac:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 8017bae:	4611      	mov	r1, r2
 8017bb0:	4618      	mov	r0, r3
 8017bb2:	f002 fc68 	bl	801a486 <pbuf_free_header>
 8017bb6:	4602      	mov	r2, r0
 8017bb8:	68fb      	ldr	r3, [r7, #12]
 8017bba:	605a      	str	r2, [r3, #4]
 8017bbc:	e006      	b.n	8017bcc <lwip_recv_tcp+0x1a0>
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: lastdata now pbuf=%p\n", (void *)sock->lastdata.pbuf));
      } else {
        sock->lastdata.pbuf = NULL;
 8017bbe:	68fb      	ldr	r3, [r7, #12]
 8017bc0:	2200      	movs	r2, #0
 8017bc2:	605a      	str	r2, [r3, #4]
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: deleting pbuf=%p\n", (void *)p));
        pbuf_free(p);
 8017bc4:	697b      	ldr	r3, [r7, #20]
 8017bc6:	4618      	mov	r0, r3
 8017bc8:	f002 fc90 	bl	801a4ec <pbuf_free>
      }
    }
    /* once we have some data to return, only add more if we don't need to wait */
    apiflags |= NETCONN_DONTBLOCK | NETCONN_NOFIN;
 8017bcc:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8017bd0:	f043 0314 	orr.w	r3, r3, #20
 8017bd4:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    /* @todo: do we need to support peeking more than one pbuf? */
  } while ((recv_left > 0) && !(flags & MSG_PEEK));
 8017bd8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8017bda:	2b00      	cmp	r3, #0
 8017bdc:	dd08      	ble.n	8017bf0 <lwip_recv_tcp+0x1c4>
 8017bde:	683b      	ldr	r3, [r7, #0]
 8017be0:	f003 0301 	and.w	r3, r3, #1
 8017be4:	2b00      	cmp	r3, #0
 8017be6:	f43f af58 	beq.w	8017a9a <lwip_recv_tcp+0x6e>
lwip_recv_tcp_done:
 8017bea:	e001      	b.n	8017bf0 <lwip_recv_tcp+0x1c4>
          goto lwip_recv_tcp_done;
 8017bec:	bf00      	nop
 8017bee:	e000      	b.n	8017bf2 <lwip_recv_tcp+0x1c6>
lwip_recv_tcp_done:
 8017bf0:	bf00      	nop
  if ((recvd > 0) && !(flags & MSG_PEEK)) {
 8017bf2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8017bf4:	2b00      	cmp	r3, #0
 8017bf6:	dd0b      	ble.n	8017c10 <lwip_recv_tcp+0x1e4>
 8017bf8:	683b      	ldr	r3, [r7, #0]
 8017bfa:	f003 0301 	and.w	r3, r3, #1
 8017bfe:	2b00      	cmp	r3, #0
 8017c00:	d106      	bne.n	8017c10 <lwip_recv_tcp+0x1e4>
    /* ensure window update after copying all data */
    netconn_tcp_recvd(sock->conn, (size_t)recvd);
 8017c02:	68fb      	ldr	r3, [r7, #12]
 8017c04:	681b      	ldr	r3, [r3, #0]
 8017c06:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8017c08:	4611      	mov	r1, r2
 8017c0a:	4618      	mov	r0, r3
 8017c0c:	f7fd fd42 	bl	8015694 <netconn_tcp_recvd>
  }
  sock_set_errno(sock, 0);
 8017c10:	2300      	movs	r3, #0
 8017c12:	61bb      	str	r3, [r7, #24]
 8017c14:	69bb      	ldr	r3, [r7, #24]
 8017c16:	2b00      	cmp	r3, #0
 8017c18:	d002      	beq.n	8017c20 <lwip_recv_tcp+0x1f4>
 8017c1a:	4a08      	ldr	r2, [pc, #32]	@ (8017c3c <lwip_recv_tcp+0x210>)
 8017c1c:	69bb      	ldr	r3, [r7, #24]
 8017c1e:	6013      	str	r3, [r2, #0]
  return recvd;
 8017c20:	6abb      	ldr	r3, [r7, #40]	@ 0x28
}
 8017c22:	4618      	mov	r0, r3
 8017c24:	3730      	adds	r7, #48	@ 0x30
 8017c26:	46bd      	mov	sp, r7
 8017c28:	bd80      	pop	{r7, pc}
 8017c2a:	bf00      	nop
 8017c2c:	0802d614 	.word	0x0802d614
 8017c30:	0802d70c 	.word	0x0802d70c
 8017c34:	0802d668 	.word	0x0802d668
 8017c38:	0802d71c 	.word	0x0802d71c
 8017c3c:	2402b180 	.word	0x2402b180
 8017c40:	0802d740 	.word	0x0802d740
 8017c44:	0802d74c 	.word	0x0802d74c
 8017c48:	0802d774 	.word	0x0802d774

08017c4c <lwip_sock_make_addr>:

/* Convert a netbuf's address data to struct sockaddr */
static int
lwip_sock_make_addr(struct netconn *conn, ip_addr_t *fromaddr, u16_t port,
                    struct sockaddr *from, socklen_t *fromlen)
{
 8017c4c:	b590      	push	{r4, r7, lr}
 8017c4e:	b08b      	sub	sp, #44	@ 0x2c
 8017c50:	af00      	add	r7, sp, #0
 8017c52:	60f8      	str	r0, [r7, #12]
 8017c54:	60b9      	str	r1, [r7, #8]
 8017c56:	603b      	str	r3, [r7, #0]
 8017c58:	4613      	mov	r3, r2
 8017c5a:	80fb      	strh	r3, [r7, #6]
  int truncated = 0;
 8017c5c:	2300      	movs	r3, #0
 8017c5e:	627b      	str	r3, [r7, #36]	@ 0x24
  union sockaddr_aligned saddr;

  LWIP_UNUSED_ARG(conn);

  LWIP_ASSERT("fromaddr != NULL", fromaddr != NULL);
 8017c60:	68bb      	ldr	r3, [r7, #8]
 8017c62:	2b00      	cmp	r3, #0
 8017c64:	d106      	bne.n	8017c74 <lwip_sock_make_addr+0x28>
 8017c66:	4b2b      	ldr	r3, [pc, #172]	@ (8017d14 <lwip_sock_make_addr+0xc8>)
 8017c68:	f240 4207 	movw	r2, #1031	@ 0x407
 8017c6c:	492a      	ldr	r1, [pc, #168]	@ (8017d18 <lwip_sock_make_addr+0xcc>)
 8017c6e:	482b      	ldr	r0, [pc, #172]	@ (8017d1c <lwip_sock_make_addr+0xd0>)
 8017c70:	f011 feb4 	bl	80299dc <iprintf>
  LWIP_ASSERT("from != NULL", from != NULL);
 8017c74:	683b      	ldr	r3, [r7, #0]
 8017c76:	2b00      	cmp	r3, #0
 8017c78:	d106      	bne.n	8017c88 <lwip_sock_make_addr+0x3c>
 8017c7a:	4b26      	ldr	r3, [pc, #152]	@ (8017d14 <lwip_sock_make_addr+0xc8>)
 8017c7c:	f44f 6281 	mov.w	r2, #1032	@ 0x408
 8017c80:	4927      	ldr	r1, [pc, #156]	@ (8017d20 <lwip_sock_make_addr+0xd4>)
 8017c82:	4826      	ldr	r0, [pc, #152]	@ (8017d1c <lwip_sock_make_addr+0xd0>)
 8017c84:	f011 feaa 	bl	80299dc <iprintf>
  LWIP_ASSERT("fromlen != NULL", fromlen != NULL);
 8017c88:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8017c8a:	2b00      	cmp	r3, #0
 8017c8c:	d106      	bne.n	8017c9c <lwip_sock_make_addr+0x50>
 8017c8e:	4b21      	ldr	r3, [pc, #132]	@ (8017d14 <lwip_sock_make_addr+0xc8>)
 8017c90:	f240 4209 	movw	r2, #1033	@ 0x409
 8017c94:	4923      	ldr	r1, [pc, #140]	@ (8017d24 <lwip_sock_make_addr+0xd8>)
 8017c96:	4821      	ldr	r0, [pc, #132]	@ (8017d1c <lwip_sock_make_addr+0xd0>)
 8017c98:	f011 fea0 	bl	80299dc <iprintf>
    ip4_2_ipv4_mapped_ipv6(ip_2_ip6(fromaddr), ip_2_ip4(fromaddr));
    IP_SET_TYPE(fromaddr, IPADDR_TYPE_V6);
  }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

  IPADDR_PORT_TO_SOCKADDR(&saddr, fromaddr, port);
 8017c9c:	f107 0314 	add.w	r3, r7, #20
 8017ca0:	2210      	movs	r2, #16
 8017ca2:	701a      	strb	r2, [r3, #0]
 8017ca4:	f107 0314 	add.w	r3, r7, #20
 8017ca8:	2202      	movs	r2, #2
 8017caa:	705a      	strb	r2, [r3, #1]
 8017cac:	f107 0414 	add.w	r4, r7, #20
 8017cb0:	88fb      	ldrh	r3, [r7, #6]
 8017cb2:	4618      	mov	r0, r3
 8017cb4:	f000 ff38 	bl	8018b28 <lwip_htons>
 8017cb8:	4603      	mov	r3, r0
 8017cba:	8063      	strh	r3, [r4, #2]
 8017cbc:	f107 0314 	add.w	r3, r7, #20
 8017cc0:	68ba      	ldr	r2, [r7, #8]
 8017cc2:	6812      	ldr	r2, [r2, #0]
 8017cc4:	605a      	str	r2, [r3, #4]
 8017cc6:	f107 0314 	add.w	r3, r7, #20
 8017cca:	3308      	adds	r3, #8
 8017ccc:	2208      	movs	r2, #8
 8017cce:	2100      	movs	r1, #0
 8017cd0:	4618      	mov	r0, r3
 8017cd2:	f012 f815 	bl	8029d00 <memset>
  if (*fromlen < saddr.sa.sa_len) {
 8017cd6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8017cd8:	681b      	ldr	r3, [r3, #0]
 8017cda:	7d3a      	ldrb	r2, [r7, #20]
 8017cdc:	4293      	cmp	r3, r2
 8017cde:	d202      	bcs.n	8017ce6 <lwip_sock_make_addr+0x9a>
    truncated = 1;
 8017ce0:	2301      	movs	r3, #1
 8017ce2:	627b      	str	r3, [r7, #36]	@ 0x24
 8017ce4:	e008      	b.n	8017cf8 <lwip_sock_make_addr+0xac>
  } else if (*fromlen > saddr.sa.sa_len) {
 8017ce6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8017ce8:	681b      	ldr	r3, [r3, #0]
 8017cea:	7d3a      	ldrb	r2, [r7, #20]
 8017cec:	4293      	cmp	r3, r2
 8017cee:	d903      	bls.n	8017cf8 <lwip_sock_make_addr+0xac>
    *fromlen = saddr.sa.sa_len;
 8017cf0:	7d3b      	ldrb	r3, [r7, #20]
 8017cf2:	461a      	mov	r2, r3
 8017cf4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8017cf6:	601a      	str	r2, [r3, #0]
  }
  MEMCPY(from, &saddr, *fromlen);
 8017cf8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8017cfa:	681a      	ldr	r2, [r3, #0]
 8017cfc:	f107 0314 	add.w	r3, r7, #20
 8017d00:	4619      	mov	r1, r3
 8017d02:	6838      	ldr	r0, [r7, #0]
 8017d04:	f012 f8f3 	bl	8029eee <memcpy>
  return truncated;
 8017d08:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8017d0a:	4618      	mov	r0, r3
 8017d0c:	372c      	adds	r7, #44	@ 0x2c
 8017d0e:	46bd      	mov	sp, r7
 8017d10:	bd90      	pop	{r4, r7, pc}
 8017d12:	bf00      	nop
 8017d14:	0802d614 	.word	0x0802d614
 8017d18:	0802d784 	.word	0x0802d784
 8017d1c:	0802d668 	.word	0x0802d668
 8017d20:	0802d798 	.word	0x0802d798
 8017d24:	0802d7a8 	.word	0x0802d7a8

08017d28 <lwip_recv_tcp_from>:

#if LWIP_TCP
/* Helper function to get a tcp socket's remote address info */
static int
lwip_recv_tcp_from(struct lwip_sock *sock, struct sockaddr *from, socklen_t *fromlen, const char *dbg_fn, int dbg_s, ssize_t dbg_ret)
{
 8017d28:	b580      	push	{r7, lr}
 8017d2a:	b088      	sub	sp, #32
 8017d2c:	af02      	add	r7, sp, #8
 8017d2e:	60f8      	str	r0, [r7, #12]
 8017d30:	60b9      	str	r1, [r7, #8]
 8017d32:	607a      	str	r2, [r7, #4]
 8017d34:	603b      	str	r3, [r7, #0]
  if (sock == NULL) {
 8017d36:	68fb      	ldr	r3, [r7, #12]
 8017d38:	2b00      	cmp	r3, #0
 8017d3a:	d101      	bne.n	8017d40 <lwip_recv_tcp_from+0x18>
    return 0;
 8017d3c:	2300      	movs	r3, #0
 8017d3e:	e021      	b.n	8017d84 <lwip_recv_tcp_from+0x5c>
  LWIP_UNUSED_ARG(dbg_fn);
  LWIP_UNUSED_ARG(dbg_s);
  LWIP_UNUSED_ARG(dbg_ret);

#if !SOCKETS_DEBUG
  if (from && fromlen)
 8017d40:	68bb      	ldr	r3, [r7, #8]
 8017d42:	2b00      	cmp	r3, #0
 8017d44:	d01d      	beq.n	8017d82 <lwip_recv_tcp_from+0x5a>
 8017d46:	687b      	ldr	r3, [r7, #4]
 8017d48:	2b00      	cmp	r3, #0
 8017d4a:	d01a      	beq.n	8017d82 <lwip_recv_tcp_from+0x5a>
#endif /* !SOCKETS_DEBUG */
  {
    /* get remote addr/port from tcp_pcb */
    u16_t port;
    ip_addr_t tmpaddr;
    netconn_getaddr(sock->conn, &tmpaddr, &port, 0);
 8017d4c:	68fb      	ldr	r3, [r7, #12]
 8017d4e:	6818      	ldr	r0, [r3, #0]
 8017d50:	f107 0216 	add.w	r2, r7, #22
 8017d54:	f107 0110 	add.w	r1, r7, #16
 8017d58:	2300      	movs	r3, #0
 8017d5a:	f7fd fad7 	bl	801530c <netconn_getaddr>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("%s(%d):  addr=", dbg_fn, dbg_s));
    ip_addr_debug_print_val(SOCKETS_DEBUG, tmpaddr);
    LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%d\n", port, (int)dbg_ret));
    if (from && fromlen) {
 8017d5e:	68bb      	ldr	r3, [r7, #8]
 8017d60:	2b00      	cmp	r3, #0
 8017d62:	d00e      	beq.n	8017d82 <lwip_recv_tcp_from+0x5a>
 8017d64:	687b      	ldr	r3, [r7, #4]
 8017d66:	2b00      	cmp	r3, #0
 8017d68:	d00b      	beq.n	8017d82 <lwip_recv_tcp_from+0x5a>
      return lwip_sock_make_addr(sock->conn, &tmpaddr, port, from, fromlen);
 8017d6a:	68fb      	ldr	r3, [r7, #12]
 8017d6c:	6818      	ldr	r0, [r3, #0]
 8017d6e:	8afa      	ldrh	r2, [r7, #22]
 8017d70:	f107 0110 	add.w	r1, r7, #16
 8017d74:	687b      	ldr	r3, [r7, #4]
 8017d76:	9300      	str	r3, [sp, #0]
 8017d78:	68bb      	ldr	r3, [r7, #8]
 8017d7a:	f7ff ff67 	bl	8017c4c <lwip_sock_make_addr>
 8017d7e:	4603      	mov	r3, r0
 8017d80:	e000      	b.n	8017d84 <lwip_recv_tcp_from+0x5c>
    }
  }
  return 0;
 8017d82:	2300      	movs	r3, #0
}
 8017d84:	4618      	mov	r0, r3
 8017d86:	3718      	adds	r7, #24
 8017d88:	46bd      	mov	sp, r7
 8017d8a:	bd80      	pop	{r7, pc}

08017d8c <lwip_recvfrom_udp_raw>:
/* Helper function to receive a netbuf from a udp or raw netconn.
 * Keeps sock->lastdata for peeking.
 */
static err_t
lwip_recvfrom_udp_raw(struct lwip_sock *sock, int flags, struct msghdr *msg, u16_t *datagram_len, int dbg_s)
{
 8017d8c:	b590      	push	{r4, r7, lr}
 8017d8e:	b08d      	sub	sp, #52	@ 0x34
 8017d90:	af02      	add	r7, sp, #8
 8017d92:	60f8      	str	r0, [r7, #12]
 8017d94:	60b9      	str	r1, [r7, #8]
 8017d96:	607a      	str	r2, [r7, #4]
 8017d98:	603b      	str	r3, [r7, #0]
  err_t err;
  u16_t buflen, copylen, copied;
  int i;

  LWIP_UNUSED_ARG(dbg_s);
  LWIP_ERROR("lwip_recvfrom_udp_raw: invalid arguments", (msg->msg_iov != NULL) || (msg->msg_iovlen <= 0), return ERR_ARG;);
 8017d9a:	687b      	ldr	r3, [r7, #4]
 8017d9c:	689b      	ldr	r3, [r3, #8]
 8017d9e:	2b00      	cmp	r3, #0
 8017da0:	d10d      	bne.n	8017dbe <lwip_recvfrom_udp_raw+0x32>
 8017da2:	687b      	ldr	r3, [r7, #4]
 8017da4:	68db      	ldr	r3, [r3, #12]
 8017da6:	2b00      	cmp	r3, #0
 8017da8:	dd09      	ble.n	8017dbe <lwip_recvfrom_udp_raw+0x32>
 8017daa:	4b5e      	ldr	r3, [pc, #376]	@ (8017f24 <lwip_recvfrom_udp_raw+0x198>)
 8017dac:	f240 4249 	movw	r2, #1097	@ 0x449
 8017db0:	495d      	ldr	r1, [pc, #372]	@ (8017f28 <lwip_recvfrom_udp_raw+0x19c>)
 8017db2:	485e      	ldr	r0, [pc, #376]	@ (8017f2c <lwip_recvfrom_udp_raw+0x1a0>)
 8017db4:	f011 fe12 	bl	80299dc <iprintf>
 8017db8:	f06f 030f 	mvn.w	r3, #15
 8017dbc:	e0ae      	b.n	8017f1c <lwip_recvfrom_udp_raw+0x190>

  if (flags & MSG_DONTWAIT) {
 8017dbe:	68bb      	ldr	r3, [r7, #8]
 8017dc0:	f003 0308 	and.w	r3, r3, #8
 8017dc4:	2b00      	cmp	r3, #0
 8017dc6:	d003      	beq.n	8017dd0 <lwip_recvfrom_udp_raw+0x44>
    apiflags = NETCONN_DONTBLOCK;
 8017dc8:	2304      	movs	r3, #4
 8017dca:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
 8017dce:	e002      	b.n	8017dd6 <lwip_recvfrom_udp_raw+0x4a>
  } else {
    apiflags = 0;
 8017dd0:	2300      	movs	r3, #0
 8017dd2:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
  }

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw[UDP/RAW]: top sock->lastdata=%p\n", (void *)sock->lastdata.netbuf));
  /* Check if there is data left from the last recv operation. */
  buf = sock->lastdata.netbuf;
 8017dd6:	68fb      	ldr	r3, [r7, #12]
 8017dd8:	685b      	ldr	r3, [r3, #4]
 8017dda:	613b      	str	r3, [r7, #16]
  if (buf == NULL) {
 8017ddc:	693b      	ldr	r3, [r7, #16]
 8017dde:	2b00      	cmp	r3, #0
 8017de0:	d11f      	bne.n	8017e22 <lwip_recvfrom_udp_raw+0x96>
    /* No data was left from the previous operation, so we try to get
        some from the network. */
    err = netconn_recv_udp_raw_netbuf_flags(sock->conn, &buf, apiflags);
 8017de2:	68fb      	ldr	r3, [r7, #12]
 8017de4:	681b      	ldr	r3, [r3, #0]
 8017de6:	f897 2026 	ldrb.w	r2, [r7, #38]	@ 0x26
 8017dea:	f107 0110 	add.w	r1, r7, #16
 8017dee:	4618      	mov	r0, r3
 8017df0:	f7fd fd34 	bl	801585c <netconn_recv_udp_raw_netbuf_flags>
 8017df4:	4603      	mov	r3, r0
 8017df6:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw[UDP/RAW]: netconn_recv err=%d, netbuf=%p\n",
                                err, (void *)buf));

    if (err != ERR_OK) {
 8017dfa:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8017dfe:	2b00      	cmp	r3, #0
 8017e00:	d002      	beq.n	8017e08 <lwip_recvfrom_udp_raw+0x7c>
      return err;
 8017e02:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8017e06:	e089      	b.n	8017f1c <lwip_recvfrom_udp_raw+0x190>
    }
    LWIP_ASSERT("buf != NULL", buf != NULL);
 8017e08:	693b      	ldr	r3, [r7, #16]
 8017e0a:	2b00      	cmp	r3, #0
 8017e0c:	d106      	bne.n	8017e1c <lwip_recvfrom_udp_raw+0x90>
 8017e0e:	4b45      	ldr	r3, [pc, #276]	@ (8017f24 <lwip_recvfrom_udp_raw+0x198>)
 8017e10:	f240 425e 	movw	r2, #1118	@ 0x45e
 8017e14:	4946      	ldr	r1, [pc, #280]	@ (8017f30 <lwip_recvfrom_udp_raw+0x1a4>)
 8017e16:	4845      	ldr	r0, [pc, #276]	@ (8017f2c <lwip_recvfrom_udp_raw+0x1a0>)
 8017e18:	f011 fde0 	bl	80299dc <iprintf>
    sock->lastdata.netbuf = buf;
 8017e1c:	693a      	ldr	r2, [r7, #16]
 8017e1e:	68fb      	ldr	r3, [r7, #12]
 8017e20:	605a      	str	r2, [r3, #4]
  }
  buflen = buf->p->tot_len;
 8017e22:	693b      	ldr	r3, [r7, #16]
 8017e24:	681b      	ldr	r3, [r3, #0]
 8017e26:	891b      	ldrh	r3, [r3, #8]
 8017e28:	837b      	strh	r3, [r7, #26]
  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw: buflen=%"U16_F"\n", buflen));

  copied = 0;
 8017e2a:	2300      	movs	r3, #0
 8017e2c:	847b      	strh	r3, [r7, #34]	@ 0x22
  /* copy the pbuf payload into the iovs */
  for (i = 0; (i < msg->msg_iovlen) && (copied < buflen); i++) {
 8017e2e:	2300      	movs	r3, #0
 8017e30:	61fb      	str	r3, [r7, #28]
 8017e32:	e029      	b.n	8017e88 <lwip_recvfrom_udp_raw+0xfc>
    u16_t len_left = (u16_t)(buflen - copied);
 8017e34:	8b7a      	ldrh	r2, [r7, #26]
 8017e36:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8017e38:	1ad3      	subs	r3, r2, r3
 8017e3a:	833b      	strh	r3, [r7, #24]
    if (msg->msg_iov[i].iov_len > len_left) {
 8017e3c:	687b      	ldr	r3, [r7, #4]
 8017e3e:	689a      	ldr	r2, [r3, #8]
 8017e40:	69fb      	ldr	r3, [r7, #28]
 8017e42:	00db      	lsls	r3, r3, #3
 8017e44:	4413      	add	r3, r2
 8017e46:	685a      	ldr	r2, [r3, #4]
 8017e48:	8b3b      	ldrh	r3, [r7, #24]
 8017e4a:	429a      	cmp	r2, r3
 8017e4c:	d902      	bls.n	8017e54 <lwip_recvfrom_udp_raw+0xc8>
      copylen = len_left;
 8017e4e:	8b3b      	ldrh	r3, [r7, #24]
 8017e50:	84bb      	strh	r3, [r7, #36]	@ 0x24
 8017e52:	e006      	b.n	8017e62 <lwip_recvfrom_udp_raw+0xd6>
    } else {
      copylen = (u16_t)msg->msg_iov[i].iov_len;
 8017e54:	687b      	ldr	r3, [r7, #4]
 8017e56:	689a      	ldr	r2, [r3, #8]
 8017e58:	69fb      	ldr	r3, [r7, #28]
 8017e5a:	00db      	lsls	r3, r3, #3
 8017e5c:	4413      	add	r3, r2
 8017e5e:	685b      	ldr	r3, [r3, #4]
 8017e60:	84bb      	strh	r3, [r7, #36]	@ 0x24
    }

    /* copy the contents of the received buffer into
        the supplied memory buffer */
    pbuf_copy_partial(buf->p, (u8_t *)msg->msg_iov[i].iov_base, copylen, copied);
 8017e62:	693b      	ldr	r3, [r7, #16]
 8017e64:	6818      	ldr	r0, [r3, #0]
 8017e66:	687b      	ldr	r3, [r7, #4]
 8017e68:	689a      	ldr	r2, [r3, #8]
 8017e6a:	69fb      	ldr	r3, [r7, #28]
 8017e6c:	00db      	lsls	r3, r3, #3
 8017e6e:	4413      	add	r3, r2
 8017e70:	6819      	ldr	r1, [r3, #0]
 8017e72:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8017e74:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 8017e76:	f002 fd3f 	bl	801a8f8 <pbuf_copy_partial>
    copied = (u16_t)(copied + copylen);
 8017e7a:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 8017e7c:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8017e7e:	4413      	add	r3, r2
 8017e80:	847b      	strh	r3, [r7, #34]	@ 0x22
  for (i = 0; (i < msg->msg_iovlen) && (copied < buflen); i++) {
 8017e82:	69fb      	ldr	r3, [r7, #28]
 8017e84:	3301      	adds	r3, #1
 8017e86:	61fb      	str	r3, [r7, #28]
 8017e88:	687b      	ldr	r3, [r7, #4]
 8017e8a:	68db      	ldr	r3, [r3, #12]
 8017e8c:	69fa      	ldr	r2, [r7, #28]
 8017e8e:	429a      	cmp	r2, r3
 8017e90:	da03      	bge.n	8017e9a <lwip_recvfrom_udp_raw+0x10e>
 8017e92:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 8017e94:	8b7b      	ldrh	r3, [r7, #26]
 8017e96:	429a      	cmp	r2, r3
 8017e98:	d3cc      	bcc.n	8017e34 <lwip_recvfrom_udp_raw+0xa8>
  }

  /* Check to see from where the data was.*/
#if !SOCKETS_DEBUG
  if (msg->msg_name && msg->msg_namelen)
 8017e9a:	687b      	ldr	r3, [r7, #4]
 8017e9c:	681b      	ldr	r3, [r3, #0]
 8017e9e:	2b00      	cmp	r3, #0
 8017ea0:	d01a      	beq.n	8017ed8 <lwip_recvfrom_udp_raw+0x14c>
 8017ea2:	687b      	ldr	r3, [r7, #4]
 8017ea4:	685b      	ldr	r3, [r3, #4]
 8017ea6:	2b00      	cmp	r3, #0
 8017ea8:	d016      	beq.n	8017ed8 <lwip_recvfrom_udp_raw+0x14c>
#endif /* !SOCKETS_DEBUG */
  {
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw(%d):  addr=", dbg_s));
    ip_addr_debug_print_val(SOCKETS_DEBUG, *netbuf_fromaddr(buf));
    LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%d\n", netbuf_fromport(buf), copied));
    if (msg->msg_name && msg->msg_namelen) {
 8017eaa:	687b      	ldr	r3, [r7, #4]
 8017eac:	681b      	ldr	r3, [r3, #0]
 8017eae:	2b00      	cmp	r3, #0
 8017eb0:	d012      	beq.n	8017ed8 <lwip_recvfrom_udp_raw+0x14c>
 8017eb2:	687b      	ldr	r3, [r7, #4]
 8017eb4:	685b      	ldr	r3, [r3, #4]
 8017eb6:	2b00      	cmp	r3, #0
 8017eb8:	d00e      	beq.n	8017ed8 <lwip_recvfrom_udp_raw+0x14c>
      lwip_sock_make_addr(sock->conn, netbuf_fromaddr(buf), netbuf_fromport(buf),
 8017eba:	68fb      	ldr	r3, [r7, #12]
 8017ebc:	6818      	ldr	r0, [r3, #0]
 8017ebe:	693b      	ldr	r3, [r7, #16]
 8017ec0:	f103 0108 	add.w	r1, r3, #8
 8017ec4:	693b      	ldr	r3, [r7, #16]
 8017ec6:	899a      	ldrh	r2, [r3, #12]
                          (struct sockaddr *)msg->msg_name, &msg->msg_namelen);
 8017ec8:	687b      	ldr	r3, [r7, #4]
 8017eca:	681c      	ldr	r4, [r3, #0]
      lwip_sock_make_addr(sock->conn, netbuf_fromaddr(buf), netbuf_fromport(buf),
 8017ecc:	687b      	ldr	r3, [r7, #4]
 8017ece:	3304      	adds	r3, #4
 8017ed0:	9300      	str	r3, [sp, #0]
 8017ed2:	4623      	mov	r3, r4
 8017ed4:	f7ff feba 	bl	8017c4c <lwip_sock_make_addr>
    }
  }

  /* Initialize flag output */
  msg->msg_flags = 0;
 8017ed8:	687b      	ldr	r3, [r7, #4]
 8017eda:	2200      	movs	r2, #0
 8017edc:	619a      	str	r2, [r3, #24]

  if (msg->msg_control) {
 8017ede:	687b      	ldr	r3, [r7, #4]
 8017ee0:	691b      	ldr	r3, [r3, #16]
 8017ee2:	2b00      	cmp	r3, #0
 8017ee4:	d007      	beq.n	8017ef6 <lwip_recvfrom_udp_raw+0x16a>
    u8_t wrote_msg = 0;
 8017ee6:	2300      	movs	r3, #0
 8017ee8:	75fb      	strb	r3, [r7, #23]
#endif /* LWIP_IPV4 */
      }
    }
#endif /* LWIP_NETBUF_RECVINFO */

    if (!wrote_msg) {
 8017eea:	7dfb      	ldrb	r3, [r7, #23]
 8017eec:	2b00      	cmp	r3, #0
 8017eee:	d102      	bne.n	8017ef6 <lwip_recvfrom_udp_raw+0x16a>
      msg->msg_controllen = 0;
 8017ef0:	687b      	ldr	r3, [r7, #4]
 8017ef2:	2200      	movs	r2, #0
 8017ef4:	615a      	str	r2, [r3, #20]
    }
  }

  /* If we don't peek the incoming message: zero lastdata pointer and free the netbuf */
  if ((flags & MSG_PEEK) == 0) {
 8017ef6:	68bb      	ldr	r3, [r7, #8]
 8017ef8:	f003 0301 	and.w	r3, r3, #1
 8017efc:	2b00      	cmp	r3, #0
 8017efe:	d106      	bne.n	8017f0e <lwip_recvfrom_udp_raw+0x182>
    sock->lastdata.netbuf = NULL;
 8017f00:	68fb      	ldr	r3, [r7, #12]
 8017f02:	2200      	movs	r2, #0
 8017f04:	605a      	str	r2, [r3, #4]
    netbuf_delete(buf);
 8017f06:	693b      	ldr	r3, [r7, #16]
 8017f08:	4618      	mov	r0, r3
 8017f0a:	f7ff fb05 	bl	8017518 <netbuf_delete>
  }
  if (datagram_len) {
 8017f0e:	683b      	ldr	r3, [r7, #0]
 8017f10:	2b00      	cmp	r3, #0
 8017f12:	d002      	beq.n	8017f1a <lwip_recvfrom_udp_raw+0x18e>
    *datagram_len = buflen;
 8017f14:	683b      	ldr	r3, [r7, #0]
 8017f16:	8b7a      	ldrh	r2, [r7, #26]
 8017f18:	801a      	strh	r2, [r3, #0]
  }
  return ERR_OK;
 8017f1a:	2300      	movs	r3, #0
}
 8017f1c:	4618      	mov	r0, r3
 8017f1e:	372c      	adds	r7, #44	@ 0x2c
 8017f20:	46bd      	mov	sp, r7
 8017f22:	bd90      	pop	{r4, r7, pc}
 8017f24:	0802d614 	.word	0x0802d614
 8017f28:	0802d7b8 	.word	0x0802d7b8
 8017f2c:	0802d668 	.word	0x0802d668
 8017f30:	0802d7e4 	.word	0x0802d7e4

08017f34 <lwip_recvfrom>:

ssize_t
lwip_recvfrom(int s, void *mem, size_t len, int flags,
              struct sockaddr *from, socklen_t *fromlen)
{
 8017f34:	b580      	push	{r7, lr}
 8017f36:	b096      	sub	sp, #88	@ 0x58
 8017f38:	af02      	add	r7, sp, #8
 8017f3a:	60f8      	str	r0, [r7, #12]
 8017f3c:	60b9      	str	r1, [r7, #8]
 8017f3e:	607a      	str	r2, [r7, #4]
 8017f40:	603b      	str	r3, [r7, #0]
  struct lwip_sock *sock;
  ssize_t ret;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d, %p, %"SZT_F", 0x%x, ..)\n", s, mem, len, flags));
  sock = get_socket(s);
 8017f42:	68f8      	ldr	r0, [r7, #12]
 8017f44:	f7ff fbb8 	bl	80176b8 <get_socket>
 8017f48:	64f8      	str	r0, [r7, #76]	@ 0x4c
  if (!sock) {
 8017f4a:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8017f4c:	2b00      	cmp	r3, #0
 8017f4e:	d102      	bne.n	8017f56 <lwip_recvfrom+0x22>
    return -1;
 8017f50:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017f54:	e078      	b.n	8018048 <lwip_recvfrom+0x114>
  }
#if LWIP_TCP
  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 8017f56:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8017f58:	681b      	ldr	r3, [r3, #0]
 8017f5a:	781b      	ldrb	r3, [r3, #0]
 8017f5c:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017f60:	2b10      	cmp	r3, #16
 8017f62:	d112      	bne.n	8017f8a <lwip_recvfrom+0x56>
    ret = lwip_recv_tcp(sock, mem, len, flags);
 8017f64:	683b      	ldr	r3, [r7, #0]
 8017f66:	687a      	ldr	r2, [r7, #4]
 8017f68:	68b9      	ldr	r1, [r7, #8]
 8017f6a:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8017f6c:	f7ff fd5e 	bl	8017a2c <lwip_recv_tcp>
 8017f70:	6478      	str	r0, [r7, #68]	@ 0x44
    lwip_recv_tcp_from(sock, from, fromlen, "lwip_recvfrom", s, ret);
 8017f72:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8017f74:	9301      	str	r3, [sp, #4]
 8017f76:	68fb      	ldr	r3, [r7, #12]
 8017f78:	9300      	str	r3, [sp, #0]
 8017f7a:	4b35      	ldr	r3, [pc, #212]	@ (8018050 <lwip_recvfrom+0x11c>)
 8017f7c:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 8017f7e:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 8017f80:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8017f82:	f7ff fed1 	bl	8017d28 <lwip_recv_tcp_from>
    done_socket(sock);
    return ret;
 8017f86:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8017f88:	e05e      	b.n	8018048 <lwip_recvfrom+0x114>
  } else
#endif
  {
    u16_t datagram_len = 0;
 8017f8a:	2300      	movs	r3, #0
 8017f8c:	877b      	strh	r3, [r7, #58]	@ 0x3a
    struct iovec vec;
    struct msghdr msg;
    err_t err;
    vec.iov_base = mem;
 8017f8e:	68bb      	ldr	r3, [r7, #8]
 8017f90:	633b      	str	r3, [r7, #48]	@ 0x30
    vec.iov_len = len;
 8017f92:	687b      	ldr	r3, [r7, #4]
 8017f94:	637b      	str	r3, [r7, #52]	@ 0x34
    msg.msg_control = NULL;
 8017f96:	2300      	movs	r3, #0
 8017f98:	627b      	str	r3, [r7, #36]	@ 0x24
    msg.msg_controllen = 0;
 8017f9a:	2300      	movs	r3, #0
 8017f9c:	62bb      	str	r3, [r7, #40]	@ 0x28
    msg.msg_flags = 0;
 8017f9e:	2300      	movs	r3, #0
 8017fa0:	62fb      	str	r3, [r7, #44]	@ 0x2c
    msg.msg_iov = &vec;
 8017fa2:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8017fa6:	61fb      	str	r3, [r7, #28]
    msg.msg_iovlen = 1;
 8017fa8:	2301      	movs	r3, #1
 8017faa:	623b      	str	r3, [r7, #32]
    msg.msg_name = from;
 8017fac:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8017fae:	617b      	str	r3, [r7, #20]
    msg.msg_namelen = (fromlen ? *fromlen : 0);
 8017fb0:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8017fb2:	2b00      	cmp	r3, #0
 8017fb4:	d002      	beq.n	8017fbc <lwip_recvfrom+0x88>
 8017fb6:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8017fb8:	681b      	ldr	r3, [r3, #0]
 8017fba:	e000      	b.n	8017fbe <lwip_recvfrom+0x8a>
 8017fbc:	2300      	movs	r3, #0
 8017fbe:	61bb      	str	r3, [r7, #24]
    err = lwip_recvfrom_udp_raw(sock, flags, &msg, &datagram_len, s);
 8017fc0:	f107 013a 	add.w	r1, r7, #58	@ 0x3a
 8017fc4:	f107 0214 	add.w	r2, r7, #20
 8017fc8:	68fb      	ldr	r3, [r7, #12]
 8017fca:	9300      	str	r3, [sp, #0]
 8017fcc:	460b      	mov	r3, r1
 8017fce:	6839      	ldr	r1, [r7, #0]
 8017fd0:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8017fd2:	f7ff fedb 	bl	8017d8c <lwip_recvfrom_udp_raw>
 8017fd6:	4603      	mov	r3, r0
 8017fd8:	f887 304b 	strb.w	r3, [r7, #75]	@ 0x4b
    if (err != ERR_OK) {
 8017fdc:	f997 304b 	ldrsb.w	r3, [r7, #75]	@ 0x4b
 8017fe0:	2b00      	cmp	r3, #0
 8017fe2:	d00e      	beq.n	8018002 <lwip_recvfrom+0xce>
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom[UDP/RAW](%d): buf == NULL, error is \"%s\"!\n",
                                  s, lwip_strerr(err)));
      sock_set_errno(sock, err_to_errno(err));
 8017fe4:	f997 304b 	ldrsb.w	r3, [r7, #75]	@ 0x4b
 8017fe8:	4618      	mov	r0, r3
 8017fea:	f7ff fa77 	bl	80174dc <err_to_errno>
 8017fee:	63f8      	str	r0, [r7, #60]	@ 0x3c
 8017ff0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8017ff2:	2b00      	cmp	r3, #0
 8017ff4:	d002      	beq.n	8017ffc <lwip_recvfrom+0xc8>
 8017ff6:	4a17      	ldr	r2, [pc, #92]	@ (8018054 <lwip_recvfrom+0x120>)
 8017ff8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8017ffa:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return -1;
 8017ffc:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018000:	e022      	b.n	8018048 <lwip_recvfrom+0x114>
    }
    ret = (ssize_t)LWIP_MIN(LWIP_MIN(len, datagram_len), SSIZE_MAX);
 8018002:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8018004:	461a      	mov	r2, r3
 8018006:	687b      	ldr	r3, [r7, #4]
 8018008:	4293      	cmp	r3, r2
 801800a:	bf28      	it	cs
 801800c:	4613      	movcs	r3, r2
 801800e:	f06f 4200 	mvn.w	r2, #2147483648	@ 0x80000000
 8018012:	4293      	cmp	r3, r2
 8018014:	d206      	bcs.n	8018024 <lwip_recvfrom+0xf0>
 8018016:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8018018:	461a      	mov	r2, r3
 801801a:	687b      	ldr	r3, [r7, #4]
 801801c:	4293      	cmp	r3, r2
 801801e:	bf28      	it	cs
 8018020:	4613      	movcs	r3, r2
 8018022:	e001      	b.n	8018028 <lwip_recvfrom+0xf4>
 8018024:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 8018028:	647b      	str	r3, [r7, #68]	@ 0x44
    if (fromlen) {
 801802a:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 801802c:	2b00      	cmp	r3, #0
 801802e:	d002      	beq.n	8018036 <lwip_recvfrom+0x102>
      *fromlen = msg.msg_namelen;
 8018030:	69ba      	ldr	r2, [r7, #24]
 8018032:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8018034:	601a      	str	r2, [r3, #0]
    }
  }

  sock_set_errno(sock, 0);
 8018036:	2300      	movs	r3, #0
 8018038:	643b      	str	r3, [r7, #64]	@ 0x40
 801803a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801803c:	2b00      	cmp	r3, #0
 801803e:	d002      	beq.n	8018046 <lwip_recvfrom+0x112>
 8018040:	4a04      	ldr	r2, [pc, #16]	@ (8018054 <lwip_recvfrom+0x120>)
 8018042:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018044:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return ret;
 8018046:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
}
 8018048:	4618      	mov	r0, r3
 801804a:	3750      	adds	r7, #80	@ 0x50
 801804c:	46bd      	mov	sp, r7
 801804e:	bd80      	pop	{r7, pc}
 8018050:	0802d7f0 	.word	0x0802d7f0
 8018054:	2402b180 	.word	0x2402b180

08018058 <lwip_recv>:
  return lwip_recvmsg(s, &msg, 0);
}

ssize_t
lwip_recv(int s, void *mem, size_t len, int flags)
{
 8018058:	b580      	push	{r7, lr}
 801805a:	b086      	sub	sp, #24
 801805c:	af02      	add	r7, sp, #8
 801805e:	60f8      	str	r0, [r7, #12]
 8018060:	60b9      	str	r1, [r7, #8]
 8018062:	607a      	str	r2, [r7, #4]
 8018064:	603b      	str	r3, [r7, #0]
  return lwip_recvfrom(s, mem, len, flags, NULL, NULL);
 8018066:	2300      	movs	r3, #0
 8018068:	9301      	str	r3, [sp, #4]
 801806a:	2300      	movs	r3, #0
 801806c:	9300      	str	r3, [sp, #0]
 801806e:	683b      	ldr	r3, [r7, #0]
 8018070:	687a      	ldr	r2, [r7, #4]
 8018072:	68b9      	ldr	r1, [r7, #8]
 8018074:	68f8      	ldr	r0, [r7, #12]
 8018076:	f7ff ff5d 	bl	8017f34 <lwip_recvfrom>
 801807a:	4603      	mov	r3, r0
}
 801807c:	4618      	mov	r0, r3
 801807e:	3710      	adds	r7, #16
 8018080:	46bd      	mov	sp, r7
 8018082:	bd80      	pop	{r7, pc}

08018084 <lwip_send>:
#endif /* LWIP_UDP || LWIP_RAW */
}

ssize_t
lwip_send(int s, const void *data, size_t size, int flags)
{
 8018084:	b580      	push	{r7, lr}
 8018086:	b08a      	sub	sp, #40	@ 0x28
 8018088:	af02      	add	r7, sp, #8
 801808a:	60f8      	str	r0, [r7, #12]
 801808c:	60b9      	str	r1, [r7, #8]
 801808e:	607a      	str	r2, [r7, #4]
 8018090:	603b      	str	r3, [r7, #0]
  size_t written;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d, data=%p, size=%"SZT_F", flags=0x%x)\n",
                              s, data, size, flags));

  sock = get_socket(s);
 8018092:	68f8      	ldr	r0, [r7, #12]
 8018094:	f7ff fb10 	bl	80176b8 <get_socket>
 8018098:	61f8      	str	r0, [r7, #28]
  if (!sock) {
 801809a:	69fb      	ldr	r3, [r7, #28]
 801809c:	2b00      	cmp	r3, #0
 801809e:	d102      	bne.n	80180a6 <lwip_send+0x22>
    return -1;
 80180a0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80180a4:	e046      	b.n	8018134 <lwip_send+0xb0>
  }

  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) != NETCONN_TCP) {
 80180a6:	69fb      	ldr	r3, [r7, #28]
 80180a8:	681b      	ldr	r3, [r3, #0]
 80180aa:	781b      	ldrb	r3, [r3, #0]
 80180ac:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80180b0:	2b10      	cmp	r3, #16
 80180b2:	d00b      	beq.n	80180cc <lwip_send+0x48>
#if (LWIP_UDP || LWIP_RAW)
    done_socket(sock);
    return lwip_sendto(s, data, size, flags, NULL, 0);
 80180b4:	2300      	movs	r3, #0
 80180b6:	9301      	str	r3, [sp, #4]
 80180b8:	2300      	movs	r3, #0
 80180ba:	9300      	str	r3, [sp, #0]
 80180bc:	683b      	ldr	r3, [r7, #0]
 80180be:	687a      	ldr	r2, [r7, #4]
 80180c0:	68b9      	ldr	r1, [r7, #8]
 80180c2:	68f8      	ldr	r0, [r7, #12]
 80180c4:	f000 f83c 	bl	8018140 <lwip_sendto>
 80180c8:	4603      	mov	r3, r0
 80180ca:	e033      	b.n	8018134 <lwip_send+0xb0>
    return -1;
#endif /* (LWIP_UDP || LWIP_RAW) */
  }

  write_flags = (u8_t)(NETCONN_COPY |
                       ((flags & MSG_MORE)     ? NETCONN_MORE      : 0) |
 80180cc:	683b      	ldr	r3, [r7, #0]
 80180ce:	f003 0310 	and.w	r3, r3, #16
  write_flags = (u8_t)(NETCONN_COPY |
 80180d2:	2b00      	cmp	r3, #0
 80180d4:	d001      	beq.n	80180da <lwip_send+0x56>
 80180d6:	2203      	movs	r2, #3
 80180d8:	e000      	b.n	80180dc <lwip_send+0x58>
 80180da:	2201      	movs	r2, #1
                       ((flags & MSG_MORE)     ? NETCONN_MORE      : 0) |
 80180dc:	683b      	ldr	r3, [r7, #0]
 80180de:	105b      	asrs	r3, r3, #1
 80180e0:	b25b      	sxtb	r3, r3
 80180e2:	f003 0304 	and.w	r3, r3, #4
 80180e6:	b25b      	sxtb	r3, r3
 80180e8:	4313      	orrs	r3, r2
 80180ea:	b25b      	sxtb	r3, r3
  write_flags = (u8_t)(NETCONN_COPY |
 80180ec:	76fb      	strb	r3, [r7, #27]
                       ((flags & MSG_DONTWAIT) ? NETCONN_DONTBLOCK : 0));
  written = 0;
 80180ee:	2300      	movs	r3, #0
 80180f0:	613b      	str	r3, [r7, #16]
  err = netconn_write_partly(sock->conn, data, size, write_flags, &written);
 80180f2:	69fb      	ldr	r3, [r7, #28]
 80180f4:	6818      	ldr	r0, [r3, #0]
 80180f6:	7efa      	ldrb	r2, [r7, #27]
 80180f8:	f107 0310 	add.w	r3, r7, #16
 80180fc:	9300      	str	r3, [sp, #0]
 80180fe:	4613      	mov	r3, r2
 8018100:	687a      	ldr	r2, [r7, #4]
 8018102:	68b9      	ldr	r1, [r7, #8]
 8018104:	f7fd fc04 	bl	8015910 <netconn_write_partly>
 8018108:	4603      	mov	r3, r0
 801810a:	76bb      	strb	r3, [r7, #26]

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d) err=%d written=%"SZT_F"\n", s, err, written));
  sock_set_errno(sock, err_to_errno(err));
 801810c:	f997 301a 	ldrsb.w	r3, [r7, #26]
 8018110:	4618      	mov	r0, r3
 8018112:	f7ff f9e3 	bl	80174dc <err_to_errno>
 8018116:	6178      	str	r0, [r7, #20]
 8018118:	697b      	ldr	r3, [r7, #20]
 801811a:	2b00      	cmp	r3, #0
 801811c:	d002      	beq.n	8018124 <lwip_send+0xa0>
 801811e:	4a07      	ldr	r2, [pc, #28]	@ (801813c <lwip_send+0xb8>)
 8018120:	697b      	ldr	r3, [r7, #20]
 8018122:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  /* casting 'written' to ssize_t is OK here since the netconn API limits it to SSIZE_MAX */
  return (err == ERR_OK ? (ssize_t)written : -1);
 8018124:	f997 301a 	ldrsb.w	r3, [r7, #26]
 8018128:	2b00      	cmp	r3, #0
 801812a:	d101      	bne.n	8018130 <lwip_send+0xac>
 801812c:	693b      	ldr	r3, [r7, #16]
 801812e:	e001      	b.n	8018134 <lwip_send+0xb0>
 8018130:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8018134:	4618      	mov	r0, r3
 8018136:	3720      	adds	r7, #32
 8018138:	46bd      	mov	sp, r7
 801813a:	bd80      	pop	{r7, pc}
 801813c:	2402b180 	.word	0x2402b180

08018140 <lwip_sendto>:
}

ssize_t
lwip_sendto(int s, const void *data, size_t size, int flags,
            const struct sockaddr *to, socklen_t tolen)
{
 8018140:	b580      	push	{r7, lr}
 8018142:	b08e      	sub	sp, #56	@ 0x38
 8018144:	af00      	add	r7, sp, #0
 8018146:	60f8      	str	r0, [r7, #12]
 8018148:	60b9      	str	r1, [r7, #8]
 801814a:	607a      	str	r2, [r7, #4]
 801814c:	603b      	str	r3, [r7, #0]
  err_t err;
  u16_t short_size;
  u16_t remote_port;
  struct netbuf buf;

  sock = get_socket(s);
 801814e:	68f8      	ldr	r0, [r7, #12]
 8018150:	f7ff fab2 	bl	80176b8 <get_socket>
 8018154:	6338      	str	r0, [r7, #48]	@ 0x30
  if (!sock) {
 8018156:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8018158:	2b00      	cmp	r3, #0
 801815a:	d102      	bne.n	8018162 <lwip_sendto+0x22>
    return -1;
 801815c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018160:	e093      	b.n	801828a <lwip_sendto+0x14a>
  }

  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 8018162:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8018164:	681b      	ldr	r3, [r3, #0]
 8018166:	781b      	ldrb	r3, [r3, #0]
 8018168:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801816c:	2b10      	cmp	r3, #16
 801816e:	d107      	bne.n	8018180 <lwip_sendto+0x40>
#if LWIP_TCP
    done_socket(sock);
    return lwip_send(s, data, size, flags);
 8018170:	683b      	ldr	r3, [r7, #0]
 8018172:	687a      	ldr	r2, [r7, #4]
 8018174:	68b9      	ldr	r1, [r7, #8]
 8018176:	68f8      	ldr	r0, [r7, #12]
 8018178:	f7ff ff84 	bl	8018084 <lwip_send>
 801817c:	4603      	mov	r3, r0
 801817e:	e084      	b.n	801828a <lwip_sendto+0x14a>
    done_socket(sock);
    return -1;
#endif /* LWIP_TCP */
  }

  if (size > LWIP_MIN(0xFFFF, SSIZE_MAX)) {
 8018180:	687b      	ldr	r3, [r7, #4]
 8018182:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8018186:	d30a      	bcc.n	801819e <lwip_sendto+0x5e>
    /* cannot fit into one datagram (at least for us) */
    sock_set_errno(sock, EMSGSIZE);
 8018188:	235a      	movs	r3, #90	@ 0x5a
 801818a:	623b      	str	r3, [r7, #32]
 801818c:	6a3b      	ldr	r3, [r7, #32]
 801818e:	2b00      	cmp	r3, #0
 8018190:	d002      	beq.n	8018198 <lwip_sendto+0x58>
 8018192:	4a40      	ldr	r2, [pc, #256]	@ (8018294 <lwip_sendto+0x154>)
 8018194:	6a3b      	ldr	r3, [r7, #32]
 8018196:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 8018198:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801819c:	e075      	b.n	801828a <lwip_sendto+0x14a>
  }
  short_size = (u16_t)size;
 801819e:	687b      	ldr	r3, [r7, #4]
 80181a0:	85fb      	strh	r3, [r7, #46]	@ 0x2e
  LWIP_ERROR("lwip_sendto: invalid address", (((to == NULL) && (tolen == 0)) ||
 80181a2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80181a4:	2b00      	cmp	r3, #0
 80181a6:	d102      	bne.n	80181ae <lwip_sendto+0x6e>
 80181a8:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 80181aa:	2b00      	cmp	r3, #0
 80181ac:	d023      	beq.n	80181f6 <lwip_sendto+0xb6>
 80181ae:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 80181b0:	2b10      	cmp	r3, #16
 80181b2:	d10b      	bne.n	80181cc <lwip_sendto+0x8c>
 80181b4:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80181b6:	2b00      	cmp	r3, #0
 80181b8:	d008      	beq.n	80181cc <lwip_sendto+0x8c>
 80181ba:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80181bc:	785b      	ldrb	r3, [r3, #1]
 80181be:	2b02      	cmp	r3, #2
 80181c0:	d104      	bne.n	80181cc <lwip_sendto+0x8c>
 80181c2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80181c4:	f003 0303 	and.w	r3, r3, #3
 80181c8:	2b00      	cmp	r3, #0
 80181ca:	d014      	beq.n	80181f6 <lwip_sendto+0xb6>
 80181cc:	4b32      	ldr	r3, [pc, #200]	@ (8018298 <lwip_sendto+0x158>)
 80181ce:	f240 6252 	movw	r2, #1618	@ 0x652
 80181d2:	4932      	ldr	r1, [pc, #200]	@ (801829c <lwip_sendto+0x15c>)
 80181d4:	4832      	ldr	r0, [pc, #200]	@ (80182a0 <lwip_sendto+0x160>)
 80181d6:	f011 fc01 	bl	80299dc <iprintf>
 80181da:	f06f 000f 	mvn.w	r0, #15
 80181de:	f7ff f97d 	bl	80174dc <err_to_errno>
 80181e2:	62b8      	str	r0, [r7, #40]	@ 0x28
 80181e4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80181e6:	2b00      	cmp	r3, #0
 80181e8:	d002      	beq.n	80181f0 <lwip_sendto+0xb0>
 80181ea:	4a2a      	ldr	r2, [pc, #168]	@ (8018294 <lwip_sendto+0x154>)
 80181ec:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80181ee:	6013      	str	r3, [r2, #0]
 80181f0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80181f4:	e049      	b.n	801828a <lwip_sendto+0x14a>
              ((to != NULL) && (IS_SOCK_ADDR_TYPE_VALID(to) && IS_SOCK_ADDR_ALIGNED(to))))),
             sock_set_errno(sock, err_to_errno(ERR_ARG)); done_socket(sock); return -1;);
  LWIP_UNUSED_ARG(tolen);

  /* initialize a buffer */
  buf.p = buf.ptr = NULL;
 80181f6:	2300      	movs	r3, #0
 80181f8:	617b      	str	r3, [r7, #20]
 80181fa:	697b      	ldr	r3, [r7, #20]
 80181fc:	613b      	str	r3, [r7, #16]
#if LWIP_CHECKSUM_ON_COPY
  buf.flags = 0;
#endif /* LWIP_CHECKSUM_ON_COPY */
  if (to) {
 80181fe:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018200:	2b00      	cmp	r3, #0
 8018202:	d00a      	beq.n	801821a <lwip_sendto+0xda>
    SOCKADDR_TO_IPADDR_PORT(to, &buf.addr, remote_port);
 8018204:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018206:	685b      	ldr	r3, [r3, #4]
 8018208:	61bb      	str	r3, [r7, #24]
 801820a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801820c:	885b      	ldrh	r3, [r3, #2]
 801820e:	4618      	mov	r0, r3
 8018210:	f000 fc8a 	bl	8018b28 <lwip_htons>
 8018214:	4603      	mov	r3, r0
 8018216:	86fb      	strh	r3, [r7, #54]	@ 0x36
 8018218:	e003      	b.n	8018222 <lwip_sendto+0xe2>
  } else {
    remote_port = 0;
 801821a:	2300      	movs	r3, #0
 801821c:	86fb      	strh	r3, [r7, #54]	@ 0x36
    ip_addr_set_any(NETCONNTYPE_ISIPV6(netconn_type(sock->conn)), &buf.addr);
 801821e:	2300      	movs	r3, #0
 8018220:	61bb      	str	r3, [r7, #24]
  }
  netbuf_fromport(&buf) = remote_port;
 8018222:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 8018224:	83bb      	strh	r3, [r7, #28]
      MEMCPY(buf.p->payload, data, short_size);
    }
    err = ERR_OK;
  }
#else /* LWIP_NETIF_TX_SINGLE_PBUF */
  err = netbuf_ref(&buf, data, short_size);
 8018226:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 8018228:	f107 0310 	add.w	r3, r7, #16
 801822c:	68b9      	ldr	r1, [r7, #8]
 801822e:	4618      	mov	r0, r3
 8018230:	f7ff f9ba 	bl	80175a8 <netbuf_ref>
 8018234:	4603      	mov	r3, r0
 8018236:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
  if (err == ERR_OK) {
 801823a:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 801823e:	2b00      	cmp	r3, #0
 8018240:	d10a      	bne.n	8018258 <lwip_sendto+0x118>
      IP_SET_TYPE_VAL(buf.addr, IPADDR_TYPE_V4);
    }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

    /* send the data */
    err = netconn_send(sock->conn, &buf);
 8018242:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8018244:	681b      	ldr	r3, [r3, #0]
 8018246:	f107 0210 	add.w	r2, r7, #16
 801824a:	4611      	mov	r1, r2
 801824c:	4618      	mov	r0, r3
 801824e:	f7fd fb31 	bl	80158b4 <netconn_send>
 8018252:	4603      	mov	r3, r0
 8018254:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
  }

  /* deallocated the buffer */
  netbuf_free(&buf);
 8018258:	f107 0310 	add.w	r3, r7, #16
 801825c:	4618      	mov	r0, r3
 801825e:	f7ff f97b 	bl	8017558 <netbuf_free>

  sock_set_errno(sock, err_to_errno(err));
 8018262:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 8018266:	4618      	mov	r0, r3
 8018268:	f7ff f938 	bl	80174dc <err_to_errno>
 801826c:	6278      	str	r0, [r7, #36]	@ 0x24
 801826e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018270:	2b00      	cmp	r3, #0
 8018272:	d002      	beq.n	801827a <lwip_sendto+0x13a>
 8018274:	4a07      	ldr	r2, [pc, #28]	@ (8018294 <lwip_sendto+0x154>)
 8018276:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018278:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return (err == ERR_OK ? short_size : -1);
 801827a:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 801827e:	2b00      	cmp	r3, #0
 8018280:	d101      	bne.n	8018286 <lwip_sendto+0x146>
 8018282:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8018284:	e001      	b.n	801828a <lwip_sendto+0x14a>
 8018286:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 801828a:	4618      	mov	r0, r3
 801828c:	3738      	adds	r7, #56	@ 0x38
 801828e:	46bd      	mov	sp, r7
 8018290:	bd80      	pop	{r7, pc}
 8018292:	bf00      	nop
 8018294:	2402b180 	.word	0x2402b180
 8018298:	0802d614 	.word	0x0802d614
 801829c:	0802d8f4 	.word	0x0802d8f4
 80182a0:	0802d668 	.word	0x0802d668

080182a4 <lwip_socket>:

int
lwip_socket(int domain, int type, int protocol)
{
 80182a4:	b580      	push	{r7, lr}
 80182a6:	b086      	sub	sp, #24
 80182a8:	af00      	add	r7, sp, #0
 80182aa:	60f8      	str	r0, [r7, #12]
 80182ac:	60b9      	str	r1, [r7, #8]
 80182ae:	607a      	str	r2, [r7, #4]
  int i;

  LWIP_UNUSED_ARG(domain); /* @todo: check this */

  /* create a netconn */
  switch (type) {
 80182b0:	68bb      	ldr	r3, [r7, #8]
 80182b2:	2b03      	cmp	r3, #3
 80182b4:	d009      	beq.n	80182ca <lwip_socket+0x26>
 80182b6:	68bb      	ldr	r3, [r7, #8]
 80182b8:	2b03      	cmp	r3, #3
 80182ba:	dc23      	bgt.n	8018304 <lwip_socket+0x60>
 80182bc:	68bb      	ldr	r3, [r7, #8]
 80182be:	2b01      	cmp	r3, #1
 80182c0:	d019      	beq.n	80182f6 <lwip_socket+0x52>
 80182c2:	68bb      	ldr	r3, [r7, #8]
 80182c4:	2b02      	cmp	r3, #2
 80182c6:	d009      	beq.n	80182dc <lwip_socket+0x38>
 80182c8:	e01c      	b.n	8018304 <lwip_socket+0x60>
    case SOCK_RAW:
      conn = netconn_new_with_proto_and_callback(DOMAIN_TO_NETCONN_TYPE(domain, NETCONN_RAW),
 80182ca:	687b      	ldr	r3, [r7, #4]
 80182cc:	b2db      	uxtb	r3, r3
 80182ce:	4a22      	ldr	r2, [pc, #136]	@ (8018358 <lwip_socket+0xb4>)
 80182d0:	4619      	mov	r1, r3
 80182d2:	2040      	movs	r0, #64	@ 0x40
 80182d4:	f7fc ff60 	bl	8015198 <netconn_new_with_proto_and_callback>
 80182d8:	6178      	str	r0, [r7, #20]
             (u8_t)protocol, DEFAULT_SOCKET_EVENTCB);
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_RAW, %d) = ",
                                  domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol));
      break;
 80182da:	e019      	b.n	8018310 <lwip_socket+0x6c>
    case SOCK_DGRAM:
      conn = netconn_new_with_callback(DOMAIN_TO_NETCONN_TYPE(domain,
 80182dc:	687b      	ldr	r3, [r7, #4]
 80182de:	2b88      	cmp	r3, #136	@ 0x88
 80182e0:	d101      	bne.n	80182e6 <lwip_socket+0x42>
 80182e2:	2321      	movs	r3, #33	@ 0x21
 80182e4:	e000      	b.n	80182e8 <lwip_socket+0x44>
 80182e6:	2320      	movs	r3, #32
 80182e8:	4a1b      	ldr	r2, [pc, #108]	@ (8018358 <lwip_socket+0xb4>)
 80182ea:	2100      	movs	r1, #0
 80182ec:	4618      	mov	r0, r3
 80182ee:	f7fc ff53 	bl	8015198 <netconn_new_with_proto_and_callback>
 80182f2:	6178      	str	r0, [r7, #20]
      if (conn) {
        /* netconn layer enables pktinfo by default, sockets default to off */
        conn->flags &= ~NETCONN_FLAG_PKTINFO;
      }
#endif /* LWIP_NETBUF_RECVINFO */
      break;
 80182f4:	e00c      	b.n	8018310 <lwip_socket+0x6c>
    case SOCK_STREAM:
      conn = netconn_new_with_callback(DOMAIN_TO_NETCONN_TYPE(domain, NETCONN_TCP), DEFAULT_SOCKET_EVENTCB);
 80182f6:	4a18      	ldr	r2, [pc, #96]	@ (8018358 <lwip_socket+0xb4>)
 80182f8:	2100      	movs	r1, #0
 80182fa:	2010      	movs	r0, #16
 80182fc:	f7fc ff4c 	bl	8015198 <netconn_new_with_proto_and_callback>
 8018300:	6178      	str	r0, [r7, #20]
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_STREAM, %d) = ",
                                  domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol));
      break;
 8018302:	e005      	b.n	8018310 <lwip_socket+0x6c>
    default:
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%d, %d/UNKNOWN, %d) = -1\n",
                                  domain, type, protocol));
      set_errno(EINVAL);
 8018304:	4b15      	ldr	r3, [pc, #84]	@ (801835c <lwip_socket+0xb8>)
 8018306:	2216      	movs	r2, #22
 8018308:	601a      	str	r2, [r3, #0]
      return -1;
 801830a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801830e:	e01e      	b.n	801834e <lwip_socket+0xaa>
  }

  if (!conn) {
 8018310:	697b      	ldr	r3, [r7, #20]
 8018312:	2b00      	cmp	r3, #0
 8018314:	d105      	bne.n	8018322 <lwip_socket+0x7e>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("-1 / ENOBUFS (could not create netconn)\n"));
    set_errno(ENOBUFS);
 8018316:	4b11      	ldr	r3, [pc, #68]	@ (801835c <lwip_socket+0xb8>)
 8018318:	2269      	movs	r2, #105	@ 0x69
 801831a:	601a      	str	r2, [r3, #0]
    return -1;
 801831c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018320:	e015      	b.n	801834e <lwip_socket+0xaa>
  }

  i = alloc_socket(conn, 0);
 8018322:	2100      	movs	r1, #0
 8018324:	6978      	ldr	r0, [r7, #20]
 8018326:	f7ff f9df 	bl	80176e8 <alloc_socket>
 801832a:	6138      	str	r0, [r7, #16]

  if (i == -1) {
 801832c:	693b      	ldr	r3, [r7, #16]
 801832e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8018332:	d108      	bne.n	8018346 <lwip_socket+0xa2>
    netconn_delete(conn);
 8018334:	6978      	ldr	r0, [r7, #20]
 8018336:	f7fc ffcd 	bl	80152d4 <netconn_delete>
    set_errno(ENFILE);
 801833a:	4b08      	ldr	r3, [pc, #32]	@ (801835c <lwip_socket+0xb8>)
 801833c:	2217      	movs	r2, #23
 801833e:	601a      	str	r2, [r3, #0]
    return -1;
 8018340:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018344:	e003      	b.n	801834e <lwip_socket+0xaa>
  }
  conn->socket = i;
 8018346:	697b      	ldr	r3, [r7, #20]
 8018348:	693a      	ldr	r2, [r7, #16]
 801834a:	619a      	str	r2, [r3, #24]
  done_socket(&sockets[i - LWIP_SOCKET_OFFSET]);
  LWIP_DEBUGF(SOCKETS_DEBUG, ("%d\n", i));
  set_errno(0);
  return i;
 801834c:	693b      	ldr	r3, [r7, #16]
}
 801834e:	4618      	mov	r0, r3
 8018350:	3718      	adds	r7, #24
 8018352:	46bd      	mov	sp, r7
 8018354:	bd80      	pop	{r7, pc}
 8018356:	bf00      	nop
 8018358:	080183e9 	.word	0x080183e9
 801835c:	2402b180 	.word	0x2402b180

08018360 <lwip_poll_should_wake>:
 * Check whether event_callback should wake up a thread waiting in
 * lwip_poll.
 */
static int
lwip_poll_should_wake(const struct lwip_select_cb *scb, int fd, int has_recvevent, int has_sendevent, int has_errevent)
{
 8018360:	b480      	push	{r7}
 8018362:	b087      	sub	sp, #28
 8018364:	af00      	add	r7, sp, #0
 8018366:	60f8      	str	r0, [r7, #12]
 8018368:	60b9      	str	r1, [r7, #8]
 801836a:	607a      	str	r2, [r7, #4]
 801836c:	603b      	str	r3, [r7, #0]
  nfds_t fdi;
  for (fdi = 0; fdi < scb->poll_nfds; fdi++) {
 801836e:	2300      	movs	r3, #0
 8018370:	617b      	str	r3, [r7, #20]
 8018372:	e02c      	b.n	80183ce <lwip_poll_should_wake+0x6e>
    const struct pollfd *pollfd = &scb->poll_fds[fdi];
 8018374:	68fb      	ldr	r3, [r7, #12]
 8018376:	695a      	ldr	r2, [r3, #20]
 8018378:	697b      	ldr	r3, [r7, #20]
 801837a:	00db      	lsls	r3, r3, #3
 801837c:	4413      	add	r3, r2
 801837e:	613b      	str	r3, [r7, #16]
    if (pollfd->fd == fd) {
 8018380:	693b      	ldr	r3, [r7, #16]
 8018382:	681b      	ldr	r3, [r3, #0]
 8018384:	68ba      	ldr	r2, [r7, #8]
 8018386:	429a      	cmp	r2, r3
 8018388:	d11e      	bne.n	80183c8 <lwip_poll_should_wake+0x68>
      /* Do not update pollfd->revents right here;
         that would be a data race because lwip_pollscan
         accesses revents without protecting. */
      if (has_recvevent && (pollfd->events & POLLIN) != 0) {
 801838a:	687b      	ldr	r3, [r7, #4]
 801838c:	2b00      	cmp	r3, #0
 801838e:	d009      	beq.n	80183a4 <lwip_poll_should_wake+0x44>
 8018390:	693b      	ldr	r3, [r7, #16]
 8018392:	f9b3 3004 	ldrsh.w	r3, [r3, #4]
 8018396:	b29b      	uxth	r3, r3
 8018398:	f003 0301 	and.w	r3, r3, #1
 801839c:	2b00      	cmp	r3, #0
 801839e:	d001      	beq.n	80183a4 <lwip_poll_should_wake+0x44>
        return 1;
 80183a0:	2301      	movs	r3, #1
 80183a2:	e01a      	b.n	80183da <lwip_poll_should_wake+0x7a>
      }
      if (has_sendevent && (pollfd->events & POLLOUT) != 0) {
 80183a4:	683b      	ldr	r3, [r7, #0]
 80183a6:	2b00      	cmp	r3, #0
 80183a8:	d009      	beq.n	80183be <lwip_poll_should_wake+0x5e>
 80183aa:	693b      	ldr	r3, [r7, #16]
 80183ac:	f9b3 3004 	ldrsh.w	r3, [r3, #4]
 80183b0:	b29b      	uxth	r3, r3
 80183b2:	f003 0302 	and.w	r3, r3, #2
 80183b6:	2b00      	cmp	r3, #0
 80183b8:	d001      	beq.n	80183be <lwip_poll_should_wake+0x5e>
        return 1;
 80183ba:	2301      	movs	r3, #1
 80183bc:	e00d      	b.n	80183da <lwip_poll_should_wake+0x7a>
      }
      if (has_errevent) {
 80183be:	6a3b      	ldr	r3, [r7, #32]
 80183c0:	2b00      	cmp	r3, #0
 80183c2:	d001      	beq.n	80183c8 <lwip_poll_should_wake+0x68>
        /* POLLERR is output only. */
        return 1;
 80183c4:	2301      	movs	r3, #1
 80183c6:	e008      	b.n	80183da <lwip_poll_should_wake+0x7a>
  for (fdi = 0; fdi < scb->poll_nfds; fdi++) {
 80183c8:	697b      	ldr	r3, [r7, #20]
 80183ca:	3301      	adds	r3, #1
 80183cc:	617b      	str	r3, [r7, #20]
 80183ce:	68fb      	ldr	r3, [r7, #12]
 80183d0:	699b      	ldr	r3, [r3, #24]
 80183d2:	697a      	ldr	r2, [r7, #20]
 80183d4:	429a      	cmp	r2, r3
 80183d6:	d3cd      	bcc.n	8018374 <lwip_poll_should_wake+0x14>
      }
    }
  }
  return 0;
 80183d8:	2300      	movs	r3, #0
}
 80183da:	4618      	mov	r0, r3
 80183dc:	371c      	adds	r7, #28
 80183de:	46bd      	mov	sp, r7
 80183e0:	f85d 7b04 	ldr.w	r7, [sp], #4
 80183e4:	4770      	bx	lr
	...

080183e8 <event_callback>:
 *   NETCONN_EVT_ERROR
 * This requirement will be asserted in select_check_waiters()
 */
static void
event_callback(struct netconn *conn, enum netconn_evt evt, u16_t len)
{
 80183e8:	b580      	push	{r7, lr}
 80183ea:	b08a      	sub	sp, #40	@ 0x28
 80183ec:	af00      	add	r7, sp, #0
 80183ee:	6078      	str	r0, [r7, #4]
 80183f0:	460b      	mov	r3, r1
 80183f2:	70fb      	strb	r3, [r7, #3]
 80183f4:	4613      	mov	r3, r2
 80183f6:	803b      	strh	r3, [r7, #0]
  SYS_ARCH_DECL_PROTECT(lev);

  LWIP_UNUSED_ARG(len);

  /* Get socket */
  if (conn) {
 80183f8:	687b      	ldr	r3, [r7, #4]
 80183fa:	2b00      	cmp	r3, #0
 80183fc:	f000 80a4 	beq.w	8018548 <event_callback+0x160>
    s = conn->socket;
 8018400:	687b      	ldr	r3, [r7, #4]
 8018402:	699b      	ldr	r3, [r3, #24]
 8018404:	627b      	str	r3, [r7, #36]	@ 0x24
    if (s < 0) {
 8018406:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018408:	2b00      	cmp	r3, #0
 801840a:	da18      	bge.n	801843e <event_callback+0x56>
      /* Data comes in right away after an accept, even though
       * the server task might not have created a new socket yet.
       * Just count down (or up) if that's the case and we
       * will use the data later. Note that only receive events
       * can happen before the new socket is set up. */
      SYS_ARCH_PROTECT(lev);
 801840c:	f00e f850 	bl	80264b0 <sys_arch_protect>
 8018410:	61f8      	str	r0, [r7, #28]
      if (conn->socket < 0) {
 8018412:	687b      	ldr	r3, [r7, #4]
 8018414:	699b      	ldr	r3, [r3, #24]
 8018416:	2b00      	cmp	r3, #0
 8018418:	da0b      	bge.n	8018432 <event_callback+0x4a>
        if (evt == NETCONN_EVT_RCVPLUS) {
 801841a:	78fb      	ldrb	r3, [r7, #3]
 801841c:	2b00      	cmp	r3, #0
 801841e:	d104      	bne.n	801842a <event_callback+0x42>
          /* conn->socket is -1 on initialization
             lwip_accept adjusts sock->recvevent if conn->socket < -1 */
          conn->socket--;
 8018420:	687b      	ldr	r3, [r7, #4]
 8018422:	699b      	ldr	r3, [r3, #24]
 8018424:	1e5a      	subs	r2, r3, #1
 8018426:	687b      	ldr	r3, [r7, #4]
 8018428:	619a      	str	r2, [r3, #24]
        }
        SYS_ARCH_UNPROTECT(lev);
 801842a:	69f8      	ldr	r0, [r7, #28]
 801842c:	f00e f84e 	bl	80264cc <sys_arch_unprotect>
        return;
 8018430:	e08d      	b.n	801854e <event_callback+0x166>
      }
      s = conn->socket;
 8018432:	687b      	ldr	r3, [r7, #4]
 8018434:	699b      	ldr	r3, [r3, #24]
 8018436:	627b      	str	r3, [r7, #36]	@ 0x24
      SYS_ARCH_UNPROTECT(lev);
 8018438:	69f8      	ldr	r0, [r7, #28]
 801843a:	f00e f847 	bl	80264cc <sys_arch_unprotect>
    }

    sock = get_socket(s);
 801843e:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8018440:	f7ff f93a 	bl	80176b8 <get_socket>
 8018444:	61b8      	str	r0, [r7, #24]
    if (!sock) {
 8018446:	69bb      	ldr	r3, [r7, #24]
 8018448:	2b00      	cmp	r3, #0
 801844a:	d07f      	beq.n	801854c <event_callback+0x164>
    }
  } else {
    return;
  }

  check_waiters = 1;
 801844c:	2301      	movs	r3, #1
 801844e:	623b      	str	r3, [r7, #32]
  SYS_ARCH_PROTECT(lev);
 8018450:	f00e f82e 	bl	80264b0 <sys_arch_protect>
 8018454:	61f8      	str	r0, [r7, #28]
  /* Set event as required */
  switch (evt) {
 8018456:	78fb      	ldrb	r3, [r7, #3]
 8018458:	2b04      	cmp	r3, #4
 801845a:	d83e      	bhi.n	80184da <event_callback+0xf2>
 801845c:	a201      	add	r2, pc, #4	@ (adr r2, 8018464 <event_callback+0x7c>)
 801845e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8018462:	bf00      	nop
 8018464:	08018479 	.word	0x08018479
 8018468:	0801849b 	.word	0x0801849b
 801846c:	080184b3 	.word	0x080184b3
 8018470:	080184c7 	.word	0x080184c7
 8018474:	080184d3 	.word	0x080184d3
    case NETCONN_EVT_RCVPLUS:
      sock->rcvevent++;
 8018478:	69bb      	ldr	r3, [r7, #24]
 801847a:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 801847e:	b29b      	uxth	r3, r3
 8018480:	3301      	adds	r3, #1
 8018482:	b29b      	uxth	r3, r3
 8018484:	b21a      	sxth	r2, r3
 8018486:	69bb      	ldr	r3, [r7, #24]
 8018488:	811a      	strh	r2, [r3, #8]
      if (sock->rcvevent > 1) {
 801848a:	69bb      	ldr	r3, [r7, #24]
 801848c:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8018490:	2b01      	cmp	r3, #1
 8018492:	dd2a      	ble.n	80184ea <event_callback+0x102>
        check_waiters = 0;
 8018494:	2300      	movs	r3, #0
 8018496:	623b      	str	r3, [r7, #32]
      }
      break;
 8018498:	e027      	b.n	80184ea <event_callback+0x102>
    case NETCONN_EVT_RCVMINUS:
      sock->rcvevent--;
 801849a:	69bb      	ldr	r3, [r7, #24]
 801849c:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 80184a0:	b29b      	uxth	r3, r3
 80184a2:	3b01      	subs	r3, #1
 80184a4:	b29b      	uxth	r3, r3
 80184a6:	b21a      	sxth	r2, r3
 80184a8:	69bb      	ldr	r3, [r7, #24]
 80184aa:	811a      	strh	r2, [r3, #8]
      check_waiters = 0;
 80184ac:	2300      	movs	r3, #0
 80184ae:	623b      	str	r3, [r7, #32]
      break;
 80184b0:	e01c      	b.n	80184ec <event_callback+0x104>
    case NETCONN_EVT_SENDPLUS:
      if (sock->sendevent) {
 80184b2:	69bb      	ldr	r3, [r7, #24]
 80184b4:	895b      	ldrh	r3, [r3, #10]
 80184b6:	2b00      	cmp	r3, #0
 80184b8:	d001      	beq.n	80184be <event_callback+0xd6>
        check_waiters = 0;
 80184ba:	2300      	movs	r3, #0
 80184bc:	623b      	str	r3, [r7, #32]
      }
      sock->sendevent = 1;
 80184be:	69bb      	ldr	r3, [r7, #24]
 80184c0:	2201      	movs	r2, #1
 80184c2:	815a      	strh	r2, [r3, #10]
      break;
 80184c4:	e012      	b.n	80184ec <event_callback+0x104>
    case NETCONN_EVT_SENDMINUS:
      sock->sendevent = 0;
 80184c6:	69bb      	ldr	r3, [r7, #24]
 80184c8:	2200      	movs	r2, #0
 80184ca:	815a      	strh	r2, [r3, #10]
      check_waiters = 0;
 80184cc:	2300      	movs	r3, #0
 80184ce:	623b      	str	r3, [r7, #32]
      break;
 80184d0:	e00c      	b.n	80184ec <event_callback+0x104>
    case NETCONN_EVT_ERROR:
      sock->errevent = 1;
 80184d2:	69bb      	ldr	r3, [r7, #24]
 80184d4:	2201      	movs	r2, #1
 80184d6:	819a      	strh	r2, [r3, #12]
      break;
 80184d8:	e008      	b.n	80184ec <event_callback+0x104>
    default:
      LWIP_ASSERT("unknown event", 0);
 80184da:	4b1e      	ldr	r3, [pc, #120]	@ (8018554 <event_callback+0x16c>)
 80184dc:	f44f 621f 	mov.w	r2, #2544	@ 0x9f0
 80184e0:	491d      	ldr	r1, [pc, #116]	@ (8018558 <event_callback+0x170>)
 80184e2:	481e      	ldr	r0, [pc, #120]	@ (801855c <event_callback+0x174>)
 80184e4:	f011 fa7a 	bl	80299dc <iprintf>
      break;
 80184e8:	e000      	b.n	80184ec <event_callback+0x104>
      break;
 80184ea:	bf00      	nop
  }

  if (sock->select_waiting && check_waiters) {
 80184ec:	69bb      	ldr	r3, [r7, #24]
 80184ee:	7b9b      	ldrb	r3, [r3, #14]
 80184f0:	2b00      	cmp	r3, #0
 80184f2:	d025      	beq.n	8018540 <event_callback+0x158>
 80184f4:	6a3b      	ldr	r3, [r7, #32]
 80184f6:	2b00      	cmp	r3, #0
 80184f8:	d022      	beq.n	8018540 <event_callback+0x158>
    /* Save which events are active */
    int has_recvevent, has_sendevent, has_errevent;
    has_recvevent = sock->rcvevent > 0;
 80184fa:	69bb      	ldr	r3, [r7, #24]
 80184fc:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8018500:	2b00      	cmp	r3, #0
 8018502:	bfcc      	ite	gt
 8018504:	2301      	movgt	r3, #1
 8018506:	2300      	movle	r3, #0
 8018508:	b2db      	uxtb	r3, r3
 801850a:	617b      	str	r3, [r7, #20]
    has_sendevent = sock->sendevent != 0;
 801850c:	69bb      	ldr	r3, [r7, #24]
 801850e:	895b      	ldrh	r3, [r3, #10]
 8018510:	2b00      	cmp	r3, #0
 8018512:	bf14      	ite	ne
 8018514:	2301      	movne	r3, #1
 8018516:	2300      	moveq	r3, #0
 8018518:	b2db      	uxtb	r3, r3
 801851a:	613b      	str	r3, [r7, #16]
    has_errevent = sock->errevent != 0;
 801851c:	69bb      	ldr	r3, [r7, #24]
 801851e:	899b      	ldrh	r3, [r3, #12]
 8018520:	2b00      	cmp	r3, #0
 8018522:	bf14      	ite	ne
 8018524:	2301      	movne	r3, #1
 8018526:	2300      	moveq	r3, #0
 8018528:	b2db      	uxtb	r3, r3
 801852a:	60fb      	str	r3, [r7, #12]
    SYS_ARCH_UNPROTECT(lev);
 801852c:	69f8      	ldr	r0, [r7, #28]
 801852e:	f00d ffcd 	bl	80264cc <sys_arch_unprotect>
    /* Check any select calls waiting on this socket */
    select_check_waiters(s, has_recvevent, has_sendevent, has_errevent);
 8018532:	68fb      	ldr	r3, [r7, #12]
 8018534:	693a      	ldr	r2, [r7, #16]
 8018536:	6979      	ldr	r1, [r7, #20]
 8018538:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 801853a:	f000 f811 	bl	8018560 <select_check_waiters>
  if (sock->select_waiting && check_waiters) {
 801853e:	e006      	b.n	801854e <event_callback+0x166>
  } else {
    SYS_ARCH_UNPROTECT(lev);
 8018540:	69f8      	ldr	r0, [r7, #28]
 8018542:	f00d ffc3 	bl	80264cc <sys_arch_unprotect>
 8018546:	e002      	b.n	801854e <event_callback+0x166>
    return;
 8018548:	bf00      	nop
 801854a:	e000      	b.n	801854e <event_callback+0x166>
      return;
 801854c:	bf00      	nop
  }
  done_socket(sock);
}
 801854e:	3728      	adds	r7, #40	@ 0x28
 8018550:	46bd      	mov	sp, r7
 8018552:	bd80      	pop	{r7, pc}
 8018554:	0802d614 	.word	0x0802d614
 8018558:	0802d990 	.word	0x0802d990
 801855c:	0802d668 	.word	0x0802d668

08018560 <select_check_waiters>:
 * of the loop, thus creating a possibility where a thread could modify the
 * select_cb_list during our UNPROTECT/PROTECT. We use a generational counter to
 * detect this change and restart the list walk. The list is expected to be small
 */
static void select_check_waiters(int s, int has_recvevent, int has_sendevent, int has_errevent)
{
 8018560:	b580      	push	{r7, lr}
 8018562:	b088      	sub	sp, #32
 8018564:	af02      	add	r7, sp, #8
 8018566:	60f8      	str	r0, [r7, #12]
 8018568:	60b9      	str	r1, [r7, #8]
 801856a:	607a      	str	r2, [r7, #4]
 801856c:	603b      	str	r3, [r7, #0]
#if !LWIP_TCPIP_CORE_LOCKING
  int last_select_cb_ctr;
  SYS_ARCH_DECL_PROTECT(lev);
#endif /* !LWIP_TCPIP_CORE_LOCKING */

  LWIP_ASSERT_CORE_LOCKED();
 801856e:	f7f7 ffe9 	bl	8010544 <sys_check_core_locking>
  SYS_ARCH_PROTECT(lev);
again:
  /* remember the state of select_cb_list to detect changes */
  last_select_cb_ctr = select_cb_ctr;
#endif /* !LWIP_TCPIP_CORE_LOCKING */
  for (scb = select_cb_list; scb != NULL; scb = scb->next) {
 8018572:	4b42      	ldr	r3, [pc, #264]	@ (801867c <select_check_waiters+0x11c>)
 8018574:	681b      	ldr	r3, [r3, #0]
 8018576:	617b      	str	r3, [r7, #20]
 8018578:	e078      	b.n	801866c <select_check_waiters+0x10c>
    if (scb->sem_signalled == 0) {
 801857a:	697b      	ldr	r3, [r7, #20]
 801857c:	69db      	ldr	r3, [r3, #28]
 801857e:	2b00      	cmp	r3, #0
 8018580:	d171      	bne.n	8018666 <select_check_waiters+0x106>
      /* semaphore not signalled yet */
      int do_signal = 0;
 8018582:	2300      	movs	r3, #0
 8018584:	613b      	str	r3, [r7, #16]
#if LWIP_SOCKET_POLL
      if (scb->poll_fds != NULL) {
 8018586:	697b      	ldr	r3, [r7, #20]
 8018588:	695b      	ldr	r3, [r3, #20]
 801858a:	2b00      	cmp	r3, #0
 801858c:	d009      	beq.n	80185a2 <select_check_waiters+0x42>
        do_signal = lwip_poll_should_wake(scb, s, has_recvevent, has_sendevent, has_errevent);
 801858e:	683b      	ldr	r3, [r7, #0]
 8018590:	9300      	str	r3, [sp, #0]
 8018592:	687b      	ldr	r3, [r7, #4]
 8018594:	68ba      	ldr	r2, [r7, #8]
 8018596:	68f9      	ldr	r1, [r7, #12]
 8018598:	6978      	ldr	r0, [r7, #20]
 801859a:	f7ff fee1 	bl	8018360 <lwip_poll_should_wake>
 801859e:	6138      	str	r0, [r7, #16]
 80185a0:	e056      	b.n	8018650 <select_check_waiters+0xf0>
      else
#endif /* LWIP_SOCKET_SELECT && LWIP_SOCKET_POLL */
#if LWIP_SOCKET_SELECT
      {
        /* Test this select call for our socket */
        if (has_recvevent) {
 80185a2:	68bb      	ldr	r3, [r7, #8]
 80185a4:	2b00      	cmp	r3, #0
 80185a6:	d017      	beq.n	80185d8 <select_check_waiters+0x78>
          if (scb->readset && FD_ISSET(s, scb->readset)) {
 80185a8:	697b      	ldr	r3, [r7, #20]
 80185aa:	689b      	ldr	r3, [r3, #8]
 80185ac:	2b00      	cmp	r3, #0
 80185ae:	d013      	beq.n	80185d8 <select_check_waiters+0x78>
 80185b0:	697b      	ldr	r3, [r7, #20]
 80185b2:	689a      	ldr	r2, [r3, #8]
 80185b4:	68fb      	ldr	r3, [r7, #12]
 80185b6:	2b00      	cmp	r3, #0
 80185b8:	da00      	bge.n	80185bc <select_check_waiters+0x5c>
 80185ba:	331f      	adds	r3, #31
 80185bc:	115b      	asrs	r3, r3, #5
 80185be:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 80185c2:	68fb      	ldr	r3, [r7, #12]
 80185c4:	f003 031f 	and.w	r3, r3, #31
 80185c8:	fa22 f303 	lsr.w	r3, r2, r3
 80185cc:	f003 0301 	and.w	r3, r3, #1
 80185d0:	2b00      	cmp	r3, #0
 80185d2:	d001      	beq.n	80185d8 <select_check_waiters+0x78>
            do_signal = 1;
 80185d4:	2301      	movs	r3, #1
 80185d6:	613b      	str	r3, [r7, #16]
          }
        }
        if (has_sendevent) {
 80185d8:	687b      	ldr	r3, [r7, #4]
 80185da:	2b00      	cmp	r3, #0
 80185dc:	d01a      	beq.n	8018614 <select_check_waiters+0xb4>
          if (!do_signal && scb->writeset && FD_ISSET(s, scb->writeset)) {
 80185de:	693b      	ldr	r3, [r7, #16]
 80185e0:	2b00      	cmp	r3, #0
 80185e2:	d117      	bne.n	8018614 <select_check_waiters+0xb4>
 80185e4:	697b      	ldr	r3, [r7, #20]
 80185e6:	68db      	ldr	r3, [r3, #12]
 80185e8:	2b00      	cmp	r3, #0
 80185ea:	d013      	beq.n	8018614 <select_check_waiters+0xb4>
 80185ec:	697b      	ldr	r3, [r7, #20]
 80185ee:	68da      	ldr	r2, [r3, #12]
 80185f0:	68fb      	ldr	r3, [r7, #12]
 80185f2:	2b00      	cmp	r3, #0
 80185f4:	da00      	bge.n	80185f8 <select_check_waiters+0x98>
 80185f6:	331f      	adds	r3, #31
 80185f8:	115b      	asrs	r3, r3, #5
 80185fa:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 80185fe:	68fb      	ldr	r3, [r7, #12]
 8018600:	f003 031f 	and.w	r3, r3, #31
 8018604:	fa22 f303 	lsr.w	r3, r2, r3
 8018608:	f003 0301 	and.w	r3, r3, #1
 801860c:	2b00      	cmp	r3, #0
 801860e:	d001      	beq.n	8018614 <select_check_waiters+0xb4>
            do_signal = 1;
 8018610:	2301      	movs	r3, #1
 8018612:	613b      	str	r3, [r7, #16]
          }
        }
        if (has_errevent) {
 8018614:	683b      	ldr	r3, [r7, #0]
 8018616:	2b00      	cmp	r3, #0
 8018618:	d01a      	beq.n	8018650 <select_check_waiters+0xf0>
          if (!do_signal && scb->exceptset && FD_ISSET(s, scb->exceptset)) {
 801861a:	693b      	ldr	r3, [r7, #16]
 801861c:	2b00      	cmp	r3, #0
 801861e:	d117      	bne.n	8018650 <select_check_waiters+0xf0>
 8018620:	697b      	ldr	r3, [r7, #20]
 8018622:	691b      	ldr	r3, [r3, #16]
 8018624:	2b00      	cmp	r3, #0
 8018626:	d013      	beq.n	8018650 <select_check_waiters+0xf0>
 8018628:	697b      	ldr	r3, [r7, #20]
 801862a:	691a      	ldr	r2, [r3, #16]
 801862c:	68fb      	ldr	r3, [r7, #12]
 801862e:	2b00      	cmp	r3, #0
 8018630:	da00      	bge.n	8018634 <select_check_waiters+0xd4>
 8018632:	331f      	adds	r3, #31
 8018634:	115b      	asrs	r3, r3, #5
 8018636:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 801863a:	68fb      	ldr	r3, [r7, #12]
 801863c:	f003 031f 	and.w	r3, r3, #31
 8018640:	fa22 f303 	lsr.w	r3, r2, r3
 8018644:	f003 0301 	and.w	r3, r3, #1
 8018648:	2b00      	cmp	r3, #0
 801864a:	d001      	beq.n	8018650 <select_check_waiters+0xf0>
            do_signal = 1;
 801864c:	2301      	movs	r3, #1
 801864e:	613b      	str	r3, [r7, #16]
          }
        }
      }
#endif /* LWIP_SOCKET_SELECT */
      if (do_signal) {
 8018650:	693b      	ldr	r3, [r7, #16]
 8018652:	2b00      	cmp	r3, #0
 8018654:	d007      	beq.n	8018666 <select_check_waiters+0x106>
        scb->sem_signalled = 1;
 8018656:	697b      	ldr	r3, [r7, #20]
 8018658:	2201      	movs	r2, #1
 801865a:	61da      	str	r2, [r3, #28]
        /* For !LWIP_TCPIP_CORE_LOCKING, we don't call SYS_ARCH_UNPROTECT() before signaling
           the semaphore, as this might lead to the select thread taking itself off the list,
           invalidating the semaphore. */
        sys_sem_signal(SELECT_SEM_PTR(scb->sem));
 801865c:	697b      	ldr	r3, [r7, #20]
 801865e:	3320      	adds	r3, #32
 8018660:	4618      	mov	r0, r3
 8018662:	f00d fe8f 	bl	8026384 <sys_sem_signal>
  for (scb = select_cb_list; scb != NULL; scb = scb->next) {
 8018666:	697b      	ldr	r3, [r7, #20]
 8018668:	681b      	ldr	r3, [r3, #0]
 801866a:	617b      	str	r3, [r7, #20]
 801866c:	697b      	ldr	r3, [r7, #20]
 801866e:	2b00      	cmp	r3, #0
 8018670:	d183      	bne.n	801857a <select_check_waiters+0x1a>
    /* remember the state of select_cb_list to detect changes */
    last_select_cb_ctr = select_cb_ctr;
  }
  SYS_ARCH_UNPROTECT(lev);
#endif
}
 8018672:	bf00      	nop
 8018674:	bf00      	nop
 8018676:	3718      	adds	r7, #24
 8018678:	46bd      	mov	sp, r7
 801867a:	bd80      	pop	{r7, pc}
 801867c:	24024324 	.word	0x24024324

08018680 <lwip_ioctl>:
  return err;
}

int
lwip_ioctl(int s, long cmd, void *argp)
{
 8018680:	b580      	push	{r7, lr}
 8018682:	b08c      	sub	sp, #48	@ 0x30
 8018684:	af00      	add	r7, sp, #0
 8018686:	60f8      	str	r0, [r7, #12]
 8018688:	60b9      	str	r1, [r7, #8]
 801868a:	607a      	str	r2, [r7, #4]
  struct lwip_sock *sock = get_socket(s);
 801868c:	68f8      	ldr	r0, [r7, #12]
 801868e:	f7ff f813 	bl	80176b8 <get_socket>
 8018692:	6278      	str	r0, [r7, #36]	@ 0x24
  u8_t val;
#if LWIP_SO_RCVBUF
  int recv_avail;
#endif /* LWIP_SO_RCVBUF */

  if (!sock) {
 8018694:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018696:	2b00      	cmp	r3, #0
 8018698:	d102      	bne.n	80186a0 <lwip_ioctl+0x20>
    return -1;
 801869a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801869e:	e089      	b.n	80187b4 <lwip_ioctl+0x134>
  }

  switch (cmd) {
 80186a0:	68bb      	ldr	r3, [r7, #8]
 80186a2:	4a46      	ldr	r2, [pc, #280]	@ (80187bc <lwip_ioctl+0x13c>)
 80186a4:	4293      	cmp	r3, r2
 80186a6:	d048      	beq.n	801873a <lwip_ioctl+0xba>
 80186a8:	68bb      	ldr	r3, [r7, #8]
 80186aa:	4a45      	ldr	r2, [pc, #276]	@ (80187c0 <lwip_ioctl+0x140>)
 80186ac:	4293      	cmp	r3, r2
 80186ae:	d176      	bne.n	801879e <lwip_ioctl+0x11e>
#if LWIP_SO_RCVBUF || LWIP_FIONREAD_LINUXMODE
    case FIONREAD:
      if (!argp) {
 80186b0:	687b      	ldr	r3, [r7, #4]
 80186b2:	2b00      	cmp	r3, #0
 80186b4:	d10a      	bne.n	80186cc <lwip_ioctl+0x4c>
        sock_set_errno(sock, EINVAL);
 80186b6:	2316      	movs	r3, #22
 80186b8:	61bb      	str	r3, [r7, #24]
 80186ba:	69bb      	ldr	r3, [r7, #24]
 80186bc:	2b00      	cmp	r3, #0
 80186be:	d002      	beq.n	80186c6 <lwip_ioctl+0x46>
 80186c0:	4a40      	ldr	r2, [pc, #256]	@ (80187c4 <lwip_ioctl+0x144>)
 80186c2:	69bb      	ldr	r3, [r7, #24]
 80186c4:	6013      	str	r3, [r2, #0]
        done_socket(sock);
        return -1;
 80186c6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80186ca:	e073      	b.n	80187b4 <lwip_ioctl+0x134>
      }
#endif /* LWIP_FIONREAD_LINUXMODE */

#if LWIP_SO_RCVBUF
      /* we come here if either LWIP_FIONREAD_LINUXMODE==0 or this is a TCP socket */
      SYS_ARCH_GET(sock->conn->recv_avail, recv_avail);
 80186cc:	f00d fef0 	bl	80264b0 <sys_arch_protect>
 80186d0:	6238      	str	r0, [r7, #32]
 80186d2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80186d4:	681b      	ldr	r3, [r3, #0]
 80186d6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80186d8:	62fb      	str	r3, [r7, #44]	@ 0x2c
 80186da:	6a38      	ldr	r0, [r7, #32]
 80186dc:	f00d fef6 	bl	80264cc <sys_arch_unprotect>
      if (recv_avail < 0) {
 80186e0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80186e2:	2b00      	cmp	r3, #0
 80186e4:	da01      	bge.n	80186ea <lwip_ioctl+0x6a>
        recv_avail = 0;
 80186e6:	2300      	movs	r3, #0
 80186e8:	62fb      	str	r3, [r7, #44]	@ 0x2c
      }

      /* Check if there is data left from the last recv operation. /maq 041215 */
      if (sock->lastdata.netbuf) {
 80186ea:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80186ec:	685b      	ldr	r3, [r3, #4]
 80186ee:	2b00      	cmp	r3, #0
 80186f0:	d016      	beq.n	8018720 <lwip_ioctl+0xa0>
        if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 80186f2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80186f4:	681b      	ldr	r3, [r3, #0]
 80186f6:	781b      	ldrb	r3, [r3, #0]
 80186f8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80186fc:	2b10      	cmp	r3, #16
 80186fe:	d107      	bne.n	8018710 <lwip_ioctl+0x90>
          recv_avail += sock->lastdata.pbuf->tot_len;
 8018700:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018702:	685b      	ldr	r3, [r3, #4]
 8018704:	891b      	ldrh	r3, [r3, #8]
 8018706:	461a      	mov	r2, r3
 8018708:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801870a:	4413      	add	r3, r2
 801870c:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801870e:	e007      	b.n	8018720 <lwip_ioctl+0xa0>
        } else {
          recv_avail += sock->lastdata.netbuf->p->tot_len;
 8018710:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018712:	685b      	ldr	r3, [r3, #4]
 8018714:	681b      	ldr	r3, [r3, #0]
 8018716:	891b      	ldrh	r3, [r3, #8]
 8018718:	461a      	mov	r2, r3
 801871a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801871c:	4413      	add	r3, r2
 801871e:	62fb      	str	r3, [r7, #44]	@ 0x2c
        }
      }
      *((int *)argp) = recv_avail;
 8018720:	687b      	ldr	r3, [r7, #4]
 8018722:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8018724:	601a      	str	r2, [r3, #0]

      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONREAD, %p) = %"U16_F"\n", s, argp, *((u16_t *)argp)));
      sock_set_errno(sock, 0);
 8018726:	2300      	movs	r3, #0
 8018728:	61fb      	str	r3, [r7, #28]
 801872a:	69fb      	ldr	r3, [r7, #28]
 801872c:	2b00      	cmp	r3, #0
 801872e:	d002      	beq.n	8018736 <lwip_ioctl+0xb6>
 8018730:	4a24      	ldr	r2, [pc, #144]	@ (80187c4 <lwip_ioctl+0x144>)
 8018732:	69fb      	ldr	r3, [r7, #28]
 8018734:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return 0;
 8018736:	2300      	movs	r3, #0
 8018738:	e03c      	b.n	80187b4 <lwip_ioctl+0x134>
      break;
#endif /* LWIP_SO_RCVBUF */
#endif /* LWIP_SO_RCVBUF || LWIP_FIONREAD_LINUXMODE */

    case (long)FIONBIO:
      val = 0;
 801873a:	2300      	movs	r3, #0
 801873c:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
      if (argp && *(int *)argp) {
 8018740:	687b      	ldr	r3, [r7, #4]
 8018742:	2b00      	cmp	r3, #0
 8018744:	d006      	beq.n	8018754 <lwip_ioctl+0xd4>
 8018746:	687b      	ldr	r3, [r7, #4]
 8018748:	681b      	ldr	r3, [r3, #0]
 801874a:	2b00      	cmp	r3, #0
 801874c:	d002      	beq.n	8018754 <lwip_ioctl+0xd4>
        val = 1;
 801874e:	2301      	movs	r3, #1
 8018750:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
      }
      netconn_set_nonblocking(sock->conn, val);
 8018754:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8018758:	2b00      	cmp	r3, #0
 801875a:	d00b      	beq.n	8018774 <lwip_ioctl+0xf4>
 801875c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801875e:	681b      	ldr	r3, [r3, #0]
 8018760:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 8018764:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018766:	681b      	ldr	r3, [r3, #0]
 8018768:	f042 0202 	orr.w	r2, r2, #2
 801876c:	b2d2      	uxtb	r2, r2
 801876e:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 8018772:	e00a      	b.n	801878a <lwip_ioctl+0x10a>
 8018774:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018776:	681b      	ldr	r3, [r3, #0]
 8018778:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 801877c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801877e:	681b      	ldr	r3, [r3, #0]
 8018780:	f022 0202 	bic.w	r2, r2, #2
 8018784:	b2d2      	uxtb	r2, r2
 8018786:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONBIO, %d)\n", s, val));
      sock_set_errno(sock, 0);
 801878a:	2300      	movs	r3, #0
 801878c:	617b      	str	r3, [r7, #20]
 801878e:	697b      	ldr	r3, [r7, #20]
 8018790:	2b00      	cmp	r3, #0
 8018792:	d002      	beq.n	801879a <lwip_ioctl+0x11a>
 8018794:	4a0b      	ldr	r2, [pc, #44]	@ (80187c4 <lwip_ioctl+0x144>)
 8018796:	697b      	ldr	r3, [r7, #20]
 8018798:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return 0;
 801879a:	2300      	movs	r3, #0
 801879c:	e00a      	b.n	80187b4 <lwip_ioctl+0x134>

    default:
      break;
 801879e:	bf00      	nop
  } /* switch (cmd) */
  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, UNIMPL: 0x%lx, %p)\n", s, cmd, argp));
  sock_set_errno(sock, ENOSYS); /* not yet implemented */
 80187a0:	2326      	movs	r3, #38	@ 0x26
 80187a2:	613b      	str	r3, [r7, #16]
 80187a4:	693b      	ldr	r3, [r7, #16]
 80187a6:	2b00      	cmp	r3, #0
 80187a8:	d002      	beq.n	80187b0 <lwip_ioctl+0x130>
 80187aa:	4a06      	ldr	r2, [pc, #24]	@ (80187c4 <lwip_ioctl+0x144>)
 80187ac:	693b      	ldr	r3, [r7, #16]
 80187ae:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return -1;
 80187b0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 80187b4:	4618      	mov	r0, r3
 80187b6:	3730      	adds	r7, #48	@ 0x30
 80187b8:	46bd      	mov	sp, r7
 80187ba:	bd80      	pop	{r7, pc}
 80187bc:	8004667e 	.word	0x8004667e
 80187c0:	4004667f 	.word	0x4004667f
 80187c4:	2402b180 	.word	0x2402b180

080187c8 <tcpip_timeouts_mbox_fetch>:
 * @param mbox the mbox to fetch the message from
 * @param msg the place to store the message
 */
static void
tcpip_timeouts_mbox_fetch(sys_mbox_t *mbox, void **msg)
{
 80187c8:	b580      	push	{r7, lr}
 80187ca:	b084      	sub	sp, #16
 80187cc:	af00      	add	r7, sp, #0
 80187ce:	6078      	str	r0, [r7, #4]
 80187d0:	6039      	str	r1, [r7, #0]
  u32_t sleeptime, res;

again:
  LWIP_ASSERT_CORE_LOCKED();
 80187d2:	f7f7 feb7 	bl	8010544 <sys_check_core_locking>

  sleeptime = sys_timeouts_sleeptime();
 80187d6:	f008 fb41 	bl	8020e5c <sys_timeouts_sleeptime>
 80187da:	60f8      	str	r0, [r7, #12]
  if (sleeptime == SYS_TIMEOUTS_SLEEPTIME_INFINITE) {
 80187dc:	68fb      	ldr	r3, [r7, #12]
 80187de:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80187e2:	d109      	bne.n	80187f8 <tcpip_timeouts_mbox_fetch+0x30>
    UNLOCK_TCPIP_CORE();
 80187e4:	f7f7 fea0 	bl	8010528 <sys_unlock_tcpip_core>
    sys_arch_mbox_fetch(mbox, msg, 0);
 80187e8:	2200      	movs	r2, #0
 80187ea:	6839      	ldr	r1, [r7, #0]
 80187ec:	6878      	ldr	r0, [r7, #4]
 80187ee:	f00d fd0d 	bl	802620c <sys_arch_mbox_fetch>
    LOCK_TCPIP_CORE();
 80187f2:	f7f7 fe89 	bl	8010508 <sys_lock_tcpip_core>
    return;
 80187f6:	e016      	b.n	8018826 <tcpip_timeouts_mbox_fetch+0x5e>
  } else if (sleeptime == 0) {
 80187f8:	68fb      	ldr	r3, [r7, #12]
 80187fa:	2b00      	cmp	r3, #0
 80187fc:	d102      	bne.n	8018804 <tcpip_timeouts_mbox_fetch+0x3c>
    sys_check_timeouts();
 80187fe:	f008 faf1 	bl	8020de4 <sys_check_timeouts>
    /* We try again to fetch a message from the mbox. */
    goto again;
 8018802:	e7e6      	b.n	80187d2 <tcpip_timeouts_mbox_fetch+0xa>
  }

  UNLOCK_TCPIP_CORE();
 8018804:	f7f7 fe90 	bl	8010528 <sys_unlock_tcpip_core>
  res = sys_arch_mbox_fetch(mbox, msg, sleeptime);
 8018808:	68fa      	ldr	r2, [r7, #12]
 801880a:	6839      	ldr	r1, [r7, #0]
 801880c:	6878      	ldr	r0, [r7, #4]
 801880e:	f00d fcfd 	bl	802620c <sys_arch_mbox_fetch>
 8018812:	60b8      	str	r0, [r7, #8]
  LOCK_TCPIP_CORE();
 8018814:	f7f7 fe78 	bl	8010508 <sys_lock_tcpip_core>
  if (res == SYS_ARCH_TIMEOUT) {
 8018818:	68bb      	ldr	r3, [r7, #8]
 801881a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801881e:	d102      	bne.n	8018826 <tcpip_timeouts_mbox_fetch+0x5e>
    /* If a SYS_ARCH_TIMEOUT value is returned, a timeout occurred
       before a message could be fetched. */
    sys_check_timeouts();
 8018820:	f008 fae0 	bl	8020de4 <sys_check_timeouts>
    /* We try again to fetch a message from the mbox. */
    goto again;
 8018824:	e7d5      	b.n	80187d2 <tcpip_timeouts_mbox_fetch+0xa>
  }
}
 8018826:	3710      	adds	r7, #16
 8018828:	46bd      	mov	sp, r7
 801882a:	bd80      	pop	{r7, pc}

0801882c <tcpip_thread>:
 *
 * @param arg unused argument
 */
static void
tcpip_thread(void *arg)
{
 801882c:	b580      	push	{r7, lr}
 801882e:	b084      	sub	sp, #16
 8018830:	af00      	add	r7, sp, #0
 8018832:	6078      	str	r0, [r7, #4]
  struct tcpip_msg *msg;
  LWIP_UNUSED_ARG(arg);

  LWIP_MARK_TCPIP_THREAD();
 8018834:	f7f7 fec2 	bl	80105bc <sys_mark_tcpip_thread>

  LOCK_TCPIP_CORE();
 8018838:	f7f7 fe66 	bl	8010508 <sys_lock_tcpip_core>
  if (tcpip_init_done != NULL) {
 801883c:	4b0f      	ldr	r3, [pc, #60]	@ (801887c <tcpip_thread+0x50>)
 801883e:	681b      	ldr	r3, [r3, #0]
 8018840:	2b00      	cmp	r3, #0
 8018842:	d005      	beq.n	8018850 <tcpip_thread+0x24>
    tcpip_init_done(tcpip_init_done_arg);
 8018844:	4b0d      	ldr	r3, [pc, #52]	@ (801887c <tcpip_thread+0x50>)
 8018846:	681b      	ldr	r3, [r3, #0]
 8018848:	4a0d      	ldr	r2, [pc, #52]	@ (8018880 <tcpip_thread+0x54>)
 801884a:	6812      	ldr	r2, [r2, #0]
 801884c:	4610      	mov	r0, r2
 801884e:	4798      	blx	r3
  }

  while (1) {                          /* MAIN Loop */
    LWIP_TCPIP_THREAD_ALIVE();
    /* wait for a message, timeouts are processed while waiting */
    TCPIP_MBOX_FETCH(&tcpip_mbox, (void **)&msg);
 8018850:	f107 030c 	add.w	r3, r7, #12
 8018854:	4619      	mov	r1, r3
 8018856:	480b      	ldr	r0, [pc, #44]	@ (8018884 <tcpip_thread+0x58>)
 8018858:	f7ff ffb6 	bl	80187c8 <tcpip_timeouts_mbox_fetch>
    if (msg == NULL) {
 801885c:	68fb      	ldr	r3, [r7, #12]
 801885e:	2b00      	cmp	r3, #0
 8018860:	d106      	bne.n	8018870 <tcpip_thread+0x44>
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: NULL\n"));
      LWIP_ASSERT("tcpip_thread: invalid message", 0);
 8018862:	4b09      	ldr	r3, [pc, #36]	@ (8018888 <tcpip_thread+0x5c>)
 8018864:	2291      	movs	r2, #145	@ 0x91
 8018866:	4909      	ldr	r1, [pc, #36]	@ (801888c <tcpip_thread+0x60>)
 8018868:	4809      	ldr	r0, [pc, #36]	@ (8018890 <tcpip_thread+0x64>)
 801886a:	f011 f8b7 	bl	80299dc <iprintf>
      continue;
 801886e:	e003      	b.n	8018878 <tcpip_thread+0x4c>
    }
    tcpip_thread_handle_msg(msg);
 8018870:	68fb      	ldr	r3, [r7, #12]
 8018872:	4618      	mov	r0, r3
 8018874:	f000 f80e 	bl	8018894 <tcpip_thread_handle_msg>
    TCPIP_MBOX_FETCH(&tcpip_mbox, (void **)&msg);
 8018878:	e7ea      	b.n	8018850 <tcpip_thread+0x24>
 801887a:	bf00      	nop
 801887c:	24024328 	.word	0x24024328
 8018880:	2402432c 	.word	0x2402432c
 8018884:	24024330 	.word	0x24024330
 8018888:	0802d9e4 	.word	0x0802d9e4
 801888c:	0802da14 	.word	0x0802da14
 8018890:	0802da34 	.word	0x0802da34

08018894 <tcpip_thread_handle_msg>:
/* Handle a single tcpip_msg
 * This is in its own function for access by tests only.
 */
static void
tcpip_thread_handle_msg(struct tcpip_msg *msg)
{
 8018894:	b580      	push	{r7, lr}
 8018896:	b082      	sub	sp, #8
 8018898:	af00      	add	r7, sp, #0
 801889a:	6078      	str	r0, [r7, #4]
  switch (msg->type) {
 801889c:	687b      	ldr	r3, [r7, #4]
 801889e:	781b      	ldrb	r3, [r3, #0]
 80188a0:	2b02      	cmp	r3, #2
 80188a2:	d026      	beq.n	80188f2 <tcpip_thread_handle_msg+0x5e>
 80188a4:	2b02      	cmp	r3, #2
 80188a6:	dc2b      	bgt.n	8018900 <tcpip_thread_handle_msg+0x6c>
 80188a8:	2b00      	cmp	r3, #0
 80188aa:	d002      	beq.n	80188b2 <tcpip_thread_handle_msg+0x1e>
 80188ac:	2b01      	cmp	r3, #1
 80188ae:	d015      	beq.n	80188dc <tcpip_thread_handle_msg+0x48>
 80188b0:	e026      	b.n	8018900 <tcpip_thread_handle_msg+0x6c>
#endif /* !LWIP_TCPIP_CORE_LOCKING */

#if !LWIP_TCPIP_CORE_LOCKING_INPUT
    case TCPIP_MSG_INPKT:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: PACKET %p\n", (void *)msg));
      if (msg->msg.inp.input_fn(msg->msg.inp.p, msg->msg.inp.netif) != ERR_OK) {
 80188b2:	687b      	ldr	r3, [r7, #4]
 80188b4:	68db      	ldr	r3, [r3, #12]
 80188b6:	687a      	ldr	r2, [r7, #4]
 80188b8:	6850      	ldr	r0, [r2, #4]
 80188ba:	687a      	ldr	r2, [r7, #4]
 80188bc:	6892      	ldr	r2, [r2, #8]
 80188be:	4611      	mov	r1, r2
 80188c0:	4798      	blx	r3
 80188c2:	4603      	mov	r3, r0
 80188c4:	2b00      	cmp	r3, #0
 80188c6:	d004      	beq.n	80188d2 <tcpip_thread_handle_msg+0x3e>
        pbuf_free(msg->msg.inp.p);
 80188c8:	687b      	ldr	r3, [r7, #4]
 80188ca:	685b      	ldr	r3, [r3, #4]
 80188cc:	4618      	mov	r0, r3
 80188ce:	f001 fe0d 	bl	801a4ec <pbuf_free>
      }
      memp_free(MEMP_TCPIP_MSG_INPKT, msg);
 80188d2:	6879      	ldr	r1, [r7, #4]
 80188d4:	2009      	movs	r0, #9
 80188d6:	f000 ff1b 	bl	8019710 <memp_free>
      break;
 80188da:	e018      	b.n	801890e <tcpip_thread_handle_msg+0x7a>
      break;
#endif /* LWIP_TCPIP_TIMEOUT && LWIP_TIMERS */

    case TCPIP_MSG_CALLBACK:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK %p\n", (void *)msg));
      msg->msg.cb.function(msg->msg.cb.ctx);
 80188dc:	687b      	ldr	r3, [r7, #4]
 80188de:	685b      	ldr	r3, [r3, #4]
 80188e0:	687a      	ldr	r2, [r7, #4]
 80188e2:	6892      	ldr	r2, [r2, #8]
 80188e4:	4610      	mov	r0, r2
 80188e6:	4798      	blx	r3
      memp_free(MEMP_TCPIP_MSG_API, msg);
 80188e8:	6879      	ldr	r1, [r7, #4]
 80188ea:	2008      	movs	r0, #8
 80188ec:	f000 ff10 	bl	8019710 <memp_free>
      break;
 80188f0:	e00d      	b.n	801890e <tcpip_thread_handle_msg+0x7a>

    case TCPIP_MSG_CALLBACK_STATIC:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK_STATIC %p\n", (void *)msg));
      msg->msg.cb.function(msg->msg.cb.ctx);
 80188f2:	687b      	ldr	r3, [r7, #4]
 80188f4:	685b      	ldr	r3, [r3, #4]
 80188f6:	687a      	ldr	r2, [r7, #4]
 80188f8:	6892      	ldr	r2, [r2, #8]
 80188fa:	4610      	mov	r0, r2
 80188fc:	4798      	blx	r3
      break;
 80188fe:	e006      	b.n	801890e <tcpip_thread_handle_msg+0x7a>

    default:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: %d\n", msg->type));
      LWIP_ASSERT("tcpip_thread: invalid message", 0);
 8018900:	4b05      	ldr	r3, [pc, #20]	@ (8018918 <tcpip_thread_handle_msg+0x84>)
 8018902:	22cf      	movs	r2, #207	@ 0xcf
 8018904:	4905      	ldr	r1, [pc, #20]	@ (801891c <tcpip_thread_handle_msg+0x88>)
 8018906:	4806      	ldr	r0, [pc, #24]	@ (8018920 <tcpip_thread_handle_msg+0x8c>)
 8018908:	f011 f868 	bl	80299dc <iprintf>
      break;
 801890c:	bf00      	nop
  }
}
 801890e:	bf00      	nop
 8018910:	3708      	adds	r7, #8
 8018912:	46bd      	mov	sp, r7
 8018914:	bd80      	pop	{r7, pc}
 8018916:	bf00      	nop
 8018918:	0802d9e4 	.word	0x0802d9e4
 801891c:	0802da14 	.word	0x0802da14
 8018920:	0802da34 	.word	0x0802da34

08018924 <tcpip_inpkt>:
 * @param inp the network interface on which the packet was received
 * @param input_fn input function to call
 */
err_t
tcpip_inpkt(struct pbuf *p, struct netif *inp, netif_input_fn input_fn)
{
 8018924:	b580      	push	{r7, lr}
 8018926:	b086      	sub	sp, #24
 8018928:	af00      	add	r7, sp, #0
 801892a:	60f8      	str	r0, [r7, #12]
 801892c:	60b9      	str	r1, [r7, #8]
 801892e:	607a      	str	r2, [r7, #4]
  UNLOCK_TCPIP_CORE();
  return ret;
#else /* LWIP_TCPIP_CORE_LOCKING_INPUT */
  struct tcpip_msg *msg;

  LWIP_ASSERT("Invalid mbox", sys_mbox_valid_val(tcpip_mbox));
 8018930:	481a      	ldr	r0, [pc, #104]	@ (801899c <tcpip_inpkt+0x78>)
 8018932:	f00d fcb3 	bl	802629c <sys_mbox_valid>
 8018936:	4603      	mov	r3, r0
 8018938:	2b00      	cmp	r3, #0
 801893a:	d105      	bne.n	8018948 <tcpip_inpkt+0x24>
 801893c:	4b18      	ldr	r3, [pc, #96]	@ (80189a0 <tcpip_inpkt+0x7c>)
 801893e:	22fc      	movs	r2, #252	@ 0xfc
 8018940:	4918      	ldr	r1, [pc, #96]	@ (80189a4 <tcpip_inpkt+0x80>)
 8018942:	4819      	ldr	r0, [pc, #100]	@ (80189a8 <tcpip_inpkt+0x84>)
 8018944:	f011 f84a 	bl	80299dc <iprintf>

  msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_INPKT);
 8018948:	2009      	movs	r0, #9
 801894a:	f000 fe6b 	bl	8019624 <memp_malloc>
 801894e:	6178      	str	r0, [r7, #20]
  if (msg == NULL) {
 8018950:	697b      	ldr	r3, [r7, #20]
 8018952:	2b00      	cmp	r3, #0
 8018954:	d102      	bne.n	801895c <tcpip_inpkt+0x38>
    return ERR_MEM;
 8018956:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801895a:	e01a      	b.n	8018992 <tcpip_inpkt+0x6e>
  }

  msg->type = TCPIP_MSG_INPKT;
 801895c:	697b      	ldr	r3, [r7, #20]
 801895e:	2200      	movs	r2, #0
 8018960:	701a      	strb	r2, [r3, #0]
  msg->msg.inp.p = p;
 8018962:	697b      	ldr	r3, [r7, #20]
 8018964:	68fa      	ldr	r2, [r7, #12]
 8018966:	605a      	str	r2, [r3, #4]
  msg->msg.inp.netif = inp;
 8018968:	697b      	ldr	r3, [r7, #20]
 801896a:	68ba      	ldr	r2, [r7, #8]
 801896c:	609a      	str	r2, [r3, #8]
  msg->msg.inp.input_fn = input_fn;
 801896e:	697b      	ldr	r3, [r7, #20]
 8018970:	687a      	ldr	r2, [r7, #4]
 8018972:	60da      	str	r2, [r3, #12]
  if (sys_mbox_trypost(&tcpip_mbox, msg) != ERR_OK) {
 8018974:	6979      	ldr	r1, [r7, #20]
 8018976:	4809      	ldr	r0, [pc, #36]	@ (801899c <tcpip_inpkt+0x78>)
 8018978:	f00d fc2e 	bl	80261d8 <sys_mbox_trypost>
 801897c:	4603      	mov	r3, r0
 801897e:	2b00      	cmp	r3, #0
 8018980:	d006      	beq.n	8018990 <tcpip_inpkt+0x6c>
    memp_free(MEMP_TCPIP_MSG_INPKT, msg);
 8018982:	6979      	ldr	r1, [r7, #20]
 8018984:	2009      	movs	r0, #9
 8018986:	f000 fec3 	bl	8019710 <memp_free>
    return ERR_MEM;
 801898a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801898e:	e000      	b.n	8018992 <tcpip_inpkt+0x6e>
  }
  return ERR_OK;
 8018990:	2300      	movs	r3, #0
#endif /* LWIP_TCPIP_CORE_LOCKING_INPUT */
}
 8018992:	4618      	mov	r0, r3
 8018994:	3718      	adds	r7, #24
 8018996:	46bd      	mov	sp, r7
 8018998:	bd80      	pop	{r7, pc}
 801899a:	bf00      	nop
 801899c:	24024330 	.word	0x24024330
 80189a0:	0802d9e4 	.word	0x0802d9e4
 80189a4:	0802da5c 	.word	0x0802da5c
 80189a8:	0802da34 	.word	0x0802da34

080189ac <tcpip_input>:
 *          NETIF_FLAG_ETHERNET flags)
 * @param inp the network interface on which the packet was received
 */
err_t
tcpip_input(struct pbuf *p, struct netif *inp)
{
 80189ac:	b580      	push	{r7, lr}
 80189ae:	b082      	sub	sp, #8
 80189b0:	af00      	add	r7, sp, #0
 80189b2:	6078      	str	r0, [r7, #4]
 80189b4:	6039      	str	r1, [r7, #0]
#if LWIP_ETHERNET
  if (inp->flags & (NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET)) {
 80189b6:	683b      	ldr	r3, [r7, #0]
 80189b8:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80189bc:	f003 0318 	and.w	r3, r3, #24
 80189c0:	2b00      	cmp	r3, #0
 80189c2:	d006      	beq.n	80189d2 <tcpip_input+0x26>
    return tcpip_inpkt(p, inp, ethernet_input);
 80189c4:	4a08      	ldr	r2, [pc, #32]	@ (80189e8 <tcpip_input+0x3c>)
 80189c6:	6839      	ldr	r1, [r7, #0]
 80189c8:	6878      	ldr	r0, [r7, #4]
 80189ca:	f7ff ffab 	bl	8018924 <tcpip_inpkt>
 80189ce:	4603      	mov	r3, r0
 80189d0:	e005      	b.n	80189de <tcpip_input+0x32>
  } else
#endif /* LWIP_ETHERNET */
    return tcpip_inpkt(p, inp, ip_input);
 80189d2:	4a06      	ldr	r2, [pc, #24]	@ (80189ec <tcpip_input+0x40>)
 80189d4:	6839      	ldr	r1, [r7, #0]
 80189d6:	6878      	ldr	r0, [r7, #4]
 80189d8:	f7ff ffa4 	bl	8018924 <tcpip_inpkt>
 80189dc:	4603      	mov	r3, r0
}
 80189de:	4618      	mov	r0, r3
 80189e0:	3708      	adds	r7, #8
 80189e2:	46bd      	mov	sp, r7
 80189e4:	bd80      	pop	{r7, pc}
 80189e6:	bf00      	nop
 80189e8:	08025fcd 	.word	0x08025fcd
 80189ec:	08024af5 	.word	0x08024af5

080189f0 <tcpip_try_callback>:
 *
 * @see tcpip_callback
 */
err_t
tcpip_try_callback(tcpip_callback_fn function, void *ctx)
{
 80189f0:	b580      	push	{r7, lr}
 80189f2:	b084      	sub	sp, #16
 80189f4:	af00      	add	r7, sp, #0
 80189f6:	6078      	str	r0, [r7, #4]
 80189f8:	6039      	str	r1, [r7, #0]
  struct tcpip_msg *msg;

  LWIP_ASSERT("Invalid mbox", sys_mbox_valid_val(tcpip_mbox));
 80189fa:	4819      	ldr	r0, [pc, #100]	@ (8018a60 <tcpip_try_callback+0x70>)
 80189fc:	f00d fc4e 	bl	802629c <sys_mbox_valid>
 8018a00:	4603      	mov	r3, r0
 8018a02:	2b00      	cmp	r3, #0
 8018a04:	d106      	bne.n	8018a14 <tcpip_try_callback+0x24>
 8018a06:	4b17      	ldr	r3, [pc, #92]	@ (8018a64 <tcpip_try_callback+0x74>)
 8018a08:	f240 125d 	movw	r2, #349	@ 0x15d
 8018a0c:	4916      	ldr	r1, [pc, #88]	@ (8018a68 <tcpip_try_callback+0x78>)
 8018a0e:	4817      	ldr	r0, [pc, #92]	@ (8018a6c <tcpip_try_callback+0x7c>)
 8018a10:	f010 ffe4 	bl	80299dc <iprintf>

  msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_API);
 8018a14:	2008      	movs	r0, #8
 8018a16:	f000 fe05 	bl	8019624 <memp_malloc>
 8018a1a:	60f8      	str	r0, [r7, #12]
  if (msg == NULL) {
 8018a1c:	68fb      	ldr	r3, [r7, #12]
 8018a1e:	2b00      	cmp	r3, #0
 8018a20:	d102      	bne.n	8018a28 <tcpip_try_callback+0x38>
    return ERR_MEM;
 8018a22:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018a26:	e017      	b.n	8018a58 <tcpip_try_callback+0x68>
  }

  msg->type = TCPIP_MSG_CALLBACK;
 8018a28:	68fb      	ldr	r3, [r7, #12]
 8018a2a:	2201      	movs	r2, #1
 8018a2c:	701a      	strb	r2, [r3, #0]
  msg->msg.cb.function = function;
 8018a2e:	68fb      	ldr	r3, [r7, #12]
 8018a30:	687a      	ldr	r2, [r7, #4]
 8018a32:	605a      	str	r2, [r3, #4]
  msg->msg.cb.ctx = ctx;
 8018a34:	68fb      	ldr	r3, [r7, #12]
 8018a36:	683a      	ldr	r2, [r7, #0]
 8018a38:	609a      	str	r2, [r3, #8]

  if (sys_mbox_trypost(&tcpip_mbox, msg) != ERR_OK) {
 8018a3a:	68f9      	ldr	r1, [r7, #12]
 8018a3c:	4808      	ldr	r0, [pc, #32]	@ (8018a60 <tcpip_try_callback+0x70>)
 8018a3e:	f00d fbcb 	bl	80261d8 <sys_mbox_trypost>
 8018a42:	4603      	mov	r3, r0
 8018a44:	2b00      	cmp	r3, #0
 8018a46:	d006      	beq.n	8018a56 <tcpip_try_callback+0x66>
    memp_free(MEMP_TCPIP_MSG_API, msg);
 8018a48:	68f9      	ldr	r1, [r7, #12]
 8018a4a:	2008      	movs	r0, #8
 8018a4c:	f000 fe60 	bl	8019710 <memp_free>
    return ERR_MEM;
 8018a50:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018a54:	e000      	b.n	8018a58 <tcpip_try_callback+0x68>
  }
  return ERR_OK;
 8018a56:	2300      	movs	r3, #0
}
 8018a58:	4618      	mov	r0, r3
 8018a5a:	3710      	adds	r7, #16
 8018a5c:	46bd      	mov	sp, r7
 8018a5e:	bd80      	pop	{r7, pc}
 8018a60:	24024330 	.word	0x24024330
 8018a64:	0802d9e4 	.word	0x0802d9e4
 8018a68:	0802da5c 	.word	0x0802da5c
 8018a6c:	0802da34 	.word	0x0802da34

08018a70 <tcpip_send_msg_wait_sem>:
 * @param sem semaphore to wait on
 * @return ERR_OK if the function was called, another err_t if not
 */
err_t
tcpip_send_msg_wait_sem(tcpip_callback_fn fn, void *apimsg, sys_sem_t *sem)
{
 8018a70:	b580      	push	{r7, lr}
 8018a72:	b084      	sub	sp, #16
 8018a74:	af00      	add	r7, sp, #0
 8018a76:	60f8      	str	r0, [r7, #12]
 8018a78:	60b9      	str	r1, [r7, #8]
 8018a7a:	607a      	str	r2, [r7, #4]
#if LWIP_TCPIP_CORE_LOCKING
  LWIP_UNUSED_ARG(sem);
  LOCK_TCPIP_CORE();
 8018a7c:	f7f7 fd44 	bl	8010508 <sys_lock_tcpip_core>
  fn(apimsg);
 8018a80:	68fb      	ldr	r3, [r7, #12]
 8018a82:	68b8      	ldr	r0, [r7, #8]
 8018a84:	4798      	blx	r3
  UNLOCK_TCPIP_CORE();
 8018a86:	f7f7 fd4f 	bl	8010528 <sys_unlock_tcpip_core>
  return ERR_OK;
 8018a8a:	2300      	movs	r3, #0
  sys_mbox_post(&tcpip_mbox, &TCPIP_MSG_VAR_REF(msg));
  sys_arch_sem_wait(sem, 0);
  TCPIP_MSG_VAR_FREE(msg);
  return ERR_OK;
#endif /* LWIP_TCPIP_CORE_LOCKING */
}
 8018a8c:	4618      	mov	r0, r3
 8018a8e:	3710      	adds	r7, #16
 8018a90:	46bd      	mov	sp, r7
 8018a92:	bd80      	pop	{r7, pc}

08018a94 <tcpip_init>:
 * @param initfunc a function to call when tcpip_thread is running and finished initializing
 * @param arg argument to pass to initfunc
 */
void
tcpip_init(tcpip_init_done_fn initfunc, void *arg)
{
 8018a94:	b580      	push	{r7, lr}
 8018a96:	b084      	sub	sp, #16
 8018a98:	af02      	add	r7, sp, #8
 8018a9a:	6078      	str	r0, [r7, #4]
 8018a9c:	6039      	str	r1, [r7, #0]
  lwip_init();
 8018a9e:	f000 f92d 	bl	8018cfc <lwip_init>

  tcpip_init_done = initfunc;
 8018aa2:	4a17      	ldr	r2, [pc, #92]	@ (8018b00 <tcpip_init+0x6c>)
 8018aa4:	687b      	ldr	r3, [r7, #4]
 8018aa6:	6013      	str	r3, [r2, #0]
  tcpip_init_done_arg = arg;
 8018aa8:	4a16      	ldr	r2, [pc, #88]	@ (8018b04 <tcpip_init+0x70>)
 8018aaa:	683b      	ldr	r3, [r7, #0]
 8018aac:	6013      	str	r3, [r2, #0]
  if (sys_mbox_new(&tcpip_mbox, TCPIP_MBOX_SIZE) != ERR_OK) {
 8018aae:	2106      	movs	r1, #6
 8018ab0:	4815      	ldr	r0, [pc, #84]	@ (8018b08 <tcpip_init+0x74>)
 8018ab2:	f00d fb65 	bl	8026180 <sys_mbox_new>
 8018ab6:	4603      	mov	r3, r0
 8018ab8:	2b00      	cmp	r3, #0
 8018aba:	d006      	beq.n	8018aca <tcpip_init+0x36>
    LWIP_ASSERT("failed to create tcpip_thread mbox", 0);
 8018abc:	4b13      	ldr	r3, [pc, #76]	@ (8018b0c <tcpip_init+0x78>)
 8018abe:	f240 2261 	movw	r2, #609	@ 0x261
 8018ac2:	4913      	ldr	r1, [pc, #76]	@ (8018b10 <tcpip_init+0x7c>)
 8018ac4:	4813      	ldr	r0, [pc, #76]	@ (8018b14 <tcpip_init+0x80>)
 8018ac6:	f010 ff89 	bl	80299dc <iprintf>
  }
#if LWIP_TCPIP_CORE_LOCKING
  if (sys_mutex_new(&lock_tcpip_core) != ERR_OK) {
 8018aca:	4813      	ldr	r0, [pc, #76]	@ (8018b18 <tcpip_init+0x84>)
 8018acc:	f00d fc9e 	bl	802640c <sys_mutex_new>
 8018ad0:	4603      	mov	r3, r0
 8018ad2:	2b00      	cmp	r3, #0
 8018ad4:	d006      	beq.n	8018ae4 <tcpip_init+0x50>
    LWIP_ASSERT("failed to create lock_tcpip_core", 0);
 8018ad6:	4b0d      	ldr	r3, [pc, #52]	@ (8018b0c <tcpip_init+0x78>)
 8018ad8:	f240 2265 	movw	r2, #613	@ 0x265
 8018adc:	490f      	ldr	r1, [pc, #60]	@ (8018b1c <tcpip_init+0x88>)
 8018ade:	480d      	ldr	r0, [pc, #52]	@ (8018b14 <tcpip_init+0x80>)
 8018ae0:	f010 ff7c 	bl	80299dc <iprintf>
  }
#endif /* LWIP_TCPIP_CORE_LOCKING */

  sys_thread_new(TCPIP_THREAD_NAME, tcpip_thread, NULL, TCPIP_THREAD_STACKSIZE, TCPIP_THREAD_PRIO);
 8018ae4:	2330      	movs	r3, #48	@ 0x30
 8018ae6:	9300      	str	r3, [sp, #0]
 8018ae8:	f44f 5380 	mov.w	r3, #4096	@ 0x1000
 8018aec:	2200      	movs	r2, #0
 8018aee:	490c      	ldr	r1, [pc, #48]	@ (8018b20 <tcpip_init+0x8c>)
 8018af0:	480c      	ldr	r0, [pc, #48]	@ (8018b24 <tcpip_init+0x90>)
 8018af2:	f00d fcbd 	bl	8026470 <sys_thread_new>
}
 8018af6:	bf00      	nop
 8018af8:	3708      	adds	r7, #8
 8018afa:	46bd      	mov	sp, r7
 8018afc:	bd80      	pop	{r7, pc}
 8018afe:	bf00      	nop
 8018b00:	24024328 	.word	0x24024328
 8018b04:	2402432c 	.word	0x2402432c
 8018b08:	24024330 	.word	0x24024330
 8018b0c:	0802d9e4 	.word	0x0802d9e4
 8018b10:	0802da6c 	.word	0x0802da6c
 8018b14:	0802da34 	.word	0x0802da34
 8018b18:	24024334 	.word	0x24024334
 8018b1c:	0802da90 	.word	0x0802da90
 8018b20:	0801882d 	.word	0x0801882d
 8018b24:	0802dab4 	.word	0x0802dab4

08018b28 <lwip_htons>:
 * @param n u16_t in host byte order
 * @return n in network byte order
 */
u16_t
lwip_htons(u16_t n)
{
 8018b28:	b480      	push	{r7}
 8018b2a:	b083      	sub	sp, #12
 8018b2c:	af00      	add	r7, sp, #0
 8018b2e:	4603      	mov	r3, r0
 8018b30:	80fb      	strh	r3, [r7, #6]
  return PP_HTONS(n);
 8018b32:	88fb      	ldrh	r3, [r7, #6]
 8018b34:	021b      	lsls	r3, r3, #8
 8018b36:	b21a      	sxth	r2, r3
 8018b38:	88fb      	ldrh	r3, [r7, #6]
 8018b3a:	0a1b      	lsrs	r3, r3, #8
 8018b3c:	b29b      	uxth	r3, r3
 8018b3e:	b21b      	sxth	r3, r3
 8018b40:	4313      	orrs	r3, r2
 8018b42:	b21b      	sxth	r3, r3
 8018b44:	b29b      	uxth	r3, r3
}
 8018b46:	4618      	mov	r0, r3
 8018b48:	370c      	adds	r7, #12
 8018b4a:	46bd      	mov	sp, r7
 8018b4c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8018b50:	4770      	bx	lr

08018b52 <lwip_htonl>:
 * @param n u32_t in host byte order
 * @return n in network byte order
 */
u32_t
lwip_htonl(u32_t n)
{
 8018b52:	b480      	push	{r7}
 8018b54:	b083      	sub	sp, #12
 8018b56:	af00      	add	r7, sp, #0
 8018b58:	6078      	str	r0, [r7, #4]
  return PP_HTONL(n);
 8018b5a:	687b      	ldr	r3, [r7, #4]
 8018b5c:	061a      	lsls	r2, r3, #24
 8018b5e:	687b      	ldr	r3, [r7, #4]
 8018b60:	021b      	lsls	r3, r3, #8
 8018b62:	f403 037f 	and.w	r3, r3, #16711680	@ 0xff0000
 8018b66:	431a      	orrs	r2, r3
 8018b68:	687b      	ldr	r3, [r7, #4]
 8018b6a:	0a1b      	lsrs	r3, r3, #8
 8018b6c:	f403 437f 	and.w	r3, r3, #65280	@ 0xff00
 8018b70:	431a      	orrs	r2, r3
 8018b72:	687b      	ldr	r3, [r7, #4]
 8018b74:	0e1b      	lsrs	r3, r3, #24
 8018b76:	4313      	orrs	r3, r2
}
 8018b78:	4618      	mov	r0, r3
 8018b7a:	370c      	adds	r7, #12
 8018b7c:	46bd      	mov	sp, r7
 8018b7e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8018b82:	4770      	bx	lr

08018b84 <lwip_standard_chksum>:
 * @param len length of data to be summed
 * @return host order (!) lwip checksum (non-inverted Internet sum)
 */
u16_t
lwip_standard_chksum(const void *dataptr, int len)
{
 8018b84:	b480      	push	{r7}
 8018b86:	b089      	sub	sp, #36	@ 0x24
 8018b88:	af00      	add	r7, sp, #0
 8018b8a:	6078      	str	r0, [r7, #4]
 8018b8c:	6039      	str	r1, [r7, #0]
  const u8_t *pb = (const u8_t *)dataptr;
 8018b8e:	687b      	ldr	r3, [r7, #4]
 8018b90:	61fb      	str	r3, [r7, #28]
  const u16_t *ps;
  u16_t t = 0;
 8018b92:	2300      	movs	r3, #0
 8018b94:	81fb      	strh	r3, [r7, #14]
  u32_t sum = 0;
 8018b96:	2300      	movs	r3, #0
 8018b98:	617b      	str	r3, [r7, #20]
  int odd = ((mem_ptr_t)pb & 1);
 8018b9a:	69fb      	ldr	r3, [r7, #28]
 8018b9c:	f003 0301 	and.w	r3, r3, #1
 8018ba0:	613b      	str	r3, [r7, #16]

  /* Get aligned to u16_t */
  if (odd && len > 0) {
 8018ba2:	693b      	ldr	r3, [r7, #16]
 8018ba4:	2b00      	cmp	r3, #0
 8018ba6:	d00d      	beq.n	8018bc4 <lwip_standard_chksum+0x40>
 8018ba8:	683b      	ldr	r3, [r7, #0]
 8018baa:	2b00      	cmp	r3, #0
 8018bac:	dd0a      	ble.n	8018bc4 <lwip_standard_chksum+0x40>
    ((u8_t *)&t)[1] = *pb++;
 8018bae:	69fa      	ldr	r2, [r7, #28]
 8018bb0:	1c53      	adds	r3, r2, #1
 8018bb2:	61fb      	str	r3, [r7, #28]
 8018bb4:	f107 030e 	add.w	r3, r7, #14
 8018bb8:	3301      	adds	r3, #1
 8018bba:	7812      	ldrb	r2, [r2, #0]
 8018bbc:	701a      	strb	r2, [r3, #0]
    len--;
 8018bbe:	683b      	ldr	r3, [r7, #0]
 8018bc0:	3b01      	subs	r3, #1
 8018bc2:	603b      	str	r3, [r7, #0]
  }

  /* Add the bulk of the data */
  ps = (const u16_t *)(const void *)pb;
 8018bc4:	69fb      	ldr	r3, [r7, #28]
 8018bc6:	61bb      	str	r3, [r7, #24]
  while (len > 1) {
 8018bc8:	e00a      	b.n	8018be0 <lwip_standard_chksum+0x5c>
    sum += *ps++;
 8018bca:	69bb      	ldr	r3, [r7, #24]
 8018bcc:	1c9a      	adds	r2, r3, #2
 8018bce:	61ba      	str	r2, [r7, #24]
 8018bd0:	881b      	ldrh	r3, [r3, #0]
 8018bd2:	461a      	mov	r2, r3
 8018bd4:	697b      	ldr	r3, [r7, #20]
 8018bd6:	4413      	add	r3, r2
 8018bd8:	617b      	str	r3, [r7, #20]
    len -= 2;
 8018bda:	683b      	ldr	r3, [r7, #0]
 8018bdc:	3b02      	subs	r3, #2
 8018bde:	603b      	str	r3, [r7, #0]
  while (len > 1) {
 8018be0:	683b      	ldr	r3, [r7, #0]
 8018be2:	2b01      	cmp	r3, #1
 8018be4:	dcf1      	bgt.n	8018bca <lwip_standard_chksum+0x46>
  }

  /* Consume left-over byte, if any */
  if (len > 0) {
 8018be6:	683b      	ldr	r3, [r7, #0]
 8018be8:	2b00      	cmp	r3, #0
 8018bea:	dd04      	ble.n	8018bf6 <lwip_standard_chksum+0x72>
    ((u8_t *)&t)[0] = *(const u8_t *)ps;
 8018bec:	f107 030e 	add.w	r3, r7, #14
 8018bf0:	69ba      	ldr	r2, [r7, #24]
 8018bf2:	7812      	ldrb	r2, [r2, #0]
 8018bf4:	701a      	strb	r2, [r3, #0]
  }

  /* Add end bytes */
  sum += t;
 8018bf6:	89fb      	ldrh	r3, [r7, #14]
 8018bf8:	461a      	mov	r2, r3
 8018bfa:	697b      	ldr	r3, [r7, #20]
 8018bfc:	4413      	add	r3, r2
 8018bfe:	617b      	str	r3, [r7, #20]

  /* Fold 32-bit sum to 16 bits
     calling this twice is probably faster than if statements... */
  sum = FOLD_U32T(sum);
 8018c00:	697b      	ldr	r3, [r7, #20]
 8018c02:	0c1a      	lsrs	r2, r3, #16
 8018c04:	697b      	ldr	r3, [r7, #20]
 8018c06:	b29b      	uxth	r3, r3
 8018c08:	4413      	add	r3, r2
 8018c0a:	617b      	str	r3, [r7, #20]
  sum = FOLD_U32T(sum);
 8018c0c:	697b      	ldr	r3, [r7, #20]
 8018c0e:	0c1a      	lsrs	r2, r3, #16
 8018c10:	697b      	ldr	r3, [r7, #20]
 8018c12:	b29b      	uxth	r3, r3
 8018c14:	4413      	add	r3, r2
 8018c16:	617b      	str	r3, [r7, #20]

  /* Swap if alignment was odd */
  if (odd) {
 8018c18:	693b      	ldr	r3, [r7, #16]
 8018c1a:	2b00      	cmp	r3, #0
 8018c1c:	d007      	beq.n	8018c2e <lwip_standard_chksum+0xaa>
    sum = SWAP_BYTES_IN_WORD(sum);
 8018c1e:	697b      	ldr	r3, [r7, #20]
 8018c20:	021b      	lsls	r3, r3, #8
 8018c22:	b29a      	uxth	r2, r3
 8018c24:	697b      	ldr	r3, [r7, #20]
 8018c26:	0a1b      	lsrs	r3, r3, #8
 8018c28:	b2db      	uxtb	r3, r3
 8018c2a:	4313      	orrs	r3, r2
 8018c2c:	617b      	str	r3, [r7, #20]
  }

  return (u16_t)sum;
 8018c2e:	697b      	ldr	r3, [r7, #20]
 8018c30:	b29b      	uxth	r3, r3
}
 8018c32:	4618      	mov	r0, r3
 8018c34:	3724      	adds	r7, #36	@ 0x24
 8018c36:	46bd      	mov	sp, r7
 8018c38:	f85d 7b04 	ldr.w	r7, [sp], #4
 8018c3c:	4770      	bx	lr

08018c3e <inet_chksum>:
 * @return checksum (as u16_t) to be saved directly in the protocol header
 */

u16_t
inet_chksum(const void *dataptr, u16_t len)
{
 8018c3e:	b580      	push	{r7, lr}
 8018c40:	b082      	sub	sp, #8
 8018c42:	af00      	add	r7, sp, #0
 8018c44:	6078      	str	r0, [r7, #4]
 8018c46:	460b      	mov	r3, r1
 8018c48:	807b      	strh	r3, [r7, #2]
  return (u16_t)~(unsigned int)LWIP_CHKSUM(dataptr, len);
 8018c4a:	887b      	ldrh	r3, [r7, #2]
 8018c4c:	4619      	mov	r1, r3
 8018c4e:	6878      	ldr	r0, [r7, #4]
 8018c50:	f7ff ff98 	bl	8018b84 <lwip_standard_chksum>
 8018c54:	4603      	mov	r3, r0
 8018c56:	43db      	mvns	r3, r3
 8018c58:	b29b      	uxth	r3, r3
}
 8018c5a:	4618      	mov	r0, r3
 8018c5c:	3708      	adds	r7, #8
 8018c5e:	46bd      	mov	sp, r7
 8018c60:	bd80      	pop	{r7, pc}

08018c62 <inet_chksum_pbuf>:
 * @param p pbuf chain over that the checksum should be calculated
 * @return checksum (as u16_t) to be saved directly in the protocol header
 */
u16_t
inet_chksum_pbuf(struct pbuf *p)
{
 8018c62:	b580      	push	{r7, lr}
 8018c64:	b086      	sub	sp, #24
 8018c66:	af00      	add	r7, sp, #0
 8018c68:	6078      	str	r0, [r7, #4]
  u32_t acc;
  struct pbuf *q;
  int swapped = 0;
 8018c6a:	2300      	movs	r3, #0
 8018c6c:	60fb      	str	r3, [r7, #12]

  acc = 0;
 8018c6e:	2300      	movs	r3, #0
 8018c70:	617b      	str	r3, [r7, #20]
  for (q = p; q != NULL; q = q->next) {
 8018c72:	687b      	ldr	r3, [r7, #4]
 8018c74:	613b      	str	r3, [r7, #16]
 8018c76:	e02b      	b.n	8018cd0 <inet_chksum_pbuf+0x6e>
    acc += LWIP_CHKSUM(q->payload, q->len);
 8018c78:	693b      	ldr	r3, [r7, #16]
 8018c7a:	685a      	ldr	r2, [r3, #4]
 8018c7c:	693b      	ldr	r3, [r7, #16]
 8018c7e:	895b      	ldrh	r3, [r3, #10]
 8018c80:	4619      	mov	r1, r3
 8018c82:	4610      	mov	r0, r2
 8018c84:	f7ff ff7e 	bl	8018b84 <lwip_standard_chksum>
 8018c88:	4603      	mov	r3, r0
 8018c8a:	461a      	mov	r2, r3
 8018c8c:	697b      	ldr	r3, [r7, #20]
 8018c8e:	4413      	add	r3, r2
 8018c90:	617b      	str	r3, [r7, #20]
    acc = FOLD_U32T(acc);
 8018c92:	697b      	ldr	r3, [r7, #20]
 8018c94:	0c1a      	lsrs	r2, r3, #16
 8018c96:	697b      	ldr	r3, [r7, #20]
 8018c98:	b29b      	uxth	r3, r3
 8018c9a:	4413      	add	r3, r2
 8018c9c:	617b      	str	r3, [r7, #20]
    if (q->len % 2 != 0) {
 8018c9e:	693b      	ldr	r3, [r7, #16]
 8018ca0:	895b      	ldrh	r3, [r3, #10]
 8018ca2:	f003 0301 	and.w	r3, r3, #1
 8018ca6:	b29b      	uxth	r3, r3
 8018ca8:	2b00      	cmp	r3, #0
 8018caa:	d00e      	beq.n	8018cca <inet_chksum_pbuf+0x68>
      swapped = !swapped;
 8018cac:	68fb      	ldr	r3, [r7, #12]
 8018cae:	2b00      	cmp	r3, #0
 8018cb0:	bf0c      	ite	eq
 8018cb2:	2301      	moveq	r3, #1
 8018cb4:	2300      	movne	r3, #0
 8018cb6:	b2db      	uxtb	r3, r3
 8018cb8:	60fb      	str	r3, [r7, #12]
      acc = SWAP_BYTES_IN_WORD(acc);
 8018cba:	697b      	ldr	r3, [r7, #20]
 8018cbc:	021b      	lsls	r3, r3, #8
 8018cbe:	b29a      	uxth	r2, r3
 8018cc0:	697b      	ldr	r3, [r7, #20]
 8018cc2:	0a1b      	lsrs	r3, r3, #8
 8018cc4:	b2db      	uxtb	r3, r3
 8018cc6:	4313      	orrs	r3, r2
 8018cc8:	617b      	str	r3, [r7, #20]
  for (q = p; q != NULL; q = q->next) {
 8018cca:	693b      	ldr	r3, [r7, #16]
 8018ccc:	681b      	ldr	r3, [r3, #0]
 8018cce:	613b      	str	r3, [r7, #16]
 8018cd0:	693b      	ldr	r3, [r7, #16]
 8018cd2:	2b00      	cmp	r3, #0
 8018cd4:	d1d0      	bne.n	8018c78 <inet_chksum_pbuf+0x16>
    }
  }

  if (swapped) {
 8018cd6:	68fb      	ldr	r3, [r7, #12]
 8018cd8:	2b00      	cmp	r3, #0
 8018cda:	d007      	beq.n	8018cec <inet_chksum_pbuf+0x8a>
    acc = SWAP_BYTES_IN_WORD(acc);
 8018cdc:	697b      	ldr	r3, [r7, #20]
 8018cde:	021b      	lsls	r3, r3, #8
 8018ce0:	b29a      	uxth	r2, r3
 8018ce2:	697b      	ldr	r3, [r7, #20]
 8018ce4:	0a1b      	lsrs	r3, r3, #8
 8018ce6:	b2db      	uxtb	r3, r3
 8018ce8:	4313      	orrs	r3, r2
 8018cea:	617b      	str	r3, [r7, #20]
  }
  return (u16_t)~(acc & 0xffffUL);
 8018cec:	697b      	ldr	r3, [r7, #20]
 8018cee:	b29b      	uxth	r3, r3
 8018cf0:	43db      	mvns	r3, r3
 8018cf2:	b29b      	uxth	r3, r3
}
 8018cf4:	4618      	mov	r0, r3
 8018cf6:	3718      	adds	r7, #24
 8018cf8:	46bd      	mov	sp, r7
 8018cfa:	bd80      	pop	{r7, pc}

08018cfc <lwip_init>:
 * Initialize all modules.
 * Use this in NO_SYS mode. Use tcpip_init() otherwise.
 */
void
lwip_init(void)
{
 8018cfc:	b580      	push	{r7, lr}
 8018cfe:	b082      	sub	sp, #8
 8018d00:	af00      	add	r7, sp, #0
#ifndef LWIP_SKIP_CONST_CHECK
  int a = 0;
 8018d02:	2300      	movs	r3, #0
 8018d04:	607b      	str	r3, [r7, #4]
#endif

  /* Modules initialization */
  stats_init();
#if !NO_SYS
  sys_init();
 8018d06:	f00d fb75 	bl	80263f4 <sys_init>
#endif /* !NO_SYS */
  mem_init();
 8018d0a:	f000 f8d3 	bl	8018eb4 <mem_init>
  memp_init();
 8018d0e:	f000 fc1b 	bl	8019548 <memp_init>
  pbuf_init();
  netif_init();
 8018d12:	f000 fd27 	bl	8019764 <netif_init>
#endif /* LWIP_IPV4 */
#if LWIP_RAW
  raw_init();
#endif /* LWIP_RAW */
#if LWIP_UDP
  udp_init();
 8018d16:	f008 f8db 	bl	8020ed0 <udp_init>
#endif /* LWIP_UDP */
#if LWIP_TCP
  tcp_init();
 8018d1a:	f001 fe91 	bl	801aa40 <tcp_init>
#if PPP_SUPPORT
  ppp_init();
#endif

#if LWIP_TIMERS
  sys_timeouts_init();
 8018d1e:	f008 f817 	bl	8020d50 <sys_timeouts_init>
#endif /* LWIP_TIMERS */
}
 8018d22:	bf00      	nop
 8018d24:	3708      	adds	r7, #8
 8018d26:	46bd      	mov	sp, r7
 8018d28:	bd80      	pop	{r7, pc}
	...

08018d2c <ptr_to_mem>:
#define mem_overflow_check_element(mem)
#endif /* MEM_OVERFLOW_CHECK */

static struct mem *
ptr_to_mem(mem_size_t ptr)
{
 8018d2c:	b480      	push	{r7}
 8018d2e:	b083      	sub	sp, #12
 8018d30:	af00      	add	r7, sp, #0
 8018d32:	6078      	str	r0, [r7, #4]
  return (struct mem *)(void *)&ram[ptr];
 8018d34:	4b04      	ldr	r3, [pc, #16]	@ (8018d48 <ptr_to_mem+0x1c>)
 8018d36:	681a      	ldr	r2, [r3, #0]
 8018d38:	687b      	ldr	r3, [r7, #4]
 8018d3a:	4413      	add	r3, r2
}
 8018d3c:	4618      	mov	r0, r3
 8018d3e:	370c      	adds	r7, #12
 8018d40:	46bd      	mov	sp, r7
 8018d42:	f85d 7b04 	ldr.w	r7, [sp], #4
 8018d46:	4770      	bx	lr
 8018d48:	24024350 	.word	0x24024350

08018d4c <mem_to_ptr>:

static mem_size_t
mem_to_ptr(void *mem)
{
 8018d4c:	b480      	push	{r7}
 8018d4e:	b083      	sub	sp, #12
 8018d50:	af00      	add	r7, sp, #0
 8018d52:	6078      	str	r0, [r7, #4]
  return (mem_size_t)((u8_t *)mem - ram);
 8018d54:	4b04      	ldr	r3, [pc, #16]	@ (8018d68 <mem_to_ptr+0x1c>)
 8018d56:	681b      	ldr	r3, [r3, #0]
 8018d58:	687a      	ldr	r2, [r7, #4]
 8018d5a:	1ad3      	subs	r3, r2, r3
}
 8018d5c:	4618      	mov	r0, r3
 8018d5e:	370c      	adds	r7, #12
 8018d60:	46bd      	mov	sp, r7
 8018d62:	f85d 7b04 	ldr.w	r7, [sp], #4
 8018d66:	4770      	bx	lr
 8018d68:	24024350 	.word	0x24024350

08018d6c <plug_holes>:
 * This assumes access to the heap is protected by the calling function
 * already.
 */
static void
plug_holes(struct mem *mem)
{
 8018d6c:	b590      	push	{r4, r7, lr}
 8018d6e:	b085      	sub	sp, #20
 8018d70:	af00      	add	r7, sp, #0
 8018d72:	6078      	str	r0, [r7, #4]
  struct mem *nmem;
  struct mem *pmem;

  LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram);
 8018d74:	4b45      	ldr	r3, [pc, #276]	@ (8018e8c <plug_holes+0x120>)
 8018d76:	681b      	ldr	r3, [r3, #0]
 8018d78:	687a      	ldr	r2, [r7, #4]
 8018d7a:	429a      	cmp	r2, r3
 8018d7c:	d206      	bcs.n	8018d8c <plug_holes+0x20>
 8018d7e:	4b44      	ldr	r3, [pc, #272]	@ (8018e90 <plug_holes+0x124>)
 8018d80:	f240 12df 	movw	r2, #479	@ 0x1df
 8018d84:	4943      	ldr	r1, [pc, #268]	@ (8018e94 <plug_holes+0x128>)
 8018d86:	4844      	ldr	r0, [pc, #272]	@ (8018e98 <plug_holes+0x12c>)
 8018d88:	f010 fe28 	bl	80299dc <iprintf>
  LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end);
 8018d8c:	4b43      	ldr	r3, [pc, #268]	@ (8018e9c <plug_holes+0x130>)
 8018d8e:	681b      	ldr	r3, [r3, #0]
 8018d90:	687a      	ldr	r2, [r7, #4]
 8018d92:	429a      	cmp	r2, r3
 8018d94:	d306      	bcc.n	8018da4 <plug_holes+0x38>
 8018d96:	4b3e      	ldr	r3, [pc, #248]	@ (8018e90 <plug_holes+0x124>)
 8018d98:	f44f 72f0 	mov.w	r2, #480	@ 0x1e0
 8018d9c:	4940      	ldr	r1, [pc, #256]	@ (8018ea0 <plug_holes+0x134>)
 8018d9e:	483e      	ldr	r0, [pc, #248]	@ (8018e98 <plug_holes+0x12c>)
 8018da0:	f010 fe1c 	bl	80299dc <iprintf>
  LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0);
 8018da4:	687b      	ldr	r3, [r7, #4]
 8018da6:	7a1b      	ldrb	r3, [r3, #8]
 8018da8:	2b00      	cmp	r3, #0
 8018daa:	d006      	beq.n	8018dba <plug_holes+0x4e>
 8018dac:	4b38      	ldr	r3, [pc, #224]	@ (8018e90 <plug_holes+0x124>)
 8018dae:	f240 12e1 	movw	r2, #481	@ 0x1e1
 8018db2:	493c      	ldr	r1, [pc, #240]	@ (8018ea4 <plug_holes+0x138>)
 8018db4:	4838      	ldr	r0, [pc, #224]	@ (8018e98 <plug_holes+0x12c>)
 8018db6:	f010 fe11 	bl	80299dc <iprintf>

  /* plug hole forward */
  LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE_ALIGNED", mem->next <= MEM_SIZE_ALIGNED);
 8018dba:	687b      	ldr	r3, [r7, #4]
 8018dbc:	681b      	ldr	r3, [r3, #0]
 8018dbe:	4a3a      	ldr	r2, [pc, #232]	@ (8018ea8 <plug_holes+0x13c>)
 8018dc0:	4293      	cmp	r3, r2
 8018dc2:	d906      	bls.n	8018dd2 <plug_holes+0x66>
 8018dc4:	4b32      	ldr	r3, [pc, #200]	@ (8018e90 <plug_holes+0x124>)
 8018dc6:	f44f 72f2 	mov.w	r2, #484	@ 0x1e4
 8018dca:	4938      	ldr	r1, [pc, #224]	@ (8018eac <plug_holes+0x140>)
 8018dcc:	4832      	ldr	r0, [pc, #200]	@ (8018e98 <plug_holes+0x12c>)
 8018dce:	f010 fe05 	bl	80299dc <iprintf>

  nmem = ptr_to_mem(mem->next);
 8018dd2:	687b      	ldr	r3, [r7, #4]
 8018dd4:	681b      	ldr	r3, [r3, #0]
 8018dd6:	4618      	mov	r0, r3
 8018dd8:	f7ff ffa8 	bl	8018d2c <ptr_to_mem>
 8018ddc:	60f8      	str	r0, [r7, #12]
  if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) {
 8018dde:	687a      	ldr	r2, [r7, #4]
 8018de0:	68fb      	ldr	r3, [r7, #12]
 8018de2:	429a      	cmp	r2, r3
 8018de4:	d024      	beq.n	8018e30 <plug_holes+0xc4>
 8018de6:	68fb      	ldr	r3, [r7, #12]
 8018de8:	7a1b      	ldrb	r3, [r3, #8]
 8018dea:	2b00      	cmp	r3, #0
 8018dec:	d120      	bne.n	8018e30 <plug_holes+0xc4>
 8018dee:	4b2b      	ldr	r3, [pc, #172]	@ (8018e9c <plug_holes+0x130>)
 8018df0:	681b      	ldr	r3, [r3, #0]
 8018df2:	68fa      	ldr	r2, [r7, #12]
 8018df4:	429a      	cmp	r2, r3
 8018df6:	d01b      	beq.n	8018e30 <plug_holes+0xc4>
    /* if mem->next is unused and not end of ram, combine mem and mem->next */
    if (lfree == nmem) {
 8018df8:	4b2d      	ldr	r3, [pc, #180]	@ (8018eb0 <plug_holes+0x144>)
 8018dfa:	681b      	ldr	r3, [r3, #0]
 8018dfc:	68fa      	ldr	r2, [r7, #12]
 8018dfe:	429a      	cmp	r2, r3
 8018e00:	d102      	bne.n	8018e08 <plug_holes+0x9c>
      lfree = mem;
 8018e02:	4a2b      	ldr	r2, [pc, #172]	@ (8018eb0 <plug_holes+0x144>)
 8018e04:	687b      	ldr	r3, [r7, #4]
 8018e06:	6013      	str	r3, [r2, #0]
    }
    mem->next = nmem->next;
 8018e08:	68fb      	ldr	r3, [r7, #12]
 8018e0a:	681a      	ldr	r2, [r3, #0]
 8018e0c:	687b      	ldr	r3, [r7, #4]
 8018e0e:	601a      	str	r2, [r3, #0]
    if (nmem->next != MEM_SIZE_ALIGNED) {
 8018e10:	68fb      	ldr	r3, [r7, #12]
 8018e12:	681b      	ldr	r3, [r3, #0]
 8018e14:	4a24      	ldr	r2, [pc, #144]	@ (8018ea8 <plug_holes+0x13c>)
 8018e16:	4293      	cmp	r3, r2
 8018e18:	d00a      	beq.n	8018e30 <plug_holes+0xc4>
      ptr_to_mem(nmem->next)->prev = mem_to_ptr(mem);
 8018e1a:	68fb      	ldr	r3, [r7, #12]
 8018e1c:	681b      	ldr	r3, [r3, #0]
 8018e1e:	4618      	mov	r0, r3
 8018e20:	f7ff ff84 	bl	8018d2c <ptr_to_mem>
 8018e24:	4604      	mov	r4, r0
 8018e26:	6878      	ldr	r0, [r7, #4]
 8018e28:	f7ff ff90 	bl	8018d4c <mem_to_ptr>
 8018e2c:	4603      	mov	r3, r0
 8018e2e:	6063      	str	r3, [r4, #4]
    }
  }

  /* plug hole backward */
  pmem = ptr_to_mem(mem->prev);
 8018e30:	687b      	ldr	r3, [r7, #4]
 8018e32:	685b      	ldr	r3, [r3, #4]
 8018e34:	4618      	mov	r0, r3
 8018e36:	f7ff ff79 	bl	8018d2c <ptr_to_mem>
 8018e3a:	60b8      	str	r0, [r7, #8]
  if (pmem != mem && pmem->used == 0) {
 8018e3c:	68ba      	ldr	r2, [r7, #8]
 8018e3e:	687b      	ldr	r3, [r7, #4]
 8018e40:	429a      	cmp	r2, r3
 8018e42:	d01f      	beq.n	8018e84 <plug_holes+0x118>
 8018e44:	68bb      	ldr	r3, [r7, #8]
 8018e46:	7a1b      	ldrb	r3, [r3, #8]
 8018e48:	2b00      	cmp	r3, #0
 8018e4a:	d11b      	bne.n	8018e84 <plug_holes+0x118>
    /* if mem->prev is unused, combine mem and mem->prev */
    if (lfree == mem) {
 8018e4c:	4b18      	ldr	r3, [pc, #96]	@ (8018eb0 <plug_holes+0x144>)
 8018e4e:	681b      	ldr	r3, [r3, #0]
 8018e50:	687a      	ldr	r2, [r7, #4]
 8018e52:	429a      	cmp	r2, r3
 8018e54:	d102      	bne.n	8018e5c <plug_holes+0xf0>
      lfree = pmem;
 8018e56:	4a16      	ldr	r2, [pc, #88]	@ (8018eb0 <plug_holes+0x144>)
 8018e58:	68bb      	ldr	r3, [r7, #8]
 8018e5a:	6013      	str	r3, [r2, #0]
    }
    pmem->next = mem->next;
 8018e5c:	687b      	ldr	r3, [r7, #4]
 8018e5e:	681a      	ldr	r2, [r3, #0]
 8018e60:	68bb      	ldr	r3, [r7, #8]
 8018e62:	601a      	str	r2, [r3, #0]
    if (mem->next != MEM_SIZE_ALIGNED) {
 8018e64:	687b      	ldr	r3, [r7, #4]
 8018e66:	681b      	ldr	r3, [r3, #0]
 8018e68:	4a0f      	ldr	r2, [pc, #60]	@ (8018ea8 <plug_holes+0x13c>)
 8018e6a:	4293      	cmp	r3, r2
 8018e6c:	d00a      	beq.n	8018e84 <plug_holes+0x118>
      ptr_to_mem(mem->next)->prev = mem_to_ptr(pmem);
 8018e6e:	687b      	ldr	r3, [r7, #4]
 8018e70:	681b      	ldr	r3, [r3, #0]
 8018e72:	4618      	mov	r0, r3
 8018e74:	f7ff ff5a 	bl	8018d2c <ptr_to_mem>
 8018e78:	4604      	mov	r4, r0
 8018e7a:	68b8      	ldr	r0, [r7, #8]
 8018e7c:	f7ff ff66 	bl	8018d4c <mem_to_ptr>
 8018e80:	4603      	mov	r3, r0
 8018e82:	6063      	str	r3, [r4, #4]
    }
  }
}
 8018e84:	bf00      	nop
 8018e86:	3714      	adds	r7, #20
 8018e88:	46bd      	mov	sp, r7
 8018e8a:	bd90      	pop	{r4, r7, pc}
 8018e8c:	24024350 	.word	0x24024350
 8018e90:	0802dac4 	.word	0x0802dac4
 8018e94:	0802daf4 	.word	0x0802daf4
 8018e98:	0802db0c 	.word	0x0802db0c
 8018e9c:	24024354 	.word	0x24024354
 8018ea0:	0802db34 	.word	0x0802db34
 8018ea4:	0802db50 	.word	0x0802db50
 8018ea8:	0001ffe8 	.word	0x0001ffe8
 8018eac:	0802db6c 	.word	0x0802db6c
 8018eb0:	2402435c 	.word	0x2402435c

08018eb4 <mem_init>:
/**
 * Zero the heap and initialize start, end and lowest-free
 */
void
mem_init(void)
{
 8018eb4:	b580      	push	{r7, lr}
 8018eb6:	b082      	sub	sp, #8
 8018eb8:	af00      	add	r7, sp, #0

  LWIP_ASSERT("Sanity check alignment",
              (SIZEOF_STRUCT_MEM & (MEM_ALIGNMENT - 1)) == 0);

  /* align the heap */
  ram = (u8_t *)LWIP_MEM_ALIGN(LWIP_RAM_HEAP_POINTER);
 8018eba:	4b1b      	ldr	r3, [pc, #108]	@ (8018f28 <mem_init+0x74>)
 8018ebc:	4a1b      	ldr	r2, [pc, #108]	@ (8018f2c <mem_init+0x78>)
 8018ebe:	601a      	str	r2, [r3, #0]
  /* initialize the start of the heap */
  mem = (struct mem *)(void *)ram;
 8018ec0:	4b19      	ldr	r3, [pc, #100]	@ (8018f28 <mem_init+0x74>)
 8018ec2:	681b      	ldr	r3, [r3, #0]
 8018ec4:	607b      	str	r3, [r7, #4]
  mem->next = MEM_SIZE_ALIGNED;
 8018ec6:	687b      	ldr	r3, [r7, #4]
 8018ec8:	4a19      	ldr	r2, [pc, #100]	@ (8018f30 <mem_init+0x7c>)
 8018eca:	601a      	str	r2, [r3, #0]
  mem->prev = 0;
 8018ecc:	687b      	ldr	r3, [r7, #4]
 8018ece:	2200      	movs	r2, #0
 8018ed0:	605a      	str	r2, [r3, #4]
  mem->used = 0;
 8018ed2:	687b      	ldr	r3, [r7, #4]
 8018ed4:	2200      	movs	r2, #0
 8018ed6:	721a      	strb	r2, [r3, #8]
  /* initialize the end of the heap */
  ram_end = ptr_to_mem(MEM_SIZE_ALIGNED);
 8018ed8:	4815      	ldr	r0, [pc, #84]	@ (8018f30 <mem_init+0x7c>)
 8018eda:	f7ff ff27 	bl	8018d2c <ptr_to_mem>
 8018ede:	4603      	mov	r3, r0
 8018ee0:	4a14      	ldr	r2, [pc, #80]	@ (8018f34 <mem_init+0x80>)
 8018ee2:	6013      	str	r3, [r2, #0]
  ram_end->used = 1;
 8018ee4:	4b13      	ldr	r3, [pc, #76]	@ (8018f34 <mem_init+0x80>)
 8018ee6:	681b      	ldr	r3, [r3, #0]
 8018ee8:	2201      	movs	r2, #1
 8018eea:	721a      	strb	r2, [r3, #8]
  ram_end->next = MEM_SIZE_ALIGNED;
 8018eec:	4b11      	ldr	r3, [pc, #68]	@ (8018f34 <mem_init+0x80>)
 8018eee:	681b      	ldr	r3, [r3, #0]
 8018ef0:	4a0f      	ldr	r2, [pc, #60]	@ (8018f30 <mem_init+0x7c>)
 8018ef2:	601a      	str	r2, [r3, #0]
  ram_end->prev = MEM_SIZE_ALIGNED;
 8018ef4:	4b0f      	ldr	r3, [pc, #60]	@ (8018f34 <mem_init+0x80>)
 8018ef6:	681b      	ldr	r3, [r3, #0]
 8018ef8:	4a0d      	ldr	r2, [pc, #52]	@ (8018f30 <mem_init+0x7c>)
 8018efa:	605a      	str	r2, [r3, #4]
  MEM_SANITY();

  /* initialize the lowest-free pointer to the start of the heap */
  lfree = (struct mem *)(void *)ram;
 8018efc:	4b0a      	ldr	r3, [pc, #40]	@ (8018f28 <mem_init+0x74>)
 8018efe:	681b      	ldr	r3, [r3, #0]
 8018f00:	4a0d      	ldr	r2, [pc, #52]	@ (8018f38 <mem_init+0x84>)
 8018f02:	6013      	str	r3, [r2, #0]

  MEM_STATS_AVAIL(avail, MEM_SIZE_ALIGNED);

  if (sys_mutex_new(&mem_mutex) != ERR_OK) {
 8018f04:	480d      	ldr	r0, [pc, #52]	@ (8018f3c <mem_init+0x88>)
 8018f06:	f00d fa81 	bl	802640c <sys_mutex_new>
 8018f0a:	4603      	mov	r3, r0
 8018f0c:	2b00      	cmp	r3, #0
 8018f0e:	d006      	beq.n	8018f1e <mem_init+0x6a>
    LWIP_ASSERT("failed to create mem_mutex", 0);
 8018f10:	4b0b      	ldr	r3, [pc, #44]	@ (8018f40 <mem_init+0x8c>)
 8018f12:	f240 221f 	movw	r2, #543	@ 0x21f
 8018f16:	490b      	ldr	r1, [pc, #44]	@ (8018f44 <mem_init+0x90>)
 8018f18:	480b      	ldr	r0, [pc, #44]	@ (8018f48 <mem_init+0x94>)
 8018f1a:	f010 fd5f 	bl	80299dc <iprintf>
  }
}
 8018f1e:	bf00      	nop
 8018f20:	3708      	adds	r7, #8
 8018f22:	46bd      	mov	sp, r7
 8018f24:	bd80      	pop	{r7, pc}
 8018f26:	bf00      	nop
 8018f28:	24024350 	.word	0x24024350
 8018f2c:	24020000 	.word	0x24020000
 8018f30:	0001ffe8 	.word	0x0001ffe8
 8018f34:	24024354 	.word	0x24024354
 8018f38:	2402435c 	.word	0x2402435c
 8018f3c:	24024358 	.word	0x24024358
 8018f40:	0802dac4 	.word	0x0802dac4
 8018f44:	0802db98 	.word	0x0802db98
 8018f48:	0802db0c 	.word	0x0802db0c

08018f4c <mem_link_valid>:
/* Check if a struct mem is correctly linked.
 * If not, double-free is a possible reason.
 */
static int
mem_link_valid(struct mem *mem)
{
 8018f4c:	b580      	push	{r7, lr}
 8018f4e:	b086      	sub	sp, #24
 8018f50:	af00      	add	r7, sp, #0
 8018f52:	6078      	str	r0, [r7, #4]
  struct mem *nmem, *pmem;
  mem_size_t rmem_idx;
  rmem_idx = mem_to_ptr(mem);
 8018f54:	6878      	ldr	r0, [r7, #4]
 8018f56:	f7ff fef9 	bl	8018d4c <mem_to_ptr>
 8018f5a:	6178      	str	r0, [r7, #20]
  nmem = ptr_to_mem(mem->next);
 8018f5c:	687b      	ldr	r3, [r7, #4]
 8018f5e:	681b      	ldr	r3, [r3, #0]
 8018f60:	4618      	mov	r0, r3
 8018f62:	f7ff fee3 	bl	8018d2c <ptr_to_mem>
 8018f66:	6138      	str	r0, [r7, #16]
  pmem = ptr_to_mem(mem->prev);
 8018f68:	687b      	ldr	r3, [r7, #4]
 8018f6a:	685b      	ldr	r3, [r3, #4]
 8018f6c:	4618      	mov	r0, r3
 8018f6e:	f7ff fedd 	bl	8018d2c <ptr_to_mem>
 8018f72:	60f8      	str	r0, [r7, #12]
  if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) ||
 8018f74:	687b      	ldr	r3, [r7, #4]
 8018f76:	681b      	ldr	r3, [r3, #0]
 8018f78:	4a11      	ldr	r2, [pc, #68]	@ (8018fc0 <mem_link_valid+0x74>)
 8018f7a:	4293      	cmp	r3, r2
 8018f7c:	d818      	bhi.n	8018fb0 <mem_link_valid+0x64>
 8018f7e:	687b      	ldr	r3, [r7, #4]
 8018f80:	685b      	ldr	r3, [r3, #4]
 8018f82:	4a0f      	ldr	r2, [pc, #60]	@ (8018fc0 <mem_link_valid+0x74>)
 8018f84:	4293      	cmp	r3, r2
 8018f86:	d813      	bhi.n	8018fb0 <mem_link_valid+0x64>
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 8018f88:	687b      	ldr	r3, [r7, #4]
 8018f8a:	685b      	ldr	r3, [r3, #4]
  if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) ||
 8018f8c:	697a      	ldr	r2, [r7, #20]
 8018f8e:	429a      	cmp	r2, r3
 8018f90:	d004      	beq.n	8018f9c <mem_link_valid+0x50>
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 8018f92:	68fb      	ldr	r3, [r7, #12]
 8018f94:	681b      	ldr	r3, [r3, #0]
 8018f96:	697a      	ldr	r2, [r7, #20]
 8018f98:	429a      	cmp	r2, r3
 8018f9a:	d109      	bne.n	8018fb0 <mem_link_valid+0x64>
      ((nmem != ram_end) && (nmem->prev != rmem_idx))) {
 8018f9c:	4b09      	ldr	r3, [pc, #36]	@ (8018fc4 <mem_link_valid+0x78>)
 8018f9e:	681b      	ldr	r3, [r3, #0]
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 8018fa0:	693a      	ldr	r2, [r7, #16]
 8018fa2:	429a      	cmp	r2, r3
 8018fa4:	d006      	beq.n	8018fb4 <mem_link_valid+0x68>
      ((nmem != ram_end) && (nmem->prev != rmem_idx))) {
 8018fa6:	693b      	ldr	r3, [r7, #16]
 8018fa8:	685b      	ldr	r3, [r3, #4]
 8018faa:	697a      	ldr	r2, [r7, #20]
 8018fac:	429a      	cmp	r2, r3
 8018fae:	d001      	beq.n	8018fb4 <mem_link_valid+0x68>
    return 0;
 8018fb0:	2300      	movs	r3, #0
 8018fb2:	e000      	b.n	8018fb6 <mem_link_valid+0x6a>
  }
  return 1;
 8018fb4:	2301      	movs	r3, #1
}
 8018fb6:	4618      	mov	r0, r3
 8018fb8:	3718      	adds	r7, #24
 8018fba:	46bd      	mov	sp, r7
 8018fbc:	bd80      	pop	{r7, pc}
 8018fbe:	bf00      	nop
 8018fc0:	0001ffe8 	.word	0x0001ffe8
 8018fc4:	24024354 	.word	0x24024354

08018fc8 <mem_free>:
 * @param rmem is the data portion of a struct mem as returned by a previous
 *             call to mem_malloc()
 */
void
mem_free(void *rmem)
{
 8018fc8:	b580      	push	{r7, lr}
 8018fca:	b088      	sub	sp, #32
 8018fcc:	af00      	add	r7, sp, #0
 8018fce:	6078      	str	r0, [r7, #4]
  struct mem *mem;
  LWIP_MEM_FREE_DECL_PROTECT();

  if (rmem == NULL) {
 8018fd0:	687b      	ldr	r3, [r7, #4]
 8018fd2:	2b00      	cmp	r3, #0
 8018fd4:	d070      	beq.n	80190b8 <mem_free+0xf0>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("mem_free(p == NULL) was called.\n"));
    return;
  }
  if ((((mem_ptr_t)rmem) & (MEM_ALIGNMENT - 1)) != 0) {
 8018fd6:	687b      	ldr	r3, [r7, #4]
 8018fd8:	f003 0303 	and.w	r3, r3, #3
 8018fdc:	2b00      	cmp	r3, #0
 8018fde:	d00d      	beq.n	8018ffc <mem_free+0x34>
    LWIP_MEM_ILLEGAL_FREE("mem_free: sanity check alignment");
 8018fe0:	4b37      	ldr	r3, [pc, #220]	@ (80190c0 <mem_free+0xf8>)
 8018fe2:	f240 2273 	movw	r2, #627	@ 0x273
 8018fe6:	4937      	ldr	r1, [pc, #220]	@ (80190c4 <mem_free+0xfc>)
 8018fe8:	4837      	ldr	r0, [pc, #220]	@ (80190c8 <mem_free+0x100>)
 8018fea:	f010 fcf7 	bl	80299dc <iprintf>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: sanity check alignment\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8018fee:	f00d fa5f 	bl	80264b0 <sys_arch_protect>
 8018ff2:	60f8      	str	r0, [r7, #12]
 8018ff4:	68f8      	ldr	r0, [r7, #12]
 8018ff6:	f00d fa69 	bl	80264cc <sys_arch_unprotect>
    return;
 8018ffa:	e05e      	b.n	80190ba <mem_free+0xf2>
  }

  /* Get the corresponding struct mem: */
  /* cast through void* to get rid of alignment warnings */
  mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET));
 8018ffc:	687b      	ldr	r3, [r7, #4]
 8018ffe:	3b0c      	subs	r3, #12
 8019000:	61fb      	str	r3, [r7, #28]

  if ((u8_t *)mem < ram || (u8_t *)rmem + MIN_SIZE_ALIGNED > (u8_t *)ram_end) {
 8019002:	4b32      	ldr	r3, [pc, #200]	@ (80190cc <mem_free+0x104>)
 8019004:	681b      	ldr	r3, [r3, #0]
 8019006:	69fa      	ldr	r2, [r7, #28]
 8019008:	429a      	cmp	r2, r3
 801900a:	d306      	bcc.n	801901a <mem_free+0x52>
 801900c:	687b      	ldr	r3, [r7, #4]
 801900e:	f103 020c 	add.w	r2, r3, #12
 8019012:	4b2f      	ldr	r3, [pc, #188]	@ (80190d0 <mem_free+0x108>)
 8019014:	681b      	ldr	r3, [r3, #0]
 8019016:	429a      	cmp	r2, r3
 8019018:	d90d      	bls.n	8019036 <mem_free+0x6e>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory");
 801901a:	4b29      	ldr	r3, [pc, #164]	@ (80190c0 <mem_free+0xf8>)
 801901c:	f240 227f 	movw	r2, #639	@ 0x27f
 8019020:	492c      	ldr	r1, [pc, #176]	@ (80190d4 <mem_free+0x10c>)
 8019022:	4829      	ldr	r0, [pc, #164]	@ (80190c8 <mem_free+0x100>)
 8019024:	f010 fcda 	bl	80299dc <iprintf>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8019028:	f00d fa42 	bl	80264b0 <sys_arch_protect>
 801902c:	6138      	str	r0, [r7, #16]
 801902e:	6938      	ldr	r0, [r7, #16]
 8019030:	f00d fa4c 	bl	80264cc <sys_arch_unprotect>
    return;
 8019034:	e041      	b.n	80190ba <mem_free+0xf2>
  }
#if MEM_OVERFLOW_CHECK
  mem_overflow_check_element(mem);
#endif
  /* protect the heap from concurrent access */
  LWIP_MEM_FREE_PROTECT();
 8019036:	4828      	ldr	r0, [pc, #160]	@ (80190d8 <mem_free+0x110>)
 8019038:	f00d f9fe 	bl	8026438 <sys_mutex_lock>
  /* mem has to be in a used state */
  if (!mem->used) {
 801903c:	69fb      	ldr	r3, [r7, #28]
 801903e:	7a1b      	ldrb	r3, [r3, #8]
 8019040:	2b00      	cmp	r3, #0
 8019042:	d110      	bne.n	8019066 <mem_free+0x9e>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: double free");
 8019044:	4b1e      	ldr	r3, [pc, #120]	@ (80190c0 <mem_free+0xf8>)
 8019046:	f44f 7223 	mov.w	r2, #652	@ 0x28c
 801904a:	4924      	ldr	r1, [pc, #144]	@ (80190dc <mem_free+0x114>)
 801904c:	481e      	ldr	r0, [pc, #120]	@ (80190c8 <mem_free+0x100>)
 801904e:	f010 fcc5 	bl	80299dc <iprintf>
    LWIP_MEM_FREE_UNPROTECT();
 8019052:	4821      	ldr	r0, [pc, #132]	@ (80190d8 <mem_free+0x110>)
 8019054:	f00d f9ff 	bl	8026456 <sys_mutex_unlock>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: double free?\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8019058:	f00d fa2a 	bl	80264b0 <sys_arch_protect>
 801905c:	6178      	str	r0, [r7, #20]
 801905e:	6978      	ldr	r0, [r7, #20]
 8019060:	f00d fa34 	bl	80264cc <sys_arch_unprotect>
    return;
 8019064:	e029      	b.n	80190ba <mem_free+0xf2>
  }

  if (!mem_link_valid(mem)) {
 8019066:	69f8      	ldr	r0, [r7, #28]
 8019068:	f7ff ff70 	bl	8018f4c <mem_link_valid>
 801906c:	4603      	mov	r3, r0
 801906e:	2b00      	cmp	r3, #0
 8019070:	d110      	bne.n	8019094 <mem_free+0xcc>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: non-linked: double free");
 8019072:	4b13      	ldr	r3, [pc, #76]	@ (80190c0 <mem_free+0xf8>)
 8019074:	f240 2295 	movw	r2, #661	@ 0x295
 8019078:	4919      	ldr	r1, [pc, #100]	@ (80190e0 <mem_free+0x118>)
 801907a:	4813      	ldr	r0, [pc, #76]	@ (80190c8 <mem_free+0x100>)
 801907c:	f010 fcae 	bl	80299dc <iprintf>
    LWIP_MEM_FREE_UNPROTECT();
 8019080:	4815      	ldr	r0, [pc, #84]	@ (80190d8 <mem_free+0x110>)
 8019082:	f00d f9e8 	bl	8026456 <sys_mutex_unlock>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: non-linked: double free?\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8019086:	f00d fa13 	bl	80264b0 <sys_arch_protect>
 801908a:	61b8      	str	r0, [r7, #24]
 801908c:	69b8      	ldr	r0, [r7, #24]
 801908e:	f00d fa1d 	bl	80264cc <sys_arch_unprotect>
    return;
 8019092:	e012      	b.n	80190ba <mem_free+0xf2>
  }

  /* mem is now unused. */
  mem->used = 0;
 8019094:	69fb      	ldr	r3, [r7, #28]
 8019096:	2200      	movs	r2, #0
 8019098:	721a      	strb	r2, [r3, #8]

  if (mem < lfree) {
 801909a:	4b12      	ldr	r3, [pc, #72]	@ (80190e4 <mem_free+0x11c>)
 801909c:	681b      	ldr	r3, [r3, #0]
 801909e:	69fa      	ldr	r2, [r7, #28]
 80190a0:	429a      	cmp	r2, r3
 80190a2:	d202      	bcs.n	80190aa <mem_free+0xe2>
    /* the newly freed struct is now the lowest */
    lfree = mem;
 80190a4:	4a0f      	ldr	r2, [pc, #60]	@ (80190e4 <mem_free+0x11c>)
 80190a6:	69fb      	ldr	r3, [r7, #28]
 80190a8:	6013      	str	r3, [r2, #0]
  }

  MEM_STATS_DEC_USED(used, mem->next - (mem_size_t)(((u8_t *)mem - ram)));

  /* finally, see if prev or next are free also */
  plug_holes(mem);
 80190aa:	69f8      	ldr	r0, [r7, #28]
 80190ac:	f7ff fe5e 	bl	8018d6c <plug_holes>
  MEM_SANITY();
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  mem_free_count = 1;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_FREE_UNPROTECT();
 80190b0:	4809      	ldr	r0, [pc, #36]	@ (80190d8 <mem_free+0x110>)
 80190b2:	f00d f9d0 	bl	8026456 <sys_mutex_unlock>
 80190b6:	e000      	b.n	80190ba <mem_free+0xf2>
    return;
 80190b8:	bf00      	nop
}
 80190ba:	3720      	adds	r7, #32
 80190bc:	46bd      	mov	sp, r7
 80190be:	bd80      	pop	{r7, pc}
 80190c0:	0802dac4 	.word	0x0802dac4
 80190c4:	0802dbb4 	.word	0x0802dbb4
 80190c8:	0802db0c 	.word	0x0802db0c
 80190cc:	24024350 	.word	0x24024350
 80190d0:	24024354 	.word	0x24024354
 80190d4:	0802dbd8 	.word	0x0802dbd8
 80190d8:	24024358 	.word	0x24024358
 80190dc:	0802dbf4 	.word	0x0802dbf4
 80190e0:	0802dc1c 	.word	0x0802dc1c
 80190e4:	2402435c 	.word	0x2402435c

080190e8 <mem_trim>:
 *         or NULL if newsize is > old size, in which case rmem is NOT touched
 *         or freed!
 */
void *
mem_trim(void *rmem, mem_size_t new_size)
{
 80190e8:	b580      	push	{r7, lr}
 80190ea:	b08a      	sub	sp, #40	@ 0x28
 80190ec:	af00      	add	r7, sp, #0
 80190ee:	6078      	str	r0, [r7, #4]
 80190f0:	6039      	str	r1, [r7, #0]
  /* use the FREE_PROTECT here: it protects with sem OR SYS_ARCH_PROTECT */
  LWIP_MEM_FREE_DECL_PROTECT();

  /* Expand the size of the allocated memory region so that we can
     adjust for alignment. */
  newsize = (mem_size_t)LWIP_MEM_ALIGN_SIZE(new_size);
 80190f2:	683b      	ldr	r3, [r7, #0]
 80190f4:	3303      	adds	r3, #3
 80190f6:	f023 0303 	bic.w	r3, r3, #3
 80190fa:	627b      	str	r3, [r7, #36]	@ 0x24
  if (newsize < MIN_SIZE_ALIGNED) {
 80190fc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80190fe:	2b0b      	cmp	r3, #11
 8019100:	d801      	bhi.n	8019106 <mem_trim+0x1e>
    /* every data block must be at least MIN_SIZE_ALIGNED long */
    newsize = MIN_SIZE_ALIGNED;
 8019102:	230c      	movs	r3, #12
 8019104:	627b      	str	r3, [r7, #36]	@ 0x24
  }
#if MEM_OVERFLOW_CHECK
  newsize += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED;
#endif
  if ((newsize > MEM_SIZE_ALIGNED) || (newsize < new_size)) {
 8019106:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019108:	4a6e      	ldr	r2, [pc, #440]	@ (80192c4 <mem_trim+0x1dc>)
 801910a:	4293      	cmp	r3, r2
 801910c:	d803      	bhi.n	8019116 <mem_trim+0x2e>
 801910e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8019110:	683b      	ldr	r3, [r7, #0]
 8019112:	429a      	cmp	r2, r3
 8019114:	d201      	bcs.n	801911a <mem_trim+0x32>
    return NULL;
 8019116:	2300      	movs	r3, #0
 8019118:	e0d0      	b.n	80192bc <mem_trim+0x1d4>
  }

  LWIP_ASSERT("mem_trim: legal memory", (u8_t *)rmem >= (u8_t *)ram &&
 801911a:	4b6b      	ldr	r3, [pc, #428]	@ (80192c8 <mem_trim+0x1e0>)
 801911c:	681b      	ldr	r3, [r3, #0]
 801911e:	687a      	ldr	r2, [r7, #4]
 8019120:	429a      	cmp	r2, r3
 8019122:	d304      	bcc.n	801912e <mem_trim+0x46>
 8019124:	4b69      	ldr	r3, [pc, #420]	@ (80192cc <mem_trim+0x1e4>)
 8019126:	681b      	ldr	r3, [r3, #0]
 8019128:	687a      	ldr	r2, [r7, #4]
 801912a:	429a      	cmp	r2, r3
 801912c:	d306      	bcc.n	801913c <mem_trim+0x54>
 801912e:	4b68      	ldr	r3, [pc, #416]	@ (80192d0 <mem_trim+0x1e8>)
 8019130:	f240 22d1 	movw	r2, #721	@ 0x2d1
 8019134:	4967      	ldr	r1, [pc, #412]	@ (80192d4 <mem_trim+0x1ec>)
 8019136:	4868      	ldr	r0, [pc, #416]	@ (80192d8 <mem_trim+0x1f0>)
 8019138:	f010 fc50 	bl	80299dc <iprintf>
              (u8_t *)rmem < (u8_t *)ram_end);

  if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) {
 801913c:	4b62      	ldr	r3, [pc, #392]	@ (80192c8 <mem_trim+0x1e0>)
 801913e:	681b      	ldr	r3, [r3, #0]
 8019140:	687a      	ldr	r2, [r7, #4]
 8019142:	429a      	cmp	r2, r3
 8019144:	d304      	bcc.n	8019150 <mem_trim+0x68>
 8019146:	4b61      	ldr	r3, [pc, #388]	@ (80192cc <mem_trim+0x1e4>)
 8019148:	681b      	ldr	r3, [r3, #0]
 801914a:	687a      	ldr	r2, [r7, #4]
 801914c:	429a      	cmp	r2, r3
 801914e:	d307      	bcc.n	8019160 <mem_trim+0x78>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_trim: illegal memory\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8019150:	f00d f9ae 	bl	80264b0 <sys_arch_protect>
 8019154:	60b8      	str	r0, [r7, #8]
 8019156:	68b8      	ldr	r0, [r7, #8]
 8019158:	f00d f9b8 	bl	80264cc <sys_arch_unprotect>
    return rmem;
 801915c:	687b      	ldr	r3, [r7, #4]
 801915e:	e0ad      	b.n	80192bc <mem_trim+0x1d4>
  }
  /* Get the corresponding struct mem ... */
  /* cast through void* to get rid of alignment warnings */
  mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET));
 8019160:	687b      	ldr	r3, [r7, #4]
 8019162:	3b0c      	subs	r3, #12
 8019164:	623b      	str	r3, [r7, #32]
#if MEM_OVERFLOW_CHECK
  mem_overflow_check_element(mem);
#endif
  /* ... and its offset pointer */
  ptr = mem_to_ptr(mem);
 8019166:	6a38      	ldr	r0, [r7, #32]
 8019168:	f7ff fdf0 	bl	8018d4c <mem_to_ptr>
 801916c:	61f8      	str	r0, [r7, #28]

  size = (mem_size_t)((mem_size_t)(mem->next - ptr) - (SIZEOF_STRUCT_MEM + MEM_SANITY_OVERHEAD));
 801916e:	6a3b      	ldr	r3, [r7, #32]
 8019170:	681a      	ldr	r2, [r3, #0]
 8019172:	69fb      	ldr	r3, [r7, #28]
 8019174:	1ad3      	subs	r3, r2, r3
 8019176:	3b0c      	subs	r3, #12
 8019178:	61bb      	str	r3, [r7, #24]
  LWIP_ASSERT("mem_trim can only shrink memory", newsize <= size);
 801917a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801917c:	69bb      	ldr	r3, [r7, #24]
 801917e:	429a      	cmp	r2, r3
 8019180:	d906      	bls.n	8019190 <mem_trim+0xa8>
 8019182:	4b53      	ldr	r3, [pc, #332]	@ (80192d0 <mem_trim+0x1e8>)
 8019184:	f44f 7239 	mov.w	r2, #740	@ 0x2e4
 8019188:	4954      	ldr	r1, [pc, #336]	@ (80192dc <mem_trim+0x1f4>)
 801918a:	4853      	ldr	r0, [pc, #332]	@ (80192d8 <mem_trim+0x1f0>)
 801918c:	f010 fc26 	bl	80299dc <iprintf>
  if (newsize > size) {
 8019190:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8019192:	69bb      	ldr	r3, [r7, #24]
 8019194:	429a      	cmp	r2, r3
 8019196:	d901      	bls.n	801919c <mem_trim+0xb4>
    /* not supported */
    return NULL;
 8019198:	2300      	movs	r3, #0
 801919a:	e08f      	b.n	80192bc <mem_trim+0x1d4>
  }
  if (newsize == size) {
 801919c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801919e:	69bb      	ldr	r3, [r7, #24]
 80191a0:	429a      	cmp	r2, r3
 80191a2:	d101      	bne.n	80191a8 <mem_trim+0xc0>
    /* No change in size, simply return */
    return rmem;
 80191a4:	687b      	ldr	r3, [r7, #4]
 80191a6:	e089      	b.n	80192bc <mem_trim+0x1d4>
  }

  /* protect the heap from concurrent access */
  LWIP_MEM_FREE_PROTECT();
 80191a8:	484d      	ldr	r0, [pc, #308]	@ (80192e0 <mem_trim+0x1f8>)
 80191aa:	f00d f945 	bl	8026438 <sys_mutex_lock>

  mem2 = ptr_to_mem(mem->next);
 80191ae:	6a3b      	ldr	r3, [r7, #32]
 80191b0:	681b      	ldr	r3, [r3, #0]
 80191b2:	4618      	mov	r0, r3
 80191b4:	f7ff fdba 	bl	8018d2c <ptr_to_mem>
 80191b8:	6178      	str	r0, [r7, #20]
  if (mem2->used == 0) {
 80191ba:	697b      	ldr	r3, [r7, #20]
 80191bc:	7a1b      	ldrb	r3, [r3, #8]
 80191be:	2b00      	cmp	r3, #0
 80191c0:	d13c      	bne.n	801923c <mem_trim+0x154>
    /* The next struct is unused, we can simply move it at little */
    mem_size_t next;
    LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED);
 80191c2:	6a3b      	ldr	r3, [r7, #32]
 80191c4:	681b      	ldr	r3, [r3, #0]
 80191c6:	4a3f      	ldr	r2, [pc, #252]	@ (80192c4 <mem_trim+0x1dc>)
 80191c8:	4293      	cmp	r3, r2
 80191ca:	d106      	bne.n	80191da <mem_trim+0xf2>
 80191cc:	4b40      	ldr	r3, [pc, #256]	@ (80192d0 <mem_trim+0x1e8>)
 80191ce:	f240 22f5 	movw	r2, #757	@ 0x2f5
 80191d2:	4944      	ldr	r1, [pc, #272]	@ (80192e4 <mem_trim+0x1fc>)
 80191d4:	4840      	ldr	r0, [pc, #256]	@ (80192d8 <mem_trim+0x1f0>)
 80191d6:	f010 fc01 	bl	80299dc <iprintf>
    /* remember the old next pointer */
    next = mem2->next;
 80191da:	697b      	ldr	r3, [r7, #20]
 80191dc:	681b      	ldr	r3, [r3, #0]
 80191de:	60fb      	str	r3, [r7, #12]
    /* create new struct mem which is moved directly after the shrinked mem */
    ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize);
 80191e0:	69fa      	ldr	r2, [r7, #28]
 80191e2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80191e4:	4413      	add	r3, r2
 80191e6:	330c      	adds	r3, #12
 80191e8:	613b      	str	r3, [r7, #16]
    if (lfree == mem2) {
 80191ea:	4b3f      	ldr	r3, [pc, #252]	@ (80192e8 <mem_trim+0x200>)
 80191ec:	681b      	ldr	r3, [r3, #0]
 80191ee:	697a      	ldr	r2, [r7, #20]
 80191f0:	429a      	cmp	r2, r3
 80191f2:	d105      	bne.n	8019200 <mem_trim+0x118>
      lfree = ptr_to_mem(ptr2);
 80191f4:	6938      	ldr	r0, [r7, #16]
 80191f6:	f7ff fd99 	bl	8018d2c <ptr_to_mem>
 80191fa:	4603      	mov	r3, r0
 80191fc:	4a3a      	ldr	r2, [pc, #232]	@ (80192e8 <mem_trim+0x200>)
 80191fe:	6013      	str	r3, [r2, #0]
    }
    mem2 = ptr_to_mem(ptr2);
 8019200:	6938      	ldr	r0, [r7, #16]
 8019202:	f7ff fd93 	bl	8018d2c <ptr_to_mem>
 8019206:	6178      	str	r0, [r7, #20]
    mem2->used = 0;
 8019208:	697b      	ldr	r3, [r7, #20]
 801920a:	2200      	movs	r2, #0
 801920c:	721a      	strb	r2, [r3, #8]
    /* restore the next pointer */
    mem2->next = next;
 801920e:	697b      	ldr	r3, [r7, #20]
 8019210:	68fa      	ldr	r2, [r7, #12]
 8019212:	601a      	str	r2, [r3, #0]
    /* link it back to mem */
    mem2->prev = ptr;
 8019214:	697b      	ldr	r3, [r7, #20]
 8019216:	69fa      	ldr	r2, [r7, #28]
 8019218:	605a      	str	r2, [r3, #4]
    /* link mem to it */
    mem->next = ptr2;
 801921a:	6a3b      	ldr	r3, [r7, #32]
 801921c:	693a      	ldr	r2, [r7, #16]
 801921e:	601a      	str	r2, [r3, #0]
    /* last thing to restore linked list: as we have moved mem2,
     * let 'mem2->next->prev' point to mem2 again. but only if mem2->next is not
     * the end of the heap */
    if (mem2->next != MEM_SIZE_ALIGNED) {
 8019220:	697b      	ldr	r3, [r7, #20]
 8019222:	681b      	ldr	r3, [r3, #0]
 8019224:	4a27      	ldr	r2, [pc, #156]	@ (80192c4 <mem_trim+0x1dc>)
 8019226:	4293      	cmp	r3, r2
 8019228:	d044      	beq.n	80192b4 <mem_trim+0x1cc>
      ptr_to_mem(mem2->next)->prev = ptr2;
 801922a:	697b      	ldr	r3, [r7, #20]
 801922c:	681b      	ldr	r3, [r3, #0]
 801922e:	4618      	mov	r0, r3
 8019230:	f7ff fd7c 	bl	8018d2c <ptr_to_mem>
 8019234:	4602      	mov	r2, r0
 8019236:	693b      	ldr	r3, [r7, #16]
 8019238:	6053      	str	r3, [r2, #4]
 801923a:	e03b      	b.n	80192b4 <mem_trim+0x1cc>
    }
    MEM_STATS_DEC_USED(used, (size - newsize));
    /* no need to plug holes, we've already done that */
  } else if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED <= size) {
 801923c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801923e:	3318      	adds	r3, #24
 8019240:	69ba      	ldr	r2, [r7, #24]
 8019242:	429a      	cmp	r2, r3
 8019244:	d336      	bcc.n	80192b4 <mem_trim+0x1cc>
     * Old size ('size') must be big enough to contain at least 'newsize' plus a struct mem
     * ('SIZEOF_STRUCT_MEM') with some data ('MIN_SIZE_ALIGNED').
     * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
     *       region that couldn't hold data, but when mem->next gets freed,
     *       the 2 regions would be combined, resulting in more free memory */
    ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize);
 8019246:	69fa      	ldr	r2, [r7, #28]
 8019248:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801924a:	4413      	add	r3, r2
 801924c:	330c      	adds	r3, #12
 801924e:	613b      	str	r3, [r7, #16]
    LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED);
 8019250:	6a3b      	ldr	r3, [r7, #32]
 8019252:	681b      	ldr	r3, [r3, #0]
 8019254:	4a1b      	ldr	r2, [pc, #108]	@ (80192c4 <mem_trim+0x1dc>)
 8019256:	4293      	cmp	r3, r2
 8019258:	d106      	bne.n	8019268 <mem_trim+0x180>
 801925a:	4b1d      	ldr	r3, [pc, #116]	@ (80192d0 <mem_trim+0x1e8>)
 801925c:	f240 3216 	movw	r2, #790	@ 0x316
 8019260:	4920      	ldr	r1, [pc, #128]	@ (80192e4 <mem_trim+0x1fc>)
 8019262:	481d      	ldr	r0, [pc, #116]	@ (80192d8 <mem_trim+0x1f0>)
 8019264:	f010 fbba 	bl	80299dc <iprintf>
    mem2 = ptr_to_mem(ptr2);
 8019268:	6938      	ldr	r0, [r7, #16]
 801926a:	f7ff fd5f 	bl	8018d2c <ptr_to_mem>
 801926e:	6178      	str	r0, [r7, #20]
    if (mem2 < lfree) {
 8019270:	4b1d      	ldr	r3, [pc, #116]	@ (80192e8 <mem_trim+0x200>)
 8019272:	681b      	ldr	r3, [r3, #0]
 8019274:	697a      	ldr	r2, [r7, #20]
 8019276:	429a      	cmp	r2, r3
 8019278:	d202      	bcs.n	8019280 <mem_trim+0x198>
      lfree = mem2;
 801927a:	4a1b      	ldr	r2, [pc, #108]	@ (80192e8 <mem_trim+0x200>)
 801927c:	697b      	ldr	r3, [r7, #20]
 801927e:	6013      	str	r3, [r2, #0]
    }
    mem2->used = 0;
 8019280:	697b      	ldr	r3, [r7, #20]
 8019282:	2200      	movs	r2, #0
 8019284:	721a      	strb	r2, [r3, #8]
    mem2->next = mem->next;
 8019286:	6a3b      	ldr	r3, [r7, #32]
 8019288:	681a      	ldr	r2, [r3, #0]
 801928a:	697b      	ldr	r3, [r7, #20]
 801928c:	601a      	str	r2, [r3, #0]
    mem2->prev = ptr;
 801928e:	697b      	ldr	r3, [r7, #20]
 8019290:	69fa      	ldr	r2, [r7, #28]
 8019292:	605a      	str	r2, [r3, #4]
    mem->next = ptr2;
 8019294:	6a3b      	ldr	r3, [r7, #32]
 8019296:	693a      	ldr	r2, [r7, #16]
 8019298:	601a      	str	r2, [r3, #0]
    if (mem2->next != MEM_SIZE_ALIGNED) {
 801929a:	697b      	ldr	r3, [r7, #20]
 801929c:	681b      	ldr	r3, [r3, #0]
 801929e:	4a09      	ldr	r2, [pc, #36]	@ (80192c4 <mem_trim+0x1dc>)
 80192a0:	4293      	cmp	r3, r2
 80192a2:	d007      	beq.n	80192b4 <mem_trim+0x1cc>
      ptr_to_mem(mem2->next)->prev = ptr2;
 80192a4:	697b      	ldr	r3, [r7, #20]
 80192a6:	681b      	ldr	r3, [r3, #0]
 80192a8:	4618      	mov	r0, r3
 80192aa:	f7ff fd3f 	bl	8018d2c <ptr_to_mem>
 80192ae:	4602      	mov	r2, r0
 80192b0:	693b      	ldr	r3, [r7, #16]
 80192b2:	6053      	str	r3, [r2, #4]
#endif
  MEM_SANITY();
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  mem_free_count = 1;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_FREE_UNPROTECT();
 80192b4:	480a      	ldr	r0, [pc, #40]	@ (80192e0 <mem_trim+0x1f8>)
 80192b6:	f00d f8ce 	bl	8026456 <sys_mutex_unlock>
  return rmem;
 80192ba:	687b      	ldr	r3, [r7, #4]
}
 80192bc:	4618      	mov	r0, r3
 80192be:	3728      	adds	r7, #40	@ 0x28
 80192c0:	46bd      	mov	sp, r7
 80192c2:	bd80      	pop	{r7, pc}
 80192c4:	0001ffe8 	.word	0x0001ffe8
 80192c8:	24024350 	.word	0x24024350
 80192cc:	24024354 	.word	0x24024354
 80192d0:	0802dac4 	.word	0x0802dac4
 80192d4:	0802dc50 	.word	0x0802dc50
 80192d8:	0802db0c 	.word	0x0802db0c
 80192dc:	0802dc68 	.word	0x0802dc68
 80192e0:	24024358 	.word	0x24024358
 80192e4:	0802dc88 	.word	0x0802dc88
 80192e8:	2402435c 	.word	0x2402435c

080192ec <mem_malloc>:
 *
 * Note that the returned value will always be aligned (as defined by MEM_ALIGNMENT).
 */
void *
mem_malloc(mem_size_t size_in)
{
 80192ec:	b580      	push	{r7, lr}
 80192ee:	b088      	sub	sp, #32
 80192f0:	af00      	add	r7, sp, #0
 80192f2:	6078      	str	r0, [r7, #4]
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  u8_t local_mem_free_count = 0;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_ALLOC_DECL_PROTECT();

  if (size_in == 0) {
 80192f4:	687b      	ldr	r3, [r7, #4]
 80192f6:	2b00      	cmp	r3, #0
 80192f8:	d101      	bne.n	80192fe <mem_malloc+0x12>
    return NULL;
 80192fa:	2300      	movs	r3, #0
 80192fc:	e0d9      	b.n	80194b2 <mem_malloc+0x1c6>
  }

  /* Expand the size of the allocated memory region so that we can
     adjust for alignment. */
  size = (mem_size_t)LWIP_MEM_ALIGN_SIZE(size_in);
 80192fe:	687b      	ldr	r3, [r7, #4]
 8019300:	3303      	adds	r3, #3
 8019302:	f023 0303 	bic.w	r3, r3, #3
 8019306:	61bb      	str	r3, [r7, #24]
  if (size < MIN_SIZE_ALIGNED) {
 8019308:	69bb      	ldr	r3, [r7, #24]
 801930a:	2b0b      	cmp	r3, #11
 801930c:	d801      	bhi.n	8019312 <mem_malloc+0x26>
    /* every data block must be at least MIN_SIZE_ALIGNED long */
    size = MIN_SIZE_ALIGNED;
 801930e:	230c      	movs	r3, #12
 8019310:	61bb      	str	r3, [r7, #24]
  }
#if MEM_OVERFLOW_CHECK
  size += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED;
#endif
  if ((size > MEM_SIZE_ALIGNED) || (size < size_in)) {
 8019312:	69bb      	ldr	r3, [r7, #24]
 8019314:	4a69      	ldr	r2, [pc, #420]	@ (80194bc <mem_malloc+0x1d0>)
 8019316:	4293      	cmp	r3, r2
 8019318:	d803      	bhi.n	8019322 <mem_malloc+0x36>
 801931a:	69ba      	ldr	r2, [r7, #24]
 801931c:	687b      	ldr	r3, [r7, #4]
 801931e:	429a      	cmp	r2, r3
 8019320:	d201      	bcs.n	8019326 <mem_malloc+0x3a>
    return NULL;
 8019322:	2300      	movs	r3, #0
 8019324:	e0c5      	b.n	80194b2 <mem_malloc+0x1c6>
  }

  /* protect the heap from concurrent access */
  sys_mutex_lock(&mem_mutex);
 8019326:	4866      	ldr	r0, [pc, #408]	@ (80194c0 <mem_malloc+0x1d4>)
 8019328:	f00d f886 	bl	8026438 <sys_mutex_lock>
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */

    /* Scan through the heap searching for a free block that is big enough,
     * beginning with the lowest free block.
     */
    for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size;
 801932c:	4b65      	ldr	r3, [pc, #404]	@ (80194c4 <mem_malloc+0x1d8>)
 801932e:	681b      	ldr	r3, [r3, #0]
 8019330:	4618      	mov	r0, r3
 8019332:	f7ff fd0b 	bl	8018d4c <mem_to_ptr>
 8019336:	61f8      	str	r0, [r7, #28]
 8019338:	e0b0      	b.n	801949c <mem_malloc+0x1b0>
         ptr = ptr_to_mem(ptr)->next) {
      mem = ptr_to_mem(ptr);
 801933a:	69f8      	ldr	r0, [r7, #28]
 801933c:	f7ff fcf6 	bl	8018d2c <ptr_to_mem>
 8019340:	6138      	str	r0, [r7, #16]
        local_mem_free_count = 1;
        break;
      }
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */

      if ((!mem->used) &&
 8019342:	693b      	ldr	r3, [r7, #16]
 8019344:	7a1b      	ldrb	r3, [r3, #8]
 8019346:	2b00      	cmp	r3, #0
 8019348:	f040 80a2 	bne.w	8019490 <mem_malloc+0x1a4>
          (mem->next - (ptr + SIZEOF_STRUCT_MEM)) >= size) {
 801934c:	693b      	ldr	r3, [r7, #16]
 801934e:	681a      	ldr	r2, [r3, #0]
 8019350:	69fb      	ldr	r3, [r7, #28]
 8019352:	1ad3      	subs	r3, r2, r3
 8019354:	3b0c      	subs	r3, #12
      if ((!mem->used) &&
 8019356:	69ba      	ldr	r2, [r7, #24]
 8019358:	429a      	cmp	r2, r3
 801935a:	f200 8099 	bhi.w	8019490 <mem_malloc+0x1a4>
        /* mem is not used and at least perfect fit is possible:
         * mem->next - (ptr + SIZEOF_STRUCT_MEM) gives us the 'user data size' of mem */

        if (mem->next - (ptr + SIZEOF_STRUCT_MEM) >= (size + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED)) {
 801935e:	693b      	ldr	r3, [r7, #16]
 8019360:	681a      	ldr	r2, [r3, #0]
 8019362:	69fb      	ldr	r3, [r7, #28]
 8019364:	1ad3      	subs	r3, r2, r3
 8019366:	f1a3 020c 	sub.w	r2, r3, #12
 801936a:	69bb      	ldr	r3, [r7, #24]
 801936c:	3318      	adds	r3, #24
 801936e:	429a      	cmp	r2, r3
 8019370:	d331      	bcc.n	80193d6 <mem_malloc+0xea>
           * struct mem would fit in but no data between mem2 and mem2->next
           * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
           *       region that couldn't hold data, but when mem->next gets freed,
           *       the 2 regions would be combined, resulting in more free memory
           */
          ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + size);
 8019372:	69fa      	ldr	r2, [r7, #28]
 8019374:	69bb      	ldr	r3, [r7, #24]
 8019376:	4413      	add	r3, r2
 8019378:	330c      	adds	r3, #12
 801937a:	60fb      	str	r3, [r7, #12]
          LWIP_ASSERT("invalid next ptr",ptr2 != MEM_SIZE_ALIGNED);
 801937c:	68fb      	ldr	r3, [r7, #12]
 801937e:	4a4f      	ldr	r2, [pc, #316]	@ (80194bc <mem_malloc+0x1d0>)
 8019380:	4293      	cmp	r3, r2
 8019382:	d106      	bne.n	8019392 <mem_malloc+0xa6>
 8019384:	4b50      	ldr	r3, [pc, #320]	@ (80194c8 <mem_malloc+0x1dc>)
 8019386:	f240 3287 	movw	r2, #903	@ 0x387
 801938a:	4950      	ldr	r1, [pc, #320]	@ (80194cc <mem_malloc+0x1e0>)
 801938c:	4850      	ldr	r0, [pc, #320]	@ (80194d0 <mem_malloc+0x1e4>)
 801938e:	f010 fb25 	bl	80299dc <iprintf>
          /* create mem2 struct */
          mem2 = ptr_to_mem(ptr2);
 8019392:	68f8      	ldr	r0, [r7, #12]
 8019394:	f7ff fcca 	bl	8018d2c <ptr_to_mem>
 8019398:	60b8      	str	r0, [r7, #8]
          mem2->used = 0;
 801939a:	68bb      	ldr	r3, [r7, #8]
 801939c:	2200      	movs	r2, #0
 801939e:	721a      	strb	r2, [r3, #8]
          mem2->next = mem->next;
 80193a0:	693b      	ldr	r3, [r7, #16]
 80193a2:	681a      	ldr	r2, [r3, #0]
 80193a4:	68bb      	ldr	r3, [r7, #8]
 80193a6:	601a      	str	r2, [r3, #0]
          mem2->prev = ptr;
 80193a8:	68bb      	ldr	r3, [r7, #8]
 80193aa:	69fa      	ldr	r2, [r7, #28]
 80193ac:	605a      	str	r2, [r3, #4]
          /* and insert it between mem and mem->next */
          mem->next = ptr2;
 80193ae:	693b      	ldr	r3, [r7, #16]
 80193b0:	68fa      	ldr	r2, [r7, #12]
 80193b2:	601a      	str	r2, [r3, #0]
          mem->used = 1;
 80193b4:	693b      	ldr	r3, [r7, #16]
 80193b6:	2201      	movs	r2, #1
 80193b8:	721a      	strb	r2, [r3, #8]

          if (mem2->next != MEM_SIZE_ALIGNED) {
 80193ba:	68bb      	ldr	r3, [r7, #8]
 80193bc:	681b      	ldr	r3, [r3, #0]
 80193be:	4a3f      	ldr	r2, [pc, #252]	@ (80194bc <mem_malloc+0x1d0>)
 80193c0:	4293      	cmp	r3, r2
 80193c2:	d00b      	beq.n	80193dc <mem_malloc+0xf0>
            ptr_to_mem(mem2->next)->prev = ptr2;
 80193c4:	68bb      	ldr	r3, [r7, #8]
 80193c6:	681b      	ldr	r3, [r3, #0]
 80193c8:	4618      	mov	r0, r3
 80193ca:	f7ff fcaf 	bl	8018d2c <ptr_to_mem>
 80193ce:	4602      	mov	r2, r0
 80193d0:	68fb      	ldr	r3, [r7, #12]
 80193d2:	6053      	str	r3, [r2, #4]
 80193d4:	e002      	b.n	80193dc <mem_malloc+0xf0>
           * take care of this).
           * -> near fit or exact fit: do not split, no mem2 creation
           * also can't move mem->next directly behind mem, since mem->next
           * will always be used at this point!
           */
          mem->used = 1;
 80193d6:	693b      	ldr	r3, [r7, #16]
 80193d8:	2201      	movs	r2, #1
 80193da:	721a      	strb	r2, [r3, #8]
          MEM_STATS_INC_USED(used, mem->next - mem_to_ptr(mem));
        }
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
mem_malloc_adjust_lfree:
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
        if (mem == lfree) {
 80193dc:	4b39      	ldr	r3, [pc, #228]	@ (80194c4 <mem_malloc+0x1d8>)
 80193de:	681b      	ldr	r3, [r3, #0]
 80193e0:	693a      	ldr	r2, [r7, #16]
 80193e2:	429a      	cmp	r2, r3
 80193e4:	d127      	bne.n	8019436 <mem_malloc+0x14a>
          struct mem *cur = lfree;
 80193e6:	4b37      	ldr	r3, [pc, #220]	@ (80194c4 <mem_malloc+0x1d8>)
 80193e8:	681b      	ldr	r3, [r3, #0]
 80193ea:	617b      	str	r3, [r7, #20]
          /* Find next free block after mem and update lowest free pointer */
          while (cur->used && cur != ram_end) {
 80193ec:	e005      	b.n	80193fa <mem_malloc+0x10e>
              /* If mem_free or mem_trim have run, we have to restart since they
                 could have altered our current struct mem or lfree. */
              goto mem_malloc_adjust_lfree;
            }
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
            cur = ptr_to_mem(cur->next);
 80193ee:	697b      	ldr	r3, [r7, #20]
 80193f0:	681b      	ldr	r3, [r3, #0]
 80193f2:	4618      	mov	r0, r3
 80193f4:	f7ff fc9a 	bl	8018d2c <ptr_to_mem>
 80193f8:	6178      	str	r0, [r7, #20]
          while (cur->used && cur != ram_end) {
 80193fa:	697b      	ldr	r3, [r7, #20]
 80193fc:	7a1b      	ldrb	r3, [r3, #8]
 80193fe:	2b00      	cmp	r3, #0
 8019400:	d004      	beq.n	801940c <mem_malloc+0x120>
 8019402:	4b34      	ldr	r3, [pc, #208]	@ (80194d4 <mem_malloc+0x1e8>)
 8019404:	681b      	ldr	r3, [r3, #0]
 8019406:	697a      	ldr	r2, [r7, #20]
 8019408:	429a      	cmp	r2, r3
 801940a:	d1f0      	bne.n	80193ee <mem_malloc+0x102>
          }
          lfree = cur;
 801940c:	4a2d      	ldr	r2, [pc, #180]	@ (80194c4 <mem_malloc+0x1d8>)
 801940e:	697b      	ldr	r3, [r7, #20]
 8019410:	6013      	str	r3, [r2, #0]
          LWIP_ASSERT("mem_malloc: !lfree->used", ((lfree == ram_end) || (!lfree->used)));
 8019412:	4b2c      	ldr	r3, [pc, #176]	@ (80194c4 <mem_malloc+0x1d8>)
 8019414:	681a      	ldr	r2, [r3, #0]
 8019416:	4b2f      	ldr	r3, [pc, #188]	@ (80194d4 <mem_malloc+0x1e8>)
 8019418:	681b      	ldr	r3, [r3, #0]
 801941a:	429a      	cmp	r2, r3
 801941c:	d00b      	beq.n	8019436 <mem_malloc+0x14a>
 801941e:	4b29      	ldr	r3, [pc, #164]	@ (80194c4 <mem_malloc+0x1d8>)
 8019420:	681b      	ldr	r3, [r3, #0]
 8019422:	7a1b      	ldrb	r3, [r3, #8]
 8019424:	2b00      	cmp	r3, #0
 8019426:	d006      	beq.n	8019436 <mem_malloc+0x14a>
 8019428:	4b27      	ldr	r3, [pc, #156]	@ (80194c8 <mem_malloc+0x1dc>)
 801942a:	f240 32b5 	movw	r2, #949	@ 0x3b5
 801942e:	492a      	ldr	r1, [pc, #168]	@ (80194d8 <mem_malloc+0x1ec>)
 8019430:	4827      	ldr	r0, [pc, #156]	@ (80194d0 <mem_malloc+0x1e4>)
 8019432:	f010 fad3 	bl	80299dc <iprintf>
        }
        LWIP_MEM_ALLOC_UNPROTECT();
        sys_mutex_unlock(&mem_mutex);
 8019436:	4822      	ldr	r0, [pc, #136]	@ (80194c0 <mem_malloc+0x1d4>)
 8019438:	f00d f80d 	bl	8026456 <sys_mutex_unlock>
        LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.",
 801943c:	693a      	ldr	r2, [r7, #16]
 801943e:	69bb      	ldr	r3, [r7, #24]
 8019440:	4413      	add	r3, r2
 8019442:	330c      	adds	r3, #12
 8019444:	4a23      	ldr	r2, [pc, #140]	@ (80194d4 <mem_malloc+0x1e8>)
 8019446:	6812      	ldr	r2, [r2, #0]
 8019448:	4293      	cmp	r3, r2
 801944a:	d906      	bls.n	801945a <mem_malloc+0x16e>
 801944c:	4b1e      	ldr	r3, [pc, #120]	@ (80194c8 <mem_malloc+0x1dc>)
 801944e:	f240 32b9 	movw	r2, #953	@ 0x3b9
 8019452:	4922      	ldr	r1, [pc, #136]	@ (80194dc <mem_malloc+0x1f0>)
 8019454:	481e      	ldr	r0, [pc, #120]	@ (80194d0 <mem_malloc+0x1e4>)
 8019456:	f010 fac1 	bl	80299dc <iprintf>
                    (mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end);
        LWIP_ASSERT("mem_malloc: allocated memory properly aligned.",
 801945a:	693b      	ldr	r3, [r7, #16]
 801945c:	f003 0303 	and.w	r3, r3, #3
 8019460:	2b00      	cmp	r3, #0
 8019462:	d006      	beq.n	8019472 <mem_malloc+0x186>
 8019464:	4b18      	ldr	r3, [pc, #96]	@ (80194c8 <mem_malloc+0x1dc>)
 8019466:	f240 32bb 	movw	r2, #955	@ 0x3bb
 801946a:	491d      	ldr	r1, [pc, #116]	@ (80194e0 <mem_malloc+0x1f4>)
 801946c:	4818      	ldr	r0, [pc, #96]	@ (80194d0 <mem_malloc+0x1e4>)
 801946e:	f010 fab5 	bl	80299dc <iprintf>
                    ((mem_ptr_t)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0);
        LWIP_ASSERT("mem_malloc: sanity check alignment",
 8019472:	693b      	ldr	r3, [r7, #16]
 8019474:	f003 0303 	and.w	r3, r3, #3
 8019478:	2b00      	cmp	r3, #0
 801947a:	d006      	beq.n	801948a <mem_malloc+0x19e>
 801947c:	4b12      	ldr	r3, [pc, #72]	@ (80194c8 <mem_malloc+0x1dc>)
 801947e:	f240 32bd 	movw	r2, #957	@ 0x3bd
 8019482:	4918      	ldr	r1, [pc, #96]	@ (80194e4 <mem_malloc+0x1f8>)
 8019484:	4812      	ldr	r0, [pc, #72]	@ (80194d0 <mem_malloc+0x1e4>)
 8019486:	f010 faa9 	bl	80299dc <iprintf>

#if MEM_OVERFLOW_CHECK
        mem_overflow_init_element(mem, size_in);
#endif
        MEM_SANITY();
        return (u8_t *)mem + SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET;
 801948a:	693b      	ldr	r3, [r7, #16]
 801948c:	330c      	adds	r3, #12
 801948e:	e010      	b.n	80194b2 <mem_malloc+0x1c6>
         ptr = ptr_to_mem(ptr)->next) {
 8019490:	69f8      	ldr	r0, [r7, #28]
 8019492:	f7ff fc4b 	bl	8018d2c <ptr_to_mem>
 8019496:	4603      	mov	r3, r0
 8019498:	681b      	ldr	r3, [r3, #0]
 801949a:	61fb      	str	r3, [r7, #28]
    for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size;
 801949c:	69ba      	ldr	r2, [r7, #24]
 801949e:	4b07      	ldr	r3, [pc, #28]	@ (80194bc <mem_malloc+0x1d0>)
 80194a0:	1a9b      	subs	r3, r3, r2
 80194a2:	69fa      	ldr	r2, [r7, #28]
 80194a4:	429a      	cmp	r2, r3
 80194a6:	f4ff af48 	bcc.w	801933a <mem_malloc+0x4e>
    /* if we got interrupted by a mem_free, try again */
  } while (local_mem_free_count != 0);
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  MEM_STATS_INC(err);
  LWIP_MEM_ALLOC_UNPROTECT();
  sys_mutex_unlock(&mem_mutex);
 80194aa:	4805      	ldr	r0, [pc, #20]	@ (80194c0 <mem_malloc+0x1d4>)
 80194ac:	f00c ffd3 	bl	8026456 <sys_mutex_unlock>
  LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size));
  return NULL;
 80194b0:	2300      	movs	r3, #0
}
 80194b2:	4618      	mov	r0, r3
 80194b4:	3720      	adds	r7, #32
 80194b6:	46bd      	mov	sp, r7
 80194b8:	bd80      	pop	{r7, pc}
 80194ba:	bf00      	nop
 80194bc:	0001ffe8 	.word	0x0001ffe8
 80194c0:	24024358 	.word	0x24024358
 80194c4:	2402435c 	.word	0x2402435c
 80194c8:	0802dac4 	.word	0x0802dac4
 80194cc:	0802dc88 	.word	0x0802dc88
 80194d0:	0802db0c 	.word	0x0802db0c
 80194d4:	24024354 	.word	0x24024354
 80194d8:	0802dc9c 	.word	0x0802dc9c
 80194dc:	0802dcb8 	.word	0x0802dcb8
 80194e0:	0802dce8 	.word	0x0802dce8
 80194e4:	0802dd18 	.word	0x0802dd18

080194e8 <memp_init_pool>:
 *
 * @param desc pool to initialize
 */
void
memp_init_pool(const struct memp_desc *desc)
{
 80194e8:	b480      	push	{r7}
 80194ea:	b085      	sub	sp, #20
 80194ec:	af00      	add	r7, sp, #0
 80194ee:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(desc);
#else
  int i;
  struct memp *memp;

  *desc->tab = NULL;
 80194f0:	687b      	ldr	r3, [r7, #4]
 80194f2:	68db      	ldr	r3, [r3, #12]
 80194f4:	2200      	movs	r2, #0
 80194f6:	601a      	str	r2, [r3, #0]
  memp = (struct memp *)LWIP_MEM_ALIGN(desc->base);
 80194f8:	687b      	ldr	r3, [r7, #4]
 80194fa:	689b      	ldr	r3, [r3, #8]
 80194fc:	3303      	adds	r3, #3
 80194fe:	f023 0303 	bic.w	r3, r3, #3
 8019502:	60bb      	str	r3, [r7, #8]
                                       + MEM_SANITY_REGION_AFTER_ALIGNED
#endif
                                      ));
#endif
  /* create a linked list of memp elements */
  for (i = 0; i < desc->num; ++i) {
 8019504:	2300      	movs	r3, #0
 8019506:	60fb      	str	r3, [r7, #12]
 8019508:	e011      	b.n	801952e <memp_init_pool+0x46>
    memp->next = *desc->tab;
 801950a:	687b      	ldr	r3, [r7, #4]
 801950c:	68db      	ldr	r3, [r3, #12]
 801950e:	681a      	ldr	r2, [r3, #0]
 8019510:	68bb      	ldr	r3, [r7, #8]
 8019512:	601a      	str	r2, [r3, #0]
    *desc->tab = memp;
 8019514:	687b      	ldr	r3, [r7, #4]
 8019516:	68db      	ldr	r3, [r3, #12]
 8019518:	68ba      	ldr	r2, [r7, #8]
 801951a:	601a      	str	r2, [r3, #0]
#if MEMP_OVERFLOW_CHECK
    memp_overflow_init_element(memp, desc);
#endif /* MEMP_OVERFLOW_CHECK */
    /* cast through void* to get rid of alignment warnings */
    memp = (struct memp *)(void *)((u8_t *)memp + MEMP_SIZE + desc->size
 801951c:	687b      	ldr	r3, [r7, #4]
 801951e:	889b      	ldrh	r3, [r3, #4]
 8019520:	461a      	mov	r2, r3
 8019522:	68bb      	ldr	r3, [r7, #8]
 8019524:	4413      	add	r3, r2
 8019526:	60bb      	str	r3, [r7, #8]
  for (i = 0; i < desc->num; ++i) {
 8019528:	68fb      	ldr	r3, [r7, #12]
 801952a:	3301      	adds	r3, #1
 801952c:	60fb      	str	r3, [r7, #12]
 801952e:	687b      	ldr	r3, [r7, #4]
 8019530:	88db      	ldrh	r3, [r3, #6]
 8019532:	461a      	mov	r2, r3
 8019534:	68fb      	ldr	r3, [r7, #12]
 8019536:	4293      	cmp	r3, r2
 8019538:	dbe7      	blt.n	801950a <memp_init_pool+0x22>
#endif /* !MEMP_MEM_MALLOC */

#if MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY)
  desc->stats->name  = desc->desc;
#endif /* MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY) */
}
 801953a:	bf00      	nop
 801953c:	bf00      	nop
 801953e:	3714      	adds	r7, #20
 8019540:	46bd      	mov	sp, r7
 8019542:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019546:	4770      	bx	lr

08019548 <memp_init>:
 *
 * Carves out memp_memory into linked lists for each pool-type.
 */
void
memp_init(void)
{
 8019548:	b580      	push	{r7, lr}
 801954a:	b082      	sub	sp, #8
 801954c:	af00      	add	r7, sp, #0
  u16_t i;

  /* for every pool: */
  for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) {
 801954e:	2300      	movs	r3, #0
 8019550:	80fb      	strh	r3, [r7, #6]
 8019552:	e009      	b.n	8019568 <memp_init+0x20>
    memp_init_pool(memp_pools[i]);
 8019554:	88fb      	ldrh	r3, [r7, #6]
 8019556:	4a08      	ldr	r2, [pc, #32]	@ (8019578 <memp_init+0x30>)
 8019558:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801955c:	4618      	mov	r0, r3
 801955e:	f7ff ffc3 	bl	80194e8 <memp_init_pool>
  for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) {
 8019562:	88fb      	ldrh	r3, [r7, #6]
 8019564:	3301      	adds	r3, #1
 8019566:	80fb      	strh	r3, [r7, #6]
 8019568:	88fb      	ldrh	r3, [r7, #6]
 801956a:	2b0c      	cmp	r3, #12
 801956c:	d9f2      	bls.n	8019554 <memp_init+0xc>

#if MEMP_OVERFLOW_CHECK >= 2
  /* check everything a first time to see if it worked */
  memp_overflow_check_all();
#endif /* MEMP_OVERFLOW_CHECK >= 2 */
}
 801956e:	bf00      	nop
 8019570:	bf00      	nop
 8019572:	3708      	adds	r7, #8
 8019574:	46bd      	mov	sp, r7
 8019576:	bd80      	pop	{r7, pc}
 8019578:	08030be4 	.word	0x08030be4

0801957c <do_memp_malloc_pool>:
#if !MEMP_OVERFLOW_CHECK
do_memp_malloc_pool(const struct memp_desc *desc)
#else
do_memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line)
#endif
{
 801957c:	b580      	push	{r7, lr}
 801957e:	b084      	sub	sp, #16
 8019580:	af00      	add	r7, sp, #0
 8019582:	6078      	str	r0, [r7, #4]

#if MEMP_MEM_MALLOC
  memp = (struct memp *)mem_malloc(MEMP_SIZE + MEMP_ALIGN_SIZE(desc->size));
  SYS_ARCH_PROTECT(old_level);
#else /* MEMP_MEM_MALLOC */
  SYS_ARCH_PROTECT(old_level);
 8019584:	f00c ff94 	bl	80264b0 <sys_arch_protect>
 8019588:	60f8      	str	r0, [r7, #12]

  memp = *desc->tab;
 801958a:	687b      	ldr	r3, [r7, #4]
 801958c:	68db      	ldr	r3, [r3, #12]
 801958e:	681b      	ldr	r3, [r3, #0]
 8019590:	60bb      	str	r3, [r7, #8]
#endif /* MEMP_MEM_MALLOC */

  if (memp != NULL) {
 8019592:	68bb      	ldr	r3, [r7, #8]
 8019594:	2b00      	cmp	r3, #0
 8019596:	d015      	beq.n	80195c4 <do_memp_malloc_pool+0x48>
#if !MEMP_MEM_MALLOC
#if MEMP_OVERFLOW_CHECK == 1
    memp_overflow_check_element(memp, desc);
#endif /* MEMP_OVERFLOW_CHECK */

    *desc->tab = memp->next;
 8019598:	687b      	ldr	r3, [r7, #4]
 801959a:	68db      	ldr	r3, [r3, #12]
 801959c:	68ba      	ldr	r2, [r7, #8]
 801959e:	6812      	ldr	r2, [r2, #0]
 80195a0:	601a      	str	r2, [r3, #0]
    memp->line = line;
#if MEMP_MEM_MALLOC
    memp_overflow_init_element(memp, desc);
#endif /* MEMP_MEM_MALLOC */
#endif /* MEMP_OVERFLOW_CHECK */
    LWIP_ASSERT("memp_malloc: memp properly aligned",
 80195a2:	68bb      	ldr	r3, [r7, #8]
 80195a4:	f003 0303 	and.w	r3, r3, #3
 80195a8:	2b00      	cmp	r3, #0
 80195aa:	d006      	beq.n	80195ba <do_memp_malloc_pool+0x3e>
 80195ac:	4b09      	ldr	r3, [pc, #36]	@ (80195d4 <do_memp_malloc_pool+0x58>)
 80195ae:	f44f 728c 	mov.w	r2, #280	@ 0x118
 80195b2:	4909      	ldr	r1, [pc, #36]	@ (80195d8 <do_memp_malloc_pool+0x5c>)
 80195b4:	4809      	ldr	r0, [pc, #36]	@ (80195dc <do_memp_malloc_pool+0x60>)
 80195b6:	f010 fa11 	bl	80299dc <iprintf>
    desc->stats->used++;
    if (desc->stats->used > desc->stats->max) {
      desc->stats->max = desc->stats->used;
    }
#endif
    SYS_ARCH_UNPROTECT(old_level);
 80195ba:	68f8      	ldr	r0, [r7, #12]
 80195bc:	f00c ff86 	bl	80264cc <sys_arch_unprotect>
    /* cast through u8_t* to get rid of alignment warnings */
    return ((u8_t *)memp + MEMP_SIZE);
 80195c0:	68bb      	ldr	r3, [r7, #8]
 80195c2:	e003      	b.n	80195cc <do_memp_malloc_pool+0x50>
  } else {
#if MEMP_STATS
    desc->stats->err++;
#endif
    SYS_ARCH_UNPROTECT(old_level);
 80195c4:	68f8      	ldr	r0, [r7, #12]
 80195c6:	f00c ff81 	bl	80264cc <sys_arch_unprotect>
    LWIP_DEBUGF(MEMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("memp_malloc: out of memory in pool %s\n", desc->desc));
  }

  return NULL;
 80195ca:	2300      	movs	r3, #0
}
 80195cc:	4618      	mov	r0, r3
 80195ce:	3710      	adds	r7, #16
 80195d0:	46bd      	mov	sp, r7
 80195d2:	bd80      	pop	{r7, pc}
 80195d4:	0802ddd4 	.word	0x0802ddd4
 80195d8:	0802de04 	.word	0x0802de04
 80195dc:	0802de28 	.word	0x0802de28

080195e0 <memp_malloc_pool>:
#if !MEMP_OVERFLOW_CHECK
memp_malloc_pool(const struct memp_desc *desc)
#else
memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line)
#endif
{
 80195e0:	b580      	push	{r7, lr}
 80195e2:	b082      	sub	sp, #8
 80195e4:	af00      	add	r7, sp, #0
 80195e6:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("invalid pool desc", desc != NULL);
 80195e8:	687b      	ldr	r3, [r7, #4]
 80195ea:	2b00      	cmp	r3, #0
 80195ec:	d106      	bne.n	80195fc <memp_malloc_pool+0x1c>
 80195ee:	4b0a      	ldr	r3, [pc, #40]	@ (8019618 <memp_malloc_pool+0x38>)
 80195f0:	f44f 729e 	mov.w	r2, #316	@ 0x13c
 80195f4:	4909      	ldr	r1, [pc, #36]	@ (801961c <memp_malloc_pool+0x3c>)
 80195f6:	480a      	ldr	r0, [pc, #40]	@ (8019620 <memp_malloc_pool+0x40>)
 80195f8:	f010 f9f0 	bl	80299dc <iprintf>
  if (desc == NULL) {
 80195fc:	687b      	ldr	r3, [r7, #4]
 80195fe:	2b00      	cmp	r3, #0
 8019600:	d101      	bne.n	8019606 <memp_malloc_pool+0x26>
    return NULL;
 8019602:	2300      	movs	r3, #0
 8019604:	e003      	b.n	801960e <memp_malloc_pool+0x2e>
  }

#if !MEMP_OVERFLOW_CHECK
  return do_memp_malloc_pool(desc);
 8019606:	6878      	ldr	r0, [r7, #4]
 8019608:	f7ff ffb8 	bl	801957c <do_memp_malloc_pool>
 801960c:	4603      	mov	r3, r0
#else
  return do_memp_malloc_pool_fn(desc, file, line);
#endif
}
 801960e:	4618      	mov	r0, r3
 8019610:	3708      	adds	r7, #8
 8019612:	46bd      	mov	sp, r7
 8019614:	bd80      	pop	{r7, pc}
 8019616:	bf00      	nop
 8019618:	0802ddd4 	.word	0x0802ddd4
 801961c:	0802de50 	.word	0x0802de50
 8019620:	0802de28 	.word	0x0802de28

08019624 <memp_malloc>:
#if !MEMP_OVERFLOW_CHECK
memp_malloc(memp_t type)
#else
memp_malloc_fn(memp_t type, const char *file, const int line)
#endif
{
 8019624:	b580      	push	{r7, lr}
 8019626:	b084      	sub	sp, #16
 8019628:	af00      	add	r7, sp, #0
 801962a:	4603      	mov	r3, r0
 801962c:	71fb      	strb	r3, [r7, #7]
  void *memp;
  LWIP_ERROR("memp_malloc: type < MEMP_MAX", (type < MEMP_MAX), return NULL;);
 801962e:	79fb      	ldrb	r3, [r7, #7]
 8019630:	2b0c      	cmp	r3, #12
 8019632:	d908      	bls.n	8019646 <memp_malloc+0x22>
 8019634:	4b0a      	ldr	r3, [pc, #40]	@ (8019660 <memp_malloc+0x3c>)
 8019636:	f240 1257 	movw	r2, #343	@ 0x157
 801963a:	490a      	ldr	r1, [pc, #40]	@ (8019664 <memp_malloc+0x40>)
 801963c:	480a      	ldr	r0, [pc, #40]	@ (8019668 <memp_malloc+0x44>)
 801963e:	f010 f9cd 	bl	80299dc <iprintf>
 8019642:	2300      	movs	r3, #0
 8019644:	e008      	b.n	8019658 <memp_malloc+0x34>
#if MEMP_OVERFLOW_CHECK >= 2
  memp_overflow_check_all();
#endif /* MEMP_OVERFLOW_CHECK >= 2 */

#if !MEMP_OVERFLOW_CHECK
  memp = do_memp_malloc_pool(memp_pools[type]);
 8019646:	79fb      	ldrb	r3, [r7, #7]
 8019648:	4a08      	ldr	r2, [pc, #32]	@ (801966c <memp_malloc+0x48>)
 801964a:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801964e:	4618      	mov	r0, r3
 8019650:	f7ff ff94 	bl	801957c <do_memp_malloc_pool>
 8019654:	60f8      	str	r0, [r7, #12]
#else
  memp = do_memp_malloc_pool_fn(memp_pools[type], file, line);
#endif

  return memp;
 8019656:	68fb      	ldr	r3, [r7, #12]
}
 8019658:	4618      	mov	r0, r3
 801965a:	3710      	adds	r7, #16
 801965c:	46bd      	mov	sp, r7
 801965e:	bd80      	pop	{r7, pc}
 8019660:	0802ddd4 	.word	0x0802ddd4
 8019664:	0802de64 	.word	0x0802de64
 8019668:	0802de28 	.word	0x0802de28
 801966c:	08030be4 	.word	0x08030be4

08019670 <do_memp_free_pool>:

static void
do_memp_free_pool(const struct memp_desc *desc, void *mem)
{
 8019670:	b580      	push	{r7, lr}
 8019672:	b084      	sub	sp, #16
 8019674:	af00      	add	r7, sp, #0
 8019676:	6078      	str	r0, [r7, #4]
 8019678:	6039      	str	r1, [r7, #0]
  struct memp *memp;
  SYS_ARCH_DECL_PROTECT(old_level);

  LWIP_ASSERT("memp_free: mem properly aligned",
 801967a:	683b      	ldr	r3, [r7, #0]
 801967c:	f003 0303 	and.w	r3, r3, #3
 8019680:	2b00      	cmp	r3, #0
 8019682:	d006      	beq.n	8019692 <do_memp_free_pool+0x22>
 8019684:	4b0d      	ldr	r3, [pc, #52]	@ (80196bc <do_memp_free_pool+0x4c>)
 8019686:	f44f 72b6 	mov.w	r2, #364	@ 0x16c
 801968a:	490d      	ldr	r1, [pc, #52]	@ (80196c0 <do_memp_free_pool+0x50>)
 801968c:	480d      	ldr	r0, [pc, #52]	@ (80196c4 <do_memp_free_pool+0x54>)
 801968e:	f010 f9a5 	bl	80299dc <iprintf>
              ((mem_ptr_t)mem % MEM_ALIGNMENT) == 0);

  /* cast through void* to get rid of alignment warnings */
  memp = (struct memp *)(void *)((u8_t *)mem - MEMP_SIZE);
 8019692:	683b      	ldr	r3, [r7, #0]
 8019694:	60fb      	str	r3, [r7, #12]

  SYS_ARCH_PROTECT(old_level);
 8019696:	f00c ff0b 	bl	80264b0 <sys_arch_protect>
 801969a:	60b8      	str	r0, [r7, #8]
#if MEMP_MEM_MALLOC
  LWIP_UNUSED_ARG(desc);
  SYS_ARCH_UNPROTECT(old_level);
  mem_free(memp);
#else /* MEMP_MEM_MALLOC */
  memp->next = *desc->tab;
 801969c:	687b      	ldr	r3, [r7, #4]
 801969e:	68db      	ldr	r3, [r3, #12]
 80196a0:	681a      	ldr	r2, [r3, #0]
 80196a2:	68fb      	ldr	r3, [r7, #12]
 80196a4:	601a      	str	r2, [r3, #0]
  *desc->tab = memp;
 80196a6:	687b      	ldr	r3, [r7, #4]
 80196a8:	68db      	ldr	r3, [r3, #12]
 80196aa:	68fa      	ldr	r2, [r7, #12]
 80196ac:	601a      	str	r2, [r3, #0]

#if MEMP_SANITY_CHECK
  LWIP_ASSERT("memp sanity", memp_sanity(desc));
#endif /* MEMP_SANITY_CHECK */

  SYS_ARCH_UNPROTECT(old_level);
 80196ae:	68b8      	ldr	r0, [r7, #8]
 80196b0:	f00c ff0c 	bl	80264cc <sys_arch_unprotect>
#endif /* !MEMP_MEM_MALLOC */
}
 80196b4:	bf00      	nop
 80196b6:	3710      	adds	r7, #16
 80196b8:	46bd      	mov	sp, r7
 80196ba:	bd80      	pop	{r7, pc}
 80196bc:	0802ddd4 	.word	0x0802ddd4
 80196c0:	0802de84 	.word	0x0802de84
 80196c4:	0802de28 	.word	0x0802de28

080196c8 <memp_free_pool>:
 * @param desc the pool where to put mem
 * @param mem the memp element to free
 */
void
memp_free_pool(const struct memp_desc *desc, void *mem)
{
 80196c8:	b580      	push	{r7, lr}
 80196ca:	b082      	sub	sp, #8
 80196cc:	af00      	add	r7, sp, #0
 80196ce:	6078      	str	r0, [r7, #4]
 80196d0:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("invalid pool desc", desc != NULL);
 80196d2:	687b      	ldr	r3, [r7, #4]
 80196d4:	2b00      	cmp	r3, #0
 80196d6:	d106      	bne.n	80196e6 <memp_free_pool+0x1e>
 80196d8:	4b0a      	ldr	r3, [pc, #40]	@ (8019704 <memp_free_pool+0x3c>)
 80196da:	f240 1295 	movw	r2, #405	@ 0x195
 80196de:	490a      	ldr	r1, [pc, #40]	@ (8019708 <memp_free_pool+0x40>)
 80196e0:	480a      	ldr	r0, [pc, #40]	@ (801970c <memp_free_pool+0x44>)
 80196e2:	f010 f97b 	bl	80299dc <iprintf>
  if ((desc == NULL) || (mem == NULL)) {
 80196e6:	687b      	ldr	r3, [r7, #4]
 80196e8:	2b00      	cmp	r3, #0
 80196ea:	d007      	beq.n	80196fc <memp_free_pool+0x34>
 80196ec:	683b      	ldr	r3, [r7, #0]
 80196ee:	2b00      	cmp	r3, #0
 80196f0:	d004      	beq.n	80196fc <memp_free_pool+0x34>
    return;
  }

  do_memp_free_pool(desc, mem);
 80196f2:	6839      	ldr	r1, [r7, #0]
 80196f4:	6878      	ldr	r0, [r7, #4]
 80196f6:	f7ff ffbb 	bl	8019670 <do_memp_free_pool>
 80196fa:	e000      	b.n	80196fe <memp_free_pool+0x36>
    return;
 80196fc:	bf00      	nop
}
 80196fe:	3708      	adds	r7, #8
 8019700:	46bd      	mov	sp, r7
 8019702:	bd80      	pop	{r7, pc}
 8019704:	0802ddd4 	.word	0x0802ddd4
 8019708:	0802de50 	.word	0x0802de50
 801970c:	0802de28 	.word	0x0802de28

08019710 <memp_free>:
 * @param type the pool where to put mem
 * @param mem the memp element to free
 */
void
memp_free(memp_t type, void *mem)
{
 8019710:	b580      	push	{r7, lr}
 8019712:	b082      	sub	sp, #8
 8019714:	af00      	add	r7, sp, #0
 8019716:	4603      	mov	r3, r0
 8019718:	6039      	str	r1, [r7, #0]
 801971a:	71fb      	strb	r3, [r7, #7]
#ifdef LWIP_HOOK_MEMP_AVAILABLE
  struct memp *old_first;
#endif

  LWIP_ERROR("memp_free: type < MEMP_MAX", (type < MEMP_MAX), return;);
 801971c:	79fb      	ldrb	r3, [r7, #7]
 801971e:	2b0c      	cmp	r3, #12
 8019720:	d907      	bls.n	8019732 <memp_free+0x22>
 8019722:	4b0c      	ldr	r3, [pc, #48]	@ (8019754 <memp_free+0x44>)
 8019724:	f44f 72d5 	mov.w	r2, #426	@ 0x1aa
 8019728:	490b      	ldr	r1, [pc, #44]	@ (8019758 <memp_free+0x48>)
 801972a:	480c      	ldr	r0, [pc, #48]	@ (801975c <memp_free+0x4c>)
 801972c:	f010 f956 	bl	80299dc <iprintf>
 8019730:	e00c      	b.n	801974c <memp_free+0x3c>

  if (mem == NULL) {
 8019732:	683b      	ldr	r3, [r7, #0]
 8019734:	2b00      	cmp	r3, #0
 8019736:	d008      	beq.n	801974a <memp_free+0x3a>

#ifdef LWIP_HOOK_MEMP_AVAILABLE
  old_first = *memp_pools[type]->tab;
#endif

  do_memp_free_pool(memp_pools[type], mem);
 8019738:	79fb      	ldrb	r3, [r7, #7]
 801973a:	4a09      	ldr	r2, [pc, #36]	@ (8019760 <memp_free+0x50>)
 801973c:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8019740:	6839      	ldr	r1, [r7, #0]
 8019742:	4618      	mov	r0, r3
 8019744:	f7ff ff94 	bl	8019670 <do_memp_free_pool>
 8019748:	e000      	b.n	801974c <memp_free+0x3c>
    return;
 801974a:	bf00      	nop
#ifdef LWIP_HOOK_MEMP_AVAILABLE
  if (old_first == NULL) {
    LWIP_HOOK_MEMP_AVAILABLE(type);
  }
#endif
}
 801974c:	3708      	adds	r7, #8
 801974e:	46bd      	mov	sp, r7
 8019750:	bd80      	pop	{r7, pc}
 8019752:	bf00      	nop
 8019754:	0802ddd4 	.word	0x0802ddd4
 8019758:	0802dea4 	.word	0x0802dea4
 801975c:	0802de28 	.word	0x0802de28
 8019760:	08030be4 	.word	0x08030be4

08019764 <netif_init>:
}
#endif /* LWIP_HAVE_LOOPIF */

void
netif_init(void)
{
 8019764:	b480      	push	{r7}
 8019766:	af00      	add	r7, sp, #0

  netif_set_link_up(&loop_netif);
  netif_set_up(&loop_netif);

#endif /* LWIP_HAVE_LOOPIF */
}
 8019768:	bf00      	nop
 801976a:	46bd      	mov	sp, r7
 801976c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019770:	4770      	bx	lr
	...

08019774 <netif_add>:
netif_add(struct netif *netif,
#if LWIP_IPV4
          const ip4_addr_t *ipaddr, const ip4_addr_t *netmask, const ip4_addr_t *gw,
#endif /* LWIP_IPV4 */
          void *state, netif_init_fn init, netif_input_fn input)
{
 8019774:	b580      	push	{r7, lr}
 8019776:	b086      	sub	sp, #24
 8019778:	af00      	add	r7, sp, #0
 801977a:	60f8      	str	r0, [r7, #12]
 801977c:	60b9      	str	r1, [r7, #8]
 801977e:	607a      	str	r2, [r7, #4]
 8019780:	603b      	str	r3, [r7, #0]
#if LWIP_IPV6
  s8_t i;
#endif

  LWIP_ASSERT_CORE_LOCKED();
 8019782:	f7f6 fedf 	bl	8010544 <sys_check_core_locking>
    LWIP_ASSERT("single netif already set", 0);
    return NULL;
  }
#endif

  LWIP_ERROR("netif_add: invalid netif", netif != NULL, return NULL);
 8019786:	68fb      	ldr	r3, [r7, #12]
 8019788:	2b00      	cmp	r3, #0
 801978a:	d108      	bne.n	801979e <netif_add+0x2a>
 801978c:	4b5b      	ldr	r3, [pc, #364]	@ (80198fc <netif_add+0x188>)
 801978e:	f240 1227 	movw	r2, #295	@ 0x127
 8019792:	495b      	ldr	r1, [pc, #364]	@ (8019900 <netif_add+0x18c>)
 8019794:	485b      	ldr	r0, [pc, #364]	@ (8019904 <netif_add+0x190>)
 8019796:	f010 f921 	bl	80299dc <iprintf>
 801979a:	2300      	movs	r3, #0
 801979c:	e0a9      	b.n	80198f2 <netif_add+0x17e>
  LWIP_ERROR("netif_add: No init function given", init != NULL, return NULL);
 801979e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80197a0:	2b00      	cmp	r3, #0
 80197a2:	d108      	bne.n	80197b6 <netif_add+0x42>
 80197a4:	4b55      	ldr	r3, [pc, #340]	@ (80198fc <netif_add+0x188>)
 80197a6:	f44f 7294 	mov.w	r2, #296	@ 0x128
 80197aa:	4957      	ldr	r1, [pc, #348]	@ (8019908 <netif_add+0x194>)
 80197ac:	4855      	ldr	r0, [pc, #340]	@ (8019904 <netif_add+0x190>)
 80197ae:	f010 f915 	bl	80299dc <iprintf>
 80197b2:	2300      	movs	r3, #0
 80197b4:	e09d      	b.n	80198f2 <netif_add+0x17e>

#if LWIP_IPV4
  if (ipaddr == NULL) {
 80197b6:	68bb      	ldr	r3, [r7, #8]
 80197b8:	2b00      	cmp	r3, #0
 80197ba:	d101      	bne.n	80197c0 <netif_add+0x4c>
    ipaddr = ip_2_ip4(IP4_ADDR_ANY);
 80197bc:	4b53      	ldr	r3, [pc, #332]	@ (801990c <netif_add+0x198>)
 80197be:	60bb      	str	r3, [r7, #8]
  }
  if (netmask == NULL) {
 80197c0:	687b      	ldr	r3, [r7, #4]
 80197c2:	2b00      	cmp	r3, #0
 80197c4:	d101      	bne.n	80197ca <netif_add+0x56>
    netmask = ip_2_ip4(IP4_ADDR_ANY);
 80197c6:	4b51      	ldr	r3, [pc, #324]	@ (801990c <netif_add+0x198>)
 80197c8:	607b      	str	r3, [r7, #4]
  }
  if (gw == NULL) {
 80197ca:	683b      	ldr	r3, [r7, #0]
 80197cc:	2b00      	cmp	r3, #0
 80197ce:	d101      	bne.n	80197d4 <netif_add+0x60>
    gw = ip_2_ip4(IP4_ADDR_ANY);
 80197d0:	4b4e      	ldr	r3, [pc, #312]	@ (801990c <netif_add+0x198>)
 80197d2:	603b      	str	r3, [r7, #0]
  }

  /* reset new interface configuration state */
  ip_addr_set_zero_ip4(&netif->ip_addr);
 80197d4:	68fb      	ldr	r3, [r7, #12]
 80197d6:	2200      	movs	r2, #0
 80197d8:	605a      	str	r2, [r3, #4]
  ip_addr_set_zero_ip4(&netif->netmask);
 80197da:	68fb      	ldr	r3, [r7, #12]
 80197dc:	2200      	movs	r2, #0
 80197de:	609a      	str	r2, [r3, #8]
  ip_addr_set_zero_ip4(&netif->gw);
 80197e0:	68fb      	ldr	r3, [r7, #12]
 80197e2:	2200      	movs	r2, #0
 80197e4:	60da      	str	r2, [r3, #12]
  netif->output = netif_null_output_ip4;
 80197e6:	68fb      	ldr	r3, [r7, #12]
 80197e8:	4a49      	ldr	r2, [pc, #292]	@ (8019910 <netif_add+0x19c>)
 80197ea:	615a      	str	r2, [r3, #20]
#endif /* LWIP_IPV6_ADDRESS_LIFETIMES */
  }
  netif->output_ip6 = netif_null_output_ip6;
#endif /* LWIP_IPV6 */
  NETIF_SET_CHECKSUM_CTRL(netif, NETIF_CHECKSUM_ENABLE_ALL);
  netif->mtu = 0;
 80197ec:	68fb      	ldr	r3, [r7, #12]
 80197ee:	2200      	movs	r2, #0
 80197f0:	851a      	strh	r2, [r3, #40]	@ 0x28
  netif->flags = 0;
 80197f2:	68fb      	ldr	r3, [r7, #12]
 80197f4:	2200      	movs	r2, #0
 80197f6:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
#ifdef netif_get_client_data
  memset(netif->client_data, 0, sizeof(netif->client_data));
 80197fa:	68fb      	ldr	r3, [r7, #12]
 80197fc:	3324      	adds	r3, #36	@ 0x24
 80197fe:	2204      	movs	r2, #4
 8019800:	2100      	movs	r1, #0
 8019802:	4618      	mov	r0, r3
 8019804:	f010 fa7c 	bl	8029d00 <memset>
#endif /* LWIP_IPV6 */
#if LWIP_NETIF_STATUS_CALLBACK
  netif->status_callback = NULL;
#endif /* LWIP_NETIF_STATUS_CALLBACK */
#if LWIP_NETIF_LINK_CALLBACK
  netif->link_callback = NULL;
 8019808:	68fb      	ldr	r3, [r7, #12]
 801980a:	2200      	movs	r2, #0
 801980c:	61da      	str	r2, [r3, #28]
  netif->loop_first = NULL;
  netif->loop_last = NULL;
#endif /* ENABLE_LOOPBACK */

  /* remember netif specific state information data */
  netif->state = state;
 801980e:	68fb      	ldr	r3, [r7, #12]
 8019810:	6a3a      	ldr	r2, [r7, #32]
 8019812:	621a      	str	r2, [r3, #32]
  netif->num = netif_num;
 8019814:	4b3f      	ldr	r3, [pc, #252]	@ (8019914 <netif_add+0x1a0>)
 8019816:	781a      	ldrb	r2, [r3, #0]
 8019818:	68fb      	ldr	r3, [r7, #12]
 801981a:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
  netif->input = input;
 801981e:	68fb      	ldr	r3, [r7, #12]
 8019820:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8019822:	611a      	str	r2, [r3, #16]
#if ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS
  netif->loop_cnt_current = 0;
#endif /* ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS */

#if LWIP_IPV4
  netif_set_addr(netif, ipaddr, netmask, gw);
 8019824:	683b      	ldr	r3, [r7, #0]
 8019826:	687a      	ldr	r2, [r7, #4]
 8019828:	68b9      	ldr	r1, [r7, #8]
 801982a:	68f8      	ldr	r0, [r7, #12]
 801982c:	f000 f914 	bl	8019a58 <netif_set_addr>
#endif /* LWIP_IPV4 */

  /* call user specified initialization function for netif */
  if (init(netif) != ERR_OK) {
 8019830:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019832:	68f8      	ldr	r0, [r7, #12]
 8019834:	4798      	blx	r3
 8019836:	4603      	mov	r3, r0
 8019838:	2b00      	cmp	r3, #0
 801983a:	d001      	beq.n	8019840 <netif_add+0xcc>
    return NULL;
 801983c:	2300      	movs	r3, #0
 801983e:	e058      	b.n	80198f2 <netif_add+0x17e>
     */
  {
    struct netif *netif2;
    int num_netifs;
    do {
      if (netif->num == 255) {
 8019840:	68fb      	ldr	r3, [r7, #12]
 8019842:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8019846:	2bff      	cmp	r3, #255	@ 0xff
 8019848:	d103      	bne.n	8019852 <netif_add+0xde>
        netif->num = 0;
 801984a:	68fb      	ldr	r3, [r7, #12]
 801984c:	2200      	movs	r2, #0
 801984e:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
      }
      num_netifs = 0;
 8019852:	2300      	movs	r3, #0
 8019854:	613b      	str	r3, [r7, #16]
      for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) {
 8019856:	4b30      	ldr	r3, [pc, #192]	@ (8019918 <netif_add+0x1a4>)
 8019858:	681b      	ldr	r3, [r3, #0]
 801985a:	617b      	str	r3, [r7, #20]
 801985c:	e02b      	b.n	80198b6 <netif_add+0x142>
        LWIP_ASSERT("netif already added", netif2 != netif);
 801985e:	697a      	ldr	r2, [r7, #20]
 8019860:	68fb      	ldr	r3, [r7, #12]
 8019862:	429a      	cmp	r2, r3
 8019864:	d106      	bne.n	8019874 <netif_add+0x100>
 8019866:	4b25      	ldr	r3, [pc, #148]	@ (80198fc <netif_add+0x188>)
 8019868:	f240 128b 	movw	r2, #395	@ 0x18b
 801986c:	492b      	ldr	r1, [pc, #172]	@ (801991c <netif_add+0x1a8>)
 801986e:	4825      	ldr	r0, [pc, #148]	@ (8019904 <netif_add+0x190>)
 8019870:	f010 f8b4 	bl	80299dc <iprintf>
        num_netifs++;
 8019874:	693b      	ldr	r3, [r7, #16]
 8019876:	3301      	adds	r3, #1
 8019878:	613b      	str	r3, [r7, #16]
        LWIP_ASSERT("too many netifs, max. supported number is 255", num_netifs <= 255);
 801987a:	693b      	ldr	r3, [r7, #16]
 801987c:	2bff      	cmp	r3, #255	@ 0xff
 801987e:	dd06      	ble.n	801988e <netif_add+0x11a>
 8019880:	4b1e      	ldr	r3, [pc, #120]	@ (80198fc <netif_add+0x188>)
 8019882:	f240 128d 	movw	r2, #397	@ 0x18d
 8019886:	4926      	ldr	r1, [pc, #152]	@ (8019920 <netif_add+0x1ac>)
 8019888:	481e      	ldr	r0, [pc, #120]	@ (8019904 <netif_add+0x190>)
 801988a:	f010 f8a7 	bl	80299dc <iprintf>
        if (netif2->num == netif->num) {
 801988e:	697b      	ldr	r3, [r7, #20]
 8019890:	f893 2034 	ldrb.w	r2, [r3, #52]	@ 0x34
 8019894:	68fb      	ldr	r3, [r7, #12]
 8019896:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801989a:	429a      	cmp	r2, r3
 801989c:	d108      	bne.n	80198b0 <netif_add+0x13c>
          netif->num++;
 801989e:	68fb      	ldr	r3, [r7, #12]
 80198a0:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80198a4:	3301      	adds	r3, #1
 80198a6:	b2da      	uxtb	r2, r3
 80198a8:	68fb      	ldr	r3, [r7, #12]
 80198aa:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
          break;
 80198ae:	e005      	b.n	80198bc <netif_add+0x148>
      for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) {
 80198b0:	697b      	ldr	r3, [r7, #20]
 80198b2:	681b      	ldr	r3, [r3, #0]
 80198b4:	617b      	str	r3, [r7, #20]
 80198b6:	697b      	ldr	r3, [r7, #20]
 80198b8:	2b00      	cmp	r3, #0
 80198ba:	d1d0      	bne.n	801985e <netif_add+0xea>
        }
      }
    } while (netif2 != NULL);
 80198bc:	697b      	ldr	r3, [r7, #20]
 80198be:	2b00      	cmp	r3, #0
 80198c0:	d1be      	bne.n	8019840 <netif_add+0xcc>
  }
  if (netif->num == 254) {
 80198c2:	68fb      	ldr	r3, [r7, #12]
 80198c4:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80198c8:	2bfe      	cmp	r3, #254	@ 0xfe
 80198ca:	d103      	bne.n	80198d4 <netif_add+0x160>
    netif_num = 0;
 80198cc:	4b11      	ldr	r3, [pc, #68]	@ (8019914 <netif_add+0x1a0>)
 80198ce:	2200      	movs	r2, #0
 80198d0:	701a      	strb	r2, [r3, #0]
 80198d2:	e006      	b.n	80198e2 <netif_add+0x16e>
  } else {
    netif_num = (u8_t)(netif->num + 1);
 80198d4:	68fb      	ldr	r3, [r7, #12]
 80198d6:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80198da:	3301      	adds	r3, #1
 80198dc:	b2da      	uxtb	r2, r3
 80198de:	4b0d      	ldr	r3, [pc, #52]	@ (8019914 <netif_add+0x1a0>)
 80198e0:	701a      	strb	r2, [r3, #0]
  }

  /* add this netif to the list */
  netif->next = netif_list;
 80198e2:	4b0d      	ldr	r3, [pc, #52]	@ (8019918 <netif_add+0x1a4>)
 80198e4:	681a      	ldr	r2, [r3, #0]
 80198e6:	68fb      	ldr	r3, [r7, #12]
 80198e8:	601a      	str	r2, [r3, #0]
  netif_list = netif;
 80198ea:	4a0b      	ldr	r2, [pc, #44]	@ (8019918 <netif_add+0x1a4>)
 80198ec:	68fb      	ldr	r3, [r7, #12]
 80198ee:	6013      	str	r3, [r2, #0]
#endif /* LWIP_IPV4 */
  LWIP_DEBUGF(NETIF_DEBUG, ("\n"));

  netif_invoke_ext_callback(netif, LWIP_NSC_NETIF_ADDED, NULL);

  return netif;
 80198f0:	68fb      	ldr	r3, [r7, #12]
}
 80198f2:	4618      	mov	r0, r3
 80198f4:	3718      	adds	r7, #24
 80198f6:	46bd      	mov	sp, r7
 80198f8:	bd80      	pop	{r7, pc}
 80198fa:	bf00      	nop
 80198fc:	0802dec0 	.word	0x0802dec0
 8019900:	0802df54 	.word	0x0802df54
 8019904:	0802df10 	.word	0x0802df10
 8019908:	0802df70 	.word	0x0802df70
 801990c:	08030c68 	.word	0x08030c68
 8019910:	08019d4f 	.word	0x08019d4f
 8019914:	2402ae84 	.word	0x2402ae84
 8019918:	2402ae7c 	.word	0x2402ae7c
 801991c:	0802df94 	.word	0x0802df94
 8019920:	0802dfa8 	.word	0x0802dfa8

08019924 <netif_do_ip_addr_changed>:

static void
netif_do_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 8019924:	b580      	push	{r7, lr}
 8019926:	b082      	sub	sp, #8
 8019928:	af00      	add	r7, sp, #0
 801992a:	6078      	str	r0, [r7, #4]
 801992c:	6039      	str	r1, [r7, #0]
#if LWIP_TCP
  tcp_netif_ip_addr_changed(old_addr, new_addr);
 801992e:	6839      	ldr	r1, [r7, #0]
 8019930:	6878      	ldr	r0, [r7, #4]
 8019932:	f002 fe6f 	bl	801c614 <tcp_netif_ip_addr_changed>
#endif /* LWIP_TCP */
#if LWIP_UDP
  udp_netif_ip_addr_changed(old_addr, new_addr);
 8019936:	6839      	ldr	r1, [r7, #0]
 8019938:	6878      	ldr	r0, [r7, #4]
 801993a:	f008 f82b 	bl	8021994 <udp_netif_ip_addr_changed>
#endif /* LWIP_UDP */
#if LWIP_RAW
  raw_netif_ip_addr_changed(old_addr, new_addr);
#endif /* LWIP_RAW */
}
 801993e:	bf00      	nop
 8019940:	3708      	adds	r7, #8
 8019942:	46bd      	mov	sp, r7
 8019944:	bd80      	pop	{r7, pc}
	...

08019948 <netif_do_set_ipaddr>:

#if LWIP_IPV4
static int
netif_do_set_ipaddr(struct netif *netif, const ip4_addr_t *ipaddr, ip_addr_t *old_addr)
{
 8019948:	b580      	push	{r7, lr}
 801994a:	b086      	sub	sp, #24
 801994c:	af00      	add	r7, sp, #0
 801994e:	60f8      	str	r0, [r7, #12]
 8019950:	60b9      	str	r1, [r7, #8]
 8019952:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT("invalid pointer", ipaddr != NULL);
 8019954:	68bb      	ldr	r3, [r7, #8]
 8019956:	2b00      	cmp	r3, #0
 8019958:	d106      	bne.n	8019968 <netif_do_set_ipaddr+0x20>
 801995a:	4b1d      	ldr	r3, [pc, #116]	@ (80199d0 <netif_do_set_ipaddr+0x88>)
 801995c:	f240 12cb 	movw	r2, #459	@ 0x1cb
 8019960:	491c      	ldr	r1, [pc, #112]	@ (80199d4 <netif_do_set_ipaddr+0x8c>)
 8019962:	481d      	ldr	r0, [pc, #116]	@ (80199d8 <netif_do_set_ipaddr+0x90>)
 8019964:	f010 f83a 	bl	80299dc <iprintf>
  LWIP_ASSERT("invalid pointer", old_addr != NULL);
 8019968:	687b      	ldr	r3, [r7, #4]
 801996a:	2b00      	cmp	r3, #0
 801996c:	d106      	bne.n	801997c <netif_do_set_ipaddr+0x34>
 801996e:	4b18      	ldr	r3, [pc, #96]	@ (80199d0 <netif_do_set_ipaddr+0x88>)
 8019970:	f44f 72e6 	mov.w	r2, #460	@ 0x1cc
 8019974:	4917      	ldr	r1, [pc, #92]	@ (80199d4 <netif_do_set_ipaddr+0x8c>)
 8019976:	4818      	ldr	r0, [pc, #96]	@ (80199d8 <netif_do_set_ipaddr+0x90>)
 8019978:	f010 f830 	bl	80299dc <iprintf>

  /* address is actually being changed? */
  if (ip4_addr_cmp(ipaddr, netif_ip4_addr(netif)) == 0) {
 801997c:	68bb      	ldr	r3, [r7, #8]
 801997e:	681a      	ldr	r2, [r3, #0]
 8019980:	68fb      	ldr	r3, [r7, #12]
 8019982:	3304      	adds	r3, #4
 8019984:	681b      	ldr	r3, [r3, #0]
 8019986:	429a      	cmp	r2, r3
 8019988:	d01c      	beq.n	80199c4 <netif_do_set_ipaddr+0x7c>
    ip_addr_t new_addr;
    *ip_2_ip4(&new_addr) = *ipaddr;
 801998a:	68bb      	ldr	r3, [r7, #8]
 801998c:	681b      	ldr	r3, [r3, #0]
 801998e:	617b      	str	r3, [r7, #20]
    IP_SET_TYPE_VAL(new_addr, IPADDR_TYPE_V4);

    ip_addr_copy(*old_addr, *netif_ip_addr4(netif));
 8019990:	68fb      	ldr	r3, [r7, #12]
 8019992:	3304      	adds	r3, #4
 8019994:	681a      	ldr	r2, [r3, #0]
 8019996:	687b      	ldr	r3, [r7, #4]
 8019998:	601a      	str	r2, [r3, #0]

    LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: netif address being changed\n"));
    netif_do_ip_addr_changed(old_addr, &new_addr);
 801999a:	f107 0314 	add.w	r3, r7, #20
 801999e:	4619      	mov	r1, r3
 80199a0:	6878      	ldr	r0, [r7, #4]
 80199a2:	f7ff ffbf 	bl	8019924 <netif_do_ip_addr_changed>

    mib2_remove_ip4(netif);
    mib2_remove_route_ip4(0, netif);
    /* set new IP address to netif */
    ip4_addr_set(ip_2_ip4(&netif->ip_addr), ipaddr);
 80199a6:	68bb      	ldr	r3, [r7, #8]
 80199a8:	2b00      	cmp	r3, #0
 80199aa:	d002      	beq.n	80199b2 <netif_do_set_ipaddr+0x6a>
 80199ac:	68bb      	ldr	r3, [r7, #8]
 80199ae:	681b      	ldr	r3, [r3, #0]
 80199b0:	e000      	b.n	80199b4 <netif_do_set_ipaddr+0x6c>
 80199b2:	2300      	movs	r3, #0
 80199b4:	68fa      	ldr	r2, [r7, #12]
 80199b6:	6053      	str	r3, [r2, #4]
    IP_SET_TYPE_VAL(netif->ip_addr, IPADDR_TYPE_V4);
    mib2_add_ip4(netif);
    mib2_add_route_ip4(0, netif);

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4);
 80199b8:	2101      	movs	r1, #1
 80199ba:	68f8      	ldr	r0, [r7, #12]
 80199bc:	f000 f8d6 	bl	8019b6c <netif_issue_reports>

    NETIF_STATUS_CALLBACK(netif);
    return 1; /* address changed */
 80199c0:	2301      	movs	r3, #1
 80199c2:	e000      	b.n	80199c6 <netif_do_set_ipaddr+0x7e>
  }
  return 0; /* address unchanged */
 80199c4:	2300      	movs	r3, #0
}
 80199c6:	4618      	mov	r0, r3
 80199c8:	3718      	adds	r7, #24
 80199ca:	46bd      	mov	sp, r7
 80199cc:	bd80      	pop	{r7, pc}
 80199ce:	bf00      	nop
 80199d0:	0802dec0 	.word	0x0802dec0
 80199d4:	0802dfd8 	.word	0x0802dfd8
 80199d8:	0802df10 	.word	0x0802df10

080199dc <netif_do_set_netmask>:
  }
}

static int
netif_do_set_netmask(struct netif *netif, const ip4_addr_t *netmask, ip_addr_t *old_nm)
{
 80199dc:	b480      	push	{r7}
 80199de:	b085      	sub	sp, #20
 80199e0:	af00      	add	r7, sp, #0
 80199e2:	60f8      	str	r0, [r7, #12]
 80199e4:	60b9      	str	r1, [r7, #8]
 80199e6:	607a      	str	r2, [r7, #4]
  /* address is actually being changed? */
  if (ip4_addr_cmp(netmask, netif_ip4_netmask(netif)) == 0) {
 80199e8:	68bb      	ldr	r3, [r7, #8]
 80199ea:	681a      	ldr	r2, [r3, #0]
 80199ec:	68fb      	ldr	r3, [r7, #12]
 80199ee:	3308      	adds	r3, #8
 80199f0:	681b      	ldr	r3, [r3, #0]
 80199f2:	429a      	cmp	r2, r3
 80199f4:	d00a      	beq.n	8019a0c <netif_do_set_netmask+0x30>
#else
    LWIP_UNUSED_ARG(old_nm);
#endif
    mib2_remove_route_ip4(0, netif);
    /* set new netmask to netif */
    ip4_addr_set(ip_2_ip4(&netif->netmask), netmask);
 80199f6:	68bb      	ldr	r3, [r7, #8]
 80199f8:	2b00      	cmp	r3, #0
 80199fa:	d002      	beq.n	8019a02 <netif_do_set_netmask+0x26>
 80199fc:	68bb      	ldr	r3, [r7, #8]
 80199fe:	681b      	ldr	r3, [r3, #0]
 8019a00:	e000      	b.n	8019a04 <netif_do_set_netmask+0x28>
 8019a02:	2300      	movs	r3, #0
 8019a04:	68fa      	ldr	r2, [r7, #12]
 8019a06:	6093      	str	r3, [r2, #8]
                netif->name[0], netif->name[1],
                ip4_addr1_16(netif_ip4_netmask(netif)),
                ip4_addr2_16(netif_ip4_netmask(netif)),
                ip4_addr3_16(netif_ip4_netmask(netif)),
                ip4_addr4_16(netif_ip4_netmask(netif))));
    return 1; /* netmask changed */
 8019a08:	2301      	movs	r3, #1
 8019a0a:	e000      	b.n	8019a0e <netif_do_set_netmask+0x32>
  }
  return 0; /* netmask unchanged */
 8019a0c:	2300      	movs	r3, #0
}
 8019a0e:	4618      	mov	r0, r3
 8019a10:	3714      	adds	r7, #20
 8019a12:	46bd      	mov	sp, r7
 8019a14:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019a18:	4770      	bx	lr

08019a1a <netif_do_set_gw>:
  }
}

static int
netif_do_set_gw(struct netif *netif, const ip4_addr_t *gw, ip_addr_t *old_gw)
{
 8019a1a:	b480      	push	{r7}
 8019a1c:	b085      	sub	sp, #20
 8019a1e:	af00      	add	r7, sp, #0
 8019a20:	60f8      	str	r0, [r7, #12]
 8019a22:	60b9      	str	r1, [r7, #8]
 8019a24:	607a      	str	r2, [r7, #4]
  /* address is actually being changed? */
  if (ip4_addr_cmp(gw, netif_ip4_gw(netif)) == 0) {
 8019a26:	68bb      	ldr	r3, [r7, #8]
 8019a28:	681a      	ldr	r2, [r3, #0]
 8019a2a:	68fb      	ldr	r3, [r7, #12]
 8019a2c:	330c      	adds	r3, #12
 8019a2e:	681b      	ldr	r3, [r3, #0]
 8019a30:	429a      	cmp	r2, r3
 8019a32:	d00a      	beq.n	8019a4a <netif_do_set_gw+0x30>
    ip_addr_copy(*old_gw, *netif_ip_gw4(netif));
#else
    LWIP_UNUSED_ARG(old_gw);
#endif

    ip4_addr_set(ip_2_ip4(&netif->gw), gw);
 8019a34:	68bb      	ldr	r3, [r7, #8]
 8019a36:	2b00      	cmp	r3, #0
 8019a38:	d002      	beq.n	8019a40 <netif_do_set_gw+0x26>
 8019a3a:	68bb      	ldr	r3, [r7, #8]
 8019a3c:	681b      	ldr	r3, [r3, #0]
 8019a3e:	e000      	b.n	8019a42 <netif_do_set_gw+0x28>
 8019a40:	2300      	movs	r3, #0
 8019a42:	68fa      	ldr	r2, [r7, #12]
 8019a44:	60d3      	str	r3, [r2, #12]
                netif->name[0], netif->name[1],
                ip4_addr1_16(netif_ip4_gw(netif)),
                ip4_addr2_16(netif_ip4_gw(netif)),
                ip4_addr3_16(netif_ip4_gw(netif)),
                ip4_addr4_16(netif_ip4_gw(netif))));
    return 1; /* gateway changed */
 8019a46:	2301      	movs	r3, #1
 8019a48:	e000      	b.n	8019a4c <netif_do_set_gw+0x32>
  }
  return 0; /* gateway unchanged */
 8019a4a:	2300      	movs	r3, #0
}
 8019a4c:	4618      	mov	r0, r3
 8019a4e:	3714      	adds	r7, #20
 8019a50:	46bd      	mov	sp, r7
 8019a52:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019a56:	4770      	bx	lr

08019a58 <netif_set_addr>:
 * @param gw the new default gateway
 */
void
netif_set_addr(struct netif *netif, const ip4_addr_t *ipaddr, const ip4_addr_t *netmask,
               const ip4_addr_t *gw)
{
 8019a58:	b580      	push	{r7, lr}
 8019a5a:	b088      	sub	sp, #32
 8019a5c:	af00      	add	r7, sp, #0
 8019a5e:	60f8      	str	r0, [r7, #12]
 8019a60:	60b9      	str	r1, [r7, #8]
 8019a62:	607a      	str	r2, [r7, #4]
 8019a64:	603b      	str	r3, [r7, #0]
  ip_addr_t old_nm_val;
  ip_addr_t old_gw_val;
  ip_addr_t *old_nm = &old_nm_val;
  ip_addr_t *old_gw = &old_gw_val;
#else
  ip_addr_t *old_nm = NULL;
 8019a66:	2300      	movs	r3, #0
 8019a68:	61fb      	str	r3, [r7, #28]
  ip_addr_t *old_gw = NULL;
 8019a6a:	2300      	movs	r3, #0
 8019a6c:	61bb      	str	r3, [r7, #24]
#endif
  ip_addr_t old_addr;
  int remove;

  LWIP_ASSERT_CORE_LOCKED();
 8019a6e:	f7f6 fd69 	bl	8010544 <sys_check_core_locking>

  /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */
  if (ipaddr == NULL) {
 8019a72:	68bb      	ldr	r3, [r7, #8]
 8019a74:	2b00      	cmp	r3, #0
 8019a76:	d101      	bne.n	8019a7c <netif_set_addr+0x24>
    ipaddr = IP4_ADDR_ANY4;
 8019a78:	4b1c      	ldr	r3, [pc, #112]	@ (8019aec <netif_set_addr+0x94>)
 8019a7a:	60bb      	str	r3, [r7, #8]
  }
  if (netmask == NULL) {
 8019a7c:	687b      	ldr	r3, [r7, #4]
 8019a7e:	2b00      	cmp	r3, #0
 8019a80:	d101      	bne.n	8019a86 <netif_set_addr+0x2e>
    netmask = IP4_ADDR_ANY4;
 8019a82:	4b1a      	ldr	r3, [pc, #104]	@ (8019aec <netif_set_addr+0x94>)
 8019a84:	607b      	str	r3, [r7, #4]
  }
  if (gw == NULL) {
 8019a86:	683b      	ldr	r3, [r7, #0]
 8019a88:	2b00      	cmp	r3, #0
 8019a8a:	d101      	bne.n	8019a90 <netif_set_addr+0x38>
    gw = IP4_ADDR_ANY4;
 8019a8c:	4b17      	ldr	r3, [pc, #92]	@ (8019aec <netif_set_addr+0x94>)
 8019a8e:	603b      	str	r3, [r7, #0]
  }

  remove = ip4_addr_isany(ipaddr);
 8019a90:	68bb      	ldr	r3, [r7, #8]
 8019a92:	2b00      	cmp	r3, #0
 8019a94:	d003      	beq.n	8019a9e <netif_set_addr+0x46>
 8019a96:	68bb      	ldr	r3, [r7, #8]
 8019a98:	681b      	ldr	r3, [r3, #0]
 8019a9a:	2b00      	cmp	r3, #0
 8019a9c:	d101      	bne.n	8019aa2 <netif_set_addr+0x4a>
 8019a9e:	2301      	movs	r3, #1
 8019aa0:	e000      	b.n	8019aa4 <netif_set_addr+0x4c>
 8019aa2:	2300      	movs	r3, #0
 8019aa4:	617b      	str	r3, [r7, #20]
  if (remove) {
 8019aa6:	697b      	ldr	r3, [r7, #20]
 8019aa8:	2b00      	cmp	r3, #0
 8019aaa:	d006      	beq.n	8019aba <netif_set_addr+0x62>
    /* when removing an address, we have to remove it *before* changing netmask/gw
       to ensure that tcp RST segment can be sent correctly */
    if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) {
 8019aac:	f107 0310 	add.w	r3, r7, #16
 8019ab0:	461a      	mov	r2, r3
 8019ab2:	68b9      	ldr	r1, [r7, #8]
 8019ab4:	68f8      	ldr	r0, [r7, #12]
 8019ab6:	f7ff ff47 	bl	8019948 <netif_do_set_ipaddr>
      change_reason |= LWIP_NSC_IPV4_ADDRESS_CHANGED;
      cb_args.ipv4_changed.old_address = &old_addr;
#endif
    }
  }
  if (netif_do_set_netmask(netif, netmask, old_nm)) {
 8019aba:	69fa      	ldr	r2, [r7, #28]
 8019abc:	6879      	ldr	r1, [r7, #4]
 8019abe:	68f8      	ldr	r0, [r7, #12]
 8019ac0:	f7ff ff8c 	bl	80199dc <netif_do_set_netmask>
#if LWIP_NETIF_EXT_STATUS_CALLBACK
    change_reason |= LWIP_NSC_IPV4_NETMASK_CHANGED;
    cb_args.ipv4_changed.old_netmask = old_nm;
#endif
  }
  if (netif_do_set_gw(netif, gw, old_gw)) {
 8019ac4:	69ba      	ldr	r2, [r7, #24]
 8019ac6:	6839      	ldr	r1, [r7, #0]
 8019ac8:	68f8      	ldr	r0, [r7, #12]
 8019aca:	f7ff ffa6 	bl	8019a1a <netif_do_set_gw>
#if LWIP_NETIF_EXT_STATUS_CALLBACK
    change_reason |= LWIP_NSC_IPV4_GATEWAY_CHANGED;
    cb_args.ipv4_changed.old_gw = old_gw;
#endif
  }
  if (!remove) {
 8019ace:	697b      	ldr	r3, [r7, #20]
 8019ad0:	2b00      	cmp	r3, #0
 8019ad2:	d106      	bne.n	8019ae2 <netif_set_addr+0x8a>
    /* set ipaddr last to ensure netmask/gw have been set when status callback is called */
    if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) {
 8019ad4:	f107 0310 	add.w	r3, r7, #16
 8019ad8:	461a      	mov	r2, r3
 8019ada:	68b9      	ldr	r1, [r7, #8]
 8019adc:	68f8      	ldr	r0, [r7, #12]
 8019ade:	f7ff ff33 	bl	8019948 <netif_do_set_ipaddr>
  if (change_reason != LWIP_NSC_NONE) {
    change_reason |= LWIP_NSC_IPV4_SETTINGS_CHANGED;
    netif_invoke_ext_callback(netif, change_reason, &cb_args);
  }
#endif
}
 8019ae2:	bf00      	nop
 8019ae4:	3720      	adds	r7, #32
 8019ae6:	46bd      	mov	sp, r7
 8019ae8:	bd80      	pop	{r7, pc}
 8019aea:	bf00      	nop
 8019aec:	08030c68 	.word	0x08030c68

08019af0 <netif_set_default>:
 *
 * @param netif the default network interface
 */
void
netif_set_default(struct netif *netif)
{
 8019af0:	b580      	push	{r7, lr}
 8019af2:	b082      	sub	sp, #8
 8019af4:	af00      	add	r7, sp, #0
 8019af6:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 8019af8:	f7f6 fd24 	bl	8010544 <sys_check_core_locking>
    mib2_remove_route_ip4(1, netif);
  } else {
    /* install default route */
    mib2_add_route_ip4(1, netif);
  }
  netif_default = netif;
 8019afc:	4a03      	ldr	r2, [pc, #12]	@ (8019b0c <netif_set_default+0x1c>)
 8019afe:	687b      	ldr	r3, [r7, #4]
 8019b00:	6013      	str	r3, [r2, #0]
  LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n",
                            netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\''));
}
 8019b02:	bf00      	nop
 8019b04:	3708      	adds	r7, #8
 8019b06:	46bd      	mov	sp, r7
 8019b08:	bd80      	pop	{r7, pc}
 8019b0a:	bf00      	nop
 8019b0c:	2402ae80 	.word	0x2402ae80

08019b10 <netif_set_up>:
 * Bring an interface up, available for processing
 * traffic.
 */
void
netif_set_up(struct netif *netif)
{
 8019b10:	b580      	push	{r7, lr}
 8019b12:	b082      	sub	sp, #8
 8019b14:	af00      	add	r7, sp, #0
 8019b16:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 8019b18:	f7f6 fd14 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("netif_set_up: invalid netif", netif != NULL, return);
 8019b1c:	687b      	ldr	r3, [r7, #4]
 8019b1e:	2b00      	cmp	r3, #0
 8019b20:	d107      	bne.n	8019b32 <netif_set_up+0x22>
 8019b22:	4b0f      	ldr	r3, [pc, #60]	@ (8019b60 <netif_set_up+0x50>)
 8019b24:	f44f 7254 	mov.w	r2, #848	@ 0x350
 8019b28:	490e      	ldr	r1, [pc, #56]	@ (8019b64 <netif_set_up+0x54>)
 8019b2a:	480f      	ldr	r0, [pc, #60]	@ (8019b68 <netif_set_up+0x58>)
 8019b2c:	f00f ff56 	bl	80299dc <iprintf>
 8019b30:	e013      	b.n	8019b5a <netif_set_up+0x4a>

  if (!(netif->flags & NETIF_FLAG_UP)) {
 8019b32:	687b      	ldr	r3, [r7, #4]
 8019b34:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019b38:	f003 0301 	and.w	r3, r3, #1
 8019b3c:	2b00      	cmp	r3, #0
 8019b3e:	d10c      	bne.n	8019b5a <netif_set_up+0x4a>
    netif_set_flags(netif, NETIF_FLAG_UP);
 8019b40:	687b      	ldr	r3, [r7, #4]
 8019b42:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019b46:	f043 0301 	orr.w	r3, r3, #1
 8019b4a:	b2da      	uxtb	r2, r3
 8019b4c:	687b      	ldr	r3, [r7, #4]
 8019b4e:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
      args.status_changed.state = 1;
      netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args);
    }
#endif

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6);
 8019b52:	2103      	movs	r1, #3
 8019b54:	6878      	ldr	r0, [r7, #4]
 8019b56:	f000 f809 	bl	8019b6c <netif_issue_reports>
#if LWIP_IPV6
    nd6_restart_netif(netif);
#endif /* LWIP_IPV6 */
  }
}
 8019b5a:	3708      	adds	r7, #8
 8019b5c:	46bd      	mov	sp, r7
 8019b5e:	bd80      	pop	{r7, pc}
 8019b60:	0802dec0 	.word	0x0802dec0
 8019b64:	0802e048 	.word	0x0802e048
 8019b68:	0802df10 	.word	0x0802df10

08019b6c <netif_issue_reports>:

/** Send ARP/IGMP/MLD/RS events, e.g. on link-up/netif-up or addr-change
 */
static void
netif_issue_reports(struct netif *netif, u8_t report_type)
{
 8019b6c:	b580      	push	{r7, lr}
 8019b6e:	b082      	sub	sp, #8
 8019b70:	af00      	add	r7, sp, #0
 8019b72:	6078      	str	r0, [r7, #4]
 8019b74:	460b      	mov	r3, r1
 8019b76:	70fb      	strb	r3, [r7, #3]
  LWIP_ASSERT("netif_issue_reports: invalid netif", netif != NULL);
 8019b78:	687b      	ldr	r3, [r7, #4]
 8019b7a:	2b00      	cmp	r3, #0
 8019b7c:	d106      	bne.n	8019b8c <netif_issue_reports+0x20>
 8019b7e:	4b18      	ldr	r3, [pc, #96]	@ (8019be0 <netif_issue_reports+0x74>)
 8019b80:	f240 326d 	movw	r2, #877	@ 0x36d
 8019b84:	4917      	ldr	r1, [pc, #92]	@ (8019be4 <netif_issue_reports+0x78>)
 8019b86:	4818      	ldr	r0, [pc, #96]	@ (8019be8 <netif_issue_reports+0x7c>)
 8019b88:	f00f ff28 	bl	80299dc <iprintf>

  /* Only send reports when both link and admin states are up */
  if (!(netif->flags & NETIF_FLAG_LINK_UP) ||
 8019b8c:	687b      	ldr	r3, [r7, #4]
 8019b8e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019b92:	f003 0304 	and.w	r3, r3, #4
 8019b96:	2b00      	cmp	r3, #0
 8019b98:	d01e      	beq.n	8019bd8 <netif_issue_reports+0x6c>
      !(netif->flags & NETIF_FLAG_UP)) {
 8019b9a:	687b      	ldr	r3, [r7, #4]
 8019b9c:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019ba0:	f003 0301 	and.w	r3, r3, #1
  if (!(netif->flags & NETIF_FLAG_LINK_UP) ||
 8019ba4:	2b00      	cmp	r3, #0
 8019ba6:	d017      	beq.n	8019bd8 <netif_issue_reports+0x6c>
    return;
  }

#if LWIP_IPV4
  if ((report_type & NETIF_REPORT_TYPE_IPV4) &&
 8019ba8:	78fb      	ldrb	r3, [r7, #3]
 8019baa:	f003 0301 	and.w	r3, r3, #1
 8019bae:	2b00      	cmp	r3, #0
 8019bb0:	d013      	beq.n	8019bda <netif_issue_reports+0x6e>
      !ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 8019bb2:	687b      	ldr	r3, [r7, #4]
 8019bb4:	3304      	adds	r3, #4
 8019bb6:	681b      	ldr	r3, [r3, #0]
  if ((report_type & NETIF_REPORT_TYPE_IPV4) &&
 8019bb8:	2b00      	cmp	r3, #0
 8019bba:	d00e      	beq.n	8019bda <netif_issue_reports+0x6e>
#if LWIP_ARP
    /* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */
    if (netif->flags & (NETIF_FLAG_ETHARP)) {
 8019bbc:	687b      	ldr	r3, [r7, #4]
 8019bbe:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019bc2:	f003 0308 	and.w	r3, r3, #8
 8019bc6:	2b00      	cmp	r3, #0
 8019bc8:	d007      	beq.n	8019bda <netif_issue_reports+0x6e>
      etharp_gratuitous(netif);
 8019bca:	687b      	ldr	r3, [r7, #4]
 8019bcc:	3304      	adds	r3, #4
 8019bce:	4619      	mov	r1, r3
 8019bd0:	6878      	ldr	r0, [r7, #4]
 8019bd2:	f00a fd2b 	bl	802462c <etharp_request>
 8019bd6:	e000      	b.n	8019bda <netif_issue_reports+0x6e>
    return;
 8019bd8:	bf00      	nop
    /* send mld memberships */
    mld6_report_groups(netif);
#endif /* LWIP_IPV6_MLD */
  }
#endif /* LWIP_IPV6 */
}
 8019bda:	3708      	adds	r7, #8
 8019bdc:	46bd      	mov	sp, r7
 8019bde:	bd80      	pop	{r7, pc}
 8019be0:	0802dec0 	.word	0x0802dec0
 8019be4:	0802e064 	.word	0x0802e064
 8019be8:	0802df10 	.word	0x0802df10

08019bec <netif_set_down>:
 * @ingroup netif
 * Bring an interface down, disabling any traffic processing.
 */
void
netif_set_down(struct netif *netif)
{
 8019bec:	b580      	push	{r7, lr}
 8019bee:	b082      	sub	sp, #8
 8019bf0:	af00      	add	r7, sp, #0
 8019bf2:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 8019bf4:	f7f6 fca6 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("netif_set_down: invalid netif", netif != NULL, return);
 8019bf8:	687b      	ldr	r3, [r7, #4]
 8019bfa:	2b00      	cmp	r3, #0
 8019bfc:	d107      	bne.n	8019c0e <netif_set_down+0x22>
 8019bfe:	4b12      	ldr	r3, [pc, #72]	@ (8019c48 <netif_set_down+0x5c>)
 8019c00:	f240 329b 	movw	r2, #923	@ 0x39b
 8019c04:	4911      	ldr	r1, [pc, #68]	@ (8019c4c <netif_set_down+0x60>)
 8019c06:	4812      	ldr	r0, [pc, #72]	@ (8019c50 <netif_set_down+0x64>)
 8019c08:	f00f fee8 	bl	80299dc <iprintf>
 8019c0c:	e019      	b.n	8019c42 <netif_set_down+0x56>

  if (netif->flags & NETIF_FLAG_UP) {
 8019c0e:	687b      	ldr	r3, [r7, #4]
 8019c10:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019c14:	f003 0301 	and.w	r3, r3, #1
 8019c18:	2b00      	cmp	r3, #0
 8019c1a:	d012      	beq.n	8019c42 <netif_set_down+0x56>
      args.status_changed.state = 0;
      netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args);
    }
#endif

    netif_clear_flags(netif, NETIF_FLAG_UP);
 8019c1c:	687b      	ldr	r3, [r7, #4]
 8019c1e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019c22:	f023 0301 	bic.w	r3, r3, #1
 8019c26:	b2da      	uxtb	r2, r3
 8019c28:	687b      	ldr	r3, [r7, #4]
 8019c2a:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
    MIB2_COPY_SYSUPTIME_TO(&netif->ts);

#if LWIP_IPV4 && LWIP_ARP
    if (netif->flags & NETIF_FLAG_ETHARP) {
 8019c2e:	687b      	ldr	r3, [r7, #4]
 8019c30:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019c34:	f003 0308 	and.w	r3, r3, #8
 8019c38:	2b00      	cmp	r3, #0
 8019c3a:	d002      	beq.n	8019c42 <netif_set_down+0x56>
      etharp_cleanup_netif(netif);
 8019c3c:	6878      	ldr	r0, [r7, #4]
 8019c3e:	f00a f8ab 	bl	8023d98 <etharp_cleanup_netif>
    nd6_cleanup_netif(netif);
#endif /* LWIP_IPV6 */

    NETIF_STATUS_CALLBACK(netif);
  }
}
 8019c42:	3708      	adds	r7, #8
 8019c44:	46bd      	mov	sp, r7
 8019c46:	bd80      	pop	{r7, pc}
 8019c48:	0802dec0 	.word	0x0802dec0
 8019c4c:	0802e088 	.word	0x0802e088
 8019c50:	0802df10 	.word	0x0802df10

08019c54 <netif_set_link_up>:
 * @ingroup netif
 * Called by a driver when its link goes up
 */
void
netif_set_link_up(struct netif *netif)
{
 8019c54:	b580      	push	{r7, lr}
 8019c56:	b082      	sub	sp, #8
 8019c58:	af00      	add	r7, sp, #0
 8019c5a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 8019c5c:	f7f6 fc72 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("netif_set_link_up: invalid netif", netif != NULL, return);
 8019c60:	687b      	ldr	r3, [r7, #4]
 8019c62:	2b00      	cmp	r3, #0
 8019c64:	d107      	bne.n	8019c76 <netif_set_link_up+0x22>
 8019c66:	4b15      	ldr	r3, [pc, #84]	@ (8019cbc <netif_set_link_up+0x68>)
 8019c68:	f44f 7278 	mov.w	r2, #992	@ 0x3e0
 8019c6c:	4914      	ldr	r1, [pc, #80]	@ (8019cc0 <netif_set_link_up+0x6c>)
 8019c6e:	4815      	ldr	r0, [pc, #84]	@ (8019cc4 <netif_set_link_up+0x70>)
 8019c70:	f00f feb4 	bl	80299dc <iprintf>
 8019c74:	e01e      	b.n	8019cb4 <netif_set_link_up+0x60>

  if (!(netif->flags & NETIF_FLAG_LINK_UP)) {
 8019c76:	687b      	ldr	r3, [r7, #4]
 8019c78:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019c7c:	f003 0304 	and.w	r3, r3, #4
 8019c80:	2b00      	cmp	r3, #0
 8019c82:	d117      	bne.n	8019cb4 <netif_set_link_up+0x60>
    netif_set_flags(netif, NETIF_FLAG_LINK_UP);
 8019c84:	687b      	ldr	r3, [r7, #4]
 8019c86:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019c8a:	f043 0304 	orr.w	r3, r3, #4
 8019c8e:	b2da      	uxtb	r2, r3
 8019c90:	687b      	ldr	r3, [r7, #4]
 8019c92:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31

#if LWIP_DHCP
    dhcp_network_changed(netif);
 8019c96:	6878      	ldr	r0, [r7, #4]
 8019c98:	f008 faaa 	bl	80221f0 <dhcp_network_changed>

#if LWIP_AUTOIP
    autoip_network_changed(netif);
#endif /* LWIP_AUTOIP */

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6);
 8019c9c:	2103      	movs	r1, #3
 8019c9e:	6878      	ldr	r0, [r7, #4]
 8019ca0:	f7ff ff64 	bl	8019b6c <netif_issue_reports>
#if LWIP_IPV6
    nd6_restart_netif(netif);
#endif /* LWIP_IPV6 */

    NETIF_LINK_CALLBACK(netif);
 8019ca4:	687b      	ldr	r3, [r7, #4]
 8019ca6:	69db      	ldr	r3, [r3, #28]
 8019ca8:	2b00      	cmp	r3, #0
 8019caa:	d003      	beq.n	8019cb4 <netif_set_link_up+0x60>
 8019cac:	687b      	ldr	r3, [r7, #4]
 8019cae:	69db      	ldr	r3, [r3, #28]
 8019cb0:	6878      	ldr	r0, [r7, #4]
 8019cb2:	4798      	blx	r3
      args.link_changed.state = 1;
      netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args);
    }
#endif
  }
}
 8019cb4:	3708      	adds	r7, #8
 8019cb6:	46bd      	mov	sp, r7
 8019cb8:	bd80      	pop	{r7, pc}
 8019cba:	bf00      	nop
 8019cbc:	0802dec0 	.word	0x0802dec0
 8019cc0:	0802e0a8 	.word	0x0802e0a8
 8019cc4:	0802df10 	.word	0x0802df10

08019cc8 <netif_set_link_down>:
 * @ingroup netif
 * Called by a driver when its link goes down
 */
void
netif_set_link_down(struct netif *netif)
{
 8019cc8:	b580      	push	{r7, lr}
 8019cca:	b082      	sub	sp, #8
 8019ccc:	af00      	add	r7, sp, #0
 8019cce:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 8019cd0:	f7f6 fc38 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("netif_set_link_down: invalid netif", netif != NULL, return);
 8019cd4:	687b      	ldr	r3, [r7, #4]
 8019cd6:	2b00      	cmp	r3, #0
 8019cd8:	d107      	bne.n	8019cea <netif_set_link_down+0x22>
 8019cda:	4b11      	ldr	r3, [pc, #68]	@ (8019d20 <netif_set_link_down+0x58>)
 8019cdc:	f240 4206 	movw	r2, #1030	@ 0x406
 8019ce0:	4910      	ldr	r1, [pc, #64]	@ (8019d24 <netif_set_link_down+0x5c>)
 8019ce2:	4811      	ldr	r0, [pc, #68]	@ (8019d28 <netif_set_link_down+0x60>)
 8019ce4:	f00f fe7a 	bl	80299dc <iprintf>
 8019ce8:	e017      	b.n	8019d1a <netif_set_link_down+0x52>

  if (netif->flags & NETIF_FLAG_LINK_UP) {
 8019cea:	687b      	ldr	r3, [r7, #4]
 8019cec:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019cf0:	f003 0304 	and.w	r3, r3, #4
 8019cf4:	2b00      	cmp	r3, #0
 8019cf6:	d010      	beq.n	8019d1a <netif_set_link_down+0x52>
    netif_clear_flags(netif, NETIF_FLAG_LINK_UP);
 8019cf8:	687b      	ldr	r3, [r7, #4]
 8019cfa:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019cfe:	f023 0304 	bic.w	r3, r3, #4
 8019d02:	b2da      	uxtb	r2, r3
 8019d04:	687b      	ldr	r3, [r7, #4]
 8019d06:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
    NETIF_LINK_CALLBACK(netif);
 8019d0a:	687b      	ldr	r3, [r7, #4]
 8019d0c:	69db      	ldr	r3, [r3, #28]
 8019d0e:	2b00      	cmp	r3, #0
 8019d10:	d003      	beq.n	8019d1a <netif_set_link_down+0x52>
 8019d12:	687b      	ldr	r3, [r7, #4]
 8019d14:	69db      	ldr	r3, [r3, #28]
 8019d16:	6878      	ldr	r0, [r7, #4]
 8019d18:	4798      	blx	r3
      args.link_changed.state = 0;
      netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args);
    }
#endif
  }
}
 8019d1a:	3708      	adds	r7, #8
 8019d1c:	46bd      	mov	sp, r7
 8019d1e:	bd80      	pop	{r7, pc}
 8019d20:	0802dec0 	.word	0x0802dec0
 8019d24:	0802e0cc 	.word	0x0802e0cc
 8019d28:	0802df10 	.word	0x0802df10

08019d2c <netif_set_link_callback>:
 * @ingroup netif
 * Set callback to be called when link is brought up/down
 */
void
netif_set_link_callback(struct netif *netif, netif_status_callback_fn link_callback)
{
 8019d2c:	b580      	push	{r7, lr}
 8019d2e:	b082      	sub	sp, #8
 8019d30:	af00      	add	r7, sp, #0
 8019d32:	6078      	str	r0, [r7, #4]
 8019d34:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 8019d36:	f7f6 fc05 	bl	8010544 <sys_check_core_locking>

  if (netif) {
 8019d3a:	687b      	ldr	r3, [r7, #4]
 8019d3c:	2b00      	cmp	r3, #0
 8019d3e:	d002      	beq.n	8019d46 <netif_set_link_callback+0x1a>
    netif->link_callback = link_callback;
 8019d40:	687b      	ldr	r3, [r7, #4]
 8019d42:	683a      	ldr	r2, [r7, #0]
 8019d44:	61da      	str	r2, [r3, #28]
  }
}
 8019d46:	bf00      	nop
 8019d48:	3708      	adds	r7, #8
 8019d4a:	46bd      	mov	sp, r7
 8019d4c:	bd80      	pop	{r7, pc}

08019d4e <netif_null_output_ip4>:
#if LWIP_IPV4
/** Dummy IPv4 output function for netifs not supporting IPv4
 */
static err_t
netif_null_output_ip4(struct netif *netif, struct pbuf *p, const ip4_addr_t *ipaddr)
{
 8019d4e:	b480      	push	{r7}
 8019d50:	b085      	sub	sp, #20
 8019d52:	af00      	add	r7, sp, #0
 8019d54:	60f8      	str	r0, [r7, #12]
 8019d56:	60b9      	str	r1, [r7, #8]
 8019d58:	607a      	str	r2, [r7, #4]
  LWIP_UNUSED_ARG(netif);
  LWIP_UNUSED_ARG(p);
  LWIP_UNUSED_ARG(ipaddr);

  return ERR_IF;
 8019d5a:	f06f 030b 	mvn.w	r3, #11
}
 8019d5e:	4618      	mov	r0, r3
 8019d60:	3714      	adds	r7, #20
 8019d62:	46bd      	mov	sp, r7
 8019d64:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019d68:	4770      	bx	lr
	...

08019d6c <netif_get_by_index>:
*
* @param idx index of netif to find
*/
struct netif *
netif_get_by_index(u8_t idx)
{
 8019d6c:	b580      	push	{r7, lr}
 8019d6e:	b084      	sub	sp, #16
 8019d70:	af00      	add	r7, sp, #0
 8019d72:	4603      	mov	r3, r0
 8019d74:	71fb      	strb	r3, [r7, #7]
  struct netif *netif;

  LWIP_ASSERT_CORE_LOCKED();
 8019d76:	f7f6 fbe5 	bl	8010544 <sys_check_core_locking>

  if (idx != NETIF_NO_INDEX) {
 8019d7a:	79fb      	ldrb	r3, [r7, #7]
 8019d7c:	2b00      	cmp	r3, #0
 8019d7e:	d013      	beq.n	8019da8 <netif_get_by_index+0x3c>
    NETIF_FOREACH(netif) {
 8019d80:	4b0c      	ldr	r3, [pc, #48]	@ (8019db4 <netif_get_by_index+0x48>)
 8019d82:	681b      	ldr	r3, [r3, #0]
 8019d84:	60fb      	str	r3, [r7, #12]
 8019d86:	e00c      	b.n	8019da2 <netif_get_by_index+0x36>
      if (idx == netif_get_index(netif)) {
 8019d88:	68fb      	ldr	r3, [r7, #12]
 8019d8a:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8019d8e:	3301      	adds	r3, #1
 8019d90:	b2db      	uxtb	r3, r3
 8019d92:	79fa      	ldrb	r2, [r7, #7]
 8019d94:	429a      	cmp	r2, r3
 8019d96:	d101      	bne.n	8019d9c <netif_get_by_index+0x30>
        return netif; /* found! */
 8019d98:	68fb      	ldr	r3, [r7, #12]
 8019d9a:	e006      	b.n	8019daa <netif_get_by_index+0x3e>
    NETIF_FOREACH(netif) {
 8019d9c:	68fb      	ldr	r3, [r7, #12]
 8019d9e:	681b      	ldr	r3, [r3, #0]
 8019da0:	60fb      	str	r3, [r7, #12]
 8019da2:	68fb      	ldr	r3, [r7, #12]
 8019da4:	2b00      	cmp	r3, #0
 8019da6:	d1ef      	bne.n	8019d88 <netif_get_by_index+0x1c>
      }
    }
  }

  return NULL;
 8019da8:	2300      	movs	r3, #0
}
 8019daa:	4618      	mov	r0, r3
 8019dac:	3710      	adds	r7, #16
 8019dae:	46bd      	mov	sp, r7
 8019db0:	bd80      	pop	{r7, pc}
 8019db2:	bf00      	nop
 8019db4:	2402ae7c 	.word	0x2402ae7c

08019db8 <pbuf_free_ooseq>:
#if !NO_SYS
static
#endif /* !NO_SYS */
void
pbuf_free_ooseq(void)
{
 8019db8:	b580      	push	{r7, lr}
 8019dba:	b082      	sub	sp, #8
 8019dbc:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb;
  SYS_ARCH_SET(pbuf_free_ooseq_pending, 0);
 8019dbe:	f00c fb77 	bl	80264b0 <sys_arch_protect>
 8019dc2:	6038      	str	r0, [r7, #0]
 8019dc4:	4b0d      	ldr	r3, [pc, #52]	@ (8019dfc <pbuf_free_ooseq+0x44>)
 8019dc6:	2200      	movs	r2, #0
 8019dc8:	701a      	strb	r2, [r3, #0]
 8019dca:	6838      	ldr	r0, [r7, #0]
 8019dcc:	f00c fb7e 	bl	80264cc <sys_arch_unprotect>

  for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
 8019dd0:	4b0b      	ldr	r3, [pc, #44]	@ (8019e00 <pbuf_free_ooseq+0x48>)
 8019dd2:	681b      	ldr	r3, [r3, #0]
 8019dd4:	607b      	str	r3, [r7, #4]
 8019dd6:	e00a      	b.n	8019dee <pbuf_free_ooseq+0x36>
    if (pcb->ooseq != NULL) {
 8019dd8:	687b      	ldr	r3, [r7, #4]
 8019dda:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 8019ddc:	2b00      	cmp	r3, #0
 8019dde:	d003      	beq.n	8019de8 <pbuf_free_ooseq+0x30>
      /** Free the ooseq pbufs of one PCB only */
      LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free_ooseq: freeing out-of-sequence pbufs\n"));
      tcp_free_ooseq(pcb);
 8019de0:	6878      	ldr	r0, [r7, #4]
 8019de2:	f002 fc55 	bl	801c690 <tcp_free_ooseq>
      return;
 8019de6:	e005      	b.n	8019df4 <pbuf_free_ooseq+0x3c>
  for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
 8019de8:	687b      	ldr	r3, [r7, #4]
 8019dea:	68db      	ldr	r3, [r3, #12]
 8019dec:	607b      	str	r3, [r7, #4]
 8019dee:	687b      	ldr	r3, [r7, #4]
 8019df0:	2b00      	cmp	r3, #0
 8019df2:	d1f1      	bne.n	8019dd8 <pbuf_free_ooseq+0x20>
    }
  }
}
 8019df4:	3708      	adds	r7, #8
 8019df6:	46bd      	mov	sp, r7
 8019df8:	bd80      	pop	{r7, pc}
 8019dfa:	bf00      	nop
 8019dfc:	2402ae85 	.word	0x2402ae85
 8019e00:	2402ae94 	.word	0x2402ae94

08019e04 <pbuf_free_ooseq_callback>:
/**
 * Just a callback function for tcpip_callback() that calls pbuf_free_ooseq().
 */
static void
pbuf_free_ooseq_callback(void *arg)
{
 8019e04:	b580      	push	{r7, lr}
 8019e06:	b082      	sub	sp, #8
 8019e08:	af00      	add	r7, sp, #0
 8019e0a:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(arg);
  pbuf_free_ooseq();
 8019e0c:	f7ff ffd4 	bl	8019db8 <pbuf_free_ooseq>
}
 8019e10:	bf00      	nop
 8019e12:	3708      	adds	r7, #8
 8019e14:	46bd      	mov	sp, r7
 8019e16:	bd80      	pop	{r7, pc}

08019e18 <pbuf_pool_is_empty>:
#endif /* !NO_SYS */

/** Queue a call to pbuf_free_ooseq if not already queued. */
static void
pbuf_pool_is_empty(void)
{
 8019e18:	b580      	push	{r7, lr}
 8019e1a:	b082      	sub	sp, #8
 8019e1c:	af00      	add	r7, sp, #0
#ifndef PBUF_POOL_FREE_OOSEQ_QUEUE_CALL
  SYS_ARCH_SET(pbuf_free_ooseq_pending, 1);
#else /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */
  u8_t queued;
  SYS_ARCH_DECL_PROTECT(old_level);
  SYS_ARCH_PROTECT(old_level);
 8019e1e:	f00c fb47 	bl	80264b0 <sys_arch_protect>
 8019e22:	6078      	str	r0, [r7, #4]
  queued = pbuf_free_ooseq_pending;
 8019e24:	4b0f      	ldr	r3, [pc, #60]	@ (8019e64 <pbuf_pool_is_empty+0x4c>)
 8019e26:	781b      	ldrb	r3, [r3, #0]
 8019e28:	70fb      	strb	r3, [r7, #3]
  pbuf_free_ooseq_pending = 1;
 8019e2a:	4b0e      	ldr	r3, [pc, #56]	@ (8019e64 <pbuf_pool_is_empty+0x4c>)
 8019e2c:	2201      	movs	r2, #1
 8019e2e:	701a      	strb	r2, [r3, #0]
  SYS_ARCH_UNPROTECT(old_level);
 8019e30:	6878      	ldr	r0, [r7, #4]
 8019e32:	f00c fb4b 	bl	80264cc <sys_arch_unprotect>

  if (!queued) {
 8019e36:	78fb      	ldrb	r3, [r7, #3]
 8019e38:	2b00      	cmp	r3, #0
 8019e3a:	d10f      	bne.n	8019e5c <pbuf_pool_is_empty+0x44>
    /* queue a call to pbuf_free_ooseq if not already queued */
    PBUF_POOL_FREE_OOSEQ_QUEUE_CALL();
 8019e3c:	2100      	movs	r1, #0
 8019e3e:	480a      	ldr	r0, [pc, #40]	@ (8019e68 <pbuf_pool_is_empty+0x50>)
 8019e40:	f7fe fdd6 	bl	80189f0 <tcpip_try_callback>
 8019e44:	4603      	mov	r3, r0
 8019e46:	2b00      	cmp	r3, #0
 8019e48:	d008      	beq.n	8019e5c <pbuf_pool_is_empty+0x44>
 8019e4a:	f00c fb31 	bl	80264b0 <sys_arch_protect>
 8019e4e:	6078      	str	r0, [r7, #4]
 8019e50:	4b04      	ldr	r3, [pc, #16]	@ (8019e64 <pbuf_pool_is_empty+0x4c>)
 8019e52:	2200      	movs	r2, #0
 8019e54:	701a      	strb	r2, [r3, #0]
 8019e56:	6878      	ldr	r0, [r7, #4]
 8019e58:	f00c fb38 	bl	80264cc <sys_arch_unprotect>
  }
#endif /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */
}
 8019e5c:	bf00      	nop
 8019e5e:	3708      	adds	r7, #8
 8019e60:	46bd      	mov	sp, r7
 8019e62:	bd80      	pop	{r7, pc}
 8019e64:	2402ae85 	.word	0x2402ae85
 8019e68:	08019e05 	.word	0x08019e05

08019e6c <pbuf_init_alloced_pbuf>:
#endif /* !LWIP_TCP || !TCP_QUEUE_OOSEQ || !PBUF_POOL_FREE_OOSEQ */

/* Initialize members of struct pbuf after allocation */
static void
pbuf_init_alloced_pbuf(struct pbuf *p, void *payload, u16_t tot_len, u16_t len, pbuf_type type, u8_t flags)
{
 8019e6c:	b480      	push	{r7}
 8019e6e:	b085      	sub	sp, #20
 8019e70:	af00      	add	r7, sp, #0
 8019e72:	60f8      	str	r0, [r7, #12]
 8019e74:	60b9      	str	r1, [r7, #8]
 8019e76:	4611      	mov	r1, r2
 8019e78:	461a      	mov	r2, r3
 8019e7a:	460b      	mov	r3, r1
 8019e7c:	80fb      	strh	r3, [r7, #6]
 8019e7e:	4613      	mov	r3, r2
 8019e80:	80bb      	strh	r3, [r7, #4]
  p->next = NULL;
 8019e82:	68fb      	ldr	r3, [r7, #12]
 8019e84:	2200      	movs	r2, #0
 8019e86:	601a      	str	r2, [r3, #0]
  p->payload = payload;
 8019e88:	68fb      	ldr	r3, [r7, #12]
 8019e8a:	68ba      	ldr	r2, [r7, #8]
 8019e8c:	605a      	str	r2, [r3, #4]
  p->tot_len = tot_len;
 8019e8e:	68fb      	ldr	r3, [r7, #12]
 8019e90:	88fa      	ldrh	r2, [r7, #6]
 8019e92:	811a      	strh	r2, [r3, #8]
  p->len = len;
 8019e94:	68fb      	ldr	r3, [r7, #12]
 8019e96:	88ba      	ldrh	r2, [r7, #4]
 8019e98:	815a      	strh	r2, [r3, #10]
  p->type_internal = (u8_t)type;
 8019e9a:	8b3b      	ldrh	r3, [r7, #24]
 8019e9c:	b2da      	uxtb	r2, r3
 8019e9e:	68fb      	ldr	r3, [r7, #12]
 8019ea0:	731a      	strb	r2, [r3, #12]
  p->flags = flags;
 8019ea2:	68fb      	ldr	r3, [r7, #12]
 8019ea4:	7f3a      	ldrb	r2, [r7, #28]
 8019ea6:	735a      	strb	r2, [r3, #13]
  p->ref = 1;
 8019ea8:	68fb      	ldr	r3, [r7, #12]
 8019eaa:	2201      	movs	r2, #1
 8019eac:	739a      	strb	r2, [r3, #14]
  p->if_idx = NETIF_NO_INDEX;
 8019eae:	68fb      	ldr	r3, [r7, #12]
 8019eb0:	2200      	movs	r2, #0
 8019eb2:	73da      	strb	r2, [r3, #15]
}
 8019eb4:	bf00      	nop
 8019eb6:	3714      	adds	r7, #20
 8019eb8:	46bd      	mov	sp, r7
 8019eba:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019ebe:	4770      	bx	lr

08019ec0 <pbuf_alloc>:
 * @return the allocated pbuf. If multiple pbufs where allocated, this
 * is the first pbuf of a pbuf chain.
 */
struct pbuf *
pbuf_alloc(pbuf_layer layer, u16_t length, pbuf_type type)
{
 8019ec0:	b580      	push	{r7, lr}
 8019ec2:	b08c      	sub	sp, #48	@ 0x30
 8019ec4:	af02      	add	r7, sp, #8
 8019ec6:	4603      	mov	r3, r0
 8019ec8:	71fb      	strb	r3, [r7, #7]
 8019eca:	460b      	mov	r3, r1
 8019ecc:	80bb      	strh	r3, [r7, #4]
 8019ece:	4613      	mov	r3, r2
 8019ed0:	807b      	strh	r3, [r7, #2]
  struct pbuf *p;
  u16_t offset = (u16_t)layer;
 8019ed2:	79fb      	ldrb	r3, [r7, #7]
 8019ed4:	847b      	strh	r3, [r7, #34]	@ 0x22
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F")\n", length));

  switch (type) {
 8019ed6:	887b      	ldrh	r3, [r7, #2]
 8019ed8:	f5b3 7f20 	cmp.w	r3, #640	@ 0x280
 8019edc:	f000 8082 	beq.w	8019fe4 <pbuf_alloc+0x124>
 8019ee0:	f5b3 7f20 	cmp.w	r3, #640	@ 0x280
 8019ee4:	f300 80c9 	bgt.w	801a07a <pbuf_alloc+0x1ba>
 8019ee8:	f5b3 7fc1 	cmp.w	r3, #386	@ 0x182
 8019eec:	d010      	beq.n	8019f10 <pbuf_alloc+0x50>
 8019eee:	f5b3 7fc1 	cmp.w	r3, #386	@ 0x182
 8019ef2:	f300 80c2 	bgt.w	801a07a <pbuf_alloc+0x1ba>
 8019ef6:	2b01      	cmp	r3, #1
 8019ef8:	d002      	beq.n	8019f00 <pbuf_alloc+0x40>
 8019efa:	2b41      	cmp	r3, #65	@ 0x41
 8019efc:	f040 80bd 	bne.w	801a07a <pbuf_alloc+0x1ba>
    case PBUF_REF: /* fall through */
    case PBUF_ROM:
      p = pbuf_alloc_reference(NULL, length, type);
 8019f00:	887a      	ldrh	r2, [r7, #2]
 8019f02:	88bb      	ldrh	r3, [r7, #4]
 8019f04:	4619      	mov	r1, r3
 8019f06:	2000      	movs	r0, #0
 8019f08:	f000 f8d2 	bl	801a0b0 <pbuf_alloc_reference>
 8019f0c:	6278      	str	r0, [r7, #36]	@ 0x24
      break;
 8019f0e:	e0be      	b.n	801a08e <pbuf_alloc+0x1ce>
    case PBUF_POOL: {
      struct pbuf *q, *last;
      u16_t rem_len; /* remaining length */
      p = NULL;
 8019f10:	2300      	movs	r3, #0
 8019f12:	627b      	str	r3, [r7, #36]	@ 0x24
      last = NULL;
 8019f14:	2300      	movs	r3, #0
 8019f16:	61fb      	str	r3, [r7, #28]
      rem_len = length;
 8019f18:	88bb      	ldrh	r3, [r7, #4]
 8019f1a:	837b      	strh	r3, [r7, #26]
      do {
        u16_t qlen;
        q = (struct pbuf *)memp_malloc(MEMP_PBUF_POOL);
 8019f1c:	200c      	movs	r0, #12
 8019f1e:	f7ff fb81 	bl	8019624 <memp_malloc>
 8019f22:	6138      	str	r0, [r7, #16]
        if (q == NULL) {
 8019f24:	693b      	ldr	r3, [r7, #16]
 8019f26:	2b00      	cmp	r3, #0
 8019f28:	d109      	bne.n	8019f3e <pbuf_alloc+0x7e>
          PBUF_POOL_IS_EMPTY();
 8019f2a:	f7ff ff75 	bl	8019e18 <pbuf_pool_is_empty>
          /* free chain so far allocated */
          if (p) {
 8019f2e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019f30:	2b00      	cmp	r3, #0
 8019f32:	d002      	beq.n	8019f3a <pbuf_alloc+0x7a>
            pbuf_free(p);
 8019f34:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8019f36:	f000 fad9 	bl	801a4ec <pbuf_free>
          }
          /* bail out unsuccessfully */
          return NULL;
 8019f3a:	2300      	movs	r3, #0
 8019f3c:	e0a8      	b.n	801a090 <pbuf_alloc+0x1d0>
        }
        qlen = LWIP_MIN(rem_len, (u16_t)(PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)));
 8019f3e:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8019f40:	3303      	adds	r3, #3
 8019f42:	b29b      	uxth	r3, r3
 8019f44:	f023 0303 	bic.w	r3, r3, #3
 8019f48:	b29a      	uxth	r2, r3
 8019f4a:	f240 53ec 	movw	r3, #1516	@ 0x5ec
 8019f4e:	1a9b      	subs	r3, r3, r2
 8019f50:	b29b      	uxth	r3, r3
 8019f52:	8b7a      	ldrh	r2, [r7, #26]
 8019f54:	4293      	cmp	r3, r2
 8019f56:	bf28      	it	cs
 8019f58:	4613      	movcs	r3, r2
 8019f5a:	81fb      	strh	r3, [r7, #14]
        pbuf_init_alloced_pbuf(q, LWIP_MEM_ALIGN((void *)((u8_t *)q + SIZEOF_STRUCT_PBUF + offset)),
 8019f5c:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8019f5e:	3310      	adds	r3, #16
 8019f60:	693a      	ldr	r2, [r7, #16]
 8019f62:	4413      	add	r3, r2
 8019f64:	3303      	adds	r3, #3
 8019f66:	f023 0303 	bic.w	r3, r3, #3
 8019f6a:	4618      	mov	r0, r3
 8019f6c:	89f9      	ldrh	r1, [r7, #14]
 8019f6e:	8b7a      	ldrh	r2, [r7, #26]
 8019f70:	2300      	movs	r3, #0
 8019f72:	9301      	str	r3, [sp, #4]
 8019f74:	887b      	ldrh	r3, [r7, #2]
 8019f76:	9300      	str	r3, [sp, #0]
 8019f78:	460b      	mov	r3, r1
 8019f7a:	4601      	mov	r1, r0
 8019f7c:	6938      	ldr	r0, [r7, #16]
 8019f7e:	f7ff ff75 	bl	8019e6c <pbuf_init_alloced_pbuf>
                               rem_len, qlen, type, 0);
        LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned",
 8019f82:	693b      	ldr	r3, [r7, #16]
 8019f84:	685b      	ldr	r3, [r3, #4]
 8019f86:	f003 0303 	and.w	r3, r3, #3
 8019f8a:	2b00      	cmp	r3, #0
 8019f8c:	d006      	beq.n	8019f9c <pbuf_alloc+0xdc>
 8019f8e:	4b42      	ldr	r3, [pc, #264]	@ (801a098 <pbuf_alloc+0x1d8>)
 8019f90:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8019f94:	4941      	ldr	r1, [pc, #260]	@ (801a09c <pbuf_alloc+0x1dc>)
 8019f96:	4842      	ldr	r0, [pc, #264]	@ (801a0a0 <pbuf_alloc+0x1e0>)
 8019f98:	f00f fd20 	bl	80299dc <iprintf>
                    ((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0);
        LWIP_ASSERT("PBUF_POOL_BUFSIZE must be bigger than MEM_ALIGNMENT",
 8019f9c:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8019f9e:	3303      	adds	r3, #3
 8019fa0:	f023 0303 	bic.w	r3, r3, #3
 8019fa4:	f240 52ec 	movw	r2, #1516	@ 0x5ec
 8019fa8:	4293      	cmp	r3, r2
 8019faa:	d106      	bne.n	8019fba <pbuf_alloc+0xfa>
 8019fac:	4b3a      	ldr	r3, [pc, #232]	@ (801a098 <pbuf_alloc+0x1d8>)
 8019fae:	f44f 7281 	mov.w	r2, #258	@ 0x102
 8019fb2:	493c      	ldr	r1, [pc, #240]	@ (801a0a4 <pbuf_alloc+0x1e4>)
 8019fb4:	483a      	ldr	r0, [pc, #232]	@ (801a0a0 <pbuf_alloc+0x1e0>)
 8019fb6:	f00f fd11 	bl	80299dc <iprintf>
                    (PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)) > 0 );
        if (p == NULL) {
 8019fba:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019fbc:	2b00      	cmp	r3, #0
 8019fbe:	d102      	bne.n	8019fc6 <pbuf_alloc+0x106>
          /* allocated head of pbuf chain (into p) */
          p = q;
 8019fc0:	693b      	ldr	r3, [r7, #16]
 8019fc2:	627b      	str	r3, [r7, #36]	@ 0x24
 8019fc4:	e002      	b.n	8019fcc <pbuf_alloc+0x10c>
        } else {
          /* make previous pbuf point to this pbuf */
          last->next = q;
 8019fc6:	69fb      	ldr	r3, [r7, #28]
 8019fc8:	693a      	ldr	r2, [r7, #16]
 8019fca:	601a      	str	r2, [r3, #0]
        }
        last = q;
 8019fcc:	693b      	ldr	r3, [r7, #16]
 8019fce:	61fb      	str	r3, [r7, #28]
        rem_len = (u16_t)(rem_len - qlen);
 8019fd0:	8b7a      	ldrh	r2, [r7, #26]
 8019fd2:	89fb      	ldrh	r3, [r7, #14]
 8019fd4:	1ad3      	subs	r3, r2, r3
 8019fd6:	837b      	strh	r3, [r7, #26]
        offset = 0;
 8019fd8:	2300      	movs	r3, #0
 8019fda:	847b      	strh	r3, [r7, #34]	@ 0x22
      } while (rem_len > 0);
 8019fdc:	8b7b      	ldrh	r3, [r7, #26]
 8019fde:	2b00      	cmp	r3, #0
 8019fe0:	d19c      	bne.n	8019f1c <pbuf_alloc+0x5c>
      break;
 8019fe2:	e054      	b.n	801a08e <pbuf_alloc+0x1ce>
    }
    case PBUF_RAM: {
      u16_t payload_len = (u16_t)(LWIP_MEM_ALIGN_SIZE(offset) + LWIP_MEM_ALIGN_SIZE(length));
 8019fe4:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8019fe6:	3303      	adds	r3, #3
 8019fe8:	b29b      	uxth	r3, r3
 8019fea:	f023 0303 	bic.w	r3, r3, #3
 8019fee:	b29a      	uxth	r2, r3
 8019ff0:	88bb      	ldrh	r3, [r7, #4]
 8019ff2:	3303      	adds	r3, #3
 8019ff4:	b29b      	uxth	r3, r3
 8019ff6:	f023 0303 	bic.w	r3, r3, #3
 8019ffa:	b29b      	uxth	r3, r3
 8019ffc:	4413      	add	r3, r2
 8019ffe:	833b      	strh	r3, [r7, #24]
      mem_size_t alloc_len = (mem_size_t)(LWIP_MEM_ALIGN_SIZE(SIZEOF_STRUCT_PBUF) + payload_len);
 801a000:	8b3b      	ldrh	r3, [r7, #24]
 801a002:	3310      	adds	r3, #16
 801a004:	617b      	str	r3, [r7, #20]

      /* bug #50040: Check for integer overflow when calculating alloc_len */
      if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) ||
 801a006:	8b3a      	ldrh	r2, [r7, #24]
 801a008:	88bb      	ldrh	r3, [r7, #4]
 801a00a:	3303      	adds	r3, #3
 801a00c:	f023 0303 	bic.w	r3, r3, #3
 801a010:	429a      	cmp	r2, r3
 801a012:	d306      	bcc.n	801a022 <pbuf_alloc+0x162>
          (alloc_len < LWIP_MEM_ALIGN_SIZE(length))) {
 801a014:	88bb      	ldrh	r3, [r7, #4]
 801a016:	3303      	adds	r3, #3
 801a018:	f023 0303 	bic.w	r3, r3, #3
      if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) ||
 801a01c:	697a      	ldr	r2, [r7, #20]
 801a01e:	429a      	cmp	r2, r3
 801a020:	d201      	bcs.n	801a026 <pbuf_alloc+0x166>
        return NULL;
 801a022:	2300      	movs	r3, #0
 801a024:	e034      	b.n	801a090 <pbuf_alloc+0x1d0>
      }

      /* If pbuf is to be allocated in RAM, allocate memory for it. */
      p = (struct pbuf *)mem_malloc(alloc_len);
 801a026:	6978      	ldr	r0, [r7, #20]
 801a028:	f7ff f960 	bl	80192ec <mem_malloc>
 801a02c:	6278      	str	r0, [r7, #36]	@ 0x24
      if (p == NULL) {
 801a02e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a030:	2b00      	cmp	r3, #0
 801a032:	d101      	bne.n	801a038 <pbuf_alloc+0x178>
        return NULL;
 801a034:	2300      	movs	r3, #0
 801a036:	e02b      	b.n	801a090 <pbuf_alloc+0x1d0>
      }
      pbuf_init_alloced_pbuf(p, LWIP_MEM_ALIGN((void *)((u8_t *)p + SIZEOF_STRUCT_PBUF + offset)),
 801a038:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801a03a:	3310      	adds	r3, #16
 801a03c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801a03e:	4413      	add	r3, r2
 801a040:	3303      	adds	r3, #3
 801a042:	f023 0303 	bic.w	r3, r3, #3
 801a046:	4618      	mov	r0, r3
 801a048:	88b9      	ldrh	r1, [r7, #4]
 801a04a:	88ba      	ldrh	r2, [r7, #4]
 801a04c:	2300      	movs	r3, #0
 801a04e:	9301      	str	r3, [sp, #4]
 801a050:	887b      	ldrh	r3, [r7, #2]
 801a052:	9300      	str	r3, [sp, #0]
 801a054:	460b      	mov	r3, r1
 801a056:	4601      	mov	r1, r0
 801a058:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 801a05a:	f7ff ff07 	bl	8019e6c <pbuf_init_alloced_pbuf>
                             length, length, type, 0);
      LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned",
 801a05e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a060:	685b      	ldr	r3, [r3, #4]
 801a062:	f003 0303 	and.w	r3, r3, #3
 801a066:	2b00      	cmp	r3, #0
 801a068:	d010      	beq.n	801a08c <pbuf_alloc+0x1cc>
 801a06a:	4b0b      	ldr	r3, [pc, #44]	@ (801a098 <pbuf_alloc+0x1d8>)
 801a06c:	f44f 7291 	mov.w	r2, #290	@ 0x122
 801a070:	490d      	ldr	r1, [pc, #52]	@ (801a0a8 <pbuf_alloc+0x1e8>)
 801a072:	480b      	ldr	r0, [pc, #44]	@ (801a0a0 <pbuf_alloc+0x1e0>)
 801a074:	f00f fcb2 	bl	80299dc <iprintf>
                  ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0);
      break;
 801a078:	e008      	b.n	801a08c <pbuf_alloc+0x1cc>
    }
    default:
      LWIP_ASSERT("pbuf_alloc: erroneous type", 0);
 801a07a:	4b07      	ldr	r3, [pc, #28]	@ (801a098 <pbuf_alloc+0x1d8>)
 801a07c:	f240 1227 	movw	r2, #295	@ 0x127
 801a080:	490a      	ldr	r1, [pc, #40]	@ (801a0ac <pbuf_alloc+0x1ec>)
 801a082:	4807      	ldr	r0, [pc, #28]	@ (801a0a0 <pbuf_alloc+0x1e0>)
 801a084:	f00f fcaa 	bl	80299dc <iprintf>
      return NULL;
 801a088:	2300      	movs	r3, #0
 801a08a:	e001      	b.n	801a090 <pbuf_alloc+0x1d0>
      break;
 801a08c:	bf00      	nop
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p));
  return p;
 801a08e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 801a090:	4618      	mov	r0, r3
 801a092:	3728      	adds	r7, #40	@ 0x28
 801a094:	46bd      	mov	sp, r7
 801a096:	bd80      	pop	{r7, pc}
 801a098:	0802e0f0 	.word	0x0802e0f0
 801a09c:	0802e120 	.word	0x0802e120
 801a0a0:	0802e150 	.word	0x0802e150
 801a0a4:	0802e178 	.word	0x0802e178
 801a0a8:	0802e1ac 	.word	0x0802e1ac
 801a0ac:	0802e1d8 	.word	0x0802e1d8

0801a0b0 <pbuf_alloc_reference>:
 *
 * @return the allocated pbuf.
 */
struct pbuf *
pbuf_alloc_reference(void *payload, u16_t length, pbuf_type type)
{
 801a0b0:	b580      	push	{r7, lr}
 801a0b2:	b086      	sub	sp, #24
 801a0b4:	af02      	add	r7, sp, #8
 801a0b6:	6078      	str	r0, [r7, #4]
 801a0b8:	460b      	mov	r3, r1
 801a0ba:	807b      	strh	r3, [r7, #2]
 801a0bc:	4613      	mov	r3, r2
 801a0be:	803b      	strh	r3, [r7, #0]
  struct pbuf *p;
  LWIP_ASSERT("invalid pbuf_type", (type == PBUF_REF) || (type == PBUF_ROM));
 801a0c0:	883b      	ldrh	r3, [r7, #0]
 801a0c2:	2b41      	cmp	r3, #65	@ 0x41
 801a0c4:	d009      	beq.n	801a0da <pbuf_alloc_reference+0x2a>
 801a0c6:	883b      	ldrh	r3, [r7, #0]
 801a0c8:	2b01      	cmp	r3, #1
 801a0ca:	d006      	beq.n	801a0da <pbuf_alloc_reference+0x2a>
 801a0cc:	4b0f      	ldr	r3, [pc, #60]	@ (801a10c <pbuf_alloc_reference+0x5c>)
 801a0ce:	f44f 72a5 	mov.w	r2, #330	@ 0x14a
 801a0d2:	490f      	ldr	r1, [pc, #60]	@ (801a110 <pbuf_alloc_reference+0x60>)
 801a0d4:	480f      	ldr	r0, [pc, #60]	@ (801a114 <pbuf_alloc_reference+0x64>)
 801a0d6:	f00f fc81 	bl	80299dc <iprintf>
  /* only allocate memory for the pbuf structure */
  p = (struct pbuf *)memp_malloc(MEMP_PBUF);
 801a0da:	200b      	movs	r0, #11
 801a0dc:	f7ff faa2 	bl	8019624 <memp_malloc>
 801a0e0:	60f8      	str	r0, [r7, #12]
  if (p == NULL) {
 801a0e2:	68fb      	ldr	r3, [r7, #12]
 801a0e4:	2b00      	cmp	r3, #0
 801a0e6:	d101      	bne.n	801a0ec <pbuf_alloc_reference+0x3c>
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                ("pbuf_alloc_reference: Could not allocate MEMP_PBUF for PBUF_%s.\n",
                 (type == PBUF_ROM) ? "ROM" : "REF"));
    return NULL;
 801a0e8:	2300      	movs	r3, #0
 801a0ea:	e00b      	b.n	801a104 <pbuf_alloc_reference+0x54>
  }
  pbuf_init_alloced_pbuf(p, payload, length, length, type, 0);
 801a0ec:	8879      	ldrh	r1, [r7, #2]
 801a0ee:	887a      	ldrh	r2, [r7, #2]
 801a0f0:	2300      	movs	r3, #0
 801a0f2:	9301      	str	r3, [sp, #4]
 801a0f4:	883b      	ldrh	r3, [r7, #0]
 801a0f6:	9300      	str	r3, [sp, #0]
 801a0f8:	460b      	mov	r3, r1
 801a0fa:	6879      	ldr	r1, [r7, #4]
 801a0fc:	68f8      	ldr	r0, [r7, #12]
 801a0fe:	f7ff feb5 	bl	8019e6c <pbuf_init_alloced_pbuf>
  return p;
 801a102:	68fb      	ldr	r3, [r7, #12]
}
 801a104:	4618      	mov	r0, r3
 801a106:	3710      	adds	r7, #16
 801a108:	46bd      	mov	sp, r7
 801a10a:	bd80      	pop	{r7, pc}
 801a10c:	0802e0f0 	.word	0x0802e0f0
 801a110:	0802e1f4 	.word	0x0802e1f4
 801a114:	0802e150 	.word	0x0802e150

0801a118 <pbuf_alloced_custom>:
 *        big enough to hold 'length' plus the header size
 */
struct pbuf *
pbuf_alloced_custom(pbuf_layer l, u16_t length, pbuf_type type, struct pbuf_custom *p,
                    void *payload_mem, u16_t payload_mem_len)
{
 801a118:	b580      	push	{r7, lr}
 801a11a:	b088      	sub	sp, #32
 801a11c:	af02      	add	r7, sp, #8
 801a11e:	607b      	str	r3, [r7, #4]
 801a120:	4603      	mov	r3, r0
 801a122:	73fb      	strb	r3, [r7, #15]
 801a124:	460b      	mov	r3, r1
 801a126:	81bb      	strh	r3, [r7, #12]
 801a128:	4613      	mov	r3, r2
 801a12a:	817b      	strh	r3, [r7, #10]
  u16_t offset = (u16_t)l;
 801a12c:	7bfb      	ldrb	r3, [r7, #15]
 801a12e:	827b      	strh	r3, [r7, #18]
  void *payload;
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloced_custom(length=%"U16_F")\n", length));

  if (LWIP_MEM_ALIGN_SIZE(offset) + length > payload_mem_len) {
 801a130:	8a7b      	ldrh	r3, [r7, #18]
 801a132:	3303      	adds	r3, #3
 801a134:	f023 0203 	bic.w	r2, r3, #3
 801a138:	89bb      	ldrh	r3, [r7, #12]
 801a13a:	441a      	add	r2, r3
 801a13c:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 801a13e:	429a      	cmp	r2, r3
 801a140:	d901      	bls.n	801a146 <pbuf_alloced_custom+0x2e>
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_WARNING, ("pbuf_alloced_custom(length=%"U16_F") buffer too short\n", length));
    return NULL;
 801a142:	2300      	movs	r3, #0
 801a144:	e018      	b.n	801a178 <pbuf_alloced_custom+0x60>
  }

  if (payload_mem != NULL) {
 801a146:	6a3b      	ldr	r3, [r7, #32]
 801a148:	2b00      	cmp	r3, #0
 801a14a:	d007      	beq.n	801a15c <pbuf_alloced_custom+0x44>
    payload = (u8_t *)payload_mem + LWIP_MEM_ALIGN_SIZE(offset);
 801a14c:	8a7b      	ldrh	r3, [r7, #18]
 801a14e:	3303      	adds	r3, #3
 801a150:	f023 0303 	bic.w	r3, r3, #3
 801a154:	6a3a      	ldr	r2, [r7, #32]
 801a156:	4413      	add	r3, r2
 801a158:	617b      	str	r3, [r7, #20]
 801a15a:	e001      	b.n	801a160 <pbuf_alloced_custom+0x48>
  } else {
    payload = NULL;
 801a15c:	2300      	movs	r3, #0
 801a15e:	617b      	str	r3, [r7, #20]
  }
  pbuf_init_alloced_pbuf(&p->pbuf, payload, length, length, type, PBUF_FLAG_IS_CUSTOM);
 801a160:	6878      	ldr	r0, [r7, #4]
 801a162:	89b9      	ldrh	r1, [r7, #12]
 801a164:	89ba      	ldrh	r2, [r7, #12]
 801a166:	2302      	movs	r3, #2
 801a168:	9301      	str	r3, [sp, #4]
 801a16a:	897b      	ldrh	r3, [r7, #10]
 801a16c:	9300      	str	r3, [sp, #0]
 801a16e:	460b      	mov	r3, r1
 801a170:	6979      	ldr	r1, [r7, #20]
 801a172:	f7ff fe7b 	bl	8019e6c <pbuf_init_alloced_pbuf>
  return &p->pbuf;
 801a176:	687b      	ldr	r3, [r7, #4]
}
 801a178:	4618      	mov	r0, r3
 801a17a:	3718      	adds	r7, #24
 801a17c:	46bd      	mov	sp, r7
 801a17e:	bd80      	pop	{r7, pc}

0801a180 <pbuf_realloc>:
 *
 * @note Despite its name, pbuf_realloc cannot grow the size of a pbuf (chain).
 */
void
pbuf_realloc(struct pbuf *p, u16_t new_len)
{
 801a180:	b580      	push	{r7, lr}
 801a182:	b084      	sub	sp, #16
 801a184:	af00      	add	r7, sp, #0
 801a186:	6078      	str	r0, [r7, #4]
 801a188:	460b      	mov	r3, r1
 801a18a:	807b      	strh	r3, [r7, #2]
  struct pbuf *q;
  u16_t rem_len; /* remaining length */
  u16_t shrink;

  LWIP_ASSERT("pbuf_realloc: p != NULL", p != NULL);
 801a18c:	687b      	ldr	r3, [r7, #4]
 801a18e:	2b00      	cmp	r3, #0
 801a190:	d106      	bne.n	801a1a0 <pbuf_realloc+0x20>
 801a192:	4b39      	ldr	r3, [pc, #228]	@ (801a278 <pbuf_realloc+0xf8>)
 801a194:	f44f 72cc 	mov.w	r2, #408	@ 0x198
 801a198:	4938      	ldr	r1, [pc, #224]	@ (801a27c <pbuf_realloc+0xfc>)
 801a19a:	4839      	ldr	r0, [pc, #228]	@ (801a280 <pbuf_realloc+0x100>)
 801a19c:	f00f fc1e 	bl	80299dc <iprintf>

  /* desired length larger than current length? */
  if (new_len >= p->tot_len) {
 801a1a0:	687b      	ldr	r3, [r7, #4]
 801a1a2:	891b      	ldrh	r3, [r3, #8]
 801a1a4:	887a      	ldrh	r2, [r7, #2]
 801a1a6:	429a      	cmp	r2, r3
 801a1a8:	d261      	bcs.n	801a26e <pbuf_realloc+0xee>
    return;
  }

  /* the pbuf chain grows by (new_len - p->tot_len) bytes
   * (which may be negative in case of shrinking) */
  shrink = (u16_t)(p->tot_len - new_len);
 801a1aa:	687b      	ldr	r3, [r7, #4]
 801a1ac:	891a      	ldrh	r2, [r3, #8]
 801a1ae:	887b      	ldrh	r3, [r7, #2]
 801a1b0:	1ad3      	subs	r3, r2, r3
 801a1b2:	813b      	strh	r3, [r7, #8]

  /* first, step over any pbufs that should remain in the chain */
  rem_len = new_len;
 801a1b4:	887b      	ldrh	r3, [r7, #2]
 801a1b6:	817b      	strh	r3, [r7, #10]
  q = p;
 801a1b8:	687b      	ldr	r3, [r7, #4]
 801a1ba:	60fb      	str	r3, [r7, #12]
  /* should this pbuf be kept? */
  while (rem_len > q->len) {
 801a1bc:	e018      	b.n	801a1f0 <pbuf_realloc+0x70>
    /* decrease remaining length by pbuf length */
    rem_len = (u16_t)(rem_len - q->len);
 801a1be:	68fb      	ldr	r3, [r7, #12]
 801a1c0:	895b      	ldrh	r3, [r3, #10]
 801a1c2:	897a      	ldrh	r2, [r7, #10]
 801a1c4:	1ad3      	subs	r3, r2, r3
 801a1c6:	817b      	strh	r3, [r7, #10]
    /* decrease total length indicator */
    q->tot_len = (u16_t)(q->tot_len - shrink);
 801a1c8:	68fb      	ldr	r3, [r7, #12]
 801a1ca:	891a      	ldrh	r2, [r3, #8]
 801a1cc:	893b      	ldrh	r3, [r7, #8]
 801a1ce:	1ad3      	subs	r3, r2, r3
 801a1d0:	b29a      	uxth	r2, r3
 801a1d2:	68fb      	ldr	r3, [r7, #12]
 801a1d4:	811a      	strh	r2, [r3, #8]
    /* proceed to next pbuf in chain */
    q = q->next;
 801a1d6:	68fb      	ldr	r3, [r7, #12]
 801a1d8:	681b      	ldr	r3, [r3, #0]
 801a1da:	60fb      	str	r3, [r7, #12]
    LWIP_ASSERT("pbuf_realloc: q != NULL", q != NULL);
 801a1dc:	68fb      	ldr	r3, [r7, #12]
 801a1de:	2b00      	cmp	r3, #0
 801a1e0:	d106      	bne.n	801a1f0 <pbuf_realloc+0x70>
 801a1e2:	4b25      	ldr	r3, [pc, #148]	@ (801a278 <pbuf_realloc+0xf8>)
 801a1e4:	f240 12af 	movw	r2, #431	@ 0x1af
 801a1e8:	4926      	ldr	r1, [pc, #152]	@ (801a284 <pbuf_realloc+0x104>)
 801a1ea:	4825      	ldr	r0, [pc, #148]	@ (801a280 <pbuf_realloc+0x100>)
 801a1ec:	f00f fbf6 	bl	80299dc <iprintf>
  while (rem_len > q->len) {
 801a1f0:	68fb      	ldr	r3, [r7, #12]
 801a1f2:	895b      	ldrh	r3, [r3, #10]
 801a1f4:	897a      	ldrh	r2, [r7, #10]
 801a1f6:	429a      	cmp	r2, r3
 801a1f8:	d8e1      	bhi.n	801a1be <pbuf_realloc+0x3e>
  /* we have now reached the new last pbuf (in q) */
  /* rem_len == desired length for pbuf q */

  /* shrink allocated memory for PBUF_RAM */
  /* (other types merely adjust their length fields */
  if (pbuf_match_allocsrc(q, PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) && (rem_len != q->len)
 801a1fa:	68fb      	ldr	r3, [r7, #12]
 801a1fc:	7b1b      	ldrb	r3, [r3, #12]
 801a1fe:	f003 030f 	and.w	r3, r3, #15
 801a202:	2b00      	cmp	r3, #0
 801a204:	d11f      	bne.n	801a246 <pbuf_realloc+0xc6>
 801a206:	68fb      	ldr	r3, [r7, #12]
 801a208:	895b      	ldrh	r3, [r3, #10]
 801a20a:	897a      	ldrh	r2, [r7, #10]
 801a20c:	429a      	cmp	r2, r3
 801a20e:	d01a      	beq.n	801a246 <pbuf_realloc+0xc6>
#if LWIP_SUPPORT_CUSTOM_PBUF
      && ((q->flags & PBUF_FLAG_IS_CUSTOM) == 0)
 801a210:	68fb      	ldr	r3, [r7, #12]
 801a212:	7b5b      	ldrb	r3, [r3, #13]
 801a214:	f003 0302 	and.w	r3, r3, #2
 801a218:	2b00      	cmp	r3, #0
 801a21a:	d114      	bne.n	801a246 <pbuf_realloc+0xc6>
#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
     ) {
    /* reallocate and adjust the length of the pbuf that will be split */
    q = (struct pbuf *)mem_trim(q, (mem_size_t)(((u8_t *)q->payload - (u8_t *)q) + rem_len));
 801a21c:	68fb      	ldr	r3, [r7, #12]
 801a21e:	685a      	ldr	r2, [r3, #4]
 801a220:	68fb      	ldr	r3, [r7, #12]
 801a222:	1ad2      	subs	r2, r2, r3
 801a224:	897b      	ldrh	r3, [r7, #10]
 801a226:	4413      	add	r3, r2
 801a228:	4619      	mov	r1, r3
 801a22a:	68f8      	ldr	r0, [r7, #12]
 801a22c:	f7fe ff5c 	bl	80190e8 <mem_trim>
 801a230:	60f8      	str	r0, [r7, #12]
    LWIP_ASSERT("mem_trim returned q == NULL", q != NULL);
 801a232:	68fb      	ldr	r3, [r7, #12]
 801a234:	2b00      	cmp	r3, #0
 801a236:	d106      	bne.n	801a246 <pbuf_realloc+0xc6>
 801a238:	4b0f      	ldr	r3, [pc, #60]	@ (801a278 <pbuf_realloc+0xf8>)
 801a23a:	f240 12bd 	movw	r2, #445	@ 0x1bd
 801a23e:	4912      	ldr	r1, [pc, #72]	@ (801a288 <pbuf_realloc+0x108>)
 801a240:	480f      	ldr	r0, [pc, #60]	@ (801a280 <pbuf_realloc+0x100>)
 801a242:	f00f fbcb 	bl	80299dc <iprintf>
  }
  /* adjust length fields for new last pbuf */
  q->len = rem_len;
 801a246:	68fb      	ldr	r3, [r7, #12]
 801a248:	897a      	ldrh	r2, [r7, #10]
 801a24a:	815a      	strh	r2, [r3, #10]
  q->tot_len = q->len;
 801a24c:	68fb      	ldr	r3, [r7, #12]
 801a24e:	895a      	ldrh	r2, [r3, #10]
 801a250:	68fb      	ldr	r3, [r7, #12]
 801a252:	811a      	strh	r2, [r3, #8]

  /* any remaining pbufs in chain? */
  if (q->next != NULL) {
 801a254:	68fb      	ldr	r3, [r7, #12]
 801a256:	681b      	ldr	r3, [r3, #0]
 801a258:	2b00      	cmp	r3, #0
 801a25a:	d004      	beq.n	801a266 <pbuf_realloc+0xe6>
    /* free remaining pbufs in chain */
    pbuf_free(q->next);
 801a25c:	68fb      	ldr	r3, [r7, #12]
 801a25e:	681b      	ldr	r3, [r3, #0]
 801a260:	4618      	mov	r0, r3
 801a262:	f000 f943 	bl	801a4ec <pbuf_free>
  }
  /* q is last packet in chain */
  q->next = NULL;
 801a266:	68fb      	ldr	r3, [r7, #12]
 801a268:	2200      	movs	r2, #0
 801a26a:	601a      	str	r2, [r3, #0]
 801a26c:	e000      	b.n	801a270 <pbuf_realloc+0xf0>
    return;
 801a26e:	bf00      	nop

}
 801a270:	3710      	adds	r7, #16
 801a272:	46bd      	mov	sp, r7
 801a274:	bd80      	pop	{r7, pc}
 801a276:	bf00      	nop
 801a278:	0802e0f0 	.word	0x0802e0f0
 801a27c:	0802e208 	.word	0x0802e208
 801a280:	0802e150 	.word	0x0802e150
 801a284:	0802e220 	.word	0x0802e220
 801a288:	0802e238 	.word	0x0802e238

0801a28c <pbuf_add_header_impl>:
 * @return non-zero on failure, zero on success.
 *
 */
static u8_t
pbuf_add_header_impl(struct pbuf *p, size_t header_size_increment, u8_t force)
{
 801a28c:	b580      	push	{r7, lr}
 801a28e:	b086      	sub	sp, #24
 801a290:	af00      	add	r7, sp, #0
 801a292:	60f8      	str	r0, [r7, #12]
 801a294:	60b9      	str	r1, [r7, #8]
 801a296:	4613      	mov	r3, r2
 801a298:	71fb      	strb	r3, [r7, #7]
  u16_t type_internal;
  void *payload;
  u16_t increment_magnitude;

  LWIP_ASSERT("p != NULL", p != NULL);
 801a29a:	68fb      	ldr	r3, [r7, #12]
 801a29c:	2b00      	cmp	r3, #0
 801a29e:	d106      	bne.n	801a2ae <pbuf_add_header_impl+0x22>
 801a2a0:	4b2b      	ldr	r3, [pc, #172]	@ (801a350 <pbuf_add_header_impl+0xc4>)
 801a2a2:	f240 12df 	movw	r2, #479	@ 0x1df
 801a2a6:	492b      	ldr	r1, [pc, #172]	@ (801a354 <pbuf_add_header_impl+0xc8>)
 801a2a8:	482b      	ldr	r0, [pc, #172]	@ (801a358 <pbuf_add_header_impl+0xcc>)
 801a2aa:	f00f fb97 	bl	80299dc <iprintf>
  if ((p == NULL) || (header_size_increment > 0xFFFF)) {
 801a2ae:	68fb      	ldr	r3, [r7, #12]
 801a2b0:	2b00      	cmp	r3, #0
 801a2b2:	d003      	beq.n	801a2bc <pbuf_add_header_impl+0x30>
 801a2b4:	68bb      	ldr	r3, [r7, #8]
 801a2b6:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 801a2ba:	d301      	bcc.n	801a2c0 <pbuf_add_header_impl+0x34>
    return 1;
 801a2bc:	2301      	movs	r3, #1
 801a2be:	e043      	b.n	801a348 <pbuf_add_header_impl+0xbc>
  }
  if (header_size_increment == 0) {
 801a2c0:	68bb      	ldr	r3, [r7, #8]
 801a2c2:	2b00      	cmp	r3, #0
 801a2c4:	d101      	bne.n	801a2ca <pbuf_add_header_impl+0x3e>
    return 0;
 801a2c6:	2300      	movs	r3, #0
 801a2c8:	e03e      	b.n	801a348 <pbuf_add_header_impl+0xbc>
  }

  increment_magnitude = (u16_t)header_size_increment;
 801a2ca:	68bb      	ldr	r3, [r7, #8]
 801a2cc:	827b      	strh	r3, [r7, #18]
  /* Do not allow tot_len to wrap as a result. */
  if ((u16_t)(increment_magnitude + p->tot_len) < increment_magnitude) {
 801a2ce:	68fb      	ldr	r3, [r7, #12]
 801a2d0:	891a      	ldrh	r2, [r3, #8]
 801a2d2:	8a7b      	ldrh	r3, [r7, #18]
 801a2d4:	4413      	add	r3, r2
 801a2d6:	b29b      	uxth	r3, r3
 801a2d8:	8a7a      	ldrh	r2, [r7, #18]
 801a2da:	429a      	cmp	r2, r3
 801a2dc:	d901      	bls.n	801a2e2 <pbuf_add_header_impl+0x56>
    return 1;
 801a2de:	2301      	movs	r3, #1
 801a2e0:	e032      	b.n	801a348 <pbuf_add_header_impl+0xbc>
  }

  type_internal = p->type_internal;
 801a2e2:	68fb      	ldr	r3, [r7, #12]
 801a2e4:	7b1b      	ldrb	r3, [r3, #12]
 801a2e6:	823b      	strh	r3, [r7, #16]

  /* pbuf types containing payloads? */
  if (type_internal & PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS) {
 801a2e8:	8a3b      	ldrh	r3, [r7, #16]
 801a2ea:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 801a2ee:	2b00      	cmp	r3, #0
 801a2f0:	d00c      	beq.n	801a30c <pbuf_add_header_impl+0x80>
    /* set new payload pointer */
    payload = (u8_t *)p->payload - header_size_increment;
 801a2f2:	68fb      	ldr	r3, [r7, #12]
 801a2f4:	685a      	ldr	r2, [r3, #4]
 801a2f6:	68bb      	ldr	r3, [r7, #8]
 801a2f8:	425b      	negs	r3, r3
 801a2fa:	4413      	add	r3, r2
 801a2fc:	617b      	str	r3, [r7, #20]
    /* boundary check fails? */
    if ((u8_t *)payload < (u8_t *)p + SIZEOF_STRUCT_PBUF) {
 801a2fe:	68fb      	ldr	r3, [r7, #12]
 801a300:	3310      	adds	r3, #16
 801a302:	697a      	ldr	r2, [r7, #20]
 801a304:	429a      	cmp	r2, r3
 801a306:	d20d      	bcs.n	801a324 <pbuf_add_header_impl+0x98>
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE,
                   ("pbuf_add_header: failed as %p < %p (not enough space for new header size)\n",
                    (void *)payload, (void *)((u8_t *)p + SIZEOF_STRUCT_PBUF)));
      /* bail out unsuccessfully */
      return 1;
 801a308:	2301      	movs	r3, #1
 801a30a:	e01d      	b.n	801a348 <pbuf_add_header_impl+0xbc>
    }
    /* pbuf types referring to external payloads? */
  } else {
    /* hide a header in the payload? */
    if (force) {
 801a30c:	79fb      	ldrb	r3, [r7, #7]
 801a30e:	2b00      	cmp	r3, #0
 801a310:	d006      	beq.n	801a320 <pbuf_add_header_impl+0x94>
      payload = (u8_t *)p->payload - header_size_increment;
 801a312:	68fb      	ldr	r3, [r7, #12]
 801a314:	685a      	ldr	r2, [r3, #4]
 801a316:	68bb      	ldr	r3, [r7, #8]
 801a318:	425b      	negs	r3, r3
 801a31a:	4413      	add	r3, r2
 801a31c:	617b      	str	r3, [r7, #20]
 801a31e:	e001      	b.n	801a324 <pbuf_add_header_impl+0x98>
    } else {
      /* cannot expand payload to front (yet!)
       * bail out unsuccessfully */
      return 1;
 801a320:	2301      	movs	r3, #1
 801a322:	e011      	b.n	801a348 <pbuf_add_header_impl+0xbc>
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_add_header: old %p new %p (%"U16_F")\n",
              (void *)p->payload, (void *)payload, increment_magnitude));

  /* modify pbuf fields */
  p->payload = payload;
 801a324:	68fb      	ldr	r3, [r7, #12]
 801a326:	697a      	ldr	r2, [r7, #20]
 801a328:	605a      	str	r2, [r3, #4]
  p->len = (u16_t)(p->len + increment_magnitude);
 801a32a:	68fb      	ldr	r3, [r7, #12]
 801a32c:	895a      	ldrh	r2, [r3, #10]
 801a32e:	8a7b      	ldrh	r3, [r7, #18]
 801a330:	4413      	add	r3, r2
 801a332:	b29a      	uxth	r2, r3
 801a334:	68fb      	ldr	r3, [r7, #12]
 801a336:	815a      	strh	r2, [r3, #10]
  p->tot_len = (u16_t)(p->tot_len + increment_magnitude);
 801a338:	68fb      	ldr	r3, [r7, #12]
 801a33a:	891a      	ldrh	r2, [r3, #8]
 801a33c:	8a7b      	ldrh	r3, [r7, #18]
 801a33e:	4413      	add	r3, r2
 801a340:	b29a      	uxth	r2, r3
 801a342:	68fb      	ldr	r3, [r7, #12]
 801a344:	811a      	strh	r2, [r3, #8]


  return 0;
 801a346:	2300      	movs	r3, #0
}
 801a348:	4618      	mov	r0, r3
 801a34a:	3718      	adds	r7, #24
 801a34c:	46bd      	mov	sp, r7
 801a34e:	bd80      	pop	{r7, pc}
 801a350:	0802e0f0 	.word	0x0802e0f0
 801a354:	0802e254 	.word	0x0802e254
 801a358:	0802e150 	.word	0x0802e150

0801a35c <pbuf_add_header>:
 * @return non-zero on failure, zero on success.
 *
 */
u8_t
pbuf_add_header(struct pbuf *p, size_t header_size_increment)
{
 801a35c:	b580      	push	{r7, lr}
 801a35e:	b082      	sub	sp, #8
 801a360:	af00      	add	r7, sp, #0
 801a362:	6078      	str	r0, [r7, #4]
 801a364:	6039      	str	r1, [r7, #0]
  return pbuf_add_header_impl(p, header_size_increment, 0);
 801a366:	2200      	movs	r2, #0
 801a368:	6839      	ldr	r1, [r7, #0]
 801a36a:	6878      	ldr	r0, [r7, #4]
 801a36c:	f7ff ff8e 	bl	801a28c <pbuf_add_header_impl>
 801a370:	4603      	mov	r3, r0
}
 801a372:	4618      	mov	r0, r3
 801a374:	3708      	adds	r7, #8
 801a376:	46bd      	mov	sp, r7
 801a378:	bd80      	pop	{r7, pc}
	...

0801a37c <pbuf_remove_header>:
 * @return non-zero on failure, zero on success.
 *
 */
u8_t
pbuf_remove_header(struct pbuf *p, size_t header_size_decrement)
{
 801a37c:	b580      	push	{r7, lr}
 801a37e:	b084      	sub	sp, #16
 801a380:	af00      	add	r7, sp, #0
 801a382:	6078      	str	r0, [r7, #4]
 801a384:	6039      	str	r1, [r7, #0]
  void *payload;
  u16_t increment_magnitude;

  LWIP_ASSERT("p != NULL", p != NULL);
 801a386:	687b      	ldr	r3, [r7, #4]
 801a388:	2b00      	cmp	r3, #0
 801a38a:	d106      	bne.n	801a39a <pbuf_remove_header+0x1e>
 801a38c:	4b20      	ldr	r3, [pc, #128]	@ (801a410 <pbuf_remove_header+0x94>)
 801a38e:	f240 224b 	movw	r2, #587	@ 0x24b
 801a392:	4920      	ldr	r1, [pc, #128]	@ (801a414 <pbuf_remove_header+0x98>)
 801a394:	4820      	ldr	r0, [pc, #128]	@ (801a418 <pbuf_remove_header+0x9c>)
 801a396:	f00f fb21 	bl	80299dc <iprintf>
  if ((p == NULL) || (header_size_decrement > 0xFFFF)) {
 801a39a:	687b      	ldr	r3, [r7, #4]
 801a39c:	2b00      	cmp	r3, #0
 801a39e:	d003      	beq.n	801a3a8 <pbuf_remove_header+0x2c>
 801a3a0:	683b      	ldr	r3, [r7, #0]
 801a3a2:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 801a3a6:	d301      	bcc.n	801a3ac <pbuf_remove_header+0x30>
    return 1;
 801a3a8:	2301      	movs	r3, #1
 801a3aa:	e02c      	b.n	801a406 <pbuf_remove_header+0x8a>
  }
  if (header_size_decrement == 0) {
 801a3ac:	683b      	ldr	r3, [r7, #0]
 801a3ae:	2b00      	cmp	r3, #0
 801a3b0:	d101      	bne.n	801a3b6 <pbuf_remove_header+0x3a>
    return 0;
 801a3b2:	2300      	movs	r3, #0
 801a3b4:	e027      	b.n	801a406 <pbuf_remove_header+0x8a>
  }

  increment_magnitude = (u16_t)header_size_decrement;
 801a3b6:	683b      	ldr	r3, [r7, #0]
 801a3b8:	81fb      	strh	r3, [r7, #14]
  /* Check that we aren't going to move off the end of the pbuf */
  LWIP_ERROR("increment_magnitude <= p->len", (increment_magnitude <= p->len), return 1;);
 801a3ba:	687b      	ldr	r3, [r7, #4]
 801a3bc:	895b      	ldrh	r3, [r3, #10]
 801a3be:	89fa      	ldrh	r2, [r7, #14]
 801a3c0:	429a      	cmp	r2, r3
 801a3c2:	d908      	bls.n	801a3d6 <pbuf_remove_header+0x5a>
 801a3c4:	4b12      	ldr	r3, [pc, #72]	@ (801a410 <pbuf_remove_header+0x94>)
 801a3c6:	f240 2255 	movw	r2, #597	@ 0x255
 801a3ca:	4914      	ldr	r1, [pc, #80]	@ (801a41c <pbuf_remove_header+0xa0>)
 801a3cc:	4812      	ldr	r0, [pc, #72]	@ (801a418 <pbuf_remove_header+0x9c>)
 801a3ce:	f00f fb05 	bl	80299dc <iprintf>
 801a3d2:	2301      	movs	r3, #1
 801a3d4:	e017      	b.n	801a406 <pbuf_remove_header+0x8a>

  /* remember current payload pointer */
  payload = p->payload;
 801a3d6:	687b      	ldr	r3, [r7, #4]
 801a3d8:	685b      	ldr	r3, [r3, #4]
 801a3da:	60bb      	str	r3, [r7, #8]
  LWIP_UNUSED_ARG(payload); /* only used in LWIP_DEBUGF below */

  /* increase payload pointer (guarded by length check above) */
  p->payload = (u8_t *)p->payload + header_size_decrement;
 801a3dc:	687b      	ldr	r3, [r7, #4]
 801a3de:	685a      	ldr	r2, [r3, #4]
 801a3e0:	683b      	ldr	r3, [r7, #0]
 801a3e2:	441a      	add	r2, r3
 801a3e4:	687b      	ldr	r3, [r7, #4]
 801a3e6:	605a      	str	r2, [r3, #4]
  /* modify pbuf length fields */
  p->len = (u16_t)(p->len - increment_magnitude);
 801a3e8:	687b      	ldr	r3, [r7, #4]
 801a3ea:	895a      	ldrh	r2, [r3, #10]
 801a3ec:	89fb      	ldrh	r3, [r7, #14]
 801a3ee:	1ad3      	subs	r3, r2, r3
 801a3f0:	b29a      	uxth	r2, r3
 801a3f2:	687b      	ldr	r3, [r7, #4]
 801a3f4:	815a      	strh	r2, [r3, #10]
  p->tot_len = (u16_t)(p->tot_len - increment_magnitude);
 801a3f6:	687b      	ldr	r3, [r7, #4]
 801a3f8:	891a      	ldrh	r2, [r3, #8]
 801a3fa:	89fb      	ldrh	r3, [r7, #14]
 801a3fc:	1ad3      	subs	r3, r2, r3
 801a3fe:	b29a      	uxth	r2, r3
 801a400:	687b      	ldr	r3, [r7, #4]
 801a402:	811a      	strh	r2, [r3, #8]

  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_remove_header: old %p new %p (%"U16_F")\n",
              (void *)payload, (void *)p->payload, increment_magnitude));

  return 0;
 801a404:	2300      	movs	r3, #0
}
 801a406:	4618      	mov	r0, r3
 801a408:	3710      	adds	r7, #16
 801a40a:	46bd      	mov	sp, r7
 801a40c:	bd80      	pop	{r7, pc}
 801a40e:	bf00      	nop
 801a410:	0802e0f0 	.word	0x0802e0f0
 801a414:	0802e254 	.word	0x0802e254
 801a418:	0802e150 	.word	0x0802e150
 801a41c:	0802e260 	.word	0x0802e260

0801a420 <pbuf_header_impl>:

static u8_t
pbuf_header_impl(struct pbuf *p, s16_t header_size_increment, u8_t force)
{
 801a420:	b580      	push	{r7, lr}
 801a422:	b082      	sub	sp, #8
 801a424:	af00      	add	r7, sp, #0
 801a426:	6078      	str	r0, [r7, #4]
 801a428:	460b      	mov	r3, r1
 801a42a:	807b      	strh	r3, [r7, #2]
 801a42c:	4613      	mov	r3, r2
 801a42e:	707b      	strb	r3, [r7, #1]
  if (header_size_increment < 0) {
 801a430:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801a434:	2b00      	cmp	r3, #0
 801a436:	da08      	bge.n	801a44a <pbuf_header_impl+0x2a>
    return pbuf_remove_header(p, (size_t) - header_size_increment);
 801a438:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801a43c:	425b      	negs	r3, r3
 801a43e:	4619      	mov	r1, r3
 801a440:	6878      	ldr	r0, [r7, #4]
 801a442:	f7ff ff9b 	bl	801a37c <pbuf_remove_header>
 801a446:	4603      	mov	r3, r0
 801a448:	e007      	b.n	801a45a <pbuf_header_impl+0x3a>
  } else {
    return pbuf_add_header_impl(p, (size_t)header_size_increment, force);
 801a44a:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801a44e:	787a      	ldrb	r2, [r7, #1]
 801a450:	4619      	mov	r1, r3
 801a452:	6878      	ldr	r0, [r7, #4]
 801a454:	f7ff ff1a 	bl	801a28c <pbuf_add_header_impl>
 801a458:	4603      	mov	r3, r0
  }
}
 801a45a:	4618      	mov	r0, r3
 801a45c:	3708      	adds	r7, #8
 801a45e:	46bd      	mov	sp, r7
 801a460:	bd80      	pop	{r7, pc}

0801a462 <pbuf_header_force>:
 * Same as pbuf_header but does not check if 'header_size > 0' is allowed.
 * This is used internally only, to allow PBUF_REF for RX.
 */
u8_t
pbuf_header_force(struct pbuf *p, s16_t header_size_increment)
{
 801a462:	b580      	push	{r7, lr}
 801a464:	b082      	sub	sp, #8
 801a466:	af00      	add	r7, sp, #0
 801a468:	6078      	str	r0, [r7, #4]
 801a46a:	460b      	mov	r3, r1
 801a46c:	807b      	strh	r3, [r7, #2]
  return pbuf_header_impl(p, header_size_increment, 1);
 801a46e:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801a472:	2201      	movs	r2, #1
 801a474:	4619      	mov	r1, r3
 801a476:	6878      	ldr	r0, [r7, #4]
 801a478:	f7ff ffd2 	bl	801a420 <pbuf_header_impl>
 801a47c:	4603      	mov	r3, r0
}
 801a47e:	4618      	mov	r0, r3
 801a480:	3708      	adds	r7, #8
 801a482:	46bd      	mov	sp, r7
 801a484:	bd80      	pop	{r7, pc}

0801a486 <pbuf_free_header>:
 *                   takes an u16_t not s16_t!
 * @return the new head pbuf
 */
struct pbuf *
pbuf_free_header(struct pbuf *q, u16_t size)
{
 801a486:	b580      	push	{r7, lr}
 801a488:	b086      	sub	sp, #24
 801a48a:	af00      	add	r7, sp, #0
 801a48c:	6078      	str	r0, [r7, #4]
 801a48e:	460b      	mov	r3, r1
 801a490:	807b      	strh	r3, [r7, #2]
  struct pbuf *p = q;
 801a492:	687b      	ldr	r3, [r7, #4]
 801a494:	617b      	str	r3, [r7, #20]
  u16_t free_left = size;
 801a496:	887b      	ldrh	r3, [r7, #2]
 801a498:	827b      	strh	r3, [r7, #18]
  while (free_left && p) {
 801a49a:	e01c      	b.n	801a4d6 <pbuf_free_header+0x50>
    if (free_left >= p->len) {
 801a49c:	697b      	ldr	r3, [r7, #20]
 801a49e:	895b      	ldrh	r3, [r3, #10]
 801a4a0:	8a7a      	ldrh	r2, [r7, #18]
 801a4a2:	429a      	cmp	r2, r3
 801a4a4:	d310      	bcc.n	801a4c8 <pbuf_free_header+0x42>
      struct pbuf *f = p;
 801a4a6:	697b      	ldr	r3, [r7, #20]
 801a4a8:	60fb      	str	r3, [r7, #12]
      free_left = (u16_t)(free_left - p->len);
 801a4aa:	697b      	ldr	r3, [r7, #20]
 801a4ac:	895b      	ldrh	r3, [r3, #10]
 801a4ae:	8a7a      	ldrh	r2, [r7, #18]
 801a4b0:	1ad3      	subs	r3, r2, r3
 801a4b2:	827b      	strh	r3, [r7, #18]
      p = p->next;
 801a4b4:	697b      	ldr	r3, [r7, #20]
 801a4b6:	681b      	ldr	r3, [r3, #0]
 801a4b8:	617b      	str	r3, [r7, #20]
      f->next = 0;
 801a4ba:	68fb      	ldr	r3, [r7, #12]
 801a4bc:	2200      	movs	r2, #0
 801a4be:	601a      	str	r2, [r3, #0]
      pbuf_free(f);
 801a4c0:	68f8      	ldr	r0, [r7, #12]
 801a4c2:	f000 f813 	bl	801a4ec <pbuf_free>
 801a4c6:	e006      	b.n	801a4d6 <pbuf_free_header+0x50>
    } else {
      pbuf_remove_header(p, free_left);
 801a4c8:	8a7b      	ldrh	r3, [r7, #18]
 801a4ca:	4619      	mov	r1, r3
 801a4cc:	6978      	ldr	r0, [r7, #20]
 801a4ce:	f7ff ff55 	bl	801a37c <pbuf_remove_header>
      free_left = 0;
 801a4d2:	2300      	movs	r3, #0
 801a4d4:	827b      	strh	r3, [r7, #18]
  while (free_left && p) {
 801a4d6:	8a7b      	ldrh	r3, [r7, #18]
 801a4d8:	2b00      	cmp	r3, #0
 801a4da:	d002      	beq.n	801a4e2 <pbuf_free_header+0x5c>
 801a4dc:	697b      	ldr	r3, [r7, #20]
 801a4de:	2b00      	cmp	r3, #0
 801a4e0:	d1dc      	bne.n	801a49c <pbuf_free_header+0x16>
    }
  }
  return p;
 801a4e2:	697b      	ldr	r3, [r7, #20]
}
 801a4e4:	4618      	mov	r0, r3
 801a4e6:	3718      	adds	r7, #24
 801a4e8:	46bd      	mov	sp, r7
 801a4ea:	bd80      	pop	{r7, pc}

0801a4ec <pbuf_free>:
 * 1->1->1 becomes .......
 *
 */
u8_t
pbuf_free(struct pbuf *p)
{
 801a4ec:	b580      	push	{r7, lr}
 801a4ee:	b088      	sub	sp, #32
 801a4f0:	af00      	add	r7, sp, #0
 801a4f2:	6078      	str	r0, [r7, #4]
  u8_t alloc_src;
  struct pbuf *q;
  u8_t count;

  if (p == NULL) {
 801a4f4:	687b      	ldr	r3, [r7, #4]
 801a4f6:	2b00      	cmp	r3, #0
 801a4f8:	d10b      	bne.n	801a512 <pbuf_free+0x26>
    LWIP_ASSERT("p != NULL", p != NULL);
 801a4fa:	687b      	ldr	r3, [r7, #4]
 801a4fc:	2b00      	cmp	r3, #0
 801a4fe:	d106      	bne.n	801a50e <pbuf_free+0x22>
 801a500:	4b3b      	ldr	r3, [pc, #236]	@ (801a5f0 <pbuf_free+0x104>)
 801a502:	f44f 7237 	mov.w	r2, #732	@ 0x2dc
 801a506:	493b      	ldr	r1, [pc, #236]	@ (801a5f4 <pbuf_free+0x108>)
 801a508:	483b      	ldr	r0, [pc, #236]	@ (801a5f8 <pbuf_free+0x10c>)
 801a50a:	f00f fa67 	bl	80299dc <iprintf>
    /* if assertions are disabled, proceed with debug output */
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                ("pbuf_free(p == NULL) was called.\n"));
    return 0;
 801a50e:	2300      	movs	r3, #0
 801a510:	e069      	b.n	801a5e6 <pbuf_free+0xfa>
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free(%p)\n", (void *)p));

  PERF_START;

  count = 0;
 801a512:	2300      	movs	r3, #0
 801a514:	77fb      	strb	r3, [r7, #31]
  /* de-allocate all consecutive pbufs from the head of the chain that
   * obtain a zero reference count after decrementing*/
  while (p != NULL) {
 801a516:	e062      	b.n	801a5de <pbuf_free+0xf2>
    LWIP_PBUF_REF_T ref;
    SYS_ARCH_DECL_PROTECT(old_level);
    /* Since decrementing ref cannot be guaranteed to be a single machine operation
     * we must protect it. We put the new ref into a local variable to prevent
     * further protection. */
    SYS_ARCH_PROTECT(old_level);
 801a518:	f00b ffca 	bl	80264b0 <sys_arch_protect>
 801a51c:	61b8      	str	r0, [r7, #24]
    /* all pbufs in a chain are referenced at least once */
    LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0);
 801a51e:	687b      	ldr	r3, [r7, #4]
 801a520:	7b9b      	ldrb	r3, [r3, #14]
 801a522:	2b00      	cmp	r3, #0
 801a524:	d106      	bne.n	801a534 <pbuf_free+0x48>
 801a526:	4b32      	ldr	r3, [pc, #200]	@ (801a5f0 <pbuf_free+0x104>)
 801a528:	f240 22f1 	movw	r2, #753	@ 0x2f1
 801a52c:	4933      	ldr	r1, [pc, #204]	@ (801a5fc <pbuf_free+0x110>)
 801a52e:	4832      	ldr	r0, [pc, #200]	@ (801a5f8 <pbuf_free+0x10c>)
 801a530:	f00f fa54 	bl	80299dc <iprintf>
    /* decrease reference count (number of pointers to pbuf) */
    ref = --(p->ref);
 801a534:	687b      	ldr	r3, [r7, #4]
 801a536:	7b9b      	ldrb	r3, [r3, #14]
 801a538:	3b01      	subs	r3, #1
 801a53a:	b2da      	uxtb	r2, r3
 801a53c:	687b      	ldr	r3, [r7, #4]
 801a53e:	739a      	strb	r2, [r3, #14]
 801a540:	687b      	ldr	r3, [r7, #4]
 801a542:	7b9b      	ldrb	r3, [r3, #14]
 801a544:	75fb      	strb	r3, [r7, #23]
    SYS_ARCH_UNPROTECT(old_level);
 801a546:	69b8      	ldr	r0, [r7, #24]
 801a548:	f00b ffc0 	bl	80264cc <sys_arch_unprotect>
    /* this pbuf is no longer referenced to? */
    if (ref == 0) {
 801a54c:	7dfb      	ldrb	r3, [r7, #23]
 801a54e:	2b00      	cmp	r3, #0
 801a550:	d143      	bne.n	801a5da <pbuf_free+0xee>
      /* remember next pbuf in chain for next iteration */
      q = p->next;
 801a552:	687b      	ldr	r3, [r7, #4]
 801a554:	681b      	ldr	r3, [r3, #0]
 801a556:	613b      	str	r3, [r7, #16]
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: deallocating %p\n", (void *)p));
      alloc_src = pbuf_get_allocsrc(p);
 801a558:	687b      	ldr	r3, [r7, #4]
 801a55a:	7b1b      	ldrb	r3, [r3, #12]
 801a55c:	f003 030f 	and.w	r3, r3, #15
 801a560:	73fb      	strb	r3, [r7, #15]
#if LWIP_SUPPORT_CUSTOM_PBUF
      /* is this a custom pbuf? */
      if ((p->flags & PBUF_FLAG_IS_CUSTOM) != 0) {
 801a562:	687b      	ldr	r3, [r7, #4]
 801a564:	7b5b      	ldrb	r3, [r3, #13]
 801a566:	f003 0302 	and.w	r3, r3, #2
 801a56a:	2b00      	cmp	r3, #0
 801a56c:	d011      	beq.n	801a592 <pbuf_free+0xa6>
        struct pbuf_custom *pc = (struct pbuf_custom *)p;
 801a56e:	687b      	ldr	r3, [r7, #4]
 801a570:	60bb      	str	r3, [r7, #8]
        LWIP_ASSERT("pc->custom_free_function != NULL", pc->custom_free_function != NULL);
 801a572:	68bb      	ldr	r3, [r7, #8]
 801a574:	691b      	ldr	r3, [r3, #16]
 801a576:	2b00      	cmp	r3, #0
 801a578:	d106      	bne.n	801a588 <pbuf_free+0x9c>
 801a57a:	4b1d      	ldr	r3, [pc, #116]	@ (801a5f0 <pbuf_free+0x104>)
 801a57c:	f240 22ff 	movw	r2, #767	@ 0x2ff
 801a580:	491f      	ldr	r1, [pc, #124]	@ (801a600 <pbuf_free+0x114>)
 801a582:	481d      	ldr	r0, [pc, #116]	@ (801a5f8 <pbuf_free+0x10c>)
 801a584:	f00f fa2a 	bl	80299dc <iprintf>
        pc->custom_free_function(p);
 801a588:	68bb      	ldr	r3, [r7, #8]
 801a58a:	691b      	ldr	r3, [r3, #16]
 801a58c:	6878      	ldr	r0, [r7, #4]
 801a58e:	4798      	blx	r3
 801a590:	e01d      	b.n	801a5ce <pbuf_free+0xe2>
      } else
#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
      {
        /* is this a pbuf from the pool? */
        if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF_POOL) {
 801a592:	7bfb      	ldrb	r3, [r7, #15]
 801a594:	2b02      	cmp	r3, #2
 801a596:	d104      	bne.n	801a5a2 <pbuf_free+0xb6>
          memp_free(MEMP_PBUF_POOL, p);
 801a598:	6879      	ldr	r1, [r7, #4]
 801a59a:	200c      	movs	r0, #12
 801a59c:	f7ff f8b8 	bl	8019710 <memp_free>
 801a5a0:	e015      	b.n	801a5ce <pbuf_free+0xe2>
          /* is this a ROM or RAM referencing pbuf? */
        } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF) {
 801a5a2:	7bfb      	ldrb	r3, [r7, #15]
 801a5a4:	2b01      	cmp	r3, #1
 801a5a6:	d104      	bne.n	801a5b2 <pbuf_free+0xc6>
          memp_free(MEMP_PBUF, p);
 801a5a8:	6879      	ldr	r1, [r7, #4]
 801a5aa:	200b      	movs	r0, #11
 801a5ac:	f7ff f8b0 	bl	8019710 <memp_free>
 801a5b0:	e00d      	b.n	801a5ce <pbuf_free+0xe2>
          /* type == PBUF_RAM */
        } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) {
 801a5b2:	7bfb      	ldrb	r3, [r7, #15]
 801a5b4:	2b00      	cmp	r3, #0
 801a5b6:	d103      	bne.n	801a5c0 <pbuf_free+0xd4>
          mem_free(p);
 801a5b8:	6878      	ldr	r0, [r7, #4]
 801a5ba:	f7fe fd05 	bl	8018fc8 <mem_free>
 801a5be:	e006      	b.n	801a5ce <pbuf_free+0xe2>
        } else {
          /* @todo: support freeing other types */
          LWIP_ASSERT("invalid pbuf type", 0);
 801a5c0:	4b0b      	ldr	r3, [pc, #44]	@ (801a5f0 <pbuf_free+0x104>)
 801a5c2:	f240 320f 	movw	r2, #783	@ 0x30f
 801a5c6:	490f      	ldr	r1, [pc, #60]	@ (801a604 <pbuf_free+0x118>)
 801a5c8:	480b      	ldr	r0, [pc, #44]	@ (801a5f8 <pbuf_free+0x10c>)
 801a5ca:	f00f fa07 	bl	80299dc <iprintf>
        }
      }
      count++;
 801a5ce:	7ffb      	ldrb	r3, [r7, #31]
 801a5d0:	3301      	adds	r3, #1
 801a5d2:	77fb      	strb	r3, [r7, #31]
      /* proceed to next pbuf */
      p = q;
 801a5d4:	693b      	ldr	r3, [r7, #16]
 801a5d6:	607b      	str	r3, [r7, #4]
 801a5d8:	e001      	b.n	801a5de <pbuf_free+0xf2>
      /* p->ref > 0, this pbuf is still referenced to */
      /* (and so the remaining pbufs in chain as well) */
    } else {
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, (u16_t)ref));
      /* stop walking through the chain */
      p = NULL;
 801a5da:	2300      	movs	r3, #0
 801a5dc:	607b      	str	r3, [r7, #4]
  while (p != NULL) {
 801a5de:	687b      	ldr	r3, [r7, #4]
 801a5e0:	2b00      	cmp	r3, #0
 801a5e2:	d199      	bne.n	801a518 <pbuf_free+0x2c>
    }
  }
  PERF_STOP("pbuf_free");
  /* return number of de-allocated pbufs */
  return count;
 801a5e4:	7ffb      	ldrb	r3, [r7, #31]
}
 801a5e6:	4618      	mov	r0, r3
 801a5e8:	3720      	adds	r7, #32
 801a5ea:	46bd      	mov	sp, r7
 801a5ec:	bd80      	pop	{r7, pc}
 801a5ee:	bf00      	nop
 801a5f0:	0802e0f0 	.word	0x0802e0f0
 801a5f4:	0802e254 	.word	0x0802e254
 801a5f8:	0802e150 	.word	0x0802e150
 801a5fc:	0802e280 	.word	0x0802e280
 801a600:	0802e298 	.word	0x0802e298
 801a604:	0802e2bc 	.word	0x0802e2bc

0801a608 <pbuf_clen>:
 * @param p first pbuf of chain
 * @return the number of pbufs in a chain
 */
u16_t
pbuf_clen(const struct pbuf *p)
{
 801a608:	b480      	push	{r7}
 801a60a:	b085      	sub	sp, #20
 801a60c:	af00      	add	r7, sp, #0
 801a60e:	6078      	str	r0, [r7, #4]
  u16_t len;

  len = 0;
 801a610:	2300      	movs	r3, #0
 801a612:	81fb      	strh	r3, [r7, #14]
  while (p != NULL) {
 801a614:	e005      	b.n	801a622 <pbuf_clen+0x1a>
    ++len;
 801a616:	89fb      	ldrh	r3, [r7, #14]
 801a618:	3301      	adds	r3, #1
 801a61a:	81fb      	strh	r3, [r7, #14]
    p = p->next;
 801a61c:	687b      	ldr	r3, [r7, #4]
 801a61e:	681b      	ldr	r3, [r3, #0]
 801a620:	607b      	str	r3, [r7, #4]
  while (p != NULL) {
 801a622:	687b      	ldr	r3, [r7, #4]
 801a624:	2b00      	cmp	r3, #0
 801a626:	d1f6      	bne.n	801a616 <pbuf_clen+0xe>
  }
  return len;
 801a628:	89fb      	ldrh	r3, [r7, #14]
}
 801a62a:	4618      	mov	r0, r3
 801a62c:	3714      	adds	r7, #20
 801a62e:	46bd      	mov	sp, r7
 801a630:	f85d 7b04 	ldr.w	r7, [sp], #4
 801a634:	4770      	bx	lr
	...

0801a638 <pbuf_ref>:
 * @param p pbuf to increase reference counter of
 *
 */
void
pbuf_ref(struct pbuf *p)
{
 801a638:	b580      	push	{r7, lr}
 801a63a:	b084      	sub	sp, #16
 801a63c:	af00      	add	r7, sp, #0
 801a63e:	6078      	str	r0, [r7, #4]
  /* pbuf given? */
  if (p != NULL) {
 801a640:	687b      	ldr	r3, [r7, #4]
 801a642:	2b00      	cmp	r3, #0
 801a644:	d016      	beq.n	801a674 <pbuf_ref+0x3c>
    SYS_ARCH_SET(p->ref, (LWIP_PBUF_REF_T)(p->ref + 1));
 801a646:	f00b ff33 	bl	80264b0 <sys_arch_protect>
 801a64a:	60f8      	str	r0, [r7, #12]
 801a64c:	687b      	ldr	r3, [r7, #4]
 801a64e:	7b9b      	ldrb	r3, [r3, #14]
 801a650:	3301      	adds	r3, #1
 801a652:	b2da      	uxtb	r2, r3
 801a654:	687b      	ldr	r3, [r7, #4]
 801a656:	739a      	strb	r2, [r3, #14]
 801a658:	68f8      	ldr	r0, [r7, #12]
 801a65a:	f00b ff37 	bl	80264cc <sys_arch_unprotect>
    LWIP_ASSERT("pbuf ref overflow", p->ref > 0);
 801a65e:	687b      	ldr	r3, [r7, #4]
 801a660:	7b9b      	ldrb	r3, [r3, #14]
 801a662:	2b00      	cmp	r3, #0
 801a664:	d106      	bne.n	801a674 <pbuf_ref+0x3c>
 801a666:	4b05      	ldr	r3, [pc, #20]	@ (801a67c <pbuf_ref+0x44>)
 801a668:	f240 3242 	movw	r2, #834	@ 0x342
 801a66c:	4904      	ldr	r1, [pc, #16]	@ (801a680 <pbuf_ref+0x48>)
 801a66e:	4805      	ldr	r0, [pc, #20]	@ (801a684 <pbuf_ref+0x4c>)
 801a670:	f00f f9b4 	bl	80299dc <iprintf>
  }
}
 801a674:	bf00      	nop
 801a676:	3710      	adds	r7, #16
 801a678:	46bd      	mov	sp, r7
 801a67a:	bd80      	pop	{r7, pc}
 801a67c:	0802e0f0 	.word	0x0802e0f0
 801a680:	0802e2d0 	.word	0x0802e2d0
 801a684:	0802e150 	.word	0x0802e150

0801a688 <pbuf_cat>:
 *
 * @see pbuf_chain()
 */
void
pbuf_cat(struct pbuf *h, struct pbuf *t)
{
 801a688:	b580      	push	{r7, lr}
 801a68a:	b084      	sub	sp, #16
 801a68c:	af00      	add	r7, sp, #0
 801a68e:	6078      	str	r0, [r7, #4]
 801a690:	6039      	str	r1, [r7, #0]
  struct pbuf *p;

  LWIP_ERROR("(h != NULL) && (t != NULL) (programmer violates API)",
 801a692:	687b      	ldr	r3, [r7, #4]
 801a694:	2b00      	cmp	r3, #0
 801a696:	d002      	beq.n	801a69e <pbuf_cat+0x16>
 801a698:	683b      	ldr	r3, [r7, #0]
 801a69a:	2b00      	cmp	r3, #0
 801a69c:	d107      	bne.n	801a6ae <pbuf_cat+0x26>
 801a69e:	4b20      	ldr	r3, [pc, #128]	@ (801a720 <pbuf_cat+0x98>)
 801a6a0:	f240 3259 	movw	r2, #857	@ 0x359
 801a6a4:	491f      	ldr	r1, [pc, #124]	@ (801a724 <pbuf_cat+0x9c>)
 801a6a6:	4820      	ldr	r0, [pc, #128]	@ (801a728 <pbuf_cat+0xa0>)
 801a6a8:	f00f f998 	bl	80299dc <iprintf>
 801a6ac:	e034      	b.n	801a718 <pbuf_cat+0x90>
             ((h != NULL) && (t != NULL)), return;);

  /* proceed to last pbuf of chain */
  for (p = h; p->next != NULL; p = p->next) {
 801a6ae:	687b      	ldr	r3, [r7, #4]
 801a6b0:	60fb      	str	r3, [r7, #12]
 801a6b2:	e00a      	b.n	801a6ca <pbuf_cat+0x42>
    /* add total length of second chain to all totals of first chain */
    p->tot_len = (u16_t)(p->tot_len + t->tot_len);
 801a6b4:	68fb      	ldr	r3, [r7, #12]
 801a6b6:	891a      	ldrh	r2, [r3, #8]
 801a6b8:	683b      	ldr	r3, [r7, #0]
 801a6ba:	891b      	ldrh	r3, [r3, #8]
 801a6bc:	4413      	add	r3, r2
 801a6be:	b29a      	uxth	r2, r3
 801a6c0:	68fb      	ldr	r3, [r7, #12]
 801a6c2:	811a      	strh	r2, [r3, #8]
  for (p = h; p->next != NULL; p = p->next) {
 801a6c4:	68fb      	ldr	r3, [r7, #12]
 801a6c6:	681b      	ldr	r3, [r3, #0]
 801a6c8:	60fb      	str	r3, [r7, #12]
 801a6ca:	68fb      	ldr	r3, [r7, #12]
 801a6cc:	681b      	ldr	r3, [r3, #0]
 801a6ce:	2b00      	cmp	r3, #0
 801a6d0:	d1f0      	bne.n	801a6b4 <pbuf_cat+0x2c>
  }
  /* { p is last pbuf of first h chain, p->next == NULL } */
  LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len);
 801a6d2:	68fb      	ldr	r3, [r7, #12]
 801a6d4:	891a      	ldrh	r2, [r3, #8]
 801a6d6:	68fb      	ldr	r3, [r7, #12]
 801a6d8:	895b      	ldrh	r3, [r3, #10]
 801a6da:	429a      	cmp	r2, r3
 801a6dc:	d006      	beq.n	801a6ec <pbuf_cat+0x64>
 801a6de:	4b10      	ldr	r3, [pc, #64]	@ (801a720 <pbuf_cat+0x98>)
 801a6e0:	f240 3262 	movw	r2, #866	@ 0x362
 801a6e4:	4911      	ldr	r1, [pc, #68]	@ (801a72c <pbuf_cat+0xa4>)
 801a6e6:	4810      	ldr	r0, [pc, #64]	@ (801a728 <pbuf_cat+0xa0>)
 801a6e8:	f00f f978 	bl	80299dc <iprintf>
  LWIP_ASSERT("p->next == NULL", p->next == NULL);
 801a6ec:	68fb      	ldr	r3, [r7, #12]
 801a6ee:	681b      	ldr	r3, [r3, #0]
 801a6f0:	2b00      	cmp	r3, #0
 801a6f2:	d006      	beq.n	801a702 <pbuf_cat+0x7a>
 801a6f4:	4b0a      	ldr	r3, [pc, #40]	@ (801a720 <pbuf_cat+0x98>)
 801a6f6:	f240 3263 	movw	r2, #867	@ 0x363
 801a6fa:	490d      	ldr	r1, [pc, #52]	@ (801a730 <pbuf_cat+0xa8>)
 801a6fc:	480a      	ldr	r0, [pc, #40]	@ (801a728 <pbuf_cat+0xa0>)
 801a6fe:	f00f f96d 	bl	80299dc <iprintf>
  /* add total length of second chain to last pbuf total of first chain */
  p->tot_len = (u16_t)(p->tot_len + t->tot_len);
 801a702:	68fb      	ldr	r3, [r7, #12]
 801a704:	891a      	ldrh	r2, [r3, #8]
 801a706:	683b      	ldr	r3, [r7, #0]
 801a708:	891b      	ldrh	r3, [r3, #8]
 801a70a:	4413      	add	r3, r2
 801a70c:	b29a      	uxth	r2, r3
 801a70e:	68fb      	ldr	r3, [r7, #12]
 801a710:	811a      	strh	r2, [r3, #8]
  /* chain last pbuf of head (p) with first of tail (t) */
  p->next = t;
 801a712:	68fb      	ldr	r3, [r7, #12]
 801a714:	683a      	ldr	r2, [r7, #0]
 801a716:	601a      	str	r2, [r3, #0]
  /* p->next now references t, but the caller will drop its reference to t,
   * so netto there is no change to the reference count of t.
   */
}
 801a718:	3710      	adds	r7, #16
 801a71a:	46bd      	mov	sp, r7
 801a71c:	bd80      	pop	{r7, pc}
 801a71e:	bf00      	nop
 801a720:	0802e0f0 	.word	0x0802e0f0
 801a724:	0802e2e4 	.word	0x0802e2e4
 801a728:	0802e150 	.word	0x0802e150
 801a72c:	0802e31c 	.word	0x0802e31c
 801a730:	0802e34c 	.word	0x0802e34c

0801a734 <pbuf_chain>:
 * The ->ref field of the first pbuf of the tail chain is adjusted.
 *
 */
void
pbuf_chain(struct pbuf *h, struct pbuf *t)
{
 801a734:	b580      	push	{r7, lr}
 801a736:	b082      	sub	sp, #8
 801a738:	af00      	add	r7, sp, #0
 801a73a:	6078      	str	r0, [r7, #4]
 801a73c:	6039      	str	r1, [r7, #0]
  pbuf_cat(h, t);
 801a73e:	6839      	ldr	r1, [r7, #0]
 801a740:	6878      	ldr	r0, [r7, #4]
 801a742:	f7ff ffa1 	bl	801a688 <pbuf_cat>
  /* t is now referenced by h */
  pbuf_ref(t);
 801a746:	6838      	ldr	r0, [r7, #0]
 801a748:	f7ff ff76 	bl	801a638 <pbuf_ref>
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_chain: %p references %p\n", (void *)h, (void *)t));
}
 801a74c:	bf00      	nop
 801a74e:	3708      	adds	r7, #8
 801a750:	46bd      	mov	sp, r7
 801a752:	bd80      	pop	{r7, pc}

0801a754 <pbuf_copy>:
 *         ERR_ARG if one of the pbufs is NULL or p_to is not big
 *                 enough to hold p_from
 */
err_t
pbuf_copy(struct pbuf *p_to, const struct pbuf *p_from)
{
 801a754:	b580      	push	{r7, lr}
 801a756:	b086      	sub	sp, #24
 801a758:	af00      	add	r7, sp, #0
 801a75a:	6078      	str	r0, [r7, #4]
 801a75c:	6039      	str	r1, [r7, #0]
  size_t offset_to = 0, offset_from = 0, len;
 801a75e:	2300      	movs	r3, #0
 801a760:	617b      	str	r3, [r7, #20]
 801a762:	2300      	movs	r3, #0
 801a764:	613b      	str	r3, [r7, #16]

  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy(%p, %p)\n",
              (const void *)p_to, (const void *)p_from));

  /* is the target big enough to hold the source? */
  LWIP_ERROR("pbuf_copy: target not big enough to hold source", ((p_to != NULL) &&
 801a766:	687b      	ldr	r3, [r7, #4]
 801a768:	2b00      	cmp	r3, #0
 801a76a:	d008      	beq.n	801a77e <pbuf_copy+0x2a>
 801a76c:	683b      	ldr	r3, [r7, #0]
 801a76e:	2b00      	cmp	r3, #0
 801a770:	d005      	beq.n	801a77e <pbuf_copy+0x2a>
 801a772:	687b      	ldr	r3, [r7, #4]
 801a774:	891a      	ldrh	r2, [r3, #8]
 801a776:	683b      	ldr	r3, [r7, #0]
 801a778:	891b      	ldrh	r3, [r3, #8]
 801a77a:	429a      	cmp	r2, r3
 801a77c:	d209      	bcs.n	801a792 <pbuf_copy+0x3e>
 801a77e:	4b57      	ldr	r3, [pc, #348]	@ (801a8dc <pbuf_copy+0x188>)
 801a780:	f240 32c9 	movw	r2, #969	@ 0x3c9
 801a784:	4956      	ldr	r1, [pc, #344]	@ (801a8e0 <pbuf_copy+0x18c>)
 801a786:	4857      	ldr	r0, [pc, #348]	@ (801a8e4 <pbuf_copy+0x190>)
 801a788:	f00f f928 	bl	80299dc <iprintf>
 801a78c:	f06f 030f 	mvn.w	r3, #15
 801a790:	e09f      	b.n	801a8d2 <pbuf_copy+0x17e>
             (p_from != NULL) && (p_to->tot_len >= p_from->tot_len)), return ERR_ARG;);

  /* iterate through pbuf chain */
  do {
    /* copy one part of the original chain */
    if ((p_to->len - offset_to) >= (p_from->len - offset_from)) {
 801a792:	687b      	ldr	r3, [r7, #4]
 801a794:	895b      	ldrh	r3, [r3, #10]
 801a796:	461a      	mov	r2, r3
 801a798:	697b      	ldr	r3, [r7, #20]
 801a79a:	1ad2      	subs	r2, r2, r3
 801a79c:	683b      	ldr	r3, [r7, #0]
 801a79e:	895b      	ldrh	r3, [r3, #10]
 801a7a0:	4619      	mov	r1, r3
 801a7a2:	693b      	ldr	r3, [r7, #16]
 801a7a4:	1acb      	subs	r3, r1, r3
 801a7a6:	429a      	cmp	r2, r3
 801a7a8:	d306      	bcc.n	801a7b8 <pbuf_copy+0x64>
      /* complete current p_from fits into current p_to */
      len = p_from->len - offset_from;
 801a7aa:	683b      	ldr	r3, [r7, #0]
 801a7ac:	895b      	ldrh	r3, [r3, #10]
 801a7ae:	461a      	mov	r2, r3
 801a7b0:	693b      	ldr	r3, [r7, #16]
 801a7b2:	1ad3      	subs	r3, r2, r3
 801a7b4:	60fb      	str	r3, [r7, #12]
 801a7b6:	e005      	b.n	801a7c4 <pbuf_copy+0x70>
    } else {
      /* current p_from does not fit into current p_to */
      len = p_to->len - offset_to;
 801a7b8:	687b      	ldr	r3, [r7, #4]
 801a7ba:	895b      	ldrh	r3, [r3, #10]
 801a7bc:	461a      	mov	r2, r3
 801a7be:	697b      	ldr	r3, [r7, #20]
 801a7c0:	1ad3      	subs	r3, r2, r3
 801a7c2:	60fb      	str	r3, [r7, #12]
    }
    MEMCPY((u8_t *)p_to->payload + offset_to, (u8_t *)p_from->payload + offset_from, len);
 801a7c4:	687b      	ldr	r3, [r7, #4]
 801a7c6:	685a      	ldr	r2, [r3, #4]
 801a7c8:	697b      	ldr	r3, [r7, #20]
 801a7ca:	18d0      	adds	r0, r2, r3
 801a7cc:	683b      	ldr	r3, [r7, #0]
 801a7ce:	685a      	ldr	r2, [r3, #4]
 801a7d0:	693b      	ldr	r3, [r7, #16]
 801a7d2:	4413      	add	r3, r2
 801a7d4:	68fa      	ldr	r2, [r7, #12]
 801a7d6:	4619      	mov	r1, r3
 801a7d8:	f00f fb89 	bl	8029eee <memcpy>
    offset_to += len;
 801a7dc:	697a      	ldr	r2, [r7, #20]
 801a7de:	68fb      	ldr	r3, [r7, #12]
 801a7e0:	4413      	add	r3, r2
 801a7e2:	617b      	str	r3, [r7, #20]
    offset_from += len;
 801a7e4:	693a      	ldr	r2, [r7, #16]
 801a7e6:	68fb      	ldr	r3, [r7, #12]
 801a7e8:	4413      	add	r3, r2
 801a7ea:	613b      	str	r3, [r7, #16]
    LWIP_ASSERT("offset_to <= p_to->len", offset_to <= p_to->len);
 801a7ec:	687b      	ldr	r3, [r7, #4]
 801a7ee:	895b      	ldrh	r3, [r3, #10]
 801a7f0:	461a      	mov	r2, r3
 801a7f2:	697b      	ldr	r3, [r7, #20]
 801a7f4:	4293      	cmp	r3, r2
 801a7f6:	d906      	bls.n	801a806 <pbuf_copy+0xb2>
 801a7f8:	4b38      	ldr	r3, [pc, #224]	@ (801a8dc <pbuf_copy+0x188>)
 801a7fa:	f240 32d9 	movw	r2, #985	@ 0x3d9
 801a7fe:	493a      	ldr	r1, [pc, #232]	@ (801a8e8 <pbuf_copy+0x194>)
 801a800:	4838      	ldr	r0, [pc, #224]	@ (801a8e4 <pbuf_copy+0x190>)
 801a802:	f00f f8eb 	bl	80299dc <iprintf>
    LWIP_ASSERT("offset_from <= p_from->len", offset_from <= p_from->len);
 801a806:	683b      	ldr	r3, [r7, #0]
 801a808:	895b      	ldrh	r3, [r3, #10]
 801a80a:	461a      	mov	r2, r3
 801a80c:	693b      	ldr	r3, [r7, #16]
 801a80e:	4293      	cmp	r3, r2
 801a810:	d906      	bls.n	801a820 <pbuf_copy+0xcc>
 801a812:	4b32      	ldr	r3, [pc, #200]	@ (801a8dc <pbuf_copy+0x188>)
 801a814:	f240 32da 	movw	r2, #986	@ 0x3da
 801a818:	4934      	ldr	r1, [pc, #208]	@ (801a8ec <pbuf_copy+0x198>)
 801a81a:	4832      	ldr	r0, [pc, #200]	@ (801a8e4 <pbuf_copy+0x190>)
 801a81c:	f00f f8de 	bl	80299dc <iprintf>
    if (offset_from >= p_from->len) {
 801a820:	683b      	ldr	r3, [r7, #0]
 801a822:	895b      	ldrh	r3, [r3, #10]
 801a824:	461a      	mov	r2, r3
 801a826:	693b      	ldr	r3, [r7, #16]
 801a828:	4293      	cmp	r3, r2
 801a82a:	d304      	bcc.n	801a836 <pbuf_copy+0xe2>
      /* on to next p_from (if any) */
      offset_from = 0;
 801a82c:	2300      	movs	r3, #0
 801a82e:	613b      	str	r3, [r7, #16]
      p_from = p_from->next;
 801a830:	683b      	ldr	r3, [r7, #0]
 801a832:	681b      	ldr	r3, [r3, #0]
 801a834:	603b      	str	r3, [r7, #0]
    }
    if (offset_to == p_to->len) {
 801a836:	687b      	ldr	r3, [r7, #4]
 801a838:	895b      	ldrh	r3, [r3, #10]
 801a83a:	461a      	mov	r2, r3
 801a83c:	697b      	ldr	r3, [r7, #20]
 801a83e:	4293      	cmp	r3, r2
 801a840:	d114      	bne.n	801a86c <pbuf_copy+0x118>
      /* on to next p_to (if any) */
      offset_to = 0;
 801a842:	2300      	movs	r3, #0
 801a844:	617b      	str	r3, [r7, #20]
      p_to = p_to->next;
 801a846:	687b      	ldr	r3, [r7, #4]
 801a848:	681b      	ldr	r3, [r3, #0]
 801a84a:	607b      	str	r3, [r7, #4]
      LWIP_ERROR("p_to != NULL", (p_to != NULL) || (p_from == NULL), return ERR_ARG;);
 801a84c:	687b      	ldr	r3, [r7, #4]
 801a84e:	2b00      	cmp	r3, #0
 801a850:	d10c      	bne.n	801a86c <pbuf_copy+0x118>
 801a852:	683b      	ldr	r3, [r7, #0]
 801a854:	2b00      	cmp	r3, #0
 801a856:	d009      	beq.n	801a86c <pbuf_copy+0x118>
 801a858:	4b20      	ldr	r3, [pc, #128]	@ (801a8dc <pbuf_copy+0x188>)
 801a85a:	f44f 7279 	mov.w	r2, #996	@ 0x3e4
 801a85e:	4924      	ldr	r1, [pc, #144]	@ (801a8f0 <pbuf_copy+0x19c>)
 801a860:	4820      	ldr	r0, [pc, #128]	@ (801a8e4 <pbuf_copy+0x190>)
 801a862:	f00f f8bb 	bl	80299dc <iprintf>
 801a866:	f06f 030f 	mvn.w	r3, #15
 801a86a:	e032      	b.n	801a8d2 <pbuf_copy+0x17e>
    }

    if ((p_from != NULL) && (p_from->len == p_from->tot_len)) {
 801a86c:	683b      	ldr	r3, [r7, #0]
 801a86e:	2b00      	cmp	r3, #0
 801a870:	d013      	beq.n	801a89a <pbuf_copy+0x146>
 801a872:	683b      	ldr	r3, [r7, #0]
 801a874:	895a      	ldrh	r2, [r3, #10]
 801a876:	683b      	ldr	r3, [r7, #0]
 801a878:	891b      	ldrh	r3, [r3, #8]
 801a87a:	429a      	cmp	r2, r3
 801a87c:	d10d      	bne.n	801a89a <pbuf_copy+0x146>
      /* don't copy more than one packet! */
      LWIP_ERROR("pbuf_copy() does not allow packet queues!",
 801a87e:	683b      	ldr	r3, [r7, #0]
 801a880:	681b      	ldr	r3, [r3, #0]
 801a882:	2b00      	cmp	r3, #0
 801a884:	d009      	beq.n	801a89a <pbuf_copy+0x146>
 801a886:	4b15      	ldr	r3, [pc, #84]	@ (801a8dc <pbuf_copy+0x188>)
 801a888:	f240 32e9 	movw	r2, #1001	@ 0x3e9
 801a88c:	4919      	ldr	r1, [pc, #100]	@ (801a8f4 <pbuf_copy+0x1a0>)
 801a88e:	4815      	ldr	r0, [pc, #84]	@ (801a8e4 <pbuf_copy+0x190>)
 801a890:	f00f f8a4 	bl	80299dc <iprintf>
 801a894:	f06f 0305 	mvn.w	r3, #5
 801a898:	e01b      	b.n	801a8d2 <pbuf_copy+0x17e>
                 (p_from->next == NULL), return ERR_VAL;);
    }
    if ((p_to != NULL) && (p_to->len == p_to->tot_len)) {
 801a89a:	687b      	ldr	r3, [r7, #4]
 801a89c:	2b00      	cmp	r3, #0
 801a89e:	d013      	beq.n	801a8c8 <pbuf_copy+0x174>
 801a8a0:	687b      	ldr	r3, [r7, #4]
 801a8a2:	895a      	ldrh	r2, [r3, #10]
 801a8a4:	687b      	ldr	r3, [r7, #4]
 801a8a6:	891b      	ldrh	r3, [r3, #8]
 801a8a8:	429a      	cmp	r2, r3
 801a8aa:	d10d      	bne.n	801a8c8 <pbuf_copy+0x174>
      /* don't copy more than one packet! */
      LWIP_ERROR("pbuf_copy() does not allow packet queues!",
 801a8ac:	687b      	ldr	r3, [r7, #4]
 801a8ae:	681b      	ldr	r3, [r3, #0]
 801a8b0:	2b00      	cmp	r3, #0
 801a8b2:	d009      	beq.n	801a8c8 <pbuf_copy+0x174>
 801a8b4:	4b09      	ldr	r3, [pc, #36]	@ (801a8dc <pbuf_copy+0x188>)
 801a8b6:	f240 32ee 	movw	r2, #1006	@ 0x3ee
 801a8ba:	490e      	ldr	r1, [pc, #56]	@ (801a8f4 <pbuf_copy+0x1a0>)
 801a8bc:	4809      	ldr	r0, [pc, #36]	@ (801a8e4 <pbuf_copy+0x190>)
 801a8be:	f00f f88d 	bl	80299dc <iprintf>
 801a8c2:	f06f 0305 	mvn.w	r3, #5
 801a8c6:	e004      	b.n	801a8d2 <pbuf_copy+0x17e>
                 (p_to->next == NULL), return ERR_VAL;);
    }
  } while (p_from);
 801a8c8:	683b      	ldr	r3, [r7, #0]
 801a8ca:	2b00      	cmp	r3, #0
 801a8cc:	f47f af61 	bne.w	801a792 <pbuf_copy+0x3e>
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy: end of chain reached.\n"));
  return ERR_OK;
 801a8d0:	2300      	movs	r3, #0
}
 801a8d2:	4618      	mov	r0, r3
 801a8d4:	3718      	adds	r7, #24
 801a8d6:	46bd      	mov	sp, r7
 801a8d8:	bd80      	pop	{r7, pc}
 801a8da:	bf00      	nop
 801a8dc:	0802e0f0 	.word	0x0802e0f0
 801a8e0:	0802e398 	.word	0x0802e398
 801a8e4:	0802e150 	.word	0x0802e150
 801a8e8:	0802e3c8 	.word	0x0802e3c8
 801a8ec:	0802e3e0 	.word	0x0802e3e0
 801a8f0:	0802e3fc 	.word	0x0802e3fc
 801a8f4:	0802e40c 	.word	0x0802e40c

0801a8f8 <pbuf_copy_partial>:
 * @param offset offset into the packet buffer from where to begin copying len bytes
 * @return the number of bytes copied, or 0 on failure
 */
u16_t
pbuf_copy_partial(const struct pbuf *buf, void *dataptr, u16_t len, u16_t offset)
{
 801a8f8:	b580      	push	{r7, lr}
 801a8fa:	b088      	sub	sp, #32
 801a8fc:	af00      	add	r7, sp, #0
 801a8fe:	60f8      	str	r0, [r7, #12]
 801a900:	60b9      	str	r1, [r7, #8]
 801a902:	4611      	mov	r1, r2
 801a904:	461a      	mov	r2, r3
 801a906:	460b      	mov	r3, r1
 801a908:	80fb      	strh	r3, [r7, #6]
 801a90a:	4613      	mov	r3, r2
 801a90c:	80bb      	strh	r3, [r7, #4]
  const struct pbuf *p;
  u16_t left = 0;
 801a90e:	2300      	movs	r3, #0
 801a910:	837b      	strh	r3, [r7, #26]
  u16_t buf_copy_len;
  u16_t copied_total = 0;
 801a912:	2300      	movs	r3, #0
 801a914:	82fb      	strh	r3, [r7, #22]

  LWIP_ERROR("pbuf_copy_partial: invalid buf", (buf != NULL), return 0;);
 801a916:	68fb      	ldr	r3, [r7, #12]
 801a918:	2b00      	cmp	r3, #0
 801a91a:	d108      	bne.n	801a92e <pbuf_copy_partial+0x36>
 801a91c:	4b2b      	ldr	r3, [pc, #172]	@ (801a9cc <pbuf_copy_partial+0xd4>)
 801a91e:	f240 420a 	movw	r2, #1034	@ 0x40a
 801a922:	492b      	ldr	r1, [pc, #172]	@ (801a9d0 <pbuf_copy_partial+0xd8>)
 801a924:	482b      	ldr	r0, [pc, #172]	@ (801a9d4 <pbuf_copy_partial+0xdc>)
 801a926:	f00f f859 	bl	80299dc <iprintf>
 801a92a:	2300      	movs	r3, #0
 801a92c:	e04a      	b.n	801a9c4 <pbuf_copy_partial+0xcc>
  LWIP_ERROR("pbuf_copy_partial: invalid dataptr", (dataptr != NULL), return 0;);
 801a92e:	68bb      	ldr	r3, [r7, #8]
 801a930:	2b00      	cmp	r3, #0
 801a932:	d108      	bne.n	801a946 <pbuf_copy_partial+0x4e>
 801a934:	4b25      	ldr	r3, [pc, #148]	@ (801a9cc <pbuf_copy_partial+0xd4>)
 801a936:	f240 420b 	movw	r2, #1035	@ 0x40b
 801a93a:	4927      	ldr	r1, [pc, #156]	@ (801a9d8 <pbuf_copy_partial+0xe0>)
 801a93c:	4825      	ldr	r0, [pc, #148]	@ (801a9d4 <pbuf_copy_partial+0xdc>)
 801a93e:	f00f f84d 	bl	80299dc <iprintf>
 801a942:	2300      	movs	r3, #0
 801a944:	e03e      	b.n	801a9c4 <pbuf_copy_partial+0xcc>

  /* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */
  for (p = buf; len != 0 && p != NULL; p = p->next) {
 801a946:	68fb      	ldr	r3, [r7, #12]
 801a948:	61fb      	str	r3, [r7, #28]
 801a94a:	e034      	b.n	801a9b6 <pbuf_copy_partial+0xbe>
    if ((offset != 0) && (offset >= p->len)) {
 801a94c:	88bb      	ldrh	r3, [r7, #4]
 801a94e:	2b00      	cmp	r3, #0
 801a950:	d00a      	beq.n	801a968 <pbuf_copy_partial+0x70>
 801a952:	69fb      	ldr	r3, [r7, #28]
 801a954:	895b      	ldrh	r3, [r3, #10]
 801a956:	88ba      	ldrh	r2, [r7, #4]
 801a958:	429a      	cmp	r2, r3
 801a95a:	d305      	bcc.n	801a968 <pbuf_copy_partial+0x70>
      /* don't copy from this buffer -> on to the next */
      offset = (u16_t)(offset - p->len);
 801a95c:	69fb      	ldr	r3, [r7, #28]
 801a95e:	895b      	ldrh	r3, [r3, #10]
 801a960:	88ba      	ldrh	r2, [r7, #4]
 801a962:	1ad3      	subs	r3, r2, r3
 801a964:	80bb      	strh	r3, [r7, #4]
 801a966:	e023      	b.n	801a9b0 <pbuf_copy_partial+0xb8>
    } else {
      /* copy from this buffer. maybe only partially. */
      buf_copy_len = (u16_t)(p->len - offset);
 801a968:	69fb      	ldr	r3, [r7, #28]
 801a96a:	895a      	ldrh	r2, [r3, #10]
 801a96c:	88bb      	ldrh	r3, [r7, #4]
 801a96e:	1ad3      	subs	r3, r2, r3
 801a970:	833b      	strh	r3, [r7, #24]
      if (buf_copy_len > len) {
 801a972:	8b3a      	ldrh	r2, [r7, #24]
 801a974:	88fb      	ldrh	r3, [r7, #6]
 801a976:	429a      	cmp	r2, r3
 801a978:	d901      	bls.n	801a97e <pbuf_copy_partial+0x86>
        buf_copy_len = len;
 801a97a:	88fb      	ldrh	r3, [r7, #6]
 801a97c:	833b      	strh	r3, [r7, #24]
      }
      /* copy the necessary parts of the buffer */
      MEMCPY(&((char *)dataptr)[left], &((char *)p->payload)[offset], buf_copy_len);
 801a97e:	8b7b      	ldrh	r3, [r7, #26]
 801a980:	68ba      	ldr	r2, [r7, #8]
 801a982:	18d0      	adds	r0, r2, r3
 801a984:	69fb      	ldr	r3, [r7, #28]
 801a986:	685a      	ldr	r2, [r3, #4]
 801a988:	88bb      	ldrh	r3, [r7, #4]
 801a98a:	4413      	add	r3, r2
 801a98c:	8b3a      	ldrh	r2, [r7, #24]
 801a98e:	4619      	mov	r1, r3
 801a990:	f00f faad 	bl	8029eee <memcpy>
      copied_total = (u16_t)(copied_total + buf_copy_len);
 801a994:	8afa      	ldrh	r2, [r7, #22]
 801a996:	8b3b      	ldrh	r3, [r7, #24]
 801a998:	4413      	add	r3, r2
 801a99a:	82fb      	strh	r3, [r7, #22]
      left = (u16_t)(left + buf_copy_len);
 801a99c:	8b7a      	ldrh	r2, [r7, #26]
 801a99e:	8b3b      	ldrh	r3, [r7, #24]
 801a9a0:	4413      	add	r3, r2
 801a9a2:	837b      	strh	r3, [r7, #26]
      len = (u16_t)(len - buf_copy_len);
 801a9a4:	88fa      	ldrh	r2, [r7, #6]
 801a9a6:	8b3b      	ldrh	r3, [r7, #24]
 801a9a8:	1ad3      	subs	r3, r2, r3
 801a9aa:	80fb      	strh	r3, [r7, #6]
      offset = 0;
 801a9ac:	2300      	movs	r3, #0
 801a9ae:	80bb      	strh	r3, [r7, #4]
  for (p = buf; len != 0 && p != NULL; p = p->next) {
 801a9b0:	69fb      	ldr	r3, [r7, #28]
 801a9b2:	681b      	ldr	r3, [r3, #0]
 801a9b4:	61fb      	str	r3, [r7, #28]
 801a9b6:	88fb      	ldrh	r3, [r7, #6]
 801a9b8:	2b00      	cmp	r3, #0
 801a9ba:	d002      	beq.n	801a9c2 <pbuf_copy_partial+0xca>
 801a9bc:	69fb      	ldr	r3, [r7, #28]
 801a9be:	2b00      	cmp	r3, #0
 801a9c0:	d1c4      	bne.n	801a94c <pbuf_copy_partial+0x54>
    }
  }
  return copied_total;
 801a9c2:	8afb      	ldrh	r3, [r7, #22]
}
 801a9c4:	4618      	mov	r0, r3
 801a9c6:	3720      	adds	r7, #32
 801a9c8:	46bd      	mov	sp, r7
 801a9ca:	bd80      	pop	{r7, pc}
 801a9cc:	0802e0f0 	.word	0x0802e0f0
 801a9d0:	0802e438 	.word	0x0802e438
 801a9d4:	0802e150 	.word	0x0802e150
 801a9d8:	0802e458 	.word	0x0802e458

0801a9dc <pbuf_clone>:
 *
 * @return a new pbuf or NULL if allocation fails
 */
struct pbuf *
pbuf_clone(pbuf_layer layer, pbuf_type type, struct pbuf *p)
{
 801a9dc:	b580      	push	{r7, lr}
 801a9de:	b084      	sub	sp, #16
 801a9e0:	af00      	add	r7, sp, #0
 801a9e2:	4603      	mov	r3, r0
 801a9e4:	603a      	str	r2, [r7, #0]
 801a9e6:	71fb      	strb	r3, [r7, #7]
 801a9e8:	460b      	mov	r3, r1
 801a9ea:	80bb      	strh	r3, [r7, #4]
  struct pbuf *q;
  err_t err;
  q = pbuf_alloc(layer, p->tot_len, type);
 801a9ec:	683b      	ldr	r3, [r7, #0]
 801a9ee:	8919      	ldrh	r1, [r3, #8]
 801a9f0:	88ba      	ldrh	r2, [r7, #4]
 801a9f2:	79fb      	ldrb	r3, [r7, #7]
 801a9f4:	4618      	mov	r0, r3
 801a9f6:	f7ff fa63 	bl	8019ec0 <pbuf_alloc>
 801a9fa:	60f8      	str	r0, [r7, #12]
  if (q == NULL) {
 801a9fc:	68fb      	ldr	r3, [r7, #12]
 801a9fe:	2b00      	cmp	r3, #0
 801aa00:	d101      	bne.n	801aa06 <pbuf_clone+0x2a>
    return NULL;
 801aa02:	2300      	movs	r3, #0
 801aa04:	e011      	b.n	801aa2a <pbuf_clone+0x4e>
  }
  err = pbuf_copy(q, p);
 801aa06:	6839      	ldr	r1, [r7, #0]
 801aa08:	68f8      	ldr	r0, [r7, #12]
 801aa0a:	f7ff fea3 	bl	801a754 <pbuf_copy>
 801aa0e:	4603      	mov	r3, r0
 801aa10:	72fb      	strb	r3, [r7, #11]
  LWIP_UNUSED_ARG(err); /* in case of LWIP_NOASSERT */
  LWIP_ASSERT("pbuf_copy failed", err == ERR_OK);
 801aa12:	f997 300b 	ldrsb.w	r3, [r7, #11]
 801aa16:	2b00      	cmp	r3, #0
 801aa18:	d006      	beq.n	801aa28 <pbuf_clone+0x4c>
 801aa1a:	4b06      	ldr	r3, [pc, #24]	@ (801aa34 <pbuf_clone+0x58>)
 801aa1c:	f240 5224 	movw	r2, #1316	@ 0x524
 801aa20:	4905      	ldr	r1, [pc, #20]	@ (801aa38 <pbuf_clone+0x5c>)
 801aa22:	4806      	ldr	r0, [pc, #24]	@ (801aa3c <pbuf_clone+0x60>)
 801aa24:	f00e ffda 	bl	80299dc <iprintf>
  return q;
 801aa28:	68fb      	ldr	r3, [r7, #12]
}
 801aa2a:	4618      	mov	r0, r3
 801aa2c:	3710      	adds	r7, #16
 801aa2e:	46bd      	mov	sp, r7
 801aa30:	bd80      	pop	{r7, pc}
 801aa32:	bf00      	nop
 801aa34:	0802e0f0 	.word	0x0802e0f0
 801aa38:	0802e564 	.word	0x0802e564
 801aa3c:	0802e150 	.word	0x0802e150

0801aa40 <tcp_init>:
/**
 * Initialize this module.
 */
void
tcp_init(void)
{
 801aa40:	b580      	push	{r7, lr}
 801aa42:	af00      	add	r7, sp, #0
#ifdef LWIP_RAND
  tcp_port = TCP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND());
 801aa44:	f00d fca0 	bl	8028388 <rand>
 801aa48:	4603      	mov	r3, r0
 801aa4a:	b29b      	uxth	r3, r3
 801aa4c:	f3c3 030d 	ubfx	r3, r3, #0, #14
 801aa50:	b29b      	uxth	r3, r3
 801aa52:	f5a3 4380 	sub.w	r3, r3, #16384	@ 0x4000
 801aa56:	b29a      	uxth	r2, r3
 801aa58:	4b01      	ldr	r3, [pc, #4]	@ (801aa60 <tcp_init+0x20>)
 801aa5a:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_RAND */
}
 801aa5c:	bf00      	nop
 801aa5e:	bd80      	pop	{r7, pc}
 801aa60:	2400004c 	.word	0x2400004c

0801aa64 <tcp_free>:

/** Free a tcp pcb */
void
tcp_free(struct tcp_pcb *pcb)
{
 801aa64:	b580      	push	{r7, lr}
 801aa66:	b082      	sub	sp, #8
 801aa68:	af00      	add	r7, sp, #0
 801aa6a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_free: LISTEN", pcb->state != LISTEN);
 801aa6c:	687b      	ldr	r3, [r7, #4]
 801aa6e:	7d1b      	ldrb	r3, [r3, #20]
 801aa70:	2b01      	cmp	r3, #1
 801aa72:	d105      	bne.n	801aa80 <tcp_free+0x1c>
 801aa74:	4b06      	ldr	r3, [pc, #24]	@ (801aa90 <tcp_free+0x2c>)
 801aa76:	22d4      	movs	r2, #212	@ 0xd4
 801aa78:	4906      	ldr	r1, [pc, #24]	@ (801aa94 <tcp_free+0x30>)
 801aa7a:	4807      	ldr	r0, [pc, #28]	@ (801aa98 <tcp_free+0x34>)
 801aa7c:	f00e ffae 	bl	80299dc <iprintf>
#if LWIP_TCP_PCB_NUM_EXT_ARGS
  tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args);
#endif
  memp_free(MEMP_TCP_PCB, pcb);
 801aa80:	6879      	ldr	r1, [r7, #4]
 801aa82:	2001      	movs	r0, #1
 801aa84:	f7fe fe44 	bl	8019710 <memp_free>
}
 801aa88:	bf00      	nop
 801aa8a:	3708      	adds	r7, #8
 801aa8c:	46bd      	mov	sp, r7
 801aa8e:	bd80      	pop	{r7, pc}
 801aa90:	0802e5f0 	.word	0x0802e5f0
 801aa94:	0802e620 	.word	0x0802e620
 801aa98:	0802e634 	.word	0x0802e634

0801aa9c <tcp_free_listen>:

/** Free a tcp listen pcb */
static void
tcp_free_listen(struct tcp_pcb *pcb)
{
 801aa9c:	b580      	push	{r7, lr}
 801aa9e:	b082      	sub	sp, #8
 801aaa0:	af00      	add	r7, sp, #0
 801aaa2:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_free_listen: !LISTEN", pcb->state != LISTEN);
 801aaa4:	687b      	ldr	r3, [r7, #4]
 801aaa6:	7d1b      	ldrb	r3, [r3, #20]
 801aaa8:	2b01      	cmp	r3, #1
 801aaaa:	d105      	bne.n	801aab8 <tcp_free_listen+0x1c>
 801aaac:	4b06      	ldr	r3, [pc, #24]	@ (801aac8 <tcp_free_listen+0x2c>)
 801aaae:	22df      	movs	r2, #223	@ 0xdf
 801aab0:	4906      	ldr	r1, [pc, #24]	@ (801aacc <tcp_free_listen+0x30>)
 801aab2:	4807      	ldr	r0, [pc, #28]	@ (801aad0 <tcp_free_listen+0x34>)
 801aab4:	f00e ff92 	bl	80299dc <iprintf>
#if LWIP_TCP_PCB_NUM_EXT_ARGS
  tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args);
#endif
  memp_free(MEMP_TCP_PCB_LISTEN, pcb);
 801aab8:	6879      	ldr	r1, [r7, #4]
 801aaba:	2002      	movs	r0, #2
 801aabc:	f7fe fe28 	bl	8019710 <memp_free>
}
 801aac0:	bf00      	nop
 801aac2:	3708      	adds	r7, #8
 801aac4:	46bd      	mov	sp, r7
 801aac6:	bd80      	pop	{r7, pc}
 801aac8:	0802e5f0 	.word	0x0802e5f0
 801aacc:	0802e65c 	.word	0x0802e65c
 801aad0:	0802e634 	.word	0x0802e634

0801aad4 <tcp_tmr>:
/**
 * Called periodically to dispatch TCP timers.
 */
void
tcp_tmr(void)
{
 801aad4:	b580      	push	{r7, lr}
 801aad6:	af00      	add	r7, sp, #0
  /* Call tcp_fasttmr() every 250 ms */
  tcp_fasttmr();
 801aad8:	f001 f86a 	bl	801bbb0 <tcp_fasttmr>

  if (++tcp_timer & 1) {
 801aadc:	4b07      	ldr	r3, [pc, #28]	@ (801aafc <tcp_tmr+0x28>)
 801aade:	781b      	ldrb	r3, [r3, #0]
 801aae0:	3301      	adds	r3, #1
 801aae2:	b2da      	uxtb	r2, r3
 801aae4:	4b05      	ldr	r3, [pc, #20]	@ (801aafc <tcp_tmr+0x28>)
 801aae6:	701a      	strb	r2, [r3, #0]
 801aae8:	4b04      	ldr	r3, [pc, #16]	@ (801aafc <tcp_tmr+0x28>)
 801aaea:	781b      	ldrb	r3, [r3, #0]
 801aaec:	f003 0301 	and.w	r3, r3, #1
 801aaf0:	2b00      	cmp	r3, #0
 801aaf2:	d001      	beq.n	801aaf8 <tcp_tmr+0x24>
    /* Call tcp_slowtmr() every 500 ms, i.e., every other timer
       tcp_tmr() is called. */
    tcp_slowtmr();
 801aaf4:	f000 fd1a 	bl	801b52c <tcp_slowtmr>
  }
}
 801aaf8:	bf00      	nop
 801aafa:	bd80      	pop	{r7, pc}
 801aafc:	2402ae9d 	.word	0x2402ae9d

0801ab00 <tcp_remove_listener>:
/** Called when a listen pcb is closed. Iterates one pcb list and removes the
 * closed listener pcb from pcb->listener if matching.
 */
static void
tcp_remove_listener(struct tcp_pcb *list, struct tcp_pcb_listen *lpcb)
{
 801ab00:	b580      	push	{r7, lr}
 801ab02:	b084      	sub	sp, #16
 801ab04:	af00      	add	r7, sp, #0
 801ab06:	6078      	str	r0, [r7, #4]
 801ab08:	6039      	str	r1, [r7, #0]
  struct tcp_pcb *pcb;

  LWIP_ASSERT("tcp_remove_listener: invalid listener", lpcb != NULL);
 801ab0a:	683b      	ldr	r3, [r7, #0]
 801ab0c:	2b00      	cmp	r3, #0
 801ab0e:	d105      	bne.n	801ab1c <tcp_remove_listener+0x1c>
 801ab10:	4b0d      	ldr	r3, [pc, #52]	@ (801ab48 <tcp_remove_listener+0x48>)
 801ab12:	22ff      	movs	r2, #255	@ 0xff
 801ab14:	490d      	ldr	r1, [pc, #52]	@ (801ab4c <tcp_remove_listener+0x4c>)
 801ab16:	480e      	ldr	r0, [pc, #56]	@ (801ab50 <tcp_remove_listener+0x50>)
 801ab18:	f00e ff60 	bl	80299dc <iprintf>

  for (pcb = list; pcb != NULL; pcb = pcb->next) {
 801ab1c:	687b      	ldr	r3, [r7, #4]
 801ab1e:	60fb      	str	r3, [r7, #12]
 801ab20:	e00a      	b.n	801ab38 <tcp_remove_listener+0x38>
    if (pcb->listener == lpcb) {
 801ab22:	68fb      	ldr	r3, [r7, #12]
 801ab24:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801ab26:	683a      	ldr	r2, [r7, #0]
 801ab28:	429a      	cmp	r2, r3
 801ab2a:	d102      	bne.n	801ab32 <tcp_remove_listener+0x32>
      pcb->listener = NULL;
 801ab2c:	68fb      	ldr	r3, [r7, #12]
 801ab2e:	2200      	movs	r2, #0
 801ab30:	67da      	str	r2, [r3, #124]	@ 0x7c
  for (pcb = list; pcb != NULL; pcb = pcb->next) {
 801ab32:	68fb      	ldr	r3, [r7, #12]
 801ab34:	68db      	ldr	r3, [r3, #12]
 801ab36:	60fb      	str	r3, [r7, #12]
 801ab38:	68fb      	ldr	r3, [r7, #12]
 801ab3a:	2b00      	cmp	r3, #0
 801ab3c:	d1f1      	bne.n	801ab22 <tcp_remove_listener+0x22>
    }
  }
}
 801ab3e:	bf00      	nop
 801ab40:	bf00      	nop
 801ab42:	3710      	adds	r7, #16
 801ab44:	46bd      	mov	sp, r7
 801ab46:	bd80      	pop	{r7, pc}
 801ab48:	0802e5f0 	.word	0x0802e5f0
 801ab4c:	0802e678 	.word	0x0802e678
 801ab50:	0802e634 	.word	0x0802e634

0801ab54 <tcp_listen_closed>:
/** Called when a listen pcb is closed. Iterates all pcb lists and removes the
 * closed listener pcb from pcb->listener if matching.
 */
static void
tcp_listen_closed(struct tcp_pcb *pcb)
{
 801ab54:	b580      	push	{r7, lr}
 801ab56:	b084      	sub	sp, #16
 801ab58:	af00      	add	r7, sp, #0
 801ab5a:	6078      	str	r0, [r7, #4]
#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
  size_t i;
  LWIP_ASSERT("pcb != NULL", pcb != NULL);
 801ab5c:	687b      	ldr	r3, [r7, #4]
 801ab5e:	2b00      	cmp	r3, #0
 801ab60:	d106      	bne.n	801ab70 <tcp_listen_closed+0x1c>
 801ab62:	4b14      	ldr	r3, [pc, #80]	@ (801abb4 <tcp_listen_closed+0x60>)
 801ab64:	f240 1211 	movw	r2, #273	@ 0x111
 801ab68:	4913      	ldr	r1, [pc, #76]	@ (801abb8 <tcp_listen_closed+0x64>)
 801ab6a:	4814      	ldr	r0, [pc, #80]	@ (801abbc <tcp_listen_closed+0x68>)
 801ab6c:	f00e ff36 	bl	80299dc <iprintf>
  LWIP_ASSERT("pcb->state == LISTEN", pcb->state == LISTEN);
 801ab70:	687b      	ldr	r3, [r7, #4]
 801ab72:	7d1b      	ldrb	r3, [r3, #20]
 801ab74:	2b01      	cmp	r3, #1
 801ab76:	d006      	beq.n	801ab86 <tcp_listen_closed+0x32>
 801ab78:	4b0e      	ldr	r3, [pc, #56]	@ (801abb4 <tcp_listen_closed+0x60>)
 801ab7a:	f44f 7289 	mov.w	r2, #274	@ 0x112
 801ab7e:	4910      	ldr	r1, [pc, #64]	@ (801abc0 <tcp_listen_closed+0x6c>)
 801ab80:	480e      	ldr	r0, [pc, #56]	@ (801abbc <tcp_listen_closed+0x68>)
 801ab82:	f00e ff2b 	bl	80299dc <iprintf>
  for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) {
 801ab86:	2301      	movs	r3, #1
 801ab88:	60fb      	str	r3, [r7, #12]
 801ab8a:	e00b      	b.n	801aba4 <tcp_listen_closed+0x50>
    tcp_remove_listener(*tcp_pcb_lists[i], (struct tcp_pcb_listen *)pcb);
 801ab8c:	4a0d      	ldr	r2, [pc, #52]	@ (801abc4 <tcp_listen_closed+0x70>)
 801ab8e:	68fb      	ldr	r3, [r7, #12]
 801ab90:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801ab94:	681b      	ldr	r3, [r3, #0]
 801ab96:	6879      	ldr	r1, [r7, #4]
 801ab98:	4618      	mov	r0, r3
 801ab9a:	f7ff ffb1 	bl	801ab00 <tcp_remove_listener>
  for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) {
 801ab9e:	68fb      	ldr	r3, [r7, #12]
 801aba0:	3301      	adds	r3, #1
 801aba2:	60fb      	str	r3, [r7, #12]
 801aba4:	68fb      	ldr	r3, [r7, #12]
 801aba6:	2b03      	cmp	r3, #3
 801aba8:	d9f0      	bls.n	801ab8c <tcp_listen_closed+0x38>
  }
#endif
  LWIP_UNUSED_ARG(pcb);
}
 801abaa:	bf00      	nop
 801abac:	bf00      	nop
 801abae:	3710      	adds	r7, #16
 801abb0:	46bd      	mov	sp, r7
 801abb2:	bd80      	pop	{r7, pc}
 801abb4:	0802e5f0 	.word	0x0802e5f0
 801abb8:	0802e6a0 	.word	0x0802e6a0
 801abbc:	0802e634 	.word	0x0802e634
 801abc0:	0802e6ac 	.word	0x0802e6ac
 801abc4:	08030c30 	.word	0x08030c30

0801abc8 <tcp_close_shutdown>:
 * @return ERR_OK if connection has been closed
 *         another err_t if closing failed and pcb is not freed
 */
static err_t
tcp_close_shutdown(struct tcp_pcb *pcb, u8_t rst_on_unacked_data)
{
 801abc8:	b5b0      	push	{r4, r5, r7, lr}
 801abca:	b088      	sub	sp, #32
 801abcc:	af04      	add	r7, sp, #16
 801abce:	6078      	str	r0, [r7, #4]
 801abd0:	460b      	mov	r3, r1
 801abd2:	70fb      	strb	r3, [r7, #3]
  LWIP_ASSERT("tcp_close_shutdown: invalid pcb", pcb != NULL);
 801abd4:	687b      	ldr	r3, [r7, #4]
 801abd6:	2b00      	cmp	r3, #0
 801abd8:	d106      	bne.n	801abe8 <tcp_close_shutdown+0x20>
 801abda:	4b63      	ldr	r3, [pc, #396]	@ (801ad68 <tcp_close_shutdown+0x1a0>)
 801abdc:	f44f 72af 	mov.w	r2, #350	@ 0x15e
 801abe0:	4962      	ldr	r1, [pc, #392]	@ (801ad6c <tcp_close_shutdown+0x1a4>)
 801abe2:	4863      	ldr	r0, [pc, #396]	@ (801ad70 <tcp_close_shutdown+0x1a8>)
 801abe4:	f00e fefa 	bl	80299dc <iprintf>

  if (rst_on_unacked_data && ((pcb->state == ESTABLISHED) || (pcb->state == CLOSE_WAIT))) {
 801abe8:	78fb      	ldrb	r3, [r7, #3]
 801abea:	2b00      	cmp	r3, #0
 801abec:	d067      	beq.n	801acbe <tcp_close_shutdown+0xf6>
 801abee:	687b      	ldr	r3, [r7, #4]
 801abf0:	7d1b      	ldrb	r3, [r3, #20]
 801abf2:	2b04      	cmp	r3, #4
 801abf4:	d003      	beq.n	801abfe <tcp_close_shutdown+0x36>
 801abf6:	687b      	ldr	r3, [r7, #4]
 801abf8:	7d1b      	ldrb	r3, [r3, #20]
 801abfa:	2b07      	cmp	r3, #7
 801abfc:	d15f      	bne.n	801acbe <tcp_close_shutdown+0xf6>
    if ((pcb->refused_data != NULL) || (pcb->rcv_wnd != TCP_WND_MAX(pcb))) {
 801abfe:	687b      	ldr	r3, [r7, #4]
 801ac00:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801ac02:	2b00      	cmp	r3, #0
 801ac04:	d105      	bne.n	801ac12 <tcp_close_shutdown+0x4a>
 801ac06:	687b      	ldr	r3, [r7, #4]
 801ac08:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801ac0a:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801ac0e:	4293      	cmp	r3, r2
 801ac10:	d055      	beq.n	801acbe <tcp_close_shutdown+0xf6>
      /* Not all data received by application, send RST to tell the remote
         side about this. */
      LWIP_ASSERT("pcb->flags & TF_RXCLOSED", pcb->flags & TF_RXCLOSED);
 801ac12:	687b      	ldr	r3, [r7, #4]
 801ac14:	8b5b      	ldrh	r3, [r3, #26]
 801ac16:	f003 0310 	and.w	r3, r3, #16
 801ac1a:	2b00      	cmp	r3, #0
 801ac1c:	d106      	bne.n	801ac2c <tcp_close_shutdown+0x64>
 801ac1e:	4b52      	ldr	r3, [pc, #328]	@ (801ad68 <tcp_close_shutdown+0x1a0>)
 801ac20:	f44f 72b2 	mov.w	r2, #356	@ 0x164
 801ac24:	4953      	ldr	r1, [pc, #332]	@ (801ad74 <tcp_close_shutdown+0x1ac>)
 801ac26:	4852      	ldr	r0, [pc, #328]	@ (801ad70 <tcp_close_shutdown+0x1a8>)
 801ac28:	f00e fed8 	bl	80299dc <iprintf>

      /* don't call tcp_abort here: we must not deallocate the pcb since
         that might not be expected when calling tcp_close */
      tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip,
 801ac2c:	687b      	ldr	r3, [r7, #4]
 801ac2e:	6d18      	ldr	r0, [r3, #80]	@ 0x50
 801ac30:	687b      	ldr	r3, [r7, #4]
 801ac32:	6a5c      	ldr	r4, [r3, #36]	@ 0x24
 801ac34:	687d      	ldr	r5, [r7, #4]
 801ac36:	687b      	ldr	r3, [r7, #4]
 801ac38:	3304      	adds	r3, #4
 801ac3a:	687a      	ldr	r2, [r7, #4]
 801ac3c:	8ad2      	ldrh	r2, [r2, #22]
 801ac3e:	6879      	ldr	r1, [r7, #4]
 801ac40:	8b09      	ldrh	r1, [r1, #24]
 801ac42:	9102      	str	r1, [sp, #8]
 801ac44:	9201      	str	r2, [sp, #4]
 801ac46:	9300      	str	r3, [sp, #0]
 801ac48:	462b      	mov	r3, r5
 801ac4a:	4622      	mov	r2, r4
 801ac4c:	4601      	mov	r1, r0
 801ac4e:	6878      	ldr	r0, [r7, #4]
 801ac50:	f005 fdfa 	bl	8020848 <tcp_rst>
              pcb->local_port, pcb->remote_port);

      tcp_pcb_purge(pcb);
 801ac54:	6878      	ldr	r0, [r7, #4]
 801ac56:	f001 fb67 	bl	801c328 <tcp_pcb_purge>
      TCP_RMV_ACTIVE(pcb);
 801ac5a:	4b47      	ldr	r3, [pc, #284]	@ (801ad78 <tcp_close_shutdown+0x1b0>)
 801ac5c:	681b      	ldr	r3, [r3, #0]
 801ac5e:	687a      	ldr	r2, [r7, #4]
 801ac60:	429a      	cmp	r2, r3
 801ac62:	d105      	bne.n	801ac70 <tcp_close_shutdown+0xa8>
 801ac64:	4b44      	ldr	r3, [pc, #272]	@ (801ad78 <tcp_close_shutdown+0x1b0>)
 801ac66:	681b      	ldr	r3, [r3, #0]
 801ac68:	68db      	ldr	r3, [r3, #12]
 801ac6a:	4a43      	ldr	r2, [pc, #268]	@ (801ad78 <tcp_close_shutdown+0x1b0>)
 801ac6c:	6013      	str	r3, [r2, #0]
 801ac6e:	e013      	b.n	801ac98 <tcp_close_shutdown+0xd0>
 801ac70:	4b41      	ldr	r3, [pc, #260]	@ (801ad78 <tcp_close_shutdown+0x1b0>)
 801ac72:	681b      	ldr	r3, [r3, #0]
 801ac74:	60fb      	str	r3, [r7, #12]
 801ac76:	e00c      	b.n	801ac92 <tcp_close_shutdown+0xca>
 801ac78:	68fb      	ldr	r3, [r7, #12]
 801ac7a:	68db      	ldr	r3, [r3, #12]
 801ac7c:	687a      	ldr	r2, [r7, #4]
 801ac7e:	429a      	cmp	r2, r3
 801ac80:	d104      	bne.n	801ac8c <tcp_close_shutdown+0xc4>
 801ac82:	687b      	ldr	r3, [r7, #4]
 801ac84:	68da      	ldr	r2, [r3, #12]
 801ac86:	68fb      	ldr	r3, [r7, #12]
 801ac88:	60da      	str	r2, [r3, #12]
 801ac8a:	e005      	b.n	801ac98 <tcp_close_shutdown+0xd0>
 801ac8c:	68fb      	ldr	r3, [r7, #12]
 801ac8e:	68db      	ldr	r3, [r3, #12]
 801ac90:	60fb      	str	r3, [r7, #12]
 801ac92:	68fb      	ldr	r3, [r7, #12]
 801ac94:	2b00      	cmp	r3, #0
 801ac96:	d1ef      	bne.n	801ac78 <tcp_close_shutdown+0xb0>
 801ac98:	687b      	ldr	r3, [r7, #4]
 801ac9a:	2200      	movs	r2, #0
 801ac9c:	60da      	str	r2, [r3, #12]
 801ac9e:	4b37      	ldr	r3, [pc, #220]	@ (801ad7c <tcp_close_shutdown+0x1b4>)
 801aca0:	2201      	movs	r2, #1
 801aca2:	701a      	strb	r2, [r3, #0]
      /* Deallocate the pcb since we already sent a RST for it */
      if (tcp_input_pcb == pcb) {
 801aca4:	4b36      	ldr	r3, [pc, #216]	@ (801ad80 <tcp_close_shutdown+0x1b8>)
 801aca6:	681b      	ldr	r3, [r3, #0]
 801aca8:	687a      	ldr	r2, [r7, #4]
 801acaa:	429a      	cmp	r2, r3
 801acac:	d102      	bne.n	801acb4 <tcp_close_shutdown+0xec>
        /* prevent using a deallocated pcb: free it from tcp_input later */
        tcp_trigger_input_pcb_close();
 801acae:	f003 ffff 	bl	801ecb0 <tcp_trigger_input_pcb_close>
 801acb2:	e002      	b.n	801acba <tcp_close_shutdown+0xf2>
      } else {
        tcp_free(pcb);
 801acb4:	6878      	ldr	r0, [r7, #4]
 801acb6:	f7ff fed5 	bl	801aa64 <tcp_free>
      }
      return ERR_OK;
 801acba:	2300      	movs	r3, #0
 801acbc:	e050      	b.n	801ad60 <tcp_close_shutdown+0x198>
    }
  }

  /* - states which free the pcb are handled here,
     - states which send FIN and change state are handled in tcp_close_shutdown_fin() */
  switch (pcb->state) {
 801acbe:	687b      	ldr	r3, [r7, #4]
 801acc0:	7d1b      	ldrb	r3, [r3, #20]
 801acc2:	2b02      	cmp	r3, #2
 801acc4:	d03b      	beq.n	801ad3e <tcp_close_shutdown+0x176>
 801acc6:	2b02      	cmp	r3, #2
 801acc8:	dc44      	bgt.n	801ad54 <tcp_close_shutdown+0x18c>
 801acca:	2b00      	cmp	r3, #0
 801accc:	d002      	beq.n	801acd4 <tcp_close_shutdown+0x10c>
 801acce:	2b01      	cmp	r3, #1
 801acd0:	d02a      	beq.n	801ad28 <tcp_close_shutdown+0x160>
 801acd2:	e03f      	b.n	801ad54 <tcp_close_shutdown+0x18c>
       * and the user needs some way to free it should the need arise.
       * Calling tcp_close() with a pcb that has already been closed, (i.e. twice)
       * or for a pcb that has been used and then entered the CLOSED state
       * is erroneous, but this should never happen as the pcb has in those cases
       * been freed, and so any remaining handles are bogus. */
      if (pcb->local_port != 0) {
 801acd4:	687b      	ldr	r3, [r7, #4]
 801acd6:	8adb      	ldrh	r3, [r3, #22]
 801acd8:	2b00      	cmp	r3, #0
 801acda:	d021      	beq.n	801ad20 <tcp_close_shutdown+0x158>
        TCP_RMV(&tcp_bound_pcbs, pcb);
 801acdc:	4b29      	ldr	r3, [pc, #164]	@ (801ad84 <tcp_close_shutdown+0x1bc>)
 801acde:	681b      	ldr	r3, [r3, #0]
 801ace0:	687a      	ldr	r2, [r7, #4]
 801ace2:	429a      	cmp	r2, r3
 801ace4:	d105      	bne.n	801acf2 <tcp_close_shutdown+0x12a>
 801ace6:	4b27      	ldr	r3, [pc, #156]	@ (801ad84 <tcp_close_shutdown+0x1bc>)
 801ace8:	681b      	ldr	r3, [r3, #0]
 801acea:	68db      	ldr	r3, [r3, #12]
 801acec:	4a25      	ldr	r2, [pc, #148]	@ (801ad84 <tcp_close_shutdown+0x1bc>)
 801acee:	6013      	str	r3, [r2, #0]
 801acf0:	e013      	b.n	801ad1a <tcp_close_shutdown+0x152>
 801acf2:	4b24      	ldr	r3, [pc, #144]	@ (801ad84 <tcp_close_shutdown+0x1bc>)
 801acf4:	681b      	ldr	r3, [r3, #0]
 801acf6:	60bb      	str	r3, [r7, #8]
 801acf8:	e00c      	b.n	801ad14 <tcp_close_shutdown+0x14c>
 801acfa:	68bb      	ldr	r3, [r7, #8]
 801acfc:	68db      	ldr	r3, [r3, #12]
 801acfe:	687a      	ldr	r2, [r7, #4]
 801ad00:	429a      	cmp	r2, r3
 801ad02:	d104      	bne.n	801ad0e <tcp_close_shutdown+0x146>
 801ad04:	687b      	ldr	r3, [r7, #4]
 801ad06:	68da      	ldr	r2, [r3, #12]
 801ad08:	68bb      	ldr	r3, [r7, #8]
 801ad0a:	60da      	str	r2, [r3, #12]
 801ad0c:	e005      	b.n	801ad1a <tcp_close_shutdown+0x152>
 801ad0e:	68bb      	ldr	r3, [r7, #8]
 801ad10:	68db      	ldr	r3, [r3, #12]
 801ad12:	60bb      	str	r3, [r7, #8]
 801ad14:	68bb      	ldr	r3, [r7, #8]
 801ad16:	2b00      	cmp	r3, #0
 801ad18:	d1ef      	bne.n	801acfa <tcp_close_shutdown+0x132>
 801ad1a:	687b      	ldr	r3, [r7, #4]
 801ad1c:	2200      	movs	r2, #0
 801ad1e:	60da      	str	r2, [r3, #12]
      }
      tcp_free(pcb);
 801ad20:	6878      	ldr	r0, [r7, #4]
 801ad22:	f7ff fe9f 	bl	801aa64 <tcp_free>
      break;
 801ad26:	e01a      	b.n	801ad5e <tcp_close_shutdown+0x196>
    case LISTEN:
      tcp_listen_closed(pcb);
 801ad28:	6878      	ldr	r0, [r7, #4]
 801ad2a:	f7ff ff13 	bl	801ab54 <tcp_listen_closed>
      tcp_pcb_remove(&tcp_listen_pcbs.pcbs, pcb);
 801ad2e:	6879      	ldr	r1, [r7, #4]
 801ad30:	4815      	ldr	r0, [pc, #84]	@ (801ad88 <tcp_close_shutdown+0x1c0>)
 801ad32:	f001 fb49 	bl	801c3c8 <tcp_pcb_remove>
      tcp_free_listen(pcb);
 801ad36:	6878      	ldr	r0, [r7, #4]
 801ad38:	f7ff feb0 	bl	801aa9c <tcp_free_listen>
      break;
 801ad3c:	e00f      	b.n	801ad5e <tcp_close_shutdown+0x196>
    case SYN_SENT:
      TCP_PCB_REMOVE_ACTIVE(pcb);
 801ad3e:	6879      	ldr	r1, [r7, #4]
 801ad40:	480d      	ldr	r0, [pc, #52]	@ (801ad78 <tcp_close_shutdown+0x1b0>)
 801ad42:	f001 fb41 	bl	801c3c8 <tcp_pcb_remove>
 801ad46:	4b0d      	ldr	r3, [pc, #52]	@ (801ad7c <tcp_close_shutdown+0x1b4>)
 801ad48:	2201      	movs	r2, #1
 801ad4a:	701a      	strb	r2, [r3, #0]
      tcp_free(pcb);
 801ad4c:	6878      	ldr	r0, [r7, #4]
 801ad4e:	f7ff fe89 	bl	801aa64 <tcp_free>
      MIB2_STATS_INC(mib2.tcpattemptfails);
      break;
 801ad52:	e004      	b.n	801ad5e <tcp_close_shutdown+0x196>
    default:
      return tcp_close_shutdown_fin(pcb);
 801ad54:	6878      	ldr	r0, [r7, #4]
 801ad56:	f000 f819 	bl	801ad8c <tcp_close_shutdown_fin>
 801ad5a:	4603      	mov	r3, r0
 801ad5c:	e000      	b.n	801ad60 <tcp_close_shutdown+0x198>
  }
  return ERR_OK;
 801ad5e:	2300      	movs	r3, #0
}
 801ad60:	4618      	mov	r0, r3
 801ad62:	3710      	adds	r7, #16
 801ad64:	46bd      	mov	sp, r7
 801ad66:	bdb0      	pop	{r4, r5, r7, pc}
 801ad68:	0802e5f0 	.word	0x0802e5f0
 801ad6c:	0802e6c4 	.word	0x0802e6c4
 801ad70:	0802e634 	.word	0x0802e634
 801ad74:	0802e6e4 	.word	0x0802e6e4
 801ad78:	2402ae94 	.word	0x2402ae94
 801ad7c:	2402ae9c 	.word	0x2402ae9c
 801ad80:	2402aed8 	.word	0x2402aed8
 801ad84:	2402ae8c 	.word	0x2402ae8c
 801ad88:	2402ae90 	.word	0x2402ae90

0801ad8c <tcp_close_shutdown_fin>:

static err_t
tcp_close_shutdown_fin(struct tcp_pcb *pcb)
{
 801ad8c:	b580      	push	{r7, lr}
 801ad8e:	b084      	sub	sp, #16
 801ad90:	af00      	add	r7, sp, #0
 801ad92:	6078      	str	r0, [r7, #4]
  err_t err;
  LWIP_ASSERT("pcb != NULL", pcb != NULL);
 801ad94:	687b      	ldr	r3, [r7, #4]
 801ad96:	2b00      	cmp	r3, #0
 801ad98:	d106      	bne.n	801ada8 <tcp_close_shutdown_fin+0x1c>
 801ad9a:	4b2e      	ldr	r3, [pc, #184]	@ (801ae54 <tcp_close_shutdown_fin+0xc8>)
 801ad9c:	f44f 72ce 	mov.w	r2, #412	@ 0x19c
 801ada0:	492d      	ldr	r1, [pc, #180]	@ (801ae58 <tcp_close_shutdown_fin+0xcc>)
 801ada2:	482e      	ldr	r0, [pc, #184]	@ (801ae5c <tcp_close_shutdown_fin+0xd0>)
 801ada4:	f00e fe1a 	bl	80299dc <iprintf>

  switch (pcb->state) {
 801ada8:	687b      	ldr	r3, [r7, #4]
 801adaa:	7d1b      	ldrb	r3, [r3, #20]
 801adac:	2b07      	cmp	r3, #7
 801adae:	d020      	beq.n	801adf2 <tcp_close_shutdown_fin+0x66>
 801adb0:	2b07      	cmp	r3, #7
 801adb2:	dc2b      	bgt.n	801ae0c <tcp_close_shutdown_fin+0x80>
 801adb4:	2b03      	cmp	r3, #3
 801adb6:	d002      	beq.n	801adbe <tcp_close_shutdown_fin+0x32>
 801adb8:	2b04      	cmp	r3, #4
 801adba:	d00d      	beq.n	801add8 <tcp_close_shutdown_fin+0x4c>
 801adbc:	e026      	b.n	801ae0c <tcp_close_shutdown_fin+0x80>
    case SYN_RCVD:
      err = tcp_send_fin(pcb);
 801adbe:	6878      	ldr	r0, [r7, #4]
 801adc0:	f004 fe42 	bl	801fa48 <tcp_send_fin>
 801adc4:	4603      	mov	r3, r0
 801adc6:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801adc8:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801adcc:	2b00      	cmp	r3, #0
 801adce:	d11f      	bne.n	801ae10 <tcp_close_shutdown_fin+0x84>
        tcp_backlog_accepted(pcb);
        MIB2_STATS_INC(mib2.tcpattemptfails);
        pcb->state = FIN_WAIT_1;
 801add0:	687b      	ldr	r3, [r7, #4]
 801add2:	2205      	movs	r2, #5
 801add4:	751a      	strb	r2, [r3, #20]
      }
      break;
 801add6:	e01b      	b.n	801ae10 <tcp_close_shutdown_fin+0x84>
    case ESTABLISHED:
      err = tcp_send_fin(pcb);
 801add8:	6878      	ldr	r0, [r7, #4]
 801adda:	f004 fe35 	bl	801fa48 <tcp_send_fin>
 801adde:	4603      	mov	r3, r0
 801ade0:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801ade2:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801ade6:	2b00      	cmp	r3, #0
 801ade8:	d114      	bne.n	801ae14 <tcp_close_shutdown_fin+0x88>
        MIB2_STATS_INC(mib2.tcpestabresets);
        pcb->state = FIN_WAIT_1;
 801adea:	687b      	ldr	r3, [r7, #4]
 801adec:	2205      	movs	r2, #5
 801adee:	751a      	strb	r2, [r3, #20]
      }
      break;
 801adf0:	e010      	b.n	801ae14 <tcp_close_shutdown_fin+0x88>
    case CLOSE_WAIT:
      err = tcp_send_fin(pcb);
 801adf2:	6878      	ldr	r0, [r7, #4]
 801adf4:	f004 fe28 	bl	801fa48 <tcp_send_fin>
 801adf8:	4603      	mov	r3, r0
 801adfa:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801adfc:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801ae00:	2b00      	cmp	r3, #0
 801ae02:	d109      	bne.n	801ae18 <tcp_close_shutdown_fin+0x8c>
        MIB2_STATS_INC(mib2.tcpestabresets);
        pcb->state = LAST_ACK;
 801ae04:	687b      	ldr	r3, [r7, #4]
 801ae06:	2209      	movs	r2, #9
 801ae08:	751a      	strb	r2, [r3, #20]
      }
      break;
 801ae0a:	e005      	b.n	801ae18 <tcp_close_shutdown_fin+0x8c>
    default:
      /* Has already been closed, do nothing. */
      return ERR_OK;
 801ae0c:	2300      	movs	r3, #0
 801ae0e:	e01c      	b.n	801ae4a <tcp_close_shutdown_fin+0xbe>
      break;
 801ae10:	bf00      	nop
 801ae12:	e002      	b.n	801ae1a <tcp_close_shutdown_fin+0x8e>
      break;
 801ae14:	bf00      	nop
 801ae16:	e000      	b.n	801ae1a <tcp_close_shutdown_fin+0x8e>
      break;
 801ae18:	bf00      	nop
  }

  if (err == ERR_OK) {
 801ae1a:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801ae1e:	2b00      	cmp	r3, #0
 801ae20:	d103      	bne.n	801ae2a <tcp_close_shutdown_fin+0x9e>
    /* To ensure all data has been sent when tcp_close returns, we have
       to make sure tcp_output doesn't fail.
       Since we don't really have to ensure all data has been sent when tcp_close
       returns (unsent data is sent from tcp timer functions, also), we don't care
       for the return value of tcp_output for now. */
    tcp_output(pcb);
 801ae22:	6878      	ldr	r0, [r7, #4]
 801ae24:	f004 ff4e 	bl	801fcc4 <tcp_output>
 801ae28:	e00d      	b.n	801ae46 <tcp_close_shutdown_fin+0xba>
  } else if (err == ERR_MEM) {
 801ae2a:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801ae2e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801ae32:	d108      	bne.n	801ae46 <tcp_close_shutdown_fin+0xba>
    /* Mark this pcb for closing. Closing is retried from tcp_tmr. */
    tcp_set_flags(pcb, TF_CLOSEPEND);
 801ae34:	687b      	ldr	r3, [r7, #4]
 801ae36:	8b5b      	ldrh	r3, [r3, #26]
 801ae38:	f043 0308 	orr.w	r3, r3, #8
 801ae3c:	b29a      	uxth	r2, r3
 801ae3e:	687b      	ldr	r3, [r7, #4]
 801ae40:	835a      	strh	r2, [r3, #26]
    /* We have to return ERR_OK from here to indicate to the callers that this
       pcb should not be used any more as it will be freed soon via tcp_tmr.
       This is OK here since sending FIN does not guarantee a time frime for
       actually freeing the pcb, either (it is left in closure states for
       remote ACK or timeout) */
    return ERR_OK;
 801ae42:	2300      	movs	r3, #0
 801ae44:	e001      	b.n	801ae4a <tcp_close_shutdown_fin+0xbe>
  }
  return err;
 801ae46:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 801ae4a:	4618      	mov	r0, r3
 801ae4c:	3710      	adds	r7, #16
 801ae4e:	46bd      	mov	sp, r7
 801ae50:	bd80      	pop	{r7, pc}
 801ae52:	bf00      	nop
 801ae54:	0802e5f0 	.word	0x0802e5f0
 801ae58:	0802e6a0 	.word	0x0802e6a0
 801ae5c:	0802e634 	.word	0x0802e634

0801ae60 <tcp_close>:
 * @return ERR_OK if connection has been closed
 *         another err_t if closing failed and pcb is not freed
 */
err_t
tcp_close(struct tcp_pcb *pcb)
{
 801ae60:	b580      	push	{r7, lr}
 801ae62:	b082      	sub	sp, #8
 801ae64:	af00      	add	r7, sp, #0
 801ae66:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801ae68:	f7f5 fb6c 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("tcp_close: invalid pcb", pcb != NULL, return ERR_ARG);
 801ae6c:	687b      	ldr	r3, [r7, #4]
 801ae6e:	2b00      	cmp	r3, #0
 801ae70:	d109      	bne.n	801ae86 <tcp_close+0x26>
 801ae72:	4b0f      	ldr	r3, [pc, #60]	@ (801aeb0 <tcp_close+0x50>)
 801ae74:	f44f 72f4 	mov.w	r2, #488	@ 0x1e8
 801ae78:	490e      	ldr	r1, [pc, #56]	@ (801aeb4 <tcp_close+0x54>)
 801ae7a:	480f      	ldr	r0, [pc, #60]	@ (801aeb8 <tcp_close+0x58>)
 801ae7c:	f00e fdae 	bl	80299dc <iprintf>
 801ae80:	f06f 030f 	mvn.w	r3, #15
 801ae84:	e00f      	b.n	801aea6 <tcp_close+0x46>
  LWIP_DEBUGF(TCP_DEBUG, ("tcp_close: closing in "));

  tcp_debug_print_state(pcb->state);

  if (pcb->state != LISTEN) {
 801ae86:	687b      	ldr	r3, [r7, #4]
 801ae88:	7d1b      	ldrb	r3, [r3, #20]
 801ae8a:	2b01      	cmp	r3, #1
 801ae8c:	d006      	beq.n	801ae9c <tcp_close+0x3c>
    /* Set a flag not to receive any more data... */
    tcp_set_flags(pcb, TF_RXCLOSED);
 801ae8e:	687b      	ldr	r3, [r7, #4]
 801ae90:	8b5b      	ldrh	r3, [r3, #26]
 801ae92:	f043 0310 	orr.w	r3, r3, #16
 801ae96:	b29a      	uxth	r2, r3
 801ae98:	687b      	ldr	r3, [r7, #4]
 801ae9a:	835a      	strh	r2, [r3, #26]
  }
  /* ... and close */
  return tcp_close_shutdown(pcb, 1);
 801ae9c:	2101      	movs	r1, #1
 801ae9e:	6878      	ldr	r0, [r7, #4]
 801aea0:	f7ff fe92 	bl	801abc8 <tcp_close_shutdown>
 801aea4:	4603      	mov	r3, r0
}
 801aea6:	4618      	mov	r0, r3
 801aea8:	3708      	adds	r7, #8
 801aeaa:	46bd      	mov	sp, r7
 801aeac:	bd80      	pop	{r7, pc}
 801aeae:	bf00      	nop
 801aeb0:	0802e5f0 	.word	0x0802e5f0
 801aeb4:	0802e700 	.word	0x0802e700
 801aeb8:	0802e634 	.word	0x0802e634

0801aebc <tcp_shutdown>:
 * @return ERR_OK if shutdown succeeded (or the PCB has already been shut down)
 *         another err_t on error.
 */
err_t
tcp_shutdown(struct tcp_pcb *pcb, int shut_rx, int shut_tx)
{
 801aebc:	b580      	push	{r7, lr}
 801aebe:	b084      	sub	sp, #16
 801aec0:	af00      	add	r7, sp, #0
 801aec2:	60f8      	str	r0, [r7, #12]
 801aec4:	60b9      	str	r1, [r7, #8]
 801aec6:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801aec8:	f7f5 fb3c 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("tcp_shutdown: invalid pcb", pcb != NULL, return ERR_ARG);
 801aecc:	68fb      	ldr	r3, [r7, #12]
 801aece:	2b00      	cmp	r3, #0
 801aed0:	d109      	bne.n	801aee6 <tcp_shutdown+0x2a>
 801aed2:	4b26      	ldr	r3, [pc, #152]	@ (801af6c <tcp_shutdown+0xb0>)
 801aed4:	f240 2207 	movw	r2, #519	@ 0x207
 801aed8:	4925      	ldr	r1, [pc, #148]	@ (801af70 <tcp_shutdown+0xb4>)
 801aeda:	4826      	ldr	r0, [pc, #152]	@ (801af74 <tcp_shutdown+0xb8>)
 801aedc:	f00e fd7e 	bl	80299dc <iprintf>
 801aee0:	f06f 030f 	mvn.w	r3, #15
 801aee4:	e03d      	b.n	801af62 <tcp_shutdown+0xa6>

  if (pcb->state == LISTEN) {
 801aee6:	68fb      	ldr	r3, [r7, #12]
 801aee8:	7d1b      	ldrb	r3, [r3, #20]
 801aeea:	2b01      	cmp	r3, #1
 801aeec:	d102      	bne.n	801aef4 <tcp_shutdown+0x38>
    return ERR_CONN;
 801aeee:	f06f 030a 	mvn.w	r3, #10
 801aef2:	e036      	b.n	801af62 <tcp_shutdown+0xa6>
  }
  if (shut_rx) {
 801aef4:	68bb      	ldr	r3, [r7, #8]
 801aef6:	2b00      	cmp	r3, #0
 801aef8:	d01b      	beq.n	801af32 <tcp_shutdown+0x76>
    /* shut down the receive side: set a flag not to receive any more data... */
    tcp_set_flags(pcb, TF_RXCLOSED);
 801aefa:	68fb      	ldr	r3, [r7, #12]
 801aefc:	8b5b      	ldrh	r3, [r3, #26]
 801aefe:	f043 0310 	orr.w	r3, r3, #16
 801af02:	b29a      	uxth	r2, r3
 801af04:	68fb      	ldr	r3, [r7, #12]
 801af06:	835a      	strh	r2, [r3, #26]
    if (shut_tx) {
 801af08:	687b      	ldr	r3, [r7, #4]
 801af0a:	2b00      	cmp	r3, #0
 801af0c:	d005      	beq.n	801af1a <tcp_shutdown+0x5e>
      /* shutting down the tx AND rx side is the same as closing for the raw API */
      return tcp_close_shutdown(pcb, 1);
 801af0e:	2101      	movs	r1, #1
 801af10:	68f8      	ldr	r0, [r7, #12]
 801af12:	f7ff fe59 	bl	801abc8 <tcp_close_shutdown>
 801af16:	4603      	mov	r3, r0
 801af18:	e023      	b.n	801af62 <tcp_shutdown+0xa6>
    }
    /* ... and free buffered data */
    if (pcb->refused_data != NULL) {
 801af1a:	68fb      	ldr	r3, [r7, #12]
 801af1c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801af1e:	2b00      	cmp	r3, #0
 801af20:	d007      	beq.n	801af32 <tcp_shutdown+0x76>
      pbuf_free(pcb->refused_data);
 801af22:	68fb      	ldr	r3, [r7, #12]
 801af24:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801af26:	4618      	mov	r0, r3
 801af28:	f7ff fae0 	bl	801a4ec <pbuf_free>
      pcb->refused_data = NULL;
 801af2c:	68fb      	ldr	r3, [r7, #12]
 801af2e:	2200      	movs	r2, #0
 801af30:	679a      	str	r2, [r3, #120]	@ 0x78
    }
  }
  if (shut_tx) {
 801af32:	687b      	ldr	r3, [r7, #4]
 801af34:	2b00      	cmp	r3, #0
 801af36:	d013      	beq.n	801af60 <tcp_shutdown+0xa4>
    /* This can't happen twice since if it succeeds, the pcb's state is changed.
       Only close in these states as the others directly deallocate the PCB */
    switch (pcb->state) {
 801af38:	68fb      	ldr	r3, [r7, #12]
 801af3a:	7d1b      	ldrb	r3, [r3, #20]
 801af3c:	2b04      	cmp	r3, #4
 801af3e:	dc02      	bgt.n	801af46 <tcp_shutdown+0x8a>
 801af40:	2b03      	cmp	r3, #3
 801af42:	da02      	bge.n	801af4a <tcp_shutdown+0x8e>
 801af44:	e009      	b.n	801af5a <tcp_shutdown+0x9e>
 801af46:	2b07      	cmp	r3, #7
 801af48:	d107      	bne.n	801af5a <tcp_shutdown+0x9e>
      case SYN_RCVD:
      case ESTABLISHED:
      case CLOSE_WAIT:
        return tcp_close_shutdown(pcb, (u8_t)shut_rx);
 801af4a:	68bb      	ldr	r3, [r7, #8]
 801af4c:	b2db      	uxtb	r3, r3
 801af4e:	4619      	mov	r1, r3
 801af50:	68f8      	ldr	r0, [r7, #12]
 801af52:	f7ff fe39 	bl	801abc8 <tcp_close_shutdown>
 801af56:	4603      	mov	r3, r0
 801af58:	e003      	b.n	801af62 <tcp_shutdown+0xa6>
      default:
        /* Not (yet?) connected, cannot shutdown the TX side as that would bring us
          into CLOSED state, where the PCB is deallocated. */
        return ERR_CONN;
 801af5a:	f06f 030a 	mvn.w	r3, #10
 801af5e:	e000      	b.n	801af62 <tcp_shutdown+0xa6>
    }
  }
  return ERR_OK;
 801af60:	2300      	movs	r3, #0
}
 801af62:	4618      	mov	r0, r3
 801af64:	3710      	adds	r7, #16
 801af66:	46bd      	mov	sp, r7
 801af68:	bd80      	pop	{r7, pc}
 801af6a:	bf00      	nop
 801af6c:	0802e5f0 	.word	0x0802e5f0
 801af70:	0802e718 	.word	0x0802e718
 801af74:	0802e634 	.word	0x0802e634

0801af78 <tcp_abandon>:
 * @param pcb the tcp_pcb to abort
 * @param reset boolean to indicate whether a reset should be sent
 */
void
tcp_abandon(struct tcp_pcb *pcb, int reset)
{
 801af78:	b580      	push	{r7, lr}
 801af7a:	b08e      	sub	sp, #56	@ 0x38
 801af7c:	af04      	add	r7, sp, #16
 801af7e:	6078      	str	r0, [r7, #4]
 801af80:	6039      	str	r1, [r7, #0]
#if LWIP_CALLBACK_API
  tcp_err_fn errf;
#endif /* LWIP_CALLBACK_API */
  void *errf_arg;

  LWIP_ASSERT_CORE_LOCKED();
 801af82:	f7f5 fadf 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("tcp_abandon: invalid pcb", pcb != NULL, return);
 801af86:	687b      	ldr	r3, [r7, #4]
 801af88:	2b00      	cmp	r3, #0
 801af8a:	d107      	bne.n	801af9c <tcp_abandon+0x24>
 801af8c:	4b52      	ldr	r3, [pc, #328]	@ (801b0d8 <tcp_abandon+0x160>)
 801af8e:	f240 223d 	movw	r2, #573	@ 0x23d
 801af92:	4952      	ldr	r1, [pc, #328]	@ (801b0dc <tcp_abandon+0x164>)
 801af94:	4852      	ldr	r0, [pc, #328]	@ (801b0e0 <tcp_abandon+0x168>)
 801af96:	f00e fd21 	bl	80299dc <iprintf>
 801af9a:	e099      	b.n	801b0d0 <tcp_abandon+0x158>

  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_abort/tcp_abandon for listen-pcbs",
 801af9c:	687b      	ldr	r3, [r7, #4]
 801af9e:	7d1b      	ldrb	r3, [r3, #20]
 801afa0:	2b01      	cmp	r3, #1
 801afa2:	d106      	bne.n	801afb2 <tcp_abandon+0x3a>
 801afa4:	4b4c      	ldr	r3, [pc, #304]	@ (801b0d8 <tcp_abandon+0x160>)
 801afa6:	f44f 7210 	mov.w	r2, #576	@ 0x240
 801afaa:	494e      	ldr	r1, [pc, #312]	@ (801b0e4 <tcp_abandon+0x16c>)
 801afac:	484c      	ldr	r0, [pc, #304]	@ (801b0e0 <tcp_abandon+0x168>)
 801afae:	f00e fd15 	bl	80299dc <iprintf>
              pcb->state != LISTEN);
  /* Figure out on which TCP PCB list we are, and remove us. If we
     are in an active state, call the receive function associated with
     the PCB with a NULL argument, and send an RST to the remote end. */
  if (pcb->state == TIME_WAIT) {
 801afb2:	687b      	ldr	r3, [r7, #4]
 801afb4:	7d1b      	ldrb	r3, [r3, #20]
 801afb6:	2b0a      	cmp	r3, #10
 801afb8:	d107      	bne.n	801afca <tcp_abandon+0x52>
    tcp_pcb_remove(&tcp_tw_pcbs, pcb);
 801afba:	6879      	ldr	r1, [r7, #4]
 801afbc:	484a      	ldr	r0, [pc, #296]	@ (801b0e8 <tcp_abandon+0x170>)
 801afbe:	f001 fa03 	bl	801c3c8 <tcp_pcb_remove>
    tcp_free(pcb);
 801afc2:	6878      	ldr	r0, [r7, #4]
 801afc4:	f7ff fd4e 	bl	801aa64 <tcp_free>
 801afc8:	e082      	b.n	801b0d0 <tcp_abandon+0x158>
  } else {
    int send_rst = 0;
 801afca:	2300      	movs	r3, #0
 801afcc:	627b      	str	r3, [r7, #36]	@ 0x24
    u16_t local_port = 0;
 801afce:	2300      	movs	r3, #0
 801afd0:	847b      	strh	r3, [r7, #34]	@ 0x22
    enum tcp_state last_state;
    seqno = pcb->snd_nxt;
 801afd2:	687b      	ldr	r3, [r7, #4]
 801afd4:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801afd6:	61bb      	str	r3, [r7, #24]
    ackno = pcb->rcv_nxt;
 801afd8:	687b      	ldr	r3, [r7, #4]
 801afda:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801afdc:	617b      	str	r3, [r7, #20]
#if LWIP_CALLBACK_API
    errf = pcb->errf;
 801afde:	687b      	ldr	r3, [r7, #4]
 801afe0:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801afe4:	613b      	str	r3, [r7, #16]
#endif /* LWIP_CALLBACK_API */
    errf_arg = pcb->callback_arg;
 801afe6:	687b      	ldr	r3, [r7, #4]
 801afe8:	691b      	ldr	r3, [r3, #16]
 801afea:	60fb      	str	r3, [r7, #12]
    if (pcb->state == CLOSED) {
 801afec:	687b      	ldr	r3, [r7, #4]
 801afee:	7d1b      	ldrb	r3, [r3, #20]
 801aff0:	2b00      	cmp	r3, #0
 801aff2:	d126      	bne.n	801b042 <tcp_abandon+0xca>
      if (pcb->local_port != 0) {
 801aff4:	687b      	ldr	r3, [r7, #4]
 801aff6:	8adb      	ldrh	r3, [r3, #22]
 801aff8:	2b00      	cmp	r3, #0
 801affa:	d02e      	beq.n	801b05a <tcp_abandon+0xe2>
        /* bound, not yet opened */
        TCP_RMV(&tcp_bound_pcbs, pcb);
 801affc:	4b3b      	ldr	r3, [pc, #236]	@ (801b0ec <tcp_abandon+0x174>)
 801affe:	681b      	ldr	r3, [r3, #0]
 801b000:	687a      	ldr	r2, [r7, #4]
 801b002:	429a      	cmp	r2, r3
 801b004:	d105      	bne.n	801b012 <tcp_abandon+0x9a>
 801b006:	4b39      	ldr	r3, [pc, #228]	@ (801b0ec <tcp_abandon+0x174>)
 801b008:	681b      	ldr	r3, [r3, #0]
 801b00a:	68db      	ldr	r3, [r3, #12]
 801b00c:	4a37      	ldr	r2, [pc, #220]	@ (801b0ec <tcp_abandon+0x174>)
 801b00e:	6013      	str	r3, [r2, #0]
 801b010:	e013      	b.n	801b03a <tcp_abandon+0xc2>
 801b012:	4b36      	ldr	r3, [pc, #216]	@ (801b0ec <tcp_abandon+0x174>)
 801b014:	681b      	ldr	r3, [r3, #0]
 801b016:	61fb      	str	r3, [r7, #28]
 801b018:	e00c      	b.n	801b034 <tcp_abandon+0xbc>
 801b01a:	69fb      	ldr	r3, [r7, #28]
 801b01c:	68db      	ldr	r3, [r3, #12]
 801b01e:	687a      	ldr	r2, [r7, #4]
 801b020:	429a      	cmp	r2, r3
 801b022:	d104      	bne.n	801b02e <tcp_abandon+0xb6>
 801b024:	687b      	ldr	r3, [r7, #4]
 801b026:	68da      	ldr	r2, [r3, #12]
 801b028:	69fb      	ldr	r3, [r7, #28]
 801b02a:	60da      	str	r2, [r3, #12]
 801b02c:	e005      	b.n	801b03a <tcp_abandon+0xc2>
 801b02e:	69fb      	ldr	r3, [r7, #28]
 801b030:	68db      	ldr	r3, [r3, #12]
 801b032:	61fb      	str	r3, [r7, #28]
 801b034:	69fb      	ldr	r3, [r7, #28]
 801b036:	2b00      	cmp	r3, #0
 801b038:	d1ef      	bne.n	801b01a <tcp_abandon+0xa2>
 801b03a:	687b      	ldr	r3, [r7, #4]
 801b03c:	2200      	movs	r2, #0
 801b03e:	60da      	str	r2, [r3, #12]
 801b040:	e00b      	b.n	801b05a <tcp_abandon+0xe2>
      }
    } else {
      send_rst = reset;
 801b042:	683b      	ldr	r3, [r7, #0]
 801b044:	627b      	str	r3, [r7, #36]	@ 0x24
      local_port = pcb->local_port;
 801b046:	687b      	ldr	r3, [r7, #4]
 801b048:	8adb      	ldrh	r3, [r3, #22]
 801b04a:	847b      	strh	r3, [r7, #34]	@ 0x22
      TCP_PCB_REMOVE_ACTIVE(pcb);
 801b04c:	6879      	ldr	r1, [r7, #4]
 801b04e:	4828      	ldr	r0, [pc, #160]	@ (801b0f0 <tcp_abandon+0x178>)
 801b050:	f001 f9ba 	bl	801c3c8 <tcp_pcb_remove>
 801b054:	4b27      	ldr	r3, [pc, #156]	@ (801b0f4 <tcp_abandon+0x17c>)
 801b056:	2201      	movs	r2, #1
 801b058:	701a      	strb	r2, [r3, #0]
    }
    if (pcb->unacked != NULL) {
 801b05a:	687b      	ldr	r3, [r7, #4]
 801b05c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801b05e:	2b00      	cmp	r3, #0
 801b060:	d004      	beq.n	801b06c <tcp_abandon+0xf4>
      tcp_segs_free(pcb->unacked);
 801b062:	687b      	ldr	r3, [r7, #4]
 801b064:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801b066:	4618      	mov	r0, r3
 801b068:	f000 fe84 	bl	801bd74 <tcp_segs_free>
    }
    if (pcb->unsent != NULL) {
 801b06c:	687b      	ldr	r3, [r7, #4]
 801b06e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801b070:	2b00      	cmp	r3, #0
 801b072:	d004      	beq.n	801b07e <tcp_abandon+0x106>
      tcp_segs_free(pcb->unsent);
 801b074:	687b      	ldr	r3, [r7, #4]
 801b076:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801b078:	4618      	mov	r0, r3
 801b07a:	f000 fe7b 	bl	801bd74 <tcp_segs_free>
    }
#if TCP_QUEUE_OOSEQ
    if (pcb->ooseq != NULL) {
 801b07e:	687b      	ldr	r3, [r7, #4]
 801b080:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801b082:	2b00      	cmp	r3, #0
 801b084:	d004      	beq.n	801b090 <tcp_abandon+0x118>
      tcp_segs_free(pcb->ooseq);
 801b086:	687b      	ldr	r3, [r7, #4]
 801b088:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801b08a:	4618      	mov	r0, r3
 801b08c:	f000 fe72 	bl	801bd74 <tcp_segs_free>
    }
#endif /* TCP_QUEUE_OOSEQ */
    tcp_backlog_accepted(pcb);
    if (send_rst) {
 801b090:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801b092:	2b00      	cmp	r3, #0
 801b094:	d00e      	beq.n	801b0b4 <tcp_abandon+0x13c>
      LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_abandon: sending RST\n"));
      tcp_rst(pcb, seqno, ackno, &pcb->local_ip, &pcb->remote_ip, local_port, pcb->remote_port);
 801b096:	6879      	ldr	r1, [r7, #4]
 801b098:	687b      	ldr	r3, [r7, #4]
 801b09a:	3304      	adds	r3, #4
 801b09c:	687a      	ldr	r2, [r7, #4]
 801b09e:	8b12      	ldrh	r2, [r2, #24]
 801b0a0:	9202      	str	r2, [sp, #8]
 801b0a2:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801b0a4:	9201      	str	r2, [sp, #4]
 801b0a6:	9300      	str	r3, [sp, #0]
 801b0a8:	460b      	mov	r3, r1
 801b0aa:	697a      	ldr	r2, [r7, #20]
 801b0ac:	69b9      	ldr	r1, [r7, #24]
 801b0ae:	6878      	ldr	r0, [r7, #4]
 801b0b0:	f005 fbca 	bl	8020848 <tcp_rst>
    }
    last_state = pcb->state;
 801b0b4:	687b      	ldr	r3, [r7, #4]
 801b0b6:	7d1b      	ldrb	r3, [r3, #20]
 801b0b8:	72fb      	strb	r3, [r7, #11]
    tcp_free(pcb);
 801b0ba:	6878      	ldr	r0, [r7, #4]
 801b0bc:	f7ff fcd2 	bl	801aa64 <tcp_free>
    TCP_EVENT_ERR(last_state, errf, errf_arg, ERR_ABRT);
 801b0c0:	693b      	ldr	r3, [r7, #16]
 801b0c2:	2b00      	cmp	r3, #0
 801b0c4:	d004      	beq.n	801b0d0 <tcp_abandon+0x158>
 801b0c6:	693b      	ldr	r3, [r7, #16]
 801b0c8:	f06f 010c 	mvn.w	r1, #12
 801b0cc:	68f8      	ldr	r0, [r7, #12]
 801b0ce:	4798      	blx	r3
  }
}
 801b0d0:	3728      	adds	r7, #40	@ 0x28
 801b0d2:	46bd      	mov	sp, r7
 801b0d4:	bd80      	pop	{r7, pc}
 801b0d6:	bf00      	nop
 801b0d8:	0802e5f0 	.word	0x0802e5f0
 801b0dc:	0802e734 	.word	0x0802e734
 801b0e0:	0802e634 	.word	0x0802e634
 801b0e4:	0802e750 	.word	0x0802e750
 801b0e8:	2402ae98 	.word	0x2402ae98
 801b0ec:	2402ae8c 	.word	0x2402ae8c
 801b0f0:	2402ae94 	.word	0x2402ae94
 801b0f4:	2402ae9c 	.word	0x2402ae9c

0801b0f8 <tcp_abort>:
 *
 * @param pcb the tcp pcb to abort
 */
void
tcp_abort(struct tcp_pcb *pcb)
{
 801b0f8:	b580      	push	{r7, lr}
 801b0fa:	b082      	sub	sp, #8
 801b0fc:	af00      	add	r7, sp, #0
 801b0fe:	6078      	str	r0, [r7, #4]
  tcp_abandon(pcb, 1);
 801b100:	2101      	movs	r1, #1
 801b102:	6878      	ldr	r0, [r7, #4]
 801b104:	f7ff ff38 	bl	801af78 <tcp_abandon>
}
 801b108:	bf00      	nop
 801b10a:	3708      	adds	r7, #8
 801b10c:	46bd      	mov	sp, r7
 801b10e:	bd80      	pop	{r7, pc}

0801b110 <tcp_update_rcv_ann_wnd>:
 * Returns how much extra window would be advertised if we sent an
 * update now.
 */
u32_t
tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb)
{
 801b110:	b580      	push	{r7, lr}
 801b112:	b084      	sub	sp, #16
 801b114:	af00      	add	r7, sp, #0
 801b116:	6078      	str	r0, [r7, #4]
  u32_t new_right_edge;

  LWIP_ASSERT("tcp_update_rcv_ann_wnd: invalid pcb", pcb != NULL);
 801b118:	687b      	ldr	r3, [r7, #4]
 801b11a:	2b00      	cmp	r3, #0
 801b11c:	d106      	bne.n	801b12c <tcp_update_rcv_ann_wnd+0x1c>
 801b11e:	4b25      	ldr	r3, [pc, #148]	@ (801b1b4 <tcp_update_rcv_ann_wnd+0xa4>)
 801b120:	f240 32a6 	movw	r2, #934	@ 0x3a6
 801b124:	4924      	ldr	r1, [pc, #144]	@ (801b1b8 <tcp_update_rcv_ann_wnd+0xa8>)
 801b126:	4825      	ldr	r0, [pc, #148]	@ (801b1bc <tcp_update_rcv_ann_wnd+0xac>)
 801b128:	f00e fc58 	bl	80299dc <iprintf>
  new_right_edge = pcb->rcv_nxt + pcb->rcv_wnd;
 801b12c:	687b      	ldr	r3, [r7, #4]
 801b12e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801b130:	687a      	ldr	r2, [r7, #4]
 801b132:	8d12      	ldrh	r2, [r2, #40]	@ 0x28
 801b134:	4413      	add	r3, r2
 801b136:	60fb      	str	r3, [r7, #12]

  if (TCP_SEQ_GEQ(new_right_edge, pcb->rcv_ann_right_edge + LWIP_MIN((TCP_WND / 2), pcb->mss))) {
 801b138:	687b      	ldr	r3, [r7, #4]
 801b13a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801b13c:	687a      	ldr	r2, [r7, #4]
 801b13e:	8e52      	ldrh	r2, [r2, #50]	@ 0x32
 801b140:	f640 3168 	movw	r1, #2920	@ 0xb68
 801b144:	428a      	cmp	r2, r1
 801b146:	bf28      	it	cs
 801b148:	460a      	movcs	r2, r1
 801b14a:	b292      	uxth	r2, r2
 801b14c:	4413      	add	r3, r2
 801b14e:	68fa      	ldr	r2, [r7, #12]
 801b150:	1ad3      	subs	r3, r2, r3
 801b152:	2b00      	cmp	r3, #0
 801b154:	db08      	blt.n	801b168 <tcp_update_rcv_ann_wnd+0x58>
    /* we can advertise more window */
    pcb->rcv_ann_wnd = pcb->rcv_wnd;
 801b156:	687b      	ldr	r3, [r7, #4]
 801b158:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801b15a:	687b      	ldr	r3, [r7, #4]
 801b15c:	855a      	strh	r2, [r3, #42]	@ 0x2a
    return new_right_edge - pcb->rcv_ann_right_edge;
 801b15e:	687b      	ldr	r3, [r7, #4]
 801b160:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801b162:	68fa      	ldr	r2, [r7, #12]
 801b164:	1ad3      	subs	r3, r2, r3
 801b166:	e020      	b.n	801b1aa <tcp_update_rcv_ann_wnd+0x9a>
  } else {
    if (TCP_SEQ_GT(pcb->rcv_nxt, pcb->rcv_ann_right_edge)) {
 801b168:	687b      	ldr	r3, [r7, #4]
 801b16a:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801b16c:	687b      	ldr	r3, [r7, #4]
 801b16e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801b170:	1ad3      	subs	r3, r2, r3
 801b172:	2b00      	cmp	r3, #0
 801b174:	dd03      	ble.n	801b17e <tcp_update_rcv_ann_wnd+0x6e>
      /* Can happen due to other end sending out of advertised window,
       * but within actual available (but not yet advertised) window */
      pcb->rcv_ann_wnd = 0;
 801b176:	687b      	ldr	r3, [r7, #4]
 801b178:	2200      	movs	r2, #0
 801b17a:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801b17c:	e014      	b.n	801b1a8 <tcp_update_rcv_ann_wnd+0x98>
    } else {
      /* keep the right edge of window constant */
      u32_t new_rcv_ann_wnd = pcb->rcv_ann_right_edge - pcb->rcv_nxt;
 801b17e:	687b      	ldr	r3, [r7, #4]
 801b180:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801b182:	687b      	ldr	r3, [r7, #4]
 801b184:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801b186:	1ad3      	subs	r3, r2, r3
 801b188:	60bb      	str	r3, [r7, #8]
#if !LWIP_WND_SCALE
      LWIP_ASSERT("new_rcv_ann_wnd <= 0xffff", new_rcv_ann_wnd <= 0xffff);
 801b18a:	68bb      	ldr	r3, [r7, #8]
 801b18c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 801b190:	d306      	bcc.n	801b1a0 <tcp_update_rcv_ann_wnd+0x90>
 801b192:	4b08      	ldr	r3, [pc, #32]	@ (801b1b4 <tcp_update_rcv_ann_wnd+0xa4>)
 801b194:	f240 32b6 	movw	r2, #950	@ 0x3b6
 801b198:	4909      	ldr	r1, [pc, #36]	@ (801b1c0 <tcp_update_rcv_ann_wnd+0xb0>)
 801b19a:	4808      	ldr	r0, [pc, #32]	@ (801b1bc <tcp_update_rcv_ann_wnd+0xac>)
 801b19c:	f00e fc1e 	bl	80299dc <iprintf>
#endif
      pcb->rcv_ann_wnd = (tcpwnd_size_t)new_rcv_ann_wnd;
 801b1a0:	68bb      	ldr	r3, [r7, #8]
 801b1a2:	b29a      	uxth	r2, r3
 801b1a4:	687b      	ldr	r3, [r7, #4]
 801b1a6:	855a      	strh	r2, [r3, #42]	@ 0x2a
    }
    return 0;
 801b1a8:	2300      	movs	r3, #0
  }
}
 801b1aa:	4618      	mov	r0, r3
 801b1ac:	3710      	adds	r7, #16
 801b1ae:	46bd      	mov	sp, r7
 801b1b0:	bd80      	pop	{r7, pc}
 801b1b2:	bf00      	nop
 801b1b4:	0802e5f0 	.word	0x0802e5f0
 801b1b8:	0802e84c 	.word	0x0802e84c
 801b1bc:	0802e634 	.word	0x0802e634
 801b1c0:	0802e870 	.word	0x0802e870

0801b1c4 <tcp_recved>:
 * @param pcb the tcp_pcb for which data is read
 * @param len the amount of bytes that have been read by the application
 */
void
tcp_recved(struct tcp_pcb *pcb, u16_t len)
{
 801b1c4:	b580      	push	{r7, lr}
 801b1c6:	b084      	sub	sp, #16
 801b1c8:	af00      	add	r7, sp, #0
 801b1ca:	6078      	str	r0, [r7, #4]
 801b1cc:	460b      	mov	r3, r1
 801b1ce:	807b      	strh	r3, [r7, #2]
  u32_t wnd_inflation;
  tcpwnd_size_t rcv_wnd;

  LWIP_ASSERT_CORE_LOCKED();
 801b1d0:	f7f5 f9b8 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("tcp_recved: invalid pcb", pcb != NULL, return);
 801b1d4:	687b      	ldr	r3, [r7, #4]
 801b1d6:	2b00      	cmp	r3, #0
 801b1d8:	d107      	bne.n	801b1ea <tcp_recved+0x26>
 801b1da:	4b20      	ldr	r3, [pc, #128]	@ (801b25c <tcp_recved+0x98>)
 801b1dc:	f240 32cf 	movw	r2, #975	@ 0x3cf
 801b1e0:	491f      	ldr	r1, [pc, #124]	@ (801b260 <tcp_recved+0x9c>)
 801b1e2:	4820      	ldr	r0, [pc, #128]	@ (801b264 <tcp_recved+0xa0>)
 801b1e4:	f00e fbfa 	bl	80299dc <iprintf>
 801b1e8:	e034      	b.n	801b254 <tcp_recved+0x90>

  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_recved for listen-pcbs",
 801b1ea:	687b      	ldr	r3, [r7, #4]
 801b1ec:	7d1b      	ldrb	r3, [r3, #20]
 801b1ee:	2b01      	cmp	r3, #1
 801b1f0:	d106      	bne.n	801b200 <tcp_recved+0x3c>
 801b1f2:	4b1a      	ldr	r3, [pc, #104]	@ (801b25c <tcp_recved+0x98>)
 801b1f4:	f240 32d2 	movw	r2, #978	@ 0x3d2
 801b1f8:	491b      	ldr	r1, [pc, #108]	@ (801b268 <tcp_recved+0xa4>)
 801b1fa:	481a      	ldr	r0, [pc, #104]	@ (801b264 <tcp_recved+0xa0>)
 801b1fc:	f00e fbee 	bl	80299dc <iprintf>
              pcb->state != LISTEN);

  rcv_wnd = (tcpwnd_size_t)(pcb->rcv_wnd + len);
 801b200:	687b      	ldr	r3, [r7, #4]
 801b202:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801b204:	887b      	ldrh	r3, [r7, #2]
 801b206:	4413      	add	r3, r2
 801b208:	81fb      	strh	r3, [r7, #14]
  if ((rcv_wnd > TCP_WND_MAX(pcb)) || (rcv_wnd < pcb->rcv_wnd)) {
 801b20a:	89fb      	ldrh	r3, [r7, #14]
 801b20c:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801b210:	4293      	cmp	r3, r2
 801b212:	d804      	bhi.n	801b21e <tcp_recved+0x5a>
 801b214:	687b      	ldr	r3, [r7, #4]
 801b216:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801b218:	89fa      	ldrh	r2, [r7, #14]
 801b21a:	429a      	cmp	r2, r3
 801b21c:	d204      	bcs.n	801b228 <tcp_recved+0x64>
    /* window got too big or tcpwnd_size_t overflow */
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: window got too big or tcpwnd_size_t overflow\n"));
    pcb->rcv_wnd = TCP_WND_MAX(pcb);
 801b21e:	687b      	ldr	r3, [r7, #4]
 801b220:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801b224:	851a      	strh	r2, [r3, #40]	@ 0x28
 801b226:	e002      	b.n	801b22e <tcp_recved+0x6a>
  } else  {
    pcb->rcv_wnd = rcv_wnd;
 801b228:	687b      	ldr	r3, [r7, #4]
 801b22a:	89fa      	ldrh	r2, [r7, #14]
 801b22c:	851a      	strh	r2, [r3, #40]	@ 0x28
  }

  wnd_inflation = tcp_update_rcv_ann_wnd(pcb);
 801b22e:	6878      	ldr	r0, [r7, #4]
 801b230:	f7ff ff6e 	bl	801b110 <tcp_update_rcv_ann_wnd>
 801b234:	60b8      	str	r0, [r7, #8]

  /* If the change in the right edge of window is significant (default
   * watermark is TCP_WND/4), then send an explicit update now.
   * Otherwise wait for a packet to be sent in the normal course of
   * events (or more window to be available later) */
  if (wnd_inflation >= TCP_WND_UPDATE_THRESHOLD) {
 801b236:	68bb      	ldr	r3, [r7, #8]
 801b238:	f240 52b3 	movw	r2, #1459	@ 0x5b3
 801b23c:	4293      	cmp	r3, r2
 801b23e:	d909      	bls.n	801b254 <tcp_recved+0x90>
    tcp_ack_now(pcb);
 801b240:	687b      	ldr	r3, [r7, #4]
 801b242:	8b5b      	ldrh	r3, [r3, #26]
 801b244:	f043 0302 	orr.w	r3, r3, #2
 801b248:	b29a      	uxth	r2, r3
 801b24a:	687b      	ldr	r3, [r7, #4]
 801b24c:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801b24e:	6878      	ldr	r0, [r7, #4]
 801b250:	f004 fd38 	bl	801fcc4 <tcp_output>
  }

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: received %"U16_F" bytes, wnd %"TCPWNDSIZE_F" (%"TCPWNDSIZE_F").\n",
                          len, pcb->rcv_wnd, (u16_t)(TCP_WND_MAX(pcb) - pcb->rcv_wnd)));
}
 801b254:	3710      	adds	r7, #16
 801b256:	46bd      	mov	sp, r7
 801b258:	bd80      	pop	{r7, pc}
 801b25a:	bf00      	nop
 801b25c:	0802e5f0 	.word	0x0802e5f0
 801b260:	0802e88c 	.word	0x0802e88c
 801b264:	0802e634 	.word	0x0802e634
 801b268:	0802e8a4 	.word	0x0802e8a4

0801b26c <tcp_new_port>:
 *
 * @return a new (free) local TCP port number
 */
static u16_t
tcp_new_port(void)
{
 801b26c:	b480      	push	{r7}
 801b26e:	b083      	sub	sp, #12
 801b270:	af00      	add	r7, sp, #0
  u8_t i;
  u16_t n = 0;
 801b272:	2300      	movs	r3, #0
 801b274:	80bb      	strh	r3, [r7, #4]
  struct tcp_pcb *pcb;

again:
  tcp_port++;
 801b276:	4b1e      	ldr	r3, [pc, #120]	@ (801b2f0 <tcp_new_port+0x84>)
 801b278:	881b      	ldrh	r3, [r3, #0]
 801b27a:	3301      	adds	r3, #1
 801b27c:	b29a      	uxth	r2, r3
 801b27e:	4b1c      	ldr	r3, [pc, #112]	@ (801b2f0 <tcp_new_port+0x84>)
 801b280:	801a      	strh	r2, [r3, #0]
  if (tcp_port == TCP_LOCAL_PORT_RANGE_END) {
 801b282:	4b1b      	ldr	r3, [pc, #108]	@ (801b2f0 <tcp_new_port+0x84>)
 801b284:	881b      	ldrh	r3, [r3, #0]
 801b286:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801b28a:	4293      	cmp	r3, r2
 801b28c:	d103      	bne.n	801b296 <tcp_new_port+0x2a>
    tcp_port = TCP_LOCAL_PORT_RANGE_START;
 801b28e:	4b18      	ldr	r3, [pc, #96]	@ (801b2f0 <tcp_new_port+0x84>)
 801b290:	f44f 4240 	mov.w	r2, #49152	@ 0xc000
 801b294:	801a      	strh	r2, [r3, #0]
  }
  /* Check all PCB lists. */
  for (i = 0; i < NUM_TCP_PCB_LISTS; i++) {
 801b296:	2300      	movs	r3, #0
 801b298:	71fb      	strb	r3, [r7, #7]
 801b29a:	e01e      	b.n	801b2da <tcp_new_port+0x6e>
    for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) {
 801b29c:	79fb      	ldrb	r3, [r7, #7]
 801b29e:	4a15      	ldr	r2, [pc, #84]	@ (801b2f4 <tcp_new_port+0x88>)
 801b2a0:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801b2a4:	681b      	ldr	r3, [r3, #0]
 801b2a6:	603b      	str	r3, [r7, #0]
 801b2a8:	e011      	b.n	801b2ce <tcp_new_port+0x62>
      if (pcb->local_port == tcp_port) {
 801b2aa:	683b      	ldr	r3, [r7, #0]
 801b2ac:	8ada      	ldrh	r2, [r3, #22]
 801b2ae:	4b10      	ldr	r3, [pc, #64]	@ (801b2f0 <tcp_new_port+0x84>)
 801b2b0:	881b      	ldrh	r3, [r3, #0]
 801b2b2:	429a      	cmp	r2, r3
 801b2b4:	d108      	bne.n	801b2c8 <tcp_new_port+0x5c>
        n++;
 801b2b6:	88bb      	ldrh	r3, [r7, #4]
 801b2b8:	3301      	adds	r3, #1
 801b2ba:	80bb      	strh	r3, [r7, #4]
        if (n > (TCP_LOCAL_PORT_RANGE_END - TCP_LOCAL_PORT_RANGE_START)) {
 801b2bc:	88bb      	ldrh	r3, [r7, #4]
 801b2be:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 801b2c2:	d3d8      	bcc.n	801b276 <tcp_new_port+0xa>
          return 0;
 801b2c4:	2300      	movs	r3, #0
 801b2c6:	e00d      	b.n	801b2e4 <tcp_new_port+0x78>
    for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) {
 801b2c8:	683b      	ldr	r3, [r7, #0]
 801b2ca:	68db      	ldr	r3, [r3, #12]
 801b2cc:	603b      	str	r3, [r7, #0]
 801b2ce:	683b      	ldr	r3, [r7, #0]
 801b2d0:	2b00      	cmp	r3, #0
 801b2d2:	d1ea      	bne.n	801b2aa <tcp_new_port+0x3e>
  for (i = 0; i < NUM_TCP_PCB_LISTS; i++) {
 801b2d4:	79fb      	ldrb	r3, [r7, #7]
 801b2d6:	3301      	adds	r3, #1
 801b2d8:	71fb      	strb	r3, [r7, #7]
 801b2da:	79fb      	ldrb	r3, [r7, #7]
 801b2dc:	2b03      	cmp	r3, #3
 801b2de:	d9dd      	bls.n	801b29c <tcp_new_port+0x30>
        }
        goto again;
      }
    }
  }
  return tcp_port;
 801b2e0:	4b03      	ldr	r3, [pc, #12]	@ (801b2f0 <tcp_new_port+0x84>)
 801b2e2:	881b      	ldrh	r3, [r3, #0]
}
 801b2e4:	4618      	mov	r0, r3
 801b2e6:	370c      	adds	r7, #12
 801b2e8:	46bd      	mov	sp, r7
 801b2ea:	f85d 7b04 	ldr.w	r7, [sp], #4
 801b2ee:	4770      	bx	lr
 801b2f0:	2400004c 	.word	0x2400004c
 801b2f4:	08030c30 	.word	0x08030c30

0801b2f8 <tcp_connect>:
 *         other err_t values if connect request couldn't be sent
 */
err_t
tcp_connect(struct tcp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port,
            tcp_connected_fn connected)
{
 801b2f8:	b580      	push	{r7, lr}
 801b2fa:	b08a      	sub	sp, #40	@ 0x28
 801b2fc:	af00      	add	r7, sp, #0
 801b2fe:	60f8      	str	r0, [r7, #12]
 801b300:	60b9      	str	r1, [r7, #8]
 801b302:	603b      	str	r3, [r7, #0]
 801b304:	4613      	mov	r3, r2
 801b306:	80fb      	strh	r3, [r7, #6]
  struct netif *netif = NULL;
 801b308:	2300      	movs	r3, #0
 801b30a:	627b      	str	r3, [r7, #36]	@ 0x24
  err_t ret;
  u32_t iss;
  u16_t old_local_port;

  LWIP_ASSERT_CORE_LOCKED();
 801b30c:	f7f5 f91a 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("tcp_connect: invalid pcb", pcb != NULL, return ERR_ARG);
 801b310:	68fb      	ldr	r3, [r7, #12]
 801b312:	2b00      	cmp	r3, #0
 801b314:	d109      	bne.n	801b32a <tcp_connect+0x32>
 801b316:	4b7d      	ldr	r3, [pc, #500]	@ (801b50c <tcp_connect+0x214>)
 801b318:	f240 4235 	movw	r2, #1077	@ 0x435
 801b31c:	497c      	ldr	r1, [pc, #496]	@ (801b510 <tcp_connect+0x218>)
 801b31e:	487d      	ldr	r0, [pc, #500]	@ (801b514 <tcp_connect+0x21c>)
 801b320:	f00e fb5c 	bl	80299dc <iprintf>
 801b324:	f06f 030f 	mvn.w	r3, #15
 801b328:	e0ec      	b.n	801b504 <tcp_connect+0x20c>
  LWIP_ERROR("tcp_connect: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
 801b32a:	68bb      	ldr	r3, [r7, #8]
 801b32c:	2b00      	cmp	r3, #0
 801b32e:	d109      	bne.n	801b344 <tcp_connect+0x4c>
 801b330:	4b76      	ldr	r3, [pc, #472]	@ (801b50c <tcp_connect+0x214>)
 801b332:	f240 4236 	movw	r2, #1078	@ 0x436
 801b336:	4978      	ldr	r1, [pc, #480]	@ (801b518 <tcp_connect+0x220>)
 801b338:	4876      	ldr	r0, [pc, #472]	@ (801b514 <tcp_connect+0x21c>)
 801b33a:	f00e fb4f 	bl	80299dc <iprintf>
 801b33e:	f06f 030f 	mvn.w	r3, #15
 801b342:	e0df      	b.n	801b504 <tcp_connect+0x20c>

  LWIP_ERROR("tcp_connect: can only connect from state CLOSED", pcb->state == CLOSED, return ERR_ISCONN);
 801b344:	68fb      	ldr	r3, [r7, #12]
 801b346:	7d1b      	ldrb	r3, [r3, #20]
 801b348:	2b00      	cmp	r3, #0
 801b34a:	d009      	beq.n	801b360 <tcp_connect+0x68>
 801b34c:	4b6f      	ldr	r3, [pc, #444]	@ (801b50c <tcp_connect+0x214>)
 801b34e:	f44f 6287 	mov.w	r2, #1080	@ 0x438
 801b352:	4972      	ldr	r1, [pc, #456]	@ (801b51c <tcp_connect+0x224>)
 801b354:	486f      	ldr	r0, [pc, #444]	@ (801b514 <tcp_connect+0x21c>)
 801b356:	f00e fb41 	bl	80299dc <iprintf>
 801b35a:	f06f 0309 	mvn.w	r3, #9
 801b35e:	e0d1      	b.n	801b504 <tcp_connect+0x20c>

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_connect to port %"U16_F"\n", port));
  ip_addr_set(&pcb->remote_ip, ipaddr);
 801b360:	68bb      	ldr	r3, [r7, #8]
 801b362:	2b00      	cmp	r3, #0
 801b364:	d002      	beq.n	801b36c <tcp_connect+0x74>
 801b366:	68bb      	ldr	r3, [r7, #8]
 801b368:	681b      	ldr	r3, [r3, #0]
 801b36a:	e000      	b.n	801b36e <tcp_connect+0x76>
 801b36c:	2300      	movs	r3, #0
 801b36e:	68fa      	ldr	r2, [r7, #12]
 801b370:	6053      	str	r3, [r2, #4]
  pcb->remote_port = port;
 801b372:	68fb      	ldr	r3, [r7, #12]
 801b374:	88fa      	ldrh	r2, [r7, #6]
 801b376:	831a      	strh	r2, [r3, #24]

  if (pcb->netif_idx != NETIF_NO_INDEX) {
 801b378:	68fb      	ldr	r3, [r7, #12]
 801b37a:	7a1b      	ldrb	r3, [r3, #8]
 801b37c:	2b00      	cmp	r3, #0
 801b37e:	d006      	beq.n	801b38e <tcp_connect+0x96>
    netif = netif_get_by_index(pcb->netif_idx);
 801b380:	68fb      	ldr	r3, [r7, #12]
 801b382:	7a1b      	ldrb	r3, [r3, #8]
 801b384:	4618      	mov	r0, r3
 801b386:	f7fe fcf1 	bl	8019d6c <netif_get_by_index>
 801b38a:	6278      	str	r0, [r7, #36]	@ 0x24
 801b38c:	e005      	b.n	801b39a <tcp_connect+0xa2>
  } else {
    /* check if we have a route to the remote host */
    netif = ip_route(&pcb->local_ip, &pcb->remote_ip);
 801b38e:	68fb      	ldr	r3, [r7, #12]
 801b390:	3304      	adds	r3, #4
 801b392:	4618      	mov	r0, r3
 801b394:	f009 fb14 	bl	80249c0 <ip4_route>
 801b398:	6278      	str	r0, [r7, #36]	@ 0x24
  }
  if (netif == NULL) {
 801b39a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801b39c:	2b00      	cmp	r3, #0
 801b39e:	d102      	bne.n	801b3a6 <tcp_connect+0xae>
    /* Don't even try to send a SYN packet if we have no route since that will fail. */
    return ERR_RTE;
 801b3a0:	f06f 0303 	mvn.w	r3, #3
 801b3a4:	e0ae      	b.n	801b504 <tcp_connect+0x20c>
  }

  /* check if local IP has been assigned to pcb, if not, get one */
  if (ip_addr_isany(&pcb->local_ip)) {
 801b3a6:	68fb      	ldr	r3, [r7, #12]
 801b3a8:	2b00      	cmp	r3, #0
 801b3aa:	d003      	beq.n	801b3b4 <tcp_connect+0xbc>
 801b3ac:	68fb      	ldr	r3, [r7, #12]
 801b3ae:	681b      	ldr	r3, [r3, #0]
 801b3b0:	2b00      	cmp	r3, #0
 801b3b2:	d111      	bne.n	801b3d8 <tcp_connect+0xe0>
    const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, ipaddr);
 801b3b4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801b3b6:	2b00      	cmp	r3, #0
 801b3b8:	d002      	beq.n	801b3c0 <tcp_connect+0xc8>
 801b3ba:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801b3bc:	3304      	adds	r3, #4
 801b3be:	e000      	b.n	801b3c2 <tcp_connect+0xca>
 801b3c0:	2300      	movs	r3, #0
 801b3c2:	61fb      	str	r3, [r7, #28]
    if (local_ip == NULL) {
 801b3c4:	69fb      	ldr	r3, [r7, #28]
 801b3c6:	2b00      	cmp	r3, #0
 801b3c8:	d102      	bne.n	801b3d0 <tcp_connect+0xd8>
      return ERR_RTE;
 801b3ca:	f06f 0303 	mvn.w	r3, #3
 801b3ce:	e099      	b.n	801b504 <tcp_connect+0x20c>
    }
    ip_addr_copy(pcb->local_ip, *local_ip);
 801b3d0:	69fb      	ldr	r3, [r7, #28]
 801b3d2:	681a      	ldr	r2, [r3, #0]
 801b3d4:	68fb      	ldr	r3, [r7, #12]
 801b3d6:	601a      	str	r2, [r3, #0]
      ip6_addr_lacks_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNICAST)) {
    ip6_addr_assign_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNICAST, netif);
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  old_local_port = pcb->local_port;
 801b3d8:	68fb      	ldr	r3, [r7, #12]
 801b3da:	8adb      	ldrh	r3, [r3, #22]
 801b3dc:	837b      	strh	r3, [r7, #26]
  if (pcb->local_port == 0) {
 801b3de:	68fb      	ldr	r3, [r7, #12]
 801b3e0:	8adb      	ldrh	r3, [r3, #22]
 801b3e2:	2b00      	cmp	r3, #0
 801b3e4:	d10c      	bne.n	801b400 <tcp_connect+0x108>
    pcb->local_port = tcp_new_port();
 801b3e6:	f7ff ff41 	bl	801b26c <tcp_new_port>
 801b3ea:	4603      	mov	r3, r0
 801b3ec:	461a      	mov	r2, r3
 801b3ee:	68fb      	ldr	r3, [r7, #12]
 801b3f0:	82da      	strh	r2, [r3, #22]
    if (pcb->local_port == 0) {
 801b3f2:	68fb      	ldr	r3, [r7, #12]
 801b3f4:	8adb      	ldrh	r3, [r3, #22]
 801b3f6:	2b00      	cmp	r3, #0
 801b3f8:	d102      	bne.n	801b400 <tcp_connect+0x108>
      return ERR_BUF;
 801b3fa:	f06f 0301 	mvn.w	r3, #1
 801b3fe:	e081      	b.n	801b504 <tcp_connect+0x20c>
      }
    }
#endif /* SO_REUSE */
  }

  iss = tcp_next_iss(pcb);
 801b400:	68f8      	ldr	r0, [r7, #12]
 801b402:	f001 f875 	bl	801c4f0 <tcp_next_iss>
 801b406:	6178      	str	r0, [r7, #20]
  pcb->rcv_nxt = 0;
 801b408:	68fb      	ldr	r3, [r7, #12]
 801b40a:	2200      	movs	r2, #0
 801b40c:	625a      	str	r2, [r3, #36]	@ 0x24
  pcb->snd_nxt = iss;
 801b40e:	68fb      	ldr	r3, [r7, #12]
 801b410:	697a      	ldr	r2, [r7, #20]
 801b412:	651a      	str	r2, [r3, #80]	@ 0x50
  pcb->lastack = iss - 1;
 801b414:	697b      	ldr	r3, [r7, #20]
 801b416:	1e5a      	subs	r2, r3, #1
 801b418:	68fb      	ldr	r3, [r7, #12]
 801b41a:	645a      	str	r2, [r3, #68]	@ 0x44
  pcb->snd_wl2 = iss - 1;
 801b41c:	697b      	ldr	r3, [r7, #20]
 801b41e:	1e5a      	subs	r2, r3, #1
 801b420:	68fb      	ldr	r3, [r7, #12]
 801b422:	659a      	str	r2, [r3, #88]	@ 0x58
  pcb->snd_lbb = iss - 1;
 801b424:	697b      	ldr	r3, [r7, #20]
 801b426:	1e5a      	subs	r2, r3, #1
 801b428:	68fb      	ldr	r3, [r7, #12]
 801b42a:	65da      	str	r2, [r3, #92]	@ 0x5c
  /* Start with a window that does not need scaling. When window scaling is
     enabled and used, the window is enlarged when both sides agree on scaling. */
  pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND);
 801b42c:	68fb      	ldr	r3, [r7, #12]
 801b42e:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801b432:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801b434:	68fb      	ldr	r3, [r7, #12]
 801b436:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 801b438:	68fb      	ldr	r3, [r7, #12]
 801b43a:	851a      	strh	r2, [r3, #40]	@ 0x28
  pcb->rcv_ann_right_edge = pcb->rcv_nxt;
 801b43c:	68fb      	ldr	r3, [r7, #12]
 801b43e:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801b440:	68fb      	ldr	r3, [r7, #12]
 801b442:	62da      	str	r2, [r3, #44]	@ 0x2c
  pcb->snd_wnd = TCP_WND;
 801b444:	68fb      	ldr	r3, [r7, #12]
 801b446:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801b44a:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
  /* As initial send MSS, we use TCP_MSS but limit it to 536.
     The send MSS is updated when an MSS option is received. */
  pcb->mss = INITIAL_MSS;
 801b44e:	68fb      	ldr	r3, [r7, #12]
 801b450:	f44f 7206 	mov.w	r2, #536	@ 0x218
 801b454:	865a      	strh	r2, [r3, #50]	@ 0x32
#if TCP_CALCULATE_EFF_SEND_MSS
  pcb->mss = tcp_eff_send_mss_netif(pcb->mss, netif, &pcb->remote_ip);
 801b456:	68fb      	ldr	r3, [r7, #12]
 801b458:	8e58      	ldrh	r0, [r3, #50]	@ 0x32
 801b45a:	68fb      	ldr	r3, [r7, #12]
 801b45c:	3304      	adds	r3, #4
 801b45e:	461a      	mov	r2, r3
 801b460:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 801b462:	f001 f86b 	bl	801c53c <tcp_eff_send_mss_netif>
 801b466:	4603      	mov	r3, r0
 801b468:	461a      	mov	r2, r3
 801b46a:	68fb      	ldr	r3, [r7, #12]
 801b46c:	865a      	strh	r2, [r3, #50]	@ 0x32
#endif /* TCP_CALCULATE_EFF_SEND_MSS */
  pcb->cwnd = 1;
 801b46e:	68fb      	ldr	r3, [r7, #12]
 801b470:	2201      	movs	r2, #1
 801b472:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
#if LWIP_CALLBACK_API
  pcb->connected = connected;
 801b476:	68fb      	ldr	r3, [r7, #12]
 801b478:	683a      	ldr	r2, [r7, #0]
 801b47a:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
#else /* LWIP_CALLBACK_API */
  LWIP_UNUSED_ARG(connected);
#endif /* LWIP_CALLBACK_API */

  /* Send a SYN together with the MSS option. */
  ret = tcp_enqueue_flags(pcb, TCP_SYN);
 801b47e:	2102      	movs	r1, #2
 801b480:	68f8      	ldr	r0, [r7, #12]
 801b482:	f004 fb31 	bl	801fae8 <tcp_enqueue_flags>
 801b486:	4603      	mov	r3, r0
 801b488:	74fb      	strb	r3, [r7, #19]
  if (ret == ERR_OK) {
 801b48a:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801b48e:	2b00      	cmp	r3, #0
 801b490:	d136      	bne.n	801b500 <tcp_connect+0x208>
    /* SYN segment was enqueued, changed the pcbs state now */
    pcb->state = SYN_SENT;
 801b492:	68fb      	ldr	r3, [r7, #12]
 801b494:	2202      	movs	r2, #2
 801b496:	751a      	strb	r2, [r3, #20]
    if (old_local_port != 0) {
 801b498:	8b7b      	ldrh	r3, [r7, #26]
 801b49a:	2b00      	cmp	r3, #0
 801b49c:	d021      	beq.n	801b4e2 <tcp_connect+0x1ea>
      TCP_RMV(&tcp_bound_pcbs, pcb);
 801b49e:	4b20      	ldr	r3, [pc, #128]	@ (801b520 <tcp_connect+0x228>)
 801b4a0:	681b      	ldr	r3, [r3, #0]
 801b4a2:	68fa      	ldr	r2, [r7, #12]
 801b4a4:	429a      	cmp	r2, r3
 801b4a6:	d105      	bne.n	801b4b4 <tcp_connect+0x1bc>
 801b4a8:	4b1d      	ldr	r3, [pc, #116]	@ (801b520 <tcp_connect+0x228>)
 801b4aa:	681b      	ldr	r3, [r3, #0]
 801b4ac:	68db      	ldr	r3, [r3, #12]
 801b4ae:	4a1c      	ldr	r2, [pc, #112]	@ (801b520 <tcp_connect+0x228>)
 801b4b0:	6013      	str	r3, [r2, #0]
 801b4b2:	e013      	b.n	801b4dc <tcp_connect+0x1e4>
 801b4b4:	4b1a      	ldr	r3, [pc, #104]	@ (801b520 <tcp_connect+0x228>)
 801b4b6:	681b      	ldr	r3, [r3, #0]
 801b4b8:	623b      	str	r3, [r7, #32]
 801b4ba:	e00c      	b.n	801b4d6 <tcp_connect+0x1de>
 801b4bc:	6a3b      	ldr	r3, [r7, #32]
 801b4be:	68db      	ldr	r3, [r3, #12]
 801b4c0:	68fa      	ldr	r2, [r7, #12]
 801b4c2:	429a      	cmp	r2, r3
 801b4c4:	d104      	bne.n	801b4d0 <tcp_connect+0x1d8>
 801b4c6:	68fb      	ldr	r3, [r7, #12]
 801b4c8:	68da      	ldr	r2, [r3, #12]
 801b4ca:	6a3b      	ldr	r3, [r7, #32]
 801b4cc:	60da      	str	r2, [r3, #12]
 801b4ce:	e005      	b.n	801b4dc <tcp_connect+0x1e4>
 801b4d0:	6a3b      	ldr	r3, [r7, #32]
 801b4d2:	68db      	ldr	r3, [r3, #12]
 801b4d4:	623b      	str	r3, [r7, #32]
 801b4d6:	6a3b      	ldr	r3, [r7, #32]
 801b4d8:	2b00      	cmp	r3, #0
 801b4da:	d1ef      	bne.n	801b4bc <tcp_connect+0x1c4>
 801b4dc:	68fb      	ldr	r3, [r7, #12]
 801b4de:	2200      	movs	r2, #0
 801b4e0:	60da      	str	r2, [r3, #12]
    }
    TCP_REG_ACTIVE(pcb);
 801b4e2:	4b10      	ldr	r3, [pc, #64]	@ (801b524 <tcp_connect+0x22c>)
 801b4e4:	681a      	ldr	r2, [r3, #0]
 801b4e6:	68fb      	ldr	r3, [r7, #12]
 801b4e8:	60da      	str	r2, [r3, #12]
 801b4ea:	4a0e      	ldr	r2, [pc, #56]	@ (801b524 <tcp_connect+0x22c>)
 801b4ec:	68fb      	ldr	r3, [r7, #12]
 801b4ee:	6013      	str	r3, [r2, #0]
 801b4f0:	f005 fb6c 	bl	8020bcc <tcp_timer_needed>
 801b4f4:	4b0c      	ldr	r3, [pc, #48]	@ (801b528 <tcp_connect+0x230>)
 801b4f6:	2201      	movs	r2, #1
 801b4f8:	701a      	strb	r2, [r3, #0]
    MIB2_STATS_INC(mib2.tcpactiveopens);

    tcp_output(pcb);
 801b4fa:	68f8      	ldr	r0, [r7, #12]
 801b4fc:	f004 fbe2 	bl	801fcc4 <tcp_output>
  }
  return ret;
 801b500:	f997 3013 	ldrsb.w	r3, [r7, #19]
}
 801b504:	4618      	mov	r0, r3
 801b506:	3728      	adds	r7, #40	@ 0x28
 801b508:	46bd      	mov	sp, r7
 801b50a:	bd80      	pop	{r7, pc}
 801b50c:	0802e5f0 	.word	0x0802e5f0
 801b510:	0802e8cc 	.word	0x0802e8cc
 801b514:	0802e634 	.word	0x0802e634
 801b518:	0802e8e8 	.word	0x0802e8e8
 801b51c:	0802e904 	.word	0x0802e904
 801b520:	2402ae8c 	.word	0x2402ae8c
 801b524:	2402ae94 	.word	0x2402ae94
 801b528:	2402ae9c 	.word	0x2402ae9c

0801b52c <tcp_slowtmr>:
 *
 * Automatically called from tcp_tmr().
 */
void
tcp_slowtmr(void)
{
 801b52c:	b5b0      	push	{r4, r5, r7, lr}
 801b52e:	b090      	sub	sp, #64	@ 0x40
 801b530:	af04      	add	r7, sp, #16
  tcpwnd_size_t eff_wnd;
  u8_t pcb_remove;      /* flag if a PCB should be removed */
  u8_t pcb_reset;       /* flag if a RST should be sent when removing */
  err_t err;

  err = ERR_OK;
 801b532:	2300      	movs	r3, #0
 801b534:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25

  ++tcp_ticks;
 801b538:	4b95      	ldr	r3, [pc, #596]	@ (801b790 <tcp_slowtmr+0x264>)
 801b53a:	681b      	ldr	r3, [r3, #0]
 801b53c:	3301      	adds	r3, #1
 801b53e:	4a94      	ldr	r2, [pc, #592]	@ (801b790 <tcp_slowtmr+0x264>)
 801b540:	6013      	str	r3, [r2, #0]
  ++tcp_timer_ctr;
 801b542:	4b94      	ldr	r3, [pc, #592]	@ (801b794 <tcp_slowtmr+0x268>)
 801b544:	781b      	ldrb	r3, [r3, #0]
 801b546:	3301      	adds	r3, #1
 801b548:	b2da      	uxtb	r2, r3
 801b54a:	4b92      	ldr	r3, [pc, #584]	@ (801b794 <tcp_slowtmr+0x268>)
 801b54c:	701a      	strb	r2, [r3, #0]
 801b54e:	e000      	b.n	801b552 <tcp_slowtmr+0x26>
        prev->polltmr = 0;
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: polling application\n"));
        tcp_active_pcbs_changed = 0;
        TCP_EVENT_POLL(prev, err);
        if (tcp_active_pcbs_changed) {
          goto tcp_slowtmr_start;
 801b550:	bf00      	nop
  prev = NULL;
 801b552:	2300      	movs	r3, #0
 801b554:	62bb      	str	r3, [r7, #40]	@ 0x28
  pcb = tcp_active_pcbs;
 801b556:	4b90      	ldr	r3, [pc, #576]	@ (801b798 <tcp_slowtmr+0x26c>)
 801b558:	681b      	ldr	r3, [r3, #0]
 801b55a:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801b55c:	e29d      	b.n	801ba9a <tcp_slowtmr+0x56e>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != CLOSED\n", pcb->state != CLOSED);
 801b55e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b560:	7d1b      	ldrb	r3, [r3, #20]
 801b562:	2b00      	cmp	r3, #0
 801b564:	d106      	bne.n	801b574 <tcp_slowtmr+0x48>
 801b566:	4b8d      	ldr	r3, [pc, #564]	@ (801b79c <tcp_slowtmr+0x270>)
 801b568:	f240 42be 	movw	r2, #1214	@ 0x4be
 801b56c:	498c      	ldr	r1, [pc, #560]	@ (801b7a0 <tcp_slowtmr+0x274>)
 801b56e:	488d      	ldr	r0, [pc, #564]	@ (801b7a4 <tcp_slowtmr+0x278>)
 801b570:	f00e fa34 	bl	80299dc <iprintf>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != LISTEN\n", pcb->state != LISTEN);
 801b574:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b576:	7d1b      	ldrb	r3, [r3, #20]
 801b578:	2b01      	cmp	r3, #1
 801b57a:	d106      	bne.n	801b58a <tcp_slowtmr+0x5e>
 801b57c:	4b87      	ldr	r3, [pc, #540]	@ (801b79c <tcp_slowtmr+0x270>)
 801b57e:	f240 42bf 	movw	r2, #1215	@ 0x4bf
 801b582:	4989      	ldr	r1, [pc, #548]	@ (801b7a8 <tcp_slowtmr+0x27c>)
 801b584:	4887      	ldr	r0, [pc, #540]	@ (801b7a4 <tcp_slowtmr+0x278>)
 801b586:	f00e fa29 	bl	80299dc <iprintf>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != TIME-WAIT\n", pcb->state != TIME_WAIT);
 801b58a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b58c:	7d1b      	ldrb	r3, [r3, #20]
 801b58e:	2b0a      	cmp	r3, #10
 801b590:	d106      	bne.n	801b5a0 <tcp_slowtmr+0x74>
 801b592:	4b82      	ldr	r3, [pc, #520]	@ (801b79c <tcp_slowtmr+0x270>)
 801b594:	f44f 6298 	mov.w	r2, #1216	@ 0x4c0
 801b598:	4984      	ldr	r1, [pc, #528]	@ (801b7ac <tcp_slowtmr+0x280>)
 801b59a:	4882      	ldr	r0, [pc, #520]	@ (801b7a4 <tcp_slowtmr+0x278>)
 801b59c:	f00e fa1e 	bl	80299dc <iprintf>
    if (pcb->last_timer == tcp_timer_ctr) {
 801b5a0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b5a2:	7f9a      	ldrb	r2, [r3, #30]
 801b5a4:	4b7b      	ldr	r3, [pc, #492]	@ (801b794 <tcp_slowtmr+0x268>)
 801b5a6:	781b      	ldrb	r3, [r3, #0]
 801b5a8:	429a      	cmp	r2, r3
 801b5aa:	d105      	bne.n	801b5b8 <tcp_slowtmr+0x8c>
      prev = pcb;
 801b5ac:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b5ae:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801b5b0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b5b2:	68db      	ldr	r3, [r3, #12]
 801b5b4:	62fb      	str	r3, [r7, #44]	@ 0x2c
      continue;
 801b5b6:	e270      	b.n	801ba9a <tcp_slowtmr+0x56e>
    pcb->last_timer = tcp_timer_ctr;
 801b5b8:	4b76      	ldr	r3, [pc, #472]	@ (801b794 <tcp_slowtmr+0x268>)
 801b5ba:	781a      	ldrb	r2, [r3, #0]
 801b5bc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b5be:	779a      	strb	r2, [r3, #30]
    pcb_remove = 0;
 801b5c0:	2300      	movs	r3, #0
 801b5c2:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    pcb_reset = 0;
 801b5c6:	2300      	movs	r3, #0
 801b5c8:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
    if (pcb->state == SYN_SENT && pcb->nrtx >= TCP_SYNMAXRTX) {
 801b5cc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b5ce:	7d1b      	ldrb	r3, [r3, #20]
 801b5d0:	2b02      	cmp	r3, #2
 801b5d2:	d10a      	bne.n	801b5ea <tcp_slowtmr+0xbe>
 801b5d4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b5d6:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801b5da:	2b05      	cmp	r3, #5
 801b5dc:	d905      	bls.n	801b5ea <tcp_slowtmr+0xbe>
      ++pcb_remove;
 801b5de:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b5e2:	3301      	adds	r3, #1
 801b5e4:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max SYN retries reached\n"));
 801b5e8:	e11e      	b.n	801b828 <tcp_slowtmr+0x2fc>
    } else if (pcb->nrtx >= TCP_MAXRTX) {
 801b5ea:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b5ec:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801b5f0:	2b0b      	cmp	r3, #11
 801b5f2:	d905      	bls.n	801b600 <tcp_slowtmr+0xd4>
      ++pcb_remove;
 801b5f4:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b5f8:	3301      	adds	r3, #1
 801b5fa:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 801b5fe:	e113      	b.n	801b828 <tcp_slowtmr+0x2fc>
      if (pcb->persist_backoff > 0) {
 801b600:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b602:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801b606:	2b00      	cmp	r3, #0
 801b608:	d075      	beq.n	801b6f6 <tcp_slowtmr+0x1ca>
        LWIP_ASSERT("tcp_slowtimr: persist ticking with in-flight data", pcb->unacked == NULL);
 801b60a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b60c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801b60e:	2b00      	cmp	r3, #0
 801b610:	d006      	beq.n	801b620 <tcp_slowtmr+0xf4>
 801b612:	4b62      	ldr	r3, [pc, #392]	@ (801b79c <tcp_slowtmr+0x270>)
 801b614:	f240 42d4 	movw	r2, #1236	@ 0x4d4
 801b618:	4965      	ldr	r1, [pc, #404]	@ (801b7b0 <tcp_slowtmr+0x284>)
 801b61a:	4862      	ldr	r0, [pc, #392]	@ (801b7a4 <tcp_slowtmr+0x278>)
 801b61c:	f00e f9de 	bl	80299dc <iprintf>
        LWIP_ASSERT("tcp_slowtimr: persist ticking with empty send buffer", pcb->unsent != NULL);
 801b620:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b622:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801b624:	2b00      	cmp	r3, #0
 801b626:	d106      	bne.n	801b636 <tcp_slowtmr+0x10a>
 801b628:	4b5c      	ldr	r3, [pc, #368]	@ (801b79c <tcp_slowtmr+0x270>)
 801b62a:	f240 42d5 	movw	r2, #1237	@ 0x4d5
 801b62e:	4961      	ldr	r1, [pc, #388]	@ (801b7b4 <tcp_slowtmr+0x288>)
 801b630:	485c      	ldr	r0, [pc, #368]	@ (801b7a4 <tcp_slowtmr+0x278>)
 801b632:	f00e f9d3 	bl	80299dc <iprintf>
        if (pcb->persist_probe >= TCP_MAXRTX) {
 801b636:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b638:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 801b63c:	2b0b      	cmp	r3, #11
 801b63e:	d905      	bls.n	801b64c <tcp_slowtmr+0x120>
          ++pcb_remove; /* max probes reached */
 801b640:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b644:	3301      	adds	r3, #1
 801b646:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 801b64a:	e0ed      	b.n	801b828 <tcp_slowtmr+0x2fc>
          u8_t backoff_cnt = tcp_persist_backoff[pcb->persist_backoff - 1];
 801b64c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b64e:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801b652:	3b01      	subs	r3, #1
 801b654:	4a58      	ldr	r2, [pc, #352]	@ (801b7b8 <tcp_slowtmr+0x28c>)
 801b656:	5cd3      	ldrb	r3, [r2, r3]
 801b658:	747b      	strb	r3, [r7, #17]
          if (pcb->persist_cnt < backoff_cnt) {
 801b65a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b65c:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801b660:	7c7a      	ldrb	r2, [r7, #17]
 801b662:	429a      	cmp	r2, r3
 801b664:	d907      	bls.n	801b676 <tcp_slowtmr+0x14a>
            pcb->persist_cnt++;
 801b666:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b668:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801b66c:	3301      	adds	r3, #1
 801b66e:	b2da      	uxtb	r2, r3
 801b670:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b672:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
          if (pcb->persist_cnt >= backoff_cnt) {
 801b676:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b678:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801b67c:	7c7a      	ldrb	r2, [r7, #17]
 801b67e:	429a      	cmp	r2, r3
 801b680:	f200 80d2 	bhi.w	801b828 <tcp_slowtmr+0x2fc>
            int next_slot = 1; /* increment timer to next slot */
 801b684:	2301      	movs	r3, #1
 801b686:	623b      	str	r3, [r7, #32]
            if (pcb->snd_wnd == 0) {
 801b688:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b68a:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801b68e:	2b00      	cmp	r3, #0
 801b690:	d108      	bne.n	801b6a4 <tcp_slowtmr+0x178>
              if (tcp_zero_window_probe(pcb) != ERR_OK) {
 801b692:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b694:	f005 f9cc 	bl	8020a30 <tcp_zero_window_probe>
 801b698:	4603      	mov	r3, r0
 801b69a:	2b00      	cmp	r3, #0
 801b69c:	d014      	beq.n	801b6c8 <tcp_slowtmr+0x19c>
                next_slot = 0; /* try probe again with current slot */
 801b69e:	2300      	movs	r3, #0
 801b6a0:	623b      	str	r3, [r7, #32]
 801b6a2:	e011      	b.n	801b6c8 <tcp_slowtmr+0x19c>
              if (tcp_split_unsent_seg(pcb, (u16_t)pcb->snd_wnd) == ERR_OK) {
 801b6a4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b6a6:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801b6aa:	4619      	mov	r1, r3
 801b6ac:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b6ae:	f004 f87f 	bl	801f7b0 <tcp_split_unsent_seg>
 801b6b2:	4603      	mov	r3, r0
 801b6b4:	2b00      	cmp	r3, #0
 801b6b6:	d107      	bne.n	801b6c8 <tcp_slowtmr+0x19c>
                if (tcp_output(pcb) == ERR_OK) {
 801b6b8:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b6ba:	f004 fb03 	bl	801fcc4 <tcp_output>
 801b6be:	4603      	mov	r3, r0
 801b6c0:	2b00      	cmp	r3, #0
 801b6c2:	d101      	bne.n	801b6c8 <tcp_slowtmr+0x19c>
                  next_slot = 0;
 801b6c4:	2300      	movs	r3, #0
 801b6c6:	623b      	str	r3, [r7, #32]
            if (next_slot) {
 801b6c8:	6a3b      	ldr	r3, [r7, #32]
 801b6ca:	2b00      	cmp	r3, #0
 801b6cc:	f000 80ac 	beq.w	801b828 <tcp_slowtmr+0x2fc>
              pcb->persist_cnt = 0;
 801b6d0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b6d2:	2200      	movs	r2, #0
 801b6d4:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
              if (pcb->persist_backoff < sizeof(tcp_persist_backoff)) {
 801b6d8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b6da:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801b6de:	2b06      	cmp	r3, #6
 801b6e0:	f200 80a2 	bhi.w	801b828 <tcp_slowtmr+0x2fc>
                pcb->persist_backoff++;
 801b6e4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b6e6:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801b6ea:	3301      	adds	r3, #1
 801b6ec:	b2da      	uxtb	r2, r3
 801b6ee:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b6f0:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99
 801b6f4:	e098      	b.n	801b828 <tcp_slowtmr+0x2fc>
        if ((pcb->rtime >= 0) && (pcb->rtime < 0x7FFF)) {
 801b6f6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b6f8:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801b6fc:	2b00      	cmp	r3, #0
 801b6fe:	db0f      	blt.n	801b720 <tcp_slowtmr+0x1f4>
 801b700:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b702:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801b706:	f647 72ff 	movw	r2, #32767	@ 0x7fff
 801b70a:	4293      	cmp	r3, r2
 801b70c:	d008      	beq.n	801b720 <tcp_slowtmr+0x1f4>
          ++pcb->rtime;
 801b70e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b710:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801b714:	b29b      	uxth	r3, r3
 801b716:	3301      	adds	r3, #1
 801b718:	b29b      	uxth	r3, r3
 801b71a:	b21a      	sxth	r2, r3
 801b71c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b71e:	861a      	strh	r2, [r3, #48]	@ 0x30
        if (pcb->rtime >= pcb->rto) {
 801b720:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b722:	f9b3 2030 	ldrsh.w	r2, [r3, #48]	@ 0x30
 801b726:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b728:	f9b3 3040 	ldrsh.w	r3, [r3, #64]	@ 0x40
 801b72c:	429a      	cmp	r2, r3
 801b72e:	db7b      	blt.n	801b828 <tcp_slowtmr+0x2fc>
          if ((tcp_rexmit_rto_prepare(pcb) == ERR_OK) || ((pcb->unacked == NULL) && (pcb->unsent != NULL))) {
 801b730:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b732:	f004 fdbf 	bl	80202b4 <tcp_rexmit_rto_prepare>
 801b736:	4603      	mov	r3, r0
 801b738:	2b00      	cmp	r3, #0
 801b73a:	d007      	beq.n	801b74c <tcp_slowtmr+0x220>
 801b73c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b73e:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801b740:	2b00      	cmp	r3, #0
 801b742:	d171      	bne.n	801b828 <tcp_slowtmr+0x2fc>
 801b744:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b746:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801b748:	2b00      	cmp	r3, #0
 801b74a:	d06d      	beq.n	801b828 <tcp_slowtmr+0x2fc>
            if (pcb->state != SYN_SENT) {
 801b74c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b74e:	7d1b      	ldrb	r3, [r3, #20]
 801b750:	2b02      	cmp	r3, #2
 801b752:	d03a      	beq.n	801b7ca <tcp_slowtmr+0x29e>
              u8_t backoff_idx = LWIP_MIN(pcb->nrtx, sizeof(tcp_backoff) - 1);
 801b754:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b756:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801b75a:	2b0c      	cmp	r3, #12
 801b75c:	bf28      	it	cs
 801b75e:	230c      	movcs	r3, #12
 801b760:	76fb      	strb	r3, [r7, #27]
              int calc_rto = ((pcb->sa >> 3) + pcb->sv) << tcp_backoff[backoff_idx];
 801b762:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b764:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801b768:	10db      	asrs	r3, r3, #3
 801b76a:	b21b      	sxth	r3, r3
 801b76c:	461a      	mov	r2, r3
 801b76e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b770:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801b774:	4413      	add	r3, r2
 801b776:	7efa      	ldrb	r2, [r7, #27]
 801b778:	4910      	ldr	r1, [pc, #64]	@ (801b7bc <tcp_slowtmr+0x290>)
 801b77a:	5c8a      	ldrb	r2, [r1, r2]
 801b77c:	4093      	lsls	r3, r2
 801b77e:	617b      	str	r3, [r7, #20]
              pcb->rto = (s16_t)LWIP_MIN(calc_rto, 0x7FFF);
 801b780:	697b      	ldr	r3, [r7, #20]
 801b782:	f647 72fe 	movw	r2, #32766	@ 0x7ffe
 801b786:	4293      	cmp	r3, r2
 801b788:	dc1a      	bgt.n	801b7c0 <tcp_slowtmr+0x294>
 801b78a:	697b      	ldr	r3, [r7, #20]
 801b78c:	b21a      	sxth	r2, r3
 801b78e:	e019      	b.n	801b7c4 <tcp_slowtmr+0x298>
 801b790:	2402ae88 	.word	0x2402ae88
 801b794:	2402ae9e 	.word	0x2402ae9e
 801b798:	2402ae94 	.word	0x2402ae94
 801b79c:	0802e5f0 	.word	0x0802e5f0
 801b7a0:	0802e934 	.word	0x0802e934
 801b7a4:	0802e634 	.word	0x0802e634
 801b7a8:	0802e960 	.word	0x0802e960
 801b7ac:	0802e98c 	.word	0x0802e98c
 801b7b0:	0802e9bc 	.word	0x0802e9bc
 801b7b4:	0802e9f0 	.word	0x0802e9f0
 801b7b8:	08030c28 	.word	0x08030c28
 801b7bc:	08030c18 	.word	0x08030c18
 801b7c0:	f647 72ff 	movw	r2, #32767	@ 0x7fff
 801b7c4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b7c6:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40
            pcb->rtime = 0;
 801b7ca:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b7cc:	2200      	movs	r2, #0
 801b7ce:	861a      	strh	r2, [r3, #48]	@ 0x30
            eff_wnd = LWIP_MIN(pcb->cwnd, pcb->snd_wnd);
 801b7d0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b7d2:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801b7d6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b7d8:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801b7dc:	4293      	cmp	r3, r2
 801b7de:	bf28      	it	cs
 801b7e0:	4613      	movcs	r3, r2
 801b7e2:	827b      	strh	r3, [r7, #18]
            pcb->ssthresh = eff_wnd >> 1;
 801b7e4:	8a7b      	ldrh	r3, [r7, #18]
 801b7e6:	085b      	lsrs	r3, r3, #1
 801b7e8:	b29a      	uxth	r2, r3
 801b7ea:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b7ec:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
            if (pcb->ssthresh < (tcpwnd_size_t)(pcb->mss << 1)) {
 801b7f0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b7f2:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 801b7f6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b7f8:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801b7fa:	005b      	lsls	r3, r3, #1
 801b7fc:	b29b      	uxth	r3, r3
 801b7fe:	429a      	cmp	r2, r3
 801b800:	d206      	bcs.n	801b810 <tcp_slowtmr+0x2e4>
              pcb->ssthresh = (tcpwnd_size_t)(pcb->mss << 1);
 801b802:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b804:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801b806:	005b      	lsls	r3, r3, #1
 801b808:	b29a      	uxth	r2, r3
 801b80a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b80c:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
            pcb->cwnd = pcb->mss;
 801b810:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b812:	8e5a      	ldrh	r2, [r3, #50]	@ 0x32
 801b814:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b816:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
            pcb->bytes_acked = 0;
 801b81a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b81c:	2200      	movs	r2, #0
 801b81e:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
            tcp_rexmit_rto_commit(pcb);
 801b822:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b824:	f004 fdc0 	bl	80203a8 <tcp_rexmit_rto_commit>
    if (pcb->state == FIN_WAIT_2) {
 801b828:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b82a:	7d1b      	ldrb	r3, [r3, #20]
 801b82c:	2b06      	cmp	r3, #6
 801b82e:	d111      	bne.n	801b854 <tcp_slowtmr+0x328>
      if (pcb->flags & TF_RXCLOSED) {
 801b830:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b832:	8b5b      	ldrh	r3, [r3, #26]
 801b834:	f003 0310 	and.w	r3, r3, #16
 801b838:	2b00      	cmp	r3, #0
 801b83a:	d00b      	beq.n	801b854 <tcp_slowtmr+0x328>
        if ((u32_t)(tcp_ticks - pcb->tmr) >
 801b83c:	4b9c      	ldr	r3, [pc, #624]	@ (801bab0 <tcp_slowtmr+0x584>)
 801b83e:	681a      	ldr	r2, [r3, #0]
 801b840:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b842:	6a1b      	ldr	r3, [r3, #32]
 801b844:	1ad3      	subs	r3, r2, r3
 801b846:	2b28      	cmp	r3, #40	@ 0x28
 801b848:	d904      	bls.n	801b854 <tcp_slowtmr+0x328>
          ++pcb_remove;
 801b84a:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b84e:	3301      	adds	r3, #1
 801b850:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (ip_get_option(pcb, SOF_KEEPALIVE) &&
 801b854:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b856:	7a5b      	ldrb	r3, [r3, #9]
 801b858:	f003 0308 	and.w	r3, r3, #8
 801b85c:	2b00      	cmp	r3, #0
 801b85e:	d04a      	beq.n	801b8f6 <tcp_slowtmr+0x3ca>
        ((pcb->state == ESTABLISHED) ||
 801b860:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b862:	7d1b      	ldrb	r3, [r3, #20]
    if (ip_get_option(pcb, SOF_KEEPALIVE) &&
 801b864:	2b04      	cmp	r3, #4
 801b866:	d003      	beq.n	801b870 <tcp_slowtmr+0x344>
         (pcb->state == CLOSE_WAIT))) {
 801b868:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b86a:	7d1b      	ldrb	r3, [r3, #20]
        ((pcb->state == ESTABLISHED) ||
 801b86c:	2b07      	cmp	r3, #7
 801b86e:	d142      	bne.n	801b8f6 <tcp_slowtmr+0x3ca>
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801b870:	4b8f      	ldr	r3, [pc, #572]	@ (801bab0 <tcp_slowtmr+0x584>)
 801b872:	681a      	ldr	r2, [r3, #0]
 801b874:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b876:	6a1b      	ldr	r3, [r3, #32]
 801b878:	1ad2      	subs	r2, r2, r3
          (pcb->keep_idle + TCP_KEEP_DUR(pcb)) / TCP_SLOW_INTERVAL) {
 801b87a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b87c:	f8d3 1094 	ldr.w	r1, [r3, #148]	@ 0x94
 801b880:	4b8c      	ldr	r3, [pc, #560]	@ (801bab4 <tcp_slowtmr+0x588>)
 801b882:	440b      	add	r3, r1
 801b884:	498c      	ldr	r1, [pc, #560]	@ (801bab8 <tcp_slowtmr+0x58c>)
 801b886:	fba1 1303 	umull	r1, r3, r1, r3
 801b88a:	095b      	lsrs	r3, r3, #5
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801b88c:	429a      	cmp	r2, r3
 801b88e:	d90a      	bls.n	801b8a6 <tcp_slowtmr+0x37a>
        ++pcb_remove;
 801b890:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b894:	3301      	adds	r3, #1
 801b896:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
        ++pcb_reset;
 801b89a:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801b89e:	3301      	adds	r3, #1
 801b8a0:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
 801b8a4:	e027      	b.n	801b8f6 <tcp_slowtmr+0x3ca>
      } else if ((u32_t)(tcp_ticks - pcb->tmr) >
 801b8a6:	4b82      	ldr	r3, [pc, #520]	@ (801bab0 <tcp_slowtmr+0x584>)
 801b8a8:	681a      	ldr	r2, [r3, #0]
 801b8aa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b8ac:	6a1b      	ldr	r3, [r3, #32]
 801b8ae:	1ad2      	subs	r2, r2, r3
                 (pcb->keep_idle + pcb->keep_cnt_sent * TCP_KEEP_INTVL(pcb))
 801b8b0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b8b2:	f8d3 1094 	ldr.w	r1, [r3, #148]	@ 0x94
 801b8b6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b8b8:	f893 309b 	ldrb.w	r3, [r3, #155]	@ 0x9b
 801b8bc:	4618      	mov	r0, r3
 801b8be:	4b7f      	ldr	r3, [pc, #508]	@ (801babc <tcp_slowtmr+0x590>)
 801b8c0:	fb00 f303 	mul.w	r3, r0, r3
 801b8c4:	440b      	add	r3, r1
                 / TCP_SLOW_INTERVAL) {
 801b8c6:	497c      	ldr	r1, [pc, #496]	@ (801bab8 <tcp_slowtmr+0x58c>)
 801b8c8:	fba1 1303 	umull	r1, r3, r1, r3
 801b8cc:	095b      	lsrs	r3, r3, #5
      } else if ((u32_t)(tcp_ticks - pcb->tmr) >
 801b8ce:	429a      	cmp	r2, r3
 801b8d0:	d911      	bls.n	801b8f6 <tcp_slowtmr+0x3ca>
        err = tcp_keepalive(pcb);
 801b8d2:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b8d4:	f005 f86c 	bl	80209b0 <tcp_keepalive>
 801b8d8:	4603      	mov	r3, r0
 801b8da:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
        if (err == ERR_OK) {
 801b8de:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 801b8e2:	2b00      	cmp	r3, #0
 801b8e4:	d107      	bne.n	801b8f6 <tcp_slowtmr+0x3ca>
          pcb->keep_cnt_sent++;
 801b8e6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b8e8:	f893 309b 	ldrb.w	r3, [r3, #155]	@ 0x9b
 801b8ec:	3301      	adds	r3, #1
 801b8ee:	b2da      	uxtb	r2, r3
 801b8f0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b8f2:	f883 209b 	strb.w	r2, [r3, #155]	@ 0x9b
    if (pcb->ooseq != NULL &&
 801b8f6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b8f8:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801b8fa:	2b00      	cmp	r3, #0
 801b8fc:	d011      	beq.n	801b922 <tcp_slowtmr+0x3f6>
        (tcp_ticks - pcb->tmr >= (u32_t)pcb->rto * TCP_OOSEQ_TIMEOUT)) {
 801b8fe:	4b6c      	ldr	r3, [pc, #432]	@ (801bab0 <tcp_slowtmr+0x584>)
 801b900:	681a      	ldr	r2, [r3, #0]
 801b902:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b904:	6a1b      	ldr	r3, [r3, #32]
 801b906:	1ad2      	subs	r2, r2, r3
 801b908:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b90a:	f9b3 3040 	ldrsh.w	r3, [r3, #64]	@ 0x40
 801b90e:	4619      	mov	r1, r3
 801b910:	460b      	mov	r3, r1
 801b912:	005b      	lsls	r3, r3, #1
 801b914:	440b      	add	r3, r1
 801b916:	005b      	lsls	r3, r3, #1
    if (pcb->ooseq != NULL &&
 801b918:	429a      	cmp	r2, r3
 801b91a:	d302      	bcc.n	801b922 <tcp_slowtmr+0x3f6>
      tcp_free_ooseq(pcb);
 801b91c:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b91e:	f000 feb7 	bl	801c690 <tcp_free_ooseq>
    if (pcb->state == SYN_RCVD) {
 801b922:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b924:	7d1b      	ldrb	r3, [r3, #20]
 801b926:	2b03      	cmp	r3, #3
 801b928:	d10b      	bne.n	801b942 <tcp_slowtmr+0x416>
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801b92a:	4b61      	ldr	r3, [pc, #388]	@ (801bab0 <tcp_slowtmr+0x584>)
 801b92c:	681a      	ldr	r2, [r3, #0]
 801b92e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b930:	6a1b      	ldr	r3, [r3, #32]
 801b932:	1ad3      	subs	r3, r2, r3
 801b934:	2b28      	cmp	r3, #40	@ 0x28
 801b936:	d904      	bls.n	801b942 <tcp_slowtmr+0x416>
        ++pcb_remove;
 801b938:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b93c:	3301      	adds	r3, #1
 801b93e:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (pcb->state == LAST_ACK) {
 801b942:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b944:	7d1b      	ldrb	r3, [r3, #20]
 801b946:	2b09      	cmp	r3, #9
 801b948:	d10b      	bne.n	801b962 <tcp_slowtmr+0x436>
      if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) {
 801b94a:	4b59      	ldr	r3, [pc, #356]	@ (801bab0 <tcp_slowtmr+0x584>)
 801b94c:	681a      	ldr	r2, [r3, #0]
 801b94e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b950:	6a1b      	ldr	r3, [r3, #32]
 801b952:	1ad3      	subs	r3, r2, r3
 801b954:	2bf0      	cmp	r3, #240	@ 0xf0
 801b956:	d904      	bls.n	801b962 <tcp_slowtmr+0x436>
        ++pcb_remove;
 801b958:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b95c:	3301      	adds	r3, #1
 801b95e:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (pcb_remove) {
 801b962:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b966:	2b00      	cmp	r3, #0
 801b968:	d060      	beq.n	801ba2c <tcp_slowtmr+0x500>
      tcp_err_fn err_fn = pcb->errf;
 801b96a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b96c:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801b970:	60fb      	str	r3, [r7, #12]
      tcp_pcb_purge(pcb);
 801b972:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b974:	f000 fcd8 	bl	801c328 <tcp_pcb_purge>
      if (prev != NULL) {
 801b978:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801b97a:	2b00      	cmp	r3, #0
 801b97c:	d010      	beq.n	801b9a0 <tcp_slowtmr+0x474>
        LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_active_pcbs", pcb != tcp_active_pcbs);
 801b97e:	4b50      	ldr	r3, [pc, #320]	@ (801bac0 <tcp_slowtmr+0x594>)
 801b980:	681b      	ldr	r3, [r3, #0]
 801b982:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801b984:	429a      	cmp	r2, r3
 801b986:	d106      	bne.n	801b996 <tcp_slowtmr+0x46a>
 801b988:	4b4e      	ldr	r3, [pc, #312]	@ (801bac4 <tcp_slowtmr+0x598>)
 801b98a:	f240 526d 	movw	r2, #1389	@ 0x56d
 801b98e:	494e      	ldr	r1, [pc, #312]	@ (801bac8 <tcp_slowtmr+0x59c>)
 801b990:	484e      	ldr	r0, [pc, #312]	@ (801bacc <tcp_slowtmr+0x5a0>)
 801b992:	f00e f823 	bl	80299dc <iprintf>
        prev->next = pcb->next;
 801b996:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b998:	68da      	ldr	r2, [r3, #12]
 801b99a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801b99c:	60da      	str	r2, [r3, #12]
 801b99e:	e00f      	b.n	801b9c0 <tcp_slowtmr+0x494>
        LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_active_pcbs", tcp_active_pcbs == pcb);
 801b9a0:	4b47      	ldr	r3, [pc, #284]	@ (801bac0 <tcp_slowtmr+0x594>)
 801b9a2:	681b      	ldr	r3, [r3, #0]
 801b9a4:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801b9a6:	429a      	cmp	r2, r3
 801b9a8:	d006      	beq.n	801b9b8 <tcp_slowtmr+0x48c>
 801b9aa:	4b46      	ldr	r3, [pc, #280]	@ (801bac4 <tcp_slowtmr+0x598>)
 801b9ac:	f240 5271 	movw	r2, #1393	@ 0x571
 801b9b0:	4947      	ldr	r1, [pc, #284]	@ (801bad0 <tcp_slowtmr+0x5a4>)
 801b9b2:	4846      	ldr	r0, [pc, #280]	@ (801bacc <tcp_slowtmr+0x5a0>)
 801b9b4:	f00e f812 	bl	80299dc <iprintf>
        tcp_active_pcbs = pcb->next;
 801b9b8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b9ba:	68db      	ldr	r3, [r3, #12]
 801b9bc:	4a40      	ldr	r2, [pc, #256]	@ (801bac0 <tcp_slowtmr+0x594>)
 801b9be:	6013      	str	r3, [r2, #0]
      if (pcb_reset) {
 801b9c0:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801b9c4:	2b00      	cmp	r3, #0
 801b9c6:	d013      	beq.n	801b9f0 <tcp_slowtmr+0x4c4>
        tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip,
 801b9c8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b9ca:	6d18      	ldr	r0, [r3, #80]	@ 0x50
 801b9cc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b9ce:	6a5c      	ldr	r4, [r3, #36]	@ 0x24
 801b9d0:	6afd      	ldr	r5, [r7, #44]	@ 0x2c
 801b9d2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b9d4:	3304      	adds	r3, #4
 801b9d6:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801b9d8:	8ad2      	ldrh	r2, [r2, #22]
 801b9da:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 801b9dc:	8b09      	ldrh	r1, [r1, #24]
 801b9de:	9102      	str	r1, [sp, #8]
 801b9e0:	9201      	str	r2, [sp, #4]
 801b9e2:	9300      	str	r3, [sp, #0]
 801b9e4:	462b      	mov	r3, r5
 801b9e6:	4622      	mov	r2, r4
 801b9e8:	4601      	mov	r1, r0
 801b9ea:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b9ec:	f004 ff2c 	bl	8020848 <tcp_rst>
      err_arg = pcb->callback_arg;
 801b9f0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b9f2:	691b      	ldr	r3, [r3, #16]
 801b9f4:	60bb      	str	r3, [r7, #8]
      last_state = pcb->state;
 801b9f6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b9f8:	7d1b      	ldrb	r3, [r3, #20]
 801b9fa:	71fb      	strb	r3, [r7, #7]
      pcb2 = pcb;
 801b9fc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b9fe:	603b      	str	r3, [r7, #0]
      pcb = pcb->next;
 801ba00:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801ba02:	68db      	ldr	r3, [r3, #12]
 801ba04:	62fb      	str	r3, [r7, #44]	@ 0x2c
      tcp_free(pcb2);
 801ba06:	6838      	ldr	r0, [r7, #0]
 801ba08:	f7ff f82c 	bl	801aa64 <tcp_free>
      tcp_active_pcbs_changed = 0;
 801ba0c:	4b31      	ldr	r3, [pc, #196]	@ (801bad4 <tcp_slowtmr+0x5a8>)
 801ba0e:	2200      	movs	r2, #0
 801ba10:	701a      	strb	r2, [r3, #0]
      TCP_EVENT_ERR(last_state, err_fn, err_arg, ERR_ABRT);
 801ba12:	68fb      	ldr	r3, [r7, #12]
 801ba14:	2b00      	cmp	r3, #0
 801ba16:	d004      	beq.n	801ba22 <tcp_slowtmr+0x4f6>
 801ba18:	68fb      	ldr	r3, [r7, #12]
 801ba1a:	f06f 010c 	mvn.w	r1, #12
 801ba1e:	68b8      	ldr	r0, [r7, #8]
 801ba20:	4798      	blx	r3
      if (tcp_active_pcbs_changed) {
 801ba22:	4b2c      	ldr	r3, [pc, #176]	@ (801bad4 <tcp_slowtmr+0x5a8>)
 801ba24:	781b      	ldrb	r3, [r3, #0]
 801ba26:	2b00      	cmp	r3, #0
 801ba28:	d037      	beq.n	801ba9a <tcp_slowtmr+0x56e>
        goto tcp_slowtmr_start;
 801ba2a:	e592      	b.n	801b552 <tcp_slowtmr+0x26>
      prev = pcb;
 801ba2c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801ba2e:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801ba30:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801ba32:	68db      	ldr	r3, [r3, #12]
 801ba34:	62fb      	str	r3, [r7, #44]	@ 0x2c
      ++prev->polltmr;
 801ba36:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801ba38:	7f1b      	ldrb	r3, [r3, #28]
 801ba3a:	3301      	adds	r3, #1
 801ba3c:	b2da      	uxtb	r2, r3
 801ba3e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801ba40:	771a      	strb	r2, [r3, #28]
      if (prev->polltmr >= prev->pollinterval) {
 801ba42:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801ba44:	7f1a      	ldrb	r2, [r3, #28]
 801ba46:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801ba48:	7f5b      	ldrb	r3, [r3, #29]
 801ba4a:	429a      	cmp	r2, r3
 801ba4c:	d325      	bcc.n	801ba9a <tcp_slowtmr+0x56e>
        prev->polltmr = 0;
 801ba4e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801ba50:	2200      	movs	r2, #0
 801ba52:	771a      	strb	r2, [r3, #28]
        tcp_active_pcbs_changed = 0;
 801ba54:	4b1f      	ldr	r3, [pc, #124]	@ (801bad4 <tcp_slowtmr+0x5a8>)
 801ba56:	2200      	movs	r2, #0
 801ba58:	701a      	strb	r2, [r3, #0]
        TCP_EVENT_POLL(prev, err);
 801ba5a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801ba5c:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 801ba60:	2b00      	cmp	r3, #0
 801ba62:	d00b      	beq.n	801ba7c <tcp_slowtmr+0x550>
 801ba64:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801ba66:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 801ba6a:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 801ba6c:	6912      	ldr	r2, [r2, #16]
 801ba6e:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 801ba70:	4610      	mov	r0, r2
 801ba72:	4798      	blx	r3
 801ba74:	4603      	mov	r3, r0
 801ba76:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
 801ba7a:	e002      	b.n	801ba82 <tcp_slowtmr+0x556>
 801ba7c:	2300      	movs	r3, #0
 801ba7e:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
        if (tcp_active_pcbs_changed) {
 801ba82:	4b14      	ldr	r3, [pc, #80]	@ (801bad4 <tcp_slowtmr+0x5a8>)
 801ba84:	781b      	ldrb	r3, [r3, #0]
 801ba86:	2b00      	cmp	r3, #0
 801ba88:	f47f ad62 	bne.w	801b550 <tcp_slowtmr+0x24>
        }
        /* if err == ERR_ABRT, 'prev' is already deallocated */
        if (err == ERR_OK) {
 801ba8c:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 801ba90:	2b00      	cmp	r3, #0
 801ba92:	d102      	bne.n	801ba9a <tcp_slowtmr+0x56e>
          tcp_output(prev);
 801ba94:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 801ba96:	f004 f915 	bl	801fcc4 <tcp_output>
  while (pcb != NULL) {
 801ba9a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801ba9c:	2b00      	cmp	r3, #0
 801ba9e:	f47f ad5e 	bne.w	801b55e <tcp_slowtmr+0x32>
    }
  }


  /* Steps through all of the TIME-WAIT PCBs. */
  prev = NULL;
 801baa2:	2300      	movs	r3, #0
 801baa4:	62bb      	str	r3, [r7, #40]	@ 0x28
  pcb = tcp_tw_pcbs;
 801baa6:	4b0c      	ldr	r3, [pc, #48]	@ (801bad8 <tcp_slowtmr+0x5ac>)
 801baa8:	681b      	ldr	r3, [r3, #0]
 801baaa:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801baac:	e069      	b.n	801bb82 <tcp_slowtmr+0x656>
 801baae:	bf00      	nop
 801bab0:	2402ae88 	.word	0x2402ae88
 801bab4:	000a4cb8 	.word	0x000a4cb8
 801bab8:	10624dd3 	.word	0x10624dd3
 801babc:	000124f8 	.word	0x000124f8
 801bac0:	2402ae94 	.word	0x2402ae94
 801bac4:	0802e5f0 	.word	0x0802e5f0
 801bac8:	0802ea28 	.word	0x0802ea28
 801bacc:	0802e634 	.word	0x0802e634
 801bad0:	0802ea54 	.word	0x0802ea54
 801bad4:	2402ae9c 	.word	0x2402ae9c
 801bad8:	2402ae98 	.word	0x2402ae98
    LWIP_ASSERT("tcp_slowtmr: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT);
 801badc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bade:	7d1b      	ldrb	r3, [r3, #20]
 801bae0:	2b0a      	cmp	r3, #10
 801bae2:	d006      	beq.n	801baf2 <tcp_slowtmr+0x5c6>
 801bae4:	4b2b      	ldr	r3, [pc, #172]	@ (801bb94 <tcp_slowtmr+0x668>)
 801bae6:	f240 52a1 	movw	r2, #1441	@ 0x5a1
 801baea:	492b      	ldr	r1, [pc, #172]	@ (801bb98 <tcp_slowtmr+0x66c>)
 801baec:	482b      	ldr	r0, [pc, #172]	@ (801bb9c <tcp_slowtmr+0x670>)
 801baee:	f00d ff75 	bl	80299dc <iprintf>
    pcb_remove = 0;
 801baf2:	2300      	movs	r3, #0
 801baf4:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27

    /* Check if this PCB has stayed long enough in TIME-WAIT */
    if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) {
 801baf8:	4b29      	ldr	r3, [pc, #164]	@ (801bba0 <tcp_slowtmr+0x674>)
 801bafa:	681a      	ldr	r2, [r3, #0]
 801bafc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bafe:	6a1b      	ldr	r3, [r3, #32]
 801bb00:	1ad3      	subs	r3, r2, r3
 801bb02:	2bf0      	cmp	r3, #240	@ 0xf0
 801bb04:	d904      	bls.n	801bb10 <tcp_slowtmr+0x5e4>
      ++pcb_remove;
 801bb06:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801bb0a:	3301      	adds	r3, #1
 801bb0c:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    }

    /* If the PCB should be removed, do it. */
    if (pcb_remove) {
 801bb10:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801bb14:	2b00      	cmp	r3, #0
 801bb16:	d02f      	beq.n	801bb78 <tcp_slowtmr+0x64c>
      struct tcp_pcb *pcb2;
      tcp_pcb_purge(pcb);
 801bb18:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801bb1a:	f000 fc05 	bl	801c328 <tcp_pcb_purge>
      /* Remove PCB from tcp_tw_pcbs list. */
      if (prev != NULL) {
 801bb1e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801bb20:	2b00      	cmp	r3, #0
 801bb22:	d010      	beq.n	801bb46 <tcp_slowtmr+0x61a>
        LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_tw_pcbs", pcb != tcp_tw_pcbs);
 801bb24:	4b1f      	ldr	r3, [pc, #124]	@ (801bba4 <tcp_slowtmr+0x678>)
 801bb26:	681b      	ldr	r3, [r3, #0]
 801bb28:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801bb2a:	429a      	cmp	r2, r3
 801bb2c:	d106      	bne.n	801bb3c <tcp_slowtmr+0x610>
 801bb2e:	4b19      	ldr	r3, [pc, #100]	@ (801bb94 <tcp_slowtmr+0x668>)
 801bb30:	f240 52af 	movw	r2, #1455	@ 0x5af
 801bb34:	491c      	ldr	r1, [pc, #112]	@ (801bba8 <tcp_slowtmr+0x67c>)
 801bb36:	4819      	ldr	r0, [pc, #100]	@ (801bb9c <tcp_slowtmr+0x670>)
 801bb38:	f00d ff50 	bl	80299dc <iprintf>
        prev->next = pcb->next;
 801bb3c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bb3e:	68da      	ldr	r2, [r3, #12]
 801bb40:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801bb42:	60da      	str	r2, [r3, #12]
 801bb44:	e00f      	b.n	801bb66 <tcp_slowtmr+0x63a>
      } else {
        /* This PCB was the first. */
        LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_tw_pcbs", tcp_tw_pcbs == pcb);
 801bb46:	4b17      	ldr	r3, [pc, #92]	@ (801bba4 <tcp_slowtmr+0x678>)
 801bb48:	681b      	ldr	r3, [r3, #0]
 801bb4a:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801bb4c:	429a      	cmp	r2, r3
 801bb4e:	d006      	beq.n	801bb5e <tcp_slowtmr+0x632>
 801bb50:	4b10      	ldr	r3, [pc, #64]	@ (801bb94 <tcp_slowtmr+0x668>)
 801bb52:	f240 52b3 	movw	r2, #1459	@ 0x5b3
 801bb56:	4915      	ldr	r1, [pc, #84]	@ (801bbac <tcp_slowtmr+0x680>)
 801bb58:	4810      	ldr	r0, [pc, #64]	@ (801bb9c <tcp_slowtmr+0x670>)
 801bb5a:	f00d ff3f 	bl	80299dc <iprintf>
        tcp_tw_pcbs = pcb->next;
 801bb5e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bb60:	68db      	ldr	r3, [r3, #12]
 801bb62:	4a10      	ldr	r2, [pc, #64]	@ (801bba4 <tcp_slowtmr+0x678>)
 801bb64:	6013      	str	r3, [r2, #0]
      }
      pcb2 = pcb;
 801bb66:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bb68:	61fb      	str	r3, [r7, #28]
      pcb = pcb->next;
 801bb6a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bb6c:	68db      	ldr	r3, [r3, #12]
 801bb6e:	62fb      	str	r3, [r7, #44]	@ 0x2c
      tcp_free(pcb2);
 801bb70:	69f8      	ldr	r0, [r7, #28]
 801bb72:	f7fe ff77 	bl	801aa64 <tcp_free>
 801bb76:	e004      	b.n	801bb82 <tcp_slowtmr+0x656>
    } else {
      prev = pcb;
 801bb78:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bb7a:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801bb7c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bb7e:	68db      	ldr	r3, [r3, #12]
 801bb80:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801bb82:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bb84:	2b00      	cmp	r3, #0
 801bb86:	d1a9      	bne.n	801badc <tcp_slowtmr+0x5b0>
    }
  }
}
 801bb88:	bf00      	nop
 801bb8a:	bf00      	nop
 801bb8c:	3730      	adds	r7, #48	@ 0x30
 801bb8e:	46bd      	mov	sp, r7
 801bb90:	bdb0      	pop	{r4, r5, r7, pc}
 801bb92:	bf00      	nop
 801bb94:	0802e5f0 	.word	0x0802e5f0
 801bb98:	0802ea80 	.word	0x0802ea80
 801bb9c:	0802e634 	.word	0x0802e634
 801bba0:	2402ae88 	.word	0x2402ae88
 801bba4:	2402ae98 	.word	0x2402ae98
 801bba8:	0802eab0 	.word	0x0802eab0
 801bbac:	0802ead8 	.word	0x0802ead8

0801bbb0 <tcp_fasttmr>:
 *
 * Automatically called from tcp_tmr().
 */
void
tcp_fasttmr(void)
{
 801bbb0:	b580      	push	{r7, lr}
 801bbb2:	b082      	sub	sp, #8
 801bbb4:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb;

  ++tcp_timer_ctr;
 801bbb6:	4b2d      	ldr	r3, [pc, #180]	@ (801bc6c <tcp_fasttmr+0xbc>)
 801bbb8:	781b      	ldrb	r3, [r3, #0]
 801bbba:	3301      	adds	r3, #1
 801bbbc:	b2da      	uxtb	r2, r3
 801bbbe:	4b2b      	ldr	r3, [pc, #172]	@ (801bc6c <tcp_fasttmr+0xbc>)
 801bbc0:	701a      	strb	r2, [r3, #0]

tcp_fasttmr_start:
  pcb = tcp_active_pcbs;
 801bbc2:	4b2b      	ldr	r3, [pc, #172]	@ (801bc70 <tcp_fasttmr+0xc0>)
 801bbc4:	681b      	ldr	r3, [r3, #0]
 801bbc6:	607b      	str	r3, [r7, #4]

  while (pcb != NULL) {
 801bbc8:	e048      	b.n	801bc5c <tcp_fasttmr+0xac>
    if (pcb->last_timer != tcp_timer_ctr) {
 801bbca:	687b      	ldr	r3, [r7, #4]
 801bbcc:	7f9a      	ldrb	r2, [r3, #30]
 801bbce:	4b27      	ldr	r3, [pc, #156]	@ (801bc6c <tcp_fasttmr+0xbc>)
 801bbd0:	781b      	ldrb	r3, [r3, #0]
 801bbd2:	429a      	cmp	r2, r3
 801bbd4:	d03f      	beq.n	801bc56 <tcp_fasttmr+0xa6>
      struct tcp_pcb *next;
      pcb->last_timer = tcp_timer_ctr;
 801bbd6:	4b25      	ldr	r3, [pc, #148]	@ (801bc6c <tcp_fasttmr+0xbc>)
 801bbd8:	781a      	ldrb	r2, [r3, #0]
 801bbda:	687b      	ldr	r3, [r7, #4]
 801bbdc:	779a      	strb	r2, [r3, #30]
      /* send delayed ACKs */
      if (pcb->flags & TF_ACK_DELAY) {
 801bbde:	687b      	ldr	r3, [r7, #4]
 801bbe0:	8b5b      	ldrh	r3, [r3, #26]
 801bbe2:	f003 0301 	and.w	r3, r3, #1
 801bbe6:	2b00      	cmp	r3, #0
 801bbe8:	d010      	beq.n	801bc0c <tcp_fasttmr+0x5c>
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: delayed ACK\n"));
        tcp_ack_now(pcb);
 801bbea:	687b      	ldr	r3, [r7, #4]
 801bbec:	8b5b      	ldrh	r3, [r3, #26]
 801bbee:	f043 0302 	orr.w	r3, r3, #2
 801bbf2:	b29a      	uxth	r2, r3
 801bbf4:	687b      	ldr	r3, [r7, #4]
 801bbf6:	835a      	strh	r2, [r3, #26]
        tcp_output(pcb);
 801bbf8:	6878      	ldr	r0, [r7, #4]
 801bbfa:	f004 f863 	bl	801fcc4 <tcp_output>
        tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 801bbfe:	687b      	ldr	r3, [r7, #4]
 801bc00:	8b5b      	ldrh	r3, [r3, #26]
 801bc02:	f023 0303 	bic.w	r3, r3, #3
 801bc06:	b29a      	uxth	r2, r3
 801bc08:	687b      	ldr	r3, [r7, #4]
 801bc0a:	835a      	strh	r2, [r3, #26]
      }
      /* send pending FIN */
      if (pcb->flags & TF_CLOSEPEND) {
 801bc0c:	687b      	ldr	r3, [r7, #4]
 801bc0e:	8b5b      	ldrh	r3, [r3, #26]
 801bc10:	f003 0308 	and.w	r3, r3, #8
 801bc14:	2b00      	cmp	r3, #0
 801bc16:	d009      	beq.n	801bc2c <tcp_fasttmr+0x7c>
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: pending FIN\n"));
        tcp_clear_flags(pcb, TF_CLOSEPEND);
 801bc18:	687b      	ldr	r3, [r7, #4]
 801bc1a:	8b5b      	ldrh	r3, [r3, #26]
 801bc1c:	f023 0308 	bic.w	r3, r3, #8
 801bc20:	b29a      	uxth	r2, r3
 801bc22:	687b      	ldr	r3, [r7, #4]
 801bc24:	835a      	strh	r2, [r3, #26]
        tcp_close_shutdown_fin(pcb);
 801bc26:	6878      	ldr	r0, [r7, #4]
 801bc28:	f7ff f8b0 	bl	801ad8c <tcp_close_shutdown_fin>
      }

      next = pcb->next;
 801bc2c:	687b      	ldr	r3, [r7, #4]
 801bc2e:	68db      	ldr	r3, [r3, #12]
 801bc30:	603b      	str	r3, [r7, #0]

      /* If there is data which was previously "refused" by upper layer */
      if (pcb->refused_data != NULL) {
 801bc32:	687b      	ldr	r3, [r7, #4]
 801bc34:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801bc36:	2b00      	cmp	r3, #0
 801bc38:	d00a      	beq.n	801bc50 <tcp_fasttmr+0xa0>
        tcp_active_pcbs_changed = 0;
 801bc3a:	4b0e      	ldr	r3, [pc, #56]	@ (801bc74 <tcp_fasttmr+0xc4>)
 801bc3c:	2200      	movs	r2, #0
 801bc3e:	701a      	strb	r2, [r3, #0]
        tcp_process_refused_data(pcb);
 801bc40:	6878      	ldr	r0, [r7, #4]
 801bc42:	f000 f819 	bl	801bc78 <tcp_process_refused_data>
        if (tcp_active_pcbs_changed) {
 801bc46:	4b0b      	ldr	r3, [pc, #44]	@ (801bc74 <tcp_fasttmr+0xc4>)
 801bc48:	781b      	ldrb	r3, [r3, #0]
 801bc4a:	2b00      	cmp	r3, #0
 801bc4c:	d000      	beq.n	801bc50 <tcp_fasttmr+0xa0>
          /* application callback has changed the pcb list: restart the loop */
          goto tcp_fasttmr_start;
 801bc4e:	e7b8      	b.n	801bbc2 <tcp_fasttmr+0x12>
        }
      }
      pcb = next;
 801bc50:	683b      	ldr	r3, [r7, #0]
 801bc52:	607b      	str	r3, [r7, #4]
 801bc54:	e002      	b.n	801bc5c <tcp_fasttmr+0xac>
    } else {
      pcb = pcb->next;
 801bc56:	687b      	ldr	r3, [r7, #4]
 801bc58:	68db      	ldr	r3, [r3, #12]
 801bc5a:	607b      	str	r3, [r7, #4]
  while (pcb != NULL) {
 801bc5c:	687b      	ldr	r3, [r7, #4]
 801bc5e:	2b00      	cmp	r3, #0
 801bc60:	d1b3      	bne.n	801bbca <tcp_fasttmr+0x1a>
    }
  }
}
 801bc62:	bf00      	nop
 801bc64:	bf00      	nop
 801bc66:	3708      	adds	r7, #8
 801bc68:	46bd      	mov	sp, r7
 801bc6a:	bd80      	pop	{r7, pc}
 801bc6c:	2402ae9e 	.word	0x2402ae9e
 801bc70:	2402ae94 	.word	0x2402ae94
 801bc74:	2402ae9c 	.word	0x2402ae9c

0801bc78 <tcp_process_refused_data>:
}

/** Pass pcb->refused_data to the recv callback */
err_t
tcp_process_refused_data(struct tcp_pcb *pcb)
{
 801bc78:	b590      	push	{r4, r7, lr}
 801bc7a:	b085      	sub	sp, #20
 801bc7c:	af00      	add	r7, sp, #0
 801bc7e:	6078      	str	r0, [r7, #4]
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
  struct pbuf *rest;
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */

  LWIP_ERROR("tcp_process_refused_data: invalid pcb", pcb != NULL, return ERR_ARG);
 801bc80:	687b      	ldr	r3, [r7, #4]
 801bc82:	2b00      	cmp	r3, #0
 801bc84:	d109      	bne.n	801bc9a <tcp_process_refused_data+0x22>
 801bc86:	4b38      	ldr	r3, [pc, #224]	@ (801bd68 <tcp_process_refused_data+0xf0>)
 801bc88:	f240 6209 	movw	r2, #1545	@ 0x609
 801bc8c:	4937      	ldr	r1, [pc, #220]	@ (801bd6c <tcp_process_refused_data+0xf4>)
 801bc8e:	4838      	ldr	r0, [pc, #224]	@ (801bd70 <tcp_process_refused_data+0xf8>)
 801bc90:	f00d fea4 	bl	80299dc <iprintf>
 801bc94:	f06f 030f 	mvn.w	r3, #15
 801bc98:	e061      	b.n	801bd5e <tcp_process_refused_data+0xe6>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
  while (pcb->refused_data != NULL)
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
  {
    err_t err;
    u8_t refused_flags = pcb->refused_data->flags;
 801bc9a:	687b      	ldr	r3, [r7, #4]
 801bc9c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801bc9e:	7b5b      	ldrb	r3, [r3, #13]
 801bca0:	73bb      	strb	r3, [r7, #14]
    /* set pcb->refused_data to NULL in case the callback frees it and then
       closes the pcb */
    struct pbuf *refused_data = pcb->refused_data;
 801bca2:	687b      	ldr	r3, [r7, #4]
 801bca4:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801bca6:	60bb      	str	r3, [r7, #8]
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
    pbuf_split_64k(refused_data, &rest);
    pcb->refused_data = rest;
#else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
    pcb->refused_data = NULL;
 801bca8:	687b      	ldr	r3, [r7, #4]
 801bcaa:	2200      	movs	r2, #0
 801bcac:	679a      	str	r2, [r3, #120]	@ 0x78
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
    /* Notify again application with data previously received. */
    LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: notify kept packet\n"));
    TCP_EVENT_RECV(pcb, refused_data, ERR_OK, err);
 801bcae:	687b      	ldr	r3, [r7, #4]
 801bcb0:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801bcb4:	2b00      	cmp	r3, #0
 801bcb6:	d00b      	beq.n	801bcd0 <tcp_process_refused_data+0x58>
 801bcb8:	687b      	ldr	r3, [r7, #4]
 801bcba:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801bcbe:	687b      	ldr	r3, [r7, #4]
 801bcc0:	6918      	ldr	r0, [r3, #16]
 801bcc2:	2300      	movs	r3, #0
 801bcc4:	68ba      	ldr	r2, [r7, #8]
 801bcc6:	6879      	ldr	r1, [r7, #4]
 801bcc8:	47a0      	blx	r4
 801bcca:	4603      	mov	r3, r0
 801bccc:	73fb      	strb	r3, [r7, #15]
 801bcce:	e007      	b.n	801bce0 <tcp_process_refused_data+0x68>
 801bcd0:	2300      	movs	r3, #0
 801bcd2:	68ba      	ldr	r2, [r7, #8]
 801bcd4:	6879      	ldr	r1, [r7, #4]
 801bcd6:	2000      	movs	r0, #0
 801bcd8:	f000 f8a6 	bl	801be28 <tcp_recv_null>
 801bcdc:	4603      	mov	r3, r0
 801bcde:	73fb      	strb	r3, [r7, #15]
    if (err == ERR_OK) {
 801bce0:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801bce4:	2b00      	cmp	r3, #0
 801bce6:	d12b      	bne.n	801bd40 <tcp_process_refused_data+0xc8>
      /* did refused_data include a FIN? */
      if ((refused_flags & PBUF_FLAG_TCP_FIN)
 801bce8:	7bbb      	ldrb	r3, [r7, #14]
 801bcea:	f003 0320 	and.w	r3, r3, #32
 801bcee:	2b00      	cmp	r3, #0
 801bcf0:	d034      	beq.n	801bd5c <tcp_process_refused_data+0xe4>
          && (rest == NULL)
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
         ) {
        /* correct rcv_wnd as the application won't call tcp_recved()
           for the FIN's seqno */
        if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) {
 801bcf2:	687b      	ldr	r3, [r7, #4]
 801bcf4:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801bcf6:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801bcfa:	4293      	cmp	r3, r2
 801bcfc:	d005      	beq.n	801bd0a <tcp_process_refused_data+0x92>
          pcb->rcv_wnd++;
 801bcfe:	687b      	ldr	r3, [r7, #4]
 801bd00:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801bd02:	3301      	adds	r3, #1
 801bd04:	b29a      	uxth	r2, r3
 801bd06:	687b      	ldr	r3, [r7, #4]
 801bd08:	851a      	strh	r2, [r3, #40]	@ 0x28
        }
        TCP_EVENT_CLOSED(pcb, err);
 801bd0a:	687b      	ldr	r3, [r7, #4]
 801bd0c:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801bd10:	2b00      	cmp	r3, #0
 801bd12:	d00b      	beq.n	801bd2c <tcp_process_refused_data+0xb4>
 801bd14:	687b      	ldr	r3, [r7, #4]
 801bd16:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801bd1a:	687b      	ldr	r3, [r7, #4]
 801bd1c:	6918      	ldr	r0, [r3, #16]
 801bd1e:	2300      	movs	r3, #0
 801bd20:	2200      	movs	r2, #0
 801bd22:	6879      	ldr	r1, [r7, #4]
 801bd24:	47a0      	blx	r4
 801bd26:	4603      	mov	r3, r0
 801bd28:	73fb      	strb	r3, [r7, #15]
 801bd2a:	e001      	b.n	801bd30 <tcp_process_refused_data+0xb8>
 801bd2c:	2300      	movs	r3, #0
 801bd2e:	73fb      	strb	r3, [r7, #15]
        if (err == ERR_ABRT) {
 801bd30:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801bd34:	f113 0f0d 	cmn.w	r3, #13
 801bd38:	d110      	bne.n	801bd5c <tcp_process_refused_data+0xe4>
          return ERR_ABRT;
 801bd3a:	f06f 030c 	mvn.w	r3, #12
 801bd3e:	e00e      	b.n	801bd5e <tcp_process_refused_data+0xe6>
        }
      }
    } else if (err == ERR_ABRT) {
 801bd40:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801bd44:	f113 0f0d 	cmn.w	r3, #13
 801bd48:	d102      	bne.n	801bd50 <tcp_process_refused_data+0xd8>
      /* if err == ERR_ABRT, 'pcb' is already deallocated */
      /* Drop incoming packets because pcb is "full" (only if the incoming
         segment contains data). */
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: drop incoming packets, because pcb is \"full\"\n"));
      return ERR_ABRT;
 801bd4a:	f06f 030c 	mvn.w	r3, #12
 801bd4e:	e006      	b.n	801bd5e <tcp_process_refused_data+0xe6>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
      if (rest != NULL) {
        pbuf_cat(refused_data, rest);
      }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
      pcb->refused_data = refused_data;
 801bd50:	687b      	ldr	r3, [r7, #4]
 801bd52:	68ba      	ldr	r2, [r7, #8]
 801bd54:	679a      	str	r2, [r3, #120]	@ 0x78
      return ERR_INPROGRESS;
 801bd56:	f06f 0304 	mvn.w	r3, #4
 801bd5a:	e000      	b.n	801bd5e <tcp_process_refused_data+0xe6>
    }
  }
  return ERR_OK;
 801bd5c:	2300      	movs	r3, #0
}
 801bd5e:	4618      	mov	r0, r3
 801bd60:	3714      	adds	r7, #20
 801bd62:	46bd      	mov	sp, r7
 801bd64:	bd90      	pop	{r4, r7, pc}
 801bd66:	bf00      	nop
 801bd68:	0802e5f0 	.word	0x0802e5f0
 801bd6c:	0802eb00 	.word	0x0802eb00
 801bd70:	0802e634 	.word	0x0802e634

0801bd74 <tcp_segs_free>:
 *
 * @param seg tcp_seg list of TCP segments to free
 */
void
tcp_segs_free(struct tcp_seg *seg)
{
 801bd74:	b580      	push	{r7, lr}
 801bd76:	b084      	sub	sp, #16
 801bd78:	af00      	add	r7, sp, #0
 801bd7a:	6078      	str	r0, [r7, #4]
  while (seg != NULL) {
 801bd7c:	e007      	b.n	801bd8e <tcp_segs_free+0x1a>
    struct tcp_seg *next = seg->next;
 801bd7e:	687b      	ldr	r3, [r7, #4]
 801bd80:	681b      	ldr	r3, [r3, #0]
 801bd82:	60fb      	str	r3, [r7, #12]
    tcp_seg_free(seg);
 801bd84:	6878      	ldr	r0, [r7, #4]
 801bd86:	f000 f80a 	bl	801bd9e <tcp_seg_free>
    seg = next;
 801bd8a:	68fb      	ldr	r3, [r7, #12]
 801bd8c:	607b      	str	r3, [r7, #4]
  while (seg != NULL) {
 801bd8e:	687b      	ldr	r3, [r7, #4]
 801bd90:	2b00      	cmp	r3, #0
 801bd92:	d1f4      	bne.n	801bd7e <tcp_segs_free+0xa>
  }
}
 801bd94:	bf00      	nop
 801bd96:	bf00      	nop
 801bd98:	3710      	adds	r7, #16
 801bd9a:	46bd      	mov	sp, r7
 801bd9c:	bd80      	pop	{r7, pc}

0801bd9e <tcp_seg_free>:
 *
 * @param seg single tcp_seg to free
 */
void
tcp_seg_free(struct tcp_seg *seg)
{
 801bd9e:	b580      	push	{r7, lr}
 801bda0:	b082      	sub	sp, #8
 801bda2:	af00      	add	r7, sp, #0
 801bda4:	6078      	str	r0, [r7, #4]
  if (seg != NULL) {
 801bda6:	687b      	ldr	r3, [r7, #4]
 801bda8:	2b00      	cmp	r3, #0
 801bdaa:	d00c      	beq.n	801bdc6 <tcp_seg_free+0x28>
    if (seg->p != NULL) {
 801bdac:	687b      	ldr	r3, [r7, #4]
 801bdae:	685b      	ldr	r3, [r3, #4]
 801bdb0:	2b00      	cmp	r3, #0
 801bdb2:	d004      	beq.n	801bdbe <tcp_seg_free+0x20>
      pbuf_free(seg->p);
 801bdb4:	687b      	ldr	r3, [r7, #4]
 801bdb6:	685b      	ldr	r3, [r3, #4]
 801bdb8:	4618      	mov	r0, r3
 801bdba:	f7fe fb97 	bl	801a4ec <pbuf_free>
#if TCP_DEBUG
      seg->p = NULL;
#endif /* TCP_DEBUG */
    }
    memp_free(MEMP_TCP_SEG, seg);
 801bdbe:	6879      	ldr	r1, [r7, #4]
 801bdc0:	2003      	movs	r0, #3
 801bdc2:	f7fd fca5 	bl	8019710 <memp_free>
  }
}
 801bdc6:	bf00      	nop
 801bdc8:	3708      	adds	r7, #8
 801bdca:	46bd      	mov	sp, r7
 801bdcc:	bd80      	pop	{r7, pc}
	...

0801bdd0 <tcp_seg_copy>:
 * @param seg the old tcp_seg
 * @return a copy of seg
 */
struct tcp_seg *
tcp_seg_copy(struct tcp_seg *seg)
{
 801bdd0:	b580      	push	{r7, lr}
 801bdd2:	b084      	sub	sp, #16
 801bdd4:	af00      	add	r7, sp, #0
 801bdd6:	6078      	str	r0, [r7, #4]
  struct tcp_seg *cseg;

  LWIP_ASSERT("tcp_seg_copy: invalid seg", seg != NULL);
 801bdd8:	687b      	ldr	r3, [r7, #4]
 801bdda:	2b00      	cmp	r3, #0
 801bddc:	d106      	bne.n	801bdec <tcp_seg_copy+0x1c>
 801bdde:	4b0f      	ldr	r3, [pc, #60]	@ (801be1c <tcp_seg_copy+0x4c>)
 801bde0:	f240 6282 	movw	r2, #1666	@ 0x682
 801bde4:	490e      	ldr	r1, [pc, #56]	@ (801be20 <tcp_seg_copy+0x50>)
 801bde6:	480f      	ldr	r0, [pc, #60]	@ (801be24 <tcp_seg_copy+0x54>)
 801bde8:	f00d fdf8 	bl	80299dc <iprintf>

  cseg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG);
 801bdec:	2003      	movs	r0, #3
 801bdee:	f7fd fc19 	bl	8019624 <memp_malloc>
 801bdf2:	60f8      	str	r0, [r7, #12]
  if (cseg == NULL) {
 801bdf4:	68fb      	ldr	r3, [r7, #12]
 801bdf6:	2b00      	cmp	r3, #0
 801bdf8:	d101      	bne.n	801bdfe <tcp_seg_copy+0x2e>
    return NULL;
 801bdfa:	2300      	movs	r3, #0
 801bdfc:	e00a      	b.n	801be14 <tcp_seg_copy+0x44>
  }
  SMEMCPY((u8_t *)cseg, (const u8_t *)seg, sizeof(struct tcp_seg));
 801bdfe:	2214      	movs	r2, #20
 801be00:	6879      	ldr	r1, [r7, #4]
 801be02:	68f8      	ldr	r0, [r7, #12]
 801be04:	f00e f873 	bl	8029eee <memcpy>
  pbuf_ref(cseg->p);
 801be08:	68fb      	ldr	r3, [r7, #12]
 801be0a:	685b      	ldr	r3, [r3, #4]
 801be0c:	4618      	mov	r0, r3
 801be0e:	f7fe fc13 	bl	801a638 <pbuf_ref>
  return cseg;
 801be12:	68fb      	ldr	r3, [r7, #12]
}
 801be14:	4618      	mov	r0, r3
 801be16:	3710      	adds	r7, #16
 801be18:	46bd      	mov	sp, r7
 801be1a:	bd80      	pop	{r7, pc}
 801be1c:	0802e5f0 	.word	0x0802e5f0
 801be20:	0802eb44 	.word	0x0802eb44
 801be24:	0802e634 	.word	0x0802e634

0801be28 <tcp_recv_null>:
 * Default receive callback that is called if the user didn't register
 * a recv callback for the pcb.
 */
err_t
tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
{
 801be28:	b580      	push	{r7, lr}
 801be2a:	b084      	sub	sp, #16
 801be2c:	af00      	add	r7, sp, #0
 801be2e:	60f8      	str	r0, [r7, #12]
 801be30:	60b9      	str	r1, [r7, #8]
 801be32:	607a      	str	r2, [r7, #4]
 801be34:	70fb      	strb	r3, [r7, #3]
  LWIP_UNUSED_ARG(arg);

  LWIP_ERROR("tcp_recv_null: invalid pcb", pcb != NULL, return ERR_ARG);
 801be36:	68bb      	ldr	r3, [r7, #8]
 801be38:	2b00      	cmp	r3, #0
 801be3a:	d109      	bne.n	801be50 <tcp_recv_null+0x28>
 801be3c:	4b12      	ldr	r3, [pc, #72]	@ (801be88 <tcp_recv_null+0x60>)
 801be3e:	f44f 62d3 	mov.w	r2, #1688	@ 0x698
 801be42:	4912      	ldr	r1, [pc, #72]	@ (801be8c <tcp_recv_null+0x64>)
 801be44:	4812      	ldr	r0, [pc, #72]	@ (801be90 <tcp_recv_null+0x68>)
 801be46:	f00d fdc9 	bl	80299dc <iprintf>
 801be4a:	f06f 030f 	mvn.w	r3, #15
 801be4e:	e016      	b.n	801be7e <tcp_recv_null+0x56>

  if (p != NULL) {
 801be50:	687b      	ldr	r3, [r7, #4]
 801be52:	2b00      	cmp	r3, #0
 801be54:	d009      	beq.n	801be6a <tcp_recv_null+0x42>
    tcp_recved(pcb, p->tot_len);
 801be56:	687b      	ldr	r3, [r7, #4]
 801be58:	891b      	ldrh	r3, [r3, #8]
 801be5a:	4619      	mov	r1, r3
 801be5c:	68b8      	ldr	r0, [r7, #8]
 801be5e:	f7ff f9b1 	bl	801b1c4 <tcp_recved>
    pbuf_free(p);
 801be62:	6878      	ldr	r0, [r7, #4]
 801be64:	f7fe fb42 	bl	801a4ec <pbuf_free>
 801be68:	e008      	b.n	801be7c <tcp_recv_null+0x54>
  } else if (err == ERR_OK) {
 801be6a:	f997 3003 	ldrsb.w	r3, [r7, #3]
 801be6e:	2b00      	cmp	r3, #0
 801be70:	d104      	bne.n	801be7c <tcp_recv_null+0x54>
    return tcp_close(pcb);
 801be72:	68b8      	ldr	r0, [r7, #8]
 801be74:	f7fe fff4 	bl	801ae60 <tcp_close>
 801be78:	4603      	mov	r3, r0
 801be7a:	e000      	b.n	801be7e <tcp_recv_null+0x56>
  }
  return ERR_OK;
 801be7c:	2300      	movs	r3, #0
}
 801be7e:	4618      	mov	r0, r3
 801be80:	3710      	adds	r7, #16
 801be82:	46bd      	mov	sp, r7
 801be84:	bd80      	pop	{r7, pc}
 801be86:	bf00      	nop
 801be88:	0802e5f0 	.word	0x0802e5f0
 801be8c:	0802eb60 	.word	0x0802eb60
 801be90:	0802e634 	.word	0x0802e634

0801be94 <tcp_kill_prio>:
 *
 * @param prio minimum priority
 */
static void
tcp_kill_prio(u8_t prio)
{
 801be94:	b580      	push	{r7, lr}
 801be96:	b086      	sub	sp, #24
 801be98:	af00      	add	r7, sp, #0
 801be9a:	4603      	mov	r3, r0
 801be9c:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;
  u8_t mprio;

  mprio = LWIP_MIN(TCP_PRIO_MAX, prio);
 801be9e:	f997 3007 	ldrsb.w	r3, [r7, #7]
 801bea2:	2b00      	cmp	r3, #0
 801bea4:	db01      	blt.n	801beaa <tcp_kill_prio+0x16>
 801bea6:	79fb      	ldrb	r3, [r7, #7]
 801bea8:	e000      	b.n	801beac <tcp_kill_prio+0x18>
 801beaa:	237f      	movs	r3, #127	@ 0x7f
 801beac:	72fb      	strb	r3, [r7, #11]

  /* We want to kill connections with a lower prio, so bail out if 
   * supplied prio is 0 - there can never be a lower prio
   */
  if (mprio == 0) {
 801beae:	7afb      	ldrb	r3, [r7, #11]
 801beb0:	2b00      	cmp	r3, #0
 801beb2:	d034      	beq.n	801bf1e <tcp_kill_prio+0x8a>
  /* We only want kill connections with a lower prio, so decrement prio by one 
   * and start searching for oldest connection with same or lower priority than mprio.
   * We want to find the connections with the lowest possible prio, and among
   * these the one with the longest inactivity time.
   */
  mprio--;
 801beb4:	7afb      	ldrb	r3, [r7, #11]
 801beb6:	3b01      	subs	r3, #1
 801beb8:	72fb      	strb	r3, [r7, #11]

  inactivity = 0;
 801beba:	2300      	movs	r3, #0
 801bebc:	60fb      	str	r3, [r7, #12]
  inactive = NULL;
 801bebe:	2300      	movs	r3, #0
 801bec0:	613b      	str	r3, [r7, #16]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801bec2:	4b19      	ldr	r3, [pc, #100]	@ (801bf28 <tcp_kill_prio+0x94>)
 801bec4:	681b      	ldr	r3, [r3, #0]
 801bec6:	617b      	str	r3, [r7, #20]
 801bec8:	e01f      	b.n	801bf0a <tcp_kill_prio+0x76>
        /* lower prio is always a kill candidate */
    if ((pcb->prio < mprio) ||
 801beca:	697b      	ldr	r3, [r7, #20]
 801becc:	7d5b      	ldrb	r3, [r3, #21]
 801bece:	7afa      	ldrb	r2, [r7, #11]
 801bed0:	429a      	cmp	r2, r3
 801bed2:	d80c      	bhi.n	801beee <tcp_kill_prio+0x5a>
        /* longer inactivity is also a kill candidate */
        ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) {
 801bed4:	697b      	ldr	r3, [r7, #20]
 801bed6:	7d5b      	ldrb	r3, [r3, #21]
    if ((pcb->prio < mprio) ||
 801bed8:	7afa      	ldrb	r2, [r7, #11]
 801beda:	429a      	cmp	r2, r3
 801bedc:	d112      	bne.n	801bf04 <tcp_kill_prio+0x70>
        ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) {
 801bede:	4b13      	ldr	r3, [pc, #76]	@ (801bf2c <tcp_kill_prio+0x98>)
 801bee0:	681a      	ldr	r2, [r3, #0]
 801bee2:	697b      	ldr	r3, [r7, #20]
 801bee4:	6a1b      	ldr	r3, [r3, #32]
 801bee6:	1ad3      	subs	r3, r2, r3
 801bee8:	68fa      	ldr	r2, [r7, #12]
 801beea:	429a      	cmp	r2, r3
 801beec:	d80a      	bhi.n	801bf04 <tcp_kill_prio+0x70>
      inactivity = tcp_ticks - pcb->tmr;
 801beee:	4b0f      	ldr	r3, [pc, #60]	@ (801bf2c <tcp_kill_prio+0x98>)
 801bef0:	681a      	ldr	r2, [r3, #0]
 801bef2:	697b      	ldr	r3, [r7, #20]
 801bef4:	6a1b      	ldr	r3, [r3, #32]
 801bef6:	1ad3      	subs	r3, r2, r3
 801bef8:	60fb      	str	r3, [r7, #12]
      inactive   = pcb;
 801befa:	697b      	ldr	r3, [r7, #20]
 801befc:	613b      	str	r3, [r7, #16]
      mprio      = pcb->prio;
 801befe:	697b      	ldr	r3, [r7, #20]
 801bf00:	7d5b      	ldrb	r3, [r3, #21]
 801bf02:	72fb      	strb	r3, [r7, #11]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801bf04:	697b      	ldr	r3, [r7, #20]
 801bf06:	68db      	ldr	r3, [r3, #12]
 801bf08:	617b      	str	r3, [r7, #20]
 801bf0a:	697b      	ldr	r3, [r7, #20]
 801bf0c:	2b00      	cmp	r3, #0
 801bf0e:	d1dc      	bne.n	801beca <tcp_kill_prio+0x36>
    }
  }
  if (inactive != NULL) {
 801bf10:	693b      	ldr	r3, [r7, #16]
 801bf12:	2b00      	cmp	r3, #0
 801bf14:	d004      	beq.n	801bf20 <tcp_kill_prio+0x8c>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_prio: killing oldest PCB %p (%"S32_F")\n",
                            (void *)inactive, inactivity));
    tcp_abort(inactive);
 801bf16:	6938      	ldr	r0, [r7, #16]
 801bf18:	f7ff f8ee 	bl	801b0f8 <tcp_abort>
 801bf1c:	e000      	b.n	801bf20 <tcp_kill_prio+0x8c>
    return;
 801bf1e:	bf00      	nop
  }
}
 801bf20:	3718      	adds	r7, #24
 801bf22:	46bd      	mov	sp, r7
 801bf24:	bd80      	pop	{r7, pc}
 801bf26:	bf00      	nop
 801bf28:	2402ae94 	.word	0x2402ae94
 801bf2c:	2402ae88 	.word	0x2402ae88

0801bf30 <tcp_kill_state>:
 * Kills the oldest connection that is in specific state.
 * Called from tcp_alloc() for LAST_ACK and CLOSING if no more connections are available.
 */
static void
tcp_kill_state(enum tcp_state state)
{
 801bf30:	b580      	push	{r7, lr}
 801bf32:	b086      	sub	sp, #24
 801bf34:	af00      	add	r7, sp, #0
 801bf36:	4603      	mov	r3, r0
 801bf38:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;

  LWIP_ASSERT("invalid state", (state == CLOSING) || (state == LAST_ACK));
 801bf3a:	79fb      	ldrb	r3, [r7, #7]
 801bf3c:	2b08      	cmp	r3, #8
 801bf3e:	d009      	beq.n	801bf54 <tcp_kill_state+0x24>
 801bf40:	79fb      	ldrb	r3, [r7, #7]
 801bf42:	2b09      	cmp	r3, #9
 801bf44:	d006      	beq.n	801bf54 <tcp_kill_state+0x24>
 801bf46:	4b1a      	ldr	r3, [pc, #104]	@ (801bfb0 <tcp_kill_state+0x80>)
 801bf48:	f240 62dd 	movw	r2, #1757	@ 0x6dd
 801bf4c:	4919      	ldr	r1, [pc, #100]	@ (801bfb4 <tcp_kill_state+0x84>)
 801bf4e:	481a      	ldr	r0, [pc, #104]	@ (801bfb8 <tcp_kill_state+0x88>)
 801bf50:	f00d fd44 	bl	80299dc <iprintf>

  inactivity = 0;
 801bf54:	2300      	movs	r3, #0
 801bf56:	60fb      	str	r3, [r7, #12]
  inactive = NULL;
 801bf58:	2300      	movs	r3, #0
 801bf5a:	613b      	str	r3, [r7, #16]
  /* Go through the list of active pcbs and get the oldest pcb that is in state
     CLOSING/LAST_ACK. */
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801bf5c:	4b17      	ldr	r3, [pc, #92]	@ (801bfbc <tcp_kill_state+0x8c>)
 801bf5e:	681b      	ldr	r3, [r3, #0]
 801bf60:	617b      	str	r3, [r7, #20]
 801bf62:	e017      	b.n	801bf94 <tcp_kill_state+0x64>
    if (pcb->state == state) {
 801bf64:	697b      	ldr	r3, [r7, #20]
 801bf66:	7d1b      	ldrb	r3, [r3, #20]
 801bf68:	79fa      	ldrb	r2, [r7, #7]
 801bf6a:	429a      	cmp	r2, r3
 801bf6c:	d10f      	bne.n	801bf8e <tcp_kill_state+0x5e>
      if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) {
 801bf6e:	4b14      	ldr	r3, [pc, #80]	@ (801bfc0 <tcp_kill_state+0x90>)
 801bf70:	681a      	ldr	r2, [r3, #0]
 801bf72:	697b      	ldr	r3, [r7, #20]
 801bf74:	6a1b      	ldr	r3, [r3, #32]
 801bf76:	1ad3      	subs	r3, r2, r3
 801bf78:	68fa      	ldr	r2, [r7, #12]
 801bf7a:	429a      	cmp	r2, r3
 801bf7c:	d807      	bhi.n	801bf8e <tcp_kill_state+0x5e>
        inactivity = tcp_ticks - pcb->tmr;
 801bf7e:	4b10      	ldr	r3, [pc, #64]	@ (801bfc0 <tcp_kill_state+0x90>)
 801bf80:	681a      	ldr	r2, [r3, #0]
 801bf82:	697b      	ldr	r3, [r7, #20]
 801bf84:	6a1b      	ldr	r3, [r3, #32]
 801bf86:	1ad3      	subs	r3, r2, r3
 801bf88:	60fb      	str	r3, [r7, #12]
        inactive = pcb;
 801bf8a:	697b      	ldr	r3, [r7, #20]
 801bf8c:	613b      	str	r3, [r7, #16]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801bf8e:	697b      	ldr	r3, [r7, #20]
 801bf90:	68db      	ldr	r3, [r3, #12]
 801bf92:	617b      	str	r3, [r7, #20]
 801bf94:	697b      	ldr	r3, [r7, #20]
 801bf96:	2b00      	cmp	r3, #0
 801bf98:	d1e4      	bne.n	801bf64 <tcp_kill_state+0x34>
      }
    }
  }
  if (inactive != NULL) {
 801bf9a:	693b      	ldr	r3, [r7, #16]
 801bf9c:	2b00      	cmp	r3, #0
 801bf9e:	d003      	beq.n	801bfa8 <tcp_kill_state+0x78>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_closing: killing oldest %s PCB %p (%"S32_F")\n",
                            tcp_state_str[state], (void *)inactive, inactivity));
    /* Don't send a RST, since no data is lost. */
    tcp_abandon(inactive, 0);
 801bfa0:	2100      	movs	r1, #0
 801bfa2:	6938      	ldr	r0, [r7, #16]
 801bfa4:	f7fe ffe8 	bl	801af78 <tcp_abandon>
  }
}
 801bfa8:	bf00      	nop
 801bfaa:	3718      	adds	r7, #24
 801bfac:	46bd      	mov	sp, r7
 801bfae:	bd80      	pop	{r7, pc}
 801bfb0:	0802e5f0 	.word	0x0802e5f0
 801bfb4:	0802eb7c 	.word	0x0802eb7c
 801bfb8:	0802e634 	.word	0x0802e634
 801bfbc:	2402ae94 	.word	0x2402ae94
 801bfc0:	2402ae88 	.word	0x2402ae88

0801bfc4 <tcp_kill_timewait>:
 * Kills the oldest connection that is in TIME_WAIT state.
 * Called from tcp_alloc() if no more connections are available.
 */
static void
tcp_kill_timewait(void)
{
 801bfc4:	b580      	push	{r7, lr}
 801bfc6:	b084      	sub	sp, #16
 801bfc8:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;

  inactivity = 0;
 801bfca:	2300      	movs	r3, #0
 801bfcc:	607b      	str	r3, [r7, #4]
  inactive = NULL;
 801bfce:	2300      	movs	r3, #0
 801bfd0:	60bb      	str	r3, [r7, #8]
  /* Go through the list of TIME_WAIT pcbs and get the oldest pcb. */
  for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801bfd2:	4b12      	ldr	r3, [pc, #72]	@ (801c01c <tcp_kill_timewait+0x58>)
 801bfd4:	681b      	ldr	r3, [r3, #0]
 801bfd6:	60fb      	str	r3, [r7, #12]
 801bfd8:	e012      	b.n	801c000 <tcp_kill_timewait+0x3c>
    if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) {
 801bfda:	4b11      	ldr	r3, [pc, #68]	@ (801c020 <tcp_kill_timewait+0x5c>)
 801bfdc:	681a      	ldr	r2, [r3, #0]
 801bfde:	68fb      	ldr	r3, [r7, #12]
 801bfe0:	6a1b      	ldr	r3, [r3, #32]
 801bfe2:	1ad3      	subs	r3, r2, r3
 801bfe4:	687a      	ldr	r2, [r7, #4]
 801bfe6:	429a      	cmp	r2, r3
 801bfe8:	d807      	bhi.n	801bffa <tcp_kill_timewait+0x36>
      inactivity = tcp_ticks - pcb->tmr;
 801bfea:	4b0d      	ldr	r3, [pc, #52]	@ (801c020 <tcp_kill_timewait+0x5c>)
 801bfec:	681a      	ldr	r2, [r3, #0]
 801bfee:	68fb      	ldr	r3, [r7, #12]
 801bff0:	6a1b      	ldr	r3, [r3, #32]
 801bff2:	1ad3      	subs	r3, r2, r3
 801bff4:	607b      	str	r3, [r7, #4]
      inactive = pcb;
 801bff6:	68fb      	ldr	r3, [r7, #12]
 801bff8:	60bb      	str	r3, [r7, #8]
  for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801bffa:	68fb      	ldr	r3, [r7, #12]
 801bffc:	68db      	ldr	r3, [r3, #12]
 801bffe:	60fb      	str	r3, [r7, #12]
 801c000:	68fb      	ldr	r3, [r7, #12]
 801c002:	2b00      	cmp	r3, #0
 801c004:	d1e9      	bne.n	801bfda <tcp_kill_timewait+0x16>
    }
  }
  if (inactive != NULL) {
 801c006:	68bb      	ldr	r3, [r7, #8]
 801c008:	2b00      	cmp	r3, #0
 801c00a:	d002      	beq.n	801c012 <tcp_kill_timewait+0x4e>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_timewait: killing oldest TIME-WAIT PCB %p (%"S32_F")\n",
                            (void *)inactive, inactivity));
    tcp_abort(inactive);
 801c00c:	68b8      	ldr	r0, [r7, #8]
 801c00e:	f7ff f873 	bl	801b0f8 <tcp_abort>
  }
}
 801c012:	bf00      	nop
 801c014:	3710      	adds	r7, #16
 801c016:	46bd      	mov	sp, r7
 801c018:	bd80      	pop	{r7, pc}
 801c01a:	bf00      	nop
 801c01c:	2402ae98 	.word	0x2402ae98
 801c020:	2402ae88 	.word	0x2402ae88

0801c024 <tcp_handle_closepend>:
 * now send the FIN (which failed before), the pcb might be in a state that is
 * OK for us to now free it.
 */
static void
tcp_handle_closepend(void)
{
 801c024:	b580      	push	{r7, lr}
 801c026:	b082      	sub	sp, #8
 801c028:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb = tcp_active_pcbs;
 801c02a:	4b10      	ldr	r3, [pc, #64]	@ (801c06c <tcp_handle_closepend+0x48>)
 801c02c:	681b      	ldr	r3, [r3, #0]
 801c02e:	607b      	str	r3, [r7, #4]

  while (pcb != NULL) {
 801c030:	e014      	b.n	801c05c <tcp_handle_closepend+0x38>
    struct tcp_pcb *next = pcb->next;
 801c032:	687b      	ldr	r3, [r7, #4]
 801c034:	68db      	ldr	r3, [r3, #12]
 801c036:	603b      	str	r3, [r7, #0]
    /* send pending FIN */
    if (pcb->flags & TF_CLOSEPEND) {
 801c038:	687b      	ldr	r3, [r7, #4]
 801c03a:	8b5b      	ldrh	r3, [r3, #26]
 801c03c:	f003 0308 	and.w	r3, r3, #8
 801c040:	2b00      	cmp	r3, #0
 801c042:	d009      	beq.n	801c058 <tcp_handle_closepend+0x34>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_handle_closepend: pending FIN\n"));
      tcp_clear_flags(pcb, TF_CLOSEPEND);
 801c044:	687b      	ldr	r3, [r7, #4]
 801c046:	8b5b      	ldrh	r3, [r3, #26]
 801c048:	f023 0308 	bic.w	r3, r3, #8
 801c04c:	b29a      	uxth	r2, r3
 801c04e:	687b      	ldr	r3, [r7, #4]
 801c050:	835a      	strh	r2, [r3, #26]
      tcp_close_shutdown_fin(pcb);
 801c052:	6878      	ldr	r0, [r7, #4]
 801c054:	f7fe fe9a 	bl	801ad8c <tcp_close_shutdown_fin>
    }
    pcb = next;
 801c058:	683b      	ldr	r3, [r7, #0]
 801c05a:	607b      	str	r3, [r7, #4]
  while (pcb != NULL) {
 801c05c:	687b      	ldr	r3, [r7, #4]
 801c05e:	2b00      	cmp	r3, #0
 801c060:	d1e7      	bne.n	801c032 <tcp_handle_closepend+0xe>
  }
}
 801c062:	bf00      	nop
 801c064:	bf00      	nop
 801c066:	3708      	adds	r7, #8
 801c068:	46bd      	mov	sp, r7
 801c06a:	bd80      	pop	{r7, pc}
 801c06c:	2402ae94 	.word	0x2402ae94

0801c070 <tcp_alloc>:
 * @param prio priority for the new pcb
 * @return a new tcp_pcb that initially is in state CLOSED
 */
struct tcp_pcb *
tcp_alloc(u8_t prio)
{
 801c070:	b580      	push	{r7, lr}
 801c072:	b084      	sub	sp, #16
 801c074:	af00      	add	r7, sp, #0
 801c076:	4603      	mov	r3, r0
 801c078:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 801c07a:	f7f4 fa63 	bl	8010544 <sys_check_core_locking>

  pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801c07e:	2001      	movs	r0, #1
 801c080:	f7fd fad0 	bl	8019624 <memp_malloc>
 801c084:	60f8      	str	r0, [r7, #12]
  if (pcb == NULL) {
 801c086:	68fb      	ldr	r3, [r7, #12]
 801c088:	2b00      	cmp	r3, #0
 801c08a:	d126      	bne.n	801c0da <tcp_alloc+0x6a>
    /* Try to send FIN for all pcbs stuck in TF_CLOSEPEND first */
    tcp_handle_closepend();
 801c08c:	f7ff ffca 	bl	801c024 <tcp_handle_closepend>

    /* Try killing oldest connection in TIME-WAIT. */
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest TIME-WAIT connection\n"));
    tcp_kill_timewait();
 801c090:	f7ff ff98 	bl	801bfc4 <tcp_kill_timewait>
    /* Try to allocate a tcp_pcb again. */
    pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801c094:	2001      	movs	r0, #1
 801c096:	f7fd fac5 	bl	8019624 <memp_malloc>
 801c09a:	60f8      	str	r0, [r7, #12]
    if (pcb == NULL) {
 801c09c:	68fb      	ldr	r3, [r7, #12]
 801c09e:	2b00      	cmp	r3, #0
 801c0a0:	d11b      	bne.n	801c0da <tcp_alloc+0x6a>
      /* Try killing oldest connection in LAST-ACK (these wouldn't go to TIME-WAIT). */
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest LAST-ACK connection\n"));
      tcp_kill_state(LAST_ACK);
 801c0a2:	2009      	movs	r0, #9
 801c0a4:	f7ff ff44 	bl	801bf30 <tcp_kill_state>
      /* Try to allocate a tcp_pcb again. */
      pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801c0a8:	2001      	movs	r0, #1
 801c0aa:	f7fd fabb 	bl	8019624 <memp_malloc>
 801c0ae:	60f8      	str	r0, [r7, #12]
      if (pcb == NULL) {
 801c0b0:	68fb      	ldr	r3, [r7, #12]
 801c0b2:	2b00      	cmp	r3, #0
 801c0b4:	d111      	bne.n	801c0da <tcp_alloc+0x6a>
        /* Try killing oldest connection in CLOSING. */
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest CLOSING connection\n"));
        tcp_kill_state(CLOSING);
 801c0b6:	2008      	movs	r0, #8
 801c0b8:	f7ff ff3a 	bl	801bf30 <tcp_kill_state>
        /* Try to allocate a tcp_pcb again. */
        pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801c0bc:	2001      	movs	r0, #1
 801c0be:	f7fd fab1 	bl	8019624 <memp_malloc>
 801c0c2:	60f8      	str	r0, [r7, #12]
        if (pcb == NULL) {
 801c0c4:	68fb      	ldr	r3, [r7, #12]
 801c0c6:	2b00      	cmp	r3, #0
 801c0c8:	d107      	bne.n	801c0da <tcp_alloc+0x6a>
          /* Try killing oldest active connection with lower priority than the new one. */
          LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing oldest connection with prio lower than %d\n", prio));
          tcp_kill_prio(prio);
 801c0ca:	79fb      	ldrb	r3, [r7, #7]
 801c0cc:	4618      	mov	r0, r3
 801c0ce:	f7ff fee1 	bl	801be94 <tcp_kill_prio>
          /* Try to allocate a tcp_pcb again. */
          pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801c0d2:	2001      	movs	r0, #1
 801c0d4:	f7fd faa6 	bl	8019624 <memp_malloc>
 801c0d8:	60f8      	str	r0, [r7, #12]
    if (pcb != NULL) {
      /* adjust err stats: memp_malloc failed above */
      MEMP_STATS_DEC(err, MEMP_TCP_PCB);
    }
  }
  if (pcb != NULL) {
 801c0da:	68fb      	ldr	r3, [r7, #12]
 801c0dc:	2b00      	cmp	r3, #0
 801c0de:	d03f      	beq.n	801c160 <tcp_alloc+0xf0>
    /* zero out the whole pcb, so there is no need to initialize members to zero */
    memset(pcb, 0, sizeof(struct tcp_pcb));
 801c0e0:	229c      	movs	r2, #156	@ 0x9c
 801c0e2:	2100      	movs	r1, #0
 801c0e4:	68f8      	ldr	r0, [r7, #12]
 801c0e6:	f00d fe0b 	bl	8029d00 <memset>
    pcb->prio = prio;
 801c0ea:	68fb      	ldr	r3, [r7, #12]
 801c0ec:	79fa      	ldrb	r2, [r7, #7]
 801c0ee:	755a      	strb	r2, [r3, #21]
    pcb->snd_buf = TCP_SND_BUF;
 801c0f0:	68fb      	ldr	r3, [r7, #12]
 801c0f2:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801c0f6:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
    /* Start with a window that does not need scaling. When window scaling is
       enabled and used, the window is enlarged when both sides agree on scaling. */
    pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND);
 801c0fa:	68fb      	ldr	r3, [r7, #12]
 801c0fc:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801c100:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801c102:	68fb      	ldr	r3, [r7, #12]
 801c104:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 801c106:	68fb      	ldr	r3, [r7, #12]
 801c108:	851a      	strh	r2, [r3, #40]	@ 0x28
    pcb->ttl = TCP_TTL;
 801c10a:	68fb      	ldr	r3, [r7, #12]
 801c10c:	22ff      	movs	r2, #255	@ 0xff
 801c10e:	72da      	strb	r2, [r3, #11]
    /* As initial send MSS, we use TCP_MSS but limit it to 536.
       The send MSS is updated when an MSS option is received. */
    pcb->mss = INITIAL_MSS;
 801c110:	68fb      	ldr	r3, [r7, #12]
 801c112:	f44f 7206 	mov.w	r2, #536	@ 0x218
 801c116:	865a      	strh	r2, [r3, #50]	@ 0x32
    pcb->rto = 3000 / TCP_SLOW_INTERVAL;
 801c118:	68fb      	ldr	r3, [r7, #12]
 801c11a:	2206      	movs	r2, #6
 801c11c:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40
    pcb->sv = 3000 / TCP_SLOW_INTERVAL;
 801c120:	68fb      	ldr	r3, [r7, #12]
 801c122:	2206      	movs	r2, #6
 801c124:	87da      	strh	r2, [r3, #62]	@ 0x3e
    pcb->rtime = -1;
 801c126:	68fb      	ldr	r3, [r7, #12]
 801c128:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801c12c:	861a      	strh	r2, [r3, #48]	@ 0x30
    pcb->cwnd = 1;
 801c12e:	68fb      	ldr	r3, [r7, #12]
 801c130:	2201      	movs	r2, #1
 801c132:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
    pcb->tmr = tcp_ticks;
 801c136:	4b0d      	ldr	r3, [pc, #52]	@ (801c16c <tcp_alloc+0xfc>)
 801c138:	681a      	ldr	r2, [r3, #0]
 801c13a:	68fb      	ldr	r3, [r7, #12]
 801c13c:	621a      	str	r2, [r3, #32]
    pcb->last_timer = tcp_timer_ctr;
 801c13e:	4b0c      	ldr	r3, [pc, #48]	@ (801c170 <tcp_alloc+0x100>)
 801c140:	781a      	ldrb	r2, [r3, #0]
 801c142:	68fb      	ldr	r3, [r7, #12]
 801c144:	779a      	strb	r2, [r3, #30]
    of using the largest advertised receive window.  We've seen complications with
    receiving TCPs that use window scaling and/or window auto-tuning where the
    initial advertised window is very small and then grows rapidly once the
    connection is established. To avoid these complications, we set ssthresh to the
    largest effective cwnd (amount of in-flight data) that the sender can have. */
    pcb->ssthresh = TCP_SND_BUF;
 801c146:	68fb      	ldr	r3, [r7, #12]
 801c148:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801c14c:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a

#if LWIP_CALLBACK_API
    pcb->recv = tcp_recv_null;
 801c150:	68fb      	ldr	r3, [r7, #12]
 801c152:	4a08      	ldr	r2, [pc, #32]	@ (801c174 <tcp_alloc+0x104>)
 801c154:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
#endif /* LWIP_CALLBACK_API */

    /* Init KEEPALIVE timer */
    pcb->keep_idle  = TCP_KEEPIDLE_DEFAULT;
 801c158:	68fb      	ldr	r3, [r7, #12]
 801c15a:	4a07      	ldr	r2, [pc, #28]	@ (801c178 <tcp_alloc+0x108>)
 801c15c:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
#if LWIP_TCP_KEEPALIVE
    pcb->keep_intvl = TCP_KEEPINTVL_DEFAULT;
    pcb->keep_cnt   = TCP_KEEPCNT_DEFAULT;
#endif /* LWIP_TCP_KEEPALIVE */
  }
  return pcb;
 801c160:	68fb      	ldr	r3, [r7, #12]
}
 801c162:	4618      	mov	r0, r3
 801c164:	3710      	adds	r7, #16
 801c166:	46bd      	mov	sp, r7
 801c168:	bd80      	pop	{r7, pc}
 801c16a:	bf00      	nop
 801c16c:	2402ae88 	.word	0x2402ae88
 801c170:	2402ae9e 	.word	0x2402ae9e
 801c174:	0801be29 	.word	0x0801be29
 801c178:	006ddd00 	.word	0x006ddd00

0801c17c <tcp_new_ip_type>:
 * supply @ref IPADDR_TYPE_ANY as argument and bind to @ref IP_ANY_TYPE.
 * @return a new tcp_pcb that initially is in state CLOSED
 */
struct tcp_pcb *
tcp_new_ip_type(u8_t type)
{
 801c17c:	b580      	push	{r7, lr}
 801c17e:	b084      	sub	sp, #16
 801c180:	af00      	add	r7, sp, #0
 801c182:	4603      	mov	r3, r0
 801c184:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb;
  pcb = tcp_alloc(TCP_PRIO_NORMAL);
 801c186:	2040      	movs	r0, #64	@ 0x40
 801c188:	f7ff ff72 	bl	801c070 <tcp_alloc>
 801c18c:	60f8      	str	r0, [r7, #12]
    IP_SET_TYPE_VAL(pcb->remote_ip, type);
  }
#else
  LWIP_UNUSED_ARG(type);
#endif /* LWIP_IPV4 && LWIP_IPV6 */
  return pcb;
 801c18e:	68fb      	ldr	r3, [r7, #12]
}
 801c190:	4618      	mov	r0, r3
 801c192:	3710      	adds	r7, #16
 801c194:	46bd      	mov	sp, r7
 801c196:	bd80      	pop	{r7, pc}

0801c198 <tcp_arg>:
 * @param pcb tcp_pcb to set the callback argument
 * @param arg void pointer argument to pass to callback functions
 */
void
tcp_arg(struct tcp_pcb *pcb, void *arg)
{
 801c198:	b580      	push	{r7, lr}
 801c19a:	b082      	sub	sp, #8
 801c19c:	af00      	add	r7, sp, #0
 801c19e:	6078      	str	r0, [r7, #4]
 801c1a0:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801c1a2:	f7f4 f9cf 	bl	8010544 <sys_check_core_locking>
  /* This function is allowed to be called for both listen pcbs and
     connection pcbs. */
  if (pcb != NULL) {
 801c1a6:	687b      	ldr	r3, [r7, #4]
 801c1a8:	2b00      	cmp	r3, #0
 801c1aa:	d002      	beq.n	801c1b2 <tcp_arg+0x1a>
    pcb->callback_arg = arg;
 801c1ac:	687b      	ldr	r3, [r7, #4]
 801c1ae:	683a      	ldr	r2, [r7, #0]
 801c1b0:	611a      	str	r2, [r3, #16]
  }
}
 801c1b2:	bf00      	nop
 801c1b4:	3708      	adds	r7, #8
 801c1b6:	46bd      	mov	sp, r7
 801c1b8:	bd80      	pop	{r7, pc}
	...

0801c1bc <tcp_recv>:
 * @param pcb tcp_pcb to set the recv callback
 * @param recv callback function to call for this pcb when data is received
 */
void
tcp_recv(struct tcp_pcb *pcb, tcp_recv_fn recv)
{
 801c1bc:	b580      	push	{r7, lr}
 801c1be:	b082      	sub	sp, #8
 801c1c0:	af00      	add	r7, sp, #0
 801c1c2:	6078      	str	r0, [r7, #4]
 801c1c4:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801c1c6:	f7f4 f9bd 	bl	8010544 <sys_check_core_locking>
  if (pcb != NULL) {
 801c1ca:	687b      	ldr	r3, [r7, #4]
 801c1cc:	2b00      	cmp	r3, #0
 801c1ce:	d00e      	beq.n	801c1ee <tcp_recv+0x32>
    LWIP_ASSERT("invalid socket state for recv callback", pcb->state != LISTEN);
 801c1d0:	687b      	ldr	r3, [r7, #4]
 801c1d2:	7d1b      	ldrb	r3, [r3, #20]
 801c1d4:	2b01      	cmp	r3, #1
 801c1d6:	d106      	bne.n	801c1e6 <tcp_recv+0x2a>
 801c1d8:	4b07      	ldr	r3, [pc, #28]	@ (801c1f8 <tcp_recv+0x3c>)
 801c1da:	f240 72df 	movw	r2, #2015	@ 0x7df
 801c1de:	4907      	ldr	r1, [pc, #28]	@ (801c1fc <tcp_recv+0x40>)
 801c1e0:	4807      	ldr	r0, [pc, #28]	@ (801c200 <tcp_recv+0x44>)
 801c1e2:	f00d fbfb 	bl	80299dc <iprintf>
    pcb->recv = recv;
 801c1e6:	687b      	ldr	r3, [r7, #4]
 801c1e8:	683a      	ldr	r2, [r7, #0]
 801c1ea:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
  }
}
 801c1ee:	bf00      	nop
 801c1f0:	3708      	adds	r7, #8
 801c1f2:	46bd      	mov	sp, r7
 801c1f4:	bd80      	pop	{r7, pc}
 801c1f6:	bf00      	nop
 801c1f8:	0802e5f0 	.word	0x0802e5f0
 801c1fc:	0802eb8c 	.word	0x0802eb8c
 801c200:	0802e634 	.word	0x0802e634

0801c204 <tcp_sent>:
 * @param pcb tcp_pcb to set the sent callback
 * @param sent callback function to call for this pcb when data is successfully sent
 */
void
tcp_sent(struct tcp_pcb *pcb, tcp_sent_fn sent)
{
 801c204:	b580      	push	{r7, lr}
 801c206:	b082      	sub	sp, #8
 801c208:	af00      	add	r7, sp, #0
 801c20a:	6078      	str	r0, [r7, #4]
 801c20c:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801c20e:	f7f4 f999 	bl	8010544 <sys_check_core_locking>
  if (pcb != NULL) {
 801c212:	687b      	ldr	r3, [r7, #4]
 801c214:	2b00      	cmp	r3, #0
 801c216:	d00e      	beq.n	801c236 <tcp_sent+0x32>
    LWIP_ASSERT("invalid socket state for sent callback", pcb->state != LISTEN);
 801c218:	687b      	ldr	r3, [r7, #4]
 801c21a:	7d1b      	ldrb	r3, [r3, #20]
 801c21c:	2b01      	cmp	r3, #1
 801c21e:	d106      	bne.n	801c22e <tcp_sent+0x2a>
 801c220:	4b07      	ldr	r3, [pc, #28]	@ (801c240 <tcp_sent+0x3c>)
 801c222:	f240 72f3 	movw	r2, #2035	@ 0x7f3
 801c226:	4907      	ldr	r1, [pc, #28]	@ (801c244 <tcp_sent+0x40>)
 801c228:	4807      	ldr	r0, [pc, #28]	@ (801c248 <tcp_sent+0x44>)
 801c22a:	f00d fbd7 	bl	80299dc <iprintf>
    pcb->sent = sent;
 801c22e:	687b      	ldr	r3, [r7, #4]
 801c230:	683a      	ldr	r2, [r7, #0]
 801c232:	f8c3 2080 	str.w	r2, [r3, #128]	@ 0x80
  }
}
 801c236:	bf00      	nop
 801c238:	3708      	adds	r7, #8
 801c23a:	46bd      	mov	sp, r7
 801c23c:	bd80      	pop	{r7, pc}
 801c23e:	bf00      	nop
 801c240:	0802e5f0 	.word	0x0802e5f0
 801c244:	0802ebb4 	.word	0x0802ebb4
 801c248:	0802e634 	.word	0x0802e634

0801c24c <tcp_err>:
 * @param err callback function to call for this pcb when a fatal error
 *        has occurred on the connection
 */
void
tcp_err(struct tcp_pcb *pcb, tcp_err_fn err)
{
 801c24c:	b580      	push	{r7, lr}
 801c24e:	b082      	sub	sp, #8
 801c250:	af00      	add	r7, sp, #0
 801c252:	6078      	str	r0, [r7, #4]
 801c254:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801c256:	f7f4 f975 	bl	8010544 <sys_check_core_locking>
  if (pcb != NULL) {
 801c25a:	687b      	ldr	r3, [r7, #4]
 801c25c:	2b00      	cmp	r3, #0
 801c25e:	d00e      	beq.n	801c27e <tcp_err+0x32>
    LWIP_ASSERT("invalid socket state for err callback", pcb->state != LISTEN);
 801c260:	687b      	ldr	r3, [r7, #4]
 801c262:	7d1b      	ldrb	r3, [r3, #20]
 801c264:	2b01      	cmp	r3, #1
 801c266:	d106      	bne.n	801c276 <tcp_err+0x2a>
 801c268:	4b07      	ldr	r3, [pc, #28]	@ (801c288 <tcp_err+0x3c>)
 801c26a:	f640 020d 	movw	r2, #2061	@ 0x80d
 801c26e:	4907      	ldr	r1, [pc, #28]	@ (801c28c <tcp_err+0x40>)
 801c270:	4807      	ldr	r0, [pc, #28]	@ (801c290 <tcp_err+0x44>)
 801c272:	f00d fbb3 	bl	80299dc <iprintf>
    pcb->errf = err;
 801c276:	687b      	ldr	r3, [r7, #4]
 801c278:	683a      	ldr	r2, [r7, #0]
 801c27a:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  }
}
 801c27e:	bf00      	nop
 801c280:	3708      	adds	r7, #8
 801c282:	46bd      	mov	sp, r7
 801c284:	bd80      	pop	{r7, pc}
 801c286:	bf00      	nop
 801c288:	0802e5f0 	.word	0x0802e5f0
 801c28c:	0802ebdc 	.word	0x0802ebdc
 801c290:	0802e634 	.word	0x0802e634

0801c294 <tcp_accept>:
 * @param accept callback function to call for this pcb when LISTENing
 *        connection has been connected to another host
 */
void
tcp_accept(struct tcp_pcb *pcb, tcp_accept_fn accept)
{
 801c294:	b580      	push	{r7, lr}
 801c296:	b084      	sub	sp, #16
 801c298:	af00      	add	r7, sp, #0
 801c29a:	6078      	str	r0, [r7, #4]
 801c29c:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801c29e:	f7f4 f951 	bl	8010544 <sys_check_core_locking>
  if ((pcb != NULL) && (pcb->state == LISTEN)) {
 801c2a2:	687b      	ldr	r3, [r7, #4]
 801c2a4:	2b00      	cmp	r3, #0
 801c2a6:	d008      	beq.n	801c2ba <tcp_accept+0x26>
 801c2a8:	687b      	ldr	r3, [r7, #4]
 801c2aa:	7d1b      	ldrb	r3, [r3, #20]
 801c2ac:	2b01      	cmp	r3, #1
 801c2ae:	d104      	bne.n	801c2ba <tcp_accept+0x26>
    struct tcp_pcb_listen *lpcb = (struct tcp_pcb_listen *)pcb;
 801c2b0:	687b      	ldr	r3, [r7, #4]
 801c2b2:	60fb      	str	r3, [r7, #12]
    lpcb->accept = accept;
 801c2b4:	68fb      	ldr	r3, [r7, #12]
 801c2b6:	683a      	ldr	r2, [r7, #0]
 801c2b8:	619a      	str	r2, [r3, #24]
  }
}
 801c2ba:	bf00      	nop
 801c2bc:	3710      	adds	r7, #16
 801c2be:	46bd      	mov	sp, r7
 801c2c0:	bd80      	pop	{r7, pc}
	...

0801c2c4 <tcp_poll>:
 * the application may use the polling functionality to call tcp_write()
 * again when the connection has been idle for a while.
 */
void
tcp_poll(struct tcp_pcb *pcb, tcp_poll_fn poll, u8_t interval)
{
 801c2c4:	b580      	push	{r7, lr}
 801c2c6:	b084      	sub	sp, #16
 801c2c8:	af00      	add	r7, sp, #0
 801c2ca:	60f8      	str	r0, [r7, #12]
 801c2cc:	60b9      	str	r1, [r7, #8]
 801c2ce:	4613      	mov	r3, r2
 801c2d0:	71fb      	strb	r3, [r7, #7]
  LWIP_ASSERT_CORE_LOCKED();
 801c2d2:	f7f4 f937 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("tcp_poll: invalid pcb", pcb != NULL, return);
 801c2d6:	68fb      	ldr	r3, [r7, #12]
 801c2d8:	2b00      	cmp	r3, #0
 801c2da:	d107      	bne.n	801c2ec <tcp_poll+0x28>
 801c2dc:	4b0e      	ldr	r3, [pc, #56]	@ (801c318 <tcp_poll+0x54>)
 801c2de:	f640 023d 	movw	r2, #2109	@ 0x83d
 801c2e2:	490e      	ldr	r1, [pc, #56]	@ (801c31c <tcp_poll+0x58>)
 801c2e4:	480e      	ldr	r0, [pc, #56]	@ (801c320 <tcp_poll+0x5c>)
 801c2e6:	f00d fb79 	bl	80299dc <iprintf>
 801c2ea:	e011      	b.n	801c310 <tcp_poll+0x4c>
  LWIP_ASSERT("invalid socket state for poll", pcb->state != LISTEN);
 801c2ec:	68fb      	ldr	r3, [r7, #12]
 801c2ee:	7d1b      	ldrb	r3, [r3, #20]
 801c2f0:	2b01      	cmp	r3, #1
 801c2f2:	d106      	bne.n	801c302 <tcp_poll+0x3e>
 801c2f4:	4b08      	ldr	r3, [pc, #32]	@ (801c318 <tcp_poll+0x54>)
 801c2f6:	f640 023e 	movw	r2, #2110	@ 0x83e
 801c2fa:	490a      	ldr	r1, [pc, #40]	@ (801c324 <tcp_poll+0x60>)
 801c2fc:	4808      	ldr	r0, [pc, #32]	@ (801c320 <tcp_poll+0x5c>)
 801c2fe:	f00d fb6d 	bl	80299dc <iprintf>

#if LWIP_CALLBACK_API
  pcb->poll = poll;
 801c302:	68fb      	ldr	r3, [r7, #12]
 801c304:	68ba      	ldr	r2, [r7, #8]
 801c306:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
#else /* LWIP_CALLBACK_API */
  LWIP_UNUSED_ARG(poll);
#endif /* LWIP_CALLBACK_API */
  pcb->pollinterval = interval;
 801c30a:	68fb      	ldr	r3, [r7, #12]
 801c30c:	79fa      	ldrb	r2, [r7, #7]
 801c30e:	775a      	strb	r2, [r3, #29]
}
 801c310:	3710      	adds	r7, #16
 801c312:	46bd      	mov	sp, r7
 801c314:	bd80      	pop	{r7, pc}
 801c316:	bf00      	nop
 801c318:	0802e5f0 	.word	0x0802e5f0
 801c31c:	0802ec04 	.word	0x0802ec04
 801c320:	0802e634 	.word	0x0802e634
 801c324:	0802ec1c 	.word	0x0802ec1c

0801c328 <tcp_pcb_purge>:
 *
 * @param pcb tcp_pcb to purge. The pcb itself is not deallocated!
 */
void
tcp_pcb_purge(struct tcp_pcb *pcb)
{
 801c328:	b580      	push	{r7, lr}
 801c32a:	b082      	sub	sp, #8
 801c32c:	af00      	add	r7, sp, #0
 801c32e:	6078      	str	r0, [r7, #4]
  LWIP_ERROR("tcp_pcb_purge: invalid pcb", pcb != NULL, return);
 801c330:	687b      	ldr	r3, [r7, #4]
 801c332:	2b00      	cmp	r3, #0
 801c334:	d107      	bne.n	801c346 <tcp_pcb_purge+0x1e>
 801c336:	4b21      	ldr	r3, [pc, #132]	@ (801c3bc <tcp_pcb_purge+0x94>)
 801c338:	f640 0251 	movw	r2, #2129	@ 0x851
 801c33c:	4920      	ldr	r1, [pc, #128]	@ (801c3c0 <tcp_pcb_purge+0x98>)
 801c33e:	4821      	ldr	r0, [pc, #132]	@ (801c3c4 <tcp_pcb_purge+0x9c>)
 801c340:	f00d fb4c 	bl	80299dc <iprintf>
 801c344:	e037      	b.n	801c3b6 <tcp_pcb_purge+0x8e>

  if (pcb->state != CLOSED &&
 801c346:	687b      	ldr	r3, [r7, #4]
 801c348:	7d1b      	ldrb	r3, [r3, #20]
 801c34a:	2b00      	cmp	r3, #0
 801c34c:	d033      	beq.n	801c3b6 <tcp_pcb_purge+0x8e>
      pcb->state != TIME_WAIT &&
 801c34e:	687b      	ldr	r3, [r7, #4]
 801c350:	7d1b      	ldrb	r3, [r3, #20]
  if (pcb->state != CLOSED &&
 801c352:	2b0a      	cmp	r3, #10
 801c354:	d02f      	beq.n	801c3b6 <tcp_pcb_purge+0x8e>
      pcb->state != LISTEN) {
 801c356:	687b      	ldr	r3, [r7, #4]
 801c358:	7d1b      	ldrb	r3, [r3, #20]
      pcb->state != TIME_WAIT &&
 801c35a:	2b01      	cmp	r3, #1
 801c35c:	d02b      	beq.n	801c3b6 <tcp_pcb_purge+0x8e>

    LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge\n"));

    tcp_backlog_accepted(pcb);

    if (pcb->refused_data != NULL) {
 801c35e:	687b      	ldr	r3, [r7, #4]
 801c360:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801c362:	2b00      	cmp	r3, #0
 801c364:	d007      	beq.n	801c376 <tcp_pcb_purge+0x4e>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->refused_data\n"));
      pbuf_free(pcb->refused_data);
 801c366:	687b      	ldr	r3, [r7, #4]
 801c368:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801c36a:	4618      	mov	r0, r3
 801c36c:	f7fe f8be 	bl	801a4ec <pbuf_free>
      pcb->refused_data = NULL;
 801c370:	687b      	ldr	r3, [r7, #4]
 801c372:	2200      	movs	r2, #0
 801c374:	679a      	str	r2, [r3, #120]	@ 0x78
    }
    if (pcb->unacked != NULL) {
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->unacked\n"));
    }
#if TCP_QUEUE_OOSEQ
    if (pcb->ooseq != NULL) {
 801c376:	687b      	ldr	r3, [r7, #4]
 801c378:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801c37a:	2b00      	cmp	r3, #0
 801c37c:	d002      	beq.n	801c384 <tcp_pcb_purge+0x5c>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->ooseq\n"));
      tcp_free_ooseq(pcb);
 801c37e:	6878      	ldr	r0, [r7, #4]
 801c380:	f000 f986 	bl	801c690 <tcp_free_ooseq>
    }
#endif /* TCP_QUEUE_OOSEQ */

    /* Stop the retransmission timer as it will expect data on unacked
       queue if it fires */
    pcb->rtime = -1;
 801c384:	687b      	ldr	r3, [r7, #4]
 801c386:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801c38a:	861a      	strh	r2, [r3, #48]	@ 0x30

    tcp_segs_free(pcb->unsent);
 801c38c:	687b      	ldr	r3, [r7, #4]
 801c38e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801c390:	4618      	mov	r0, r3
 801c392:	f7ff fcef 	bl	801bd74 <tcp_segs_free>
    tcp_segs_free(pcb->unacked);
 801c396:	687b      	ldr	r3, [r7, #4]
 801c398:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801c39a:	4618      	mov	r0, r3
 801c39c:	f7ff fcea 	bl	801bd74 <tcp_segs_free>
    pcb->unacked = pcb->unsent = NULL;
 801c3a0:	687b      	ldr	r3, [r7, #4]
 801c3a2:	2200      	movs	r2, #0
 801c3a4:	66da      	str	r2, [r3, #108]	@ 0x6c
 801c3a6:	687b      	ldr	r3, [r7, #4]
 801c3a8:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 801c3aa:	687b      	ldr	r3, [r7, #4]
 801c3ac:	671a      	str	r2, [r3, #112]	@ 0x70
#if TCP_OVERSIZE
    pcb->unsent_oversize = 0;
 801c3ae:	687b      	ldr	r3, [r7, #4]
 801c3b0:	2200      	movs	r2, #0
 801c3b2:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
#endif /* TCP_OVERSIZE */
  }
}
 801c3b6:	3708      	adds	r7, #8
 801c3b8:	46bd      	mov	sp, r7
 801c3ba:	bd80      	pop	{r7, pc}
 801c3bc:	0802e5f0 	.word	0x0802e5f0
 801c3c0:	0802ec3c 	.word	0x0802ec3c
 801c3c4:	0802e634 	.word	0x0802e634

0801c3c8 <tcp_pcb_remove>:
 * @param pcblist PCB list to purge.
 * @param pcb tcp_pcb to purge. The pcb itself is NOT deallocated!
 */
void
tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb)
{
 801c3c8:	b580      	push	{r7, lr}
 801c3ca:	b084      	sub	sp, #16
 801c3cc:	af00      	add	r7, sp, #0
 801c3ce:	6078      	str	r0, [r7, #4]
 801c3d0:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("tcp_pcb_remove: invalid pcb", pcb != NULL);
 801c3d2:	683b      	ldr	r3, [r7, #0]
 801c3d4:	2b00      	cmp	r3, #0
 801c3d6:	d106      	bne.n	801c3e6 <tcp_pcb_remove+0x1e>
 801c3d8:	4b3e      	ldr	r3, [pc, #248]	@ (801c4d4 <tcp_pcb_remove+0x10c>)
 801c3da:	f640 0283 	movw	r2, #2179	@ 0x883
 801c3de:	493e      	ldr	r1, [pc, #248]	@ (801c4d8 <tcp_pcb_remove+0x110>)
 801c3e0:	483e      	ldr	r0, [pc, #248]	@ (801c4dc <tcp_pcb_remove+0x114>)
 801c3e2:	f00d fafb 	bl	80299dc <iprintf>
  LWIP_ASSERT("tcp_pcb_remove: invalid pcblist", pcblist != NULL);
 801c3e6:	687b      	ldr	r3, [r7, #4]
 801c3e8:	2b00      	cmp	r3, #0
 801c3ea:	d106      	bne.n	801c3fa <tcp_pcb_remove+0x32>
 801c3ec:	4b39      	ldr	r3, [pc, #228]	@ (801c4d4 <tcp_pcb_remove+0x10c>)
 801c3ee:	f640 0284 	movw	r2, #2180	@ 0x884
 801c3f2:	493b      	ldr	r1, [pc, #236]	@ (801c4e0 <tcp_pcb_remove+0x118>)
 801c3f4:	4839      	ldr	r0, [pc, #228]	@ (801c4dc <tcp_pcb_remove+0x114>)
 801c3f6:	f00d faf1 	bl	80299dc <iprintf>

  TCP_RMV(pcblist, pcb);
 801c3fa:	687b      	ldr	r3, [r7, #4]
 801c3fc:	681b      	ldr	r3, [r3, #0]
 801c3fe:	683a      	ldr	r2, [r7, #0]
 801c400:	429a      	cmp	r2, r3
 801c402:	d105      	bne.n	801c410 <tcp_pcb_remove+0x48>
 801c404:	687b      	ldr	r3, [r7, #4]
 801c406:	681b      	ldr	r3, [r3, #0]
 801c408:	68da      	ldr	r2, [r3, #12]
 801c40a:	687b      	ldr	r3, [r7, #4]
 801c40c:	601a      	str	r2, [r3, #0]
 801c40e:	e013      	b.n	801c438 <tcp_pcb_remove+0x70>
 801c410:	687b      	ldr	r3, [r7, #4]
 801c412:	681b      	ldr	r3, [r3, #0]
 801c414:	60fb      	str	r3, [r7, #12]
 801c416:	e00c      	b.n	801c432 <tcp_pcb_remove+0x6a>
 801c418:	68fb      	ldr	r3, [r7, #12]
 801c41a:	68db      	ldr	r3, [r3, #12]
 801c41c:	683a      	ldr	r2, [r7, #0]
 801c41e:	429a      	cmp	r2, r3
 801c420:	d104      	bne.n	801c42c <tcp_pcb_remove+0x64>
 801c422:	683b      	ldr	r3, [r7, #0]
 801c424:	68da      	ldr	r2, [r3, #12]
 801c426:	68fb      	ldr	r3, [r7, #12]
 801c428:	60da      	str	r2, [r3, #12]
 801c42a:	e005      	b.n	801c438 <tcp_pcb_remove+0x70>
 801c42c:	68fb      	ldr	r3, [r7, #12]
 801c42e:	68db      	ldr	r3, [r3, #12]
 801c430:	60fb      	str	r3, [r7, #12]
 801c432:	68fb      	ldr	r3, [r7, #12]
 801c434:	2b00      	cmp	r3, #0
 801c436:	d1ef      	bne.n	801c418 <tcp_pcb_remove+0x50>
 801c438:	683b      	ldr	r3, [r7, #0]
 801c43a:	2200      	movs	r2, #0
 801c43c:	60da      	str	r2, [r3, #12]

  tcp_pcb_purge(pcb);
 801c43e:	6838      	ldr	r0, [r7, #0]
 801c440:	f7ff ff72 	bl	801c328 <tcp_pcb_purge>

  /* if there is an outstanding delayed ACKs, send it */
  if ((pcb->state != TIME_WAIT) &&
 801c444:	683b      	ldr	r3, [r7, #0]
 801c446:	7d1b      	ldrb	r3, [r3, #20]
 801c448:	2b0a      	cmp	r3, #10
 801c44a:	d013      	beq.n	801c474 <tcp_pcb_remove+0xac>
      (pcb->state != LISTEN) &&
 801c44c:	683b      	ldr	r3, [r7, #0]
 801c44e:	7d1b      	ldrb	r3, [r3, #20]
  if ((pcb->state != TIME_WAIT) &&
 801c450:	2b01      	cmp	r3, #1
 801c452:	d00f      	beq.n	801c474 <tcp_pcb_remove+0xac>
      (pcb->flags & TF_ACK_DELAY)) {
 801c454:	683b      	ldr	r3, [r7, #0]
 801c456:	8b5b      	ldrh	r3, [r3, #26]
 801c458:	f003 0301 	and.w	r3, r3, #1
      (pcb->state != LISTEN) &&
 801c45c:	2b00      	cmp	r3, #0
 801c45e:	d009      	beq.n	801c474 <tcp_pcb_remove+0xac>
    tcp_ack_now(pcb);
 801c460:	683b      	ldr	r3, [r7, #0]
 801c462:	8b5b      	ldrh	r3, [r3, #26]
 801c464:	f043 0302 	orr.w	r3, r3, #2
 801c468:	b29a      	uxth	r2, r3
 801c46a:	683b      	ldr	r3, [r7, #0]
 801c46c:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801c46e:	6838      	ldr	r0, [r7, #0]
 801c470:	f003 fc28 	bl	801fcc4 <tcp_output>
  }

  if (pcb->state != LISTEN) {
 801c474:	683b      	ldr	r3, [r7, #0]
 801c476:	7d1b      	ldrb	r3, [r3, #20]
 801c478:	2b01      	cmp	r3, #1
 801c47a:	d020      	beq.n	801c4be <tcp_pcb_remove+0xf6>
    LWIP_ASSERT("unsent segments leaking", pcb->unsent == NULL);
 801c47c:	683b      	ldr	r3, [r7, #0]
 801c47e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801c480:	2b00      	cmp	r3, #0
 801c482:	d006      	beq.n	801c492 <tcp_pcb_remove+0xca>
 801c484:	4b13      	ldr	r3, [pc, #76]	@ (801c4d4 <tcp_pcb_remove+0x10c>)
 801c486:	f640 0293 	movw	r2, #2195	@ 0x893
 801c48a:	4916      	ldr	r1, [pc, #88]	@ (801c4e4 <tcp_pcb_remove+0x11c>)
 801c48c:	4813      	ldr	r0, [pc, #76]	@ (801c4dc <tcp_pcb_remove+0x114>)
 801c48e:	f00d faa5 	bl	80299dc <iprintf>
    LWIP_ASSERT("unacked segments leaking", pcb->unacked == NULL);
 801c492:	683b      	ldr	r3, [r7, #0]
 801c494:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801c496:	2b00      	cmp	r3, #0
 801c498:	d006      	beq.n	801c4a8 <tcp_pcb_remove+0xe0>
 801c49a:	4b0e      	ldr	r3, [pc, #56]	@ (801c4d4 <tcp_pcb_remove+0x10c>)
 801c49c:	f640 0294 	movw	r2, #2196	@ 0x894
 801c4a0:	4911      	ldr	r1, [pc, #68]	@ (801c4e8 <tcp_pcb_remove+0x120>)
 801c4a2:	480e      	ldr	r0, [pc, #56]	@ (801c4dc <tcp_pcb_remove+0x114>)
 801c4a4:	f00d fa9a 	bl	80299dc <iprintf>
#if TCP_QUEUE_OOSEQ
    LWIP_ASSERT("ooseq segments leaking", pcb->ooseq == NULL);
 801c4a8:	683b      	ldr	r3, [r7, #0]
 801c4aa:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801c4ac:	2b00      	cmp	r3, #0
 801c4ae:	d006      	beq.n	801c4be <tcp_pcb_remove+0xf6>
 801c4b0:	4b08      	ldr	r3, [pc, #32]	@ (801c4d4 <tcp_pcb_remove+0x10c>)
 801c4b2:	f640 0296 	movw	r2, #2198	@ 0x896
 801c4b6:	490d      	ldr	r1, [pc, #52]	@ (801c4ec <tcp_pcb_remove+0x124>)
 801c4b8:	4808      	ldr	r0, [pc, #32]	@ (801c4dc <tcp_pcb_remove+0x114>)
 801c4ba:	f00d fa8f 	bl	80299dc <iprintf>
#endif /* TCP_QUEUE_OOSEQ */
  }

  pcb->state = CLOSED;
 801c4be:	683b      	ldr	r3, [r7, #0]
 801c4c0:	2200      	movs	r2, #0
 801c4c2:	751a      	strb	r2, [r3, #20]
  /* reset the local port to prevent the pcb from being 'bound' */
  pcb->local_port = 0;
 801c4c4:	683b      	ldr	r3, [r7, #0]
 801c4c6:	2200      	movs	r2, #0
 801c4c8:	82da      	strh	r2, [r3, #22]

  LWIP_ASSERT("tcp_pcb_remove: tcp_pcbs_sane()", tcp_pcbs_sane());
}
 801c4ca:	bf00      	nop
 801c4cc:	3710      	adds	r7, #16
 801c4ce:	46bd      	mov	sp, r7
 801c4d0:	bd80      	pop	{r7, pc}
 801c4d2:	bf00      	nop
 801c4d4:	0802e5f0 	.word	0x0802e5f0
 801c4d8:	0802ec58 	.word	0x0802ec58
 801c4dc:	0802e634 	.word	0x0802e634
 801c4e0:	0802ec74 	.word	0x0802ec74
 801c4e4:	0802ec94 	.word	0x0802ec94
 801c4e8:	0802ecac 	.word	0x0802ecac
 801c4ec:	0802ecc8 	.word	0x0802ecc8

0801c4f0 <tcp_next_iss>:
 *
 * @return u32_t pseudo random sequence number
 */
u32_t
tcp_next_iss(struct tcp_pcb *pcb)
{
 801c4f0:	b580      	push	{r7, lr}
 801c4f2:	b082      	sub	sp, #8
 801c4f4:	af00      	add	r7, sp, #0
 801c4f6:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL);
  return LWIP_HOOK_TCP_ISN(&pcb->local_ip, pcb->local_port, &pcb->remote_ip, pcb->remote_port);
#else /* LWIP_HOOK_TCP_ISN */
  static u32_t iss = 6510;

  LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL);
 801c4f8:	687b      	ldr	r3, [r7, #4]
 801c4fa:	2b00      	cmp	r3, #0
 801c4fc:	d106      	bne.n	801c50c <tcp_next_iss+0x1c>
 801c4fe:	4b0a      	ldr	r3, [pc, #40]	@ (801c528 <tcp_next_iss+0x38>)
 801c500:	f640 02af 	movw	r2, #2223	@ 0x8af
 801c504:	4909      	ldr	r1, [pc, #36]	@ (801c52c <tcp_next_iss+0x3c>)
 801c506:	480a      	ldr	r0, [pc, #40]	@ (801c530 <tcp_next_iss+0x40>)
 801c508:	f00d fa68 	bl	80299dc <iprintf>
  LWIP_UNUSED_ARG(pcb);

  iss += tcp_ticks;       /* XXX */
 801c50c:	4b09      	ldr	r3, [pc, #36]	@ (801c534 <tcp_next_iss+0x44>)
 801c50e:	681a      	ldr	r2, [r3, #0]
 801c510:	4b09      	ldr	r3, [pc, #36]	@ (801c538 <tcp_next_iss+0x48>)
 801c512:	681b      	ldr	r3, [r3, #0]
 801c514:	4413      	add	r3, r2
 801c516:	4a07      	ldr	r2, [pc, #28]	@ (801c534 <tcp_next_iss+0x44>)
 801c518:	6013      	str	r3, [r2, #0]
  return iss;
 801c51a:	4b06      	ldr	r3, [pc, #24]	@ (801c534 <tcp_next_iss+0x44>)
 801c51c:	681b      	ldr	r3, [r3, #0]
#endif /* LWIP_HOOK_TCP_ISN */
}
 801c51e:	4618      	mov	r0, r3
 801c520:	3708      	adds	r7, #8
 801c522:	46bd      	mov	sp, r7
 801c524:	bd80      	pop	{r7, pc}
 801c526:	bf00      	nop
 801c528:	0802e5f0 	.word	0x0802e5f0
 801c52c:	0802ece0 	.word	0x0802ece0
 801c530:	0802e634 	.word	0x0802e634
 801c534:	24000050 	.word	0x24000050
 801c538:	2402ae88 	.word	0x2402ae88

0801c53c <tcp_eff_send_mss_netif>:
 * by calculating the minimum of TCP_MSS and the mtu (if set) of the target
 * netif (if not NULL).
 */
u16_t
tcp_eff_send_mss_netif(u16_t sendmss, struct netif *outif, const ip_addr_t *dest)
{
 801c53c:	b580      	push	{r7, lr}
 801c53e:	b086      	sub	sp, #24
 801c540:	af00      	add	r7, sp, #0
 801c542:	4603      	mov	r3, r0
 801c544:	60b9      	str	r1, [r7, #8]
 801c546:	607a      	str	r2, [r7, #4]
 801c548:	81fb      	strh	r3, [r7, #14]
  u16_t mss_s;
  u16_t mtu;

  LWIP_UNUSED_ARG(dest); /* in case IPv6 is disabled */

  LWIP_ASSERT("tcp_eff_send_mss_netif: invalid dst_ip", dest != NULL);
 801c54a:	687b      	ldr	r3, [r7, #4]
 801c54c:	2b00      	cmp	r3, #0
 801c54e:	d106      	bne.n	801c55e <tcp_eff_send_mss_netif+0x22>
 801c550:	4b14      	ldr	r3, [pc, #80]	@ (801c5a4 <tcp_eff_send_mss_netif+0x68>)
 801c552:	f640 02c5 	movw	r2, #2245	@ 0x8c5
 801c556:	4914      	ldr	r1, [pc, #80]	@ (801c5a8 <tcp_eff_send_mss_netif+0x6c>)
 801c558:	4814      	ldr	r0, [pc, #80]	@ (801c5ac <tcp_eff_send_mss_netif+0x70>)
 801c55a:	f00d fa3f 	bl	80299dc <iprintf>
  else
#endif /* LWIP_IPV4 */
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
  {
    if (outif == NULL) {
 801c55e:	68bb      	ldr	r3, [r7, #8]
 801c560:	2b00      	cmp	r3, #0
 801c562:	d101      	bne.n	801c568 <tcp_eff_send_mss_netif+0x2c>
      return sendmss;
 801c564:	89fb      	ldrh	r3, [r7, #14]
 801c566:	e019      	b.n	801c59c <tcp_eff_send_mss_netif+0x60>
    }
    mtu = outif->mtu;
 801c568:	68bb      	ldr	r3, [r7, #8]
 801c56a:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801c56c:	82fb      	strh	r3, [r7, #22]
  }
#endif /* LWIP_IPV4 */

  if (mtu != 0) {
 801c56e:	8afb      	ldrh	r3, [r7, #22]
 801c570:	2b00      	cmp	r3, #0
 801c572:	d012      	beq.n	801c59a <tcp_eff_send_mss_netif+0x5e>
    else
#endif /* LWIP_IPV4 */
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
    {
      offset = IP_HLEN + TCP_HLEN;
 801c574:	2328      	movs	r3, #40	@ 0x28
 801c576:	82bb      	strh	r3, [r7, #20]
    }
#endif /* LWIP_IPV4 */
    mss_s = (mtu > offset) ? (u16_t)(mtu - offset) : 0;
 801c578:	8afa      	ldrh	r2, [r7, #22]
 801c57a:	8abb      	ldrh	r3, [r7, #20]
 801c57c:	429a      	cmp	r2, r3
 801c57e:	d904      	bls.n	801c58a <tcp_eff_send_mss_netif+0x4e>
 801c580:	8afa      	ldrh	r2, [r7, #22]
 801c582:	8abb      	ldrh	r3, [r7, #20]
 801c584:	1ad3      	subs	r3, r2, r3
 801c586:	b29b      	uxth	r3, r3
 801c588:	e000      	b.n	801c58c <tcp_eff_send_mss_netif+0x50>
 801c58a:	2300      	movs	r3, #0
 801c58c:	827b      	strh	r3, [r7, #18]
    /* RFC 1122, chap 4.2.2.6:
     * Eff.snd.MSS = min(SendMSS+20, MMS_S) - TCPhdrsize - IPoptionsize
     * We correct for TCP options in tcp_write(), and don't support IP options.
     */
    sendmss = LWIP_MIN(sendmss, mss_s);
 801c58e:	8a7a      	ldrh	r2, [r7, #18]
 801c590:	89fb      	ldrh	r3, [r7, #14]
 801c592:	4293      	cmp	r3, r2
 801c594:	bf28      	it	cs
 801c596:	4613      	movcs	r3, r2
 801c598:	81fb      	strh	r3, [r7, #14]
  }
  return sendmss;
 801c59a:	89fb      	ldrh	r3, [r7, #14]
}
 801c59c:	4618      	mov	r0, r3
 801c59e:	3718      	adds	r7, #24
 801c5a0:	46bd      	mov	sp, r7
 801c5a2:	bd80      	pop	{r7, pc}
 801c5a4:	0802e5f0 	.word	0x0802e5f0
 801c5a8:	0802ecfc 	.word	0x0802ecfc
 801c5ac:	0802e634 	.word	0x0802e634

0801c5b0 <tcp_netif_ip_addr_changed_pcblist>:
#endif /* TCP_CALCULATE_EFF_SEND_MSS */

/** Helper function for tcp_netif_ip_addr_changed() that iterates a pcb list */
static void
tcp_netif_ip_addr_changed_pcblist(const ip_addr_t *old_addr, struct tcp_pcb *pcb_list)
{
 801c5b0:	b580      	push	{r7, lr}
 801c5b2:	b084      	sub	sp, #16
 801c5b4:	af00      	add	r7, sp, #0
 801c5b6:	6078      	str	r0, [r7, #4]
 801c5b8:	6039      	str	r1, [r7, #0]
  struct tcp_pcb *pcb;
  pcb = pcb_list;
 801c5ba:	683b      	ldr	r3, [r7, #0]
 801c5bc:	60fb      	str	r3, [r7, #12]

  LWIP_ASSERT("tcp_netif_ip_addr_changed_pcblist: invalid old_addr", old_addr != NULL);
 801c5be:	687b      	ldr	r3, [r7, #4]
 801c5c0:	2b00      	cmp	r3, #0
 801c5c2:	d119      	bne.n	801c5f8 <tcp_netif_ip_addr_changed_pcblist+0x48>
 801c5c4:	4b10      	ldr	r3, [pc, #64]	@ (801c608 <tcp_netif_ip_addr_changed_pcblist+0x58>)
 801c5c6:	f44f 6210 	mov.w	r2, #2304	@ 0x900
 801c5ca:	4910      	ldr	r1, [pc, #64]	@ (801c60c <tcp_netif_ip_addr_changed_pcblist+0x5c>)
 801c5cc:	4810      	ldr	r0, [pc, #64]	@ (801c610 <tcp_netif_ip_addr_changed_pcblist+0x60>)
 801c5ce:	f00d fa05 	bl	80299dc <iprintf>

  while (pcb != NULL) {
 801c5d2:	e011      	b.n	801c5f8 <tcp_netif_ip_addr_changed_pcblist+0x48>
    /* PCB bound to current local interface address? */
    if (ip_addr_cmp(&pcb->local_ip, old_addr)
 801c5d4:	68fb      	ldr	r3, [r7, #12]
 801c5d6:	681a      	ldr	r2, [r3, #0]
 801c5d8:	687b      	ldr	r3, [r7, #4]
 801c5da:	681b      	ldr	r3, [r3, #0]
 801c5dc:	429a      	cmp	r2, r3
 801c5de:	d108      	bne.n	801c5f2 <tcp_netif_ip_addr_changed_pcblist+0x42>
        /* connections to link-local addresses must persist (RFC3927 ch. 1.9) */
        && (!IP_IS_V4_VAL(pcb->local_ip) || !ip4_addr_islinklocal(ip_2_ip4(&pcb->local_ip)))
#endif /* LWIP_AUTOIP */
       ) {
      /* this connection must be aborted */
      struct tcp_pcb *next = pcb->next;
 801c5e0:	68fb      	ldr	r3, [r7, #12]
 801c5e2:	68db      	ldr	r3, [r3, #12]
 801c5e4:	60bb      	str	r3, [r7, #8]
      LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb));
      tcp_abort(pcb);
 801c5e6:	68f8      	ldr	r0, [r7, #12]
 801c5e8:	f7fe fd86 	bl	801b0f8 <tcp_abort>
      pcb = next;
 801c5ec:	68bb      	ldr	r3, [r7, #8]
 801c5ee:	60fb      	str	r3, [r7, #12]
 801c5f0:	e002      	b.n	801c5f8 <tcp_netif_ip_addr_changed_pcblist+0x48>
    } else {
      pcb = pcb->next;
 801c5f2:	68fb      	ldr	r3, [r7, #12]
 801c5f4:	68db      	ldr	r3, [r3, #12]
 801c5f6:	60fb      	str	r3, [r7, #12]
  while (pcb != NULL) {
 801c5f8:	68fb      	ldr	r3, [r7, #12]
 801c5fa:	2b00      	cmp	r3, #0
 801c5fc:	d1ea      	bne.n	801c5d4 <tcp_netif_ip_addr_changed_pcblist+0x24>
    }
  }
}
 801c5fe:	bf00      	nop
 801c600:	bf00      	nop
 801c602:	3710      	adds	r7, #16
 801c604:	46bd      	mov	sp, r7
 801c606:	bd80      	pop	{r7, pc}
 801c608:	0802e5f0 	.word	0x0802e5f0
 801c60c:	0802ed24 	.word	0x0802ed24
 801c610:	0802e634 	.word	0x0802e634

0801c614 <tcp_netif_ip_addr_changed>:
 * @param old_addr IP address of the netif before change
 * @param new_addr IP address of the netif after change or NULL if netif has been removed
 */
void
tcp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 801c614:	b580      	push	{r7, lr}
 801c616:	b084      	sub	sp, #16
 801c618:	af00      	add	r7, sp, #0
 801c61a:	6078      	str	r0, [r7, #4]
 801c61c:	6039      	str	r1, [r7, #0]
  struct tcp_pcb_listen *lpcb;

  if (!ip_addr_isany(old_addr)) {
 801c61e:	687b      	ldr	r3, [r7, #4]
 801c620:	2b00      	cmp	r3, #0
 801c622:	d02a      	beq.n	801c67a <tcp_netif_ip_addr_changed+0x66>
 801c624:	687b      	ldr	r3, [r7, #4]
 801c626:	681b      	ldr	r3, [r3, #0]
 801c628:	2b00      	cmp	r3, #0
 801c62a:	d026      	beq.n	801c67a <tcp_netif_ip_addr_changed+0x66>
    tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_active_pcbs);
 801c62c:	4b15      	ldr	r3, [pc, #84]	@ (801c684 <tcp_netif_ip_addr_changed+0x70>)
 801c62e:	681b      	ldr	r3, [r3, #0]
 801c630:	4619      	mov	r1, r3
 801c632:	6878      	ldr	r0, [r7, #4]
 801c634:	f7ff ffbc 	bl	801c5b0 <tcp_netif_ip_addr_changed_pcblist>
    tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_bound_pcbs);
 801c638:	4b13      	ldr	r3, [pc, #76]	@ (801c688 <tcp_netif_ip_addr_changed+0x74>)
 801c63a:	681b      	ldr	r3, [r3, #0]
 801c63c:	4619      	mov	r1, r3
 801c63e:	6878      	ldr	r0, [r7, #4]
 801c640:	f7ff ffb6 	bl	801c5b0 <tcp_netif_ip_addr_changed_pcblist>

    if (!ip_addr_isany(new_addr)) {
 801c644:	683b      	ldr	r3, [r7, #0]
 801c646:	2b00      	cmp	r3, #0
 801c648:	d017      	beq.n	801c67a <tcp_netif_ip_addr_changed+0x66>
 801c64a:	683b      	ldr	r3, [r7, #0]
 801c64c:	681b      	ldr	r3, [r3, #0]
 801c64e:	2b00      	cmp	r3, #0
 801c650:	d013      	beq.n	801c67a <tcp_netif_ip_addr_changed+0x66>
      /* PCB bound to current local interface address? */
      for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801c652:	4b0e      	ldr	r3, [pc, #56]	@ (801c68c <tcp_netif_ip_addr_changed+0x78>)
 801c654:	681b      	ldr	r3, [r3, #0]
 801c656:	60fb      	str	r3, [r7, #12]
 801c658:	e00c      	b.n	801c674 <tcp_netif_ip_addr_changed+0x60>
        /* PCB bound to current local interface address? */
        if (ip_addr_cmp(&lpcb->local_ip, old_addr)) {
 801c65a:	68fb      	ldr	r3, [r7, #12]
 801c65c:	681a      	ldr	r2, [r3, #0]
 801c65e:	687b      	ldr	r3, [r7, #4]
 801c660:	681b      	ldr	r3, [r3, #0]
 801c662:	429a      	cmp	r2, r3
 801c664:	d103      	bne.n	801c66e <tcp_netif_ip_addr_changed+0x5a>
          /* The PCB is listening to the old ipaddr and
            * is set to listen to the new one instead */
          ip_addr_copy(lpcb->local_ip, *new_addr);
 801c666:	683b      	ldr	r3, [r7, #0]
 801c668:	681a      	ldr	r2, [r3, #0]
 801c66a:	68fb      	ldr	r3, [r7, #12]
 801c66c:	601a      	str	r2, [r3, #0]
      for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801c66e:	68fb      	ldr	r3, [r7, #12]
 801c670:	68db      	ldr	r3, [r3, #12]
 801c672:	60fb      	str	r3, [r7, #12]
 801c674:	68fb      	ldr	r3, [r7, #12]
 801c676:	2b00      	cmp	r3, #0
 801c678:	d1ef      	bne.n	801c65a <tcp_netif_ip_addr_changed+0x46>
        }
      }
    }
  }
}
 801c67a:	bf00      	nop
 801c67c:	3710      	adds	r7, #16
 801c67e:	46bd      	mov	sp, r7
 801c680:	bd80      	pop	{r7, pc}
 801c682:	bf00      	nop
 801c684:	2402ae94 	.word	0x2402ae94
 801c688:	2402ae8c 	.word	0x2402ae8c
 801c68c:	2402ae90 	.word	0x2402ae90

0801c690 <tcp_free_ooseq>:

#if TCP_QUEUE_OOSEQ
/* Free all ooseq pbufs (and possibly reset SACK state) */
void
tcp_free_ooseq(struct tcp_pcb *pcb)
{
 801c690:	b580      	push	{r7, lr}
 801c692:	b082      	sub	sp, #8
 801c694:	af00      	add	r7, sp, #0
 801c696:	6078      	str	r0, [r7, #4]
  if (pcb->ooseq) {
 801c698:	687b      	ldr	r3, [r7, #4]
 801c69a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801c69c:	2b00      	cmp	r3, #0
 801c69e:	d007      	beq.n	801c6b0 <tcp_free_ooseq+0x20>
    tcp_segs_free(pcb->ooseq);
 801c6a0:	687b      	ldr	r3, [r7, #4]
 801c6a2:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801c6a4:	4618      	mov	r0, r3
 801c6a6:	f7ff fb65 	bl	801bd74 <tcp_segs_free>
    pcb->ooseq = NULL;
 801c6aa:	687b      	ldr	r3, [r7, #4]
 801c6ac:	2200      	movs	r2, #0
 801c6ae:	675a      	str	r2, [r3, #116]	@ 0x74
#if LWIP_TCP_SACK_OUT
    memset(pcb->rcv_sacks, 0, sizeof(pcb->rcv_sacks));
#endif /* LWIP_TCP_SACK_OUT */
  }
}
 801c6b0:	bf00      	nop
 801c6b2:	3708      	adds	r7, #8
 801c6b4:	46bd      	mov	sp, r7
 801c6b6:	bd80      	pop	{r7, pc}

0801c6b8 <tcp_input>:
 * @param p received TCP segment to process (p->payload pointing to the TCP header)
 * @param inp network interface on which this segment was received
 */
void
tcp_input(struct pbuf *p, struct netif *inp)
{
 801c6b8:	b590      	push	{r4, r7, lr}
 801c6ba:	b08d      	sub	sp, #52	@ 0x34
 801c6bc:	af04      	add	r7, sp, #16
 801c6be:	6078      	str	r0, [r7, #4]
 801c6c0:	6039      	str	r1, [r7, #0]
#endif /* SO_REUSE */
  u8_t hdrlen_bytes;
  err_t err;

  LWIP_UNUSED_ARG(inp);
  LWIP_ASSERT_CORE_LOCKED();
 801c6c2:	f7f3 ff3f 	bl	8010544 <sys_check_core_locking>
  LWIP_ASSERT("tcp_input: invalid pbuf", p != NULL);
 801c6c6:	687b      	ldr	r3, [r7, #4]
 801c6c8:	2b00      	cmp	r3, #0
 801c6ca:	d105      	bne.n	801c6d8 <tcp_input+0x20>
 801c6cc:	4b9b      	ldr	r3, [pc, #620]	@ (801c93c <tcp_input+0x284>)
 801c6ce:	2283      	movs	r2, #131	@ 0x83
 801c6d0:	499b      	ldr	r1, [pc, #620]	@ (801c940 <tcp_input+0x288>)
 801c6d2:	489c      	ldr	r0, [pc, #624]	@ (801c944 <tcp_input+0x28c>)
 801c6d4:	f00d f982 	bl	80299dc <iprintf>
  PERF_START;

  TCP_STATS_INC(tcp.recv);
  MIB2_STATS_INC(mib2.tcpinsegs);

  tcphdr = (struct tcp_hdr *)p->payload;
 801c6d8:	687b      	ldr	r3, [r7, #4]
 801c6da:	685b      	ldr	r3, [r3, #4]
 801c6dc:	4a9a      	ldr	r2, [pc, #616]	@ (801c948 <tcp_input+0x290>)
 801c6de:	6013      	str	r3, [r2, #0]
#if TCP_INPUT_DEBUG
  tcp_debug_print(tcphdr);
#endif

  /* Check that TCP header fits in payload */
  if (p->len < TCP_HLEN) {
 801c6e0:	687b      	ldr	r3, [r7, #4]
 801c6e2:	895b      	ldrh	r3, [r3, #10]
 801c6e4:	2b13      	cmp	r3, #19
 801c6e6:	f240 83d1 	bls.w	801ce8c <tcp_input+0x7d4>
    TCP_STATS_INC(tcp.lenerr);
    goto dropped;
  }

  /* Don't even process incoming broadcasts/multicasts. */
  if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) ||
 801c6ea:	4b98      	ldr	r3, [pc, #608]	@ (801c94c <tcp_input+0x294>)
 801c6ec:	695b      	ldr	r3, [r3, #20]
 801c6ee:	4a97      	ldr	r2, [pc, #604]	@ (801c94c <tcp_input+0x294>)
 801c6f0:	6812      	ldr	r2, [r2, #0]
 801c6f2:	4611      	mov	r1, r2
 801c6f4:	4618      	mov	r0, r3
 801c6f6:	f008 fc1b 	bl	8024f30 <ip4_addr_isbroadcast_u32>
 801c6fa:	4603      	mov	r3, r0
 801c6fc:	2b00      	cmp	r3, #0
 801c6fe:	f040 83c7 	bne.w	801ce90 <tcp_input+0x7d8>
      ip_addr_ismulticast(ip_current_dest_addr())) {
 801c702:	4b92      	ldr	r3, [pc, #584]	@ (801c94c <tcp_input+0x294>)
 801c704:	695b      	ldr	r3, [r3, #20]
 801c706:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) ||
 801c70a:	2be0      	cmp	r3, #224	@ 0xe0
 801c70c:	f000 83c0 	beq.w	801ce90 <tcp_input+0x7d8>
    }
  }
#endif /* CHECKSUM_CHECK_TCP */

  /* sanity-check header length */
  hdrlen_bytes = TCPH_HDRLEN_BYTES(tcphdr);
 801c710:	4b8d      	ldr	r3, [pc, #564]	@ (801c948 <tcp_input+0x290>)
 801c712:	681b      	ldr	r3, [r3, #0]
 801c714:	899b      	ldrh	r3, [r3, #12]
 801c716:	b29b      	uxth	r3, r3
 801c718:	4618      	mov	r0, r3
 801c71a:	f7fc fa05 	bl	8018b28 <lwip_htons>
 801c71e:	4603      	mov	r3, r0
 801c720:	0b1b      	lsrs	r3, r3, #12
 801c722:	b29b      	uxth	r3, r3
 801c724:	b2db      	uxtb	r3, r3
 801c726:	009b      	lsls	r3, r3, #2
 801c728:	74bb      	strb	r3, [r7, #18]
  if ((hdrlen_bytes < TCP_HLEN) || (hdrlen_bytes > p->tot_len)) {
 801c72a:	7cbb      	ldrb	r3, [r7, #18]
 801c72c:	2b13      	cmp	r3, #19
 801c72e:	f240 83b1 	bls.w	801ce94 <tcp_input+0x7dc>
 801c732:	7cbb      	ldrb	r3, [r7, #18]
 801c734:	b29a      	uxth	r2, r3
 801c736:	687b      	ldr	r3, [r7, #4]
 801c738:	891b      	ldrh	r3, [r3, #8]
 801c73a:	429a      	cmp	r2, r3
 801c73c:	f200 83aa 	bhi.w	801ce94 <tcp_input+0x7dc>
    goto dropped;
  }

  /* Move the payload pointer in the pbuf so that it points to the
     TCP data instead of the TCP header. */
  tcphdr_optlen = (u16_t)(hdrlen_bytes - TCP_HLEN);
 801c740:	7cbb      	ldrb	r3, [r7, #18]
 801c742:	b29b      	uxth	r3, r3
 801c744:	3b14      	subs	r3, #20
 801c746:	b29a      	uxth	r2, r3
 801c748:	4b81      	ldr	r3, [pc, #516]	@ (801c950 <tcp_input+0x298>)
 801c74a:	801a      	strh	r2, [r3, #0]
  tcphdr_opt2 = NULL;
 801c74c:	4b81      	ldr	r3, [pc, #516]	@ (801c954 <tcp_input+0x29c>)
 801c74e:	2200      	movs	r2, #0
 801c750:	601a      	str	r2, [r3, #0]
  if (p->len >= hdrlen_bytes) {
 801c752:	687b      	ldr	r3, [r7, #4]
 801c754:	895a      	ldrh	r2, [r3, #10]
 801c756:	7cbb      	ldrb	r3, [r7, #18]
 801c758:	b29b      	uxth	r3, r3
 801c75a:	429a      	cmp	r2, r3
 801c75c:	d309      	bcc.n	801c772 <tcp_input+0xba>
    /* all options are in the first pbuf */
    tcphdr_opt1len = tcphdr_optlen;
 801c75e:	4b7c      	ldr	r3, [pc, #496]	@ (801c950 <tcp_input+0x298>)
 801c760:	881a      	ldrh	r2, [r3, #0]
 801c762:	4b7d      	ldr	r3, [pc, #500]	@ (801c958 <tcp_input+0x2a0>)
 801c764:	801a      	strh	r2, [r3, #0]
    pbuf_remove_header(p, hdrlen_bytes); /* cannot fail */
 801c766:	7cbb      	ldrb	r3, [r7, #18]
 801c768:	4619      	mov	r1, r3
 801c76a:	6878      	ldr	r0, [r7, #4]
 801c76c:	f7fd fe06 	bl	801a37c <pbuf_remove_header>
 801c770:	e04e      	b.n	801c810 <tcp_input+0x158>
  } else {
    u16_t opt2len;
    /* TCP header fits into first pbuf, options don't - data is in the next pbuf */
    /* there must be a next pbuf, due to hdrlen_bytes sanity check above */
    LWIP_ASSERT("p->next != NULL", p->next != NULL);
 801c772:	687b      	ldr	r3, [r7, #4]
 801c774:	681b      	ldr	r3, [r3, #0]
 801c776:	2b00      	cmp	r3, #0
 801c778:	d105      	bne.n	801c786 <tcp_input+0xce>
 801c77a:	4b70      	ldr	r3, [pc, #448]	@ (801c93c <tcp_input+0x284>)
 801c77c:	22c2      	movs	r2, #194	@ 0xc2
 801c77e:	4977      	ldr	r1, [pc, #476]	@ (801c95c <tcp_input+0x2a4>)
 801c780:	4870      	ldr	r0, [pc, #448]	@ (801c944 <tcp_input+0x28c>)
 801c782:	f00d f92b 	bl	80299dc <iprintf>

    /* advance over the TCP header (cannot fail) */
    pbuf_remove_header(p, TCP_HLEN);
 801c786:	2114      	movs	r1, #20
 801c788:	6878      	ldr	r0, [r7, #4]
 801c78a:	f7fd fdf7 	bl	801a37c <pbuf_remove_header>

    /* determine how long the first and second parts of the options are */
    tcphdr_opt1len = p->len;
 801c78e:	687b      	ldr	r3, [r7, #4]
 801c790:	895a      	ldrh	r2, [r3, #10]
 801c792:	4b71      	ldr	r3, [pc, #452]	@ (801c958 <tcp_input+0x2a0>)
 801c794:	801a      	strh	r2, [r3, #0]
    opt2len = (u16_t)(tcphdr_optlen - tcphdr_opt1len);
 801c796:	4b6e      	ldr	r3, [pc, #440]	@ (801c950 <tcp_input+0x298>)
 801c798:	881a      	ldrh	r2, [r3, #0]
 801c79a:	4b6f      	ldr	r3, [pc, #444]	@ (801c958 <tcp_input+0x2a0>)
 801c79c:	881b      	ldrh	r3, [r3, #0]
 801c79e:	1ad3      	subs	r3, r2, r3
 801c7a0:	823b      	strh	r3, [r7, #16]

    /* options continue in the next pbuf: set p to zero length and hide the
        options in the next pbuf (adjusting p->tot_len) */
    pbuf_remove_header(p, tcphdr_opt1len);
 801c7a2:	4b6d      	ldr	r3, [pc, #436]	@ (801c958 <tcp_input+0x2a0>)
 801c7a4:	881b      	ldrh	r3, [r3, #0]
 801c7a6:	4619      	mov	r1, r3
 801c7a8:	6878      	ldr	r0, [r7, #4]
 801c7aa:	f7fd fde7 	bl	801a37c <pbuf_remove_header>

    /* check that the options fit in the second pbuf */
    if (opt2len > p->next->len) {
 801c7ae:	687b      	ldr	r3, [r7, #4]
 801c7b0:	681b      	ldr	r3, [r3, #0]
 801c7b2:	895b      	ldrh	r3, [r3, #10]
 801c7b4:	8a3a      	ldrh	r2, [r7, #16]
 801c7b6:	429a      	cmp	r2, r3
 801c7b8:	f200 836e 	bhi.w	801ce98 <tcp_input+0x7e0>
      TCP_STATS_INC(tcp.lenerr);
      goto dropped;
    }

    /* remember the pointer to the second part of the options */
    tcphdr_opt2 = (u8_t *)p->next->payload;
 801c7bc:	687b      	ldr	r3, [r7, #4]
 801c7be:	681b      	ldr	r3, [r3, #0]
 801c7c0:	685b      	ldr	r3, [r3, #4]
 801c7c2:	4a64      	ldr	r2, [pc, #400]	@ (801c954 <tcp_input+0x29c>)
 801c7c4:	6013      	str	r3, [r2, #0]

    /* advance p->next to point after the options, and manually
        adjust p->tot_len to keep it consistent with the changed p->next */
    pbuf_remove_header(p->next, opt2len);
 801c7c6:	687b      	ldr	r3, [r7, #4]
 801c7c8:	681b      	ldr	r3, [r3, #0]
 801c7ca:	8a3a      	ldrh	r2, [r7, #16]
 801c7cc:	4611      	mov	r1, r2
 801c7ce:	4618      	mov	r0, r3
 801c7d0:	f7fd fdd4 	bl	801a37c <pbuf_remove_header>
    p->tot_len = (u16_t)(p->tot_len - opt2len);
 801c7d4:	687b      	ldr	r3, [r7, #4]
 801c7d6:	891a      	ldrh	r2, [r3, #8]
 801c7d8:	8a3b      	ldrh	r3, [r7, #16]
 801c7da:	1ad3      	subs	r3, r2, r3
 801c7dc:	b29a      	uxth	r2, r3
 801c7de:	687b      	ldr	r3, [r7, #4]
 801c7e0:	811a      	strh	r2, [r3, #8]

    LWIP_ASSERT("p->len == 0", p->len == 0);
 801c7e2:	687b      	ldr	r3, [r7, #4]
 801c7e4:	895b      	ldrh	r3, [r3, #10]
 801c7e6:	2b00      	cmp	r3, #0
 801c7e8:	d005      	beq.n	801c7f6 <tcp_input+0x13e>
 801c7ea:	4b54      	ldr	r3, [pc, #336]	@ (801c93c <tcp_input+0x284>)
 801c7ec:	22df      	movs	r2, #223	@ 0xdf
 801c7ee:	495c      	ldr	r1, [pc, #368]	@ (801c960 <tcp_input+0x2a8>)
 801c7f0:	4854      	ldr	r0, [pc, #336]	@ (801c944 <tcp_input+0x28c>)
 801c7f2:	f00d f8f3 	bl	80299dc <iprintf>
    LWIP_ASSERT("p->tot_len == p->next->tot_len", p->tot_len == p->next->tot_len);
 801c7f6:	687b      	ldr	r3, [r7, #4]
 801c7f8:	891a      	ldrh	r2, [r3, #8]
 801c7fa:	687b      	ldr	r3, [r7, #4]
 801c7fc:	681b      	ldr	r3, [r3, #0]
 801c7fe:	891b      	ldrh	r3, [r3, #8]
 801c800:	429a      	cmp	r2, r3
 801c802:	d005      	beq.n	801c810 <tcp_input+0x158>
 801c804:	4b4d      	ldr	r3, [pc, #308]	@ (801c93c <tcp_input+0x284>)
 801c806:	22e0      	movs	r2, #224	@ 0xe0
 801c808:	4956      	ldr	r1, [pc, #344]	@ (801c964 <tcp_input+0x2ac>)
 801c80a:	484e      	ldr	r0, [pc, #312]	@ (801c944 <tcp_input+0x28c>)
 801c80c:	f00d f8e6 	bl	80299dc <iprintf>
  }

  /* Convert fields in TCP header to host byte order. */
  tcphdr->src = lwip_ntohs(tcphdr->src);
 801c810:	4b4d      	ldr	r3, [pc, #308]	@ (801c948 <tcp_input+0x290>)
 801c812:	681b      	ldr	r3, [r3, #0]
 801c814:	881b      	ldrh	r3, [r3, #0]
 801c816:	b29b      	uxth	r3, r3
 801c818:	4a4b      	ldr	r2, [pc, #300]	@ (801c948 <tcp_input+0x290>)
 801c81a:	6814      	ldr	r4, [r2, #0]
 801c81c:	4618      	mov	r0, r3
 801c81e:	f7fc f983 	bl	8018b28 <lwip_htons>
 801c822:	4603      	mov	r3, r0
 801c824:	8023      	strh	r3, [r4, #0]
  tcphdr->dest = lwip_ntohs(tcphdr->dest);
 801c826:	4b48      	ldr	r3, [pc, #288]	@ (801c948 <tcp_input+0x290>)
 801c828:	681b      	ldr	r3, [r3, #0]
 801c82a:	885b      	ldrh	r3, [r3, #2]
 801c82c:	b29b      	uxth	r3, r3
 801c82e:	4a46      	ldr	r2, [pc, #280]	@ (801c948 <tcp_input+0x290>)
 801c830:	6814      	ldr	r4, [r2, #0]
 801c832:	4618      	mov	r0, r3
 801c834:	f7fc f978 	bl	8018b28 <lwip_htons>
 801c838:	4603      	mov	r3, r0
 801c83a:	8063      	strh	r3, [r4, #2]
  seqno = tcphdr->seqno = lwip_ntohl(tcphdr->seqno);
 801c83c:	4b42      	ldr	r3, [pc, #264]	@ (801c948 <tcp_input+0x290>)
 801c83e:	681b      	ldr	r3, [r3, #0]
 801c840:	685b      	ldr	r3, [r3, #4]
 801c842:	4a41      	ldr	r2, [pc, #260]	@ (801c948 <tcp_input+0x290>)
 801c844:	6814      	ldr	r4, [r2, #0]
 801c846:	4618      	mov	r0, r3
 801c848:	f7fc f983 	bl	8018b52 <lwip_htonl>
 801c84c:	4603      	mov	r3, r0
 801c84e:	6063      	str	r3, [r4, #4]
 801c850:	6863      	ldr	r3, [r4, #4]
 801c852:	4a45      	ldr	r2, [pc, #276]	@ (801c968 <tcp_input+0x2b0>)
 801c854:	6013      	str	r3, [r2, #0]
  ackno = tcphdr->ackno = lwip_ntohl(tcphdr->ackno);
 801c856:	4b3c      	ldr	r3, [pc, #240]	@ (801c948 <tcp_input+0x290>)
 801c858:	681b      	ldr	r3, [r3, #0]
 801c85a:	689b      	ldr	r3, [r3, #8]
 801c85c:	4a3a      	ldr	r2, [pc, #232]	@ (801c948 <tcp_input+0x290>)
 801c85e:	6814      	ldr	r4, [r2, #0]
 801c860:	4618      	mov	r0, r3
 801c862:	f7fc f976 	bl	8018b52 <lwip_htonl>
 801c866:	4603      	mov	r3, r0
 801c868:	60a3      	str	r3, [r4, #8]
 801c86a:	68a3      	ldr	r3, [r4, #8]
 801c86c:	4a3f      	ldr	r2, [pc, #252]	@ (801c96c <tcp_input+0x2b4>)
 801c86e:	6013      	str	r3, [r2, #0]
  tcphdr->wnd = lwip_ntohs(tcphdr->wnd);
 801c870:	4b35      	ldr	r3, [pc, #212]	@ (801c948 <tcp_input+0x290>)
 801c872:	681b      	ldr	r3, [r3, #0]
 801c874:	89db      	ldrh	r3, [r3, #14]
 801c876:	b29b      	uxth	r3, r3
 801c878:	4a33      	ldr	r2, [pc, #204]	@ (801c948 <tcp_input+0x290>)
 801c87a:	6814      	ldr	r4, [r2, #0]
 801c87c:	4618      	mov	r0, r3
 801c87e:	f7fc f953 	bl	8018b28 <lwip_htons>
 801c882:	4603      	mov	r3, r0
 801c884:	81e3      	strh	r3, [r4, #14]

  flags = TCPH_FLAGS(tcphdr);
 801c886:	4b30      	ldr	r3, [pc, #192]	@ (801c948 <tcp_input+0x290>)
 801c888:	681b      	ldr	r3, [r3, #0]
 801c88a:	899b      	ldrh	r3, [r3, #12]
 801c88c:	b29b      	uxth	r3, r3
 801c88e:	4618      	mov	r0, r3
 801c890:	f7fc f94a 	bl	8018b28 <lwip_htons>
 801c894:	4603      	mov	r3, r0
 801c896:	b2db      	uxtb	r3, r3
 801c898:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 801c89c:	b2da      	uxtb	r2, r3
 801c89e:	4b34      	ldr	r3, [pc, #208]	@ (801c970 <tcp_input+0x2b8>)
 801c8a0:	701a      	strb	r2, [r3, #0]
  tcplen = p->tot_len;
 801c8a2:	687b      	ldr	r3, [r7, #4]
 801c8a4:	891a      	ldrh	r2, [r3, #8]
 801c8a6:	4b33      	ldr	r3, [pc, #204]	@ (801c974 <tcp_input+0x2bc>)
 801c8a8:	801a      	strh	r2, [r3, #0]
  if (flags & (TCP_FIN | TCP_SYN)) {
 801c8aa:	4b31      	ldr	r3, [pc, #196]	@ (801c970 <tcp_input+0x2b8>)
 801c8ac:	781b      	ldrb	r3, [r3, #0]
 801c8ae:	f003 0303 	and.w	r3, r3, #3
 801c8b2:	2b00      	cmp	r3, #0
 801c8b4:	d00c      	beq.n	801c8d0 <tcp_input+0x218>
    tcplen++;
 801c8b6:	4b2f      	ldr	r3, [pc, #188]	@ (801c974 <tcp_input+0x2bc>)
 801c8b8:	881b      	ldrh	r3, [r3, #0]
 801c8ba:	3301      	adds	r3, #1
 801c8bc:	b29a      	uxth	r2, r3
 801c8be:	4b2d      	ldr	r3, [pc, #180]	@ (801c974 <tcp_input+0x2bc>)
 801c8c0:	801a      	strh	r2, [r3, #0]
    if (tcplen < p->tot_len) {
 801c8c2:	687b      	ldr	r3, [r7, #4]
 801c8c4:	891a      	ldrh	r2, [r3, #8]
 801c8c6:	4b2b      	ldr	r3, [pc, #172]	@ (801c974 <tcp_input+0x2bc>)
 801c8c8:	881b      	ldrh	r3, [r3, #0]
 801c8ca:	429a      	cmp	r2, r3
 801c8cc:	f200 82e6 	bhi.w	801ce9c <tcp_input+0x7e4>
    }
  }

  /* Demultiplex an incoming segment. First, we check if it is destined
     for an active connection. */
  prev = NULL;
 801c8d0:	2300      	movs	r3, #0
 801c8d2:	61fb      	str	r3, [r7, #28]

  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801c8d4:	4b28      	ldr	r3, [pc, #160]	@ (801c978 <tcp_input+0x2c0>)
 801c8d6:	681b      	ldr	r3, [r3, #0]
 801c8d8:	61bb      	str	r3, [r7, #24]
 801c8da:	e09d      	b.n	801ca18 <tcp_input+0x360>
    LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED);
 801c8dc:	69bb      	ldr	r3, [r7, #24]
 801c8de:	7d1b      	ldrb	r3, [r3, #20]
 801c8e0:	2b00      	cmp	r3, #0
 801c8e2:	d105      	bne.n	801c8f0 <tcp_input+0x238>
 801c8e4:	4b15      	ldr	r3, [pc, #84]	@ (801c93c <tcp_input+0x284>)
 801c8e6:	22fb      	movs	r2, #251	@ 0xfb
 801c8e8:	4924      	ldr	r1, [pc, #144]	@ (801c97c <tcp_input+0x2c4>)
 801c8ea:	4816      	ldr	r0, [pc, #88]	@ (801c944 <tcp_input+0x28c>)
 801c8ec:	f00d f876 	bl	80299dc <iprintf>
    LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT);
 801c8f0:	69bb      	ldr	r3, [r7, #24]
 801c8f2:	7d1b      	ldrb	r3, [r3, #20]
 801c8f4:	2b0a      	cmp	r3, #10
 801c8f6:	d105      	bne.n	801c904 <tcp_input+0x24c>
 801c8f8:	4b10      	ldr	r3, [pc, #64]	@ (801c93c <tcp_input+0x284>)
 801c8fa:	22fc      	movs	r2, #252	@ 0xfc
 801c8fc:	4920      	ldr	r1, [pc, #128]	@ (801c980 <tcp_input+0x2c8>)
 801c8fe:	4811      	ldr	r0, [pc, #68]	@ (801c944 <tcp_input+0x28c>)
 801c900:	f00d f86c 	bl	80299dc <iprintf>
    LWIP_ASSERT("tcp_input: active pcb->state != LISTEN", pcb->state != LISTEN);
 801c904:	69bb      	ldr	r3, [r7, #24]
 801c906:	7d1b      	ldrb	r3, [r3, #20]
 801c908:	2b01      	cmp	r3, #1
 801c90a:	d105      	bne.n	801c918 <tcp_input+0x260>
 801c90c:	4b0b      	ldr	r3, [pc, #44]	@ (801c93c <tcp_input+0x284>)
 801c90e:	22fd      	movs	r2, #253	@ 0xfd
 801c910:	491c      	ldr	r1, [pc, #112]	@ (801c984 <tcp_input+0x2cc>)
 801c912:	480c      	ldr	r0, [pc, #48]	@ (801c944 <tcp_input+0x28c>)
 801c914:	f00d f862 	bl	80299dc <iprintf>

    /* check if PCB is bound to specific netif */
    if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801c918:	69bb      	ldr	r3, [r7, #24]
 801c91a:	7a1b      	ldrb	r3, [r3, #8]
 801c91c:	2b00      	cmp	r3, #0
 801c91e:	d033      	beq.n	801c988 <tcp_input+0x2d0>
        (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801c920:	69bb      	ldr	r3, [r7, #24]
 801c922:	7a1a      	ldrb	r2, [r3, #8]
 801c924:	4b09      	ldr	r3, [pc, #36]	@ (801c94c <tcp_input+0x294>)
 801c926:	685b      	ldr	r3, [r3, #4]
 801c928:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801c92c:	3301      	adds	r3, #1
 801c92e:	b2db      	uxtb	r3, r3
    if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801c930:	429a      	cmp	r2, r3
 801c932:	d029      	beq.n	801c988 <tcp_input+0x2d0>
      prev = pcb;
 801c934:	69bb      	ldr	r3, [r7, #24]
 801c936:	61fb      	str	r3, [r7, #28]
      continue;
 801c938:	e06b      	b.n	801ca12 <tcp_input+0x35a>
 801c93a:	bf00      	nop
 801c93c:	0802ed58 	.word	0x0802ed58
 801c940:	0802ed8c 	.word	0x0802ed8c
 801c944:	0802eda4 	.word	0x0802eda4
 801c948:	2402aeb4 	.word	0x2402aeb4
 801c94c:	24024338 	.word	0x24024338
 801c950:	2402aeb8 	.word	0x2402aeb8
 801c954:	2402aebc 	.word	0x2402aebc
 801c958:	2402aeba 	.word	0x2402aeba
 801c95c:	0802edcc 	.word	0x0802edcc
 801c960:	0802eddc 	.word	0x0802eddc
 801c964:	0802ede8 	.word	0x0802ede8
 801c968:	2402aec4 	.word	0x2402aec4
 801c96c:	2402aec8 	.word	0x2402aec8
 801c970:	2402aed0 	.word	0x2402aed0
 801c974:	2402aece 	.word	0x2402aece
 801c978:	2402ae94 	.word	0x2402ae94
 801c97c:	0802ee08 	.word	0x0802ee08
 801c980:	0802ee30 	.word	0x0802ee30
 801c984:	0802ee5c 	.word	0x0802ee5c
    }

    if (pcb->remote_port == tcphdr->src &&
 801c988:	69bb      	ldr	r3, [r7, #24]
 801c98a:	8b1a      	ldrh	r2, [r3, #24]
 801c98c:	4b72      	ldr	r3, [pc, #456]	@ (801cb58 <tcp_input+0x4a0>)
 801c98e:	681b      	ldr	r3, [r3, #0]
 801c990:	881b      	ldrh	r3, [r3, #0]
 801c992:	b29b      	uxth	r3, r3
 801c994:	429a      	cmp	r2, r3
 801c996:	d13a      	bne.n	801ca0e <tcp_input+0x356>
        pcb->local_port == tcphdr->dest &&
 801c998:	69bb      	ldr	r3, [r7, #24]
 801c99a:	8ada      	ldrh	r2, [r3, #22]
 801c99c:	4b6e      	ldr	r3, [pc, #440]	@ (801cb58 <tcp_input+0x4a0>)
 801c99e:	681b      	ldr	r3, [r3, #0]
 801c9a0:	885b      	ldrh	r3, [r3, #2]
 801c9a2:	b29b      	uxth	r3, r3
    if (pcb->remote_port == tcphdr->src &&
 801c9a4:	429a      	cmp	r2, r3
 801c9a6:	d132      	bne.n	801ca0e <tcp_input+0x356>
        ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801c9a8:	69bb      	ldr	r3, [r7, #24]
 801c9aa:	685a      	ldr	r2, [r3, #4]
 801c9ac:	4b6b      	ldr	r3, [pc, #428]	@ (801cb5c <tcp_input+0x4a4>)
 801c9ae:	691b      	ldr	r3, [r3, #16]
        pcb->local_port == tcphdr->dest &&
 801c9b0:	429a      	cmp	r2, r3
 801c9b2:	d12c      	bne.n	801ca0e <tcp_input+0x356>
        ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 801c9b4:	69bb      	ldr	r3, [r7, #24]
 801c9b6:	681a      	ldr	r2, [r3, #0]
 801c9b8:	4b68      	ldr	r3, [pc, #416]	@ (801cb5c <tcp_input+0x4a4>)
 801c9ba:	695b      	ldr	r3, [r3, #20]
        ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801c9bc:	429a      	cmp	r2, r3
 801c9be:	d126      	bne.n	801ca0e <tcp_input+0x356>
      /* Move this PCB to the front of the list so that subsequent
         lookups will be faster (we exploit locality in TCP segment
         arrivals). */
      LWIP_ASSERT("tcp_input: pcb->next != pcb (before cache)", pcb->next != pcb);
 801c9c0:	69bb      	ldr	r3, [r7, #24]
 801c9c2:	68db      	ldr	r3, [r3, #12]
 801c9c4:	69ba      	ldr	r2, [r7, #24]
 801c9c6:	429a      	cmp	r2, r3
 801c9c8:	d106      	bne.n	801c9d8 <tcp_input+0x320>
 801c9ca:	4b65      	ldr	r3, [pc, #404]	@ (801cb60 <tcp_input+0x4a8>)
 801c9cc:	f240 120d 	movw	r2, #269	@ 0x10d
 801c9d0:	4964      	ldr	r1, [pc, #400]	@ (801cb64 <tcp_input+0x4ac>)
 801c9d2:	4865      	ldr	r0, [pc, #404]	@ (801cb68 <tcp_input+0x4b0>)
 801c9d4:	f00d f802 	bl	80299dc <iprintf>
      if (prev != NULL) {
 801c9d8:	69fb      	ldr	r3, [r7, #28]
 801c9da:	2b00      	cmp	r3, #0
 801c9dc:	d00a      	beq.n	801c9f4 <tcp_input+0x33c>
        prev->next = pcb->next;
 801c9de:	69bb      	ldr	r3, [r7, #24]
 801c9e0:	68da      	ldr	r2, [r3, #12]
 801c9e2:	69fb      	ldr	r3, [r7, #28]
 801c9e4:	60da      	str	r2, [r3, #12]
        pcb->next = tcp_active_pcbs;
 801c9e6:	4b61      	ldr	r3, [pc, #388]	@ (801cb6c <tcp_input+0x4b4>)
 801c9e8:	681a      	ldr	r2, [r3, #0]
 801c9ea:	69bb      	ldr	r3, [r7, #24]
 801c9ec:	60da      	str	r2, [r3, #12]
        tcp_active_pcbs = pcb;
 801c9ee:	4a5f      	ldr	r2, [pc, #380]	@ (801cb6c <tcp_input+0x4b4>)
 801c9f0:	69bb      	ldr	r3, [r7, #24]
 801c9f2:	6013      	str	r3, [r2, #0]
      } else {
        TCP_STATS_INC(tcp.cachehit);
      }
      LWIP_ASSERT("tcp_input: pcb->next != pcb (after cache)", pcb->next != pcb);
 801c9f4:	69bb      	ldr	r3, [r7, #24]
 801c9f6:	68db      	ldr	r3, [r3, #12]
 801c9f8:	69ba      	ldr	r2, [r7, #24]
 801c9fa:	429a      	cmp	r2, r3
 801c9fc:	d111      	bne.n	801ca22 <tcp_input+0x36a>
 801c9fe:	4b58      	ldr	r3, [pc, #352]	@ (801cb60 <tcp_input+0x4a8>)
 801ca00:	f240 1215 	movw	r2, #277	@ 0x115
 801ca04:	495a      	ldr	r1, [pc, #360]	@ (801cb70 <tcp_input+0x4b8>)
 801ca06:	4858      	ldr	r0, [pc, #352]	@ (801cb68 <tcp_input+0x4b0>)
 801ca08:	f00c ffe8 	bl	80299dc <iprintf>
      break;
 801ca0c:	e009      	b.n	801ca22 <tcp_input+0x36a>
    }
    prev = pcb;
 801ca0e:	69bb      	ldr	r3, [r7, #24]
 801ca10:	61fb      	str	r3, [r7, #28]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801ca12:	69bb      	ldr	r3, [r7, #24]
 801ca14:	68db      	ldr	r3, [r3, #12]
 801ca16:	61bb      	str	r3, [r7, #24]
 801ca18:	69bb      	ldr	r3, [r7, #24]
 801ca1a:	2b00      	cmp	r3, #0
 801ca1c:	f47f af5e 	bne.w	801c8dc <tcp_input+0x224>
 801ca20:	e000      	b.n	801ca24 <tcp_input+0x36c>
      break;
 801ca22:	bf00      	nop
  }

  if (pcb == NULL) {
 801ca24:	69bb      	ldr	r3, [r7, #24]
 801ca26:	2b00      	cmp	r3, #0
 801ca28:	f040 80aa 	bne.w	801cb80 <tcp_input+0x4c8>
    /* If it did not go to an active connection, we check the connections
       in the TIME-WAIT state. */
    for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801ca2c:	4b51      	ldr	r3, [pc, #324]	@ (801cb74 <tcp_input+0x4bc>)
 801ca2e:	681b      	ldr	r3, [r3, #0]
 801ca30:	61bb      	str	r3, [r7, #24]
 801ca32:	e03f      	b.n	801cab4 <tcp_input+0x3fc>
      LWIP_ASSERT("tcp_input: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT);
 801ca34:	69bb      	ldr	r3, [r7, #24]
 801ca36:	7d1b      	ldrb	r3, [r3, #20]
 801ca38:	2b0a      	cmp	r3, #10
 801ca3a:	d006      	beq.n	801ca4a <tcp_input+0x392>
 801ca3c:	4b48      	ldr	r3, [pc, #288]	@ (801cb60 <tcp_input+0x4a8>)
 801ca3e:	f240 121f 	movw	r2, #287	@ 0x11f
 801ca42:	494d      	ldr	r1, [pc, #308]	@ (801cb78 <tcp_input+0x4c0>)
 801ca44:	4848      	ldr	r0, [pc, #288]	@ (801cb68 <tcp_input+0x4b0>)
 801ca46:	f00c ffc9 	bl	80299dc <iprintf>

      /* check if PCB is bound to specific netif */
      if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801ca4a:	69bb      	ldr	r3, [r7, #24]
 801ca4c:	7a1b      	ldrb	r3, [r3, #8]
 801ca4e:	2b00      	cmp	r3, #0
 801ca50:	d009      	beq.n	801ca66 <tcp_input+0x3ae>
          (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801ca52:	69bb      	ldr	r3, [r7, #24]
 801ca54:	7a1a      	ldrb	r2, [r3, #8]
 801ca56:	4b41      	ldr	r3, [pc, #260]	@ (801cb5c <tcp_input+0x4a4>)
 801ca58:	685b      	ldr	r3, [r3, #4]
 801ca5a:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801ca5e:	3301      	adds	r3, #1
 801ca60:	b2db      	uxtb	r3, r3
      if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801ca62:	429a      	cmp	r2, r3
 801ca64:	d122      	bne.n	801caac <tcp_input+0x3f4>
        continue;
      }

      if (pcb->remote_port == tcphdr->src &&
 801ca66:	69bb      	ldr	r3, [r7, #24]
 801ca68:	8b1a      	ldrh	r2, [r3, #24]
 801ca6a:	4b3b      	ldr	r3, [pc, #236]	@ (801cb58 <tcp_input+0x4a0>)
 801ca6c:	681b      	ldr	r3, [r3, #0]
 801ca6e:	881b      	ldrh	r3, [r3, #0]
 801ca70:	b29b      	uxth	r3, r3
 801ca72:	429a      	cmp	r2, r3
 801ca74:	d11b      	bne.n	801caae <tcp_input+0x3f6>
          pcb->local_port == tcphdr->dest &&
 801ca76:	69bb      	ldr	r3, [r7, #24]
 801ca78:	8ada      	ldrh	r2, [r3, #22]
 801ca7a:	4b37      	ldr	r3, [pc, #220]	@ (801cb58 <tcp_input+0x4a0>)
 801ca7c:	681b      	ldr	r3, [r3, #0]
 801ca7e:	885b      	ldrh	r3, [r3, #2]
 801ca80:	b29b      	uxth	r3, r3
      if (pcb->remote_port == tcphdr->src &&
 801ca82:	429a      	cmp	r2, r3
 801ca84:	d113      	bne.n	801caae <tcp_input+0x3f6>
          ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801ca86:	69bb      	ldr	r3, [r7, #24]
 801ca88:	685a      	ldr	r2, [r3, #4]
 801ca8a:	4b34      	ldr	r3, [pc, #208]	@ (801cb5c <tcp_input+0x4a4>)
 801ca8c:	691b      	ldr	r3, [r3, #16]
          pcb->local_port == tcphdr->dest &&
 801ca8e:	429a      	cmp	r2, r3
 801ca90:	d10d      	bne.n	801caae <tcp_input+0x3f6>
          ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 801ca92:	69bb      	ldr	r3, [r7, #24]
 801ca94:	681a      	ldr	r2, [r3, #0]
 801ca96:	4b31      	ldr	r3, [pc, #196]	@ (801cb5c <tcp_input+0x4a4>)
 801ca98:	695b      	ldr	r3, [r3, #20]
          ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801ca9a:	429a      	cmp	r2, r3
 801ca9c:	d107      	bne.n	801caae <tcp_input+0x3f6>
#ifdef LWIP_HOOK_TCP_INPACKET_PCB
        if (LWIP_HOOK_TCP_INPACKET_PCB(pcb, tcphdr, tcphdr_optlen, tcphdr_opt1len,
                                       tcphdr_opt2, p) == ERR_OK)
#endif
        {
          tcp_timewait_input(pcb);
 801ca9e:	69b8      	ldr	r0, [r7, #24]
 801caa0:	f000 fb56 	bl	801d150 <tcp_timewait_input>
        }
        pbuf_free(p);
 801caa4:	6878      	ldr	r0, [r7, #4]
 801caa6:	f7fd fd21 	bl	801a4ec <pbuf_free>
        return;
 801caaa:	e1fd      	b.n	801cea8 <tcp_input+0x7f0>
        continue;
 801caac:	bf00      	nop
    for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801caae:	69bb      	ldr	r3, [r7, #24]
 801cab0:	68db      	ldr	r3, [r3, #12]
 801cab2:	61bb      	str	r3, [r7, #24]
 801cab4:	69bb      	ldr	r3, [r7, #24]
 801cab6:	2b00      	cmp	r3, #0
 801cab8:	d1bc      	bne.n	801ca34 <tcp_input+0x37c>
      }
    }

    /* Finally, if we still did not get a match, we check all PCBs that
       are LISTENing for incoming connections. */
    prev = NULL;
 801caba:	2300      	movs	r3, #0
 801cabc:	61fb      	str	r3, [r7, #28]
    for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801cabe:	4b2f      	ldr	r3, [pc, #188]	@ (801cb7c <tcp_input+0x4c4>)
 801cac0:	681b      	ldr	r3, [r3, #0]
 801cac2:	617b      	str	r3, [r7, #20]
 801cac4:	e02a      	b.n	801cb1c <tcp_input+0x464>
      /* check if PCB is bound to specific netif */
      if ((lpcb->netif_idx != NETIF_NO_INDEX) &&
 801cac6:	697b      	ldr	r3, [r7, #20]
 801cac8:	7a1b      	ldrb	r3, [r3, #8]
 801caca:	2b00      	cmp	r3, #0
 801cacc:	d00c      	beq.n	801cae8 <tcp_input+0x430>
          (lpcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801cace:	697b      	ldr	r3, [r7, #20]
 801cad0:	7a1a      	ldrb	r2, [r3, #8]
 801cad2:	4b22      	ldr	r3, [pc, #136]	@ (801cb5c <tcp_input+0x4a4>)
 801cad4:	685b      	ldr	r3, [r3, #4]
 801cad6:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801cada:	3301      	adds	r3, #1
 801cadc:	b2db      	uxtb	r3, r3
      if ((lpcb->netif_idx != NETIF_NO_INDEX) &&
 801cade:	429a      	cmp	r2, r3
 801cae0:	d002      	beq.n	801cae8 <tcp_input+0x430>
        prev = (struct tcp_pcb *)lpcb;
 801cae2:	697b      	ldr	r3, [r7, #20]
 801cae4:	61fb      	str	r3, [r7, #28]
        continue;
 801cae6:	e016      	b.n	801cb16 <tcp_input+0x45e>
      }

      if (lpcb->local_port == tcphdr->dest) {
 801cae8:	697b      	ldr	r3, [r7, #20]
 801caea:	8ada      	ldrh	r2, [r3, #22]
 801caec:	4b1a      	ldr	r3, [pc, #104]	@ (801cb58 <tcp_input+0x4a0>)
 801caee:	681b      	ldr	r3, [r3, #0]
 801caf0:	885b      	ldrh	r3, [r3, #2]
 801caf2:	b29b      	uxth	r3, r3
 801caf4:	429a      	cmp	r2, r3
 801caf6:	d10c      	bne.n	801cb12 <tcp_input+0x45a>
          lpcb_prev = prev;
#else /* SO_REUSE */
          break;
#endif /* SO_REUSE */
        } else if (IP_ADDR_PCB_VERSION_MATCH_EXACT(lpcb, ip_current_dest_addr())) {
          if (ip_addr_cmp(&lpcb->local_ip, ip_current_dest_addr())) {
 801caf8:	697b      	ldr	r3, [r7, #20]
 801cafa:	681a      	ldr	r2, [r3, #0]
 801cafc:	4b17      	ldr	r3, [pc, #92]	@ (801cb5c <tcp_input+0x4a4>)
 801cafe:	695b      	ldr	r3, [r3, #20]
 801cb00:	429a      	cmp	r2, r3
 801cb02:	d00f      	beq.n	801cb24 <tcp_input+0x46c>
            /* found an exact match */
            break;
          } else if (ip_addr_isany(&lpcb->local_ip)) {
 801cb04:	697b      	ldr	r3, [r7, #20]
 801cb06:	2b00      	cmp	r3, #0
 801cb08:	d00d      	beq.n	801cb26 <tcp_input+0x46e>
 801cb0a:	697b      	ldr	r3, [r7, #20]
 801cb0c:	681b      	ldr	r3, [r3, #0]
 801cb0e:	2b00      	cmp	r3, #0
 801cb10:	d009      	beq.n	801cb26 <tcp_input+0x46e>
            break;
#endif /* SO_REUSE */
          }
        }
      }
      prev = (struct tcp_pcb *)lpcb;
 801cb12:	697b      	ldr	r3, [r7, #20]
 801cb14:	61fb      	str	r3, [r7, #28]
    for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801cb16:	697b      	ldr	r3, [r7, #20]
 801cb18:	68db      	ldr	r3, [r3, #12]
 801cb1a:	617b      	str	r3, [r7, #20]
 801cb1c:	697b      	ldr	r3, [r7, #20]
 801cb1e:	2b00      	cmp	r3, #0
 801cb20:	d1d1      	bne.n	801cac6 <tcp_input+0x40e>
 801cb22:	e000      	b.n	801cb26 <tcp_input+0x46e>
            break;
 801cb24:	bf00      	nop
      /* only pass to ANY if no specific local IP has been found */
      lpcb = lpcb_any;
      prev = lpcb_prev;
    }
#endif /* SO_REUSE */
    if (lpcb != NULL) {
 801cb26:	697b      	ldr	r3, [r7, #20]
 801cb28:	2b00      	cmp	r3, #0
 801cb2a:	d029      	beq.n	801cb80 <tcp_input+0x4c8>
      /* Move this PCB to the front of the list so that subsequent
         lookups will be faster (we exploit locality in TCP segment
         arrivals). */
      if (prev != NULL) {
 801cb2c:	69fb      	ldr	r3, [r7, #28]
 801cb2e:	2b00      	cmp	r3, #0
 801cb30:	d00a      	beq.n	801cb48 <tcp_input+0x490>
        ((struct tcp_pcb_listen *)prev)->next = lpcb->next;
 801cb32:	697b      	ldr	r3, [r7, #20]
 801cb34:	68da      	ldr	r2, [r3, #12]
 801cb36:	69fb      	ldr	r3, [r7, #28]
 801cb38:	60da      	str	r2, [r3, #12]
        /* our successor is the remainder of the listening list */
        lpcb->next = tcp_listen_pcbs.listen_pcbs;
 801cb3a:	4b10      	ldr	r3, [pc, #64]	@ (801cb7c <tcp_input+0x4c4>)
 801cb3c:	681a      	ldr	r2, [r3, #0]
 801cb3e:	697b      	ldr	r3, [r7, #20]
 801cb40:	60da      	str	r2, [r3, #12]
        /* put this listening pcb at the head of the listening list */
        tcp_listen_pcbs.listen_pcbs = lpcb;
 801cb42:	4a0e      	ldr	r2, [pc, #56]	@ (801cb7c <tcp_input+0x4c4>)
 801cb44:	697b      	ldr	r3, [r7, #20]
 801cb46:	6013      	str	r3, [r2, #0]
#ifdef LWIP_HOOK_TCP_INPACKET_PCB
      if (LWIP_HOOK_TCP_INPACKET_PCB((struct tcp_pcb *)lpcb, tcphdr, tcphdr_optlen,
                                     tcphdr_opt1len, tcphdr_opt2, p) == ERR_OK)
#endif
      {
        tcp_listen_input(lpcb);
 801cb48:	6978      	ldr	r0, [r7, #20]
 801cb4a:	f000 fa03 	bl	801cf54 <tcp_listen_input>
      }
      pbuf_free(p);
 801cb4e:	6878      	ldr	r0, [r7, #4]
 801cb50:	f7fd fccc 	bl	801a4ec <pbuf_free>
      return;
 801cb54:	e1a8      	b.n	801cea8 <tcp_input+0x7f0>
 801cb56:	bf00      	nop
 801cb58:	2402aeb4 	.word	0x2402aeb4
 801cb5c:	24024338 	.word	0x24024338
 801cb60:	0802ed58 	.word	0x0802ed58
 801cb64:	0802ee84 	.word	0x0802ee84
 801cb68:	0802eda4 	.word	0x0802eda4
 801cb6c:	2402ae94 	.word	0x2402ae94
 801cb70:	0802eeb0 	.word	0x0802eeb0
 801cb74:	2402ae98 	.word	0x2402ae98
 801cb78:	0802eedc 	.word	0x0802eedc
 801cb7c:	2402ae90 	.word	0x2402ae90
      tcphdr_opt1len, tcphdr_opt2, p) != ERR_OK) {
    pbuf_free(p);
    return;
  }
#endif
  if (pcb != NULL) {
 801cb80:	69bb      	ldr	r3, [r7, #24]
 801cb82:	2b00      	cmp	r3, #0
 801cb84:	f000 8158 	beq.w	801ce38 <tcp_input+0x780>
#if TCP_INPUT_DEBUG
    tcp_debug_print_state(pcb->state);
#endif /* TCP_INPUT_DEBUG */

    /* Set up a tcp_seg structure. */
    inseg.next = NULL;
 801cb88:	4b95      	ldr	r3, [pc, #596]	@ (801cde0 <tcp_input+0x728>)
 801cb8a:	2200      	movs	r2, #0
 801cb8c:	601a      	str	r2, [r3, #0]
    inseg.len = p->tot_len;
 801cb8e:	687b      	ldr	r3, [r7, #4]
 801cb90:	891a      	ldrh	r2, [r3, #8]
 801cb92:	4b93      	ldr	r3, [pc, #588]	@ (801cde0 <tcp_input+0x728>)
 801cb94:	811a      	strh	r2, [r3, #8]
    inseg.p = p;
 801cb96:	4a92      	ldr	r2, [pc, #584]	@ (801cde0 <tcp_input+0x728>)
 801cb98:	687b      	ldr	r3, [r7, #4]
 801cb9a:	6053      	str	r3, [r2, #4]
    inseg.tcphdr = tcphdr;
 801cb9c:	4b91      	ldr	r3, [pc, #580]	@ (801cde4 <tcp_input+0x72c>)
 801cb9e:	681b      	ldr	r3, [r3, #0]
 801cba0:	4a8f      	ldr	r2, [pc, #572]	@ (801cde0 <tcp_input+0x728>)
 801cba2:	6113      	str	r3, [r2, #16]

    recv_data = NULL;
 801cba4:	4b90      	ldr	r3, [pc, #576]	@ (801cde8 <tcp_input+0x730>)
 801cba6:	2200      	movs	r2, #0
 801cba8:	601a      	str	r2, [r3, #0]
    recv_flags = 0;
 801cbaa:	4b90      	ldr	r3, [pc, #576]	@ (801cdec <tcp_input+0x734>)
 801cbac:	2200      	movs	r2, #0
 801cbae:	701a      	strb	r2, [r3, #0]
    recv_acked = 0;
 801cbb0:	4b8f      	ldr	r3, [pc, #572]	@ (801cdf0 <tcp_input+0x738>)
 801cbb2:	2200      	movs	r2, #0
 801cbb4:	801a      	strh	r2, [r3, #0]

    if (flags & TCP_PSH) {
 801cbb6:	4b8f      	ldr	r3, [pc, #572]	@ (801cdf4 <tcp_input+0x73c>)
 801cbb8:	781b      	ldrb	r3, [r3, #0]
 801cbba:	f003 0308 	and.w	r3, r3, #8
 801cbbe:	2b00      	cmp	r3, #0
 801cbc0:	d006      	beq.n	801cbd0 <tcp_input+0x518>
      p->flags |= PBUF_FLAG_PUSH;
 801cbc2:	687b      	ldr	r3, [r7, #4]
 801cbc4:	7b5b      	ldrb	r3, [r3, #13]
 801cbc6:	f043 0301 	orr.w	r3, r3, #1
 801cbca:	b2da      	uxtb	r2, r3
 801cbcc:	687b      	ldr	r3, [r7, #4]
 801cbce:	735a      	strb	r2, [r3, #13]
    }

    /* If there is data which was previously "refused" by upper layer */
    if (pcb->refused_data != NULL) {
 801cbd0:	69bb      	ldr	r3, [r7, #24]
 801cbd2:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801cbd4:	2b00      	cmp	r3, #0
 801cbd6:	d017      	beq.n	801cc08 <tcp_input+0x550>
      if ((tcp_process_refused_data(pcb) == ERR_ABRT) ||
 801cbd8:	69b8      	ldr	r0, [r7, #24]
 801cbda:	f7ff f84d 	bl	801bc78 <tcp_process_refused_data>
 801cbde:	4603      	mov	r3, r0
 801cbe0:	f113 0f0d 	cmn.w	r3, #13
 801cbe4:	d007      	beq.n	801cbf6 <tcp_input+0x53e>
          ((pcb->refused_data != NULL) && (tcplen > 0))) {
 801cbe6:	69bb      	ldr	r3, [r7, #24]
 801cbe8:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
      if ((tcp_process_refused_data(pcb) == ERR_ABRT) ||
 801cbea:	2b00      	cmp	r3, #0
 801cbec:	d00c      	beq.n	801cc08 <tcp_input+0x550>
          ((pcb->refused_data != NULL) && (tcplen > 0))) {
 801cbee:	4b82      	ldr	r3, [pc, #520]	@ (801cdf8 <tcp_input+0x740>)
 801cbf0:	881b      	ldrh	r3, [r3, #0]
 801cbf2:	2b00      	cmp	r3, #0
 801cbf4:	d008      	beq.n	801cc08 <tcp_input+0x550>
        /* pcb has been aborted or refused data is still refused and the new
           segment contains data */
        if (pcb->rcv_ann_wnd == 0) {
 801cbf6:	69bb      	ldr	r3, [r7, #24]
 801cbf8:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
 801cbfa:	2b00      	cmp	r3, #0
 801cbfc:	f040 80e4 	bne.w	801cdc8 <tcp_input+0x710>
          /* this is a zero-window probe, we respond to it with current RCV.NXT
          and drop the data segment */
          tcp_send_empty_ack(pcb);
 801cc00:	69b8      	ldr	r0, [r7, #24]
 801cc02:	f003 fe73 	bl	80208ec <tcp_send_empty_ack>
        }
        TCP_STATS_INC(tcp.drop);
        MIB2_STATS_INC(mib2.tcpinerrs);
        goto aborted;
 801cc06:	e0df      	b.n	801cdc8 <tcp_input+0x710>
      }
    }
    tcp_input_pcb = pcb;
 801cc08:	4a7c      	ldr	r2, [pc, #496]	@ (801cdfc <tcp_input+0x744>)
 801cc0a:	69bb      	ldr	r3, [r7, #24]
 801cc0c:	6013      	str	r3, [r2, #0]
    err = tcp_process(pcb);
 801cc0e:	69b8      	ldr	r0, [r7, #24]
 801cc10:	f000 fb18 	bl	801d244 <tcp_process>
 801cc14:	4603      	mov	r3, r0
 801cc16:	74fb      	strb	r3, [r7, #19]
    /* A return value of ERR_ABRT means that tcp_abort() was called
       and that the pcb has been freed. If so, we don't do anything. */
    if (err != ERR_ABRT) {
 801cc18:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801cc1c:	f113 0f0d 	cmn.w	r3, #13
 801cc20:	f000 80d4 	beq.w	801cdcc <tcp_input+0x714>
      if (recv_flags & TF_RESET) {
 801cc24:	4b71      	ldr	r3, [pc, #452]	@ (801cdec <tcp_input+0x734>)
 801cc26:	781b      	ldrb	r3, [r3, #0]
 801cc28:	f003 0308 	and.w	r3, r3, #8
 801cc2c:	2b00      	cmp	r3, #0
 801cc2e:	d015      	beq.n	801cc5c <tcp_input+0x5a4>
        /* TF_RESET means that the connection was reset by the other
           end. We then call the error callback to inform the
           application that the connection is dead before we
           deallocate the PCB. */
        TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_RST);
 801cc30:	69bb      	ldr	r3, [r7, #24]
 801cc32:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801cc36:	2b00      	cmp	r3, #0
 801cc38:	d008      	beq.n	801cc4c <tcp_input+0x594>
 801cc3a:	69bb      	ldr	r3, [r7, #24]
 801cc3c:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801cc40:	69ba      	ldr	r2, [r7, #24]
 801cc42:	6912      	ldr	r2, [r2, #16]
 801cc44:	f06f 010d 	mvn.w	r1, #13
 801cc48:	4610      	mov	r0, r2
 801cc4a:	4798      	blx	r3
        tcp_pcb_remove(&tcp_active_pcbs, pcb);
 801cc4c:	69b9      	ldr	r1, [r7, #24]
 801cc4e:	486c      	ldr	r0, [pc, #432]	@ (801ce00 <tcp_input+0x748>)
 801cc50:	f7ff fbba 	bl	801c3c8 <tcp_pcb_remove>
        tcp_free(pcb);
 801cc54:	69b8      	ldr	r0, [r7, #24]
 801cc56:	f7fd ff05 	bl	801aa64 <tcp_free>
 801cc5a:	e0da      	b.n	801ce12 <tcp_input+0x75a>
      } else {
        err = ERR_OK;
 801cc5c:	2300      	movs	r3, #0
 801cc5e:	74fb      	strb	r3, [r7, #19]
        /* If the application has registered a "sent" function to be
           called when new send buffer space is available, we call it
           now. */
        if (recv_acked > 0) {
 801cc60:	4b63      	ldr	r3, [pc, #396]	@ (801cdf0 <tcp_input+0x738>)
 801cc62:	881b      	ldrh	r3, [r3, #0]
 801cc64:	2b00      	cmp	r3, #0
 801cc66:	d01d      	beq.n	801cca4 <tcp_input+0x5ec>
          while (acked > 0) {
            acked16 = (u16_t)LWIP_MIN(acked, 0xffffu);
            acked -= acked16;
#else
          {
            acked16 = recv_acked;
 801cc68:	4b61      	ldr	r3, [pc, #388]	@ (801cdf0 <tcp_input+0x738>)
 801cc6a:	881b      	ldrh	r3, [r3, #0]
 801cc6c:	81fb      	strh	r3, [r7, #14]
#endif
            TCP_EVENT_SENT(pcb, (u16_t)acked16, err);
 801cc6e:	69bb      	ldr	r3, [r7, #24]
 801cc70:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 801cc74:	2b00      	cmp	r3, #0
 801cc76:	d00a      	beq.n	801cc8e <tcp_input+0x5d6>
 801cc78:	69bb      	ldr	r3, [r7, #24]
 801cc7a:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 801cc7e:	69ba      	ldr	r2, [r7, #24]
 801cc80:	6910      	ldr	r0, [r2, #16]
 801cc82:	89fa      	ldrh	r2, [r7, #14]
 801cc84:	69b9      	ldr	r1, [r7, #24]
 801cc86:	4798      	blx	r3
 801cc88:	4603      	mov	r3, r0
 801cc8a:	74fb      	strb	r3, [r7, #19]
 801cc8c:	e001      	b.n	801cc92 <tcp_input+0x5da>
 801cc8e:	2300      	movs	r3, #0
 801cc90:	74fb      	strb	r3, [r7, #19]
            if (err == ERR_ABRT) {
 801cc92:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801cc96:	f113 0f0d 	cmn.w	r3, #13
 801cc9a:	f000 8099 	beq.w	801cdd0 <tcp_input+0x718>
              goto aborted;
            }
          }
          recv_acked = 0;
 801cc9e:	4b54      	ldr	r3, [pc, #336]	@ (801cdf0 <tcp_input+0x738>)
 801cca0:	2200      	movs	r2, #0
 801cca2:	801a      	strh	r2, [r3, #0]
        }
        if (tcp_input_delayed_close(pcb)) {
 801cca4:	69b8      	ldr	r0, [r7, #24]
 801cca6:	f000 f915 	bl	801ced4 <tcp_input_delayed_close>
 801ccaa:	4603      	mov	r3, r0
 801ccac:	2b00      	cmp	r3, #0
 801ccae:	f040 8091 	bne.w	801cdd4 <tcp_input+0x71c>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
        while (recv_data != NULL) {
          struct pbuf *rest = NULL;
          pbuf_split_64k(recv_data, &rest);
#else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
        if (recv_data != NULL) {
 801ccb2:	4b4d      	ldr	r3, [pc, #308]	@ (801cde8 <tcp_input+0x730>)
 801ccb4:	681b      	ldr	r3, [r3, #0]
 801ccb6:	2b00      	cmp	r3, #0
 801ccb8:	d041      	beq.n	801cd3e <tcp_input+0x686>
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */

          LWIP_ASSERT("pcb->refused_data == NULL", pcb->refused_data == NULL);
 801ccba:	69bb      	ldr	r3, [r7, #24]
 801ccbc:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801ccbe:	2b00      	cmp	r3, #0
 801ccc0:	d006      	beq.n	801ccd0 <tcp_input+0x618>
 801ccc2:	4b50      	ldr	r3, [pc, #320]	@ (801ce04 <tcp_input+0x74c>)
 801ccc4:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 801ccc8:	494f      	ldr	r1, [pc, #316]	@ (801ce08 <tcp_input+0x750>)
 801ccca:	4850      	ldr	r0, [pc, #320]	@ (801ce0c <tcp_input+0x754>)
 801cccc:	f00c fe86 	bl	80299dc <iprintf>
          if (pcb->flags & TF_RXCLOSED) {
 801ccd0:	69bb      	ldr	r3, [r7, #24]
 801ccd2:	8b5b      	ldrh	r3, [r3, #26]
 801ccd4:	f003 0310 	and.w	r3, r3, #16
 801ccd8:	2b00      	cmp	r3, #0
 801ccda:	d008      	beq.n	801ccee <tcp_input+0x636>
            /* received data although already closed -> abort (send RST) to
               notify the remote host that not all data has been processed */
            pbuf_free(recv_data);
 801ccdc:	4b42      	ldr	r3, [pc, #264]	@ (801cde8 <tcp_input+0x730>)
 801ccde:	681b      	ldr	r3, [r3, #0]
 801cce0:	4618      	mov	r0, r3
 801cce2:	f7fd fc03 	bl	801a4ec <pbuf_free>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
            if (rest != NULL) {
              pbuf_free(rest);
            }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            tcp_abort(pcb);
 801cce6:	69b8      	ldr	r0, [r7, #24]
 801cce8:	f7fe fa06 	bl	801b0f8 <tcp_abort>
            goto aborted;
 801ccec:	e091      	b.n	801ce12 <tcp_input+0x75a>
          }

          /* Notify application that data has been received. */
          TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err);
 801ccee:	69bb      	ldr	r3, [r7, #24]
 801ccf0:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801ccf4:	2b00      	cmp	r3, #0
 801ccf6:	d00c      	beq.n	801cd12 <tcp_input+0x65a>
 801ccf8:	69bb      	ldr	r3, [r7, #24]
 801ccfa:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801ccfe:	69bb      	ldr	r3, [r7, #24]
 801cd00:	6918      	ldr	r0, [r3, #16]
 801cd02:	4b39      	ldr	r3, [pc, #228]	@ (801cde8 <tcp_input+0x730>)
 801cd04:	681a      	ldr	r2, [r3, #0]
 801cd06:	2300      	movs	r3, #0
 801cd08:	69b9      	ldr	r1, [r7, #24]
 801cd0a:	47a0      	blx	r4
 801cd0c:	4603      	mov	r3, r0
 801cd0e:	74fb      	strb	r3, [r7, #19]
 801cd10:	e008      	b.n	801cd24 <tcp_input+0x66c>
 801cd12:	4b35      	ldr	r3, [pc, #212]	@ (801cde8 <tcp_input+0x730>)
 801cd14:	681a      	ldr	r2, [r3, #0]
 801cd16:	2300      	movs	r3, #0
 801cd18:	69b9      	ldr	r1, [r7, #24]
 801cd1a:	2000      	movs	r0, #0
 801cd1c:	f7ff f884 	bl	801be28 <tcp_recv_null>
 801cd20:	4603      	mov	r3, r0
 801cd22:	74fb      	strb	r3, [r7, #19]
          if (err == ERR_ABRT) {
 801cd24:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801cd28:	f113 0f0d 	cmn.w	r3, #13
 801cd2c:	d054      	beq.n	801cdd8 <tcp_input+0x720>
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            goto aborted;
          }

          /* If the upper layer can't receive this data, store it */
          if (err != ERR_OK) {
 801cd2e:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801cd32:	2b00      	cmp	r3, #0
 801cd34:	d003      	beq.n	801cd3e <tcp_input+0x686>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
            if (rest != NULL) {
              pbuf_cat(recv_data, rest);
            }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            pcb->refused_data = recv_data;
 801cd36:	4b2c      	ldr	r3, [pc, #176]	@ (801cde8 <tcp_input+0x730>)
 801cd38:	681a      	ldr	r2, [r3, #0]
 801cd3a:	69bb      	ldr	r3, [r7, #24]
 801cd3c:	679a      	str	r2, [r3, #120]	@ 0x78
          }
        }

        /* If a FIN segment was received, we call the callback
           function with a NULL buffer to indicate EOF. */
        if (recv_flags & TF_GOT_FIN) {
 801cd3e:	4b2b      	ldr	r3, [pc, #172]	@ (801cdec <tcp_input+0x734>)
 801cd40:	781b      	ldrb	r3, [r3, #0]
 801cd42:	f003 0320 	and.w	r3, r3, #32
 801cd46:	2b00      	cmp	r3, #0
 801cd48:	d031      	beq.n	801cdae <tcp_input+0x6f6>
          if (pcb->refused_data != NULL) {
 801cd4a:	69bb      	ldr	r3, [r7, #24]
 801cd4c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801cd4e:	2b00      	cmp	r3, #0
 801cd50:	d009      	beq.n	801cd66 <tcp_input+0x6ae>
            /* Delay this if we have refused data. */
            pcb->refused_data->flags |= PBUF_FLAG_TCP_FIN;
 801cd52:	69bb      	ldr	r3, [r7, #24]
 801cd54:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801cd56:	7b5a      	ldrb	r2, [r3, #13]
 801cd58:	69bb      	ldr	r3, [r7, #24]
 801cd5a:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801cd5c:	f042 0220 	orr.w	r2, r2, #32
 801cd60:	b2d2      	uxtb	r2, r2
 801cd62:	735a      	strb	r2, [r3, #13]
 801cd64:	e023      	b.n	801cdae <tcp_input+0x6f6>
          } else {
            /* correct rcv_wnd as the application won't call tcp_recved()
               for the FIN's seqno */
            if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) {
 801cd66:	69bb      	ldr	r3, [r7, #24]
 801cd68:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801cd6a:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801cd6e:	4293      	cmp	r3, r2
 801cd70:	d005      	beq.n	801cd7e <tcp_input+0x6c6>
              pcb->rcv_wnd++;
 801cd72:	69bb      	ldr	r3, [r7, #24]
 801cd74:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801cd76:	3301      	adds	r3, #1
 801cd78:	b29a      	uxth	r2, r3
 801cd7a:	69bb      	ldr	r3, [r7, #24]
 801cd7c:	851a      	strh	r2, [r3, #40]	@ 0x28
            }
            TCP_EVENT_CLOSED(pcb, err);
 801cd7e:	69bb      	ldr	r3, [r7, #24]
 801cd80:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801cd84:	2b00      	cmp	r3, #0
 801cd86:	d00b      	beq.n	801cda0 <tcp_input+0x6e8>
 801cd88:	69bb      	ldr	r3, [r7, #24]
 801cd8a:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801cd8e:	69bb      	ldr	r3, [r7, #24]
 801cd90:	6918      	ldr	r0, [r3, #16]
 801cd92:	2300      	movs	r3, #0
 801cd94:	2200      	movs	r2, #0
 801cd96:	69b9      	ldr	r1, [r7, #24]
 801cd98:	47a0      	blx	r4
 801cd9a:	4603      	mov	r3, r0
 801cd9c:	74fb      	strb	r3, [r7, #19]
 801cd9e:	e001      	b.n	801cda4 <tcp_input+0x6ec>
 801cda0:	2300      	movs	r3, #0
 801cda2:	74fb      	strb	r3, [r7, #19]
            if (err == ERR_ABRT) {
 801cda4:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801cda8:	f113 0f0d 	cmn.w	r3, #13
 801cdac:	d016      	beq.n	801cddc <tcp_input+0x724>
              goto aborted;
            }
          }
        }

        tcp_input_pcb = NULL;
 801cdae:	4b13      	ldr	r3, [pc, #76]	@ (801cdfc <tcp_input+0x744>)
 801cdb0:	2200      	movs	r2, #0
 801cdb2:	601a      	str	r2, [r3, #0]
        if (tcp_input_delayed_close(pcb)) {
 801cdb4:	69b8      	ldr	r0, [r7, #24]
 801cdb6:	f000 f88d 	bl	801ced4 <tcp_input_delayed_close>
 801cdba:	4603      	mov	r3, r0
 801cdbc:	2b00      	cmp	r3, #0
 801cdbe:	d127      	bne.n	801ce10 <tcp_input+0x758>
          goto aborted;
        }
        /* Try to send something out. */
        tcp_output(pcb);
 801cdc0:	69b8      	ldr	r0, [r7, #24]
 801cdc2:	f002 ff7f 	bl	801fcc4 <tcp_output>
 801cdc6:	e024      	b.n	801ce12 <tcp_input+0x75a>
        goto aborted;
 801cdc8:	bf00      	nop
 801cdca:	e022      	b.n	801ce12 <tcp_input+0x75a>
#endif /* TCP_INPUT_DEBUG */
      }
    }
    /* Jump target if pcb has been aborted in a callback (by calling tcp_abort()).
       Below this line, 'pcb' may not be dereferenced! */
aborted:
 801cdcc:	bf00      	nop
 801cdce:	e020      	b.n	801ce12 <tcp_input+0x75a>
              goto aborted;
 801cdd0:	bf00      	nop
 801cdd2:	e01e      	b.n	801ce12 <tcp_input+0x75a>
          goto aborted;
 801cdd4:	bf00      	nop
 801cdd6:	e01c      	b.n	801ce12 <tcp_input+0x75a>
            goto aborted;
 801cdd8:	bf00      	nop
 801cdda:	e01a      	b.n	801ce12 <tcp_input+0x75a>
              goto aborted;
 801cddc:	bf00      	nop
 801cdde:	e018      	b.n	801ce12 <tcp_input+0x75a>
 801cde0:	2402aea0 	.word	0x2402aea0
 801cde4:	2402aeb4 	.word	0x2402aeb4
 801cde8:	2402aed4 	.word	0x2402aed4
 801cdec:	2402aed1 	.word	0x2402aed1
 801cdf0:	2402aecc 	.word	0x2402aecc
 801cdf4:	2402aed0 	.word	0x2402aed0
 801cdf8:	2402aece 	.word	0x2402aece
 801cdfc:	2402aed8 	.word	0x2402aed8
 801ce00:	2402ae94 	.word	0x2402ae94
 801ce04:	0802ed58 	.word	0x0802ed58
 801ce08:	0802ef0c 	.word	0x0802ef0c
 801ce0c:	0802eda4 	.word	0x0802eda4
          goto aborted;
 801ce10:	bf00      	nop
    tcp_input_pcb = NULL;
 801ce12:	4b27      	ldr	r3, [pc, #156]	@ (801ceb0 <tcp_input+0x7f8>)
 801ce14:	2200      	movs	r2, #0
 801ce16:	601a      	str	r2, [r3, #0]
    recv_data = NULL;
 801ce18:	4b26      	ldr	r3, [pc, #152]	@ (801ceb4 <tcp_input+0x7fc>)
 801ce1a:	2200      	movs	r2, #0
 801ce1c:	601a      	str	r2, [r3, #0]

    /* give up our reference to inseg.p */
    if (inseg.p != NULL) {
 801ce1e:	4b26      	ldr	r3, [pc, #152]	@ (801ceb8 <tcp_input+0x800>)
 801ce20:	685b      	ldr	r3, [r3, #4]
 801ce22:	2b00      	cmp	r3, #0
 801ce24:	d03f      	beq.n	801cea6 <tcp_input+0x7ee>
      pbuf_free(inseg.p);
 801ce26:	4b24      	ldr	r3, [pc, #144]	@ (801ceb8 <tcp_input+0x800>)
 801ce28:	685b      	ldr	r3, [r3, #4]
 801ce2a:	4618      	mov	r0, r3
 801ce2c:	f7fd fb5e 	bl	801a4ec <pbuf_free>
      inseg.p = NULL;
 801ce30:	4b21      	ldr	r3, [pc, #132]	@ (801ceb8 <tcp_input+0x800>)
 801ce32:	2200      	movs	r2, #0
 801ce34:	605a      	str	r2, [r3, #4]
    pbuf_free(p);
  }

  LWIP_ASSERT("tcp_input: tcp_pcbs_sane()", tcp_pcbs_sane());
  PERF_STOP("tcp_input");
  return;
 801ce36:	e036      	b.n	801cea6 <tcp_input+0x7ee>
    if (!(TCPH_FLAGS(tcphdr) & TCP_RST)) {
 801ce38:	4b20      	ldr	r3, [pc, #128]	@ (801cebc <tcp_input+0x804>)
 801ce3a:	681b      	ldr	r3, [r3, #0]
 801ce3c:	899b      	ldrh	r3, [r3, #12]
 801ce3e:	b29b      	uxth	r3, r3
 801ce40:	4618      	mov	r0, r3
 801ce42:	f7fb fe71 	bl	8018b28 <lwip_htons>
 801ce46:	4603      	mov	r3, r0
 801ce48:	b2db      	uxtb	r3, r3
 801ce4a:	f003 0304 	and.w	r3, r3, #4
 801ce4e:	2b00      	cmp	r3, #0
 801ce50:	d118      	bne.n	801ce84 <tcp_input+0x7cc>
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801ce52:	4b1b      	ldr	r3, [pc, #108]	@ (801cec0 <tcp_input+0x808>)
 801ce54:	6819      	ldr	r1, [r3, #0]
 801ce56:	4b1b      	ldr	r3, [pc, #108]	@ (801cec4 <tcp_input+0x80c>)
 801ce58:	881b      	ldrh	r3, [r3, #0]
 801ce5a:	461a      	mov	r2, r3
 801ce5c:	4b1a      	ldr	r3, [pc, #104]	@ (801cec8 <tcp_input+0x810>)
 801ce5e:	681b      	ldr	r3, [r3, #0]
 801ce60:	18d0      	adds	r0, r2, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801ce62:	4b16      	ldr	r3, [pc, #88]	@ (801cebc <tcp_input+0x804>)
 801ce64:	681b      	ldr	r3, [r3, #0]
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801ce66:	885b      	ldrh	r3, [r3, #2]
 801ce68:	b29b      	uxth	r3, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801ce6a:	4a14      	ldr	r2, [pc, #80]	@ (801cebc <tcp_input+0x804>)
 801ce6c:	6812      	ldr	r2, [r2, #0]
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801ce6e:	8812      	ldrh	r2, [r2, #0]
 801ce70:	b292      	uxth	r2, r2
 801ce72:	9202      	str	r2, [sp, #8]
 801ce74:	9301      	str	r3, [sp, #4]
 801ce76:	4b15      	ldr	r3, [pc, #84]	@ (801cecc <tcp_input+0x814>)
 801ce78:	9300      	str	r3, [sp, #0]
 801ce7a:	4b15      	ldr	r3, [pc, #84]	@ (801ced0 <tcp_input+0x818>)
 801ce7c:	4602      	mov	r2, r0
 801ce7e:	2000      	movs	r0, #0
 801ce80:	f003 fce2 	bl	8020848 <tcp_rst>
    pbuf_free(p);
 801ce84:	6878      	ldr	r0, [r7, #4]
 801ce86:	f7fd fb31 	bl	801a4ec <pbuf_free>
  return;
 801ce8a:	e00c      	b.n	801cea6 <tcp_input+0x7ee>
    goto dropped;
 801ce8c:	bf00      	nop
 801ce8e:	e006      	b.n	801ce9e <tcp_input+0x7e6>
    goto dropped;
 801ce90:	bf00      	nop
 801ce92:	e004      	b.n	801ce9e <tcp_input+0x7e6>
    goto dropped;
 801ce94:	bf00      	nop
 801ce96:	e002      	b.n	801ce9e <tcp_input+0x7e6>
      goto dropped;
 801ce98:	bf00      	nop
 801ce9a:	e000      	b.n	801ce9e <tcp_input+0x7e6>
      goto dropped;
 801ce9c:	bf00      	nop
dropped:
  TCP_STATS_INC(tcp.drop);
  MIB2_STATS_INC(mib2.tcpinerrs);
  pbuf_free(p);
 801ce9e:	6878      	ldr	r0, [r7, #4]
 801cea0:	f7fd fb24 	bl	801a4ec <pbuf_free>
 801cea4:	e000      	b.n	801cea8 <tcp_input+0x7f0>
  return;
 801cea6:	bf00      	nop
}
 801cea8:	3724      	adds	r7, #36	@ 0x24
 801ceaa:	46bd      	mov	sp, r7
 801ceac:	bd90      	pop	{r4, r7, pc}
 801ceae:	bf00      	nop
 801ceb0:	2402aed8 	.word	0x2402aed8
 801ceb4:	2402aed4 	.word	0x2402aed4
 801ceb8:	2402aea0 	.word	0x2402aea0
 801cebc:	2402aeb4 	.word	0x2402aeb4
 801cec0:	2402aec8 	.word	0x2402aec8
 801cec4:	2402aece 	.word	0x2402aece
 801cec8:	2402aec4 	.word	0x2402aec4
 801cecc:	24024348 	.word	0x24024348
 801ced0:	2402434c 	.word	0x2402434c

0801ced4 <tcp_input_delayed_close>:
 * any more.
 * @returns 1 if the pcb has been closed and deallocated, 0 otherwise
 */
static int
tcp_input_delayed_close(struct tcp_pcb *pcb)
{
 801ced4:	b580      	push	{r7, lr}
 801ced6:	b082      	sub	sp, #8
 801ced8:	af00      	add	r7, sp, #0
 801ceda:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_input_delayed_close: invalid pcb", pcb != NULL);
 801cedc:	687b      	ldr	r3, [r7, #4]
 801cede:	2b00      	cmp	r3, #0
 801cee0:	d106      	bne.n	801cef0 <tcp_input_delayed_close+0x1c>
 801cee2:	4b17      	ldr	r3, [pc, #92]	@ (801cf40 <tcp_input_delayed_close+0x6c>)
 801cee4:	f240 225a 	movw	r2, #602	@ 0x25a
 801cee8:	4916      	ldr	r1, [pc, #88]	@ (801cf44 <tcp_input_delayed_close+0x70>)
 801ceea:	4817      	ldr	r0, [pc, #92]	@ (801cf48 <tcp_input_delayed_close+0x74>)
 801ceec:	f00c fd76 	bl	80299dc <iprintf>

  if (recv_flags & TF_CLOSED) {
 801cef0:	4b16      	ldr	r3, [pc, #88]	@ (801cf4c <tcp_input_delayed_close+0x78>)
 801cef2:	781b      	ldrb	r3, [r3, #0]
 801cef4:	f003 0310 	and.w	r3, r3, #16
 801cef8:	2b00      	cmp	r3, #0
 801cefa:	d01c      	beq.n	801cf36 <tcp_input_delayed_close+0x62>
    /* The connection has been closed and we will deallocate the
        PCB. */
    if (!(pcb->flags & TF_RXCLOSED)) {
 801cefc:	687b      	ldr	r3, [r7, #4]
 801cefe:	8b5b      	ldrh	r3, [r3, #26]
 801cf00:	f003 0310 	and.w	r3, r3, #16
 801cf04:	2b00      	cmp	r3, #0
 801cf06:	d10d      	bne.n	801cf24 <tcp_input_delayed_close+0x50>
      /* Connection closed although the application has only shut down the
          tx side: call the PCB's err callback and indicate the closure to
          ensure the application doesn't continue using the PCB. */
      TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_CLSD);
 801cf08:	687b      	ldr	r3, [r7, #4]
 801cf0a:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801cf0e:	2b00      	cmp	r3, #0
 801cf10:	d008      	beq.n	801cf24 <tcp_input_delayed_close+0x50>
 801cf12:	687b      	ldr	r3, [r7, #4]
 801cf14:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801cf18:	687a      	ldr	r2, [r7, #4]
 801cf1a:	6912      	ldr	r2, [r2, #16]
 801cf1c:	f06f 010e 	mvn.w	r1, #14
 801cf20:	4610      	mov	r0, r2
 801cf22:	4798      	blx	r3
    }
    tcp_pcb_remove(&tcp_active_pcbs, pcb);
 801cf24:	6879      	ldr	r1, [r7, #4]
 801cf26:	480a      	ldr	r0, [pc, #40]	@ (801cf50 <tcp_input_delayed_close+0x7c>)
 801cf28:	f7ff fa4e 	bl	801c3c8 <tcp_pcb_remove>
    tcp_free(pcb);
 801cf2c:	6878      	ldr	r0, [r7, #4]
 801cf2e:	f7fd fd99 	bl	801aa64 <tcp_free>
    return 1;
 801cf32:	2301      	movs	r3, #1
 801cf34:	e000      	b.n	801cf38 <tcp_input_delayed_close+0x64>
  }
  return 0;
 801cf36:	2300      	movs	r3, #0
}
 801cf38:	4618      	mov	r0, r3
 801cf3a:	3708      	adds	r7, #8
 801cf3c:	46bd      	mov	sp, r7
 801cf3e:	bd80      	pop	{r7, pc}
 801cf40:	0802ed58 	.word	0x0802ed58
 801cf44:	0802ef28 	.word	0x0802ef28
 801cf48:	0802eda4 	.word	0x0802eda4
 801cf4c:	2402aed1 	.word	0x2402aed1
 801cf50:	2402ae94 	.word	0x2402ae94

0801cf54 <tcp_listen_input>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static void
tcp_listen_input(struct tcp_pcb_listen *pcb)
{
 801cf54:	b590      	push	{r4, r7, lr}
 801cf56:	b08b      	sub	sp, #44	@ 0x2c
 801cf58:	af04      	add	r7, sp, #16
 801cf5a:	6078      	str	r0, [r7, #4]
  struct tcp_pcb *npcb;
  u32_t iss;
  err_t rc;

  if (flags & TCP_RST) {
 801cf5c:	4b6f      	ldr	r3, [pc, #444]	@ (801d11c <tcp_listen_input+0x1c8>)
 801cf5e:	781b      	ldrb	r3, [r3, #0]
 801cf60:	f003 0304 	and.w	r3, r3, #4
 801cf64:	2b00      	cmp	r3, #0
 801cf66:	f040 80d2 	bne.w	801d10e <tcp_listen_input+0x1ba>
    /* An incoming RST should be ignored. Return. */
    return;
  }

  LWIP_ASSERT("tcp_listen_input: invalid pcb", pcb != NULL);
 801cf6a:	687b      	ldr	r3, [r7, #4]
 801cf6c:	2b00      	cmp	r3, #0
 801cf6e:	d106      	bne.n	801cf7e <tcp_listen_input+0x2a>
 801cf70:	4b6b      	ldr	r3, [pc, #428]	@ (801d120 <tcp_listen_input+0x1cc>)
 801cf72:	f240 2281 	movw	r2, #641	@ 0x281
 801cf76:	496b      	ldr	r1, [pc, #428]	@ (801d124 <tcp_listen_input+0x1d0>)
 801cf78:	486b      	ldr	r0, [pc, #428]	@ (801d128 <tcp_listen_input+0x1d4>)
 801cf7a:	f00c fd2f 	bl	80299dc <iprintf>

  /* In the LISTEN state, we check for incoming SYN segments,
     creates a new PCB, and responds with a SYN|ACK. */
  if (flags & TCP_ACK) {
 801cf7e:	4b67      	ldr	r3, [pc, #412]	@ (801d11c <tcp_listen_input+0x1c8>)
 801cf80:	781b      	ldrb	r3, [r3, #0]
 801cf82:	f003 0310 	and.w	r3, r3, #16
 801cf86:	2b00      	cmp	r3, #0
 801cf88:	d019      	beq.n	801cfbe <tcp_listen_input+0x6a>
    /* For incoming segments with the ACK flag set, respond with a
       RST. */
    LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_listen_input: ACK in LISTEN, sending reset\n"));
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801cf8a:	4b68      	ldr	r3, [pc, #416]	@ (801d12c <tcp_listen_input+0x1d8>)
 801cf8c:	6819      	ldr	r1, [r3, #0]
 801cf8e:	4b68      	ldr	r3, [pc, #416]	@ (801d130 <tcp_listen_input+0x1dc>)
 801cf90:	881b      	ldrh	r3, [r3, #0]
 801cf92:	461a      	mov	r2, r3
 801cf94:	4b67      	ldr	r3, [pc, #412]	@ (801d134 <tcp_listen_input+0x1e0>)
 801cf96:	681b      	ldr	r3, [r3, #0]
 801cf98:	18d0      	adds	r0, r2, r3
            ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801cf9a:	4b67      	ldr	r3, [pc, #412]	@ (801d138 <tcp_listen_input+0x1e4>)
 801cf9c:	681b      	ldr	r3, [r3, #0]
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801cf9e:	885b      	ldrh	r3, [r3, #2]
 801cfa0:	b29b      	uxth	r3, r3
            ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801cfa2:	4a65      	ldr	r2, [pc, #404]	@ (801d138 <tcp_listen_input+0x1e4>)
 801cfa4:	6812      	ldr	r2, [r2, #0]
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801cfa6:	8812      	ldrh	r2, [r2, #0]
 801cfa8:	b292      	uxth	r2, r2
 801cfaa:	9202      	str	r2, [sp, #8]
 801cfac:	9301      	str	r3, [sp, #4]
 801cfae:	4b63      	ldr	r3, [pc, #396]	@ (801d13c <tcp_listen_input+0x1e8>)
 801cfb0:	9300      	str	r3, [sp, #0]
 801cfb2:	4b63      	ldr	r3, [pc, #396]	@ (801d140 <tcp_listen_input+0x1ec>)
 801cfb4:	4602      	mov	r2, r0
 801cfb6:	6878      	ldr	r0, [r7, #4]
 801cfb8:	f003 fc46 	bl	8020848 <tcp_rst>
      tcp_abandon(npcb, 0);
      return;
    }
    tcp_output(npcb);
  }
  return;
 801cfbc:	e0a9      	b.n	801d112 <tcp_listen_input+0x1be>
  } else if (flags & TCP_SYN) {
 801cfbe:	4b57      	ldr	r3, [pc, #348]	@ (801d11c <tcp_listen_input+0x1c8>)
 801cfc0:	781b      	ldrb	r3, [r3, #0]
 801cfc2:	f003 0302 	and.w	r3, r3, #2
 801cfc6:	2b00      	cmp	r3, #0
 801cfc8:	f000 80a3 	beq.w	801d112 <tcp_listen_input+0x1be>
    npcb = tcp_alloc(pcb->prio);
 801cfcc:	687b      	ldr	r3, [r7, #4]
 801cfce:	7d5b      	ldrb	r3, [r3, #21]
 801cfd0:	4618      	mov	r0, r3
 801cfd2:	f7ff f84d 	bl	801c070 <tcp_alloc>
 801cfd6:	6178      	str	r0, [r7, #20]
    if (npcb == NULL) {
 801cfd8:	697b      	ldr	r3, [r7, #20]
 801cfda:	2b00      	cmp	r3, #0
 801cfdc:	d111      	bne.n	801d002 <tcp_listen_input+0xae>
      TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err);
 801cfde:	687b      	ldr	r3, [r7, #4]
 801cfe0:	699b      	ldr	r3, [r3, #24]
 801cfe2:	2b00      	cmp	r3, #0
 801cfe4:	d00a      	beq.n	801cffc <tcp_listen_input+0xa8>
 801cfe6:	687b      	ldr	r3, [r7, #4]
 801cfe8:	699b      	ldr	r3, [r3, #24]
 801cfea:	687a      	ldr	r2, [r7, #4]
 801cfec:	6910      	ldr	r0, [r2, #16]
 801cfee:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 801cff2:	2100      	movs	r1, #0
 801cff4:	4798      	blx	r3
 801cff6:	4603      	mov	r3, r0
 801cff8:	73bb      	strb	r3, [r7, #14]
      return;
 801cffa:	e08b      	b.n	801d114 <tcp_listen_input+0x1c0>
      TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err);
 801cffc:	23f0      	movs	r3, #240	@ 0xf0
 801cffe:	73bb      	strb	r3, [r7, #14]
      return;
 801d000:	e088      	b.n	801d114 <tcp_listen_input+0x1c0>
    ip_addr_copy(npcb->local_ip, *ip_current_dest_addr());
 801d002:	4b50      	ldr	r3, [pc, #320]	@ (801d144 <tcp_listen_input+0x1f0>)
 801d004:	695a      	ldr	r2, [r3, #20]
 801d006:	697b      	ldr	r3, [r7, #20]
 801d008:	601a      	str	r2, [r3, #0]
    ip_addr_copy(npcb->remote_ip, *ip_current_src_addr());
 801d00a:	4b4e      	ldr	r3, [pc, #312]	@ (801d144 <tcp_listen_input+0x1f0>)
 801d00c:	691a      	ldr	r2, [r3, #16]
 801d00e:	697b      	ldr	r3, [r7, #20]
 801d010:	605a      	str	r2, [r3, #4]
    npcb->local_port = pcb->local_port;
 801d012:	687b      	ldr	r3, [r7, #4]
 801d014:	8ada      	ldrh	r2, [r3, #22]
 801d016:	697b      	ldr	r3, [r7, #20]
 801d018:	82da      	strh	r2, [r3, #22]
    npcb->remote_port = tcphdr->src;
 801d01a:	4b47      	ldr	r3, [pc, #284]	@ (801d138 <tcp_listen_input+0x1e4>)
 801d01c:	681b      	ldr	r3, [r3, #0]
 801d01e:	881b      	ldrh	r3, [r3, #0]
 801d020:	b29a      	uxth	r2, r3
 801d022:	697b      	ldr	r3, [r7, #20]
 801d024:	831a      	strh	r2, [r3, #24]
    npcb->state = SYN_RCVD;
 801d026:	697b      	ldr	r3, [r7, #20]
 801d028:	2203      	movs	r2, #3
 801d02a:	751a      	strb	r2, [r3, #20]
    npcb->rcv_nxt = seqno + 1;
 801d02c:	4b41      	ldr	r3, [pc, #260]	@ (801d134 <tcp_listen_input+0x1e0>)
 801d02e:	681b      	ldr	r3, [r3, #0]
 801d030:	1c5a      	adds	r2, r3, #1
 801d032:	697b      	ldr	r3, [r7, #20]
 801d034:	625a      	str	r2, [r3, #36]	@ 0x24
    npcb->rcv_ann_right_edge = npcb->rcv_nxt;
 801d036:	697b      	ldr	r3, [r7, #20]
 801d038:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801d03a:	697b      	ldr	r3, [r7, #20]
 801d03c:	62da      	str	r2, [r3, #44]	@ 0x2c
    iss = tcp_next_iss(npcb);
 801d03e:	6978      	ldr	r0, [r7, #20]
 801d040:	f7ff fa56 	bl	801c4f0 <tcp_next_iss>
 801d044:	6138      	str	r0, [r7, #16]
    npcb->snd_wl2 = iss;
 801d046:	697b      	ldr	r3, [r7, #20]
 801d048:	693a      	ldr	r2, [r7, #16]
 801d04a:	659a      	str	r2, [r3, #88]	@ 0x58
    npcb->snd_nxt = iss;
 801d04c:	697b      	ldr	r3, [r7, #20]
 801d04e:	693a      	ldr	r2, [r7, #16]
 801d050:	651a      	str	r2, [r3, #80]	@ 0x50
    npcb->lastack = iss;
 801d052:	697b      	ldr	r3, [r7, #20]
 801d054:	693a      	ldr	r2, [r7, #16]
 801d056:	645a      	str	r2, [r3, #68]	@ 0x44
    npcb->snd_lbb = iss;
 801d058:	697b      	ldr	r3, [r7, #20]
 801d05a:	693a      	ldr	r2, [r7, #16]
 801d05c:	65da      	str	r2, [r3, #92]	@ 0x5c
    npcb->snd_wl1 = seqno - 1;/* initialise to seqno-1 to force window update */
 801d05e:	4b35      	ldr	r3, [pc, #212]	@ (801d134 <tcp_listen_input+0x1e0>)
 801d060:	681b      	ldr	r3, [r3, #0]
 801d062:	1e5a      	subs	r2, r3, #1
 801d064:	697b      	ldr	r3, [r7, #20]
 801d066:	655a      	str	r2, [r3, #84]	@ 0x54
    npcb->callback_arg = pcb->callback_arg;
 801d068:	687b      	ldr	r3, [r7, #4]
 801d06a:	691a      	ldr	r2, [r3, #16]
 801d06c:	697b      	ldr	r3, [r7, #20]
 801d06e:	611a      	str	r2, [r3, #16]
    npcb->listener = pcb;
 801d070:	697b      	ldr	r3, [r7, #20]
 801d072:	687a      	ldr	r2, [r7, #4]
 801d074:	67da      	str	r2, [r3, #124]	@ 0x7c
    npcb->so_options = pcb->so_options & SOF_INHERITED;
 801d076:	687b      	ldr	r3, [r7, #4]
 801d078:	7a5b      	ldrb	r3, [r3, #9]
 801d07a:	f003 030c 	and.w	r3, r3, #12
 801d07e:	b2da      	uxtb	r2, r3
 801d080:	697b      	ldr	r3, [r7, #20]
 801d082:	725a      	strb	r2, [r3, #9]
    npcb->netif_idx = pcb->netif_idx;
 801d084:	687b      	ldr	r3, [r7, #4]
 801d086:	7a1a      	ldrb	r2, [r3, #8]
 801d088:	697b      	ldr	r3, [r7, #20]
 801d08a:	721a      	strb	r2, [r3, #8]
    TCP_REG_ACTIVE(npcb);
 801d08c:	4b2e      	ldr	r3, [pc, #184]	@ (801d148 <tcp_listen_input+0x1f4>)
 801d08e:	681a      	ldr	r2, [r3, #0]
 801d090:	697b      	ldr	r3, [r7, #20]
 801d092:	60da      	str	r2, [r3, #12]
 801d094:	4a2c      	ldr	r2, [pc, #176]	@ (801d148 <tcp_listen_input+0x1f4>)
 801d096:	697b      	ldr	r3, [r7, #20]
 801d098:	6013      	str	r3, [r2, #0]
 801d09a:	f003 fd97 	bl	8020bcc <tcp_timer_needed>
 801d09e:	4b2b      	ldr	r3, [pc, #172]	@ (801d14c <tcp_listen_input+0x1f8>)
 801d0a0:	2201      	movs	r2, #1
 801d0a2:	701a      	strb	r2, [r3, #0]
    tcp_parseopt(npcb);
 801d0a4:	6978      	ldr	r0, [r7, #20]
 801d0a6:	f001 fd8b 	bl	801ebc0 <tcp_parseopt>
    npcb->snd_wnd = tcphdr->wnd;
 801d0aa:	4b23      	ldr	r3, [pc, #140]	@ (801d138 <tcp_listen_input+0x1e4>)
 801d0ac:	681b      	ldr	r3, [r3, #0]
 801d0ae:	89db      	ldrh	r3, [r3, #14]
 801d0b0:	b29a      	uxth	r2, r3
 801d0b2:	697b      	ldr	r3, [r7, #20]
 801d0b4:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
    npcb->snd_wnd_max = npcb->snd_wnd;
 801d0b8:	697b      	ldr	r3, [r7, #20]
 801d0ba:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801d0be:	697b      	ldr	r3, [r7, #20]
 801d0c0:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
    npcb->mss = tcp_eff_send_mss(npcb->mss, &npcb->local_ip, &npcb->remote_ip);
 801d0c4:	697b      	ldr	r3, [r7, #20]
 801d0c6:	8e5c      	ldrh	r4, [r3, #50]	@ 0x32
 801d0c8:	697b      	ldr	r3, [r7, #20]
 801d0ca:	3304      	adds	r3, #4
 801d0cc:	4618      	mov	r0, r3
 801d0ce:	f007 fc77 	bl	80249c0 <ip4_route>
 801d0d2:	4601      	mov	r1, r0
 801d0d4:	697b      	ldr	r3, [r7, #20]
 801d0d6:	3304      	adds	r3, #4
 801d0d8:	461a      	mov	r2, r3
 801d0da:	4620      	mov	r0, r4
 801d0dc:	f7ff fa2e 	bl	801c53c <tcp_eff_send_mss_netif>
 801d0e0:	4603      	mov	r3, r0
 801d0e2:	461a      	mov	r2, r3
 801d0e4:	697b      	ldr	r3, [r7, #20]
 801d0e6:	865a      	strh	r2, [r3, #50]	@ 0x32
    rc = tcp_enqueue_flags(npcb, TCP_SYN | TCP_ACK);
 801d0e8:	2112      	movs	r1, #18
 801d0ea:	6978      	ldr	r0, [r7, #20]
 801d0ec:	f002 fcfc 	bl	801fae8 <tcp_enqueue_flags>
 801d0f0:	4603      	mov	r3, r0
 801d0f2:	73fb      	strb	r3, [r7, #15]
    if (rc != ERR_OK) {
 801d0f4:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801d0f8:	2b00      	cmp	r3, #0
 801d0fa:	d004      	beq.n	801d106 <tcp_listen_input+0x1b2>
      tcp_abandon(npcb, 0);
 801d0fc:	2100      	movs	r1, #0
 801d0fe:	6978      	ldr	r0, [r7, #20]
 801d100:	f7fd ff3a 	bl	801af78 <tcp_abandon>
      return;
 801d104:	e006      	b.n	801d114 <tcp_listen_input+0x1c0>
    tcp_output(npcb);
 801d106:	6978      	ldr	r0, [r7, #20]
 801d108:	f002 fddc 	bl	801fcc4 <tcp_output>
  return;
 801d10c:	e001      	b.n	801d112 <tcp_listen_input+0x1be>
    return;
 801d10e:	bf00      	nop
 801d110:	e000      	b.n	801d114 <tcp_listen_input+0x1c0>
  return;
 801d112:	bf00      	nop
}
 801d114:	371c      	adds	r7, #28
 801d116:	46bd      	mov	sp, r7
 801d118:	bd90      	pop	{r4, r7, pc}
 801d11a:	bf00      	nop
 801d11c:	2402aed0 	.word	0x2402aed0
 801d120:	0802ed58 	.word	0x0802ed58
 801d124:	0802ef50 	.word	0x0802ef50
 801d128:	0802eda4 	.word	0x0802eda4
 801d12c:	2402aec8 	.word	0x2402aec8
 801d130:	2402aece 	.word	0x2402aece
 801d134:	2402aec4 	.word	0x2402aec4
 801d138:	2402aeb4 	.word	0x2402aeb4
 801d13c:	24024348 	.word	0x24024348
 801d140:	2402434c 	.word	0x2402434c
 801d144:	24024338 	.word	0x24024338
 801d148:	2402ae94 	.word	0x2402ae94
 801d14c:	2402ae9c 	.word	0x2402ae9c

0801d150 <tcp_timewait_input>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static void
tcp_timewait_input(struct tcp_pcb *pcb)
{
 801d150:	b580      	push	{r7, lr}
 801d152:	b086      	sub	sp, #24
 801d154:	af04      	add	r7, sp, #16
 801d156:	6078      	str	r0, [r7, #4]
  /* RFC 1337: in TIME_WAIT, ignore RST and ACK FINs + any 'acceptable' segments */
  /* RFC 793 3.9 Event Processing - Segment Arrives:
   * - first check sequence number - we skip that one in TIME_WAIT (always
   *   acceptable since we only send ACKs)
   * - second check the RST bit (... return) */
  if (flags & TCP_RST) {
 801d158:	4b2f      	ldr	r3, [pc, #188]	@ (801d218 <tcp_timewait_input+0xc8>)
 801d15a:	781b      	ldrb	r3, [r3, #0]
 801d15c:	f003 0304 	and.w	r3, r3, #4
 801d160:	2b00      	cmp	r3, #0
 801d162:	d153      	bne.n	801d20c <tcp_timewait_input+0xbc>
    return;
  }

  LWIP_ASSERT("tcp_timewait_input: invalid pcb", pcb != NULL);
 801d164:	687b      	ldr	r3, [r7, #4]
 801d166:	2b00      	cmp	r3, #0
 801d168:	d106      	bne.n	801d178 <tcp_timewait_input+0x28>
 801d16a:	4b2c      	ldr	r3, [pc, #176]	@ (801d21c <tcp_timewait_input+0xcc>)
 801d16c:	f240 22ee 	movw	r2, #750	@ 0x2ee
 801d170:	492b      	ldr	r1, [pc, #172]	@ (801d220 <tcp_timewait_input+0xd0>)
 801d172:	482c      	ldr	r0, [pc, #176]	@ (801d224 <tcp_timewait_input+0xd4>)
 801d174:	f00c fc32 	bl	80299dc <iprintf>

  /* - fourth, check the SYN bit, */
  if (flags & TCP_SYN) {
 801d178:	4b27      	ldr	r3, [pc, #156]	@ (801d218 <tcp_timewait_input+0xc8>)
 801d17a:	781b      	ldrb	r3, [r3, #0]
 801d17c:	f003 0302 	and.w	r3, r3, #2
 801d180:	2b00      	cmp	r3, #0
 801d182:	d02a      	beq.n	801d1da <tcp_timewait_input+0x8a>
    /* If an incoming segment is not acceptable, an acknowledgment
       should be sent in reply */
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd)) {
 801d184:	4b28      	ldr	r3, [pc, #160]	@ (801d228 <tcp_timewait_input+0xd8>)
 801d186:	681a      	ldr	r2, [r3, #0]
 801d188:	687b      	ldr	r3, [r7, #4]
 801d18a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801d18c:	1ad3      	subs	r3, r2, r3
 801d18e:	2b00      	cmp	r3, #0
 801d190:	db2d      	blt.n	801d1ee <tcp_timewait_input+0x9e>
 801d192:	4b25      	ldr	r3, [pc, #148]	@ (801d228 <tcp_timewait_input+0xd8>)
 801d194:	681a      	ldr	r2, [r3, #0]
 801d196:	687b      	ldr	r3, [r7, #4]
 801d198:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801d19a:	6879      	ldr	r1, [r7, #4]
 801d19c:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801d19e:	440b      	add	r3, r1
 801d1a0:	1ad3      	subs	r3, r2, r3
 801d1a2:	2b00      	cmp	r3, #0
 801d1a4:	dc23      	bgt.n	801d1ee <tcp_timewait_input+0x9e>
      /* If the SYN is in the window it is an error, send a reset */
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d1a6:	4b21      	ldr	r3, [pc, #132]	@ (801d22c <tcp_timewait_input+0xdc>)
 801d1a8:	6819      	ldr	r1, [r3, #0]
 801d1aa:	4b21      	ldr	r3, [pc, #132]	@ (801d230 <tcp_timewait_input+0xe0>)
 801d1ac:	881b      	ldrh	r3, [r3, #0]
 801d1ae:	461a      	mov	r2, r3
 801d1b0:	4b1d      	ldr	r3, [pc, #116]	@ (801d228 <tcp_timewait_input+0xd8>)
 801d1b2:	681b      	ldr	r3, [r3, #0]
 801d1b4:	18d0      	adds	r0, r2, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d1b6:	4b1f      	ldr	r3, [pc, #124]	@ (801d234 <tcp_timewait_input+0xe4>)
 801d1b8:	681b      	ldr	r3, [r3, #0]
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d1ba:	885b      	ldrh	r3, [r3, #2]
 801d1bc:	b29b      	uxth	r3, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d1be:	4a1d      	ldr	r2, [pc, #116]	@ (801d234 <tcp_timewait_input+0xe4>)
 801d1c0:	6812      	ldr	r2, [r2, #0]
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d1c2:	8812      	ldrh	r2, [r2, #0]
 801d1c4:	b292      	uxth	r2, r2
 801d1c6:	9202      	str	r2, [sp, #8]
 801d1c8:	9301      	str	r3, [sp, #4]
 801d1ca:	4b1b      	ldr	r3, [pc, #108]	@ (801d238 <tcp_timewait_input+0xe8>)
 801d1cc:	9300      	str	r3, [sp, #0]
 801d1ce:	4b1b      	ldr	r3, [pc, #108]	@ (801d23c <tcp_timewait_input+0xec>)
 801d1d0:	4602      	mov	r2, r0
 801d1d2:	6878      	ldr	r0, [r7, #4]
 801d1d4:	f003 fb38 	bl	8020848 <tcp_rst>
      return;
 801d1d8:	e01b      	b.n	801d212 <tcp_timewait_input+0xc2>
    }
  } else if (flags & TCP_FIN) {
 801d1da:	4b0f      	ldr	r3, [pc, #60]	@ (801d218 <tcp_timewait_input+0xc8>)
 801d1dc:	781b      	ldrb	r3, [r3, #0]
 801d1de:	f003 0301 	and.w	r3, r3, #1
 801d1e2:	2b00      	cmp	r3, #0
 801d1e4:	d003      	beq.n	801d1ee <tcp_timewait_input+0x9e>
    /* - eighth, check the FIN bit: Remain in the TIME-WAIT state.
         Restart the 2 MSL time-wait timeout.*/
    pcb->tmr = tcp_ticks;
 801d1e6:	4b16      	ldr	r3, [pc, #88]	@ (801d240 <tcp_timewait_input+0xf0>)
 801d1e8:	681a      	ldr	r2, [r3, #0]
 801d1ea:	687b      	ldr	r3, [r7, #4]
 801d1ec:	621a      	str	r2, [r3, #32]
  }

  if ((tcplen > 0)) {
 801d1ee:	4b10      	ldr	r3, [pc, #64]	@ (801d230 <tcp_timewait_input+0xe0>)
 801d1f0:	881b      	ldrh	r3, [r3, #0]
 801d1f2:	2b00      	cmp	r3, #0
 801d1f4:	d00c      	beq.n	801d210 <tcp_timewait_input+0xc0>
    /* Acknowledge data, FIN or out-of-window SYN */
    tcp_ack_now(pcb);
 801d1f6:	687b      	ldr	r3, [r7, #4]
 801d1f8:	8b5b      	ldrh	r3, [r3, #26]
 801d1fa:	f043 0302 	orr.w	r3, r3, #2
 801d1fe:	b29a      	uxth	r2, r3
 801d200:	687b      	ldr	r3, [r7, #4]
 801d202:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801d204:	6878      	ldr	r0, [r7, #4]
 801d206:	f002 fd5d 	bl	801fcc4 <tcp_output>
  }
  return;
 801d20a:	e001      	b.n	801d210 <tcp_timewait_input+0xc0>
    return;
 801d20c:	bf00      	nop
 801d20e:	e000      	b.n	801d212 <tcp_timewait_input+0xc2>
  return;
 801d210:	bf00      	nop
}
 801d212:	3708      	adds	r7, #8
 801d214:	46bd      	mov	sp, r7
 801d216:	bd80      	pop	{r7, pc}
 801d218:	2402aed0 	.word	0x2402aed0
 801d21c:	0802ed58 	.word	0x0802ed58
 801d220:	0802ef70 	.word	0x0802ef70
 801d224:	0802eda4 	.word	0x0802eda4
 801d228:	2402aec4 	.word	0x2402aec4
 801d22c:	2402aec8 	.word	0x2402aec8
 801d230:	2402aece 	.word	0x2402aece
 801d234:	2402aeb4 	.word	0x2402aeb4
 801d238:	24024348 	.word	0x24024348
 801d23c:	2402434c 	.word	0x2402434c
 801d240:	2402ae88 	.word	0x2402ae88

0801d244 <tcp_process>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static err_t
tcp_process(struct tcp_pcb *pcb)
{
 801d244:	b590      	push	{r4, r7, lr}
 801d246:	b08d      	sub	sp, #52	@ 0x34
 801d248:	af04      	add	r7, sp, #16
 801d24a:	6078      	str	r0, [r7, #4]
  struct tcp_seg *rseg;
  u8_t acceptable = 0;
 801d24c:	2300      	movs	r3, #0
 801d24e:	77fb      	strb	r3, [r7, #31]
  err_t err;

  err = ERR_OK;
 801d250:	2300      	movs	r3, #0
 801d252:	77bb      	strb	r3, [r7, #30]

  LWIP_ASSERT("tcp_process: invalid pcb", pcb != NULL);
 801d254:	687b      	ldr	r3, [r7, #4]
 801d256:	2b00      	cmp	r3, #0
 801d258:	d106      	bne.n	801d268 <tcp_process+0x24>
 801d25a:	4b9d      	ldr	r3, [pc, #628]	@ (801d4d0 <tcp_process+0x28c>)
 801d25c:	f44f 7247 	mov.w	r2, #796	@ 0x31c
 801d260:	499c      	ldr	r1, [pc, #624]	@ (801d4d4 <tcp_process+0x290>)
 801d262:	489d      	ldr	r0, [pc, #628]	@ (801d4d8 <tcp_process+0x294>)
 801d264:	f00c fbba 	bl	80299dc <iprintf>

  /* Process incoming RST segments. */
  if (flags & TCP_RST) {
 801d268:	4b9c      	ldr	r3, [pc, #624]	@ (801d4dc <tcp_process+0x298>)
 801d26a:	781b      	ldrb	r3, [r3, #0]
 801d26c:	f003 0304 	and.w	r3, r3, #4
 801d270:	2b00      	cmp	r3, #0
 801d272:	d04e      	beq.n	801d312 <tcp_process+0xce>
    /* First, determine if the reset is acceptable. */
    if (pcb->state == SYN_SENT) {
 801d274:	687b      	ldr	r3, [r7, #4]
 801d276:	7d1b      	ldrb	r3, [r3, #20]
 801d278:	2b02      	cmp	r3, #2
 801d27a:	d108      	bne.n	801d28e <tcp_process+0x4a>
      /* "In the SYN-SENT state (a RST received in response to an initial SYN),
          the RST is acceptable if the ACK field acknowledges the SYN." */
      if (ackno == pcb->snd_nxt) {
 801d27c:	687b      	ldr	r3, [r7, #4]
 801d27e:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801d280:	4b97      	ldr	r3, [pc, #604]	@ (801d4e0 <tcp_process+0x29c>)
 801d282:	681b      	ldr	r3, [r3, #0]
 801d284:	429a      	cmp	r2, r3
 801d286:	d123      	bne.n	801d2d0 <tcp_process+0x8c>
        acceptable = 1;
 801d288:	2301      	movs	r3, #1
 801d28a:	77fb      	strb	r3, [r7, #31]
 801d28c:	e020      	b.n	801d2d0 <tcp_process+0x8c>
      }
    } else {
      /* "In all states except SYN-SENT, all reset (RST) segments are validated
          by checking their SEQ-fields." */
      if (seqno == pcb->rcv_nxt) {
 801d28e:	687b      	ldr	r3, [r7, #4]
 801d290:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801d292:	4b94      	ldr	r3, [pc, #592]	@ (801d4e4 <tcp_process+0x2a0>)
 801d294:	681b      	ldr	r3, [r3, #0]
 801d296:	429a      	cmp	r2, r3
 801d298:	d102      	bne.n	801d2a0 <tcp_process+0x5c>
        acceptable = 1;
 801d29a:	2301      	movs	r3, #1
 801d29c:	77fb      	strb	r3, [r7, #31]
 801d29e:	e017      	b.n	801d2d0 <tcp_process+0x8c>
      } else  if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801d2a0:	4b90      	ldr	r3, [pc, #576]	@ (801d4e4 <tcp_process+0x2a0>)
 801d2a2:	681a      	ldr	r2, [r3, #0]
 801d2a4:	687b      	ldr	r3, [r7, #4]
 801d2a6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801d2a8:	1ad3      	subs	r3, r2, r3
 801d2aa:	2b00      	cmp	r3, #0
 801d2ac:	db10      	blt.n	801d2d0 <tcp_process+0x8c>
 801d2ae:	4b8d      	ldr	r3, [pc, #564]	@ (801d4e4 <tcp_process+0x2a0>)
 801d2b0:	681a      	ldr	r2, [r3, #0]
 801d2b2:	687b      	ldr	r3, [r7, #4]
 801d2b4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801d2b6:	6879      	ldr	r1, [r7, #4]
 801d2b8:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801d2ba:	440b      	add	r3, r1
 801d2bc:	1ad3      	subs	r3, r2, r3
 801d2be:	2b00      	cmp	r3, #0
 801d2c0:	dc06      	bgt.n	801d2d0 <tcp_process+0x8c>
                                  pcb->rcv_nxt + pcb->rcv_wnd)) {
        /* If the sequence number is inside the window, we send a challenge ACK
           and wait for a re-send with matching sequence number.
           This follows RFC 5961 section 3.2 and addresses CVE-2004-0230
           (RST spoofing attack), which is present in RFC 793 RST handling. */
        tcp_ack_now(pcb);
 801d2c2:	687b      	ldr	r3, [r7, #4]
 801d2c4:	8b5b      	ldrh	r3, [r3, #26]
 801d2c6:	f043 0302 	orr.w	r3, r3, #2
 801d2ca:	b29a      	uxth	r2, r3
 801d2cc:	687b      	ldr	r3, [r7, #4]
 801d2ce:	835a      	strh	r2, [r3, #26]
      }
    }

    if (acceptable) {
 801d2d0:	7ffb      	ldrb	r3, [r7, #31]
 801d2d2:	2b00      	cmp	r3, #0
 801d2d4:	d01b      	beq.n	801d30e <tcp_process+0xca>
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: Connection RESET\n"));
      LWIP_ASSERT("tcp_input: pcb->state != CLOSED", pcb->state != CLOSED);
 801d2d6:	687b      	ldr	r3, [r7, #4]
 801d2d8:	7d1b      	ldrb	r3, [r3, #20]
 801d2da:	2b00      	cmp	r3, #0
 801d2dc:	d106      	bne.n	801d2ec <tcp_process+0xa8>
 801d2de:	4b7c      	ldr	r3, [pc, #496]	@ (801d4d0 <tcp_process+0x28c>)
 801d2e0:	f44f 724e 	mov.w	r2, #824	@ 0x338
 801d2e4:	4980      	ldr	r1, [pc, #512]	@ (801d4e8 <tcp_process+0x2a4>)
 801d2e6:	487c      	ldr	r0, [pc, #496]	@ (801d4d8 <tcp_process+0x294>)
 801d2e8:	f00c fb78 	bl	80299dc <iprintf>
      recv_flags |= TF_RESET;
 801d2ec:	4b7f      	ldr	r3, [pc, #508]	@ (801d4ec <tcp_process+0x2a8>)
 801d2ee:	781b      	ldrb	r3, [r3, #0]
 801d2f0:	f043 0308 	orr.w	r3, r3, #8
 801d2f4:	b2da      	uxtb	r2, r3
 801d2f6:	4b7d      	ldr	r3, [pc, #500]	@ (801d4ec <tcp_process+0x2a8>)
 801d2f8:	701a      	strb	r2, [r3, #0]
      tcp_clear_flags(pcb, TF_ACK_DELAY);
 801d2fa:	687b      	ldr	r3, [r7, #4]
 801d2fc:	8b5b      	ldrh	r3, [r3, #26]
 801d2fe:	f023 0301 	bic.w	r3, r3, #1
 801d302:	b29a      	uxth	r2, r3
 801d304:	687b      	ldr	r3, [r7, #4]
 801d306:	835a      	strh	r2, [r3, #26]
      return ERR_RST;
 801d308:	f06f 030d 	mvn.w	r3, #13
 801d30c:	e37a      	b.n	801da04 <tcp_process+0x7c0>
    } else {
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n",
                                    seqno, pcb->rcv_nxt));
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n",
                              seqno, pcb->rcv_nxt));
      return ERR_OK;
 801d30e:	2300      	movs	r3, #0
 801d310:	e378      	b.n	801da04 <tcp_process+0x7c0>
    }
  }

  if ((flags & TCP_SYN) && (pcb->state != SYN_SENT && pcb->state != SYN_RCVD)) {
 801d312:	4b72      	ldr	r3, [pc, #456]	@ (801d4dc <tcp_process+0x298>)
 801d314:	781b      	ldrb	r3, [r3, #0]
 801d316:	f003 0302 	and.w	r3, r3, #2
 801d31a:	2b00      	cmp	r3, #0
 801d31c:	d010      	beq.n	801d340 <tcp_process+0xfc>
 801d31e:	687b      	ldr	r3, [r7, #4]
 801d320:	7d1b      	ldrb	r3, [r3, #20]
 801d322:	2b02      	cmp	r3, #2
 801d324:	d00c      	beq.n	801d340 <tcp_process+0xfc>
 801d326:	687b      	ldr	r3, [r7, #4]
 801d328:	7d1b      	ldrb	r3, [r3, #20]
 801d32a:	2b03      	cmp	r3, #3
 801d32c:	d008      	beq.n	801d340 <tcp_process+0xfc>
    /* Cope with new connection attempt after remote end crashed */
    tcp_ack_now(pcb);
 801d32e:	687b      	ldr	r3, [r7, #4]
 801d330:	8b5b      	ldrh	r3, [r3, #26]
 801d332:	f043 0302 	orr.w	r3, r3, #2
 801d336:	b29a      	uxth	r2, r3
 801d338:	687b      	ldr	r3, [r7, #4]
 801d33a:	835a      	strh	r2, [r3, #26]
    return ERR_OK;
 801d33c:	2300      	movs	r3, #0
 801d33e:	e361      	b.n	801da04 <tcp_process+0x7c0>
  }

  if ((pcb->flags & TF_RXCLOSED) == 0) {
 801d340:	687b      	ldr	r3, [r7, #4]
 801d342:	8b5b      	ldrh	r3, [r3, #26]
 801d344:	f003 0310 	and.w	r3, r3, #16
 801d348:	2b00      	cmp	r3, #0
 801d34a:	d103      	bne.n	801d354 <tcp_process+0x110>
    /* Update the PCB (in)activity timer unless rx is closed (see tcp_shutdown) */
    pcb->tmr = tcp_ticks;
 801d34c:	4b68      	ldr	r3, [pc, #416]	@ (801d4f0 <tcp_process+0x2ac>)
 801d34e:	681a      	ldr	r2, [r3, #0]
 801d350:	687b      	ldr	r3, [r7, #4]
 801d352:	621a      	str	r2, [r3, #32]
  }
  pcb->keep_cnt_sent = 0;
 801d354:	687b      	ldr	r3, [r7, #4]
 801d356:	2200      	movs	r2, #0
 801d358:	f883 209b 	strb.w	r2, [r3, #155]	@ 0x9b
  pcb->persist_probe = 0;
 801d35c:	687b      	ldr	r3, [r7, #4]
 801d35e:	2200      	movs	r2, #0
 801d360:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a

  tcp_parseopt(pcb);
 801d364:	6878      	ldr	r0, [r7, #4]
 801d366:	f001 fc2b 	bl	801ebc0 <tcp_parseopt>

  /* Do different things depending on the TCP state. */
  switch (pcb->state) {
 801d36a:	687b      	ldr	r3, [r7, #4]
 801d36c:	7d1b      	ldrb	r3, [r3, #20]
 801d36e:	3b02      	subs	r3, #2
 801d370:	2b07      	cmp	r3, #7
 801d372:	f200 8337 	bhi.w	801d9e4 <tcp_process+0x7a0>
 801d376:	a201      	add	r2, pc, #4	@ (adr r2, 801d37c <tcp_process+0x138>)
 801d378:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 801d37c:	0801d39d 	.word	0x0801d39d
 801d380:	0801d5cd 	.word	0x0801d5cd
 801d384:	0801d745 	.word	0x0801d745
 801d388:	0801d76f 	.word	0x0801d76f
 801d38c:	0801d893 	.word	0x0801d893
 801d390:	0801d745 	.word	0x0801d745
 801d394:	0801d91f 	.word	0x0801d91f
 801d398:	0801d9af 	.word	0x0801d9af
    case SYN_SENT:
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("SYN-SENT: ackno %"U32_F" pcb->snd_nxt %"U32_F" unacked %"U32_F"\n", ackno,
                                    pcb->snd_nxt, lwip_ntohl(pcb->unacked->tcphdr->seqno)));
      /* received SYN ACK with expected sequence number? */
      if ((flags & TCP_ACK) && (flags & TCP_SYN)
 801d39c:	4b4f      	ldr	r3, [pc, #316]	@ (801d4dc <tcp_process+0x298>)
 801d39e:	781b      	ldrb	r3, [r3, #0]
 801d3a0:	f003 0310 	and.w	r3, r3, #16
 801d3a4:	2b00      	cmp	r3, #0
 801d3a6:	f000 80e4 	beq.w	801d572 <tcp_process+0x32e>
 801d3aa:	4b4c      	ldr	r3, [pc, #304]	@ (801d4dc <tcp_process+0x298>)
 801d3ac:	781b      	ldrb	r3, [r3, #0]
 801d3ae:	f003 0302 	and.w	r3, r3, #2
 801d3b2:	2b00      	cmp	r3, #0
 801d3b4:	f000 80dd 	beq.w	801d572 <tcp_process+0x32e>
          && (ackno == pcb->lastack + 1)) {
 801d3b8:	687b      	ldr	r3, [r7, #4]
 801d3ba:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801d3bc:	1c5a      	adds	r2, r3, #1
 801d3be:	4b48      	ldr	r3, [pc, #288]	@ (801d4e0 <tcp_process+0x29c>)
 801d3c0:	681b      	ldr	r3, [r3, #0]
 801d3c2:	429a      	cmp	r2, r3
 801d3c4:	f040 80d5 	bne.w	801d572 <tcp_process+0x32e>
        pcb->rcv_nxt = seqno + 1;
 801d3c8:	4b46      	ldr	r3, [pc, #280]	@ (801d4e4 <tcp_process+0x2a0>)
 801d3ca:	681b      	ldr	r3, [r3, #0]
 801d3cc:	1c5a      	adds	r2, r3, #1
 801d3ce:	687b      	ldr	r3, [r7, #4]
 801d3d0:	625a      	str	r2, [r3, #36]	@ 0x24
        pcb->rcv_ann_right_edge = pcb->rcv_nxt;
 801d3d2:	687b      	ldr	r3, [r7, #4]
 801d3d4:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801d3d6:	687b      	ldr	r3, [r7, #4]
 801d3d8:	62da      	str	r2, [r3, #44]	@ 0x2c
        pcb->lastack = ackno;
 801d3da:	4b41      	ldr	r3, [pc, #260]	@ (801d4e0 <tcp_process+0x29c>)
 801d3dc:	681a      	ldr	r2, [r3, #0]
 801d3de:	687b      	ldr	r3, [r7, #4]
 801d3e0:	645a      	str	r2, [r3, #68]	@ 0x44
        pcb->snd_wnd = tcphdr->wnd;
 801d3e2:	4b44      	ldr	r3, [pc, #272]	@ (801d4f4 <tcp_process+0x2b0>)
 801d3e4:	681b      	ldr	r3, [r3, #0]
 801d3e6:	89db      	ldrh	r3, [r3, #14]
 801d3e8:	b29a      	uxth	r2, r3
 801d3ea:	687b      	ldr	r3, [r7, #4]
 801d3ec:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
        pcb->snd_wnd_max = pcb->snd_wnd;
 801d3f0:	687b      	ldr	r3, [r7, #4]
 801d3f2:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801d3f6:	687b      	ldr	r3, [r7, #4]
 801d3f8:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
        pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */
 801d3fc:	4b39      	ldr	r3, [pc, #228]	@ (801d4e4 <tcp_process+0x2a0>)
 801d3fe:	681b      	ldr	r3, [r3, #0]
 801d400:	1e5a      	subs	r2, r3, #1
 801d402:	687b      	ldr	r3, [r7, #4]
 801d404:	655a      	str	r2, [r3, #84]	@ 0x54
        pcb->state = ESTABLISHED;
 801d406:	687b      	ldr	r3, [r7, #4]
 801d408:	2204      	movs	r2, #4
 801d40a:	751a      	strb	r2, [r3, #20]

#if TCP_CALCULATE_EFF_SEND_MSS
        pcb->mss = tcp_eff_send_mss(pcb->mss, &pcb->local_ip, &pcb->remote_ip);
 801d40c:	687b      	ldr	r3, [r7, #4]
 801d40e:	8e5c      	ldrh	r4, [r3, #50]	@ 0x32
 801d410:	687b      	ldr	r3, [r7, #4]
 801d412:	3304      	adds	r3, #4
 801d414:	4618      	mov	r0, r3
 801d416:	f007 fad3 	bl	80249c0 <ip4_route>
 801d41a:	4601      	mov	r1, r0
 801d41c:	687b      	ldr	r3, [r7, #4]
 801d41e:	3304      	adds	r3, #4
 801d420:	461a      	mov	r2, r3
 801d422:	4620      	mov	r0, r4
 801d424:	f7ff f88a 	bl	801c53c <tcp_eff_send_mss_netif>
 801d428:	4603      	mov	r3, r0
 801d42a:	461a      	mov	r2, r3
 801d42c:	687b      	ldr	r3, [r7, #4]
 801d42e:	865a      	strh	r2, [r3, #50]	@ 0x32
#endif /* TCP_CALCULATE_EFF_SEND_MSS */

        pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss);
 801d430:	687b      	ldr	r3, [r7, #4]
 801d432:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d434:	009a      	lsls	r2, r3, #2
 801d436:	687b      	ldr	r3, [r7, #4]
 801d438:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d43a:	005b      	lsls	r3, r3, #1
 801d43c:	f241 111c 	movw	r1, #4380	@ 0x111c
 801d440:	428b      	cmp	r3, r1
 801d442:	bf38      	it	cc
 801d444:	460b      	movcc	r3, r1
 801d446:	429a      	cmp	r2, r3
 801d448:	d204      	bcs.n	801d454 <tcp_process+0x210>
 801d44a:	687b      	ldr	r3, [r7, #4]
 801d44c:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d44e:	009b      	lsls	r3, r3, #2
 801d450:	b29b      	uxth	r3, r3
 801d452:	e00d      	b.n	801d470 <tcp_process+0x22c>
 801d454:	687b      	ldr	r3, [r7, #4]
 801d456:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d458:	005b      	lsls	r3, r3, #1
 801d45a:	f241 121c 	movw	r2, #4380	@ 0x111c
 801d45e:	4293      	cmp	r3, r2
 801d460:	d904      	bls.n	801d46c <tcp_process+0x228>
 801d462:	687b      	ldr	r3, [r7, #4]
 801d464:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d466:	005b      	lsls	r3, r3, #1
 801d468:	b29b      	uxth	r3, r3
 801d46a:	e001      	b.n	801d470 <tcp_process+0x22c>
 801d46c:	f241 131c 	movw	r3, #4380	@ 0x111c
 801d470:	687a      	ldr	r2, [r7, #4]
 801d472:	f8a2 3048 	strh.w	r3, [r2, #72]	@ 0x48
        LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SENT): cwnd %"TCPWNDSIZE_F
                                     " ssthresh %"TCPWNDSIZE_F"\n",
                                     pcb->cwnd, pcb->ssthresh));
        LWIP_ASSERT("pcb->snd_queuelen > 0", (pcb->snd_queuelen > 0));
 801d476:	687b      	ldr	r3, [r7, #4]
 801d478:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801d47c:	2b00      	cmp	r3, #0
 801d47e:	d106      	bne.n	801d48e <tcp_process+0x24a>
 801d480:	4b13      	ldr	r3, [pc, #76]	@ (801d4d0 <tcp_process+0x28c>)
 801d482:	f44f 725b 	mov.w	r2, #876	@ 0x36c
 801d486:	491c      	ldr	r1, [pc, #112]	@ (801d4f8 <tcp_process+0x2b4>)
 801d488:	4813      	ldr	r0, [pc, #76]	@ (801d4d8 <tcp_process+0x294>)
 801d48a:	f00c faa7 	bl	80299dc <iprintf>
        --pcb->snd_queuelen;
 801d48e:	687b      	ldr	r3, [r7, #4]
 801d490:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801d494:	3b01      	subs	r3, #1
 801d496:	b29a      	uxth	r2, r3
 801d498:	687b      	ldr	r3, [r7, #4]
 801d49a:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
        LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen));
        rseg = pcb->unacked;
 801d49e:	687b      	ldr	r3, [r7, #4]
 801d4a0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801d4a2:	617b      	str	r3, [r7, #20]
        if (rseg == NULL) {
 801d4a4:	697b      	ldr	r3, [r7, #20]
 801d4a6:	2b00      	cmp	r3, #0
 801d4a8:	d12a      	bne.n	801d500 <tcp_process+0x2bc>
          /* might happen if tcp_output fails in tcp_rexmit_rto()
             in which case the segment is on the unsent list */
          rseg = pcb->unsent;
 801d4aa:	687b      	ldr	r3, [r7, #4]
 801d4ac:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801d4ae:	617b      	str	r3, [r7, #20]
          LWIP_ASSERT("no segment to free", rseg != NULL);
 801d4b0:	697b      	ldr	r3, [r7, #20]
 801d4b2:	2b00      	cmp	r3, #0
 801d4b4:	d106      	bne.n	801d4c4 <tcp_process+0x280>
 801d4b6:	4b06      	ldr	r3, [pc, #24]	@ (801d4d0 <tcp_process+0x28c>)
 801d4b8:	f44f 725d 	mov.w	r2, #884	@ 0x374
 801d4bc:	490f      	ldr	r1, [pc, #60]	@ (801d4fc <tcp_process+0x2b8>)
 801d4be:	4806      	ldr	r0, [pc, #24]	@ (801d4d8 <tcp_process+0x294>)
 801d4c0:	f00c fa8c 	bl	80299dc <iprintf>
          pcb->unsent = rseg->next;
 801d4c4:	697b      	ldr	r3, [r7, #20]
 801d4c6:	681a      	ldr	r2, [r3, #0]
 801d4c8:	687b      	ldr	r3, [r7, #4]
 801d4ca:	66da      	str	r2, [r3, #108]	@ 0x6c
 801d4cc:	e01c      	b.n	801d508 <tcp_process+0x2c4>
 801d4ce:	bf00      	nop
 801d4d0:	0802ed58 	.word	0x0802ed58
 801d4d4:	0802ef90 	.word	0x0802ef90
 801d4d8:	0802eda4 	.word	0x0802eda4
 801d4dc:	2402aed0 	.word	0x2402aed0
 801d4e0:	2402aec8 	.word	0x2402aec8
 801d4e4:	2402aec4 	.word	0x2402aec4
 801d4e8:	0802efac 	.word	0x0802efac
 801d4ec:	2402aed1 	.word	0x2402aed1
 801d4f0:	2402ae88 	.word	0x2402ae88
 801d4f4:	2402aeb4 	.word	0x2402aeb4
 801d4f8:	0802efcc 	.word	0x0802efcc
 801d4fc:	0802efe4 	.word	0x0802efe4
        } else {
          pcb->unacked = rseg->next;
 801d500:	697b      	ldr	r3, [r7, #20]
 801d502:	681a      	ldr	r2, [r3, #0]
 801d504:	687b      	ldr	r3, [r7, #4]
 801d506:	671a      	str	r2, [r3, #112]	@ 0x70
        }
        tcp_seg_free(rseg);
 801d508:	6978      	ldr	r0, [r7, #20]
 801d50a:	f7fe fc48 	bl	801bd9e <tcp_seg_free>

        /* If there's nothing left to acknowledge, stop the retransmit
           timer, otherwise reset it to start again */
        if (pcb->unacked == NULL) {
 801d50e:	687b      	ldr	r3, [r7, #4]
 801d510:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801d512:	2b00      	cmp	r3, #0
 801d514:	d104      	bne.n	801d520 <tcp_process+0x2dc>
          pcb->rtime = -1;
 801d516:	687b      	ldr	r3, [r7, #4]
 801d518:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801d51c:	861a      	strh	r2, [r3, #48]	@ 0x30
 801d51e:	e006      	b.n	801d52e <tcp_process+0x2ea>
        } else {
          pcb->rtime = 0;
 801d520:	687b      	ldr	r3, [r7, #4]
 801d522:	2200      	movs	r2, #0
 801d524:	861a      	strh	r2, [r3, #48]	@ 0x30
          pcb->nrtx = 0;
 801d526:	687b      	ldr	r3, [r7, #4]
 801d528:	2200      	movs	r2, #0
 801d52a:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
        }

        /* Call the user specified function to call when successfully
         * connected. */
        TCP_EVENT_CONNECTED(pcb, ERR_OK, err);
 801d52e:	687b      	ldr	r3, [r7, #4]
 801d530:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 801d534:	2b00      	cmp	r3, #0
 801d536:	d00a      	beq.n	801d54e <tcp_process+0x30a>
 801d538:	687b      	ldr	r3, [r7, #4]
 801d53a:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 801d53e:	687a      	ldr	r2, [r7, #4]
 801d540:	6910      	ldr	r0, [r2, #16]
 801d542:	2200      	movs	r2, #0
 801d544:	6879      	ldr	r1, [r7, #4]
 801d546:	4798      	blx	r3
 801d548:	4603      	mov	r3, r0
 801d54a:	77bb      	strb	r3, [r7, #30]
 801d54c:	e001      	b.n	801d552 <tcp_process+0x30e>
 801d54e:	2300      	movs	r3, #0
 801d550:	77bb      	strb	r3, [r7, #30]
        if (err == ERR_ABRT) {
 801d552:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801d556:	f113 0f0d 	cmn.w	r3, #13
 801d55a:	d102      	bne.n	801d562 <tcp_process+0x31e>
          return ERR_ABRT;
 801d55c:	f06f 030c 	mvn.w	r3, #12
 801d560:	e250      	b.n	801da04 <tcp_process+0x7c0>
        }
        tcp_ack_now(pcb);
 801d562:	687b      	ldr	r3, [r7, #4]
 801d564:	8b5b      	ldrh	r3, [r3, #26]
 801d566:	f043 0302 	orr.w	r3, r3, #2
 801d56a:	b29a      	uxth	r2, r3
 801d56c:	687b      	ldr	r3, [r7, #4]
 801d56e:	835a      	strh	r2, [r3, #26]
        if (pcb->nrtx < TCP_SYNMAXRTX) {
          pcb->rtime = 0;
          tcp_rexmit_rto(pcb);
        }
      }
      break;
 801d570:	e23a      	b.n	801d9e8 <tcp_process+0x7a4>
      else if (flags & TCP_ACK) {
 801d572:	4b98      	ldr	r3, [pc, #608]	@ (801d7d4 <tcp_process+0x590>)
 801d574:	781b      	ldrb	r3, [r3, #0]
 801d576:	f003 0310 	and.w	r3, r3, #16
 801d57a:	2b00      	cmp	r3, #0
 801d57c:	f000 8234 	beq.w	801d9e8 <tcp_process+0x7a4>
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d580:	4b95      	ldr	r3, [pc, #596]	@ (801d7d8 <tcp_process+0x594>)
 801d582:	6819      	ldr	r1, [r3, #0]
 801d584:	4b95      	ldr	r3, [pc, #596]	@ (801d7dc <tcp_process+0x598>)
 801d586:	881b      	ldrh	r3, [r3, #0]
 801d588:	461a      	mov	r2, r3
 801d58a:	4b95      	ldr	r3, [pc, #596]	@ (801d7e0 <tcp_process+0x59c>)
 801d58c:	681b      	ldr	r3, [r3, #0]
 801d58e:	18d0      	adds	r0, r2, r3
                ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d590:	4b94      	ldr	r3, [pc, #592]	@ (801d7e4 <tcp_process+0x5a0>)
 801d592:	681b      	ldr	r3, [r3, #0]
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d594:	885b      	ldrh	r3, [r3, #2]
 801d596:	b29b      	uxth	r3, r3
                ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d598:	4a92      	ldr	r2, [pc, #584]	@ (801d7e4 <tcp_process+0x5a0>)
 801d59a:	6812      	ldr	r2, [r2, #0]
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d59c:	8812      	ldrh	r2, [r2, #0]
 801d59e:	b292      	uxth	r2, r2
 801d5a0:	9202      	str	r2, [sp, #8]
 801d5a2:	9301      	str	r3, [sp, #4]
 801d5a4:	4b90      	ldr	r3, [pc, #576]	@ (801d7e8 <tcp_process+0x5a4>)
 801d5a6:	9300      	str	r3, [sp, #0]
 801d5a8:	4b90      	ldr	r3, [pc, #576]	@ (801d7ec <tcp_process+0x5a8>)
 801d5aa:	4602      	mov	r2, r0
 801d5ac:	6878      	ldr	r0, [r7, #4]
 801d5ae:	f003 f94b 	bl	8020848 <tcp_rst>
        if (pcb->nrtx < TCP_SYNMAXRTX) {
 801d5b2:	687b      	ldr	r3, [r7, #4]
 801d5b4:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801d5b8:	2b05      	cmp	r3, #5
 801d5ba:	f200 8215 	bhi.w	801d9e8 <tcp_process+0x7a4>
          pcb->rtime = 0;
 801d5be:	687b      	ldr	r3, [r7, #4]
 801d5c0:	2200      	movs	r2, #0
 801d5c2:	861a      	strh	r2, [r3, #48]	@ 0x30
          tcp_rexmit_rto(pcb);
 801d5c4:	6878      	ldr	r0, [r7, #4]
 801d5c6:	f002 ff17 	bl	80203f8 <tcp_rexmit_rto>
      break;
 801d5ca:	e20d      	b.n	801d9e8 <tcp_process+0x7a4>
    case SYN_RCVD:
      if (flags & TCP_ACK) {
 801d5cc:	4b81      	ldr	r3, [pc, #516]	@ (801d7d4 <tcp_process+0x590>)
 801d5ce:	781b      	ldrb	r3, [r3, #0]
 801d5d0:	f003 0310 	and.w	r3, r3, #16
 801d5d4:	2b00      	cmp	r3, #0
 801d5d6:	f000 80a1 	beq.w	801d71c <tcp_process+0x4d8>
        /* expected ACK number? */
        if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801d5da:	4b7f      	ldr	r3, [pc, #508]	@ (801d7d8 <tcp_process+0x594>)
 801d5dc:	681a      	ldr	r2, [r3, #0]
 801d5de:	687b      	ldr	r3, [r7, #4]
 801d5e0:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801d5e2:	1ad3      	subs	r3, r2, r3
 801d5e4:	3b01      	subs	r3, #1
 801d5e6:	2b00      	cmp	r3, #0
 801d5e8:	db7e      	blt.n	801d6e8 <tcp_process+0x4a4>
 801d5ea:	4b7b      	ldr	r3, [pc, #492]	@ (801d7d8 <tcp_process+0x594>)
 801d5ec:	681a      	ldr	r2, [r3, #0]
 801d5ee:	687b      	ldr	r3, [r7, #4]
 801d5f0:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801d5f2:	1ad3      	subs	r3, r2, r3
 801d5f4:	2b00      	cmp	r3, #0
 801d5f6:	dc77      	bgt.n	801d6e8 <tcp_process+0x4a4>
          pcb->state = ESTABLISHED;
 801d5f8:	687b      	ldr	r3, [r7, #4]
 801d5fa:	2204      	movs	r2, #4
 801d5fc:	751a      	strb	r2, [r3, #20]
          LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
          if (pcb->listener == NULL) {
 801d5fe:	687b      	ldr	r3, [r7, #4]
 801d600:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801d602:	2b00      	cmp	r3, #0
 801d604:	d102      	bne.n	801d60c <tcp_process+0x3c8>
            /* listen pcb might be closed by now */
            err = ERR_VAL;
 801d606:	23fa      	movs	r3, #250	@ 0xfa
 801d608:	77bb      	strb	r3, [r7, #30]
 801d60a:	e01d      	b.n	801d648 <tcp_process+0x404>
          } else
#endif /* LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG */
          {
#if LWIP_CALLBACK_API
            LWIP_ASSERT("pcb->listener->accept != NULL", pcb->listener->accept != NULL);
 801d60c:	687b      	ldr	r3, [r7, #4]
 801d60e:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801d610:	699b      	ldr	r3, [r3, #24]
 801d612:	2b00      	cmp	r3, #0
 801d614:	d106      	bne.n	801d624 <tcp_process+0x3e0>
 801d616:	4b76      	ldr	r3, [pc, #472]	@ (801d7f0 <tcp_process+0x5ac>)
 801d618:	f44f 726a 	mov.w	r2, #936	@ 0x3a8
 801d61c:	4975      	ldr	r1, [pc, #468]	@ (801d7f4 <tcp_process+0x5b0>)
 801d61e:	4876      	ldr	r0, [pc, #472]	@ (801d7f8 <tcp_process+0x5b4>)
 801d620:	f00c f9dc 	bl	80299dc <iprintf>
#endif
            tcp_backlog_accepted(pcb);
            /* Call the accept function. */
            TCP_EVENT_ACCEPT(pcb->listener, pcb, pcb->callback_arg, ERR_OK, err);
 801d624:	687b      	ldr	r3, [r7, #4]
 801d626:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801d628:	699b      	ldr	r3, [r3, #24]
 801d62a:	2b00      	cmp	r3, #0
 801d62c:	d00a      	beq.n	801d644 <tcp_process+0x400>
 801d62e:	687b      	ldr	r3, [r7, #4]
 801d630:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801d632:	699b      	ldr	r3, [r3, #24]
 801d634:	687a      	ldr	r2, [r7, #4]
 801d636:	6910      	ldr	r0, [r2, #16]
 801d638:	2200      	movs	r2, #0
 801d63a:	6879      	ldr	r1, [r7, #4]
 801d63c:	4798      	blx	r3
 801d63e:	4603      	mov	r3, r0
 801d640:	77bb      	strb	r3, [r7, #30]
 801d642:	e001      	b.n	801d648 <tcp_process+0x404>
 801d644:	23f0      	movs	r3, #240	@ 0xf0
 801d646:	77bb      	strb	r3, [r7, #30]
          }
          if (err != ERR_OK) {
 801d648:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801d64c:	2b00      	cmp	r3, #0
 801d64e:	d00a      	beq.n	801d666 <tcp_process+0x422>
            /* If the accept function returns with an error, we abort
             * the connection. */
            /* Already aborted? */
            if (err != ERR_ABRT) {
 801d650:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801d654:	f113 0f0d 	cmn.w	r3, #13
 801d658:	d002      	beq.n	801d660 <tcp_process+0x41c>
              tcp_abort(pcb);
 801d65a:	6878      	ldr	r0, [r7, #4]
 801d65c:	f7fd fd4c 	bl	801b0f8 <tcp_abort>
            }
            return ERR_ABRT;
 801d660:	f06f 030c 	mvn.w	r3, #12
 801d664:	e1ce      	b.n	801da04 <tcp_process+0x7c0>
          }
          /* If there was any data contained within this ACK,
           * we'd better pass it on to the application as well. */
          tcp_receive(pcb);
 801d666:	6878      	ldr	r0, [r7, #4]
 801d668:	f000 fae0 	bl	801dc2c <tcp_receive>

          /* Prevent ACK for SYN to generate a sent event */
          if (recv_acked != 0) {
 801d66c:	4b63      	ldr	r3, [pc, #396]	@ (801d7fc <tcp_process+0x5b8>)
 801d66e:	881b      	ldrh	r3, [r3, #0]
 801d670:	2b00      	cmp	r3, #0
 801d672:	d005      	beq.n	801d680 <tcp_process+0x43c>
            recv_acked--;
 801d674:	4b61      	ldr	r3, [pc, #388]	@ (801d7fc <tcp_process+0x5b8>)
 801d676:	881b      	ldrh	r3, [r3, #0]
 801d678:	3b01      	subs	r3, #1
 801d67a:	b29a      	uxth	r2, r3
 801d67c:	4b5f      	ldr	r3, [pc, #380]	@ (801d7fc <tcp_process+0x5b8>)
 801d67e:	801a      	strh	r2, [r3, #0]
          }

          pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss);
 801d680:	687b      	ldr	r3, [r7, #4]
 801d682:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d684:	009a      	lsls	r2, r3, #2
 801d686:	687b      	ldr	r3, [r7, #4]
 801d688:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d68a:	005b      	lsls	r3, r3, #1
 801d68c:	f241 111c 	movw	r1, #4380	@ 0x111c
 801d690:	428b      	cmp	r3, r1
 801d692:	bf38      	it	cc
 801d694:	460b      	movcc	r3, r1
 801d696:	429a      	cmp	r2, r3
 801d698:	d204      	bcs.n	801d6a4 <tcp_process+0x460>
 801d69a:	687b      	ldr	r3, [r7, #4]
 801d69c:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d69e:	009b      	lsls	r3, r3, #2
 801d6a0:	b29b      	uxth	r3, r3
 801d6a2:	e00d      	b.n	801d6c0 <tcp_process+0x47c>
 801d6a4:	687b      	ldr	r3, [r7, #4]
 801d6a6:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d6a8:	005b      	lsls	r3, r3, #1
 801d6aa:	f241 121c 	movw	r2, #4380	@ 0x111c
 801d6ae:	4293      	cmp	r3, r2
 801d6b0:	d904      	bls.n	801d6bc <tcp_process+0x478>
 801d6b2:	687b      	ldr	r3, [r7, #4]
 801d6b4:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d6b6:	005b      	lsls	r3, r3, #1
 801d6b8:	b29b      	uxth	r3, r3
 801d6ba:	e001      	b.n	801d6c0 <tcp_process+0x47c>
 801d6bc:	f241 131c 	movw	r3, #4380	@ 0x111c
 801d6c0:	687a      	ldr	r2, [r7, #4]
 801d6c2:	f8a2 3048 	strh.w	r3, [r2, #72]	@ 0x48
          LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SYN_RCVD): cwnd %"TCPWNDSIZE_F
                                       " ssthresh %"TCPWNDSIZE_F"\n",
                                       pcb->cwnd, pcb->ssthresh));

          if (recv_flags & TF_GOT_FIN) {
 801d6c6:	4b4e      	ldr	r3, [pc, #312]	@ (801d800 <tcp_process+0x5bc>)
 801d6c8:	781b      	ldrb	r3, [r3, #0]
 801d6ca:	f003 0320 	and.w	r3, r3, #32
 801d6ce:	2b00      	cmp	r3, #0
 801d6d0:	d037      	beq.n	801d742 <tcp_process+0x4fe>
            tcp_ack_now(pcb);
 801d6d2:	687b      	ldr	r3, [r7, #4]
 801d6d4:	8b5b      	ldrh	r3, [r3, #26]
 801d6d6:	f043 0302 	orr.w	r3, r3, #2
 801d6da:	b29a      	uxth	r2, r3
 801d6dc:	687b      	ldr	r3, [r7, #4]
 801d6de:	835a      	strh	r2, [r3, #26]
            pcb->state = CLOSE_WAIT;
 801d6e0:	687b      	ldr	r3, [r7, #4]
 801d6e2:	2207      	movs	r2, #7
 801d6e4:	751a      	strb	r2, [r3, #20]
          if (recv_flags & TF_GOT_FIN) {
 801d6e6:	e02c      	b.n	801d742 <tcp_process+0x4fe>
          }
        } else {
          /* incorrect ACK number, send RST */
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d6e8:	4b3b      	ldr	r3, [pc, #236]	@ (801d7d8 <tcp_process+0x594>)
 801d6ea:	6819      	ldr	r1, [r3, #0]
 801d6ec:	4b3b      	ldr	r3, [pc, #236]	@ (801d7dc <tcp_process+0x598>)
 801d6ee:	881b      	ldrh	r3, [r3, #0]
 801d6f0:	461a      	mov	r2, r3
 801d6f2:	4b3b      	ldr	r3, [pc, #236]	@ (801d7e0 <tcp_process+0x59c>)
 801d6f4:	681b      	ldr	r3, [r3, #0]
 801d6f6:	18d0      	adds	r0, r2, r3
                  ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d6f8:	4b3a      	ldr	r3, [pc, #232]	@ (801d7e4 <tcp_process+0x5a0>)
 801d6fa:	681b      	ldr	r3, [r3, #0]
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d6fc:	885b      	ldrh	r3, [r3, #2]
 801d6fe:	b29b      	uxth	r3, r3
                  ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d700:	4a38      	ldr	r2, [pc, #224]	@ (801d7e4 <tcp_process+0x5a0>)
 801d702:	6812      	ldr	r2, [r2, #0]
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d704:	8812      	ldrh	r2, [r2, #0]
 801d706:	b292      	uxth	r2, r2
 801d708:	9202      	str	r2, [sp, #8]
 801d70a:	9301      	str	r3, [sp, #4]
 801d70c:	4b36      	ldr	r3, [pc, #216]	@ (801d7e8 <tcp_process+0x5a4>)
 801d70e:	9300      	str	r3, [sp, #0]
 801d710:	4b36      	ldr	r3, [pc, #216]	@ (801d7ec <tcp_process+0x5a8>)
 801d712:	4602      	mov	r2, r0
 801d714:	6878      	ldr	r0, [r7, #4]
 801d716:	f003 f897 	bl	8020848 <tcp_rst>
        }
      } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) {
        /* Looks like another copy of the SYN - retransmit our SYN-ACK */
        tcp_rexmit(pcb);
      }
      break;
 801d71a:	e167      	b.n	801d9ec <tcp_process+0x7a8>
      } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) {
 801d71c:	4b2d      	ldr	r3, [pc, #180]	@ (801d7d4 <tcp_process+0x590>)
 801d71e:	781b      	ldrb	r3, [r3, #0]
 801d720:	f003 0302 	and.w	r3, r3, #2
 801d724:	2b00      	cmp	r3, #0
 801d726:	f000 8161 	beq.w	801d9ec <tcp_process+0x7a8>
 801d72a:	687b      	ldr	r3, [r7, #4]
 801d72c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801d72e:	1e5a      	subs	r2, r3, #1
 801d730:	4b2b      	ldr	r3, [pc, #172]	@ (801d7e0 <tcp_process+0x59c>)
 801d732:	681b      	ldr	r3, [r3, #0]
 801d734:	429a      	cmp	r2, r3
 801d736:	f040 8159 	bne.w	801d9ec <tcp_process+0x7a8>
        tcp_rexmit(pcb);
 801d73a:	6878      	ldr	r0, [r7, #4]
 801d73c:	f002 fe7e 	bl	802043c <tcp_rexmit>
      break;
 801d740:	e154      	b.n	801d9ec <tcp_process+0x7a8>
 801d742:	e153      	b.n	801d9ec <tcp_process+0x7a8>
    case CLOSE_WAIT:
    /* FALLTHROUGH */
    case ESTABLISHED:
      tcp_receive(pcb);
 801d744:	6878      	ldr	r0, [r7, #4]
 801d746:	f000 fa71 	bl	801dc2c <tcp_receive>
      if (recv_flags & TF_GOT_FIN) { /* passive close */
 801d74a:	4b2d      	ldr	r3, [pc, #180]	@ (801d800 <tcp_process+0x5bc>)
 801d74c:	781b      	ldrb	r3, [r3, #0]
 801d74e:	f003 0320 	and.w	r3, r3, #32
 801d752:	2b00      	cmp	r3, #0
 801d754:	f000 814c 	beq.w	801d9f0 <tcp_process+0x7ac>
        tcp_ack_now(pcb);
 801d758:	687b      	ldr	r3, [r7, #4]
 801d75a:	8b5b      	ldrh	r3, [r3, #26]
 801d75c:	f043 0302 	orr.w	r3, r3, #2
 801d760:	b29a      	uxth	r2, r3
 801d762:	687b      	ldr	r3, [r7, #4]
 801d764:	835a      	strh	r2, [r3, #26]
        pcb->state = CLOSE_WAIT;
 801d766:	687b      	ldr	r3, [r7, #4]
 801d768:	2207      	movs	r2, #7
 801d76a:	751a      	strb	r2, [r3, #20]
      }
      break;
 801d76c:	e140      	b.n	801d9f0 <tcp_process+0x7ac>
    case FIN_WAIT_1:
      tcp_receive(pcb);
 801d76e:	6878      	ldr	r0, [r7, #4]
 801d770:	f000 fa5c 	bl	801dc2c <tcp_receive>
      if (recv_flags & TF_GOT_FIN) {
 801d774:	4b22      	ldr	r3, [pc, #136]	@ (801d800 <tcp_process+0x5bc>)
 801d776:	781b      	ldrb	r3, [r3, #0]
 801d778:	f003 0320 	and.w	r3, r3, #32
 801d77c:	2b00      	cmp	r3, #0
 801d77e:	d071      	beq.n	801d864 <tcp_process+0x620>
        if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801d780:	4b14      	ldr	r3, [pc, #80]	@ (801d7d4 <tcp_process+0x590>)
 801d782:	781b      	ldrb	r3, [r3, #0]
 801d784:	f003 0310 	and.w	r3, r3, #16
 801d788:	2b00      	cmp	r3, #0
 801d78a:	d060      	beq.n	801d84e <tcp_process+0x60a>
 801d78c:	687b      	ldr	r3, [r7, #4]
 801d78e:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801d790:	4b11      	ldr	r3, [pc, #68]	@ (801d7d8 <tcp_process+0x594>)
 801d792:	681b      	ldr	r3, [r3, #0]
 801d794:	429a      	cmp	r2, r3
 801d796:	d15a      	bne.n	801d84e <tcp_process+0x60a>
            pcb->unsent == NULL) {
 801d798:	687b      	ldr	r3, [r7, #4]
 801d79a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
        if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801d79c:	2b00      	cmp	r3, #0
 801d79e:	d156      	bne.n	801d84e <tcp_process+0x60a>
          LWIP_DEBUGF(TCP_DEBUG,
                      ("TCP connection closed: FIN_WAIT_1 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
          tcp_ack_now(pcb);
 801d7a0:	687b      	ldr	r3, [r7, #4]
 801d7a2:	8b5b      	ldrh	r3, [r3, #26]
 801d7a4:	f043 0302 	orr.w	r3, r3, #2
 801d7a8:	b29a      	uxth	r2, r3
 801d7aa:	687b      	ldr	r3, [r7, #4]
 801d7ac:	835a      	strh	r2, [r3, #26]
          tcp_pcb_purge(pcb);
 801d7ae:	6878      	ldr	r0, [r7, #4]
 801d7b0:	f7fe fdba 	bl	801c328 <tcp_pcb_purge>
          TCP_RMV_ACTIVE(pcb);
 801d7b4:	4b13      	ldr	r3, [pc, #76]	@ (801d804 <tcp_process+0x5c0>)
 801d7b6:	681b      	ldr	r3, [r3, #0]
 801d7b8:	687a      	ldr	r2, [r7, #4]
 801d7ba:	429a      	cmp	r2, r3
 801d7bc:	d105      	bne.n	801d7ca <tcp_process+0x586>
 801d7be:	4b11      	ldr	r3, [pc, #68]	@ (801d804 <tcp_process+0x5c0>)
 801d7c0:	681b      	ldr	r3, [r3, #0]
 801d7c2:	68db      	ldr	r3, [r3, #12]
 801d7c4:	4a0f      	ldr	r2, [pc, #60]	@ (801d804 <tcp_process+0x5c0>)
 801d7c6:	6013      	str	r3, [r2, #0]
 801d7c8:	e02e      	b.n	801d828 <tcp_process+0x5e4>
 801d7ca:	4b0e      	ldr	r3, [pc, #56]	@ (801d804 <tcp_process+0x5c0>)
 801d7cc:	681b      	ldr	r3, [r3, #0]
 801d7ce:	613b      	str	r3, [r7, #16]
 801d7d0:	e027      	b.n	801d822 <tcp_process+0x5de>
 801d7d2:	bf00      	nop
 801d7d4:	2402aed0 	.word	0x2402aed0
 801d7d8:	2402aec8 	.word	0x2402aec8
 801d7dc:	2402aece 	.word	0x2402aece
 801d7e0:	2402aec4 	.word	0x2402aec4
 801d7e4:	2402aeb4 	.word	0x2402aeb4
 801d7e8:	24024348 	.word	0x24024348
 801d7ec:	2402434c 	.word	0x2402434c
 801d7f0:	0802ed58 	.word	0x0802ed58
 801d7f4:	0802eff8 	.word	0x0802eff8
 801d7f8:	0802eda4 	.word	0x0802eda4
 801d7fc:	2402aecc 	.word	0x2402aecc
 801d800:	2402aed1 	.word	0x2402aed1
 801d804:	2402ae94 	.word	0x2402ae94
 801d808:	693b      	ldr	r3, [r7, #16]
 801d80a:	68db      	ldr	r3, [r3, #12]
 801d80c:	687a      	ldr	r2, [r7, #4]
 801d80e:	429a      	cmp	r2, r3
 801d810:	d104      	bne.n	801d81c <tcp_process+0x5d8>
 801d812:	687b      	ldr	r3, [r7, #4]
 801d814:	68da      	ldr	r2, [r3, #12]
 801d816:	693b      	ldr	r3, [r7, #16]
 801d818:	60da      	str	r2, [r3, #12]
 801d81a:	e005      	b.n	801d828 <tcp_process+0x5e4>
 801d81c:	693b      	ldr	r3, [r7, #16]
 801d81e:	68db      	ldr	r3, [r3, #12]
 801d820:	613b      	str	r3, [r7, #16]
 801d822:	693b      	ldr	r3, [r7, #16]
 801d824:	2b00      	cmp	r3, #0
 801d826:	d1ef      	bne.n	801d808 <tcp_process+0x5c4>
 801d828:	687b      	ldr	r3, [r7, #4]
 801d82a:	2200      	movs	r2, #0
 801d82c:	60da      	str	r2, [r3, #12]
 801d82e:	4b77      	ldr	r3, [pc, #476]	@ (801da0c <tcp_process+0x7c8>)
 801d830:	2201      	movs	r2, #1
 801d832:	701a      	strb	r2, [r3, #0]
          pcb->state = TIME_WAIT;
 801d834:	687b      	ldr	r3, [r7, #4]
 801d836:	220a      	movs	r2, #10
 801d838:	751a      	strb	r2, [r3, #20]
          TCP_REG(&tcp_tw_pcbs, pcb);
 801d83a:	4b75      	ldr	r3, [pc, #468]	@ (801da10 <tcp_process+0x7cc>)
 801d83c:	681a      	ldr	r2, [r3, #0]
 801d83e:	687b      	ldr	r3, [r7, #4]
 801d840:	60da      	str	r2, [r3, #12]
 801d842:	4a73      	ldr	r2, [pc, #460]	@ (801da10 <tcp_process+0x7cc>)
 801d844:	687b      	ldr	r3, [r7, #4]
 801d846:	6013      	str	r3, [r2, #0]
 801d848:	f003 f9c0 	bl	8020bcc <tcp_timer_needed>
        }
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
                 pcb->unsent == NULL) {
        pcb->state = FIN_WAIT_2;
      }
      break;
 801d84c:	e0d2      	b.n	801d9f4 <tcp_process+0x7b0>
          tcp_ack_now(pcb);
 801d84e:	687b      	ldr	r3, [r7, #4]
 801d850:	8b5b      	ldrh	r3, [r3, #26]
 801d852:	f043 0302 	orr.w	r3, r3, #2
 801d856:	b29a      	uxth	r2, r3
 801d858:	687b      	ldr	r3, [r7, #4]
 801d85a:	835a      	strh	r2, [r3, #26]
          pcb->state = CLOSING;
 801d85c:	687b      	ldr	r3, [r7, #4]
 801d85e:	2208      	movs	r2, #8
 801d860:	751a      	strb	r2, [r3, #20]
      break;
 801d862:	e0c7      	b.n	801d9f4 <tcp_process+0x7b0>
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801d864:	4b6b      	ldr	r3, [pc, #428]	@ (801da14 <tcp_process+0x7d0>)
 801d866:	781b      	ldrb	r3, [r3, #0]
 801d868:	f003 0310 	and.w	r3, r3, #16
 801d86c:	2b00      	cmp	r3, #0
 801d86e:	f000 80c1 	beq.w	801d9f4 <tcp_process+0x7b0>
 801d872:	687b      	ldr	r3, [r7, #4]
 801d874:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801d876:	4b68      	ldr	r3, [pc, #416]	@ (801da18 <tcp_process+0x7d4>)
 801d878:	681b      	ldr	r3, [r3, #0]
 801d87a:	429a      	cmp	r2, r3
 801d87c:	f040 80ba 	bne.w	801d9f4 <tcp_process+0x7b0>
                 pcb->unsent == NULL) {
 801d880:	687b      	ldr	r3, [r7, #4]
 801d882:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801d884:	2b00      	cmp	r3, #0
 801d886:	f040 80b5 	bne.w	801d9f4 <tcp_process+0x7b0>
        pcb->state = FIN_WAIT_2;
 801d88a:	687b      	ldr	r3, [r7, #4]
 801d88c:	2206      	movs	r2, #6
 801d88e:	751a      	strb	r2, [r3, #20]
      break;
 801d890:	e0b0      	b.n	801d9f4 <tcp_process+0x7b0>
    case FIN_WAIT_2:
      tcp_receive(pcb);
 801d892:	6878      	ldr	r0, [r7, #4]
 801d894:	f000 f9ca 	bl	801dc2c <tcp_receive>
      if (recv_flags & TF_GOT_FIN) {
 801d898:	4b60      	ldr	r3, [pc, #384]	@ (801da1c <tcp_process+0x7d8>)
 801d89a:	781b      	ldrb	r3, [r3, #0]
 801d89c:	f003 0320 	and.w	r3, r3, #32
 801d8a0:	2b00      	cmp	r3, #0
 801d8a2:	f000 80a9 	beq.w	801d9f8 <tcp_process+0x7b4>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: FIN_WAIT_2 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        tcp_ack_now(pcb);
 801d8a6:	687b      	ldr	r3, [r7, #4]
 801d8a8:	8b5b      	ldrh	r3, [r3, #26]
 801d8aa:	f043 0302 	orr.w	r3, r3, #2
 801d8ae:	b29a      	uxth	r2, r3
 801d8b0:	687b      	ldr	r3, [r7, #4]
 801d8b2:	835a      	strh	r2, [r3, #26]
        tcp_pcb_purge(pcb);
 801d8b4:	6878      	ldr	r0, [r7, #4]
 801d8b6:	f7fe fd37 	bl	801c328 <tcp_pcb_purge>
        TCP_RMV_ACTIVE(pcb);
 801d8ba:	4b59      	ldr	r3, [pc, #356]	@ (801da20 <tcp_process+0x7dc>)
 801d8bc:	681b      	ldr	r3, [r3, #0]
 801d8be:	687a      	ldr	r2, [r7, #4]
 801d8c0:	429a      	cmp	r2, r3
 801d8c2:	d105      	bne.n	801d8d0 <tcp_process+0x68c>
 801d8c4:	4b56      	ldr	r3, [pc, #344]	@ (801da20 <tcp_process+0x7dc>)
 801d8c6:	681b      	ldr	r3, [r3, #0]
 801d8c8:	68db      	ldr	r3, [r3, #12]
 801d8ca:	4a55      	ldr	r2, [pc, #340]	@ (801da20 <tcp_process+0x7dc>)
 801d8cc:	6013      	str	r3, [r2, #0]
 801d8ce:	e013      	b.n	801d8f8 <tcp_process+0x6b4>
 801d8d0:	4b53      	ldr	r3, [pc, #332]	@ (801da20 <tcp_process+0x7dc>)
 801d8d2:	681b      	ldr	r3, [r3, #0]
 801d8d4:	60fb      	str	r3, [r7, #12]
 801d8d6:	e00c      	b.n	801d8f2 <tcp_process+0x6ae>
 801d8d8:	68fb      	ldr	r3, [r7, #12]
 801d8da:	68db      	ldr	r3, [r3, #12]
 801d8dc:	687a      	ldr	r2, [r7, #4]
 801d8de:	429a      	cmp	r2, r3
 801d8e0:	d104      	bne.n	801d8ec <tcp_process+0x6a8>
 801d8e2:	687b      	ldr	r3, [r7, #4]
 801d8e4:	68da      	ldr	r2, [r3, #12]
 801d8e6:	68fb      	ldr	r3, [r7, #12]
 801d8e8:	60da      	str	r2, [r3, #12]
 801d8ea:	e005      	b.n	801d8f8 <tcp_process+0x6b4>
 801d8ec:	68fb      	ldr	r3, [r7, #12]
 801d8ee:	68db      	ldr	r3, [r3, #12]
 801d8f0:	60fb      	str	r3, [r7, #12]
 801d8f2:	68fb      	ldr	r3, [r7, #12]
 801d8f4:	2b00      	cmp	r3, #0
 801d8f6:	d1ef      	bne.n	801d8d8 <tcp_process+0x694>
 801d8f8:	687b      	ldr	r3, [r7, #4]
 801d8fa:	2200      	movs	r2, #0
 801d8fc:	60da      	str	r2, [r3, #12]
 801d8fe:	4b43      	ldr	r3, [pc, #268]	@ (801da0c <tcp_process+0x7c8>)
 801d900:	2201      	movs	r2, #1
 801d902:	701a      	strb	r2, [r3, #0]
        pcb->state = TIME_WAIT;
 801d904:	687b      	ldr	r3, [r7, #4]
 801d906:	220a      	movs	r2, #10
 801d908:	751a      	strb	r2, [r3, #20]
        TCP_REG(&tcp_tw_pcbs, pcb);
 801d90a:	4b41      	ldr	r3, [pc, #260]	@ (801da10 <tcp_process+0x7cc>)
 801d90c:	681a      	ldr	r2, [r3, #0]
 801d90e:	687b      	ldr	r3, [r7, #4]
 801d910:	60da      	str	r2, [r3, #12]
 801d912:	4a3f      	ldr	r2, [pc, #252]	@ (801da10 <tcp_process+0x7cc>)
 801d914:	687b      	ldr	r3, [r7, #4]
 801d916:	6013      	str	r3, [r2, #0]
 801d918:	f003 f958 	bl	8020bcc <tcp_timer_needed>
      }
      break;
 801d91c:	e06c      	b.n	801d9f8 <tcp_process+0x7b4>
    case CLOSING:
      tcp_receive(pcb);
 801d91e:	6878      	ldr	r0, [r7, #4]
 801d920:	f000 f984 	bl	801dc2c <tcp_receive>
      if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) {
 801d924:	4b3b      	ldr	r3, [pc, #236]	@ (801da14 <tcp_process+0x7d0>)
 801d926:	781b      	ldrb	r3, [r3, #0]
 801d928:	f003 0310 	and.w	r3, r3, #16
 801d92c:	2b00      	cmp	r3, #0
 801d92e:	d065      	beq.n	801d9fc <tcp_process+0x7b8>
 801d930:	687b      	ldr	r3, [r7, #4]
 801d932:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801d934:	4b38      	ldr	r3, [pc, #224]	@ (801da18 <tcp_process+0x7d4>)
 801d936:	681b      	ldr	r3, [r3, #0]
 801d938:	429a      	cmp	r2, r3
 801d93a:	d15f      	bne.n	801d9fc <tcp_process+0x7b8>
 801d93c:	687b      	ldr	r3, [r7, #4]
 801d93e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801d940:	2b00      	cmp	r3, #0
 801d942:	d15b      	bne.n	801d9fc <tcp_process+0x7b8>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: CLOSING %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        tcp_pcb_purge(pcb);
 801d944:	6878      	ldr	r0, [r7, #4]
 801d946:	f7fe fcef 	bl	801c328 <tcp_pcb_purge>
        TCP_RMV_ACTIVE(pcb);
 801d94a:	4b35      	ldr	r3, [pc, #212]	@ (801da20 <tcp_process+0x7dc>)
 801d94c:	681b      	ldr	r3, [r3, #0]
 801d94e:	687a      	ldr	r2, [r7, #4]
 801d950:	429a      	cmp	r2, r3
 801d952:	d105      	bne.n	801d960 <tcp_process+0x71c>
 801d954:	4b32      	ldr	r3, [pc, #200]	@ (801da20 <tcp_process+0x7dc>)
 801d956:	681b      	ldr	r3, [r3, #0]
 801d958:	68db      	ldr	r3, [r3, #12]
 801d95a:	4a31      	ldr	r2, [pc, #196]	@ (801da20 <tcp_process+0x7dc>)
 801d95c:	6013      	str	r3, [r2, #0]
 801d95e:	e013      	b.n	801d988 <tcp_process+0x744>
 801d960:	4b2f      	ldr	r3, [pc, #188]	@ (801da20 <tcp_process+0x7dc>)
 801d962:	681b      	ldr	r3, [r3, #0]
 801d964:	61bb      	str	r3, [r7, #24]
 801d966:	e00c      	b.n	801d982 <tcp_process+0x73e>
 801d968:	69bb      	ldr	r3, [r7, #24]
 801d96a:	68db      	ldr	r3, [r3, #12]
 801d96c:	687a      	ldr	r2, [r7, #4]
 801d96e:	429a      	cmp	r2, r3
 801d970:	d104      	bne.n	801d97c <tcp_process+0x738>
 801d972:	687b      	ldr	r3, [r7, #4]
 801d974:	68da      	ldr	r2, [r3, #12]
 801d976:	69bb      	ldr	r3, [r7, #24]
 801d978:	60da      	str	r2, [r3, #12]
 801d97a:	e005      	b.n	801d988 <tcp_process+0x744>
 801d97c:	69bb      	ldr	r3, [r7, #24]
 801d97e:	68db      	ldr	r3, [r3, #12]
 801d980:	61bb      	str	r3, [r7, #24]
 801d982:	69bb      	ldr	r3, [r7, #24]
 801d984:	2b00      	cmp	r3, #0
 801d986:	d1ef      	bne.n	801d968 <tcp_process+0x724>
 801d988:	687b      	ldr	r3, [r7, #4]
 801d98a:	2200      	movs	r2, #0
 801d98c:	60da      	str	r2, [r3, #12]
 801d98e:	4b1f      	ldr	r3, [pc, #124]	@ (801da0c <tcp_process+0x7c8>)
 801d990:	2201      	movs	r2, #1
 801d992:	701a      	strb	r2, [r3, #0]
        pcb->state = TIME_WAIT;
 801d994:	687b      	ldr	r3, [r7, #4]
 801d996:	220a      	movs	r2, #10
 801d998:	751a      	strb	r2, [r3, #20]
        TCP_REG(&tcp_tw_pcbs, pcb);
 801d99a:	4b1d      	ldr	r3, [pc, #116]	@ (801da10 <tcp_process+0x7cc>)
 801d99c:	681a      	ldr	r2, [r3, #0]
 801d99e:	687b      	ldr	r3, [r7, #4]
 801d9a0:	60da      	str	r2, [r3, #12]
 801d9a2:	4a1b      	ldr	r2, [pc, #108]	@ (801da10 <tcp_process+0x7cc>)
 801d9a4:	687b      	ldr	r3, [r7, #4]
 801d9a6:	6013      	str	r3, [r2, #0]
 801d9a8:	f003 f910 	bl	8020bcc <tcp_timer_needed>
      }
      break;
 801d9ac:	e026      	b.n	801d9fc <tcp_process+0x7b8>
    case LAST_ACK:
      tcp_receive(pcb);
 801d9ae:	6878      	ldr	r0, [r7, #4]
 801d9b0:	f000 f93c 	bl	801dc2c <tcp_receive>
      if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) {
 801d9b4:	4b17      	ldr	r3, [pc, #92]	@ (801da14 <tcp_process+0x7d0>)
 801d9b6:	781b      	ldrb	r3, [r3, #0]
 801d9b8:	f003 0310 	and.w	r3, r3, #16
 801d9bc:	2b00      	cmp	r3, #0
 801d9be:	d01f      	beq.n	801da00 <tcp_process+0x7bc>
 801d9c0:	687b      	ldr	r3, [r7, #4]
 801d9c2:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801d9c4:	4b14      	ldr	r3, [pc, #80]	@ (801da18 <tcp_process+0x7d4>)
 801d9c6:	681b      	ldr	r3, [r3, #0]
 801d9c8:	429a      	cmp	r2, r3
 801d9ca:	d119      	bne.n	801da00 <tcp_process+0x7bc>
 801d9cc:	687b      	ldr	r3, [r7, #4]
 801d9ce:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801d9d0:	2b00      	cmp	r3, #0
 801d9d2:	d115      	bne.n	801da00 <tcp_process+0x7bc>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: LAST_ACK %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        /* bugfix #21699: don't set pcb->state to CLOSED here or we risk leaking segments */
        recv_flags |= TF_CLOSED;
 801d9d4:	4b11      	ldr	r3, [pc, #68]	@ (801da1c <tcp_process+0x7d8>)
 801d9d6:	781b      	ldrb	r3, [r3, #0]
 801d9d8:	f043 0310 	orr.w	r3, r3, #16
 801d9dc:	b2da      	uxtb	r2, r3
 801d9de:	4b0f      	ldr	r3, [pc, #60]	@ (801da1c <tcp_process+0x7d8>)
 801d9e0:	701a      	strb	r2, [r3, #0]
      }
      break;
 801d9e2:	e00d      	b.n	801da00 <tcp_process+0x7bc>
    default:
      break;
 801d9e4:	bf00      	nop
 801d9e6:	e00c      	b.n	801da02 <tcp_process+0x7be>
      break;
 801d9e8:	bf00      	nop
 801d9ea:	e00a      	b.n	801da02 <tcp_process+0x7be>
      break;
 801d9ec:	bf00      	nop
 801d9ee:	e008      	b.n	801da02 <tcp_process+0x7be>
      break;
 801d9f0:	bf00      	nop
 801d9f2:	e006      	b.n	801da02 <tcp_process+0x7be>
      break;
 801d9f4:	bf00      	nop
 801d9f6:	e004      	b.n	801da02 <tcp_process+0x7be>
      break;
 801d9f8:	bf00      	nop
 801d9fa:	e002      	b.n	801da02 <tcp_process+0x7be>
      break;
 801d9fc:	bf00      	nop
 801d9fe:	e000      	b.n	801da02 <tcp_process+0x7be>
      break;
 801da00:	bf00      	nop
  }
  return ERR_OK;
 801da02:	2300      	movs	r3, #0
}
 801da04:	4618      	mov	r0, r3
 801da06:	3724      	adds	r7, #36	@ 0x24
 801da08:	46bd      	mov	sp, r7
 801da0a:	bd90      	pop	{r4, r7, pc}
 801da0c:	2402ae9c 	.word	0x2402ae9c
 801da10:	2402ae98 	.word	0x2402ae98
 801da14:	2402aed0 	.word	0x2402aed0
 801da18:	2402aec8 	.word	0x2402aec8
 801da1c:	2402aed1 	.word	0x2402aed1
 801da20:	2402ae94 	.word	0x2402ae94

0801da24 <tcp_oos_insert_segment>:
 *
 * Called from tcp_receive()
 */
static void
tcp_oos_insert_segment(struct tcp_seg *cseg, struct tcp_seg *next)
{
 801da24:	b590      	push	{r4, r7, lr}
 801da26:	b085      	sub	sp, #20
 801da28:	af00      	add	r7, sp, #0
 801da2a:	6078      	str	r0, [r7, #4]
 801da2c:	6039      	str	r1, [r7, #0]
  struct tcp_seg *old_seg;

  LWIP_ASSERT("tcp_oos_insert_segment: invalid cseg", cseg != NULL);
 801da2e:	687b      	ldr	r3, [r7, #4]
 801da30:	2b00      	cmp	r3, #0
 801da32:	d106      	bne.n	801da42 <tcp_oos_insert_segment+0x1e>
 801da34:	4b3b      	ldr	r3, [pc, #236]	@ (801db24 <tcp_oos_insert_segment+0x100>)
 801da36:	f240 421f 	movw	r2, #1055	@ 0x41f
 801da3a:	493b      	ldr	r1, [pc, #236]	@ (801db28 <tcp_oos_insert_segment+0x104>)
 801da3c:	483b      	ldr	r0, [pc, #236]	@ (801db2c <tcp_oos_insert_segment+0x108>)
 801da3e:	f00b ffcd 	bl	80299dc <iprintf>

  if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) {
 801da42:	687b      	ldr	r3, [r7, #4]
 801da44:	691b      	ldr	r3, [r3, #16]
 801da46:	899b      	ldrh	r3, [r3, #12]
 801da48:	b29b      	uxth	r3, r3
 801da4a:	4618      	mov	r0, r3
 801da4c:	f7fb f86c 	bl	8018b28 <lwip_htons>
 801da50:	4603      	mov	r3, r0
 801da52:	b2db      	uxtb	r3, r3
 801da54:	f003 0301 	and.w	r3, r3, #1
 801da58:	2b00      	cmp	r3, #0
 801da5a:	d028      	beq.n	801daae <tcp_oos_insert_segment+0x8a>
    /* received segment overlaps all following segments */
    tcp_segs_free(next);
 801da5c:	6838      	ldr	r0, [r7, #0]
 801da5e:	f7fe f989 	bl	801bd74 <tcp_segs_free>
    next = NULL;
 801da62:	2300      	movs	r3, #0
 801da64:	603b      	str	r3, [r7, #0]
 801da66:	e056      	b.n	801db16 <tcp_oos_insert_segment+0xf2>
       oos queue may have segments with FIN flag */
    while (next &&
           TCP_SEQ_GEQ((seqno + cseg->len),
                       (next->tcphdr->seqno + next->len))) {
      /* cseg with FIN already processed */
      if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) {
 801da68:	683b      	ldr	r3, [r7, #0]
 801da6a:	691b      	ldr	r3, [r3, #16]
 801da6c:	899b      	ldrh	r3, [r3, #12]
 801da6e:	b29b      	uxth	r3, r3
 801da70:	4618      	mov	r0, r3
 801da72:	f7fb f859 	bl	8018b28 <lwip_htons>
 801da76:	4603      	mov	r3, r0
 801da78:	b2db      	uxtb	r3, r3
 801da7a:	f003 0301 	and.w	r3, r3, #1
 801da7e:	2b00      	cmp	r3, #0
 801da80:	d00d      	beq.n	801da9e <tcp_oos_insert_segment+0x7a>
        TCPH_SET_FLAG(cseg->tcphdr, TCP_FIN);
 801da82:	687b      	ldr	r3, [r7, #4]
 801da84:	691b      	ldr	r3, [r3, #16]
 801da86:	899b      	ldrh	r3, [r3, #12]
 801da88:	b29c      	uxth	r4, r3
 801da8a:	2001      	movs	r0, #1
 801da8c:	f7fb f84c 	bl	8018b28 <lwip_htons>
 801da90:	4603      	mov	r3, r0
 801da92:	461a      	mov	r2, r3
 801da94:	687b      	ldr	r3, [r7, #4]
 801da96:	691b      	ldr	r3, [r3, #16]
 801da98:	4322      	orrs	r2, r4
 801da9a:	b292      	uxth	r2, r2
 801da9c:	819a      	strh	r2, [r3, #12]
      }
      old_seg = next;
 801da9e:	683b      	ldr	r3, [r7, #0]
 801daa0:	60fb      	str	r3, [r7, #12]
      next = next->next;
 801daa2:	683b      	ldr	r3, [r7, #0]
 801daa4:	681b      	ldr	r3, [r3, #0]
 801daa6:	603b      	str	r3, [r7, #0]
      tcp_seg_free(old_seg);
 801daa8:	68f8      	ldr	r0, [r7, #12]
 801daaa:	f7fe f978 	bl	801bd9e <tcp_seg_free>
    while (next &&
 801daae:	683b      	ldr	r3, [r7, #0]
 801dab0:	2b00      	cmp	r3, #0
 801dab2:	d00e      	beq.n	801dad2 <tcp_oos_insert_segment+0xae>
           TCP_SEQ_GEQ((seqno + cseg->len),
 801dab4:	687b      	ldr	r3, [r7, #4]
 801dab6:	891b      	ldrh	r3, [r3, #8]
 801dab8:	461a      	mov	r2, r3
 801daba:	4b1d      	ldr	r3, [pc, #116]	@ (801db30 <tcp_oos_insert_segment+0x10c>)
 801dabc:	681b      	ldr	r3, [r3, #0]
 801dabe:	441a      	add	r2, r3
 801dac0:	683b      	ldr	r3, [r7, #0]
 801dac2:	691b      	ldr	r3, [r3, #16]
 801dac4:	685b      	ldr	r3, [r3, #4]
 801dac6:	6839      	ldr	r1, [r7, #0]
 801dac8:	8909      	ldrh	r1, [r1, #8]
 801daca:	440b      	add	r3, r1
 801dacc:	1ad3      	subs	r3, r2, r3
    while (next &&
 801dace:	2b00      	cmp	r3, #0
 801dad0:	daca      	bge.n	801da68 <tcp_oos_insert_segment+0x44>
    }
    if (next &&
 801dad2:	683b      	ldr	r3, [r7, #0]
 801dad4:	2b00      	cmp	r3, #0
 801dad6:	d01e      	beq.n	801db16 <tcp_oos_insert_segment+0xf2>
        TCP_SEQ_GT(seqno + cseg->len, next->tcphdr->seqno)) {
 801dad8:	687b      	ldr	r3, [r7, #4]
 801dada:	891b      	ldrh	r3, [r3, #8]
 801dadc:	461a      	mov	r2, r3
 801dade:	4b14      	ldr	r3, [pc, #80]	@ (801db30 <tcp_oos_insert_segment+0x10c>)
 801dae0:	681b      	ldr	r3, [r3, #0]
 801dae2:	441a      	add	r2, r3
 801dae4:	683b      	ldr	r3, [r7, #0]
 801dae6:	691b      	ldr	r3, [r3, #16]
 801dae8:	685b      	ldr	r3, [r3, #4]
 801daea:	1ad3      	subs	r3, r2, r3
    if (next &&
 801daec:	2b00      	cmp	r3, #0
 801daee:	dd12      	ble.n	801db16 <tcp_oos_insert_segment+0xf2>
      /* We need to trim the incoming segment. */
      cseg->len = (u16_t)(next->tcphdr->seqno - seqno);
 801daf0:	683b      	ldr	r3, [r7, #0]
 801daf2:	691b      	ldr	r3, [r3, #16]
 801daf4:	685b      	ldr	r3, [r3, #4]
 801daf6:	b29a      	uxth	r2, r3
 801daf8:	4b0d      	ldr	r3, [pc, #52]	@ (801db30 <tcp_oos_insert_segment+0x10c>)
 801dafa:	681b      	ldr	r3, [r3, #0]
 801dafc:	b29b      	uxth	r3, r3
 801dafe:	1ad3      	subs	r3, r2, r3
 801db00:	b29a      	uxth	r2, r3
 801db02:	687b      	ldr	r3, [r7, #4]
 801db04:	811a      	strh	r2, [r3, #8]
      pbuf_realloc(cseg->p, cseg->len);
 801db06:	687b      	ldr	r3, [r7, #4]
 801db08:	685a      	ldr	r2, [r3, #4]
 801db0a:	687b      	ldr	r3, [r7, #4]
 801db0c:	891b      	ldrh	r3, [r3, #8]
 801db0e:	4619      	mov	r1, r3
 801db10:	4610      	mov	r0, r2
 801db12:	f7fc fb35 	bl	801a180 <pbuf_realloc>
    }
  }
  cseg->next = next;
 801db16:	687b      	ldr	r3, [r7, #4]
 801db18:	683a      	ldr	r2, [r7, #0]
 801db1a:	601a      	str	r2, [r3, #0]
}
 801db1c:	bf00      	nop
 801db1e:	3714      	adds	r7, #20
 801db20:	46bd      	mov	sp, r7
 801db22:	bd90      	pop	{r4, r7, pc}
 801db24:	0802ed58 	.word	0x0802ed58
 801db28:	0802f018 	.word	0x0802f018
 801db2c:	0802eda4 	.word	0x0802eda4
 801db30:	2402aec4 	.word	0x2402aec4

0801db34 <tcp_free_acked_segments>:

/** Remove segments from a list if the incoming ACK acknowledges them */
static struct tcp_seg *
tcp_free_acked_segments(struct tcp_pcb *pcb, struct tcp_seg *seg_list, const char *dbg_list_name,
                        struct tcp_seg *dbg_other_seg_list)
{
 801db34:	b5b0      	push	{r4, r5, r7, lr}
 801db36:	b086      	sub	sp, #24
 801db38:	af00      	add	r7, sp, #0
 801db3a:	60f8      	str	r0, [r7, #12]
 801db3c:	60b9      	str	r1, [r7, #8]
 801db3e:	607a      	str	r2, [r7, #4]
 801db40:	603b      	str	r3, [r7, #0]
  u16_t clen;

  LWIP_UNUSED_ARG(dbg_list_name);
  LWIP_UNUSED_ARG(dbg_other_seg_list);

  while (seg_list != NULL &&
 801db42:	e03e      	b.n	801dbc2 <tcp_free_acked_segments+0x8e>
    LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->%s\n",
                                  lwip_ntohl(seg_list->tcphdr->seqno),
                                  lwip_ntohl(seg_list->tcphdr->seqno) + TCP_TCPLEN(seg_list),
                                  dbg_list_name));

    next = seg_list;
 801db44:	68bb      	ldr	r3, [r7, #8]
 801db46:	617b      	str	r3, [r7, #20]
    seg_list = seg_list->next;
 801db48:	68bb      	ldr	r3, [r7, #8]
 801db4a:	681b      	ldr	r3, [r3, #0]
 801db4c:	60bb      	str	r3, [r7, #8]

    clen = pbuf_clen(next->p);
 801db4e:	697b      	ldr	r3, [r7, #20]
 801db50:	685b      	ldr	r3, [r3, #4]
 801db52:	4618      	mov	r0, r3
 801db54:	f7fc fd58 	bl	801a608 <pbuf_clen>
 801db58:	4603      	mov	r3, r0
 801db5a:	827b      	strh	r3, [r7, #18]
    LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"TCPWNDSIZE_F" ... ",
                                 (tcpwnd_size_t)pcb->snd_queuelen));
    LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= clen));
 801db5c:	68fb      	ldr	r3, [r7, #12]
 801db5e:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801db62:	8a7a      	ldrh	r2, [r7, #18]
 801db64:	429a      	cmp	r2, r3
 801db66:	d906      	bls.n	801db76 <tcp_free_acked_segments+0x42>
 801db68:	4b2a      	ldr	r3, [pc, #168]	@ (801dc14 <tcp_free_acked_segments+0xe0>)
 801db6a:	f240 4257 	movw	r2, #1111	@ 0x457
 801db6e:	492a      	ldr	r1, [pc, #168]	@ (801dc18 <tcp_free_acked_segments+0xe4>)
 801db70:	482a      	ldr	r0, [pc, #168]	@ (801dc1c <tcp_free_acked_segments+0xe8>)
 801db72:	f00b ff33 	bl	80299dc <iprintf>

    pcb->snd_queuelen = (u16_t)(pcb->snd_queuelen - clen);
 801db76:	68fb      	ldr	r3, [r7, #12]
 801db78:	f8b3 2066 	ldrh.w	r2, [r3, #102]	@ 0x66
 801db7c:	8a7b      	ldrh	r3, [r7, #18]
 801db7e:	1ad3      	subs	r3, r2, r3
 801db80:	b29a      	uxth	r2, r3
 801db82:	68fb      	ldr	r3, [r7, #12]
 801db84:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
    recv_acked = (tcpwnd_size_t)(recv_acked + next->len);
 801db88:	697b      	ldr	r3, [r7, #20]
 801db8a:	891a      	ldrh	r2, [r3, #8]
 801db8c:	4b24      	ldr	r3, [pc, #144]	@ (801dc20 <tcp_free_acked_segments+0xec>)
 801db8e:	881b      	ldrh	r3, [r3, #0]
 801db90:	4413      	add	r3, r2
 801db92:	b29a      	uxth	r2, r3
 801db94:	4b22      	ldr	r3, [pc, #136]	@ (801dc20 <tcp_free_acked_segments+0xec>)
 801db96:	801a      	strh	r2, [r3, #0]
    tcp_seg_free(next);
 801db98:	6978      	ldr	r0, [r7, #20]
 801db9a:	f7fe f900 	bl	801bd9e <tcp_seg_free>

    LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"TCPWNDSIZE_F" (after freeing %s)\n",
                                 (tcpwnd_size_t)pcb->snd_queuelen,
                                 dbg_list_name));
    if (pcb->snd_queuelen != 0) {
 801db9e:	68fb      	ldr	r3, [r7, #12]
 801dba0:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801dba4:	2b00      	cmp	r3, #0
 801dba6:	d00c      	beq.n	801dbc2 <tcp_free_acked_segments+0x8e>
      LWIP_ASSERT("tcp_receive: valid queue length",
 801dba8:	68bb      	ldr	r3, [r7, #8]
 801dbaa:	2b00      	cmp	r3, #0
 801dbac:	d109      	bne.n	801dbc2 <tcp_free_acked_segments+0x8e>
 801dbae:	683b      	ldr	r3, [r7, #0]
 801dbb0:	2b00      	cmp	r3, #0
 801dbb2:	d106      	bne.n	801dbc2 <tcp_free_acked_segments+0x8e>
 801dbb4:	4b17      	ldr	r3, [pc, #92]	@ (801dc14 <tcp_free_acked_segments+0xe0>)
 801dbb6:	f240 4261 	movw	r2, #1121	@ 0x461
 801dbba:	491a      	ldr	r1, [pc, #104]	@ (801dc24 <tcp_free_acked_segments+0xf0>)
 801dbbc:	4817      	ldr	r0, [pc, #92]	@ (801dc1c <tcp_free_acked_segments+0xe8>)
 801dbbe:	f00b ff0d 	bl	80299dc <iprintf>
  while (seg_list != NULL &&
 801dbc2:	68bb      	ldr	r3, [r7, #8]
 801dbc4:	2b00      	cmp	r3, #0
 801dbc6:	d020      	beq.n	801dc0a <tcp_free_acked_segments+0xd6>
         TCP_SEQ_LEQ(lwip_ntohl(seg_list->tcphdr->seqno) +
 801dbc8:	68bb      	ldr	r3, [r7, #8]
 801dbca:	691b      	ldr	r3, [r3, #16]
 801dbcc:	685b      	ldr	r3, [r3, #4]
 801dbce:	4618      	mov	r0, r3
 801dbd0:	f7fa ffbf 	bl	8018b52 <lwip_htonl>
 801dbd4:	4604      	mov	r4, r0
 801dbd6:	68bb      	ldr	r3, [r7, #8]
 801dbd8:	891b      	ldrh	r3, [r3, #8]
 801dbda:	461d      	mov	r5, r3
 801dbdc:	68bb      	ldr	r3, [r7, #8]
 801dbde:	691b      	ldr	r3, [r3, #16]
 801dbe0:	899b      	ldrh	r3, [r3, #12]
 801dbe2:	b29b      	uxth	r3, r3
 801dbe4:	4618      	mov	r0, r3
 801dbe6:	f7fa ff9f 	bl	8018b28 <lwip_htons>
 801dbea:	4603      	mov	r3, r0
 801dbec:	b2db      	uxtb	r3, r3
 801dbee:	f003 0303 	and.w	r3, r3, #3
 801dbf2:	2b00      	cmp	r3, #0
 801dbf4:	d001      	beq.n	801dbfa <tcp_free_acked_segments+0xc6>
 801dbf6:	2301      	movs	r3, #1
 801dbf8:	e000      	b.n	801dbfc <tcp_free_acked_segments+0xc8>
 801dbfa:	2300      	movs	r3, #0
 801dbfc:	442b      	add	r3, r5
 801dbfe:	18e2      	adds	r2, r4, r3
 801dc00:	4b09      	ldr	r3, [pc, #36]	@ (801dc28 <tcp_free_acked_segments+0xf4>)
 801dc02:	681b      	ldr	r3, [r3, #0]
 801dc04:	1ad3      	subs	r3, r2, r3
  while (seg_list != NULL &&
 801dc06:	2b00      	cmp	r3, #0
 801dc08:	dd9c      	ble.n	801db44 <tcp_free_acked_segments+0x10>
                  seg_list != NULL || dbg_other_seg_list != NULL);
    }
  }
  return seg_list;
 801dc0a:	68bb      	ldr	r3, [r7, #8]
}
 801dc0c:	4618      	mov	r0, r3
 801dc0e:	3718      	adds	r7, #24
 801dc10:	46bd      	mov	sp, r7
 801dc12:	bdb0      	pop	{r4, r5, r7, pc}
 801dc14:	0802ed58 	.word	0x0802ed58
 801dc18:	0802f040 	.word	0x0802f040
 801dc1c:	0802eda4 	.word	0x0802eda4
 801dc20:	2402aecc 	.word	0x2402aecc
 801dc24:	0802f068 	.word	0x0802f068
 801dc28:	2402aec8 	.word	0x2402aec8

0801dc2c <tcp_receive>:
 *
 * Called from tcp_process().
 */
static void
tcp_receive(struct tcp_pcb *pcb)
{
 801dc2c:	b5b0      	push	{r4, r5, r7, lr}
 801dc2e:	b094      	sub	sp, #80	@ 0x50
 801dc30:	af00      	add	r7, sp, #0
 801dc32:	6078      	str	r0, [r7, #4]
  s16_t m;
  u32_t right_wnd_edge;
  int found_dupack = 0;
 801dc34:	2300      	movs	r3, #0
 801dc36:	64bb      	str	r3, [r7, #72]	@ 0x48

  LWIP_ASSERT("tcp_receive: invalid pcb", pcb != NULL);
 801dc38:	687b      	ldr	r3, [r7, #4]
 801dc3a:	2b00      	cmp	r3, #0
 801dc3c:	d106      	bne.n	801dc4c <tcp_receive+0x20>
 801dc3e:	4b91      	ldr	r3, [pc, #580]	@ (801de84 <tcp_receive+0x258>)
 801dc40:	f240 427b 	movw	r2, #1147	@ 0x47b
 801dc44:	4990      	ldr	r1, [pc, #576]	@ (801de88 <tcp_receive+0x25c>)
 801dc46:	4891      	ldr	r0, [pc, #580]	@ (801de8c <tcp_receive+0x260>)
 801dc48:	f00b fec8 	bl	80299dc <iprintf>
  LWIP_ASSERT("tcp_receive: wrong state", pcb->state >= ESTABLISHED);
 801dc4c:	687b      	ldr	r3, [r7, #4]
 801dc4e:	7d1b      	ldrb	r3, [r3, #20]
 801dc50:	2b03      	cmp	r3, #3
 801dc52:	d806      	bhi.n	801dc62 <tcp_receive+0x36>
 801dc54:	4b8b      	ldr	r3, [pc, #556]	@ (801de84 <tcp_receive+0x258>)
 801dc56:	f240 427c 	movw	r2, #1148	@ 0x47c
 801dc5a:	498d      	ldr	r1, [pc, #564]	@ (801de90 <tcp_receive+0x264>)
 801dc5c:	488b      	ldr	r0, [pc, #556]	@ (801de8c <tcp_receive+0x260>)
 801dc5e:	f00b febd 	bl	80299dc <iprintf>

  if (flags & TCP_ACK) {
 801dc62:	4b8c      	ldr	r3, [pc, #560]	@ (801de94 <tcp_receive+0x268>)
 801dc64:	781b      	ldrb	r3, [r3, #0]
 801dc66:	f003 0310 	and.w	r3, r3, #16
 801dc6a:	2b00      	cmp	r3, #0
 801dc6c:	f000 8264 	beq.w	801e138 <tcp_receive+0x50c>
    right_wnd_edge = pcb->snd_wnd + pcb->snd_wl2;
 801dc70:	687b      	ldr	r3, [r7, #4]
 801dc72:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801dc76:	461a      	mov	r2, r3
 801dc78:	687b      	ldr	r3, [r7, #4]
 801dc7a:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 801dc7c:	4413      	add	r3, r2
 801dc7e:	633b      	str	r3, [r7, #48]	@ 0x30

    /* Update window. */
    if (TCP_SEQ_LT(pcb->snd_wl1, seqno) ||
 801dc80:	687b      	ldr	r3, [r7, #4]
 801dc82:	6d5a      	ldr	r2, [r3, #84]	@ 0x54
 801dc84:	4b84      	ldr	r3, [pc, #528]	@ (801de98 <tcp_receive+0x26c>)
 801dc86:	681b      	ldr	r3, [r3, #0]
 801dc88:	1ad3      	subs	r3, r2, r3
 801dc8a:	2b00      	cmp	r3, #0
 801dc8c:	db1b      	blt.n	801dcc6 <tcp_receive+0x9a>
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801dc8e:	687b      	ldr	r3, [r7, #4]
 801dc90:	6d5a      	ldr	r2, [r3, #84]	@ 0x54
 801dc92:	4b81      	ldr	r3, [pc, #516]	@ (801de98 <tcp_receive+0x26c>)
 801dc94:	681b      	ldr	r3, [r3, #0]
    if (TCP_SEQ_LT(pcb->snd_wl1, seqno) ||
 801dc96:	429a      	cmp	r2, r3
 801dc98:	d106      	bne.n	801dca8 <tcp_receive+0x7c>
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801dc9a:	687b      	ldr	r3, [r7, #4]
 801dc9c:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 801dc9e:	4b7f      	ldr	r3, [pc, #508]	@ (801de9c <tcp_receive+0x270>)
 801dca0:	681b      	ldr	r3, [r3, #0]
 801dca2:	1ad3      	subs	r3, r2, r3
 801dca4:	2b00      	cmp	r3, #0
 801dca6:	db0e      	blt.n	801dcc6 <tcp_receive+0x9a>
        (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) {
 801dca8:	687b      	ldr	r3, [r7, #4]
 801dcaa:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 801dcac:	4b7b      	ldr	r3, [pc, #492]	@ (801de9c <tcp_receive+0x270>)
 801dcae:	681b      	ldr	r3, [r3, #0]
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801dcb0:	429a      	cmp	r2, r3
 801dcb2:	d125      	bne.n	801dd00 <tcp_receive+0xd4>
        (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) {
 801dcb4:	4b7a      	ldr	r3, [pc, #488]	@ (801dea0 <tcp_receive+0x274>)
 801dcb6:	681b      	ldr	r3, [r3, #0]
 801dcb8:	89db      	ldrh	r3, [r3, #14]
 801dcba:	b29a      	uxth	r2, r3
 801dcbc:	687b      	ldr	r3, [r7, #4]
 801dcbe:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801dcc2:	429a      	cmp	r2, r3
 801dcc4:	d91c      	bls.n	801dd00 <tcp_receive+0xd4>
      pcb->snd_wnd = SND_WND_SCALE(pcb, tcphdr->wnd);
 801dcc6:	4b76      	ldr	r3, [pc, #472]	@ (801dea0 <tcp_receive+0x274>)
 801dcc8:	681b      	ldr	r3, [r3, #0]
 801dcca:	89db      	ldrh	r3, [r3, #14]
 801dccc:	b29a      	uxth	r2, r3
 801dcce:	687b      	ldr	r3, [r7, #4]
 801dcd0:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
      /* keep track of the biggest window announced by the remote host to calculate
         the maximum segment size */
      if (pcb->snd_wnd_max < pcb->snd_wnd) {
 801dcd4:	687b      	ldr	r3, [r7, #4]
 801dcd6:	f8b3 2062 	ldrh.w	r2, [r3, #98]	@ 0x62
 801dcda:	687b      	ldr	r3, [r7, #4]
 801dcdc:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801dce0:	429a      	cmp	r2, r3
 801dce2:	d205      	bcs.n	801dcf0 <tcp_receive+0xc4>
        pcb->snd_wnd_max = pcb->snd_wnd;
 801dce4:	687b      	ldr	r3, [r7, #4]
 801dce6:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801dcea:	687b      	ldr	r3, [r7, #4]
 801dcec:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
      }
      pcb->snd_wl1 = seqno;
 801dcf0:	4b69      	ldr	r3, [pc, #420]	@ (801de98 <tcp_receive+0x26c>)
 801dcf2:	681a      	ldr	r2, [r3, #0]
 801dcf4:	687b      	ldr	r3, [r7, #4]
 801dcf6:	655a      	str	r2, [r3, #84]	@ 0x54
      pcb->snd_wl2 = ackno;
 801dcf8:	4b68      	ldr	r3, [pc, #416]	@ (801de9c <tcp_receive+0x270>)
 801dcfa:	681a      	ldr	r2, [r3, #0]
 801dcfc:	687b      	ldr	r3, [r7, #4]
 801dcfe:	659a      	str	r2, [r3, #88]	@ 0x58
     * If it only passes 1, should reset dupack counter
     *
     */

    /* Clause 1 */
    if (TCP_SEQ_LEQ(ackno, pcb->lastack)) {
 801dd00:	4b66      	ldr	r3, [pc, #408]	@ (801de9c <tcp_receive+0x270>)
 801dd02:	681a      	ldr	r2, [r3, #0]
 801dd04:	687b      	ldr	r3, [r7, #4]
 801dd06:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801dd08:	1ad3      	subs	r3, r2, r3
 801dd0a:	2b00      	cmp	r3, #0
 801dd0c:	dc58      	bgt.n	801ddc0 <tcp_receive+0x194>
      /* Clause 2 */
      if (tcplen == 0) {
 801dd0e:	4b65      	ldr	r3, [pc, #404]	@ (801dea4 <tcp_receive+0x278>)
 801dd10:	881b      	ldrh	r3, [r3, #0]
 801dd12:	2b00      	cmp	r3, #0
 801dd14:	d14b      	bne.n	801ddae <tcp_receive+0x182>
        /* Clause 3 */
        if (pcb->snd_wl2 + pcb->snd_wnd == right_wnd_edge) {
 801dd16:	687b      	ldr	r3, [r7, #4]
 801dd18:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 801dd1a:	687a      	ldr	r2, [r7, #4]
 801dd1c:	f8b2 2060 	ldrh.w	r2, [r2, #96]	@ 0x60
 801dd20:	4413      	add	r3, r2
 801dd22:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 801dd24:	429a      	cmp	r2, r3
 801dd26:	d142      	bne.n	801ddae <tcp_receive+0x182>
          /* Clause 4 */
          if (pcb->rtime >= 0) {
 801dd28:	687b      	ldr	r3, [r7, #4]
 801dd2a:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801dd2e:	2b00      	cmp	r3, #0
 801dd30:	db3d      	blt.n	801ddae <tcp_receive+0x182>
            /* Clause 5 */
            if (pcb->lastack == ackno) {
 801dd32:	687b      	ldr	r3, [r7, #4]
 801dd34:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 801dd36:	4b59      	ldr	r3, [pc, #356]	@ (801de9c <tcp_receive+0x270>)
 801dd38:	681b      	ldr	r3, [r3, #0]
 801dd3a:	429a      	cmp	r2, r3
 801dd3c:	d137      	bne.n	801ddae <tcp_receive+0x182>
              found_dupack = 1;
 801dd3e:	2301      	movs	r3, #1
 801dd40:	64bb      	str	r3, [r7, #72]	@ 0x48
              if ((u8_t)(pcb->dupacks + 1) > pcb->dupacks) {
 801dd42:	687b      	ldr	r3, [r7, #4]
 801dd44:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801dd48:	2bff      	cmp	r3, #255	@ 0xff
 801dd4a:	d007      	beq.n	801dd5c <tcp_receive+0x130>
                ++pcb->dupacks;
 801dd4c:	687b      	ldr	r3, [r7, #4]
 801dd4e:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801dd52:	3301      	adds	r3, #1
 801dd54:	b2da      	uxtb	r2, r3
 801dd56:	687b      	ldr	r3, [r7, #4]
 801dd58:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
              }
              if (pcb->dupacks > 3) {
 801dd5c:	687b      	ldr	r3, [r7, #4]
 801dd5e:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801dd62:	2b03      	cmp	r3, #3
 801dd64:	d91b      	bls.n	801dd9e <tcp_receive+0x172>
                /* Inflate the congestion window */
                TCP_WND_INC(pcb->cwnd, pcb->mss);
 801dd66:	687b      	ldr	r3, [r7, #4]
 801dd68:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801dd6c:	687b      	ldr	r3, [r7, #4]
 801dd6e:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801dd70:	4413      	add	r3, r2
 801dd72:	b29a      	uxth	r2, r3
 801dd74:	687b      	ldr	r3, [r7, #4]
 801dd76:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801dd7a:	429a      	cmp	r2, r3
 801dd7c:	d30a      	bcc.n	801dd94 <tcp_receive+0x168>
 801dd7e:	687b      	ldr	r3, [r7, #4]
 801dd80:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801dd84:	687b      	ldr	r3, [r7, #4]
 801dd86:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801dd88:	4413      	add	r3, r2
 801dd8a:	b29a      	uxth	r2, r3
 801dd8c:	687b      	ldr	r3, [r7, #4]
 801dd8e:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801dd92:	e004      	b.n	801dd9e <tcp_receive+0x172>
 801dd94:	687b      	ldr	r3, [r7, #4]
 801dd96:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801dd9a:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
              }
              if (pcb->dupacks >= 3) {
 801dd9e:	687b      	ldr	r3, [r7, #4]
 801dda0:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801dda4:	2b02      	cmp	r3, #2
 801dda6:	d902      	bls.n	801ddae <tcp_receive+0x182>
                /* Do fast retransmit (checked via TF_INFR, not via dupacks count) */
                tcp_rexmit_fast(pcb);
 801dda8:	6878      	ldr	r0, [r7, #4]
 801ddaa:	f002 fbb3 	bl	8020514 <tcp_rexmit_fast>
          }
        }
      }
      /* If Clause (1) or more is true, but not a duplicate ack, reset
       * count of consecutive duplicate acks */
      if (!found_dupack) {
 801ddae:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 801ddb0:	2b00      	cmp	r3, #0
 801ddb2:	f040 8161 	bne.w	801e078 <tcp_receive+0x44c>
        pcb->dupacks = 0;
 801ddb6:	687b      	ldr	r3, [r7, #4]
 801ddb8:	2200      	movs	r2, #0
 801ddba:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
 801ddbe:	e15b      	b.n	801e078 <tcp_receive+0x44c>
      }
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801ddc0:	4b36      	ldr	r3, [pc, #216]	@ (801de9c <tcp_receive+0x270>)
 801ddc2:	681a      	ldr	r2, [r3, #0]
 801ddc4:	687b      	ldr	r3, [r7, #4]
 801ddc6:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801ddc8:	1ad3      	subs	r3, r2, r3
 801ddca:	3b01      	subs	r3, #1
 801ddcc:	2b00      	cmp	r3, #0
 801ddce:	f2c0 814e 	blt.w	801e06e <tcp_receive+0x442>
 801ddd2:	4b32      	ldr	r3, [pc, #200]	@ (801de9c <tcp_receive+0x270>)
 801ddd4:	681a      	ldr	r2, [r3, #0]
 801ddd6:	687b      	ldr	r3, [r7, #4]
 801ddd8:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801ddda:	1ad3      	subs	r3, r2, r3
 801dddc:	2b00      	cmp	r3, #0
 801ddde:	f300 8146 	bgt.w	801e06e <tcp_receive+0x442>
      tcpwnd_size_t acked;

      /* Reset the "IN Fast Retransmit" flag, since we are no longer
         in fast retransmit. Also reset the congestion window to the
         slow start threshold. */
      if (pcb->flags & TF_INFR) {
 801dde2:	687b      	ldr	r3, [r7, #4]
 801dde4:	8b5b      	ldrh	r3, [r3, #26]
 801dde6:	f003 0304 	and.w	r3, r3, #4
 801ddea:	2b00      	cmp	r3, #0
 801ddec:	d010      	beq.n	801de10 <tcp_receive+0x1e4>
        tcp_clear_flags(pcb, TF_INFR);
 801ddee:	687b      	ldr	r3, [r7, #4]
 801ddf0:	8b5b      	ldrh	r3, [r3, #26]
 801ddf2:	f023 0304 	bic.w	r3, r3, #4
 801ddf6:	b29a      	uxth	r2, r3
 801ddf8:	687b      	ldr	r3, [r7, #4]
 801ddfa:	835a      	strh	r2, [r3, #26]
        pcb->cwnd = pcb->ssthresh;
 801ddfc:	687b      	ldr	r3, [r7, #4]
 801ddfe:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 801de02:	687b      	ldr	r3, [r7, #4]
 801de04:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
        pcb->bytes_acked = 0;
 801de08:	687b      	ldr	r3, [r7, #4]
 801de0a:	2200      	movs	r2, #0
 801de0c:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
      }

      /* Reset the number of retransmissions. */
      pcb->nrtx = 0;
 801de10:	687b      	ldr	r3, [r7, #4]
 801de12:	2200      	movs	r2, #0
 801de14:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42

      /* Reset the retransmission time-out. */
      pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv);
 801de18:	687b      	ldr	r3, [r7, #4]
 801de1a:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801de1e:	10db      	asrs	r3, r3, #3
 801de20:	b21b      	sxth	r3, r3
 801de22:	b29a      	uxth	r2, r3
 801de24:	687b      	ldr	r3, [r7, #4]
 801de26:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801de2a:	b29b      	uxth	r3, r3
 801de2c:	4413      	add	r3, r2
 801de2e:	b29b      	uxth	r3, r3
 801de30:	b21a      	sxth	r2, r3
 801de32:	687b      	ldr	r3, [r7, #4]
 801de34:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40

      /* Record how much data this ACK acks */
      acked = (tcpwnd_size_t)(ackno - pcb->lastack);
 801de38:	4b18      	ldr	r3, [pc, #96]	@ (801de9c <tcp_receive+0x270>)
 801de3a:	681b      	ldr	r3, [r3, #0]
 801de3c:	b29a      	uxth	r2, r3
 801de3e:	687b      	ldr	r3, [r7, #4]
 801de40:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801de42:	b29b      	uxth	r3, r3
 801de44:	1ad3      	subs	r3, r2, r3
 801de46:	85fb      	strh	r3, [r7, #46]	@ 0x2e

      /* Reset the fast retransmit variables. */
      pcb->dupacks = 0;
 801de48:	687b      	ldr	r3, [r7, #4]
 801de4a:	2200      	movs	r2, #0
 801de4c:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
      pcb->lastack = ackno;
 801de50:	4b12      	ldr	r3, [pc, #72]	@ (801de9c <tcp_receive+0x270>)
 801de52:	681a      	ldr	r2, [r3, #0]
 801de54:	687b      	ldr	r3, [r7, #4]
 801de56:	645a      	str	r2, [r3, #68]	@ 0x44

      /* Update the congestion control variables (cwnd and
         ssthresh). */
      if (pcb->state >= ESTABLISHED) {
 801de58:	687b      	ldr	r3, [r7, #4]
 801de5a:	7d1b      	ldrb	r3, [r3, #20]
 801de5c:	2b03      	cmp	r3, #3
 801de5e:	f240 8097 	bls.w	801df90 <tcp_receive+0x364>
        if (pcb->cwnd < pcb->ssthresh) {
 801de62:	687b      	ldr	r3, [r7, #4]
 801de64:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801de68:	687b      	ldr	r3, [r7, #4]
 801de6a:	f8b3 304a 	ldrh.w	r3, [r3, #74]	@ 0x4a
 801de6e:	429a      	cmp	r2, r3
 801de70:	d245      	bcs.n	801defe <tcp_receive+0x2d2>
          tcpwnd_size_t increase;
          /* limit to 1 SMSS segment during period following RTO */
          u8_t num_seg = (pcb->flags & TF_RTO) ? 1 : 2;
 801de72:	687b      	ldr	r3, [r7, #4]
 801de74:	8b5b      	ldrh	r3, [r3, #26]
 801de76:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 801de7a:	2b00      	cmp	r3, #0
 801de7c:	d014      	beq.n	801dea8 <tcp_receive+0x27c>
 801de7e:	2301      	movs	r3, #1
 801de80:	e013      	b.n	801deaa <tcp_receive+0x27e>
 801de82:	bf00      	nop
 801de84:	0802ed58 	.word	0x0802ed58
 801de88:	0802f088 	.word	0x0802f088
 801de8c:	0802eda4 	.word	0x0802eda4
 801de90:	0802f0a4 	.word	0x0802f0a4
 801de94:	2402aed0 	.word	0x2402aed0
 801de98:	2402aec4 	.word	0x2402aec4
 801de9c:	2402aec8 	.word	0x2402aec8
 801dea0:	2402aeb4 	.word	0x2402aeb4
 801dea4:	2402aece 	.word	0x2402aece
 801dea8:	2302      	movs	r3, #2
 801deaa:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
          /* RFC 3465, section 2.2 Slow Start */
          increase = LWIP_MIN(acked, (tcpwnd_size_t)(num_seg * pcb->mss));
 801deae:	f897 302d 	ldrb.w	r3, [r7, #45]	@ 0x2d
 801deb2:	b29a      	uxth	r2, r3
 801deb4:	687b      	ldr	r3, [r7, #4]
 801deb6:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801deb8:	fb12 f303 	smulbb	r3, r2, r3
 801debc:	b29b      	uxth	r3, r3
 801debe:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 801dec0:	4293      	cmp	r3, r2
 801dec2:	bf28      	it	cs
 801dec4:	4613      	movcs	r3, r2
 801dec6:	857b      	strh	r3, [r7, #42]	@ 0x2a
          TCP_WND_INC(pcb->cwnd, increase);
 801dec8:	687b      	ldr	r3, [r7, #4]
 801deca:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801dece:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 801ded0:	4413      	add	r3, r2
 801ded2:	b29a      	uxth	r2, r3
 801ded4:	687b      	ldr	r3, [r7, #4]
 801ded6:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801deda:	429a      	cmp	r2, r3
 801dedc:	d309      	bcc.n	801def2 <tcp_receive+0x2c6>
 801dede:	687b      	ldr	r3, [r7, #4]
 801dee0:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801dee4:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 801dee6:	4413      	add	r3, r2
 801dee8:	b29a      	uxth	r2, r3
 801deea:	687b      	ldr	r3, [r7, #4]
 801deec:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801def0:	e04e      	b.n	801df90 <tcp_receive+0x364>
 801def2:	687b      	ldr	r3, [r7, #4]
 801def4:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801def8:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801defc:	e048      	b.n	801df90 <tcp_receive+0x364>
          LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: slow start cwnd %"TCPWNDSIZE_F"\n", pcb->cwnd));
        } else {
          /* RFC 3465, section 2.1 Congestion Avoidance */
          TCP_WND_INC(pcb->bytes_acked, acked);
 801defe:	687b      	ldr	r3, [r7, #4]
 801df00:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801df04:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 801df06:	4413      	add	r3, r2
 801df08:	b29a      	uxth	r2, r3
 801df0a:	687b      	ldr	r3, [r7, #4]
 801df0c:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 801df10:	429a      	cmp	r2, r3
 801df12:	d309      	bcc.n	801df28 <tcp_receive+0x2fc>
 801df14:	687b      	ldr	r3, [r7, #4]
 801df16:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801df1a:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 801df1c:	4413      	add	r3, r2
 801df1e:	b29a      	uxth	r2, r3
 801df20:	687b      	ldr	r3, [r7, #4]
 801df22:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
 801df26:	e004      	b.n	801df32 <tcp_receive+0x306>
 801df28:	687b      	ldr	r3, [r7, #4]
 801df2a:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801df2e:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
          if (pcb->bytes_acked >= pcb->cwnd) {
 801df32:	687b      	ldr	r3, [r7, #4]
 801df34:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801df38:	687b      	ldr	r3, [r7, #4]
 801df3a:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801df3e:	429a      	cmp	r2, r3
 801df40:	d326      	bcc.n	801df90 <tcp_receive+0x364>
            pcb->bytes_acked = (tcpwnd_size_t)(pcb->bytes_acked - pcb->cwnd);
 801df42:	687b      	ldr	r3, [r7, #4]
 801df44:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801df48:	687b      	ldr	r3, [r7, #4]
 801df4a:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801df4e:	1ad3      	subs	r3, r2, r3
 801df50:	b29a      	uxth	r2, r3
 801df52:	687b      	ldr	r3, [r7, #4]
 801df54:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
            TCP_WND_INC(pcb->cwnd, pcb->mss);
 801df58:	687b      	ldr	r3, [r7, #4]
 801df5a:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801df5e:	687b      	ldr	r3, [r7, #4]
 801df60:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801df62:	4413      	add	r3, r2
 801df64:	b29a      	uxth	r2, r3
 801df66:	687b      	ldr	r3, [r7, #4]
 801df68:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801df6c:	429a      	cmp	r2, r3
 801df6e:	d30a      	bcc.n	801df86 <tcp_receive+0x35a>
 801df70:	687b      	ldr	r3, [r7, #4]
 801df72:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801df76:	687b      	ldr	r3, [r7, #4]
 801df78:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801df7a:	4413      	add	r3, r2
 801df7c:	b29a      	uxth	r2, r3
 801df7e:	687b      	ldr	r3, [r7, #4]
 801df80:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801df84:	e004      	b.n	801df90 <tcp_receive+0x364>
 801df86:	687b      	ldr	r3, [r7, #4]
 801df88:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801df8c:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
                                    pcb->unacked != NULL ?
                                    lwip_ntohl(pcb->unacked->tcphdr->seqno) + TCP_TCPLEN(pcb->unacked) : 0));

      /* Remove segment from the unacknowledged list if the incoming
         ACK acknowledges them. */
      pcb->unacked = tcp_free_acked_segments(pcb, pcb->unacked, "unacked", pcb->unsent);
 801df90:	687b      	ldr	r3, [r7, #4]
 801df92:	6f19      	ldr	r1, [r3, #112]	@ 0x70
 801df94:	687b      	ldr	r3, [r7, #4]
 801df96:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801df98:	4a98      	ldr	r2, [pc, #608]	@ (801e1fc <tcp_receive+0x5d0>)
 801df9a:	6878      	ldr	r0, [r7, #4]
 801df9c:	f7ff fdca 	bl	801db34 <tcp_free_acked_segments>
 801dfa0:	4602      	mov	r2, r0
 801dfa2:	687b      	ldr	r3, [r7, #4]
 801dfa4:	671a      	str	r2, [r3, #112]	@ 0x70
         on the list are acknowledged by the ACK. This may seem
         strange since an "unsent" segment shouldn't be acked. The
         rationale is that lwIP puts all outstanding segments on the
         ->unsent list after a retransmission, so these segments may
         in fact have been sent once. */
      pcb->unsent = tcp_free_acked_segments(pcb, pcb->unsent, "unsent", pcb->unacked);
 801dfa6:	687b      	ldr	r3, [r7, #4]
 801dfa8:	6ed9      	ldr	r1, [r3, #108]	@ 0x6c
 801dfaa:	687b      	ldr	r3, [r7, #4]
 801dfac:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801dfae:	4a94      	ldr	r2, [pc, #592]	@ (801e200 <tcp_receive+0x5d4>)
 801dfb0:	6878      	ldr	r0, [r7, #4]
 801dfb2:	f7ff fdbf 	bl	801db34 <tcp_free_acked_segments>
 801dfb6:	4602      	mov	r2, r0
 801dfb8:	687b      	ldr	r3, [r7, #4]
 801dfba:	66da      	str	r2, [r3, #108]	@ 0x6c

      /* If there's nothing left to acknowledge, stop the retransmit
         timer, otherwise reset it to start again */
      if (pcb->unacked == NULL) {
 801dfbc:	687b      	ldr	r3, [r7, #4]
 801dfbe:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801dfc0:	2b00      	cmp	r3, #0
 801dfc2:	d104      	bne.n	801dfce <tcp_receive+0x3a2>
        pcb->rtime = -1;
 801dfc4:	687b      	ldr	r3, [r7, #4]
 801dfc6:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801dfca:	861a      	strh	r2, [r3, #48]	@ 0x30
 801dfcc:	e002      	b.n	801dfd4 <tcp_receive+0x3a8>
      } else {
        pcb->rtime = 0;
 801dfce:	687b      	ldr	r3, [r7, #4]
 801dfd0:	2200      	movs	r2, #0
 801dfd2:	861a      	strh	r2, [r3, #48]	@ 0x30
      }

      pcb->polltmr = 0;
 801dfd4:	687b      	ldr	r3, [r7, #4]
 801dfd6:	2200      	movs	r2, #0
 801dfd8:	771a      	strb	r2, [r3, #28]

#if TCP_OVERSIZE
      if (pcb->unsent == NULL) {
 801dfda:	687b      	ldr	r3, [r7, #4]
 801dfdc:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801dfde:	2b00      	cmp	r3, #0
 801dfe0:	d103      	bne.n	801dfea <tcp_receive+0x3be>
        pcb->unsent_oversize = 0;
 801dfe2:	687b      	ldr	r3, [r7, #4]
 801dfe4:	2200      	movs	r2, #0
 801dfe6:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
        /* Inform neighbor reachability of forward progress. */
        nd6_reachability_hint(ip6_current_src_addr());
      }
#endif /* LWIP_IPV6 && LWIP_ND6_TCP_REACHABILITY_HINTS*/

      pcb->snd_buf = (tcpwnd_size_t)(pcb->snd_buf + recv_acked);
 801dfea:	687b      	ldr	r3, [r7, #4]
 801dfec:	f8b3 2064 	ldrh.w	r2, [r3, #100]	@ 0x64
 801dff0:	4b84      	ldr	r3, [pc, #528]	@ (801e204 <tcp_receive+0x5d8>)
 801dff2:	881b      	ldrh	r3, [r3, #0]
 801dff4:	4413      	add	r3, r2
 801dff6:	b29a      	uxth	r2, r3
 801dff8:	687b      	ldr	r3, [r7, #4]
 801dffa:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
      /* check if this ACK ends our retransmission of in-flight data */
      if (pcb->flags & TF_RTO) {
 801dffe:	687b      	ldr	r3, [r7, #4]
 801e000:	8b5b      	ldrh	r3, [r3, #26]
 801e002:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 801e006:	2b00      	cmp	r3, #0
 801e008:	d035      	beq.n	801e076 <tcp_receive+0x44a>
        /* RTO is done if
            1) both queues are empty or
            2) unacked is empty and unsent head contains data not part of RTO or
            3) unacked head contains data not part of RTO */
        if (pcb->unacked == NULL) {
 801e00a:	687b      	ldr	r3, [r7, #4]
 801e00c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801e00e:	2b00      	cmp	r3, #0
 801e010:	d118      	bne.n	801e044 <tcp_receive+0x418>
          if ((pcb->unsent == NULL) ||
 801e012:	687b      	ldr	r3, [r7, #4]
 801e014:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801e016:	2b00      	cmp	r3, #0
 801e018:	d00c      	beq.n	801e034 <tcp_receive+0x408>
              (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unsent->tcphdr->seqno)))) {
 801e01a:	687b      	ldr	r3, [r7, #4]
 801e01c:	6cdc      	ldr	r4, [r3, #76]	@ 0x4c
 801e01e:	687b      	ldr	r3, [r7, #4]
 801e020:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801e022:	691b      	ldr	r3, [r3, #16]
 801e024:	685b      	ldr	r3, [r3, #4]
 801e026:	4618      	mov	r0, r3
 801e028:	f7fa fd93 	bl	8018b52 <lwip_htonl>
 801e02c:	4603      	mov	r3, r0
 801e02e:	1ae3      	subs	r3, r4, r3
          if ((pcb->unsent == NULL) ||
 801e030:	2b00      	cmp	r3, #0
 801e032:	dc20      	bgt.n	801e076 <tcp_receive+0x44a>
            tcp_clear_flags(pcb, TF_RTO);
 801e034:	687b      	ldr	r3, [r7, #4]
 801e036:	8b5b      	ldrh	r3, [r3, #26]
 801e038:	f423 6300 	bic.w	r3, r3, #2048	@ 0x800
 801e03c:	b29a      	uxth	r2, r3
 801e03e:	687b      	ldr	r3, [r7, #4]
 801e040:	835a      	strh	r2, [r3, #26]
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801e042:	e018      	b.n	801e076 <tcp_receive+0x44a>
          }
        } else if (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unacked->tcphdr->seqno))) {
 801e044:	687b      	ldr	r3, [r7, #4]
 801e046:	6cdc      	ldr	r4, [r3, #76]	@ 0x4c
 801e048:	687b      	ldr	r3, [r7, #4]
 801e04a:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801e04c:	691b      	ldr	r3, [r3, #16]
 801e04e:	685b      	ldr	r3, [r3, #4]
 801e050:	4618      	mov	r0, r3
 801e052:	f7fa fd7e 	bl	8018b52 <lwip_htonl>
 801e056:	4603      	mov	r3, r0
 801e058:	1ae3      	subs	r3, r4, r3
 801e05a:	2b00      	cmp	r3, #0
 801e05c:	dc0b      	bgt.n	801e076 <tcp_receive+0x44a>
          tcp_clear_flags(pcb, TF_RTO);
 801e05e:	687b      	ldr	r3, [r7, #4]
 801e060:	8b5b      	ldrh	r3, [r3, #26]
 801e062:	f423 6300 	bic.w	r3, r3, #2048	@ 0x800
 801e066:	b29a      	uxth	r2, r3
 801e068:	687b      	ldr	r3, [r7, #4]
 801e06a:	835a      	strh	r2, [r3, #26]
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801e06c:	e003      	b.n	801e076 <tcp_receive+0x44a>
        }
      }
      /* End of ACK for new data processing. */
    } else {
      /* Out of sequence ACK, didn't really ack anything */
      tcp_send_empty_ack(pcb);
 801e06e:	6878      	ldr	r0, [r7, #4]
 801e070:	f002 fc3c 	bl	80208ec <tcp_send_empty_ack>
 801e074:	e000      	b.n	801e078 <tcp_receive+0x44c>
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801e076:	bf00      	nop
                                pcb->rttest, pcb->rtseq, ackno));

    /* RTT estimation calculations. This is done by checking if the
       incoming segment acknowledges the segment we use to take a
       round-trip time measurement. */
    if (pcb->rttest && TCP_SEQ_LT(pcb->rtseq, ackno)) {
 801e078:	687b      	ldr	r3, [r7, #4]
 801e07a:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 801e07c:	2b00      	cmp	r3, #0
 801e07e:	d05b      	beq.n	801e138 <tcp_receive+0x50c>
 801e080:	687b      	ldr	r3, [r7, #4]
 801e082:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 801e084:	4b60      	ldr	r3, [pc, #384]	@ (801e208 <tcp_receive+0x5dc>)
 801e086:	681b      	ldr	r3, [r3, #0]
 801e088:	1ad3      	subs	r3, r2, r3
 801e08a:	2b00      	cmp	r3, #0
 801e08c:	da54      	bge.n	801e138 <tcp_receive+0x50c>
      /* diff between this shouldn't exceed 32K since this are tcp timer ticks
         and a round-trip shouldn't be that long... */
      m = (s16_t)(tcp_ticks - pcb->rttest);
 801e08e:	4b5f      	ldr	r3, [pc, #380]	@ (801e20c <tcp_receive+0x5e0>)
 801e090:	681b      	ldr	r3, [r3, #0]
 801e092:	b29a      	uxth	r2, r3
 801e094:	687b      	ldr	r3, [r7, #4]
 801e096:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 801e098:	b29b      	uxth	r3, r3
 801e09a:	1ad3      	subs	r3, r2, r3
 801e09c:	b29b      	uxth	r3, r3
 801e09e:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e

      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: experienced rtt %"U16_F" ticks (%"U16_F" msec).\n",
                                  m, (u16_t)(m * TCP_SLOW_INTERVAL)));

      /* This is taken directly from VJs original code in his paper */
      m = (s16_t)(m - (pcb->sa >> 3));
 801e0a2:	f8b7 204e 	ldrh.w	r2, [r7, #78]	@ 0x4e
 801e0a6:	687b      	ldr	r3, [r7, #4]
 801e0a8:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801e0ac:	10db      	asrs	r3, r3, #3
 801e0ae:	b21b      	sxth	r3, r3
 801e0b0:	b29b      	uxth	r3, r3
 801e0b2:	1ad3      	subs	r3, r2, r3
 801e0b4:	b29b      	uxth	r3, r3
 801e0b6:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      pcb->sa = (s16_t)(pcb->sa + m);
 801e0ba:	687b      	ldr	r3, [r7, #4]
 801e0bc:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801e0c0:	b29a      	uxth	r2, r3
 801e0c2:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801e0c6:	4413      	add	r3, r2
 801e0c8:	b29b      	uxth	r3, r3
 801e0ca:	b21a      	sxth	r2, r3
 801e0cc:	687b      	ldr	r3, [r7, #4]
 801e0ce:	879a      	strh	r2, [r3, #60]	@ 0x3c
      if (m < 0) {
 801e0d0:	f9b7 304e 	ldrsh.w	r3, [r7, #78]	@ 0x4e
 801e0d4:	2b00      	cmp	r3, #0
 801e0d6:	da05      	bge.n	801e0e4 <tcp_receive+0x4b8>
        m = (s16_t) - m;
 801e0d8:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801e0dc:	425b      	negs	r3, r3
 801e0de:	b29b      	uxth	r3, r3
 801e0e0:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      }
      m = (s16_t)(m - (pcb->sv >> 2));
 801e0e4:	f8b7 204e 	ldrh.w	r2, [r7, #78]	@ 0x4e
 801e0e8:	687b      	ldr	r3, [r7, #4]
 801e0ea:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801e0ee:	109b      	asrs	r3, r3, #2
 801e0f0:	b21b      	sxth	r3, r3
 801e0f2:	b29b      	uxth	r3, r3
 801e0f4:	1ad3      	subs	r3, r2, r3
 801e0f6:	b29b      	uxth	r3, r3
 801e0f8:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      pcb->sv = (s16_t)(pcb->sv + m);
 801e0fc:	687b      	ldr	r3, [r7, #4]
 801e0fe:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801e102:	b29a      	uxth	r2, r3
 801e104:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801e108:	4413      	add	r3, r2
 801e10a:	b29b      	uxth	r3, r3
 801e10c:	b21a      	sxth	r2, r3
 801e10e:	687b      	ldr	r3, [r7, #4]
 801e110:	87da      	strh	r2, [r3, #62]	@ 0x3e
      pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv);
 801e112:	687b      	ldr	r3, [r7, #4]
 801e114:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801e118:	10db      	asrs	r3, r3, #3
 801e11a:	b21b      	sxth	r3, r3
 801e11c:	b29a      	uxth	r2, r3
 801e11e:	687b      	ldr	r3, [r7, #4]
 801e120:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801e124:	b29b      	uxth	r3, r3
 801e126:	4413      	add	r3, r2
 801e128:	b29b      	uxth	r3, r3
 801e12a:	b21a      	sxth	r2, r3
 801e12c:	687b      	ldr	r3, [r7, #4]
 801e12e:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40

      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: RTO %"U16_F" (%"U16_F" milliseconds)\n",
                                  pcb->rto, (u16_t)(pcb->rto * TCP_SLOW_INTERVAL)));

      pcb->rttest = 0;
 801e132:	687b      	ldr	r3, [r7, #4]
 801e134:	2200      	movs	r2, #0
 801e136:	635a      	str	r2, [r3, #52]	@ 0x34

  /* If the incoming segment contains data, we must process it
     further unless the pcb already received a FIN.
     (RFC 793, chapter 3.9, "SEGMENT ARRIVES" in states CLOSE-WAIT, CLOSING,
     LAST-ACK and TIME-WAIT: "Ignore the segment text.") */
  if ((tcplen > 0) && (pcb->state < CLOSE_WAIT)) {
 801e138:	4b35      	ldr	r3, [pc, #212]	@ (801e210 <tcp_receive+0x5e4>)
 801e13a:	881b      	ldrh	r3, [r3, #0]
 801e13c:	2b00      	cmp	r3, #0
 801e13e:	f000 84df 	beq.w	801eb00 <tcp_receive+0xed4>
 801e142:	687b      	ldr	r3, [r7, #4]
 801e144:	7d1b      	ldrb	r3, [r3, #20]
 801e146:	2b06      	cmp	r3, #6
 801e148:	f200 84da 	bhi.w	801eb00 <tcp_receive+0xed4>
       this if the sequence number of the incoming segment is less
       than rcv_nxt, and the sequence number plus the length of the
       segment is larger than rcv_nxt. */
    /*    if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) {
          if (TCP_SEQ_LT(pcb->rcv_nxt, seqno + tcplen)) {*/
    if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) {
 801e14c:	687b      	ldr	r3, [r7, #4]
 801e14e:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801e150:	4b30      	ldr	r3, [pc, #192]	@ (801e214 <tcp_receive+0x5e8>)
 801e152:	681b      	ldr	r3, [r3, #0]
 801e154:	1ad3      	subs	r3, r2, r3
 801e156:	3b01      	subs	r3, #1
 801e158:	2b00      	cmp	r3, #0
 801e15a:	f2c0 808f 	blt.w	801e27c <tcp_receive+0x650>
 801e15e:	687b      	ldr	r3, [r7, #4]
 801e160:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801e162:	4b2b      	ldr	r3, [pc, #172]	@ (801e210 <tcp_receive+0x5e4>)
 801e164:	881b      	ldrh	r3, [r3, #0]
 801e166:	4619      	mov	r1, r3
 801e168:	4b2a      	ldr	r3, [pc, #168]	@ (801e214 <tcp_receive+0x5e8>)
 801e16a:	681b      	ldr	r3, [r3, #0]
 801e16c:	440b      	add	r3, r1
 801e16e:	1ad3      	subs	r3, r2, r3
 801e170:	3301      	adds	r3, #1
 801e172:	2b00      	cmp	r3, #0
 801e174:	f300 8082 	bgt.w	801e27c <tcp_receive+0x650>

         After we are done with adjusting the pbuf pointers we must
         adjust the ->data pointer in the seg and the segment
         length.*/

      struct pbuf *p = inseg.p;
 801e178:	4b27      	ldr	r3, [pc, #156]	@ (801e218 <tcp_receive+0x5ec>)
 801e17a:	685b      	ldr	r3, [r3, #4]
 801e17c:	647b      	str	r3, [r7, #68]	@ 0x44
      u32_t off32 = pcb->rcv_nxt - seqno;
 801e17e:	687b      	ldr	r3, [r7, #4]
 801e180:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801e182:	4b24      	ldr	r3, [pc, #144]	@ (801e214 <tcp_receive+0x5e8>)
 801e184:	681b      	ldr	r3, [r3, #0]
 801e186:	1ad3      	subs	r3, r2, r3
 801e188:	627b      	str	r3, [r7, #36]	@ 0x24
      u16_t new_tot_len, off;
      LWIP_ASSERT("inseg.p != NULL", inseg.p);
 801e18a:	4b23      	ldr	r3, [pc, #140]	@ (801e218 <tcp_receive+0x5ec>)
 801e18c:	685b      	ldr	r3, [r3, #4]
 801e18e:	2b00      	cmp	r3, #0
 801e190:	d106      	bne.n	801e1a0 <tcp_receive+0x574>
 801e192:	4b22      	ldr	r3, [pc, #136]	@ (801e21c <tcp_receive+0x5f0>)
 801e194:	f240 5294 	movw	r2, #1428	@ 0x594
 801e198:	4921      	ldr	r1, [pc, #132]	@ (801e220 <tcp_receive+0x5f4>)
 801e19a:	4822      	ldr	r0, [pc, #136]	@ (801e224 <tcp_receive+0x5f8>)
 801e19c:	f00b fc1e 	bl	80299dc <iprintf>
      LWIP_ASSERT("insane offset!", (off32 < 0xffff));
 801e1a0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801e1a2:	f64f 72fe 	movw	r2, #65534	@ 0xfffe
 801e1a6:	4293      	cmp	r3, r2
 801e1a8:	d906      	bls.n	801e1b8 <tcp_receive+0x58c>
 801e1aa:	4b1c      	ldr	r3, [pc, #112]	@ (801e21c <tcp_receive+0x5f0>)
 801e1ac:	f240 5295 	movw	r2, #1429	@ 0x595
 801e1b0:	491d      	ldr	r1, [pc, #116]	@ (801e228 <tcp_receive+0x5fc>)
 801e1b2:	481c      	ldr	r0, [pc, #112]	@ (801e224 <tcp_receive+0x5f8>)
 801e1b4:	f00b fc12 	bl	80299dc <iprintf>
      off = (u16_t)off32;
 801e1b8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801e1ba:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
      LWIP_ASSERT("pbuf too short!", (((s32_t)inseg.p->tot_len) >= off));
 801e1be:	4b16      	ldr	r3, [pc, #88]	@ (801e218 <tcp_receive+0x5ec>)
 801e1c0:	685b      	ldr	r3, [r3, #4]
 801e1c2:	891b      	ldrh	r3, [r3, #8]
 801e1c4:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801e1c8:	429a      	cmp	r2, r3
 801e1ca:	d906      	bls.n	801e1da <tcp_receive+0x5ae>
 801e1cc:	4b13      	ldr	r3, [pc, #76]	@ (801e21c <tcp_receive+0x5f0>)
 801e1ce:	f240 5297 	movw	r2, #1431	@ 0x597
 801e1d2:	4916      	ldr	r1, [pc, #88]	@ (801e22c <tcp_receive+0x600>)
 801e1d4:	4813      	ldr	r0, [pc, #76]	@ (801e224 <tcp_receive+0x5f8>)
 801e1d6:	f00b fc01 	bl	80299dc <iprintf>
      inseg.len -= off;
 801e1da:	4b0f      	ldr	r3, [pc, #60]	@ (801e218 <tcp_receive+0x5ec>)
 801e1dc:	891a      	ldrh	r2, [r3, #8]
 801e1de:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801e1e2:	1ad3      	subs	r3, r2, r3
 801e1e4:	b29a      	uxth	r2, r3
 801e1e6:	4b0c      	ldr	r3, [pc, #48]	@ (801e218 <tcp_receive+0x5ec>)
 801e1e8:	811a      	strh	r2, [r3, #8]
      new_tot_len = (u16_t)(inseg.p->tot_len - off);
 801e1ea:	4b0b      	ldr	r3, [pc, #44]	@ (801e218 <tcp_receive+0x5ec>)
 801e1ec:	685b      	ldr	r3, [r3, #4]
 801e1ee:	891a      	ldrh	r2, [r3, #8]
 801e1f0:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801e1f4:	1ad3      	subs	r3, r2, r3
 801e1f6:	847b      	strh	r3, [r7, #34]	@ 0x22
      while (p->len < off) {
 801e1f8:	e02a      	b.n	801e250 <tcp_receive+0x624>
 801e1fa:	bf00      	nop
 801e1fc:	0802f0c0 	.word	0x0802f0c0
 801e200:	0802f0c8 	.word	0x0802f0c8
 801e204:	2402aecc 	.word	0x2402aecc
 801e208:	2402aec8 	.word	0x2402aec8
 801e20c:	2402ae88 	.word	0x2402ae88
 801e210:	2402aece 	.word	0x2402aece
 801e214:	2402aec4 	.word	0x2402aec4
 801e218:	2402aea0 	.word	0x2402aea0
 801e21c:	0802ed58 	.word	0x0802ed58
 801e220:	0802f0d0 	.word	0x0802f0d0
 801e224:	0802eda4 	.word	0x0802eda4
 801e228:	0802f0e0 	.word	0x0802f0e0
 801e22c:	0802f0f0 	.word	0x0802f0f0
        off -= p->len;
 801e230:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801e232:	895b      	ldrh	r3, [r3, #10]
 801e234:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801e238:	1ad3      	subs	r3, r2, r3
 801e23a:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
        /* all pbufs up to and including this one have len==0, so tot_len is equal */
        p->tot_len = new_tot_len;
 801e23e:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801e240:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801e242:	811a      	strh	r2, [r3, #8]
        p->len = 0;
 801e244:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801e246:	2200      	movs	r2, #0
 801e248:	815a      	strh	r2, [r3, #10]
        p = p->next;
 801e24a:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801e24c:	681b      	ldr	r3, [r3, #0]
 801e24e:	647b      	str	r3, [r7, #68]	@ 0x44
      while (p->len < off) {
 801e250:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801e252:	895b      	ldrh	r3, [r3, #10]
 801e254:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801e258:	429a      	cmp	r2, r3
 801e25a:	d8e9      	bhi.n	801e230 <tcp_receive+0x604>
      }
      /* cannot fail... */
      pbuf_remove_header(p, off);
 801e25c:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801e260:	4619      	mov	r1, r3
 801e262:	6c78      	ldr	r0, [r7, #68]	@ 0x44
 801e264:	f7fc f88a 	bl	801a37c <pbuf_remove_header>
      inseg.tcphdr->seqno = seqno = pcb->rcv_nxt;
 801e268:	687b      	ldr	r3, [r7, #4]
 801e26a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e26c:	4a90      	ldr	r2, [pc, #576]	@ (801e4b0 <tcp_receive+0x884>)
 801e26e:	6013      	str	r3, [r2, #0]
 801e270:	4b90      	ldr	r3, [pc, #576]	@ (801e4b4 <tcp_receive+0x888>)
 801e272:	691b      	ldr	r3, [r3, #16]
 801e274:	4a8e      	ldr	r2, [pc, #568]	@ (801e4b0 <tcp_receive+0x884>)
 801e276:	6812      	ldr	r2, [r2, #0]
 801e278:	605a      	str	r2, [r3, #4]
    if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) {
 801e27a:	e00d      	b.n	801e298 <tcp_receive+0x66c>
    } else {
      if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) {
 801e27c:	4b8c      	ldr	r3, [pc, #560]	@ (801e4b0 <tcp_receive+0x884>)
 801e27e:	681a      	ldr	r2, [r3, #0]
 801e280:	687b      	ldr	r3, [r7, #4]
 801e282:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e284:	1ad3      	subs	r3, r2, r3
 801e286:	2b00      	cmp	r3, #0
 801e288:	da06      	bge.n	801e298 <tcp_receive+0x66c>
        /* the whole segment is < rcv_nxt */
        /* must be a duplicate of a packet that has already been correctly handled */

        LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno));
        tcp_ack_now(pcb);
 801e28a:	687b      	ldr	r3, [r7, #4]
 801e28c:	8b5b      	ldrh	r3, [r3, #26]
 801e28e:	f043 0302 	orr.w	r3, r3, #2
 801e292:	b29a      	uxth	r2, r3
 801e294:	687b      	ldr	r3, [r7, #4]
 801e296:	835a      	strh	r2, [r3, #26]
    }

    /* The sequence number must be within the window (above rcv_nxt
       and below rcv_nxt + rcv_wnd) in order to be further
       processed. */
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801e298:	4b85      	ldr	r3, [pc, #532]	@ (801e4b0 <tcp_receive+0x884>)
 801e29a:	681a      	ldr	r2, [r3, #0]
 801e29c:	687b      	ldr	r3, [r7, #4]
 801e29e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e2a0:	1ad3      	subs	r3, r2, r3
 801e2a2:	2b00      	cmp	r3, #0
 801e2a4:	f2c0 8427 	blt.w	801eaf6 <tcp_receive+0xeca>
 801e2a8:	4b81      	ldr	r3, [pc, #516]	@ (801e4b0 <tcp_receive+0x884>)
 801e2aa:	681a      	ldr	r2, [r3, #0]
 801e2ac:	687b      	ldr	r3, [r7, #4]
 801e2ae:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e2b0:	6879      	ldr	r1, [r7, #4]
 801e2b2:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801e2b4:	440b      	add	r3, r1
 801e2b6:	1ad3      	subs	r3, r2, r3
 801e2b8:	3301      	adds	r3, #1
 801e2ba:	2b00      	cmp	r3, #0
 801e2bc:	f300 841b 	bgt.w	801eaf6 <tcp_receive+0xeca>
                        pcb->rcv_nxt + pcb->rcv_wnd - 1)) {
      if (pcb->rcv_nxt == seqno) {
 801e2c0:	687b      	ldr	r3, [r7, #4]
 801e2c2:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801e2c4:	4b7a      	ldr	r3, [pc, #488]	@ (801e4b0 <tcp_receive+0x884>)
 801e2c6:	681b      	ldr	r3, [r3, #0]
 801e2c8:	429a      	cmp	r2, r3
 801e2ca:	f040 8298 	bne.w	801e7fe <tcp_receive+0xbd2>
        /* The incoming segment is the next in sequence. We check if
           we have to trim the end of the segment and update rcv_nxt
           and pass the data to the application. */
        tcplen = TCP_TCPLEN(&inseg);
 801e2ce:	4b79      	ldr	r3, [pc, #484]	@ (801e4b4 <tcp_receive+0x888>)
 801e2d0:	891c      	ldrh	r4, [r3, #8]
 801e2d2:	4b78      	ldr	r3, [pc, #480]	@ (801e4b4 <tcp_receive+0x888>)
 801e2d4:	691b      	ldr	r3, [r3, #16]
 801e2d6:	899b      	ldrh	r3, [r3, #12]
 801e2d8:	b29b      	uxth	r3, r3
 801e2da:	4618      	mov	r0, r3
 801e2dc:	f7fa fc24 	bl	8018b28 <lwip_htons>
 801e2e0:	4603      	mov	r3, r0
 801e2e2:	b2db      	uxtb	r3, r3
 801e2e4:	f003 0303 	and.w	r3, r3, #3
 801e2e8:	2b00      	cmp	r3, #0
 801e2ea:	d001      	beq.n	801e2f0 <tcp_receive+0x6c4>
 801e2ec:	2301      	movs	r3, #1
 801e2ee:	e000      	b.n	801e2f2 <tcp_receive+0x6c6>
 801e2f0:	2300      	movs	r3, #0
 801e2f2:	4423      	add	r3, r4
 801e2f4:	b29a      	uxth	r2, r3
 801e2f6:	4b70      	ldr	r3, [pc, #448]	@ (801e4b8 <tcp_receive+0x88c>)
 801e2f8:	801a      	strh	r2, [r3, #0]

        if (tcplen > pcb->rcv_wnd) {
 801e2fa:	687b      	ldr	r3, [r7, #4]
 801e2fc:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801e2fe:	4b6e      	ldr	r3, [pc, #440]	@ (801e4b8 <tcp_receive+0x88c>)
 801e300:	881b      	ldrh	r3, [r3, #0]
 801e302:	429a      	cmp	r2, r3
 801e304:	d274      	bcs.n	801e3f0 <tcp_receive+0x7c4>
          LWIP_DEBUGF(TCP_INPUT_DEBUG,
                      ("tcp_receive: other end overran receive window"
                       "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n",
                       seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd));
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801e306:	4b6b      	ldr	r3, [pc, #428]	@ (801e4b4 <tcp_receive+0x888>)
 801e308:	691b      	ldr	r3, [r3, #16]
 801e30a:	899b      	ldrh	r3, [r3, #12]
 801e30c:	b29b      	uxth	r3, r3
 801e30e:	4618      	mov	r0, r3
 801e310:	f7fa fc0a 	bl	8018b28 <lwip_htons>
 801e314:	4603      	mov	r3, r0
 801e316:	b2db      	uxtb	r3, r3
 801e318:	f003 0301 	and.w	r3, r3, #1
 801e31c:	2b00      	cmp	r3, #0
 801e31e:	d01e      	beq.n	801e35e <tcp_receive+0x732>
            /* Must remove the FIN from the header as we're trimming
             * that byte of sequence-space from the packet */
            TCPH_FLAGS_SET(inseg.tcphdr, TCPH_FLAGS(inseg.tcphdr) & ~(unsigned int)TCP_FIN);
 801e320:	4b64      	ldr	r3, [pc, #400]	@ (801e4b4 <tcp_receive+0x888>)
 801e322:	691b      	ldr	r3, [r3, #16]
 801e324:	899b      	ldrh	r3, [r3, #12]
 801e326:	b29b      	uxth	r3, r3
 801e328:	b21b      	sxth	r3, r3
 801e32a:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 801e32e:	b21c      	sxth	r4, r3
 801e330:	4b60      	ldr	r3, [pc, #384]	@ (801e4b4 <tcp_receive+0x888>)
 801e332:	691b      	ldr	r3, [r3, #16]
 801e334:	899b      	ldrh	r3, [r3, #12]
 801e336:	b29b      	uxth	r3, r3
 801e338:	4618      	mov	r0, r3
 801e33a:	f7fa fbf5 	bl	8018b28 <lwip_htons>
 801e33e:	4603      	mov	r3, r0
 801e340:	b2db      	uxtb	r3, r3
 801e342:	f003 033e 	and.w	r3, r3, #62	@ 0x3e
 801e346:	b29b      	uxth	r3, r3
 801e348:	4618      	mov	r0, r3
 801e34a:	f7fa fbed 	bl	8018b28 <lwip_htons>
 801e34e:	4603      	mov	r3, r0
 801e350:	b21b      	sxth	r3, r3
 801e352:	4323      	orrs	r3, r4
 801e354:	b21a      	sxth	r2, r3
 801e356:	4b57      	ldr	r3, [pc, #348]	@ (801e4b4 <tcp_receive+0x888>)
 801e358:	691b      	ldr	r3, [r3, #16]
 801e35a:	b292      	uxth	r2, r2
 801e35c:	819a      	strh	r2, [r3, #12]
          }
          /* Adjust length of segment to fit in the window. */
          TCPWND_CHECK16(pcb->rcv_wnd);
          inseg.len = (u16_t)pcb->rcv_wnd;
 801e35e:	687b      	ldr	r3, [r7, #4]
 801e360:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801e362:	4b54      	ldr	r3, [pc, #336]	@ (801e4b4 <tcp_receive+0x888>)
 801e364:	811a      	strh	r2, [r3, #8]
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) {
 801e366:	4b53      	ldr	r3, [pc, #332]	@ (801e4b4 <tcp_receive+0x888>)
 801e368:	691b      	ldr	r3, [r3, #16]
 801e36a:	899b      	ldrh	r3, [r3, #12]
 801e36c:	b29b      	uxth	r3, r3
 801e36e:	4618      	mov	r0, r3
 801e370:	f7fa fbda 	bl	8018b28 <lwip_htons>
 801e374:	4603      	mov	r3, r0
 801e376:	b2db      	uxtb	r3, r3
 801e378:	f003 0302 	and.w	r3, r3, #2
 801e37c:	2b00      	cmp	r3, #0
 801e37e:	d005      	beq.n	801e38c <tcp_receive+0x760>
            inseg.len -= 1;
 801e380:	4b4c      	ldr	r3, [pc, #304]	@ (801e4b4 <tcp_receive+0x888>)
 801e382:	891b      	ldrh	r3, [r3, #8]
 801e384:	3b01      	subs	r3, #1
 801e386:	b29a      	uxth	r2, r3
 801e388:	4b4a      	ldr	r3, [pc, #296]	@ (801e4b4 <tcp_receive+0x888>)
 801e38a:	811a      	strh	r2, [r3, #8]
          }
          pbuf_realloc(inseg.p, inseg.len);
 801e38c:	4b49      	ldr	r3, [pc, #292]	@ (801e4b4 <tcp_receive+0x888>)
 801e38e:	685b      	ldr	r3, [r3, #4]
 801e390:	4a48      	ldr	r2, [pc, #288]	@ (801e4b4 <tcp_receive+0x888>)
 801e392:	8912      	ldrh	r2, [r2, #8]
 801e394:	4611      	mov	r1, r2
 801e396:	4618      	mov	r0, r3
 801e398:	f7fb fef2 	bl	801a180 <pbuf_realloc>
          tcplen = TCP_TCPLEN(&inseg);
 801e39c:	4b45      	ldr	r3, [pc, #276]	@ (801e4b4 <tcp_receive+0x888>)
 801e39e:	891c      	ldrh	r4, [r3, #8]
 801e3a0:	4b44      	ldr	r3, [pc, #272]	@ (801e4b4 <tcp_receive+0x888>)
 801e3a2:	691b      	ldr	r3, [r3, #16]
 801e3a4:	899b      	ldrh	r3, [r3, #12]
 801e3a6:	b29b      	uxth	r3, r3
 801e3a8:	4618      	mov	r0, r3
 801e3aa:	f7fa fbbd 	bl	8018b28 <lwip_htons>
 801e3ae:	4603      	mov	r3, r0
 801e3b0:	b2db      	uxtb	r3, r3
 801e3b2:	f003 0303 	and.w	r3, r3, #3
 801e3b6:	2b00      	cmp	r3, #0
 801e3b8:	d001      	beq.n	801e3be <tcp_receive+0x792>
 801e3ba:	2301      	movs	r3, #1
 801e3bc:	e000      	b.n	801e3c0 <tcp_receive+0x794>
 801e3be:	2300      	movs	r3, #0
 801e3c0:	4423      	add	r3, r4
 801e3c2:	b29a      	uxth	r2, r3
 801e3c4:	4b3c      	ldr	r3, [pc, #240]	@ (801e4b8 <tcp_receive+0x88c>)
 801e3c6:	801a      	strh	r2, [r3, #0]
          LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n",
 801e3c8:	4b3b      	ldr	r3, [pc, #236]	@ (801e4b8 <tcp_receive+0x88c>)
 801e3ca:	881b      	ldrh	r3, [r3, #0]
 801e3cc:	461a      	mov	r2, r3
 801e3ce:	4b38      	ldr	r3, [pc, #224]	@ (801e4b0 <tcp_receive+0x884>)
 801e3d0:	681b      	ldr	r3, [r3, #0]
 801e3d2:	441a      	add	r2, r3
 801e3d4:	687b      	ldr	r3, [r7, #4]
 801e3d6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e3d8:	6879      	ldr	r1, [r7, #4]
 801e3da:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801e3dc:	440b      	add	r3, r1
 801e3de:	429a      	cmp	r2, r3
 801e3e0:	d006      	beq.n	801e3f0 <tcp_receive+0x7c4>
 801e3e2:	4b36      	ldr	r3, [pc, #216]	@ (801e4bc <tcp_receive+0x890>)
 801e3e4:	f240 52cb 	movw	r2, #1483	@ 0x5cb
 801e3e8:	4935      	ldr	r1, [pc, #212]	@ (801e4c0 <tcp_receive+0x894>)
 801e3ea:	4836      	ldr	r0, [pc, #216]	@ (801e4c4 <tcp_receive+0x898>)
 801e3ec:	f00b faf6 	bl	80299dc <iprintf>
        }
#if TCP_QUEUE_OOSEQ
        /* Received in-sequence data, adjust ooseq data if:
           - FIN has been received or
           - inseq overlaps with ooseq */
        if (pcb->ooseq != NULL) {
 801e3f0:	687b      	ldr	r3, [r7, #4]
 801e3f2:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e3f4:	2b00      	cmp	r3, #0
 801e3f6:	f000 80e6 	beq.w	801e5c6 <tcp_receive+0x99a>
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801e3fa:	4b2e      	ldr	r3, [pc, #184]	@ (801e4b4 <tcp_receive+0x888>)
 801e3fc:	691b      	ldr	r3, [r3, #16]
 801e3fe:	899b      	ldrh	r3, [r3, #12]
 801e400:	b29b      	uxth	r3, r3
 801e402:	4618      	mov	r0, r3
 801e404:	f7fa fb90 	bl	8018b28 <lwip_htons>
 801e408:	4603      	mov	r3, r0
 801e40a:	b2db      	uxtb	r3, r3
 801e40c:	f003 0301 	and.w	r3, r3, #1
 801e410:	2b00      	cmp	r3, #0
 801e412:	d010      	beq.n	801e436 <tcp_receive+0x80a>
            LWIP_DEBUGF(TCP_INPUT_DEBUG,
                        ("tcp_receive: received in-order FIN, binning ooseq queue\n"));
            /* Received in-order FIN means anything that was received
             * out of order must now have been received in-order, so
             * bin the ooseq queue */
            while (pcb->ooseq != NULL) {
 801e414:	e00a      	b.n	801e42c <tcp_receive+0x800>
              struct tcp_seg *old_ooseq = pcb->ooseq;
 801e416:	687b      	ldr	r3, [r7, #4]
 801e418:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e41a:	60fb      	str	r3, [r7, #12]
              pcb->ooseq = pcb->ooseq->next;
 801e41c:	687b      	ldr	r3, [r7, #4]
 801e41e:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e420:	681a      	ldr	r2, [r3, #0]
 801e422:	687b      	ldr	r3, [r7, #4]
 801e424:	675a      	str	r2, [r3, #116]	@ 0x74
              tcp_seg_free(old_ooseq);
 801e426:	68f8      	ldr	r0, [r7, #12]
 801e428:	f7fd fcb9 	bl	801bd9e <tcp_seg_free>
            while (pcb->ooseq != NULL) {
 801e42c:	687b      	ldr	r3, [r7, #4]
 801e42e:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e430:	2b00      	cmp	r3, #0
 801e432:	d1f0      	bne.n	801e416 <tcp_receive+0x7ea>
 801e434:	e0c7      	b.n	801e5c6 <tcp_receive+0x99a>
            }
          } else {
            struct tcp_seg *next = pcb->ooseq;
 801e436:	687b      	ldr	r3, [r7, #4]
 801e438:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e43a:	63fb      	str	r3, [r7, #60]	@ 0x3c
            /* Remove all segments on ooseq that are covered by inseg already.
             * FIN is copied from ooseq to inseg if present. */
            while (next &&
 801e43c:	e051      	b.n	801e4e2 <tcp_receive+0x8b6>
                   TCP_SEQ_GEQ(seqno + tcplen,
                               next->tcphdr->seqno + next->len)) {
              struct tcp_seg *tmp;
              /* inseg cannot have FIN here (already processed above) */
              if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 &&
 801e43e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e440:	691b      	ldr	r3, [r3, #16]
 801e442:	899b      	ldrh	r3, [r3, #12]
 801e444:	b29b      	uxth	r3, r3
 801e446:	4618      	mov	r0, r3
 801e448:	f7fa fb6e 	bl	8018b28 <lwip_htons>
 801e44c:	4603      	mov	r3, r0
 801e44e:	b2db      	uxtb	r3, r3
 801e450:	f003 0301 	and.w	r3, r3, #1
 801e454:	2b00      	cmp	r3, #0
 801e456:	d03c      	beq.n	801e4d2 <tcp_receive+0x8a6>
                  (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) == 0) {
 801e458:	4b16      	ldr	r3, [pc, #88]	@ (801e4b4 <tcp_receive+0x888>)
 801e45a:	691b      	ldr	r3, [r3, #16]
 801e45c:	899b      	ldrh	r3, [r3, #12]
 801e45e:	b29b      	uxth	r3, r3
 801e460:	4618      	mov	r0, r3
 801e462:	f7fa fb61 	bl	8018b28 <lwip_htons>
 801e466:	4603      	mov	r3, r0
 801e468:	b2db      	uxtb	r3, r3
 801e46a:	f003 0302 	and.w	r3, r3, #2
              if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 &&
 801e46e:	2b00      	cmp	r3, #0
 801e470:	d12f      	bne.n	801e4d2 <tcp_receive+0x8a6>
                TCPH_SET_FLAG(inseg.tcphdr, TCP_FIN);
 801e472:	4b10      	ldr	r3, [pc, #64]	@ (801e4b4 <tcp_receive+0x888>)
 801e474:	691b      	ldr	r3, [r3, #16]
 801e476:	899b      	ldrh	r3, [r3, #12]
 801e478:	b29c      	uxth	r4, r3
 801e47a:	2001      	movs	r0, #1
 801e47c:	f7fa fb54 	bl	8018b28 <lwip_htons>
 801e480:	4603      	mov	r3, r0
 801e482:	461a      	mov	r2, r3
 801e484:	4b0b      	ldr	r3, [pc, #44]	@ (801e4b4 <tcp_receive+0x888>)
 801e486:	691b      	ldr	r3, [r3, #16]
 801e488:	4322      	orrs	r2, r4
 801e48a:	b292      	uxth	r2, r2
 801e48c:	819a      	strh	r2, [r3, #12]
                tcplen = TCP_TCPLEN(&inseg);
 801e48e:	4b09      	ldr	r3, [pc, #36]	@ (801e4b4 <tcp_receive+0x888>)
 801e490:	891c      	ldrh	r4, [r3, #8]
 801e492:	4b08      	ldr	r3, [pc, #32]	@ (801e4b4 <tcp_receive+0x888>)
 801e494:	691b      	ldr	r3, [r3, #16]
 801e496:	899b      	ldrh	r3, [r3, #12]
 801e498:	b29b      	uxth	r3, r3
 801e49a:	4618      	mov	r0, r3
 801e49c:	f7fa fb44 	bl	8018b28 <lwip_htons>
 801e4a0:	4603      	mov	r3, r0
 801e4a2:	b2db      	uxtb	r3, r3
 801e4a4:	f003 0303 	and.w	r3, r3, #3
 801e4a8:	2b00      	cmp	r3, #0
 801e4aa:	d00d      	beq.n	801e4c8 <tcp_receive+0x89c>
 801e4ac:	2301      	movs	r3, #1
 801e4ae:	e00c      	b.n	801e4ca <tcp_receive+0x89e>
 801e4b0:	2402aec4 	.word	0x2402aec4
 801e4b4:	2402aea0 	.word	0x2402aea0
 801e4b8:	2402aece 	.word	0x2402aece
 801e4bc:	0802ed58 	.word	0x0802ed58
 801e4c0:	0802f100 	.word	0x0802f100
 801e4c4:	0802eda4 	.word	0x0802eda4
 801e4c8:	2300      	movs	r3, #0
 801e4ca:	4423      	add	r3, r4
 801e4cc:	b29a      	uxth	r2, r3
 801e4ce:	4b98      	ldr	r3, [pc, #608]	@ (801e730 <tcp_receive+0xb04>)
 801e4d0:	801a      	strh	r2, [r3, #0]
              }
              tmp = next;
 801e4d2:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e4d4:	613b      	str	r3, [r7, #16]
              next = next->next;
 801e4d6:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e4d8:	681b      	ldr	r3, [r3, #0]
 801e4da:	63fb      	str	r3, [r7, #60]	@ 0x3c
              tcp_seg_free(tmp);
 801e4dc:	6938      	ldr	r0, [r7, #16]
 801e4de:	f7fd fc5e 	bl	801bd9e <tcp_seg_free>
            while (next &&
 801e4e2:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e4e4:	2b00      	cmp	r3, #0
 801e4e6:	d00e      	beq.n	801e506 <tcp_receive+0x8da>
                   TCP_SEQ_GEQ(seqno + tcplen,
 801e4e8:	4b91      	ldr	r3, [pc, #580]	@ (801e730 <tcp_receive+0xb04>)
 801e4ea:	881b      	ldrh	r3, [r3, #0]
 801e4ec:	461a      	mov	r2, r3
 801e4ee:	4b91      	ldr	r3, [pc, #580]	@ (801e734 <tcp_receive+0xb08>)
 801e4f0:	681b      	ldr	r3, [r3, #0]
 801e4f2:	441a      	add	r2, r3
 801e4f4:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e4f6:	691b      	ldr	r3, [r3, #16]
 801e4f8:	685b      	ldr	r3, [r3, #4]
 801e4fa:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 801e4fc:	8909      	ldrh	r1, [r1, #8]
 801e4fe:	440b      	add	r3, r1
 801e500:	1ad3      	subs	r3, r2, r3
            while (next &&
 801e502:	2b00      	cmp	r3, #0
 801e504:	da9b      	bge.n	801e43e <tcp_receive+0x812>
            }
            /* Now trim right side of inseg if it overlaps with the first
             * segment on ooseq */
            if (next &&
 801e506:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e508:	2b00      	cmp	r3, #0
 801e50a:	d059      	beq.n	801e5c0 <tcp_receive+0x994>
                TCP_SEQ_GT(seqno + tcplen,
 801e50c:	4b88      	ldr	r3, [pc, #544]	@ (801e730 <tcp_receive+0xb04>)
 801e50e:	881b      	ldrh	r3, [r3, #0]
 801e510:	461a      	mov	r2, r3
 801e512:	4b88      	ldr	r3, [pc, #544]	@ (801e734 <tcp_receive+0xb08>)
 801e514:	681b      	ldr	r3, [r3, #0]
 801e516:	441a      	add	r2, r3
 801e518:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e51a:	691b      	ldr	r3, [r3, #16]
 801e51c:	685b      	ldr	r3, [r3, #4]
 801e51e:	1ad3      	subs	r3, r2, r3
            if (next &&
 801e520:	2b00      	cmp	r3, #0
 801e522:	dd4d      	ble.n	801e5c0 <tcp_receive+0x994>
                           next->tcphdr->seqno)) {
              /* inseg cannot have FIN here (already processed above) */
              inseg.len = (u16_t)(next->tcphdr->seqno - seqno);
 801e524:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e526:	691b      	ldr	r3, [r3, #16]
 801e528:	685b      	ldr	r3, [r3, #4]
 801e52a:	b29a      	uxth	r2, r3
 801e52c:	4b81      	ldr	r3, [pc, #516]	@ (801e734 <tcp_receive+0xb08>)
 801e52e:	681b      	ldr	r3, [r3, #0]
 801e530:	b29b      	uxth	r3, r3
 801e532:	1ad3      	subs	r3, r2, r3
 801e534:	b29a      	uxth	r2, r3
 801e536:	4b80      	ldr	r3, [pc, #512]	@ (801e738 <tcp_receive+0xb0c>)
 801e538:	811a      	strh	r2, [r3, #8]
              if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) {
 801e53a:	4b7f      	ldr	r3, [pc, #508]	@ (801e738 <tcp_receive+0xb0c>)
 801e53c:	691b      	ldr	r3, [r3, #16]
 801e53e:	899b      	ldrh	r3, [r3, #12]
 801e540:	b29b      	uxth	r3, r3
 801e542:	4618      	mov	r0, r3
 801e544:	f7fa faf0 	bl	8018b28 <lwip_htons>
 801e548:	4603      	mov	r3, r0
 801e54a:	b2db      	uxtb	r3, r3
 801e54c:	f003 0302 	and.w	r3, r3, #2
 801e550:	2b00      	cmp	r3, #0
 801e552:	d005      	beq.n	801e560 <tcp_receive+0x934>
                inseg.len -= 1;
 801e554:	4b78      	ldr	r3, [pc, #480]	@ (801e738 <tcp_receive+0xb0c>)
 801e556:	891b      	ldrh	r3, [r3, #8]
 801e558:	3b01      	subs	r3, #1
 801e55a:	b29a      	uxth	r2, r3
 801e55c:	4b76      	ldr	r3, [pc, #472]	@ (801e738 <tcp_receive+0xb0c>)
 801e55e:	811a      	strh	r2, [r3, #8]
              }
              pbuf_realloc(inseg.p, inseg.len);
 801e560:	4b75      	ldr	r3, [pc, #468]	@ (801e738 <tcp_receive+0xb0c>)
 801e562:	685b      	ldr	r3, [r3, #4]
 801e564:	4a74      	ldr	r2, [pc, #464]	@ (801e738 <tcp_receive+0xb0c>)
 801e566:	8912      	ldrh	r2, [r2, #8]
 801e568:	4611      	mov	r1, r2
 801e56a:	4618      	mov	r0, r3
 801e56c:	f7fb fe08 	bl	801a180 <pbuf_realloc>
              tcplen = TCP_TCPLEN(&inseg);
 801e570:	4b71      	ldr	r3, [pc, #452]	@ (801e738 <tcp_receive+0xb0c>)
 801e572:	891c      	ldrh	r4, [r3, #8]
 801e574:	4b70      	ldr	r3, [pc, #448]	@ (801e738 <tcp_receive+0xb0c>)
 801e576:	691b      	ldr	r3, [r3, #16]
 801e578:	899b      	ldrh	r3, [r3, #12]
 801e57a:	b29b      	uxth	r3, r3
 801e57c:	4618      	mov	r0, r3
 801e57e:	f7fa fad3 	bl	8018b28 <lwip_htons>
 801e582:	4603      	mov	r3, r0
 801e584:	b2db      	uxtb	r3, r3
 801e586:	f003 0303 	and.w	r3, r3, #3
 801e58a:	2b00      	cmp	r3, #0
 801e58c:	d001      	beq.n	801e592 <tcp_receive+0x966>
 801e58e:	2301      	movs	r3, #1
 801e590:	e000      	b.n	801e594 <tcp_receive+0x968>
 801e592:	2300      	movs	r3, #0
 801e594:	4423      	add	r3, r4
 801e596:	b29a      	uxth	r2, r3
 801e598:	4b65      	ldr	r3, [pc, #404]	@ (801e730 <tcp_receive+0xb04>)
 801e59a:	801a      	strh	r2, [r3, #0]
              LWIP_ASSERT("tcp_receive: segment not trimmed correctly to ooseq queue\n",
 801e59c:	4b64      	ldr	r3, [pc, #400]	@ (801e730 <tcp_receive+0xb04>)
 801e59e:	881b      	ldrh	r3, [r3, #0]
 801e5a0:	461a      	mov	r2, r3
 801e5a2:	4b64      	ldr	r3, [pc, #400]	@ (801e734 <tcp_receive+0xb08>)
 801e5a4:	681b      	ldr	r3, [r3, #0]
 801e5a6:	441a      	add	r2, r3
 801e5a8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e5aa:	691b      	ldr	r3, [r3, #16]
 801e5ac:	685b      	ldr	r3, [r3, #4]
 801e5ae:	429a      	cmp	r2, r3
 801e5b0:	d006      	beq.n	801e5c0 <tcp_receive+0x994>
 801e5b2:	4b62      	ldr	r3, [pc, #392]	@ (801e73c <tcp_receive+0xb10>)
 801e5b4:	f240 52fc 	movw	r2, #1532	@ 0x5fc
 801e5b8:	4961      	ldr	r1, [pc, #388]	@ (801e740 <tcp_receive+0xb14>)
 801e5ba:	4862      	ldr	r0, [pc, #392]	@ (801e744 <tcp_receive+0xb18>)
 801e5bc:	f00b fa0e 	bl	80299dc <iprintf>
                          (seqno + tcplen) == next->tcphdr->seqno);
            }
            pcb->ooseq = next;
 801e5c0:	687b      	ldr	r3, [r7, #4]
 801e5c2:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 801e5c4:	675a      	str	r2, [r3, #116]	@ 0x74
          }
        }
#endif /* TCP_QUEUE_OOSEQ */

        pcb->rcv_nxt = seqno + tcplen;
 801e5c6:	4b5a      	ldr	r3, [pc, #360]	@ (801e730 <tcp_receive+0xb04>)
 801e5c8:	881b      	ldrh	r3, [r3, #0]
 801e5ca:	461a      	mov	r2, r3
 801e5cc:	4b59      	ldr	r3, [pc, #356]	@ (801e734 <tcp_receive+0xb08>)
 801e5ce:	681b      	ldr	r3, [r3, #0]
 801e5d0:	441a      	add	r2, r3
 801e5d2:	687b      	ldr	r3, [r7, #4]
 801e5d4:	625a      	str	r2, [r3, #36]	@ 0x24

        /* Update the receiver's (our) window. */
        LWIP_ASSERT("tcp_receive: tcplen > rcv_wnd\n", pcb->rcv_wnd >= tcplen);
 801e5d6:	687b      	ldr	r3, [r7, #4]
 801e5d8:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801e5da:	4b55      	ldr	r3, [pc, #340]	@ (801e730 <tcp_receive+0xb04>)
 801e5dc:	881b      	ldrh	r3, [r3, #0]
 801e5de:	429a      	cmp	r2, r3
 801e5e0:	d206      	bcs.n	801e5f0 <tcp_receive+0x9c4>
 801e5e2:	4b56      	ldr	r3, [pc, #344]	@ (801e73c <tcp_receive+0xb10>)
 801e5e4:	f240 6207 	movw	r2, #1543	@ 0x607
 801e5e8:	4957      	ldr	r1, [pc, #348]	@ (801e748 <tcp_receive+0xb1c>)
 801e5ea:	4856      	ldr	r0, [pc, #344]	@ (801e744 <tcp_receive+0xb18>)
 801e5ec:	f00b f9f6 	bl	80299dc <iprintf>
        pcb->rcv_wnd -= tcplen;
 801e5f0:	687b      	ldr	r3, [r7, #4]
 801e5f2:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801e5f4:	4b4e      	ldr	r3, [pc, #312]	@ (801e730 <tcp_receive+0xb04>)
 801e5f6:	881b      	ldrh	r3, [r3, #0]
 801e5f8:	1ad3      	subs	r3, r2, r3
 801e5fa:	b29a      	uxth	r2, r3
 801e5fc:	687b      	ldr	r3, [r7, #4]
 801e5fe:	851a      	strh	r2, [r3, #40]	@ 0x28

        tcp_update_rcv_ann_wnd(pcb);
 801e600:	6878      	ldr	r0, [r7, #4]
 801e602:	f7fc fd85 	bl	801b110 <tcp_update_rcv_ann_wnd>
           chains its data on this pbuf as well.

           If the segment was a FIN, we set the TF_GOT_FIN flag that will
           be used to indicate to the application that the remote side has
           closed its end of the connection. */
        if (inseg.p->tot_len > 0) {
 801e606:	4b4c      	ldr	r3, [pc, #304]	@ (801e738 <tcp_receive+0xb0c>)
 801e608:	685b      	ldr	r3, [r3, #4]
 801e60a:	891b      	ldrh	r3, [r3, #8]
 801e60c:	2b00      	cmp	r3, #0
 801e60e:	d006      	beq.n	801e61e <tcp_receive+0x9f2>
          recv_data = inseg.p;
 801e610:	4b49      	ldr	r3, [pc, #292]	@ (801e738 <tcp_receive+0xb0c>)
 801e612:	685b      	ldr	r3, [r3, #4]
 801e614:	4a4d      	ldr	r2, [pc, #308]	@ (801e74c <tcp_receive+0xb20>)
 801e616:	6013      	str	r3, [r2, #0]
          /* Since this pbuf now is the responsibility of the
             application, we delete our reference to it so that we won't
             (mistakingly) deallocate it. */
          inseg.p = NULL;
 801e618:	4b47      	ldr	r3, [pc, #284]	@ (801e738 <tcp_receive+0xb0c>)
 801e61a:	2200      	movs	r2, #0
 801e61c:	605a      	str	r2, [r3, #4]
        }
        if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801e61e:	4b46      	ldr	r3, [pc, #280]	@ (801e738 <tcp_receive+0xb0c>)
 801e620:	691b      	ldr	r3, [r3, #16]
 801e622:	899b      	ldrh	r3, [r3, #12]
 801e624:	b29b      	uxth	r3, r3
 801e626:	4618      	mov	r0, r3
 801e628:	f7fa fa7e 	bl	8018b28 <lwip_htons>
 801e62c:	4603      	mov	r3, r0
 801e62e:	b2db      	uxtb	r3, r3
 801e630:	f003 0301 	and.w	r3, r3, #1
 801e634:	2b00      	cmp	r3, #0
 801e636:	f000 80b8 	beq.w	801e7aa <tcp_receive+0xb7e>
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received FIN.\n"));
          recv_flags |= TF_GOT_FIN;
 801e63a:	4b45      	ldr	r3, [pc, #276]	@ (801e750 <tcp_receive+0xb24>)
 801e63c:	781b      	ldrb	r3, [r3, #0]
 801e63e:	f043 0320 	orr.w	r3, r3, #32
 801e642:	b2da      	uxtb	r2, r3
 801e644:	4b42      	ldr	r3, [pc, #264]	@ (801e750 <tcp_receive+0xb24>)
 801e646:	701a      	strb	r2, [r3, #0]
        }

#if TCP_QUEUE_OOSEQ
        /* We now check if we have segments on the ->ooseq queue that
           are now in sequence. */
        while (pcb->ooseq != NULL &&
 801e648:	e0af      	b.n	801e7aa <tcp_receive+0xb7e>
               pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) {

          struct tcp_seg *cseg = pcb->ooseq;
 801e64a:	687b      	ldr	r3, [r7, #4]
 801e64c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e64e:	60bb      	str	r3, [r7, #8]
          seqno = pcb->ooseq->tcphdr->seqno;
 801e650:	687b      	ldr	r3, [r7, #4]
 801e652:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e654:	691b      	ldr	r3, [r3, #16]
 801e656:	685b      	ldr	r3, [r3, #4]
 801e658:	4a36      	ldr	r2, [pc, #216]	@ (801e734 <tcp_receive+0xb08>)
 801e65a:	6013      	str	r3, [r2, #0]

          pcb->rcv_nxt += TCP_TCPLEN(cseg);
 801e65c:	68bb      	ldr	r3, [r7, #8]
 801e65e:	891b      	ldrh	r3, [r3, #8]
 801e660:	461c      	mov	r4, r3
 801e662:	68bb      	ldr	r3, [r7, #8]
 801e664:	691b      	ldr	r3, [r3, #16]
 801e666:	899b      	ldrh	r3, [r3, #12]
 801e668:	b29b      	uxth	r3, r3
 801e66a:	4618      	mov	r0, r3
 801e66c:	f7fa fa5c 	bl	8018b28 <lwip_htons>
 801e670:	4603      	mov	r3, r0
 801e672:	b2db      	uxtb	r3, r3
 801e674:	f003 0303 	and.w	r3, r3, #3
 801e678:	2b00      	cmp	r3, #0
 801e67a:	d001      	beq.n	801e680 <tcp_receive+0xa54>
 801e67c:	2301      	movs	r3, #1
 801e67e:	e000      	b.n	801e682 <tcp_receive+0xa56>
 801e680:	2300      	movs	r3, #0
 801e682:	191a      	adds	r2, r3, r4
 801e684:	687b      	ldr	r3, [r7, #4]
 801e686:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e688:	441a      	add	r2, r3
 801e68a:	687b      	ldr	r3, [r7, #4]
 801e68c:	625a      	str	r2, [r3, #36]	@ 0x24
          LWIP_ASSERT("tcp_receive: ooseq tcplen > rcv_wnd\n",
 801e68e:	687b      	ldr	r3, [r7, #4]
 801e690:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801e692:	461c      	mov	r4, r3
 801e694:	68bb      	ldr	r3, [r7, #8]
 801e696:	891b      	ldrh	r3, [r3, #8]
 801e698:	461d      	mov	r5, r3
 801e69a:	68bb      	ldr	r3, [r7, #8]
 801e69c:	691b      	ldr	r3, [r3, #16]
 801e69e:	899b      	ldrh	r3, [r3, #12]
 801e6a0:	b29b      	uxth	r3, r3
 801e6a2:	4618      	mov	r0, r3
 801e6a4:	f7fa fa40 	bl	8018b28 <lwip_htons>
 801e6a8:	4603      	mov	r3, r0
 801e6aa:	b2db      	uxtb	r3, r3
 801e6ac:	f003 0303 	and.w	r3, r3, #3
 801e6b0:	2b00      	cmp	r3, #0
 801e6b2:	d001      	beq.n	801e6b8 <tcp_receive+0xa8c>
 801e6b4:	2301      	movs	r3, #1
 801e6b6:	e000      	b.n	801e6ba <tcp_receive+0xa8e>
 801e6b8:	2300      	movs	r3, #0
 801e6ba:	442b      	add	r3, r5
 801e6bc:	429c      	cmp	r4, r3
 801e6be:	d206      	bcs.n	801e6ce <tcp_receive+0xaa2>
 801e6c0:	4b1e      	ldr	r3, [pc, #120]	@ (801e73c <tcp_receive+0xb10>)
 801e6c2:	f240 622b 	movw	r2, #1579	@ 0x62b
 801e6c6:	4923      	ldr	r1, [pc, #140]	@ (801e754 <tcp_receive+0xb28>)
 801e6c8:	481e      	ldr	r0, [pc, #120]	@ (801e744 <tcp_receive+0xb18>)
 801e6ca:	f00b f987 	bl	80299dc <iprintf>
                      pcb->rcv_wnd >= TCP_TCPLEN(cseg));
          pcb->rcv_wnd -= TCP_TCPLEN(cseg);
 801e6ce:	68bb      	ldr	r3, [r7, #8]
 801e6d0:	891b      	ldrh	r3, [r3, #8]
 801e6d2:	461c      	mov	r4, r3
 801e6d4:	68bb      	ldr	r3, [r7, #8]
 801e6d6:	691b      	ldr	r3, [r3, #16]
 801e6d8:	899b      	ldrh	r3, [r3, #12]
 801e6da:	b29b      	uxth	r3, r3
 801e6dc:	4618      	mov	r0, r3
 801e6de:	f7fa fa23 	bl	8018b28 <lwip_htons>
 801e6e2:	4603      	mov	r3, r0
 801e6e4:	b2db      	uxtb	r3, r3
 801e6e6:	f003 0303 	and.w	r3, r3, #3
 801e6ea:	2b00      	cmp	r3, #0
 801e6ec:	d001      	beq.n	801e6f2 <tcp_receive+0xac6>
 801e6ee:	2301      	movs	r3, #1
 801e6f0:	e000      	b.n	801e6f4 <tcp_receive+0xac8>
 801e6f2:	2300      	movs	r3, #0
 801e6f4:	1919      	adds	r1, r3, r4
 801e6f6:	687b      	ldr	r3, [r7, #4]
 801e6f8:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801e6fa:	b28b      	uxth	r3, r1
 801e6fc:	1ad3      	subs	r3, r2, r3
 801e6fe:	b29a      	uxth	r2, r3
 801e700:	687b      	ldr	r3, [r7, #4]
 801e702:	851a      	strh	r2, [r3, #40]	@ 0x28

          tcp_update_rcv_ann_wnd(pcb);
 801e704:	6878      	ldr	r0, [r7, #4]
 801e706:	f7fc fd03 	bl	801b110 <tcp_update_rcv_ann_wnd>

          if (cseg->p->tot_len > 0) {
 801e70a:	68bb      	ldr	r3, [r7, #8]
 801e70c:	685b      	ldr	r3, [r3, #4]
 801e70e:	891b      	ldrh	r3, [r3, #8]
 801e710:	2b00      	cmp	r3, #0
 801e712:	d028      	beq.n	801e766 <tcp_receive+0xb3a>
            /* Chain this pbuf onto the pbuf that we will pass to
               the application. */
            /* With window scaling, this can overflow recv_data->tot_len, but
               that's not a problem since we explicitly fix that before passing
               recv_data to the application. */
            if (recv_data) {
 801e714:	4b0d      	ldr	r3, [pc, #52]	@ (801e74c <tcp_receive+0xb20>)
 801e716:	681b      	ldr	r3, [r3, #0]
 801e718:	2b00      	cmp	r3, #0
 801e71a:	d01d      	beq.n	801e758 <tcp_receive+0xb2c>
              pbuf_cat(recv_data, cseg->p);
 801e71c:	4b0b      	ldr	r3, [pc, #44]	@ (801e74c <tcp_receive+0xb20>)
 801e71e:	681a      	ldr	r2, [r3, #0]
 801e720:	68bb      	ldr	r3, [r7, #8]
 801e722:	685b      	ldr	r3, [r3, #4]
 801e724:	4619      	mov	r1, r3
 801e726:	4610      	mov	r0, r2
 801e728:	f7fb ffae 	bl	801a688 <pbuf_cat>
 801e72c:	e018      	b.n	801e760 <tcp_receive+0xb34>
 801e72e:	bf00      	nop
 801e730:	2402aece 	.word	0x2402aece
 801e734:	2402aec4 	.word	0x2402aec4
 801e738:	2402aea0 	.word	0x2402aea0
 801e73c:	0802ed58 	.word	0x0802ed58
 801e740:	0802f138 	.word	0x0802f138
 801e744:	0802eda4 	.word	0x0802eda4
 801e748:	0802f174 	.word	0x0802f174
 801e74c:	2402aed4 	.word	0x2402aed4
 801e750:	2402aed1 	.word	0x2402aed1
 801e754:	0802f194 	.word	0x0802f194
            } else {
              recv_data = cseg->p;
 801e758:	68bb      	ldr	r3, [r7, #8]
 801e75a:	685b      	ldr	r3, [r3, #4]
 801e75c:	4a70      	ldr	r2, [pc, #448]	@ (801e920 <tcp_receive+0xcf4>)
 801e75e:	6013      	str	r3, [r2, #0]
            }
            cseg->p = NULL;
 801e760:	68bb      	ldr	r3, [r7, #8]
 801e762:	2200      	movs	r2, #0
 801e764:	605a      	str	r2, [r3, #4]
          }
          if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) {
 801e766:	68bb      	ldr	r3, [r7, #8]
 801e768:	691b      	ldr	r3, [r3, #16]
 801e76a:	899b      	ldrh	r3, [r3, #12]
 801e76c:	b29b      	uxth	r3, r3
 801e76e:	4618      	mov	r0, r3
 801e770:	f7fa f9da 	bl	8018b28 <lwip_htons>
 801e774:	4603      	mov	r3, r0
 801e776:	b2db      	uxtb	r3, r3
 801e778:	f003 0301 	and.w	r3, r3, #1
 801e77c:	2b00      	cmp	r3, #0
 801e77e:	d00d      	beq.n	801e79c <tcp_receive+0xb70>
            LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: dequeued FIN.\n"));
            recv_flags |= TF_GOT_FIN;
 801e780:	4b68      	ldr	r3, [pc, #416]	@ (801e924 <tcp_receive+0xcf8>)
 801e782:	781b      	ldrb	r3, [r3, #0]
 801e784:	f043 0320 	orr.w	r3, r3, #32
 801e788:	b2da      	uxtb	r2, r3
 801e78a:	4b66      	ldr	r3, [pc, #408]	@ (801e924 <tcp_receive+0xcf8>)
 801e78c:	701a      	strb	r2, [r3, #0]
            if (pcb->state == ESTABLISHED) { /* force passive close or we can move to active close */
 801e78e:	687b      	ldr	r3, [r7, #4]
 801e790:	7d1b      	ldrb	r3, [r3, #20]
 801e792:	2b04      	cmp	r3, #4
 801e794:	d102      	bne.n	801e79c <tcp_receive+0xb70>
              pcb->state = CLOSE_WAIT;
 801e796:	687b      	ldr	r3, [r7, #4]
 801e798:	2207      	movs	r2, #7
 801e79a:	751a      	strb	r2, [r3, #20]
            }
          }

          pcb->ooseq = cseg->next;
 801e79c:	68bb      	ldr	r3, [r7, #8]
 801e79e:	681a      	ldr	r2, [r3, #0]
 801e7a0:	687b      	ldr	r3, [r7, #4]
 801e7a2:	675a      	str	r2, [r3, #116]	@ 0x74
          tcp_seg_free(cseg);
 801e7a4:	68b8      	ldr	r0, [r7, #8]
 801e7a6:	f7fd fafa 	bl	801bd9e <tcp_seg_free>
        while (pcb->ooseq != NULL &&
 801e7aa:	687b      	ldr	r3, [r7, #4]
 801e7ac:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e7ae:	2b00      	cmp	r3, #0
 801e7b0:	d008      	beq.n	801e7c4 <tcp_receive+0xb98>
               pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) {
 801e7b2:	687b      	ldr	r3, [r7, #4]
 801e7b4:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e7b6:	691b      	ldr	r3, [r3, #16]
 801e7b8:	685a      	ldr	r2, [r3, #4]
 801e7ba:	687b      	ldr	r3, [r7, #4]
 801e7bc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
        while (pcb->ooseq != NULL &&
 801e7be:	429a      	cmp	r2, r3
 801e7c0:	f43f af43 	beq.w	801e64a <tcp_receive+0xa1e>
#endif /* LWIP_TCP_SACK_OUT */
#endif /* TCP_QUEUE_OOSEQ */


        /* Acknowledge the segment(s). */
        tcp_ack(pcb);
 801e7c4:	687b      	ldr	r3, [r7, #4]
 801e7c6:	8b5b      	ldrh	r3, [r3, #26]
 801e7c8:	f003 0301 	and.w	r3, r3, #1
 801e7cc:	2b00      	cmp	r3, #0
 801e7ce:	d00e      	beq.n	801e7ee <tcp_receive+0xbc2>
 801e7d0:	687b      	ldr	r3, [r7, #4]
 801e7d2:	8b5b      	ldrh	r3, [r3, #26]
 801e7d4:	f023 0301 	bic.w	r3, r3, #1
 801e7d8:	b29a      	uxth	r2, r3
 801e7da:	687b      	ldr	r3, [r7, #4]
 801e7dc:	835a      	strh	r2, [r3, #26]
 801e7de:	687b      	ldr	r3, [r7, #4]
 801e7e0:	8b5b      	ldrh	r3, [r3, #26]
 801e7e2:	f043 0302 	orr.w	r3, r3, #2
 801e7e6:	b29a      	uxth	r2, r3
 801e7e8:	687b      	ldr	r3, [r7, #4]
 801e7ea:	835a      	strh	r2, [r3, #26]
      if (pcb->rcv_nxt == seqno) {
 801e7ec:	e187      	b.n	801eafe <tcp_receive+0xed2>
        tcp_ack(pcb);
 801e7ee:	687b      	ldr	r3, [r7, #4]
 801e7f0:	8b5b      	ldrh	r3, [r3, #26]
 801e7f2:	f043 0301 	orr.w	r3, r3, #1
 801e7f6:	b29a      	uxth	r2, r3
 801e7f8:	687b      	ldr	r3, [r7, #4]
 801e7fa:	835a      	strh	r2, [r3, #26]
      if (pcb->rcv_nxt == seqno) {
 801e7fc:	e17f      	b.n	801eafe <tcp_receive+0xed2>
      } else {
        /* We get here if the incoming segment is out-of-sequence. */

#if TCP_QUEUE_OOSEQ
        /* We queue the segment on the ->ooseq queue. */
        if (pcb->ooseq == NULL) {
 801e7fe:	687b      	ldr	r3, [r7, #4]
 801e800:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e802:	2b00      	cmp	r3, #0
 801e804:	d106      	bne.n	801e814 <tcp_receive+0xbe8>
          pcb->ooseq = tcp_seg_copy(&inseg);
 801e806:	4848      	ldr	r0, [pc, #288]	@ (801e928 <tcp_receive+0xcfc>)
 801e808:	f7fd fae2 	bl	801bdd0 <tcp_seg_copy>
 801e80c:	4602      	mov	r2, r0
 801e80e:	687b      	ldr	r3, [r7, #4]
 801e810:	675a      	str	r2, [r3, #116]	@ 0x74
 801e812:	e16c      	b.n	801eaee <tcp_receive+0xec2>
#if LWIP_TCP_SACK_OUT
          /* This is the left edge of the lowest possible SACK range.
             It may start before the newly received segment (possibly adjusted below). */
          u32_t sackbeg = TCP_SEQ_LT(seqno, pcb->ooseq->tcphdr->seqno) ? seqno : pcb->ooseq->tcphdr->seqno;
#endif /* LWIP_TCP_SACK_OUT */
          struct tcp_seg *next, *prev = NULL;
 801e814:	2300      	movs	r3, #0
 801e816:	637b      	str	r3, [r7, #52]	@ 0x34
          for (next = pcb->ooseq; next != NULL; next = next->next) {
 801e818:	687b      	ldr	r3, [r7, #4]
 801e81a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e81c:	63bb      	str	r3, [r7, #56]	@ 0x38
 801e81e:	e156      	b.n	801eace <tcp_receive+0xea2>
            if (seqno == next->tcphdr->seqno) {
 801e820:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e822:	691b      	ldr	r3, [r3, #16]
 801e824:	685a      	ldr	r2, [r3, #4]
 801e826:	4b41      	ldr	r3, [pc, #260]	@ (801e92c <tcp_receive+0xd00>)
 801e828:	681b      	ldr	r3, [r3, #0]
 801e82a:	429a      	cmp	r2, r3
 801e82c:	d11d      	bne.n	801e86a <tcp_receive+0xc3e>
              /* The sequence number of the incoming segment is the
                 same as the sequence number of the segment on
                 ->ooseq. We check the lengths to see which one to
                 discard. */
              if (inseg.len > next->len) {
 801e82e:	4b3e      	ldr	r3, [pc, #248]	@ (801e928 <tcp_receive+0xcfc>)
 801e830:	891a      	ldrh	r2, [r3, #8]
 801e832:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e834:	891b      	ldrh	r3, [r3, #8]
 801e836:	429a      	cmp	r2, r3
 801e838:	f240 814e 	bls.w	801ead8 <tcp_receive+0xeac>
                /* The incoming segment is larger than the old
                   segment. We replace some segments with the new
                   one. */
                struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801e83c:	483a      	ldr	r0, [pc, #232]	@ (801e928 <tcp_receive+0xcfc>)
 801e83e:	f7fd fac7 	bl	801bdd0 <tcp_seg_copy>
 801e842:	6178      	str	r0, [r7, #20]
                if (cseg != NULL) {
 801e844:	697b      	ldr	r3, [r7, #20]
 801e846:	2b00      	cmp	r3, #0
 801e848:	f000 8148 	beq.w	801eadc <tcp_receive+0xeb0>
                  if (prev != NULL) {
 801e84c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e84e:	2b00      	cmp	r3, #0
 801e850:	d003      	beq.n	801e85a <tcp_receive+0xc2e>
                    prev->next = cseg;
 801e852:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e854:	697a      	ldr	r2, [r7, #20]
 801e856:	601a      	str	r2, [r3, #0]
 801e858:	e002      	b.n	801e860 <tcp_receive+0xc34>
                  } else {
                    pcb->ooseq = cseg;
 801e85a:	687b      	ldr	r3, [r7, #4]
 801e85c:	697a      	ldr	r2, [r7, #20]
 801e85e:	675a      	str	r2, [r3, #116]	@ 0x74
                  }
                  tcp_oos_insert_segment(cseg, next);
 801e860:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801e862:	6978      	ldr	r0, [r7, #20]
 801e864:	f7ff f8de 	bl	801da24 <tcp_oos_insert_segment>
                }
                break;
 801e868:	e138      	b.n	801eadc <tcp_receive+0xeb0>
                   segment was smaller than the old one; in either
                   case, we ditch the incoming segment. */
                break;
              }
            } else {
              if (prev == NULL) {
 801e86a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e86c:	2b00      	cmp	r3, #0
 801e86e:	d117      	bne.n	801e8a0 <tcp_receive+0xc74>
                if (TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {
 801e870:	4b2e      	ldr	r3, [pc, #184]	@ (801e92c <tcp_receive+0xd00>)
 801e872:	681a      	ldr	r2, [r3, #0]
 801e874:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e876:	691b      	ldr	r3, [r3, #16]
 801e878:	685b      	ldr	r3, [r3, #4]
 801e87a:	1ad3      	subs	r3, r2, r3
 801e87c:	2b00      	cmp	r3, #0
 801e87e:	da57      	bge.n	801e930 <tcp_receive+0xd04>
                  /* The sequence number of the incoming segment is lower
                     than the sequence number of the first segment on the
                     queue. We put the incoming segment first on the
                     queue. */
                  struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801e880:	4829      	ldr	r0, [pc, #164]	@ (801e928 <tcp_receive+0xcfc>)
 801e882:	f7fd faa5 	bl	801bdd0 <tcp_seg_copy>
 801e886:	61b8      	str	r0, [r7, #24]
                  if (cseg != NULL) {
 801e888:	69bb      	ldr	r3, [r7, #24]
 801e88a:	2b00      	cmp	r3, #0
 801e88c:	f000 8128 	beq.w	801eae0 <tcp_receive+0xeb4>
                    pcb->ooseq = cseg;
 801e890:	687b      	ldr	r3, [r7, #4]
 801e892:	69ba      	ldr	r2, [r7, #24]
 801e894:	675a      	str	r2, [r3, #116]	@ 0x74
                    tcp_oos_insert_segment(cseg, next);
 801e896:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801e898:	69b8      	ldr	r0, [r7, #24]
 801e89a:	f7ff f8c3 	bl	801da24 <tcp_oos_insert_segment>
                  }
                  break;
 801e89e:	e11f      	b.n	801eae0 <tcp_receive+0xeb4>
                }
              } else {
                /*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) &&
                  TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/
                if (TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno + 1, next->tcphdr->seqno - 1)) {
 801e8a0:	4b22      	ldr	r3, [pc, #136]	@ (801e92c <tcp_receive+0xd00>)
 801e8a2:	681a      	ldr	r2, [r3, #0]
 801e8a4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e8a6:	691b      	ldr	r3, [r3, #16]
 801e8a8:	685b      	ldr	r3, [r3, #4]
 801e8aa:	1ad3      	subs	r3, r2, r3
 801e8ac:	3b01      	subs	r3, #1
 801e8ae:	2b00      	cmp	r3, #0
 801e8b0:	db3e      	blt.n	801e930 <tcp_receive+0xd04>
 801e8b2:	4b1e      	ldr	r3, [pc, #120]	@ (801e92c <tcp_receive+0xd00>)
 801e8b4:	681a      	ldr	r2, [r3, #0]
 801e8b6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e8b8:	691b      	ldr	r3, [r3, #16]
 801e8ba:	685b      	ldr	r3, [r3, #4]
 801e8bc:	1ad3      	subs	r3, r2, r3
 801e8be:	3301      	adds	r3, #1
 801e8c0:	2b00      	cmp	r3, #0
 801e8c2:	dc35      	bgt.n	801e930 <tcp_receive+0xd04>
                  /* The sequence number of the incoming segment is in
                     between the sequence numbers of the previous and
                     the next segment on ->ooseq. We trim trim the previous
                     segment, delete next segments that included in received segment
                     and trim received, if needed. */
                  struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801e8c4:	4818      	ldr	r0, [pc, #96]	@ (801e928 <tcp_receive+0xcfc>)
 801e8c6:	f7fd fa83 	bl	801bdd0 <tcp_seg_copy>
 801e8ca:	61f8      	str	r0, [r7, #28]
                  if (cseg != NULL) {
 801e8cc:	69fb      	ldr	r3, [r7, #28]
 801e8ce:	2b00      	cmp	r3, #0
 801e8d0:	f000 8108 	beq.w	801eae4 <tcp_receive+0xeb8>
                    if (TCP_SEQ_GT(prev->tcphdr->seqno + prev->len, seqno)) {
 801e8d4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e8d6:	691b      	ldr	r3, [r3, #16]
 801e8d8:	685b      	ldr	r3, [r3, #4]
 801e8da:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 801e8dc:	8912      	ldrh	r2, [r2, #8]
 801e8de:	441a      	add	r2, r3
 801e8e0:	4b12      	ldr	r3, [pc, #72]	@ (801e92c <tcp_receive+0xd00>)
 801e8e2:	681b      	ldr	r3, [r3, #0]
 801e8e4:	1ad3      	subs	r3, r2, r3
 801e8e6:	2b00      	cmp	r3, #0
 801e8e8:	dd12      	ble.n	801e910 <tcp_receive+0xce4>
                      /* We need to trim the prev segment. */
                      prev->len = (u16_t)(seqno - prev->tcphdr->seqno);
 801e8ea:	4b10      	ldr	r3, [pc, #64]	@ (801e92c <tcp_receive+0xd00>)
 801e8ec:	681b      	ldr	r3, [r3, #0]
 801e8ee:	b29a      	uxth	r2, r3
 801e8f0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e8f2:	691b      	ldr	r3, [r3, #16]
 801e8f4:	685b      	ldr	r3, [r3, #4]
 801e8f6:	b29b      	uxth	r3, r3
 801e8f8:	1ad3      	subs	r3, r2, r3
 801e8fa:	b29a      	uxth	r2, r3
 801e8fc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e8fe:	811a      	strh	r2, [r3, #8]
                      pbuf_realloc(prev->p, prev->len);
 801e900:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e902:	685a      	ldr	r2, [r3, #4]
 801e904:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e906:	891b      	ldrh	r3, [r3, #8]
 801e908:	4619      	mov	r1, r3
 801e90a:	4610      	mov	r0, r2
 801e90c:	f7fb fc38 	bl	801a180 <pbuf_realloc>
                    }
                    prev->next = cseg;
 801e910:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e912:	69fa      	ldr	r2, [r7, #28]
 801e914:	601a      	str	r2, [r3, #0]
                    tcp_oos_insert_segment(cseg, next);
 801e916:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801e918:	69f8      	ldr	r0, [r7, #28]
 801e91a:	f7ff f883 	bl	801da24 <tcp_oos_insert_segment>
                  }
                  break;
 801e91e:	e0e1      	b.n	801eae4 <tcp_receive+0xeb8>
 801e920:	2402aed4 	.word	0x2402aed4
 801e924:	2402aed1 	.word	0x2402aed1
 801e928:	2402aea0 	.word	0x2402aea0
 801e92c:	2402aec4 	.word	0x2402aec4
#endif /* LWIP_TCP_SACK_OUT */

              /* We don't use 'prev' below, so let's set it to current 'next'.
                 This way even if we break the loop below, 'prev' will be pointing
                 at the segment right in front of the newly added one. */
              prev = next;
 801e930:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e932:	637b      	str	r3, [r7, #52]	@ 0x34

              /* If the "next" segment is the last segment on the
                 ooseq queue, we add the incoming segment to the end
                 of the list. */
              if (next->next == NULL &&
 801e934:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e936:	681b      	ldr	r3, [r3, #0]
 801e938:	2b00      	cmp	r3, #0
 801e93a:	f040 80c5 	bne.w	801eac8 <tcp_receive+0xe9c>
                  TCP_SEQ_GT(seqno, next->tcphdr->seqno)) {
 801e93e:	4b7f      	ldr	r3, [pc, #508]	@ (801eb3c <tcp_receive+0xf10>)
 801e940:	681a      	ldr	r2, [r3, #0]
 801e942:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e944:	691b      	ldr	r3, [r3, #16]
 801e946:	685b      	ldr	r3, [r3, #4]
 801e948:	1ad3      	subs	r3, r2, r3
              if (next->next == NULL &&
 801e94a:	2b00      	cmp	r3, #0
 801e94c:	f340 80bc 	ble.w	801eac8 <tcp_receive+0xe9c>
                if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) {
 801e950:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e952:	691b      	ldr	r3, [r3, #16]
 801e954:	899b      	ldrh	r3, [r3, #12]
 801e956:	b29b      	uxth	r3, r3
 801e958:	4618      	mov	r0, r3
 801e95a:	f7fa f8e5 	bl	8018b28 <lwip_htons>
 801e95e:	4603      	mov	r3, r0
 801e960:	b2db      	uxtb	r3, r3
 801e962:	f003 0301 	and.w	r3, r3, #1
 801e966:	2b00      	cmp	r3, #0
 801e968:	f040 80be 	bne.w	801eae8 <tcp_receive+0xebc>
                  /* segment "next" already contains all data */
                  break;
                }
                next->next = tcp_seg_copy(&inseg);
 801e96c:	4874      	ldr	r0, [pc, #464]	@ (801eb40 <tcp_receive+0xf14>)
 801e96e:	f7fd fa2f 	bl	801bdd0 <tcp_seg_copy>
 801e972:	4602      	mov	r2, r0
 801e974:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e976:	601a      	str	r2, [r3, #0]
                if (next->next != NULL) {
 801e978:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e97a:	681b      	ldr	r3, [r3, #0]
 801e97c:	2b00      	cmp	r3, #0
 801e97e:	f000 80b5 	beq.w	801eaec <tcp_receive+0xec0>
                  if (TCP_SEQ_GT(next->tcphdr->seqno + next->len, seqno)) {
 801e982:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e984:	691b      	ldr	r3, [r3, #16]
 801e986:	685b      	ldr	r3, [r3, #4]
 801e988:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 801e98a:	8912      	ldrh	r2, [r2, #8]
 801e98c:	441a      	add	r2, r3
 801e98e:	4b6b      	ldr	r3, [pc, #428]	@ (801eb3c <tcp_receive+0xf10>)
 801e990:	681b      	ldr	r3, [r3, #0]
 801e992:	1ad3      	subs	r3, r2, r3
 801e994:	2b00      	cmp	r3, #0
 801e996:	dd12      	ble.n	801e9be <tcp_receive+0xd92>
                    /* We need to trim the last segment. */
                    next->len = (u16_t)(seqno - next->tcphdr->seqno);
 801e998:	4b68      	ldr	r3, [pc, #416]	@ (801eb3c <tcp_receive+0xf10>)
 801e99a:	681b      	ldr	r3, [r3, #0]
 801e99c:	b29a      	uxth	r2, r3
 801e99e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e9a0:	691b      	ldr	r3, [r3, #16]
 801e9a2:	685b      	ldr	r3, [r3, #4]
 801e9a4:	b29b      	uxth	r3, r3
 801e9a6:	1ad3      	subs	r3, r2, r3
 801e9a8:	b29a      	uxth	r2, r3
 801e9aa:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e9ac:	811a      	strh	r2, [r3, #8]
                    pbuf_realloc(next->p, next->len);
 801e9ae:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e9b0:	685a      	ldr	r2, [r3, #4]
 801e9b2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e9b4:	891b      	ldrh	r3, [r3, #8]
 801e9b6:	4619      	mov	r1, r3
 801e9b8:	4610      	mov	r0, r2
 801e9ba:	f7fb fbe1 	bl	801a180 <pbuf_realloc>
                  }
                  /* check if the remote side overruns our receive window */
                  if (TCP_SEQ_GT((u32_t)tcplen + seqno, pcb->rcv_nxt + (u32_t)pcb->rcv_wnd)) {
 801e9be:	4b61      	ldr	r3, [pc, #388]	@ (801eb44 <tcp_receive+0xf18>)
 801e9c0:	881b      	ldrh	r3, [r3, #0]
 801e9c2:	461a      	mov	r2, r3
 801e9c4:	4b5d      	ldr	r3, [pc, #372]	@ (801eb3c <tcp_receive+0xf10>)
 801e9c6:	681b      	ldr	r3, [r3, #0]
 801e9c8:	441a      	add	r2, r3
 801e9ca:	687b      	ldr	r3, [r7, #4]
 801e9cc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e9ce:	6879      	ldr	r1, [r7, #4]
 801e9d0:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801e9d2:	440b      	add	r3, r1
 801e9d4:	1ad3      	subs	r3, r2, r3
 801e9d6:	2b00      	cmp	r3, #0
 801e9d8:	f340 8088 	ble.w	801eaec <tcp_receive+0xec0>
                    LWIP_DEBUGF(TCP_INPUT_DEBUG,
                                ("tcp_receive: other end overran receive window"
                                 "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n",
                                 seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd));
                    if (TCPH_FLAGS(next->next->tcphdr) & TCP_FIN) {
 801e9dc:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e9de:	681b      	ldr	r3, [r3, #0]
 801e9e0:	691b      	ldr	r3, [r3, #16]
 801e9e2:	899b      	ldrh	r3, [r3, #12]
 801e9e4:	b29b      	uxth	r3, r3
 801e9e6:	4618      	mov	r0, r3
 801e9e8:	f7fa f89e 	bl	8018b28 <lwip_htons>
 801e9ec:	4603      	mov	r3, r0
 801e9ee:	b2db      	uxtb	r3, r3
 801e9f0:	f003 0301 	and.w	r3, r3, #1
 801e9f4:	2b00      	cmp	r3, #0
 801e9f6:	d021      	beq.n	801ea3c <tcp_receive+0xe10>
                      /* Must remove the FIN from the header as we're trimming
                       * that byte of sequence-space from the packet */
                      TCPH_FLAGS_SET(next->next->tcphdr, TCPH_FLAGS(next->next->tcphdr) & ~TCP_FIN);
 801e9f8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e9fa:	681b      	ldr	r3, [r3, #0]
 801e9fc:	691b      	ldr	r3, [r3, #16]
 801e9fe:	899b      	ldrh	r3, [r3, #12]
 801ea00:	b29b      	uxth	r3, r3
 801ea02:	b21b      	sxth	r3, r3
 801ea04:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 801ea08:	b21c      	sxth	r4, r3
 801ea0a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801ea0c:	681b      	ldr	r3, [r3, #0]
 801ea0e:	691b      	ldr	r3, [r3, #16]
 801ea10:	899b      	ldrh	r3, [r3, #12]
 801ea12:	b29b      	uxth	r3, r3
 801ea14:	4618      	mov	r0, r3
 801ea16:	f7fa f887 	bl	8018b28 <lwip_htons>
 801ea1a:	4603      	mov	r3, r0
 801ea1c:	b2db      	uxtb	r3, r3
 801ea1e:	f003 033e 	and.w	r3, r3, #62	@ 0x3e
 801ea22:	b29b      	uxth	r3, r3
 801ea24:	4618      	mov	r0, r3
 801ea26:	f7fa f87f 	bl	8018b28 <lwip_htons>
 801ea2a:	4603      	mov	r3, r0
 801ea2c:	b21b      	sxth	r3, r3
 801ea2e:	4323      	orrs	r3, r4
 801ea30:	b21a      	sxth	r2, r3
 801ea32:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801ea34:	681b      	ldr	r3, [r3, #0]
 801ea36:	691b      	ldr	r3, [r3, #16]
 801ea38:	b292      	uxth	r2, r2
 801ea3a:	819a      	strh	r2, [r3, #12]
                    }
                    /* Adjust length of segment to fit in the window. */
                    next->next->len = (u16_t)(pcb->rcv_nxt + pcb->rcv_wnd - seqno);
 801ea3c:	687b      	ldr	r3, [r7, #4]
 801ea3e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801ea40:	b29a      	uxth	r2, r3
 801ea42:	687b      	ldr	r3, [r7, #4]
 801ea44:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801ea46:	4413      	add	r3, r2
 801ea48:	b299      	uxth	r1, r3
 801ea4a:	4b3c      	ldr	r3, [pc, #240]	@ (801eb3c <tcp_receive+0xf10>)
 801ea4c:	681b      	ldr	r3, [r3, #0]
 801ea4e:	b29a      	uxth	r2, r3
 801ea50:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801ea52:	681b      	ldr	r3, [r3, #0]
 801ea54:	1a8a      	subs	r2, r1, r2
 801ea56:	b292      	uxth	r2, r2
 801ea58:	811a      	strh	r2, [r3, #8]
                    pbuf_realloc(next->next->p, next->next->len);
 801ea5a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801ea5c:	681b      	ldr	r3, [r3, #0]
 801ea5e:	685a      	ldr	r2, [r3, #4]
 801ea60:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801ea62:	681b      	ldr	r3, [r3, #0]
 801ea64:	891b      	ldrh	r3, [r3, #8]
 801ea66:	4619      	mov	r1, r3
 801ea68:	4610      	mov	r0, r2
 801ea6a:	f7fb fb89 	bl	801a180 <pbuf_realloc>
                    tcplen = TCP_TCPLEN(next->next);
 801ea6e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801ea70:	681b      	ldr	r3, [r3, #0]
 801ea72:	891c      	ldrh	r4, [r3, #8]
 801ea74:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801ea76:	681b      	ldr	r3, [r3, #0]
 801ea78:	691b      	ldr	r3, [r3, #16]
 801ea7a:	899b      	ldrh	r3, [r3, #12]
 801ea7c:	b29b      	uxth	r3, r3
 801ea7e:	4618      	mov	r0, r3
 801ea80:	f7fa f852 	bl	8018b28 <lwip_htons>
 801ea84:	4603      	mov	r3, r0
 801ea86:	b2db      	uxtb	r3, r3
 801ea88:	f003 0303 	and.w	r3, r3, #3
 801ea8c:	2b00      	cmp	r3, #0
 801ea8e:	d001      	beq.n	801ea94 <tcp_receive+0xe68>
 801ea90:	2301      	movs	r3, #1
 801ea92:	e000      	b.n	801ea96 <tcp_receive+0xe6a>
 801ea94:	2300      	movs	r3, #0
 801ea96:	4423      	add	r3, r4
 801ea98:	b29a      	uxth	r2, r3
 801ea9a:	4b2a      	ldr	r3, [pc, #168]	@ (801eb44 <tcp_receive+0xf18>)
 801ea9c:	801a      	strh	r2, [r3, #0]
                    LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n",
 801ea9e:	4b29      	ldr	r3, [pc, #164]	@ (801eb44 <tcp_receive+0xf18>)
 801eaa0:	881b      	ldrh	r3, [r3, #0]
 801eaa2:	461a      	mov	r2, r3
 801eaa4:	4b25      	ldr	r3, [pc, #148]	@ (801eb3c <tcp_receive+0xf10>)
 801eaa6:	681b      	ldr	r3, [r3, #0]
 801eaa8:	441a      	add	r2, r3
 801eaaa:	687b      	ldr	r3, [r7, #4]
 801eaac:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801eaae:	6879      	ldr	r1, [r7, #4]
 801eab0:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801eab2:	440b      	add	r3, r1
 801eab4:	429a      	cmp	r2, r3
 801eab6:	d019      	beq.n	801eaec <tcp_receive+0xec0>
 801eab8:	4b23      	ldr	r3, [pc, #140]	@ (801eb48 <tcp_receive+0xf1c>)
 801eaba:	f44f 62df 	mov.w	r2, #1784	@ 0x6f8
 801eabe:	4923      	ldr	r1, [pc, #140]	@ (801eb4c <tcp_receive+0xf20>)
 801eac0:	4823      	ldr	r0, [pc, #140]	@ (801eb50 <tcp_receive+0xf24>)
 801eac2:	f00a ff8b 	bl	80299dc <iprintf>
                                (seqno + tcplen) == (pcb->rcv_nxt + pcb->rcv_wnd));
                  }
                }
                break;
 801eac6:	e011      	b.n	801eaec <tcp_receive+0xec0>
          for (next = pcb->ooseq; next != NULL; next = next->next) {
 801eac8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801eaca:	681b      	ldr	r3, [r3, #0]
 801eacc:	63bb      	str	r3, [r7, #56]	@ 0x38
 801eace:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801ead0:	2b00      	cmp	r3, #0
 801ead2:	f47f aea5 	bne.w	801e820 <tcp_receive+0xbf4>
 801ead6:	e00a      	b.n	801eaee <tcp_receive+0xec2>
                break;
 801ead8:	bf00      	nop
 801eada:	e008      	b.n	801eaee <tcp_receive+0xec2>
                break;
 801eadc:	bf00      	nop
 801eade:	e006      	b.n	801eaee <tcp_receive+0xec2>
                  break;
 801eae0:	bf00      	nop
 801eae2:	e004      	b.n	801eaee <tcp_receive+0xec2>
                  break;
 801eae4:	bf00      	nop
 801eae6:	e002      	b.n	801eaee <tcp_receive+0xec2>
                  break;
 801eae8:	bf00      	nop
 801eaea:	e000      	b.n	801eaee <tcp_receive+0xec2>
                break;
 801eaec:	bf00      	nop
#endif /* TCP_OOSEQ_BYTES_LIMIT || TCP_OOSEQ_PBUFS_LIMIT */
#endif /* TCP_QUEUE_OOSEQ */

        /* We send the ACK packet after we've (potentially) dealt with SACKs,
           so they can be included in the acknowledgment. */
        tcp_send_empty_ack(pcb);
 801eaee:	6878      	ldr	r0, [r7, #4]
 801eaf0:	f001 fefc 	bl	80208ec <tcp_send_empty_ack>
      if (pcb->rcv_nxt == seqno) {
 801eaf4:	e003      	b.n	801eafe <tcp_receive+0xed2>
      }
    } else {
      /* The incoming segment is not within the window. */
      tcp_send_empty_ack(pcb);
 801eaf6:	6878      	ldr	r0, [r7, #4]
 801eaf8:	f001 fef8 	bl	80208ec <tcp_send_empty_ack>
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801eafc:	e01a      	b.n	801eb34 <tcp_receive+0xf08>
 801eafe:	e019      	b.n	801eb34 <tcp_receive+0xf08>
    }
  } else {
    /* Segments with length 0 is taken care of here. Segments that
       fall out of the window are ACKed. */
    if (!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd - 1)) {
 801eb00:	4b0e      	ldr	r3, [pc, #56]	@ (801eb3c <tcp_receive+0xf10>)
 801eb02:	681a      	ldr	r2, [r3, #0]
 801eb04:	687b      	ldr	r3, [r7, #4]
 801eb06:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801eb08:	1ad3      	subs	r3, r2, r3
 801eb0a:	2b00      	cmp	r3, #0
 801eb0c:	db0a      	blt.n	801eb24 <tcp_receive+0xef8>
 801eb0e:	4b0b      	ldr	r3, [pc, #44]	@ (801eb3c <tcp_receive+0xf10>)
 801eb10:	681a      	ldr	r2, [r3, #0]
 801eb12:	687b      	ldr	r3, [r7, #4]
 801eb14:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801eb16:	6879      	ldr	r1, [r7, #4]
 801eb18:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801eb1a:	440b      	add	r3, r1
 801eb1c:	1ad3      	subs	r3, r2, r3
 801eb1e:	3301      	adds	r3, #1
 801eb20:	2b00      	cmp	r3, #0
 801eb22:	dd07      	ble.n	801eb34 <tcp_receive+0xf08>
      tcp_ack_now(pcb);
 801eb24:	687b      	ldr	r3, [r7, #4]
 801eb26:	8b5b      	ldrh	r3, [r3, #26]
 801eb28:	f043 0302 	orr.w	r3, r3, #2
 801eb2c:	b29a      	uxth	r2, r3
 801eb2e:	687b      	ldr	r3, [r7, #4]
 801eb30:	835a      	strh	r2, [r3, #26]
    }
  }
}
 801eb32:	e7ff      	b.n	801eb34 <tcp_receive+0xf08>
 801eb34:	bf00      	nop
 801eb36:	3750      	adds	r7, #80	@ 0x50
 801eb38:	46bd      	mov	sp, r7
 801eb3a:	bdb0      	pop	{r4, r5, r7, pc}
 801eb3c:	2402aec4 	.word	0x2402aec4
 801eb40:	2402aea0 	.word	0x2402aea0
 801eb44:	2402aece 	.word	0x2402aece
 801eb48:	0802ed58 	.word	0x0802ed58
 801eb4c:	0802f100 	.word	0x0802f100
 801eb50:	0802eda4 	.word	0x0802eda4

0801eb54 <tcp_get_next_optbyte>:

static u8_t
tcp_get_next_optbyte(void)
{
 801eb54:	b480      	push	{r7}
 801eb56:	b083      	sub	sp, #12
 801eb58:	af00      	add	r7, sp, #0
  u16_t optidx = tcp_optidx++;
 801eb5a:	4b15      	ldr	r3, [pc, #84]	@ (801ebb0 <tcp_get_next_optbyte+0x5c>)
 801eb5c:	881b      	ldrh	r3, [r3, #0]
 801eb5e:	1c5a      	adds	r2, r3, #1
 801eb60:	b291      	uxth	r1, r2
 801eb62:	4a13      	ldr	r2, [pc, #76]	@ (801ebb0 <tcp_get_next_optbyte+0x5c>)
 801eb64:	8011      	strh	r1, [r2, #0]
 801eb66:	80fb      	strh	r3, [r7, #6]
  if ((tcphdr_opt2 == NULL) || (optidx < tcphdr_opt1len)) {
 801eb68:	4b12      	ldr	r3, [pc, #72]	@ (801ebb4 <tcp_get_next_optbyte+0x60>)
 801eb6a:	681b      	ldr	r3, [r3, #0]
 801eb6c:	2b00      	cmp	r3, #0
 801eb6e:	d004      	beq.n	801eb7a <tcp_get_next_optbyte+0x26>
 801eb70:	4b11      	ldr	r3, [pc, #68]	@ (801ebb8 <tcp_get_next_optbyte+0x64>)
 801eb72:	881b      	ldrh	r3, [r3, #0]
 801eb74:	88fa      	ldrh	r2, [r7, #6]
 801eb76:	429a      	cmp	r2, r3
 801eb78:	d208      	bcs.n	801eb8c <tcp_get_next_optbyte+0x38>
    u8_t *opts = (u8_t *)tcphdr + TCP_HLEN;
 801eb7a:	4b10      	ldr	r3, [pc, #64]	@ (801ebbc <tcp_get_next_optbyte+0x68>)
 801eb7c:	681b      	ldr	r3, [r3, #0]
 801eb7e:	3314      	adds	r3, #20
 801eb80:	603b      	str	r3, [r7, #0]
    return opts[optidx];
 801eb82:	88fb      	ldrh	r3, [r7, #6]
 801eb84:	683a      	ldr	r2, [r7, #0]
 801eb86:	4413      	add	r3, r2
 801eb88:	781b      	ldrb	r3, [r3, #0]
 801eb8a:	e00b      	b.n	801eba4 <tcp_get_next_optbyte+0x50>
  } else {
    u8_t idx = (u8_t)(optidx - tcphdr_opt1len);
 801eb8c:	88fb      	ldrh	r3, [r7, #6]
 801eb8e:	b2da      	uxtb	r2, r3
 801eb90:	4b09      	ldr	r3, [pc, #36]	@ (801ebb8 <tcp_get_next_optbyte+0x64>)
 801eb92:	881b      	ldrh	r3, [r3, #0]
 801eb94:	b2db      	uxtb	r3, r3
 801eb96:	1ad3      	subs	r3, r2, r3
 801eb98:	717b      	strb	r3, [r7, #5]
    return tcphdr_opt2[idx];
 801eb9a:	4b06      	ldr	r3, [pc, #24]	@ (801ebb4 <tcp_get_next_optbyte+0x60>)
 801eb9c:	681a      	ldr	r2, [r3, #0]
 801eb9e:	797b      	ldrb	r3, [r7, #5]
 801eba0:	4413      	add	r3, r2
 801eba2:	781b      	ldrb	r3, [r3, #0]
  }
}
 801eba4:	4618      	mov	r0, r3
 801eba6:	370c      	adds	r7, #12
 801eba8:	46bd      	mov	sp, r7
 801ebaa:	f85d 7b04 	ldr.w	r7, [sp], #4
 801ebae:	4770      	bx	lr
 801ebb0:	2402aec0 	.word	0x2402aec0
 801ebb4:	2402aebc 	.word	0x2402aebc
 801ebb8:	2402aeba 	.word	0x2402aeba
 801ebbc:	2402aeb4 	.word	0x2402aeb4

0801ebc0 <tcp_parseopt>:
 *
 * @param pcb the tcp_pcb for which a segment arrived
 */
static void
tcp_parseopt(struct tcp_pcb *pcb)
{
 801ebc0:	b580      	push	{r7, lr}
 801ebc2:	b084      	sub	sp, #16
 801ebc4:	af00      	add	r7, sp, #0
 801ebc6:	6078      	str	r0, [r7, #4]
  u16_t mss;
#if LWIP_TCP_TIMESTAMPS
  u32_t tsval;
#endif

  LWIP_ASSERT("tcp_parseopt: invalid pcb", pcb != NULL);
 801ebc8:	687b      	ldr	r3, [r7, #4]
 801ebca:	2b00      	cmp	r3, #0
 801ebcc:	d106      	bne.n	801ebdc <tcp_parseopt+0x1c>
 801ebce:	4b33      	ldr	r3, [pc, #204]	@ (801ec9c <tcp_parseopt+0xdc>)
 801ebd0:	f240 727d 	movw	r2, #1917	@ 0x77d
 801ebd4:	4932      	ldr	r1, [pc, #200]	@ (801eca0 <tcp_parseopt+0xe0>)
 801ebd6:	4833      	ldr	r0, [pc, #204]	@ (801eca4 <tcp_parseopt+0xe4>)
 801ebd8:	f00a ff00 	bl	80299dc <iprintf>

  /* Parse the TCP MSS option, if present. */
  if (tcphdr_optlen != 0) {
 801ebdc:	4b32      	ldr	r3, [pc, #200]	@ (801eca8 <tcp_parseopt+0xe8>)
 801ebde:	881b      	ldrh	r3, [r3, #0]
 801ebe0:	2b00      	cmp	r3, #0
 801ebe2:	d057      	beq.n	801ec94 <tcp_parseopt+0xd4>
    for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) {
 801ebe4:	4b31      	ldr	r3, [pc, #196]	@ (801ecac <tcp_parseopt+0xec>)
 801ebe6:	2200      	movs	r2, #0
 801ebe8:	801a      	strh	r2, [r3, #0]
 801ebea:	e047      	b.n	801ec7c <tcp_parseopt+0xbc>
      u8_t opt = tcp_get_next_optbyte();
 801ebec:	f7ff ffb2 	bl	801eb54 <tcp_get_next_optbyte>
 801ebf0:	4603      	mov	r3, r0
 801ebf2:	73fb      	strb	r3, [r7, #15]
      switch (opt) {
 801ebf4:	7bfb      	ldrb	r3, [r7, #15]
 801ebf6:	2b02      	cmp	r3, #2
 801ebf8:	d006      	beq.n	801ec08 <tcp_parseopt+0x48>
 801ebfa:	2b02      	cmp	r3, #2
 801ebfc:	dc2b      	bgt.n	801ec56 <tcp_parseopt+0x96>
 801ebfe:	2b00      	cmp	r3, #0
 801ec00:	d043      	beq.n	801ec8a <tcp_parseopt+0xca>
 801ec02:	2b01      	cmp	r3, #1
 801ec04:	d039      	beq.n	801ec7a <tcp_parseopt+0xba>
 801ec06:	e026      	b.n	801ec56 <tcp_parseopt+0x96>
          /* NOP option. */
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: NOP\n"));
          break;
        case LWIP_TCP_OPT_MSS:
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: MSS\n"));
          if (tcp_get_next_optbyte() != LWIP_TCP_OPT_LEN_MSS || (tcp_optidx - 2 + LWIP_TCP_OPT_LEN_MSS) > tcphdr_optlen) {
 801ec08:	f7ff ffa4 	bl	801eb54 <tcp_get_next_optbyte>
 801ec0c:	4603      	mov	r3, r0
 801ec0e:	2b04      	cmp	r3, #4
 801ec10:	d13d      	bne.n	801ec8e <tcp_parseopt+0xce>
 801ec12:	4b26      	ldr	r3, [pc, #152]	@ (801ecac <tcp_parseopt+0xec>)
 801ec14:	881b      	ldrh	r3, [r3, #0]
 801ec16:	3301      	adds	r3, #1
 801ec18:	4a23      	ldr	r2, [pc, #140]	@ (801eca8 <tcp_parseopt+0xe8>)
 801ec1a:	8812      	ldrh	r2, [r2, #0]
 801ec1c:	4293      	cmp	r3, r2
 801ec1e:	da36      	bge.n	801ec8e <tcp_parseopt+0xce>
            /* Bad length */
            LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n"));
            return;
          }
          /* An MSS option with the right option length. */
          mss = (u16_t)(tcp_get_next_optbyte() << 8);
 801ec20:	f7ff ff98 	bl	801eb54 <tcp_get_next_optbyte>
 801ec24:	4603      	mov	r3, r0
 801ec26:	021b      	lsls	r3, r3, #8
 801ec28:	81bb      	strh	r3, [r7, #12]
          mss |= tcp_get_next_optbyte();
 801ec2a:	f7ff ff93 	bl	801eb54 <tcp_get_next_optbyte>
 801ec2e:	4603      	mov	r3, r0
 801ec30:	461a      	mov	r2, r3
 801ec32:	89bb      	ldrh	r3, [r7, #12]
 801ec34:	4313      	orrs	r3, r2
 801ec36:	81bb      	strh	r3, [r7, #12]
          /* Limit the mss to the configured TCP_MSS and prevent division by zero */
          pcb->mss = ((mss > TCP_MSS) || (mss == 0)) ? TCP_MSS : mss;
 801ec38:	89bb      	ldrh	r3, [r7, #12]
 801ec3a:	f240 52b4 	movw	r2, #1460	@ 0x5b4
 801ec3e:	4293      	cmp	r3, r2
 801ec40:	d804      	bhi.n	801ec4c <tcp_parseopt+0x8c>
 801ec42:	89bb      	ldrh	r3, [r7, #12]
 801ec44:	2b00      	cmp	r3, #0
 801ec46:	d001      	beq.n	801ec4c <tcp_parseopt+0x8c>
 801ec48:	89ba      	ldrh	r2, [r7, #12]
 801ec4a:	e001      	b.n	801ec50 <tcp_parseopt+0x90>
 801ec4c:	f240 52b4 	movw	r2, #1460	@ 0x5b4
 801ec50:	687b      	ldr	r3, [r7, #4]
 801ec52:	865a      	strh	r2, [r3, #50]	@ 0x32
          break;
 801ec54:	e012      	b.n	801ec7c <tcp_parseopt+0xbc>
          }
          break;
#endif /* LWIP_TCP_SACK_OUT */
        default:
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: other\n"));
          data = tcp_get_next_optbyte();
 801ec56:	f7ff ff7d 	bl	801eb54 <tcp_get_next_optbyte>
 801ec5a:	4603      	mov	r3, r0
 801ec5c:	72fb      	strb	r3, [r7, #11]
          if (data < 2) {
 801ec5e:	7afb      	ldrb	r3, [r7, #11]
 801ec60:	2b01      	cmp	r3, #1
 801ec62:	d916      	bls.n	801ec92 <tcp_parseopt+0xd2>
               and we don't process them further. */
            return;
          }
          /* All other options have a length field, so that we easily
             can skip past them. */
          tcp_optidx += data - 2;
 801ec64:	7afb      	ldrb	r3, [r7, #11]
 801ec66:	b29a      	uxth	r2, r3
 801ec68:	4b10      	ldr	r3, [pc, #64]	@ (801ecac <tcp_parseopt+0xec>)
 801ec6a:	881b      	ldrh	r3, [r3, #0]
 801ec6c:	4413      	add	r3, r2
 801ec6e:	b29b      	uxth	r3, r3
 801ec70:	3b02      	subs	r3, #2
 801ec72:	b29a      	uxth	r2, r3
 801ec74:	4b0d      	ldr	r3, [pc, #52]	@ (801ecac <tcp_parseopt+0xec>)
 801ec76:	801a      	strh	r2, [r3, #0]
 801ec78:	e000      	b.n	801ec7c <tcp_parseopt+0xbc>
          break;
 801ec7a:	bf00      	nop
    for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) {
 801ec7c:	4b0b      	ldr	r3, [pc, #44]	@ (801ecac <tcp_parseopt+0xec>)
 801ec7e:	881a      	ldrh	r2, [r3, #0]
 801ec80:	4b09      	ldr	r3, [pc, #36]	@ (801eca8 <tcp_parseopt+0xe8>)
 801ec82:	881b      	ldrh	r3, [r3, #0]
 801ec84:	429a      	cmp	r2, r3
 801ec86:	d3b1      	bcc.n	801ebec <tcp_parseopt+0x2c>
 801ec88:	e004      	b.n	801ec94 <tcp_parseopt+0xd4>
          return;
 801ec8a:	bf00      	nop
 801ec8c:	e002      	b.n	801ec94 <tcp_parseopt+0xd4>
            return;
 801ec8e:	bf00      	nop
 801ec90:	e000      	b.n	801ec94 <tcp_parseopt+0xd4>
            return;
 801ec92:	bf00      	nop
      }
    }
  }
}
 801ec94:	3710      	adds	r7, #16
 801ec96:	46bd      	mov	sp, r7
 801ec98:	bd80      	pop	{r7, pc}
 801ec9a:	bf00      	nop
 801ec9c:	0802ed58 	.word	0x0802ed58
 801eca0:	0802f1bc 	.word	0x0802f1bc
 801eca4:	0802eda4 	.word	0x0802eda4
 801eca8:	2402aeb8 	.word	0x2402aeb8
 801ecac:	2402aec0 	.word	0x2402aec0

0801ecb0 <tcp_trigger_input_pcb_close>:

void
tcp_trigger_input_pcb_close(void)
{
 801ecb0:	b480      	push	{r7}
 801ecb2:	af00      	add	r7, sp, #0
  recv_flags |= TF_CLOSED;
 801ecb4:	4b05      	ldr	r3, [pc, #20]	@ (801eccc <tcp_trigger_input_pcb_close+0x1c>)
 801ecb6:	781b      	ldrb	r3, [r3, #0]
 801ecb8:	f043 0310 	orr.w	r3, r3, #16
 801ecbc:	b2da      	uxtb	r2, r3
 801ecbe:	4b03      	ldr	r3, [pc, #12]	@ (801eccc <tcp_trigger_input_pcb_close+0x1c>)
 801ecc0:	701a      	strb	r2, [r3, #0]
}
 801ecc2:	bf00      	nop
 801ecc4:	46bd      	mov	sp, r7
 801ecc6:	f85d 7b04 	ldr.w	r7, [sp], #4
 801ecca:	4770      	bx	lr
 801eccc:	2402aed1 	.word	0x2402aed1

0801ecd0 <tcp_route>:
static err_t tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif);

/* tcp_route: common code that returns a fixed bound netif or calls ip_route */
static struct netif *
tcp_route(const struct tcp_pcb *pcb, const ip_addr_t *src, const ip_addr_t *dst)
{
 801ecd0:	b580      	push	{r7, lr}
 801ecd2:	b084      	sub	sp, #16
 801ecd4:	af00      	add	r7, sp, #0
 801ecd6:	60f8      	str	r0, [r7, #12]
 801ecd8:	60b9      	str	r1, [r7, #8]
 801ecda:	607a      	str	r2, [r7, #4]
  LWIP_UNUSED_ARG(src); /* in case IPv4-only and source-based routing is disabled */

  if ((pcb != NULL) && (pcb->netif_idx != NETIF_NO_INDEX)) {
 801ecdc:	68fb      	ldr	r3, [r7, #12]
 801ecde:	2b00      	cmp	r3, #0
 801ece0:	d00a      	beq.n	801ecf8 <tcp_route+0x28>
 801ece2:	68fb      	ldr	r3, [r7, #12]
 801ece4:	7a1b      	ldrb	r3, [r3, #8]
 801ece6:	2b00      	cmp	r3, #0
 801ece8:	d006      	beq.n	801ecf8 <tcp_route+0x28>
    return netif_get_by_index(pcb->netif_idx);
 801ecea:	68fb      	ldr	r3, [r7, #12]
 801ecec:	7a1b      	ldrb	r3, [r3, #8]
 801ecee:	4618      	mov	r0, r3
 801ecf0:	f7fb f83c 	bl	8019d6c <netif_get_by_index>
 801ecf4:	4603      	mov	r3, r0
 801ecf6:	e003      	b.n	801ed00 <tcp_route+0x30>
  } else {
    return ip_route(src, dst);
 801ecf8:	6878      	ldr	r0, [r7, #4]
 801ecfa:	f005 fe61 	bl	80249c0 <ip4_route>
 801ecfe:	4603      	mov	r3, r0
  }
}
 801ed00:	4618      	mov	r0, r3
 801ed02:	3710      	adds	r7, #16
 801ed04:	46bd      	mov	sp, r7
 801ed06:	bd80      	pop	{r7, pc}

0801ed08 <tcp_create_segment>:
 * The TCP header is filled in except ackno and wnd.
 * p is freed on failure.
 */
static struct tcp_seg *
tcp_create_segment(const struct tcp_pcb *pcb, struct pbuf *p, u8_t hdrflags, u32_t seqno, u8_t optflags)
{
 801ed08:	b590      	push	{r4, r7, lr}
 801ed0a:	b087      	sub	sp, #28
 801ed0c:	af00      	add	r7, sp, #0
 801ed0e:	60f8      	str	r0, [r7, #12]
 801ed10:	60b9      	str	r1, [r7, #8]
 801ed12:	603b      	str	r3, [r7, #0]
 801ed14:	4613      	mov	r3, r2
 801ed16:	71fb      	strb	r3, [r7, #7]
  struct tcp_seg *seg;
  u8_t optlen;

  LWIP_ASSERT("tcp_create_segment: invalid pcb", pcb != NULL);
 801ed18:	68fb      	ldr	r3, [r7, #12]
 801ed1a:	2b00      	cmp	r3, #0
 801ed1c:	d105      	bne.n	801ed2a <tcp_create_segment+0x22>
 801ed1e:	4b45      	ldr	r3, [pc, #276]	@ (801ee34 <tcp_create_segment+0x12c>)
 801ed20:	22a3      	movs	r2, #163	@ 0xa3
 801ed22:	4945      	ldr	r1, [pc, #276]	@ (801ee38 <tcp_create_segment+0x130>)
 801ed24:	4845      	ldr	r0, [pc, #276]	@ (801ee3c <tcp_create_segment+0x134>)
 801ed26:	f00a fe59 	bl	80299dc <iprintf>
  LWIP_ASSERT("tcp_create_segment: invalid pbuf", p != NULL);
 801ed2a:	68bb      	ldr	r3, [r7, #8]
 801ed2c:	2b00      	cmp	r3, #0
 801ed2e:	d105      	bne.n	801ed3c <tcp_create_segment+0x34>
 801ed30:	4b40      	ldr	r3, [pc, #256]	@ (801ee34 <tcp_create_segment+0x12c>)
 801ed32:	22a4      	movs	r2, #164	@ 0xa4
 801ed34:	4942      	ldr	r1, [pc, #264]	@ (801ee40 <tcp_create_segment+0x138>)
 801ed36:	4841      	ldr	r0, [pc, #260]	@ (801ee3c <tcp_create_segment+0x134>)
 801ed38:	f00a fe50 	bl	80299dc <iprintf>

  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 801ed3c:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 801ed40:	009b      	lsls	r3, r3, #2
 801ed42:	b2db      	uxtb	r3, r3
 801ed44:	f003 0304 	and.w	r3, r3, #4
 801ed48:	75fb      	strb	r3, [r7, #23]

  if ((seg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG)) == NULL) {
 801ed4a:	2003      	movs	r0, #3
 801ed4c:	f7fa fc6a 	bl	8019624 <memp_malloc>
 801ed50:	6138      	str	r0, [r7, #16]
 801ed52:	693b      	ldr	r3, [r7, #16]
 801ed54:	2b00      	cmp	r3, #0
 801ed56:	d104      	bne.n	801ed62 <tcp_create_segment+0x5a>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no memory.\n"));
    pbuf_free(p);
 801ed58:	68b8      	ldr	r0, [r7, #8]
 801ed5a:	f7fb fbc7 	bl	801a4ec <pbuf_free>
    return NULL;
 801ed5e:	2300      	movs	r3, #0
 801ed60:	e063      	b.n	801ee2a <tcp_create_segment+0x122>
  }
  seg->flags = optflags;
 801ed62:	693b      	ldr	r3, [r7, #16]
 801ed64:	f897 2028 	ldrb.w	r2, [r7, #40]	@ 0x28
 801ed68:	731a      	strb	r2, [r3, #12]
  seg->next = NULL;
 801ed6a:	693b      	ldr	r3, [r7, #16]
 801ed6c:	2200      	movs	r2, #0
 801ed6e:	601a      	str	r2, [r3, #0]
  seg->p = p;
 801ed70:	693b      	ldr	r3, [r7, #16]
 801ed72:	68ba      	ldr	r2, [r7, #8]
 801ed74:	605a      	str	r2, [r3, #4]
  LWIP_ASSERT("p->tot_len >= optlen", p->tot_len >= optlen);
 801ed76:	68bb      	ldr	r3, [r7, #8]
 801ed78:	891a      	ldrh	r2, [r3, #8]
 801ed7a:	7dfb      	ldrb	r3, [r7, #23]
 801ed7c:	b29b      	uxth	r3, r3
 801ed7e:	429a      	cmp	r2, r3
 801ed80:	d205      	bcs.n	801ed8e <tcp_create_segment+0x86>
 801ed82:	4b2c      	ldr	r3, [pc, #176]	@ (801ee34 <tcp_create_segment+0x12c>)
 801ed84:	22b0      	movs	r2, #176	@ 0xb0
 801ed86:	492f      	ldr	r1, [pc, #188]	@ (801ee44 <tcp_create_segment+0x13c>)
 801ed88:	482c      	ldr	r0, [pc, #176]	@ (801ee3c <tcp_create_segment+0x134>)
 801ed8a:	f00a fe27 	bl	80299dc <iprintf>
  seg->len = p->tot_len - optlen;
 801ed8e:	68bb      	ldr	r3, [r7, #8]
 801ed90:	891a      	ldrh	r2, [r3, #8]
 801ed92:	7dfb      	ldrb	r3, [r7, #23]
 801ed94:	b29b      	uxth	r3, r3
 801ed96:	1ad3      	subs	r3, r2, r3
 801ed98:	b29a      	uxth	r2, r3
 801ed9a:	693b      	ldr	r3, [r7, #16]
 801ed9c:	811a      	strh	r2, [r3, #8]
#if TCP_OVERSIZE_DBGCHECK
  seg->oversize_left = 0;
 801ed9e:	693b      	ldr	r3, [r7, #16]
 801eda0:	2200      	movs	r2, #0
 801eda2:	815a      	strh	r2, [r3, #10]
  LWIP_ASSERT("invalid optflags passed: TF_SEG_DATA_CHECKSUMMED",
              (optflags & TF_SEG_DATA_CHECKSUMMED) == 0);
#endif /* TCP_CHECKSUM_ON_COPY */

  /* build TCP header */
  if (pbuf_add_header(p, TCP_HLEN)) {
 801eda4:	2114      	movs	r1, #20
 801eda6:	68b8      	ldr	r0, [r7, #8]
 801eda8:	f7fb fad8 	bl	801a35c <pbuf_add_header>
 801edac:	4603      	mov	r3, r0
 801edae:	2b00      	cmp	r3, #0
 801edb0:	d004      	beq.n	801edbc <tcp_create_segment+0xb4>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no room for TCP header in pbuf.\n"));
    TCP_STATS_INC(tcp.err);
    tcp_seg_free(seg);
 801edb2:	6938      	ldr	r0, [r7, #16]
 801edb4:	f7fc fff3 	bl	801bd9e <tcp_seg_free>
    return NULL;
 801edb8:	2300      	movs	r3, #0
 801edba:	e036      	b.n	801ee2a <tcp_create_segment+0x122>
  }
  seg->tcphdr = (struct tcp_hdr *)seg->p->payload;
 801edbc:	693b      	ldr	r3, [r7, #16]
 801edbe:	685b      	ldr	r3, [r3, #4]
 801edc0:	685a      	ldr	r2, [r3, #4]
 801edc2:	693b      	ldr	r3, [r7, #16]
 801edc4:	611a      	str	r2, [r3, #16]
  seg->tcphdr->src = lwip_htons(pcb->local_port);
 801edc6:	68fb      	ldr	r3, [r7, #12]
 801edc8:	8ada      	ldrh	r2, [r3, #22]
 801edca:	693b      	ldr	r3, [r7, #16]
 801edcc:	691c      	ldr	r4, [r3, #16]
 801edce:	4610      	mov	r0, r2
 801edd0:	f7f9 feaa 	bl	8018b28 <lwip_htons>
 801edd4:	4603      	mov	r3, r0
 801edd6:	8023      	strh	r3, [r4, #0]
  seg->tcphdr->dest = lwip_htons(pcb->remote_port);
 801edd8:	68fb      	ldr	r3, [r7, #12]
 801edda:	8b1a      	ldrh	r2, [r3, #24]
 801eddc:	693b      	ldr	r3, [r7, #16]
 801edde:	691c      	ldr	r4, [r3, #16]
 801ede0:	4610      	mov	r0, r2
 801ede2:	f7f9 fea1 	bl	8018b28 <lwip_htons>
 801ede6:	4603      	mov	r3, r0
 801ede8:	8063      	strh	r3, [r4, #2]
  seg->tcphdr->seqno = lwip_htonl(seqno);
 801edea:	693b      	ldr	r3, [r7, #16]
 801edec:	691c      	ldr	r4, [r3, #16]
 801edee:	6838      	ldr	r0, [r7, #0]
 801edf0:	f7f9 feaf 	bl	8018b52 <lwip_htonl>
 801edf4:	4603      	mov	r3, r0
 801edf6:	6063      	str	r3, [r4, #4]
  /* ackno is set in tcp_output */
  TCPH_HDRLEN_FLAGS_SET(seg->tcphdr, (5 + optlen / 4), hdrflags);
 801edf8:	7dfb      	ldrb	r3, [r7, #23]
 801edfa:	089b      	lsrs	r3, r3, #2
 801edfc:	b2db      	uxtb	r3, r3
 801edfe:	3305      	adds	r3, #5
 801ee00:	b29b      	uxth	r3, r3
 801ee02:	031b      	lsls	r3, r3, #12
 801ee04:	b29a      	uxth	r2, r3
 801ee06:	79fb      	ldrb	r3, [r7, #7]
 801ee08:	b29b      	uxth	r3, r3
 801ee0a:	4313      	orrs	r3, r2
 801ee0c:	b29a      	uxth	r2, r3
 801ee0e:	693b      	ldr	r3, [r7, #16]
 801ee10:	691c      	ldr	r4, [r3, #16]
 801ee12:	4610      	mov	r0, r2
 801ee14:	f7f9 fe88 	bl	8018b28 <lwip_htons>
 801ee18:	4603      	mov	r3, r0
 801ee1a:	81a3      	strh	r3, [r4, #12]
  /* wnd and chksum are set in tcp_output */
  seg->tcphdr->urgp = 0;
 801ee1c:	693b      	ldr	r3, [r7, #16]
 801ee1e:	691b      	ldr	r3, [r3, #16]
 801ee20:	2200      	movs	r2, #0
 801ee22:	749a      	strb	r2, [r3, #18]
 801ee24:	2200      	movs	r2, #0
 801ee26:	74da      	strb	r2, [r3, #19]
  return seg;
 801ee28:	693b      	ldr	r3, [r7, #16]
}
 801ee2a:	4618      	mov	r0, r3
 801ee2c:	371c      	adds	r7, #28
 801ee2e:	46bd      	mov	sp, r7
 801ee30:	bd90      	pop	{r4, r7, pc}
 801ee32:	bf00      	nop
 801ee34:	0802f1d8 	.word	0x0802f1d8
 801ee38:	0802f20c 	.word	0x0802f20c
 801ee3c:	0802f22c 	.word	0x0802f22c
 801ee40:	0802f254 	.word	0x0802f254
 801ee44:	0802f278 	.word	0x0802f278

0801ee48 <tcp_pbuf_prealloc>:
#if TCP_OVERSIZE
static struct pbuf *
tcp_pbuf_prealloc(pbuf_layer layer, u16_t length, u16_t max_length,
                  u16_t *oversize, const struct tcp_pcb *pcb, u8_t apiflags,
                  u8_t first_seg)
{
 801ee48:	b580      	push	{r7, lr}
 801ee4a:	b086      	sub	sp, #24
 801ee4c:	af00      	add	r7, sp, #0
 801ee4e:	607b      	str	r3, [r7, #4]
 801ee50:	4603      	mov	r3, r0
 801ee52:	73fb      	strb	r3, [r7, #15]
 801ee54:	460b      	mov	r3, r1
 801ee56:	81bb      	strh	r3, [r7, #12]
 801ee58:	4613      	mov	r3, r2
 801ee5a:	817b      	strh	r3, [r7, #10]
  struct pbuf *p;
  u16_t alloc = length;
 801ee5c:	89bb      	ldrh	r3, [r7, #12]
 801ee5e:	82fb      	strh	r3, [r7, #22]

  LWIP_ASSERT("tcp_pbuf_prealloc: invalid oversize", oversize != NULL);
 801ee60:	687b      	ldr	r3, [r7, #4]
 801ee62:	2b00      	cmp	r3, #0
 801ee64:	d105      	bne.n	801ee72 <tcp_pbuf_prealloc+0x2a>
 801ee66:	4b30      	ldr	r3, [pc, #192]	@ (801ef28 <tcp_pbuf_prealloc+0xe0>)
 801ee68:	22e8      	movs	r2, #232	@ 0xe8
 801ee6a:	4930      	ldr	r1, [pc, #192]	@ (801ef2c <tcp_pbuf_prealloc+0xe4>)
 801ee6c:	4830      	ldr	r0, [pc, #192]	@ (801ef30 <tcp_pbuf_prealloc+0xe8>)
 801ee6e:	f00a fdb5 	bl	80299dc <iprintf>
  LWIP_ASSERT("tcp_pbuf_prealloc: invalid pcb", pcb != NULL);
 801ee72:	6a3b      	ldr	r3, [r7, #32]
 801ee74:	2b00      	cmp	r3, #0
 801ee76:	d105      	bne.n	801ee84 <tcp_pbuf_prealloc+0x3c>
 801ee78:	4b2b      	ldr	r3, [pc, #172]	@ (801ef28 <tcp_pbuf_prealloc+0xe0>)
 801ee7a:	22e9      	movs	r2, #233	@ 0xe9
 801ee7c:	492d      	ldr	r1, [pc, #180]	@ (801ef34 <tcp_pbuf_prealloc+0xec>)
 801ee7e:	482c      	ldr	r0, [pc, #176]	@ (801ef30 <tcp_pbuf_prealloc+0xe8>)
 801ee80:	f00a fdac 	bl	80299dc <iprintf>
  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(apiflags);
  LWIP_UNUSED_ARG(first_seg);
  alloc = max_length;
#else /* LWIP_NETIF_TX_SINGLE_PBUF */
  if (length < max_length) {
 801ee84:	89ba      	ldrh	r2, [r7, #12]
 801ee86:	897b      	ldrh	r3, [r7, #10]
 801ee88:	429a      	cmp	r2, r3
 801ee8a:	d221      	bcs.n	801eed0 <tcp_pbuf_prealloc+0x88>
     *
     * Did the user set TCP_WRITE_FLAG_MORE?
     *
     * Will the Nagle algorithm defer transmission of this segment?
     */
    if ((apiflags & TCP_WRITE_FLAG_MORE) ||
 801ee8c:	f897 3024 	ldrb.w	r3, [r7, #36]	@ 0x24
 801ee90:	f003 0302 	and.w	r3, r3, #2
 801ee94:	2b00      	cmp	r3, #0
 801ee96:	d111      	bne.n	801eebc <tcp_pbuf_prealloc+0x74>
        (!(pcb->flags & TF_NODELAY) &&
 801ee98:	6a3b      	ldr	r3, [r7, #32]
 801ee9a:	8b5b      	ldrh	r3, [r3, #26]
 801ee9c:	f003 0340 	and.w	r3, r3, #64	@ 0x40
    if ((apiflags & TCP_WRITE_FLAG_MORE) ||
 801eea0:	2b00      	cmp	r3, #0
 801eea2:	d115      	bne.n	801eed0 <tcp_pbuf_prealloc+0x88>
        (!(pcb->flags & TF_NODELAY) &&
 801eea4:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 801eea8:	2b00      	cmp	r3, #0
 801eeaa:	d007      	beq.n	801eebc <tcp_pbuf_prealloc+0x74>
         (!first_seg ||
          pcb->unsent != NULL ||
 801eeac:	6a3b      	ldr	r3, [r7, #32]
 801eeae:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
         (!first_seg ||
 801eeb0:	2b00      	cmp	r3, #0
 801eeb2:	d103      	bne.n	801eebc <tcp_pbuf_prealloc+0x74>
          pcb->unacked != NULL))) {
 801eeb4:	6a3b      	ldr	r3, [r7, #32]
 801eeb6:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
          pcb->unsent != NULL ||
 801eeb8:	2b00      	cmp	r3, #0
 801eeba:	d009      	beq.n	801eed0 <tcp_pbuf_prealloc+0x88>
      alloc = LWIP_MIN(max_length, LWIP_MEM_ALIGN_SIZE(TCP_OVERSIZE_CALC_LENGTH(length)));
 801eebc:	89bb      	ldrh	r3, [r7, #12]
 801eebe:	f203 53b7 	addw	r3, r3, #1463	@ 0x5b7
 801eec2:	f023 0203 	bic.w	r2, r3, #3
 801eec6:	897b      	ldrh	r3, [r7, #10]
 801eec8:	4293      	cmp	r3, r2
 801eeca:	bf28      	it	cs
 801eecc:	4613      	movcs	r3, r2
 801eece:	82fb      	strh	r3, [r7, #22]
    }
  }
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
  p = pbuf_alloc(layer, alloc, PBUF_RAM);
 801eed0:	8af9      	ldrh	r1, [r7, #22]
 801eed2:	7bfb      	ldrb	r3, [r7, #15]
 801eed4:	f44f 7220 	mov.w	r2, #640	@ 0x280
 801eed8:	4618      	mov	r0, r3
 801eeda:	f7fa fff1 	bl	8019ec0 <pbuf_alloc>
 801eede:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 801eee0:	693b      	ldr	r3, [r7, #16]
 801eee2:	2b00      	cmp	r3, #0
 801eee4:	d101      	bne.n	801eeea <tcp_pbuf_prealloc+0xa2>
    return NULL;
 801eee6:	2300      	movs	r3, #0
 801eee8:	e019      	b.n	801ef1e <tcp_pbuf_prealloc+0xd6>
  }
  LWIP_ASSERT("need unchained pbuf", p->next == NULL);
 801eeea:	693b      	ldr	r3, [r7, #16]
 801eeec:	681b      	ldr	r3, [r3, #0]
 801eeee:	2b00      	cmp	r3, #0
 801eef0:	d006      	beq.n	801ef00 <tcp_pbuf_prealloc+0xb8>
 801eef2:	4b0d      	ldr	r3, [pc, #52]	@ (801ef28 <tcp_pbuf_prealloc+0xe0>)
 801eef4:	f240 120b 	movw	r2, #267	@ 0x10b
 801eef8:	490f      	ldr	r1, [pc, #60]	@ (801ef38 <tcp_pbuf_prealloc+0xf0>)
 801eefa:	480d      	ldr	r0, [pc, #52]	@ (801ef30 <tcp_pbuf_prealloc+0xe8>)
 801eefc:	f00a fd6e 	bl	80299dc <iprintf>
  *oversize = p->len - length;
 801ef00:	693b      	ldr	r3, [r7, #16]
 801ef02:	895a      	ldrh	r2, [r3, #10]
 801ef04:	89bb      	ldrh	r3, [r7, #12]
 801ef06:	1ad3      	subs	r3, r2, r3
 801ef08:	b29a      	uxth	r2, r3
 801ef0a:	687b      	ldr	r3, [r7, #4]
 801ef0c:	801a      	strh	r2, [r3, #0]
  /* trim p->len to the currently used size */
  p->len = p->tot_len = length;
 801ef0e:	693b      	ldr	r3, [r7, #16]
 801ef10:	89ba      	ldrh	r2, [r7, #12]
 801ef12:	811a      	strh	r2, [r3, #8]
 801ef14:	693b      	ldr	r3, [r7, #16]
 801ef16:	891a      	ldrh	r2, [r3, #8]
 801ef18:	693b      	ldr	r3, [r7, #16]
 801ef1a:	815a      	strh	r2, [r3, #10]
  return p;
 801ef1c:	693b      	ldr	r3, [r7, #16]
}
 801ef1e:	4618      	mov	r0, r3
 801ef20:	3718      	adds	r7, #24
 801ef22:	46bd      	mov	sp, r7
 801ef24:	bd80      	pop	{r7, pc}
 801ef26:	bf00      	nop
 801ef28:	0802f1d8 	.word	0x0802f1d8
 801ef2c:	0802f290 	.word	0x0802f290
 801ef30:	0802f22c 	.word	0x0802f22c
 801ef34:	0802f2b4 	.word	0x0802f2b4
 801ef38:	0802f2d4 	.word	0x0802f2d4

0801ef3c <tcp_write_checks>:
 * @param len length of data to send (checked agains snd_buf)
 * @return ERR_OK if tcp_write is allowed to proceed, another err_t otherwise
 */
static err_t
tcp_write_checks(struct tcp_pcb *pcb, u16_t len)
{
 801ef3c:	b580      	push	{r7, lr}
 801ef3e:	b082      	sub	sp, #8
 801ef40:	af00      	add	r7, sp, #0
 801ef42:	6078      	str	r0, [r7, #4]
 801ef44:	460b      	mov	r3, r1
 801ef46:	807b      	strh	r3, [r7, #2]
  LWIP_ASSERT("tcp_write_checks: invalid pcb", pcb != NULL);
 801ef48:	687b      	ldr	r3, [r7, #4]
 801ef4a:	2b00      	cmp	r3, #0
 801ef4c:	d106      	bne.n	801ef5c <tcp_write_checks+0x20>
 801ef4e:	4b33      	ldr	r3, [pc, #204]	@ (801f01c <tcp_write_checks+0xe0>)
 801ef50:	f240 1233 	movw	r2, #307	@ 0x133
 801ef54:	4932      	ldr	r1, [pc, #200]	@ (801f020 <tcp_write_checks+0xe4>)
 801ef56:	4833      	ldr	r0, [pc, #204]	@ (801f024 <tcp_write_checks+0xe8>)
 801ef58:	f00a fd40 	bl	80299dc <iprintf>

  /* connection is in invalid state for data transmission? */
  if ((pcb->state != ESTABLISHED) &&
 801ef5c:	687b      	ldr	r3, [r7, #4]
 801ef5e:	7d1b      	ldrb	r3, [r3, #20]
 801ef60:	2b04      	cmp	r3, #4
 801ef62:	d00e      	beq.n	801ef82 <tcp_write_checks+0x46>
      (pcb->state != CLOSE_WAIT) &&
 801ef64:	687b      	ldr	r3, [r7, #4]
 801ef66:	7d1b      	ldrb	r3, [r3, #20]
  if ((pcb->state != ESTABLISHED) &&
 801ef68:	2b07      	cmp	r3, #7
 801ef6a:	d00a      	beq.n	801ef82 <tcp_write_checks+0x46>
      (pcb->state != SYN_SENT) &&
 801ef6c:	687b      	ldr	r3, [r7, #4]
 801ef6e:	7d1b      	ldrb	r3, [r3, #20]
      (pcb->state != CLOSE_WAIT) &&
 801ef70:	2b02      	cmp	r3, #2
 801ef72:	d006      	beq.n	801ef82 <tcp_write_checks+0x46>
      (pcb->state != SYN_RCVD)) {
 801ef74:	687b      	ldr	r3, [r7, #4]
 801ef76:	7d1b      	ldrb	r3, [r3, #20]
      (pcb->state != SYN_SENT) &&
 801ef78:	2b03      	cmp	r3, #3
 801ef7a:	d002      	beq.n	801ef82 <tcp_write_checks+0x46>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_STATE | LWIP_DBG_LEVEL_SEVERE, ("tcp_write() called in invalid state\n"));
    return ERR_CONN;
 801ef7c:	f06f 030a 	mvn.w	r3, #10
 801ef80:	e048      	b.n	801f014 <tcp_write_checks+0xd8>
  } else if (len == 0) {
 801ef82:	887b      	ldrh	r3, [r7, #2]
 801ef84:	2b00      	cmp	r3, #0
 801ef86:	d101      	bne.n	801ef8c <tcp_write_checks+0x50>
    return ERR_OK;
 801ef88:	2300      	movs	r3, #0
 801ef8a:	e043      	b.n	801f014 <tcp_write_checks+0xd8>
  }

  /* fail on too much data */
  if (len > pcb->snd_buf) {
 801ef8c:	687b      	ldr	r3, [r7, #4]
 801ef8e:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 801ef92:	887a      	ldrh	r2, [r7, #2]
 801ef94:	429a      	cmp	r2, r3
 801ef96:	d909      	bls.n	801efac <tcp_write_checks+0x70>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too much data (len=%"U16_F" > snd_buf=%"TCPWNDSIZE_F")\n",
                len, pcb->snd_buf));
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801ef98:	687b      	ldr	r3, [r7, #4]
 801ef9a:	8b5b      	ldrh	r3, [r3, #26]
 801ef9c:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801efa0:	b29a      	uxth	r2, r3
 801efa2:	687b      	ldr	r3, [r7, #4]
 801efa4:	835a      	strh	r2, [r3, #26]
    return ERR_MEM;
 801efa6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801efaa:	e033      	b.n	801f014 <tcp_write_checks+0xd8>
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: queuelen: %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen));

  /* If total number of pbufs on the unsent/unacked queues exceeds the
   * configured maximum, return an error */
  /* check for configured max queuelen and possible overflow */
  if (pcb->snd_queuelen >= LWIP_MIN(TCP_SND_QUEUELEN, (TCP_SNDQUEUELEN_OVERFLOW + 1))) {
 801efac:	687b      	ldr	r3, [r7, #4]
 801efae:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801efb2:	2b0f      	cmp	r3, #15
 801efb4:	d909      	bls.n	801efca <tcp_write_checks+0x8e>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too long queue %"U16_F" (max %"U16_F")\n",
                pcb->snd_queuelen, (u16_t)TCP_SND_QUEUELEN));
    TCP_STATS_INC(tcp.memerr);
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801efb6:	687b      	ldr	r3, [r7, #4]
 801efb8:	8b5b      	ldrh	r3, [r3, #26]
 801efba:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801efbe:	b29a      	uxth	r2, r3
 801efc0:	687b      	ldr	r3, [r7, #4]
 801efc2:	835a      	strh	r2, [r3, #26]
    return ERR_MEM;
 801efc4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801efc8:	e024      	b.n	801f014 <tcp_write_checks+0xd8>
  }
  if (pcb->snd_queuelen != 0) {
 801efca:	687b      	ldr	r3, [r7, #4]
 801efcc:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801efd0:	2b00      	cmp	r3, #0
 801efd2:	d00f      	beq.n	801eff4 <tcp_write_checks+0xb8>
    LWIP_ASSERT("tcp_write: pbufs on queue => at least one queue non-empty",
 801efd4:	687b      	ldr	r3, [r7, #4]
 801efd6:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801efd8:	2b00      	cmp	r3, #0
 801efda:	d11a      	bne.n	801f012 <tcp_write_checks+0xd6>
 801efdc:	687b      	ldr	r3, [r7, #4]
 801efde:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801efe0:	2b00      	cmp	r3, #0
 801efe2:	d116      	bne.n	801f012 <tcp_write_checks+0xd6>
 801efe4:	4b0d      	ldr	r3, [pc, #52]	@ (801f01c <tcp_write_checks+0xe0>)
 801efe6:	f240 1255 	movw	r2, #341	@ 0x155
 801efea:	490f      	ldr	r1, [pc, #60]	@ (801f028 <tcp_write_checks+0xec>)
 801efec:	480d      	ldr	r0, [pc, #52]	@ (801f024 <tcp_write_checks+0xe8>)
 801efee:	f00a fcf5 	bl	80299dc <iprintf>
 801eff2:	e00e      	b.n	801f012 <tcp_write_checks+0xd6>
                pcb->unacked != NULL || pcb->unsent != NULL);
  } else {
    LWIP_ASSERT("tcp_write: no pbufs on queue => both queues empty",
 801eff4:	687b      	ldr	r3, [r7, #4]
 801eff6:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801eff8:	2b00      	cmp	r3, #0
 801effa:	d103      	bne.n	801f004 <tcp_write_checks+0xc8>
 801effc:	687b      	ldr	r3, [r7, #4]
 801effe:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f000:	2b00      	cmp	r3, #0
 801f002:	d006      	beq.n	801f012 <tcp_write_checks+0xd6>
 801f004:	4b05      	ldr	r3, [pc, #20]	@ (801f01c <tcp_write_checks+0xe0>)
 801f006:	f44f 72ac 	mov.w	r2, #344	@ 0x158
 801f00a:	4908      	ldr	r1, [pc, #32]	@ (801f02c <tcp_write_checks+0xf0>)
 801f00c:	4805      	ldr	r0, [pc, #20]	@ (801f024 <tcp_write_checks+0xe8>)
 801f00e:	f00a fce5 	bl	80299dc <iprintf>
                pcb->unacked == NULL && pcb->unsent == NULL);
  }
  return ERR_OK;
 801f012:	2300      	movs	r3, #0
}
 801f014:	4618      	mov	r0, r3
 801f016:	3708      	adds	r7, #8
 801f018:	46bd      	mov	sp, r7
 801f01a:	bd80      	pop	{r7, pc}
 801f01c:	0802f1d8 	.word	0x0802f1d8
 801f020:	0802f2e8 	.word	0x0802f2e8
 801f024:	0802f22c 	.word	0x0802f22c
 801f028:	0802f308 	.word	0x0802f308
 801f02c:	0802f344 	.word	0x0802f344

0801f030 <tcp_write>:
 * - TCP_WRITE_FLAG_MORE (0x02) for TCP connection, PSH flag will not be set on last segment sent,
 * @return ERR_OK if enqueued, another err_t on error
 */
err_t
tcp_write(struct tcp_pcb *pcb, const void *arg, u16_t len, u8_t apiflags)
{
 801f030:	b590      	push	{r4, r7, lr}
 801f032:	b09d      	sub	sp, #116	@ 0x74
 801f034:	af04      	add	r7, sp, #16
 801f036:	60f8      	str	r0, [r7, #12]
 801f038:	60b9      	str	r1, [r7, #8]
 801f03a:	4611      	mov	r1, r2
 801f03c:	461a      	mov	r2, r3
 801f03e:	460b      	mov	r3, r1
 801f040:	80fb      	strh	r3, [r7, #6]
 801f042:	4613      	mov	r3, r2
 801f044:	717b      	strb	r3, [r7, #5]
  struct pbuf *concat_p = NULL;
 801f046:	2300      	movs	r3, #0
 801f048:	63fb      	str	r3, [r7, #60]	@ 0x3c
  struct tcp_seg *last_unsent = NULL, *seg = NULL, *prev_seg = NULL, *queue = NULL;
 801f04a:	2300      	movs	r3, #0
 801f04c:	643b      	str	r3, [r7, #64]	@ 0x40
 801f04e:	2300      	movs	r3, #0
 801f050:	657b      	str	r3, [r7, #84]	@ 0x54
 801f052:	2300      	movs	r3, #0
 801f054:	653b      	str	r3, [r7, #80]	@ 0x50
 801f056:	2300      	movs	r3, #0
 801f058:	64fb      	str	r3, [r7, #76]	@ 0x4c
  u16_t pos = 0; /* position in 'arg' data */
 801f05a:	2300      	movs	r3, #0
 801f05c:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
  u16_t queuelen;
  u8_t optlen;
  u8_t optflags = 0;
 801f060:	2300      	movs	r3, #0
 801f062:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
#if TCP_OVERSIZE
  u16_t oversize = 0;
 801f066:	2300      	movs	r3, #0
 801f068:	82fb      	strh	r3, [r7, #22]
  u16_t oversize_used = 0;
 801f06a:	2300      	movs	r3, #0
 801f06c:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
#if TCP_OVERSIZE_DBGCHECK
  u16_t oversize_add = 0;
 801f070:	2300      	movs	r3, #0
 801f072:	f8a7 305a 	strh.w	r3, [r7, #90]	@ 0x5a
#endif /* TCP_OVERSIZE_DBGCHECK*/
#endif /* TCP_OVERSIZE */
  u16_t extendlen = 0;
 801f076:	2300      	movs	r3, #0
 801f078:	f8a7 305e 	strh.w	r3, [r7, #94]	@ 0x5e
  u16_t concat_chksummed = 0;
#endif /* TCP_CHECKSUM_ON_COPY */
  err_t err;
  u16_t mss_local;

  LWIP_ERROR("tcp_write: invalid pcb", pcb != NULL, return ERR_ARG);
 801f07c:	68fb      	ldr	r3, [r7, #12]
 801f07e:	2b00      	cmp	r3, #0
 801f080:	d109      	bne.n	801f096 <tcp_write+0x66>
 801f082:	4b9d      	ldr	r3, [pc, #628]	@ (801f2f8 <tcp_write+0x2c8>)
 801f084:	f44f 72cf 	mov.w	r2, #414	@ 0x19e
 801f088:	499c      	ldr	r1, [pc, #624]	@ (801f2fc <tcp_write+0x2cc>)
 801f08a:	489d      	ldr	r0, [pc, #628]	@ (801f300 <tcp_write+0x2d0>)
 801f08c:	f00a fca6 	bl	80299dc <iprintf>
 801f090:	f06f 030f 	mvn.w	r3, #15
 801f094:	e37b      	b.n	801f78e <tcp_write+0x75e>

  /* don't allocate segments bigger than half the maximum window we ever received */
  mss_local = LWIP_MIN(pcb->mss, TCPWND_MIN16(pcb->snd_wnd_max / 2));
 801f096:	68fb      	ldr	r3, [r7, #12]
 801f098:	f8b3 3062 	ldrh.w	r3, [r3, #98]	@ 0x62
 801f09c:	085b      	lsrs	r3, r3, #1
 801f09e:	b29a      	uxth	r2, r3
 801f0a0:	68fb      	ldr	r3, [r7, #12]
 801f0a2:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801f0a4:	4293      	cmp	r3, r2
 801f0a6:	bf28      	it	cs
 801f0a8:	4613      	movcs	r3, r2
 801f0aa:	853b      	strh	r3, [r7, #40]	@ 0x28
  mss_local = mss_local ? mss_local : pcb->mss;
 801f0ac:	8d3b      	ldrh	r3, [r7, #40]	@ 0x28
 801f0ae:	2b00      	cmp	r3, #0
 801f0b0:	d102      	bne.n	801f0b8 <tcp_write+0x88>
 801f0b2:	68fb      	ldr	r3, [r7, #12]
 801f0b4:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801f0b6:	e000      	b.n	801f0ba <tcp_write+0x8a>
 801f0b8:	8d3b      	ldrh	r3, [r7, #40]	@ 0x28
 801f0ba:	853b      	strh	r3, [r7, #40]	@ 0x28

  LWIP_ASSERT_CORE_LOCKED();
 801f0bc:	f7f1 fa42 	bl	8010544 <sys_check_core_locking>
  apiflags |= TCP_WRITE_FLAG_COPY;
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */

  LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_write(pcb=%p, data=%p, len=%"U16_F", apiflags=%"U16_F")\n",
                                 (void *)pcb, arg, len, (u16_t)apiflags));
  LWIP_ERROR("tcp_write: arg == NULL (programmer violates API)",
 801f0c0:	68bb      	ldr	r3, [r7, #8]
 801f0c2:	2b00      	cmp	r3, #0
 801f0c4:	d109      	bne.n	801f0da <tcp_write+0xaa>
 801f0c6:	4b8c      	ldr	r3, [pc, #560]	@ (801f2f8 <tcp_write+0x2c8>)
 801f0c8:	f240 12ad 	movw	r2, #429	@ 0x1ad
 801f0cc:	498d      	ldr	r1, [pc, #564]	@ (801f304 <tcp_write+0x2d4>)
 801f0ce:	488c      	ldr	r0, [pc, #560]	@ (801f300 <tcp_write+0x2d0>)
 801f0d0:	f00a fc84 	bl	80299dc <iprintf>
 801f0d4:	f06f 030f 	mvn.w	r3, #15
 801f0d8:	e359      	b.n	801f78e <tcp_write+0x75e>
             arg != NULL, return ERR_ARG;);

  err = tcp_write_checks(pcb, len);
 801f0da:	88fb      	ldrh	r3, [r7, #6]
 801f0dc:	4619      	mov	r1, r3
 801f0de:	68f8      	ldr	r0, [r7, #12]
 801f0e0:	f7ff ff2c 	bl	801ef3c <tcp_write_checks>
 801f0e4:	4603      	mov	r3, r0
 801f0e6:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
  if (err != ERR_OK) {
 801f0ea:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 801f0ee:	2b00      	cmp	r3, #0
 801f0f0:	d002      	beq.n	801f0f8 <tcp_write+0xc8>
    return err;
 801f0f2:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 801f0f6:	e34a      	b.n	801f78e <tcp_write+0x75e>
  }
  queuelen = pcb->snd_queuelen;
 801f0f8:	68fb      	ldr	r3, [r7, #12]
 801f0fa:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f0fe:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
    /* ensure that segments can hold at least one data byte... */
    mss_local = LWIP_MAX(mss_local, LWIP_TCP_OPT_LEN_TS + 1);
  } else
#endif /* LWIP_TCP_TIMESTAMPS */
  {
    optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 801f102:	2300      	movs	r3, #0
 801f104:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
   *
   * pos records progress as data is segmented.
   */

  /* Find the tail of the unsent queue. */
  if (pcb->unsent != NULL) {
 801f108:	68fb      	ldr	r3, [r7, #12]
 801f10a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f10c:	2b00      	cmp	r3, #0
 801f10e:	f000 8127 	beq.w	801f360 <tcp_write+0x330>
    u16_t space;
    u16_t unsent_optlen;

    /* @todo: this could be sped up by keeping last_unsent in the pcb */
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 801f112:	68fb      	ldr	r3, [r7, #12]
 801f114:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f116:	643b      	str	r3, [r7, #64]	@ 0x40
 801f118:	e002      	b.n	801f120 <tcp_write+0xf0>
         last_unsent = last_unsent->next);
 801f11a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f11c:	681b      	ldr	r3, [r3, #0]
 801f11e:	643b      	str	r3, [r7, #64]	@ 0x40
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 801f120:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f122:	681b      	ldr	r3, [r3, #0]
 801f124:	2b00      	cmp	r3, #0
 801f126:	d1f8      	bne.n	801f11a <tcp_write+0xea>

    /* Usable space at the end of the last unsent segment */
    unsent_optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(last_unsent->flags, pcb);
 801f128:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f12a:	7b1b      	ldrb	r3, [r3, #12]
 801f12c:	009b      	lsls	r3, r3, #2
 801f12e:	b29b      	uxth	r3, r3
 801f130:	f003 0304 	and.w	r3, r3, #4
 801f134:	84bb      	strh	r3, [r7, #36]	@ 0x24
    LWIP_ASSERT("mss_local is too small", mss_local >= last_unsent->len + unsent_optlen);
 801f136:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 801f138:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f13a:	891b      	ldrh	r3, [r3, #8]
 801f13c:	4619      	mov	r1, r3
 801f13e:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 801f140:	440b      	add	r3, r1
 801f142:	429a      	cmp	r2, r3
 801f144:	da06      	bge.n	801f154 <tcp_write+0x124>
 801f146:	4b6c      	ldr	r3, [pc, #432]	@ (801f2f8 <tcp_write+0x2c8>)
 801f148:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 801f14c:	496e      	ldr	r1, [pc, #440]	@ (801f308 <tcp_write+0x2d8>)
 801f14e:	486c      	ldr	r0, [pc, #432]	@ (801f300 <tcp_write+0x2d0>)
 801f150:	f00a fc44 	bl	80299dc <iprintf>
    space = mss_local - (last_unsent->len + unsent_optlen);
 801f154:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f156:	891a      	ldrh	r2, [r3, #8]
 801f158:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 801f15a:	4413      	add	r3, r2
 801f15c:	b29b      	uxth	r3, r3
 801f15e:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 801f160:	1ad3      	subs	r3, r2, r3
 801f162:	f8a7 305c 	strh.w	r3, [r7, #92]	@ 0x5c
     * function.
     */
#if TCP_OVERSIZE
#if TCP_OVERSIZE_DBGCHECK
    /* check that pcb->unsent_oversize matches last_unsent->oversize_left */
    LWIP_ASSERT("unsent_oversize mismatch (pcb vs. last_unsent)",
 801f166:	68fb      	ldr	r3, [r7, #12]
 801f168:	f8b3 2068 	ldrh.w	r2, [r3, #104]	@ 0x68
 801f16c:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f16e:	895b      	ldrh	r3, [r3, #10]
 801f170:	429a      	cmp	r2, r3
 801f172:	d006      	beq.n	801f182 <tcp_write+0x152>
 801f174:	4b60      	ldr	r3, [pc, #384]	@ (801f2f8 <tcp_write+0x2c8>)
 801f176:	f240 12f3 	movw	r2, #499	@ 0x1f3
 801f17a:	4964      	ldr	r1, [pc, #400]	@ (801f30c <tcp_write+0x2dc>)
 801f17c:	4860      	ldr	r0, [pc, #384]	@ (801f300 <tcp_write+0x2d0>)
 801f17e:	f00a fc2d 	bl	80299dc <iprintf>
                pcb->unsent_oversize == last_unsent->oversize_left);
#endif /* TCP_OVERSIZE_DBGCHECK */
    oversize = pcb->unsent_oversize;
 801f182:	68fb      	ldr	r3, [r7, #12]
 801f184:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 801f188:	82fb      	strh	r3, [r7, #22]
    if (oversize > 0) {
 801f18a:	8afb      	ldrh	r3, [r7, #22]
 801f18c:	2b00      	cmp	r3, #0
 801f18e:	d02e      	beq.n	801f1ee <tcp_write+0x1be>
      LWIP_ASSERT("inconsistent oversize vs. space", oversize <= space);
 801f190:	8afb      	ldrh	r3, [r7, #22]
 801f192:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801f196:	429a      	cmp	r2, r3
 801f198:	d206      	bcs.n	801f1a8 <tcp_write+0x178>
 801f19a:	4b57      	ldr	r3, [pc, #348]	@ (801f2f8 <tcp_write+0x2c8>)
 801f19c:	f44f 72fc 	mov.w	r2, #504	@ 0x1f8
 801f1a0:	495b      	ldr	r1, [pc, #364]	@ (801f310 <tcp_write+0x2e0>)
 801f1a2:	4857      	ldr	r0, [pc, #348]	@ (801f300 <tcp_write+0x2d0>)
 801f1a4:	f00a fc1a 	bl	80299dc <iprintf>
      seg = last_unsent;
 801f1a8:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f1aa:	657b      	str	r3, [r7, #84]	@ 0x54
      oversize_used = LWIP_MIN(space, LWIP_MIN(oversize, len));
 801f1ac:	8afb      	ldrh	r3, [r7, #22]
 801f1ae:	88fa      	ldrh	r2, [r7, #6]
 801f1b0:	4293      	cmp	r3, r2
 801f1b2:	bf28      	it	cs
 801f1b4:	4613      	movcs	r3, r2
 801f1b6:	b29b      	uxth	r3, r3
 801f1b8:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801f1bc:	4293      	cmp	r3, r2
 801f1be:	bf28      	it	cs
 801f1c0:	4613      	movcs	r3, r2
 801f1c2:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      pos += oversize_used;
 801f1c6:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801f1ca:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f1ce:	4413      	add	r3, r2
 801f1d0:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
      oversize -= oversize_used;
 801f1d4:	8afa      	ldrh	r2, [r7, #22]
 801f1d6:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f1da:	1ad3      	subs	r3, r2, r3
 801f1dc:	b29b      	uxth	r3, r3
 801f1de:	82fb      	strh	r3, [r7, #22]
      space -= oversize_used;
 801f1e0:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801f1e4:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f1e8:	1ad3      	subs	r3, r2, r3
 801f1ea:	f8a7 305c 	strh.w	r3, [r7, #92]	@ 0x5c
    }
    /* now we are either finished or oversize is zero */
    LWIP_ASSERT("inconsistent oversize vs. len", (oversize == 0) || (pos == len));
 801f1ee:	8afb      	ldrh	r3, [r7, #22]
 801f1f0:	2b00      	cmp	r3, #0
 801f1f2:	d00b      	beq.n	801f20c <tcp_write+0x1dc>
 801f1f4:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801f1f8:	88fb      	ldrh	r3, [r7, #6]
 801f1fa:	429a      	cmp	r2, r3
 801f1fc:	d006      	beq.n	801f20c <tcp_write+0x1dc>
 801f1fe:	4b3e      	ldr	r3, [pc, #248]	@ (801f2f8 <tcp_write+0x2c8>)
 801f200:	f44f 7200 	mov.w	r2, #512	@ 0x200
 801f204:	4943      	ldr	r1, [pc, #268]	@ (801f314 <tcp_write+0x2e4>)
 801f206:	483e      	ldr	r0, [pc, #248]	@ (801f300 <tcp_write+0x2d0>)
 801f208:	f00a fbe8 	bl	80299dc <iprintf>
     *
     * This phase is skipped for LWIP_NETIF_TX_SINGLE_PBUF as we could only execute
     * it after rexmit puts a segment from unacked to unsent and at this point,
     * oversize info is lost.
     */
    if ((pos < len) && (space > 0) && (last_unsent->len > 0)) {
 801f20c:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801f210:	88fb      	ldrh	r3, [r7, #6]
 801f212:	429a      	cmp	r2, r3
 801f214:	f080 8172 	bcs.w	801f4fc <tcp_write+0x4cc>
 801f218:	f8b7 305c 	ldrh.w	r3, [r7, #92]	@ 0x5c
 801f21c:	2b00      	cmp	r3, #0
 801f21e:	f000 816d 	beq.w	801f4fc <tcp_write+0x4cc>
 801f222:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f224:	891b      	ldrh	r3, [r3, #8]
 801f226:	2b00      	cmp	r3, #0
 801f228:	f000 8168 	beq.w	801f4fc <tcp_write+0x4cc>
      u16_t seglen = LWIP_MIN(space, len - pos);
 801f22c:	88fa      	ldrh	r2, [r7, #6]
 801f22e:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801f232:	1ad2      	subs	r2, r2, r3
 801f234:	f8b7 305c 	ldrh.w	r3, [r7, #92]	@ 0x5c
 801f238:	4293      	cmp	r3, r2
 801f23a:	bfa8      	it	ge
 801f23c:	4613      	movge	r3, r2
 801f23e:	847b      	strh	r3, [r7, #34]	@ 0x22
      seg = last_unsent;
 801f240:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f242:	657b      	str	r3, [r7, #84]	@ 0x54

      /* Create a pbuf with a copy or reference to seglen bytes. We
       * can use PBUF_RAW here since the data appears in the middle of
       * a segment. A header will never be prepended. */
      if (apiflags & TCP_WRITE_FLAG_COPY) {
 801f244:	797b      	ldrb	r3, [r7, #5]
 801f246:	f003 0301 	and.w	r3, r3, #1
 801f24a:	2b00      	cmp	r3, #0
 801f24c:	d02b      	beq.n	801f2a6 <tcp_write+0x276>
        /* Data is copied */
        if ((concat_p = tcp_pbuf_prealloc(PBUF_RAW, seglen, space, &oversize, pcb, apiflags, 1)) == NULL) {
 801f24e:	f107 0016 	add.w	r0, r7, #22
 801f252:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801f256:	8c79      	ldrh	r1, [r7, #34]	@ 0x22
 801f258:	2301      	movs	r3, #1
 801f25a:	9302      	str	r3, [sp, #8]
 801f25c:	797b      	ldrb	r3, [r7, #5]
 801f25e:	9301      	str	r3, [sp, #4]
 801f260:	68fb      	ldr	r3, [r7, #12]
 801f262:	9300      	str	r3, [sp, #0]
 801f264:	4603      	mov	r3, r0
 801f266:	2000      	movs	r0, #0
 801f268:	f7ff fdee 	bl	801ee48 <tcp_pbuf_prealloc>
 801f26c:	63f8      	str	r0, [r7, #60]	@ 0x3c
 801f26e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f270:	2b00      	cmp	r3, #0
 801f272:	f000 825a 	beq.w	801f72a <tcp_write+0x6fa>
                      ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n",
                       seglen));
          goto memerr;
        }
#if TCP_OVERSIZE_DBGCHECK
        oversize_add = oversize;
 801f276:	8afb      	ldrh	r3, [r7, #22]
 801f278:	f8a7 305a 	strh.w	r3, [r7, #90]	@ 0x5a
#endif /* TCP_OVERSIZE_DBGCHECK */
        TCP_DATA_COPY2(concat_p->payload, (const u8_t *)arg + pos, seglen, &concat_chksum, &concat_chksum_swapped);
 801f27c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f27e:	6858      	ldr	r0, [r3, #4]
 801f280:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801f284:	68ba      	ldr	r2, [r7, #8]
 801f286:	4413      	add	r3, r2
 801f288:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801f28a:	4619      	mov	r1, r3
 801f28c:	f00a fe2f 	bl	8029eee <memcpy>
#if TCP_CHECKSUM_ON_COPY
        concat_chksummed += seglen;
#endif /* TCP_CHECKSUM_ON_COPY */
        queuelen += pbuf_clen(concat_p);
 801f290:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 801f292:	f7fb f9b9 	bl	801a608 <pbuf_clen>
 801f296:	4603      	mov	r3, r0
 801f298:	461a      	mov	r2, r3
 801f29a:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 801f29e:	4413      	add	r3, r2
 801f2a0:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
 801f2a4:	e055      	b.n	801f352 <tcp_write+0x322>
      } else {
        /* Data is not copied */
        /* If the last unsent pbuf is of type PBUF_ROM, try to extend it. */
        struct pbuf *p;
        for (p = last_unsent->p; p->next != NULL; p = p->next);
 801f2a6:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f2a8:	685b      	ldr	r3, [r3, #4]
 801f2aa:	63bb      	str	r3, [r7, #56]	@ 0x38
 801f2ac:	e002      	b.n	801f2b4 <tcp_write+0x284>
 801f2ae:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f2b0:	681b      	ldr	r3, [r3, #0]
 801f2b2:	63bb      	str	r3, [r7, #56]	@ 0x38
 801f2b4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f2b6:	681b      	ldr	r3, [r3, #0]
 801f2b8:	2b00      	cmp	r3, #0
 801f2ba:	d1f8      	bne.n	801f2ae <tcp_write+0x27e>
        if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) &&
 801f2bc:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f2be:	7b1b      	ldrb	r3, [r3, #12]
 801f2c0:	f003 03c0 	and.w	r3, r3, #192	@ 0xc0
 801f2c4:	2b00      	cmp	r3, #0
 801f2c6:	d129      	bne.n	801f31c <tcp_write+0x2ec>
            (const u8_t *)p->payload + p->len == (const u8_t *)arg) {
 801f2c8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f2ca:	685b      	ldr	r3, [r3, #4]
 801f2cc:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 801f2ce:	8952      	ldrh	r2, [r2, #10]
 801f2d0:	4413      	add	r3, r2
        if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) &&
 801f2d2:	68ba      	ldr	r2, [r7, #8]
 801f2d4:	429a      	cmp	r2, r3
 801f2d6:	d121      	bne.n	801f31c <tcp_write+0x2ec>
          LWIP_ASSERT("tcp_write: ROM pbufs cannot be oversized", pos == 0);
 801f2d8:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801f2dc:	2b00      	cmp	r3, #0
 801f2de:	d006      	beq.n	801f2ee <tcp_write+0x2be>
 801f2e0:	4b05      	ldr	r3, [pc, #20]	@ (801f2f8 <tcp_write+0x2c8>)
 801f2e2:	f240 2231 	movw	r2, #561	@ 0x231
 801f2e6:	490c      	ldr	r1, [pc, #48]	@ (801f318 <tcp_write+0x2e8>)
 801f2e8:	4805      	ldr	r0, [pc, #20]	@ (801f300 <tcp_write+0x2d0>)
 801f2ea:	f00a fb77 	bl	80299dc <iprintf>
          extendlen = seglen;
 801f2ee:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801f2f0:	f8a7 305e 	strh.w	r3, [r7, #94]	@ 0x5e
 801f2f4:	e02d      	b.n	801f352 <tcp_write+0x322>
 801f2f6:	bf00      	nop
 801f2f8:	0802f1d8 	.word	0x0802f1d8
 801f2fc:	0802f378 	.word	0x0802f378
 801f300:	0802f22c 	.word	0x0802f22c
 801f304:	0802f390 	.word	0x0802f390
 801f308:	0802f3c4 	.word	0x0802f3c4
 801f30c:	0802f3dc 	.word	0x0802f3dc
 801f310:	0802f40c 	.word	0x0802f40c
 801f314:	0802f42c 	.word	0x0802f42c
 801f318:	0802f44c 	.word	0x0802f44c
        } else {
          if ((concat_p = pbuf_alloc(PBUF_RAW, seglen, PBUF_ROM)) == NULL) {
 801f31c:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801f31e:	2201      	movs	r2, #1
 801f320:	4619      	mov	r1, r3
 801f322:	2000      	movs	r0, #0
 801f324:	f7fa fdcc 	bl	8019ec0 <pbuf_alloc>
 801f328:	63f8      	str	r0, [r7, #60]	@ 0x3c
 801f32a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f32c:	2b00      	cmp	r3, #0
 801f32e:	f000 81fe 	beq.w	801f72e <tcp_write+0x6fe>
            LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                        ("tcp_write: could not allocate memory for zero-copy pbuf\n"));
            goto memerr;
          }
          /* reference the non-volatile payload data */
          ((struct pbuf_rom *)concat_p)->payload = (const u8_t *)arg + pos;
 801f332:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801f336:	68ba      	ldr	r2, [r7, #8]
 801f338:	441a      	add	r2, r3
 801f33a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f33c:	605a      	str	r2, [r3, #4]
          queuelen += pbuf_clen(concat_p);
 801f33e:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 801f340:	f7fb f962 	bl	801a608 <pbuf_clen>
 801f344:	4603      	mov	r3, r0
 801f346:	461a      	mov	r2, r3
 801f348:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 801f34c:	4413      	add	r3, r2
 801f34e:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
                           &concat_chksum, &concat_chksum_swapped);
        concat_chksummed += seglen;
#endif /* TCP_CHECKSUM_ON_COPY */
      }

      pos += seglen;
 801f352:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801f356:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801f358:	4413      	add	r3, r2
 801f35a:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
 801f35e:	e0cd      	b.n	801f4fc <tcp_write+0x4cc>
    }
#endif /* !LWIP_NETIF_TX_SINGLE_PBUF */
  } else {
#if TCP_OVERSIZE
    LWIP_ASSERT("unsent_oversize mismatch (pcb->unsent is NULL)",
 801f360:	68fb      	ldr	r3, [r7, #12]
 801f362:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 801f366:	2b00      	cmp	r3, #0
 801f368:	f000 80c8 	beq.w	801f4fc <tcp_write+0x4cc>
 801f36c:	4b72      	ldr	r3, [pc, #456]	@ (801f538 <tcp_write+0x508>)
 801f36e:	f240 224a 	movw	r2, #586	@ 0x24a
 801f372:	4972      	ldr	r1, [pc, #456]	@ (801f53c <tcp_write+0x50c>)
 801f374:	4872      	ldr	r0, [pc, #456]	@ (801f540 <tcp_write+0x510>)
 801f376:	f00a fb31 	bl	80299dc <iprintf>
   * Phase 3: Create new segments.
   *
   * The new segments are chained together in the local 'queue'
   * variable, ready to be appended to pcb->unsent.
   */
  while (pos < len) {
 801f37a:	e0bf      	b.n	801f4fc <tcp_write+0x4cc>
    struct pbuf *p;
    u16_t left = len - pos;
 801f37c:	88fa      	ldrh	r2, [r7, #6]
 801f37e:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801f382:	1ad3      	subs	r3, r2, r3
 801f384:	843b      	strh	r3, [r7, #32]
    u16_t max_len = mss_local - optlen;
 801f386:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801f38a:	b29b      	uxth	r3, r3
 801f38c:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 801f38e:	1ad3      	subs	r3, r2, r3
 801f390:	83fb      	strh	r3, [r7, #30]
    u16_t seglen = LWIP_MIN(left, max_len);
 801f392:	8bfa      	ldrh	r2, [r7, #30]
 801f394:	8c3b      	ldrh	r3, [r7, #32]
 801f396:	4293      	cmp	r3, r2
 801f398:	bf28      	it	cs
 801f39a:	4613      	movcs	r3, r2
 801f39c:	83bb      	strh	r3, [r7, #28]
#if TCP_CHECKSUM_ON_COPY
    u16_t chksum = 0;
    u8_t chksum_swapped = 0;
#endif /* TCP_CHECKSUM_ON_COPY */

    if (apiflags & TCP_WRITE_FLAG_COPY) {
 801f39e:	797b      	ldrb	r3, [r7, #5]
 801f3a0:	f003 0301 	and.w	r3, r3, #1
 801f3a4:	2b00      	cmp	r3, #0
 801f3a6:	d036      	beq.n	801f416 <tcp_write+0x3e6>
      /* If copy is set, memory should be allocated and data copied
       * into pbuf */
      if ((p = tcp_pbuf_prealloc(PBUF_TRANSPORT, seglen + optlen, mss_local, &oversize, pcb, apiflags, queue == NULL)) == NULL) {
 801f3a8:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801f3ac:	b29a      	uxth	r2, r3
 801f3ae:	8bbb      	ldrh	r3, [r7, #28]
 801f3b0:	4413      	add	r3, r2
 801f3b2:	b299      	uxth	r1, r3
 801f3b4:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 801f3b6:	2b00      	cmp	r3, #0
 801f3b8:	bf0c      	ite	eq
 801f3ba:	2301      	moveq	r3, #1
 801f3bc:	2300      	movne	r3, #0
 801f3be:	b2db      	uxtb	r3, r3
 801f3c0:	f107 0016 	add.w	r0, r7, #22
 801f3c4:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 801f3c6:	9302      	str	r3, [sp, #8]
 801f3c8:	797b      	ldrb	r3, [r7, #5]
 801f3ca:	9301      	str	r3, [sp, #4]
 801f3cc:	68fb      	ldr	r3, [r7, #12]
 801f3ce:	9300      	str	r3, [sp, #0]
 801f3d0:	4603      	mov	r3, r0
 801f3d2:	2036      	movs	r0, #54	@ 0x36
 801f3d4:	f7ff fd38 	bl	801ee48 <tcp_pbuf_prealloc>
 801f3d8:	6378      	str	r0, [r7, #52]	@ 0x34
 801f3da:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f3dc:	2b00      	cmp	r3, #0
 801f3de:	f000 81a8 	beq.w	801f732 <tcp_write+0x702>
        LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n", seglen));
        goto memerr;
      }
      LWIP_ASSERT("tcp_write: check that first pbuf can hold the complete seglen",
 801f3e2:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f3e4:	895b      	ldrh	r3, [r3, #10]
 801f3e6:	8bba      	ldrh	r2, [r7, #28]
 801f3e8:	429a      	cmp	r2, r3
 801f3ea:	d906      	bls.n	801f3fa <tcp_write+0x3ca>
 801f3ec:	4b52      	ldr	r3, [pc, #328]	@ (801f538 <tcp_write+0x508>)
 801f3ee:	f240 2266 	movw	r2, #614	@ 0x266
 801f3f2:	4954      	ldr	r1, [pc, #336]	@ (801f544 <tcp_write+0x514>)
 801f3f4:	4852      	ldr	r0, [pc, #328]	@ (801f540 <tcp_write+0x510>)
 801f3f6:	f00a faf1 	bl	80299dc <iprintf>
                  (p->len >= seglen));
      TCP_DATA_COPY2((char *)p->payload + optlen, (const u8_t *)arg + pos, seglen, &chksum, &chksum_swapped);
 801f3fa:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f3fc:	685a      	ldr	r2, [r3, #4]
 801f3fe:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801f402:	18d0      	adds	r0, r2, r3
 801f404:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801f408:	68ba      	ldr	r2, [r7, #8]
 801f40a:	4413      	add	r3, r2
 801f40c:	8bba      	ldrh	r2, [r7, #28]
 801f40e:	4619      	mov	r1, r3
 801f410:	f00a fd6d 	bl	8029eee <memcpy>
 801f414:	e02f      	b.n	801f476 <tcp_write+0x446>
       * sent out on the link (as it has to be ACKed by the remote
       * party) we can safely use PBUF_ROM instead of PBUF_REF here.
       */
      struct pbuf *p2;
#if TCP_OVERSIZE
      LWIP_ASSERT("oversize == 0", oversize == 0);
 801f416:	8afb      	ldrh	r3, [r7, #22]
 801f418:	2b00      	cmp	r3, #0
 801f41a:	d006      	beq.n	801f42a <tcp_write+0x3fa>
 801f41c:	4b46      	ldr	r3, [pc, #280]	@ (801f538 <tcp_write+0x508>)
 801f41e:	f240 2271 	movw	r2, #625	@ 0x271
 801f422:	4949      	ldr	r1, [pc, #292]	@ (801f548 <tcp_write+0x518>)
 801f424:	4846      	ldr	r0, [pc, #280]	@ (801f540 <tcp_write+0x510>)
 801f426:	f00a fad9 	bl	80299dc <iprintf>
#endif /* TCP_OVERSIZE */
      if ((p2 = pbuf_alloc(PBUF_TRANSPORT, seglen, PBUF_ROM)) == NULL) {
 801f42a:	8bbb      	ldrh	r3, [r7, #28]
 801f42c:	2201      	movs	r2, #1
 801f42e:	4619      	mov	r1, r3
 801f430:	2036      	movs	r0, #54	@ 0x36
 801f432:	f7fa fd45 	bl	8019ec0 <pbuf_alloc>
 801f436:	61b8      	str	r0, [r7, #24]
 801f438:	69bb      	ldr	r3, [r7, #24]
 801f43a:	2b00      	cmp	r3, #0
 801f43c:	f000 817b 	beq.w	801f736 <tcp_write+0x706>
        chksum_swapped = 1;
        chksum = SWAP_BYTES_IN_WORD(chksum);
      }
#endif /* TCP_CHECKSUM_ON_COPY */
      /* reference the non-volatile payload data */
      ((struct pbuf_rom *)p2)->payload = (const u8_t *)arg + pos;
 801f440:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801f444:	68ba      	ldr	r2, [r7, #8]
 801f446:	441a      	add	r2, r3
 801f448:	69bb      	ldr	r3, [r7, #24]
 801f44a:	605a      	str	r2, [r3, #4]

      /* Second, allocate a pbuf for the headers. */
      if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) {
 801f44c:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801f450:	b29b      	uxth	r3, r3
 801f452:	f44f 7220 	mov.w	r2, #640	@ 0x280
 801f456:	4619      	mov	r1, r3
 801f458:	2036      	movs	r0, #54	@ 0x36
 801f45a:	f7fa fd31 	bl	8019ec0 <pbuf_alloc>
 801f45e:	6378      	str	r0, [r7, #52]	@ 0x34
 801f460:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f462:	2b00      	cmp	r3, #0
 801f464:	d103      	bne.n	801f46e <tcp_write+0x43e>
        /* If allocation fails, we have to deallocate the data pbuf as
         * well. */
        pbuf_free(p2);
 801f466:	69b8      	ldr	r0, [r7, #24]
 801f468:	f7fb f840 	bl	801a4ec <pbuf_free>
        LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: could not allocate memory for header pbuf\n"));
        goto memerr;
 801f46c:	e166      	b.n	801f73c <tcp_write+0x70c>
      }
      /* Concatenate the headers and data pbufs together. */
      pbuf_cat(p/*header*/, p2/*data*/);
 801f46e:	69b9      	ldr	r1, [r7, #24]
 801f470:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 801f472:	f7fb f909 	bl	801a688 <pbuf_cat>
    }

    queuelen += pbuf_clen(p);
 801f476:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 801f478:	f7fb f8c6 	bl	801a608 <pbuf_clen>
 801f47c:	4603      	mov	r3, r0
 801f47e:	461a      	mov	r2, r3
 801f480:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 801f484:	4413      	add	r3, r2
 801f486:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48

    /* Now that there are more segments queued, we check again if the
     * length of the queue exceeds the configured maximum or
     * overflows. */
    if (queuelen > LWIP_MIN(TCP_SND_QUEUELEN, TCP_SNDQUEUELEN_OVERFLOW)) {
 801f48a:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 801f48e:	2b10      	cmp	r3, #16
 801f490:	d903      	bls.n	801f49a <tcp_write+0x46a>
      LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: queue too long %"U16_F" (%d)\n",
                  queuelen, (int)TCP_SND_QUEUELEN));
      pbuf_free(p);
 801f492:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 801f494:	f7fb f82a 	bl	801a4ec <pbuf_free>
      goto memerr;
 801f498:	e150      	b.n	801f73c <tcp_write+0x70c>
    }

    if ((seg = tcp_create_segment(pcb, p, 0, pcb->snd_lbb + pos, optflags)) == NULL) {
 801f49a:	68fb      	ldr	r3, [r7, #12]
 801f49c:	6dda      	ldr	r2, [r3, #92]	@ 0x5c
 801f49e:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801f4a2:	441a      	add	r2, r3
 801f4a4:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 801f4a8:	9300      	str	r3, [sp, #0]
 801f4aa:	4613      	mov	r3, r2
 801f4ac:	2200      	movs	r2, #0
 801f4ae:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 801f4b0:	68f8      	ldr	r0, [r7, #12]
 801f4b2:	f7ff fc29 	bl	801ed08 <tcp_create_segment>
 801f4b6:	6578      	str	r0, [r7, #84]	@ 0x54
 801f4b8:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801f4ba:	2b00      	cmp	r3, #0
 801f4bc:	f000 813d 	beq.w	801f73a <tcp_write+0x70a>
      goto memerr;
    }
#if TCP_OVERSIZE_DBGCHECK
    seg->oversize_left = oversize;
 801f4c0:	8afa      	ldrh	r2, [r7, #22]
 801f4c2:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801f4c4:	815a      	strh	r2, [r3, #10]
    seg->chksum_swapped = chksum_swapped;
    seg->flags |= TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */

    /* first segment of to-be-queued data? */
    if (queue == NULL) {
 801f4c6:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 801f4c8:	2b00      	cmp	r3, #0
 801f4ca:	d102      	bne.n	801f4d2 <tcp_write+0x4a2>
      queue = seg;
 801f4cc:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801f4ce:	64fb      	str	r3, [r7, #76]	@ 0x4c
 801f4d0:	e00c      	b.n	801f4ec <tcp_write+0x4bc>
    } else {
      /* Attach the segment to the end of the queued segments */
      LWIP_ASSERT("prev_seg != NULL", prev_seg != NULL);
 801f4d2:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 801f4d4:	2b00      	cmp	r3, #0
 801f4d6:	d106      	bne.n	801f4e6 <tcp_write+0x4b6>
 801f4d8:	4b17      	ldr	r3, [pc, #92]	@ (801f538 <tcp_write+0x508>)
 801f4da:	f240 22ab 	movw	r2, #683	@ 0x2ab
 801f4de:	491b      	ldr	r1, [pc, #108]	@ (801f54c <tcp_write+0x51c>)
 801f4e0:	4817      	ldr	r0, [pc, #92]	@ (801f540 <tcp_write+0x510>)
 801f4e2:	f00a fa7b 	bl	80299dc <iprintf>
      prev_seg->next = seg;
 801f4e6:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 801f4e8:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 801f4ea:	601a      	str	r2, [r3, #0]
    }
    /* remember last segment of to-be-queued data for next iteration */
    prev_seg = seg;
 801f4ec:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801f4ee:	653b      	str	r3, [r7, #80]	@ 0x50

    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_TRACE, ("tcp_write: queueing %"U32_F":%"U32_F"\n",
                lwip_ntohl(seg->tcphdr->seqno),
                lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg)));

    pos += seglen;
 801f4f0:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801f4f4:	8bbb      	ldrh	r3, [r7, #28]
 801f4f6:	4413      	add	r3, r2
 801f4f8:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
  while (pos < len) {
 801f4fc:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801f500:	88fb      	ldrh	r3, [r7, #6]
 801f502:	429a      	cmp	r2, r3
 801f504:	f4ff af3a 	bcc.w	801f37c <tcp_write+0x34c>
  /*
   * All three segmentation phases were successful. We can commit the
   * transaction.
   */
#if TCP_OVERSIZE_DBGCHECK
  if ((last_unsent != NULL) && (oversize_add != 0)) {
 801f508:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f50a:	2b00      	cmp	r3, #0
 801f50c:	d00b      	beq.n	801f526 <tcp_write+0x4f6>
 801f50e:	f8b7 305a 	ldrh.w	r3, [r7, #90]	@ 0x5a
 801f512:	2b00      	cmp	r3, #0
 801f514:	d007      	beq.n	801f526 <tcp_write+0x4f6>
    last_unsent->oversize_left += oversize_add;
 801f516:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f518:	895a      	ldrh	r2, [r3, #10]
 801f51a:	f8b7 305a 	ldrh.w	r3, [r7, #90]	@ 0x5a
 801f51e:	4413      	add	r3, r2
 801f520:	b29a      	uxth	r2, r3
 801f522:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f524:	815a      	strh	r2, [r3, #10]
  /*
   * Phase 1: If data has been added to the preallocated tail of
   * last_unsent, we update the length fields of the pbuf chain.
   */
#if TCP_OVERSIZE
  if (oversize_used > 0) {
 801f526:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f52a:	2b00      	cmp	r3, #0
 801f52c:	d052      	beq.n	801f5d4 <tcp_write+0x5a4>
    struct pbuf *p;
    /* Bump tot_len of whole chain, len of tail */
    for (p = last_unsent->p; p; p = p->next) {
 801f52e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f530:	685b      	ldr	r3, [r3, #4]
 801f532:	633b      	str	r3, [r7, #48]	@ 0x30
 801f534:	e02e      	b.n	801f594 <tcp_write+0x564>
 801f536:	bf00      	nop
 801f538:	0802f1d8 	.word	0x0802f1d8
 801f53c:	0802f478 	.word	0x0802f478
 801f540:	0802f22c 	.word	0x0802f22c
 801f544:	0802f4a8 	.word	0x0802f4a8
 801f548:	0802f4e8 	.word	0x0802f4e8
 801f54c:	0802f4f8 	.word	0x0802f4f8
      p->tot_len += oversize_used;
 801f550:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f552:	891a      	ldrh	r2, [r3, #8]
 801f554:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f558:	4413      	add	r3, r2
 801f55a:	b29a      	uxth	r2, r3
 801f55c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f55e:	811a      	strh	r2, [r3, #8]
      if (p->next == NULL) {
 801f560:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f562:	681b      	ldr	r3, [r3, #0]
 801f564:	2b00      	cmp	r3, #0
 801f566:	d112      	bne.n	801f58e <tcp_write+0x55e>
        TCP_DATA_COPY((char *)p->payload + p->len, arg, oversize_used, last_unsent);
 801f568:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f56a:	685b      	ldr	r3, [r3, #4]
 801f56c:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 801f56e:	8952      	ldrh	r2, [r2, #10]
 801f570:	4413      	add	r3, r2
 801f572:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 801f576:	68b9      	ldr	r1, [r7, #8]
 801f578:	4618      	mov	r0, r3
 801f57a:	f00a fcb8 	bl	8029eee <memcpy>
        p->len += oversize_used;
 801f57e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f580:	895a      	ldrh	r2, [r3, #10]
 801f582:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f586:	4413      	add	r3, r2
 801f588:	b29a      	uxth	r2, r3
 801f58a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f58c:	815a      	strh	r2, [r3, #10]
    for (p = last_unsent->p; p; p = p->next) {
 801f58e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f590:	681b      	ldr	r3, [r3, #0]
 801f592:	633b      	str	r3, [r7, #48]	@ 0x30
 801f594:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f596:	2b00      	cmp	r3, #0
 801f598:	d1da      	bne.n	801f550 <tcp_write+0x520>
      }
    }
    last_unsent->len += oversize_used;
 801f59a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f59c:	891a      	ldrh	r2, [r3, #8]
 801f59e:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f5a2:	4413      	add	r3, r2
 801f5a4:	b29a      	uxth	r2, r3
 801f5a6:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f5a8:	811a      	strh	r2, [r3, #8]
#if TCP_OVERSIZE_DBGCHECK
    LWIP_ASSERT("last_unsent->oversize_left >= oversize_used",
 801f5aa:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f5ac:	895b      	ldrh	r3, [r3, #10]
 801f5ae:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 801f5b2:	429a      	cmp	r2, r3
 801f5b4:	d906      	bls.n	801f5c4 <tcp_write+0x594>
 801f5b6:	4b78      	ldr	r3, [pc, #480]	@ (801f798 <tcp_write+0x768>)
 801f5b8:	f240 22d3 	movw	r2, #723	@ 0x2d3
 801f5bc:	4977      	ldr	r1, [pc, #476]	@ (801f79c <tcp_write+0x76c>)
 801f5be:	4878      	ldr	r0, [pc, #480]	@ (801f7a0 <tcp_write+0x770>)
 801f5c0:	f00a fa0c 	bl	80299dc <iprintf>
                last_unsent->oversize_left >= oversize_used);
    last_unsent->oversize_left -= oversize_used;
 801f5c4:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f5c6:	895a      	ldrh	r2, [r3, #10]
 801f5c8:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f5cc:	1ad3      	subs	r3, r2, r3
 801f5ce:	b29a      	uxth	r2, r3
 801f5d0:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f5d2:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */
  }
  pcb->unsent_oversize = oversize;
 801f5d4:	8afa      	ldrh	r2, [r7, #22]
 801f5d6:	68fb      	ldr	r3, [r7, #12]
 801f5d8:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68

  /*
   * Phase 2: concat_p can be concatenated onto last_unsent->p, unless we
   * determined that the last ROM pbuf can be extended to include the new data.
   */
  if (concat_p != NULL) {
 801f5dc:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f5de:	2b00      	cmp	r3, #0
 801f5e0:	d018      	beq.n	801f614 <tcp_write+0x5e4>
    LWIP_ASSERT("tcp_write: cannot concatenate when pcb->unsent is empty",
 801f5e2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f5e4:	2b00      	cmp	r3, #0
 801f5e6:	d106      	bne.n	801f5f6 <tcp_write+0x5c6>
 801f5e8:	4b6b      	ldr	r3, [pc, #428]	@ (801f798 <tcp_write+0x768>)
 801f5ea:	f44f 7238 	mov.w	r2, #736	@ 0x2e0
 801f5ee:	496d      	ldr	r1, [pc, #436]	@ (801f7a4 <tcp_write+0x774>)
 801f5f0:	486b      	ldr	r0, [pc, #428]	@ (801f7a0 <tcp_write+0x770>)
 801f5f2:	f00a f9f3 	bl	80299dc <iprintf>
                (last_unsent != NULL));
    pbuf_cat(last_unsent->p, concat_p);
 801f5f6:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f5f8:	685b      	ldr	r3, [r3, #4]
 801f5fa:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 801f5fc:	4618      	mov	r0, r3
 801f5fe:	f7fb f843 	bl	801a688 <pbuf_cat>
    last_unsent->len += concat_p->tot_len;
 801f602:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f604:	891a      	ldrh	r2, [r3, #8]
 801f606:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f608:	891b      	ldrh	r3, [r3, #8]
 801f60a:	4413      	add	r3, r2
 801f60c:	b29a      	uxth	r2, r3
 801f60e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f610:	811a      	strh	r2, [r3, #8]
 801f612:	e03c      	b.n	801f68e <tcp_write+0x65e>
  } else if (extendlen > 0) {
 801f614:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801f618:	2b00      	cmp	r3, #0
 801f61a:	d038      	beq.n	801f68e <tcp_write+0x65e>
    struct pbuf *p;
    LWIP_ASSERT("tcp_write: extension of reference requires reference",
 801f61c:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f61e:	2b00      	cmp	r3, #0
 801f620:	d003      	beq.n	801f62a <tcp_write+0x5fa>
 801f622:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f624:	685b      	ldr	r3, [r3, #4]
 801f626:	2b00      	cmp	r3, #0
 801f628:	d106      	bne.n	801f638 <tcp_write+0x608>
 801f62a:	4b5b      	ldr	r3, [pc, #364]	@ (801f798 <tcp_write+0x768>)
 801f62c:	f240 22e6 	movw	r2, #742	@ 0x2e6
 801f630:	495d      	ldr	r1, [pc, #372]	@ (801f7a8 <tcp_write+0x778>)
 801f632:	485b      	ldr	r0, [pc, #364]	@ (801f7a0 <tcp_write+0x770>)
 801f634:	f00a f9d2 	bl	80299dc <iprintf>
                last_unsent != NULL && last_unsent->p != NULL);
    for (p = last_unsent->p; p->next != NULL; p = p->next) {
 801f638:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f63a:	685b      	ldr	r3, [r3, #4]
 801f63c:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801f63e:	e00a      	b.n	801f656 <tcp_write+0x626>
      p->tot_len += extendlen;
 801f640:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f642:	891a      	ldrh	r2, [r3, #8]
 801f644:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801f648:	4413      	add	r3, r2
 801f64a:	b29a      	uxth	r2, r3
 801f64c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f64e:	811a      	strh	r2, [r3, #8]
    for (p = last_unsent->p; p->next != NULL; p = p->next) {
 801f650:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f652:	681b      	ldr	r3, [r3, #0]
 801f654:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801f656:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f658:	681b      	ldr	r3, [r3, #0]
 801f65a:	2b00      	cmp	r3, #0
 801f65c:	d1f0      	bne.n	801f640 <tcp_write+0x610>
    }
    p->tot_len += extendlen;
 801f65e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f660:	891a      	ldrh	r2, [r3, #8]
 801f662:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801f666:	4413      	add	r3, r2
 801f668:	b29a      	uxth	r2, r3
 801f66a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f66c:	811a      	strh	r2, [r3, #8]
    p->len += extendlen;
 801f66e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f670:	895a      	ldrh	r2, [r3, #10]
 801f672:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801f676:	4413      	add	r3, r2
 801f678:	b29a      	uxth	r2, r3
 801f67a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f67c:	815a      	strh	r2, [r3, #10]
    last_unsent->len += extendlen;
 801f67e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f680:	891a      	ldrh	r2, [r3, #8]
 801f682:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801f686:	4413      	add	r3, r2
 801f688:	b29a      	uxth	r2, r3
 801f68a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f68c:	811a      	strh	r2, [r3, #8]

  /*
   * Phase 3: Append queue to pcb->unsent. Queue may be NULL, but that
   * is harmless
   */
  if (last_unsent == NULL) {
 801f68e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f690:	2b00      	cmp	r3, #0
 801f692:	d103      	bne.n	801f69c <tcp_write+0x66c>
    pcb->unsent = queue;
 801f694:	68fb      	ldr	r3, [r7, #12]
 801f696:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
 801f698:	66da      	str	r2, [r3, #108]	@ 0x6c
 801f69a:	e002      	b.n	801f6a2 <tcp_write+0x672>
  } else {
    last_unsent->next = queue;
 801f69c:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f69e:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
 801f6a0:	601a      	str	r2, [r3, #0]
  }

  /*
   * Finally update the pcb state.
   */
  pcb->snd_lbb += len;
 801f6a2:	68fb      	ldr	r3, [r7, #12]
 801f6a4:	6dda      	ldr	r2, [r3, #92]	@ 0x5c
 801f6a6:	88fb      	ldrh	r3, [r7, #6]
 801f6a8:	441a      	add	r2, r3
 801f6aa:	68fb      	ldr	r3, [r7, #12]
 801f6ac:	65da      	str	r2, [r3, #92]	@ 0x5c
  pcb->snd_buf -= len;
 801f6ae:	68fb      	ldr	r3, [r7, #12]
 801f6b0:	f8b3 2064 	ldrh.w	r2, [r3, #100]	@ 0x64
 801f6b4:	88fb      	ldrh	r3, [r7, #6]
 801f6b6:	1ad3      	subs	r3, r2, r3
 801f6b8:	b29a      	uxth	r2, r3
 801f6ba:	68fb      	ldr	r3, [r7, #12]
 801f6bc:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
  pcb->snd_queuelen = queuelen;
 801f6c0:	68fb      	ldr	r3, [r7, #12]
 801f6c2:	f8b7 2048 	ldrh.w	r2, [r7, #72]	@ 0x48
 801f6c6:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: %"S16_F" (after enqueued)\n",
                               pcb->snd_queuelen));
  if (pcb->snd_queuelen != 0) {
 801f6ca:	68fb      	ldr	r3, [r7, #12]
 801f6cc:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f6d0:	2b00      	cmp	r3, #0
 801f6d2:	d00e      	beq.n	801f6f2 <tcp_write+0x6c2>
    LWIP_ASSERT("tcp_write: valid queue length",
 801f6d4:	68fb      	ldr	r3, [r7, #12]
 801f6d6:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801f6d8:	2b00      	cmp	r3, #0
 801f6da:	d10a      	bne.n	801f6f2 <tcp_write+0x6c2>
 801f6dc:	68fb      	ldr	r3, [r7, #12]
 801f6de:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f6e0:	2b00      	cmp	r3, #0
 801f6e2:	d106      	bne.n	801f6f2 <tcp_write+0x6c2>
 801f6e4:	4b2c      	ldr	r3, [pc, #176]	@ (801f798 <tcp_write+0x768>)
 801f6e6:	f240 3212 	movw	r2, #786	@ 0x312
 801f6ea:	4930      	ldr	r1, [pc, #192]	@ (801f7ac <tcp_write+0x77c>)
 801f6ec:	482c      	ldr	r0, [pc, #176]	@ (801f7a0 <tcp_write+0x770>)
 801f6ee:	f00a f975 	bl	80299dc <iprintf>
                pcb->unacked != NULL || pcb->unsent != NULL);
  }

  /* Set the PSH flag in the last segment that we enqueued. */
  if (seg != NULL && seg->tcphdr != NULL && ((apiflags & TCP_WRITE_FLAG_MORE) == 0)) {
 801f6f2:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801f6f4:	2b00      	cmp	r3, #0
 801f6f6:	d016      	beq.n	801f726 <tcp_write+0x6f6>
 801f6f8:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801f6fa:	691b      	ldr	r3, [r3, #16]
 801f6fc:	2b00      	cmp	r3, #0
 801f6fe:	d012      	beq.n	801f726 <tcp_write+0x6f6>
 801f700:	797b      	ldrb	r3, [r7, #5]
 801f702:	f003 0302 	and.w	r3, r3, #2
 801f706:	2b00      	cmp	r3, #0
 801f708:	d10d      	bne.n	801f726 <tcp_write+0x6f6>
    TCPH_SET_FLAG(seg->tcphdr, TCP_PSH);
 801f70a:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801f70c:	691b      	ldr	r3, [r3, #16]
 801f70e:	899b      	ldrh	r3, [r3, #12]
 801f710:	b29c      	uxth	r4, r3
 801f712:	2008      	movs	r0, #8
 801f714:	f7f9 fa08 	bl	8018b28 <lwip_htons>
 801f718:	4603      	mov	r3, r0
 801f71a:	461a      	mov	r2, r3
 801f71c:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801f71e:	691b      	ldr	r3, [r3, #16]
 801f720:	4322      	orrs	r2, r4
 801f722:	b292      	uxth	r2, r2
 801f724:	819a      	strh	r2, [r3, #12]
  }

  return ERR_OK;
 801f726:	2300      	movs	r3, #0
 801f728:	e031      	b.n	801f78e <tcp_write+0x75e>
          goto memerr;
 801f72a:	bf00      	nop
 801f72c:	e006      	b.n	801f73c <tcp_write+0x70c>
            goto memerr;
 801f72e:	bf00      	nop
 801f730:	e004      	b.n	801f73c <tcp_write+0x70c>
        goto memerr;
 801f732:	bf00      	nop
 801f734:	e002      	b.n	801f73c <tcp_write+0x70c>
        goto memerr;
 801f736:	bf00      	nop
 801f738:	e000      	b.n	801f73c <tcp_write+0x70c>
      goto memerr;
 801f73a:	bf00      	nop
memerr:
  tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801f73c:	68fb      	ldr	r3, [r7, #12]
 801f73e:	8b5b      	ldrh	r3, [r3, #26]
 801f740:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801f744:	b29a      	uxth	r2, r3
 801f746:	68fb      	ldr	r3, [r7, #12]
 801f748:	835a      	strh	r2, [r3, #26]
  TCP_STATS_INC(tcp.memerr);

  if (concat_p != NULL) {
 801f74a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f74c:	2b00      	cmp	r3, #0
 801f74e:	d002      	beq.n	801f756 <tcp_write+0x726>
    pbuf_free(concat_p);
 801f750:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 801f752:	f7fa fecb 	bl	801a4ec <pbuf_free>
  }
  if (queue != NULL) {
 801f756:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 801f758:	2b00      	cmp	r3, #0
 801f75a:	d002      	beq.n	801f762 <tcp_write+0x732>
    tcp_segs_free(queue);
 801f75c:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 801f75e:	f7fc fb09 	bl	801bd74 <tcp_segs_free>
  }
  if (pcb->snd_queuelen != 0) {
 801f762:	68fb      	ldr	r3, [r7, #12]
 801f764:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f768:	2b00      	cmp	r3, #0
 801f76a:	d00e      	beq.n	801f78a <tcp_write+0x75a>
    LWIP_ASSERT("tcp_write: valid queue length", pcb->unacked != NULL ||
 801f76c:	68fb      	ldr	r3, [r7, #12]
 801f76e:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801f770:	2b00      	cmp	r3, #0
 801f772:	d10a      	bne.n	801f78a <tcp_write+0x75a>
 801f774:	68fb      	ldr	r3, [r7, #12]
 801f776:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f778:	2b00      	cmp	r3, #0
 801f77a:	d106      	bne.n	801f78a <tcp_write+0x75a>
 801f77c:	4b06      	ldr	r3, [pc, #24]	@ (801f798 <tcp_write+0x768>)
 801f77e:	f240 3227 	movw	r2, #807	@ 0x327
 801f782:	490a      	ldr	r1, [pc, #40]	@ (801f7ac <tcp_write+0x77c>)
 801f784:	4806      	ldr	r0, [pc, #24]	@ (801f7a0 <tcp_write+0x770>)
 801f786:	f00a f929 	bl	80299dc <iprintf>
                pcb->unsent != NULL);
  }
  LWIP_DEBUGF(TCP_QLEN_DEBUG | LWIP_DBG_STATE, ("tcp_write: %"S16_F" (with mem err)\n", pcb->snd_queuelen));
  return ERR_MEM;
 801f78a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 801f78e:	4618      	mov	r0, r3
 801f790:	3764      	adds	r7, #100	@ 0x64
 801f792:	46bd      	mov	sp, r7
 801f794:	bd90      	pop	{r4, r7, pc}
 801f796:	bf00      	nop
 801f798:	0802f1d8 	.word	0x0802f1d8
 801f79c:	0802f50c 	.word	0x0802f50c
 801f7a0:	0802f22c 	.word	0x0802f22c
 801f7a4:	0802f538 	.word	0x0802f538
 801f7a8:	0802f570 	.word	0x0802f570
 801f7ac:	0802f5a8 	.word	0x0802f5a8

0801f7b0 <tcp_split_unsent_seg>:
 * @param pcb the tcp_pcb for which to split the unsent head
 * @param split the amount of payload to remain in the head
 */
err_t
tcp_split_unsent_seg(struct tcp_pcb *pcb, u16_t split)
{
 801f7b0:	b590      	push	{r4, r7, lr}
 801f7b2:	b08b      	sub	sp, #44	@ 0x2c
 801f7b4:	af02      	add	r7, sp, #8
 801f7b6:	6078      	str	r0, [r7, #4]
 801f7b8:	460b      	mov	r3, r1
 801f7ba:	807b      	strh	r3, [r7, #2]
  struct tcp_seg *seg = NULL, *useg = NULL;
 801f7bc:	2300      	movs	r3, #0
 801f7be:	61bb      	str	r3, [r7, #24]
 801f7c0:	2300      	movs	r3, #0
 801f7c2:	617b      	str	r3, [r7, #20]
  struct pbuf *p = NULL;
 801f7c4:	2300      	movs	r3, #0
 801f7c6:	613b      	str	r3, [r7, #16]
  u16_t chksum = 0;
  u8_t chksum_swapped = 0;
  struct pbuf *q;
#endif /* TCP_CHECKSUM_ON_COPY */

  LWIP_ASSERT("tcp_split_unsent_seg: invalid pcb", pcb != NULL);
 801f7c8:	687b      	ldr	r3, [r7, #4]
 801f7ca:	2b00      	cmp	r3, #0
 801f7cc:	d106      	bne.n	801f7dc <tcp_split_unsent_seg+0x2c>
 801f7ce:	4b97      	ldr	r3, [pc, #604]	@ (801fa2c <tcp_split_unsent_seg+0x27c>)
 801f7d0:	f240 324b 	movw	r2, #843	@ 0x34b
 801f7d4:	4996      	ldr	r1, [pc, #600]	@ (801fa30 <tcp_split_unsent_seg+0x280>)
 801f7d6:	4897      	ldr	r0, [pc, #604]	@ (801fa34 <tcp_split_unsent_seg+0x284>)
 801f7d8:	f00a f900 	bl	80299dc <iprintf>

  useg = pcb->unsent;
 801f7dc:	687b      	ldr	r3, [r7, #4]
 801f7de:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f7e0:	617b      	str	r3, [r7, #20]
  if (useg == NULL) {
 801f7e2:	697b      	ldr	r3, [r7, #20]
 801f7e4:	2b00      	cmp	r3, #0
 801f7e6:	d102      	bne.n	801f7ee <tcp_split_unsent_seg+0x3e>
    return ERR_MEM;
 801f7e8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801f7ec:	e119      	b.n	801fa22 <tcp_split_unsent_seg+0x272>
  }

  if (split == 0) {
 801f7ee:	887b      	ldrh	r3, [r7, #2]
 801f7f0:	2b00      	cmp	r3, #0
 801f7f2:	d109      	bne.n	801f808 <tcp_split_unsent_seg+0x58>
    LWIP_ASSERT("Can't split segment into length 0", 0);
 801f7f4:	4b8d      	ldr	r3, [pc, #564]	@ (801fa2c <tcp_split_unsent_seg+0x27c>)
 801f7f6:	f240 3253 	movw	r2, #851	@ 0x353
 801f7fa:	498f      	ldr	r1, [pc, #572]	@ (801fa38 <tcp_split_unsent_seg+0x288>)
 801f7fc:	488d      	ldr	r0, [pc, #564]	@ (801fa34 <tcp_split_unsent_seg+0x284>)
 801f7fe:	f00a f8ed 	bl	80299dc <iprintf>
    return ERR_VAL;
 801f802:	f06f 0305 	mvn.w	r3, #5
 801f806:	e10c      	b.n	801fa22 <tcp_split_unsent_seg+0x272>
  }

  if (useg->len <= split) {
 801f808:	697b      	ldr	r3, [r7, #20]
 801f80a:	891b      	ldrh	r3, [r3, #8]
 801f80c:	887a      	ldrh	r2, [r7, #2]
 801f80e:	429a      	cmp	r2, r3
 801f810:	d301      	bcc.n	801f816 <tcp_split_unsent_seg+0x66>
    return ERR_OK;
 801f812:	2300      	movs	r3, #0
 801f814:	e105      	b.n	801fa22 <tcp_split_unsent_seg+0x272>
  }

  LWIP_ASSERT("split <= mss", split <= pcb->mss);
 801f816:	687b      	ldr	r3, [r7, #4]
 801f818:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801f81a:	887a      	ldrh	r2, [r7, #2]
 801f81c:	429a      	cmp	r2, r3
 801f81e:	d906      	bls.n	801f82e <tcp_split_unsent_seg+0x7e>
 801f820:	4b82      	ldr	r3, [pc, #520]	@ (801fa2c <tcp_split_unsent_seg+0x27c>)
 801f822:	f240 325b 	movw	r2, #859	@ 0x35b
 801f826:	4985      	ldr	r1, [pc, #532]	@ (801fa3c <tcp_split_unsent_seg+0x28c>)
 801f828:	4882      	ldr	r0, [pc, #520]	@ (801fa34 <tcp_split_unsent_seg+0x284>)
 801f82a:	f00a f8d7 	bl	80299dc <iprintf>
  LWIP_ASSERT("useg->len > 0", useg->len > 0);
 801f82e:	697b      	ldr	r3, [r7, #20]
 801f830:	891b      	ldrh	r3, [r3, #8]
 801f832:	2b00      	cmp	r3, #0
 801f834:	d106      	bne.n	801f844 <tcp_split_unsent_seg+0x94>
 801f836:	4b7d      	ldr	r3, [pc, #500]	@ (801fa2c <tcp_split_unsent_seg+0x27c>)
 801f838:	f44f 7257 	mov.w	r2, #860	@ 0x35c
 801f83c:	4980      	ldr	r1, [pc, #512]	@ (801fa40 <tcp_split_unsent_seg+0x290>)
 801f83e:	487d      	ldr	r0, [pc, #500]	@ (801fa34 <tcp_split_unsent_seg+0x284>)
 801f840:	f00a f8cc 	bl	80299dc <iprintf>
   * to split this packet so we may actually exceed the max value by
   * one!
   */
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: split_unsent_seg: %u\n", (unsigned int)pcb->snd_queuelen));

  optflags = useg->flags;
 801f844:	697b      	ldr	r3, [r7, #20]
 801f846:	7b1b      	ldrb	r3, [r3, #12]
 801f848:	73fb      	strb	r3, [r7, #15]
#if TCP_CHECKSUM_ON_COPY
  /* Remove since checksum is not stored until after tcp_create_segment() */
  optflags &= ~TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */
  optlen = LWIP_TCP_OPT_LENGTH(optflags);
 801f84a:	7bfb      	ldrb	r3, [r7, #15]
 801f84c:	009b      	lsls	r3, r3, #2
 801f84e:	b2db      	uxtb	r3, r3
 801f850:	f003 0304 	and.w	r3, r3, #4
 801f854:	73bb      	strb	r3, [r7, #14]
  remainder = useg->len - split;
 801f856:	697b      	ldr	r3, [r7, #20]
 801f858:	891a      	ldrh	r2, [r3, #8]
 801f85a:	887b      	ldrh	r3, [r7, #2]
 801f85c:	1ad3      	subs	r3, r2, r3
 801f85e:	81bb      	strh	r3, [r7, #12]

  /* Create new pbuf for the remainder of the split */
  p = pbuf_alloc(PBUF_TRANSPORT, remainder + optlen, PBUF_RAM);
 801f860:	7bbb      	ldrb	r3, [r7, #14]
 801f862:	b29a      	uxth	r2, r3
 801f864:	89bb      	ldrh	r3, [r7, #12]
 801f866:	4413      	add	r3, r2
 801f868:	b29b      	uxth	r3, r3
 801f86a:	f44f 7220 	mov.w	r2, #640	@ 0x280
 801f86e:	4619      	mov	r1, r3
 801f870:	2036      	movs	r0, #54	@ 0x36
 801f872:	f7fa fb25 	bl	8019ec0 <pbuf_alloc>
 801f876:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 801f878:	693b      	ldr	r3, [r7, #16]
 801f87a:	2b00      	cmp	r3, #0
 801f87c:	f000 80ba 	beq.w	801f9f4 <tcp_split_unsent_seg+0x244>
                ("tcp_split_unsent_seg: could not allocate memory for pbuf remainder %u\n", remainder));
    goto memerr;
  }

  /* Offset into the original pbuf is past TCP/IP headers, options, and split amount */
  offset = useg->p->tot_len - useg->len + split;
 801f880:	697b      	ldr	r3, [r7, #20]
 801f882:	685b      	ldr	r3, [r3, #4]
 801f884:	891a      	ldrh	r2, [r3, #8]
 801f886:	697b      	ldr	r3, [r7, #20]
 801f888:	891b      	ldrh	r3, [r3, #8]
 801f88a:	1ad3      	subs	r3, r2, r3
 801f88c:	b29a      	uxth	r2, r3
 801f88e:	887b      	ldrh	r3, [r7, #2]
 801f890:	4413      	add	r3, r2
 801f892:	817b      	strh	r3, [r7, #10]
  /* Copy remainder into new pbuf, headers and options will not be filled out */
  if (pbuf_copy_partial(useg->p, (u8_t *)p->payload + optlen, remainder, offset ) != remainder) {
 801f894:	697b      	ldr	r3, [r7, #20]
 801f896:	6858      	ldr	r0, [r3, #4]
 801f898:	693b      	ldr	r3, [r7, #16]
 801f89a:	685a      	ldr	r2, [r3, #4]
 801f89c:	7bbb      	ldrb	r3, [r7, #14]
 801f89e:	18d1      	adds	r1, r2, r3
 801f8a0:	897b      	ldrh	r3, [r7, #10]
 801f8a2:	89ba      	ldrh	r2, [r7, #12]
 801f8a4:	f7fb f828 	bl	801a8f8 <pbuf_copy_partial>
 801f8a8:	4603      	mov	r3, r0
 801f8aa:	461a      	mov	r2, r3
 801f8ac:	89bb      	ldrh	r3, [r7, #12]
 801f8ae:	4293      	cmp	r3, r2
 801f8b0:	f040 80a2 	bne.w	801f9f8 <tcp_split_unsent_seg+0x248>
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Options are created when calling tcp_output() */

  /* Migrate flags from original segment */
  split_flags = TCPH_FLAGS(useg->tcphdr);
 801f8b4:	697b      	ldr	r3, [r7, #20]
 801f8b6:	691b      	ldr	r3, [r3, #16]
 801f8b8:	899b      	ldrh	r3, [r3, #12]
 801f8ba:	b29b      	uxth	r3, r3
 801f8bc:	4618      	mov	r0, r3
 801f8be:	f7f9 f933 	bl	8018b28 <lwip_htons>
 801f8c2:	4603      	mov	r3, r0
 801f8c4:	b2db      	uxtb	r3, r3
 801f8c6:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 801f8ca:	77fb      	strb	r3, [r7, #31]
  remainder_flags = 0; /* ACK added in tcp_output() */
 801f8cc:	2300      	movs	r3, #0
 801f8ce:	77bb      	strb	r3, [r7, #30]

  if (split_flags & TCP_PSH) {
 801f8d0:	7ffb      	ldrb	r3, [r7, #31]
 801f8d2:	f003 0308 	and.w	r3, r3, #8
 801f8d6:	2b00      	cmp	r3, #0
 801f8d8:	d007      	beq.n	801f8ea <tcp_split_unsent_seg+0x13a>
    split_flags &= ~TCP_PSH;
 801f8da:	7ffb      	ldrb	r3, [r7, #31]
 801f8dc:	f023 0308 	bic.w	r3, r3, #8
 801f8e0:	77fb      	strb	r3, [r7, #31]
    remainder_flags |= TCP_PSH;
 801f8e2:	7fbb      	ldrb	r3, [r7, #30]
 801f8e4:	f043 0308 	orr.w	r3, r3, #8
 801f8e8:	77bb      	strb	r3, [r7, #30]
  }
  if (split_flags & TCP_FIN) {
 801f8ea:	7ffb      	ldrb	r3, [r7, #31]
 801f8ec:	f003 0301 	and.w	r3, r3, #1
 801f8f0:	2b00      	cmp	r3, #0
 801f8f2:	d007      	beq.n	801f904 <tcp_split_unsent_seg+0x154>
    split_flags &= ~TCP_FIN;
 801f8f4:	7ffb      	ldrb	r3, [r7, #31]
 801f8f6:	f023 0301 	bic.w	r3, r3, #1
 801f8fa:	77fb      	strb	r3, [r7, #31]
    remainder_flags |= TCP_FIN;
 801f8fc:	7fbb      	ldrb	r3, [r7, #30]
 801f8fe:	f043 0301 	orr.w	r3, r3, #1
 801f902:	77bb      	strb	r3, [r7, #30]
  }
  /* SYN should be left on split, RST should not be present with data */

  seg = tcp_create_segment(pcb, p, remainder_flags, lwip_ntohl(useg->tcphdr->seqno) + split, optflags);
 801f904:	697b      	ldr	r3, [r7, #20]
 801f906:	691b      	ldr	r3, [r3, #16]
 801f908:	685b      	ldr	r3, [r3, #4]
 801f90a:	4618      	mov	r0, r3
 801f90c:	f7f9 f921 	bl	8018b52 <lwip_htonl>
 801f910:	4602      	mov	r2, r0
 801f912:	887b      	ldrh	r3, [r7, #2]
 801f914:	18d1      	adds	r1, r2, r3
 801f916:	7fba      	ldrb	r2, [r7, #30]
 801f918:	7bfb      	ldrb	r3, [r7, #15]
 801f91a:	9300      	str	r3, [sp, #0]
 801f91c:	460b      	mov	r3, r1
 801f91e:	6939      	ldr	r1, [r7, #16]
 801f920:	6878      	ldr	r0, [r7, #4]
 801f922:	f7ff f9f1 	bl	801ed08 <tcp_create_segment>
 801f926:	61b8      	str	r0, [r7, #24]
  if (seg == NULL) {
 801f928:	69bb      	ldr	r3, [r7, #24]
 801f92a:	2b00      	cmp	r3, #0
 801f92c:	d066      	beq.n	801f9fc <tcp_split_unsent_seg+0x24c>
  seg->chksum_swapped = chksum_swapped;
  seg->flags |= TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Remove this segment from the queue since trimming it may free pbufs */
  pcb->snd_queuelen -= pbuf_clen(useg->p);
 801f92e:	697b      	ldr	r3, [r7, #20]
 801f930:	685b      	ldr	r3, [r3, #4]
 801f932:	4618      	mov	r0, r3
 801f934:	f7fa fe68 	bl	801a608 <pbuf_clen>
 801f938:	4603      	mov	r3, r0
 801f93a:	461a      	mov	r2, r3
 801f93c:	687b      	ldr	r3, [r7, #4]
 801f93e:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f942:	1a9b      	subs	r3, r3, r2
 801f944:	b29a      	uxth	r2, r3
 801f946:	687b      	ldr	r3, [r7, #4]
 801f948:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  /* Trim the original pbuf into our split size.  At this point our remainder segment must be setup
  successfully because we are modifying the original segment */
  pbuf_realloc(useg->p, useg->p->tot_len - remainder);
 801f94c:	697b      	ldr	r3, [r7, #20]
 801f94e:	6858      	ldr	r0, [r3, #4]
 801f950:	697b      	ldr	r3, [r7, #20]
 801f952:	685b      	ldr	r3, [r3, #4]
 801f954:	891a      	ldrh	r2, [r3, #8]
 801f956:	89bb      	ldrh	r3, [r7, #12]
 801f958:	1ad3      	subs	r3, r2, r3
 801f95a:	b29b      	uxth	r3, r3
 801f95c:	4619      	mov	r1, r3
 801f95e:	f7fa fc0f 	bl	801a180 <pbuf_realloc>
  useg->len -= remainder;
 801f962:	697b      	ldr	r3, [r7, #20]
 801f964:	891a      	ldrh	r2, [r3, #8]
 801f966:	89bb      	ldrh	r3, [r7, #12]
 801f968:	1ad3      	subs	r3, r2, r3
 801f96a:	b29a      	uxth	r2, r3
 801f96c:	697b      	ldr	r3, [r7, #20]
 801f96e:	811a      	strh	r2, [r3, #8]
  TCPH_SET_FLAG(useg->tcphdr, split_flags);
 801f970:	697b      	ldr	r3, [r7, #20]
 801f972:	691b      	ldr	r3, [r3, #16]
 801f974:	899b      	ldrh	r3, [r3, #12]
 801f976:	b29c      	uxth	r4, r3
 801f978:	7ffb      	ldrb	r3, [r7, #31]
 801f97a:	b29b      	uxth	r3, r3
 801f97c:	4618      	mov	r0, r3
 801f97e:	f7f9 f8d3 	bl	8018b28 <lwip_htons>
 801f982:	4603      	mov	r3, r0
 801f984:	461a      	mov	r2, r3
 801f986:	697b      	ldr	r3, [r7, #20]
 801f988:	691b      	ldr	r3, [r3, #16]
 801f98a:	4322      	orrs	r2, r4
 801f98c:	b292      	uxth	r2, r2
 801f98e:	819a      	strh	r2, [r3, #12]
#if TCP_OVERSIZE_DBGCHECK
  /* By trimming, realloc may have actually shrunk the pbuf, so clear oversize_left */
  useg->oversize_left = 0;
 801f990:	697b      	ldr	r3, [r7, #20]
 801f992:	2200      	movs	r2, #0
 801f994:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */

  /* Add back to the queue with new trimmed pbuf */
  pcb->snd_queuelen += pbuf_clen(useg->p);
 801f996:	697b      	ldr	r3, [r7, #20]
 801f998:	685b      	ldr	r3, [r3, #4]
 801f99a:	4618      	mov	r0, r3
 801f99c:	f7fa fe34 	bl	801a608 <pbuf_clen>
 801f9a0:	4603      	mov	r3, r0
 801f9a2:	461a      	mov	r2, r3
 801f9a4:	687b      	ldr	r3, [r7, #4]
 801f9a6:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f9aa:	4413      	add	r3, r2
 801f9ac:	b29a      	uxth	r2, r3
 801f9ae:	687b      	ldr	r3, [r7, #4]
 801f9b0:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Update number of segments on the queues. Note that length now may
   * exceed TCP_SND_QUEUELEN! We don't have to touch pcb->snd_buf
   * because the total amount of data is constant when packet is split */
  pcb->snd_queuelen += pbuf_clen(seg->p);
 801f9b4:	69bb      	ldr	r3, [r7, #24]
 801f9b6:	685b      	ldr	r3, [r3, #4]
 801f9b8:	4618      	mov	r0, r3
 801f9ba:	f7fa fe25 	bl	801a608 <pbuf_clen>
 801f9be:	4603      	mov	r3, r0
 801f9c0:	461a      	mov	r2, r3
 801f9c2:	687b      	ldr	r3, [r7, #4]
 801f9c4:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f9c8:	4413      	add	r3, r2
 801f9ca:	b29a      	uxth	r2, r3
 801f9cc:	687b      	ldr	r3, [r7, #4]
 801f9ce:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  /* Finally insert remainder into queue after split (which stays head) */
  seg->next = useg->next;
 801f9d2:	697b      	ldr	r3, [r7, #20]
 801f9d4:	681a      	ldr	r2, [r3, #0]
 801f9d6:	69bb      	ldr	r3, [r7, #24]
 801f9d8:	601a      	str	r2, [r3, #0]
  useg->next = seg;
 801f9da:	697b      	ldr	r3, [r7, #20]
 801f9dc:	69ba      	ldr	r2, [r7, #24]
 801f9de:	601a      	str	r2, [r3, #0]

#if TCP_OVERSIZE
  /* If remainder is last segment on the unsent, ensure we clear the oversize amount
   * because the remainder is always sized to the exact remaining amount */
  if (seg->next == NULL) {
 801f9e0:	69bb      	ldr	r3, [r7, #24]
 801f9e2:	681b      	ldr	r3, [r3, #0]
 801f9e4:	2b00      	cmp	r3, #0
 801f9e6:	d103      	bne.n	801f9f0 <tcp_split_unsent_seg+0x240>
    pcb->unsent_oversize = 0;
 801f9e8:	687b      	ldr	r3, [r7, #4]
 801f9ea:	2200      	movs	r2, #0
 801f9ec:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE */

  return ERR_OK;
 801f9f0:	2300      	movs	r3, #0
 801f9f2:	e016      	b.n	801fa22 <tcp_split_unsent_seg+0x272>
    goto memerr;
 801f9f4:	bf00      	nop
 801f9f6:	e002      	b.n	801f9fe <tcp_split_unsent_seg+0x24e>
    goto memerr;
 801f9f8:	bf00      	nop
 801f9fa:	e000      	b.n	801f9fe <tcp_split_unsent_seg+0x24e>
    goto memerr;
 801f9fc:	bf00      	nop
memerr:
  TCP_STATS_INC(tcp.memerr);

  LWIP_ASSERT("seg == NULL", seg == NULL);
 801f9fe:	69bb      	ldr	r3, [r7, #24]
 801fa00:	2b00      	cmp	r3, #0
 801fa02:	d006      	beq.n	801fa12 <tcp_split_unsent_seg+0x262>
 801fa04:	4b09      	ldr	r3, [pc, #36]	@ (801fa2c <tcp_split_unsent_seg+0x27c>)
 801fa06:	f44f 7276 	mov.w	r2, #984	@ 0x3d8
 801fa0a:	490e      	ldr	r1, [pc, #56]	@ (801fa44 <tcp_split_unsent_seg+0x294>)
 801fa0c:	4809      	ldr	r0, [pc, #36]	@ (801fa34 <tcp_split_unsent_seg+0x284>)
 801fa0e:	f009 ffe5 	bl	80299dc <iprintf>
  if (p != NULL) {
 801fa12:	693b      	ldr	r3, [r7, #16]
 801fa14:	2b00      	cmp	r3, #0
 801fa16:	d002      	beq.n	801fa1e <tcp_split_unsent_seg+0x26e>
    pbuf_free(p);
 801fa18:	6938      	ldr	r0, [r7, #16]
 801fa1a:	f7fa fd67 	bl	801a4ec <pbuf_free>
  }

  return ERR_MEM;
 801fa1e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 801fa22:	4618      	mov	r0, r3
 801fa24:	3724      	adds	r7, #36	@ 0x24
 801fa26:	46bd      	mov	sp, r7
 801fa28:	bd90      	pop	{r4, r7, pc}
 801fa2a:	bf00      	nop
 801fa2c:	0802f1d8 	.word	0x0802f1d8
 801fa30:	0802f5c8 	.word	0x0802f5c8
 801fa34:	0802f22c 	.word	0x0802f22c
 801fa38:	0802f5ec 	.word	0x0802f5ec
 801fa3c:	0802f610 	.word	0x0802f610
 801fa40:	0802f620 	.word	0x0802f620
 801fa44:	0802f630 	.word	0x0802f630

0801fa48 <tcp_send_fin>:
 * @param pcb the tcp_pcb over which to send a segment
 * @return ERR_OK if sent, another err_t otherwise
 */
err_t
tcp_send_fin(struct tcp_pcb *pcb)
{
 801fa48:	b590      	push	{r4, r7, lr}
 801fa4a:	b085      	sub	sp, #20
 801fa4c:	af00      	add	r7, sp, #0
 801fa4e:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_send_fin: invalid pcb", pcb != NULL);
 801fa50:	687b      	ldr	r3, [r7, #4]
 801fa52:	2b00      	cmp	r3, #0
 801fa54:	d106      	bne.n	801fa64 <tcp_send_fin+0x1c>
 801fa56:	4b21      	ldr	r3, [pc, #132]	@ (801fadc <tcp_send_fin+0x94>)
 801fa58:	f240 32eb 	movw	r2, #1003	@ 0x3eb
 801fa5c:	4920      	ldr	r1, [pc, #128]	@ (801fae0 <tcp_send_fin+0x98>)
 801fa5e:	4821      	ldr	r0, [pc, #132]	@ (801fae4 <tcp_send_fin+0x9c>)
 801fa60:	f009 ffbc 	bl	80299dc <iprintf>

  /* first, try to add the fin to the last unsent segment */
  if (pcb->unsent != NULL) {
 801fa64:	687b      	ldr	r3, [r7, #4]
 801fa66:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fa68:	2b00      	cmp	r3, #0
 801fa6a:	d02e      	beq.n	801faca <tcp_send_fin+0x82>
    struct tcp_seg *last_unsent;
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 801fa6c:	687b      	ldr	r3, [r7, #4]
 801fa6e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fa70:	60fb      	str	r3, [r7, #12]
 801fa72:	e002      	b.n	801fa7a <tcp_send_fin+0x32>
         last_unsent = last_unsent->next);
 801fa74:	68fb      	ldr	r3, [r7, #12]
 801fa76:	681b      	ldr	r3, [r3, #0]
 801fa78:	60fb      	str	r3, [r7, #12]
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 801fa7a:	68fb      	ldr	r3, [r7, #12]
 801fa7c:	681b      	ldr	r3, [r3, #0]
 801fa7e:	2b00      	cmp	r3, #0
 801fa80:	d1f8      	bne.n	801fa74 <tcp_send_fin+0x2c>

    if ((TCPH_FLAGS(last_unsent->tcphdr) & (TCP_SYN | TCP_FIN | TCP_RST)) == 0) {
 801fa82:	68fb      	ldr	r3, [r7, #12]
 801fa84:	691b      	ldr	r3, [r3, #16]
 801fa86:	899b      	ldrh	r3, [r3, #12]
 801fa88:	b29b      	uxth	r3, r3
 801fa8a:	4618      	mov	r0, r3
 801fa8c:	f7f9 f84c 	bl	8018b28 <lwip_htons>
 801fa90:	4603      	mov	r3, r0
 801fa92:	b2db      	uxtb	r3, r3
 801fa94:	f003 0307 	and.w	r3, r3, #7
 801fa98:	2b00      	cmp	r3, #0
 801fa9a:	d116      	bne.n	801faca <tcp_send_fin+0x82>
      /* no SYN/FIN/RST flag in the header, we can add the FIN flag */
      TCPH_SET_FLAG(last_unsent->tcphdr, TCP_FIN);
 801fa9c:	68fb      	ldr	r3, [r7, #12]
 801fa9e:	691b      	ldr	r3, [r3, #16]
 801faa0:	899b      	ldrh	r3, [r3, #12]
 801faa2:	b29c      	uxth	r4, r3
 801faa4:	2001      	movs	r0, #1
 801faa6:	f7f9 f83f 	bl	8018b28 <lwip_htons>
 801faaa:	4603      	mov	r3, r0
 801faac:	461a      	mov	r2, r3
 801faae:	68fb      	ldr	r3, [r7, #12]
 801fab0:	691b      	ldr	r3, [r3, #16]
 801fab2:	4322      	orrs	r2, r4
 801fab4:	b292      	uxth	r2, r2
 801fab6:	819a      	strh	r2, [r3, #12]
      tcp_set_flags(pcb, TF_FIN);
 801fab8:	687b      	ldr	r3, [r7, #4]
 801faba:	8b5b      	ldrh	r3, [r3, #26]
 801fabc:	f043 0320 	orr.w	r3, r3, #32
 801fac0:	b29a      	uxth	r2, r3
 801fac2:	687b      	ldr	r3, [r7, #4]
 801fac4:	835a      	strh	r2, [r3, #26]
      return ERR_OK;
 801fac6:	2300      	movs	r3, #0
 801fac8:	e004      	b.n	801fad4 <tcp_send_fin+0x8c>
    }
  }
  /* no data, no length, flags, copy=1, no optdata */
  return tcp_enqueue_flags(pcb, TCP_FIN);
 801faca:	2101      	movs	r1, #1
 801facc:	6878      	ldr	r0, [r7, #4]
 801face:	f000 f80b 	bl	801fae8 <tcp_enqueue_flags>
 801fad2:	4603      	mov	r3, r0
}
 801fad4:	4618      	mov	r0, r3
 801fad6:	3714      	adds	r7, #20
 801fad8:	46bd      	mov	sp, r7
 801fada:	bd90      	pop	{r4, r7, pc}
 801fadc:	0802f1d8 	.word	0x0802f1d8
 801fae0:	0802f63c 	.word	0x0802f63c
 801fae4:	0802f22c 	.word	0x0802f22c

0801fae8 <tcp_enqueue_flags>:
 * @param pcb Protocol control block for the TCP connection.
 * @param flags TCP header flags to set in the outgoing segment.
 */
err_t
tcp_enqueue_flags(struct tcp_pcb *pcb, u8_t flags)
{
 801fae8:	b580      	push	{r7, lr}
 801faea:	b088      	sub	sp, #32
 801faec:	af02      	add	r7, sp, #8
 801faee:	6078      	str	r0, [r7, #4]
 801faf0:	460b      	mov	r3, r1
 801faf2:	70fb      	strb	r3, [r7, #3]
  struct pbuf *p;
  struct tcp_seg *seg;
  u8_t optflags = 0;
 801faf4:	2300      	movs	r3, #0
 801faf6:	75fb      	strb	r3, [r7, #23]
  u8_t optlen = 0;
 801faf8:	2300      	movs	r3, #0
 801fafa:	75bb      	strb	r3, [r7, #22]

  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen));

  LWIP_ASSERT("tcp_enqueue_flags: need either TCP_SYN or TCP_FIN in flags (programmer violates API)",
 801fafc:	78fb      	ldrb	r3, [r7, #3]
 801fafe:	f003 0303 	and.w	r3, r3, #3
 801fb02:	2b00      	cmp	r3, #0
 801fb04:	d106      	bne.n	801fb14 <tcp_enqueue_flags+0x2c>
 801fb06:	4b67      	ldr	r3, [pc, #412]	@ (801fca4 <tcp_enqueue_flags+0x1bc>)
 801fb08:	f240 4211 	movw	r2, #1041	@ 0x411
 801fb0c:	4966      	ldr	r1, [pc, #408]	@ (801fca8 <tcp_enqueue_flags+0x1c0>)
 801fb0e:	4867      	ldr	r0, [pc, #412]	@ (801fcac <tcp_enqueue_flags+0x1c4>)
 801fb10:	f009 ff64 	bl	80299dc <iprintf>
              (flags & (TCP_SYN | TCP_FIN)) != 0);
  LWIP_ASSERT("tcp_enqueue_flags: invalid pcb", pcb != NULL);
 801fb14:	687b      	ldr	r3, [r7, #4]
 801fb16:	2b00      	cmp	r3, #0
 801fb18:	d106      	bne.n	801fb28 <tcp_enqueue_flags+0x40>
 801fb1a:	4b62      	ldr	r3, [pc, #392]	@ (801fca4 <tcp_enqueue_flags+0x1bc>)
 801fb1c:	f240 4213 	movw	r2, #1043	@ 0x413
 801fb20:	4963      	ldr	r1, [pc, #396]	@ (801fcb0 <tcp_enqueue_flags+0x1c8>)
 801fb22:	4862      	ldr	r0, [pc, #392]	@ (801fcac <tcp_enqueue_flags+0x1c4>)
 801fb24:	f009 ff5a 	bl	80299dc <iprintf>

  /* No need to check pcb->snd_queuelen if only SYN or FIN are allowed! */

  /* Get options for this segment. This is a special case since this is the
     only place where a SYN can be sent. */
  if (flags & TCP_SYN) {
 801fb28:	78fb      	ldrb	r3, [r7, #3]
 801fb2a:	f003 0302 	and.w	r3, r3, #2
 801fb2e:	2b00      	cmp	r3, #0
 801fb30:	d001      	beq.n	801fb36 <tcp_enqueue_flags+0x4e>
    optflags = TF_SEG_OPTS_MSS;
 801fb32:	2301      	movs	r3, #1
 801fb34:	75fb      	strb	r3, [r7, #23]
    /* Make sure the timestamp option is only included in data segments if we
       agreed about it with the remote host (and in active open SYN segments). */
    optflags |= TF_SEG_OPTS_TS;
  }
#endif /* LWIP_TCP_TIMESTAMPS */
  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 801fb36:	7dfb      	ldrb	r3, [r7, #23]
 801fb38:	009b      	lsls	r3, r3, #2
 801fb3a:	b2db      	uxtb	r3, r3
 801fb3c:	f003 0304 	and.w	r3, r3, #4
 801fb40:	75bb      	strb	r3, [r7, #22]

  /* Allocate pbuf with room for TCP header + options */
  if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) {
 801fb42:	7dbb      	ldrb	r3, [r7, #22]
 801fb44:	b29b      	uxth	r3, r3
 801fb46:	f44f 7220 	mov.w	r2, #640	@ 0x280
 801fb4a:	4619      	mov	r1, r3
 801fb4c:	2036      	movs	r0, #54	@ 0x36
 801fb4e:	f7fa f9b7 	bl	8019ec0 <pbuf_alloc>
 801fb52:	60f8      	str	r0, [r7, #12]
 801fb54:	68fb      	ldr	r3, [r7, #12]
 801fb56:	2b00      	cmp	r3, #0
 801fb58:	d109      	bne.n	801fb6e <tcp_enqueue_flags+0x86>
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801fb5a:	687b      	ldr	r3, [r7, #4]
 801fb5c:	8b5b      	ldrh	r3, [r3, #26]
 801fb5e:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801fb62:	b29a      	uxth	r2, r3
 801fb64:	687b      	ldr	r3, [r7, #4]
 801fb66:	835a      	strh	r2, [r3, #26]
    TCP_STATS_INC(tcp.memerr);
    return ERR_MEM;
 801fb68:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801fb6c:	e095      	b.n	801fc9a <tcp_enqueue_flags+0x1b2>
  }
  LWIP_ASSERT("tcp_enqueue_flags: check that first pbuf can hold optlen",
 801fb6e:	68fb      	ldr	r3, [r7, #12]
 801fb70:	895a      	ldrh	r2, [r3, #10]
 801fb72:	7dbb      	ldrb	r3, [r7, #22]
 801fb74:	b29b      	uxth	r3, r3
 801fb76:	429a      	cmp	r2, r3
 801fb78:	d206      	bcs.n	801fb88 <tcp_enqueue_flags+0xa0>
 801fb7a:	4b4a      	ldr	r3, [pc, #296]	@ (801fca4 <tcp_enqueue_flags+0x1bc>)
 801fb7c:	f240 4239 	movw	r2, #1081	@ 0x439
 801fb80:	494c      	ldr	r1, [pc, #304]	@ (801fcb4 <tcp_enqueue_flags+0x1cc>)
 801fb82:	484a      	ldr	r0, [pc, #296]	@ (801fcac <tcp_enqueue_flags+0x1c4>)
 801fb84:	f009 ff2a 	bl	80299dc <iprintf>
              (p->len >= optlen));

  /* Allocate memory for tcp_seg, and fill in fields. */
  if ((seg = tcp_create_segment(pcb, p, flags, pcb->snd_lbb, optflags)) == NULL) {
 801fb88:	687b      	ldr	r3, [r7, #4]
 801fb8a:	6dd9      	ldr	r1, [r3, #92]	@ 0x5c
 801fb8c:	78fa      	ldrb	r2, [r7, #3]
 801fb8e:	7dfb      	ldrb	r3, [r7, #23]
 801fb90:	9300      	str	r3, [sp, #0]
 801fb92:	460b      	mov	r3, r1
 801fb94:	68f9      	ldr	r1, [r7, #12]
 801fb96:	6878      	ldr	r0, [r7, #4]
 801fb98:	f7ff f8b6 	bl	801ed08 <tcp_create_segment>
 801fb9c:	60b8      	str	r0, [r7, #8]
 801fb9e:	68bb      	ldr	r3, [r7, #8]
 801fba0:	2b00      	cmp	r3, #0
 801fba2:	d109      	bne.n	801fbb8 <tcp_enqueue_flags+0xd0>
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801fba4:	687b      	ldr	r3, [r7, #4]
 801fba6:	8b5b      	ldrh	r3, [r3, #26]
 801fba8:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801fbac:	b29a      	uxth	r2, r3
 801fbae:	687b      	ldr	r3, [r7, #4]
 801fbb0:	835a      	strh	r2, [r3, #26]
    TCP_STATS_INC(tcp.memerr);
    return ERR_MEM;
 801fbb2:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801fbb6:	e070      	b.n	801fc9a <tcp_enqueue_flags+0x1b2>
  }
  LWIP_ASSERT("seg->tcphdr not aligned", ((mem_ptr_t)seg->tcphdr % LWIP_MIN(MEM_ALIGNMENT, 4)) == 0);
 801fbb8:	68bb      	ldr	r3, [r7, #8]
 801fbba:	691b      	ldr	r3, [r3, #16]
 801fbbc:	f003 0303 	and.w	r3, r3, #3
 801fbc0:	2b00      	cmp	r3, #0
 801fbc2:	d006      	beq.n	801fbd2 <tcp_enqueue_flags+0xea>
 801fbc4:	4b37      	ldr	r3, [pc, #220]	@ (801fca4 <tcp_enqueue_flags+0x1bc>)
 801fbc6:	f240 4242 	movw	r2, #1090	@ 0x442
 801fbca:	493b      	ldr	r1, [pc, #236]	@ (801fcb8 <tcp_enqueue_flags+0x1d0>)
 801fbcc:	4837      	ldr	r0, [pc, #220]	@ (801fcac <tcp_enqueue_flags+0x1c4>)
 801fbce:	f009 ff05 	bl	80299dc <iprintf>
  LWIP_ASSERT("tcp_enqueue_flags: invalid segment length", seg->len == 0);
 801fbd2:	68bb      	ldr	r3, [r7, #8]
 801fbd4:	891b      	ldrh	r3, [r3, #8]
 801fbd6:	2b00      	cmp	r3, #0
 801fbd8:	d006      	beq.n	801fbe8 <tcp_enqueue_flags+0x100>
 801fbda:	4b32      	ldr	r3, [pc, #200]	@ (801fca4 <tcp_enqueue_flags+0x1bc>)
 801fbdc:	f240 4243 	movw	r2, #1091	@ 0x443
 801fbe0:	4936      	ldr	r1, [pc, #216]	@ (801fcbc <tcp_enqueue_flags+0x1d4>)
 801fbe2:	4832      	ldr	r0, [pc, #200]	@ (801fcac <tcp_enqueue_flags+0x1c4>)
 801fbe4:	f009 fefa 	bl	80299dc <iprintf>
               lwip_ntohl(seg->tcphdr->seqno),
               lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg),
               (u16_t)flags));

  /* Now append seg to pcb->unsent queue */
  if (pcb->unsent == NULL) {
 801fbe8:	687b      	ldr	r3, [r7, #4]
 801fbea:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fbec:	2b00      	cmp	r3, #0
 801fbee:	d103      	bne.n	801fbf8 <tcp_enqueue_flags+0x110>
    pcb->unsent = seg;
 801fbf0:	687b      	ldr	r3, [r7, #4]
 801fbf2:	68ba      	ldr	r2, [r7, #8]
 801fbf4:	66da      	str	r2, [r3, #108]	@ 0x6c
 801fbf6:	e00d      	b.n	801fc14 <tcp_enqueue_flags+0x12c>
  } else {
    struct tcp_seg *useg;
    for (useg = pcb->unsent; useg->next != NULL; useg = useg->next);
 801fbf8:	687b      	ldr	r3, [r7, #4]
 801fbfa:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fbfc:	613b      	str	r3, [r7, #16]
 801fbfe:	e002      	b.n	801fc06 <tcp_enqueue_flags+0x11e>
 801fc00:	693b      	ldr	r3, [r7, #16]
 801fc02:	681b      	ldr	r3, [r3, #0]
 801fc04:	613b      	str	r3, [r7, #16]
 801fc06:	693b      	ldr	r3, [r7, #16]
 801fc08:	681b      	ldr	r3, [r3, #0]
 801fc0a:	2b00      	cmp	r3, #0
 801fc0c:	d1f8      	bne.n	801fc00 <tcp_enqueue_flags+0x118>
    useg->next = seg;
 801fc0e:	693b      	ldr	r3, [r7, #16]
 801fc10:	68ba      	ldr	r2, [r7, #8]
 801fc12:	601a      	str	r2, [r3, #0]
  }
#if TCP_OVERSIZE
  /* The new unsent tail has no space */
  pcb->unsent_oversize = 0;
 801fc14:	687b      	ldr	r3, [r7, #4]
 801fc16:	2200      	movs	r2, #0
 801fc18:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
#endif /* TCP_OVERSIZE */

  /* SYN and FIN bump the sequence number */
  if ((flags & TCP_SYN) || (flags & TCP_FIN)) {
 801fc1c:	78fb      	ldrb	r3, [r7, #3]
 801fc1e:	f003 0302 	and.w	r3, r3, #2
 801fc22:	2b00      	cmp	r3, #0
 801fc24:	d104      	bne.n	801fc30 <tcp_enqueue_flags+0x148>
 801fc26:	78fb      	ldrb	r3, [r7, #3]
 801fc28:	f003 0301 	and.w	r3, r3, #1
 801fc2c:	2b00      	cmp	r3, #0
 801fc2e:	d004      	beq.n	801fc3a <tcp_enqueue_flags+0x152>
    pcb->snd_lbb++;
 801fc30:	687b      	ldr	r3, [r7, #4]
 801fc32:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 801fc34:	1c5a      	adds	r2, r3, #1
 801fc36:	687b      	ldr	r3, [r7, #4]
 801fc38:	65da      	str	r2, [r3, #92]	@ 0x5c
    /* optlen does not influence snd_buf */
  }
  if (flags & TCP_FIN) {
 801fc3a:	78fb      	ldrb	r3, [r7, #3]
 801fc3c:	f003 0301 	and.w	r3, r3, #1
 801fc40:	2b00      	cmp	r3, #0
 801fc42:	d006      	beq.n	801fc52 <tcp_enqueue_flags+0x16a>
    tcp_set_flags(pcb, TF_FIN);
 801fc44:	687b      	ldr	r3, [r7, #4]
 801fc46:	8b5b      	ldrh	r3, [r3, #26]
 801fc48:	f043 0320 	orr.w	r3, r3, #32
 801fc4c:	b29a      	uxth	r2, r3
 801fc4e:	687b      	ldr	r3, [r7, #4]
 801fc50:	835a      	strh	r2, [r3, #26]
  }

  /* update number of segments on the queues */
  pcb->snd_queuelen += pbuf_clen(seg->p);
 801fc52:	68bb      	ldr	r3, [r7, #8]
 801fc54:	685b      	ldr	r3, [r3, #4]
 801fc56:	4618      	mov	r0, r3
 801fc58:	f7fa fcd6 	bl	801a608 <pbuf_clen>
 801fc5c:	4603      	mov	r3, r0
 801fc5e:	461a      	mov	r2, r3
 801fc60:	687b      	ldr	r3, [r7, #4]
 801fc62:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801fc66:	4413      	add	r3, r2
 801fc68:	b29a      	uxth	r2, r3
 801fc6a:	687b      	ldr	r3, [r7, #4]
 801fc6c:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: %"S16_F" (after enqueued)\n", pcb->snd_queuelen));
  if (pcb->snd_queuelen != 0) {
 801fc70:	687b      	ldr	r3, [r7, #4]
 801fc72:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801fc76:	2b00      	cmp	r3, #0
 801fc78:	d00e      	beq.n	801fc98 <tcp_enqueue_flags+0x1b0>
    LWIP_ASSERT("tcp_enqueue_flags: invalid queue length",
 801fc7a:	687b      	ldr	r3, [r7, #4]
 801fc7c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801fc7e:	2b00      	cmp	r3, #0
 801fc80:	d10a      	bne.n	801fc98 <tcp_enqueue_flags+0x1b0>
 801fc82:	687b      	ldr	r3, [r7, #4]
 801fc84:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fc86:	2b00      	cmp	r3, #0
 801fc88:	d106      	bne.n	801fc98 <tcp_enqueue_flags+0x1b0>
 801fc8a:	4b06      	ldr	r3, [pc, #24]	@ (801fca4 <tcp_enqueue_flags+0x1bc>)
 801fc8c:	f240 4265 	movw	r2, #1125	@ 0x465
 801fc90:	490b      	ldr	r1, [pc, #44]	@ (801fcc0 <tcp_enqueue_flags+0x1d8>)
 801fc92:	4806      	ldr	r0, [pc, #24]	@ (801fcac <tcp_enqueue_flags+0x1c4>)
 801fc94:	f009 fea2 	bl	80299dc <iprintf>
                pcb->unacked != NULL || pcb->unsent != NULL);
  }

  return ERR_OK;
 801fc98:	2300      	movs	r3, #0
}
 801fc9a:	4618      	mov	r0, r3
 801fc9c:	3718      	adds	r7, #24
 801fc9e:	46bd      	mov	sp, r7
 801fca0:	bd80      	pop	{r7, pc}
 801fca2:	bf00      	nop
 801fca4:	0802f1d8 	.word	0x0802f1d8
 801fca8:	0802f658 	.word	0x0802f658
 801fcac:	0802f22c 	.word	0x0802f22c
 801fcb0:	0802f6b0 	.word	0x0802f6b0
 801fcb4:	0802f6d0 	.word	0x0802f6d0
 801fcb8:	0802f70c 	.word	0x0802f70c
 801fcbc:	0802f724 	.word	0x0802f724
 801fcc0:	0802f750 	.word	0x0802f750

0801fcc4 <tcp_output>:
 * @return ERR_OK if data has been sent or nothing to send
 *         another err_t on error
 */
err_t
tcp_output(struct tcp_pcb *pcb)
{
 801fcc4:	b5b0      	push	{r4, r5, r7, lr}
 801fcc6:	b08a      	sub	sp, #40	@ 0x28
 801fcc8:	af00      	add	r7, sp, #0
 801fcca:	6078      	str	r0, [r7, #4]
  struct netif *netif;
#if TCP_CWND_DEBUG
  s16_t i = 0;
#endif /* TCP_CWND_DEBUG */

  LWIP_ASSERT_CORE_LOCKED();
 801fccc:	f7f0 fc3a 	bl	8010544 <sys_check_core_locking>

  LWIP_ASSERT("tcp_output: invalid pcb", pcb != NULL);
 801fcd0:	687b      	ldr	r3, [r7, #4]
 801fcd2:	2b00      	cmp	r3, #0
 801fcd4:	d106      	bne.n	801fce4 <tcp_output+0x20>
 801fcd6:	4b8a      	ldr	r3, [pc, #552]	@ (801ff00 <tcp_output+0x23c>)
 801fcd8:	f240 42e1 	movw	r2, #1249	@ 0x4e1
 801fcdc:	4989      	ldr	r1, [pc, #548]	@ (801ff04 <tcp_output+0x240>)
 801fcde:	488a      	ldr	r0, [pc, #552]	@ (801ff08 <tcp_output+0x244>)
 801fce0:	f009 fe7c 	bl	80299dc <iprintf>
  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_output for listen-pcbs",
 801fce4:	687b      	ldr	r3, [r7, #4]
 801fce6:	7d1b      	ldrb	r3, [r3, #20]
 801fce8:	2b01      	cmp	r3, #1
 801fcea:	d106      	bne.n	801fcfa <tcp_output+0x36>
 801fcec:	4b84      	ldr	r3, [pc, #528]	@ (801ff00 <tcp_output+0x23c>)
 801fcee:	f240 42e3 	movw	r2, #1251	@ 0x4e3
 801fcf2:	4986      	ldr	r1, [pc, #536]	@ (801ff0c <tcp_output+0x248>)
 801fcf4:	4884      	ldr	r0, [pc, #528]	@ (801ff08 <tcp_output+0x244>)
 801fcf6:	f009 fe71 	bl	80299dc <iprintf>

  /* First, check if we are invoked by the TCP input processing
     code. If so, we do not output anything. Instead, we rely on the
     input processing code to call us when input processing is done
     with. */
  if (tcp_input_pcb == pcb) {
 801fcfa:	4b85      	ldr	r3, [pc, #532]	@ (801ff10 <tcp_output+0x24c>)
 801fcfc:	681b      	ldr	r3, [r3, #0]
 801fcfe:	687a      	ldr	r2, [r7, #4]
 801fd00:	429a      	cmp	r2, r3
 801fd02:	d101      	bne.n	801fd08 <tcp_output+0x44>
    return ERR_OK;
 801fd04:	2300      	movs	r3, #0
 801fd06:	e1d1      	b.n	80200ac <tcp_output+0x3e8>
  }

  wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd);
 801fd08:	687b      	ldr	r3, [r7, #4]
 801fd0a:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801fd0e:	687b      	ldr	r3, [r7, #4]
 801fd10:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801fd14:	4293      	cmp	r3, r2
 801fd16:	bf28      	it	cs
 801fd18:	4613      	movcs	r3, r2
 801fd1a:	b29b      	uxth	r3, r3
 801fd1c:	61bb      	str	r3, [r7, #24]

  seg = pcb->unsent;
 801fd1e:	687b      	ldr	r3, [r7, #4]
 801fd20:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fd22:	627b      	str	r3, [r7, #36]	@ 0x24

  if (seg == NULL) {
 801fd24:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fd26:	2b00      	cmp	r3, #0
 801fd28:	d10b      	bne.n	801fd42 <tcp_output+0x7e>
                                 ", seg == NULL, ack %"U32_F"\n",
                                 pcb->snd_wnd, pcb->cwnd, wnd, pcb->lastack));

    /* If the TF_ACK_NOW flag is set and the ->unsent queue is empty, construct
     * an empty ACK segment and send it. */
    if (pcb->flags & TF_ACK_NOW) {
 801fd2a:	687b      	ldr	r3, [r7, #4]
 801fd2c:	8b5b      	ldrh	r3, [r3, #26]
 801fd2e:	f003 0302 	and.w	r3, r3, #2
 801fd32:	2b00      	cmp	r3, #0
 801fd34:	f000 81ad 	beq.w	8020092 <tcp_output+0x3ce>
      return tcp_send_empty_ack(pcb);
 801fd38:	6878      	ldr	r0, [r7, #4]
 801fd3a:	f000 fdd7 	bl	80208ec <tcp_send_empty_ack>
 801fd3e:	4603      	mov	r3, r0
 801fd40:	e1b4      	b.n	80200ac <tcp_output+0x3e8>
                 pcb->snd_wnd, pcb->cwnd, wnd,
                 lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len,
                 lwip_ntohl(seg->tcphdr->seqno), pcb->lastack));
  }

  netif = tcp_route(pcb, &pcb->local_ip, &pcb->remote_ip);
 801fd42:	6879      	ldr	r1, [r7, #4]
 801fd44:	687b      	ldr	r3, [r7, #4]
 801fd46:	3304      	adds	r3, #4
 801fd48:	461a      	mov	r2, r3
 801fd4a:	6878      	ldr	r0, [r7, #4]
 801fd4c:	f7fe ffc0 	bl	801ecd0 <tcp_route>
 801fd50:	6178      	str	r0, [r7, #20]
  if (netif == NULL) {
 801fd52:	697b      	ldr	r3, [r7, #20]
 801fd54:	2b00      	cmp	r3, #0
 801fd56:	d102      	bne.n	801fd5e <tcp_output+0x9a>
    return ERR_RTE;
 801fd58:	f06f 0303 	mvn.w	r3, #3
 801fd5c:	e1a6      	b.n	80200ac <tcp_output+0x3e8>
  }

  /* If we don't have a local IP address, we get one from netif */
  if (ip_addr_isany(&pcb->local_ip)) {
 801fd5e:	687b      	ldr	r3, [r7, #4]
 801fd60:	2b00      	cmp	r3, #0
 801fd62:	d003      	beq.n	801fd6c <tcp_output+0xa8>
 801fd64:	687b      	ldr	r3, [r7, #4]
 801fd66:	681b      	ldr	r3, [r3, #0]
 801fd68:	2b00      	cmp	r3, #0
 801fd6a:	d111      	bne.n	801fd90 <tcp_output+0xcc>
    const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, &pcb->remote_ip);
 801fd6c:	697b      	ldr	r3, [r7, #20]
 801fd6e:	2b00      	cmp	r3, #0
 801fd70:	d002      	beq.n	801fd78 <tcp_output+0xb4>
 801fd72:	697b      	ldr	r3, [r7, #20]
 801fd74:	3304      	adds	r3, #4
 801fd76:	e000      	b.n	801fd7a <tcp_output+0xb6>
 801fd78:	2300      	movs	r3, #0
 801fd7a:	613b      	str	r3, [r7, #16]
    if (local_ip == NULL) {
 801fd7c:	693b      	ldr	r3, [r7, #16]
 801fd7e:	2b00      	cmp	r3, #0
 801fd80:	d102      	bne.n	801fd88 <tcp_output+0xc4>
      return ERR_RTE;
 801fd82:	f06f 0303 	mvn.w	r3, #3
 801fd86:	e191      	b.n	80200ac <tcp_output+0x3e8>
    }
    ip_addr_copy(pcb->local_ip, *local_ip);
 801fd88:	693b      	ldr	r3, [r7, #16]
 801fd8a:	681a      	ldr	r2, [r3, #0]
 801fd8c:	687b      	ldr	r3, [r7, #4]
 801fd8e:	601a      	str	r2, [r3, #0]
  }

  /* Handle the current segment not fitting within the window */
  if (lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > wnd) {
 801fd90:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fd92:	691b      	ldr	r3, [r3, #16]
 801fd94:	685b      	ldr	r3, [r3, #4]
 801fd96:	4618      	mov	r0, r3
 801fd98:	f7f8 fedb 	bl	8018b52 <lwip_htonl>
 801fd9c:	4602      	mov	r2, r0
 801fd9e:	687b      	ldr	r3, [r7, #4]
 801fda0:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801fda2:	1ad3      	subs	r3, r2, r3
 801fda4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801fda6:	8912      	ldrh	r2, [r2, #8]
 801fda8:	4413      	add	r3, r2
 801fdaa:	69ba      	ldr	r2, [r7, #24]
 801fdac:	429a      	cmp	r2, r3
 801fdae:	d227      	bcs.n	801fe00 <tcp_output+0x13c>
     * within the remaining (could be 0) send window and RTO timer is not running (we
     * have no in-flight data). If window is still too small after persist timer fires,
     * then we split the segment. We don't consider the congestion window since a cwnd
     * smaller than 1 SMSS implies in-flight data
     */
    if (wnd == pcb->snd_wnd && pcb->unacked == NULL && pcb->persist_backoff == 0) {
 801fdb0:	687b      	ldr	r3, [r7, #4]
 801fdb2:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801fdb6:	461a      	mov	r2, r3
 801fdb8:	69bb      	ldr	r3, [r7, #24]
 801fdba:	4293      	cmp	r3, r2
 801fdbc:	d114      	bne.n	801fde8 <tcp_output+0x124>
 801fdbe:	687b      	ldr	r3, [r7, #4]
 801fdc0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801fdc2:	2b00      	cmp	r3, #0
 801fdc4:	d110      	bne.n	801fde8 <tcp_output+0x124>
 801fdc6:	687b      	ldr	r3, [r7, #4]
 801fdc8:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801fdcc:	2b00      	cmp	r3, #0
 801fdce:	d10b      	bne.n	801fde8 <tcp_output+0x124>
      pcb->persist_cnt = 0;
 801fdd0:	687b      	ldr	r3, [r7, #4]
 801fdd2:	2200      	movs	r2, #0
 801fdd4:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
      pcb->persist_backoff = 1;
 801fdd8:	687b      	ldr	r3, [r7, #4]
 801fdda:	2201      	movs	r2, #1
 801fddc:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99
      pcb->persist_probe = 0;
 801fde0:	687b      	ldr	r3, [r7, #4]
 801fde2:	2200      	movs	r2, #0
 801fde4:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a
    }
    /* We need an ACK, but can't send data now, so send an empty ACK */
    if (pcb->flags & TF_ACK_NOW) {
 801fde8:	687b      	ldr	r3, [r7, #4]
 801fdea:	8b5b      	ldrh	r3, [r3, #26]
 801fdec:	f003 0302 	and.w	r3, r3, #2
 801fdf0:	2b00      	cmp	r3, #0
 801fdf2:	f000 8150 	beq.w	8020096 <tcp_output+0x3d2>
      return tcp_send_empty_ack(pcb);
 801fdf6:	6878      	ldr	r0, [r7, #4]
 801fdf8:	f000 fd78 	bl	80208ec <tcp_send_empty_ack>
 801fdfc:	4603      	mov	r3, r0
 801fdfe:	e155      	b.n	80200ac <tcp_output+0x3e8>
    }
    goto output_done;
  }
  /* Stop persist timer, above conditions are not active */
  pcb->persist_backoff = 0;
 801fe00:	687b      	ldr	r3, [r7, #4]
 801fe02:	2200      	movs	r2, #0
 801fe04:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99

  /* useg should point to last segment on unacked queue */
  useg = pcb->unacked;
 801fe08:	687b      	ldr	r3, [r7, #4]
 801fe0a:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801fe0c:	623b      	str	r3, [r7, #32]
  if (useg != NULL) {
 801fe0e:	6a3b      	ldr	r3, [r7, #32]
 801fe10:	2b00      	cmp	r3, #0
 801fe12:	f000 811f 	beq.w	8020054 <tcp_output+0x390>
    for (; useg->next != NULL; useg = useg->next);
 801fe16:	e002      	b.n	801fe1e <tcp_output+0x15a>
 801fe18:	6a3b      	ldr	r3, [r7, #32]
 801fe1a:	681b      	ldr	r3, [r3, #0]
 801fe1c:	623b      	str	r3, [r7, #32]
 801fe1e:	6a3b      	ldr	r3, [r7, #32]
 801fe20:	681b      	ldr	r3, [r3, #0]
 801fe22:	2b00      	cmp	r3, #0
 801fe24:	d1f8      	bne.n	801fe18 <tcp_output+0x154>
  }
  /* data available and window allows it to be sent? */
  while (seg != NULL &&
 801fe26:	e115      	b.n	8020054 <tcp_output+0x390>
         lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) {
    LWIP_ASSERT("RST not expected here!",
 801fe28:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fe2a:	691b      	ldr	r3, [r3, #16]
 801fe2c:	899b      	ldrh	r3, [r3, #12]
 801fe2e:	b29b      	uxth	r3, r3
 801fe30:	4618      	mov	r0, r3
 801fe32:	f7f8 fe79 	bl	8018b28 <lwip_htons>
 801fe36:	4603      	mov	r3, r0
 801fe38:	b2db      	uxtb	r3, r3
 801fe3a:	f003 0304 	and.w	r3, r3, #4
 801fe3e:	2b00      	cmp	r3, #0
 801fe40:	d006      	beq.n	801fe50 <tcp_output+0x18c>
 801fe42:	4b2f      	ldr	r3, [pc, #188]	@ (801ff00 <tcp_output+0x23c>)
 801fe44:	f240 5236 	movw	r2, #1334	@ 0x536
 801fe48:	4932      	ldr	r1, [pc, #200]	@ (801ff14 <tcp_output+0x250>)
 801fe4a:	482f      	ldr	r0, [pc, #188]	@ (801ff08 <tcp_output+0x244>)
 801fe4c:	f009 fdc6 	bl	80299dc <iprintf>
     * - if tcp_write had a memory error before (prevent delayed ACK timeout) or
     * - if FIN was already enqueued for this PCB (SYN is always alone in a segment -
     *   either seg->next != NULL or pcb->unacked == NULL;
     *   RST is no sent using tcp_write/tcp_output.
     */
    if ((tcp_do_output_nagle(pcb) == 0) &&
 801fe50:	687b      	ldr	r3, [r7, #4]
 801fe52:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801fe54:	2b00      	cmp	r3, #0
 801fe56:	d01f      	beq.n	801fe98 <tcp_output+0x1d4>
 801fe58:	687b      	ldr	r3, [r7, #4]
 801fe5a:	8b5b      	ldrh	r3, [r3, #26]
 801fe5c:	f003 0344 	and.w	r3, r3, #68	@ 0x44
 801fe60:	2b00      	cmp	r3, #0
 801fe62:	d119      	bne.n	801fe98 <tcp_output+0x1d4>
 801fe64:	687b      	ldr	r3, [r7, #4]
 801fe66:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fe68:	2b00      	cmp	r3, #0
 801fe6a:	d00b      	beq.n	801fe84 <tcp_output+0x1c0>
 801fe6c:	687b      	ldr	r3, [r7, #4]
 801fe6e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fe70:	681b      	ldr	r3, [r3, #0]
 801fe72:	2b00      	cmp	r3, #0
 801fe74:	d110      	bne.n	801fe98 <tcp_output+0x1d4>
 801fe76:	687b      	ldr	r3, [r7, #4]
 801fe78:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fe7a:	891a      	ldrh	r2, [r3, #8]
 801fe7c:	687b      	ldr	r3, [r7, #4]
 801fe7e:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801fe80:	429a      	cmp	r2, r3
 801fe82:	d209      	bcs.n	801fe98 <tcp_output+0x1d4>
 801fe84:	687b      	ldr	r3, [r7, #4]
 801fe86:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 801fe8a:	2b00      	cmp	r3, #0
 801fe8c:	d004      	beq.n	801fe98 <tcp_output+0x1d4>
 801fe8e:	687b      	ldr	r3, [r7, #4]
 801fe90:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801fe94:	2b0f      	cmp	r3, #15
 801fe96:	d901      	bls.n	801fe9c <tcp_output+0x1d8>
 801fe98:	2301      	movs	r3, #1
 801fe9a:	e000      	b.n	801fe9e <tcp_output+0x1da>
 801fe9c:	2300      	movs	r3, #0
 801fe9e:	2b00      	cmp	r3, #0
 801fea0:	d106      	bne.n	801feb0 <tcp_output+0x1ec>
        ((pcb->flags & (TF_NAGLEMEMERR | TF_FIN)) == 0)) {
 801fea2:	687b      	ldr	r3, [r7, #4]
 801fea4:	8b5b      	ldrh	r3, [r3, #26]
 801fea6:	f003 03a0 	and.w	r3, r3, #160	@ 0xa0
    if ((tcp_do_output_nagle(pcb) == 0) &&
 801feaa:	2b00      	cmp	r3, #0
 801feac:	f000 80e7 	beq.w	802007e <tcp_output+0x3ba>
                                 pcb->lastack,
                                 lwip_ntohl(seg->tcphdr->seqno), pcb->lastack, i));
    ++i;
#endif /* TCP_CWND_DEBUG */

    if (pcb->state != SYN_SENT) {
 801feb0:	687b      	ldr	r3, [r7, #4]
 801feb2:	7d1b      	ldrb	r3, [r3, #20]
 801feb4:	2b02      	cmp	r3, #2
 801feb6:	d00d      	beq.n	801fed4 <tcp_output+0x210>
      TCPH_SET_FLAG(seg->tcphdr, TCP_ACK);
 801feb8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801feba:	691b      	ldr	r3, [r3, #16]
 801febc:	899b      	ldrh	r3, [r3, #12]
 801febe:	b29c      	uxth	r4, r3
 801fec0:	2010      	movs	r0, #16
 801fec2:	f7f8 fe31 	bl	8018b28 <lwip_htons>
 801fec6:	4603      	mov	r3, r0
 801fec8:	461a      	mov	r2, r3
 801feca:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fecc:	691b      	ldr	r3, [r3, #16]
 801fece:	4322      	orrs	r2, r4
 801fed0:	b292      	uxth	r2, r2
 801fed2:	819a      	strh	r2, [r3, #12]
    }

    err = tcp_output_segment(seg, pcb, netif);
 801fed4:	697a      	ldr	r2, [r7, #20]
 801fed6:	6879      	ldr	r1, [r7, #4]
 801fed8:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 801feda:	f000 f90b 	bl	80200f4 <tcp_output_segment>
 801fede:	4603      	mov	r3, r0
 801fee0:	73fb      	strb	r3, [r7, #15]
    if (err != ERR_OK) {
 801fee2:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801fee6:	2b00      	cmp	r3, #0
 801fee8:	d016      	beq.n	801ff18 <tcp_output+0x254>
      /* segment could not be sent, for whatever reason */
      tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801feea:	687b      	ldr	r3, [r7, #4]
 801feec:	8b5b      	ldrh	r3, [r3, #26]
 801feee:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801fef2:	b29a      	uxth	r2, r3
 801fef4:	687b      	ldr	r3, [r7, #4]
 801fef6:	835a      	strh	r2, [r3, #26]
      return err;
 801fef8:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801fefc:	e0d6      	b.n	80200ac <tcp_output+0x3e8>
 801fefe:	bf00      	nop
 801ff00:	0802f1d8 	.word	0x0802f1d8
 801ff04:	0802f778 	.word	0x0802f778
 801ff08:	0802f22c 	.word	0x0802f22c
 801ff0c:	0802f790 	.word	0x0802f790
 801ff10:	2402aed8 	.word	0x2402aed8
 801ff14:	0802f7b8 	.word	0x0802f7b8
    }
#if TCP_OVERSIZE_DBGCHECK
    seg->oversize_left = 0;
 801ff18:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801ff1a:	2200      	movs	r2, #0
 801ff1c:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */
    pcb->unsent = seg->next;
 801ff1e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801ff20:	681a      	ldr	r2, [r3, #0]
 801ff22:	687b      	ldr	r3, [r7, #4]
 801ff24:	66da      	str	r2, [r3, #108]	@ 0x6c
    if (pcb->state != SYN_SENT) {
 801ff26:	687b      	ldr	r3, [r7, #4]
 801ff28:	7d1b      	ldrb	r3, [r3, #20]
 801ff2a:	2b02      	cmp	r3, #2
 801ff2c:	d006      	beq.n	801ff3c <tcp_output+0x278>
      tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 801ff2e:	687b      	ldr	r3, [r7, #4]
 801ff30:	8b5b      	ldrh	r3, [r3, #26]
 801ff32:	f023 0303 	bic.w	r3, r3, #3
 801ff36:	b29a      	uxth	r2, r3
 801ff38:	687b      	ldr	r3, [r7, #4]
 801ff3a:	835a      	strh	r2, [r3, #26]
    }
    snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);
 801ff3c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801ff3e:	691b      	ldr	r3, [r3, #16]
 801ff40:	685b      	ldr	r3, [r3, #4]
 801ff42:	4618      	mov	r0, r3
 801ff44:	f7f8 fe05 	bl	8018b52 <lwip_htonl>
 801ff48:	4604      	mov	r4, r0
 801ff4a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801ff4c:	891b      	ldrh	r3, [r3, #8]
 801ff4e:	461d      	mov	r5, r3
 801ff50:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801ff52:	691b      	ldr	r3, [r3, #16]
 801ff54:	899b      	ldrh	r3, [r3, #12]
 801ff56:	b29b      	uxth	r3, r3
 801ff58:	4618      	mov	r0, r3
 801ff5a:	f7f8 fde5 	bl	8018b28 <lwip_htons>
 801ff5e:	4603      	mov	r3, r0
 801ff60:	b2db      	uxtb	r3, r3
 801ff62:	f003 0303 	and.w	r3, r3, #3
 801ff66:	2b00      	cmp	r3, #0
 801ff68:	d001      	beq.n	801ff6e <tcp_output+0x2aa>
 801ff6a:	2301      	movs	r3, #1
 801ff6c:	e000      	b.n	801ff70 <tcp_output+0x2ac>
 801ff6e:	2300      	movs	r3, #0
 801ff70:	442b      	add	r3, r5
 801ff72:	4423      	add	r3, r4
 801ff74:	60bb      	str	r3, [r7, #8]
    if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) {
 801ff76:	687b      	ldr	r3, [r7, #4]
 801ff78:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801ff7a:	68bb      	ldr	r3, [r7, #8]
 801ff7c:	1ad3      	subs	r3, r2, r3
 801ff7e:	2b00      	cmp	r3, #0
 801ff80:	da02      	bge.n	801ff88 <tcp_output+0x2c4>
      pcb->snd_nxt = snd_nxt;
 801ff82:	687b      	ldr	r3, [r7, #4]
 801ff84:	68ba      	ldr	r2, [r7, #8]
 801ff86:	651a      	str	r2, [r3, #80]	@ 0x50
    }
    /* put segment on unacknowledged list if length > 0 */
    if (TCP_TCPLEN(seg) > 0) {
 801ff88:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801ff8a:	891b      	ldrh	r3, [r3, #8]
 801ff8c:	461c      	mov	r4, r3
 801ff8e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801ff90:	691b      	ldr	r3, [r3, #16]
 801ff92:	899b      	ldrh	r3, [r3, #12]
 801ff94:	b29b      	uxth	r3, r3
 801ff96:	4618      	mov	r0, r3
 801ff98:	f7f8 fdc6 	bl	8018b28 <lwip_htons>
 801ff9c:	4603      	mov	r3, r0
 801ff9e:	b2db      	uxtb	r3, r3
 801ffa0:	f003 0303 	and.w	r3, r3, #3
 801ffa4:	2b00      	cmp	r3, #0
 801ffa6:	d001      	beq.n	801ffac <tcp_output+0x2e8>
 801ffa8:	2301      	movs	r3, #1
 801ffaa:	e000      	b.n	801ffae <tcp_output+0x2ea>
 801ffac:	2300      	movs	r3, #0
 801ffae:	4423      	add	r3, r4
 801ffb0:	2b00      	cmp	r3, #0
 801ffb2:	d049      	beq.n	8020048 <tcp_output+0x384>
      seg->next = NULL;
 801ffb4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801ffb6:	2200      	movs	r2, #0
 801ffb8:	601a      	str	r2, [r3, #0]
      /* unacked list is empty? */
      if (pcb->unacked == NULL) {
 801ffba:	687b      	ldr	r3, [r7, #4]
 801ffbc:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801ffbe:	2b00      	cmp	r3, #0
 801ffc0:	d105      	bne.n	801ffce <tcp_output+0x30a>
        pcb->unacked = seg;
 801ffc2:	687b      	ldr	r3, [r7, #4]
 801ffc4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801ffc6:	671a      	str	r2, [r3, #112]	@ 0x70
        useg = seg;
 801ffc8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801ffca:	623b      	str	r3, [r7, #32]
 801ffcc:	e03f      	b.n	802004e <tcp_output+0x38a>
        /* unacked list is not empty? */
      } else {
        /* In the case of fast retransmit, the packet should not go to the tail
         * of the unacked queue, but rather somewhere before it. We need to check for
         * this case. -STJ Jul 27, 2004 */
        if (TCP_SEQ_LT(lwip_ntohl(seg->tcphdr->seqno), lwip_ntohl(useg->tcphdr->seqno))) {
 801ffce:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801ffd0:	691b      	ldr	r3, [r3, #16]
 801ffd2:	685b      	ldr	r3, [r3, #4]
 801ffd4:	4618      	mov	r0, r3
 801ffd6:	f7f8 fdbc 	bl	8018b52 <lwip_htonl>
 801ffda:	4604      	mov	r4, r0
 801ffdc:	6a3b      	ldr	r3, [r7, #32]
 801ffde:	691b      	ldr	r3, [r3, #16]
 801ffe0:	685b      	ldr	r3, [r3, #4]
 801ffe2:	4618      	mov	r0, r3
 801ffe4:	f7f8 fdb5 	bl	8018b52 <lwip_htonl>
 801ffe8:	4603      	mov	r3, r0
 801ffea:	1ae3      	subs	r3, r4, r3
 801ffec:	2b00      	cmp	r3, #0
 801ffee:	da24      	bge.n	802003a <tcp_output+0x376>
          /* add segment to before tail of unacked list, keeping the list sorted */
          struct tcp_seg **cur_seg = &(pcb->unacked);
 801fff0:	687b      	ldr	r3, [r7, #4]
 801fff2:	3370      	adds	r3, #112	@ 0x70
 801fff4:	61fb      	str	r3, [r7, #28]
          while (*cur_seg &&
 801fff6:	e002      	b.n	801fffe <tcp_output+0x33a>
                 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
            cur_seg = &((*cur_seg)->next );
 801fff8:	69fb      	ldr	r3, [r7, #28]
 801fffa:	681b      	ldr	r3, [r3, #0]
 801fffc:	61fb      	str	r3, [r7, #28]
          while (*cur_seg &&
 801fffe:	69fb      	ldr	r3, [r7, #28]
 8020000:	681b      	ldr	r3, [r3, #0]
 8020002:	2b00      	cmp	r3, #0
 8020004:	d011      	beq.n	802002a <tcp_output+0x366>
                 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
 8020006:	69fb      	ldr	r3, [r7, #28]
 8020008:	681b      	ldr	r3, [r3, #0]
 802000a:	691b      	ldr	r3, [r3, #16]
 802000c:	685b      	ldr	r3, [r3, #4]
 802000e:	4618      	mov	r0, r3
 8020010:	f7f8 fd9f 	bl	8018b52 <lwip_htonl>
 8020014:	4604      	mov	r4, r0
 8020016:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020018:	691b      	ldr	r3, [r3, #16]
 802001a:	685b      	ldr	r3, [r3, #4]
 802001c:	4618      	mov	r0, r3
 802001e:	f7f8 fd98 	bl	8018b52 <lwip_htonl>
 8020022:	4603      	mov	r3, r0
 8020024:	1ae3      	subs	r3, r4, r3
          while (*cur_seg &&
 8020026:	2b00      	cmp	r3, #0
 8020028:	dbe6      	blt.n	801fff8 <tcp_output+0x334>
          }
          seg->next = (*cur_seg);
 802002a:	69fb      	ldr	r3, [r7, #28]
 802002c:	681a      	ldr	r2, [r3, #0]
 802002e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020030:	601a      	str	r2, [r3, #0]
          (*cur_seg) = seg;
 8020032:	69fb      	ldr	r3, [r7, #28]
 8020034:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8020036:	601a      	str	r2, [r3, #0]
 8020038:	e009      	b.n	802004e <tcp_output+0x38a>
        } else {
          /* add segment to tail of unacked list */
          useg->next = seg;
 802003a:	6a3b      	ldr	r3, [r7, #32]
 802003c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802003e:	601a      	str	r2, [r3, #0]
          useg = useg->next;
 8020040:	6a3b      	ldr	r3, [r7, #32]
 8020042:	681b      	ldr	r3, [r3, #0]
 8020044:	623b      	str	r3, [r7, #32]
 8020046:	e002      	b.n	802004e <tcp_output+0x38a>
        }
      }
      /* do not queue empty segments on the unacked list */
    } else {
      tcp_seg_free(seg);
 8020048:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 802004a:	f7fb fea8 	bl	801bd9e <tcp_seg_free>
    }
    seg = pcb->unsent;
 802004e:	687b      	ldr	r3, [r7, #4]
 8020050:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020052:	627b      	str	r3, [r7, #36]	@ 0x24
  while (seg != NULL &&
 8020054:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020056:	2b00      	cmp	r3, #0
 8020058:	d012      	beq.n	8020080 <tcp_output+0x3bc>
         lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) {
 802005a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802005c:	691b      	ldr	r3, [r3, #16]
 802005e:	685b      	ldr	r3, [r3, #4]
 8020060:	4618      	mov	r0, r3
 8020062:	f7f8 fd76 	bl	8018b52 <lwip_htonl>
 8020066:	4602      	mov	r2, r0
 8020068:	687b      	ldr	r3, [r7, #4]
 802006a:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 802006c:	1ad3      	subs	r3, r2, r3
 802006e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8020070:	8912      	ldrh	r2, [r2, #8]
 8020072:	4413      	add	r3, r2
  while (seg != NULL &&
 8020074:	69ba      	ldr	r2, [r7, #24]
 8020076:	429a      	cmp	r2, r3
 8020078:	f4bf aed6 	bcs.w	801fe28 <tcp_output+0x164>
 802007c:	e000      	b.n	8020080 <tcp_output+0x3bc>
      break;
 802007e:	bf00      	nop
  }
#if TCP_OVERSIZE
  if (pcb->unsent == NULL) {
 8020080:	687b      	ldr	r3, [r7, #4]
 8020082:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020084:	2b00      	cmp	r3, #0
 8020086:	d108      	bne.n	802009a <tcp_output+0x3d6>
    /* last unsent has been removed, reset unsent_oversize */
    pcb->unsent_oversize = 0;
 8020088:	687b      	ldr	r3, [r7, #4]
 802008a:	2200      	movs	r2, #0
 802008c:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
 8020090:	e004      	b.n	802009c <tcp_output+0x3d8>
    goto output_done;
 8020092:	bf00      	nop
 8020094:	e002      	b.n	802009c <tcp_output+0x3d8>
    goto output_done;
 8020096:	bf00      	nop
 8020098:	e000      	b.n	802009c <tcp_output+0x3d8>
  }
#endif /* TCP_OVERSIZE */

output_done:
 802009a:	bf00      	nop
  tcp_clear_flags(pcb, TF_NAGLEMEMERR);
 802009c:	687b      	ldr	r3, [r7, #4]
 802009e:	8b5b      	ldrh	r3, [r3, #26]
 80200a0:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 80200a4:	b29a      	uxth	r2, r3
 80200a6:	687b      	ldr	r3, [r7, #4]
 80200a8:	835a      	strh	r2, [r3, #26]
  return ERR_OK;
 80200aa:	2300      	movs	r3, #0
}
 80200ac:	4618      	mov	r0, r3
 80200ae:	3728      	adds	r7, #40	@ 0x28
 80200b0:	46bd      	mov	sp, r7
 80200b2:	bdb0      	pop	{r4, r5, r7, pc}

080200b4 <tcp_output_segment_busy>:
 * @arg seg the tcp segment to check
 * @return 1 if ref != 1, 0 if ref == 1
 */
static int
tcp_output_segment_busy(const struct tcp_seg *seg)
{
 80200b4:	b580      	push	{r7, lr}
 80200b6:	b082      	sub	sp, #8
 80200b8:	af00      	add	r7, sp, #0
 80200ba:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_output_segment_busy: invalid seg", seg != NULL);
 80200bc:	687b      	ldr	r3, [r7, #4]
 80200be:	2b00      	cmp	r3, #0
 80200c0:	d106      	bne.n	80200d0 <tcp_output_segment_busy+0x1c>
 80200c2:	4b09      	ldr	r3, [pc, #36]	@ (80200e8 <tcp_output_segment_busy+0x34>)
 80200c4:	f240 529a 	movw	r2, #1434	@ 0x59a
 80200c8:	4908      	ldr	r1, [pc, #32]	@ (80200ec <tcp_output_segment_busy+0x38>)
 80200ca:	4809      	ldr	r0, [pc, #36]	@ (80200f0 <tcp_output_segment_busy+0x3c>)
 80200cc:	f009 fc86 	bl	80299dc <iprintf>

  /* We only need to check the first pbuf here:
     If a pbuf is queued for transmission, a driver calls pbuf_ref(),
     which only changes the ref count of the first pbuf */
  if (seg->p->ref != 1) {
 80200d0:	687b      	ldr	r3, [r7, #4]
 80200d2:	685b      	ldr	r3, [r3, #4]
 80200d4:	7b9b      	ldrb	r3, [r3, #14]
 80200d6:	2b01      	cmp	r3, #1
 80200d8:	d001      	beq.n	80200de <tcp_output_segment_busy+0x2a>
    /* other reference found */
    return 1;
 80200da:	2301      	movs	r3, #1
 80200dc:	e000      	b.n	80200e0 <tcp_output_segment_busy+0x2c>
  }
  /* no other references found */
  return 0;
 80200de:	2300      	movs	r3, #0
}
 80200e0:	4618      	mov	r0, r3
 80200e2:	3708      	adds	r7, #8
 80200e4:	46bd      	mov	sp, r7
 80200e6:	bd80      	pop	{r7, pc}
 80200e8:	0802f1d8 	.word	0x0802f1d8
 80200ec:	0802f7d0 	.word	0x0802f7d0
 80200f0:	0802f22c 	.word	0x0802f22c

080200f4 <tcp_output_segment>:
 * @param pcb the tcp_pcb for the TCP connection used to send the segment
 * @param netif the netif used to send the segment
 */
static err_t
tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif)
{
 80200f4:	b5b0      	push	{r4, r5, r7, lr}
 80200f6:	b08c      	sub	sp, #48	@ 0x30
 80200f8:	af04      	add	r7, sp, #16
 80200fa:	60f8      	str	r0, [r7, #12]
 80200fc:	60b9      	str	r1, [r7, #8]
 80200fe:	607a      	str	r2, [r7, #4]
  u32_t *opts;
#if TCP_CHECKSUM_ON_COPY
  int seg_chksum_was_swapped = 0;
#endif

  LWIP_ASSERT("tcp_output_segment: invalid seg", seg != NULL);
 8020100:	68fb      	ldr	r3, [r7, #12]
 8020102:	2b00      	cmp	r3, #0
 8020104:	d106      	bne.n	8020114 <tcp_output_segment+0x20>
 8020106:	4b64      	ldr	r3, [pc, #400]	@ (8020298 <tcp_output_segment+0x1a4>)
 8020108:	f44f 62b7 	mov.w	r2, #1464	@ 0x5b8
 802010c:	4963      	ldr	r1, [pc, #396]	@ (802029c <tcp_output_segment+0x1a8>)
 802010e:	4864      	ldr	r0, [pc, #400]	@ (80202a0 <tcp_output_segment+0x1ac>)
 8020110:	f009 fc64 	bl	80299dc <iprintf>
  LWIP_ASSERT("tcp_output_segment: invalid pcb", pcb != NULL);
 8020114:	68bb      	ldr	r3, [r7, #8]
 8020116:	2b00      	cmp	r3, #0
 8020118:	d106      	bne.n	8020128 <tcp_output_segment+0x34>
 802011a:	4b5f      	ldr	r3, [pc, #380]	@ (8020298 <tcp_output_segment+0x1a4>)
 802011c:	f240 52b9 	movw	r2, #1465	@ 0x5b9
 8020120:	4960      	ldr	r1, [pc, #384]	@ (80202a4 <tcp_output_segment+0x1b0>)
 8020122:	485f      	ldr	r0, [pc, #380]	@ (80202a0 <tcp_output_segment+0x1ac>)
 8020124:	f009 fc5a 	bl	80299dc <iprintf>
  LWIP_ASSERT("tcp_output_segment: invalid netif", netif != NULL);
 8020128:	687b      	ldr	r3, [r7, #4]
 802012a:	2b00      	cmp	r3, #0
 802012c:	d106      	bne.n	802013c <tcp_output_segment+0x48>
 802012e:	4b5a      	ldr	r3, [pc, #360]	@ (8020298 <tcp_output_segment+0x1a4>)
 8020130:	f240 52ba 	movw	r2, #1466	@ 0x5ba
 8020134:	495c      	ldr	r1, [pc, #368]	@ (80202a8 <tcp_output_segment+0x1b4>)
 8020136:	485a      	ldr	r0, [pc, #360]	@ (80202a0 <tcp_output_segment+0x1ac>)
 8020138:	f009 fc50 	bl	80299dc <iprintf>

  if (tcp_output_segment_busy(seg)) {
 802013c:	68f8      	ldr	r0, [r7, #12]
 802013e:	f7ff ffb9 	bl	80200b4 <tcp_output_segment_busy>
 8020142:	4603      	mov	r3, r0
 8020144:	2b00      	cmp	r3, #0
 8020146:	d001      	beq.n	802014c <tcp_output_segment+0x58>
    /* This should not happen: rexmit functions should have checked this.
       However, since this function modifies p->len, we must not continue in this case. */
    LWIP_DEBUGF(TCP_RTO_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_output_segment: segment busy\n"));
    return ERR_OK;
 8020148:	2300      	movs	r3, #0
 802014a:	e0a1      	b.n	8020290 <tcp_output_segment+0x19c>
  }

  /* The TCP header has already been constructed, but the ackno and
   wnd fields remain. */
  seg->tcphdr->ackno = lwip_htonl(pcb->rcv_nxt);
 802014c:	68bb      	ldr	r3, [r7, #8]
 802014e:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8020150:	68fb      	ldr	r3, [r7, #12]
 8020152:	691c      	ldr	r4, [r3, #16]
 8020154:	4610      	mov	r0, r2
 8020156:	f7f8 fcfc 	bl	8018b52 <lwip_htonl>
 802015a:	4603      	mov	r3, r0
 802015c:	60a3      	str	r3, [r4, #8]
       the window scale option) is never scaled. */
    seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(pcb->rcv_ann_wnd));
  } else
#endif /* LWIP_WND_SCALE */
  {
    seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd)));
 802015e:	68bb      	ldr	r3, [r7, #8]
 8020160:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 8020162:	68fb      	ldr	r3, [r7, #12]
 8020164:	691c      	ldr	r4, [r3, #16]
 8020166:	4610      	mov	r0, r2
 8020168:	f7f8 fcde 	bl	8018b28 <lwip_htons>
 802016c:	4603      	mov	r3, r0
 802016e:	81e3      	strh	r3, [r4, #14]
  }

  pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd;
 8020170:	68bb      	ldr	r3, [r7, #8]
 8020172:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8020174:	68ba      	ldr	r2, [r7, #8]
 8020176:	8d52      	ldrh	r2, [r2, #42]	@ 0x2a
 8020178:	441a      	add	r2, r3
 802017a:	68bb      	ldr	r3, [r7, #8]
 802017c:	62da      	str	r2, [r3, #44]	@ 0x2c

  /* Add any requested options.  NB MSS option is only set on SYN
     packets, so ignore it here */
  /* cast through void* to get rid of alignment warnings */
  opts = (u32_t *)(void *)(seg->tcphdr + 1);
 802017e:	68fb      	ldr	r3, [r7, #12]
 8020180:	691b      	ldr	r3, [r3, #16]
 8020182:	3314      	adds	r3, #20
 8020184:	61fb      	str	r3, [r7, #28]
  if (seg->flags & TF_SEG_OPTS_MSS) {
 8020186:	68fb      	ldr	r3, [r7, #12]
 8020188:	7b1b      	ldrb	r3, [r3, #12]
 802018a:	f003 0301 	and.w	r3, r3, #1
 802018e:	2b00      	cmp	r3, #0
 8020190:	d015      	beq.n	80201be <tcp_output_segment+0xca>
    u16_t mss;
#if TCP_CALCULATE_EFF_SEND_MSS
    mss = tcp_eff_send_mss_netif(TCP_MSS, netif, &pcb->remote_ip);
 8020192:	68bb      	ldr	r3, [r7, #8]
 8020194:	3304      	adds	r3, #4
 8020196:	461a      	mov	r2, r3
 8020198:	6879      	ldr	r1, [r7, #4]
 802019a:	f240 50b4 	movw	r0, #1460	@ 0x5b4
 802019e:	f7fc f9cd 	bl	801c53c <tcp_eff_send_mss_netif>
 80201a2:	4603      	mov	r3, r0
 80201a4:	837b      	strh	r3, [r7, #26]
#else /* TCP_CALCULATE_EFF_SEND_MSS */
    mss = TCP_MSS;
#endif /* TCP_CALCULATE_EFF_SEND_MSS */
    *opts = TCP_BUILD_MSS_OPTION(mss);
 80201a6:	8b7b      	ldrh	r3, [r7, #26]
 80201a8:	f043 7301 	orr.w	r3, r3, #33816576	@ 0x2040000
 80201ac:	4618      	mov	r0, r3
 80201ae:	f7f8 fcd0 	bl	8018b52 <lwip_htonl>
 80201b2:	4602      	mov	r2, r0
 80201b4:	69fb      	ldr	r3, [r7, #28]
 80201b6:	601a      	str	r2, [r3, #0]
    opts += 1;
 80201b8:	69fb      	ldr	r3, [r7, #28]
 80201ba:	3304      	adds	r3, #4
 80201bc:	61fb      	str	r3, [r7, #28]
  }
#endif

  /* Set retransmission timer running if it is not currently enabled
     This must be set before checking the route. */
  if (pcb->rtime < 0) {
 80201be:	68bb      	ldr	r3, [r7, #8]
 80201c0:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 80201c4:	2b00      	cmp	r3, #0
 80201c6:	da02      	bge.n	80201ce <tcp_output_segment+0xda>
    pcb->rtime = 0;
 80201c8:	68bb      	ldr	r3, [r7, #8]
 80201ca:	2200      	movs	r2, #0
 80201cc:	861a      	strh	r2, [r3, #48]	@ 0x30
  }

  if (pcb->rttest == 0) {
 80201ce:	68bb      	ldr	r3, [r7, #8]
 80201d0:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 80201d2:	2b00      	cmp	r3, #0
 80201d4:	d10c      	bne.n	80201f0 <tcp_output_segment+0xfc>
    pcb->rttest = tcp_ticks;
 80201d6:	4b35      	ldr	r3, [pc, #212]	@ (80202ac <tcp_output_segment+0x1b8>)
 80201d8:	681a      	ldr	r2, [r3, #0]
 80201da:	68bb      	ldr	r3, [r7, #8]
 80201dc:	635a      	str	r2, [r3, #52]	@ 0x34
    pcb->rtseq = lwip_ntohl(seg->tcphdr->seqno);
 80201de:	68fb      	ldr	r3, [r7, #12]
 80201e0:	691b      	ldr	r3, [r3, #16]
 80201e2:	685b      	ldr	r3, [r3, #4]
 80201e4:	4618      	mov	r0, r3
 80201e6:	f7f8 fcb4 	bl	8018b52 <lwip_htonl>
 80201ea:	4602      	mov	r2, r0
 80201ec:	68bb      	ldr	r3, [r7, #8]
 80201ee:	639a      	str	r2, [r3, #56]	@ 0x38
  }
  LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output_segment: %"U32_F":%"U32_F"\n",
                                 lwip_htonl(seg->tcphdr->seqno), lwip_htonl(seg->tcphdr->seqno) +
                                 seg->len));

  len = (u16_t)((u8_t *)seg->tcphdr - (u8_t *)seg->p->payload);
 80201f0:	68fb      	ldr	r3, [r7, #12]
 80201f2:	691a      	ldr	r2, [r3, #16]
 80201f4:	68fb      	ldr	r3, [r7, #12]
 80201f6:	685b      	ldr	r3, [r3, #4]
 80201f8:	685b      	ldr	r3, [r3, #4]
 80201fa:	1ad3      	subs	r3, r2, r3
 80201fc:	833b      	strh	r3, [r7, #24]
  if (len == 0) {
    /** Exclude retransmitted segments from this count. */
    MIB2_STATS_INC(mib2.tcpoutsegs);
  }

  seg->p->len -= len;
 80201fe:	68fb      	ldr	r3, [r7, #12]
 8020200:	685b      	ldr	r3, [r3, #4]
 8020202:	8959      	ldrh	r1, [r3, #10]
 8020204:	68fb      	ldr	r3, [r7, #12]
 8020206:	685b      	ldr	r3, [r3, #4]
 8020208:	8b3a      	ldrh	r2, [r7, #24]
 802020a:	1a8a      	subs	r2, r1, r2
 802020c:	b292      	uxth	r2, r2
 802020e:	815a      	strh	r2, [r3, #10]
  seg->p->tot_len -= len;
 8020210:	68fb      	ldr	r3, [r7, #12]
 8020212:	685b      	ldr	r3, [r3, #4]
 8020214:	8919      	ldrh	r1, [r3, #8]
 8020216:	68fb      	ldr	r3, [r7, #12]
 8020218:	685b      	ldr	r3, [r3, #4]
 802021a:	8b3a      	ldrh	r2, [r7, #24]
 802021c:	1a8a      	subs	r2, r1, r2
 802021e:	b292      	uxth	r2, r2
 8020220:	811a      	strh	r2, [r3, #8]

  seg->p->payload = seg->tcphdr;
 8020222:	68fb      	ldr	r3, [r7, #12]
 8020224:	685b      	ldr	r3, [r3, #4]
 8020226:	68fa      	ldr	r2, [r7, #12]
 8020228:	6912      	ldr	r2, [r2, #16]
 802022a:	605a      	str	r2, [r3, #4]

  seg->tcphdr->chksum = 0;
 802022c:	68fb      	ldr	r3, [r7, #12]
 802022e:	691b      	ldr	r3, [r3, #16]
 8020230:	2200      	movs	r2, #0
 8020232:	741a      	strb	r2, [r3, #16]
 8020234:	2200      	movs	r2, #0
 8020236:	745a      	strb	r2, [r3, #17]

#ifdef LWIP_HOOK_TCP_OUT_ADD_TCPOPTS
  opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(seg->p, seg->tcphdr, pcb, opts);
#endif
  LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(seg->tcphdr + 1)) + LWIP_TCP_OPT_LENGTH_SEGMENT(seg->flags, pcb));
 8020238:	68fb      	ldr	r3, [r7, #12]
 802023a:	691a      	ldr	r2, [r3, #16]
 802023c:	68fb      	ldr	r3, [r7, #12]
 802023e:	7b1b      	ldrb	r3, [r3, #12]
 8020240:	f003 0301 	and.w	r3, r3, #1
 8020244:	2b00      	cmp	r3, #0
 8020246:	d001      	beq.n	802024c <tcp_output_segment+0x158>
 8020248:	2318      	movs	r3, #24
 802024a:	e000      	b.n	802024e <tcp_output_segment+0x15a>
 802024c:	2314      	movs	r3, #20
 802024e:	4413      	add	r3, r2
 8020250:	69fa      	ldr	r2, [r7, #28]
 8020252:	429a      	cmp	r2, r3
 8020254:	d006      	beq.n	8020264 <tcp_output_segment+0x170>
 8020256:	4b10      	ldr	r3, [pc, #64]	@ (8020298 <tcp_output_segment+0x1a4>)
 8020258:	f240 621c 	movw	r2, #1564	@ 0x61c
 802025c:	4914      	ldr	r1, [pc, #80]	@ (80202b0 <tcp_output_segment+0x1bc>)
 802025e:	4810      	ldr	r0, [pc, #64]	@ (80202a0 <tcp_output_segment+0x1ac>)
 8020260:	f009 fbbc 	bl	80299dc <iprintf>
  }
#endif /* CHECKSUM_GEN_TCP */
  TCP_STATS_INC(tcp.xmit);

  NETIF_SET_HINTS(netif, &(pcb->netif_hints));
  err = ip_output_if(seg->p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl,
 8020264:	68fb      	ldr	r3, [r7, #12]
 8020266:	6858      	ldr	r0, [r3, #4]
 8020268:	68b9      	ldr	r1, [r7, #8]
 802026a:	68bb      	ldr	r3, [r7, #8]
 802026c:	1d1c      	adds	r4, r3, #4
 802026e:	68bb      	ldr	r3, [r7, #8]
 8020270:	7add      	ldrb	r5, [r3, #11]
 8020272:	68bb      	ldr	r3, [r7, #8]
 8020274:	7a9b      	ldrb	r3, [r3, #10]
 8020276:	687a      	ldr	r2, [r7, #4]
 8020278:	9202      	str	r2, [sp, #8]
 802027a:	2206      	movs	r2, #6
 802027c:	9201      	str	r2, [sp, #4]
 802027e:	9300      	str	r3, [sp, #0]
 8020280:	462b      	mov	r3, r5
 8020282:	4622      	mov	r2, r4
 8020284:	f004 fd7a 	bl	8024d7c <ip4_output_if>
 8020288:	4603      	mov	r3, r0
 802028a:	75fb      	strb	r3, [r7, #23]
    seg->chksum = SWAP_BYTES_IN_WORD(seg->chksum);
    seg->chksum_swapped = 1;
  }
#endif

  return err;
 802028c:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 8020290:	4618      	mov	r0, r3
 8020292:	3720      	adds	r7, #32
 8020294:	46bd      	mov	sp, r7
 8020296:	bdb0      	pop	{r4, r5, r7, pc}
 8020298:	0802f1d8 	.word	0x0802f1d8
 802029c:	0802f7f8 	.word	0x0802f7f8
 80202a0:	0802f22c 	.word	0x0802f22c
 80202a4:	0802f818 	.word	0x0802f818
 80202a8:	0802f838 	.word	0x0802f838
 80202ac:	2402ae88 	.word	0x2402ae88
 80202b0:	0802f85c 	.word	0x0802f85c

080202b4 <tcp_rexmit_rto_prepare>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
err_t
tcp_rexmit_rto_prepare(struct tcp_pcb *pcb)
{
 80202b4:	b5b0      	push	{r4, r5, r7, lr}
 80202b6:	b084      	sub	sp, #16
 80202b8:	af00      	add	r7, sp, #0
 80202ba:	6078      	str	r0, [r7, #4]
  struct tcp_seg *seg;

  LWIP_ASSERT("tcp_rexmit_rto_prepare: invalid pcb", pcb != NULL);
 80202bc:	687b      	ldr	r3, [r7, #4]
 80202be:	2b00      	cmp	r3, #0
 80202c0:	d106      	bne.n	80202d0 <tcp_rexmit_rto_prepare+0x1c>
 80202c2:	4b36      	ldr	r3, [pc, #216]	@ (802039c <tcp_rexmit_rto_prepare+0xe8>)
 80202c4:	f240 6263 	movw	r2, #1635	@ 0x663
 80202c8:	4935      	ldr	r1, [pc, #212]	@ (80203a0 <tcp_rexmit_rto_prepare+0xec>)
 80202ca:	4836      	ldr	r0, [pc, #216]	@ (80203a4 <tcp_rexmit_rto_prepare+0xf0>)
 80202cc:	f009 fb86 	bl	80299dc <iprintf>

  if (pcb->unacked == NULL) {
 80202d0:	687b      	ldr	r3, [r7, #4]
 80202d2:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80202d4:	2b00      	cmp	r3, #0
 80202d6:	d102      	bne.n	80202de <tcp_rexmit_rto_prepare+0x2a>
    return ERR_VAL;
 80202d8:	f06f 0305 	mvn.w	r3, #5
 80202dc:	e059      	b.n	8020392 <tcp_rexmit_rto_prepare+0xde>

  /* Move all unacked segments to the head of the unsent queue.
     However, give up if any of the unsent pbufs are still referenced by the
     netif driver due to deferred transmission. No point loading the link further
     if it is struggling to flush its buffered writes. */
  for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) {
 80202de:	687b      	ldr	r3, [r7, #4]
 80202e0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80202e2:	60fb      	str	r3, [r7, #12]
 80202e4:	e00b      	b.n	80202fe <tcp_rexmit_rto_prepare+0x4a>
    if (tcp_output_segment_busy(seg)) {
 80202e6:	68f8      	ldr	r0, [r7, #12]
 80202e8:	f7ff fee4 	bl	80200b4 <tcp_output_segment_busy>
 80202ec:	4603      	mov	r3, r0
 80202ee:	2b00      	cmp	r3, #0
 80202f0:	d002      	beq.n	80202f8 <tcp_rexmit_rto_prepare+0x44>
      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n"));
      return ERR_VAL;
 80202f2:	f06f 0305 	mvn.w	r3, #5
 80202f6:	e04c      	b.n	8020392 <tcp_rexmit_rto_prepare+0xde>
  for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) {
 80202f8:	68fb      	ldr	r3, [r7, #12]
 80202fa:	681b      	ldr	r3, [r3, #0]
 80202fc:	60fb      	str	r3, [r7, #12]
 80202fe:	68fb      	ldr	r3, [r7, #12]
 8020300:	681b      	ldr	r3, [r3, #0]
 8020302:	2b00      	cmp	r3, #0
 8020304:	d1ef      	bne.n	80202e6 <tcp_rexmit_rto_prepare+0x32>
    }
  }
  if (tcp_output_segment_busy(seg)) {
 8020306:	68f8      	ldr	r0, [r7, #12]
 8020308:	f7ff fed4 	bl	80200b4 <tcp_output_segment_busy>
 802030c:	4603      	mov	r3, r0
 802030e:	2b00      	cmp	r3, #0
 8020310:	d002      	beq.n	8020318 <tcp_rexmit_rto_prepare+0x64>
    LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n"));
    return ERR_VAL;
 8020312:	f06f 0305 	mvn.w	r3, #5
 8020316:	e03c      	b.n	8020392 <tcp_rexmit_rto_prepare+0xde>
  }
  /* concatenate unsent queue after unacked queue */
  seg->next = pcb->unsent;
 8020318:	687b      	ldr	r3, [r7, #4]
 802031a:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 802031c:	68fb      	ldr	r3, [r7, #12]
 802031e:	601a      	str	r2, [r3, #0]
#if TCP_OVERSIZE_DBGCHECK
  /* if last unsent changed, we need to update unsent_oversize */
  if (pcb->unsent == NULL) {
 8020320:	687b      	ldr	r3, [r7, #4]
 8020322:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020324:	2b00      	cmp	r3, #0
 8020326:	d104      	bne.n	8020332 <tcp_rexmit_rto_prepare+0x7e>
    pcb->unsent_oversize = seg->oversize_left;
 8020328:	68fb      	ldr	r3, [r7, #12]
 802032a:	895a      	ldrh	r2, [r3, #10]
 802032c:	687b      	ldr	r3, [r7, #4]
 802032e:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE_DBGCHECK */
  /* unsent queue is the concatenated queue (of unacked, unsent) */
  pcb->unsent = pcb->unacked;
 8020332:	687b      	ldr	r3, [r7, #4]
 8020334:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 8020336:	687b      	ldr	r3, [r7, #4]
 8020338:	66da      	str	r2, [r3, #108]	@ 0x6c
  /* unacked queue is now empty */
  pcb->unacked = NULL;
 802033a:	687b      	ldr	r3, [r7, #4]
 802033c:	2200      	movs	r2, #0
 802033e:	671a      	str	r2, [r3, #112]	@ 0x70

  /* Mark RTO in-progress */
  tcp_set_flags(pcb, TF_RTO);
 8020340:	687b      	ldr	r3, [r7, #4]
 8020342:	8b5b      	ldrh	r3, [r3, #26]
 8020344:	f443 6300 	orr.w	r3, r3, #2048	@ 0x800
 8020348:	b29a      	uxth	r2, r3
 802034a:	687b      	ldr	r3, [r7, #4]
 802034c:	835a      	strh	r2, [r3, #26]
  /* Record the next byte following retransmit */
  pcb->rto_end = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);
 802034e:	68fb      	ldr	r3, [r7, #12]
 8020350:	691b      	ldr	r3, [r3, #16]
 8020352:	685b      	ldr	r3, [r3, #4]
 8020354:	4618      	mov	r0, r3
 8020356:	f7f8 fbfc 	bl	8018b52 <lwip_htonl>
 802035a:	4604      	mov	r4, r0
 802035c:	68fb      	ldr	r3, [r7, #12]
 802035e:	891b      	ldrh	r3, [r3, #8]
 8020360:	461d      	mov	r5, r3
 8020362:	68fb      	ldr	r3, [r7, #12]
 8020364:	691b      	ldr	r3, [r3, #16]
 8020366:	899b      	ldrh	r3, [r3, #12]
 8020368:	b29b      	uxth	r3, r3
 802036a:	4618      	mov	r0, r3
 802036c:	f7f8 fbdc 	bl	8018b28 <lwip_htons>
 8020370:	4603      	mov	r3, r0
 8020372:	b2db      	uxtb	r3, r3
 8020374:	f003 0303 	and.w	r3, r3, #3
 8020378:	2b00      	cmp	r3, #0
 802037a:	d001      	beq.n	8020380 <tcp_rexmit_rto_prepare+0xcc>
 802037c:	2301      	movs	r3, #1
 802037e:	e000      	b.n	8020382 <tcp_rexmit_rto_prepare+0xce>
 8020380:	2300      	movs	r3, #0
 8020382:	442b      	add	r3, r5
 8020384:	18e2      	adds	r2, r4, r3
 8020386:	687b      	ldr	r3, [r7, #4]
 8020388:	64da      	str	r2, [r3, #76]	@ 0x4c
  /* Don't take any RTT measurements after retransmitting. */
  pcb->rttest = 0;
 802038a:	687b      	ldr	r3, [r7, #4]
 802038c:	2200      	movs	r2, #0
 802038e:	635a      	str	r2, [r3, #52]	@ 0x34

  return ERR_OK;
 8020390:	2300      	movs	r3, #0
}
 8020392:	4618      	mov	r0, r3
 8020394:	3710      	adds	r7, #16
 8020396:	46bd      	mov	sp, r7
 8020398:	bdb0      	pop	{r4, r5, r7, pc}
 802039a:	bf00      	nop
 802039c:	0802f1d8 	.word	0x0802f1d8
 80203a0:	0802f870 	.word	0x0802f870
 80203a4:	0802f22c 	.word	0x0802f22c

080203a8 <tcp_rexmit_rto_commit>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
void
tcp_rexmit_rto_commit(struct tcp_pcb *pcb)
{
 80203a8:	b580      	push	{r7, lr}
 80203aa:	b082      	sub	sp, #8
 80203ac:	af00      	add	r7, sp, #0
 80203ae:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_rto_commit: invalid pcb", pcb != NULL);
 80203b0:	687b      	ldr	r3, [r7, #4]
 80203b2:	2b00      	cmp	r3, #0
 80203b4:	d106      	bne.n	80203c4 <tcp_rexmit_rto_commit+0x1c>
 80203b6:	4b0d      	ldr	r3, [pc, #52]	@ (80203ec <tcp_rexmit_rto_commit+0x44>)
 80203b8:	f44f 62d3 	mov.w	r2, #1688	@ 0x698
 80203bc:	490c      	ldr	r1, [pc, #48]	@ (80203f0 <tcp_rexmit_rto_commit+0x48>)
 80203be:	480d      	ldr	r0, [pc, #52]	@ (80203f4 <tcp_rexmit_rto_commit+0x4c>)
 80203c0:	f009 fb0c 	bl	80299dc <iprintf>

  /* increment number of retransmissions */
  if (pcb->nrtx < 0xFF) {
 80203c4:	687b      	ldr	r3, [r7, #4]
 80203c6:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 80203ca:	2bff      	cmp	r3, #255	@ 0xff
 80203cc:	d007      	beq.n	80203de <tcp_rexmit_rto_commit+0x36>
    ++pcb->nrtx;
 80203ce:	687b      	ldr	r3, [r7, #4]
 80203d0:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 80203d4:	3301      	adds	r3, #1
 80203d6:	b2da      	uxtb	r2, r3
 80203d8:	687b      	ldr	r3, [r7, #4]
 80203da:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
  }
  /* Do the actual retransmission */
  tcp_output(pcb);
 80203de:	6878      	ldr	r0, [r7, #4]
 80203e0:	f7ff fc70 	bl	801fcc4 <tcp_output>
}
 80203e4:	bf00      	nop
 80203e6:	3708      	adds	r7, #8
 80203e8:	46bd      	mov	sp, r7
 80203ea:	bd80      	pop	{r7, pc}
 80203ec:	0802f1d8 	.word	0x0802f1d8
 80203f0:	0802f894 	.word	0x0802f894
 80203f4:	0802f22c 	.word	0x0802f22c

080203f8 <tcp_rexmit_rto>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
void
tcp_rexmit_rto(struct tcp_pcb *pcb)
{
 80203f8:	b580      	push	{r7, lr}
 80203fa:	b082      	sub	sp, #8
 80203fc:	af00      	add	r7, sp, #0
 80203fe:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_rto: invalid pcb", pcb != NULL);
 8020400:	687b      	ldr	r3, [r7, #4]
 8020402:	2b00      	cmp	r3, #0
 8020404:	d106      	bne.n	8020414 <tcp_rexmit_rto+0x1c>
 8020406:	4b0a      	ldr	r3, [pc, #40]	@ (8020430 <tcp_rexmit_rto+0x38>)
 8020408:	f240 62ad 	movw	r2, #1709	@ 0x6ad
 802040c:	4909      	ldr	r1, [pc, #36]	@ (8020434 <tcp_rexmit_rto+0x3c>)
 802040e:	480a      	ldr	r0, [pc, #40]	@ (8020438 <tcp_rexmit_rto+0x40>)
 8020410:	f009 fae4 	bl	80299dc <iprintf>

  if (tcp_rexmit_rto_prepare(pcb) == ERR_OK) {
 8020414:	6878      	ldr	r0, [r7, #4]
 8020416:	f7ff ff4d 	bl	80202b4 <tcp_rexmit_rto_prepare>
 802041a:	4603      	mov	r3, r0
 802041c:	2b00      	cmp	r3, #0
 802041e:	d102      	bne.n	8020426 <tcp_rexmit_rto+0x2e>
    tcp_rexmit_rto_commit(pcb);
 8020420:	6878      	ldr	r0, [r7, #4]
 8020422:	f7ff ffc1 	bl	80203a8 <tcp_rexmit_rto_commit>
  }
}
 8020426:	bf00      	nop
 8020428:	3708      	adds	r7, #8
 802042a:	46bd      	mov	sp, r7
 802042c:	bd80      	pop	{r7, pc}
 802042e:	bf00      	nop
 8020430:	0802f1d8 	.word	0x0802f1d8
 8020434:	0802f8b8 	.word	0x0802f8b8
 8020438:	0802f22c 	.word	0x0802f22c

0802043c <tcp_rexmit>:
 *
 * @param pcb the tcp_pcb for which to retransmit the first unacked segment
 */
err_t
tcp_rexmit(struct tcp_pcb *pcb)
{
 802043c:	b590      	push	{r4, r7, lr}
 802043e:	b085      	sub	sp, #20
 8020440:	af00      	add	r7, sp, #0
 8020442:	6078      	str	r0, [r7, #4]
  struct tcp_seg *seg;
  struct tcp_seg **cur_seg;

  LWIP_ASSERT("tcp_rexmit: invalid pcb", pcb != NULL);
 8020444:	687b      	ldr	r3, [r7, #4]
 8020446:	2b00      	cmp	r3, #0
 8020448:	d106      	bne.n	8020458 <tcp_rexmit+0x1c>
 802044a:	4b2f      	ldr	r3, [pc, #188]	@ (8020508 <tcp_rexmit+0xcc>)
 802044c:	f240 62c1 	movw	r2, #1729	@ 0x6c1
 8020450:	492e      	ldr	r1, [pc, #184]	@ (802050c <tcp_rexmit+0xd0>)
 8020452:	482f      	ldr	r0, [pc, #188]	@ (8020510 <tcp_rexmit+0xd4>)
 8020454:	f009 fac2 	bl	80299dc <iprintf>

  if (pcb->unacked == NULL) {
 8020458:	687b      	ldr	r3, [r7, #4]
 802045a:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 802045c:	2b00      	cmp	r3, #0
 802045e:	d102      	bne.n	8020466 <tcp_rexmit+0x2a>
    return ERR_VAL;
 8020460:	f06f 0305 	mvn.w	r3, #5
 8020464:	e04c      	b.n	8020500 <tcp_rexmit+0xc4>
  }

  seg = pcb->unacked;
 8020466:	687b      	ldr	r3, [r7, #4]
 8020468:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 802046a:	60bb      	str	r3, [r7, #8]

  /* Give up if the segment is still referenced by the netif driver
     due to deferred transmission. */
  if (tcp_output_segment_busy(seg)) {
 802046c:	68b8      	ldr	r0, [r7, #8]
 802046e:	f7ff fe21 	bl	80200b4 <tcp_output_segment_busy>
 8020472:	4603      	mov	r3, r0
 8020474:	2b00      	cmp	r3, #0
 8020476:	d002      	beq.n	802047e <tcp_rexmit+0x42>
    LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit busy\n"));
    return ERR_VAL;
 8020478:	f06f 0305 	mvn.w	r3, #5
 802047c:	e040      	b.n	8020500 <tcp_rexmit+0xc4>
  }

  /* Move the first unacked segment to the unsent queue */
  /* Keep the unsent queue sorted. */
  pcb->unacked = seg->next;
 802047e:	68bb      	ldr	r3, [r7, #8]
 8020480:	681a      	ldr	r2, [r3, #0]
 8020482:	687b      	ldr	r3, [r7, #4]
 8020484:	671a      	str	r2, [r3, #112]	@ 0x70

  cur_seg = &(pcb->unsent);
 8020486:	687b      	ldr	r3, [r7, #4]
 8020488:	336c      	adds	r3, #108	@ 0x6c
 802048a:	60fb      	str	r3, [r7, #12]
  while (*cur_seg &&
 802048c:	e002      	b.n	8020494 <tcp_rexmit+0x58>
         TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
    cur_seg = &((*cur_seg)->next );
 802048e:	68fb      	ldr	r3, [r7, #12]
 8020490:	681b      	ldr	r3, [r3, #0]
 8020492:	60fb      	str	r3, [r7, #12]
  while (*cur_seg &&
 8020494:	68fb      	ldr	r3, [r7, #12]
 8020496:	681b      	ldr	r3, [r3, #0]
 8020498:	2b00      	cmp	r3, #0
 802049a:	d011      	beq.n	80204c0 <tcp_rexmit+0x84>
         TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
 802049c:	68fb      	ldr	r3, [r7, #12]
 802049e:	681b      	ldr	r3, [r3, #0]
 80204a0:	691b      	ldr	r3, [r3, #16]
 80204a2:	685b      	ldr	r3, [r3, #4]
 80204a4:	4618      	mov	r0, r3
 80204a6:	f7f8 fb54 	bl	8018b52 <lwip_htonl>
 80204aa:	4604      	mov	r4, r0
 80204ac:	68bb      	ldr	r3, [r7, #8]
 80204ae:	691b      	ldr	r3, [r3, #16]
 80204b0:	685b      	ldr	r3, [r3, #4]
 80204b2:	4618      	mov	r0, r3
 80204b4:	f7f8 fb4d 	bl	8018b52 <lwip_htonl>
 80204b8:	4603      	mov	r3, r0
 80204ba:	1ae3      	subs	r3, r4, r3
  while (*cur_seg &&
 80204bc:	2b00      	cmp	r3, #0
 80204be:	dbe6      	blt.n	802048e <tcp_rexmit+0x52>
  }
  seg->next = *cur_seg;
 80204c0:	68fb      	ldr	r3, [r7, #12]
 80204c2:	681a      	ldr	r2, [r3, #0]
 80204c4:	68bb      	ldr	r3, [r7, #8]
 80204c6:	601a      	str	r2, [r3, #0]
  *cur_seg = seg;
 80204c8:	68fb      	ldr	r3, [r7, #12]
 80204ca:	68ba      	ldr	r2, [r7, #8]
 80204cc:	601a      	str	r2, [r3, #0]
#if TCP_OVERSIZE
  if (seg->next == NULL) {
 80204ce:	68bb      	ldr	r3, [r7, #8]
 80204d0:	681b      	ldr	r3, [r3, #0]
 80204d2:	2b00      	cmp	r3, #0
 80204d4:	d103      	bne.n	80204de <tcp_rexmit+0xa2>
    /* the retransmitted segment is last in unsent, so reset unsent_oversize */
    pcb->unsent_oversize = 0;
 80204d6:	687b      	ldr	r3, [r7, #4]
 80204d8:	2200      	movs	r2, #0
 80204da:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE */

  if (pcb->nrtx < 0xFF) {
 80204de:	687b      	ldr	r3, [r7, #4]
 80204e0:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 80204e4:	2bff      	cmp	r3, #255	@ 0xff
 80204e6:	d007      	beq.n	80204f8 <tcp_rexmit+0xbc>
    ++pcb->nrtx;
 80204e8:	687b      	ldr	r3, [r7, #4]
 80204ea:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 80204ee:	3301      	adds	r3, #1
 80204f0:	b2da      	uxtb	r2, r3
 80204f2:	687b      	ldr	r3, [r7, #4]
 80204f4:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
  }

  /* Don't take any rtt measurements after retransmitting. */
  pcb->rttest = 0;
 80204f8:	687b      	ldr	r3, [r7, #4]
 80204fa:	2200      	movs	r2, #0
 80204fc:	635a      	str	r2, [r3, #52]	@ 0x34

  /* Do the actual retransmission. */
  MIB2_STATS_INC(mib2.tcpretranssegs);
  /* No need to call tcp_output: we are always called from tcp_input()
     and thus tcp_output directly returns. */
  return ERR_OK;
 80204fe:	2300      	movs	r3, #0
}
 8020500:	4618      	mov	r0, r3
 8020502:	3714      	adds	r7, #20
 8020504:	46bd      	mov	sp, r7
 8020506:	bd90      	pop	{r4, r7, pc}
 8020508:	0802f1d8 	.word	0x0802f1d8
 802050c:	0802f8d4 	.word	0x0802f8d4
 8020510:	0802f22c 	.word	0x0802f22c

08020514 <tcp_rexmit_fast>:
 *
 * @param pcb the tcp_pcb for which to retransmit the first unacked segment
 */
void
tcp_rexmit_fast(struct tcp_pcb *pcb)
{
 8020514:	b580      	push	{r7, lr}
 8020516:	b082      	sub	sp, #8
 8020518:	af00      	add	r7, sp, #0
 802051a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_fast: invalid pcb", pcb != NULL);
 802051c:	687b      	ldr	r3, [r7, #4]
 802051e:	2b00      	cmp	r3, #0
 8020520:	d106      	bne.n	8020530 <tcp_rexmit_fast+0x1c>
 8020522:	4b2a      	ldr	r3, [pc, #168]	@ (80205cc <tcp_rexmit_fast+0xb8>)
 8020524:	f240 62f9 	movw	r2, #1785	@ 0x6f9
 8020528:	4929      	ldr	r1, [pc, #164]	@ (80205d0 <tcp_rexmit_fast+0xbc>)
 802052a:	482a      	ldr	r0, [pc, #168]	@ (80205d4 <tcp_rexmit_fast+0xc0>)
 802052c:	f009 fa56 	bl	80299dc <iprintf>

  if (pcb->unacked != NULL && !(pcb->flags & TF_INFR)) {
 8020530:	687b      	ldr	r3, [r7, #4]
 8020532:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020534:	2b00      	cmp	r3, #0
 8020536:	d045      	beq.n	80205c4 <tcp_rexmit_fast+0xb0>
 8020538:	687b      	ldr	r3, [r7, #4]
 802053a:	8b5b      	ldrh	r3, [r3, #26]
 802053c:	f003 0304 	and.w	r3, r3, #4
 8020540:	2b00      	cmp	r3, #0
 8020542:	d13f      	bne.n	80205c4 <tcp_rexmit_fast+0xb0>
    LWIP_DEBUGF(TCP_FR_DEBUG,
                ("tcp_receive: dupacks %"U16_F" (%"U32_F
                 "), fast retransmit %"U32_F"\n",
                 (u16_t)pcb->dupacks, pcb->lastack,
                 lwip_ntohl(pcb->unacked->tcphdr->seqno)));
    if (tcp_rexmit(pcb) == ERR_OK) {
 8020544:	6878      	ldr	r0, [r7, #4]
 8020546:	f7ff ff79 	bl	802043c <tcp_rexmit>
 802054a:	4603      	mov	r3, r0
 802054c:	2b00      	cmp	r3, #0
 802054e:	d139      	bne.n	80205c4 <tcp_rexmit_fast+0xb0>
      /* Set ssthresh to half of the minimum of the current
       * cwnd and the advertised window */
      pcb->ssthresh = LWIP_MIN(pcb->cwnd, pcb->snd_wnd) / 2;
 8020550:	687b      	ldr	r3, [r7, #4]
 8020552:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 8020556:	687b      	ldr	r3, [r7, #4]
 8020558:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 802055c:	4293      	cmp	r3, r2
 802055e:	bf28      	it	cs
 8020560:	4613      	movcs	r3, r2
 8020562:	b29b      	uxth	r3, r3
 8020564:	2b00      	cmp	r3, #0
 8020566:	da00      	bge.n	802056a <tcp_rexmit_fast+0x56>
 8020568:	3301      	adds	r3, #1
 802056a:	105b      	asrs	r3, r3, #1
 802056c:	b29a      	uxth	r2, r3
 802056e:	687b      	ldr	r3, [r7, #4]
 8020570:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a

      /* The minimum value for ssthresh should be 2 MSS */
      if (pcb->ssthresh < (2U * pcb->mss)) {
 8020574:	687b      	ldr	r3, [r7, #4]
 8020576:	f8b3 304a 	ldrh.w	r3, [r3, #74]	@ 0x4a
 802057a:	461a      	mov	r2, r3
 802057c:	687b      	ldr	r3, [r7, #4]
 802057e:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 8020580:	005b      	lsls	r3, r3, #1
 8020582:	429a      	cmp	r2, r3
 8020584:	d206      	bcs.n	8020594 <tcp_rexmit_fast+0x80>
        LWIP_DEBUGF(TCP_FR_DEBUG,
                    ("tcp_receive: The minimum value for ssthresh %"TCPWNDSIZE_F
                     " should be min 2 mss %"U16_F"...\n",
                     pcb->ssthresh, (u16_t)(2 * pcb->mss)));
        pcb->ssthresh = 2 * pcb->mss;
 8020586:	687b      	ldr	r3, [r7, #4]
 8020588:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 802058a:	005b      	lsls	r3, r3, #1
 802058c:	b29a      	uxth	r2, r3
 802058e:	687b      	ldr	r3, [r7, #4]
 8020590:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
      }

      pcb->cwnd = pcb->ssthresh + 3 * pcb->mss;
 8020594:	687b      	ldr	r3, [r7, #4]
 8020596:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 802059a:	687b      	ldr	r3, [r7, #4]
 802059c:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 802059e:	4619      	mov	r1, r3
 80205a0:	0049      	lsls	r1, r1, #1
 80205a2:	440b      	add	r3, r1
 80205a4:	b29b      	uxth	r3, r3
 80205a6:	4413      	add	r3, r2
 80205a8:	b29a      	uxth	r2, r3
 80205aa:	687b      	ldr	r3, [r7, #4]
 80205ac:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
      tcp_set_flags(pcb, TF_INFR);
 80205b0:	687b      	ldr	r3, [r7, #4]
 80205b2:	8b5b      	ldrh	r3, [r3, #26]
 80205b4:	f043 0304 	orr.w	r3, r3, #4
 80205b8:	b29a      	uxth	r2, r3
 80205ba:	687b      	ldr	r3, [r7, #4]
 80205bc:	835a      	strh	r2, [r3, #26]

      /* Reset the retransmission timer to prevent immediate rto retransmissions */
      pcb->rtime = 0;
 80205be:	687b      	ldr	r3, [r7, #4]
 80205c0:	2200      	movs	r2, #0
 80205c2:	861a      	strh	r2, [r3, #48]	@ 0x30
    }
  }
}
 80205c4:	bf00      	nop
 80205c6:	3708      	adds	r7, #8
 80205c8:	46bd      	mov	sp, r7
 80205ca:	bd80      	pop	{r7, pc}
 80205cc:	0802f1d8 	.word	0x0802f1d8
 80205d0:	0802f8ec 	.word	0x0802f8ec
 80205d4:	0802f22c 	.word	0x0802f22c

080205d8 <tcp_output_alloc_header_common>:

static struct pbuf *
tcp_output_alloc_header_common(u32_t ackno, u16_t optlen, u16_t datalen,
                        u32_t seqno_be /* already in network byte order */,
                        u16_t src_port, u16_t dst_port, u8_t flags, u16_t wnd)
{
 80205d8:	b580      	push	{r7, lr}
 80205da:	b086      	sub	sp, #24
 80205dc:	af00      	add	r7, sp, #0
 80205de:	60f8      	str	r0, [r7, #12]
 80205e0:	607b      	str	r3, [r7, #4]
 80205e2:	460b      	mov	r3, r1
 80205e4:	817b      	strh	r3, [r7, #10]
 80205e6:	4613      	mov	r3, r2
 80205e8:	813b      	strh	r3, [r7, #8]
  struct tcp_hdr *tcphdr;
  struct pbuf *p;

  p = pbuf_alloc(PBUF_IP, TCP_HLEN + optlen + datalen, PBUF_RAM);
 80205ea:	897a      	ldrh	r2, [r7, #10]
 80205ec:	893b      	ldrh	r3, [r7, #8]
 80205ee:	4413      	add	r3, r2
 80205f0:	b29b      	uxth	r3, r3
 80205f2:	3314      	adds	r3, #20
 80205f4:	b29b      	uxth	r3, r3
 80205f6:	f44f 7220 	mov.w	r2, #640	@ 0x280
 80205fa:	4619      	mov	r1, r3
 80205fc:	2022      	movs	r0, #34	@ 0x22
 80205fe:	f7f9 fc5f 	bl	8019ec0 <pbuf_alloc>
 8020602:	6178      	str	r0, [r7, #20]
  if (p != NULL) {
 8020604:	697b      	ldr	r3, [r7, #20]
 8020606:	2b00      	cmp	r3, #0
 8020608:	d04d      	beq.n	80206a6 <tcp_output_alloc_header_common+0xce>
    LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr",
 802060a:	897b      	ldrh	r3, [r7, #10]
 802060c:	3313      	adds	r3, #19
 802060e:	697a      	ldr	r2, [r7, #20]
 8020610:	8952      	ldrh	r2, [r2, #10]
 8020612:	4293      	cmp	r3, r2
 8020614:	db06      	blt.n	8020624 <tcp_output_alloc_header_common+0x4c>
 8020616:	4b26      	ldr	r3, [pc, #152]	@ (80206b0 <tcp_output_alloc_header_common+0xd8>)
 8020618:	f240 7223 	movw	r2, #1827	@ 0x723
 802061c:	4925      	ldr	r1, [pc, #148]	@ (80206b4 <tcp_output_alloc_header_common+0xdc>)
 802061e:	4826      	ldr	r0, [pc, #152]	@ (80206b8 <tcp_output_alloc_header_common+0xe0>)
 8020620:	f009 f9dc 	bl	80299dc <iprintf>
                (p->len >= TCP_HLEN + optlen));
    tcphdr = (struct tcp_hdr *)p->payload;
 8020624:	697b      	ldr	r3, [r7, #20]
 8020626:	685b      	ldr	r3, [r3, #4]
 8020628:	613b      	str	r3, [r7, #16]
    tcphdr->src = lwip_htons(src_port);
 802062a:	8c3b      	ldrh	r3, [r7, #32]
 802062c:	4618      	mov	r0, r3
 802062e:	f7f8 fa7b 	bl	8018b28 <lwip_htons>
 8020632:	4603      	mov	r3, r0
 8020634:	461a      	mov	r2, r3
 8020636:	693b      	ldr	r3, [r7, #16]
 8020638:	801a      	strh	r2, [r3, #0]
    tcphdr->dest = lwip_htons(dst_port);
 802063a:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 802063c:	4618      	mov	r0, r3
 802063e:	f7f8 fa73 	bl	8018b28 <lwip_htons>
 8020642:	4603      	mov	r3, r0
 8020644:	461a      	mov	r2, r3
 8020646:	693b      	ldr	r3, [r7, #16]
 8020648:	805a      	strh	r2, [r3, #2]
    tcphdr->seqno = seqno_be;
 802064a:	693b      	ldr	r3, [r7, #16]
 802064c:	687a      	ldr	r2, [r7, #4]
 802064e:	605a      	str	r2, [r3, #4]
    tcphdr->ackno = lwip_htonl(ackno);
 8020650:	68f8      	ldr	r0, [r7, #12]
 8020652:	f7f8 fa7e 	bl	8018b52 <lwip_htonl>
 8020656:	4602      	mov	r2, r0
 8020658:	693b      	ldr	r3, [r7, #16]
 802065a:	609a      	str	r2, [r3, #8]
    TCPH_HDRLEN_FLAGS_SET(tcphdr, (5 + optlen / 4), flags);
 802065c:	897b      	ldrh	r3, [r7, #10]
 802065e:	089b      	lsrs	r3, r3, #2
 8020660:	b29b      	uxth	r3, r3
 8020662:	3305      	adds	r3, #5
 8020664:	b29b      	uxth	r3, r3
 8020666:	031b      	lsls	r3, r3, #12
 8020668:	b29a      	uxth	r2, r3
 802066a:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 802066e:	b29b      	uxth	r3, r3
 8020670:	4313      	orrs	r3, r2
 8020672:	b29b      	uxth	r3, r3
 8020674:	4618      	mov	r0, r3
 8020676:	f7f8 fa57 	bl	8018b28 <lwip_htons>
 802067a:	4603      	mov	r3, r0
 802067c:	461a      	mov	r2, r3
 802067e:	693b      	ldr	r3, [r7, #16]
 8020680:	819a      	strh	r2, [r3, #12]
    tcphdr->wnd = lwip_htons(wnd);
 8020682:	8dbb      	ldrh	r3, [r7, #44]	@ 0x2c
 8020684:	4618      	mov	r0, r3
 8020686:	f7f8 fa4f 	bl	8018b28 <lwip_htons>
 802068a:	4603      	mov	r3, r0
 802068c:	461a      	mov	r2, r3
 802068e:	693b      	ldr	r3, [r7, #16]
 8020690:	81da      	strh	r2, [r3, #14]
    tcphdr->chksum = 0;
 8020692:	693b      	ldr	r3, [r7, #16]
 8020694:	2200      	movs	r2, #0
 8020696:	741a      	strb	r2, [r3, #16]
 8020698:	2200      	movs	r2, #0
 802069a:	745a      	strb	r2, [r3, #17]
    tcphdr->urgp = 0;
 802069c:	693b      	ldr	r3, [r7, #16]
 802069e:	2200      	movs	r2, #0
 80206a0:	749a      	strb	r2, [r3, #18]
 80206a2:	2200      	movs	r2, #0
 80206a4:	74da      	strb	r2, [r3, #19]
  }
  return p;
 80206a6:	697b      	ldr	r3, [r7, #20]
}
 80206a8:	4618      	mov	r0, r3
 80206aa:	3718      	adds	r7, #24
 80206ac:	46bd      	mov	sp, r7
 80206ae:	bd80      	pop	{r7, pc}
 80206b0:	0802f1d8 	.word	0x0802f1d8
 80206b4:	0802f90c 	.word	0x0802f90c
 80206b8:	0802f22c 	.word	0x0802f22c

080206bc <tcp_output_alloc_header>:
 * @return pbuf with p->payload being the tcp_hdr
 */
static struct pbuf *
tcp_output_alloc_header(struct tcp_pcb *pcb, u16_t optlen, u16_t datalen,
                        u32_t seqno_be /* already in network byte order */)
{
 80206bc:	b5b0      	push	{r4, r5, r7, lr}
 80206be:	b08a      	sub	sp, #40	@ 0x28
 80206c0:	af04      	add	r7, sp, #16
 80206c2:	60f8      	str	r0, [r7, #12]
 80206c4:	607b      	str	r3, [r7, #4]
 80206c6:	460b      	mov	r3, r1
 80206c8:	817b      	strh	r3, [r7, #10]
 80206ca:	4613      	mov	r3, r2
 80206cc:	813b      	strh	r3, [r7, #8]
  struct pbuf *p;

  LWIP_ASSERT("tcp_output_alloc_header: invalid pcb", pcb != NULL);
 80206ce:	68fb      	ldr	r3, [r7, #12]
 80206d0:	2b00      	cmp	r3, #0
 80206d2:	d106      	bne.n	80206e2 <tcp_output_alloc_header+0x26>
 80206d4:	4b15      	ldr	r3, [pc, #84]	@ (802072c <tcp_output_alloc_header+0x70>)
 80206d6:	f240 7242 	movw	r2, #1858	@ 0x742
 80206da:	4915      	ldr	r1, [pc, #84]	@ (8020730 <tcp_output_alloc_header+0x74>)
 80206dc:	4815      	ldr	r0, [pc, #84]	@ (8020734 <tcp_output_alloc_header+0x78>)
 80206de:	f009 f97d 	bl	80299dc <iprintf>

  p = tcp_output_alloc_header_common(pcb->rcv_nxt, optlen, datalen,
 80206e2:	68fb      	ldr	r3, [r7, #12]
 80206e4:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 80206e6:	68fb      	ldr	r3, [r7, #12]
 80206e8:	8adb      	ldrh	r3, [r3, #22]
 80206ea:	68fa      	ldr	r2, [r7, #12]
 80206ec:	8b12      	ldrh	r2, [r2, #24]
 80206ee:	68f9      	ldr	r1, [r7, #12]
 80206f0:	8d49      	ldrh	r1, [r1, #42]	@ 0x2a
 80206f2:	893d      	ldrh	r5, [r7, #8]
 80206f4:	897c      	ldrh	r4, [r7, #10]
 80206f6:	9103      	str	r1, [sp, #12]
 80206f8:	2110      	movs	r1, #16
 80206fa:	9102      	str	r1, [sp, #8]
 80206fc:	9201      	str	r2, [sp, #4]
 80206fe:	9300      	str	r3, [sp, #0]
 8020700:	687b      	ldr	r3, [r7, #4]
 8020702:	462a      	mov	r2, r5
 8020704:	4621      	mov	r1, r4
 8020706:	f7ff ff67 	bl	80205d8 <tcp_output_alloc_header_common>
 802070a:	6178      	str	r0, [r7, #20]
    seqno_be, pcb->local_port, pcb->remote_port, TCP_ACK,
    TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd)));
  if (p != NULL) {
 802070c:	697b      	ldr	r3, [r7, #20]
 802070e:	2b00      	cmp	r3, #0
 8020710:	d006      	beq.n	8020720 <tcp_output_alloc_header+0x64>
    /* If we're sending a packet, update the announced right window edge */
    pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd;
 8020712:	68fb      	ldr	r3, [r7, #12]
 8020714:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8020716:	68fa      	ldr	r2, [r7, #12]
 8020718:	8d52      	ldrh	r2, [r2, #42]	@ 0x2a
 802071a:	441a      	add	r2, r3
 802071c:	68fb      	ldr	r3, [r7, #12]
 802071e:	62da      	str	r2, [r3, #44]	@ 0x2c
  }
  return p;
 8020720:	697b      	ldr	r3, [r7, #20]
}
 8020722:	4618      	mov	r0, r3
 8020724:	3718      	adds	r7, #24
 8020726:	46bd      	mov	sp, r7
 8020728:	bdb0      	pop	{r4, r5, r7, pc}
 802072a:	bf00      	nop
 802072c:	0802f1d8 	.word	0x0802f1d8
 8020730:	0802f93c 	.word	0x0802f93c
 8020734:	0802f22c 	.word	0x0802f22c

08020738 <tcp_output_fill_options>:

/* Fill in options for control segments */
static void
tcp_output_fill_options(const struct tcp_pcb *pcb, struct pbuf *p, u8_t optflags, u8_t num_sacks)
{
 8020738:	b580      	push	{r7, lr}
 802073a:	b088      	sub	sp, #32
 802073c:	af00      	add	r7, sp, #0
 802073e:	60f8      	str	r0, [r7, #12]
 8020740:	60b9      	str	r1, [r7, #8]
 8020742:	4611      	mov	r1, r2
 8020744:	461a      	mov	r2, r3
 8020746:	460b      	mov	r3, r1
 8020748:	71fb      	strb	r3, [r7, #7]
 802074a:	4613      	mov	r3, r2
 802074c:	71bb      	strb	r3, [r7, #6]
  struct tcp_hdr *tcphdr;
  u32_t *opts;
  u16_t sacks_len = 0;
 802074e:	2300      	movs	r3, #0
 8020750:	83fb      	strh	r3, [r7, #30]

  LWIP_ASSERT("tcp_output_fill_options: invalid pbuf", p != NULL);
 8020752:	68bb      	ldr	r3, [r7, #8]
 8020754:	2b00      	cmp	r3, #0
 8020756:	d106      	bne.n	8020766 <tcp_output_fill_options+0x2e>
 8020758:	4b12      	ldr	r3, [pc, #72]	@ (80207a4 <tcp_output_fill_options+0x6c>)
 802075a:	f240 7256 	movw	r2, #1878	@ 0x756
 802075e:	4912      	ldr	r1, [pc, #72]	@ (80207a8 <tcp_output_fill_options+0x70>)
 8020760:	4812      	ldr	r0, [pc, #72]	@ (80207ac <tcp_output_fill_options+0x74>)
 8020762:	f009 f93b 	bl	80299dc <iprintf>

  tcphdr = (struct tcp_hdr *)p->payload;
 8020766:	68bb      	ldr	r3, [r7, #8]
 8020768:	685b      	ldr	r3, [r3, #4]
 802076a:	61bb      	str	r3, [r7, #24]
  opts = (u32_t *)(void *)(tcphdr + 1);
 802076c:	69bb      	ldr	r3, [r7, #24]
 802076e:	3314      	adds	r3, #20
 8020770:	617b      	str	r3, [r7, #20]
  opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(p, tcphdr, pcb, opts);
#endif

  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(sacks_len);
  LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(tcphdr + 1)) + sacks_len * 4 + LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb));
 8020772:	8bfb      	ldrh	r3, [r7, #30]
 8020774:	009b      	lsls	r3, r3, #2
 8020776:	461a      	mov	r2, r3
 8020778:	79fb      	ldrb	r3, [r7, #7]
 802077a:	009b      	lsls	r3, r3, #2
 802077c:	f003 0304 	and.w	r3, r3, #4
 8020780:	4413      	add	r3, r2
 8020782:	3314      	adds	r3, #20
 8020784:	69ba      	ldr	r2, [r7, #24]
 8020786:	4413      	add	r3, r2
 8020788:	697a      	ldr	r2, [r7, #20]
 802078a:	429a      	cmp	r2, r3
 802078c:	d006      	beq.n	802079c <tcp_output_fill_options+0x64>
 802078e:	4b05      	ldr	r3, [pc, #20]	@ (80207a4 <tcp_output_fill_options+0x6c>)
 8020790:	f240 7275 	movw	r2, #1909	@ 0x775
 8020794:	4906      	ldr	r1, [pc, #24]	@ (80207b0 <tcp_output_fill_options+0x78>)
 8020796:	4805      	ldr	r0, [pc, #20]	@ (80207ac <tcp_output_fill_options+0x74>)
 8020798:	f009 f920 	bl	80299dc <iprintf>
  LWIP_UNUSED_ARG(optflags); /* for LWIP_NOASSERT */
  LWIP_UNUSED_ARG(opts); /* for LWIP_NOASSERT */
}
 802079c:	bf00      	nop
 802079e:	3720      	adds	r7, #32
 80207a0:	46bd      	mov	sp, r7
 80207a2:	bd80      	pop	{r7, pc}
 80207a4:	0802f1d8 	.word	0x0802f1d8
 80207a8:	0802f964 	.word	0x0802f964
 80207ac:	0802f22c 	.word	0x0802f22c
 80207b0:	0802f85c 	.word	0x0802f85c

080207b4 <tcp_output_control_segment>:
 * header checksum and calling ip_output_if while handling netif hints and stats.
 */
static err_t
tcp_output_control_segment(const struct tcp_pcb *pcb, struct pbuf *p,
                           const ip_addr_t *src, const ip_addr_t *dst)
{
 80207b4:	b580      	push	{r7, lr}
 80207b6:	b08a      	sub	sp, #40	@ 0x28
 80207b8:	af04      	add	r7, sp, #16
 80207ba:	60f8      	str	r0, [r7, #12]
 80207bc:	60b9      	str	r1, [r7, #8]
 80207be:	607a      	str	r2, [r7, #4]
 80207c0:	603b      	str	r3, [r7, #0]
  err_t err;
  struct netif *netif;

  LWIP_ASSERT("tcp_output_control_segment: invalid pbuf", p != NULL);
 80207c2:	68bb      	ldr	r3, [r7, #8]
 80207c4:	2b00      	cmp	r3, #0
 80207c6:	d106      	bne.n	80207d6 <tcp_output_control_segment+0x22>
 80207c8:	4b1c      	ldr	r3, [pc, #112]	@ (802083c <tcp_output_control_segment+0x88>)
 80207ca:	f240 7287 	movw	r2, #1927	@ 0x787
 80207ce:	491c      	ldr	r1, [pc, #112]	@ (8020840 <tcp_output_control_segment+0x8c>)
 80207d0:	481c      	ldr	r0, [pc, #112]	@ (8020844 <tcp_output_control_segment+0x90>)
 80207d2:	f009 f903 	bl	80299dc <iprintf>

  netif = tcp_route(pcb, src, dst);
 80207d6:	683a      	ldr	r2, [r7, #0]
 80207d8:	6879      	ldr	r1, [r7, #4]
 80207da:	68f8      	ldr	r0, [r7, #12]
 80207dc:	f7fe fa78 	bl	801ecd0 <tcp_route>
 80207e0:	6138      	str	r0, [r7, #16]
  if (netif == NULL) {
 80207e2:	693b      	ldr	r3, [r7, #16]
 80207e4:	2b00      	cmp	r3, #0
 80207e6:	d102      	bne.n	80207ee <tcp_output_control_segment+0x3a>
    err = ERR_RTE;
 80207e8:	23fc      	movs	r3, #252	@ 0xfc
 80207ea:	75fb      	strb	r3, [r7, #23]
 80207ec:	e01c      	b.n	8020828 <tcp_output_control_segment+0x74>
      struct tcp_hdr *tcphdr = (struct tcp_hdr *)p->payload;
      tcphdr->chksum = ip_chksum_pseudo(p, IP_PROTO_TCP, p->tot_len,
                                        src, dst);
    }
#endif
    if (pcb != NULL) {
 80207ee:	68fb      	ldr	r3, [r7, #12]
 80207f0:	2b00      	cmp	r3, #0
 80207f2:	d006      	beq.n	8020802 <tcp_output_control_segment+0x4e>
      NETIF_SET_HINTS(netif, LWIP_CONST_CAST(struct netif_hint*, &(pcb->netif_hints)));
      ttl = pcb->ttl;
 80207f4:	68fb      	ldr	r3, [r7, #12]
 80207f6:	7adb      	ldrb	r3, [r3, #11]
 80207f8:	75bb      	strb	r3, [r7, #22]
      tos = pcb->tos;
 80207fa:	68fb      	ldr	r3, [r7, #12]
 80207fc:	7a9b      	ldrb	r3, [r3, #10]
 80207fe:	757b      	strb	r3, [r7, #21]
 8020800:	e003      	b.n	802080a <tcp_output_control_segment+0x56>
    } else {
      /* Send output with hardcoded TTL/HL since we have no access to the pcb */
      ttl = TCP_TTL;
 8020802:	23ff      	movs	r3, #255	@ 0xff
 8020804:	75bb      	strb	r3, [r7, #22]
      tos = 0;
 8020806:	2300      	movs	r3, #0
 8020808:	757b      	strb	r3, [r7, #21]
    }
    TCP_STATS_INC(tcp.xmit);
    err = ip_output_if(p, src, dst, ttl, tos, IP_PROTO_TCP, netif);
 802080a:	7dba      	ldrb	r2, [r7, #22]
 802080c:	693b      	ldr	r3, [r7, #16]
 802080e:	9302      	str	r3, [sp, #8]
 8020810:	2306      	movs	r3, #6
 8020812:	9301      	str	r3, [sp, #4]
 8020814:	7d7b      	ldrb	r3, [r7, #21]
 8020816:	9300      	str	r3, [sp, #0]
 8020818:	4613      	mov	r3, r2
 802081a:	683a      	ldr	r2, [r7, #0]
 802081c:	6879      	ldr	r1, [r7, #4]
 802081e:	68b8      	ldr	r0, [r7, #8]
 8020820:	f004 faac 	bl	8024d7c <ip4_output_if>
 8020824:	4603      	mov	r3, r0
 8020826:	75fb      	strb	r3, [r7, #23]
    NETIF_RESET_HINTS(netif);
  }
  pbuf_free(p);
 8020828:	68b8      	ldr	r0, [r7, #8]
 802082a:	f7f9 fe5f 	bl	801a4ec <pbuf_free>
  return err;
 802082e:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 8020832:	4618      	mov	r0, r3
 8020834:	3718      	adds	r7, #24
 8020836:	46bd      	mov	sp, r7
 8020838:	bd80      	pop	{r7, pc}
 802083a:	bf00      	nop
 802083c:	0802f1d8 	.word	0x0802f1d8
 8020840:	0802f98c 	.word	0x0802f98c
 8020844:	0802f22c 	.word	0x0802f22c

08020848 <tcp_rst>:
 */
void
tcp_rst(const struct tcp_pcb *pcb, u32_t seqno, u32_t ackno,
        const ip_addr_t *local_ip, const ip_addr_t *remote_ip,
        u16_t local_port, u16_t remote_port)
{
 8020848:	b590      	push	{r4, r7, lr}
 802084a:	b08b      	sub	sp, #44	@ 0x2c
 802084c:	af04      	add	r7, sp, #16
 802084e:	60f8      	str	r0, [r7, #12]
 8020850:	60b9      	str	r1, [r7, #8]
 8020852:	607a      	str	r2, [r7, #4]
 8020854:	603b      	str	r3, [r7, #0]
  struct pbuf *p;
  u16_t wnd;
  u8_t optlen;

  LWIP_ASSERT("tcp_rst: invalid local_ip", local_ip != NULL);
 8020856:	683b      	ldr	r3, [r7, #0]
 8020858:	2b00      	cmp	r3, #0
 802085a:	d106      	bne.n	802086a <tcp_rst+0x22>
 802085c:	4b1f      	ldr	r3, [pc, #124]	@ (80208dc <tcp_rst+0x94>)
 802085e:	f240 72c4 	movw	r2, #1988	@ 0x7c4
 8020862:	491f      	ldr	r1, [pc, #124]	@ (80208e0 <tcp_rst+0x98>)
 8020864:	481f      	ldr	r0, [pc, #124]	@ (80208e4 <tcp_rst+0x9c>)
 8020866:	f009 f8b9 	bl	80299dc <iprintf>
  LWIP_ASSERT("tcp_rst: invalid remote_ip", remote_ip != NULL);
 802086a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802086c:	2b00      	cmp	r3, #0
 802086e:	d106      	bne.n	802087e <tcp_rst+0x36>
 8020870:	4b1a      	ldr	r3, [pc, #104]	@ (80208dc <tcp_rst+0x94>)
 8020872:	f240 72c5 	movw	r2, #1989	@ 0x7c5
 8020876:	491c      	ldr	r1, [pc, #112]	@ (80208e8 <tcp_rst+0xa0>)
 8020878:	481a      	ldr	r0, [pc, #104]	@ (80208e4 <tcp_rst+0x9c>)
 802087a:	f009 f8af 	bl	80299dc <iprintf>

  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 802087e:	2300      	movs	r3, #0
 8020880:	75fb      	strb	r3, [r7, #23]

#if LWIP_WND_SCALE
  wnd = PP_HTONS(((TCP_WND >> TCP_RCV_SCALE) & 0xFFFF));
#else
  wnd = PP_HTONS(TCP_WND);
 8020882:	f24d 0316 	movw	r3, #53270	@ 0xd016
 8020886:	82bb      	strh	r3, [r7, #20]
#endif

  p = tcp_output_alloc_header_common(ackno, optlen, 0, lwip_htonl(seqno), local_port,
 8020888:	7dfb      	ldrb	r3, [r7, #23]
 802088a:	b29c      	uxth	r4, r3
 802088c:	68b8      	ldr	r0, [r7, #8]
 802088e:	f7f8 f960 	bl	8018b52 <lwip_htonl>
 8020892:	4602      	mov	r2, r0
 8020894:	8abb      	ldrh	r3, [r7, #20]
 8020896:	9303      	str	r3, [sp, #12]
 8020898:	2314      	movs	r3, #20
 802089a:	9302      	str	r3, [sp, #8]
 802089c:	8e3b      	ldrh	r3, [r7, #48]	@ 0x30
 802089e:	9301      	str	r3, [sp, #4]
 80208a0:	8dbb      	ldrh	r3, [r7, #44]	@ 0x2c
 80208a2:	9300      	str	r3, [sp, #0]
 80208a4:	4613      	mov	r3, r2
 80208a6:	2200      	movs	r2, #0
 80208a8:	4621      	mov	r1, r4
 80208aa:	6878      	ldr	r0, [r7, #4]
 80208ac:	f7ff fe94 	bl	80205d8 <tcp_output_alloc_header_common>
 80208b0:	6138      	str	r0, [r7, #16]
    remote_port, TCP_RST | TCP_ACK, wnd);
  if (p == NULL) {
 80208b2:	693b      	ldr	r3, [r7, #16]
 80208b4:	2b00      	cmp	r3, #0
 80208b6:	d00c      	beq.n	80208d2 <tcp_rst+0x8a>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_rst: could not allocate memory for pbuf\n"));
    return;
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 80208b8:	7dfb      	ldrb	r3, [r7, #23]
 80208ba:	2200      	movs	r2, #0
 80208bc:	6939      	ldr	r1, [r7, #16]
 80208be:	68f8      	ldr	r0, [r7, #12]
 80208c0:	f7ff ff3a 	bl	8020738 <tcp_output_fill_options>

  MIB2_STATS_INC(mib2.tcpoutrsts);

  tcp_output_control_segment(pcb, p, local_ip, remote_ip);
 80208c4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80208c6:	683a      	ldr	r2, [r7, #0]
 80208c8:	6939      	ldr	r1, [r7, #16]
 80208ca:	68f8      	ldr	r0, [r7, #12]
 80208cc:	f7ff ff72 	bl	80207b4 <tcp_output_control_segment>
 80208d0:	e000      	b.n	80208d4 <tcp_rst+0x8c>
    return;
 80208d2:	bf00      	nop
  LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_rst: seqno %"U32_F" ackno %"U32_F".\n", seqno, ackno));
}
 80208d4:	371c      	adds	r7, #28
 80208d6:	46bd      	mov	sp, r7
 80208d8:	bd90      	pop	{r4, r7, pc}
 80208da:	bf00      	nop
 80208dc:	0802f1d8 	.word	0x0802f1d8
 80208e0:	0802f9b8 	.word	0x0802f9b8
 80208e4:	0802f22c 	.word	0x0802f22c
 80208e8:	0802f9d4 	.word	0x0802f9d4

080208ec <tcp_send_empty_ack>:
 *
 * @param pcb Protocol control block for the TCP connection to send the ACK
 */
err_t
tcp_send_empty_ack(struct tcp_pcb *pcb)
{
 80208ec:	b590      	push	{r4, r7, lr}
 80208ee:	b087      	sub	sp, #28
 80208f0:	af00      	add	r7, sp, #0
 80208f2:	6078      	str	r0, [r7, #4]
  err_t err;
  struct pbuf *p;
  u8_t optlen, optflags = 0;
 80208f4:	2300      	movs	r3, #0
 80208f6:	75fb      	strb	r3, [r7, #23]
  u8_t num_sacks = 0;
 80208f8:	2300      	movs	r3, #0
 80208fa:	75bb      	strb	r3, [r7, #22]

  LWIP_ASSERT("tcp_send_empty_ack: invalid pcb", pcb != NULL);
 80208fc:	687b      	ldr	r3, [r7, #4]
 80208fe:	2b00      	cmp	r3, #0
 8020900:	d106      	bne.n	8020910 <tcp_send_empty_ack+0x24>
 8020902:	4b28      	ldr	r3, [pc, #160]	@ (80209a4 <tcp_send_empty_ack+0xb8>)
 8020904:	f240 72ea 	movw	r2, #2026	@ 0x7ea
 8020908:	4927      	ldr	r1, [pc, #156]	@ (80209a8 <tcp_send_empty_ack+0xbc>)
 802090a:	4828      	ldr	r0, [pc, #160]	@ (80209ac <tcp_send_empty_ack+0xc0>)
 802090c:	f009 f866 	bl	80299dc <iprintf>
#if LWIP_TCP_TIMESTAMPS
  if (pcb->flags & TF_TIMESTAMP) {
    optflags = TF_SEG_OPTS_TS;
  }
#endif
  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 8020910:	7dfb      	ldrb	r3, [r7, #23]
 8020912:	009b      	lsls	r3, r3, #2
 8020914:	b2db      	uxtb	r3, r3
 8020916:	f003 0304 	and.w	r3, r3, #4
 802091a:	757b      	strb	r3, [r7, #21]
  if ((num_sacks = tcp_get_num_sacks(pcb, optlen)) > 0) {
    optlen += 4 + num_sacks * 8; /* 4 bytes for header (including 2*NOP), plus 8B for each SACK */
  }
#endif

  p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt));
 802091c:	7d7b      	ldrb	r3, [r7, #21]
 802091e:	b29c      	uxth	r4, r3
 8020920:	687b      	ldr	r3, [r7, #4]
 8020922:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8020924:	4618      	mov	r0, r3
 8020926:	f7f8 f914 	bl	8018b52 <lwip_htonl>
 802092a:	4603      	mov	r3, r0
 802092c:	2200      	movs	r2, #0
 802092e:	4621      	mov	r1, r4
 8020930:	6878      	ldr	r0, [r7, #4]
 8020932:	f7ff fec3 	bl	80206bc <tcp_output_alloc_header>
 8020936:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 8020938:	693b      	ldr	r3, [r7, #16]
 802093a:	2b00      	cmp	r3, #0
 802093c:	d109      	bne.n	8020952 <tcp_send_empty_ack+0x66>
    /* let tcp_fasttmr retry sending this ACK */
    tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 802093e:	687b      	ldr	r3, [r7, #4]
 8020940:	8b5b      	ldrh	r3, [r3, #26]
 8020942:	f043 0303 	orr.w	r3, r3, #3
 8020946:	b29a      	uxth	r2, r3
 8020948:	687b      	ldr	r3, [r7, #4]
 802094a:	835a      	strh	r2, [r3, #26]
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: (ACK) could not allocate pbuf\n"));
    return ERR_BUF;
 802094c:	f06f 0301 	mvn.w	r3, #1
 8020950:	e023      	b.n	802099a <tcp_send_empty_ack+0xae>
  }
  tcp_output_fill_options(pcb, p, optflags, num_sacks);
 8020952:	7dbb      	ldrb	r3, [r7, #22]
 8020954:	7dfa      	ldrb	r2, [r7, #23]
 8020956:	6939      	ldr	r1, [r7, #16]
 8020958:	6878      	ldr	r0, [r7, #4]
 802095a:	f7ff feed 	bl	8020738 <tcp_output_fill_options>
  pcb->ts_lastacksent = pcb->rcv_nxt;
#endif

  LWIP_DEBUGF(TCP_OUTPUT_DEBUG,
              ("tcp_output: sending ACK for %"U32_F"\n", pcb->rcv_nxt));
  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 802095e:	687a      	ldr	r2, [r7, #4]
 8020960:	687b      	ldr	r3, [r7, #4]
 8020962:	3304      	adds	r3, #4
 8020964:	6939      	ldr	r1, [r7, #16]
 8020966:	6878      	ldr	r0, [r7, #4]
 8020968:	f7ff ff24 	bl	80207b4 <tcp_output_control_segment>
 802096c:	4603      	mov	r3, r0
 802096e:	73fb      	strb	r3, [r7, #15]
  if (err != ERR_OK) {
 8020970:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8020974:	2b00      	cmp	r3, #0
 8020976:	d007      	beq.n	8020988 <tcp_send_empty_ack+0x9c>
    /* let tcp_fasttmr retry sending this ACK */
    tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 8020978:	687b      	ldr	r3, [r7, #4]
 802097a:	8b5b      	ldrh	r3, [r3, #26]
 802097c:	f043 0303 	orr.w	r3, r3, #3
 8020980:	b29a      	uxth	r2, r3
 8020982:	687b      	ldr	r3, [r7, #4]
 8020984:	835a      	strh	r2, [r3, #26]
 8020986:	e006      	b.n	8020996 <tcp_send_empty_ack+0xaa>
  } else {
    /* remove ACK flags from the PCB, as we sent an empty ACK now */
    tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 8020988:	687b      	ldr	r3, [r7, #4]
 802098a:	8b5b      	ldrh	r3, [r3, #26]
 802098c:	f023 0303 	bic.w	r3, r3, #3
 8020990:	b29a      	uxth	r2, r3
 8020992:	687b      	ldr	r3, [r7, #4]
 8020994:	835a      	strh	r2, [r3, #26]
  }

  return err;
 8020996:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 802099a:	4618      	mov	r0, r3
 802099c:	371c      	adds	r7, #28
 802099e:	46bd      	mov	sp, r7
 80209a0:	bd90      	pop	{r4, r7, pc}
 80209a2:	bf00      	nop
 80209a4:	0802f1d8 	.word	0x0802f1d8
 80209a8:	0802f9f0 	.word	0x0802f9f0
 80209ac:	0802f22c 	.word	0x0802f22c

080209b0 <tcp_keepalive>:
 *
 * @param pcb the tcp_pcb for which to send a keepalive packet
 */
err_t
tcp_keepalive(struct tcp_pcb *pcb)
{
 80209b0:	b590      	push	{r4, r7, lr}
 80209b2:	b085      	sub	sp, #20
 80209b4:	af00      	add	r7, sp, #0
 80209b6:	6078      	str	r0, [r7, #4]
  err_t err;
  struct pbuf *p;
  u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 80209b8:	2300      	movs	r3, #0
 80209ba:	72bb      	strb	r3, [r7, #10]

  LWIP_ASSERT("tcp_keepalive: invalid pcb", pcb != NULL);
 80209bc:	687b      	ldr	r3, [r7, #4]
 80209be:	2b00      	cmp	r3, #0
 80209c0:	d106      	bne.n	80209d0 <tcp_keepalive+0x20>
 80209c2:	4b18      	ldr	r3, [pc, #96]	@ (8020a24 <tcp_keepalive+0x74>)
 80209c4:	f640 0224 	movw	r2, #2084	@ 0x824
 80209c8:	4917      	ldr	r1, [pc, #92]	@ (8020a28 <tcp_keepalive+0x78>)
 80209ca:	4818      	ldr	r0, [pc, #96]	@ (8020a2c <tcp_keepalive+0x7c>)
 80209cc:	f009 f806 	bl	80299dc <iprintf>
  LWIP_DEBUGF(TCP_DEBUG, ("\n"));

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: tcp_ticks %"U32_F"   pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n",
                          tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent));

  p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt - 1));
 80209d0:	7abb      	ldrb	r3, [r7, #10]
 80209d2:	b29c      	uxth	r4, r3
 80209d4:	687b      	ldr	r3, [r7, #4]
 80209d6:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80209d8:	3b01      	subs	r3, #1
 80209da:	4618      	mov	r0, r3
 80209dc:	f7f8 f8b9 	bl	8018b52 <lwip_htonl>
 80209e0:	4603      	mov	r3, r0
 80209e2:	2200      	movs	r2, #0
 80209e4:	4621      	mov	r1, r4
 80209e6:	6878      	ldr	r0, [r7, #4]
 80209e8:	f7ff fe68 	bl	80206bc <tcp_output_alloc_header>
 80209ec:	60f8      	str	r0, [r7, #12]
  if (p == NULL) {
 80209ee:	68fb      	ldr	r3, [r7, #12]
 80209f0:	2b00      	cmp	r3, #0
 80209f2:	d102      	bne.n	80209fa <tcp_keepalive+0x4a>
    LWIP_DEBUGF(TCP_DEBUG,
                ("tcp_keepalive: could not allocate memory for pbuf\n"));
    return ERR_MEM;
 80209f4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80209f8:	e010      	b.n	8020a1c <tcp_keepalive+0x6c>
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 80209fa:	7abb      	ldrb	r3, [r7, #10]
 80209fc:	2200      	movs	r2, #0
 80209fe:	68f9      	ldr	r1, [r7, #12]
 8020a00:	6878      	ldr	r0, [r7, #4]
 8020a02:	f7ff fe99 	bl	8020738 <tcp_output_fill_options>
  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 8020a06:	687a      	ldr	r2, [r7, #4]
 8020a08:	687b      	ldr	r3, [r7, #4]
 8020a0a:	3304      	adds	r3, #4
 8020a0c:	68f9      	ldr	r1, [r7, #12]
 8020a0e:	6878      	ldr	r0, [r7, #4]
 8020a10:	f7ff fed0 	bl	80207b4 <tcp_output_control_segment>
 8020a14:	4603      	mov	r3, r0
 8020a16:	72fb      	strb	r3, [r7, #11]

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: seqno %"U32_F" ackno %"U32_F" err %d.\n",
                          pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err));
  return err;
 8020a18:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 8020a1c:	4618      	mov	r0, r3
 8020a1e:	3714      	adds	r7, #20
 8020a20:	46bd      	mov	sp, r7
 8020a22:	bd90      	pop	{r4, r7, pc}
 8020a24:	0802f1d8 	.word	0x0802f1d8
 8020a28:	0802fa10 	.word	0x0802fa10
 8020a2c:	0802f22c 	.word	0x0802f22c

08020a30 <tcp_zero_window_probe>:
 *
 * @param pcb the tcp_pcb for which to send a zero-window probe packet
 */
err_t
tcp_zero_window_probe(struct tcp_pcb *pcb)
{
 8020a30:	b590      	push	{r4, r7, lr}
 8020a32:	b08b      	sub	sp, #44	@ 0x2c
 8020a34:	af00      	add	r7, sp, #0
 8020a36:	6078      	str	r0, [r7, #4]
  struct tcp_hdr *tcphdr;
  struct tcp_seg *seg;
  u16_t len;
  u8_t is_fin;
  u32_t snd_nxt;
  u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 8020a38:	2300      	movs	r3, #0
 8020a3a:	74fb      	strb	r3, [r7, #19]

  LWIP_ASSERT("tcp_zero_window_probe: invalid pcb", pcb != NULL);
 8020a3c:	687b      	ldr	r3, [r7, #4]
 8020a3e:	2b00      	cmp	r3, #0
 8020a40:	d106      	bne.n	8020a50 <tcp_zero_window_probe+0x20>
 8020a42:	4b4d      	ldr	r3, [pc, #308]	@ (8020b78 <tcp_zero_window_probe+0x148>)
 8020a44:	f640 024f 	movw	r2, #2127	@ 0x84f
 8020a48:	494c      	ldr	r1, [pc, #304]	@ (8020b7c <tcp_zero_window_probe+0x14c>)
 8020a4a:	484d      	ldr	r0, [pc, #308]	@ (8020b80 <tcp_zero_window_probe+0x150>)
 8020a4c:	f008 ffc6 	bl	80299dc <iprintf>
              ("tcp_zero_window_probe: tcp_ticks %"U32_F
               "   pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n",
               tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent));

  /* Only consider unsent, persist timer should be off when there is data in-flight */
  seg = pcb->unsent;
 8020a50:	687b      	ldr	r3, [r7, #4]
 8020a52:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020a54:	627b      	str	r3, [r7, #36]	@ 0x24
  if (seg == NULL) {
 8020a56:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020a58:	2b00      	cmp	r3, #0
 8020a5a:	d101      	bne.n	8020a60 <tcp_zero_window_probe+0x30>
    /* Not expected, persist timer should be off when the send buffer is empty */
    return ERR_OK;
 8020a5c:	2300      	movs	r3, #0
 8020a5e:	e087      	b.n	8020b70 <tcp_zero_window_probe+0x140>

  /* increment probe count. NOTE: we record probe even if it fails
     to actually transmit due to an error. This ensures memory exhaustion/
     routing problem doesn't leave a zero-window pcb as an indefinite zombie.
     RTO mechanism has similar behavior, see pcb->nrtx */
  if (pcb->persist_probe < 0xFF) {
 8020a60:	687b      	ldr	r3, [r7, #4]
 8020a62:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 8020a66:	2bff      	cmp	r3, #255	@ 0xff
 8020a68:	d007      	beq.n	8020a7a <tcp_zero_window_probe+0x4a>
    ++pcb->persist_probe;
 8020a6a:	687b      	ldr	r3, [r7, #4]
 8020a6c:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 8020a70:	3301      	adds	r3, #1
 8020a72:	b2da      	uxtb	r2, r3
 8020a74:	687b      	ldr	r3, [r7, #4]
 8020a76:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a
  }

  is_fin = ((TCPH_FLAGS(seg->tcphdr) & TCP_FIN) != 0) && (seg->len == 0);
 8020a7a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020a7c:	691b      	ldr	r3, [r3, #16]
 8020a7e:	899b      	ldrh	r3, [r3, #12]
 8020a80:	b29b      	uxth	r3, r3
 8020a82:	4618      	mov	r0, r3
 8020a84:	f7f8 f850 	bl	8018b28 <lwip_htons>
 8020a88:	4603      	mov	r3, r0
 8020a8a:	b2db      	uxtb	r3, r3
 8020a8c:	f003 0301 	and.w	r3, r3, #1
 8020a90:	2b00      	cmp	r3, #0
 8020a92:	d005      	beq.n	8020aa0 <tcp_zero_window_probe+0x70>
 8020a94:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020a96:	891b      	ldrh	r3, [r3, #8]
 8020a98:	2b00      	cmp	r3, #0
 8020a9a:	d101      	bne.n	8020aa0 <tcp_zero_window_probe+0x70>
 8020a9c:	2301      	movs	r3, #1
 8020a9e:	e000      	b.n	8020aa2 <tcp_zero_window_probe+0x72>
 8020aa0:	2300      	movs	r3, #0
 8020aa2:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  /* we want to send one seqno: either FIN or data (no options) */
  len = is_fin ? 0 : 1;
 8020aa6:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8020aaa:	2b00      	cmp	r3, #0
 8020aac:	bf0c      	ite	eq
 8020aae:	2301      	moveq	r3, #1
 8020ab0:	2300      	movne	r3, #0
 8020ab2:	b2db      	uxtb	r3, r3
 8020ab4:	843b      	strh	r3, [r7, #32]

  p = tcp_output_alloc_header(pcb, optlen, len, seg->tcphdr->seqno);
 8020ab6:	7cfb      	ldrb	r3, [r7, #19]
 8020ab8:	b299      	uxth	r1, r3
 8020aba:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020abc:	691b      	ldr	r3, [r3, #16]
 8020abe:	685b      	ldr	r3, [r3, #4]
 8020ac0:	8c3a      	ldrh	r2, [r7, #32]
 8020ac2:	6878      	ldr	r0, [r7, #4]
 8020ac4:	f7ff fdfa 	bl	80206bc <tcp_output_alloc_header>
 8020ac8:	61f8      	str	r0, [r7, #28]
  if (p == NULL) {
 8020aca:	69fb      	ldr	r3, [r7, #28]
 8020acc:	2b00      	cmp	r3, #0
 8020ace:	d102      	bne.n	8020ad6 <tcp_zero_window_probe+0xa6>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: no memory for pbuf\n"));
    return ERR_MEM;
 8020ad0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8020ad4:	e04c      	b.n	8020b70 <tcp_zero_window_probe+0x140>
  }
  tcphdr = (struct tcp_hdr *)p->payload;
 8020ad6:	69fb      	ldr	r3, [r7, #28]
 8020ad8:	685b      	ldr	r3, [r3, #4]
 8020ada:	61bb      	str	r3, [r7, #24]

  if (is_fin) {
 8020adc:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8020ae0:	2b00      	cmp	r3, #0
 8020ae2:	d011      	beq.n	8020b08 <tcp_zero_window_probe+0xd8>
    /* FIN segment, no data */
    TCPH_FLAGS_SET(tcphdr, TCP_ACK | TCP_FIN);
 8020ae4:	69bb      	ldr	r3, [r7, #24]
 8020ae6:	899b      	ldrh	r3, [r3, #12]
 8020ae8:	b29b      	uxth	r3, r3
 8020aea:	b21b      	sxth	r3, r3
 8020aec:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 8020af0:	b21c      	sxth	r4, r3
 8020af2:	2011      	movs	r0, #17
 8020af4:	f7f8 f818 	bl	8018b28 <lwip_htons>
 8020af8:	4603      	mov	r3, r0
 8020afa:	b21b      	sxth	r3, r3
 8020afc:	4323      	orrs	r3, r4
 8020afe:	b21b      	sxth	r3, r3
 8020b00:	b29a      	uxth	r2, r3
 8020b02:	69bb      	ldr	r3, [r7, #24]
 8020b04:	819a      	strh	r2, [r3, #12]
 8020b06:	e010      	b.n	8020b2a <tcp_zero_window_probe+0xfa>
  } else {
    /* Data segment, copy in one byte from the head of the unacked queue */
    char *d = ((char *)p->payload + TCP_HLEN);
 8020b08:	69fb      	ldr	r3, [r7, #28]
 8020b0a:	685b      	ldr	r3, [r3, #4]
 8020b0c:	3314      	adds	r3, #20
 8020b0e:	617b      	str	r3, [r7, #20]
    /* Depending on whether the segment has already been sent (unacked) or not
       (unsent), seg->p->payload points to the IP header or TCP header.
       Ensure we copy the first TCP data byte: */
    pbuf_copy_partial(seg->p, d, 1, seg->p->tot_len - seg->len);
 8020b10:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020b12:	6858      	ldr	r0, [r3, #4]
 8020b14:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020b16:	685b      	ldr	r3, [r3, #4]
 8020b18:	891a      	ldrh	r2, [r3, #8]
 8020b1a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020b1c:	891b      	ldrh	r3, [r3, #8]
 8020b1e:	1ad3      	subs	r3, r2, r3
 8020b20:	b29b      	uxth	r3, r3
 8020b22:	2201      	movs	r2, #1
 8020b24:	6979      	ldr	r1, [r7, #20]
 8020b26:	f7f9 fee7 	bl	801a8f8 <pbuf_copy_partial>
  }

  /* The byte may be acknowledged without the window being opened. */
  snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + 1;
 8020b2a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020b2c:	691b      	ldr	r3, [r3, #16]
 8020b2e:	685b      	ldr	r3, [r3, #4]
 8020b30:	4618      	mov	r0, r3
 8020b32:	f7f8 f80e 	bl	8018b52 <lwip_htonl>
 8020b36:	4603      	mov	r3, r0
 8020b38:	3301      	adds	r3, #1
 8020b3a:	60fb      	str	r3, [r7, #12]
  if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) {
 8020b3c:	687b      	ldr	r3, [r7, #4]
 8020b3e:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 8020b40:	68fb      	ldr	r3, [r7, #12]
 8020b42:	1ad3      	subs	r3, r2, r3
 8020b44:	2b00      	cmp	r3, #0
 8020b46:	da02      	bge.n	8020b4e <tcp_zero_window_probe+0x11e>
    pcb->snd_nxt = snd_nxt;
 8020b48:	687b      	ldr	r3, [r7, #4]
 8020b4a:	68fa      	ldr	r2, [r7, #12]
 8020b4c:	651a      	str	r2, [r3, #80]	@ 0x50
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 8020b4e:	7cfb      	ldrb	r3, [r7, #19]
 8020b50:	2200      	movs	r2, #0
 8020b52:	69f9      	ldr	r1, [r7, #28]
 8020b54:	6878      	ldr	r0, [r7, #4]
 8020b56:	f7ff fdef 	bl	8020738 <tcp_output_fill_options>

  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 8020b5a:	687a      	ldr	r2, [r7, #4]
 8020b5c:	687b      	ldr	r3, [r7, #4]
 8020b5e:	3304      	adds	r3, #4
 8020b60:	69f9      	ldr	r1, [r7, #28]
 8020b62:	6878      	ldr	r0, [r7, #4]
 8020b64:	f7ff fe26 	bl	80207b4 <tcp_output_control_segment>
 8020b68:	4603      	mov	r3, r0
 8020b6a:	72fb      	strb	r3, [r7, #11]

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: seqno %"U32_F
                          " ackno %"U32_F" err %d.\n",
                          pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err));
  return err;
 8020b6c:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 8020b70:	4618      	mov	r0, r3
 8020b72:	372c      	adds	r7, #44	@ 0x2c
 8020b74:	46bd      	mov	sp, r7
 8020b76:	bd90      	pop	{r4, r7, pc}
 8020b78:	0802f1d8 	.word	0x0802f1d8
 8020b7c:	0802fa2c 	.word	0x0802fa2c
 8020b80:	0802f22c 	.word	0x0802f22c

08020b84 <tcpip_tcp_timer>:
 *
 * @param arg unused argument
 */
static void
tcpip_tcp_timer(void *arg)
{
 8020b84:	b580      	push	{r7, lr}
 8020b86:	b082      	sub	sp, #8
 8020b88:	af00      	add	r7, sp, #0
 8020b8a:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(arg);

  /* call TCP timer handler */
  tcp_tmr();
 8020b8c:	f7f9 ffa2 	bl	801aad4 <tcp_tmr>
  /* timer still needed? */
  if (tcp_active_pcbs || tcp_tw_pcbs) {
 8020b90:	4b0a      	ldr	r3, [pc, #40]	@ (8020bbc <tcpip_tcp_timer+0x38>)
 8020b92:	681b      	ldr	r3, [r3, #0]
 8020b94:	2b00      	cmp	r3, #0
 8020b96:	d103      	bne.n	8020ba0 <tcpip_tcp_timer+0x1c>
 8020b98:	4b09      	ldr	r3, [pc, #36]	@ (8020bc0 <tcpip_tcp_timer+0x3c>)
 8020b9a:	681b      	ldr	r3, [r3, #0]
 8020b9c:	2b00      	cmp	r3, #0
 8020b9e:	d005      	beq.n	8020bac <tcpip_tcp_timer+0x28>
    /* restart timer */
    sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL);
 8020ba0:	2200      	movs	r2, #0
 8020ba2:	4908      	ldr	r1, [pc, #32]	@ (8020bc4 <tcpip_tcp_timer+0x40>)
 8020ba4:	20fa      	movs	r0, #250	@ 0xfa
 8020ba6:	f000 f8f5 	bl	8020d94 <sys_timeout>
 8020baa:	e003      	b.n	8020bb4 <tcpip_tcp_timer+0x30>
  } else {
    /* disable timer */
    tcpip_tcp_timer_active = 0;
 8020bac:	4b06      	ldr	r3, [pc, #24]	@ (8020bc8 <tcpip_tcp_timer+0x44>)
 8020bae:	2200      	movs	r2, #0
 8020bb0:	601a      	str	r2, [r3, #0]
  }
}
 8020bb2:	bf00      	nop
 8020bb4:	bf00      	nop
 8020bb6:	3708      	adds	r7, #8
 8020bb8:	46bd      	mov	sp, r7
 8020bba:	bd80      	pop	{r7, pc}
 8020bbc:	2402ae94 	.word	0x2402ae94
 8020bc0:	2402ae98 	.word	0x2402ae98
 8020bc4:	08020b85 	.word	0x08020b85
 8020bc8:	2402aee4 	.word	0x2402aee4

08020bcc <tcp_timer_needed>:
 * the reason is to have the TCP timer only running when
 * there are active (or time-wait) PCBs.
 */
void
tcp_timer_needed(void)
{
 8020bcc:	b580      	push	{r7, lr}
 8020bce:	af00      	add	r7, sp, #0
  LWIP_ASSERT_CORE_LOCKED();
 8020bd0:	f7ef fcb8 	bl	8010544 <sys_check_core_locking>

  /* timer is off but needed again? */
  if (!tcpip_tcp_timer_active && (tcp_active_pcbs || tcp_tw_pcbs)) {
 8020bd4:	4b0a      	ldr	r3, [pc, #40]	@ (8020c00 <tcp_timer_needed+0x34>)
 8020bd6:	681b      	ldr	r3, [r3, #0]
 8020bd8:	2b00      	cmp	r3, #0
 8020bda:	d10f      	bne.n	8020bfc <tcp_timer_needed+0x30>
 8020bdc:	4b09      	ldr	r3, [pc, #36]	@ (8020c04 <tcp_timer_needed+0x38>)
 8020bde:	681b      	ldr	r3, [r3, #0]
 8020be0:	2b00      	cmp	r3, #0
 8020be2:	d103      	bne.n	8020bec <tcp_timer_needed+0x20>
 8020be4:	4b08      	ldr	r3, [pc, #32]	@ (8020c08 <tcp_timer_needed+0x3c>)
 8020be6:	681b      	ldr	r3, [r3, #0]
 8020be8:	2b00      	cmp	r3, #0
 8020bea:	d007      	beq.n	8020bfc <tcp_timer_needed+0x30>
    /* enable and start timer */
    tcpip_tcp_timer_active = 1;
 8020bec:	4b04      	ldr	r3, [pc, #16]	@ (8020c00 <tcp_timer_needed+0x34>)
 8020bee:	2201      	movs	r2, #1
 8020bf0:	601a      	str	r2, [r3, #0]
    sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL);
 8020bf2:	2200      	movs	r2, #0
 8020bf4:	4905      	ldr	r1, [pc, #20]	@ (8020c0c <tcp_timer_needed+0x40>)
 8020bf6:	20fa      	movs	r0, #250	@ 0xfa
 8020bf8:	f000 f8cc 	bl	8020d94 <sys_timeout>
  }
}
 8020bfc:	bf00      	nop
 8020bfe:	bd80      	pop	{r7, pc}
 8020c00:	2402aee4 	.word	0x2402aee4
 8020c04:	2402ae94 	.word	0x2402ae94
 8020c08:	2402ae98 	.word	0x2402ae98
 8020c0c:	08020b85 	.word	0x08020b85

08020c10 <sys_timeout_abs>:
#if LWIP_DEBUG_TIMERNAMES
sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg, const char *handler_name)
#else /* LWIP_DEBUG_TIMERNAMES */
sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg)
#endif
{
 8020c10:	b580      	push	{r7, lr}
 8020c12:	b086      	sub	sp, #24
 8020c14:	af00      	add	r7, sp, #0
 8020c16:	60f8      	str	r0, [r7, #12]
 8020c18:	60b9      	str	r1, [r7, #8]
 8020c1a:	607a      	str	r2, [r7, #4]
  struct sys_timeo *timeout, *t;

  timeout = (struct sys_timeo *)memp_malloc(MEMP_SYS_TIMEOUT);
 8020c1c:	200a      	movs	r0, #10
 8020c1e:	f7f8 fd01 	bl	8019624 <memp_malloc>
 8020c22:	6138      	str	r0, [r7, #16]
  if (timeout == NULL) {
 8020c24:	693b      	ldr	r3, [r7, #16]
 8020c26:	2b00      	cmp	r3, #0
 8020c28:	d109      	bne.n	8020c3e <sys_timeout_abs+0x2e>
    LWIP_ASSERT("sys_timeout: timeout != NULL, pool MEMP_SYS_TIMEOUT is empty", timeout != NULL);
 8020c2a:	693b      	ldr	r3, [r7, #16]
 8020c2c:	2b00      	cmp	r3, #0
 8020c2e:	d151      	bne.n	8020cd4 <sys_timeout_abs+0xc4>
 8020c30:	4b2a      	ldr	r3, [pc, #168]	@ (8020cdc <sys_timeout_abs+0xcc>)
 8020c32:	22be      	movs	r2, #190	@ 0xbe
 8020c34:	492a      	ldr	r1, [pc, #168]	@ (8020ce0 <sys_timeout_abs+0xd0>)
 8020c36:	482b      	ldr	r0, [pc, #172]	@ (8020ce4 <sys_timeout_abs+0xd4>)
 8020c38:	f008 fed0 	bl	80299dc <iprintf>
    return;
 8020c3c:	e04a      	b.n	8020cd4 <sys_timeout_abs+0xc4>
  }

  timeout->next = NULL;
 8020c3e:	693b      	ldr	r3, [r7, #16]
 8020c40:	2200      	movs	r2, #0
 8020c42:	601a      	str	r2, [r3, #0]
  timeout->h = handler;
 8020c44:	693b      	ldr	r3, [r7, #16]
 8020c46:	68ba      	ldr	r2, [r7, #8]
 8020c48:	609a      	str	r2, [r3, #8]
  timeout->arg = arg;
 8020c4a:	693b      	ldr	r3, [r7, #16]
 8020c4c:	687a      	ldr	r2, [r7, #4]
 8020c4e:	60da      	str	r2, [r3, #12]
  timeout->time = abs_time;
 8020c50:	693b      	ldr	r3, [r7, #16]
 8020c52:	68fa      	ldr	r2, [r7, #12]
 8020c54:	605a      	str	r2, [r3, #4]
  timeout->handler_name = handler_name;
  LWIP_DEBUGF(TIMERS_DEBUG, ("sys_timeout: %p abs_time=%"U32_F" handler=%s arg=%p\n",
                             (void *)timeout, abs_time, handler_name, (void *)arg));
#endif /* LWIP_DEBUG_TIMERNAMES */

  if (next_timeout == NULL) {
 8020c56:	4b24      	ldr	r3, [pc, #144]	@ (8020ce8 <sys_timeout_abs+0xd8>)
 8020c58:	681b      	ldr	r3, [r3, #0]
 8020c5a:	2b00      	cmp	r3, #0
 8020c5c:	d103      	bne.n	8020c66 <sys_timeout_abs+0x56>
    next_timeout = timeout;
 8020c5e:	4a22      	ldr	r2, [pc, #136]	@ (8020ce8 <sys_timeout_abs+0xd8>)
 8020c60:	693b      	ldr	r3, [r7, #16]
 8020c62:	6013      	str	r3, [r2, #0]
    return;
 8020c64:	e037      	b.n	8020cd6 <sys_timeout_abs+0xc6>
  }
  if (TIME_LESS_THAN(timeout->time, next_timeout->time)) {
 8020c66:	693b      	ldr	r3, [r7, #16]
 8020c68:	685a      	ldr	r2, [r3, #4]
 8020c6a:	4b1f      	ldr	r3, [pc, #124]	@ (8020ce8 <sys_timeout_abs+0xd8>)
 8020c6c:	681b      	ldr	r3, [r3, #0]
 8020c6e:	685b      	ldr	r3, [r3, #4]
 8020c70:	1ad3      	subs	r3, r2, r3
 8020c72:	0fdb      	lsrs	r3, r3, #31
 8020c74:	f003 0301 	and.w	r3, r3, #1
 8020c78:	b2db      	uxtb	r3, r3
 8020c7a:	2b00      	cmp	r3, #0
 8020c7c:	d007      	beq.n	8020c8e <sys_timeout_abs+0x7e>
    timeout->next = next_timeout;
 8020c7e:	4b1a      	ldr	r3, [pc, #104]	@ (8020ce8 <sys_timeout_abs+0xd8>)
 8020c80:	681a      	ldr	r2, [r3, #0]
 8020c82:	693b      	ldr	r3, [r7, #16]
 8020c84:	601a      	str	r2, [r3, #0]
    next_timeout = timeout;
 8020c86:	4a18      	ldr	r2, [pc, #96]	@ (8020ce8 <sys_timeout_abs+0xd8>)
 8020c88:	693b      	ldr	r3, [r7, #16]
 8020c8a:	6013      	str	r3, [r2, #0]
 8020c8c:	e023      	b.n	8020cd6 <sys_timeout_abs+0xc6>
  } else {
    for (t = next_timeout; t != NULL; t = t->next) {
 8020c8e:	4b16      	ldr	r3, [pc, #88]	@ (8020ce8 <sys_timeout_abs+0xd8>)
 8020c90:	681b      	ldr	r3, [r3, #0]
 8020c92:	617b      	str	r3, [r7, #20]
 8020c94:	e01a      	b.n	8020ccc <sys_timeout_abs+0xbc>
      if ((t->next == NULL) || TIME_LESS_THAN(timeout->time, t->next->time)) {
 8020c96:	697b      	ldr	r3, [r7, #20]
 8020c98:	681b      	ldr	r3, [r3, #0]
 8020c9a:	2b00      	cmp	r3, #0
 8020c9c:	d00b      	beq.n	8020cb6 <sys_timeout_abs+0xa6>
 8020c9e:	693b      	ldr	r3, [r7, #16]
 8020ca0:	685a      	ldr	r2, [r3, #4]
 8020ca2:	697b      	ldr	r3, [r7, #20]
 8020ca4:	681b      	ldr	r3, [r3, #0]
 8020ca6:	685b      	ldr	r3, [r3, #4]
 8020ca8:	1ad3      	subs	r3, r2, r3
 8020caa:	0fdb      	lsrs	r3, r3, #31
 8020cac:	f003 0301 	and.w	r3, r3, #1
 8020cb0:	b2db      	uxtb	r3, r3
 8020cb2:	2b00      	cmp	r3, #0
 8020cb4:	d007      	beq.n	8020cc6 <sys_timeout_abs+0xb6>
        timeout->next = t->next;
 8020cb6:	697b      	ldr	r3, [r7, #20]
 8020cb8:	681a      	ldr	r2, [r3, #0]
 8020cba:	693b      	ldr	r3, [r7, #16]
 8020cbc:	601a      	str	r2, [r3, #0]
        t->next = timeout;
 8020cbe:	697b      	ldr	r3, [r7, #20]
 8020cc0:	693a      	ldr	r2, [r7, #16]
 8020cc2:	601a      	str	r2, [r3, #0]
        break;
 8020cc4:	e007      	b.n	8020cd6 <sys_timeout_abs+0xc6>
    for (t = next_timeout; t != NULL; t = t->next) {
 8020cc6:	697b      	ldr	r3, [r7, #20]
 8020cc8:	681b      	ldr	r3, [r3, #0]
 8020cca:	617b      	str	r3, [r7, #20]
 8020ccc:	697b      	ldr	r3, [r7, #20]
 8020cce:	2b00      	cmp	r3, #0
 8020cd0:	d1e1      	bne.n	8020c96 <sys_timeout_abs+0x86>
 8020cd2:	e000      	b.n	8020cd6 <sys_timeout_abs+0xc6>
    return;
 8020cd4:	bf00      	nop
      }
    }
  }
}
 8020cd6:	3718      	adds	r7, #24
 8020cd8:	46bd      	mov	sp, r7
 8020cda:	bd80      	pop	{r7, pc}
 8020cdc:	0802fa50 	.word	0x0802fa50
 8020ce0:	0802fa84 	.word	0x0802fa84
 8020ce4:	0802fac4 	.word	0x0802fac4
 8020ce8:	2402aedc 	.word	0x2402aedc

08020cec <lwip_cyclic_timer>:
#if !LWIP_TESTMODE
static
#endif
void
lwip_cyclic_timer(void *arg)
{
 8020cec:	b580      	push	{r7, lr}
 8020cee:	b086      	sub	sp, #24
 8020cf0:	af00      	add	r7, sp, #0
 8020cf2:	6078      	str	r0, [r7, #4]
  u32_t now;
  u32_t next_timeout_time;
  const struct lwip_cyclic_timer *cyclic = (const struct lwip_cyclic_timer *)arg;
 8020cf4:	687b      	ldr	r3, [r7, #4]
 8020cf6:	617b      	str	r3, [r7, #20]

#if LWIP_DEBUG_TIMERNAMES
  LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: %s()\n", cyclic->handler_name));
#endif
  cyclic->handler();
 8020cf8:	697b      	ldr	r3, [r7, #20]
 8020cfa:	685b      	ldr	r3, [r3, #4]
 8020cfc:	4798      	blx	r3

  now = sys_now();
 8020cfe:	f7ef f985 	bl	801000c <sys_now>
 8020d02:	6138      	str	r0, [r7, #16]
  next_timeout_time = (u32_t)(current_timeout_due_time + cyclic->interval_ms);  /* overflow handled by TIME_LESS_THAN macro */ 
 8020d04:	697b      	ldr	r3, [r7, #20]
 8020d06:	681a      	ldr	r2, [r3, #0]
 8020d08:	4b0f      	ldr	r3, [pc, #60]	@ (8020d48 <lwip_cyclic_timer+0x5c>)
 8020d0a:	681b      	ldr	r3, [r3, #0]
 8020d0c:	4413      	add	r3, r2
 8020d0e:	60fb      	str	r3, [r7, #12]
  if (TIME_LESS_THAN(next_timeout_time, now)) {
 8020d10:	68fa      	ldr	r2, [r7, #12]
 8020d12:	693b      	ldr	r3, [r7, #16]
 8020d14:	1ad3      	subs	r3, r2, r3
 8020d16:	0fdb      	lsrs	r3, r3, #31
 8020d18:	f003 0301 	and.w	r3, r3, #1
 8020d1c:	b2db      	uxtb	r3, r3
 8020d1e:	2b00      	cmp	r3, #0
 8020d20:	d009      	beq.n	8020d36 <lwip_cyclic_timer+0x4a>
    /* timer would immediately expire again -> "overload" -> restart without any correction */
#if LWIP_DEBUG_TIMERNAMES
    sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg, cyclic->handler_name);
#else
    sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg);
 8020d22:	697b      	ldr	r3, [r7, #20]
 8020d24:	681a      	ldr	r2, [r3, #0]
 8020d26:	693b      	ldr	r3, [r7, #16]
 8020d28:	4413      	add	r3, r2
 8020d2a:	687a      	ldr	r2, [r7, #4]
 8020d2c:	4907      	ldr	r1, [pc, #28]	@ (8020d4c <lwip_cyclic_timer+0x60>)
 8020d2e:	4618      	mov	r0, r3
 8020d30:	f7ff ff6e 	bl	8020c10 <sys_timeout_abs>
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg, cyclic->handler_name);
#else
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg);
#endif
  }
}
 8020d34:	e004      	b.n	8020d40 <lwip_cyclic_timer+0x54>
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg);
 8020d36:	687a      	ldr	r2, [r7, #4]
 8020d38:	4904      	ldr	r1, [pc, #16]	@ (8020d4c <lwip_cyclic_timer+0x60>)
 8020d3a:	68f8      	ldr	r0, [r7, #12]
 8020d3c:	f7ff ff68 	bl	8020c10 <sys_timeout_abs>
}
 8020d40:	bf00      	nop
 8020d42:	3718      	adds	r7, #24
 8020d44:	46bd      	mov	sp, r7
 8020d46:	bd80      	pop	{r7, pc}
 8020d48:	2402aee0 	.word	0x2402aee0
 8020d4c:	08020ced 	.word	0x08020ced

08020d50 <sys_timeouts_init>:

/** Initialize this module */
void sys_timeouts_init(void)
{
 8020d50:	b580      	push	{r7, lr}
 8020d52:	b082      	sub	sp, #8
 8020d54:	af00      	add	r7, sp, #0
  size_t i;
  /* tcp_tmr() at index 0 is started on demand */
  for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) {
 8020d56:	2301      	movs	r3, #1
 8020d58:	607b      	str	r3, [r7, #4]
 8020d5a:	e00e      	b.n	8020d7a <sys_timeouts_init+0x2a>
    /* we have to cast via size_t to get rid of const warning
      (this is OK as cyclic_timer() casts back to const* */
    sys_timeout(lwip_cyclic_timers[i].interval_ms, lwip_cyclic_timer, LWIP_CONST_CAST(void *, &lwip_cyclic_timers[i]));
 8020d5c:	4a0b      	ldr	r2, [pc, #44]	@ (8020d8c <sys_timeouts_init+0x3c>)
 8020d5e:	687b      	ldr	r3, [r7, #4]
 8020d60:	f852 0033 	ldr.w	r0, [r2, r3, lsl #3]
 8020d64:	687b      	ldr	r3, [r7, #4]
 8020d66:	00db      	lsls	r3, r3, #3
 8020d68:	4a08      	ldr	r2, [pc, #32]	@ (8020d8c <sys_timeouts_init+0x3c>)
 8020d6a:	4413      	add	r3, r2
 8020d6c:	461a      	mov	r2, r3
 8020d6e:	4908      	ldr	r1, [pc, #32]	@ (8020d90 <sys_timeouts_init+0x40>)
 8020d70:	f000 f810 	bl	8020d94 <sys_timeout>
  for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) {
 8020d74:	687b      	ldr	r3, [r7, #4]
 8020d76:	3301      	adds	r3, #1
 8020d78:	607b      	str	r3, [r7, #4]
 8020d7a:	687b      	ldr	r3, [r7, #4]
 8020d7c:	2b04      	cmp	r3, #4
 8020d7e:	d9ed      	bls.n	8020d5c <sys_timeouts_init+0xc>
  }
}
 8020d80:	bf00      	nop
 8020d82:	bf00      	nop
 8020d84:	3708      	adds	r7, #8
 8020d86:	46bd      	mov	sp, r7
 8020d88:	bd80      	pop	{r7, pc}
 8020d8a:	bf00      	nop
 8020d8c:	08030c40 	.word	0x08030c40
 8020d90:	08020ced 	.word	0x08020ced

08020d94 <sys_timeout>:
sys_timeout_debug(u32_t msecs, sys_timeout_handler handler, void *arg, const char *handler_name)
#else /* LWIP_DEBUG_TIMERNAMES */
void
sys_timeout(u32_t msecs, sys_timeout_handler handler, void *arg)
#endif /* LWIP_DEBUG_TIMERNAMES */
{
 8020d94:	b580      	push	{r7, lr}
 8020d96:	b086      	sub	sp, #24
 8020d98:	af00      	add	r7, sp, #0
 8020d9a:	60f8      	str	r0, [r7, #12]
 8020d9c:	60b9      	str	r1, [r7, #8]
 8020d9e:	607a      	str	r2, [r7, #4]
  u32_t next_timeout_time;

  LWIP_ASSERT_CORE_LOCKED();
 8020da0:	f7ef fbd0 	bl	8010544 <sys_check_core_locking>

  LWIP_ASSERT("Timeout time too long, max is LWIP_UINT32_MAX/4 msecs", msecs <= (LWIP_UINT32_MAX / 4));
 8020da4:	68fb      	ldr	r3, [r7, #12]
 8020da6:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 8020daa:	d306      	bcc.n	8020dba <sys_timeout+0x26>
 8020dac:	4b0a      	ldr	r3, [pc, #40]	@ (8020dd8 <sys_timeout+0x44>)
 8020dae:	f240 1229 	movw	r2, #297	@ 0x129
 8020db2:	490a      	ldr	r1, [pc, #40]	@ (8020ddc <sys_timeout+0x48>)
 8020db4:	480a      	ldr	r0, [pc, #40]	@ (8020de0 <sys_timeout+0x4c>)
 8020db6:	f008 fe11 	bl	80299dc <iprintf>

  next_timeout_time = (u32_t)(sys_now() + msecs); /* overflow handled by TIME_LESS_THAN macro */ 
 8020dba:	f7ef f927 	bl	801000c <sys_now>
 8020dbe:	4602      	mov	r2, r0
 8020dc0:	68fb      	ldr	r3, [r7, #12]
 8020dc2:	4413      	add	r3, r2
 8020dc4:	617b      	str	r3, [r7, #20]

#if LWIP_DEBUG_TIMERNAMES
  sys_timeout_abs(next_timeout_time, handler, arg, handler_name);
#else
  sys_timeout_abs(next_timeout_time, handler, arg);
 8020dc6:	687a      	ldr	r2, [r7, #4]
 8020dc8:	68b9      	ldr	r1, [r7, #8]
 8020dca:	6978      	ldr	r0, [r7, #20]
 8020dcc:	f7ff ff20 	bl	8020c10 <sys_timeout_abs>
#endif
}
 8020dd0:	bf00      	nop
 8020dd2:	3718      	adds	r7, #24
 8020dd4:	46bd      	mov	sp, r7
 8020dd6:	bd80      	pop	{r7, pc}
 8020dd8:	0802fa50 	.word	0x0802fa50
 8020ddc:	0802faec 	.word	0x0802faec
 8020de0:	0802fac4 	.word	0x0802fac4

08020de4 <sys_check_timeouts>:
 *
 * Must be called periodically from your main loop.
 */
void
sys_check_timeouts(void)
{
 8020de4:	b580      	push	{r7, lr}
 8020de6:	b084      	sub	sp, #16
 8020de8:	af00      	add	r7, sp, #0
  u32_t now;

  LWIP_ASSERT_CORE_LOCKED();
 8020dea:	f7ef fbab 	bl	8010544 <sys_check_core_locking>

  /* Process only timers expired at the start of the function. */
  now = sys_now();
 8020dee:	f7ef f90d 	bl	801000c <sys_now>
 8020df2:	60f8      	str	r0, [r7, #12]
    sys_timeout_handler handler;
    void *arg;

    PBUF_CHECK_FREE_OOSEQ();

    tmptimeout = next_timeout;
 8020df4:	4b17      	ldr	r3, [pc, #92]	@ (8020e54 <sys_check_timeouts+0x70>)
 8020df6:	681b      	ldr	r3, [r3, #0]
 8020df8:	60bb      	str	r3, [r7, #8]
    if (tmptimeout == NULL) {
 8020dfa:	68bb      	ldr	r3, [r7, #8]
 8020dfc:	2b00      	cmp	r3, #0
 8020dfe:	d022      	beq.n	8020e46 <sys_check_timeouts+0x62>
      return;
    }

    if (TIME_LESS_THAN(now, tmptimeout->time)) {
 8020e00:	68bb      	ldr	r3, [r7, #8]
 8020e02:	685b      	ldr	r3, [r3, #4]
 8020e04:	68fa      	ldr	r2, [r7, #12]
 8020e06:	1ad3      	subs	r3, r2, r3
 8020e08:	0fdb      	lsrs	r3, r3, #31
 8020e0a:	f003 0301 	and.w	r3, r3, #1
 8020e0e:	b2db      	uxtb	r3, r3
 8020e10:	2b00      	cmp	r3, #0
 8020e12:	d11a      	bne.n	8020e4a <sys_check_timeouts+0x66>
      return;
    }

    /* Timeout has expired */
    next_timeout = tmptimeout->next;
 8020e14:	68bb      	ldr	r3, [r7, #8]
 8020e16:	681b      	ldr	r3, [r3, #0]
 8020e18:	4a0e      	ldr	r2, [pc, #56]	@ (8020e54 <sys_check_timeouts+0x70>)
 8020e1a:	6013      	str	r3, [r2, #0]
    handler = tmptimeout->h;
 8020e1c:	68bb      	ldr	r3, [r7, #8]
 8020e1e:	689b      	ldr	r3, [r3, #8]
 8020e20:	607b      	str	r3, [r7, #4]
    arg = tmptimeout->arg;
 8020e22:	68bb      	ldr	r3, [r7, #8]
 8020e24:	68db      	ldr	r3, [r3, #12]
 8020e26:	603b      	str	r3, [r7, #0]
    current_timeout_due_time = tmptimeout->time;
 8020e28:	68bb      	ldr	r3, [r7, #8]
 8020e2a:	685b      	ldr	r3, [r3, #4]
 8020e2c:	4a0a      	ldr	r2, [pc, #40]	@ (8020e58 <sys_check_timeouts+0x74>)
 8020e2e:	6013      	str	r3, [r2, #0]
    if (handler != NULL) {
      LWIP_DEBUGF(TIMERS_DEBUG, ("sct calling h=%s t=%"U32_F" arg=%p\n",
                                 tmptimeout->handler_name, sys_now() - tmptimeout->time, arg));
    }
#endif /* LWIP_DEBUG_TIMERNAMES */
    memp_free(MEMP_SYS_TIMEOUT, tmptimeout);
 8020e30:	68b9      	ldr	r1, [r7, #8]
 8020e32:	200a      	movs	r0, #10
 8020e34:	f7f8 fc6c 	bl	8019710 <memp_free>
    if (handler != NULL) {
 8020e38:	687b      	ldr	r3, [r7, #4]
 8020e3a:	2b00      	cmp	r3, #0
 8020e3c:	d0da      	beq.n	8020df4 <sys_check_timeouts+0x10>
      handler(arg);
 8020e3e:	687b      	ldr	r3, [r7, #4]
 8020e40:	6838      	ldr	r0, [r7, #0]
 8020e42:	4798      	blx	r3
  do {
 8020e44:	e7d6      	b.n	8020df4 <sys_check_timeouts+0x10>
      return;
 8020e46:	bf00      	nop
 8020e48:	e000      	b.n	8020e4c <sys_check_timeouts+0x68>
      return;
 8020e4a:	bf00      	nop
    }
    LWIP_TCPIP_THREAD_ALIVE();

    /* Repeat until all expired timers have been called */
  } while (1);
}
 8020e4c:	3710      	adds	r7, #16
 8020e4e:	46bd      	mov	sp, r7
 8020e50:	bd80      	pop	{r7, pc}
 8020e52:	bf00      	nop
 8020e54:	2402aedc 	.word	0x2402aedc
 8020e58:	2402aee0 	.word	0x2402aee0

08020e5c <sys_timeouts_sleeptime>:
/** Return the time left before the next timeout is due. If no timeouts are
 * enqueued, returns 0xffffffff
 */
u32_t
sys_timeouts_sleeptime(void)
{
 8020e5c:	b580      	push	{r7, lr}
 8020e5e:	b082      	sub	sp, #8
 8020e60:	af00      	add	r7, sp, #0
  u32_t now;

  LWIP_ASSERT_CORE_LOCKED();
 8020e62:	f7ef fb6f 	bl	8010544 <sys_check_core_locking>

  if (next_timeout == NULL) {
 8020e66:	4b16      	ldr	r3, [pc, #88]	@ (8020ec0 <sys_timeouts_sleeptime+0x64>)
 8020e68:	681b      	ldr	r3, [r3, #0]
 8020e6a:	2b00      	cmp	r3, #0
 8020e6c:	d102      	bne.n	8020e74 <sys_timeouts_sleeptime+0x18>
    return SYS_TIMEOUTS_SLEEPTIME_INFINITE;
 8020e6e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8020e72:	e020      	b.n	8020eb6 <sys_timeouts_sleeptime+0x5a>
  }
  now = sys_now();
 8020e74:	f7ef f8ca 	bl	801000c <sys_now>
 8020e78:	6078      	str	r0, [r7, #4]
  if (TIME_LESS_THAN(next_timeout->time, now)) {
 8020e7a:	4b11      	ldr	r3, [pc, #68]	@ (8020ec0 <sys_timeouts_sleeptime+0x64>)
 8020e7c:	681b      	ldr	r3, [r3, #0]
 8020e7e:	685a      	ldr	r2, [r3, #4]
 8020e80:	687b      	ldr	r3, [r7, #4]
 8020e82:	1ad3      	subs	r3, r2, r3
 8020e84:	0fdb      	lsrs	r3, r3, #31
 8020e86:	f003 0301 	and.w	r3, r3, #1
 8020e8a:	b2db      	uxtb	r3, r3
 8020e8c:	2b00      	cmp	r3, #0
 8020e8e:	d001      	beq.n	8020e94 <sys_timeouts_sleeptime+0x38>
    return 0;
 8020e90:	2300      	movs	r3, #0
 8020e92:	e010      	b.n	8020eb6 <sys_timeouts_sleeptime+0x5a>
  } else {
    u32_t ret = (u32_t)(next_timeout->time - now);
 8020e94:	4b0a      	ldr	r3, [pc, #40]	@ (8020ec0 <sys_timeouts_sleeptime+0x64>)
 8020e96:	681b      	ldr	r3, [r3, #0]
 8020e98:	685a      	ldr	r2, [r3, #4]
 8020e9a:	687b      	ldr	r3, [r7, #4]
 8020e9c:	1ad3      	subs	r3, r2, r3
 8020e9e:	603b      	str	r3, [r7, #0]
    LWIP_ASSERT("invalid sleeptime", ret <= LWIP_MAX_TIMEOUT);
 8020ea0:	683b      	ldr	r3, [r7, #0]
 8020ea2:	2b00      	cmp	r3, #0
 8020ea4:	da06      	bge.n	8020eb4 <sys_timeouts_sleeptime+0x58>
 8020ea6:	4b07      	ldr	r3, [pc, #28]	@ (8020ec4 <sys_timeouts_sleeptime+0x68>)
 8020ea8:	f44f 72dc 	mov.w	r2, #440	@ 0x1b8
 8020eac:	4906      	ldr	r1, [pc, #24]	@ (8020ec8 <sys_timeouts_sleeptime+0x6c>)
 8020eae:	4807      	ldr	r0, [pc, #28]	@ (8020ecc <sys_timeouts_sleeptime+0x70>)
 8020eb0:	f008 fd94 	bl	80299dc <iprintf>
    return ret;
 8020eb4:	683b      	ldr	r3, [r7, #0]
  }
}
 8020eb6:	4618      	mov	r0, r3
 8020eb8:	3708      	adds	r7, #8
 8020eba:	46bd      	mov	sp, r7
 8020ebc:	bd80      	pop	{r7, pc}
 8020ebe:	bf00      	nop
 8020ec0:	2402aedc 	.word	0x2402aedc
 8020ec4:	0802fa50 	.word	0x0802fa50
 8020ec8:	0802fb24 	.word	0x0802fb24
 8020ecc:	0802fac4 	.word	0x0802fac4

08020ed0 <udp_init>:
/**
 * Initialize this module.
 */
void
udp_init(void)
{
 8020ed0:	b580      	push	{r7, lr}
 8020ed2:	af00      	add	r7, sp, #0
#ifdef LWIP_RAND
  udp_port = UDP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND());
 8020ed4:	f007 fa58 	bl	8028388 <rand>
 8020ed8:	4603      	mov	r3, r0
 8020eda:	b29b      	uxth	r3, r3
 8020edc:	f3c3 030d 	ubfx	r3, r3, #0, #14
 8020ee0:	b29b      	uxth	r3, r3
 8020ee2:	f5a3 4380 	sub.w	r3, r3, #16384	@ 0x4000
 8020ee6:	b29a      	uxth	r2, r3
 8020ee8:	4b01      	ldr	r3, [pc, #4]	@ (8020ef0 <udp_init+0x20>)
 8020eea:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_RAND */
}
 8020eec:	bf00      	nop
 8020eee:	bd80      	pop	{r7, pc}
 8020ef0:	24000054 	.word	0x24000054

08020ef4 <udp_new_port>:
 *
 * @return a new (free) local UDP port number
 */
static u16_t
udp_new_port(void)
{
 8020ef4:	b480      	push	{r7}
 8020ef6:	b083      	sub	sp, #12
 8020ef8:	af00      	add	r7, sp, #0
  u16_t n = 0;
 8020efa:	2300      	movs	r3, #0
 8020efc:	80fb      	strh	r3, [r7, #6]
  struct udp_pcb *pcb;

again:
  if (udp_port++ == UDP_LOCAL_PORT_RANGE_END) {
 8020efe:	4b17      	ldr	r3, [pc, #92]	@ (8020f5c <udp_new_port+0x68>)
 8020f00:	881b      	ldrh	r3, [r3, #0]
 8020f02:	1c5a      	adds	r2, r3, #1
 8020f04:	b291      	uxth	r1, r2
 8020f06:	4a15      	ldr	r2, [pc, #84]	@ (8020f5c <udp_new_port+0x68>)
 8020f08:	8011      	strh	r1, [r2, #0]
 8020f0a:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 8020f0e:	4293      	cmp	r3, r2
 8020f10:	d103      	bne.n	8020f1a <udp_new_port+0x26>
    udp_port = UDP_LOCAL_PORT_RANGE_START;
 8020f12:	4b12      	ldr	r3, [pc, #72]	@ (8020f5c <udp_new_port+0x68>)
 8020f14:	f44f 4240 	mov.w	r2, #49152	@ 0xc000
 8020f18:	801a      	strh	r2, [r3, #0]
  }
  /* Check all PCBs. */
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8020f1a:	4b11      	ldr	r3, [pc, #68]	@ (8020f60 <udp_new_port+0x6c>)
 8020f1c:	681b      	ldr	r3, [r3, #0]
 8020f1e:	603b      	str	r3, [r7, #0]
 8020f20:	e011      	b.n	8020f46 <udp_new_port+0x52>
    if (pcb->local_port == udp_port) {
 8020f22:	683b      	ldr	r3, [r7, #0]
 8020f24:	8a5a      	ldrh	r2, [r3, #18]
 8020f26:	4b0d      	ldr	r3, [pc, #52]	@ (8020f5c <udp_new_port+0x68>)
 8020f28:	881b      	ldrh	r3, [r3, #0]
 8020f2a:	429a      	cmp	r2, r3
 8020f2c:	d108      	bne.n	8020f40 <udp_new_port+0x4c>
      if (++n > (UDP_LOCAL_PORT_RANGE_END - UDP_LOCAL_PORT_RANGE_START)) {
 8020f2e:	88fb      	ldrh	r3, [r7, #6]
 8020f30:	3301      	adds	r3, #1
 8020f32:	80fb      	strh	r3, [r7, #6]
 8020f34:	88fb      	ldrh	r3, [r7, #6]
 8020f36:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 8020f3a:	d3e0      	bcc.n	8020efe <udp_new_port+0xa>
        return 0;
 8020f3c:	2300      	movs	r3, #0
 8020f3e:	e007      	b.n	8020f50 <udp_new_port+0x5c>
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8020f40:	683b      	ldr	r3, [r7, #0]
 8020f42:	68db      	ldr	r3, [r3, #12]
 8020f44:	603b      	str	r3, [r7, #0]
 8020f46:	683b      	ldr	r3, [r7, #0]
 8020f48:	2b00      	cmp	r3, #0
 8020f4a:	d1ea      	bne.n	8020f22 <udp_new_port+0x2e>
      }
      goto again;
    }
  }
  return udp_port;
 8020f4c:	4b03      	ldr	r3, [pc, #12]	@ (8020f5c <udp_new_port+0x68>)
 8020f4e:	881b      	ldrh	r3, [r3, #0]
}
 8020f50:	4618      	mov	r0, r3
 8020f52:	370c      	adds	r7, #12
 8020f54:	46bd      	mov	sp, r7
 8020f56:	f85d 7b04 	ldr.w	r7, [sp], #4
 8020f5a:	4770      	bx	lr
 8020f5c:	24000054 	.word	0x24000054
 8020f60:	2402aee8 	.word	0x2402aee8

08020f64 <udp_input_local_match>:
 * @param broadcast 1 if his is an IPv4 broadcast (global or subnet-only), 0 otherwise (only used for IPv4)
 * @return 1 on match, 0 otherwise
 */
static u8_t
udp_input_local_match(struct udp_pcb *pcb, struct netif *inp, u8_t broadcast)
{
 8020f64:	b580      	push	{r7, lr}
 8020f66:	b084      	sub	sp, #16
 8020f68:	af00      	add	r7, sp, #0
 8020f6a:	60f8      	str	r0, [r7, #12]
 8020f6c:	60b9      	str	r1, [r7, #8]
 8020f6e:	4613      	mov	r3, r2
 8020f70:	71fb      	strb	r3, [r7, #7]
  LWIP_UNUSED_ARG(inp);       /* in IPv6 only case */
  LWIP_UNUSED_ARG(broadcast); /* in IPv6 only case */

  LWIP_ASSERT("udp_input_local_match: invalid pcb", pcb != NULL);
 8020f72:	68fb      	ldr	r3, [r7, #12]
 8020f74:	2b00      	cmp	r3, #0
 8020f76:	d105      	bne.n	8020f84 <udp_input_local_match+0x20>
 8020f78:	4b27      	ldr	r3, [pc, #156]	@ (8021018 <udp_input_local_match+0xb4>)
 8020f7a:	2287      	movs	r2, #135	@ 0x87
 8020f7c:	4927      	ldr	r1, [pc, #156]	@ (802101c <udp_input_local_match+0xb8>)
 8020f7e:	4828      	ldr	r0, [pc, #160]	@ (8021020 <udp_input_local_match+0xbc>)
 8020f80:	f008 fd2c 	bl	80299dc <iprintf>
  LWIP_ASSERT("udp_input_local_match: invalid netif", inp != NULL);
 8020f84:	68bb      	ldr	r3, [r7, #8]
 8020f86:	2b00      	cmp	r3, #0
 8020f88:	d105      	bne.n	8020f96 <udp_input_local_match+0x32>
 8020f8a:	4b23      	ldr	r3, [pc, #140]	@ (8021018 <udp_input_local_match+0xb4>)
 8020f8c:	2288      	movs	r2, #136	@ 0x88
 8020f8e:	4925      	ldr	r1, [pc, #148]	@ (8021024 <udp_input_local_match+0xc0>)
 8020f90:	4823      	ldr	r0, [pc, #140]	@ (8021020 <udp_input_local_match+0xbc>)
 8020f92:	f008 fd23 	bl	80299dc <iprintf>

  /* check if PCB is bound to specific netif */
  if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 8020f96:	68fb      	ldr	r3, [r7, #12]
 8020f98:	7a1b      	ldrb	r3, [r3, #8]
 8020f9a:	2b00      	cmp	r3, #0
 8020f9c:	d00b      	beq.n	8020fb6 <udp_input_local_match+0x52>
      (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 8020f9e:	68fb      	ldr	r3, [r7, #12]
 8020fa0:	7a1a      	ldrb	r2, [r3, #8]
 8020fa2:	4b21      	ldr	r3, [pc, #132]	@ (8021028 <udp_input_local_match+0xc4>)
 8020fa4:	685b      	ldr	r3, [r3, #4]
 8020fa6:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8020faa:	3301      	adds	r3, #1
 8020fac:	b2db      	uxtb	r3, r3
  if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 8020fae:	429a      	cmp	r2, r3
 8020fb0:	d001      	beq.n	8020fb6 <udp_input_local_match+0x52>
    return 0;
 8020fb2:	2300      	movs	r3, #0
 8020fb4:	e02b      	b.n	802100e <udp_input_local_match+0xaa>
  /* Only need to check PCB if incoming IP version matches PCB IP version */
  if (IP_ADDR_PCB_VERSION_MATCH_EXACT(pcb, ip_current_dest_addr())) {
#if LWIP_IPV4
    /* Special case: IPv4 broadcast: all or broadcasts in my subnet
     * Note: broadcast variable can only be 1 if it is an IPv4 broadcast */
    if (broadcast != 0) {
 8020fb6:	79fb      	ldrb	r3, [r7, #7]
 8020fb8:	2b00      	cmp	r3, #0
 8020fba:	d018      	beq.n	8020fee <udp_input_local_match+0x8a>
#if IP_SOF_BROADCAST_RECV
      if (ip_get_option(pcb, SOF_BROADCAST))
#endif /* IP_SOF_BROADCAST_RECV */
      {
        if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 8020fbc:	68fb      	ldr	r3, [r7, #12]
 8020fbe:	2b00      	cmp	r3, #0
 8020fc0:	d013      	beq.n	8020fea <udp_input_local_match+0x86>
 8020fc2:	68fb      	ldr	r3, [r7, #12]
 8020fc4:	681b      	ldr	r3, [r3, #0]
 8020fc6:	2b00      	cmp	r3, #0
 8020fc8:	d00f      	beq.n	8020fea <udp_input_local_match+0x86>
            ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) ||
 8020fca:	4b17      	ldr	r3, [pc, #92]	@ (8021028 <udp_input_local_match+0xc4>)
 8020fcc:	695b      	ldr	r3, [r3, #20]
        if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 8020fce:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8020fd2:	d00a      	beq.n	8020fea <udp_input_local_match+0x86>
            ip4_addr_netcmp(ip_2_ip4(&pcb->local_ip), ip4_current_dest_addr(), netif_ip4_netmask(inp))) {
 8020fd4:	68fb      	ldr	r3, [r7, #12]
 8020fd6:	681a      	ldr	r2, [r3, #0]
 8020fd8:	4b13      	ldr	r3, [pc, #76]	@ (8021028 <udp_input_local_match+0xc4>)
 8020fda:	695b      	ldr	r3, [r3, #20]
 8020fdc:	405a      	eors	r2, r3
 8020fde:	68bb      	ldr	r3, [r7, #8]
 8020fe0:	3308      	adds	r3, #8
 8020fe2:	681b      	ldr	r3, [r3, #0]
 8020fe4:	4013      	ands	r3, r2
            ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) ||
 8020fe6:	2b00      	cmp	r3, #0
 8020fe8:	d110      	bne.n	802100c <udp_input_local_match+0xa8>
          return 1;
 8020fea:	2301      	movs	r3, #1
 8020fec:	e00f      	b.n	802100e <udp_input_local_match+0xaa>
        }
      }
    } else
#endif /* LWIP_IPV4 */
      /* Handle IPv4 and IPv6: all or exact match */
      if (ip_addr_isany(&pcb->local_ip) || ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 8020fee:	68fb      	ldr	r3, [r7, #12]
 8020ff0:	2b00      	cmp	r3, #0
 8020ff2:	d009      	beq.n	8021008 <udp_input_local_match+0xa4>
 8020ff4:	68fb      	ldr	r3, [r7, #12]
 8020ff6:	681b      	ldr	r3, [r3, #0]
 8020ff8:	2b00      	cmp	r3, #0
 8020ffa:	d005      	beq.n	8021008 <udp_input_local_match+0xa4>
 8020ffc:	68fb      	ldr	r3, [r7, #12]
 8020ffe:	681a      	ldr	r2, [r3, #0]
 8021000:	4b09      	ldr	r3, [pc, #36]	@ (8021028 <udp_input_local_match+0xc4>)
 8021002:	695b      	ldr	r3, [r3, #20]
 8021004:	429a      	cmp	r2, r3
 8021006:	d101      	bne.n	802100c <udp_input_local_match+0xa8>
        return 1;
 8021008:	2301      	movs	r3, #1
 802100a:	e000      	b.n	802100e <udp_input_local_match+0xaa>
      }
  }

  return 0;
 802100c:	2300      	movs	r3, #0
}
 802100e:	4618      	mov	r0, r3
 8021010:	3710      	adds	r7, #16
 8021012:	46bd      	mov	sp, r7
 8021014:	bd80      	pop	{r7, pc}
 8021016:	bf00      	nop
 8021018:	0802fb38 	.word	0x0802fb38
 802101c:	0802fb68 	.word	0x0802fb68
 8021020:	0802fb8c 	.word	0x0802fb8c
 8021024:	0802fbb4 	.word	0x0802fbb4
 8021028:	24024338 	.word	0x24024338

0802102c <udp_input>:
 * @param inp network interface on which the datagram was received.
 *
 */
void
udp_input(struct pbuf *p, struct netif *inp)
{
 802102c:	b590      	push	{r4, r7, lr}
 802102e:	b08d      	sub	sp, #52	@ 0x34
 8021030:	af02      	add	r7, sp, #8
 8021032:	6078      	str	r0, [r7, #4]
 8021034:	6039      	str	r1, [r7, #0]
  struct udp_hdr *udphdr;
  struct udp_pcb *pcb, *prev;
  struct udp_pcb *uncon_pcb;
  u16_t src, dest;
  u8_t broadcast;
  u8_t for_us = 0;
 8021036:	2300      	movs	r3, #0
 8021038:	77fb      	strb	r3, [r7, #31]

  LWIP_UNUSED_ARG(inp);

  LWIP_ASSERT_CORE_LOCKED();
 802103a:	f7ef fa83 	bl	8010544 <sys_check_core_locking>

  LWIP_ASSERT("udp_input: invalid pbuf", p != NULL);
 802103e:	687b      	ldr	r3, [r7, #4]
 8021040:	2b00      	cmp	r3, #0
 8021042:	d105      	bne.n	8021050 <udp_input+0x24>
 8021044:	4b7c      	ldr	r3, [pc, #496]	@ (8021238 <udp_input+0x20c>)
 8021046:	22cf      	movs	r2, #207	@ 0xcf
 8021048:	497c      	ldr	r1, [pc, #496]	@ (802123c <udp_input+0x210>)
 802104a:	487d      	ldr	r0, [pc, #500]	@ (8021240 <udp_input+0x214>)
 802104c:	f008 fcc6 	bl	80299dc <iprintf>
  LWIP_ASSERT("udp_input: invalid netif", inp != NULL);
 8021050:	683b      	ldr	r3, [r7, #0]
 8021052:	2b00      	cmp	r3, #0
 8021054:	d105      	bne.n	8021062 <udp_input+0x36>
 8021056:	4b78      	ldr	r3, [pc, #480]	@ (8021238 <udp_input+0x20c>)
 8021058:	22d0      	movs	r2, #208	@ 0xd0
 802105a:	497a      	ldr	r1, [pc, #488]	@ (8021244 <udp_input+0x218>)
 802105c:	4878      	ldr	r0, [pc, #480]	@ (8021240 <udp_input+0x214>)
 802105e:	f008 fcbd 	bl	80299dc <iprintf>
  PERF_START;

  UDP_STATS_INC(udp.recv);

  /* Check minimum length (UDP header) */
  if (p->len < UDP_HLEN) {
 8021062:	687b      	ldr	r3, [r7, #4]
 8021064:	895b      	ldrh	r3, [r3, #10]
 8021066:	2b07      	cmp	r3, #7
 8021068:	d803      	bhi.n	8021072 <udp_input+0x46>
    LWIP_DEBUGF(UDP_DEBUG,
                ("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len));
    UDP_STATS_INC(udp.lenerr);
    UDP_STATS_INC(udp.drop);
    MIB2_STATS_INC(mib2.udpinerrors);
    pbuf_free(p);
 802106a:	6878      	ldr	r0, [r7, #4]
 802106c:	f7f9 fa3e 	bl	801a4ec <pbuf_free>
    goto end;
 8021070:	e0de      	b.n	8021230 <udp_input+0x204>
  }

  udphdr = (struct udp_hdr *)p->payload;
 8021072:	687b      	ldr	r3, [r7, #4]
 8021074:	685b      	ldr	r3, [r3, #4]
 8021076:	617b      	str	r3, [r7, #20]

  /* is broadcast packet ? */
  broadcast = ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif());
 8021078:	4b73      	ldr	r3, [pc, #460]	@ (8021248 <udp_input+0x21c>)
 802107a:	695b      	ldr	r3, [r3, #20]
 802107c:	4a72      	ldr	r2, [pc, #456]	@ (8021248 <udp_input+0x21c>)
 802107e:	6812      	ldr	r2, [r2, #0]
 8021080:	4611      	mov	r1, r2
 8021082:	4618      	mov	r0, r3
 8021084:	f003 ff54 	bl	8024f30 <ip4_addr_isbroadcast_u32>
 8021088:	4603      	mov	r3, r0
 802108a:	74fb      	strb	r3, [r7, #19]

  LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len));

  /* convert src and dest ports to host byte order */
  src = lwip_ntohs(udphdr->src);
 802108c:	697b      	ldr	r3, [r7, #20]
 802108e:	881b      	ldrh	r3, [r3, #0]
 8021090:	b29b      	uxth	r3, r3
 8021092:	4618      	mov	r0, r3
 8021094:	f7f7 fd48 	bl	8018b28 <lwip_htons>
 8021098:	4603      	mov	r3, r0
 802109a:	823b      	strh	r3, [r7, #16]
  dest = lwip_ntohs(udphdr->dest);
 802109c:	697b      	ldr	r3, [r7, #20]
 802109e:	885b      	ldrh	r3, [r3, #2]
 80210a0:	b29b      	uxth	r3, r3
 80210a2:	4618      	mov	r0, r3
 80210a4:	f7f7 fd40 	bl	8018b28 <lwip_htons>
 80210a8:	4603      	mov	r3, r0
 80210aa:	81fb      	strh	r3, [r7, #14]
  ip_addr_debug_print_val(UDP_DEBUG, *ip_current_dest_addr());
  LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", lwip_ntohs(udphdr->dest)));
  ip_addr_debug_print_val(UDP_DEBUG, *ip_current_src_addr());
  LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", lwip_ntohs(udphdr->src)));

  pcb = NULL;
 80210ac:	2300      	movs	r3, #0
 80210ae:	623b      	str	r3, [r7, #32]
  prev = NULL;
 80210b0:	2300      	movs	r3, #0
 80210b2:	627b      	str	r3, [r7, #36]	@ 0x24
  uncon_pcb = NULL;
 80210b4:	2300      	movs	r3, #0
 80210b6:	61bb      	str	r3, [r7, #24]
  /* Iterate through the UDP pcb list for a matching pcb.
   * 'Perfect match' pcbs (connected to the remote port & ip address) are
   * preferred. If no perfect match is found, the first unconnected pcb that
   * matches the local port and ip address gets the datagram. */
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 80210b8:	4b64      	ldr	r3, [pc, #400]	@ (802124c <udp_input+0x220>)
 80210ba:	681b      	ldr	r3, [r3, #0]
 80210bc:	623b      	str	r3, [r7, #32]
 80210be:	e054      	b.n	802116a <udp_input+0x13e>
    LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", pcb->local_port));
    ip_addr_debug_print_val(UDP_DEBUG, pcb->remote_ip);
    LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", pcb->remote_port));

    /* compare PCB local addr+port to UDP destination addr+port */
    if ((pcb->local_port == dest) &&
 80210c0:	6a3b      	ldr	r3, [r7, #32]
 80210c2:	8a5b      	ldrh	r3, [r3, #18]
 80210c4:	89fa      	ldrh	r2, [r7, #14]
 80210c6:	429a      	cmp	r2, r3
 80210c8:	d14a      	bne.n	8021160 <udp_input+0x134>
        (udp_input_local_match(pcb, inp, broadcast) != 0)) {
 80210ca:	7cfb      	ldrb	r3, [r7, #19]
 80210cc:	461a      	mov	r2, r3
 80210ce:	6839      	ldr	r1, [r7, #0]
 80210d0:	6a38      	ldr	r0, [r7, #32]
 80210d2:	f7ff ff47 	bl	8020f64 <udp_input_local_match>
 80210d6:	4603      	mov	r3, r0
    if ((pcb->local_port == dest) &&
 80210d8:	2b00      	cmp	r3, #0
 80210da:	d041      	beq.n	8021160 <udp_input+0x134>
      if ((pcb->flags & UDP_FLAGS_CONNECTED) == 0) {
 80210dc:	6a3b      	ldr	r3, [r7, #32]
 80210de:	7c1b      	ldrb	r3, [r3, #16]
 80210e0:	f003 0304 	and.w	r3, r3, #4
 80210e4:	2b00      	cmp	r3, #0
 80210e6:	d11d      	bne.n	8021124 <udp_input+0xf8>
        if (uncon_pcb == NULL) {
 80210e8:	69bb      	ldr	r3, [r7, #24]
 80210ea:	2b00      	cmp	r3, #0
 80210ec:	d102      	bne.n	80210f4 <udp_input+0xc8>
          /* the first unconnected matching PCB */
          uncon_pcb = pcb;
 80210ee:	6a3b      	ldr	r3, [r7, #32]
 80210f0:	61bb      	str	r3, [r7, #24]
 80210f2:	e017      	b.n	8021124 <udp_input+0xf8>
#if LWIP_IPV4
        } else if (broadcast && ip4_current_dest_addr()->addr == IPADDR_BROADCAST) {
 80210f4:	7cfb      	ldrb	r3, [r7, #19]
 80210f6:	2b00      	cmp	r3, #0
 80210f8:	d014      	beq.n	8021124 <udp_input+0xf8>
 80210fa:	4b53      	ldr	r3, [pc, #332]	@ (8021248 <udp_input+0x21c>)
 80210fc:	695b      	ldr	r3, [r3, #20]
 80210fe:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8021102:	d10f      	bne.n	8021124 <udp_input+0xf8>
          /* global broadcast address (only valid for IPv4; match was checked before) */
          if (!IP_IS_V4_VAL(uncon_pcb->local_ip) || !ip4_addr_cmp(ip_2_ip4(&uncon_pcb->local_ip), netif_ip4_addr(inp))) {
 8021104:	69bb      	ldr	r3, [r7, #24]
 8021106:	681a      	ldr	r2, [r3, #0]
 8021108:	683b      	ldr	r3, [r7, #0]
 802110a:	3304      	adds	r3, #4
 802110c:	681b      	ldr	r3, [r3, #0]
 802110e:	429a      	cmp	r2, r3
 8021110:	d008      	beq.n	8021124 <udp_input+0xf8>
            /* uncon_pcb does not match the input netif, check this pcb */
            if (IP_IS_V4_VAL(pcb->local_ip) && ip4_addr_cmp(ip_2_ip4(&pcb->local_ip), netif_ip4_addr(inp))) {
 8021112:	6a3b      	ldr	r3, [r7, #32]
 8021114:	681a      	ldr	r2, [r3, #0]
 8021116:	683b      	ldr	r3, [r7, #0]
 8021118:	3304      	adds	r3, #4
 802111a:	681b      	ldr	r3, [r3, #0]
 802111c:	429a      	cmp	r2, r3
 802111e:	d101      	bne.n	8021124 <udp_input+0xf8>
              /* better match */
              uncon_pcb = pcb;
 8021120:	6a3b      	ldr	r3, [r7, #32]
 8021122:	61bb      	str	r3, [r7, #24]
        }
#endif /* SO_REUSE */
      }

      /* compare PCB remote addr+port to UDP source addr+port */
      if ((pcb->remote_port == src) &&
 8021124:	6a3b      	ldr	r3, [r7, #32]
 8021126:	8a9b      	ldrh	r3, [r3, #20]
 8021128:	8a3a      	ldrh	r2, [r7, #16]
 802112a:	429a      	cmp	r2, r3
 802112c:	d118      	bne.n	8021160 <udp_input+0x134>
          (ip_addr_isany_val(pcb->remote_ip) ||
 802112e:	6a3b      	ldr	r3, [r7, #32]
 8021130:	685b      	ldr	r3, [r3, #4]
      if ((pcb->remote_port == src) &&
 8021132:	2b00      	cmp	r3, #0
 8021134:	d005      	beq.n	8021142 <udp_input+0x116>
           ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()))) {
 8021136:	6a3b      	ldr	r3, [r7, #32]
 8021138:	685a      	ldr	r2, [r3, #4]
 802113a:	4b43      	ldr	r3, [pc, #268]	@ (8021248 <udp_input+0x21c>)
 802113c:	691b      	ldr	r3, [r3, #16]
          (ip_addr_isany_val(pcb->remote_ip) ||
 802113e:	429a      	cmp	r2, r3
 8021140:	d10e      	bne.n	8021160 <udp_input+0x134>
        /* the first fully matching PCB */
        if (prev != NULL) {
 8021142:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021144:	2b00      	cmp	r3, #0
 8021146:	d014      	beq.n	8021172 <udp_input+0x146>
          /* move the pcb to the front of udp_pcbs so that is
             found faster next time */
          prev->next = pcb->next;
 8021148:	6a3b      	ldr	r3, [r7, #32]
 802114a:	68da      	ldr	r2, [r3, #12]
 802114c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802114e:	60da      	str	r2, [r3, #12]
          pcb->next = udp_pcbs;
 8021150:	4b3e      	ldr	r3, [pc, #248]	@ (802124c <udp_input+0x220>)
 8021152:	681a      	ldr	r2, [r3, #0]
 8021154:	6a3b      	ldr	r3, [r7, #32]
 8021156:	60da      	str	r2, [r3, #12]
          udp_pcbs = pcb;
 8021158:	4a3c      	ldr	r2, [pc, #240]	@ (802124c <udp_input+0x220>)
 802115a:	6a3b      	ldr	r3, [r7, #32]
 802115c:	6013      	str	r3, [r2, #0]
        } else {
          UDP_STATS_INC(udp.cachehit);
        }
        break;
 802115e:	e008      	b.n	8021172 <udp_input+0x146>
      }
    }

    prev = pcb;
 8021160:	6a3b      	ldr	r3, [r7, #32]
 8021162:	627b      	str	r3, [r7, #36]	@ 0x24
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8021164:	6a3b      	ldr	r3, [r7, #32]
 8021166:	68db      	ldr	r3, [r3, #12]
 8021168:	623b      	str	r3, [r7, #32]
 802116a:	6a3b      	ldr	r3, [r7, #32]
 802116c:	2b00      	cmp	r3, #0
 802116e:	d1a7      	bne.n	80210c0 <udp_input+0x94>
 8021170:	e000      	b.n	8021174 <udp_input+0x148>
        break;
 8021172:	bf00      	nop
  }
  /* no fully matching pcb found? then look for an unconnected pcb */
  if (pcb == NULL) {
 8021174:	6a3b      	ldr	r3, [r7, #32]
 8021176:	2b00      	cmp	r3, #0
 8021178:	d101      	bne.n	802117e <udp_input+0x152>
    pcb = uncon_pcb;
 802117a:	69bb      	ldr	r3, [r7, #24]
 802117c:	623b      	str	r3, [r7, #32]
  }

  /* Check checksum if this is a match or if it was directed at us. */
  if (pcb != NULL) {
 802117e:	6a3b      	ldr	r3, [r7, #32]
 8021180:	2b00      	cmp	r3, #0
 8021182:	d002      	beq.n	802118a <udp_input+0x15e>
    for_us = 1;
 8021184:	2301      	movs	r3, #1
 8021186:	77fb      	strb	r3, [r7, #31]
 8021188:	e00a      	b.n	80211a0 <udp_input+0x174>
      for_us = netif_get_ip6_addr_match(inp, ip6_current_dest_addr()) >= 0;
    }
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
    if (!ip_current_is_v6()) {
      for_us = ip4_addr_cmp(netif_ip4_addr(inp), ip4_current_dest_addr());
 802118a:	683b      	ldr	r3, [r7, #0]
 802118c:	3304      	adds	r3, #4
 802118e:	681a      	ldr	r2, [r3, #0]
 8021190:	4b2d      	ldr	r3, [pc, #180]	@ (8021248 <udp_input+0x21c>)
 8021192:	695b      	ldr	r3, [r3, #20]
 8021194:	429a      	cmp	r2, r3
 8021196:	bf0c      	ite	eq
 8021198:	2301      	moveq	r3, #1
 802119a:	2300      	movne	r3, #0
 802119c:	b2db      	uxtb	r3, r3
 802119e:	77fb      	strb	r3, [r7, #31]
    }
#endif /* LWIP_IPV4 */
  }

  if (for_us) {
 80211a0:	7ffb      	ldrb	r3, [r7, #31]
 80211a2:	2b00      	cmp	r3, #0
 80211a4:	d041      	beq.n	802122a <udp_input+0x1fe>
          }
        }
      }
    }
#endif /* CHECKSUM_CHECK_UDP */
    if (pbuf_remove_header(p, UDP_HLEN)) {
 80211a6:	2108      	movs	r1, #8
 80211a8:	6878      	ldr	r0, [r7, #4]
 80211aa:	f7f9 f8e7 	bl	801a37c <pbuf_remove_header>
 80211ae:	4603      	mov	r3, r0
 80211b0:	2b00      	cmp	r3, #0
 80211b2:	d00a      	beq.n	80211ca <udp_input+0x19e>
      /* Can we cope with this failing? Just assert for now */
      LWIP_ASSERT("pbuf_remove_header failed\n", 0);
 80211b4:	4b20      	ldr	r3, [pc, #128]	@ (8021238 <udp_input+0x20c>)
 80211b6:	f44f 72b8 	mov.w	r2, #368	@ 0x170
 80211ba:	4925      	ldr	r1, [pc, #148]	@ (8021250 <udp_input+0x224>)
 80211bc:	4820      	ldr	r0, [pc, #128]	@ (8021240 <udp_input+0x214>)
 80211be:	f008 fc0d 	bl	80299dc <iprintf>
      UDP_STATS_INC(udp.drop);
      MIB2_STATS_INC(mib2.udpinerrors);
      pbuf_free(p);
 80211c2:	6878      	ldr	r0, [r7, #4]
 80211c4:	f7f9 f992 	bl	801a4ec <pbuf_free>
      goto end;
 80211c8:	e032      	b.n	8021230 <udp_input+0x204>
    }

    if (pcb != NULL) {
 80211ca:	6a3b      	ldr	r3, [r7, #32]
 80211cc:	2b00      	cmp	r3, #0
 80211ce:	d012      	beq.n	80211f6 <udp_input+0x1ca>
          }
        }
      }
#endif /* SO_REUSE && SO_REUSE_RXTOALL */
      /* callback */
      if (pcb->recv != NULL) {
 80211d0:	6a3b      	ldr	r3, [r7, #32]
 80211d2:	699b      	ldr	r3, [r3, #24]
 80211d4:	2b00      	cmp	r3, #0
 80211d6:	d00a      	beq.n	80211ee <udp_input+0x1c2>
        /* now the recv function is responsible for freeing p */
        pcb->recv(pcb->recv_arg, pcb, p, ip_current_src_addr(), src);
 80211d8:	6a3b      	ldr	r3, [r7, #32]
 80211da:	699c      	ldr	r4, [r3, #24]
 80211dc:	6a3b      	ldr	r3, [r7, #32]
 80211de:	69d8      	ldr	r0, [r3, #28]
 80211e0:	8a3b      	ldrh	r3, [r7, #16]
 80211e2:	9300      	str	r3, [sp, #0]
 80211e4:	4b1b      	ldr	r3, [pc, #108]	@ (8021254 <udp_input+0x228>)
 80211e6:	687a      	ldr	r2, [r7, #4]
 80211e8:	6a39      	ldr	r1, [r7, #32]
 80211ea:	47a0      	blx	r4
  } else {
    pbuf_free(p);
  }
end:
  PERF_STOP("udp_input");
  return;
 80211ec:	e021      	b.n	8021232 <udp_input+0x206>
        pbuf_free(p);
 80211ee:	6878      	ldr	r0, [r7, #4]
 80211f0:	f7f9 f97c 	bl	801a4ec <pbuf_free>
        goto end;
 80211f4:	e01c      	b.n	8021230 <udp_input+0x204>
      if (!broadcast && !ip_addr_ismulticast(ip_current_dest_addr())) {
 80211f6:	7cfb      	ldrb	r3, [r7, #19]
 80211f8:	2b00      	cmp	r3, #0
 80211fa:	d112      	bne.n	8021222 <udp_input+0x1f6>
 80211fc:	4b12      	ldr	r3, [pc, #72]	@ (8021248 <udp_input+0x21c>)
 80211fe:	695b      	ldr	r3, [r3, #20]
 8021200:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8021204:	2be0      	cmp	r3, #224	@ 0xe0
 8021206:	d00c      	beq.n	8021222 <udp_input+0x1f6>
        pbuf_header_force(p, (s16_t)(ip_current_header_tot_len() + UDP_HLEN));
 8021208:	4b0f      	ldr	r3, [pc, #60]	@ (8021248 <udp_input+0x21c>)
 802120a:	899b      	ldrh	r3, [r3, #12]
 802120c:	3308      	adds	r3, #8
 802120e:	b29b      	uxth	r3, r3
 8021210:	b21b      	sxth	r3, r3
 8021212:	4619      	mov	r1, r3
 8021214:	6878      	ldr	r0, [r7, #4]
 8021216:	f7f9 f924 	bl	801a462 <pbuf_header_force>
        icmp_port_unreach(ip_current_is_v6(), p);
 802121a:	2103      	movs	r1, #3
 802121c:	6878      	ldr	r0, [r7, #4]
 802121e:	f003 fb3b 	bl	8024898 <icmp_dest_unreach>
      pbuf_free(p);
 8021222:	6878      	ldr	r0, [r7, #4]
 8021224:	f7f9 f962 	bl	801a4ec <pbuf_free>
  return;
 8021228:	e003      	b.n	8021232 <udp_input+0x206>
    pbuf_free(p);
 802122a:	6878      	ldr	r0, [r7, #4]
 802122c:	f7f9 f95e 	bl	801a4ec <pbuf_free>
  return;
 8021230:	bf00      	nop
  UDP_STATS_INC(udp.drop);
  MIB2_STATS_INC(mib2.udpinerrors);
  pbuf_free(p);
  PERF_STOP("udp_input");
#endif /* CHECKSUM_CHECK_UDP */
}
 8021232:	372c      	adds	r7, #44	@ 0x2c
 8021234:	46bd      	mov	sp, r7
 8021236:	bd90      	pop	{r4, r7, pc}
 8021238:	0802fb38 	.word	0x0802fb38
 802123c:	0802fbdc 	.word	0x0802fbdc
 8021240:	0802fb8c 	.word	0x0802fb8c
 8021244:	0802fbf4 	.word	0x0802fbf4
 8021248:	24024338 	.word	0x24024338
 802124c:	2402aee8 	.word	0x2402aee8
 8021250:	0802fc10 	.word	0x0802fc10
 8021254:	24024348 	.word	0x24024348

08021258 <udp_send>:
 *
 * @see udp_disconnect() udp_sendto()
 */
err_t
udp_send(struct udp_pcb *pcb, struct pbuf *p)
{
 8021258:	b580      	push	{r7, lr}
 802125a:	b082      	sub	sp, #8
 802125c:	af00      	add	r7, sp, #0
 802125e:	6078      	str	r0, [r7, #4]
 8021260:	6039      	str	r1, [r7, #0]
  LWIP_ERROR("udp_send: invalid pcb", pcb != NULL, return ERR_ARG);
 8021262:	687b      	ldr	r3, [r7, #4]
 8021264:	2b00      	cmp	r3, #0
 8021266:	d109      	bne.n	802127c <udp_send+0x24>
 8021268:	4b11      	ldr	r3, [pc, #68]	@ (80212b0 <udp_send+0x58>)
 802126a:	f240 12d5 	movw	r2, #469	@ 0x1d5
 802126e:	4911      	ldr	r1, [pc, #68]	@ (80212b4 <udp_send+0x5c>)
 8021270:	4811      	ldr	r0, [pc, #68]	@ (80212b8 <udp_send+0x60>)
 8021272:	f008 fbb3 	bl	80299dc <iprintf>
 8021276:	f06f 030f 	mvn.w	r3, #15
 802127a:	e015      	b.n	80212a8 <udp_send+0x50>
  LWIP_ERROR("udp_send: invalid pbuf", p != NULL, return ERR_ARG);
 802127c:	683b      	ldr	r3, [r7, #0]
 802127e:	2b00      	cmp	r3, #0
 8021280:	d109      	bne.n	8021296 <udp_send+0x3e>
 8021282:	4b0b      	ldr	r3, [pc, #44]	@ (80212b0 <udp_send+0x58>)
 8021284:	f44f 72eb 	mov.w	r2, #470	@ 0x1d6
 8021288:	490c      	ldr	r1, [pc, #48]	@ (80212bc <udp_send+0x64>)
 802128a:	480b      	ldr	r0, [pc, #44]	@ (80212b8 <udp_send+0x60>)
 802128c:	f008 fba6 	bl	80299dc <iprintf>
 8021290:	f06f 030f 	mvn.w	r3, #15
 8021294:	e008      	b.n	80212a8 <udp_send+0x50>
  if (IP_IS_ANY_TYPE_VAL(pcb->remote_ip)) {
    return ERR_VAL;
  }

  /* send to the packet using remote ip and port stored in the pcb */
  return udp_sendto(pcb, p, &pcb->remote_ip, pcb->remote_port);
 8021296:	687b      	ldr	r3, [r7, #4]
 8021298:	1d1a      	adds	r2, r3, #4
 802129a:	687b      	ldr	r3, [r7, #4]
 802129c:	8a9b      	ldrh	r3, [r3, #20]
 802129e:	6839      	ldr	r1, [r7, #0]
 80212a0:	6878      	ldr	r0, [r7, #4]
 80212a2:	f000 f80d 	bl	80212c0 <udp_sendto>
 80212a6:	4603      	mov	r3, r0
}
 80212a8:	4618      	mov	r0, r3
 80212aa:	3708      	adds	r7, #8
 80212ac:	46bd      	mov	sp, r7
 80212ae:	bd80      	pop	{r7, pc}
 80212b0:	0802fb38 	.word	0x0802fb38
 80212b4:	0802fc2c 	.word	0x0802fc2c
 80212b8:	0802fb8c 	.word	0x0802fb8c
 80212bc:	0802fc44 	.word	0x0802fc44

080212c0 <udp_sendto>:
 * @see udp_disconnect() udp_send()
 */
err_t
udp_sendto(struct udp_pcb *pcb, struct pbuf *p,
           const ip_addr_t *dst_ip, u16_t dst_port)
{
 80212c0:	b580      	push	{r7, lr}
 80212c2:	b088      	sub	sp, #32
 80212c4:	af02      	add	r7, sp, #8
 80212c6:	60f8      	str	r0, [r7, #12]
 80212c8:	60b9      	str	r1, [r7, #8]
 80212ca:	607a      	str	r2, [r7, #4]
 80212cc:	807b      	strh	r3, [r7, #2]
                  u16_t dst_port, u8_t have_chksum, u16_t chksum)
{
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  struct netif *netif;

  LWIP_ERROR("udp_sendto: invalid pcb", pcb != NULL, return ERR_ARG);
 80212ce:	68fb      	ldr	r3, [r7, #12]
 80212d0:	2b00      	cmp	r3, #0
 80212d2:	d109      	bne.n	80212e8 <udp_sendto+0x28>
 80212d4:	4b23      	ldr	r3, [pc, #140]	@ (8021364 <udp_sendto+0xa4>)
 80212d6:	f44f 7206 	mov.w	r2, #536	@ 0x218
 80212da:	4923      	ldr	r1, [pc, #140]	@ (8021368 <udp_sendto+0xa8>)
 80212dc:	4823      	ldr	r0, [pc, #140]	@ (802136c <udp_sendto+0xac>)
 80212de:	f008 fb7d 	bl	80299dc <iprintf>
 80212e2:	f06f 030f 	mvn.w	r3, #15
 80212e6:	e038      	b.n	802135a <udp_sendto+0x9a>
  LWIP_ERROR("udp_sendto: invalid pbuf", p != NULL, return ERR_ARG);
 80212e8:	68bb      	ldr	r3, [r7, #8]
 80212ea:	2b00      	cmp	r3, #0
 80212ec:	d109      	bne.n	8021302 <udp_sendto+0x42>
 80212ee:	4b1d      	ldr	r3, [pc, #116]	@ (8021364 <udp_sendto+0xa4>)
 80212f0:	f240 2219 	movw	r2, #537	@ 0x219
 80212f4:	491e      	ldr	r1, [pc, #120]	@ (8021370 <udp_sendto+0xb0>)
 80212f6:	481d      	ldr	r0, [pc, #116]	@ (802136c <udp_sendto+0xac>)
 80212f8:	f008 fb70 	bl	80299dc <iprintf>
 80212fc:	f06f 030f 	mvn.w	r3, #15
 8021300:	e02b      	b.n	802135a <udp_sendto+0x9a>
  LWIP_ERROR("udp_sendto: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 8021302:	687b      	ldr	r3, [r7, #4]
 8021304:	2b00      	cmp	r3, #0
 8021306:	d109      	bne.n	802131c <udp_sendto+0x5c>
 8021308:	4b16      	ldr	r3, [pc, #88]	@ (8021364 <udp_sendto+0xa4>)
 802130a:	f240 221a 	movw	r2, #538	@ 0x21a
 802130e:	4919      	ldr	r1, [pc, #100]	@ (8021374 <udp_sendto+0xb4>)
 8021310:	4816      	ldr	r0, [pc, #88]	@ (802136c <udp_sendto+0xac>)
 8021312:	f008 fb63 	bl	80299dc <iprintf>
 8021316:	f06f 030f 	mvn.w	r3, #15
 802131a:	e01e      	b.n	802135a <udp_sendto+0x9a>
    return ERR_VAL;
  }

  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send\n"));

  if (pcb->netif_idx != NETIF_NO_INDEX) {
 802131c:	68fb      	ldr	r3, [r7, #12]
 802131e:	7a1b      	ldrb	r3, [r3, #8]
 8021320:	2b00      	cmp	r3, #0
 8021322:	d006      	beq.n	8021332 <udp_sendto+0x72>
    netif = netif_get_by_index(pcb->netif_idx);
 8021324:	68fb      	ldr	r3, [r7, #12]
 8021326:	7a1b      	ldrb	r3, [r3, #8]
 8021328:	4618      	mov	r0, r3
 802132a:	f7f8 fd1f 	bl	8019d6c <netif_get_by_index>
 802132e:	6178      	str	r0, [r7, #20]
 8021330:	e003      	b.n	802133a <udp_sendto+0x7a>

    if (netif == NULL)
#endif /* LWIP_MULTICAST_TX_OPTIONS */
    {
      /* find the outgoing network interface for this packet */
      netif = ip_route(&pcb->local_ip, dst_ip);
 8021332:	6878      	ldr	r0, [r7, #4]
 8021334:	f003 fb44 	bl	80249c0 <ip4_route>
 8021338:	6178      	str	r0, [r7, #20]
    }
  }

  /* no outgoing network interface could be found? */
  if (netif == NULL) {
 802133a:	697b      	ldr	r3, [r7, #20]
 802133c:	2b00      	cmp	r3, #0
 802133e:	d102      	bne.n	8021346 <udp_sendto+0x86>
    LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: No route to "));
    ip_addr_debug_print(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, dst_ip);
    LWIP_DEBUGF(UDP_DEBUG, ("\n"));
    UDP_STATS_INC(udp.rterr);
    return ERR_RTE;
 8021340:	f06f 0303 	mvn.w	r3, #3
 8021344:	e009      	b.n	802135a <udp_sendto+0x9a>
  }
#if LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP
  return udp_sendto_if_chksum(pcb, p, dst_ip, dst_port, netif, have_chksum, chksum);
#else /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  return udp_sendto_if(pcb, p, dst_ip, dst_port, netif);
 8021346:	887a      	ldrh	r2, [r7, #2]
 8021348:	697b      	ldr	r3, [r7, #20]
 802134a:	9300      	str	r3, [sp, #0]
 802134c:	4613      	mov	r3, r2
 802134e:	687a      	ldr	r2, [r7, #4]
 8021350:	68b9      	ldr	r1, [r7, #8]
 8021352:	68f8      	ldr	r0, [r7, #12]
 8021354:	f000 f810 	bl	8021378 <udp_sendto_if>
 8021358:	4603      	mov	r3, r0
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
}
 802135a:	4618      	mov	r0, r3
 802135c:	3718      	adds	r7, #24
 802135e:	46bd      	mov	sp, r7
 8021360:	bd80      	pop	{r7, pc}
 8021362:	bf00      	nop
 8021364:	0802fb38 	.word	0x0802fb38
 8021368:	0802fc5c 	.word	0x0802fc5c
 802136c:	0802fb8c 	.word	0x0802fb8c
 8021370:	0802fc74 	.word	0x0802fc74
 8021374:	0802fc90 	.word	0x0802fc90

08021378 <udp_sendto_if>:
 * @see udp_disconnect() udp_send()
 */
err_t
udp_sendto_if(struct udp_pcb *pcb, struct pbuf *p,
              const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif)
{
 8021378:	b580      	push	{r7, lr}
 802137a:	b088      	sub	sp, #32
 802137c:	af02      	add	r7, sp, #8
 802137e:	60f8      	str	r0, [r7, #12]
 8021380:	60b9      	str	r1, [r7, #8]
 8021382:	607a      	str	r2, [r7, #4]
 8021384:	807b      	strh	r3, [r7, #2]
                     u16_t chksum)
{
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  const ip_addr_t *src_ip;

  LWIP_ERROR("udp_sendto_if: invalid pcb", pcb != NULL, return ERR_ARG);
 8021386:	68fb      	ldr	r3, [r7, #12]
 8021388:	2b00      	cmp	r3, #0
 802138a:	d109      	bne.n	80213a0 <udp_sendto_if+0x28>
 802138c:	4b2e      	ldr	r3, [pc, #184]	@ (8021448 <udp_sendto_if+0xd0>)
 802138e:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8021392:	492e      	ldr	r1, [pc, #184]	@ (802144c <udp_sendto_if+0xd4>)
 8021394:	482e      	ldr	r0, [pc, #184]	@ (8021450 <udp_sendto_if+0xd8>)
 8021396:	f008 fb21 	bl	80299dc <iprintf>
 802139a:	f06f 030f 	mvn.w	r3, #15
 802139e:	e04f      	b.n	8021440 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid pbuf", p != NULL, return ERR_ARG);
 80213a0:	68bb      	ldr	r3, [r7, #8]
 80213a2:	2b00      	cmp	r3, #0
 80213a4:	d109      	bne.n	80213ba <udp_sendto_if+0x42>
 80213a6:	4b28      	ldr	r3, [pc, #160]	@ (8021448 <udp_sendto_if+0xd0>)
 80213a8:	f240 2281 	movw	r2, #641	@ 0x281
 80213ac:	4929      	ldr	r1, [pc, #164]	@ (8021454 <udp_sendto_if+0xdc>)
 80213ae:	4828      	ldr	r0, [pc, #160]	@ (8021450 <udp_sendto_if+0xd8>)
 80213b0:	f008 fb14 	bl	80299dc <iprintf>
 80213b4:	f06f 030f 	mvn.w	r3, #15
 80213b8:	e042      	b.n	8021440 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 80213ba:	687b      	ldr	r3, [r7, #4]
 80213bc:	2b00      	cmp	r3, #0
 80213be:	d109      	bne.n	80213d4 <udp_sendto_if+0x5c>
 80213c0:	4b21      	ldr	r3, [pc, #132]	@ (8021448 <udp_sendto_if+0xd0>)
 80213c2:	f240 2282 	movw	r2, #642	@ 0x282
 80213c6:	4924      	ldr	r1, [pc, #144]	@ (8021458 <udp_sendto_if+0xe0>)
 80213c8:	4821      	ldr	r0, [pc, #132]	@ (8021450 <udp_sendto_if+0xd8>)
 80213ca:	f008 fb07 	bl	80299dc <iprintf>
 80213ce:	f06f 030f 	mvn.w	r3, #15
 80213d2:	e035      	b.n	8021440 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid netif", netif != NULL, return ERR_ARG);
 80213d4:	6a3b      	ldr	r3, [r7, #32]
 80213d6:	2b00      	cmp	r3, #0
 80213d8:	d109      	bne.n	80213ee <udp_sendto_if+0x76>
 80213da:	4b1b      	ldr	r3, [pc, #108]	@ (8021448 <udp_sendto_if+0xd0>)
 80213dc:	f240 2283 	movw	r2, #643	@ 0x283
 80213e0:	491e      	ldr	r1, [pc, #120]	@ (802145c <udp_sendto_if+0xe4>)
 80213e2:	481b      	ldr	r0, [pc, #108]	@ (8021450 <udp_sendto_if+0xd8>)
 80213e4:	f008 fafa 	bl	80299dc <iprintf>
 80213e8:	f06f 030f 	mvn.w	r3, #15
 80213ec:	e028      	b.n	8021440 <udp_sendto_if+0xc8>
#endif /* LWIP_IPV6 */
#if LWIP_IPV4 && LWIP_IPV6
  else
#endif /* LWIP_IPV4 && LWIP_IPV6 */
#if LWIP_IPV4
    if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 80213ee:	68fb      	ldr	r3, [r7, #12]
 80213f0:	2b00      	cmp	r3, #0
 80213f2:	d009      	beq.n	8021408 <udp_sendto_if+0x90>
 80213f4:	68fb      	ldr	r3, [r7, #12]
 80213f6:	681b      	ldr	r3, [r3, #0]
 80213f8:	2b00      	cmp	r3, #0
 80213fa:	d005      	beq.n	8021408 <udp_sendto_if+0x90>
        ip4_addr_ismulticast(ip_2_ip4(&pcb->local_ip))) {
 80213fc:	68fb      	ldr	r3, [r7, #12]
 80213fe:	681b      	ldr	r3, [r3, #0]
 8021400:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
    if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 8021404:	2be0      	cmp	r3, #224	@ 0xe0
 8021406:	d103      	bne.n	8021410 <udp_sendto_if+0x98>
      /* if the local_ip is any or multicast
       * use the outgoing network interface IP address as source address */
      src_ip = netif_ip_addr4(netif);
 8021408:	6a3b      	ldr	r3, [r7, #32]
 802140a:	3304      	adds	r3, #4
 802140c:	617b      	str	r3, [r7, #20]
 802140e:	e00b      	b.n	8021428 <udp_sendto_if+0xb0>
    } else {
      /* check if UDP PCB local IP address is correct
       * this could be an old address if netif->ip_addr has changed */
      if (!ip4_addr_cmp(ip_2_ip4(&(pcb->local_ip)), netif_ip4_addr(netif))) {
 8021410:	68fb      	ldr	r3, [r7, #12]
 8021412:	681a      	ldr	r2, [r3, #0]
 8021414:	6a3b      	ldr	r3, [r7, #32]
 8021416:	3304      	adds	r3, #4
 8021418:	681b      	ldr	r3, [r3, #0]
 802141a:	429a      	cmp	r2, r3
 802141c:	d002      	beq.n	8021424 <udp_sendto_if+0xac>
        /* local_ip doesn't match, drop the packet */
        return ERR_RTE;
 802141e:	f06f 0303 	mvn.w	r3, #3
 8021422:	e00d      	b.n	8021440 <udp_sendto_if+0xc8>
      }
      /* use UDP PCB local IP address as source address */
      src_ip = &pcb->local_ip;
 8021424:	68fb      	ldr	r3, [r7, #12]
 8021426:	617b      	str	r3, [r7, #20]
    }
#endif /* LWIP_IPV4 */
#if LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP
  return udp_sendto_if_src_chksum(pcb, p, dst_ip, dst_port, netif, have_chksum, chksum, src_ip);
#else /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  return udp_sendto_if_src(pcb, p, dst_ip, dst_port, netif, src_ip);
 8021428:	887a      	ldrh	r2, [r7, #2]
 802142a:	697b      	ldr	r3, [r7, #20]
 802142c:	9301      	str	r3, [sp, #4]
 802142e:	6a3b      	ldr	r3, [r7, #32]
 8021430:	9300      	str	r3, [sp, #0]
 8021432:	4613      	mov	r3, r2
 8021434:	687a      	ldr	r2, [r7, #4]
 8021436:	68b9      	ldr	r1, [r7, #8]
 8021438:	68f8      	ldr	r0, [r7, #12]
 802143a:	f000 f811 	bl	8021460 <udp_sendto_if_src>
 802143e:	4603      	mov	r3, r0
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
}
 8021440:	4618      	mov	r0, r3
 8021442:	3718      	adds	r7, #24
 8021444:	46bd      	mov	sp, r7
 8021446:	bd80      	pop	{r7, pc}
 8021448:	0802fb38 	.word	0x0802fb38
 802144c:	0802fcac 	.word	0x0802fcac
 8021450:	0802fb8c 	.word	0x0802fb8c
 8021454:	0802fcc8 	.word	0x0802fcc8
 8021458:	0802fce4 	.word	0x0802fce4
 802145c:	0802fd04 	.word	0x0802fd04

08021460 <udp_sendto_if_src>:
/** @ingroup udp_raw
 * Same as @ref udp_sendto_if, but with source address */
err_t
udp_sendto_if_src(struct udp_pcb *pcb, struct pbuf *p,
                  const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif, const ip_addr_t *src_ip)
{
 8021460:	b580      	push	{r7, lr}
 8021462:	b08c      	sub	sp, #48	@ 0x30
 8021464:	af04      	add	r7, sp, #16
 8021466:	60f8      	str	r0, [r7, #12]
 8021468:	60b9      	str	r1, [r7, #8]
 802146a:	607a      	str	r2, [r7, #4]
 802146c:	807b      	strh	r3, [r7, #2]
  err_t err;
  struct pbuf *q; /* q will be sent down the stack */
  u8_t ip_proto;
  u8_t ttl;

  LWIP_ASSERT_CORE_LOCKED();
 802146e:	f7ef f869 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("udp_sendto_if_src: invalid pcb", pcb != NULL, return ERR_ARG);
 8021472:	68fb      	ldr	r3, [r7, #12]
 8021474:	2b00      	cmp	r3, #0
 8021476:	d109      	bne.n	802148c <udp_sendto_if_src+0x2c>
 8021478:	4b65      	ldr	r3, [pc, #404]	@ (8021610 <udp_sendto_if_src+0x1b0>)
 802147a:	f240 22d1 	movw	r2, #721	@ 0x2d1
 802147e:	4965      	ldr	r1, [pc, #404]	@ (8021614 <udp_sendto_if_src+0x1b4>)
 8021480:	4865      	ldr	r0, [pc, #404]	@ (8021618 <udp_sendto_if_src+0x1b8>)
 8021482:	f008 faab 	bl	80299dc <iprintf>
 8021486:	f06f 030f 	mvn.w	r3, #15
 802148a:	e0bc      	b.n	8021606 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid pbuf", p != NULL, return ERR_ARG);
 802148c:	68bb      	ldr	r3, [r7, #8]
 802148e:	2b00      	cmp	r3, #0
 8021490:	d109      	bne.n	80214a6 <udp_sendto_if_src+0x46>
 8021492:	4b5f      	ldr	r3, [pc, #380]	@ (8021610 <udp_sendto_if_src+0x1b0>)
 8021494:	f240 22d2 	movw	r2, #722	@ 0x2d2
 8021498:	4960      	ldr	r1, [pc, #384]	@ (802161c <udp_sendto_if_src+0x1bc>)
 802149a:	485f      	ldr	r0, [pc, #380]	@ (8021618 <udp_sendto_if_src+0x1b8>)
 802149c:	f008 fa9e 	bl	80299dc <iprintf>
 80214a0:	f06f 030f 	mvn.w	r3, #15
 80214a4:	e0af      	b.n	8021606 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 80214a6:	687b      	ldr	r3, [r7, #4]
 80214a8:	2b00      	cmp	r3, #0
 80214aa:	d109      	bne.n	80214c0 <udp_sendto_if_src+0x60>
 80214ac:	4b58      	ldr	r3, [pc, #352]	@ (8021610 <udp_sendto_if_src+0x1b0>)
 80214ae:	f240 22d3 	movw	r2, #723	@ 0x2d3
 80214b2:	495b      	ldr	r1, [pc, #364]	@ (8021620 <udp_sendto_if_src+0x1c0>)
 80214b4:	4858      	ldr	r0, [pc, #352]	@ (8021618 <udp_sendto_if_src+0x1b8>)
 80214b6:	f008 fa91 	bl	80299dc <iprintf>
 80214ba:	f06f 030f 	mvn.w	r3, #15
 80214be:	e0a2      	b.n	8021606 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid src_ip", src_ip != NULL, return ERR_ARG);
 80214c0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80214c2:	2b00      	cmp	r3, #0
 80214c4:	d109      	bne.n	80214da <udp_sendto_if_src+0x7a>
 80214c6:	4b52      	ldr	r3, [pc, #328]	@ (8021610 <udp_sendto_if_src+0x1b0>)
 80214c8:	f44f 7235 	mov.w	r2, #724	@ 0x2d4
 80214cc:	4955      	ldr	r1, [pc, #340]	@ (8021624 <udp_sendto_if_src+0x1c4>)
 80214ce:	4852      	ldr	r0, [pc, #328]	@ (8021618 <udp_sendto_if_src+0x1b8>)
 80214d0:	f008 fa84 	bl	80299dc <iprintf>
 80214d4:	f06f 030f 	mvn.w	r3, #15
 80214d8:	e095      	b.n	8021606 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid netif", netif != NULL, return ERR_ARG);
 80214da:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80214dc:	2b00      	cmp	r3, #0
 80214de:	d109      	bne.n	80214f4 <udp_sendto_if_src+0x94>
 80214e0:	4b4b      	ldr	r3, [pc, #300]	@ (8021610 <udp_sendto_if_src+0x1b0>)
 80214e2:	f240 22d5 	movw	r2, #725	@ 0x2d5
 80214e6:	4950      	ldr	r1, [pc, #320]	@ (8021628 <udp_sendto_if_src+0x1c8>)
 80214e8:	484b      	ldr	r0, [pc, #300]	@ (8021618 <udp_sendto_if_src+0x1b8>)
 80214ea:	f008 fa77 	bl	80299dc <iprintf>
 80214ee:	f06f 030f 	mvn.w	r3, #15
 80214f2:	e088      	b.n	8021606 <udp_sendto_if_src+0x1a6>
    return ERR_VAL;
  }
#endif /* LWIP_IPV4 && IP_SOF_BROADCAST */

  /* if the PCB is not yet bound to a port, bind it here */
  if (pcb->local_port == 0) {
 80214f4:	68fb      	ldr	r3, [r7, #12]
 80214f6:	8a5b      	ldrh	r3, [r3, #18]
 80214f8:	2b00      	cmp	r3, #0
 80214fa:	d10f      	bne.n	802151c <udp_sendto_if_src+0xbc>
    LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send: not yet bound to a port, binding now\n"));
    err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
 80214fc:	68f9      	ldr	r1, [r7, #12]
 80214fe:	68fb      	ldr	r3, [r7, #12]
 8021500:	8a5b      	ldrh	r3, [r3, #18]
 8021502:	461a      	mov	r2, r3
 8021504:	68f8      	ldr	r0, [r7, #12]
 8021506:	f000 f893 	bl	8021630 <udp_bind>
 802150a:	4603      	mov	r3, r0
 802150c:	76fb      	strb	r3, [r7, #27]
    if (err != ERR_OK) {
 802150e:	f997 301b 	ldrsb.w	r3, [r7, #27]
 8021512:	2b00      	cmp	r3, #0
 8021514:	d002      	beq.n	802151c <udp_sendto_if_src+0xbc>
      LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: forced port bind failed\n"));
      return err;
 8021516:	f997 301b 	ldrsb.w	r3, [r7, #27]
 802151a:	e074      	b.n	8021606 <udp_sendto_if_src+0x1a6>
    }
  }

  /* packet too large to add a UDP header without causing an overflow? */
  if ((u16_t)(p->tot_len + UDP_HLEN) < p->tot_len) {
 802151c:	68bb      	ldr	r3, [r7, #8]
 802151e:	891b      	ldrh	r3, [r3, #8]
 8021520:	f64f 72f7 	movw	r2, #65527	@ 0xfff7
 8021524:	4293      	cmp	r3, r2
 8021526:	d902      	bls.n	802152e <udp_sendto_if_src+0xce>
    return ERR_MEM;
 8021528:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802152c:	e06b      	b.n	8021606 <udp_sendto_if_src+0x1a6>
  }
  /* not enough space to add an UDP header to first pbuf in given p chain? */
  if (pbuf_add_header(p, UDP_HLEN)) {
 802152e:	2108      	movs	r1, #8
 8021530:	68b8      	ldr	r0, [r7, #8]
 8021532:	f7f8 ff13 	bl	801a35c <pbuf_add_header>
 8021536:	4603      	mov	r3, r0
 8021538:	2b00      	cmp	r3, #0
 802153a:	d015      	beq.n	8021568 <udp_sendto_if_src+0x108>
    /* allocate header in a separate new pbuf */
    q = pbuf_alloc(PBUF_IP, UDP_HLEN, PBUF_RAM);
 802153c:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8021540:	2108      	movs	r1, #8
 8021542:	2022      	movs	r0, #34	@ 0x22
 8021544:	f7f8 fcbc 	bl	8019ec0 <pbuf_alloc>
 8021548:	61f8      	str	r0, [r7, #28]
    /* new header pbuf could not be allocated? */
    if (q == NULL) {
 802154a:	69fb      	ldr	r3, [r7, #28]
 802154c:	2b00      	cmp	r3, #0
 802154e:	d102      	bne.n	8021556 <udp_sendto_if_src+0xf6>
      LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: could not allocate header\n"));
      return ERR_MEM;
 8021550:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021554:	e057      	b.n	8021606 <udp_sendto_if_src+0x1a6>
    }
    if (p->tot_len != 0) {
 8021556:	68bb      	ldr	r3, [r7, #8]
 8021558:	891b      	ldrh	r3, [r3, #8]
 802155a:	2b00      	cmp	r3, #0
 802155c:	d006      	beq.n	802156c <udp_sendto_if_src+0x10c>
      /* chain header q in front of given pbuf p (only if p contains data) */
      pbuf_chain(q, p);
 802155e:	68b9      	ldr	r1, [r7, #8]
 8021560:	69f8      	ldr	r0, [r7, #28]
 8021562:	f7f9 f8e7 	bl	801a734 <pbuf_chain>
 8021566:	e001      	b.n	802156c <udp_sendto_if_src+0x10c>
    LWIP_DEBUGF(UDP_DEBUG,
                ("udp_send: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p));
  } else {
    /* adding space for header within p succeeded */
    /* first pbuf q equals given pbuf */
    q = p;
 8021568:	68bb      	ldr	r3, [r7, #8]
 802156a:	61fb      	str	r3, [r7, #28]
    LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header in given pbuf %p\n", (void *)p));
  }
  LWIP_ASSERT("check that first pbuf can hold struct udp_hdr",
 802156c:	69fb      	ldr	r3, [r7, #28]
 802156e:	895b      	ldrh	r3, [r3, #10]
 8021570:	2b07      	cmp	r3, #7
 8021572:	d806      	bhi.n	8021582 <udp_sendto_if_src+0x122>
 8021574:	4b26      	ldr	r3, [pc, #152]	@ (8021610 <udp_sendto_if_src+0x1b0>)
 8021576:	f240 320d 	movw	r2, #781	@ 0x30d
 802157a:	492c      	ldr	r1, [pc, #176]	@ (802162c <udp_sendto_if_src+0x1cc>)
 802157c:	4826      	ldr	r0, [pc, #152]	@ (8021618 <udp_sendto_if_src+0x1b8>)
 802157e:	f008 fa2d 	bl	80299dc <iprintf>
              (q->len >= sizeof(struct udp_hdr)));
  /* q now represents the packet to be sent */
  udphdr = (struct udp_hdr *)q->payload;
 8021582:	69fb      	ldr	r3, [r7, #28]
 8021584:	685b      	ldr	r3, [r3, #4]
 8021586:	617b      	str	r3, [r7, #20]
  udphdr->src = lwip_htons(pcb->local_port);
 8021588:	68fb      	ldr	r3, [r7, #12]
 802158a:	8a5b      	ldrh	r3, [r3, #18]
 802158c:	4618      	mov	r0, r3
 802158e:	f7f7 facb 	bl	8018b28 <lwip_htons>
 8021592:	4603      	mov	r3, r0
 8021594:	461a      	mov	r2, r3
 8021596:	697b      	ldr	r3, [r7, #20]
 8021598:	801a      	strh	r2, [r3, #0]
  udphdr->dest = lwip_htons(dst_port);
 802159a:	887b      	ldrh	r3, [r7, #2]
 802159c:	4618      	mov	r0, r3
 802159e:	f7f7 fac3 	bl	8018b28 <lwip_htons>
 80215a2:	4603      	mov	r3, r0
 80215a4:	461a      	mov	r2, r3
 80215a6:	697b      	ldr	r3, [r7, #20]
 80215a8:	805a      	strh	r2, [r3, #2]
  /* in UDP, 0 checksum means 'no checksum' */
  udphdr->chksum = 0x0000;
 80215aa:	697b      	ldr	r3, [r7, #20]
 80215ac:	2200      	movs	r2, #0
 80215ae:	719a      	strb	r2, [r3, #6]
 80215b0:	2200      	movs	r2, #0
 80215b2:	71da      	strb	r2, [r3, #7]
    ip_proto = IP_PROTO_UDPLITE;
  } else
#endif /* LWIP_UDPLITE */
  {      /* UDP */
    LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP packet length %"U16_F"\n", q->tot_len));
    udphdr->len = lwip_htons(q->tot_len);
 80215b4:	69fb      	ldr	r3, [r7, #28]
 80215b6:	891b      	ldrh	r3, [r3, #8]
 80215b8:	4618      	mov	r0, r3
 80215ba:	f7f7 fab5 	bl	8018b28 <lwip_htons>
 80215be:	4603      	mov	r3, r0
 80215c0:	461a      	mov	r2, r3
 80215c2:	697b      	ldr	r3, [r7, #20]
 80215c4:	809a      	strh	r2, [r3, #4]
        }
        udphdr->chksum = udpchksum;
      }
    }
#endif /* CHECKSUM_GEN_UDP */
    ip_proto = IP_PROTO_UDP;
 80215c6:	2311      	movs	r3, #17
 80215c8:	74fb      	strb	r3, [r7, #19]

  /* Determine TTL to use */
#if LWIP_MULTICAST_TX_OPTIONS
  ttl = (ip_addr_ismulticast(dst_ip) ? udp_get_multicast_ttl(pcb) : pcb->ttl);
#else /* LWIP_MULTICAST_TX_OPTIONS */
  ttl = pcb->ttl;
 80215ca:	68fb      	ldr	r3, [r7, #12]
 80215cc:	7adb      	ldrb	r3, [r3, #11]
 80215ce:	74bb      	strb	r3, [r7, #18]

  LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP checksum 0x%04"X16_F"\n", udphdr->chksum));
  LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,0x%02"X16_F",)\n", (u16_t)ip_proto));
  /* output to IP */
  NETIF_SET_HINTS(netif, &(pcb->netif_hints));
  err = ip_output_if_src(q, src_ip, dst_ip, ttl, pcb->tos, ip_proto, netif);
 80215d0:	68fb      	ldr	r3, [r7, #12]
 80215d2:	7a9b      	ldrb	r3, [r3, #10]
 80215d4:	7cb9      	ldrb	r1, [r7, #18]
 80215d6:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80215d8:	9202      	str	r2, [sp, #8]
 80215da:	7cfa      	ldrb	r2, [r7, #19]
 80215dc:	9201      	str	r2, [sp, #4]
 80215de:	9300      	str	r3, [sp, #0]
 80215e0:	460b      	mov	r3, r1
 80215e2:	687a      	ldr	r2, [r7, #4]
 80215e4:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 80215e6:	69f8      	ldr	r0, [r7, #28]
 80215e8:	f003 fbf2 	bl	8024dd0 <ip4_output_if_src>
 80215ec:	4603      	mov	r3, r0
 80215ee:	76fb      	strb	r3, [r7, #27]

  /* @todo: must this be increased even if error occurred? */
  MIB2_STATS_INC(mib2.udpoutdatagrams);

  /* did we chain a separate header pbuf earlier? */
  if (q != p) {
 80215f0:	69fa      	ldr	r2, [r7, #28]
 80215f2:	68bb      	ldr	r3, [r7, #8]
 80215f4:	429a      	cmp	r2, r3
 80215f6:	d004      	beq.n	8021602 <udp_sendto_if_src+0x1a2>
    /* free the header pbuf */
    pbuf_free(q);
 80215f8:	69f8      	ldr	r0, [r7, #28]
 80215fa:	f7f8 ff77 	bl	801a4ec <pbuf_free>
    q = NULL;
 80215fe:	2300      	movs	r3, #0
 8021600:	61fb      	str	r3, [r7, #28]
    /* p is still referenced by the caller, and will live on */
  }

  UDP_STATS_INC(udp.xmit);
  return err;
 8021602:	f997 301b 	ldrsb.w	r3, [r7, #27]
}
 8021606:	4618      	mov	r0, r3
 8021608:	3720      	adds	r7, #32
 802160a:	46bd      	mov	sp, r7
 802160c:	bd80      	pop	{r7, pc}
 802160e:	bf00      	nop
 8021610:	0802fb38 	.word	0x0802fb38
 8021614:	0802fd24 	.word	0x0802fd24
 8021618:	0802fb8c 	.word	0x0802fb8c
 802161c:	0802fd44 	.word	0x0802fd44
 8021620:	0802fd64 	.word	0x0802fd64
 8021624:	0802fd88 	.word	0x0802fd88
 8021628:	0802fdac 	.word	0x0802fdac
 802162c:	0802fdd0 	.word	0x0802fdd0

08021630 <udp_bind>:
 *
 * @see udp_disconnect()
 */
err_t
udp_bind(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
{
 8021630:	b580      	push	{r7, lr}
 8021632:	b086      	sub	sp, #24
 8021634:	af00      	add	r7, sp, #0
 8021636:	60f8      	str	r0, [r7, #12]
 8021638:	60b9      	str	r1, [r7, #8]
 802163a:	4613      	mov	r3, r2
 802163c:	80fb      	strh	r3, [r7, #6]
  u8_t rebind;
#if LWIP_IPV6 && LWIP_IPV6_SCOPES
  ip_addr_t zoned_ipaddr;
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  LWIP_ASSERT_CORE_LOCKED();
 802163e:	f7ee ff81 	bl	8010544 <sys_check_core_locking>

#if LWIP_IPV4
  /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */
  if (ipaddr == NULL) {
 8021642:	68bb      	ldr	r3, [r7, #8]
 8021644:	2b00      	cmp	r3, #0
 8021646:	d101      	bne.n	802164c <udp_bind+0x1c>
    ipaddr = IP4_ADDR_ANY;
 8021648:	4b39      	ldr	r3, [pc, #228]	@ (8021730 <udp_bind+0x100>)
 802164a:	60bb      	str	r3, [r7, #8]
  }
#else /* LWIP_IPV4 */
  LWIP_ERROR("udp_bind: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
#endif /* LWIP_IPV4 */

  LWIP_ERROR("udp_bind: invalid pcb", pcb != NULL, return ERR_ARG);
 802164c:	68fb      	ldr	r3, [r7, #12]
 802164e:	2b00      	cmp	r3, #0
 8021650:	d109      	bne.n	8021666 <udp_bind+0x36>
 8021652:	4b38      	ldr	r3, [pc, #224]	@ (8021734 <udp_bind+0x104>)
 8021654:	f240 32b7 	movw	r2, #951	@ 0x3b7
 8021658:	4937      	ldr	r1, [pc, #220]	@ (8021738 <udp_bind+0x108>)
 802165a:	4838      	ldr	r0, [pc, #224]	@ (802173c <udp_bind+0x10c>)
 802165c:	f008 f9be 	bl	80299dc <iprintf>
 8021660:	f06f 030f 	mvn.w	r3, #15
 8021664:	e060      	b.n	8021728 <udp_bind+0xf8>

  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_bind(ipaddr = "));
  ip_addr_debug_print(UDP_DEBUG | LWIP_DBG_TRACE, ipaddr);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, (", port = %"U16_F")\n", port));

  rebind = 0;
 8021666:	2300      	movs	r3, #0
 8021668:	74fb      	strb	r3, [r7, #19]
  /* Check for double bind and rebind of the same pcb */
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 802166a:	4b35      	ldr	r3, [pc, #212]	@ (8021740 <udp_bind+0x110>)
 802166c:	681b      	ldr	r3, [r3, #0]
 802166e:	617b      	str	r3, [r7, #20]
 8021670:	e009      	b.n	8021686 <udp_bind+0x56>
    /* is this UDP PCB already on active list? */
    if (pcb == ipcb) {
 8021672:	68fa      	ldr	r2, [r7, #12]
 8021674:	697b      	ldr	r3, [r7, #20]
 8021676:	429a      	cmp	r2, r3
 8021678:	d102      	bne.n	8021680 <udp_bind+0x50>
      rebind = 1;
 802167a:	2301      	movs	r3, #1
 802167c:	74fb      	strb	r3, [r7, #19]
      break;
 802167e:	e005      	b.n	802168c <udp_bind+0x5c>
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 8021680:	697b      	ldr	r3, [r7, #20]
 8021682:	68db      	ldr	r3, [r3, #12]
 8021684:	617b      	str	r3, [r7, #20]
 8021686:	697b      	ldr	r3, [r7, #20]
 8021688:	2b00      	cmp	r3, #0
 802168a:	d1f2      	bne.n	8021672 <udp_bind+0x42>
    ipaddr = &zoned_ipaddr;
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  /* no port specified? */
  if (port == 0) {
 802168c:	88fb      	ldrh	r3, [r7, #6]
 802168e:	2b00      	cmp	r3, #0
 8021690:	d109      	bne.n	80216a6 <udp_bind+0x76>
    port = udp_new_port();
 8021692:	f7ff fc2f 	bl	8020ef4 <udp_new_port>
 8021696:	4603      	mov	r3, r0
 8021698:	80fb      	strh	r3, [r7, #6]
    if (port == 0) {
 802169a:	88fb      	ldrh	r3, [r7, #6]
 802169c:	2b00      	cmp	r3, #0
 802169e:	d12c      	bne.n	80216fa <udp_bind+0xca>
      /* no more ports available in local range */
      LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: out of free UDP ports\n"));
      return ERR_USE;
 80216a0:	f06f 0307 	mvn.w	r3, #7
 80216a4:	e040      	b.n	8021728 <udp_bind+0xf8>
    }
  } else {
    for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 80216a6:	4b26      	ldr	r3, [pc, #152]	@ (8021740 <udp_bind+0x110>)
 80216a8:	681b      	ldr	r3, [r3, #0]
 80216aa:	617b      	str	r3, [r7, #20]
 80216ac:	e022      	b.n	80216f4 <udp_bind+0xc4>
      if (pcb != ipcb) {
 80216ae:	68fa      	ldr	r2, [r7, #12]
 80216b0:	697b      	ldr	r3, [r7, #20]
 80216b2:	429a      	cmp	r2, r3
 80216b4:	d01b      	beq.n	80216ee <udp_bind+0xbe>
        if (!ip_get_option(pcb, SOF_REUSEADDR) ||
            !ip_get_option(ipcb, SOF_REUSEADDR))
#endif /* SO_REUSE */
        {
          /* port matches that of PCB in list and REUSEADDR not set -> reject */
          if ((ipcb->local_port == port) &&
 80216b6:	697b      	ldr	r3, [r7, #20]
 80216b8:	8a5b      	ldrh	r3, [r3, #18]
 80216ba:	88fa      	ldrh	r2, [r7, #6]
 80216bc:	429a      	cmp	r2, r3
 80216be:	d116      	bne.n	80216ee <udp_bind+0xbe>
              /* IP address matches or any IP used? */
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 80216c0:	697b      	ldr	r3, [r7, #20]
 80216c2:	681a      	ldr	r2, [r3, #0]
 80216c4:	68bb      	ldr	r3, [r7, #8]
 80216c6:	681b      	ldr	r3, [r3, #0]
          if ((ipcb->local_port == port) &&
 80216c8:	429a      	cmp	r2, r3
 80216ca:	d00d      	beq.n	80216e8 <udp_bind+0xb8>
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 80216cc:	68bb      	ldr	r3, [r7, #8]
 80216ce:	2b00      	cmp	r3, #0
 80216d0:	d00a      	beq.n	80216e8 <udp_bind+0xb8>
 80216d2:	68bb      	ldr	r3, [r7, #8]
 80216d4:	681b      	ldr	r3, [r3, #0]
 80216d6:	2b00      	cmp	r3, #0
 80216d8:	d006      	beq.n	80216e8 <udp_bind+0xb8>
              ip_addr_isany(&ipcb->local_ip))) {
 80216da:	697b      	ldr	r3, [r7, #20]
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 80216dc:	2b00      	cmp	r3, #0
 80216de:	d003      	beq.n	80216e8 <udp_bind+0xb8>
              ip_addr_isany(&ipcb->local_ip))) {
 80216e0:	697b      	ldr	r3, [r7, #20]
 80216e2:	681b      	ldr	r3, [r3, #0]
 80216e4:	2b00      	cmp	r3, #0
 80216e6:	d102      	bne.n	80216ee <udp_bind+0xbe>
            /* other PCB already binds to this local IP and port */
            LWIP_DEBUGF(UDP_DEBUG,
                        ("udp_bind: local port %"U16_F" already bound by another pcb\n", port));
            return ERR_USE;
 80216e8:	f06f 0307 	mvn.w	r3, #7
 80216ec:	e01c      	b.n	8021728 <udp_bind+0xf8>
    for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 80216ee:	697b      	ldr	r3, [r7, #20]
 80216f0:	68db      	ldr	r3, [r3, #12]
 80216f2:	617b      	str	r3, [r7, #20]
 80216f4:	697b      	ldr	r3, [r7, #20]
 80216f6:	2b00      	cmp	r3, #0
 80216f8:	d1d9      	bne.n	80216ae <udp_bind+0x7e>
        }
      }
    }
  }

  ip_addr_set_ipaddr(&pcb->local_ip, ipaddr);
 80216fa:	68bb      	ldr	r3, [r7, #8]
 80216fc:	2b00      	cmp	r3, #0
 80216fe:	d002      	beq.n	8021706 <udp_bind+0xd6>
 8021700:	68bb      	ldr	r3, [r7, #8]
 8021702:	681b      	ldr	r3, [r3, #0]
 8021704:	e000      	b.n	8021708 <udp_bind+0xd8>
 8021706:	2300      	movs	r3, #0
 8021708:	68fa      	ldr	r2, [r7, #12]
 802170a:	6013      	str	r3, [r2, #0]

  pcb->local_port = port;
 802170c:	68fb      	ldr	r3, [r7, #12]
 802170e:	88fa      	ldrh	r2, [r7, #6]
 8021710:	825a      	strh	r2, [r3, #18]
  mib2_udp_bind(pcb);
  /* pcb not active yet? */
  if (rebind == 0) {
 8021712:	7cfb      	ldrb	r3, [r7, #19]
 8021714:	2b00      	cmp	r3, #0
 8021716:	d106      	bne.n	8021726 <udp_bind+0xf6>
    /* place the PCB on the active list if not already there */
    pcb->next = udp_pcbs;
 8021718:	4b09      	ldr	r3, [pc, #36]	@ (8021740 <udp_bind+0x110>)
 802171a:	681a      	ldr	r2, [r3, #0]
 802171c:	68fb      	ldr	r3, [r7, #12]
 802171e:	60da      	str	r2, [r3, #12]
    udp_pcbs = pcb;
 8021720:	4a07      	ldr	r2, [pc, #28]	@ (8021740 <udp_bind+0x110>)
 8021722:	68fb      	ldr	r3, [r7, #12]
 8021724:	6013      	str	r3, [r2, #0]
  }
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("udp_bind: bound to "));
  ip_addr_debug_print_val(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, pcb->local_ip);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, (", port %"U16_F")\n", pcb->local_port));
  return ERR_OK;
 8021726:	2300      	movs	r3, #0
}
 8021728:	4618      	mov	r0, r3
 802172a:	3718      	adds	r7, #24
 802172c:	46bd      	mov	sp, r7
 802172e:	bd80      	pop	{r7, pc}
 8021730:	08030c68 	.word	0x08030c68
 8021734:	0802fb38 	.word	0x0802fb38
 8021738:	0802fe00 	.word	0x0802fe00
 802173c:	0802fb8c 	.word	0x0802fb8c
 8021740:	2402aee8 	.word	0x2402aee8

08021744 <udp_connect>:
 *
 * @see udp_disconnect()
 */
err_t
udp_connect(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
{
 8021744:	b580      	push	{r7, lr}
 8021746:	b086      	sub	sp, #24
 8021748:	af00      	add	r7, sp, #0
 802174a:	60f8      	str	r0, [r7, #12]
 802174c:	60b9      	str	r1, [r7, #8]
 802174e:	4613      	mov	r3, r2
 8021750:	80fb      	strh	r3, [r7, #6]
  struct udp_pcb *ipcb;

  LWIP_ASSERT_CORE_LOCKED();
 8021752:	f7ee fef7 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("udp_connect: invalid pcb", pcb != NULL, return ERR_ARG);
 8021756:	68fb      	ldr	r3, [r7, #12]
 8021758:	2b00      	cmp	r3, #0
 802175a:	d109      	bne.n	8021770 <udp_connect+0x2c>
 802175c:	4b2c      	ldr	r3, [pc, #176]	@ (8021810 <udp_connect+0xcc>)
 802175e:	f240 4235 	movw	r2, #1077	@ 0x435
 8021762:	492c      	ldr	r1, [pc, #176]	@ (8021814 <udp_connect+0xd0>)
 8021764:	482c      	ldr	r0, [pc, #176]	@ (8021818 <udp_connect+0xd4>)
 8021766:	f008 f939 	bl	80299dc <iprintf>
 802176a:	f06f 030f 	mvn.w	r3, #15
 802176e:	e04b      	b.n	8021808 <udp_connect+0xc4>
  LWIP_ERROR("udp_connect: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
 8021770:	68bb      	ldr	r3, [r7, #8]
 8021772:	2b00      	cmp	r3, #0
 8021774:	d109      	bne.n	802178a <udp_connect+0x46>
 8021776:	4b26      	ldr	r3, [pc, #152]	@ (8021810 <udp_connect+0xcc>)
 8021778:	f240 4236 	movw	r2, #1078	@ 0x436
 802177c:	4927      	ldr	r1, [pc, #156]	@ (802181c <udp_connect+0xd8>)
 802177e:	4826      	ldr	r0, [pc, #152]	@ (8021818 <udp_connect+0xd4>)
 8021780:	f008 f92c 	bl	80299dc <iprintf>
 8021784:	f06f 030f 	mvn.w	r3, #15
 8021788:	e03e      	b.n	8021808 <udp_connect+0xc4>

  if (pcb->local_port == 0) {
 802178a:	68fb      	ldr	r3, [r7, #12]
 802178c:	8a5b      	ldrh	r3, [r3, #18]
 802178e:	2b00      	cmp	r3, #0
 8021790:	d10f      	bne.n	80217b2 <udp_connect+0x6e>
    err_t err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
 8021792:	68f9      	ldr	r1, [r7, #12]
 8021794:	68fb      	ldr	r3, [r7, #12]
 8021796:	8a5b      	ldrh	r3, [r3, #18]
 8021798:	461a      	mov	r2, r3
 802179a:	68f8      	ldr	r0, [r7, #12]
 802179c:	f7ff ff48 	bl	8021630 <udp_bind>
 80217a0:	4603      	mov	r3, r0
 80217a2:	75fb      	strb	r3, [r7, #23]
    if (err != ERR_OK) {
 80217a4:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80217a8:	2b00      	cmp	r3, #0
 80217aa:	d002      	beq.n	80217b2 <udp_connect+0x6e>
      return err;
 80217ac:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80217b0:	e02a      	b.n	8021808 <udp_connect+0xc4>
    }
  }

  ip_addr_set_ipaddr(&pcb->remote_ip, ipaddr);
 80217b2:	68bb      	ldr	r3, [r7, #8]
 80217b4:	2b00      	cmp	r3, #0
 80217b6:	d002      	beq.n	80217be <udp_connect+0x7a>
 80217b8:	68bb      	ldr	r3, [r7, #8]
 80217ba:	681b      	ldr	r3, [r3, #0]
 80217bc:	e000      	b.n	80217c0 <udp_connect+0x7c>
 80217be:	2300      	movs	r3, #0
 80217c0:	68fa      	ldr	r2, [r7, #12]
 80217c2:	6053      	str	r3, [r2, #4]
      ip6_addr_lacks_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNKNOWN)) {
    ip6_addr_select_zone(ip_2_ip6(&pcb->remote_ip), ip_2_ip6(&pcb->local_ip));
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  pcb->remote_port = port;
 80217c4:	68fb      	ldr	r3, [r7, #12]
 80217c6:	88fa      	ldrh	r2, [r7, #6]
 80217c8:	829a      	strh	r2, [r3, #20]
  pcb->flags |= UDP_FLAGS_CONNECTED;
 80217ca:	68fb      	ldr	r3, [r7, #12]
 80217cc:	7c1b      	ldrb	r3, [r3, #16]
 80217ce:	f043 0304 	orr.w	r3, r3, #4
 80217d2:	b2da      	uxtb	r2, r3
 80217d4:	68fb      	ldr	r3, [r7, #12]
 80217d6:	741a      	strb	r2, [r3, #16]
  ip_addr_debug_print_val(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                          pcb->remote_ip);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, (", port %"U16_F")\n", pcb->remote_port));

  /* Insert UDP PCB into the list of active UDP PCBs. */
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 80217d8:	4b11      	ldr	r3, [pc, #68]	@ (8021820 <udp_connect+0xdc>)
 80217da:	681b      	ldr	r3, [r3, #0]
 80217dc:	613b      	str	r3, [r7, #16]
 80217de:	e008      	b.n	80217f2 <udp_connect+0xae>
    if (pcb == ipcb) {
 80217e0:	68fa      	ldr	r2, [r7, #12]
 80217e2:	693b      	ldr	r3, [r7, #16]
 80217e4:	429a      	cmp	r2, r3
 80217e6:	d101      	bne.n	80217ec <udp_connect+0xa8>
      /* already on the list, just return */
      return ERR_OK;
 80217e8:	2300      	movs	r3, #0
 80217ea:	e00d      	b.n	8021808 <udp_connect+0xc4>
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 80217ec:	693b      	ldr	r3, [r7, #16]
 80217ee:	68db      	ldr	r3, [r3, #12]
 80217f0:	613b      	str	r3, [r7, #16]
 80217f2:	693b      	ldr	r3, [r7, #16]
 80217f4:	2b00      	cmp	r3, #0
 80217f6:	d1f3      	bne.n	80217e0 <udp_connect+0x9c>
    }
  }
  /* PCB not yet on the list, add PCB now */
  pcb->next = udp_pcbs;
 80217f8:	4b09      	ldr	r3, [pc, #36]	@ (8021820 <udp_connect+0xdc>)
 80217fa:	681a      	ldr	r2, [r3, #0]
 80217fc:	68fb      	ldr	r3, [r7, #12]
 80217fe:	60da      	str	r2, [r3, #12]
  udp_pcbs = pcb;
 8021800:	4a07      	ldr	r2, [pc, #28]	@ (8021820 <udp_connect+0xdc>)
 8021802:	68fb      	ldr	r3, [r7, #12]
 8021804:	6013      	str	r3, [r2, #0]
  return ERR_OK;
 8021806:	2300      	movs	r3, #0
}
 8021808:	4618      	mov	r0, r3
 802180a:	3718      	adds	r7, #24
 802180c:	46bd      	mov	sp, r7
 802180e:	bd80      	pop	{r7, pc}
 8021810:	0802fb38 	.word	0x0802fb38
 8021814:	0802fe18 	.word	0x0802fe18
 8021818:	0802fb8c 	.word	0x0802fb8c
 802181c:	0802fe34 	.word	0x0802fe34
 8021820:	2402aee8 	.word	0x2402aee8

08021824 <udp_disconnect>:
 *
 * @param pcb the udp pcb to disconnect.
 */
void
udp_disconnect(struct udp_pcb *pcb)
{
 8021824:	b580      	push	{r7, lr}
 8021826:	b082      	sub	sp, #8
 8021828:	af00      	add	r7, sp, #0
 802182a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 802182c:	f7ee fe8a 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("udp_disconnect: invalid pcb", pcb != NULL, return);
 8021830:	687b      	ldr	r3, [r7, #4]
 8021832:	2b00      	cmp	r3, #0
 8021834:	d107      	bne.n	8021846 <udp_disconnect+0x22>
 8021836:	4b0d      	ldr	r3, [pc, #52]	@ (802186c <udp_disconnect+0x48>)
 8021838:	f240 426a 	movw	r2, #1130	@ 0x46a
 802183c:	490c      	ldr	r1, [pc, #48]	@ (8021870 <udp_disconnect+0x4c>)
 802183e:	480d      	ldr	r0, [pc, #52]	@ (8021874 <udp_disconnect+0x50>)
 8021840:	f008 f8cc 	bl	80299dc <iprintf>
 8021844:	e00f      	b.n	8021866 <udp_disconnect+0x42>
#if LWIP_IPV4 && LWIP_IPV6
  if (IP_IS_ANY_TYPE_VAL(pcb->local_ip)) {
    ip_addr_copy(pcb->remote_ip, *IP_ANY_TYPE);
  } else {
#endif
    ip_addr_set_any(IP_IS_V6_VAL(pcb->remote_ip), &pcb->remote_ip);
 8021846:	687b      	ldr	r3, [r7, #4]
 8021848:	2200      	movs	r2, #0
 802184a:	605a      	str	r2, [r3, #4]
#if LWIP_IPV4 && LWIP_IPV6
  }
#endif
  pcb->remote_port = 0;
 802184c:	687b      	ldr	r3, [r7, #4]
 802184e:	2200      	movs	r2, #0
 8021850:	829a      	strh	r2, [r3, #20]
  pcb->netif_idx = NETIF_NO_INDEX;
 8021852:	687b      	ldr	r3, [r7, #4]
 8021854:	2200      	movs	r2, #0
 8021856:	721a      	strb	r2, [r3, #8]
  /* mark PCB as unconnected */
  udp_clear_flags(pcb, UDP_FLAGS_CONNECTED);
 8021858:	687b      	ldr	r3, [r7, #4]
 802185a:	7c1b      	ldrb	r3, [r3, #16]
 802185c:	f023 0304 	bic.w	r3, r3, #4
 8021860:	b2da      	uxtb	r2, r3
 8021862:	687b      	ldr	r3, [r7, #4]
 8021864:	741a      	strb	r2, [r3, #16]
}
 8021866:	3708      	adds	r7, #8
 8021868:	46bd      	mov	sp, r7
 802186a:	bd80      	pop	{r7, pc}
 802186c:	0802fb38 	.word	0x0802fb38
 8021870:	0802fe50 	.word	0x0802fe50
 8021874:	0802fb8c 	.word	0x0802fb8c

08021878 <udp_recv>:
 * @param recv function pointer of the callback function
 * @param recv_arg additional argument to pass to the callback function
 */
void
udp_recv(struct udp_pcb *pcb, udp_recv_fn recv, void *recv_arg)
{
 8021878:	b580      	push	{r7, lr}
 802187a:	b084      	sub	sp, #16
 802187c:	af00      	add	r7, sp, #0
 802187e:	60f8      	str	r0, [r7, #12]
 8021880:	60b9      	str	r1, [r7, #8]
 8021882:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 8021884:	f7ee fe5e 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("udp_recv: invalid pcb", pcb != NULL, return);
 8021888:	68fb      	ldr	r3, [r7, #12]
 802188a:	2b00      	cmp	r3, #0
 802188c:	d107      	bne.n	802189e <udp_recv+0x26>
 802188e:	4b08      	ldr	r3, [pc, #32]	@ (80218b0 <udp_recv+0x38>)
 8021890:	f240 428a 	movw	r2, #1162	@ 0x48a
 8021894:	4907      	ldr	r1, [pc, #28]	@ (80218b4 <udp_recv+0x3c>)
 8021896:	4808      	ldr	r0, [pc, #32]	@ (80218b8 <udp_recv+0x40>)
 8021898:	f008 f8a0 	bl	80299dc <iprintf>
 802189c:	e005      	b.n	80218aa <udp_recv+0x32>

  /* remember recv() callback and user data */
  pcb->recv = recv;
 802189e:	68fb      	ldr	r3, [r7, #12]
 80218a0:	68ba      	ldr	r2, [r7, #8]
 80218a2:	619a      	str	r2, [r3, #24]
  pcb->recv_arg = recv_arg;
 80218a4:	68fb      	ldr	r3, [r7, #12]
 80218a6:	687a      	ldr	r2, [r7, #4]
 80218a8:	61da      	str	r2, [r3, #28]
}
 80218aa:	3710      	adds	r7, #16
 80218ac:	46bd      	mov	sp, r7
 80218ae:	bd80      	pop	{r7, pc}
 80218b0:	0802fb38 	.word	0x0802fb38
 80218b4:	0802fe6c 	.word	0x0802fe6c
 80218b8:	0802fb8c 	.word	0x0802fb8c

080218bc <udp_remove>:
 *
 * @see udp_new()
 */
void
udp_remove(struct udp_pcb *pcb)
{
 80218bc:	b580      	push	{r7, lr}
 80218be:	b084      	sub	sp, #16
 80218c0:	af00      	add	r7, sp, #0
 80218c2:	6078      	str	r0, [r7, #4]
  struct udp_pcb *pcb2;

  LWIP_ASSERT_CORE_LOCKED();
 80218c4:	f7ee fe3e 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("udp_remove: invalid pcb", pcb != NULL, return);
 80218c8:	687b      	ldr	r3, [r7, #4]
 80218ca:	2b00      	cmp	r3, #0
 80218cc:	d107      	bne.n	80218de <udp_remove+0x22>
 80218ce:	4b19      	ldr	r3, [pc, #100]	@ (8021934 <udp_remove+0x78>)
 80218d0:	f240 42a1 	movw	r2, #1185	@ 0x4a1
 80218d4:	4918      	ldr	r1, [pc, #96]	@ (8021938 <udp_remove+0x7c>)
 80218d6:	4819      	ldr	r0, [pc, #100]	@ (802193c <udp_remove+0x80>)
 80218d8:	f008 f880 	bl	80299dc <iprintf>
 80218dc:	e026      	b.n	802192c <udp_remove+0x70>

  mib2_udp_unbind(pcb);
  /* pcb to be removed is first in list? */
  if (udp_pcbs == pcb) {
 80218de:	4b18      	ldr	r3, [pc, #96]	@ (8021940 <udp_remove+0x84>)
 80218e0:	681b      	ldr	r3, [r3, #0]
 80218e2:	687a      	ldr	r2, [r7, #4]
 80218e4:	429a      	cmp	r2, r3
 80218e6:	d105      	bne.n	80218f4 <udp_remove+0x38>
    /* make list start at 2nd pcb */
    udp_pcbs = udp_pcbs->next;
 80218e8:	4b15      	ldr	r3, [pc, #84]	@ (8021940 <udp_remove+0x84>)
 80218ea:	681b      	ldr	r3, [r3, #0]
 80218ec:	68db      	ldr	r3, [r3, #12]
 80218ee:	4a14      	ldr	r2, [pc, #80]	@ (8021940 <udp_remove+0x84>)
 80218f0:	6013      	str	r3, [r2, #0]
 80218f2:	e017      	b.n	8021924 <udp_remove+0x68>
    /* pcb not 1st in list */
  } else {
    for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
 80218f4:	4b12      	ldr	r3, [pc, #72]	@ (8021940 <udp_remove+0x84>)
 80218f6:	681b      	ldr	r3, [r3, #0]
 80218f8:	60fb      	str	r3, [r7, #12]
 80218fa:	e010      	b.n	802191e <udp_remove+0x62>
      /* find pcb in udp_pcbs list */
      if (pcb2->next != NULL && pcb2->next == pcb) {
 80218fc:	68fb      	ldr	r3, [r7, #12]
 80218fe:	68db      	ldr	r3, [r3, #12]
 8021900:	2b00      	cmp	r3, #0
 8021902:	d009      	beq.n	8021918 <udp_remove+0x5c>
 8021904:	68fb      	ldr	r3, [r7, #12]
 8021906:	68db      	ldr	r3, [r3, #12]
 8021908:	687a      	ldr	r2, [r7, #4]
 802190a:	429a      	cmp	r2, r3
 802190c:	d104      	bne.n	8021918 <udp_remove+0x5c>
        /* remove pcb from list */
        pcb2->next = pcb->next;
 802190e:	687b      	ldr	r3, [r7, #4]
 8021910:	68da      	ldr	r2, [r3, #12]
 8021912:	68fb      	ldr	r3, [r7, #12]
 8021914:	60da      	str	r2, [r3, #12]
        break;
 8021916:	e005      	b.n	8021924 <udp_remove+0x68>
    for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
 8021918:	68fb      	ldr	r3, [r7, #12]
 802191a:	68db      	ldr	r3, [r3, #12]
 802191c:	60fb      	str	r3, [r7, #12]
 802191e:	68fb      	ldr	r3, [r7, #12]
 8021920:	2b00      	cmp	r3, #0
 8021922:	d1eb      	bne.n	80218fc <udp_remove+0x40>
      }
    }
  }
  memp_free(MEMP_UDP_PCB, pcb);
 8021924:	6879      	ldr	r1, [r7, #4]
 8021926:	2000      	movs	r0, #0
 8021928:	f7f7 fef2 	bl	8019710 <memp_free>
}
 802192c:	3710      	adds	r7, #16
 802192e:	46bd      	mov	sp, r7
 8021930:	bd80      	pop	{r7, pc}
 8021932:	bf00      	nop
 8021934:	0802fb38 	.word	0x0802fb38
 8021938:	0802fe84 	.word	0x0802fe84
 802193c:	0802fb8c 	.word	0x0802fb8c
 8021940:	2402aee8 	.word	0x2402aee8

08021944 <udp_new>:
 *
 * @see udp_remove()
 */
struct udp_pcb *
udp_new(void)
{
 8021944:	b580      	push	{r7, lr}
 8021946:	b082      	sub	sp, #8
 8021948:	af00      	add	r7, sp, #0
  struct udp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 802194a:	f7ee fdfb 	bl	8010544 <sys_check_core_locking>

  pcb = (struct udp_pcb *)memp_malloc(MEMP_UDP_PCB);
 802194e:	2000      	movs	r0, #0
 8021950:	f7f7 fe68 	bl	8019624 <memp_malloc>
 8021954:	6078      	str	r0, [r7, #4]
  /* could allocate UDP PCB? */
  if (pcb != NULL) {
 8021956:	687b      	ldr	r3, [r7, #4]
 8021958:	2b00      	cmp	r3, #0
 802195a:	d007      	beq.n	802196c <udp_new+0x28>
    /* UDP Lite: by initializing to all zeroes, chksum_len is set to 0
     * which means checksum is generated over the whole datagram per default
     * (recommended as default by RFC 3828). */
    /* initialize PCB to all zeroes */
    memset(pcb, 0, sizeof(struct udp_pcb));
 802195c:	2220      	movs	r2, #32
 802195e:	2100      	movs	r1, #0
 8021960:	6878      	ldr	r0, [r7, #4]
 8021962:	f008 f9cd 	bl	8029d00 <memset>
    pcb->ttl = UDP_TTL;
 8021966:	687b      	ldr	r3, [r7, #4]
 8021968:	22ff      	movs	r2, #255	@ 0xff
 802196a:	72da      	strb	r2, [r3, #11]
#if LWIP_MULTICAST_TX_OPTIONS
    udp_set_multicast_ttl(pcb, UDP_TTL);
#endif /* LWIP_MULTICAST_TX_OPTIONS */
  }
  return pcb;
 802196c:	687b      	ldr	r3, [r7, #4]
}
 802196e:	4618      	mov	r0, r3
 8021970:	3708      	adds	r7, #8
 8021972:	46bd      	mov	sp, r7
 8021974:	bd80      	pop	{r7, pc}

08021976 <udp_new_ip_type>:
 *
 * @see udp_remove()
 */
struct udp_pcb *
udp_new_ip_type(u8_t type)
{
 8021976:	b580      	push	{r7, lr}
 8021978:	b084      	sub	sp, #16
 802197a:	af00      	add	r7, sp, #0
 802197c:	4603      	mov	r3, r0
 802197e:	71fb      	strb	r3, [r7, #7]
  struct udp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 8021980:	f7ee fde0 	bl	8010544 <sys_check_core_locking>

  pcb = udp_new();
 8021984:	f7ff ffde 	bl	8021944 <udp_new>
 8021988:	60f8      	str	r0, [r7, #12]
    IP_SET_TYPE_VAL(pcb->remote_ip, type);
  }
#else
  LWIP_UNUSED_ARG(type);
#endif /* LWIP_IPV4 && LWIP_IPV6 */
  return pcb;
 802198a:	68fb      	ldr	r3, [r7, #12]
}
 802198c:	4618      	mov	r0, r3
 802198e:	3710      	adds	r7, #16
 8021990:	46bd      	mov	sp, r7
 8021992:	bd80      	pop	{r7, pc}

08021994 <udp_netif_ip_addr_changed>:
 *
 * @param old_addr IP address of the netif before change
 * @param new_addr IP address of the netif after change
 */
void udp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 8021994:	b480      	push	{r7}
 8021996:	b085      	sub	sp, #20
 8021998:	af00      	add	r7, sp, #0
 802199a:	6078      	str	r0, [r7, #4]
 802199c:	6039      	str	r1, [r7, #0]
  struct udp_pcb *upcb;

  if (!ip_addr_isany(old_addr) && !ip_addr_isany(new_addr)) {
 802199e:	687b      	ldr	r3, [r7, #4]
 80219a0:	2b00      	cmp	r3, #0
 80219a2:	d01e      	beq.n	80219e2 <udp_netif_ip_addr_changed+0x4e>
 80219a4:	687b      	ldr	r3, [r7, #4]
 80219a6:	681b      	ldr	r3, [r3, #0]
 80219a8:	2b00      	cmp	r3, #0
 80219aa:	d01a      	beq.n	80219e2 <udp_netif_ip_addr_changed+0x4e>
 80219ac:	683b      	ldr	r3, [r7, #0]
 80219ae:	2b00      	cmp	r3, #0
 80219b0:	d017      	beq.n	80219e2 <udp_netif_ip_addr_changed+0x4e>
 80219b2:	683b      	ldr	r3, [r7, #0]
 80219b4:	681b      	ldr	r3, [r3, #0]
 80219b6:	2b00      	cmp	r3, #0
 80219b8:	d013      	beq.n	80219e2 <udp_netif_ip_addr_changed+0x4e>
    for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) {
 80219ba:	4b0d      	ldr	r3, [pc, #52]	@ (80219f0 <udp_netif_ip_addr_changed+0x5c>)
 80219bc:	681b      	ldr	r3, [r3, #0]
 80219be:	60fb      	str	r3, [r7, #12]
 80219c0:	e00c      	b.n	80219dc <udp_netif_ip_addr_changed+0x48>
      /* PCB bound to current local interface address? */
      if (ip_addr_cmp(&upcb->local_ip, old_addr)) {
 80219c2:	68fb      	ldr	r3, [r7, #12]
 80219c4:	681a      	ldr	r2, [r3, #0]
 80219c6:	687b      	ldr	r3, [r7, #4]
 80219c8:	681b      	ldr	r3, [r3, #0]
 80219ca:	429a      	cmp	r2, r3
 80219cc:	d103      	bne.n	80219d6 <udp_netif_ip_addr_changed+0x42>
        /* The PCB is bound to the old ipaddr and
         * is set to bound to the new one instead */
        ip_addr_copy(upcb->local_ip, *new_addr);
 80219ce:	683b      	ldr	r3, [r7, #0]
 80219d0:	681a      	ldr	r2, [r3, #0]
 80219d2:	68fb      	ldr	r3, [r7, #12]
 80219d4:	601a      	str	r2, [r3, #0]
    for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) {
 80219d6:	68fb      	ldr	r3, [r7, #12]
 80219d8:	68db      	ldr	r3, [r3, #12]
 80219da:	60fb      	str	r3, [r7, #12]
 80219dc:	68fb      	ldr	r3, [r7, #12]
 80219de:	2b00      	cmp	r3, #0
 80219e0:	d1ef      	bne.n	80219c2 <udp_netif_ip_addr_changed+0x2e>
      }
    }
  }
}
 80219e2:	bf00      	nop
 80219e4:	3714      	adds	r7, #20
 80219e6:	46bd      	mov	sp, r7
 80219e8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80219ec:	4770      	bx	lr
 80219ee:	bf00      	nop
 80219f0:	2402aee8 	.word	0x2402aee8

080219f4 <dhcp_inc_pcb_refcount>:
static void dhcp_option_trailer(u16_t options_out_len, u8_t *options, struct pbuf *p_out);

/** Ensure DHCP PCB is allocated and bound */
static err_t
dhcp_inc_pcb_refcount(void)
{
 80219f4:	b580      	push	{r7, lr}
 80219f6:	af00      	add	r7, sp, #0
  if (dhcp_pcb_refcount == 0) {
 80219f8:	4b20      	ldr	r3, [pc, #128]	@ (8021a7c <dhcp_inc_pcb_refcount+0x88>)
 80219fa:	781b      	ldrb	r3, [r3, #0]
 80219fc:	2b00      	cmp	r3, #0
 80219fe:	d133      	bne.n	8021a68 <dhcp_inc_pcb_refcount+0x74>
    LWIP_ASSERT("dhcp_inc_pcb_refcount(): memory leak", dhcp_pcb == NULL);
 8021a00:	4b1f      	ldr	r3, [pc, #124]	@ (8021a80 <dhcp_inc_pcb_refcount+0x8c>)
 8021a02:	681b      	ldr	r3, [r3, #0]
 8021a04:	2b00      	cmp	r3, #0
 8021a06:	d005      	beq.n	8021a14 <dhcp_inc_pcb_refcount+0x20>
 8021a08:	4b1e      	ldr	r3, [pc, #120]	@ (8021a84 <dhcp_inc_pcb_refcount+0x90>)
 8021a0a:	22e5      	movs	r2, #229	@ 0xe5
 8021a0c:	491e      	ldr	r1, [pc, #120]	@ (8021a88 <dhcp_inc_pcb_refcount+0x94>)
 8021a0e:	481f      	ldr	r0, [pc, #124]	@ (8021a8c <dhcp_inc_pcb_refcount+0x98>)
 8021a10:	f007 ffe4 	bl	80299dc <iprintf>

    /* allocate UDP PCB */
    dhcp_pcb = udp_new();
 8021a14:	f7ff ff96 	bl	8021944 <udp_new>
 8021a18:	4603      	mov	r3, r0
 8021a1a:	4a19      	ldr	r2, [pc, #100]	@ (8021a80 <dhcp_inc_pcb_refcount+0x8c>)
 8021a1c:	6013      	str	r3, [r2, #0]

    if (dhcp_pcb == NULL) {
 8021a1e:	4b18      	ldr	r3, [pc, #96]	@ (8021a80 <dhcp_inc_pcb_refcount+0x8c>)
 8021a20:	681b      	ldr	r3, [r3, #0]
 8021a22:	2b00      	cmp	r3, #0
 8021a24:	d102      	bne.n	8021a2c <dhcp_inc_pcb_refcount+0x38>
      return ERR_MEM;
 8021a26:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021a2a:	e024      	b.n	8021a76 <dhcp_inc_pcb_refcount+0x82>
    }

    ip_set_option(dhcp_pcb, SOF_BROADCAST);
 8021a2c:	4b14      	ldr	r3, [pc, #80]	@ (8021a80 <dhcp_inc_pcb_refcount+0x8c>)
 8021a2e:	681b      	ldr	r3, [r3, #0]
 8021a30:	7a5a      	ldrb	r2, [r3, #9]
 8021a32:	4b13      	ldr	r3, [pc, #76]	@ (8021a80 <dhcp_inc_pcb_refcount+0x8c>)
 8021a34:	681b      	ldr	r3, [r3, #0]
 8021a36:	f042 0220 	orr.w	r2, r2, #32
 8021a3a:	b2d2      	uxtb	r2, r2
 8021a3c:	725a      	strb	r2, [r3, #9]

    /* set up local and remote port for the pcb -> listen on all interfaces on all src/dest IPs */
    udp_bind(dhcp_pcb, IP4_ADDR_ANY, LWIP_IANA_PORT_DHCP_CLIENT);
 8021a3e:	4b10      	ldr	r3, [pc, #64]	@ (8021a80 <dhcp_inc_pcb_refcount+0x8c>)
 8021a40:	681b      	ldr	r3, [r3, #0]
 8021a42:	2244      	movs	r2, #68	@ 0x44
 8021a44:	4912      	ldr	r1, [pc, #72]	@ (8021a90 <dhcp_inc_pcb_refcount+0x9c>)
 8021a46:	4618      	mov	r0, r3
 8021a48:	f7ff fdf2 	bl	8021630 <udp_bind>
    udp_connect(dhcp_pcb, IP4_ADDR_ANY, LWIP_IANA_PORT_DHCP_SERVER);
 8021a4c:	4b0c      	ldr	r3, [pc, #48]	@ (8021a80 <dhcp_inc_pcb_refcount+0x8c>)
 8021a4e:	681b      	ldr	r3, [r3, #0]
 8021a50:	2243      	movs	r2, #67	@ 0x43
 8021a52:	490f      	ldr	r1, [pc, #60]	@ (8021a90 <dhcp_inc_pcb_refcount+0x9c>)
 8021a54:	4618      	mov	r0, r3
 8021a56:	f7ff fe75 	bl	8021744 <udp_connect>
    udp_recv(dhcp_pcb, dhcp_recv, NULL);
 8021a5a:	4b09      	ldr	r3, [pc, #36]	@ (8021a80 <dhcp_inc_pcb_refcount+0x8c>)
 8021a5c:	681b      	ldr	r3, [r3, #0]
 8021a5e:	2200      	movs	r2, #0
 8021a60:	490c      	ldr	r1, [pc, #48]	@ (8021a94 <dhcp_inc_pcb_refcount+0xa0>)
 8021a62:	4618      	mov	r0, r3
 8021a64:	f7ff ff08 	bl	8021878 <udp_recv>
  }

  dhcp_pcb_refcount++;
 8021a68:	4b04      	ldr	r3, [pc, #16]	@ (8021a7c <dhcp_inc_pcb_refcount+0x88>)
 8021a6a:	781b      	ldrb	r3, [r3, #0]
 8021a6c:	3301      	adds	r3, #1
 8021a6e:	b2da      	uxtb	r2, r3
 8021a70:	4b02      	ldr	r3, [pc, #8]	@ (8021a7c <dhcp_inc_pcb_refcount+0x88>)
 8021a72:	701a      	strb	r2, [r3, #0]

  return ERR_OK;
 8021a74:	2300      	movs	r3, #0
}
 8021a76:	4618      	mov	r0, r3
 8021a78:	bd80      	pop	{r7, pc}
 8021a7a:	bf00      	nop
 8021a7c:	2402af18 	.word	0x2402af18
 8021a80:	2402af14 	.word	0x2402af14
 8021a84:	0802fe9c 	.word	0x0802fe9c
 8021a88:	0802fed4 	.word	0x0802fed4
 8021a8c:	0802fefc 	.word	0x0802fefc
 8021a90:	08030c68 	.word	0x08030c68
 8021a94:	08023365 	.word	0x08023365

08021a98 <dhcp_dec_pcb_refcount>:

/** Free DHCP PCB if the last netif stops using it */
static void
dhcp_dec_pcb_refcount(void)
{
 8021a98:	b580      	push	{r7, lr}
 8021a9a:	af00      	add	r7, sp, #0
  LWIP_ASSERT("dhcp_pcb_refcount(): refcount error", (dhcp_pcb_refcount > 0));
 8021a9c:	4b0e      	ldr	r3, [pc, #56]	@ (8021ad8 <dhcp_dec_pcb_refcount+0x40>)
 8021a9e:	781b      	ldrb	r3, [r3, #0]
 8021aa0:	2b00      	cmp	r3, #0
 8021aa2:	d105      	bne.n	8021ab0 <dhcp_dec_pcb_refcount+0x18>
 8021aa4:	4b0d      	ldr	r3, [pc, #52]	@ (8021adc <dhcp_dec_pcb_refcount+0x44>)
 8021aa6:	22ff      	movs	r2, #255	@ 0xff
 8021aa8:	490d      	ldr	r1, [pc, #52]	@ (8021ae0 <dhcp_dec_pcb_refcount+0x48>)
 8021aaa:	480e      	ldr	r0, [pc, #56]	@ (8021ae4 <dhcp_dec_pcb_refcount+0x4c>)
 8021aac:	f007 ff96 	bl	80299dc <iprintf>
  dhcp_pcb_refcount--;
 8021ab0:	4b09      	ldr	r3, [pc, #36]	@ (8021ad8 <dhcp_dec_pcb_refcount+0x40>)
 8021ab2:	781b      	ldrb	r3, [r3, #0]
 8021ab4:	3b01      	subs	r3, #1
 8021ab6:	b2da      	uxtb	r2, r3
 8021ab8:	4b07      	ldr	r3, [pc, #28]	@ (8021ad8 <dhcp_dec_pcb_refcount+0x40>)
 8021aba:	701a      	strb	r2, [r3, #0]

  if (dhcp_pcb_refcount == 0) {
 8021abc:	4b06      	ldr	r3, [pc, #24]	@ (8021ad8 <dhcp_dec_pcb_refcount+0x40>)
 8021abe:	781b      	ldrb	r3, [r3, #0]
 8021ac0:	2b00      	cmp	r3, #0
 8021ac2:	d107      	bne.n	8021ad4 <dhcp_dec_pcb_refcount+0x3c>
    udp_remove(dhcp_pcb);
 8021ac4:	4b08      	ldr	r3, [pc, #32]	@ (8021ae8 <dhcp_dec_pcb_refcount+0x50>)
 8021ac6:	681b      	ldr	r3, [r3, #0]
 8021ac8:	4618      	mov	r0, r3
 8021aca:	f7ff fef7 	bl	80218bc <udp_remove>
    dhcp_pcb = NULL;
 8021ace:	4b06      	ldr	r3, [pc, #24]	@ (8021ae8 <dhcp_dec_pcb_refcount+0x50>)
 8021ad0:	2200      	movs	r2, #0
 8021ad2:	601a      	str	r2, [r3, #0]
  }
}
 8021ad4:	bf00      	nop
 8021ad6:	bd80      	pop	{r7, pc}
 8021ad8:	2402af18 	.word	0x2402af18
 8021adc:	0802fe9c 	.word	0x0802fe9c
 8021ae0:	0802ff24 	.word	0x0802ff24
 8021ae4:	0802fefc 	.word	0x0802fefc
 8021ae8:	2402af14 	.word	0x2402af14

08021aec <dhcp_handle_nak>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_nak(struct netif *netif)
{
 8021aec:	b580      	push	{r7, lr}
 8021aee:	b084      	sub	sp, #16
 8021af0:	af00      	add	r7, sp, #0
 8021af2:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021af4:	687b      	ldr	r3, [r7, #4]
 8021af6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021af8:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_nak(netif=%p) %c%c%"U16_F"\n",
              (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  /* Change to a defined state - set this before assigning the address
     to ensure the callback can use dhcp_supplied_address() */
  dhcp_set_state(dhcp, DHCP_STATE_BACKING_OFF);
 8021afa:	210c      	movs	r1, #12
 8021afc:	68f8      	ldr	r0, [r7, #12]
 8021afe:	f001 f862 	bl	8022bc6 <dhcp_set_state>
  /* remove IP address from interface (must no longer be used, as per RFC2131) */
  netif_set_addr(netif, IP4_ADDR_ANY4, IP4_ADDR_ANY4, IP4_ADDR_ANY4);
 8021b02:	4b06      	ldr	r3, [pc, #24]	@ (8021b1c <dhcp_handle_nak+0x30>)
 8021b04:	4a05      	ldr	r2, [pc, #20]	@ (8021b1c <dhcp_handle_nak+0x30>)
 8021b06:	4905      	ldr	r1, [pc, #20]	@ (8021b1c <dhcp_handle_nak+0x30>)
 8021b08:	6878      	ldr	r0, [r7, #4]
 8021b0a:	f7f7 ffa5 	bl	8019a58 <netif_set_addr>
  /* We can immediately restart discovery */
  dhcp_discover(netif);
 8021b0e:	6878      	ldr	r0, [r7, #4]
 8021b10:	f000 fc4c 	bl	80223ac <dhcp_discover>
}
 8021b14:	bf00      	nop
 8021b16:	3710      	adds	r7, #16
 8021b18:	46bd      	mov	sp, r7
 8021b1a:	bd80      	pop	{r7, pc}
 8021b1c:	08030c68 	.word	0x08030c68

08021b20 <dhcp_check>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_check(struct netif *netif)
{
 8021b20:	b580      	push	{r7, lr}
 8021b22:	b084      	sub	sp, #16
 8021b24:	af00      	add	r7, sp, #0
 8021b26:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021b28:	687b      	ldr	r3, [r7, #4]
 8021b2a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021b2c:	60fb      	str	r3, [r7, #12]
  err_t result;
  u16_t msecs;
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_check(netif=%p) %c%c\n", (void *)netif, (s16_t)netif->name[0],
              (s16_t)netif->name[1]));
  dhcp_set_state(dhcp, DHCP_STATE_CHECKING);
 8021b2e:	2108      	movs	r1, #8
 8021b30:	68f8      	ldr	r0, [r7, #12]
 8021b32:	f001 f848 	bl	8022bc6 <dhcp_set_state>
  /* create an ARP query for the offered IP address, expecting that no host
     responds, as the IP address should not be in use. */
  result = etharp_query(netif, &dhcp->offered_ip_addr, NULL);
 8021b36:	68fb      	ldr	r3, [r7, #12]
 8021b38:	331c      	adds	r3, #28
 8021b3a:	2200      	movs	r2, #0
 8021b3c:	4619      	mov	r1, r3
 8021b3e:	6878      	ldr	r0, [r7, #4]
 8021b40:	f002 fb88 	bl	8024254 <etharp_query>
 8021b44:	4603      	mov	r3, r0
 8021b46:	72fb      	strb	r3, [r7, #11]
  if (result != ERR_OK) {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_check: could not perform ARP query\n"));
  }
  if (dhcp->tries < 255) {
 8021b48:	68fb      	ldr	r3, [r7, #12]
 8021b4a:	799b      	ldrb	r3, [r3, #6]
 8021b4c:	2bff      	cmp	r3, #255	@ 0xff
 8021b4e:	d005      	beq.n	8021b5c <dhcp_check+0x3c>
    dhcp->tries++;
 8021b50:	68fb      	ldr	r3, [r7, #12]
 8021b52:	799b      	ldrb	r3, [r3, #6]
 8021b54:	3301      	adds	r3, #1
 8021b56:	b2da      	uxtb	r2, r3
 8021b58:	68fb      	ldr	r3, [r7, #12]
 8021b5a:	719a      	strb	r2, [r3, #6]
  }
  msecs = 500;
 8021b5c:	f44f 73fa 	mov.w	r3, #500	@ 0x1f4
 8021b60:	813b      	strh	r3, [r7, #8]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8021b62:	893b      	ldrh	r3, [r7, #8]
 8021b64:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8021b68:	4a06      	ldr	r2, [pc, #24]	@ (8021b84 <dhcp_check+0x64>)
 8021b6a:	fb82 1203 	smull	r1, r2, r2, r3
 8021b6e:	1152      	asrs	r2, r2, #5
 8021b70:	17db      	asrs	r3, r3, #31
 8021b72:	1ad3      	subs	r3, r2, r3
 8021b74:	b29a      	uxth	r2, r3
 8021b76:	68fb      	ldr	r3, [r7, #12]
 8021b78:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_check(): set request timeout %"U16_F" msecs\n", msecs));
}
 8021b7a:	bf00      	nop
 8021b7c:	3710      	adds	r7, #16
 8021b7e:	46bd      	mov	sp, r7
 8021b80:	bd80      	pop	{r7, pc}
 8021b82:	bf00      	nop
 8021b84:	10624dd3 	.word	0x10624dd3

08021b88 <dhcp_handle_offer>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_offer(struct netif *netif, struct dhcp_msg *msg_in)
{
 8021b88:	b580      	push	{r7, lr}
 8021b8a:	b084      	sub	sp, #16
 8021b8c:	af00      	add	r7, sp, #0
 8021b8e:	6078      	str	r0, [r7, #4]
 8021b90:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021b92:	687b      	ldr	r3, [r7, #4]
 8021b94:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021b96:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_offer(netif=%p) %c%c%"U16_F"\n",
              (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  /* obtain the server address */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SERVER_ID)) {
 8021b98:	4b0c      	ldr	r3, [pc, #48]	@ (8021bcc <dhcp_handle_offer+0x44>)
 8021b9a:	789b      	ldrb	r3, [r3, #2]
 8021b9c:	2b00      	cmp	r3, #0
 8021b9e:	d011      	beq.n	8021bc4 <dhcp_handle_offer+0x3c>
    dhcp->request_timeout = 0; /* stop timer */
 8021ba0:	68fb      	ldr	r3, [r7, #12]
 8021ba2:	2200      	movs	r2, #0
 8021ba4:	811a      	strh	r2, [r3, #8]

    ip_addr_set_ip4_u32(&dhcp->server_ip_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SERVER_ID)));
 8021ba6:	4b0a      	ldr	r3, [pc, #40]	@ (8021bd0 <dhcp_handle_offer+0x48>)
 8021ba8:	689b      	ldr	r3, [r3, #8]
 8021baa:	4618      	mov	r0, r3
 8021bac:	f7f6 ffd1 	bl	8018b52 <lwip_htonl>
 8021bb0:	4602      	mov	r2, r0
 8021bb2:	68fb      	ldr	r3, [r7, #12]
 8021bb4:	619a      	str	r2, [r3, #24]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): server 0x%08"X32_F"\n",
                ip4_addr_get_u32(ip_2_ip4(&dhcp->server_ip_addr))));
    /* remember offered address */
    ip4_addr_copy(dhcp->offered_ip_addr, msg_in->yiaddr);
 8021bb6:	683b      	ldr	r3, [r7, #0]
 8021bb8:	691a      	ldr	r2, [r3, #16]
 8021bba:	68fb      	ldr	r3, [r7, #12]
 8021bbc:	61da      	str	r2, [r3, #28]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): offer for 0x%08"X32_F"\n",
                ip4_addr_get_u32(&dhcp->offered_ip_addr)));

    dhcp_select(netif);
 8021bbe:	6878      	ldr	r0, [r7, #4]
 8021bc0:	f000 f808 	bl	8021bd4 <dhcp_select>
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_handle_offer(netif=%p) did not get server ID!\n", (void *)netif));
  }
}
 8021bc4:	bf00      	nop
 8021bc6:	3710      	adds	r7, #16
 8021bc8:	46bd      	mov	sp, r7
 8021bca:	bd80      	pop	{r7, pc}
 8021bcc:	2402af0c 	.word	0x2402af0c
 8021bd0:	2402aeec 	.word	0x2402aeec

08021bd4 <dhcp_select>:
 * @param netif the netif under DHCP control
 * @return lwIP specific error (see error.h)
 */
static err_t
dhcp_select(struct netif *netif)
{
 8021bd4:	b5b0      	push	{r4, r5, r7, lr}
 8021bd6:	b08a      	sub	sp, #40	@ 0x28
 8021bd8:	af02      	add	r7, sp, #8
 8021bda:	6078      	str	r0, [r7, #4]
  u16_t msecs;
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_ERROR("dhcp_select: netif != NULL", (netif != NULL), return ERR_ARG;);
 8021bdc:	687b      	ldr	r3, [r7, #4]
 8021bde:	2b00      	cmp	r3, #0
 8021be0:	d109      	bne.n	8021bf6 <dhcp_select+0x22>
 8021be2:	4b71      	ldr	r3, [pc, #452]	@ (8021da8 <dhcp_select+0x1d4>)
 8021be4:	f240 1277 	movw	r2, #375	@ 0x177
 8021be8:	4970      	ldr	r1, [pc, #448]	@ (8021dac <dhcp_select+0x1d8>)
 8021bea:	4871      	ldr	r0, [pc, #452]	@ (8021db0 <dhcp_select+0x1dc>)
 8021bec:	f007 fef6 	bl	80299dc <iprintf>
 8021bf0:	f06f 030f 	mvn.w	r3, #15
 8021bf4:	e0d3      	b.n	8021d9e <dhcp_select+0x1ca>
  dhcp = netif_dhcp_data(netif);
 8021bf6:	687b      	ldr	r3, [r7, #4]
 8021bf8:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021bfa:	61bb      	str	r3, [r7, #24]
  LWIP_ERROR("dhcp_select: dhcp != NULL", (dhcp != NULL), return ERR_VAL;);
 8021bfc:	69bb      	ldr	r3, [r7, #24]
 8021bfe:	2b00      	cmp	r3, #0
 8021c00:	d109      	bne.n	8021c16 <dhcp_select+0x42>
 8021c02:	4b69      	ldr	r3, [pc, #420]	@ (8021da8 <dhcp_select+0x1d4>)
 8021c04:	f240 1279 	movw	r2, #377	@ 0x179
 8021c08:	496a      	ldr	r1, [pc, #424]	@ (8021db4 <dhcp_select+0x1e0>)
 8021c0a:	4869      	ldr	r0, [pc, #420]	@ (8021db0 <dhcp_select+0x1dc>)
 8021c0c:	f007 fee6 	bl	80299dc <iprintf>
 8021c10:	f06f 0305 	mvn.w	r3, #5
 8021c14:	e0c3      	b.n	8021d9e <dhcp_select+0x1ca>

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_select(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  dhcp_set_state(dhcp, DHCP_STATE_REQUESTING);
 8021c16:	2101      	movs	r1, #1
 8021c18:	69b8      	ldr	r0, [r7, #24]
 8021c1a:	f000 ffd4 	bl	8022bc6 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 8021c1e:	f107 030c 	add.w	r3, r7, #12
 8021c22:	2203      	movs	r2, #3
 8021c24:	69b9      	ldr	r1, [r7, #24]
 8021c26:	6878      	ldr	r0, [r7, #4]
 8021c28:	f001 fc66 	bl	80234f8 <dhcp_create_msg>
 8021c2c:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8021c2e:	697b      	ldr	r3, [r7, #20]
 8021c30:	2b00      	cmp	r3, #0
 8021c32:	f000 8085 	beq.w	8021d40 <dhcp_select+0x16c>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8021c36:	697b      	ldr	r3, [r7, #20]
 8021c38:	685b      	ldr	r3, [r3, #4]
 8021c3a:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 8021c3c:	89b8      	ldrh	r0, [r7, #12]
 8021c3e:	693b      	ldr	r3, [r7, #16]
 8021c40:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8021c44:	2302      	movs	r3, #2
 8021c46:	2239      	movs	r2, #57	@ 0x39
 8021c48:	f000 ffd8 	bl	8022bfc <dhcp_option>
 8021c4c:	4603      	mov	r3, r0
 8021c4e:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 8021c50:	89b8      	ldrh	r0, [r7, #12]
 8021c52:	693b      	ldr	r3, [r7, #16]
 8021c54:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8021c58:	687b      	ldr	r3, [r7, #4]
 8021c5a:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8021c5c:	461a      	mov	r2, r3
 8021c5e:	f001 f827 	bl	8022cb0 <dhcp_option_short>
 8021c62:	4603      	mov	r3, r0
 8021c64:	81bb      	strh	r3, [r7, #12]

    /* MUST request the offered IP address */
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 8021c66:	89b8      	ldrh	r0, [r7, #12]
 8021c68:	693b      	ldr	r3, [r7, #16]
 8021c6a:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8021c6e:	2304      	movs	r3, #4
 8021c70:	2232      	movs	r2, #50	@ 0x32
 8021c72:	f000 ffc3 	bl	8022bfc <dhcp_option>
 8021c76:	4603      	mov	r3, r0
 8021c78:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 8021c7a:	89bc      	ldrh	r4, [r7, #12]
 8021c7c:	693b      	ldr	r3, [r7, #16]
 8021c7e:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8021c82:	69bb      	ldr	r3, [r7, #24]
 8021c84:	69db      	ldr	r3, [r3, #28]
 8021c86:	4618      	mov	r0, r3
 8021c88:	f7f6 ff63 	bl	8018b52 <lwip_htonl>
 8021c8c:	4603      	mov	r3, r0
 8021c8e:	461a      	mov	r2, r3
 8021c90:	4629      	mov	r1, r5
 8021c92:	4620      	mov	r0, r4
 8021c94:	f001 f83e 	bl	8022d14 <dhcp_option_long>
 8021c98:	4603      	mov	r3, r0
 8021c9a:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_SERVER_ID, 4);
 8021c9c:	89b8      	ldrh	r0, [r7, #12]
 8021c9e:	693b      	ldr	r3, [r7, #16]
 8021ca0:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8021ca4:	2304      	movs	r3, #4
 8021ca6:	2236      	movs	r2, #54	@ 0x36
 8021ca8:	f000 ffa8 	bl	8022bfc <dhcp_option>
 8021cac:	4603      	mov	r3, r0
 8021cae:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(ip_2_ip4(&dhcp->server_ip_addr))));
 8021cb0:	89bc      	ldrh	r4, [r7, #12]
 8021cb2:	693b      	ldr	r3, [r7, #16]
 8021cb4:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8021cb8:	69bb      	ldr	r3, [r7, #24]
 8021cba:	699b      	ldr	r3, [r3, #24]
 8021cbc:	4618      	mov	r0, r3
 8021cbe:	f7f6 ff48 	bl	8018b52 <lwip_htonl>
 8021cc2:	4603      	mov	r3, r0
 8021cc4:	461a      	mov	r2, r3
 8021cc6:	4629      	mov	r1, r5
 8021cc8:	4620      	mov	r0, r4
 8021cca:	f001 f823 	bl	8022d14 <dhcp_option_long>
 8021cce:	4603      	mov	r3, r0
 8021cd0:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8021cd2:	89b8      	ldrh	r0, [r7, #12]
 8021cd4:	693b      	ldr	r3, [r7, #16]
 8021cd6:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8021cda:	2303      	movs	r3, #3
 8021cdc:	2237      	movs	r2, #55	@ 0x37
 8021cde:	f000 ff8d 	bl	8022bfc <dhcp_option>
 8021ce2:	4603      	mov	r3, r0
 8021ce4:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8021ce6:	2300      	movs	r3, #0
 8021ce8:	77fb      	strb	r3, [r7, #31]
 8021cea:	e00e      	b.n	8021d0a <dhcp_select+0x136>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 8021cec:	89b8      	ldrh	r0, [r7, #12]
 8021cee:	693b      	ldr	r3, [r7, #16]
 8021cf0:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8021cf4:	7ffb      	ldrb	r3, [r7, #31]
 8021cf6:	4a30      	ldr	r2, [pc, #192]	@ (8021db8 <dhcp_select+0x1e4>)
 8021cf8:	5cd3      	ldrb	r3, [r2, r3]
 8021cfa:	461a      	mov	r2, r3
 8021cfc:	f000 ffb2 	bl	8022c64 <dhcp_option_byte>
 8021d00:	4603      	mov	r3, r0
 8021d02:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8021d04:	7ffb      	ldrb	r3, [r7, #31]
 8021d06:	3301      	adds	r3, #1
 8021d08:	77fb      	strb	r3, [r7, #31]
 8021d0a:	7ffb      	ldrb	r3, [r7, #31]
 8021d0c:	2b02      	cmp	r3, #2
 8021d0e:	d9ed      	bls.n	8021cec <dhcp_select+0x118>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REQUESTING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8021d10:	89b8      	ldrh	r0, [r7, #12]
 8021d12:	693b      	ldr	r3, [r7, #16]
 8021d14:	33f0      	adds	r3, #240	@ 0xf0
 8021d16:	697a      	ldr	r2, [r7, #20]
 8021d18:	4619      	mov	r1, r3
 8021d1a:	f001 fcc3 	bl	80236a4 <dhcp_option_trailer>

    /* send broadcast to any DHCP server */
    result = udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 8021d1e:	4b27      	ldr	r3, [pc, #156]	@ (8021dbc <dhcp_select+0x1e8>)
 8021d20:	6818      	ldr	r0, [r3, #0]
 8021d22:	4b27      	ldr	r3, [pc, #156]	@ (8021dc0 <dhcp_select+0x1ec>)
 8021d24:	9301      	str	r3, [sp, #4]
 8021d26:	687b      	ldr	r3, [r7, #4]
 8021d28:	9300      	str	r3, [sp, #0]
 8021d2a:	2343      	movs	r3, #67	@ 0x43
 8021d2c:	4a25      	ldr	r2, [pc, #148]	@ (8021dc4 <dhcp_select+0x1f0>)
 8021d2e:	6979      	ldr	r1, [r7, #20]
 8021d30:	f7ff fb96 	bl	8021460 <udp_sendto_if_src>
 8021d34:	4603      	mov	r3, r0
 8021d36:	77bb      	strb	r3, [r7, #30]
    pbuf_free(p_out);
 8021d38:	6978      	ldr	r0, [r7, #20]
 8021d3a:	f7f8 fbd7 	bl	801a4ec <pbuf_free>
 8021d3e:	e001      	b.n	8021d44 <dhcp_select+0x170>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_select: REQUESTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_select: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8021d40:	23ff      	movs	r3, #255	@ 0xff
 8021d42:	77bb      	strb	r3, [r7, #30]
  }
  if (dhcp->tries < 255) {
 8021d44:	69bb      	ldr	r3, [r7, #24]
 8021d46:	799b      	ldrb	r3, [r3, #6]
 8021d48:	2bff      	cmp	r3, #255	@ 0xff
 8021d4a:	d005      	beq.n	8021d58 <dhcp_select+0x184>
    dhcp->tries++;
 8021d4c:	69bb      	ldr	r3, [r7, #24]
 8021d4e:	799b      	ldrb	r3, [r3, #6]
 8021d50:	3301      	adds	r3, #1
 8021d52:	b2da      	uxtb	r2, r3
 8021d54:	69bb      	ldr	r3, [r7, #24]
 8021d56:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)((dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000);
 8021d58:	69bb      	ldr	r3, [r7, #24]
 8021d5a:	799b      	ldrb	r3, [r3, #6]
 8021d5c:	2b05      	cmp	r3, #5
 8021d5e:	d80d      	bhi.n	8021d7c <dhcp_select+0x1a8>
 8021d60:	69bb      	ldr	r3, [r7, #24]
 8021d62:	799b      	ldrb	r3, [r3, #6]
 8021d64:	461a      	mov	r2, r3
 8021d66:	2301      	movs	r3, #1
 8021d68:	4093      	lsls	r3, r2
 8021d6a:	b29b      	uxth	r3, r3
 8021d6c:	461a      	mov	r2, r3
 8021d6e:	0152      	lsls	r2, r2, #5
 8021d70:	1ad2      	subs	r2, r2, r3
 8021d72:	0092      	lsls	r2, r2, #2
 8021d74:	4413      	add	r3, r2
 8021d76:	00db      	lsls	r3, r3, #3
 8021d78:	b29b      	uxth	r3, r3
 8021d7a:	e001      	b.n	8021d80 <dhcp_select+0x1ac>
 8021d7c:	f64e 2360 	movw	r3, #60000	@ 0xea60
 8021d80:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8021d82:	89fb      	ldrh	r3, [r7, #14]
 8021d84:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8021d88:	4a0f      	ldr	r2, [pc, #60]	@ (8021dc8 <dhcp_select+0x1f4>)
 8021d8a:	fb82 1203 	smull	r1, r2, r2, r3
 8021d8e:	1152      	asrs	r2, r2, #5
 8021d90:	17db      	asrs	r3, r3, #31
 8021d92:	1ad3      	subs	r3, r2, r3
 8021d94:	b29a      	uxth	r2, r3
 8021d96:	69bb      	ldr	r3, [r7, #24]
 8021d98:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_select(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8021d9a:	f997 301e 	ldrsb.w	r3, [r7, #30]
}
 8021d9e:	4618      	mov	r0, r3
 8021da0:	3720      	adds	r7, #32
 8021da2:	46bd      	mov	sp, r7
 8021da4:	bdb0      	pop	{r4, r5, r7, pc}
 8021da6:	bf00      	nop
 8021da8:	0802fe9c 	.word	0x0802fe9c
 8021dac:	0802ff48 	.word	0x0802ff48
 8021db0:	0802fefc 	.word	0x0802fefc
 8021db4:	0802ff64 	.word	0x0802ff64
 8021db8:	24000058 	.word	0x24000058
 8021dbc:	2402af14 	.word	0x2402af14
 8021dc0:	08030c68 	.word	0x08030c68
 8021dc4:	08030c6c 	.word	0x08030c6c
 8021dc8:	10624dd3 	.word	0x10624dd3

08021dcc <dhcp_coarse_tmr>:
 * The DHCP timer that checks for lease renewal/rebind timeouts.
 * Must be called once a minute (see @ref DHCP_COARSE_TIMER_SECS).
 */
void
dhcp_coarse_tmr(void)
{
 8021dcc:	b580      	push	{r7, lr}
 8021dce:	b082      	sub	sp, #8
 8021dd0:	af00      	add	r7, sp, #0
  struct netif *netif;
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_coarse_tmr()\n"));
  /* iterate through all network interfaces */
  NETIF_FOREACH(netif) {
 8021dd2:	4b27      	ldr	r3, [pc, #156]	@ (8021e70 <dhcp_coarse_tmr+0xa4>)
 8021dd4:	681b      	ldr	r3, [r3, #0]
 8021dd6:	607b      	str	r3, [r7, #4]
 8021dd8:	e042      	b.n	8021e60 <dhcp_coarse_tmr+0x94>
    /* only act on DHCP configured interfaces */
    struct dhcp *dhcp = netif_dhcp_data(netif);
 8021dda:	687b      	ldr	r3, [r7, #4]
 8021ddc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021dde:	603b      	str	r3, [r7, #0]
    if ((dhcp != NULL) && (dhcp->state != DHCP_STATE_OFF)) {
 8021de0:	683b      	ldr	r3, [r7, #0]
 8021de2:	2b00      	cmp	r3, #0
 8021de4:	d039      	beq.n	8021e5a <dhcp_coarse_tmr+0x8e>
 8021de6:	683b      	ldr	r3, [r7, #0]
 8021de8:	795b      	ldrb	r3, [r3, #5]
 8021dea:	2b00      	cmp	r3, #0
 8021dec:	d035      	beq.n	8021e5a <dhcp_coarse_tmr+0x8e>
      /* compare lease time to expire timeout */
      if (dhcp->t0_timeout && (++dhcp->lease_used == dhcp->t0_timeout)) {
 8021dee:	683b      	ldr	r3, [r7, #0]
 8021df0:	8a9b      	ldrh	r3, [r3, #20]
 8021df2:	2b00      	cmp	r3, #0
 8021df4:	d012      	beq.n	8021e1c <dhcp_coarse_tmr+0x50>
 8021df6:	683b      	ldr	r3, [r7, #0]
 8021df8:	8a5b      	ldrh	r3, [r3, #18]
 8021dfa:	3301      	adds	r3, #1
 8021dfc:	b29a      	uxth	r2, r3
 8021dfe:	683b      	ldr	r3, [r7, #0]
 8021e00:	825a      	strh	r2, [r3, #18]
 8021e02:	683b      	ldr	r3, [r7, #0]
 8021e04:	8a5a      	ldrh	r2, [r3, #18]
 8021e06:	683b      	ldr	r3, [r7, #0]
 8021e08:	8a9b      	ldrh	r3, [r3, #20]
 8021e0a:	429a      	cmp	r2, r3
 8021e0c:	d106      	bne.n	8021e1c <dhcp_coarse_tmr+0x50>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t0 timeout\n"));
        /* this clients' lease time has expired */
        dhcp_release_and_stop(netif);
 8021e0e:	6878      	ldr	r0, [r7, #4]
 8021e10:	f000 fe32 	bl	8022a78 <dhcp_release_and_stop>
        dhcp_start(netif);
 8021e14:	6878      	ldr	r0, [r7, #4]
 8021e16:	f000 f96b 	bl	80220f0 <dhcp_start>
 8021e1a:	e01e      	b.n	8021e5a <dhcp_coarse_tmr+0x8e>
        /* timer is active (non zero), and triggers (zeroes) now? */
      } else if (dhcp->t2_rebind_time && (dhcp->t2_rebind_time-- == 1)) {
 8021e1c:	683b      	ldr	r3, [r7, #0]
 8021e1e:	8a1b      	ldrh	r3, [r3, #16]
 8021e20:	2b00      	cmp	r3, #0
 8021e22:	d00b      	beq.n	8021e3c <dhcp_coarse_tmr+0x70>
 8021e24:	683b      	ldr	r3, [r7, #0]
 8021e26:	8a1b      	ldrh	r3, [r3, #16]
 8021e28:	1e5a      	subs	r2, r3, #1
 8021e2a:	b291      	uxth	r1, r2
 8021e2c:	683a      	ldr	r2, [r7, #0]
 8021e2e:	8211      	strh	r1, [r2, #16]
 8021e30:	2b01      	cmp	r3, #1
 8021e32:	d103      	bne.n	8021e3c <dhcp_coarse_tmr+0x70>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t2 timeout\n"));
        /* this clients' rebind timeout triggered */
        dhcp_t2_timeout(netif);
 8021e34:	6878      	ldr	r0, [r7, #4]
 8021e36:	f000 f8c7 	bl	8021fc8 <dhcp_t2_timeout>
 8021e3a:	e00e      	b.n	8021e5a <dhcp_coarse_tmr+0x8e>
        /* timer is active (non zero), and triggers (zeroes) now */
      } else if (dhcp->t1_renew_time && (dhcp->t1_renew_time-- == 1)) {
 8021e3c:	683b      	ldr	r3, [r7, #0]
 8021e3e:	89db      	ldrh	r3, [r3, #14]
 8021e40:	2b00      	cmp	r3, #0
 8021e42:	d00a      	beq.n	8021e5a <dhcp_coarse_tmr+0x8e>
 8021e44:	683b      	ldr	r3, [r7, #0]
 8021e46:	89db      	ldrh	r3, [r3, #14]
 8021e48:	1e5a      	subs	r2, r3, #1
 8021e4a:	b291      	uxth	r1, r2
 8021e4c:	683a      	ldr	r2, [r7, #0]
 8021e4e:	81d1      	strh	r1, [r2, #14]
 8021e50:	2b01      	cmp	r3, #1
 8021e52:	d102      	bne.n	8021e5a <dhcp_coarse_tmr+0x8e>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t1 timeout\n"));
        /* this clients' renewal timeout triggered */
        dhcp_t1_timeout(netif);
 8021e54:	6878      	ldr	r0, [r7, #4]
 8021e56:	f000 f888 	bl	8021f6a <dhcp_t1_timeout>
  NETIF_FOREACH(netif) {
 8021e5a:	687b      	ldr	r3, [r7, #4]
 8021e5c:	681b      	ldr	r3, [r3, #0]
 8021e5e:	607b      	str	r3, [r7, #4]
 8021e60:	687b      	ldr	r3, [r7, #4]
 8021e62:	2b00      	cmp	r3, #0
 8021e64:	d1b9      	bne.n	8021dda <dhcp_coarse_tmr+0xe>
      }
    }
  }
}
 8021e66:	bf00      	nop
 8021e68:	bf00      	nop
 8021e6a:	3708      	adds	r7, #8
 8021e6c:	46bd      	mov	sp, r7
 8021e6e:	bd80      	pop	{r7, pc}
 8021e70:	2402ae7c 	.word	0x2402ae7c

08021e74 <dhcp_fine_tmr>:
 * A DHCP server is expected to respond within a short period of time.
 * This timer checks whether an outstanding DHCP request is timed out.
 */
void
dhcp_fine_tmr(void)
{
 8021e74:	b580      	push	{r7, lr}
 8021e76:	b082      	sub	sp, #8
 8021e78:	af00      	add	r7, sp, #0
  struct netif *netif;
  /* loop through netif's */
  NETIF_FOREACH(netif) {
 8021e7a:	4b16      	ldr	r3, [pc, #88]	@ (8021ed4 <dhcp_fine_tmr+0x60>)
 8021e7c:	681b      	ldr	r3, [r3, #0]
 8021e7e:	607b      	str	r3, [r7, #4]
 8021e80:	e020      	b.n	8021ec4 <dhcp_fine_tmr+0x50>
    struct dhcp *dhcp = netif_dhcp_data(netif);
 8021e82:	687b      	ldr	r3, [r7, #4]
 8021e84:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021e86:	603b      	str	r3, [r7, #0]
    /* only act on DHCP configured interfaces */
    if (dhcp != NULL) {
 8021e88:	683b      	ldr	r3, [r7, #0]
 8021e8a:	2b00      	cmp	r3, #0
 8021e8c:	d017      	beq.n	8021ebe <dhcp_fine_tmr+0x4a>
      /* timer is active (non zero), and is about to trigger now */
      if (dhcp->request_timeout > 1) {
 8021e8e:	683b      	ldr	r3, [r7, #0]
 8021e90:	891b      	ldrh	r3, [r3, #8]
 8021e92:	2b01      	cmp	r3, #1
 8021e94:	d906      	bls.n	8021ea4 <dhcp_fine_tmr+0x30>
        dhcp->request_timeout--;
 8021e96:	683b      	ldr	r3, [r7, #0]
 8021e98:	891b      	ldrh	r3, [r3, #8]
 8021e9a:	3b01      	subs	r3, #1
 8021e9c:	b29a      	uxth	r2, r3
 8021e9e:	683b      	ldr	r3, [r7, #0]
 8021ea0:	811a      	strh	r2, [r3, #8]
 8021ea2:	e00c      	b.n	8021ebe <dhcp_fine_tmr+0x4a>
      } else if (dhcp->request_timeout == 1) {
 8021ea4:	683b      	ldr	r3, [r7, #0]
 8021ea6:	891b      	ldrh	r3, [r3, #8]
 8021ea8:	2b01      	cmp	r3, #1
 8021eaa:	d108      	bne.n	8021ebe <dhcp_fine_tmr+0x4a>
        dhcp->request_timeout--;
 8021eac:	683b      	ldr	r3, [r7, #0]
 8021eae:	891b      	ldrh	r3, [r3, #8]
 8021eb0:	3b01      	subs	r3, #1
 8021eb2:	b29a      	uxth	r2, r3
 8021eb4:	683b      	ldr	r3, [r7, #0]
 8021eb6:	811a      	strh	r2, [r3, #8]
        /* { dhcp->request_timeout == 0 } */
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_fine_tmr(): request timeout\n"));
        /* this client's request timeout triggered */
        dhcp_timeout(netif);
 8021eb8:	6878      	ldr	r0, [r7, #4]
 8021eba:	f000 f80d 	bl	8021ed8 <dhcp_timeout>
  NETIF_FOREACH(netif) {
 8021ebe:	687b      	ldr	r3, [r7, #4]
 8021ec0:	681b      	ldr	r3, [r3, #0]
 8021ec2:	607b      	str	r3, [r7, #4]
 8021ec4:	687b      	ldr	r3, [r7, #4]
 8021ec6:	2b00      	cmp	r3, #0
 8021ec8:	d1db      	bne.n	8021e82 <dhcp_fine_tmr+0xe>
      }
    }
  }
}
 8021eca:	bf00      	nop
 8021ecc:	bf00      	nop
 8021ece:	3708      	adds	r7, #8
 8021ed0:	46bd      	mov	sp, r7
 8021ed2:	bd80      	pop	{r7, pc}
 8021ed4:	2402ae7c 	.word	0x2402ae7c

08021ed8 <dhcp_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_timeout(struct netif *netif)
{
 8021ed8:	b580      	push	{r7, lr}
 8021eda:	b084      	sub	sp, #16
 8021edc:	af00      	add	r7, sp, #0
 8021ede:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021ee0:	687b      	ldr	r3, [r7, #4]
 8021ee2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021ee4:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout()\n"));
  /* back-off period has passed, or server selection timed out */
  if ((dhcp->state == DHCP_STATE_BACKING_OFF) || (dhcp->state == DHCP_STATE_SELECTING)) {
 8021ee6:	68fb      	ldr	r3, [r7, #12]
 8021ee8:	795b      	ldrb	r3, [r3, #5]
 8021eea:	2b0c      	cmp	r3, #12
 8021eec:	d003      	beq.n	8021ef6 <dhcp_timeout+0x1e>
 8021eee:	68fb      	ldr	r3, [r7, #12]
 8021ef0:	795b      	ldrb	r3, [r3, #5]
 8021ef2:	2b06      	cmp	r3, #6
 8021ef4:	d103      	bne.n	8021efe <dhcp_timeout+0x26>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout(): restarting discovery\n"));
    dhcp_discover(netif);
 8021ef6:	6878      	ldr	r0, [r7, #4]
 8021ef8:	f000 fa58 	bl	80223ac <dhcp_discover>
      dhcp_reboot(netif);
    } else {
      dhcp_discover(netif);
    }
  }
}
 8021efc:	e031      	b.n	8021f62 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_REQUESTING) {
 8021efe:	68fb      	ldr	r3, [r7, #12]
 8021f00:	795b      	ldrb	r3, [r3, #5]
 8021f02:	2b01      	cmp	r3, #1
 8021f04:	d10e      	bne.n	8021f24 <dhcp_timeout+0x4c>
    if (dhcp->tries <= 5) {
 8021f06:	68fb      	ldr	r3, [r7, #12]
 8021f08:	799b      	ldrb	r3, [r3, #6]
 8021f0a:	2b05      	cmp	r3, #5
 8021f0c:	d803      	bhi.n	8021f16 <dhcp_timeout+0x3e>
      dhcp_select(netif);
 8021f0e:	6878      	ldr	r0, [r7, #4]
 8021f10:	f7ff fe60 	bl	8021bd4 <dhcp_select>
}
 8021f14:	e025      	b.n	8021f62 <dhcp_timeout+0x8a>
      dhcp_release_and_stop(netif);
 8021f16:	6878      	ldr	r0, [r7, #4]
 8021f18:	f000 fdae 	bl	8022a78 <dhcp_release_and_stop>
      dhcp_start(netif);
 8021f1c:	6878      	ldr	r0, [r7, #4]
 8021f1e:	f000 f8e7 	bl	80220f0 <dhcp_start>
}
 8021f22:	e01e      	b.n	8021f62 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_CHECKING) {
 8021f24:	68fb      	ldr	r3, [r7, #12]
 8021f26:	795b      	ldrb	r3, [r3, #5]
 8021f28:	2b08      	cmp	r3, #8
 8021f2a:	d10b      	bne.n	8021f44 <dhcp_timeout+0x6c>
    if (dhcp->tries <= 1) {
 8021f2c:	68fb      	ldr	r3, [r7, #12]
 8021f2e:	799b      	ldrb	r3, [r3, #6]
 8021f30:	2b01      	cmp	r3, #1
 8021f32:	d803      	bhi.n	8021f3c <dhcp_timeout+0x64>
      dhcp_check(netif);
 8021f34:	6878      	ldr	r0, [r7, #4]
 8021f36:	f7ff fdf3 	bl	8021b20 <dhcp_check>
}
 8021f3a:	e012      	b.n	8021f62 <dhcp_timeout+0x8a>
      dhcp_bind(netif);
 8021f3c:	6878      	ldr	r0, [r7, #4]
 8021f3e:	f000 fad7 	bl	80224f0 <dhcp_bind>
}
 8021f42:	e00e      	b.n	8021f62 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_REBOOTING) {
 8021f44:	68fb      	ldr	r3, [r7, #12]
 8021f46:	795b      	ldrb	r3, [r3, #5]
 8021f48:	2b03      	cmp	r3, #3
 8021f4a:	d10a      	bne.n	8021f62 <dhcp_timeout+0x8a>
    if (dhcp->tries < REBOOT_TRIES) {
 8021f4c:	68fb      	ldr	r3, [r7, #12]
 8021f4e:	799b      	ldrb	r3, [r3, #6]
 8021f50:	2b01      	cmp	r3, #1
 8021f52:	d803      	bhi.n	8021f5c <dhcp_timeout+0x84>
      dhcp_reboot(netif);
 8021f54:	6878      	ldr	r0, [r7, #4]
 8021f56:	f000 fcdb 	bl	8022910 <dhcp_reboot>
}
 8021f5a:	e002      	b.n	8021f62 <dhcp_timeout+0x8a>
      dhcp_discover(netif);
 8021f5c:	6878      	ldr	r0, [r7, #4]
 8021f5e:	f000 fa25 	bl	80223ac <dhcp_discover>
}
 8021f62:	bf00      	nop
 8021f64:	3710      	adds	r7, #16
 8021f66:	46bd      	mov	sp, r7
 8021f68:	bd80      	pop	{r7, pc}

08021f6a <dhcp_t1_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_t1_timeout(struct netif *netif)
{
 8021f6a:	b580      	push	{r7, lr}
 8021f6c:	b084      	sub	sp, #16
 8021f6e:	af00      	add	r7, sp, #0
 8021f70:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021f72:	687b      	ldr	r3, [r7, #4]
 8021f74:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021f76:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_t1_timeout()\n"));
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8021f78:	68fb      	ldr	r3, [r7, #12]
 8021f7a:	795b      	ldrb	r3, [r3, #5]
 8021f7c:	2b01      	cmp	r3, #1
 8021f7e:	d007      	beq.n	8021f90 <dhcp_t1_timeout+0x26>
 8021f80:	68fb      	ldr	r3, [r7, #12]
 8021f82:	795b      	ldrb	r3, [r3, #5]
 8021f84:	2b0a      	cmp	r3, #10
 8021f86:	d003      	beq.n	8021f90 <dhcp_t1_timeout+0x26>
      (dhcp->state == DHCP_STATE_RENEWING)) {
 8021f88:	68fb      	ldr	r3, [r7, #12]
 8021f8a:	795b      	ldrb	r3, [r3, #5]
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8021f8c:	2b05      	cmp	r3, #5
 8021f8e:	d117      	bne.n	8021fc0 <dhcp_t1_timeout+0x56>
     * eventually time-out if renew tries fail. */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                ("dhcp_t1_timeout(): must renew\n"));
    /* This slightly different to RFC2131: DHCPREQUEST will be sent from state
       DHCP_STATE_RENEWING, not DHCP_STATE_BOUND */
    dhcp_renew(netif);
 8021f90:	6878      	ldr	r0, [r7, #4]
 8021f92:	f000 fb87 	bl	80226a4 <dhcp_renew>
    /* Calculate next timeout */
    if (((dhcp->t2_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) {
 8021f96:	68fb      	ldr	r3, [r7, #12]
 8021f98:	899b      	ldrh	r3, [r3, #12]
 8021f9a:	461a      	mov	r2, r3
 8021f9c:	68fb      	ldr	r3, [r7, #12]
 8021f9e:	8a5b      	ldrh	r3, [r3, #18]
 8021fa0:	1ad3      	subs	r3, r2, r3
 8021fa2:	2b01      	cmp	r3, #1
 8021fa4:	dd0c      	ble.n	8021fc0 <dhcp_t1_timeout+0x56>
      dhcp->t1_renew_time = (u16_t)((dhcp->t2_timeout - dhcp->lease_used) / 2);
 8021fa6:	68fb      	ldr	r3, [r7, #12]
 8021fa8:	899b      	ldrh	r3, [r3, #12]
 8021faa:	461a      	mov	r2, r3
 8021fac:	68fb      	ldr	r3, [r7, #12]
 8021fae:	8a5b      	ldrh	r3, [r3, #18]
 8021fb0:	1ad3      	subs	r3, r2, r3
 8021fb2:	2b00      	cmp	r3, #0
 8021fb4:	da00      	bge.n	8021fb8 <dhcp_t1_timeout+0x4e>
 8021fb6:	3301      	adds	r3, #1
 8021fb8:	105b      	asrs	r3, r3, #1
 8021fba:	b29a      	uxth	r2, r3
 8021fbc:	68fb      	ldr	r3, [r7, #12]
 8021fbe:	81da      	strh	r2, [r3, #14]
    }
  }
}
 8021fc0:	bf00      	nop
 8021fc2:	3710      	adds	r7, #16
 8021fc4:	46bd      	mov	sp, r7
 8021fc6:	bd80      	pop	{r7, pc}

08021fc8 <dhcp_t2_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_t2_timeout(struct netif *netif)
{
 8021fc8:	b580      	push	{r7, lr}
 8021fca:	b084      	sub	sp, #16
 8021fcc:	af00      	add	r7, sp, #0
 8021fce:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021fd0:	687b      	ldr	r3, [r7, #4]
 8021fd2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021fd4:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_t2_timeout()\n"));
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8021fd6:	68fb      	ldr	r3, [r7, #12]
 8021fd8:	795b      	ldrb	r3, [r3, #5]
 8021fda:	2b01      	cmp	r3, #1
 8021fdc:	d00b      	beq.n	8021ff6 <dhcp_t2_timeout+0x2e>
 8021fde:	68fb      	ldr	r3, [r7, #12]
 8021fe0:	795b      	ldrb	r3, [r3, #5]
 8021fe2:	2b0a      	cmp	r3, #10
 8021fe4:	d007      	beq.n	8021ff6 <dhcp_t2_timeout+0x2e>
      (dhcp->state == DHCP_STATE_RENEWING) || (dhcp->state == DHCP_STATE_REBINDING)) {
 8021fe6:	68fb      	ldr	r3, [r7, #12]
 8021fe8:	795b      	ldrb	r3, [r3, #5]
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8021fea:	2b05      	cmp	r3, #5
 8021fec:	d003      	beq.n	8021ff6 <dhcp_t2_timeout+0x2e>
      (dhcp->state == DHCP_STATE_RENEWING) || (dhcp->state == DHCP_STATE_REBINDING)) {
 8021fee:	68fb      	ldr	r3, [r7, #12]
 8021ff0:	795b      	ldrb	r3, [r3, #5]
 8021ff2:	2b04      	cmp	r3, #4
 8021ff4:	d117      	bne.n	8022026 <dhcp_t2_timeout+0x5e>
    /* just retry to rebind */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                ("dhcp_t2_timeout(): must rebind\n"));
    /* This slightly different to RFC2131: DHCPREQUEST will be sent from state
       DHCP_STATE_REBINDING, not DHCP_STATE_BOUND */
    dhcp_rebind(netif);
 8021ff6:	6878      	ldr	r0, [r7, #4]
 8021ff8:	f000 fbf0 	bl	80227dc <dhcp_rebind>
    /* Calculate next timeout */
    if (((dhcp->t0_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) {
 8021ffc:	68fb      	ldr	r3, [r7, #12]
 8021ffe:	8a9b      	ldrh	r3, [r3, #20]
 8022000:	461a      	mov	r2, r3
 8022002:	68fb      	ldr	r3, [r7, #12]
 8022004:	8a5b      	ldrh	r3, [r3, #18]
 8022006:	1ad3      	subs	r3, r2, r3
 8022008:	2b01      	cmp	r3, #1
 802200a:	dd0c      	ble.n	8022026 <dhcp_t2_timeout+0x5e>
      dhcp->t2_rebind_time = (u16_t)((dhcp->t0_timeout - dhcp->lease_used) / 2);
 802200c:	68fb      	ldr	r3, [r7, #12]
 802200e:	8a9b      	ldrh	r3, [r3, #20]
 8022010:	461a      	mov	r2, r3
 8022012:	68fb      	ldr	r3, [r7, #12]
 8022014:	8a5b      	ldrh	r3, [r3, #18]
 8022016:	1ad3      	subs	r3, r2, r3
 8022018:	2b00      	cmp	r3, #0
 802201a:	da00      	bge.n	802201e <dhcp_t2_timeout+0x56>
 802201c:	3301      	adds	r3, #1
 802201e:	105b      	asrs	r3, r3, #1
 8022020:	b29a      	uxth	r2, r3
 8022022:	68fb      	ldr	r3, [r7, #12]
 8022024:	821a      	strh	r2, [r3, #16]
    }
  }
}
 8022026:	bf00      	nop
 8022028:	3710      	adds	r7, #16
 802202a:	46bd      	mov	sp, r7
 802202c:	bd80      	pop	{r7, pc}
	...

08022030 <dhcp_handle_ack>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_ack(struct netif *netif, struct dhcp_msg *msg_in)
{
 8022030:	b580      	push	{r7, lr}
 8022032:	b084      	sub	sp, #16
 8022034:	af00      	add	r7, sp, #0
 8022036:	6078      	str	r0, [r7, #4]
 8022038:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 802203a:	687b      	ldr	r3, [r7, #4]
 802203c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802203e:	60fb      	str	r3, [r7, #12]
#if LWIP_DHCP_GET_NTP_SRV
  ip4_addr_t ntp_server_addrs[LWIP_DHCP_MAX_NTP_SERVERS];
#endif

  /* clear options we might not get from the ACK */
  ip4_addr_set_zero(&dhcp->offered_sn_mask);
 8022040:	68fb      	ldr	r3, [r7, #12]
 8022042:	2200      	movs	r2, #0
 8022044:	621a      	str	r2, [r3, #32]
  ip4_addr_set_zero(&dhcp->offered_gw_addr);
 8022046:	68fb      	ldr	r3, [r7, #12]
 8022048:	2200      	movs	r2, #0
 802204a:	625a      	str	r2, [r3, #36]	@ 0x24
#if LWIP_DHCP_BOOTP_FILE
  ip4_addr_set_zero(&dhcp->offered_si_addr);
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* lease time given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_LEASE_TIME)) {
 802204c:	4b26      	ldr	r3, [pc, #152]	@ (80220e8 <dhcp_handle_ack+0xb8>)
 802204e:	78db      	ldrb	r3, [r3, #3]
 8022050:	2b00      	cmp	r3, #0
 8022052:	d003      	beq.n	802205c <dhcp_handle_ack+0x2c>
    /* remember offered lease time */
    dhcp->offered_t0_lease = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_LEASE_TIME);
 8022054:	4b25      	ldr	r3, [pc, #148]	@ (80220ec <dhcp_handle_ack+0xbc>)
 8022056:	68da      	ldr	r2, [r3, #12]
 8022058:	68fb      	ldr	r3, [r7, #12]
 802205a:	629a      	str	r2, [r3, #40]	@ 0x28
  }
  /* renewal period given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T1)) {
 802205c:	4b22      	ldr	r3, [pc, #136]	@ (80220e8 <dhcp_handle_ack+0xb8>)
 802205e:	791b      	ldrb	r3, [r3, #4]
 8022060:	2b00      	cmp	r3, #0
 8022062:	d004      	beq.n	802206e <dhcp_handle_ack+0x3e>
    /* remember given renewal period */
    dhcp->offered_t1_renew = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T1);
 8022064:	4b21      	ldr	r3, [pc, #132]	@ (80220ec <dhcp_handle_ack+0xbc>)
 8022066:	691a      	ldr	r2, [r3, #16]
 8022068:	68fb      	ldr	r3, [r7, #12]
 802206a:	62da      	str	r2, [r3, #44]	@ 0x2c
 802206c:	e004      	b.n	8022078 <dhcp_handle_ack+0x48>
  } else {
    /* calculate safe periods for renewal */
    dhcp->offered_t1_renew = dhcp->offered_t0_lease / 2;
 802206e:	68fb      	ldr	r3, [r7, #12]
 8022070:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8022072:	085a      	lsrs	r2, r3, #1
 8022074:	68fb      	ldr	r3, [r7, #12]
 8022076:	62da      	str	r2, [r3, #44]	@ 0x2c
  }

  /* renewal period given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T2)) {
 8022078:	4b1b      	ldr	r3, [pc, #108]	@ (80220e8 <dhcp_handle_ack+0xb8>)
 802207a:	795b      	ldrb	r3, [r3, #5]
 802207c:	2b00      	cmp	r3, #0
 802207e:	d004      	beq.n	802208a <dhcp_handle_ack+0x5a>
    /* remember given rebind period */
    dhcp->offered_t2_rebind = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T2);
 8022080:	4b1a      	ldr	r3, [pc, #104]	@ (80220ec <dhcp_handle_ack+0xbc>)
 8022082:	695a      	ldr	r2, [r3, #20]
 8022084:	68fb      	ldr	r3, [r7, #12]
 8022086:	631a      	str	r2, [r3, #48]	@ 0x30
 8022088:	e007      	b.n	802209a <dhcp_handle_ack+0x6a>
  } else {
    /* calculate safe periods for rebinding (offered_t0_lease * 0.875 -> 87.5%)*/
    dhcp->offered_t2_rebind = (dhcp->offered_t0_lease * 7U) / 8U;
 802208a:	68fb      	ldr	r3, [r7, #12]
 802208c:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 802208e:	4613      	mov	r3, r2
 8022090:	00db      	lsls	r3, r3, #3
 8022092:	1a9b      	subs	r3, r3, r2
 8022094:	08da      	lsrs	r2, r3, #3
 8022096:	68fb      	ldr	r3, [r7, #12]
 8022098:	631a      	str	r2, [r3, #48]	@ 0x30
  }

  /* (y)our internet address */
  ip4_addr_copy(dhcp->offered_ip_addr, msg_in->yiaddr);
 802209a:	683b      	ldr	r3, [r7, #0]
 802209c:	691a      	ldr	r2, [r3, #16]
 802209e:	68fb      	ldr	r3, [r7, #12]
 80220a0:	61da      	str	r2, [r3, #28]
     boot file name copied in dhcp_parse_reply if not overloaded */
  ip4_addr_copy(dhcp->offered_si_addr, msg_in->siaddr);
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* subnet mask given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)) {
 80220a2:	4b11      	ldr	r3, [pc, #68]	@ (80220e8 <dhcp_handle_ack+0xb8>)
 80220a4:	799b      	ldrb	r3, [r3, #6]
 80220a6:	2b00      	cmp	r3, #0
 80220a8:	d00b      	beq.n	80220c2 <dhcp_handle_ack+0x92>
    /* remember given subnet mask */
    ip4_addr_set_u32(&dhcp->offered_sn_mask, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)));
 80220aa:	4b10      	ldr	r3, [pc, #64]	@ (80220ec <dhcp_handle_ack+0xbc>)
 80220ac:	699b      	ldr	r3, [r3, #24]
 80220ae:	4618      	mov	r0, r3
 80220b0:	f7f6 fd4f 	bl	8018b52 <lwip_htonl>
 80220b4:	4602      	mov	r2, r0
 80220b6:	68fb      	ldr	r3, [r7, #12]
 80220b8:	621a      	str	r2, [r3, #32]
    dhcp->subnet_mask_given = 1;
 80220ba:	68fb      	ldr	r3, [r7, #12]
 80220bc:	2201      	movs	r2, #1
 80220be:	71da      	strb	r2, [r3, #7]
 80220c0:	e002      	b.n	80220c8 <dhcp_handle_ack+0x98>
  } else {
    dhcp->subnet_mask_given = 0;
 80220c2:	68fb      	ldr	r3, [r7, #12]
 80220c4:	2200      	movs	r2, #0
 80220c6:	71da      	strb	r2, [r3, #7]
  }

  /* gateway router */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_ROUTER)) {
 80220c8:	4b07      	ldr	r3, [pc, #28]	@ (80220e8 <dhcp_handle_ack+0xb8>)
 80220ca:	79db      	ldrb	r3, [r3, #7]
 80220cc:	2b00      	cmp	r3, #0
 80220ce:	d007      	beq.n	80220e0 <dhcp_handle_ack+0xb0>
    ip4_addr_set_u32(&dhcp->offered_gw_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_ROUTER)));
 80220d0:	4b06      	ldr	r3, [pc, #24]	@ (80220ec <dhcp_handle_ack+0xbc>)
 80220d2:	69db      	ldr	r3, [r3, #28]
 80220d4:	4618      	mov	r0, r3
 80220d6:	f7f6 fd3c 	bl	8018b52 <lwip_htonl>
 80220da:	4602      	mov	r2, r0
 80220dc:	68fb      	ldr	r3, [r7, #12]
 80220de:	625a      	str	r2, [r3, #36]	@ 0x24
    ip_addr_t dns_addr;
    ip_addr_set_ip4_u32_val(dns_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_DNS_SERVER + n)));
    dns_setserver(n, &dns_addr);
  }
#endif /* LWIP_DHCP_PROVIDE_DNS_SERVERS */
}
 80220e0:	bf00      	nop
 80220e2:	3710      	adds	r7, #16
 80220e4:	46bd      	mov	sp, r7
 80220e6:	bd80      	pop	{r7, pc}
 80220e8:	2402af0c 	.word	0x2402af0c
 80220ec:	2402aeec 	.word	0x2402aeec

080220f0 <dhcp_start>:
 * - ERR_OK - No error
 * - ERR_MEM - Out of memory
 */
err_t
dhcp_start(struct netif *netif)
{
 80220f0:	b580      	push	{r7, lr}
 80220f2:	b084      	sub	sp, #16
 80220f4:	af00      	add	r7, sp, #0
 80220f6:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp;
  err_t result;

  LWIP_ASSERT_CORE_LOCKED();
 80220f8:	f7ee fa24 	bl	8010544 <sys_check_core_locking>
  LWIP_ERROR("netif != NULL", (netif != NULL), return ERR_ARG;);
 80220fc:	687b      	ldr	r3, [r7, #4]
 80220fe:	2b00      	cmp	r3, #0
 8022100:	d109      	bne.n	8022116 <dhcp_start+0x26>
 8022102:	4b37      	ldr	r3, [pc, #220]	@ (80221e0 <dhcp_start+0xf0>)
 8022104:	f240 22e7 	movw	r2, #743	@ 0x2e7
 8022108:	4936      	ldr	r1, [pc, #216]	@ (80221e4 <dhcp_start+0xf4>)
 802210a:	4837      	ldr	r0, [pc, #220]	@ (80221e8 <dhcp_start+0xf8>)
 802210c:	f007 fc66 	bl	80299dc <iprintf>
 8022110:	f06f 030f 	mvn.w	r3, #15
 8022114:	e060      	b.n	80221d8 <dhcp_start+0xe8>
  LWIP_ERROR("netif is not up, old style port?", netif_is_up(netif), return ERR_ARG;);
 8022116:	687b      	ldr	r3, [r7, #4]
 8022118:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 802211c:	f003 0301 	and.w	r3, r3, #1
 8022120:	2b00      	cmp	r3, #0
 8022122:	d109      	bne.n	8022138 <dhcp_start+0x48>
 8022124:	4b2e      	ldr	r3, [pc, #184]	@ (80221e0 <dhcp_start+0xf0>)
 8022126:	f44f 723a 	mov.w	r2, #744	@ 0x2e8
 802212a:	4930      	ldr	r1, [pc, #192]	@ (80221ec <dhcp_start+0xfc>)
 802212c:	482e      	ldr	r0, [pc, #184]	@ (80221e8 <dhcp_start+0xf8>)
 802212e:	f007 fc55 	bl	80299dc <iprintf>
 8022132:	f06f 030f 	mvn.w	r3, #15
 8022136:	e04f      	b.n	80221d8 <dhcp_start+0xe8>
  dhcp = netif_dhcp_data(netif);
 8022138:	687b      	ldr	r3, [r7, #4]
 802213a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802213c:	60fb      	str	r3, [r7, #12]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));

  /* check MTU of the netif */
  if (netif->mtu < DHCP_MAX_MSG_LEN_MIN_REQUIRED) {
 802213e:	687b      	ldr	r3, [r7, #4]
 8022140:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8022142:	f5b3 7f10 	cmp.w	r3, #576	@ 0x240
 8022146:	d202      	bcs.n	802214e <dhcp_start+0x5e>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): Cannot use this netif with DHCP: MTU is too small\n"));
    return ERR_MEM;
 8022148:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802214c:	e044      	b.n	80221d8 <dhcp_start+0xe8>
  }

  /* no DHCP client attached yet? */
  if (dhcp == NULL) {
 802214e:	68fb      	ldr	r3, [r7, #12]
 8022150:	2b00      	cmp	r3, #0
 8022152:	d10d      	bne.n	8022170 <dhcp_start+0x80>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): mallocing new DHCP client\n"));
    dhcp = (struct dhcp *)mem_malloc(sizeof(struct dhcp));
 8022154:	2034      	movs	r0, #52	@ 0x34
 8022156:	f7f7 f8c9 	bl	80192ec <mem_malloc>
 802215a:	60f8      	str	r0, [r7, #12]
    if (dhcp == NULL) {
 802215c:	68fb      	ldr	r3, [r7, #12]
 802215e:	2b00      	cmp	r3, #0
 8022160:	d102      	bne.n	8022168 <dhcp_start+0x78>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): could not allocate dhcp\n"));
      return ERR_MEM;
 8022162:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8022166:	e037      	b.n	80221d8 <dhcp_start+0xe8>
    }

    /* store this dhcp client in the netif */
    netif_set_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP, dhcp);
 8022168:	687b      	ldr	r3, [r7, #4]
 802216a:	68fa      	ldr	r2, [r7, #12]
 802216c:	625a      	str	r2, [r3, #36]	@ 0x24
 802216e:	e005      	b.n	802217c <dhcp_start+0x8c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): allocated dhcp"));
    /* already has DHCP client attached */
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(): restarting DHCP configuration\n"));

    if (dhcp->pcb_allocated != 0) {
 8022170:	68fb      	ldr	r3, [r7, #12]
 8022172:	791b      	ldrb	r3, [r3, #4]
 8022174:	2b00      	cmp	r3, #0
 8022176:	d001      	beq.n	802217c <dhcp_start+0x8c>
      dhcp_dec_pcb_refcount(); /* free DHCP PCB if not needed any more */
 8022178:	f7ff fc8e 	bl	8021a98 <dhcp_dec_pcb_refcount>
    }
    /* dhcp is cleared below, no need to reset flag*/
  }

  /* clear data structure */
  memset(dhcp, 0, sizeof(struct dhcp));
 802217c:	2234      	movs	r2, #52	@ 0x34
 802217e:	2100      	movs	r1, #0
 8022180:	68f8      	ldr	r0, [r7, #12]
 8022182:	f007 fdbd 	bl	8029d00 <memset>
  /* dhcp_set_state(&dhcp, DHCP_STATE_OFF); */

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): starting DHCP configuration\n"));

  if (dhcp_inc_pcb_refcount() != ERR_OK) { /* ensure DHCP PCB is allocated */
 8022186:	f7ff fc35 	bl	80219f4 <dhcp_inc_pcb_refcount>
 802218a:	4603      	mov	r3, r0
 802218c:	2b00      	cmp	r3, #0
 802218e:	d002      	beq.n	8022196 <dhcp_start+0xa6>
    return ERR_MEM;
 8022190:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8022194:	e020      	b.n	80221d8 <dhcp_start+0xe8>
  }
  dhcp->pcb_allocated = 1;
 8022196:	68fb      	ldr	r3, [r7, #12]
 8022198:	2201      	movs	r2, #1
 802219a:	711a      	strb	r2, [r3, #4]

  if (!netif_is_link_up(netif)) {
 802219c:	687b      	ldr	r3, [r7, #4]
 802219e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80221a2:	f003 0304 	and.w	r3, r3, #4
 80221a6:	2b00      	cmp	r3, #0
 80221a8:	d105      	bne.n	80221b6 <dhcp_start+0xc6>
    /* set state INIT and wait for dhcp_network_changed() to call dhcp_discover() */
    dhcp_set_state(dhcp, DHCP_STATE_INIT);
 80221aa:	2102      	movs	r1, #2
 80221ac:	68f8      	ldr	r0, [r7, #12]
 80221ae:	f000 fd0a 	bl	8022bc6 <dhcp_set_state>
    return ERR_OK;
 80221b2:	2300      	movs	r3, #0
 80221b4:	e010      	b.n	80221d8 <dhcp_start+0xe8>
  }

  /* (re)start the DHCP negotiation */
  result = dhcp_discover(netif);
 80221b6:	6878      	ldr	r0, [r7, #4]
 80221b8:	f000 f8f8 	bl	80223ac <dhcp_discover>
 80221bc:	4603      	mov	r3, r0
 80221be:	72fb      	strb	r3, [r7, #11]
  if (result != ERR_OK) {
 80221c0:	f997 300b 	ldrsb.w	r3, [r7, #11]
 80221c4:	2b00      	cmp	r3, #0
 80221c6:	d005      	beq.n	80221d4 <dhcp_start+0xe4>
    /* free resources allocated above */
    dhcp_release_and_stop(netif);
 80221c8:	6878      	ldr	r0, [r7, #4]
 80221ca:	f000 fc55 	bl	8022a78 <dhcp_release_and_stop>
    return ERR_MEM;
 80221ce:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80221d2:	e001      	b.n	80221d8 <dhcp_start+0xe8>
  }
  return result;
 80221d4:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 80221d8:	4618      	mov	r0, r3
 80221da:	3710      	adds	r7, #16
 80221dc:	46bd      	mov	sp, r7
 80221de:	bd80      	pop	{r7, pc}
 80221e0:	0802fe9c 	.word	0x0802fe9c
 80221e4:	0802ff80 	.word	0x0802ff80
 80221e8:	0802fefc 	.word	0x0802fefc
 80221ec:	0802ffc4 	.word	0x0802ffc4

080221f0 <dhcp_network_changed>:
 * This enters the REBOOTING state to verify that the currently bound
 * address is still valid.
 */
void
dhcp_network_changed(struct netif *netif)
{
 80221f0:	b580      	push	{r7, lr}
 80221f2:	b084      	sub	sp, #16
 80221f4:	af00      	add	r7, sp, #0
 80221f6:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80221f8:	687b      	ldr	r3, [r7, #4]
 80221fa:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80221fc:	60fb      	str	r3, [r7, #12]

  if (!dhcp) {
 80221fe:	68fb      	ldr	r3, [r7, #12]
 8022200:	2b00      	cmp	r3, #0
 8022202:	d025      	beq.n	8022250 <dhcp_network_changed+0x60>
    return;
  }
  switch (dhcp->state) {
 8022204:	68fb      	ldr	r3, [r7, #12]
 8022206:	795b      	ldrb	r3, [r3, #5]
 8022208:	2b0a      	cmp	r3, #10
 802220a:	d008      	beq.n	802221e <dhcp_network_changed+0x2e>
 802220c:	2b0a      	cmp	r3, #10
 802220e:	dc0d      	bgt.n	802222c <dhcp_network_changed+0x3c>
 8022210:	2b00      	cmp	r3, #0
 8022212:	d01f      	beq.n	8022254 <dhcp_network_changed+0x64>
 8022214:	2b00      	cmp	r3, #0
 8022216:	db09      	blt.n	802222c <dhcp_network_changed+0x3c>
 8022218:	3b03      	subs	r3, #3
 802221a:	2b02      	cmp	r3, #2
 802221c:	d806      	bhi.n	802222c <dhcp_network_changed+0x3c>
    case DHCP_STATE_REBINDING:
    case DHCP_STATE_RENEWING:
    case DHCP_STATE_BOUND:
    case DHCP_STATE_REBOOTING:
      dhcp->tries = 0;
 802221e:	68fb      	ldr	r3, [r7, #12]
 8022220:	2200      	movs	r2, #0
 8022222:	719a      	strb	r2, [r3, #6]
      dhcp_reboot(netif);
 8022224:	6878      	ldr	r0, [r7, #4]
 8022226:	f000 fb73 	bl	8022910 <dhcp_reboot>
      break;
 802222a:	e014      	b.n	8022256 <dhcp_network_changed+0x66>
    case DHCP_STATE_OFF:
      /* stay off */
      break;
    default:
      LWIP_ASSERT("invalid dhcp->state", dhcp->state <= DHCP_STATE_BACKING_OFF);
 802222c:	68fb      	ldr	r3, [r7, #12]
 802222e:	795b      	ldrb	r3, [r3, #5]
 8022230:	2b0c      	cmp	r3, #12
 8022232:	d906      	bls.n	8022242 <dhcp_network_changed+0x52>
 8022234:	4b09      	ldr	r3, [pc, #36]	@ (802225c <dhcp_network_changed+0x6c>)
 8022236:	f240 326d 	movw	r2, #877	@ 0x36d
 802223a:	4909      	ldr	r1, [pc, #36]	@ (8022260 <dhcp_network_changed+0x70>)
 802223c:	4809      	ldr	r0, [pc, #36]	@ (8022264 <dhcp_network_changed+0x74>)
 802223e:	f007 fbcd 	bl	80299dc <iprintf>
        autoip_stop(netif);
        dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF;
      }
#endif /* LWIP_DHCP_AUTOIP_COOP */
      /* ensure we start with short timeouts, even if already discovering */
      dhcp->tries = 0;
 8022242:	68fb      	ldr	r3, [r7, #12]
 8022244:	2200      	movs	r2, #0
 8022246:	719a      	strb	r2, [r3, #6]
      dhcp_discover(netif);
 8022248:	6878      	ldr	r0, [r7, #4]
 802224a:	f000 f8af 	bl	80223ac <dhcp_discover>
      break;
 802224e:	e002      	b.n	8022256 <dhcp_network_changed+0x66>
    return;
 8022250:	bf00      	nop
 8022252:	e000      	b.n	8022256 <dhcp_network_changed+0x66>
      break;
 8022254:	bf00      	nop
  }
}
 8022256:	3710      	adds	r7, #16
 8022258:	46bd      	mov	sp, r7
 802225a:	bd80      	pop	{r7, pc}
 802225c:	0802fe9c 	.word	0x0802fe9c
 8022260:	0802ffe8 	.word	0x0802ffe8
 8022264:	0802fefc 	.word	0x0802fefc

08022268 <dhcp_arp_reply>:
 * @param netif the network interface on which the reply was received
 * @param addr The IP address we received a reply from
 */
void
dhcp_arp_reply(struct netif *netif, const ip4_addr_t *addr)
{
 8022268:	b580      	push	{r7, lr}
 802226a:	b084      	sub	sp, #16
 802226c:	af00      	add	r7, sp, #0
 802226e:	6078      	str	r0, [r7, #4]
 8022270:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp;

  LWIP_ERROR("netif != NULL", (netif != NULL), return;);
 8022272:	687b      	ldr	r3, [r7, #4]
 8022274:	2b00      	cmp	r3, #0
 8022276:	d107      	bne.n	8022288 <dhcp_arp_reply+0x20>
 8022278:	4b0e      	ldr	r3, [pc, #56]	@ (80222b4 <dhcp_arp_reply+0x4c>)
 802227a:	f240 328b 	movw	r2, #907	@ 0x38b
 802227e:	490e      	ldr	r1, [pc, #56]	@ (80222b8 <dhcp_arp_reply+0x50>)
 8022280:	480e      	ldr	r0, [pc, #56]	@ (80222bc <dhcp_arp_reply+0x54>)
 8022282:	f007 fbab 	bl	80299dc <iprintf>
 8022286:	e012      	b.n	80222ae <dhcp_arp_reply+0x46>
  dhcp = netif_dhcp_data(netif);
 8022288:	687b      	ldr	r3, [r7, #4]
 802228a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802228c:	60fb      	str	r3, [r7, #12]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_arp_reply()\n"));
  /* is a DHCP client doing an ARP check? */
  if ((dhcp != NULL) && (dhcp->state == DHCP_STATE_CHECKING)) {
 802228e:	68fb      	ldr	r3, [r7, #12]
 8022290:	2b00      	cmp	r3, #0
 8022292:	d00c      	beq.n	80222ae <dhcp_arp_reply+0x46>
 8022294:	68fb      	ldr	r3, [r7, #12]
 8022296:	795b      	ldrb	r3, [r3, #5]
 8022298:	2b08      	cmp	r3, #8
 802229a:	d108      	bne.n	80222ae <dhcp_arp_reply+0x46>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_arp_reply(): CHECKING, arp reply for 0x%08"X32_F"\n",
                ip4_addr_get_u32(addr)));
    /* did a host respond with the address we
       were offered by the DHCP server? */
    if (ip4_addr_cmp(addr, &dhcp->offered_ip_addr)) {
 802229c:	683b      	ldr	r3, [r7, #0]
 802229e:	681a      	ldr	r2, [r3, #0]
 80222a0:	68fb      	ldr	r3, [r7, #12]
 80222a2:	69db      	ldr	r3, [r3, #28]
 80222a4:	429a      	cmp	r2, r3
 80222a6:	d102      	bne.n	80222ae <dhcp_arp_reply+0x46>
      /* we will not accept the offered address */
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING,
                  ("dhcp_arp_reply(): arp reply matched with offered address, declining\n"));
      dhcp_decline(netif);
 80222a8:	6878      	ldr	r0, [r7, #4]
 80222aa:	f000 f809 	bl	80222c0 <dhcp_decline>
    }
  }
}
 80222ae:	3710      	adds	r7, #16
 80222b0:	46bd      	mov	sp, r7
 80222b2:	bd80      	pop	{r7, pc}
 80222b4:	0802fe9c 	.word	0x0802fe9c
 80222b8:	0802ff80 	.word	0x0802ff80
 80222bc:	0802fefc 	.word	0x0802fefc

080222c0 <dhcp_decline>:
 *
 * @param netif the netif under DHCP control
 */
static err_t
dhcp_decline(struct netif *netif)
{
 80222c0:	b5b0      	push	{r4, r5, r7, lr}
 80222c2:	b08a      	sub	sp, #40	@ 0x28
 80222c4:	af02      	add	r7, sp, #8
 80222c6:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80222c8:	687b      	ldr	r3, [r7, #4]
 80222ca:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80222cc:	61bb      	str	r3, [r7, #24]
  u16_t msecs;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_BACKING_OFF);
 80222ce:	210c      	movs	r1, #12
 80222d0:	69b8      	ldr	r0, [r7, #24]
 80222d2:	f000 fc78 	bl	8022bc6 <dhcp_set_state>
  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_DECLINE, &options_out_len);
 80222d6:	f107 030c 	add.w	r3, r7, #12
 80222da:	2204      	movs	r2, #4
 80222dc:	69b9      	ldr	r1, [r7, #24]
 80222de:	6878      	ldr	r0, [r7, #4]
 80222e0:	f001 f90a 	bl	80234f8 <dhcp_create_msg>
 80222e4:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 80222e6:	697b      	ldr	r3, [r7, #20]
 80222e8:	2b00      	cmp	r3, #0
 80222ea:	d035      	beq.n	8022358 <dhcp_decline+0x98>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 80222ec:	697b      	ldr	r3, [r7, #20]
 80222ee:	685b      	ldr	r3, [r3, #4]
 80222f0:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 80222f2:	89b8      	ldrh	r0, [r7, #12]
 80222f4:	693b      	ldr	r3, [r7, #16]
 80222f6:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80222fa:	2304      	movs	r3, #4
 80222fc:	2232      	movs	r2, #50	@ 0x32
 80222fe:	f000 fc7d 	bl	8022bfc <dhcp_option>
 8022302:	4603      	mov	r3, r0
 8022304:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 8022306:	89bc      	ldrh	r4, [r7, #12]
 8022308:	693b      	ldr	r3, [r7, #16]
 802230a:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 802230e:	69bb      	ldr	r3, [r7, #24]
 8022310:	69db      	ldr	r3, [r3, #28]
 8022312:	4618      	mov	r0, r3
 8022314:	f7f6 fc1d 	bl	8018b52 <lwip_htonl>
 8022318:	4603      	mov	r3, r0
 802231a:	461a      	mov	r2, r3
 802231c:	4629      	mov	r1, r5
 802231e:	4620      	mov	r0, r4
 8022320:	f000 fcf8 	bl	8022d14 <dhcp_option_long>
 8022324:	4603      	mov	r3, r0
 8022326:	81bb      	strh	r3, [r7, #12]

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_BACKING_OFF, msg_out, DHCP_DECLINE, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8022328:	89b8      	ldrh	r0, [r7, #12]
 802232a:	693b      	ldr	r3, [r7, #16]
 802232c:	33f0      	adds	r3, #240	@ 0xf0
 802232e:	697a      	ldr	r2, [r7, #20]
 8022330:	4619      	mov	r1, r3
 8022332:	f001 f9b7 	bl	80236a4 <dhcp_option_trailer>

    /* per section 4.4.4, broadcast DECLINE messages */
    result = udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 8022336:	4b19      	ldr	r3, [pc, #100]	@ (802239c <dhcp_decline+0xdc>)
 8022338:	6818      	ldr	r0, [r3, #0]
 802233a:	4b19      	ldr	r3, [pc, #100]	@ (80223a0 <dhcp_decline+0xe0>)
 802233c:	9301      	str	r3, [sp, #4]
 802233e:	687b      	ldr	r3, [r7, #4]
 8022340:	9300      	str	r3, [sp, #0]
 8022342:	2343      	movs	r3, #67	@ 0x43
 8022344:	4a17      	ldr	r2, [pc, #92]	@ (80223a4 <dhcp_decline+0xe4>)
 8022346:	6979      	ldr	r1, [r7, #20]
 8022348:	f7ff f88a 	bl	8021460 <udp_sendto_if_src>
 802234c:	4603      	mov	r3, r0
 802234e:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 8022350:	6978      	ldr	r0, [r7, #20]
 8022352:	f7f8 f8cb 	bl	801a4ec <pbuf_free>
 8022356:	e001      	b.n	802235c <dhcp_decline+0x9c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_decline: BACKING OFF\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_decline: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8022358:	23ff      	movs	r3, #255	@ 0xff
 802235a:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 802235c:	69bb      	ldr	r3, [r7, #24]
 802235e:	799b      	ldrb	r3, [r3, #6]
 8022360:	2bff      	cmp	r3, #255	@ 0xff
 8022362:	d005      	beq.n	8022370 <dhcp_decline+0xb0>
    dhcp->tries++;
 8022364:	69bb      	ldr	r3, [r7, #24]
 8022366:	799b      	ldrb	r3, [r3, #6]
 8022368:	3301      	adds	r3, #1
 802236a:	b2da      	uxtb	r2, r3
 802236c:	69bb      	ldr	r3, [r7, #24]
 802236e:	719a      	strb	r2, [r3, #6]
  }
  msecs = 10 * 1000;
 8022370:	f242 7310 	movw	r3, #10000	@ 0x2710
 8022374:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8022376:	89fb      	ldrh	r3, [r7, #14]
 8022378:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 802237c:	4a0a      	ldr	r2, [pc, #40]	@ (80223a8 <dhcp_decline+0xe8>)
 802237e:	fb82 1203 	smull	r1, r2, r2, r3
 8022382:	1152      	asrs	r2, r2, #5
 8022384:	17db      	asrs	r3, r3, #31
 8022386:	1ad3      	subs	r3, r2, r3
 8022388:	b29a      	uxth	r2, r3
 802238a:	69bb      	ldr	r3, [r7, #24]
 802238c:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 802238e:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8022392:	4618      	mov	r0, r3
 8022394:	3720      	adds	r7, #32
 8022396:	46bd      	mov	sp, r7
 8022398:	bdb0      	pop	{r4, r5, r7, pc}
 802239a:	bf00      	nop
 802239c:	2402af14 	.word	0x2402af14
 80223a0:	08030c68 	.word	0x08030c68
 80223a4:	08030c6c 	.word	0x08030c6c
 80223a8:	10624dd3 	.word	0x10624dd3

080223ac <dhcp_discover>:
 *
 * @param netif the netif under DHCP control
 */
static err_t
dhcp_discover(struct netif *netif)
{
 80223ac:	b580      	push	{r7, lr}
 80223ae:	b08a      	sub	sp, #40	@ 0x28
 80223b0:	af02      	add	r7, sp, #8
 80223b2:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80223b4:	687b      	ldr	r3, [r7, #4]
 80223b6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80223b8:	61bb      	str	r3, [r7, #24]
  err_t result = ERR_OK;
 80223ba:	2300      	movs	r3, #0
 80223bc:	75fb      	strb	r3, [r7, #23]
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover()\n"));

  ip4_addr_set_any(&dhcp->offered_ip_addr);
 80223be:	69bb      	ldr	r3, [r7, #24]
 80223c0:	2200      	movs	r2, #0
 80223c2:	61da      	str	r2, [r3, #28]
  dhcp_set_state(dhcp, DHCP_STATE_SELECTING);
 80223c4:	2106      	movs	r1, #6
 80223c6:	69b8      	ldr	r0, [r7, #24]
 80223c8:	f000 fbfd 	bl	8022bc6 <dhcp_set_state>
  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_DISCOVER, &options_out_len);
 80223cc:	f107 0308 	add.w	r3, r7, #8
 80223d0:	2201      	movs	r2, #1
 80223d2:	69b9      	ldr	r1, [r7, #24]
 80223d4:	6878      	ldr	r0, [r7, #4]
 80223d6:	f001 f88f 	bl	80234f8 <dhcp_create_msg>
 80223da:	6138      	str	r0, [r7, #16]
  if (p_out != NULL) {
 80223dc:	693b      	ldr	r3, [r7, #16]
 80223de:	2b00      	cmp	r3, #0
 80223e0:	d04b      	beq.n	802247a <dhcp_discover+0xce>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 80223e2:	693b      	ldr	r3, [r7, #16]
 80223e4:	685b      	ldr	r3, [r3, #4]
 80223e6:	60fb      	str	r3, [r7, #12]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: making request\n"));

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 80223e8:	8938      	ldrh	r0, [r7, #8]
 80223ea:	68fb      	ldr	r3, [r7, #12]
 80223ec:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80223f0:	2302      	movs	r3, #2
 80223f2:	2239      	movs	r2, #57	@ 0x39
 80223f4:	f000 fc02 	bl	8022bfc <dhcp_option>
 80223f8:	4603      	mov	r3, r0
 80223fa:	813b      	strh	r3, [r7, #8]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 80223fc:	8938      	ldrh	r0, [r7, #8]
 80223fe:	68fb      	ldr	r3, [r7, #12]
 8022400:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022404:	687b      	ldr	r3, [r7, #4]
 8022406:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8022408:	461a      	mov	r2, r3
 802240a:	f000 fc51 	bl	8022cb0 <dhcp_option_short>
 802240e:	4603      	mov	r3, r0
 8022410:	813b      	strh	r3, [r7, #8]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8022412:	8938      	ldrh	r0, [r7, #8]
 8022414:	68fb      	ldr	r3, [r7, #12]
 8022416:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802241a:	2303      	movs	r3, #3
 802241c:	2237      	movs	r2, #55	@ 0x37
 802241e:	f000 fbed 	bl	8022bfc <dhcp_option>
 8022422:	4603      	mov	r3, r0
 8022424:	813b      	strh	r3, [r7, #8]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022426:	2300      	movs	r3, #0
 8022428:	77fb      	strb	r3, [r7, #31]
 802242a:	e00e      	b.n	802244a <dhcp_discover+0x9e>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 802242c:	8938      	ldrh	r0, [r7, #8]
 802242e:	68fb      	ldr	r3, [r7, #12]
 8022430:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022434:	7ffb      	ldrb	r3, [r7, #31]
 8022436:	4a29      	ldr	r2, [pc, #164]	@ (80224dc <dhcp_discover+0x130>)
 8022438:	5cd3      	ldrb	r3, [r2, r3]
 802243a:	461a      	mov	r2, r3
 802243c:	f000 fc12 	bl	8022c64 <dhcp_option_byte>
 8022440:	4603      	mov	r3, r0
 8022442:	813b      	strh	r3, [r7, #8]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022444:	7ffb      	ldrb	r3, [r7, #31]
 8022446:	3301      	adds	r3, #1
 8022448:	77fb      	strb	r3, [r7, #31]
 802244a:	7ffb      	ldrb	r3, [r7, #31]
 802244c:	2b02      	cmp	r3, #2
 802244e:	d9ed      	bls.n	802242c <dhcp_discover+0x80>
    }
    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_SELECTING, msg_out, DHCP_DISCOVER, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8022450:	8938      	ldrh	r0, [r7, #8]
 8022452:	68fb      	ldr	r3, [r7, #12]
 8022454:	33f0      	adds	r3, #240	@ 0xf0
 8022456:	693a      	ldr	r2, [r7, #16]
 8022458:	4619      	mov	r1, r3
 802245a:	f001 f923 	bl	80236a4 <dhcp_option_trailer>

    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: sendto(DISCOVER, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER)\n"));
    udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 802245e:	4b20      	ldr	r3, [pc, #128]	@ (80224e0 <dhcp_discover+0x134>)
 8022460:	6818      	ldr	r0, [r3, #0]
 8022462:	4b20      	ldr	r3, [pc, #128]	@ (80224e4 <dhcp_discover+0x138>)
 8022464:	9301      	str	r3, [sp, #4]
 8022466:	687b      	ldr	r3, [r7, #4]
 8022468:	9300      	str	r3, [sp, #0]
 802246a:	2343      	movs	r3, #67	@ 0x43
 802246c:	4a1e      	ldr	r2, [pc, #120]	@ (80224e8 <dhcp_discover+0x13c>)
 802246e:	6939      	ldr	r1, [r7, #16]
 8022470:	f7fe fff6 	bl	8021460 <udp_sendto_if_src>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: deleting()ing\n"));
    pbuf_free(p_out);
 8022474:	6938      	ldr	r0, [r7, #16]
 8022476:	f7f8 f839 	bl	801a4ec <pbuf_free>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover: SELECTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_discover: could not allocate DHCP request\n"));
  }
  if (dhcp->tries < 255) {
 802247a:	69bb      	ldr	r3, [r7, #24]
 802247c:	799b      	ldrb	r3, [r3, #6]
 802247e:	2bff      	cmp	r3, #255	@ 0xff
 8022480:	d005      	beq.n	802248e <dhcp_discover+0xe2>
    dhcp->tries++;
 8022482:	69bb      	ldr	r3, [r7, #24]
 8022484:	799b      	ldrb	r3, [r3, #6]
 8022486:	3301      	adds	r3, #1
 8022488:	b2da      	uxtb	r2, r3
 802248a:	69bb      	ldr	r3, [r7, #24]
 802248c:	719a      	strb	r2, [r3, #6]
  if (dhcp->tries >= LWIP_DHCP_AUTOIP_COOP_TRIES && dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_OFF) {
    dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_ON;
    autoip_start(netif);
  }
#endif /* LWIP_DHCP_AUTOIP_COOP */
  msecs = (u16_t)((dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000);
 802248e:	69bb      	ldr	r3, [r7, #24]
 8022490:	799b      	ldrb	r3, [r3, #6]
 8022492:	2b05      	cmp	r3, #5
 8022494:	d80d      	bhi.n	80224b2 <dhcp_discover+0x106>
 8022496:	69bb      	ldr	r3, [r7, #24]
 8022498:	799b      	ldrb	r3, [r3, #6]
 802249a:	461a      	mov	r2, r3
 802249c:	2301      	movs	r3, #1
 802249e:	4093      	lsls	r3, r2
 80224a0:	b29b      	uxth	r3, r3
 80224a2:	461a      	mov	r2, r3
 80224a4:	0152      	lsls	r2, r2, #5
 80224a6:	1ad2      	subs	r2, r2, r3
 80224a8:	0092      	lsls	r2, r2, #2
 80224aa:	4413      	add	r3, r2
 80224ac:	00db      	lsls	r3, r3, #3
 80224ae:	b29b      	uxth	r3, r3
 80224b0:	e001      	b.n	80224b6 <dhcp_discover+0x10a>
 80224b2:	f64e 2360 	movw	r3, #60000	@ 0xea60
 80224b6:	817b      	strh	r3, [r7, #10]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 80224b8:	897b      	ldrh	r3, [r7, #10]
 80224ba:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 80224be:	4a0b      	ldr	r2, [pc, #44]	@ (80224ec <dhcp_discover+0x140>)
 80224c0:	fb82 1203 	smull	r1, r2, r2, r3
 80224c4:	1152      	asrs	r2, r2, #5
 80224c6:	17db      	asrs	r3, r3, #31
 80224c8:	1ad3      	subs	r3, r2, r3
 80224ca:	b29a      	uxth	r2, r3
 80224cc:	69bb      	ldr	r3, [r7, #24]
 80224ce:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 80224d0:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 80224d4:	4618      	mov	r0, r3
 80224d6:	3720      	adds	r7, #32
 80224d8:	46bd      	mov	sp, r7
 80224da:	bd80      	pop	{r7, pc}
 80224dc:	24000058 	.word	0x24000058
 80224e0:	2402af14 	.word	0x2402af14
 80224e4:	08030c68 	.word	0x08030c68
 80224e8:	08030c6c 	.word	0x08030c6c
 80224ec:	10624dd3 	.word	0x10624dd3

080224f0 <dhcp_bind>:
 *
 * @param netif network interface to bind to the offered address
 */
static void
dhcp_bind(struct netif *netif)
{
 80224f0:	b580      	push	{r7, lr}
 80224f2:	b088      	sub	sp, #32
 80224f4:	af00      	add	r7, sp, #0
 80224f6:	6078      	str	r0, [r7, #4]
  u32_t timeout;
  struct dhcp *dhcp;
  ip4_addr_t sn_mask, gw_addr;
  LWIP_ERROR("dhcp_bind: netif != NULL", (netif != NULL), return;);
 80224f8:	687b      	ldr	r3, [r7, #4]
 80224fa:	2b00      	cmp	r3, #0
 80224fc:	d107      	bne.n	802250e <dhcp_bind+0x1e>
 80224fe:	4b64      	ldr	r3, [pc, #400]	@ (8022690 <dhcp_bind+0x1a0>)
 8022500:	f240 4215 	movw	r2, #1045	@ 0x415
 8022504:	4963      	ldr	r1, [pc, #396]	@ (8022694 <dhcp_bind+0x1a4>)
 8022506:	4864      	ldr	r0, [pc, #400]	@ (8022698 <dhcp_bind+0x1a8>)
 8022508:	f007 fa68 	bl	80299dc <iprintf>
 802250c:	e0bc      	b.n	8022688 <dhcp_bind+0x198>
  dhcp = netif_dhcp_data(netif);
 802250e:	687b      	ldr	r3, [r7, #4]
 8022510:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022512:	61fb      	str	r3, [r7, #28]
  LWIP_ERROR("dhcp_bind: dhcp != NULL", (dhcp != NULL), return;);
 8022514:	69fb      	ldr	r3, [r7, #28]
 8022516:	2b00      	cmp	r3, #0
 8022518:	d107      	bne.n	802252a <dhcp_bind+0x3a>
 802251a:	4b5d      	ldr	r3, [pc, #372]	@ (8022690 <dhcp_bind+0x1a0>)
 802251c:	f240 4217 	movw	r2, #1047	@ 0x417
 8022520:	495e      	ldr	r1, [pc, #376]	@ (802269c <dhcp_bind+0x1ac>)
 8022522:	485d      	ldr	r0, [pc, #372]	@ (8022698 <dhcp_bind+0x1a8>)
 8022524:	f007 fa5a 	bl	80299dc <iprintf>
 8022528:	e0ae      	b.n	8022688 <dhcp_bind+0x198>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));

  /* reset time used of lease */
  dhcp->lease_used = 0;
 802252a:	69fb      	ldr	r3, [r7, #28]
 802252c:	2200      	movs	r2, #0
 802252e:	825a      	strh	r2, [r3, #18]

  if (dhcp->offered_t0_lease != 0xffffffffUL) {
 8022530:	69fb      	ldr	r3, [r7, #28]
 8022532:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8022534:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8022538:	d019      	beq.n	802256e <dhcp_bind+0x7e>
    /* set renewal period timer */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t0 renewal timer %"U32_F" secs\n", dhcp->offered_t0_lease));
    timeout = (dhcp->offered_t0_lease + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 802253a:	69fb      	ldr	r3, [r7, #28]
 802253c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 802253e:	331e      	adds	r3, #30
 8022540:	4a57      	ldr	r2, [pc, #348]	@ (80226a0 <dhcp_bind+0x1b0>)
 8022542:	fba2 2303 	umull	r2, r3, r2, r3
 8022546:	095b      	lsrs	r3, r3, #5
 8022548:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 802254a:	69bb      	ldr	r3, [r7, #24]
 802254c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8022550:	d302      	bcc.n	8022558 <dhcp_bind+0x68>
      timeout = 0xffff;
 8022552:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8022556:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t0_timeout = (u16_t)timeout;
 8022558:	69bb      	ldr	r3, [r7, #24]
 802255a:	b29a      	uxth	r2, r3
 802255c:	69fb      	ldr	r3, [r7, #28]
 802255e:	829a      	strh	r2, [r3, #20]
    if (dhcp->t0_timeout == 0) {
 8022560:	69fb      	ldr	r3, [r7, #28]
 8022562:	8a9b      	ldrh	r3, [r3, #20]
 8022564:	2b00      	cmp	r3, #0
 8022566:	d102      	bne.n	802256e <dhcp_bind+0x7e>
      dhcp->t0_timeout = 1;
 8022568:	69fb      	ldr	r3, [r7, #28]
 802256a:	2201      	movs	r2, #1
 802256c:	829a      	strh	r2, [r3, #20]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t0_lease * 1000));
  }

  /* temporary DHCP lease? */
  if (dhcp->offered_t1_renew != 0xffffffffUL) {
 802256e:	69fb      	ldr	r3, [r7, #28]
 8022570:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8022572:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8022576:	d01d      	beq.n	80225b4 <dhcp_bind+0xc4>
    /* set renewal period timer */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t1 renewal timer %"U32_F" secs\n", dhcp->offered_t1_renew));
    timeout = (dhcp->offered_t1_renew + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 8022578:	69fb      	ldr	r3, [r7, #28]
 802257a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 802257c:	331e      	adds	r3, #30
 802257e:	4a48      	ldr	r2, [pc, #288]	@ (80226a0 <dhcp_bind+0x1b0>)
 8022580:	fba2 2303 	umull	r2, r3, r2, r3
 8022584:	095b      	lsrs	r3, r3, #5
 8022586:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 8022588:	69bb      	ldr	r3, [r7, #24]
 802258a:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 802258e:	d302      	bcc.n	8022596 <dhcp_bind+0xa6>
      timeout = 0xffff;
 8022590:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8022594:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t1_timeout = (u16_t)timeout;
 8022596:	69bb      	ldr	r3, [r7, #24]
 8022598:	b29a      	uxth	r2, r3
 802259a:	69fb      	ldr	r3, [r7, #28]
 802259c:	815a      	strh	r2, [r3, #10]
    if (dhcp->t1_timeout == 0) {
 802259e:	69fb      	ldr	r3, [r7, #28]
 80225a0:	895b      	ldrh	r3, [r3, #10]
 80225a2:	2b00      	cmp	r3, #0
 80225a4:	d102      	bne.n	80225ac <dhcp_bind+0xbc>
      dhcp->t1_timeout = 1;
 80225a6:	69fb      	ldr	r3, [r7, #28]
 80225a8:	2201      	movs	r2, #1
 80225aa:	815a      	strh	r2, [r3, #10]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t1_renew * 1000));
    dhcp->t1_renew_time = dhcp->t1_timeout;
 80225ac:	69fb      	ldr	r3, [r7, #28]
 80225ae:	895a      	ldrh	r2, [r3, #10]
 80225b0:	69fb      	ldr	r3, [r7, #28]
 80225b2:	81da      	strh	r2, [r3, #14]
  }
  /* set renewal period timer */
  if (dhcp->offered_t2_rebind != 0xffffffffUL) {
 80225b4:	69fb      	ldr	r3, [r7, #28]
 80225b6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80225b8:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80225bc:	d01d      	beq.n	80225fa <dhcp_bind+0x10a>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t2 rebind timer %"U32_F" secs\n", dhcp->offered_t2_rebind));
    timeout = (dhcp->offered_t2_rebind + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 80225be:	69fb      	ldr	r3, [r7, #28]
 80225c0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80225c2:	331e      	adds	r3, #30
 80225c4:	4a36      	ldr	r2, [pc, #216]	@ (80226a0 <dhcp_bind+0x1b0>)
 80225c6:	fba2 2303 	umull	r2, r3, r2, r3
 80225ca:	095b      	lsrs	r3, r3, #5
 80225cc:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 80225ce:	69bb      	ldr	r3, [r7, #24]
 80225d0:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 80225d4:	d302      	bcc.n	80225dc <dhcp_bind+0xec>
      timeout = 0xffff;
 80225d6:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 80225da:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t2_timeout = (u16_t)timeout;
 80225dc:	69bb      	ldr	r3, [r7, #24]
 80225de:	b29a      	uxth	r2, r3
 80225e0:	69fb      	ldr	r3, [r7, #28]
 80225e2:	819a      	strh	r2, [r3, #12]
    if (dhcp->t2_timeout == 0) {
 80225e4:	69fb      	ldr	r3, [r7, #28]
 80225e6:	899b      	ldrh	r3, [r3, #12]
 80225e8:	2b00      	cmp	r3, #0
 80225ea:	d102      	bne.n	80225f2 <dhcp_bind+0x102>
      dhcp->t2_timeout = 1;
 80225ec:	69fb      	ldr	r3, [r7, #28]
 80225ee:	2201      	movs	r2, #1
 80225f0:	819a      	strh	r2, [r3, #12]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t2_rebind * 1000));
    dhcp->t2_rebind_time = dhcp->t2_timeout;
 80225f2:	69fb      	ldr	r3, [r7, #28]
 80225f4:	899a      	ldrh	r2, [r3, #12]
 80225f6:	69fb      	ldr	r3, [r7, #28]
 80225f8:	821a      	strh	r2, [r3, #16]
  }

  /* If we have sub 1 minute lease, t2 and t1 will kick in at the same time. */
  if ((dhcp->t1_timeout >= dhcp->t2_timeout) && (dhcp->t2_timeout > 0)) {
 80225fa:	69fb      	ldr	r3, [r7, #28]
 80225fc:	895a      	ldrh	r2, [r3, #10]
 80225fe:	69fb      	ldr	r3, [r7, #28]
 8022600:	899b      	ldrh	r3, [r3, #12]
 8022602:	429a      	cmp	r2, r3
 8022604:	d306      	bcc.n	8022614 <dhcp_bind+0x124>
 8022606:	69fb      	ldr	r3, [r7, #28]
 8022608:	899b      	ldrh	r3, [r3, #12]
 802260a:	2b00      	cmp	r3, #0
 802260c:	d002      	beq.n	8022614 <dhcp_bind+0x124>
    dhcp->t1_timeout = 0;
 802260e:	69fb      	ldr	r3, [r7, #28]
 8022610:	2200      	movs	r2, #0
 8022612:	815a      	strh	r2, [r3, #10]
  }

  if (dhcp->subnet_mask_given) {
 8022614:	69fb      	ldr	r3, [r7, #28]
 8022616:	79db      	ldrb	r3, [r3, #7]
 8022618:	2b00      	cmp	r3, #0
 802261a:	d003      	beq.n	8022624 <dhcp_bind+0x134>
    /* copy offered network mask */
    ip4_addr_copy(sn_mask, dhcp->offered_sn_mask);
 802261c:	69fb      	ldr	r3, [r7, #28]
 802261e:	6a1b      	ldr	r3, [r3, #32]
 8022620:	613b      	str	r3, [r7, #16]
 8022622:	e014      	b.n	802264e <dhcp_bind+0x15e>
  } else {
    /* subnet mask not given, choose a safe subnet mask given the network class */
    u8_t first_octet = ip4_addr1(&dhcp->offered_ip_addr);
 8022624:	69fb      	ldr	r3, [r7, #28]
 8022626:	331c      	adds	r3, #28
 8022628:	781b      	ldrb	r3, [r3, #0]
 802262a:	75fb      	strb	r3, [r7, #23]
    if (first_octet <= 127) {
 802262c:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8022630:	2b00      	cmp	r3, #0
 8022632:	db02      	blt.n	802263a <dhcp_bind+0x14a>
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xff000000UL));
 8022634:	23ff      	movs	r3, #255	@ 0xff
 8022636:	613b      	str	r3, [r7, #16]
 8022638:	e009      	b.n	802264e <dhcp_bind+0x15e>
    } else if (first_octet >= 192) {
 802263a:	7dfb      	ldrb	r3, [r7, #23]
 802263c:	2bbf      	cmp	r3, #191	@ 0xbf
 802263e:	d903      	bls.n	8022648 <dhcp_bind+0x158>
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffffff00UL));
 8022640:	f06f 437f 	mvn.w	r3, #4278190080	@ 0xff000000
 8022644:	613b      	str	r3, [r7, #16]
 8022646:	e002      	b.n	802264e <dhcp_bind+0x15e>
    } else {
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffff0000UL));
 8022648:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 802264c:	613b      	str	r3, [r7, #16]
    }
  }

  ip4_addr_copy(gw_addr, dhcp->offered_gw_addr);
 802264e:	69fb      	ldr	r3, [r7, #28]
 8022650:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022652:	60fb      	str	r3, [r7, #12]
  /* gateway address not given? */
  if (ip4_addr_isany_val(gw_addr)) {
 8022654:	68fb      	ldr	r3, [r7, #12]
 8022656:	2b00      	cmp	r3, #0
 8022658:	d108      	bne.n	802266c <dhcp_bind+0x17c>
    /* copy network address */
    ip4_addr_get_network(&gw_addr, &dhcp->offered_ip_addr, &sn_mask);
 802265a:	69fb      	ldr	r3, [r7, #28]
 802265c:	69da      	ldr	r2, [r3, #28]
 802265e:	693b      	ldr	r3, [r7, #16]
 8022660:	4013      	ands	r3, r2
 8022662:	60fb      	str	r3, [r7, #12]
    /* use first host address on network as gateway */
    ip4_addr_set_u32(&gw_addr, ip4_addr_get_u32(&gw_addr) | PP_HTONL(0x00000001UL));
 8022664:	68fb      	ldr	r3, [r7, #12]
 8022666:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 802266a:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): IP: 0x%08"X32_F" SN: 0x%08"X32_F" GW: 0x%08"X32_F"\n",
              ip4_addr_get_u32(&dhcp->offered_ip_addr), ip4_addr_get_u32(&sn_mask), ip4_addr_get_u32(&gw_addr)));
  /* netif is now bound to DHCP leased address - set this before assigning the address
     to ensure the callback can use dhcp_supplied_address() */
  dhcp_set_state(dhcp, DHCP_STATE_BOUND);
 802266c:	210a      	movs	r1, #10
 802266e:	69f8      	ldr	r0, [r7, #28]
 8022670:	f000 faa9 	bl	8022bc6 <dhcp_set_state>

  netif_set_addr(netif, &dhcp->offered_ip_addr, &sn_mask, &gw_addr);
 8022674:	69fb      	ldr	r3, [r7, #28]
 8022676:	f103 011c 	add.w	r1, r3, #28
 802267a:	f107 030c 	add.w	r3, r7, #12
 802267e:	f107 0210 	add.w	r2, r7, #16
 8022682:	6878      	ldr	r0, [r7, #4]
 8022684:	f7f7 f9e8 	bl	8019a58 <netif_set_addr>
  /* interface is used by routing now that an address is set */
}
 8022688:	3720      	adds	r7, #32
 802268a:	46bd      	mov	sp, r7
 802268c:	bd80      	pop	{r7, pc}
 802268e:	bf00      	nop
 8022690:	0802fe9c 	.word	0x0802fe9c
 8022694:	0802fffc 	.word	0x0802fffc
 8022698:	0802fefc 	.word	0x0802fefc
 802269c:	08030018 	.word	0x08030018
 80226a0:	88888889 	.word	0x88888889

080226a4 <dhcp_renew>:
 *
 * @param netif network interface which must renew its lease
 */
err_t
dhcp_renew(struct netif *netif)
{
 80226a4:	b580      	push	{r7, lr}
 80226a6:	b08a      	sub	sp, #40	@ 0x28
 80226a8:	af02      	add	r7, sp, #8
 80226aa:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80226ac:	687b      	ldr	r3, [r7, #4]
 80226ae:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80226b0:	61bb      	str	r3, [r7, #24]
  u16_t msecs;
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_ASSERT_CORE_LOCKED();
 80226b2:	f7ed ff47 	bl	8010544 <sys_check_core_locking>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_renew()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_RENEWING);
 80226b6:	2105      	movs	r1, #5
 80226b8:	69b8      	ldr	r0, [r7, #24]
 80226ba:	f000 fa84 	bl	8022bc6 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 80226be:	f107 030c 	add.w	r3, r7, #12
 80226c2:	2203      	movs	r2, #3
 80226c4:	69b9      	ldr	r1, [r7, #24]
 80226c6:	6878      	ldr	r0, [r7, #4]
 80226c8:	f000 ff16 	bl	80234f8 <dhcp_create_msg>
 80226cc:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 80226ce:	697b      	ldr	r3, [r7, #20]
 80226d0:	2b00      	cmp	r3, #0
 80226d2:	d04e      	beq.n	8022772 <dhcp_renew+0xce>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 80226d4:	697b      	ldr	r3, [r7, #20]
 80226d6:	685b      	ldr	r3, [r3, #4]
 80226d8:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 80226da:	89b8      	ldrh	r0, [r7, #12]
 80226dc:	693b      	ldr	r3, [r7, #16]
 80226de:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80226e2:	2302      	movs	r3, #2
 80226e4:	2239      	movs	r2, #57	@ 0x39
 80226e6:	f000 fa89 	bl	8022bfc <dhcp_option>
 80226ea:	4603      	mov	r3, r0
 80226ec:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 80226ee:	89b8      	ldrh	r0, [r7, #12]
 80226f0:	693b      	ldr	r3, [r7, #16]
 80226f2:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80226f6:	687b      	ldr	r3, [r7, #4]
 80226f8:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 80226fa:	461a      	mov	r2, r3
 80226fc:	f000 fad8 	bl	8022cb0 <dhcp_option_short>
 8022700:	4603      	mov	r3, r0
 8022702:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8022704:	89b8      	ldrh	r0, [r7, #12]
 8022706:	693b      	ldr	r3, [r7, #16]
 8022708:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802270c:	2303      	movs	r3, #3
 802270e:	2237      	movs	r2, #55	@ 0x37
 8022710:	f000 fa74 	bl	8022bfc <dhcp_option>
 8022714:	4603      	mov	r3, r0
 8022716:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022718:	2300      	movs	r3, #0
 802271a:	77bb      	strb	r3, [r7, #30]
 802271c:	e00e      	b.n	802273c <dhcp_renew+0x98>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 802271e:	89b8      	ldrh	r0, [r7, #12]
 8022720:	693b      	ldr	r3, [r7, #16]
 8022722:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022726:	7fbb      	ldrb	r3, [r7, #30]
 8022728:	4a29      	ldr	r2, [pc, #164]	@ (80227d0 <dhcp_renew+0x12c>)
 802272a:	5cd3      	ldrb	r3, [r2, r3]
 802272c:	461a      	mov	r2, r3
 802272e:	f000 fa99 	bl	8022c64 <dhcp_option_byte>
 8022732:	4603      	mov	r3, r0
 8022734:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022736:	7fbb      	ldrb	r3, [r7, #30]
 8022738:	3301      	adds	r3, #1
 802273a:	77bb      	strb	r3, [r7, #30]
 802273c:	7fbb      	ldrb	r3, [r7, #30]
 802273e:	2b02      	cmp	r3, #2
 8022740:	d9ed      	bls.n	802271e <dhcp_renew+0x7a>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_RENEWING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8022742:	89b8      	ldrh	r0, [r7, #12]
 8022744:	693b      	ldr	r3, [r7, #16]
 8022746:	33f0      	adds	r3, #240	@ 0xf0
 8022748:	697a      	ldr	r2, [r7, #20]
 802274a:	4619      	mov	r1, r3
 802274c:	f000 ffaa 	bl	80236a4 <dhcp_option_trailer>

    result = udp_sendto_if(dhcp_pcb, p_out, &dhcp->server_ip_addr, LWIP_IANA_PORT_DHCP_SERVER, netif);
 8022750:	4b20      	ldr	r3, [pc, #128]	@ (80227d4 <dhcp_renew+0x130>)
 8022752:	6818      	ldr	r0, [r3, #0]
 8022754:	69bb      	ldr	r3, [r7, #24]
 8022756:	f103 0218 	add.w	r2, r3, #24
 802275a:	687b      	ldr	r3, [r7, #4]
 802275c:	9300      	str	r3, [sp, #0]
 802275e:	2343      	movs	r3, #67	@ 0x43
 8022760:	6979      	ldr	r1, [r7, #20]
 8022762:	f7fe fe09 	bl	8021378 <udp_sendto_if>
 8022766:	4603      	mov	r3, r0
 8022768:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 802276a:	6978      	ldr	r0, [r7, #20]
 802276c:	f7f7 febe 	bl	801a4ec <pbuf_free>
 8022770:	e001      	b.n	8022776 <dhcp_renew+0xd2>

    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew: RENEWING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_renew: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8022772:	23ff      	movs	r3, #255	@ 0xff
 8022774:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 8022776:	69bb      	ldr	r3, [r7, #24]
 8022778:	799b      	ldrb	r3, [r3, #6]
 802277a:	2bff      	cmp	r3, #255	@ 0xff
 802277c:	d005      	beq.n	802278a <dhcp_renew+0xe6>
    dhcp->tries++;
 802277e:	69bb      	ldr	r3, [r7, #24]
 8022780:	799b      	ldrb	r3, [r3, #6]
 8022782:	3301      	adds	r3, #1
 8022784:	b2da      	uxtb	r2, r3
 8022786:	69bb      	ldr	r3, [r7, #24]
 8022788:	719a      	strb	r2, [r3, #6]
  }
  /* back-off on retries, but to a maximum of 20 seconds */
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 2000 : 20 * 1000);
 802278a:	69bb      	ldr	r3, [r7, #24]
 802278c:	799b      	ldrb	r3, [r3, #6]
 802278e:	2b09      	cmp	r3, #9
 8022790:	d809      	bhi.n	80227a6 <dhcp_renew+0x102>
 8022792:	69bb      	ldr	r3, [r7, #24]
 8022794:	799b      	ldrb	r3, [r3, #6]
 8022796:	461a      	mov	r2, r3
 8022798:	0152      	lsls	r2, r2, #5
 802279a:	1ad2      	subs	r2, r2, r3
 802279c:	0092      	lsls	r2, r2, #2
 802279e:	4413      	add	r3, r2
 80227a0:	011b      	lsls	r3, r3, #4
 80227a2:	b29b      	uxth	r3, r3
 80227a4:	e001      	b.n	80227aa <dhcp_renew+0x106>
 80227a6:	f644 6320 	movw	r3, #20000	@ 0x4e20
 80227aa:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 80227ac:	89fb      	ldrh	r3, [r7, #14]
 80227ae:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 80227b2:	4a09      	ldr	r2, [pc, #36]	@ (80227d8 <dhcp_renew+0x134>)
 80227b4:	fb82 1203 	smull	r1, r2, r2, r3
 80227b8:	1152      	asrs	r2, r2, #5
 80227ba:	17db      	asrs	r3, r3, #31
 80227bc:	1ad3      	subs	r3, r2, r3
 80227be:	b29a      	uxth	r2, r3
 80227c0:	69bb      	ldr	r3, [r7, #24]
 80227c2:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 80227c4:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 80227c8:	4618      	mov	r0, r3
 80227ca:	3720      	adds	r7, #32
 80227cc:	46bd      	mov	sp, r7
 80227ce:	bd80      	pop	{r7, pc}
 80227d0:	24000058 	.word	0x24000058
 80227d4:	2402af14 	.word	0x2402af14
 80227d8:	10624dd3 	.word	0x10624dd3

080227dc <dhcp_rebind>:
 *
 * @param netif network interface which must rebind with a DHCP server
 */
static err_t
dhcp_rebind(struct netif *netif)
{
 80227dc:	b580      	push	{r7, lr}
 80227de:	b08a      	sub	sp, #40	@ 0x28
 80227e0:	af02      	add	r7, sp, #8
 80227e2:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80227e4:	687b      	ldr	r3, [r7, #4]
 80227e6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80227e8:	61bb      	str	r3, [r7, #24]
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_REBINDING);
 80227ea:	2104      	movs	r1, #4
 80227ec:	69b8      	ldr	r0, [r7, #24]
 80227ee:	f000 f9ea 	bl	8022bc6 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 80227f2:	f107 030c 	add.w	r3, r7, #12
 80227f6:	2203      	movs	r2, #3
 80227f8:	69b9      	ldr	r1, [r7, #24]
 80227fa:	6878      	ldr	r0, [r7, #4]
 80227fc:	f000 fe7c 	bl	80234f8 <dhcp_create_msg>
 8022800:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8022802:	697b      	ldr	r3, [r7, #20]
 8022804:	2b00      	cmp	r3, #0
 8022806:	d04c      	beq.n	80228a2 <dhcp_rebind+0xc6>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8022808:	697b      	ldr	r3, [r7, #20]
 802280a:	685b      	ldr	r3, [r3, #4]
 802280c:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 802280e:	89b8      	ldrh	r0, [r7, #12]
 8022810:	693b      	ldr	r3, [r7, #16]
 8022812:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022816:	2302      	movs	r3, #2
 8022818:	2239      	movs	r2, #57	@ 0x39
 802281a:	f000 f9ef 	bl	8022bfc <dhcp_option>
 802281e:	4603      	mov	r3, r0
 8022820:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 8022822:	89b8      	ldrh	r0, [r7, #12]
 8022824:	693b      	ldr	r3, [r7, #16]
 8022826:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802282a:	687b      	ldr	r3, [r7, #4]
 802282c:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 802282e:	461a      	mov	r2, r3
 8022830:	f000 fa3e 	bl	8022cb0 <dhcp_option_short>
 8022834:	4603      	mov	r3, r0
 8022836:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8022838:	89b8      	ldrh	r0, [r7, #12]
 802283a:	693b      	ldr	r3, [r7, #16]
 802283c:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022840:	2303      	movs	r3, #3
 8022842:	2237      	movs	r2, #55	@ 0x37
 8022844:	f000 f9da 	bl	8022bfc <dhcp_option>
 8022848:	4603      	mov	r3, r0
 802284a:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 802284c:	2300      	movs	r3, #0
 802284e:	77bb      	strb	r3, [r7, #30]
 8022850:	e00e      	b.n	8022870 <dhcp_rebind+0x94>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 8022852:	89b8      	ldrh	r0, [r7, #12]
 8022854:	693b      	ldr	r3, [r7, #16]
 8022856:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802285a:	7fbb      	ldrb	r3, [r7, #30]
 802285c:	4a28      	ldr	r2, [pc, #160]	@ (8022900 <dhcp_rebind+0x124>)
 802285e:	5cd3      	ldrb	r3, [r2, r3]
 8022860:	461a      	mov	r2, r3
 8022862:	f000 f9ff 	bl	8022c64 <dhcp_option_byte>
 8022866:	4603      	mov	r3, r0
 8022868:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 802286a:	7fbb      	ldrb	r3, [r7, #30]
 802286c:	3301      	adds	r3, #1
 802286e:	77bb      	strb	r3, [r7, #30]
 8022870:	7fbb      	ldrb	r3, [r7, #30]
 8022872:	2b02      	cmp	r3, #2
 8022874:	d9ed      	bls.n	8022852 <dhcp_rebind+0x76>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REBINDING, msg_out, DHCP_DISCOVER, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8022876:	89b8      	ldrh	r0, [r7, #12]
 8022878:	693b      	ldr	r3, [r7, #16]
 802287a:	33f0      	adds	r3, #240	@ 0xf0
 802287c:	697a      	ldr	r2, [r7, #20]
 802287e:	4619      	mov	r1, r3
 8022880:	f000 ff10 	bl	80236a4 <dhcp_option_trailer>

    /* broadcast to server */
    result = udp_sendto_if(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif);
 8022884:	4b1f      	ldr	r3, [pc, #124]	@ (8022904 <dhcp_rebind+0x128>)
 8022886:	6818      	ldr	r0, [r3, #0]
 8022888:	687b      	ldr	r3, [r7, #4]
 802288a:	9300      	str	r3, [sp, #0]
 802288c:	2343      	movs	r3, #67	@ 0x43
 802288e:	4a1e      	ldr	r2, [pc, #120]	@ (8022908 <dhcp_rebind+0x12c>)
 8022890:	6979      	ldr	r1, [r7, #20]
 8022892:	f7fe fd71 	bl	8021378 <udp_sendto_if>
 8022896:	4603      	mov	r3, r0
 8022898:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 802289a:	6978      	ldr	r0, [r7, #20]
 802289c:	f7f7 fe26 	bl	801a4ec <pbuf_free>
 80228a0:	e001      	b.n	80228a6 <dhcp_rebind+0xca>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind: REBINDING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_rebind: could not allocate DHCP request\n"));
    result = ERR_MEM;
 80228a2:	23ff      	movs	r3, #255	@ 0xff
 80228a4:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 80228a6:	69bb      	ldr	r3, [r7, #24]
 80228a8:	799b      	ldrb	r3, [r3, #6]
 80228aa:	2bff      	cmp	r3, #255	@ 0xff
 80228ac:	d005      	beq.n	80228ba <dhcp_rebind+0xde>
    dhcp->tries++;
 80228ae:	69bb      	ldr	r3, [r7, #24]
 80228b0:	799b      	ldrb	r3, [r3, #6]
 80228b2:	3301      	adds	r3, #1
 80228b4:	b2da      	uxtb	r2, r3
 80228b6:	69bb      	ldr	r3, [r7, #24]
 80228b8:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000);
 80228ba:	69bb      	ldr	r3, [r7, #24]
 80228bc:	799b      	ldrb	r3, [r3, #6]
 80228be:	2b09      	cmp	r3, #9
 80228c0:	d809      	bhi.n	80228d6 <dhcp_rebind+0xfa>
 80228c2:	69bb      	ldr	r3, [r7, #24]
 80228c4:	799b      	ldrb	r3, [r3, #6]
 80228c6:	461a      	mov	r2, r3
 80228c8:	0152      	lsls	r2, r2, #5
 80228ca:	1ad2      	subs	r2, r2, r3
 80228cc:	0092      	lsls	r2, r2, #2
 80228ce:	4413      	add	r3, r2
 80228d0:	00db      	lsls	r3, r3, #3
 80228d2:	b29b      	uxth	r3, r3
 80228d4:	e001      	b.n	80228da <dhcp_rebind+0xfe>
 80228d6:	f242 7310 	movw	r3, #10000	@ 0x2710
 80228da:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 80228dc:	89fb      	ldrh	r3, [r7, #14]
 80228de:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 80228e2:	4a0a      	ldr	r2, [pc, #40]	@ (802290c <dhcp_rebind+0x130>)
 80228e4:	fb82 1203 	smull	r1, r2, r2, r3
 80228e8:	1152      	asrs	r2, r2, #5
 80228ea:	17db      	asrs	r3, r3, #31
 80228ec:	1ad3      	subs	r3, r2, r3
 80228ee:	b29a      	uxth	r2, r3
 80228f0:	69bb      	ldr	r3, [r7, #24]
 80228f2:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 80228f4:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 80228f8:	4618      	mov	r0, r3
 80228fa:	3720      	adds	r7, #32
 80228fc:	46bd      	mov	sp, r7
 80228fe:	bd80      	pop	{r7, pc}
 8022900:	24000058 	.word	0x24000058
 8022904:	2402af14 	.word	0x2402af14
 8022908:	08030c6c 	.word	0x08030c6c
 802290c:	10624dd3 	.word	0x10624dd3

08022910 <dhcp_reboot>:
 *
 * @param netif network interface which must reboot
 */
static err_t
dhcp_reboot(struct netif *netif)
{
 8022910:	b5b0      	push	{r4, r5, r7, lr}
 8022912:	b08a      	sub	sp, #40	@ 0x28
 8022914:	af02      	add	r7, sp, #8
 8022916:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022918:	687b      	ldr	r3, [r7, #4]
 802291a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802291c:	61bb      	str	r3, [r7, #24]
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_REBOOTING);
 802291e:	2103      	movs	r1, #3
 8022920:	69b8      	ldr	r0, [r7, #24]
 8022922:	f000 f950 	bl	8022bc6 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 8022926:	f107 030c 	add.w	r3, r7, #12
 802292a:	2203      	movs	r2, #3
 802292c:	69b9      	ldr	r1, [r7, #24]
 802292e:	6878      	ldr	r0, [r7, #4]
 8022930:	f000 fde2 	bl	80234f8 <dhcp_create_msg>
 8022934:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8022936:	697b      	ldr	r3, [r7, #20]
 8022938:	2b00      	cmp	r3, #0
 802293a:	d066      	beq.n	8022a0a <dhcp_reboot+0xfa>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 802293c:	697b      	ldr	r3, [r7, #20]
 802293e:	685b      	ldr	r3, [r3, #4]
 8022940:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 8022942:	89b8      	ldrh	r0, [r7, #12]
 8022944:	693b      	ldr	r3, [r7, #16]
 8022946:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802294a:	2302      	movs	r3, #2
 802294c:	2239      	movs	r2, #57	@ 0x39
 802294e:	f000 f955 	bl	8022bfc <dhcp_option>
 8022952:	4603      	mov	r3, r0
 8022954:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN_MIN_REQUIRED);
 8022956:	89b8      	ldrh	r0, [r7, #12]
 8022958:	693b      	ldr	r3, [r7, #16]
 802295a:	33f0      	adds	r3, #240	@ 0xf0
 802295c:	f44f 7210 	mov.w	r2, #576	@ 0x240
 8022960:	4619      	mov	r1, r3
 8022962:	f000 f9a5 	bl	8022cb0 <dhcp_option_short>
 8022966:	4603      	mov	r3, r0
 8022968:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 802296a:	89b8      	ldrh	r0, [r7, #12]
 802296c:	693b      	ldr	r3, [r7, #16]
 802296e:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022972:	2304      	movs	r3, #4
 8022974:	2232      	movs	r2, #50	@ 0x32
 8022976:	f000 f941 	bl	8022bfc <dhcp_option>
 802297a:	4603      	mov	r3, r0
 802297c:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 802297e:	89bc      	ldrh	r4, [r7, #12]
 8022980:	693b      	ldr	r3, [r7, #16]
 8022982:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8022986:	69bb      	ldr	r3, [r7, #24]
 8022988:	69db      	ldr	r3, [r3, #28]
 802298a:	4618      	mov	r0, r3
 802298c:	f7f6 f8e1 	bl	8018b52 <lwip_htonl>
 8022990:	4603      	mov	r3, r0
 8022992:	461a      	mov	r2, r3
 8022994:	4629      	mov	r1, r5
 8022996:	4620      	mov	r0, r4
 8022998:	f000 f9bc 	bl	8022d14 <dhcp_option_long>
 802299c:	4603      	mov	r3, r0
 802299e:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 80229a0:	89b8      	ldrh	r0, [r7, #12]
 80229a2:	693b      	ldr	r3, [r7, #16]
 80229a4:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80229a8:	2303      	movs	r3, #3
 80229aa:	2237      	movs	r2, #55	@ 0x37
 80229ac:	f000 f926 	bl	8022bfc <dhcp_option>
 80229b0:	4603      	mov	r3, r0
 80229b2:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80229b4:	2300      	movs	r3, #0
 80229b6:	77bb      	strb	r3, [r7, #30]
 80229b8:	e00e      	b.n	80229d8 <dhcp_reboot+0xc8>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 80229ba:	89b8      	ldrh	r0, [r7, #12]
 80229bc:	693b      	ldr	r3, [r7, #16]
 80229be:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80229c2:	7fbb      	ldrb	r3, [r7, #30]
 80229c4:	4a28      	ldr	r2, [pc, #160]	@ (8022a68 <dhcp_reboot+0x158>)
 80229c6:	5cd3      	ldrb	r3, [r2, r3]
 80229c8:	461a      	mov	r2, r3
 80229ca:	f000 f94b 	bl	8022c64 <dhcp_option_byte>
 80229ce:	4603      	mov	r3, r0
 80229d0:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80229d2:	7fbb      	ldrb	r3, [r7, #30]
 80229d4:	3301      	adds	r3, #1
 80229d6:	77bb      	strb	r3, [r7, #30]
 80229d8:	7fbb      	ldrb	r3, [r7, #30]
 80229da:	2b02      	cmp	r3, #2
 80229dc:	d9ed      	bls.n	80229ba <dhcp_reboot+0xaa>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REBOOTING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 80229de:	89b8      	ldrh	r0, [r7, #12]
 80229e0:	693b      	ldr	r3, [r7, #16]
 80229e2:	33f0      	adds	r3, #240	@ 0xf0
 80229e4:	697a      	ldr	r2, [r7, #20]
 80229e6:	4619      	mov	r1, r3
 80229e8:	f000 fe5c 	bl	80236a4 <dhcp_option_trailer>

    /* broadcast to server */
    result = udp_sendto_if(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif);
 80229ec:	4b1f      	ldr	r3, [pc, #124]	@ (8022a6c <dhcp_reboot+0x15c>)
 80229ee:	6818      	ldr	r0, [r3, #0]
 80229f0:	687b      	ldr	r3, [r7, #4]
 80229f2:	9300      	str	r3, [sp, #0]
 80229f4:	2343      	movs	r3, #67	@ 0x43
 80229f6:	4a1e      	ldr	r2, [pc, #120]	@ (8022a70 <dhcp_reboot+0x160>)
 80229f8:	6979      	ldr	r1, [r7, #20]
 80229fa:	f7fe fcbd 	bl	8021378 <udp_sendto_if>
 80229fe:	4603      	mov	r3, r0
 8022a00:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 8022a02:	6978      	ldr	r0, [r7, #20]
 8022a04:	f7f7 fd72 	bl	801a4ec <pbuf_free>
 8022a08:	e001      	b.n	8022a0e <dhcp_reboot+0xfe>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot: REBOOTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_reboot: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8022a0a:	23ff      	movs	r3, #255	@ 0xff
 8022a0c:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 8022a0e:	69bb      	ldr	r3, [r7, #24]
 8022a10:	799b      	ldrb	r3, [r3, #6]
 8022a12:	2bff      	cmp	r3, #255	@ 0xff
 8022a14:	d005      	beq.n	8022a22 <dhcp_reboot+0x112>
    dhcp->tries++;
 8022a16:	69bb      	ldr	r3, [r7, #24]
 8022a18:	799b      	ldrb	r3, [r3, #6]
 8022a1a:	3301      	adds	r3, #1
 8022a1c:	b2da      	uxtb	r2, r3
 8022a1e:	69bb      	ldr	r3, [r7, #24]
 8022a20:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000);
 8022a22:	69bb      	ldr	r3, [r7, #24]
 8022a24:	799b      	ldrb	r3, [r3, #6]
 8022a26:	2b09      	cmp	r3, #9
 8022a28:	d809      	bhi.n	8022a3e <dhcp_reboot+0x12e>
 8022a2a:	69bb      	ldr	r3, [r7, #24]
 8022a2c:	799b      	ldrb	r3, [r3, #6]
 8022a2e:	461a      	mov	r2, r3
 8022a30:	0152      	lsls	r2, r2, #5
 8022a32:	1ad2      	subs	r2, r2, r3
 8022a34:	0092      	lsls	r2, r2, #2
 8022a36:	4413      	add	r3, r2
 8022a38:	00db      	lsls	r3, r3, #3
 8022a3a:	b29b      	uxth	r3, r3
 8022a3c:	e001      	b.n	8022a42 <dhcp_reboot+0x132>
 8022a3e:	f242 7310 	movw	r3, #10000	@ 0x2710
 8022a42:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8022a44:	89fb      	ldrh	r3, [r7, #14]
 8022a46:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8022a4a:	4a0a      	ldr	r2, [pc, #40]	@ (8022a74 <dhcp_reboot+0x164>)
 8022a4c:	fb82 1203 	smull	r1, r2, r2, r3
 8022a50:	1152      	asrs	r2, r2, #5
 8022a52:	17db      	asrs	r3, r3, #31
 8022a54:	1ad3      	subs	r3, r2, r3
 8022a56:	b29a      	uxth	r2, r3
 8022a58:	69bb      	ldr	r3, [r7, #24]
 8022a5a:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8022a5c:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8022a60:	4618      	mov	r0, r3
 8022a62:	3720      	adds	r7, #32
 8022a64:	46bd      	mov	sp, r7
 8022a66:	bdb0      	pop	{r4, r5, r7, pc}
 8022a68:	24000058 	.word	0x24000058
 8022a6c:	2402af14 	.word	0x2402af14
 8022a70:	08030c6c 	.word	0x08030c6c
 8022a74:	10624dd3 	.word	0x10624dd3

08022a78 <dhcp_release_and_stop>:
 *
 * @param netif network interface
 */
void
dhcp_release_and_stop(struct netif *netif)
{
 8022a78:	b5b0      	push	{r4, r5, r7, lr}
 8022a7a:	b08a      	sub	sp, #40	@ 0x28
 8022a7c:	af02      	add	r7, sp, #8
 8022a7e:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022a80:	687b      	ldr	r3, [r7, #4]
 8022a82:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022a84:	61fb      	str	r3, [r7, #28]
  ip_addr_t server_ip_addr;

  LWIP_ASSERT_CORE_LOCKED();
 8022a86:	f7ed fd5d 	bl	8010544 <sys_check_core_locking>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_release_and_stop()\n"));
  if (dhcp == NULL) {
 8022a8a:	69fb      	ldr	r3, [r7, #28]
 8022a8c:	2b00      	cmp	r3, #0
 8022a8e:	f000 8084 	beq.w	8022b9a <dhcp_release_and_stop+0x122>
    return;
  }

  /* already off? -> nothing to do */
  if (dhcp->state == DHCP_STATE_OFF) {
 8022a92:	69fb      	ldr	r3, [r7, #28]
 8022a94:	795b      	ldrb	r3, [r3, #5]
 8022a96:	2b00      	cmp	r3, #0
 8022a98:	f000 8081 	beq.w	8022b9e <dhcp_release_and_stop+0x126>
    return;
  }

  ip_addr_copy(server_ip_addr, dhcp->server_ip_addr);
 8022a9c:	69fb      	ldr	r3, [r7, #28]
 8022a9e:	699b      	ldr	r3, [r3, #24]
 8022aa0:	613b      	str	r3, [r7, #16]

  /* clean old DHCP offer */
  ip_addr_set_zero_ip4(&dhcp->server_ip_addr);
 8022aa2:	69fb      	ldr	r3, [r7, #28]
 8022aa4:	2200      	movs	r2, #0
 8022aa6:	619a      	str	r2, [r3, #24]
  ip4_addr_set_zero(&dhcp->offered_ip_addr);
 8022aa8:	69fb      	ldr	r3, [r7, #28]
 8022aaa:	2200      	movs	r2, #0
 8022aac:	61da      	str	r2, [r3, #28]
  ip4_addr_set_zero(&dhcp->offered_sn_mask);
 8022aae:	69fb      	ldr	r3, [r7, #28]
 8022ab0:	2200      	movs	r2, #0
 8022ab2:	621a      	str	r2, [r3, #32]
  ip4_addr_set_zero(&dhcp->offered_gw_addr);
 8022ab4:	69fb      	ldr	r3, [r7, #28]
 8022ab6:	2200      	movs	r2, #0
 8022ab8:	625a      	str	r2, [r3, #36]	@ 0x24
#if LWIP_DHCP_BOOTP_FILE
  ip4_addr_set_zero(&dhcp->offered_si_addr);
#endif /* LWIP_DHCP_BOOTP_FILE */
  dhcp->offered_t0_lease = dhcp->offered_t1_renew = dhcp->offered_t2_rebind = 0;
 8022aba:	69fb      	ldr	r3, [r7, #28]
 8022abc:	2200      	movs	r2, #0
 8022abe:	631a      	str	r2, [r3, #48]	@ 0x30
 8022ac0:	69fb      	ldr	r3, [r7, #28]
 8022ac2:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 8022ac4:	69fb      	ldr	r3, [r7, #28]
 8022ac6:	62da      	str	r2, [r3, #44]	@ 0x2c
 8022ac8:	69fb      	ldr	r3, [r7, #28]
 8022aca:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8022acc:	69fb      	ldr	r3, [r7, #28]
 8022ace:	629a      	str	r2, [r3, #40]	@ 0x28
  dhcp->t1_renew_time = dhcp->t2_rebind_time = dhcp->lease_used = dhcp->t0_timeout = 0;
 8022ad0:	69fb      	ldr	r3, [r7, #28]
 8022ad2:	2200      	movs	r2, #0
 8022ad4:	829a      	strh	r2, [r3, #20]
 8022ad6:	69fb      	ldr	r3, [r7, #28]
 8022ad8:	8a9a      	ldrh	r2, [r3, #20]
 8022ada:	69fb      	ldr	r3, [r7, #28]
 8022adc:	825a      	strh	r2, [r3, #18]
 8022ade:	69fb      	ldr	r3, [r7, #28]
 8022ae0:	8a5a      	ldrh	r2, [r3, #18]
 8022ae2:	69fb      	ldr	r3, [r7, #28]
 8022ae4:	821a      	strh	r2, [r3, #16]
 8022ae6:	69fb      	ldr	r3, [r7, #28]
 8022ae8:	8a1a      	ldrh	r2, [r3, #16]
 8022aea:	69fb      	ldr	r3, [r7, #28]
 8022aec:	81da      	strh	r2, [r3, #14]

  /* send release message when current IP was assigned via DHCP */
  if (dhcp_supplied_address(netif)) {
 8022aee:	6878      	ldr	r0, [r7, #4]
 8022af0:	f000 fe06 	bl	8023700 <dhcp_supplied_address>
 8022af4:	4603      	mov	r3, r0
 8022af6:	2b00      	cmp	r3, #0
 8022af8:	d03b      	beq.n	8022b72 <dhcp_release_and_stop+0xfa>
    /* create and initialize the DHCP message header */
    struct pbuf *p_out;
    u16_t options_out_len;
    p_out = dhcp_create_msg(netif, dhcp, DHCP_RELEASE, &options_out_len);
 8022afa:	f107 030e 	add.w	r3, r7, #14
 8022afe:	2207      	movs	r2, #7
 8022b00:	69f9      	ldr	r1, [r7, #28]
 8022b02:	6878      	ldr	r0, [r7, #4]
 8022b04:	f000 fcf8 	bl	80234f8 <dhcp_create_msg>
 8022b08:	61b8      	str	r0, [r7, #24]
    if (p_out != NULL) {
 8022b0a:	69bb      	ldr	r3, [r7, #24]
 8022b0c:	2b00      	cmp	r3, #0
 8022b0e:	d030      	beq.n	8022b72 <dhcp_release_and_stop+0xfa>
      struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8022b10:	69bb      	ldr	r3, [r7, #24]
 8022b12:	685b      	ldr	r3, [r3, #4]
 8022b14:	617b      	str	r3, [r7, #20]
      options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_SERVER_ID, 4);
 8022b16:	89f8      	ldrh	r0, [r7, #14]
 8022b18:	697b      	ldr	r3, [r7, #20]
 8022b1a:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022b1e:	2304      	movs	r3, #4
 8022b20:	2236      	movs	r2, #54	@ 0x36
 8022b22:	f000 f86b 	bl	8022bfc <dhcp_option>
 8022b26:	4603      	mov	r3, r0
 8022b28:	81fb      	strh	r3, [r7, #14]
      options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(ip_2_ip4(&server_ip_addr))));
 8022b2a:	89fc      	ldrh	r4, [r7, #14]
 8022b2c:	697b      	ldr	r3, [r7, #20]
 8022b2e:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8022b32:	693b      	ldr	r3, [r7, #16]
 8022b34:	4618      	mov	r0, r3
 8022b36:	f7f6 f80c 	bl	8018b52 <lwip_htonl>
 8022b3a:	4603      	mov	r3, r0
 8022b3c:	461a      	mov	r2, r3
 8022b3e:	4629      	mov	r1, r5
 8022b40:	4620      	mov	r0, r4
 8022b42:	f000 f8e7 	bl	8022d14 <dhcp_option_long>
 8022b46:	4603      	mov	r3, r0
 8022b48:	81fb      	strh	r3, [r7, #14]

      LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, dhcp->state, msg_out, DHCP_RELEASE, &options_out_len);
      dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8022b4a:	89f8      	ldrh	r0, [r7, #14]
 8022b4c:	697b      	ldr	r3, [r7, #20]
 8022b4e:	33f0      	adds	r3, #240	@ 0xf0
 8022b50:	69ba      	ldr	r2, [r7, #24]
 8022b52:	4619      	mov	r1, r3
 8022b54:	f000 fda6 	bl	80236a4 <dhcp_option_trailer>

      udp_sendto_if(dhcp_pcb, p_out, &server_ip_addr, LWIP_IANA_PORT_DHCP_SERVER, netif);
 8022b58:	4b13      	ldr	r3, [pc, #76]	@ (8022ba8 <dhcp_release_and_stop+0x130>)
 8022b5a:	6818      	ldr	r0, [r3, #0]
 8022b5c:	f107 0210 	add.w	r2, r7, #16
 8022b60:	687b      	ldr	r3, [r7, #4]
 8022b62:	9300      	str	r3, [sp, #0]
 8022b64:	2343      	movs	r3, #67	@ 0x43
 8022b66:	69b9      	ldr	r1, [r7, #24]
 8022b68:	f7fe fc06 	bl	8021378 <udp_sendto_if>
      pbuf_free(p_out);
 8022b6c:	69b8      	ldr	r0, [r7, #24]
 8022b6e:	f7f7 fcbd 	bl	801a4ec <pbuf_free>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_release: could not allocate DHCP request\n"));
    }
  }

  /* remove IP address from interface (prevents routing from selecting this interface) */
  netif_set_addr(netif, IP4_ADDR_ANY4, IP4_ADDR_ANY4, IP4_ADDR_ANY4);
 8022b72:	4b0e      	ldr	r3, [pc, #56]	@ (8022bac <dhcp_release_and_stop+0x134>)
 8022b74:	4a0d      	ldr	r2, [pc, #52]	@ (8022bac <dhcp_release_and_stop+0x134>)
 8022b76:	490d      	ldr	r1, [pc, #52]	@ (8022bac <dhcp_release_and_stop+0x134>)
 8022b78:	6878      	ldr	r0, [r7, #4]
 8022b7a:	f7f6 ff6d 	bl	8019a58 <netif_set_addr>
    autoip_stop(netif);
    dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF;
  }
#endif /* LWIP_DHCP_AUTOIP_COOP */

  dhcp_set_state(dhcp, DHCP_STATE_OFF);
 8022b7e:	2100      	movs	r1, #0
 8022b80:	69f8      	ldr	r0, [r7, #28]
 8022b82:	f000 f820 	bl	8022bc6 <dhcp_set_state>

  if (dhcp->pcb_allocated != 0) {
 8022b86:	69fb      	ldr	r3, [r7, #28]
 8022b88:	791b      	ldrb	r3, [r3, #4]
 8022b8a:	2b00      	cmp	r3, #0
 8022b8c:	d008      	beq.n	8022ba0 <dhcp_release_and_stop+0x128>
    dhcp_dec_pcb_refcount(); /* free DHCP PCB if not needed any more */
 8022b8e:	f7fe ff83 	bl	8021a98 <dhcp_dec_pcb_refcount>
    dhcp->pcb_allocated = 0;
 8022b92:	69fb      	ldr	r3, [r7, #28]
 8022b94:	2200      	movs	r2, #0
 8022b96:	711a      	strb	r2, [r3, #4]
 8022b98:	e002      	b.n	8022ba0 <dhcp_release_and_stop+0x128>
    return;
 8022b9a:	bf00      	nop
 8022b9c:	e000      	b.n	8022ba0 <dhcp_release_and_stop+0x128>
    return;
 8022b9e:	bf00      	nop
  }
}
 8022ba0:	3720      	adds	r7, #32
 8022ba2:	46bd      	mov	sp, r7
 8022ba4:	bdb0      	pop	{r4, r5, r7, pc}
 8022ba6:	bf00      	nop
 8022ba8:	2402af14 	.word	0x2402af14
 8022bac:	08030c68 	.word	0x08030c68

08022bb0 <dhcp_stop>:
 * This function calls dhcp_release_and_stop() internally.
 * @deprecated Use dhcp_release_and_stop() instead.
 */
void
dhcp_stop(struct netif *netif)
{
 8022bb0:	b580      	push	{r7, lr}
 8022bb2:	b082      	sub	sp, #8
 8022bb4:	af00      	add	r7, sp, #0
 8022bb6:	6078      	str	r0, [r7, #4]
  dhcp_release_and_stop(netif);
 8022bb8:	6878      	ldr	r0, [r7, #4]
 8022bba:	f7ff ff5d 	bl	8022a78 <dhcp_release_and_stop>
}
 8022bbe:	bf00      	nop
 8022bc0:	3708      	adds	r7, #8
 8022bc2:	46bd      	mov	sp, r7
 8022bc4:	bd80      	pop	{r7, pc}

08022bc6 <dhcp_set_state>:
 *
 * If the state changed, reset the number of tries.
 */
static void
dhcp_set_state(struct dhcp *dhcp, u8_t new_state)
{
 8022bc6:	b480      	push	{r7}
 8022bc8:	b083      	sub	sp, #12
 8022bca:	af00      	add	r7, sp, #0
 8022bcc:	6078      	str	r0, [r7, #4]
 8022bce:	460b      	mov	r3, r1
 8022bd0:	70fb      	strb	r3, [r7, #3]
  if (new_state != dhcp->state) {
 8022bd2:	687b      	ldr	r3, [r7, #4]
 8022bd4:	795b      	ldrb	r3, [r3, #5]
 8022bd6:	78fa      	ldrb	r2, [r7, #3]
 8022bd8:	429a      	cmp	r2, r3
 8022bda:	d008      	beq.n	8022bee <dhcp_set_state+0x28>
    dhcp->state = new_state;
 8022bdc:	687b      	ldr	r3, [r7, #4]
 8022bde:	78fa      	ldrb	r2, [r7, #3]
 8022be0:	715a      	strb	r2, [r3, #5]
    dhcp->tries = 0;
 8022be2:	687b      	ldr	r3, [r7, #4]
 8022be4:	2200      	movs	r2, #0
 8022be6:	719a      	strb	r2, [r3, #6]
    dhcp->request_timeout = 0;
 8022be8:	687b      	ldr	r3, [r7, #4]
 8022bea:	2200      	movs	r2, #0
 8022bec:	811a      	strh	r2, [r3, #8]
  }
}
 8022bee:	bf00      	nop
 8022bf0:	370c      	adds	r7, #12
 8022bf2:	46bd      	mov	sp, r7
 8022bf4:	f85d 7b04 	ldr.w	r7, [sp], #4
 8022bf8:	4770      	bx	lr
	...

08022bfc <dhcp_option>:
 * DHCP message.
 *
 */
static u16_t
dhcp_option(u16_t options_out_len, u8_t *options, u8_t option_type, u8_t option_len)
{
 8022bfc:	b580      	push	{r7, lr}
 8022bfe:	b082      	sub	sp, #8
 8022c00:	af00      	add	r7, sp, #0
 8022c02:	6039      	str	r1, [r7, #0]
 8022c04:	4611      	mov	r1, r2
 8022c06:	461a      	mov	r2, r3
 8022c08:	4603      	mov	r3, r0
 8022c0a:	80fb      	strh	r3, [r7, #6]
 8022c0c:	460b      	mov	r3, r1
 8022c0e:	717b      	strb	r3, [r7, #5]
 8022c10:	4613      	mov	r3, r2
 8022c12:	713b      	strb	r3, [r7, #4]
  LWIP_ASSERT("dhcp_option: options_out_len + 2 + option_len <= DHCP_OPTIONS_LEN", options_out_len + 2U + option_len <= DHCP_OPTIONS_LEN);
 8022c14:	88fa      	ldrh	r2, [r7, #6]
 8022c16:	793b      	ldrb	r3, [r7, #4]
 8022c18:	4413      	add	r3, r2
 8022c1a:	3302      	adds	r3, #2
 8022c1c:	2b44      	cmp	r3, #68	@ 0x44
 8022c1e:	d906      	bls.n	8022c2e <dhcp_option+0x32>
 8022c20:	4b0d      	ldr	r3, [pc, #52]	@ (8022c58 <dhcp_option+0x5c>)
 8022c22:	f240 529a 	movw	r2, #1434	@ 0x59a
 8022c26:	490d      	ldr	r1, [pc, #52]	@ (8022c5c <dhcp_option+0x60>)
 8022c28:	480d      	ldr	r0, [pc, #52]	@ (8022c60 <dhcp_option+0x64>)
 8022c2a:	f006 fed7 	bl	80299dc <iprintf>
  options[options_out_len++] = option_type;
 8022c2e:	88fb      	ldrh	r3, [r7, #6]
 8022c30:	1c5a      	adds	r2, r3, #1
 8022c32:	80fa      	strh	r2, [r7, #6]
 8022c34:	461a      	mov	r2, r3
 8022c36:	683b      	ldr	r3, [r7, #0]
 8022c38:	4413      	add	r3, r2
 8022c3a:	797a      	ldrb	r2, [r7, #5]
 8022c3c:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = option_len;
 8022c3e:	88fb      	ldrh	r3, [r7, #6]
 8022c40:	1c5a      	adds	r2, r3, #1
 8022c42:	80fa      	strh	r2, [r7, #6]
 8022c44:	461a      	mov	r2, r3
 8022c46:	683b      	ldr	r3, [r7, #0]
 8022c48:	4413      	add	r3, r2
 8022c4a:	793a      	ldrb	r2, [r7, #4]
 8022c4c:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 8022c4e:	88fb      	ldrh	r3, [r7, #6]
}
 8022c50:	4618      	mov	r0, r3
 8022c52:	3708      	adds	r7, #8
 8022c54:	46bd      	mov	sp, r7
 8022c56:	bd80      	pop	{r7, pc}
 8022c58:	0802fe9c 	.word	0x0802fe9c
 8022c5c:	08030030 	.word	0x08030030
 8022c60:	0802fefc 	.word	0x0802fefc

08022c64 <dhcp_option_byte>:
 * Concatenate a single byte to the outgoing DHCP message.
 *
 */
static u16_t
dhcp_option_byte(u16_t options_out_len, u8_t *options, u8_t value)
{
 8022c64:	b580      	push	{r7, lr}
 8022c66:	b082      	sub	sp, #8
 8022c68:	af00      	add	r7, sp, #0
 8022c6a:	4603      	mov	r3, r0
 8022c6c:	6039      	str	r1, [r7, #0]
 8022c6e:	80fb      	strh	r3, [r7, #6]
 8022c70:	4613      	mov	r3, r2
 8022c72:	717b      	strb	r3, [r7, #5]
  LWIP_ASSERT("dhcp_option_byte: options_out_len < DHCP_OPTIONS_LEN", options_out_len < DHCP_OPTIONS_LEN);
 8022c74:	88fb      	ldrh	r3, [r7, #6]
 8022c76:	2b43      	cmp	r3, #67	@ 0x43
 8022c78:	d906      	bls.n	8022c88 <dhcp_option_byte+0x24>
 8022c7a:	4b0a      	ldr	r3, [pc, #40]	@ (8022ca4 <dhcp_option_byte+0x40>)
 8022c7c:	f240 52a6 	movw	r2, #1446	@ 0x5a6
 8022c80:	4909      	ldr	r1, [pc, #36]	@ (8022ca8 <dhcp_option_byte+0x44>)
 8022c82:	480a      	ldr	r0, [pc, #40]	@ (8022cac <dhcp_option_byte+0x48>)
 8022c84:	f006 feaa 	bl	80299dc <iprintf>
  options[options_out_len++] = value;
 8022c88:	88fb      	ldrh	r3, [r7, #6]
 8022c8a:	1c5a      	adds	r2, r3, #1
 8022c8c:	80fa      	strh	r2, [r7, #6]
 8022c8e:	461a      	mov	r2, r3
 8022c90:	683b      	ldr	r3, [r7, #0]
 8022c92:	4413      	add	r3, r2
 8022c94:	797a      	ldrb	r2, [r7, #5]
 8022c96:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 8022c98:	88fb      	ldrh	r3, [r7, #6]
}
 8022c9a:	4618      	mov	r0, r3
 8022c9c:	3708      	adds	r7, #8
 8022c9e:	46bd      	mov	sp, r7
 8022ca0:	bd80      	pop	{r7, pc}
 8022ca2:	bf00      	nop
 8022ca4:	0802fe9c 	.word	0x0802fe9c
 8022ca8:	08030074 	.word	0x08030074
 8022cac:	0802fefc 	.word	0x0802fefc

08022cb0 <dhcp_option_short>:

static u16_t
dhcp_option_short(u16_t options_out_len, u8_t *options, u16_t value)
{
 8022cb0:	b580      	push	{r7, lr}
 8022cb2:	b082      	sub	sp, #8
 8022cb4:	af00      	add	r7, sp, #0
 8022cb6:	4603      	mov	r3, r0
 8022cb8:	6039      	str	r1, [r7, #0]
 8022cba:	80fb      	strh	r3, [r7, #6]
 8022cbc:	4613      	mov	r3, r2
 8022cbe:	80bb      	strh	r3, [r7, #4]
  LWIP_ASSERT("dhcp_option_short: options_out_len + 2 <= DHCP_OPTIONS_LEN", options_out_len + 2U <= DHCP_OPTIONS_LEN);
 8022cc0:	88fb      	ldrh	r3, [r7, #6]
 8022cc2:	3302      	adds	r3, #2
 8022cc4:	2b44      	cmp	r3, #68	@ 0x44
 8022cc6:	d906      	bls.n	8022cd6 <dhcp_option_short+0x26>
 8022cc8:	4b0f      	ldr	r3, [pc, #60]	@ (8022d08 <dhcp_option_short+0x58>)
 8022cca:	f240 52ae 	movw	r2, #1454	@ 0x5ae
 8022cce:	490f      	ldr	r1, [pc, #60]	@ (8022d0c <dhcp_option_short+0x5c>)
 8022cd0:	480f      	ldr	r0, [pc, #60]	@ (8022d10 <dhcp_option_short+0x60>)
 8022cd2:	f006 fe83 	bl	80299dc <iprintf>
  options[options_out_len++] = (u8_t)((value & 0xff00U) >> 8);
 8022cd6:	88bb      	ldrh	r3, [r7, #4]
 8022cd8:	0a1b      	lsrs	r3, r3, #8
 8022cda:	b29a      	uxth	r2, r3
 8022cdc:	88fb      	ldrh	r3, [r7, #6]
 8022cde:	1c59      	adds	r1, r3, #1
 8022ce0:	80f9      	strh	r1, [r7, #6]
 8022ce2:	4619      	mov	r1, r3
 8022ce4:	683b      	ldr	r3, [r7, #0]
 8022ce6:	440b      	add	r3, r1
 8022ce8:	b2d2      	uxtb	r2, r2
 8022cea:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t) (value & 0x00ffU);
 8022cec:	88fb      	ldrh	r3, [r7, #6]
 8022cee:	1c5a      	adds	r2, r3, #1
 8022cf0:	80fa      	strh	r2, [r7, #6]
 8022cf2:	461a      	mov	r2, r3
 8022cf4:	683b      	ldr	r3, [r7, #0]
 8022cf6:	4413      	add	r3, r2
 8022cf8:	88ba      	ldrh	r2, [r7, #4]
 8022cfa:	b2d2      	uxtb	r2, r2
 8022cfc:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 8022cfe:	88fb      	ldrh	r3, [r7, #6]
}
 8022d00:	4618      	mov	r0, r3
 8022d02:	3708      	adds	r7, #8
 8022d04:	46bd      	mov	sp, r7
 8022d06:	bd80      	pop	{r7, pc}
 8022d08:	0802fe9c 	.word	0x0802fe9c
 8022d0c:	080300ac 	.word	0x080300ac
 8022d10:	0802fefc 	.word	0x0802fefc

08022d14 <dhcp_option_long>:

static u16_t
dhcp_option_long(u16_t options_out_len, u8_t *options, u32_t value)
{
 8022d14:	b580      	push	{r7, lr}
 8022d16:	b084      	sub	sp, #16
 8022d18:	af00      	add	r7, sp, #0
 8022d1a:	4603      	mov	r3, r0
 8022d1c:	60b9      	str	r1, [r7, #8]
 8022d1e:	607a      	str	r2, [r7, #4]
 8022d20:	81fb      	strh	r3, [r7, #14]
  LWIP_ASSERT("dhcp_option_long: options_out_len + 4 <= DHCP_OPTIONS_LEN", options_out_len + 4U <= DHCP_OPTIONS_LEN);
 8022d22:	89fb      	ldrh	r3, [r7, #14]
 8022d24:	3304      	adds	r3, #4
 8022d26:	2b44      	cmp	r3, #68	@ 0x44
 8022d28:	d906      	bls.n	8022d38 <dhcp_option_long+0x24>
 8022d2a:	4b19      	ldr	r3, [pc, #100]	@ (8022d90 <dhcp_option_long+0x7c>)
 8022d2c:	f240 52b7 	movw	r2, #1463	@ 0x5b7
 8022d30:	4918      	ldr	r1, [pc, #96]	@ (8022d94 <dhcp_option_long+0x80>)
 8022d32:	4819      	ldr	r0, [pc, #100]	@ (8022d98 <dhcp_option_long+0x84>)
 8022d34:	f006 fe52 	bl	80299dc <iprintf>
  options[options_out_len++] = (u8_t)((value & 0xff000000UL) >> 24);
 8022d38:	687b      	ldr	r3, [r7, #4]
 8022d3a:	0e1a      	lsrs	r2, r3, #24
 8022d3c:	89fb      	ldrh	r3, [r7, #14]
 8022d3e:	1c59      	adds	r1, r3, #1
 8022d40:	81f9      	strh	r1, [r7, #14]
 8022d42:	4619      	mov	r1, r3
 8022d44:	68bb      	ldr	r3, [r7, #8]
 8022d46:	440b      	add	r3, r1
 8022d48:	b2d2      	uxtb	r2, r2
 8022d4a:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x00ff0000UL) >> 16);
 8022d4c:	687b      	ldr	r3, [r7, #4]
 8022d4e:	0c1a      	lsrs	r2, r3, #16
 8022d50:	89fb      	ldrh	r3, [r7, #14]
 8022d52:	1c59      	adds	r1, r3, #1
 8022d54:	81f9      	strh	r1, [r7, #14]
 8022d56:	4619      	mov	r1, r3
 8022d58:	68bb      	ldr	r3, [r7, #8]
 8022d5a:	440b      	add	r3, r1
 8022d5c:	b2d2      	uxtb	r2, r2
 8022d5e:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x0000ff00UL) >> 8);
 8022d60:	687b      	ldr	r3, [r7, #4]
 8022d62:	0a1a      	lsrs	r2, r3, #8
 8022d64:	89fb      	ldrh	r3, [r7, #14]
 8022d66:	1c59      	adds	r1, r3, #1
 8022d68:	81f9      	strh	r1, [r7, #14]
 8022d6a:	4619      	mov	r1, r3
 8022d6c:	68bb      	ldr	r3, [r7, #8]
 8022d6e:	440b      	add	r3, r1
 8022d70:	b2d2      	uxtb	r2, r2
 8022d72:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x000000ffUL));
 8022d74:	89fb      	ldrh	r3, [r7, #14]
 8022d76:	1c5a      	adds	r2, r3, #1
 8022d78:	81fa      	strh	r2, [r7, #14]
 8022d7a:	461a      	mov	r2, r3
 8022d7c:	68bb      	ldr	r3, [r7, #8]
 8022d7e:	4413      	add	r3, r2
 8022d80:	687a      	ldr	r2, [r7, #4]
 8022d82:	b2d2      	uxtb	r2, r2
 8022d84:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 8022d86:	89fb      	ldrh	r3, [r7, #14]
}
 8022d88:	4618      	mov	r0, r3
 8022d8a:	3710      	adds	r7, #16
 8022d8c:	46bd      	mov	sp, r7
 8022d8e:	bd80      	pop	{r7, pc}
 8022d90:	0802fe9c 	.word	0x0802fe9c
 8022d94:	080300e8 	.word	0x080300e8
 8022d98:	0802fefc 	.word	0x0802fefc

08022d9c <dhcp_parse_reply>:
 * use that further on.
 *
 */
static err_t
dhcp_parse_reply(struct pbuf *p, struct dhcp *dhcp)
{
 8022d9c:	b580      	push	{r7, lr}
 8022d9e:	b092      	sub	sp, #72	@ 0x48
 8022da0:	af00      	add	r7, sp, #0
 8022da2:	6078      	str	r0, [r7, #4]
 8022da4:	6039      	str	r1, [r7, #0]
  u16_t offset;
  u16_t offset_max;
  u16_t options_idx;
  u16_t options_idx_max;
  struct pbuf *q;
  int parse_file_as_options = 0;
 8022da6:	2300      	movs	r3, #0
 8022da8:	633b      	str	r3, [r7, #48]	@ 0x30
  int parse_sname_as_options = 0;
 8022daa:	2300      	movs	r3, #0
 8022dac:	62fb      	str	r3, [r7, #44]	@ 0x2c
#endif

  LWIP_UNUSED_ARG(dhcp);

  /* clear received options */
  dhcp_clear_all_options(dhcp);
 8022dae:	2208      	movs	r2, #8
 8022db0:	2100      	movs	r1, #0
 8022db2:	48b8      	ldr	r0, [pc, #736]	@ (8023094 <dhcp_parse_reply+0x2f8>)
 8022db4:	f006 ffa4 	bl	8029d00 <memset>
  /* check that beginning of dhcp_msg (up to and including chaddr) is in first pbuf */
  if (p->len < DHCP_SNAME_OFS) {
 8022db8:	687b      	ldr	r3, [r7, #4]
 8022dba:	895b      	ldrh	r3, [r3, #10]
 8022dbc:	2b2b      	cmp	r3, #43	@ 0x2b
 8022dbe:	d802      	bhi.n	8022dc6 <dhcp_parse_reply+0x2a>
    return ERR_BUF;
 8022dc0:	f06f 0301 	mvn.w	r3, #1
 8022dc4:	e2b8      	b.n	8023338 <dhcp_parse_reply+0x59c>
  }
  msg_in = (struct dhcp_msg *)p->payload;
 8022dc6:	687b      	ldr	r3, [r7, #4]
 8022dc8:	685b      	ldr	r3, [r3, #4]
 8022dca:	61fb      	str	r3, [r7, #28]
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* parse options */

  /* start with options field */
  options_idx = DHCP_OPTIONS_OFS;
 8022dcc:	23f0      	movs	r3, #240	@ 0xf0
 8022dce:	87bb      	strh	r3, [r7, #60]	@ 0x3c
  /* parse options to the end of the received packet */
  options_idx_max = p->tot_len;
 8022dd0:	687b      	ldr	r3, [r7, #4]
 8022dd2:	891b      	ldrh	r3, [r3, #8]
 8022dd4:	877b      	strh	r3, [r7, #58]	@ 0x3a
again:
  q = p;
 8022dd6:	687b      	ldr	r3, [r7, #4]
 8022dd8:	637b      	str	r3, [r7, #52]	@ 0x34
  while ((q != NULL) && (options_idx >= q->len)) {
 8022dda:	e00c      	b.n	8022df6 <dhcp_parse_reply+0x5a>
    options_idx = (u16_t)(options_idx - q->len);
 8022ddc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022dde:	895b      	ldrh	r3, [r3, #10]
 8022de0:	8fba      	ldrh	r2, [r7, #60]	@ 0x3c
 8022de2:	1ad3      	subs	r3, r2, r3
 8022de4:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = (u16_t)(options_idx_max - q->len);
 8022de6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022de8:	895b      	ldrh	r3, [r3, #10]
 8022dea:	8f7a      	ldrh	r2, [r7, #58]	@ 0x3a
 8022dec:	1ad3      	subs	r3, r2, r3
 8022dee:	877b      	strh	r3, [r7, #58]	@ 0x3a
    q = q->next;
 8022df0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022df2:	681b      	ldr	r3, [r3, #0]
 8022df4:	637b      	str	r3, [r7, #52]	@ 0x34
  while ((q != NULL) && (options_idx >= q->len)) {
 8022df6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022df8:	2b00      	cmp	r3, #0
 8022dfa:	d004      	beq.n	8022e06 <dhcp_parse_reply+0x6a>
 8022dfc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022dfe:	895b      	ldrh	r3, [r3, #10]
 8022e00:	8fba      	ldrh	r2, [r7, #60]	@ 0x3c
 8022e02:	429a      	cmp	r2, r3
 8022e04:	d2ea      	bcs.n	8022ddc <dhcp_parse_reply+0x40>
  }
  if (q == NULL) {
 8022e06:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022e08:	2b00      	cmp	r3, #0
 8022e0a:	d102      	bne.n	8022e12 <dhcp_parse_reply+0x76>
    return ERR_BUF;
 8022e0c:	f06f 0301 	mvn.w	r3, #1
 8022e10:	e292      	b.n	8023338 <dhcp_parse_reply+0x59c>
  }
  offset = options_idx;
 8022e12:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8022e14:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
  offset_max = options_idx_max;
 8022e18:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8022e1a:	87fb      	strh	r3, [r7, #62]	@ 0x3e
  options = (u8_t *)q->payload;
 8022e1c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022e1e:	685b      	ldr	r3, [r3, #4]
 8022e20:	643b      	str	r3, [r7, #64]	@ 0x40
  /* at least 1 byte to read and no end marker, then at least 3 bytes to read? */
  while ((q != NULL) && (offset < offset_max) && (options[offset] != DHCP_OPTION_END)) {
 8022e22:	e247      	b.n	80232b4 <dhcp_parse_reply+0x518>
    u8_t op = options[offset];
 8022e24:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8022e28:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8022e2a:	4413      	add	r3, r2
 8022e2c:	781b      	ldrb	r3, [r3, #0]
 8022e2e:	76fb      	strb	r3, [r7, #27]
    u8_t len;
    u8_t decode_len = 0;
 8022e30:	2300      	movs	r3, #0
 8022e32:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
    int decode_idx = -1;
 8022e36:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8022e3a:	627b      	str	r3, [r7, #36]	@ 0x24
    u16_t val_offset = (u16_t)(offset + 2);
 8022e3c:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8022e40:	3302      	adds	r3, #2
 8022e42:	847b      	strh	r3, [r7, #34]	@ 0x22
    if (val_offset < offset) {
 8022e44:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 8022e46:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8022e4a:	429a      	cmp	r2, r3
 8022e4c:	d202      	bcs.n	8022e54 <dhcp_parse_reply+0xb8>
      /* overflow */
      return ERR_BUF;
 8022e4e:	f06f 0301 	mvn.w	r3, #1
 8022e52:	e271      	b.n	8023338 <dhcp_parse_reply+0x59c>
    }
    /* len byte might be in the next pbuf */
    if ((offset + 1) < q->len) {
 8022e54:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8022e58:	3301      	adds	r3, #1
 8022e5a:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 8022e5c:	8952      	ldrh	r2, [r2, #10]
 8022e5e:	4293      	cmp	r3, r2
 8022e60:	da08      	bge.n	8022e74 <dhcp_parse_reply+0xd8>
      len = options[offset + 1];
 8022e62:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8022e66:	3301      	adds	r3, #1
 8022e68:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8022e6a:	4413      	add	r3, r2
 8022e6c:	781b      	ldrb	r3, [r3, #0]
 8022e6e:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
 8022e72:	e00b      	b.n	8022e8c <dhcp_parse_reply+0xf0>
    } else {
      len = (q->next != NULL ? ((u8_t *)q->next->payload)[0] : 0);
 8022e74:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022e76:	681b      	ldr	r3, [r3, #0]
 8022e78:	2b00      	cmp	r3, #0
 8022e7a:	d004      	beq.n	8022e86 <dhcp_parse_reply+0xea>
 8022e7c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022e7e:	681b      	ldr	r3, [r3, #0]
 8022e80:	685b      	ldr	r3, [r3, #4]
 8022e82:	781b      	ldrb	r3, [r3, #0]
 8022e84:	e000      	b.n	8022e88 <dhcp_parse_reply+0xec>
 8022e86:	2300      	movs	r3, #0
 8022e88:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
    }
    /* LWIP_DEBUGF(DHCP_DEBUG, ("msg_offset=%"U16_F", q->len=%"U16_F, msg_offset, q->len)); */
    decode_len = len;
 8022e8c:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8022e90:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
    switch (op) {
 8022e94:	7efb      	ldrb	r3, [r7, #27]
 8022e96:	2b3b      	cmp	r3, #59	@ 0x3b
 8022e98:	f200 812c 	bhi.w	80230f4 <dhcp_parse_reply+0x358>
 8022e9c:	a201      	add	r2, pc, #4	@ (adr r2, 8022ea4 <dhcp_parse_reply+0x108>)
 8022e9e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8022ea2:	bf00      	nop
 8022ea4:	08022f95 	.word	0x08022f95
 8022ea8:	08022fa5 	.word	0x08022fa5
 8022eac:	080230f5 	.word	0x080230f5
 8022eb0:	08022fc7 	.word	0x08022fc7
 8022eb4:	080230f5 	.word	0x080230f5
 8022eb8:	080230f5 	.word	0x080230f5
 8022ebc:	080230f5 	.word	0x080230f5
 8022ec0:	080230f5 	.word	0x080230f5
 8022ec4:	080230f5 	.word	0x080230f5
 8022ec8:	080230f5 	.word	0x080230f5
 8022ecc:	080230f5 	.word	0x080230f5
 8022ed0:	080230f5 	.word	0x080230f5
 8022ed4:	080230f5 	.word	0x080230f5
 8022ed8:	080230f5 	.word	0x080230f5
 8022edc:	080230f5 	.word	0x080230f5
 8022ee0:	080230f5 	.word	0x080230f5
 8022ee4:	080230f5 	.word	0x080230f5
 8022ee8:	080230f5 	.word	0x080230f5
 8022eec:	080230f5 	.word	0x080230f5
 8022ef0:	080230f5 	.word	0x080230f5
 8022ef4:	080230f5 	.word	0x080230f5
 8022ef8:	080230f5 	.word	0x080230f5
 8022efc:	080230f5 	.word	0x080230f5
 8022f00:	080230f5 	.word	0x080230f5
 8022f04:	080230f5 	.word	0x080230f5
 8022f08:	080230f5 	.word	0x080230f5
 8022f0c:	080230f5 	.word	0x080230f5
 8022f10:	080230f5 	.word	0x080230f5
 8022f14:	080230f5 	.word	0x080230f5
 8022f18:	080230f5 	.word	0x080230f5
 8022f1c:	080230f5 	.word	0x080230f5
 8022f20:	080230f5 	.word	0x080230f5
 8022f24:	080230f5 	.word	0x080230f5
 8022f28:	080230f5 	.word	0x080230f5
 8022f2c:	080230f5 	.word	0x080230f5
 8022f30:	080230f5 	.word	0x080230f5
 8022f34:	080230f5 	.word	0x080230f5
 8022f38:	080230f5 	.word	0x080230f5
 8022f3c:	080230f5 	.word	0x080230f5
 8022f40:	080230f5 	.word	0x080230f5
 8022f44:	080230f5 	.word	0x080230f5
 8022f48:	080230f5 	.word	0x080230f5
 8022f4c:	080230f5 	.word	0x080230f5
 8022f50:	080230f5 	.word	0x080230f5
 8022f54:	080230f5 	.word	0x080230f5
 8022f58:	080230f5 	.word	0x080230f5
 8022f5c:	080230f5 	.word	0x080230f5
 8022f60:	080230f5 	.word	0x080230f5
 8022f64:	080230f5 	.word	0x080230f5
 8022f68:	080230f5 	.word	0x080230f5
 8022f6c:	080230f5 	.word	0x080230f5
 8022f70:	08022ff3 	.word	0x08022ff3
 8022f74:	08023015 	.word	0x08023015
 8022f78:	08023051 	.word	0x08023051
 8022f7c:	08023073 	.word	0x08023073
 8022f80:	080230f5 	.word	0x080230f5
 8022f84:	080230f5 	.word	0x080230f5
 8022f88:	080230f5 	.word	0x080230f5
 8022f8c:	080230b1 	.word	0x080230b1
 8022f90:	080230d3 	.word	0x080230d3
      /* case(DHCP_OPTION_END): handled above */
      case (DHCP_OPTION_PAD):
        /* special option: no len encoded */
        decode_len = len = 0;
 8022f94:	2300      	movs	r3, #0
 8022f96:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
 8022f9a:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8022f9e:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        /* will be increased below */
        break;
 8022fa2:	e0ab      	b.n	80230fc <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_SUBNET_MASK):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8022fa4:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8022fa8:	2b04      	cmp	r3, #4
 8022faa:	d009      	beq.n	8022fc0 <dhcp_parse_reply+0x224>
 8022fac:	4b3a      	ldr	r3, [pc, #232]	@ (8023098 <dhcp_parse_reply+0x2fc>)
 8022fae:	f240 622e 	movw	r2, #1582	@ 0x62e
 8022fb2:	493a      	ldr	r1, [pc, #232]	@ (802309c <dhcp_parse_reply+0x300>)
 8022fb4:	483a      	ldr	r0, [pc, #232]	@ (80230a0 <dhcp_parse_reply+0x304>)
 8022fb6:	f006 fd11 	bl	80299dc <iprintf>
 8022fba:	f06f 0305 	mvn.w	r3, #5
 8022fbe:	e1bb      	b.n	8023338 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_SUBNET_MASK;
 8022fc0:	2306      	movs	r3, #6
 8022fc2:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8022fc4:	e09a      	b.n	80230fc <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_ROUTER):
        decode_len = 4; /* only copy the first given router */
 8022fc6:	2304      	movs	r3, #4
 8022fc8:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
 8022fcc:	f897 202b 	ldrb.w	r2, [r7, #43]	@ 0x2b
 8022fd0:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8022fd4:	429a      	cmp	r2, r3
 8022fd6:	d209      	bcs.n	8022fec <dhcp_parse_reply+0x250>
 8022fd8:	4b2f      	ldr	r3, [pc, #188]	@ (8023098 <dhcp_parse_reply+0x2fc>)
 8022fda:	f240 6233 	movw	r2, #1587	@ 0x633
 8022fde:	4931      	ldr	r1, [pc, #196]	@ (80230a4 <dhcp_parse_reply+0x308>)
 8022fe0:	482f      	ldr	r0, [pc, #188]	@ (80230a0 <dhcp_parse_reply+0x304>)
 8022fe2:	f006 fcfb 	bl	80299dc <iprintf>
 8022fe6:	f06f 0305 	mvn.w	r3, #5
 8022fea:	e1a5      	b.n	8023338 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_ROUTER;
 8022fec:	2307      	movs	r3, #7
 8022fee:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8022ff0:	e084      	b.n	80230fc <dhcp_parse_reply+0x360>
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
        decode_idx = DHCP_OPTION_IDX_DNS_SERVER;
        break;
#endif /* LWIP_DHCP_PROVIDE_DNS_SERVERS */
      case (DHCP_OPTION_LEASE_TIME):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8022ff2:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8022ff6:	2b04      	cmp	r3, #4
 8022ff8:	d009      	beq.n	802300e <dhcp_parse_reply+0x272>
 8022ffa:	4b27      	ldr	r3, [pc, #156]	@ (8023098 <dhcp_parse_reply+0x2fc>)
 8022ffc:	f240 6241 	movw	r2, #1601	@ 0x641
 8023000:	4926      	ldr	r1, [pc, #152]	@ (802309c <dhcp_parse_reply+0x300>)
 8023002:	4827      	ldr	r0, [pc, #156]	@ (80230a0 <dhcp_parse_reply+0x304>)
 8023004:	f006 fcea 	bl	80299dc <iprintf>
 8023008:	f06f 0305 	mvn.w	r3, #5
 802300c:	e194      	b.n	8023338 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_LEASE_TIME;
 802300e:	2303      	movs	r3, #3
 8023010:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8023012:	e073      	b.n	80230fc <dhcp_parse_reply+0x360>
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
        decode_idx = DHCP_OPTION_IDX_NTP_SERVER;
        break;
#endif /* LWIP_DHCP_GET_NTP_SRV*/
      case (DHCP_OPTION_OVERLOAD):
        LWIP_ERROR("len == 1", len == 1, return ERR_VAL;);
 8023014:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023018:	2b01      	cmp	r3, #1
 802301a:	d009      	beq.n	8023030 <dhcp_parse_reply+0x294>
 802301c:	4b1e      	ldr	r3, [pc, #120]	@ (8023098 <dhcp_parse_reply+0x2fc>)
 802301e:	f240 624f 	movw	r2, #1615	@ 0x64f
 8023022:	4921      	ldr	r1, [pc, #132]	@ (80230a8 <dhcp_parse_reply+0x30c>)
 8023024:	481e      	ldr	r0, [pc, #120]	@ (80230a0 <dhcp_parse_reply+0x304>)
 8023026:	f006 fcd9 	bl	80299dc <iprintf>
 802302a:	f06f 0305 	mvn.w	r3, #5
 802302e:	e183      	b.n	8023338 <dhcp_parse_reply+0x59c>
        /* decode overload only in options, not in file/sname: invalid packet */
        LWIP_ERROR("overload in file/sname", options_idx == DHCP_OPTIONS_OFS, return ERR_VAL;);
 8023030:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8023032:	2bf0      	cmp	r3, #240	@ 0xf0
 8023034:	d009      	beq.n	802304a <dhcp_parse_reply+0x2ae>
 8023036:	4b18      	ldr	r3, [pc, #96]	@ (8023098 <dhcp_parse_reply+0x2fc>)
 8023038:	f240 6251 	movw	r2, #1617	@ 0x651
 802303c:	491b      	ldr	r1, [pc, #108]	@ (80230ac <dhcp_parse_reply+0x310>)
 802303e:	4818      	ldr	r0, [pc, #96]	@ (80230a0 <dhcp_parse_reply+0x304>)
 8023040:	f006 fccc 	bl	80299dc <iprintf>
 8023044:	f06f 0305 	mvn.w	r3, #5
 8023048:	e176      	b.n	8023338 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_OVERLOAD;
 802304a:	2300      	movs	r3, #0
 802304c:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 802304e:	e055      	b.n	80230fc <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_MESSAGE_TYPE):
        LWIP_ERROR("len == 1", len == 1, return ERR_VAL;);
 8023050:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023054:	2b01      	cmp	r3, #1
 8023056:	d009      	beq.n	802306c <dhcp_parse_reply+0x2d0>
 8023058:	4b0f      	ldr	r3, [pc, #60]	@ (8023098 <dhcp_parse_reply+0x2fc>)
 802305a:	f240 6255 	movw	r2, #1621	@ 0x655
 802305e:	4912      	ldr	r1, [pc, #72]	@ (80230a8 <dhcp_parse_reply+0x30c>)
 8023060:	480f      	ldr	r0, [pc, #60]	@ (80230a0 <dhcp_parse_reply+0x304>)
 8023062:	f006 fcbb 	bl	80299dc <iprintf>
 8023066:	f06f 0305 	mvn.w	r3, #5
 802306a:	e165      	b.n	8023338 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_MSG_TYPE;
 802306c:	2301      	movs	r3, #1
 802306e:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8023070:	e044      	b.n	80230fc <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_SERVER_ID):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8023072:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023076:	2b04      	cmp	r3, #4
 8023078:	d009      	beq.n	802308e <dhcp_parse_reply+0x2f2>
 802307a:	4b07      	ldr	r3, [pc, #28]	@ (8023098 <dhcp_parse_reply+0x2fc>)
 802307c:	f240 6259 	movw	r2, #1625	@ 0x659
 8023080:	4906      	ldr	r1, [pc, #24]	@ (802309c <dhcp_parse_reply+0x300>)
 8023082:	4807      	ldr	r0, [pc, #28]	@ (80230a0 <dhcp_parse_reply+0x304>)
 8023084:	f006 fcaa 	bl	80299dc <iprintf>
 8023088:	f06f 0305 	mvn.w	r3, #5
 802308c:	e154      	b.n	8023338 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_SERVER_ID;
 802308e:	2302      	movs	r3, #2
 8023090:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8023092:	e033      	b.n	80230fc <dhcp_parse_reply+0x360>
 8023094:	2402af0c 	.word	0x2402af0c
 8023098:	0802fe9c 	.word	0x0802fe9c
 802309c:	08030124 	.word	0x08030124
 80230a0:	0802fefc 	.word	0x0802fefc
 80230a4:	08030130 	.word	0x08030130
 80230a8:	08030144 	.word	0x08030144
 80230ac:	08030150 	.word	0x08030150
      case (DHCP_OPTION_T1):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 80230b0:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 80230b4:	2b04      	cmp	r3, #4
 80230b6:	d009      	beq.n	80230cc <dhcp_parse_reply+0x330>
 80230b8:	4ba1      	ldr	r3, [pc, #644]	@ (8023340 <dhcp_parse_reply+0x5a4>)
 80230ba:	f240 625d 	movw	r2, #1629	@ 0x65d
 80230be:	49a1      	ldr	r1, [pc, #644]	@ (8023344 <dhcp_parse_reply+0x5a8>)
 80230c0:	48a1      	ldr	r0, [pc, #644]	@ (8023348 <dhcp_parse_reply+0x5ac>)
 80230c2:	f006 fc8b 	bl	80299dc <iprintf>
 80230c6:	f06f 0305 	mvn.w	r3, #5
 80230ca:	e135      	b.n	8023338 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_T1;
 80230cc:	2304      	movs	r3, #4
 80230ce:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 80230d0:	e014      	b.n	80230fc <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_T2):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 80230d2:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 80230d6:	2b04      	cmp	r3, #4
 80230d8:	d009      	beq.n	80230ee <dhcp_parse_reply+0x352>
 80230da:	4b99      	ldr	r3, [pc, #612]	@ (8023340 <dhcp_parse_reply+0x5a4>)
 80230dc:	f240 6261 	movw	r2, #1633	@ 0x661
 80230e0:	4998      	ldr	r1, [pc, #608]	@ (8023344 <dhcp_parse_reply+0x5a8>)
 80230e2:	4899      	ldr	r0, [pc, #612]	@ (8023348 <dhcp_parse_reply+0x5ac>)
 80230e4:	f006 fc7a 	bl	80299dc <iprintf>
 80230e8:	f06f 0305 	mvn.w	r3, #5
 80230ec:	e124      	b.n	8023338 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_T2;
 80230ee:	2305      	movs	r3, #5
 80230f0:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 80230f2:	e003      	b.n	80230fc <dhcp_parse_reply+0x360>
      default:
        decode_len = 0;
 80230f4:	2300      	movs	r3, #0
 80230f6:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        LWIP_DEBUGF(DHCP_DEBUG, ("skipping option %"U16_F" in options\n", (u16_t)op));
        LWIP_HOOK_DHCP_PARSE_OPTION(ip_current_netif(), dhcp, dhcp->state, msg_in,
                                    dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE) ? (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE) : 0,
                                    op, len, q, val_offset);
        break;
 80230fa:	bf00      	nop
    }
    if (op == DHCP_OPTION_PAD) {
 80230fc:	7efb      	ldrb	r3, [r7, #27]
 80230fe:	2b00      	cmp	r3, #0
 8023100:	d105      	bne.n	802310e <dhcp_parse_reply+0x372>
      offset++;
 8023102:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023106:	3301      	adds	r3, #1
 8023108:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
 802310c:	e0a4      	b.n	8023258 <dhcp_parse_reply+0x4bc>
    } else {
      if (offset + len + 2 > 0xFFFF) {
 802310e:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8023112:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023116:	4413      	add	r3, r2
 8023118:	f64f 72fd 	movw	r2, #65533	@ 0xfffd
 802311c:	4293      	cmp	r3, r2
 802311e:	dd02      	ble.n	8023126 <dhcp_parse_reply+0x38a>
        /* overflow */
        return ERR_BUF;
 8023120:	f06f 0301 	mvn.w	r3, #1
 8023124:	e108      	b.n	8023338 <dhcp_parse_reply+0x59c>
      }
      offset = (u16_t)(offset + len + 2);
 8023126:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 802312a:	b29a      	uxth	r2, r3
 802312c:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023130:	4413      	add	r3, r2
 8023132:	b29b      	uxth	r3, r3
 8023134:	3302      	adds	r3, #2
 8023136:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      if (decode_len > 0) {
 802313a:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 802313e:	2b00      	cmp	r3, #0
 8023140:	f000 808a 	beq.w	8023258 <dhcp_parse_reply+0x4bc>
        u32_t value = 0;
 8023144:	2300      	movs	r3, #0
 8023146:	60fb      	str	r3, [r7, #12]
        u16_t copy_len;
decode_next:
        LWIP_ASSERT("check decode_idx", decode_idx >= 0 && decode_idx < DHCP_OPTION_IDX_MAX);
 8023148:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802314a:	2b00      	cmp	r3, #0
 802314c:	db02      	blt.n	8023154 <dhcp_parse_reply+0x3b8>
 802314e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023150:	2b07      	cmp	r3, #7
 8023152:	dd06      	ble.n	8023162 <dhcp_parse_reply+0x3c6>
 8023154:	4b7a      	ldr	r3, [pc, #488]	@ (8023340 <dhcp_parse_reply+0x5a4>)
 8023156:	f44f 62cf 	mov.w	r2, #1656	@ 0x678
 802315a:	497c      	ldr	r1, [pc, #496]	@ (802334c <dhcp_parse_reply+0x5b0>)
 802315c:	487a      	ldr	r0, [pc, #488]	@ (8023348 <dhcp_parse_reply+0x5ac>)
 802315e:	f006 fc3d 	bl	80299dc <iprintf>
        if (!dhcp_option_given(dhcp, decode_idx)) {
 8023162:	4a7b      	ldr	r2, [pc, #492]	@ (8023350 <dhcp_parse_reply+0x5b4>)
 8023164:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023166:	4413      	add	r3, r2
 8023168:	781b      	ldrb	r3, [r3, #0]
 802316a:	2b00      	cmp	r3, #0
 802316c:	d174      	bne.n	8023258 <dhcp_parse_reply+0x4bc>
          copy_len = LWIP_MIN(decode_len, 4);
 802316e:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8023172:	2b04      	cmp	r3, #4
 8023174:	bf28      	it	cs
 8023176:	2304      	movcs	r3, #4
 8023178:	b2db      	uxtb	r3, r3
 802317a:	833b      	strh	r3, [r7, #24]
          if (pbuf_copy_partial(q, &value, copy_len, val_offset) != copy_len) {
 802317c:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 802317e:	8b3a      	ldrh	r2, [r7, #24]
 8023180:	f107 010c 	add.w	r1, r7, #12
 8023184:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 8023186:	f7f7 fbb7 	bl	801a8f8 <pbuf_copy_partial>
 802318a:	4603      	mov	r3, r0
 802318c:	461a      	mov	r2, r3
 802318e:	8b3b      	ldrh	r3, [r7, #24]
 8023190:	4293      	cmp	r3, r2
 8023192:	d002      	beq.n	802319a <dhcp_parse_reply+0x3fe>
            return ERR_BUF;
 8023194:	f06f 0301 	mvn.w	r3, #1
 8023198:	e0ce      	b.n	8023338 <dhcp_parse_reply+0x59c>
          }
          if (decode_len > 4) {
 802319a:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 802319e:	2b04      	cmp	r3, #4
 80231a0:	d933      	bls.n	802320a <dhcp_parse_reply+0x46e>
            /* decode more than one u32_t */
            u16_t next_val_offset;
            LWIP_ERROR("decode_len %% 4 == 0", decode_len % 4 == 0, return ERR_VAL;);
 80231a2:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 80231a6:	f003 0303 	and.w	r3, r3, #3
 80231aa:	b2db      	uxtb	r3, r3
 80231ac:	2b00      	cmp	r3, #0
 80231ae:	d009      	beq.n	80231c4 <dhcp_parse_reply+0x428>
 80231b0:	4b63      	ldr	r3, [pc, #396]	@ (8023340 <dhcp_parse_reply+0x5a4>)
 80231b2:	f240 6281 	movw	r2, #1665	@ 0x681
 80231b6:	4967      	ldr	r1, [pc, #412]	@ (8023354 <dhcp_parse_reply+0x5b8>)
 80231b8:	4863      	ldr	r0, [pc, #396]	@ (8023348 <dhcp_parse_reply+0x5ac>)
 80231ba:	f006 fc0f 	bl	80299dc <iprintf>
 80231be:	f06f 0305 	mvn.w	r3, #5
 80231c2:	e0b9      	b.n	8023338 <dhcp_parse_reply+0x59c>
            dhcp_got_option(dhcp, decode_idx);
 80231c4:	4a62      	ldr	r2, [pc, #392]	@ (8023350 <dhcp_parse_reply+0x5b4>)
 80231c6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80231c8:	4413      	add	r3, r2
 80231ca:	2201      	movs	r2, #1
 80231cc:	701a      	strb	r2, [r3, #0]
            dhcp_set_option_value(dhcp, decode_idx, lwip_htonl(value));
 80231ce:	68fb      	ldr	r3, [r7, #12]
 80231d0:	4618      	mov	r0, r3
 80231d2:	f7f5 fcbe 	bl	8018b52 <lwip_htonl>
 80231d6:	4602      	mov	r2, r0
 80231d8:	495f      	ldr	r1, [pc, #380]	@ (8023358 <dhcp_parse_reply+0x5bc>)
 80231da:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80231dc:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
            decode_len = (u8_t)(decode_len - 4);
 80231e0:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 80231e4:	3b04      	subs	r3, #4
 80231e6:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
            next_val_offset = (u16_t)(val_offset + 4);
 80231ea:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80231ec:	3304      	adds	r3, #4
 80231ee:	82fb      	strh	r3, [r7, #22]
            if (next_val_offset < val_offset) {
 80231f0:	8afa      	ldrh	r2, [r7, #22]
 80231f2:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80231f4:	429a      	cmp	r2, r3
 80231f6:	d202      	bcs.n	80231fe <dhcp_parse_reply+0x462>
              /* overflow */
              return ERR_BUF;
 80231f8:	f06f 0301 	mvn.w	r3, #1
 80231fc:	e09c      	b.n	8023338 <dhcp_parse_reply+0x59c>
            }
            val_offset = next_val_offset;
 80231fe:	8afb      	ldrh	r3, [r7, #22]
 8023200:	847b      	strh	r3, [r7, #34]	@ 0x22
            decode_idx++;
 8023202:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023204:	3301      	adds	r3, #1
 8023206:	627b      	str	r3, [r7, #36]	@ 0x24
            goto decode_next;
 8023208:	e79e      	b.n	8023148 <dhcp_parse_reply+0x3ac>
          } else if (decode_len == 4) {
 802320a:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 802320e:	2b04      	cmp	r3, #4
 8023210:	d106      	bne.n	8023220 <dhcp_parse_reply+0x484>
            value = lwip_ntohl(value);
 8023212:	68fb      	ldr	r3, [r7, #12]
 8023214:	4618      	mov	r0, r3
 8023216:	f7f5 fc9c 	bl	8018b52 <lwip_htonl>
 802321a:	4603      	mov	r3, r0
 802321c:	60fb      	str	r3, [r7, #12]
 802321e:	e011      	b.n	8023244 <dhcp_parse_reply+0x4a8>
          } else {
            LWIP_ERROR("invalid decode_len", decode_len == 1, return ERR_VAL;);
 8023220:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8023224:	2b01      	cmp	r3, #1
 8023226:	d009      	beq.n	802323c <dhcp_parse_reply+0x4a0>
 8023228:	4b45      	ldr	r3, [pc, #276]	@ (8023340 <dhcp_parse_reply+0x5a4>)
 802322a:	f44f 62d2 	mov.w	r2, #1680	@ 0x690
 802322e:	494b      	ldr	r1, [pc, #300]	@ (802335c <dhcp_parse_reply+0x5c0>)
 8023230:	4845      	ldr	r0, [pc, #276]	@ (8023348 <dhcp_parse_reply+0x5ac>)
 8023232:	f006 fbd3 	bl	80299dc <iprintf>
 8023236:	f06f 0305 	mvn.w	r3, #5
 802323a:	e07d      	b.n	8023338 <dhcp_parse_reply+0x59c>
            value = ((u8_t *)&value)[0];
 802323c:	f107 030c 	add.w	r3, r7, #12
 8023240:	781b      	ldrb	r3, [r3, #0]
 8023242:	60fb      	str	r3, [r7, #12]
          }
          dhcp_got_option(dhcp, decode_idx);
 8023244:	4a42      	ldr	r2, [pc, #264]	@ (8023350 <dhcp_parse_reply+0x5b4>)
 8023246:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023248:	4413      	add	r3, r2
 802324a:	2201      	movs	r2, #1
 802324c:	701a      	strb	r2, [r3, #0]
          dhcp_set_option_value(dhcp, decode_idx, value);
 802324e:	68fa      	ldr	r2, [r7, #12]
 8023250:	4941      	ldr	r1, [pc, #260]	@ (8023358 <dhcp_parse_reply+0x5bc>)
 8023252:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023254:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
        }
      }
    }
    if (offset >= q->len) {
 8023258:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802325a:	895b      	ldrh	r3, [r3, #10]
 802325c:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8023260:	429a      	cmp	r2, r3
 8023262:	d327      	bcc.n	80232b4 <dhcp_parse_reply+0x518>
      offset = (u16_t)(offset - q->len);
 8023264:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023266:	895b      	ldrh	r3, [r3, #10]
 8023268:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 802326c:	1ad3      	subs	r3, r2, r3
 802326e:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      offset_max = (u16_t)(offset_max - q->len);
 8023272:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023274:	895b      	ldrh	r3, [r3, #10]
 8023276:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 8023278:	1ad3      	subs	r3, r2, r3
 802327a:	87fb      	strh	r3, [r7, #62]	@ 0x3e
      if (offset < offset_max) {
 802327c:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8023280:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8023282:	429a      	cmp	r2, r3
 8023284:	d213      	bcs.n	80232ae <dhcp_parse_reply+0x512>
        q = q->next;
 8023286:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023288:	681b      	ldr	r3, [r3, #0]
 802328a:	637b      	str	r3, [r7, #52]	@ 0x34
        LWIP_ERROR("next pbuf was null", q != NULL, return ERR_VAL;);
 802328c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802328e:	2b00      	cmp	r3, #0
 8023290:	d109      	bne.n	80232a6 <dhcp_parse_reply+0x50a>
 8023292:	4b2b      	ldr	r3, [pc, #172]	@ (8023340 <dhcp_parse_reply+0x5a4>)
 8023294:	f240 629d 	movw	r2, #1693	@ 0x69d
 8023298:	4931      	ldr	r1, [pc, #196]	@ (8023360 <dhcp_parse_reply+0x5c4>)
 802329a:	482b      	ldr	r0, [pc, #172]	@ (8023348 <dhcp_parse_reply+0x5ac>)
 802329c:	f006 fb9e 	bl	80299dc <iprintf>
 80232a0:	f06f 0305 	mvn.w	r3, #5
 80232a4:	e048      	b.n	8023338 <dhcp_parse_reply+0x59c>
        options = (u8_t *)q->payload;
 80232a6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80232a8:	685b      	ldr	r3, [r3, #4]
 80232aa:	643b      	str	r3, [r7, #64]	@ 0x40
 80232ac:	e002      	b.n	80232b4 <dhcp_parse_reply+0x518>
      } else {
        /* We've run out of bytes, probably no end marker. Don't proceed. */
        return ERR_BUF;
 80232ae:	f06f 0301 	mvn.w	r3, #1
 80232b2:	e041      	b.n	8023338 <dhcp_parse_reply+0x59c>
  while ((q != NULL) && (offset < offset_max) && (options[offset] != DHCP_OPTION_END)) {
 80232b4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80232b6:	2b00      	cmp	r3, #0
 80232b8:	d00c      	beq.n	80232d4 <dhcp_parse_reply+0x538>
 80232ba:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 80232be:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 80232c0:	429a      	cmp	r2, r3
 80232c2:	d207      	bcs.n	80232d4 <dhcp_parse_reply+0x538>
 80232c4:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 80232c8:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 80232ca:	4413      	add	r3, r2
 80232cc:	781b      	ldrb	r3, [r3, #0]
 80232ce:	2bff      	cmp	r3, #255	@ 0xff
 80232d0:	f47f ada8 	bne.w	8022e24 <dhcp_parse_reply+0x88>
      }
    }
  }
  /* is this an overloaded message? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_OVERLOAD)) {
 80232d4:	4b1e      	ldr	r3, [pc, #120]	@ (8023350 <dhcp_parse_reply+0x5b4>)
 80232d6:	781b      	ldrb	r3, [r3, #0]
 80232d8:	2b00      	cmp	r3, #0
 80232da:	d018      	beq.n	802330e <dhcp_parse_reply+0x572>
    u32_t overload = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_OVERLOAD);
 80232dc:	4b1e      	ldr	r3, [pc, #120]	@ (8023358 <dhcp_parse_reply+0x5bc>)
 80232de:	681b      	ldr	r3, [r3, #0]
 80232e0:	613b      	str	r3, [r7, #16]
    dhcp_clear_option(dhcp, DHCP_OPTION_IDX_OVERLOAD);
 80232e2:	4b1b      	ldr	r3, [pc, #108]	@ (8023350 <dhcp_parse_reply+0x5b4>)
 80232e4:	2200      	movs	r2, #0
 80232e6:	701a      	strb	r2, [r3, #0]
    if (overload == DHCP_OVERLOAD_FILE) {
 80232e8:	693b      	ldr	r3, [r7, #16]
 80232ea:	2b01      	cmp	r3, #1
 80232ec:	d102      	bne.n	80232f4 <dhcp_parse_reply+0x558>
      parse_file_as_options = 1;
 80232ee:	2301      	movs	r3, #1
 80232f0:	633b      	str	r3, [r7, #48]	@ 0x30
 80232f2:	e00c      	b.n	802330e <dhcp_parse_reply+0x572>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded file field\n"));
    } else if (overload == DHCP_OVERLOAD_SNAME) {
 80232f4:	693b      	ldr	r3, [r7, #16]
 80232f6:	2b02      	cmp	r3, #2
 80232f8:	d102      	bne.n	8023300 <dhcp_parse_reply+0x564>
      parse_sname_as_options = 1;
 80232fa:	2301      	movs	r3, #1
 80232fc:	62fb      	str	r3, [r7, #44]	@ 0x2c
 80232fe:	e006      	b.n	802330e <dhcp_parse_reply+0x572>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname field\n"));
    } else if (overload == DHCP_OVERLOAD_SNAME_FILE) {
 8023300:	693b      	ldr	r3, [r7, #16]
 8023302:	2b03      	cmp	r3, #3
 8023304:	d103      	bne.n	802330e <dhcp_parse_reply+0x572>
      parse_sname_as_options = 1;
 8023306:	2301      	movs	r3, #1
 8023308:	62fb      	str	r3, [r7, #44]	@ 0x2c
      parse_file_as_options = 1;
 802330a:	2301      	movs	r3, #1
 802330c:	633b      	str	r3, [r7, #48]	@ 0x30
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname and file field\n"));
    } else {
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("invalid overload option: %d\n", (int)overload));
    }
  }
  if (parse_file_as_options) {
 802330e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8023310:	2b00      	cmp	r3, #0
 8023312:	d006      	beq.n	8023322 <dhcp_parse_reply+0x586>
    /* if both are overloaded, parse file first and then sname (RFC 2131 ch. 4.1) */
    parse_file_as_options = 0;
 8023314:	2300      	movs	r3, #0
 8023316:	633b      	str	r3, [r7, #48]	@ 0x30
    options_idx = DHCP_FILE_OFS;
 8023318:	236c      	movs	r3, #108	@ 0x6c
 802331a:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = DHCP_FILE_OFS + DHCP_FILE_LEN;
 802331c:	23ec      	movs	r3, #236	@ 0xec
 802331e:	877b      	strh	r3, [r7, #58]	@ 0x3a
#if LWIP_DHCP_BOOTP_FILE
    file_overloaded = 1;
#endif
    goto again;
 8023320:	e559      	b.n	8022dd6 <dhcp_parse_reply+0x3a>
  } else if (parse_sname_as_options) {
 8023322:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8023324:	2b00      	cmp	r3, #0
 8023326:	d006      	beq.n	8023336 <dhcp_parse_reply+0x59a>
    parse_sname_as_options = 0;
 8023328:	2300      	movs	r3, #0
 802332a:	62fb      	str	r3, [r7, #44]	@ 0x2c
    options_idx = DHCP_SNAME_OFS;
 802332c:	232c      	movs	r3, #44	@ 0x2c
 802332e:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = DHCP_SNAME_OFS + DHCP_SNAME_LEN;
 8023330:	236c      	movs	r3, #108	@ 0x6c
 8023332:	877b      	strh	r3, [r7, #58]	@ 0x3a
    goto again;
 8023334:	e54f      	b.n	8022dd6 <dhcp_parse_reply+0x3a>
    }
    /* make sure the string is really NULL-terminated */
    dhcp->boot_file_name[DHCP_FILE_LEN-1] = 0;
  }
#endif /* LWIP_DHCP_BOOTP_FILE */ 
  return ERR_OK;
 8023336:	2300      	movs	r3, #0
}
 8023338:	4618      	mov	r0, r3
 802333a:	3748      	adds	r7, #72	@ 0x48
 802333c:	46bd      	mov	sp, r7
 802333e:	bd80      	pop	{r7, pc}
 8023340:	0802fe9c 	.word	0x0802fe9c
 8023344:	08030124 	.word	0x08030124
 8023348:	0802fefc 	.word	0x0802fefc
 802334c:	08030168 	.word	0x08030168
 8023350:	2402af0c 	.word	0x2402af0c
 8023354:	0803017c 	.word	0x0803017c
 8023358:	2402aeec 	.word	0x2402aeec
 802335c:	08030194 	.word	0x08030194
 8023360:	080301a8 	.word	0x080301a8

08023364 <dhcp_recv>:
/**
 * If an incoming DHCP message is in response to us, then trigger the state machine
 */
static void
dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, const ip_addr_t *addr, u16_t port)
{
 8023364:	b580      	push	{r7, lr}
 8023366:	b08a      	sub	sp, #40	@ 0x28
 8023368:	af00      	add	r7, sp, #0
 802336a:	60f8      	str	r0, [r7, #12]
 802336c:	60b9      	str	r1, [r7, #8]
 802336e:	607a      	str	r2, [r7, #4]
 8023370:	603b      	str	r3, [r7, #0]
  struct netif *netif = ip_current_input_netif();
 8023372:	4b5e      	ldr	r3, [pc, #376]	@ (80234ec <dhcp_recv+0x188>)
 8023374:	685b      	ldr	r3, [r3, #4]
 8023376:	61fb      	str	r3, [r7, #28]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023378:	69fb      	ldr	r3, [r7, #28]
 802337a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802337c:	61bb      	str	r3, [r7, #24]
  struct dhcp_msg *reply_msg = (struct dhcp_msg *)p->payload;
 802337e:	687b      	ldr	r3, [r7, #4]
 8023380:	685b      	ldr	r3, [r3, #4]
 8023382:	617b      	str	r3, [r7, #20]
  struct dhcp_msg *msg_in;

  LWIP_UNUSED_ARG(arg);

  /* Caught DHCP message from netif that does not have DHCP enabled? -> not interested */
  if ((dhcp == NULL) || (dhcp->pcb_allocated == 0)) {
 8023384:	69bb      	ldr	r3, [r7, #24]
 8023386:	2b00      	cmp	r3, #0
 8023388:	f000 809a 	beq.w	80234c0 <dhcp_recv+0x15c>
 802338c:	69bb      	ldr	r3, [r7, #24]
 802338e:	791b      	ldrb	r3, [r3, #4]
 8023390:	2b00      	cmp	r3, #0
 8023392:	f000 8095 	beq.w	80234c0 <dhcp_recv+0x15c>
  /* prevent warnings about unused arguments */
  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(addr);
  LWIP_UNUSED_ARG(port);

  if (p->len < DHCP_MIN_REPLY_LEN) {
 8023396:	687b      	ldr	r3, [r7, #4]
 8023398:	895b      	ldrh	r3, [r3, #10]
 802339a:	2b2b      	cmp	r3, #43	@ 0x2b
 802339c:	f240 8092 	bls.w	80234c4 <dhcp_recv+0x160>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP reply message or pbuf too short\n"));
    goto free_pbuf_and_return;
  }

  if (reply_msg->op != DHCP_BOOTREPLY) {
 80233a0:	697b      	ldr	r3, [r7, #20]
 80233a2:	781b      	ldrb	r3, [r3, #0]
 80233a4:	2b02      	cmp	r3, #2
 80233a6:	f040 808f 	bne.w	80234c8 <dhcp_recv+0x164>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("not a DHCP reply message, but type %"U16_F"\n", (u16_t)reply_msg->op));
    goto free_pbuf_and_return;
  }
  /* iterate through hardware address and match against DHCP message */
  for (i = 0; i < netif->hwaddr_len && i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 80233aa:	2300      	movs	r3, #0
 80233ac:	74fb      	strb	r3, [r7, #19]
 80233ae:	e00e      	b.n	80233ce <dhcp_recv+0x6a>
    if (netif->hwaddr[i] != reply_msg->chaddr[i]) {
 80233b0:	7cfb      	ldrb	r3, [r7, #19]
 80233b2:	69fa      	ldr	r2, [r7, #28]
 80233b4:	4413      	add	r3, r2
 80233b6:	f893 202a 	ldrb.w	r2, [r3, #42]	@ 0x2a
 80233ba:	7cfb      	ldrb	r3, [r7, #19]
 80233bc:	6979      	ldr	r1, [r7, #20]
 80233be:	440b      	add	r3, r1
 80233c0:	7f1b      	ldrb	r3, [r3, #28]
 80233c2:	429a      	cmp	r2, r3
 80233c4:	f040 8082 	bne.w	80234cc <dhcp_recv+0x168>
  for (i = 0; i < netif->hwaddr_len && i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 80233c8:	7cfb      	ldrb	r3, [r7, #19]
 80233ca:	3301      	adds	r3, #1
 80233cc:	74fb      	strb	r3, [r7, #19]
 80233ce:	69fb      	ldr	r3, [r7, #28]
 80233d0:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 80233d4:	7cfa      	ldrb	r2, [r7, #19]
 80233d6:	429a      	cmp	r2, r3
 80233d8:	d202      	bcs.n	80233e0 <dhcp_recv+0x7c>
 80233da:	7cfb      	ldrb	r3, [r7, #19]
 80233dc:	2b05      	cmp	r3, #5
 80233de:	d9e7      	bls.n	80233b0 <dhcp_recv+0x4c>
                   (u16_t)i, (u16_t)netif->hwaddr[i], (u16_t)i, (u16_t)reply_msg->chaddr[i]));
      goto free_pbuf_and_return;
    }
  }
  /* match transaction ID against what we expected */
  if (lwip_ntohl(reply_msg->xid) != dhcp->xid) {
 80233e0:	697b      	ldr	r3, [r7, #20]
 80233e2:	685b      	ldr	r3, [r3, #4]
 80233e4:	4618      	mov	r0, r3
 80233e6:	f7f5 fbb4 	bl	8018b52 <lwip_htonl>
 80233ea:	4602      	mov	r2, r0
 80233ec:	69bb      	ldr	r3, [r7, #24]
 80233ee:	681b      	ldr	r3, [r3, #0]
 80233f0:	429a      	cmp	r2, r3
 80233f2:	d16d      	bne.n	80234d0 <dhcp_recv+0x16c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING,
                ("transaction id mismatch reply_msg->xid(%"X32_F")!=dhcp->xid(%"X32_F")\n", lwip_ntohl(reply_msg->xid), dhcp->xid));
    goto free_pbuf_and_return;
  }
  /* option fields could be unfold? */
  if (dhcp_parse_reply(p, dhcp) != ERR_OK) {
 80233f4:	69b9      	ldr	r1, [r7, #24]
 80233f6:	6878      	ldr	r0, [r7, #4]
 80233f8:	f7ff fcd0 	bl	8022d9c <dhcp_parse_reply>
 80233fc:	4603      	mov	r3, r0
 80233fe:	2b00      	cmp	r3, #0
 8023400:	d168      	bne.n	80234d4 <dhcp_recv+0x170>
    goto free_pbuf_and_return;
  }

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("searching DHCP_OPTION_MESSAGE_TYPE\n"));
  /* obtain pointer to DHCP message type */
  if (!dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE)) {
 8023402:	4b3b      	ldr	r3, [pc, #236]	@ (80234f0 <dhcp_recv+0x18c>)
 8023404:	785b      	ldrb	r3, [r3, #1]
 8023406:	2b00      	cmp	r3, #0
 8023408:	d066      	beq.n	80234d8 <dhcp_recv+0x174>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP_OPTION_MESSAGE_TYPE option not found\n"));
    goto free_pbuf_and_return;
  }

  msg_in = (struct dhcp_msg *)p->payload;
 802340a:	687b      	ldr	r3, [r7, #4]
 802340c:	685b      	ldr	r3, [r3, #4]
 802340e:	627b      	str	r3, [r7, #36]	@ 0x24
  /* read DHCP message type */
  msg_type = (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE);
 8023410:	4b38      	ldr	r3, [pc, #224]	@ (80234f4 <dhcp_recv+0x190>)
 8023412:	685b      	ldr	r3, [r3, #4]
 8023414:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  /* message type is DHCP ACK? */
  if (msg_type == DHCP_ACK) {
 8023418:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 802341c:	2b05      	cmp	r3, #5
 802341e:	d12a      	bne.n	8023476 <dhcp_recv+0x112>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_ACK received\n"));
    /* in requesting state? */
    if (dhcp->state == DHCP_STATE_REQUESTING) {
 8023420:	69bb      	ldr	r3, [r7, #24]
 8023422:	795b      	ldrb	r3, [r3, #5]
 8023424:	2b01      	cmp	r3, #1
 8023426:	d112      	bne.n	802344e <dhcp_recv+0xea>
      dhcp_handle_ack(netif, msg_in);
 8023428:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 802342a:	69f8      	ldr	r0, [r7, #28]
 802342c:	f7fe fe00 	bl	8022030 <dhcp_handle_ack>
#if DHCP_DOES_ARP_CHECK
      if ((netif->flags & NETIF_FLAG_ETHARP) != 0) {
 8023430:	69fb      	ldr	r3, [r7, #28]
 8023432:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8023436:	f003 0308 	and.w	r3, r3, #8
 802343a:	2b00      	cmp	r3, #0
 802343c:	d003      	beq.n	8023446 <dhcp_recv+0xe2>
        /* check if the acknowledged lease address is already in use */
        dhcp_check(netif);
 802343e:	69f8      	ldr	r0, [r7, #28]
 8023440:	f7fe fb6e 	bl	8021b20 <dhcp_check>
 8023444:	e04b      	b.n	80234de <dhcp_recv+0x17a>
      } else {
        /* bind interface to the acknowledged lease address */
        dhcp_bind(netif);
 8023446:	69f8      	ldr	r0, [r7, #28]
 8023448:	f7ff f852 	bl	80224f0 <dhcp_bind>
 802344c:	e047      	b.n	80234de <dhcp_recv+0x17a>
      /* bind interface to the acknowledged lease address */
      dhcp_bind(netif);
#endif
    }
    /* already bound to the given lease address? */
    else if ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REBINDING) ||
 802344e:	69bb      	ldr	r3, [r7, #24]
 8023450:	795b      	ldrb	r3, [r3, #5]
 8023452:	2b03      	cmp	r3, #3
 8023454:	d007      	beq.n	8023466 <dhcp_recv+0x102>
 8023456:	69bb      	ldr	r3, [r7, #24]
 8023458:	795b      	ldrb	r3, [r3, #5]
 802345a:	2b04      	cmp	r3, #4
 802345c:	d003      	beq.n	8023466 <dhcp_recv+0x102>
             (dhcp->state == DHCP_STATE_RENEWING)) {
 802345e:	69bb      	ldr	r3, [r7, #24]
 8023460:	795b      	ldrb	r3, [r3, #5]
    else if ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REBINDING) ||
 8023462:	2b05      	cmp	r3, #5
 8023464:	d13b      	bne.n	80234de <dhcp_recv+0x17a>
      dhcp_handle_ack(netif, msg_in);
 8023466:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8023468:	69f8      	ldr	r0, [r7, #28]
 802346a:	f7fe fde1 	bl	8022030 <dhcp_handle_ack>
      dhcp_bind(netif);
 802346e:	69f8      	ldr	r0, [r7, #28]
 8023470:	f7ff f83e 	bl	80224f0 <dhcp_bind>
 8023474:	e033      	b.n	80234de <dhcp_recv+0x17a>
    }
  }
  /* received a DHCP_NAK in appropriate state? */
  else if ((msg_type == DHCP_NAK) &&
 8023476:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 802347a:	2b06      	cmp	r3, #6
 802347c:	d113      	bne.n	80234a6 <dhcp_recv+0x142>
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 802347e:	69bb      	ldr	r3, [r7, #24]
 8023480:	795b      	ldrb	r3, [r3, #5]
  else if ((msg_type == DHCP_NAK) &&
 8023482:	2b03      	cmp	r3, #3
 8023484:	d00b      	beq.n	802349e <dhcp_recv+0x13a>
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 8023486:	69bb      	ldr	r3, [r7, #24]
 8023488:	795b      	ldrb	r3, [r3, #5]
 802348a:	2b01      	cmp	r3, #1
 802348c:	d007      	beq.n	802349e <dhcp_recv+0x13a>
            (dhcp->state == DHCP_STATE_REBINDING) || (dhcp->state == DHCP_STATE_RENEWING  ))) {
 802348e:	69bb      	ldr	r3, [r7, #24]
 8023490:	795b      	ldrb	r3, [r3, #5]
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 8023492:	2b04      	cmp	r3, #4
 8023494:	d003      	beq.n	802349e <dhcp_recv+0x13a>
            (dhcp->state == DHCP_STATE_REBINDING) || (dhcp->state == DHCP_STATE_RENEWING  ))) {
 8023496:	69bb      	ldr	r3, [r7, #24]
 8023498:	795b      	ldrb	r3, [r3, #5]
 802349a:	2b05      	cmp	r3, #5
 802349c:	d103      	bne.n	80234a6 <dhcp_recv+0x142>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_NAK received\n"));
    dhcp_handle_nak(netif);
 802349e:	69f8      	ldr	r0, [r7, #28]
 80234a0:	f7fe fb24 	bl	8021aec <dhcp_handle_nak>
 80234a4:	e01b      	b.n	80234de <dhcp_recv+0x17a>
  }
  /* received a DHCP_OFFER in DHCP_STATE_SELECTING state? */
  else if ((msg_type == DHCP_OFFER) && (dhcp->state == DHCP_STATE_SELECTING)) {
 80234a6:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80234aa:	2b02      	cmp	r3, #2
 80234ac:	d116      	bne.n	80234dc <dhcp_recv+0x178>
 80234ae:	69bb      	ldr	r3, [r7, #24]
 80234b0:	795b      	ldrb	r3, [r3, #5]
 80234b2:	2b06      	cmp	r3, #6
 80234b4:	d112      	bne.n	80234dc <dhcp_recv+0x178>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_OFFER received in DHCP_STATE_SELECTING state\n"));
    /* remember offered lease */
    dhcp_handle_offer(netif, msg_in);
 80234b6:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 80234b8:	69f8      	ldr	r0, [r7, #28]
 80234ba:	f7fe fb65 	bl	8021b88 <dhcp_handle_offer>
 80234be:	e00e      	b.n	80234de <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 80234c0:	bf00      	nop
 80234c2:	e00c      	b.n	80234de <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 80234c4:	bf00      	nop
 80234c6:	e00a      	b.n	80234de <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 80234c8:	bf00      	nop
 80234ca:	e008      	b.n	80234de <dhcp_recv+0x17a>
      goto free_pbuf_and_return;
 80234cc:	bf00      	nop
 80234ce:	e006      	b.n	80234de <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 80234d0:	bf00      	nop
 80234d2:	e004      	b.n	80234de <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 80234d4:	bf00      	nop
 80234d6:	e002      	b.n	80234de <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 80234d8:	bf00      	nop
 80234da:	e000      	b.n	80234de <dhcp_recv+0x17a>
  }

free_pbuf_and_return:
 80234dc:	bf00      	nop
  pbuf_free(p);
 80234de:	6878      	ldr	r0, [r7, #4]
 80234e0:	f7f7 f804 	bl	801a4ec <pbuf_free>
}
 80234e4:	bf00      	nop
 80234e6:	3728      	adds	r7, #40	@ 0x28
 80234e8:	46bd      	mov	sp, r7
 80234ea:	bd80      	pop	{r7, pc}
 80234ec:	24024338 	.word	0x24024338
 80234f0:	2402af0c 	.word	0x2402af0c
 80234f4:	2402aeec 	.word	0x2402aeec

080234f8 <dhcp_create_msg>:
 * @param dhcp dhcp control struct
 * @param message_type message type of the request
 */
static struct pbuf *
dhcp_create_msg(struct netif *netif, struct dhcp *dhcp, u8_t message_type, u16_t *options_out_len)
{
 80234f8:	b580      	push	{r7, lr}
 80234fa:	b088      	sub	sp, #32
 80234fc:	af00      	add	r7, sp, #0
 80234fe:	60f8      	str	r0, [r7, #12]
 8023500:	60b9      	str	r1, [r7, #8]
 8023502:	603b      	str	r3, [r7, #0]
 8023504:	4613      	mov	r3, r2
 8023506:	71fb      	strb	r3, [r7, #7]
  if (!xid_initialised) {
    xid = DHCP_GLOBAL_XID;
    xid_initialised = !xid_initialised;
  }
#endif
  LWIP_ERROR("dhcp_create_msg: netif != NULL", (netif != NULL), return NULL;);
 8023508:	68fb      	ldr	r3, [r7, #12]
 802350a:	2b00      	cmp	r3, #0
 802350c:	d108      	bne.n	8023520 <dhcp_create_msg+0x28>
 802350e:	4b5f      	ldr	r3, [pc, #380]	@ (802368c <dhcp_create_msg+0x194>)
 8023510:	f240 7269 	movw	r2, #1897	@ 0x769
 8023514:	495e      	ldr	r1, [pc, #376]	@ (8023690 <dhcp_create_msg+0x198>)
 8023516:	485f      	ldr	r0, [pc, #380]	@ (8023694 <dhcp_create_msg+0x19c>)
 8023518:	f006 fa60 	bl	80299dc <iprintf>
 802351c:	2300      	movs	r3, #0
 802351e:	e0b1      	b.n	8023684 <dhcp_create_msg+0x18c>
  LWIP_ERROR("dhcp_create_msg: dhcp != NULL", (dhcp != NULL), return NULL;);
 8023520:	68bb      	ldr	r3, [r7, #8]
 8023522:	2b00      	cmp	r3, #0
 8023524:	d108      	bne.n	8023538 <dhcp_create_msg+0x40>
 8023526:	4b59      	ldr	r3, [pc, #356]	@ (802368c <dhcp_create_msg+0x194>)
 8023528:	f240 726a 	movw	r2, #1898	@ 0x76a
 802352c:	495a      	ldr	r1, [pc, #360]	@ (8023698 <dhcp_create_msg+0x1a0>)
 802352e:	4859      	ldr	r0, [pc, #356]	@ (8023694 <dhcp_create_msg+0x19c>)
 8023530:	f006 fa54 	bl	80299dc <iprintf>
 8023534:	2300      	movs	r3, #0
 8023536:	e0a5      	b.n	8023684 <dhcp_create_msg+0x18c>
  p_out = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcp_msg), PBUF_RAM);
 8023538:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802353c:	f44f 719a 	mov.w	r1, #308	@ 0x134
 8023540:	2036      	movs	r0, #54	@ 0x36
 8023542:	f7f6 fcbd 	bl	8019ec0 <pbuf_alloc>
 8023546:	61b8      	str	r0, [r7, #24]
  if (p_out == NULL) {
 8023548:	69bb      	ldr	r3, [r7, #24]
 802354a:	2b00      	cmp	r3, #0
 802354c:	d101      	bne.n	8023552 <dhcp_create_msg+0x5a>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_create_msg(): could not allocate pbuf\n"));
    return NULL;
 802354e:	2300      	movs	r3, #0
 8023550:	e098      	b.n	8023684 <dhcp_create_msg+0x18c>
  }
  LWIP_ASSERT("dhcp_create_msg: check that first pbuf can hold struct dhcp_msg",
 8023552:	69bb      	ldr	r3, [r7, #24]
 8023554:	895b      	ldrh	r3, [r3, #10]
 8023556:	f5b3 7f9a 	cmp.w	r3, #308	@ 0x134
 802355a:	d206      	bcs.n	802356a <dhcp_create_msg+0x72>
 802355c:	4b4b      	ldr	r3, [pc, #300]	@ (802368c <dhcp_create_msg+0x194>)
 802355e:	f240 7271 	movw	r2, #1905	@ 0x771
 8023562:	494e      	ldr	r1, [pc, #312]	@ (802369c <dhcp_create_msg+0x1a4>)
 8023564:	484b      	ldr	r0, [pc, #300]	@ (8023694 <dhcp_create_msg+0x19c>)
 8023566:	f006 fa39 	bl	80299dc <iprintf>
              (p_out->len >= sizeof(struct dhcp_msg)));

  /* DHCP_REQUEST should reuse 'xid' from DHCPOFFER */
  if ((message_type != DHCP_REQUEST) || (dhcp->state == DHCP_STATE_REBOOTING)) {
 802356a:	79fb      	ldrb	r3, [r7, #7]
 802356c:	2b03      	cmp	r3, #3
 802356e:	d103      	bne.n	8023578 <dhcp_create_msg+0x80>
 8023570:	68bb      	ldr	r3, [r7, #8]
 8023572:	795b      	ldrb	r3, [r3, #5]
 8023574:	2b03      	cmp	r3, #3
 8023576:	d10d      	bne.n	8023594 <dhcp_create_msg+0x9c>
    /* reuse transaction identifier in retransmissions */
    if (dhcp->tries == 0) {
 8023578:	68bb      	ldr	r3, [r7, #8]
 802357a:	799b      	ldrb	r3, [r3, #6]
 802357c:	2b00      	cmp	r3, #0
 802357e:	d105      	bne.n	802358c <dhcp_create_msg+0x94>
#if DHCP_CREATE_RAND_XID && defined(LWIP_RAND)
      xid = LWIP_RAND();
 8023580:	f004 ff02 	bl	8028388 <rand>
 8023584:	4603      	mov	r3, r0
 8023586:	461a      	mov	r2, r3
 8023588:	4b45      	ldr	r3, [pc, #276]	@ (80236a0 <dhcp_create_msg+0x1a8>)
 802358a:	601a      	str	r2, [r3, #0]
#else /* DHCP_CREATE_RAND_XID && defined(LWIP_RAND) */
      xid++;
#endif /* DHCP_CREATE_RAND_XID && defined(LWIP_RAND) */
    }
    dhcp->xid = xid;
 802358c:	4b44      	ldr	r3, [pc, #272]	@ (80236a0 <dhcp_create_msg+0x1a8>)
 802358e:	681a      	ldr	r2, [r3, #0]
 8023590:	68bb      	ldr	r3, [r7, #8]
 8023592:	601a      	str	r2, [r3, #0]
  }
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE,
              ("transaction id xid(%"X32_F")\n", xid));

  msg_out = (struct dhcp_msg *)p_out->payload;
 8023594:	69bb      	ldr	r3, [r7, #24]
 8023596:	685b      	ldr	r3, [r3, #4]
 8023598:	617b      	str	r3, [r7, #20]
  memset(msg_out, 0, sizeof(struct dhcp_msg));
 802359a:	f44f 729a 	mov.w	r2, #308	@ 0x134
 802359e:	2100      	movs	r1, #0
 80235a0:	6978      	ldr	r0, [r7, #20]
 80235a2:	f006 fbad 	bl	8029d00 <memset>

  msg_out->op = DHCP_BOOTREQUEST;
 80235a6:	697b      	ldr	r3, [r7, #20]
 80235a8:	2201      	movs	r2, #1
 80235aa:	701a      	strb	r2, [r3, #0]
  /* @todo: make link layer independent */
  msg_out->htype = LWIP_IANA_HWTYPE_ETHERNET;
 80235ac:	697b      	ldr	r3, [r7, #20]
 80235ae:	2201      	movs	r2, #1
 80235b0:	705a      	strb	r2, [r3, #1]
  msg_out->hlen = netif->hwaddr_len;
 80235b2:	68fb      	ldr	r3, [r7, #12]
 80235b4:	f893 2030 	ldrb.w	r2, [r3, #48]	@ 0x30
 80235b8:	697b      	ldr	r3, [r7, #20]
 80235ba:	709a      	strb	r2, [r3, #2]
  msg_out->xid = lwip_htonl(dhcp->xid);
 80235bc:	68bb      	ldr	r3, [r7, #8]
 80235be:	681b      	ldr	r3, [r3, #0]
 80235c0:	4618      	mov	r0, r3
 80235c2:	f7f5 fac6 	bl	8018b52 <lwip_htonl>
 80235c6:	4602      	mov	r2, r0
 80235c8:	697b      	ldr	r3, [r7, #20]
 80235ca:	605a      	str	r2, [r3, #4]
  /* we don't need the broadcast flag since we can receive unicast traffic
     before being fully configured! */
  /* set ciaddr to netif->ip_addr based on message_type and state */
  if ((message_type == DHCP_INFORM) || (message_type == DHCP_DECLINE) || (message_type == DHCP_RELEASE) ||
 80235cc:	79fb      	ldrb	r3, [r7, #7]
 80235ce:	2b08      	cmp	r3, #8
 80235d0:	d010      	beq.n	80235f4 <dhcp_create_msg+0xfc>
 80235d2:	79fb      	ldrb	r3, [r7, #7]
 80235d4:	2b04      	cmp	r3, #4
 80235d6:	d00d      	beq.n	80235f4 <dhcp_create_msg+0xfc>
 80235d8:	79fb      	ldrb	r3, [r7, #7]
 80235da:	2b07      	cmp	r3, #7
 80235dc:	d00a      	beq.n	80235f4 <dhcp_create_msg+0xfc>
 80235de:	79fb      	ldrb	r3, [r7, #7]
 80235e0:	2b03      	cmp	r3, #3
 80235e2:	d10c      	bne.n	80235fe <dhcp_create_msg+0x106>
      ((message_type == DHCP_REQUEST) && /* DHCP_STATE_BOUND not used for sending! */
       ((dhcp->state == DHCP_STATE_RENEWING) || dhcp->state == DHCP_STATE_REBINDING))) {
 80235e4:	68bb      	ldr	r3, [r7, #8]
 80235e6:	795b      	ldrb	r3, [r3, #5]
      ((message_type == DHCP_REQUEST) && /* DHCP_STATE_BOUND not used for sending! */
 80235e8:	2b05      	cmp	r3, #5
 80235ea:	d003      	beq.n	80235f4 <dhcp_create_msg+0xfc>
       ((dhcp->state == DHCP_STATE_RENEWING) || dhcp->state == DHCP_STATE_REBINDING))) {
 80235ec:	68bb      	ldr	r3, [r7, #8]
 80235ee:	795b      	ldrb	r3, [r3, #5]
 80235f0:	2b04      	cmp	r3, #4
 80235f2:	d104      	bne.n	80235fe <dhcp_create_msg+0x106>
    ip4_addr_copy(msg_out->ciaddr, *netif_ip4_addr(netif));
 80235f4:	68fb      	ldr	r3, [r7, #12]
 80235f6:	3304      	adds	r3, #4
 80235f8:	681a      	ldr	r2, [r3, #0]
 80235fa:	697b      	ldr	r3, [r7, #20]
 80235fc:	60da      	str	r2, [r3, #12]
  }
  for (i = 0; i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 80235fe:	2300      	movs	r3, #0
 8023600:	83fb      	strh	r3, [r7, #30]
 8023602:	e00c      	b.n	802361e <dhcp_create_msg+0x126>
    /* copy netif hardware address (padded with zeroes through memset already) */
    msg_out->chaddr[i] = netif->hwaddr[i];
 8023604:	8bfa      	ldrh	r2, [r7, #30]
 8023606:	8bfb      	ldrh	r3, [r7, #30]
 8023608:	68f9      	ldr	r1, [r7, #12]
 802360a:	440a      	add	r2, r1
 802360c:	f892 102a 	ldrb.w	r1, [r2, #42]	@ 0x2a
 8023610:	697a      	ldr	r2, [r7, #20]
 8023612:	4413      	add	r3, r2
 8023614:	460a      	mov	r2, r1
 8023616:	771a      	strb	r2, [r3, #28]
  for (i = 0; i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 8023618:	8bfb      	ldrh	r3, [r7, #30]
 802361a:	3301      	adds	r3, #1
 802361c:	83fb      	strh	r3, [r7, #30]
 802361e:	8bfb      	ldrh	r3, [r7, #30]
 8023620:	2b05      	cmp	r3, #5
 8023622:	d9ef      	bls.n	8023604 <dhcp_create_msg+0x10c>
  }
  msg_out->cookie = PP_HTONL(DHCP_MAGIC_COOKIE);
 8023624:	697b      	ldr	r3, [r7, #20]
 8023626:	2200      	movs	r2, #0
 8023628:	f042 0263 	orr.w	r2, r2, #99	@ 0x63
 802362c:	f883 20ec 	strb.w	r2, [r3, #236]	@ 0xec
 8023630:	2200      	movs	r2, #0
 8023632:	f062 027d 	orn	r2, r2, #125	@ 0x7d
 8023636:	f883 20ed 	strb.w	r2, [r3, #237]	@ 0xed
 802363a:	2200      	movs	r2, #0
 802363c:	f042 0253 	orr.w	r2, r2, #83	@ 0x53
 8023640:	f883 20ee 	strb.w	r2, [r3, #238]	@ 0xee
 8023644:	2200      	movs	r2, #0
 8023646:	f042 0263 	orr.w	r2, r2, #99	@ 0x63
 802364a:	f883 20ef 	strb.w	r2, [r3, #239]	@ 0xef
  /* Add option MESSAGE_TYPE */
  options_out_len_loc = dhcp_option(0, msg_out->options, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN);
 802364e:	697b      	ldr	r3, [r7, #20]
 8023650:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023654:	2301      	movs	r3, #1
 8023656:	2235      	movs	r2, #53	@ 0x35
 8023658:	2000      	movs	r0, #0
 802365a:	f7ff facf 	bl	8022bfc <dhcp_option>
 802365e:	4603      	mov	r3, r0
 8023660:	827b      	strh	r3, [r7, #18]
  options_out_len_loc = dhcp_option_byte(options_out_len_loc, msg_out->options, message_type);
 8023662:	697b      	ldr	r3, [r7, #20]
 8023664:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023668:	79fa      	ldrb	r2, [r7, #7]
 802366a:	8a7b      	ldrh	r3, [r7, #18]
 802366c:	4618      	mov	r0, r3
 802366e:	f7ff faf9 	bl	8022c64 <dhcp_option_byte>
 8023672:	4603      	mov	r3, r0
 8023674:	827b      	strh	r3, [r7, #18]
  if (options_out_len) {
 8023676:	683b      	ldr	r3, [r7, #0]
 8023678:	2b00      	cmp	r3, #0
 802367a:	d002      	beq.n	8023682 <dhcp_create_msg+0x18a>
    *options_out_len = options_out_len_loc;
 802367c:	683b      	ldr	r3, [r7, #0]
 802367e:	8a7a      	ldrh	r2, [r7, #18]
 8023680:	801a      	strh	r2, [r3, #0]
  }
  return p_out;
 8023682:	69bb      	ldr	r3, [r7, #24]
}
 8023684:	4618      	mov	r0, r3
 8023686:	3720      	adds	r7, #32
 8023688:	46bd      	mov	sp, r7
 802368a:	bd80      	pop	{r7, pc}
 802368c:	0802fe9c 	.word	0x0802fe9c
 8023690:	080301bc 	.word	0x080301bc
 8023694:	0802fefc 	.word	0x0802fefc
 8023698:	080301dc 	.word	0x080301dc
 802369c:	080301fc 	.word	0x080301fc
 80236a0:	2402af1c 	.word	0x2402af1c

080236a4 <dhcp_option_trailer>:
 * Adds the END option to the DHCP message, and if
 * necessary, up to three padding bytes.
 */
static void
dhcp_option_trailer(u16_t options_out_len, u8_t *options, struct pbuf *p_out)
{
 80236a4:	b580      	push	{r7, lr}
 80236a6:	b084      	sub	sp, #16
 80236a8:	af00      	add	r7, sp, #0
 80236aa:	4603      	mov	r3, r0
 80236ac:	60b9      	str	r1, [r7, #8]
 80236ae:	607a      	str	r2, [r7, #4]
 80236b0:	81fb      	strh	r3, [r7, #14]
  options[options_out_len++] = DHCP_OPTION_END;
 80236b2:	89fb      	ldrh	r3, [r7, #14]
 80236b4:	1c5a      	adds	r2, r3, #1
 80236b6:	81fa      	strh	r2, [r7, #14]
 80236b8:	461a      	mov	r2, r3
 80236ba:	68bb      	ldr	r3, [r7, #8]
 80236bc:	4413      	add	r3, r2
 80236be:	22ff      	movs	r2, #255	@ 0xff
 80236c0:	701a      	strb	r2, [r3, #0]
  /* packet is too small, or not 4 byte aligned? */
  while (((options_out_len < DHCP_MIN_OPTIONS_LEN) || (options_out_len & 3)) &&
 80236c2:	e007      	b.n	80236d4 <dhcp_option_trailer+0x30>
         (options_out_len < DHCP_OPTIONS_LEN)) {
    /* add a fill/padding byte */
    options[options_out_len++] = 0;
 80236c4:	89fb      	ldrh	r3, [r7, #14]
 80236c6:	1c5a      	adds	r2, r3, #1
 80236c8:	81fa      	strh	r2, [r7, #14]
 80236ca:	461a      	mov	r2, r3
 80236cc:	68bb      	ldr	r3, [r7, #8]
 80236ce:	4413      	add	r3, r2
 80236d0:	2200      	movs	r2, #0
 80236d2:	701a      	strb	r2, [r3, #0]
  while (((options_out_len < DHCP_MIN_OPTIONS_LEN) || (options_out_len & 3)) &&
 80236d4:	89fb      	ldrh	r3, [r7, #14]
 80236d6:	2b43      	cmp	r3, #67	@ 0x43
 80236d8:	d904      	bls.n	80236e4 <dhcp_option_trailer+0x40>
 80236da:	89fb      	ldrh	r3, [r7, #14]
 80236dc:	f003 0303 	and.w	r3, r3, #3
 80236e0:	2b00      	cmp	r3, #0
 80236e2:	d002      	beq.n	80236ea <dhcp_option_trailer+0x46>
 80236e4:	89fb      	ldrh	r3, [r7, #14]
 80236e6:	2b43      	cmp	r3, #67	@ 0x43
 80236e8:	d9ec      	bls.n	80236c4 <dhcp_option_trailer+0x20>
  }
  /* shrink the pbuf to the actual content length */
  pbuf_realloc(p_out, (u16_t)(sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + options_out_len));
 80236ea:	89fb      	ldrh	r3, [r7, #14]
 80236ec:	33f0      	adds	r3, #240	@ 0xf0
 80236ee:	b29b      	uxth	r3, r3
 80236f0:	4619      	mov	r1, r3
 80236f2:	6878      	ldr	r0, [r7, #4]
 80236f4:	f7f6 fd44 	bl	801a180 <pbuf_realloc>
}
 80236f8:	bf00      	nop
 80236fa:	3710      	adds	r7, #16
 80236fc:	46bd      	mov	sp, r7
 80236fe:	bd80      	pop	{r7, pc}

08023700 <dhcp_supplied_address>:
 * @return 1 if DHCP supplied netif->ip_addr (states BOUND or RENEWING),
 *         0 otherwise
 */
u8_t
dhcp_supplied_address(const struct netif *netif)
{
 8023700:	b480      	push	{r7}
 8023702:	b085      	sub	sp, #20
 8023704:	af00      	add	r7, sp, #0
 8023706:	6078      	str	r0, [r7, #4]
  if ((netif != NULL) && (netif_dhcp_data(netif) != NULL)) {
 8023708:	687b      	ldr	r3, [r7, #4]
 802370a:	2b00      	cmp	r3, #0
 802370c:	d017      	beq.n	802373e <dhcp_supplied_address+0x3e>
 802370e:	687b      	ldr	r3, [r7, #4]
 8023710:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023712:	2b00      	cmp	r3, #0
 8023714:	d013      	beq.n	802373e <dhcp_supplied_address+0x3e>
    struct dhcp *dhcp = netif_dhcp_data(netif);
 8023716:	687b      	ldr	r3, [r7, #4]
 8023718:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802371a:	60fb      	str	r3, [r7, #12]
    return (dhcp->state == DHCP_STATE_BOUND) || (dhcp->state == DHCP_STATE_RENEWING) ||
 802371c:	68fb      	ldr	r3, [r7, #12]
 802371e:	795b      	ldrb	r3, [r3, #5]
 8023720:	2b0a      	cmp	r3, #10
 8023722:	d007      	beq.n	8023734 <dhcp_supplied_address+0x34>
 8023724:	68fb      	ldr	r3, [r7, #12]
 8023726:	795b      	ldrb	r3, [r3, #5]
 8023728:	2b05      	cmp	r3, #5
 802372a:	d003      	beq.n	8023734 <dhcp_supplied_address+0x34>
           (dhcp->state == DHCP_STATE_REBINDING);
 802372c:	68fb      	ldr	r3, [r7, #12]
 802372e:	795b      	ldrb	r3, [r3, #5]
    return (dhcp->state == DHCP_STATE_BOUND) || (dhcp->state == DHCP_STATE_RENEWING) ||
 8023730:	2b04      	cmp	r3, #4
 8023732:	d101      	bne.n	8023738 <dhcp_supplied_address+0x38>
 8023734:	2301      	movs	r3, #1
 8023736:	e000      	b.n	802373a <dhcp_supplied_address+0x3a>
 8023738:	2300      	movs	r3, #0
 802373a:	b2db      	uxtb	r3, r3
 802373c:	e000      	b.n	8023740 <dhcp_supplied_address+0x40>
  }
  return 0;
 802373e:	2300      	movs	r3, #0
}
 8023740:	4618      	mov	r0, r3
 8023742:	3714      	adds	r7, #20
 8023744:	46bd      	mov	sp, r7
 8023746:	f85d 7b04 	ldr.w	r7, [sp], #4
 802374a:	4770      	bx	lr

0802374c <etharp_free_entry>:
#endif /* ARP_QUEUEING */

/** Clean up ARP table entries */
static void
etharp_free_entry(int i)
{
 802374c:	b580      	push	{r7, lr}
 802374e:	b082      	sub	sp, #8
 8023750:	af00      	add	r7, sp, #0
 8023752:	6078      	str	r0, [r7, #4]
  /* remove from SNMP ARP index tree */
  mib2_remove_arp_entry(arp_table[i].netif, &arp_table[i].ipaddr);
  /* and empty packet queue */
  if (arp_table[i].q != NULL) {
 8023754:	492b      	ldr	r1, [pc, #172]	@ (8023804 <etharp_free_entry+0xb8>)
 8023756:	687a      	ldr	r2, [r7, #4]
 8023758:	4613      	mov	r3, r2
 802375a:	005b      	lsls	r3, r3, #1
 802375c:	4413      	add	r3, r2
 802375e:	00db      	lsls	r3, r3, #3
 8023760:	440b      	add	r3, r1
 8023762:	681b      	ldr	r3, [r3, #0]
 8023764:	2b00      	cmp	r3, #0
 8023766:	d013      	beq.n	8023790 <etharp_free_entry+0x44>
    /* remove all queued packets */
    LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_free_entry: freeing entry %"U16_F", packet queue %p.\n", (u16_t)i, (void *)(arp_table[i].q)));
    free_etharp_q(arp_table[i].q);
 8023768:	4926      	ldr	r1, [pc, #152]	@ (8023804 <etharp_free_entry+0xb8>)
 802376a:	687a      	ldr	r2, [r7, #4]
 802376c:	4613      	mov	r3, r2
 802376e:	005b      	lsls	r3, r3, #1
 8023770:	4413      	add	r3, r2
 8023772:	00db      	lsls	r3, r3, #3
 8023774:	440b      	add	r3, r1
 8023776:	681b      	ldr	r3, [r3, #0]
 8023778:	4618      	mov	r0, r3
 802377a:	f7f6 feb7 	bl	801a4ec <pbuf_free>
    arp_table[i].q = NULL;
 802377e:	4921      	ldr	r1, [pc, #132]	@ (8023804 <etharp_free_entry+0xb8>)
 8023780:	687a      	ldr	r2, [r7, #4]
 8023782:	4613      	mov	r3, r2
 8023784:	005b      	lsls	r3, r3, #1
 8023786:	4413      	add	r3, r2
 8023788:	00db      	lsls	r3, r3, #3
 802378a:	440b      	add	r3, r1
 802378c:	2200      	movs	r2, #0
 802378e:	601a      	str	r2, [r3, #0]
  }
  /* recycle entry for re-use */
  arp_table[i].state = ETHARP_STATE_EMPTY;
 8023790:	491c      	ldr	r1, [pc, #112]	@ (8023804 <etharp_free_entry+0xb8>)
 8023792:	687a      	ldr	r2, [r7, #4]
 8023794:	4613      	mov	r3, r2
 8023796:	005b      	lsls	r3, r3, #1
 8023798:	4413      	add	r3, r2
 802379a:	00db      	lsls	r3, r3, #3
 802379c:	440b      	add	r3, r1
 802379e:	3314      	adds	r3, #20
 80237a0:	2200      	movs	r2, #0
 80237a2:	701a      	strb	r2, [r3, #0]
#ifdef LWIP_DEBUG
  /* for debugging, clean out the complete entry */
  arp_table[i].ctime = 0;
 80237a4:	4917      	ldr	r1, [pc, #92]	@ (8023804 <etharp_free_entry+0xb8>)
 80237a6:	687a      	ldr	r2, [r7, #4]
 80237a8:	4613      	mov	r3, r2
 80237aa:	005b      	lsls	r3, r3, #1
 80237ac:	4413      	add	r3, r2
 80237ae:	00db      	lsls	r3, r3, #3
 80237b0:	440b      	add	r3, r1
 80237b2:	3312      	adds	r3, #18
 80237b4:	2200      	movs	r2, #0
 80237b6:	801a      	strh	r2, [r3, #0]
  arp_table[i].netif = NULL;
 80237b8:	4912      	ldr	r1, [pc, #72]	@ (8023804 <etharp_free_entry+0xb8>)
 80237ba:	687a      	ldr	r2, [r7, #4]
 80237bc:	4613      	mov	r3, r2
 80237be:	005b      	lsls	r3, r3, #1
 80237c0:	4413      	add	r3, r2
 80237c2:	00db      	lsls	r3, r3, #3
 80237c4:	440b      	add	r3, r1
 80237c6:	3308      	adds	r3, #8
 80237c8:	2200      	movs	r2, #0
 80237ca:	601a      	str	r2, [r3, #0]
  ip4_addr_set_zero(&arp_table[i].ipaddr);
 80237cc:	490d      	ldr	r1, [pc, #52]	@ (8023804 <etharp_free_entry+0xb8>)
 80237ce:	687a      	ldr	r2, [r7, #4]
 80237d0:	4613      	mov	r3, r2
 80237d2:	005b      	lsls	r3, r3, #1
 80237d4:	4413      	add	r3, r2
 80237d6:	00db      	lsls	r3, r3, #3
 80237d8:	440b      	add	r3, r1
 80237da:	3304      	adds	r3, #4
 80237dc:	2200      	movs	r2, #0
 80237de:	601a      	str	r2, [r3, #0]
  arp_table[i].ethaddr = ethzero;
 80237e0:	4908      	ldr	r1, [pc, #32]	@ (8023804 <etharp_free_entry+0xb8>)
 80237e2:	687a      	ldr	r2, [r7, #4]
 80237e4:	4613      	mov	r3, r2
 80237e6:	005b      	lsls	r3, r3, #1
 80237e8:	4413      	add	r3, r2
 80237ea:	00db      	lsls	r3, r3, #3
 80237ec:	440b      	add	r3, r1
 80237ee:	3308      	adds	r3, #8
 80237f0:	4a05      	ldr	r2, [pc, #20]	@ (8023808 <etharp_free_entry+0xbc>)
 80237f2:	3304      	adds	r3, #4
 80237f4:	6810      	ldr	r0, [r2, #0]
 80237f6:	6018      	str	r0, [r3, #0]
 80237f8:	8892      	ldrh	r2, [r2, #4]
 80237fa:	809a      	strh	r2, [r3, #4]
#endif /* LWIP_DEBUG */
}
 80237fc:	bf00      	nop
 80237fe:	3708      	adds	r7, #8
 8023800:	46bd      	mov	sp, r7
 8023802:	bd80      	pop	{r7, pc}
 8023804:	2402af20 	.word	0x2402af20
 8023808:	08030c78 	.word	0x08030c78

0802380c <etharp_tmr>:
 * This function should be called every ARP_TMR_INTERVAL milliseconds (1 second),
 * in order to expire entries in the ARP table.
 */
void
etharp_tmr(void)
{
 802380c:	b580      	push	{r7, lr}
 802380e:	b082      	sub	sp, #8
 8023810:	af00      	add	r7, sp, #0
  int i;

  LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer\n"));
  /* remove expired entries from the ARP table */
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8023812:	2300      	movs	r3, #0
 8023814:	607b      	str	r3, [r7, #4]
 8023816:	e096      	b.n	8023946 <etharp_tmr+0x13a>
    u8_t state = arp_table[i].state;
 8023818:	494f      	ldr	r1, [pc, #316]	@ (8023958 <etharp_tmr+0x14c>)
 802381a:	687a      	ldr	r2, [r7, #4]
 802381c:	4613      	mov	r3, r2
 802381e:	005b      	lsls	r3, r3, #1
 8023820:	4413      	add	r3, r2
 8023822:	00db      	lsls	r3, r3, #3
 8023824:	440b      	add	r3, r1
 8023826:	3314      	adds	r3, #20
 8023828:	781b      	ldrb	r3, [r3, #0]
 802382a:	70fb      	strb	r3, [r7, #3]
    if (state != ETHARP_STATE_EMPTY
 802382c:	78fb      	ldrb	r3, [r7, #3]
 802382e:	2b00      	cmp	r3, #0
 8023830:	f000 8086 	beq.w	8023940 <etharp_tmr+0x134>
#if ETHARP_SUPPORT_STATIC_ENTRIES
        && (state != ETHARP_STATE_STATIC)
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
       ) {
      arp_table[i].ctime++;
 8023834:	4948      	ldr	r1, [pc, #288]	@ (8023958 <etharp_tmr+0x14c>)
 8023836:	687a      	ldr	r2, [r7, #4]
 8023838:	4613      	mov	r3, r2
 802383a:	005b      	lsls	r3, r3, #1
 802383c:	4413      	add	r3, r2
 802383e:	00db      	lsls	r3, r3, #3
 8023840:	440b      	add	r3, r1
 8023842:	3312      	adds	r3, #18
 8023844:	881b      	ldrh	r3, [r3, #0]
 8023846:	3301      	adds	r3, #1
 8023848:	b298      	uxth	r0, r3
 802384a:	4943      	ldr	r1, [pc, #268]	@ (8023958 <etharp_tmr+0x14c>)
 802384c:	687a      	ldr	r2, [r7, #4]
 802384e:	4613      	mov	r3, r2
 8023850:	005b      	lsls	r3, r3, #1
 8023852:	4413      	add	r3, r2
 8023854:	00db      	lsls	r3, r3, #3
 8023856:	440b      	add	r3, r1
 8023858:	3312      	adds	r3, #18
 802385a:	4602      	mov	r2, r0
 802385c:	801a      	strh	r2, [r3, #0]
      if ((arp_table[i].ctime >= ARP_MAXAGE) ||
 802385e:	493e      	ldr	r1, [pc, #248]	@ (8023958 <etharp_tmr+0x14c>)
 8023860:	687a      	ldr	r2, [r7, #4]
 8023862:	4613      	mov	r3, r2
 8023864:	005b      	lsls	r3, r3, #1
 8023866:	4413      	add	r3, r2
 8023868:	00db      	lsls	r3, r3, #3
 802386a:	440b      	add	r3, r1
 802386c:	3312      	adds	r3, #18
 802386e:	881b      	ldrh	r3, [r3, #0]
 8023870:	f5b3 7f96 	cmp.w	r3, #300	@ 0x12c
 8023874:	d215      	bcs.n	80238a2 <etharp_tmr+0x96>
          ((arp_table[i].state == ETHARP_STATE_PENDING)  &&
 8023876:	4938      	ldr	r1, [pc, #224]	@ (8023958 <etharp_tmr+0x14c>)
 8023878:	687a      	ldr	r2, [r7, #4]
 802387a:	4613      	mov	r3, r2
 802387c:	005b      	lsls	r3, r3, #1
 802387e:	4413      	add	r3, r2
 8023880:	00db      	lsls	r3, r3, #3
 8023882:	440b      	add	r3, r1
 8023884:	3314      	adds	r3, #20
 8023886:	781b      	ldrb	r3, [r3, #0]
      if ((arp_table[i].ctime >= ARP_MAXAGE) ||
 8023888:	2b01      	cmp	r3, #1
 802388a:	d10e      	bne.n	80238aa <etharp_tmr+0x9e>
           (arp_table[i].ctime >= ARP_MAXPENDING))) {
 802388c:	4932      	ldr	r1, [pc, #200]	@ (8023958 <etharp_tmr+0x14c>)
 802388e:	687a      	ldr	r2, [r7, #4]
 8023890:	4613      	mov	r3, r2
 8023892:	005b      	lsls	r3, r3, #1
 8023894:	4413      	add	r3, r2
 8023896:	00db      	lsls	r3, r3, #3
 8023898:	440b      	add	r3, r1
 802389a:	3312      	adds	r3, #18
 802389c:	881b      	ldrh	r3, [r3, #0]
          ((arp_table[i].state == ETHARP_STATE_PENDING)  &&
 802389e:	2b04      	cmp	r3, #4
 80238a0:	d903      	bls.n	80238aa <etharp_tmr+0x9e>
        /* pending or stable entry has become old! */
        LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired %s entry %d.\n",
                                   arp_table[i].state >= ETHARP_STATE_STABLE ? "stable" : "pending", i));
        /* clean up entries that have just been expired */
        etharp_free_entry(i);
 80238a2:	6878      	ldr	r0, [r7, #4]
 80238a4:	f7ff ff52 	bl	802374c <etharp_free_entry>
 80238a8:	e04a      	b.n	8023940 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_1) {
 80238aa:	492b      	ldr	r1, [pc, #172]	@ (8023958 <etharp_tmr+0x14c>)
 80238ac:	687a      	ldr	r2, [r7, #4]
 80238ae:	4613      	mov	r3, r2
 80238b0:	005b      	lsls	r3, r3, #1
 80238b2:	4413      	add	r3, r2
 80238b4:	00db      	lsls	r3, r3, #3
 80238b6:	440b      	add	r3, r1
 80238b8:	3314      	adds	r3, #20
 80238ba:	781b      	ldrb	r3, [r3, #0]
 80238bc:	2b03      	cmp	r3, #3
 80238be:	d10a      	bne.n	80238d6 <etharp_tmr+0xca>
        /* Don't send more than one request every 2 seconds. */
        arp_table[i].state = ETHARP_STATE_STABLE_REREQUESTING_2;
 80238c0:	4925      	ldr	r1, [pc, #148]	@ (8023958 <etharp_tmr+0x14c>)
 80238c2:	687a      	ldr	r2, [r7, #4]
 80238c4:	4613      	mov	r3, r2
 80238c6:	005b      	lsls	r3, r3, #1
 80238c8:	4413      	add	r3, r2
 80238ca:	00db      	lsls	r3, r3, #3
 80238cc:	440b      	add	r3, r1
 80238ce:	3314      	adds	r3, #20
 80238d0:	2204      	movs	r2, #4
 80238d2:	701a      	strb	r2, [r3, #0]
 80238d4:	e034      	b.n	8023940 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_2) {
 80238d6:	4920      	ldr	r1, [pc, #128]	@ (8023958 <etharp_tmr+0x14c>)
 80238d8:	687a      	ldr	r2, [r7, #4]
 80238da:	4613      	mov	r3, r2
 80238dc:	005b      	lsls	r3, r3, #1
 80238de:	4413      	add	r3, r2
 80238e0:	00db      	lsls	r3, r3, #3
 80238e2:	440b      	add	r3, r1
 80238e4:	3314      	adds	r3, #20
 80238e6:	781b      	ldrb	r3, [r3, #0]
 80238e8:	2b04      	cmp	r3, #4
 80238ea:	d10a      	bne.n	8023902 <etharp_tmr+0xf6>
        /* Reset state to stable, so that the next transmitted packet will
           re-send an ARP request. */
        arp_table[i].state = ETHARP_STATE_STABLE;
 80238ec:	491a      	ldr	r1, [pc, #104]	@ (8023958 <etharp_tmr+0x14c>)
 80238ee:	687a      	ldr	r2, [r7, #4]
 80238f0:	4613      	mov	r3, r2
 80238f2:	005b      	lsls	r3, r3, #1
 80238f4:	4413      	add	r3, r2
 80238f6:	00db      	lsls	r3, r3, #3
 80238f8:	440b      	add	r3, r1
 80238fa:	3314      	adds	r3, #20
 80238fc:	2202      	movs	r2, #2
 80238fe:	701a      	strb	r2, [r3, #0]
 8023900:	e01e      	b.n	8023940 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_PENDING) {
 8023902:	4915      	ldr	r1, [pc, #84]	@ (8023958 <etharp_tmr+0x14c>)
 8023904:	687a      	ldr	r2, [r7, #4]
 8023906:	4613      	mov	r3, r2
 8023908:	005b      	lsls	r3, r3, #1
 802390a:	4413      	add	r3, r2
 802390c:	00db      	lsls	r3, r3, #3
 802390e:	440b      	add	r3, r1
 8023910:	3314      	adds	r3, #20
 8023912:	781b      	ldrb	r3, [r3, #0]
 8023914:	2b01      	cmp	r3, #1
 8023916:	d113      	bne.n	8023940 <etharp_tmr+0x134>
        /* still pending, resend an ARP query */
        etharp_request(arp_table[i].netif, &arp_table[i].ipaddr);
 8023918:	490f      	ldr	r1, [pc, #60]	@ (8023958 <etharp_tmr+0x14c>)
 802391a:	687a      	ldr	r2, [r7, #4]
 802391c:	4613      	mov	r3, r2
 802391e:	005b      	lsls	r3, r3, #1
 8023920:	4413      	add	r3, r2
 8023922:	00db      	lsls	r3, r3, #3
 8023924:	440b      	add	r3, r1
 8023926:	3308      	adds	r3, #8
 8023928:	6818      	ldr	r0, [r3, #0]
 802392a:	687a      	ldr	r2, [r7, #4]
 802392c:	4613      	mov	r3, r2
 802392e:	005b      	lsls	r3, r3, #1
 8023930:	4413      	add	r3, r2
 8023932:	00db      	lsls	r3, r3, #3
 8023934:	4a08      	ldr	r2, [pc, #32]	@ (8023958 <etharp_tmr+0x14c>)
 8023936:	4413      	add	r3, r2
 8023938:	3304      	adds	r3, #4
 802393a:	4619      	mov	r1, r3
 802393c:	f000 fe76 	bl	802462c <etharp_request>
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8023940:	687b      	ldr	r3, [r7, #4]
 8023942:	3301      	adds	r3, #1
 8023944:	607b      	str	r3, [r7, #4]
 8023946:	687b      	ldr	r3, [r7, #4]
 8023948:	2b09      	cmp	r3, #9
 802394a:	f77f af65 	ble.w	8023818 <etharp_tmr+0xc>
      }
    }
  }
}
 802394e:	bf00      	nop
 8023950:	bf00      	nop
 8023952:	3708      	adds	r7, #8
 8023954:	46bd      	mov	sp, r7
 8023956:	bd80      	pop	{r7, pc}
 8023958:	2402af20 	.word	0x2402af20

0802395c <etharp_find_entry>:
 * @return The ARP entry index that matched or is created, ERR_MEM if no
 * entry is found or could be recycled.
 */
static s16_t
etharp_find_entry(const ip4_addr_t *ipaddr, u8_t flags, struct netif *netif)
{
 802395c:	b580      	push	{r7, lr}
 802395e:	b08a      	sub	sp, #40	@ 0x28
 8023960:	af00      	add	r7, sp, #0
 8023962:	60f8      	str	r0, [r7, #12]
 8023964:	460b      	mov	r3, r1
 8023966:	607a      	str	r2, [r7, #4]
 8023968:	72fb      	strb	r3, [r7, #11]
  s16_t old_pending = ARP_TABLE_SIZE, old_stable = ARP_TABLE_SIZE;
 802396a:	230a      	movs	r3, #10
 802396c:	843b      	strh	r3, [r7, #32]
 802396e:	230a      	movs	r3, #10
 8023970:	847b      	strh	r3, [r7, #34]	@ 0x22
  s16_t empty = ARP_TABLE_SIZE;
 8023972:	230a      	movs	r3, #10
 8023974:	84bb      	strh	r3, [r7, #36]	@ 0x24
  s16_t i = 0;
 8023976:	2300      	movs	r3, #0
 8023978:	84fb      	strh	r3, [r7, #38]	@ 0x26
  /* oldest entry with packets on queue */
  s16_t old_queue = ARP_TABLE_SIZE;
 802397a:	230a      	movs	r3, #10
 802397c:	83fb      	strh	r3, [r7, #30]
  /* its age */
  u16_t age_queue = 0, age_pending = 0, age_stable = 0;
 802397e:	2300      	movs	r3, #0
 8023980:	83bb      	strh	r3, [r7, #28]
 8023982:	2300      	movs	r3, #0
 8023984:	837b      	strh	r3, [r7, #26]
 8023986:	2300      	movs	r3, #0
 8023988:	833b      	strh	r3, [r7, #24]
   * 4) remember the oldest pending entry with queued packets (if any)
   * 5) search for a matching IP entry, either pending or stable
   *    until 5 matches, or all entries are searched for.
   */

  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 802398a:	2300      	movs	r3, #0
 802398c:	84fb      	strh	r3, [r7, #38]	@ 0x26
 802398e:	e0ae      	b.n	8023aee <etharp_find_entry+0x192>
    u8_t state = arp_table[i].state;
 8023990:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023994:	49a6      	ldr	r1, [pc, #664]	@ (8023c30 <etharp_find_entry+0x2d4>)
 8023996:	4613      	mov	r3, r2
 8023998:	005b      	lsls	r3, r3, #1
 802399a:	4413      	add	r3, r2
 802399c:	00db      	lsls	r3, r3, #3
 802399e:	440b      	add	r3, r1
 80239a0:	3314      	adds	r3, #20
 80239a2:	781b      	ldrb	r3, [r3, #0]
 80239a4:	75fb      	strb	r3, [r7, #23]
    /* no empty entry found yet and now we do find one? */
    if ((empty == ARP_TABLE_SIZE) && (state == ETHARP_STATE_EMPTY)) {
 80239a6:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 80239aa:	2b0a      	cmp	r3, #10
 80239ac:	d105      	bne.n	80239ba <etharp_find_entry+0x5e>
 80239ae:	7dfb      	ldrb	r3, [r7, #23]
 80239b0:	2b00      	cmp	r3, #0
 80239b2:	d102      	bne.n	80239ba <etharp_find_entry+0x5e>
      LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_find_entry: found empty entry %d\n", (int)i));
      /* remember first empty entry */
      empty = i;
 80239b4:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 80239b6:	84bb      	strh	r3, [r7, #36]	@ 0x24
 80239b8:	e095      	b.n	8023ae6 <etharp_find_entry+0x18a>
    } else if (state != ETHARP_STATE_EMPTY) {
 80239ba:	7dfb      	ldrb	r3, [r7, #23]
 80239bc:	2b00      	cmp	r3, #0
 80239be:	f000 8092 	beq.w	8023ae6 <etharp_find_entry+0x18a>
      LWIP_ASSERT("state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE",
 80239c2:	7dfb      	ldrb	r3, [r7, #23]
 80239c4:	2b01      	cmp	r3, #1
 80239c6:	d009      	beq.n	80239dc <etharp_find_entry+0x80>
 80239c8:	7dfb      	ldrb	r3, [r7, #23]
 80239ca:	2b01      	cmp	r3, #1
 80239cc:	d806      	bhi.n	80239dc <etharp_find_entry+0x80>
 80239ce:	4b99      	ldr	r3, [pc, #612]	@ (8023c34 <etharp_find_entry+0x2d8>)
 80239d0:	f240 1223 	movw	r2, #291	@ 0x123
 80239d4:	4998      	ldr	r1, [pc, #608]	@ (8023c38 <etharp_find_entry+0x2dc>)
 80239d6:	4899      	ldr	r0, [pc, #612]	@ (8023c3c <etharp_find_entry+0x2e0>)
 80239d8:	f006 f800 	bl	80299dc <iprintf>
                  state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE);
      /* if given, does IP address match IP address in ARP entry? */
      if (ipaddr && ip4_addr_cmp(ipaddr, &arp_table[i].ipaddr)
 80239dc:	68fb      	ldr	r3, [r7, #12]
 80239de:	2b00      	cmp	r3, #0
 80239e0:	d020      	beq.n	8023a24 <etharp_find_entry+0xc8>
 80239e2:	68fb      	ldr	r3, [r7, #12]
 80239e4:	6819      	ldr	r1, [r3, #0]
 80239e6:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80239ea:	4891      	ldr	r0, [pc, #580]	@ (8023c30 <etharp_find_entry+0x2d4>)
 80239ec:	4613      	mov	r3, r2
 80239ee:	005b      	lsls	r3, r3, #1
 80239f0:	4413      	add	r3, r2
 80239f2:	00db      	lsls	r3, r3, #3
 80239f4:	4403      	add	r3, r0
 80239f6:	3304      	adds	r3, #4
 80239f8:	681b      	ldr	r3, [r3, #0]
 80239fa:	4299      	cmp	r1, r3
 80239fc:	d112      	bne.n	8023a24 <etharp_find_entry+0xc8>
#if ETHARP_TABLE_MATCH_NETIF
          && ((netif == NULL) || (netif == arp_table[i].netif))
 80239fe:	687b      	ldr	r3, [r7, #4]
 8023a00:	2b00      	cmp	r3, #0
 8023a02:	d00c      	beq.n	8023a1e <etharp_find_entry+0xc2>
 8023a04:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023a08:	4989      	ldr	r1, [pc, #548]	@ (8023c30 <etharp_find_entry+0x2d4>)
 8023a0a:	4613      	mov	r3, r2
 8023a0c:	005b      	lsls	r3, r3, #1
 8023a0e:	4413      	add	r3, r2
 8023a10:	00db      	lsls	r3, r3, #3
 8023a12:	440b      	add	r3, r1
 8023a14:	3308      	adds	r3, #8
 8023a16:	681b      	ldr	r3, [r3, #0]
 8023a18:	687a      	ldr	r2, [r7, #4]
 8023a1a:	429a      	cmp	r2, r3
 8023a1c:	d102      	bne.n	8023a24 <etharp_find_entry+0xc8>
#endif /* ETHARP_TABLE_MATCH_NETIF */
         ) {
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: found matching entry %d\n", (int)i));
        /* found exact IP address match, simply bail out */
        return i;
 8023a1e:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8023a22:	e100      	b.n	8023c26 <etharp_find_entry+0x2ca>
      }
      /* pending entry? */
      if (state == ETHARP_STATE_PENDING) {
 8023a24:	7dfb      	ldrb	r3, [r7, #23]
 8023a26:	2b01      	cmp	r3, #1
 8023a28:	d140      	bne.n	8023aac <etharp_find_entry+0x150>
        /* pending with queued packets? */
        if (arp_table[i].q != NULL) {
 8023a2a:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023a2e:	4980      	ldr	r1, [pc, #512]	@ (8023c30 <etharp_find_entry+0x2d4>)
 8023a30:	4613      	mov	r3, r2
 8023a32:	005b      	lsls	r3, r3, #1
 8023a34:	4413      	add	r3, r2
 8023a36:	00db      	lsls	r3, r3, #3
 8023a38:	440b      	add	r3, r1
 8023a3a:	681b      	ldr	r3, [r3, #0]
 8023a3c:	2b00      	cmp	r3, #0
 8023a3e:	d01a      	beq.n	8023a76 <etharp_find_entry+0x11a>
          if (arp_table[i].ctime >= age_queue) {
 8023a40:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023a44:	497a      	ldr	r1, [pc, #488]	@ (8023c30 <etharp_find_entry+0x2d4>)
 8023a46:	4613      	mov	r3, r2
 8023a48:	005b      	lsls	r3, r3, #1
 8023a4a:	4413      	add	r3, r2
 8023a4c:	00db      	lsls	r3, r3, #3
 8023a4e:	440b      	add	r3, r1
 8023a50:	3312      	adds	r3, #18
 8023a52:	881b      	ldrh	r3, [r3, #0]
 8023a54:	8bba      	ldrh	r2, [r7, #28]
 8023a56:	429a      	cmp	r2, r3
 8023a58:	d845      	bhi.n	8023ae6 <etharp_find_entry+0x18a>
            old_queue = i;
 8023a5a:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8023a5c:	83fb      	strh	r3, [r7, #30]
            age_queue = arp_table[i].ctime;
 8023a5e:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023a62:	4973      	ldr	r1, [pc, #460]	@ (8023c30 <etharp_find_entry+0x2d4>)
 8023a64:	4613      	mov	r3, r2
 8023a66:	005b      	lsls	r3, r3, #1
 8023a68:	4413      	add	r3, r2
 8023a6a:	00db      	lsls	r3, r3, #3
 8023a6c:	440b      	add	r3, r1
 8023a6e:	3312      	adds	r3, #18
 8023a70:	881b      	ldrh	r3, [r3, #0]
 8023a72:	83bb      	strh	r3, [r7, #28]
 8023a74:	e037      	b.n	8023ae6 <etharp_find_entry+0x18a>
          }
        } else
          /* pending without queued packets? */
        {
          if (arp_table[i].ctime >= age_pending) {
 8023a76:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023a7a:	496d      	ldr	r1, [pc, #436]	@ (8023c30 <etharp_find_entry+0x2d4>)
 8023a7c:	4613      	mov	r3, r2
 8023a7e:	005b      	lsls	r3, r3, #1
 8023a80:	4413      	add	r3, r2
 8023a82:	00db      	lsls	r3, r3, #3
 8023a84:	440b      	add	r3, r1
 8023a86:	3312      	adds	r3, #18
 8023a88:	881b      	ldrh	r3, [r3, #0]
 8023a8a:	8b7a      	ldrh	r2, [r7, #26]
 8023a8c:	429a      	cmp	r2, r3
 8023a8e:	d82a      	bhi.n	8023ae6 <etharp_find_entry+0x18a>
            old_pending = i;
 8023a90:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8023a92:	843b      	strh	r3, [r7, #32]
            age_pending = arp_table[i].ctime;
 8023a94:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023a98:	4965      	ldr	r1, [pc, #404]	@ (8023c30 <etharp_find_entry+0x2d4>)
 8023a9a:	4613      	mov	r3, r2
 8023a9c:	005b      	lsls	r3, r3, #1
 8023a9e:	4413      	add	r3, r2
 8023aa0:	00db      	lsls	r3, r3, #3
 8023aa2:	440b      	add	r3, r1
 8023aa4:	3312      	adds	r3, #18
 8023aa6:	881b      	ldrh	r3, [r3, #0]
 8023aa8:	837b      	strh	r3, [r7, #26]
 8023aaa:	e01c      	b.n	8023ae6 <etharp_find_entry+0x18a>
          }
        }
        /* stable entry? */
      } else if (state >= ETHARP_STATE_STABLE) {
 8023aac:	7dfb      	ldrb	r3, [r7, #23]
 8023aae:	2b01      	cmp	r3, #1
 8023ab0:	d919      	bls.n	8023ae6 <etharp_find_entry+0x18a>
        /* don't record old_stable for static entries since they never expire */
        if (state < ETHARP_STATE_STATIC)
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
        {
          /* remember entry with oldest stable entry in oldest, its age in maxtime */
          if (arp_table[i].ctime >= age_stable) {
 8023ab2:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023ab6:	495e      	ldr	r1, [pc, #376]	@ (8023c30 <etharp_find_entry+0x2d4>)
 8023ab8:	4613      	mov	r3, r2
 8023aba:	005b      	lsls	r3, r3, #1
 8023abc:	4413      	add	r3, r2
 8023abe:	00db      	lsls	r3, r3, #3
 8023ac0:	440b      	add	r3, r1
 8023ac2:	3312      	adds	r3, #18
 8023ac4:	881b      	ldrh	r3, [r3, #0]
 8023ac6:	8b3a      	ldrh	r2, [r7, #24]
 8023ac8:	429a      	cmp	r2, r3
 8023aca:	d80c      	bhi.n	8023ae6 <etharp_find_entry+0x18a>
            old_stable = i;
 8023acc:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8023ace:	847b      	strh	r3, [r7, #34]	@ 0x22
            age_stable = arp_table[i].ctime;
 8023ad0:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023ad4:	4956      	ldr	r1, [pc, #344]	@ (8023c30 <etharp_find_entry+0x2d4>)
 8023ad6:	4613      	mov	r3, r2
 8023ad8:	005b      	lsls	r3, r3, #1
 8023ada:	4413      	add	r3, r2
 8023adc:	00db      	lsls	r3, r3, #3
 8023ade:	440b      	add	r3, r1
 8023ae0:	3312      	adds	r3, #18
 8023ae2:	881b      	ldrh	r3, [r3, #0]
 8023ae4:	833b      	strh	r3, [r7, #24]
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8023ae6:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8023ae8:	3301      	adds	r3, #1
 8023aea:	b29b      	uxth	r3, r3
 8023aec:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8023aee:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8023af2:	2b09      	cmp	r3, #9
 8023af4:	f77f af4c 	ble.w	8023990 <etharp_find_entry+0x34>
    }
  }
  /* { we have no match } => try to create a new entry */

  /* don't create new entry, only search? */
  if (((flags & ETHARP_FLAG_FIND_ONLY) != 0) ||
 8023af8:	7afb      	ldrb	r3, [r7, #11]
 8023afa:	f003 0302 	and.w	r3, r3, #2
 8023afe:	2b00      	cmp	r3, #0
 8023b00:	d108      	bne.n	8023b14 <etharp_find_entry+0x1b8>
 8023b02:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 8023b06:	2b0a      	cmp	r3, #10
 8023b08:	d107      	bne.n	8023b1a <etharp_find_entry+0x1be>
      /* or no empty entry found and not allowed to recycle? */
      ((empty == ARP_TABLE_SIZE) && ((flags & ETHARP_FLAG_TRY_HARD) == 0))) {
 8023b0a:	7afb      	ldrb	r3, [r7, #11]
 8023b0c:	f003 0301 	and.w	r3, r3, #1
 8023b10:	2b00      	cmp	r3, #0
 8023b12:	d102      	bne.n	8023b1a <etharp_find_entry+0x1be>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty entry found and not allowed to recycle\n"));
    return (s16_t)ERR_MEM;
 8023b14:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8023b18:	e085      	b.n	8023c26 <etharp_find_entry+0x2ca>
   *
   * { ETHARP_FLAG_TRY_HARD is set at this point }
   */

  /* 1) empty entry available? */
  if (empty < ARP_TABLE_SIZE) {
 8023b1a:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 8023b1e:	2b09      	cmp	r3, #9
 8023b20:	dc02      	bgt.n	8023b28 <etharp_find_entry+0x1cc>
    i = empty;
 8023b22:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8023b24:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8023b26:	e039      	b.n	8023b9c <etharp_find_entry+0x240>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting empty entry %d\n", (int)i));
  } else {
    /* 2) found recyclable stable entry? */
    if (old_stable < ARP_TABLE_SIZE) {
 8023b28:	f9b7 3022 	ldrsh.w	r3, [r7, #34]	@ 0x22
 8023b2c:	2b09      	cmp	r3, #9
 8023b2e:	dc14      	bgt.n	8023b5a <etharp_find_entry+0x1fe>
      /* recycle oldest stable*/
      i = old_stable;
 8023b30:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8023b32:	84fb      	strh	r3, [r7, #38]	@ 0x26
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest stable entry %d\n", (int)i));
      /* no queued packets should exist on stable entries */
      LWIP_ASSERT("arp_table[i].q == NULL", arp_table[i].q == NULL);
 8023b34:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023b38:	493d      	ldr	r1, [pc, #244]	@ (8023c30 <etharp_find_entry+0x2d4>)
 8023b3a:	4613      	mov	r3, r2
 8023b3c:	005b      	lsls	r3, r3, #1
 8023b3e:	4413      	add	r3, r2
 8023b40:	00db      	lsls	r3, r3, #3
 8023b42:	440b      	add	r3, r1
 8023b44:	681b      	ldr	r3, [r3, #0]
 8023b46:	2b00      	cmp	r3, #0
 8023b48:	d018      	beq.n	8023b7c <etharp_find_entry+0x220>
 8023b4a:	4b3a      	ldr	r3, [pc, #232]	@ (8023c34 <etharp_find_entry+0x2d8>)
 8023b4c:	f240 126d 	movw	r2, #365	@ 0x16d
 8023b50:	493b      	ldr	r1, [pc, #236]	@ (8023c40 <etharp_find_entry+0x2e4>)
 8023b52:	483a      	ldr	r0, [pc, #232]	@ (8023c3c <etharp_find_entry+0x2e0>)
 8023b54:	f005 ff42 	bl	80299dc <iprintf>
 8023b58:	e010      	b.n	8023b7c <etharp_find_entry+0x220>
      /* 3) found recyclable pending entry without queued packets? */
    } else if (old_pending < ARP_TABLE_SIZE) {
 8023b5a:	f9b7 3020 	ldrsh.w	r3, [r7, #32]
 8023b5e:	2b09      	cmp	r3, #9
 8023b60:	dc02      	bgt.n	8023b68 <etharp_find_entry+0x20c>
      /* recycle oldest pending */
      i = old_pending;
 8023b62:	8c3b      	ldrh	r3, [r7, #32]
 8023b64:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8023b66:	e009      	b.n	8023b7c <etharp_find_entry+0x220>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d (without queue)\n", (int)i));
      /* 4) found recyclable pending entry with queued packets? */
    } else if (old_queue < ARP_TABLE_SIZE) {
 8023b68:	f9b7 301e 	ldrsh.w	r3, [r7, #30]
 8023b6c:	2b09      	cmp	r3, #9
 8023b6e:	dc02      	bgt.n	8023b76 <etharp_find_entry+0x21a>
      /* recycle oldest pending (queued packets are free in etharp_free_entry) */
      i = old_queue;
 8023b70:	8bfb      	ldrh	r3, [r7, #30]
 8023b72:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8023b74:	e002      	b.n	8023b7c <etharp_find_entry+0x220>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d, freeing packet queue %p\n", (int)i, (void *)(arp_table[i].q)));
      /* no empty or recyclable entries found */
    } else {
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty or recyclable entries found\n"));
      return (s16_t)ERR_MEM;
 8023b76:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8023b7a:	e054      	b.n	8023c26 <etharp_find_entry+0x2ca>
    }

    /* { empty or recyclable entry found } */
    LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE);
 8023b7c:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8023b80:	2b09      	cmp	r3, #9
 8023b82:	dd06      	ble.n	8023b92 <etharp_find_entry+0x236>
 8023b84:	4b2b      	ldr	r3, [pc, #172]	@ (8023c34 <etharp_find_entry+0x2d8>)
 8023b86:	f240 127f 	movw	r2, #383	@ 0x17f
 8023b8a:	492e      	ldr	r1, [pc, #184]	@ (8023c44 <etharp_find_entry+0x2e8>)
 8023b8c:	482b      	ldr	r0, [pc, #172]	@ (8023c3c <etharp_find_entry+0x2e0>)
 8023b8e:	f005 ff25 	bl	80299dc <iprintf>
    etharp_free_entry(i);
 8023b92:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8023b96:	4618      	mov	r0, r3
 8023b98:	f7ff fdd8 	bl	802374c <etharp_free_entry>
  }

  LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE);
 8023b9c:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8023ba0:	2b09      	cmp	r3, #9
 8023ba2:	dd06      	ble.n	8023bb2 <etharp_find_entry+0x256>
 8023ba4:	4b23      	ldr	r3, [pc, #140]	@ (8023c34 <etharp_find_entry+0x2d8>)
 8023ba6:	f240 1283 	movw	r2, #387	@ 0x183
 8023baa:	4926      	ldr	r1, [pc, #152]	@ (8023c44 <etharp_find_entry+0x2e8>)
 8023bac:	4823      	ldr	r0, [pc, #140]	@ (8023c3c <etharp_find_entry+0x2e0>)
 8023bae:	f005 ff15 	bl	80299dc <iprintf>
  LWIP_ASSERT("arp_table[i].state == ETHARP_STATE_EMPTY",
 8023bb2:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023bb6:	491e      	ldr	r1, [pc, #120]	@ (8023c30 <etharp_find_entry+0x2d4>)
 8023bb8:	4613      	mov	r3, r2
 8023bba:	005b      	lsls	r3, r3, #1
 8023bbc:	4413      	add	r3, r2
 8023bbe:	00db      	lsls	r3, r3, #3
 8023bc0:	440b      	add	r3, r1
 8023bc2:	3314      	adds	r3, #20
 8023bc4:	781b      	ldrb	r3, [r3, #0]
 8023bc6:	2b00      	cmp	r3, #0
 8023bc8:	d006      	beq.n	8023bd8 <etharp_find_entry+0x27c>
 8023bca:	4b1a      	ldr	r3, [pc, #104]	@ (8023c34 <etharp_find_entry+0x2d8>)
 8023bcc:	f44f 72c2 	mov.w	r2, #388	@ 0x184
 8023bd0:	491d      	ldr	r1, [pc, #116]	@ (8023c48 <etharp_find_entry+0x2ec>)
 8023bd2:	481a      	ldr	r0, [pc, #104]	@ (8023c3c <etharp_find_entry+0x2e0>)
 8023bd4:	f005 ff02 	bl	80299dc <iprintf>
              arp_table[i].state == ETHARP_STATE_EMPTY);

  /* IP address given? */
  if (ipaddr != NULL) {
 8023bd8:	68fb      	ldr	r3, [r7, #12]
 8023bda:	2b00      	cmp	r3, #0
 8023bdc:	d00b      	beq.n	8023bf6 <etharp_find_entry+0x29a>
    /* set IP address */
    ip4_addr_copy(arp_table[i].ipaddr, *ipaddr);
 8023bde:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023be2:	68fb      	ldr	r3, [r7, #12]
 8023be4:	6819      	ldr	r1, [r3, #0]
 8023be6:	4812      	ldr	r0, [pc, #72]	@ (8023c30 <etharp_find_entry+0x2d4>)
 8023be8:	4613      	mov	r3, r2
 8023bea:	005b      	lsls	r3, r3, #1
 8023bec:	4413      	add	r3, r2
 8023bee:	00db      	lsls	r3, r3, #3
 8023bf0:	4403      	add	r3, r0
 8023bf2:	3304      	adds	r3, #4
 8023bf4:	6019      	str	r1, [r3, #0]
  }
  arp_table[i].ctime = 0;
 8023bf6:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023bfa:	490d      	ldr	r1, [pc, #52]	@ (8023c30 <etharp_find_entry+0x2d4>)
 8023bfc:	4613      	mov	r3, r2
 8023bfe:	005b      	lsls	r3, r3, #1
 8023c00:	4413      	add	r3, r2
 8023c02:	00db      	lsls	r3, r3, #3
 8023c04:	440b      	add	r3, r1
 8023c06:	3312      	adds	r3, #18
 8023c08:	2200      	movs	r2, #0
 8023c0a:	801a      	strh	r2, [r3, #0]
#if ETHARP_TABLE_MATCH_NETIF
  arp_table[i].netif = netif;
 8023c0c:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023c10:	4907      	ldr	r1, [pc, #28]	@ (8023c30 <etharp_find_entry+0x2d4>)
 8023c12:	4613      	mov	r3, r2
 8023c14:	005b      	lsls	r3, r3, #1
 8023c16:	4413      	add	r3, r2
 8023c18:	00db      	lsls	r3, r3, #3
 8023c1a:	440b      	add	r3, r1
 8023c1c:	3308      	adds	r3, #8
 8023c1e:	687a      	ldr	r2, [r7, #4]
 8023c20:	601a      	str	r2, [r3, #0]
#endif /* ETHARP_TABLE_MATCH_NETIF */
  return (s16_t)i;
 8023c22:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
}
 8023c26:	4618      	mov	r0, r3
 8023c28:	3728      	adds	r7, #40	@ 0x28
 8023c2a:	46bd      	mov	sp, r7
 8023c2c:	bd80      	pop	{r7, pc}
 8023c2e:	bf00      	nop
 8023c30:	2402af20 	.word	0x2402af20
 8023c34:	0803023c 	.word	0x0803023c
 8023c38:	08030274 	.word	0x08030274
 8023c3c:	080302b4 	.word	0x080302b4
 8023c40:	080302dc 	.word	0x080302dc
 8023c44:	080302f4 	.word	0x080302f4
 8023c48:	08030308 	.word	0x08030308

08023c4c <etharp_update_arp_entry>:
 *
 * @see pbuf_free()
 */
static err_t
etharp_update_arp_entry(struct netif *netif, const ip4_addr_t *ipaddr, struct eth_addr *ethaddr, u8_t flags)
{
 8023c4c:	b580      	push	{r7, lr}
 8023c4e:	b088      	sub	sp, #32
 8023c50:	af02      	add	r7, sp, #8
 8023c52:	60f8      	str	r0, [r7, #12]
 8023c54:	60b9      	str	r1, [r7, #8]
 8023c56:	607a      	str	r2, [r7, #4]
 8023c58:	70fb      	strb	r3, [r7, #3]
  s16_t i;
  LWIP_ASSERT("netif->hwaddr_len == ETH_HWADDR_LEN", netif->hwaddr_len == ETH_HWADDR_LEN);
 8023c5a:	68fb      	ldr	r3, [r7, #12]
 8023c5c:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8023c60:	2b06      	cmp	r3, #6
 8023c62:	d006      	beq.n	8023c72 <etharp_update_arp_entry+0x26>
 8023c64:	4b48      	ldr	r3, [pc, #288]	@ (8023d88 <etharp_update_arp_entry+0x13c>)
 8023c66:	f240 12a9 	movw	r2, #425	@ 0x1a9
 8023c6a:	4948      	ldr	r1, [pc, #288]	@ (8023d8c <etharp_update_arp_entry+0x140>)
 8023c6c:	4848      	ldr	r0, [pc, #288]	@ (8023d90 <etharp_update_arp_entry+0x144>)
 8023c6e:	f005 feb5 	bl	80299dc <iprintf>
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n",
              ip4_addr1_16(ipaddr), ip4_addr2_16(ipaddr), ip4_addr3_16(ipaddr), ip4_addr4_16(ipaddr),
              (u16_t)ethaddr->addr[0], (u16_t)ethaddr->addr[1], (u16_t)ethaddr->addr[2],
              (u16_t)ethaddr->addr[3], (u16_t)ethaddr->addr[4], (u16_t)ethaddr->addr[5]));
  /* non-unicast address? */
  if (ip4_addr_isany(ipaddr) ||
 8023c72:	68bb      	ldr	r3, [r7, #8]
 8023c74:	2b00      	cmp	r3, #0
 8023c76:	d012      	beq.n	8023c9e <etharp_update_arp_entry+0x52>
 8023c78:	68bb      	ldr	r3, [r7, #8]
 8023c7a:	681b      	ldr	r3, [r3, #0]
 8023c7c:	2b00      	cmp	r3, #0
 8023c7e:	d00e      	beq.n	8023c9e <etharp_update_arp_entry+0x52>
      ip4_addr_isbroadcast(ipaddr, netif) ||
 8023c80:	68bb      	ldr	r3, [r7, #8]
 8023c82:	681b      	ldr	r3, [r3, #0]
 8023c84:	68f9      	ldr	r1, [r7, #12]
 8023c86:	4618      	mov	r0, r3
 8023c88:	f001 f952 	bl	8024f30 <ip4_addr_isbroadcast_u32>
 8023c8c:	4603      	mov	r3, r0
  if (ip4_addr_isany(ipaddr) ||
 8023c8e:	2b00      	cmp	r3, #0
 8023c90:	d105      	bne.n	8023c9e <etharp_update_arp_entry+0x52>
      ip4_addr_ismulticast(ipaddr)) {
 8023c92:	68bb      	ldr	r3, [r7, #8]
 8023c94:	681b      	ldr	r3, [r3, #0]
 8023c96:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
      ip4_addr_isbroadcast(ipaddr, netif) ||
 8023c9a:	2be0      	cmp	r3, #224	@ 0xe0
 8023c9c:	d102      	bne.n	8023ca4 <etharp_update_arp_entry+0x58>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: will not add non-unicast IP address to ARP cache\n"));
    return ERR_ARG;
 8023c9e:	f06f 030f 	mvn.w	r3, #15
 8023ca2:	e06c      	b.n	8023d7e <etharp_update_arp_entry+0x132>
  }
  /* find or create ARP entry */
  i = etharp_find_entry(ipaddr, flags, netif);
 8023ca4:	78fb      	ldrb	r3, [r7, #3]
 8023ca6:	68fa      	ldr	r2, [r7, #12]
 8023ca8:	4619      	mov	r1, r3
 8023caa:	68b8      	ldr	r0, [r7, #8]
 8023cac:	f7ff fe56 	bl	802395c <etharp_find_entry>
 8023cb0:	4603      	mov	r3, r0
 8023cb2:	82fb      	strh	r3, [r7, #22]
  /* bail out if no entry could be found */
  if (i < 0) {
 8023cb4:	f9b7 3016 	ldrsh.w	r3, [r7, #22]
 8023cb8:	2b00      	cmp	r3, #0
 8023cba:	da02      	bge.n	8023cc2 <etharp_update_arp_entry+0x76>
    return (err_t)i;
 8023cbc:	8afb      	ldrh	r3, [r7, #22]
 8023cbe:	b25b      	sxtb	r3, r3
 8023cc0:	e05d      	b.n	8023d7e <etharp_update_arp_entry+0x132>
    return ERR_VAL;
  } else
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
  {
    /* mark it stable */
    arp_table[i].state = ETHARP_STATE_STABLE;
 8023cc2:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8023cc6:	4933      	ldr	r1, [pc, #204]	@ (8023d94 <etharp_update_arp_entry+0x148>)
 8023cc8:	4613      	mov	r3, r2
 8023cca:	005b      	lsls	r3, r3, #1
 8023ccc:	4413      	add	r3, r2
 8023cce:	00db      	lsls	r3, r3, #3
 8023cd0:	440b      	add	r3, r1
 8023cd2:	3314      	adds	r3, #20
 8023cd4:	2202      	movs	r2, #2
 8023cd6:	701a      	strb	r2, [r3, #0]
  }

  /* record network interface */
  arp_table[i].netif = netif;
 8023cd8:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8023cdc:	492d      	ldr	r1, [pc, #180]	@ (8023d94 <etharp_update_arp_entry+0x148>)
 8023cde:	4613      	mov	r3, r2
 8023ce0:	005b      	lsls	r3, r3, #1
 8023ce2:	4413      	add	r3, r2
 8023ce4:	00db      	lsls	r3, r3, #3
 8023ce6:	440b      	add	r3, r1
 8023ce8:	3308      	adds	r3, #8
 8023cea:	68fa      	ldr	r2, [r7, #12]
 8023cec:	601a      	str	r2, [r3, #0]
  /* insert in SNMP ARP index tree */
  mib2_add_arp_entry(netif, &arp_table[i].ipaddr);

  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: updating stable entry %"S16_F"\n", i));
  /* update address */
  SMEMCPY(&arp_table[i].ethaddr, ethaddr, ETH_HWADDR_LEN);
 8023cee:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8023cf2:	4613      	mov	r3, r2
 8023cf4:	005b      	lsls	r3, r3, #1
 8023cf6:	4413      	add	r3, r2
 8023cf8:	00db      	lsls	r3, r3, #3
 8023cfa:	3308      	adds	r3, #8
 8023cfc:	4a25      	ldr	r2, [pc, #148]	@ (8023d94 <etharp_update_arp_entry+0x148>)
 8023cfe:	4413      	add	r3, r2
 8023d00:	3304      	adds	r3, #4
 8023d02:	2206      	movs	r2, #6
 8023d04:	6879      	ldr	r1, [r7, #4]
 8023d06:	4618      	mov	r0, r3
 8023d08:	f006 f8f1 	bl	8029eee <memcpy>
  /* reset time stamp */
  arp_table[i].ctime = 0;
 8023d0c:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8023d10:	4920      	ldr	r1, [pc, #128]	@ (8023d94 <etharp_update_arp_entry+0x148>)
 8023d12:	4613      	mov	r3, r2
 8023d14:	005b      	lsls	r3, r3, #1
 8023d16:	4413      	add	r3, r2
 8023d18:	00db      	lsls	r3, r3, #3
 8023d1a:	440b      	add	r3, r1
 8023d1c:	3312      	adds	r3, #18
 8023d1e:	2200      	movs	r2, #0
 8023d20:	801a      	strh	r2, [r3, #0]
    /* get the packet pointer */
    p = q->p;
    /* now queue entry can be freed */
    memp_free(MEMP_ARP_QUEUE, q);
#else /* ARP_QUEUEING */
  if (arp_table[i].q != NULL) {
 8023d22:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8023d26:	491b      	ldr	r1, [pc, #108]	@ (8023d94 <etharp_update_arp_entry+0x148>)
 8023d28:	4613      	mov	r3, r2
 8023d2a:	005b      	lsls	r3, r3, #1
 8023d2c:	4413      	add	r3, r2
 8023d2e:	00db      	lsls	r3, r3, #3
 8023d30:	440b      	add	r3, r1
 8023d32:	681b      	ldr	r3, [r3, #0]
 8023d34:	2b00      	cmp	r3, #0
 8023d36:	d021      	beq.n	8023d7c <etharp_update_arp_entry+0x130>
    struct pbuf *p = arp_table[i].q;
 8023d38:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8023d3c:	4915      	ldr	r1, [pc, #84]	@ (8023d94 <etharp_update_arp_entry+0x148>)
 8023d3e:	4613      	mov	r3, r2
 8023d40:	005b      	lsls	r3, r3, #1
 8023d42:	4413      	add	r3, r2
 8023d44:	00db      	lsls	r3, r3, #3
 8023d46:	440b      	add	r3, r1
 8023d48:	681b      	ldr	r3, [r3, #0]
 8023d4a:	613b      	str	r3, [r7, #16]
    arp_table[i].q = NULL;
 8023d4c:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8023d50:	4910      	ldr	r1, [pc, #64]	@ (8023d94 <etharp_update_arp_entry+0x148>)
 8023d52:	4613      	mov	r3, r2
 8023d54:	005b      	lsls	r3, r3, #1
 8023d56:	4413      	add	r3, r2
 8023d58:	00db      	lsls	r3, r3, #3
 8023d5a:	440b      	add	r3, r1
 8023d5c:	2200      	movs	r2, #0
 8023d5e:	601a      	str	r2, [r3, #0]
#endif /* ARP_QUEUEING */
    /* send the queued IP packet */
    ethernet_output(netif, p, (struct eth_addr *)(netif->hwaddr), ethaddr, ETHTYPE_IP);
 8023d60:	68fb      	ldr	r3, [r7, #12]
 8023d62:	f103 022a 	add.w	r2, r3, #42	@ 0x2a
 8023d66:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 8023d6a:	9300      	str	r3, [sp, #0]
 8023d6c:	687b      	ldr	r3, [r7, #4]
 8023d6e:	6939      	ldr	r1, [r7, #16]
 8023d70:	68f8      	ldr	r0, [r7, #12]
 8023d72:	f002 f9bb 	bl	80260ec <ethernet_output>
    /* free the queued IP packet */
    pbuf_free(p);
 8023d76:	6938      	ldr	r0, [r7, #16]
 8023d78:	f7f6 fbb8 	bl	801a4ec <pbuf_free>
  }
  return ERR_OK;
 8023d7c:	2300      	movs	r3, #0
}
 8023d7e:	4618      	mov	r0, r3
 8023d80:	3718      	adds	r7, #24
 8023d82:	46bd      	mov	sp, r7
 8023d84:	bd80      	pop	{r7, pc}
 8023d86:	bf00      	nop
 8023d88:	0803023c 	.word	0x0803023c
 8023d8c:	08030334 	.word	0x08030334
 8023d90:	080302b4 	.word	0x080302b4
 8023d94:	2402af20 	.word	0x2402af20

08023d98 <etharp_cleanup_netif>:
 *
 * @param netif points to a network interface
 */
void
etharp_cleanup_netif(struct netif *netif)
{
 8023d98:	b580      	push	{r7, lr}
 8023d9a:	b084      	sub	sp, #16
 8023d9c:	af00      	add	r7, sp, #0
 8023d9e:	6078      	str	r0, [r7, #4]
  int i;

  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8023da0:	2300      	movs	r3, #0
 8023da2:	60fb      	str	r3, [r7, #12]
 8023da4:	e01e      	b.n	8023de4 <etharp_cleanup_netif+0x4c>
    u8_t state = arp_table[i].state;
 8023da6:	4913      	ldr	r1, [pc, #76]	@ (8023df4 <etharp_cleanup_netif+0x5c>)
 8023da8:	68fa      	ldr	r2, [r7, #12]
 8023daa:	4613      	mov	r3, r2
 8023dac:	005b      	lsls	r3, r3, #1
 8023dae:	4413      	add	r3, r2
 8023db0:	00db      	lsls	r3, r3, #3
 8023db2:	440b      	add	r3, r1
 8023db4:	3314      	adds	r3, #20
 8023db6:	781b      	ldrb	r3, [r3, #0]
 8023db8:	72fb      	strb	r3, [r7, #11]
    if ((state != ETHARP_STATE_EMPTY) && (arp_table[i].netif == netif)) {
 8023dba:	7afb      	ldrb	r3, [r7, #11]
 8023dbc:	2b00      	cmp	r3, #0
 8023dbe:	d00e      	beq.n	8023dde <etharp_cleanup_netif+0x46>
 8023dc0:	490c      	ldr	r1, [pc, #48]	@ (8023df4 <etharp_cleanup_netif+0x5c>)
 8023dc2:	68fa      	ldr	r2, [r7, #12]
 8023dc4:	4613      	mov	r3, r2
 8023dc6:	005b      	lsls	r3, r3, #1
 8023dc8:	4413      	add	r3, r2
 8023dca:	00db      	lsls	r3, r3, #3
 8023dcc:	440b      	add	r3, r1
 8023dce:	3308      	adds	r3, #8
 8023dd0:	681b      	ldr	r3, [r3, #0]
 8023dd2:	687a      	ldr	r2, [r7, #4]
 8023dd4:	429a      	cmp	r2, r3
 8023dd6:	d102      	bne.n	8023dde <etharp_cleanup_netif+0x46>
      etharp_free_entry(i);
 8023dd8:	68f8      	ldr	r0, [r7, #12]
 8023dda:	f7ff fcb7 	bl	802374c <etharp_free_entry>
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8023dde:	68fb      	ldr	r3, [r7, #12]
 8023de0:	3301      	adds	r3, #1
 8023de2:	60fb      	str	r3, [r7, #12]
 8023de4:	68fb      	ldr	r3, [r7, #12]
 8023de6:	2b09      	cmp	r3, #9
 8023de8:	dddd      	ble.n	8023da6 <etharp_cleanup_netif+0xe>
    }
  }
}
 8023dea:	bf00      	nop
 8023dec:	bf00      	nop
 8023dee:	3710      	adds	r7, #16
 8023df0:	46bd      	mov	sp, r7
 8023df2:	bd80      	pop	{r7, pc}
 8023df4:	2402af20 	.word	0x2402af20

08023df8 <etharp_input>:
 *
 * @see pbuf_free()
 */
void
etharp_input(struct pbuf *p, struct netif *netif)
{
 8023df8:	b5b0      	push	{r4, r5, r7, lr}
 8023dfa:	b08a      	sub	sp, #40	@ 0x28
 8023dfc:	af04      	add	r7, sp, #16
 8023dfe:	6078      	str	r0, [r7, #4]
 8023e00:	6039      	str	r1, [r7, #0]
  struct etharp_hdr *hdr;
  /* these are aligned properly, whereas the ARP header fields might not be */
  ip4_addr_t sipaddr, dipaddr;
  u8_t for_us;

  LWIP_ASSERT_CORE_LOCKED();
 8023e02:	f7ec fb9f 	bl	8010544 <sys_check_core_locking>

  LWIP_ERROR("netif != NULL", (netif != NULL), return;);
 8023e06:	683b      	ldr	r3, [r7, #0]
 8023e08:	2b00      	cmp	r3, #0
 8023e0a:	d107      	bne.n	8023e1c <etharp_input+0x24>
 8023e0c:	4b3f      	ldr	r3, [pc, #252]	@ (8023f0c <etharp_input+0x114>)
 8023e0e:	f240 228a 	movw	r2, #650	@ 0x28a
 8023e12:	493f      	ldr	r1, [pc, #252]	@ (8023f10 <etharp_input+0x118>)
 8023e14:	483f      	ldr	r0, [pc, #252]	@ (8023f14 <etharp_input+0x11c>)
 8023e16:	f005 fde1 	bl	80299dc <iprintf>
 8023e1a:	e074      	b.n	8023f06 <etharp_input+0x10e>

  hdr = (struct etharp_hdr *)p->payload;
 8023e1c:	687b      	ldr	r3, [r7, #4]
 8023e1e:	685b      	ldr	r3, [r3, #4]
 8023e20:	617b      	str	r3, [r7, #20]

  /* RFC 826 "Packet Reception": */
  if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) ||
 8023e22:	697b      	ldr	r3, [r7, #20]
 8023e24:	881b      	ldrh	r3, [r3, #0]
 8023e26:	b29b      	uxth	r3, r3
 8023e28:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 8023e2c:	d10c      	bne.n	8023e48 <etharp_input+0x50>
      (hdr->hwlen != ETH_HWADDR_LEN) ||
 8023e2e:	697b      	ldr	r3, [r7, #20]
 8023e30:	791b      	ldrb	r3, [r3, #4]
  if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) ||
 8023e32:	2b06      	cmp	r3, #6
 8023e34:	d108      	bne.n	8023e48 <etharp_input+0x50>
      (hdr->protolen != sizeof(ip4_addr_t)) ||
 8023e36:	697b      	ldr	r3, [r7, #20]
 8023e38:	795b      	ldrb	r3, [r3, #5]
      (hdr->hwlen != ETH_HWADDR_LEN) ||
 8023e3a:	2b04      	cmp	r3, #4
 8023e3c:	d104      	bne.n	8023e48 <etharp_input+0x50>
      (hdr->proto != PP_HTONS(ETHTYPE_IP)))  {
 8023e3e:	697b      	ldr	r3, [r7, #20]
 8023e40:	885b      	ldrh	r3, [r3, #2]
 8023e42:	b29b      	uxth	r3, r3
      (hdr->protolen != sizeof(ip4_addr_t)) ||
 8023e44:	2b08      	cmp	r3, #8
 8023e46:	d003      	beq.n	8023e50 <etharp_input+0x58>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING,
                ("etharp_input: packet dropped, wrong hw type, hwlen, proto, protolen or ethernet type (%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F")\n",
                 hdr->hwtype, (u16_t)hdr->hwlen, hdr->proto, (u16_t)hdr->protolen));
    ETHARP_STATS_INC(etharp.proterr);
    ETHARP_STATS_INC(etharp.drop);
    pbuf_free(p);
 8023e48:	6878      	ldr	r0, [r7, #4]
 8023e4a:	f7f6 fb4f 	bl	801a4ec <pbuf_free>
    return;
 8023e4e:	e05a      	b.n	8023f06 <etharp_input+0x10e>
  autoip_arp_reply(netif, hdr);
#endif /* LWIP_AUTOIP */

  /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without
   * structure packing (not using structure copy which breaks strict-aliasing rules). */
  IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&sipaddr, &hdr->sipaddr);
 8023e50:	697b      	ldr	r3, [r7, #20]
 8023e52:	330e      	adds	r3, #14
 8023e54:	681b      	ldr	r3, [r3, #0]
 8023e56:	60fb      	str	r3, [r7, #12]
  IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&dipaddr, &hdr->dipaddr);
 8023e58:	697b      	ldr	r3, [r7, #20]
 8023e5a:	3318      	adds	r3, #24
 8023e5c:	681b      	ldr	r3, [r3, #0]
 8023e5e:	60bb      	str	r3, [r7, #8]

  /* this interface is not configured? */
  if (ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 8023e60:	683b      	ldr	r3, [r7, #0]
 8023e62:	3304      	adds	r3, #4
 8023e64:	681b      	ldr	r3, [r3, #0]
 8023e66:	2b00      	cmp	r3, #0
 8023e68:	d102      	bne.n	8023e70 <etharp_input+0x78>
    for_us = 0;
 8023e6a:	2300      	movs	r3, #0
 8023e6c:	74fb      	strb	r3, [r7, #19]
 8023e6e:	e009      	b.n	8023e84 <etharp_input+0x8c>
  } else {
    /* ARP packet directed to us? */
    for_us = (u8_t)ip4_addr_cmp(&dipaddr, netif_ip4_addr(netif));
 8023e70:	68ba      	ldr	r2, [r7, #8]
 8023e72:	683b      	ldr	r3, [r7, #0]
 8023e74:	3304      	adds	r3, #4
 8023e76:	681b      	ldr	r3, [r3, #0]
 8023e78:	429a      	cmp	r2, r3
 8023e7a:	bf0c      	ite	eq
 8023e7c:	2301      	moveq	r3, #1
 8023e7e:	2300      	movne	r3, #0
 8023e80:	b2db      	uxtb	r3, r3
 8023e82:	74fb      	strb	r3, [r7, #19]
  /* ARP message directed to us?
      -> add IP address in ARP cache; assume requester wants to talk to us,
         can result in directly sending the queued packets for this host.
     ARP message not directed to us?
      ->  update the source IP address in the cache, if present */
  etharp_update_arp_entry(netif, &sipaddr, &(hdr->shwaddr),
 8023e84:	697b      	ldr	r3, [r7, #20]
 8023e86:	f103 0208 	add.w	r2, r3, #8
 8023e8a:	7cfb      	ldrb	r3, [r7, #19]
 8023e8c:	2b00      	cmp	r3, #0
 8023e8e:	d001      	beq.n	8023e94 <etharp_input+0x9c>
 8023e90:	2301      	movs	r3, #1
 8023e92:	e000      	b.n	8023e96 <etharp_input+0x9e>
 8023e94:	2302      	movs	r3, #2
 8023e96:	f107 010c 	add.w	r1, r7, #12
 8023e9a:	6838      	ldr	r0, [r7, #0]
 8023e9c:	f7ff fed6 	bl	8023c4c <etharp_update_arp_entry>
                          for_us ? ETHARP_FLAG_TRY_HARD : ETHARP_FLAG_FIND_ONLY);

  /* now act on the message itself */
  switch (hdr->opcode) {
 8023ea0:	697b      	ldr	r3, [r7, #20]
 8023ea2:	88db      	ldrh	r3, [r3, #6]
 8023ea4:	b29b      	uxth	r3, r3
 8023ea6:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 8023eaa:	d003      	beq.n	8023eb4 <etharp_input+0xbc>
 8023eac:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 8023eb0:	d01e      	beq.n	8023ef0 <etharp_input+0xf8>
#endif /* (LWIP_DHCP && DHCP_DOES_ARP_CHECK) */
      break;
    default:
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_input: ARP unknown opcode type %"S16_F"\n", lwip_htons(hdr->opcode)));
      ETHARP_STATS_INC(etharp.err);
      break;
 8023eb2:	e025      	b.n	8023f00 <etharp_input+0x108>
      if (for_us) {
 8023eb4:	7cfb      	ldrb	r3, [r7, #19]
 8023eb6:	2b00      	cmp	r3, #0
 8023eb8:	d021      	beq.n	8023efe <etharp_input+0x106>
                   (struct eth_addr *)netif->hwaddr, &hdr->shwaddr,
 8023eba:	683b      	ldr	r3, [r7, #0]
 8023ebc:	f103 002a 	add.w	r0, r3, #42	@ 0x2a
 8023ec0:	697b      	ldr	r3, [r7, #20]
 8023ec2:	f103 0408 	add.w	r4, r3, #8
                   (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif),
 8023ec6:	683b      	ldr	r3, [r7, #0]
 8023ec8:	f103 052a 	add.w	r5, r3, #42	@ 0x2a
 8023ecc:	683b      	ldr	r3, [r7, #0]
 8023ece:	3304      	adds	r3, #4
                   &hdr->shwaddr, &sipaddr,
 8023ed0:	697a      	ldr	r2, [r7, #20]
 8023ed2:	3208      	adds	r2, #8
        etharp_raw(netif,
 8023ed4:	2102      	movs	r1, #2
 8023ed6:	9103      	str	r1, [sp, #12]
 8023ed8:	f107 010c 	add.w	r1, r7, #12
 8023edc:	9102      	str	r1, [sp, #8]
 8023ede:	9201      	str	r2, [sp, #4]
 8023ee0:	9300      	str	r3, [sp, #0]
 8023ee2:	462b      	mov	r3, r5
 8023ee4:	4622      	mov	r2, r4
 8023ee6:	4601      	mov	r1, r0
 8023ee8:	6838      	ldr	r0, [r7, #0]
 8023eea:	f000 faf1 	bl	80244d0 <etharp_raw>
      break;
 8023eee:	e006      	b.n	8023efe <etharp_input+0x106>
      dhcp_arp_reply(netif, &sipaddr);
 8023ef0:	f107 030c 	add.w	r3, r7, #12
 8023ef4:	4619      	mov	r1, r3
 8023ef6:	6838      	ldr	r0, [r7, #0]
 8023ef8:	f7fe f9b6 	bl	8022268 <dhcp_arp_reply>
      break;
 8023efc:	e000      	b.n	8023f00 <etharp_input+0x108>
      break;
 8023efe:	bf00      	nop
  }
  /* free ARP packet */
  pbuf_free(p);
 8023f00:	6878      	ldr	r0, [r7, #4]
 8023f02:	f7f6 faf3 	bl	801a4ec <pbuf_free>
}
 8023f06:	3718      	adds	r7, #24
 8023f08:	46bd      	mov	sp, r7
 8023f0a:	bdb0      	pop	{r4, r5, r7, pc}
 8023f0c:	0803023c 	.word	0x0803023c
 8023f10:	0803038c 	.word	0x0803038c
 8023f14:	080302b4 	.word	0x080302b4

08023f18 <etharp_output_to_arp_index>:
/** Just a small helper function that sends a pbuf to an ethernet address
 * in the arp_table specified by the index 'arp_idx'.
 */
static err_t
etharp_output_to_arp_index(struct netif *netif, struct pbuf *q, netif_addr_idx_t arp_idx)
{
 8023f18:	b580      	push	{r7, lr}
 8023f1a:	b086      	sub	sp, #24
 8023f1c:	af02      	add	r7, sp, #8
 8023f1e:	60f8      	str	r0, [r7, #12]
 8023f20:	60b9      	str	r1, [r7, #8]
 8023f22:	4613      	mov	r3, r2
 8023f24:	71fb      	strb	r3, [r7, #7]
  LWIP_ASSERT("arp_table[arp_idx].state >= ETHARP_STATE_STABLE",
 8023f26:	79fa      	ldrb	r2, [r7, #7]
 8023f28:	4944      	ldr	r1, [pc, #272]	@ (802403c <etharp_output_to_arp_index+0x124>)
 8023f2a:	4613      	mov	r3, r2
 8023f2c:	005b      	lsls	r3, r3, #1
 8023f2e:	4413      	add	r3, r2
 8023f30:	00db      	lsls	r3, r3, #3
 8023f32:	440b      	add	r3, r1
 8023f34:	3314      	adds	r3, #20
 8023f36:	781b      	ldrb	r3, [r3, #0]
 8023f38:	2b01      	cmp	r3, #1
 8023f3a:	d806      	bhi.n	8023f4a <etharp_output_to_arp_index+0x32>
 8023f3c:	4b40      	ldr	r3, [pc, #256]	@ (8024040 <etharp_output_to_arp_index+0x128>)
 8023f3e:	f240 22ee 	movw	r2, #750	@ 0x2ee
 8023f42:	4940      	ldr	r1, [pc, #256]	@ (8024044 <etharp_output_to_arp_index+0x12c>)
 8023f44:	4840      	ldr	r0, [pc, #256]	@ (8024048 <etharp_output_to_arp_index+0x130>)
 8023f46:	f005 fd49 	bl	80299dc <iprintf>
              arp_table[arp_idx].state >= ETHARP_STATE_STABLE);
  /* if arp table entry is about to expire: re-request it,
     but only if its state is ETHARP_STATE_STABLE to prevent flooding the
     network with ARP requests if this address is used frequently. */
  if (arp_table[arp_idx].state == ETHARP_STATE_STABLE) {
 8023f4a:	79fa      	ldrb	r2, [r7, #7]
 8023f4c:	493b      	ldr	r1, [pc, #236]	@ (802403c <etharp_output_to_arp_index+0x124>)
 8023f4e:	4613      	mov	r3, r2
 8023f50:	005b      	lsls	r3, r3, #1
 8023f52:	4413      	add	r3, r2
 8023f54:	00db      	lsls	r3, r3, #3
 8023f56:	440b      	add	r3, r1
 8023f58:	3314      	adds	r3, #20
 8023f5a:	781b      	ldrb	r3, [r3, #0]
 8023f5c:	2b02      	cmp	r3, #2
 8023f5e:	d153      	bne.n	8024008 <etharp_output_to_arp_index+0xf0>
    if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_BROADCAST) {
 8023f60:	79fa      	ldrb	r2, [r7, #7]
 8023f62:	4936      	ldr	r1, [pc, #216]	@ (802403c <etharp_output_to_arp_index+0x124>)
 8023f64:	4613      	mov	r3, r2
 8023f66:	005b      	lsls	r3, r3, #1
 8023f68:	4413      	add	r3, r2
 8023f6a:	00db      	lsls	r3, r3, #3
 8023f6c:	440b      	add	r3, r1
 8023f6e:	3312      	adds	r3, #18
 8023f70:	881b      	ldrh	r3, [r3, #0]
 8023f72:	f5b3 7f8e 	cmp.w	r3, #284	@ 0x11c
 8023f76:	d919      	bls.n	8023fac <etharp_output_to_arp_index+0x94>
      /* issue a standard request using broadcast */
      if (etharp_request(netif, &arp_table[arp_idx].ipaddr) == ERR_OK) {
 8023f78:	79fa      	ldrb	r2, [r7, #7]
 8023f7a:	4613      	mov	r3, r2
 8023f7c:	005b      	lsls	r3, r3, #1
 8023f7e:	4413      	add	r3, r2
 8023f80:	00db      	lsls	r3, r3, #3
 8023f82:	4a2e      	ldr	r2, [pc, #184]	@ (802403c <etharp_output_to_arp_index+0x124>)
 8023f84:	4413      	add	r3, r2
 8023f86:	3304      	adds	r3, #4
 8023f88:	4619      	mov	r1, r3
 8023f8a:	68f8      	ldr	r0, [r7, #12]
 8023f8c:	f000 fb4e 	bl	802462c <etharp_request>
 8023f90:	4603      	mov	r3, r0
 8023f92:	2b00      	cmp	r3, #0
 8023f94:	d138      	bne.n	8024008 <etharp_output_to_arp_index+0xf0>
        arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1;
 8023f96:	79fa      	ldrb	r2, [r7, #7]
 8023f98:	4928      	ldr	r1, [pc, #160]	@ (802403c <etharp_output_to_arp_index+0x124>)
 8023f9a:	4613      	mov	r3, r2
 8023f9c:	005b      	lsls	r3, r3, #1
 8023f9e:	4413      	add	r3, r2
 8023fa0:	00db      	lsls	r3, r3, #3
 8023fa2:	440b      	add	r3, r1
 8023fa4:	3314      	adds	r3, #20
 8023fa6:	2203      	movs	r2, #3
 8023fa8:	701a      	strb	r2, [r3, #0]
 8023faa:	e02d      	b.n	8024008 <etharp_output_to_arp_index+0xf0>
      }
    } else if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_UNICAST) {
 8023fac:	79fa      	ldrb	r2, [r7, #7]
 8023fae:	4923      	ldr	r1, [pc, #140]	@ (802403c <etharp_output_to_arp_index+0x124>)
 8023fb0:	4613      	mov	r3, r2
 8023fb2:	005b      	lsls	r3, r3, #1
 8023fb4:	4413      	add	r3, r2
 8023fb6:	00db      	lsls	r3, r3, #3
 8023fb8:	440b      	add	r3, r1
 8023fba:	3312      	adds	r3, #18
 8023fbc:	881b      	ldrh	r3, [r3, #0]
 8023fbe:	f5b3 7f87 	cmp.w	r3, #270	@ 0x10e
 8023fc2:	d321      	bcc.n	8024008 <etharp_output_to_arp_index+0xf0>
      /* issue a unicast request (for 15 seconds) to prevent unnecessary broadcast */
      if (etharp_request_dst(netif, &arp_table[arp_idx].ipaddr, &arp_table[arp_idx].ethaddr) == ERR_OK) {
 8023fc4:	79fa      	ldrb	r2, [r7, #7]
 8023fc6:	4613      	mov	r3, r2
 8023fc8:	005b      	lsls	r3, r3, #1
 8023fca:	4413      	add	r3, r2
 8023fcc:	00db      	lsls	r3, r3, #3
 8023fce:	4a1b      	ldr	r2, [pc, #108]	@ (802403c <etharp_output_to_arp_index+0x124>)
 8023fd0:	4413      	add	r3, r2
 8023fd2:	1d19      	adds	r1, r3, #4
 8023fd4:	79fa      	ldrb	r2, [r7, #7]
 8023fd6:	4613      	mov	r3, r2
 8023fd8:	005b      	lsls	r3, r3, #1
 8023fda:	4413      	add	r3, r2
 8023fdc:	00db      	lsls	r3, r3, #3
 8023fde:	3308      	adds	r3, #8
 8023fe0:	4a16      	ldr	r2, [pc, #88]	@ (802403c <etharp_output_to_arp_index+0x124>)
 8023fe2:	4413      	add	r3, r2
 8023fe4:	3304      	adds	r3, #4
 8023fe6:	461a      	mov	r2, r3
 8023fe8:	68f8      	ldr	r0, [r7, #12]
 8023fea:	f000 fafd 	bl	80245e8 <etharp_request_dst>
 8023fee:	4603      	mov	r3, r0
 8023ff0:	2b00      	cmp	r3, #0
 8023ff2:	d109      	bne.n	8024008 <etharp_output_to_arp_index+0xf0>
        arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1;
 8023ff4:	79fa      	ldrb	r2, [r7, #7]
 8023ff6:	4911      	ldr	r1, [pc, #68]	@ (802403c <etharp_output_to_arp_index+0x124>)
 8023ff8:	4613      	mov	r3, r2
 8023ffa:	005b      	lsls	r3, r3, #1
 8023ffc:	4413      	add	r3, r2
 8023ffe:	00db      	lsls	r3, r3, #3
 8024000:	440b      	add	r3, r1
 8024002:	3314      	adds	r3, #20
 8024004:	2203      	movs	r2, #3
 8024006:	701a      	strb	r2, [r3, #0]
      }
    }
  }

  return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), &arp_table[arp_idx].ethaddr, ETHTYPE_IP);
 8024008:	68fb      	ldr	r3, [r7, #12]
 802400a:	f103 012a 	add.w	r1, r3, #42	@ 0x2a
 802400e:	79fa      	ldrb	r2, [r7, #7]
 8024010:	4613      	mov	r3, r2
 8024012:	005b      	lsls	r3, r3, #1
 8024014:	4413      	add	r3, r2
 8024016:	00db      	lsls	r3, r3, #3
 8024018:	3308      	adds	r3, #8
 802401a:	4a08      	ldr	r2, [pc, #32]	@ (802403c <etharp_output_to_arp_index+0x124>)
 802401c:	4413      	add	r3, r2
 802401e:	3304      	adds	r3, #4
 8024020:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 8024024:	9200      	str	r2, [sp, #0]
 8024026:	460a      	mov	r2, r1
 8024028:	68b9      	ldr	r1, [r7, #8]
 802402a:	68f8      	ldr	r0, [r7, #12]
 802402c:	f002 f85e 	bl	80260ec <ethernet_output>
 8024030:	4603      	mov	r3, r0
}
 8024032:	4618      	mov	r0, r3
 8024034:	3710      	adds	r7, #16
 8024036:	46bd      	mov	sp, r7
 8024038:	bd80      	pop	{r7, pc}
 802403a:	bf00      	nop
 802403c:	2402af20 	.word	0x2402af20
 8024040:	0803023c 	.word	0x0803023c
 8024044:	080303ac 	.word	0x080303ac
 8024048:	080302b4 	.word	0x080302b4

0802404c <etharp_output>:
 * - ERR_RTE No route to destination (no gateway to external networks),
 * or the return type of either etharp_query() or ethernet_output().
 */
err_t
etharp_output(struct netif *netif, struct pbuf *q, const ip4_addr_t *ipaddr)
{
 802404c:	b580      	push	{r7, lr}
 802404e:	b08a      	sub	sp, #40	@ 0x28
 8024050:	af02      	add	r7, sp, #8
 8024052:	60f8      	str	r0, [r7, #12]
 8024054:	60b9      	str	r1, [r7, #8]
 8024056:	607a      	str	r2, [r7, #4]
  const struct eth_addr *dest;
  struct eth_addr mcastaddr;
  const ip4_addr_t *dst_addr = ipaddr;
 8024058:	687b      	ldr	r3, [r7, #4]
 802405a:	61bb      	str	r3, [r7, #24]

  LWIP_ASSERT_CORE_LOCKED();
 802405c:	f7ec fa72 	bl	8010544 <sys_check_core_locking>
  LWIP_ASSERT("netif != NULL", netif != NULL);
 8024060:	68fb      	ldr	r3, [r7, #12]
 8024062:	2b00      	cmp	r3, #0
 8024064:	d106      	bne.n	8024074 <etharp_output+0x28>
 8024066:	4b73      	ldr	r3, [pc, #460]	@ (8024234 <etharp_output+0x1e8>)
 8024068:	f240 321e 	movw	r2, #798	@ 0x31e
 802406c:	4972      	ldr	r1, [pc, #456]	@ (8024238 <etharp_output+0x1ec>)
 802406e:	4873      	ldr	r0, [pc, #460]	@ (802423c <etharp_output+0x1f0>)
 8024070:	f005 fcb4 	bl	80299dc <iprintf>
  LWIP_ASSERT("q != NULL", q != NULL);
 8024074:	68bb      	ldr	r3, [r7, #8]
 8024076:	2b00      	cmp	r3, #0
 8024078:	d106      	bne.n	8024088 <etharp_output+0x3c>
 802407a:	4b6e      	ldr	r3, [pc, #440]	@ (8024234 <etharp_output+0x1e8>)
 802407c:	f240 321f 	movw	r2, #799	@ 0x31f
 8024080:	496f      	ldr	r1, [pc, #444]	@ (8024240 <etharp_output+0x1f4>)
 8024082:	486e      	ldr	r0, [pc, #440]	@ (802423c <etharp_output+0x1f0>)
 8024084:	f005 fcaa 	bl	80299dc <iprintf>
  LWIP_ASSERT("ipaddr != NULL", ipaddr != NULL);
 8024088:	687b      	ldr	r3, [r7, #4]
 802408a:	2b00      	cmp	r3, #0
 802408c:	d106      	bne.n	802409c <etharp_output+0x50>
 802408e:	4b69      	ldr	r3, [pc, #420]	@ (8024234 <etharp_output+0x1e8>)
 8024090:	f44f 7248 	mov.w	r2, #800	@ 0x320
 8024094:	496b      	ldr	r1, [pc, #428]	@ (8024244 <etharp_output+0x1f8>)
 8024096:	4869      	ldr	r0, [pc, #420]	@ (802423c <etharp_output+0x1f0>)
 8024098:	f005 fca0 	bl	80299dc <iprintf>

  /* Determine on destination hardware address. Broadcasts and multicasts
   * are special, other IP addresses are looked up in the ARP table. */

  /* broadcast destination IP address? */
  if (ip4_addr_isbroadcast(ipaddr, netif)) {
 802409c:	687b      	ldr	r3, [r7, #4]
 802409e:	681b      	ldr	r3, [r3, #0]
 80240a0:	68f9      	ldr	r1, [r7, #12]
 80240a2:	4618      	mov	r0, r3
 80240a4:	f000 ff44 	bl	8024f30 <ip4_addr_isbroadcast_u32>
 80240a8:	4603      	mov	r3, r0
 80240aa:	2b00      	cmp	r3, #0
 80240ac:	d002      	beq.n	80240b4 <etharp_output+0x68>
    /* broadcast on Ethernet also */
    dest = (const struct eth_addr *)&ethbroadcast;
 80240ae:	4b66      	ldr	r3, [pc, #408]	@ (8024248 <etharp_output+0x1fc>)
 80240b0:	61fb      	str	r3, [r7, #28]
 80240b2:	e0af      	b.n	8024214 <etharp_output+0x1c8>
    /* multicast destination IP address? */
  } else if (ip4_addr_ismulticast(ipaddr)) {
 80240b4:	687b      	ldr	r3, [r7, #4]
 80240b6:	681b      	ldr	r3, [r3, #0]
 80240b8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80240bc:	2be0      	cmp	r3, #224	@ 0xe0
 80240be:	d118      	bne.n	80240f2 <etharp_output+0xa6>
    /* Hash IP multicast address to MAC address.*/
    mcastaddr.addr[0] = LL_IP4_MULTICAST_ADDR_0;
 80240c0:	2301      	movs	r3, #1
 80240c2:	743b      	strb	r3, [r7, #16]
    mcastaddr.addr[1] = LL_IP4_MULTICAST_ADDR_1;
 80240c4:	2300      	movs	r3, #0
 80240c6:	747b      	strb	r3, [r7, #17]
    mcastaddr.addr[2] = LL_IP4_MULTICAST_ADDR_2;
 80240c8:	235e      	movs	r3, #94	@ 0x5e
 80240ca:	74bb      	strb	r3, [r7, #18]
    mcastaddr.addr[3] = ip4_addr2(ipaddr) & 0x7f;
 80240cc:	687b      	ldr	r3, [r7, #4]
 80240ce:	3301      	adds	r3, #1
 80240d0:	781b      	ldrb	r3, [r3, #0]
 80240d2:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 80240d6:	b2db      	uxtb	r3, r3
 80240d8:	74fb      	strb	r3, [r7, #19]
    mcastaddr.addr[4] = ip4_addr3(ipaddr);
 80240da:	687b      	ldr	r3, [r7, #4]
 80240dc:	3302      	adds	r3, #2
 80240de:	781b      	ldrb	r3, [r3, #0]
 80240e0:	753b      	strb	r3, [r7, #20]
    mcastaddr.addr[5] = ip4_addr4(ipaddr);
 80240e2:	687b      	ldr	r3, [r7, #4]
 80240e4:	3303      	adds	r3, #3
 80240e6:	781b      	ldrb	r3, [r3, #0]
 80240e8:	757b      	strb	r3, [r7, #21]
    /* destination Ethernet address is multicast */
    dest = &mcastaddr;
 80240ea:	f107 0310 	add.w	r3, r7, #16
 80240ee:	61fb      	str	r3, [r7, #28]
 80240f0:	e090      	b.n	8024214 <etharp_output+0x1c8>
    /* unicast destination IP address? */
  } else {
    netif_addr_idx_t i;
    /* outside local network? if so, this can neither be a global broadcast nor
       a subnet broadcast. */
    if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) &&
 80240f2:	687b      	ldr	r3, [r7, #4]
 80240f4:	681a      	ldr	r2, [r3, #0]
 80240f6:	68fb      	ldr	r3, [r7, #12]
 80240f8:	3304      	adds	r3, #4
 80240fa:	681b      	ldr	r3, [r3, #0]
 80240fc:	405a      	eors	r2, r3
 80240fe:	68fb      	ldr	r3, [r7, #12]
 8024100:	3308      	adds	r3, #8
 8024102:	681b      	ldr	r3, [r3, #0]
 8024104:	4013      	ands	r3, r2
 8024106:	2b00      	cmp	r3, #0
 8024108:	d012      	beq.n	8024130 <etharp_output+0xe4>
        !ip4_addr_islinklocal(ipaddr)) {
 802410a:	687b      	ldr	r3, [r7, #4]
 802410c:	681b      	ldr	r3, [r3, #0]
 802410e:	b29b      	uxth	r3, r3
    if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) &&
 8024110:	f64f 62a9 	movw	r2, #65193	@ 0xfea9
 8024114:	4293      	cmp	r3, r2
 8024116:	d00b      	beq.n	8024130 <etharp_output+0xe4>
        dst_addr = LWIP_HOOK_ETHARP_GET_GW(netif, ipaddr);
        if (dst_addr == NULL)
#endif /* LWIP_HOOK_ETHARP_GET_GW */
        {
          /* interface has default gateway? */
          if (!ip4_addr_isany_val(*netif_ip4_gw(netif))) {
 8024118:	68fb      	ldr	r3, [r7, #12]
 802411a:	330c      	adds	r3, #12
 802411c:	681b      	ldr	r3, [r3, #0]
 802411e:	2b00      	cmp	r3, #0
 8024120:	d003      	beq.n	802412a <etharp_output+0xde>
            /* send to hardware address of default gateway IP address */
            dst_addr = netif_ip4_gw(netif);
 8024122:	68fb      	ldr	r3, [r7, #12]
 8024124:	330c      	adds	r3, #12
 8024126:	61bb      	str	r3, [r7, #24]
 8024128:	e002      	b.n	8024130 <etharp_output+0xe4>
            /* no default gateway available */
          } else {
            /* no route to destination error (default gateway missing) */
            return ERR_RTE;
 802412a:	f06f 0303 	mvn.w	r3, #3
 802412e:	e07d      	b.n	802422c <etharp_output+0x1e0>
    if (netif->hints != NULL) {
      /* per-pcb cached entry was given */
      netif_addr_idx_t etharp_cached_entry = netif->hints->addr_hint;
      if (etharp_cached_entry < ARP_TABLE_SIZE) {
#endif /* LWIP_NETIF_HWADDRHINT */
        if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) &&
 8024130:	4b46      	ldr	r3, [pc, #280]	@ (802424c <etharp_output+0x200>)
 8024132:	781b      	ldrb	r3, [r3, #0]
 8024134:	4619      	mov	r1, r3
 8024136:	4a46      	ldr	r2, [pc, #280]	@ (8024250 <etharp_output+0x204>)
 8024138:	460b      	mov	r3, r1
 802413a:	005b      	lsls	r3, r3, #1
 802413c:	440b      	add	r3, r1
 802413e:	00db      	lsls	r3, r3, #3
 8024140:	4413      	add	r3, r2
 8024142:	3314      	adds	r3, #20
 8024144:	781b      	ldrb	r3, [r3, #0]
 8024146:	2b01      	cmp	r3, #1
 8024148:	d925      	bls.n	8024196 <etharp_output+0x14a>
#if ETHARP_TABLE_MATCH_NETIF
            (arp_table[etharp_cached_entry].netif == netif) &&
 802414a:	4b40      	ldr	r3, [pc, #256]	@ (802424c <etharp_output+0x200>)
 802414c:	781b      	ldrb	r3, [r3, #0]
 802414e:	4619      	mov	r1, r3
 8024150:	4a3f      	ldr	r2, [pc, #252]	@ (8024250 <etharp_output+0x204>)
 8024152:	460b      	mov	r3, r1
 8024154:	005b      	lsls	r3, r3, #1
 8024156:	440b      	add	r3, r1
 8024158:	00db      	lsls	r3, r3, #3
 802415a:	4413      	add	r3, r2
 802415c:	3308      	adds	r3, #8
 802415e:	681b      	ldr	r3, [r3, #0]
        if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) &&
 8024160:	68fa      	ldr	r2, [r7, #12]
 8024162:	429a      	cmp	r2, r3
 8024164:	d117      	bne.n	8024196 <etharp_output+0x14a>
#endif
            (ip4_addr_cmp(dst_addr, &arp_table[etharp_cached_entry].ipaddr))) {
 8024166:	69bb      	ldr	r3, [r7, #24]
 8024168:	681a      	ldr	r2, [r3, #0]
 802416a:	4b38      	ldr	r3, [pc, #224]	@ (802424c <etharp_output+0x200>)
 802416c:	781b      	ldrb	r3, [r3, #0]
 802416e:	4618      	mov	r0, r3
 8024170:	4937      	ldr	r1, [pc, #220]	@ (8024250 <etharp_output+0x204>)
 8024172:	4603      	mov	r3, r0
 8024174:	005b      	lsls	r3, r3, #1
 8024176:	4403      	add	r3, r0
 8024178:	00db      	lsls	r3, r3, #3
 802417a:	440b      	add	r3, r1
 802417c:	3304      	adds	r3, #4
 802417e:	681b      	ldr	r3, [r3, #0]
            (arp_table[etharp_cached_entry].netif == netif) &&
 8024180:	429a      	cmp	r2, r3
 8024182:	d108      	bne.n	8024196 <etharp_output+0x14a>
          /* the per-pcb-cached entry is stable and the right one! */
          ETHARP_STATS_INC(etharp.cachehit);
          return etharp_output_to_arp_index(netif, q, etharp_cached_entry);
 8024184:	4b31      	ldr	r3, [pc, #196]	@ (802424c <etharp_output+0x200>)
 8024186:	781b      	ldrb	r3, [r3, #0]
 8024188:	461a      	mov	r2, r3
 802418a:	68b9      	ldr	r1, [r7, #8]
 802418c:	68f8      	ldr	r0, [r7, #12]
 802418e:	f7ff fec3 	bl	8023f18 <etharp_output_to_arp_index>
 8024192:	4603      	mov	r3, r0
 8024194:	e04a      	b.n	802422c <etharp_output+0x1e0>
    }
#endif /* LWIP_NETIF_HWADDRHINT */

    /* find stable entry: do this here since this is a critical path for
       throughput and etharp_find_entry() is kind of slow */
    for (i = 0; i < ARP_TABLE_SIZE; i++) {
 8024196:	2300      	movs	r3, #0
 8024198:	75fb      	strb	r3, [r7, #23]
 802419a:	e031      	b.n	8024200 <etharp_output+0x1b4>
      if ((arp_table[i].state >= ETHARP_STATE_STABLE) &&
 802419c:	7dfa      	ldrb	r2, [r7, #23]
 802419e:	492c      	ldr	r1, [pc, #176]	@ (8024250 <etharp_output+0x204>)
 80241a0:	4613      	mov	r3, r2
 80241a2:	005b      	lsls	r3, r3, #1
 80241a4:	4413      	add	r3, r2
 80241a6:	00db      	lsls	r3, r3, #3
 80241a8:	440b      	add	r3, r1
 80241aa:	3314      	adds	r3, #20
 80241ac:	781b      	ldrb	r3, [r3, #0]
 80241ae:	2b01      	cmp	r3, #1
 80241b0:	d923      	bls.n	80241fa <etharp_output+0x1ae>
#if ETHARP_TABLE_MATCH_NETIF
          (arp_table[i].netif == netif) &&
 80241b2:	7dfa      	ldrb	r2, [r7, #23]
 80241b4:	4926      	ldr	r1, [pc, #152]	@ (8024250 <etharp_output+0x204>)
 80241b6:	4613      	mov	r3, r2
 80241b8:	005b      	lsls	r3, r3, #1
 80241ba:	4413      	add	r3, r2
 80241bc:	00db      	lsls	r3, r3, #3
 80241be:	440b      	add	r3, r1
 80241c0:	3308      	adds	r3, #8
 80241c2:	681b      	ldr	r3, [r3, #0]
      if ((arp_table[i].state >= ETHARP_STATE_STABLE) &&
 80241c4:	68fa      	ldr	r2, [r7, #12]
 80241c6:	429a      	cmp	r2, r3
 80241c8:	d117      	bne.n	80241fa <etharp_output+0x1ae>
#endif
          (ip4_addr_cmp(dst_addr, &arp_table[i].ipaddr))) {
 80241ca:	69bb      	ldr	r3, [r7, #24]
 80241cc:	6819      	ldr	r1, [r3, #0]
 80241ce:	7dfa      	ldrb	r2, [r7, #23]
 80241d0:	481f      	ldr	r0, [pc, #124]	@ (8024250 <etharp_output+0x204>)
 80241d2:	4613      	mov	r3, r2
 80241d4:	005b      	lsls	r3, r3, #1
 80241d6:	4413      	add	r3, r2
 80241d8:	00db      	lsls	r3, r3, #3
 80241da:	4403      	add	r3, r0
 80241dc:	3304      	adds	r3, #4
 80241de:	681b      	ldr	r3, [r3, #0]
          (arp_table[i].netif == netif) &&
 80241e0:	4299      	cmp	r1, r3
 80241e2:	d10a      	bne.n	80241fa <etharp_output+0x1ae>
        /* found an existing, stable entry */
        ETHARP_SET_ADDRHINT(netif, i);
 80241e4:	4a19      	ldr	r2, [pc, #100]	@ (802424c <etharp_output+0x200>)
 80241e6:	7dfb      	ldrb	r3, [r7, #23]
 80241e8:	7013      	strb	r3, [r2, #0]
        return etharp_output_to_arp_index(netif, q, i);
 80241ea:	7dfb      	ldrb	r3, [r7, #23]
 80241ec:	461a      	mov	r2, r3
 80241ee:	68b9      	ldr	r1, [r7, #8]
 80241f0:	68f8      	ldr	r0, [r7, #12]
 80241f2:	f7ff fe91 	bl	8023f18 <etharp_output_to_arp_index>
 80241f6:	4603      	mov	r3, r0
 80241f8:	e018      	b.n	802422c <etharp_output+0x1e0>
    for (i = 0; i < ARP_TABLE_SIZE; i++) {
 80241fa:	7dfb      	ldrb	r3, [r7, #23]
 80241fc:	3301      	adds	r3, #1
 80241fe:	75fb      	strb	r3, [r7, #23]
 8024200:	7dfb      	ldrb	r3, [r7, #23]
 8024202:	2b09      	cmp	r3, #9
 8024204:	d9ca      	bls.n	802419c <etharp_output+0x150>
      }
    }
    /* no stable entry found, use the (slower) query function:
       queue on destination Ethernet address belonging to ipaddr */
    return etharp_query(netif, dst_addr, q);
 8024206:	68ba      	ldr	r2, [r7, #8]
 8024208:	69b9      	ldr	r1, [r7, #24]
 802420a:	68f8      	ldr	r0, [r7, #12]
 802420c:	f000 f822 	bl	8024254 <etharp_query>
 8024210:	4603      	mov	r3, r0
 8024212:	e00b      	b.n	802422c <etharp_output+0x1e0>
  }

  /* continuation for multicast/broadcast destinations */
  /* obtain source Ethernet address of the given interface */
  /* send packet directly on the link */
  return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), dest, ETHTYPE_IP);
 8024214:	68fb      	ldr	r3, [r7, #12]
 8024216:	f103 022a 	add.w	r2, r3, #42	@ 0x2a
 802421a:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 802421e:	9300      	str	r3, [sp, #0]
 8024220:	69fb      	ldr	r3, [r7, #28]
 8024222:	68b9      	ldr	r1, [r7, #8]
 8024224:	68f8      	ldr	r0, [r7, #12]
 8024226:	f001 ff61 	bl	80260ec <ethernet_output>
 802422a:	4603      	mov	r3, r0
}
 802422c:	4618      	mov	r0, r3
 802422e:	3720      	adds	r7, #32
 8024230:	46bd      	mov	sp, r7
 8024232:	bd80      	pop	{r7, pc}
 8024234:	0803023c 	.word	0x0803023c
 8024238:	0803038c 	.word	0x0803038c
 802423c:	080302b4 	.word	0x080302b4
 8024240:	080303dc 	.word	0x080303dc
 8024244:	0803037c 	.word	0x0803037c
 8024248:	08030c70 	.word	0x08030c70
 802424c:	2402b010 	.word	0x2402b010
 8024250:	2402af20 	.word	0x2402af20

08024254 <etharp_query>:
 * - ERR_ARG Non-unicast address given, those will not appear in ARP cache.
 *
 */
err_t
etharp_query(struct netif *netif, const ip4_addr_t *ipaddr, struct pbuf *q)
{
 8024254:	b580      	push	{r7, lr}
 8024256:	b08c      	sub	sp, #48	@ 0x30
 8024258:	af02      	add	r7, sp, #8
 802425a:	60f8      	str	r0, [r7, #12]
 802425c:	60b9      	str	r1, [r7, #8]
 802425e:	607a      	str	r2, [r7, #4]
  struct eth_addr *srcaddr = (struct eth_addr *)netif->hwaddr;
 8024260:	68fb      	ldr	r3, [r7, #12]
 8024262:	332a      	adds	r3, #42	@ 0x2a
 8024264:	617b      	str	r3, [r7, #20]
  err_t result = ERR_MEM;
 8024266:	23ff      	movs	r3, #255	@ 0xff
 8024268:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
  int is_new_entry = 0;
 802426c:	2300      	movs	r3, #0
 802426e:	623b      	str	r3, [r7, #32]
  s16_t i_err;
  netif_addr_idx_t i;

  /* non-unicast address? */
  if (ip4_addr_isbroadcast(ipaddr, netif) ||
 8024270:	68bb      	ldr	r3, [r7, #8]
 8024272:	681b      	ldr	r3, [r3, #0]
 8024274:	68f9      	ldr	r1, [r7, #12]
 8024276:	4618      	mov	r0, r3
 8024278:	f000 fe5a 	bl	8024f30 <ip4_addr_isbroadcast_u32>
 802427c:	4603      	mov	r3, r0
 802427e:	2b00      	cmp	r3, #0
 8024280:	d10c      	bne.n	802429c <etharp_query+0x48>
      ip4_addr_ismulticast(ipaddr) ||
 8024282:	68bb      	ldr	r3, [r7, #8]
 8024284:	681b      	ldr	r3, [r3, #0]
 8024286:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if (ip4_addr_isbroadcast(ipaddr, netif) ||
 802428a:	2be0      	cmp	r3, #224	@ 0xe0
 802428c:	d006      	beq.n	802429c <etharp_query+0x48>
      ip4_addr_ismulticast(ipaddr) ||
 802428e:	68bb      	ldr	r3, [r7, #8]
 8024290:	2b00      	cmp	r3, #0
 8024292:	d003      	beq.n	802429c <etharp_query+0x48>
      ip4_addr_isany(ipaddr)) {
 8024294:	68bb      	ldr	r3, [r7, #8]
 8024296:	681b      	ldr	r3, [r3, #0]
 8024298:	2b00      	cmp	r3, #0
 802429a:	d102      	bne.n	80242a2 <etharp_query+0x4e>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: will not add non-unicast IP address to ARP cache\n"));
    return ERR_ARG;
 802429c:	f06f 030f 	mvn.w	r3, #15
 80242a0:	e101      	b.n	80244a6 <etharp_query+0x252>
  }

  /* find entry in ARP cache, ask to create entry if queueing packet */
  i_err = etharp_find_entry(ipaddr, ETHARP_FLAG_TRY_HARD, netif);
 80242a2:	68fa      	ldr	r2, [r7, #12]
 80242a4:	2101      	movs	r1, #1
 80242a6:	68b8      	ldr	r0, [r7, #8]
 80242a8:	f7ff fb58 	bl	802395c <etharp_find_entry>
 80242ac:	4603      	mov	r3, r0
 80242ae:	827b      	strh	r3, [r7, #18]

  /* could not find or create entry? */
  if (i_err < 0) {
 80242b0:	f9b7 3012 	ldrsh.w	r3, [r7, #18]
 80242b4:	2b00      	cmp	r3, #0
 80242b6:	da02      	bge.n	80242be <etharp_query+0x6a>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not create ARP entry\n"));
    if (q) {
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: packet dropped\n"));
      ETHARP_STATS_INC(etharp.memerr);
    }
    return (err_t)i_err;
 80242b8:	8a7b      	ldrh	r3, [r7, #18]
 80242ba:	b25b      	sxtb	r3, r3
 80242bc:	e0f3      	b.n	80244a6 <etharp_query+0x252>
  }
  LWIP_ASSERT("type overflow", (size_t)i_err < NETIF_ADDR_IDX_MAX);
 80242be:	8a7b      	ldrh	r3, [r7, #18]
 80242c0:	2b7e      	cmp	r3, #126	@ 0x7e
 80242c2:	d906      	bls.n	80242d2 <etharp_query+0x7e>
 80242c4:	4b7a      	ldr	r3, [pc, #488]	@ (80244b0 <etharp_query+0x25c>)
 80242c6:	f240 32c1 	movw	r2, #961	@ 0x3c1
 80242ca:	497a      	ldr	r1, [pc, #488]	@ (80244b4 <etharp_query+0x260>)
 80242cc:	487a      	ldr	r0, [pc, #488]	@ (80244b8 <etharp_query+0x264>)
 80242ce:	f005 fb85 	bl	80299dc <iprintf>
  i = (netif_addr_idx_t)i_err;
 80242d2:	8a7b      	ldrh	r3, [r7, #18]
 80242d4:	747b      	strb	r3, [r7, #17]

  /* mark a fresh entry as pending (we just sent a request) */
  if (arp_table[i].state == ETHARP_STATE_EMPTY) {
 80242d6:	7c7a      	ldrb	r2, [r7, #17]
 80242d8:	4978      	ldr	r1, [pc, #480]	@ (80244bc <etharp_query+0x268>)
 80242da:	4613      	mov	r3, r2
 80242dc:	005b      	lsls	r3, r3, #1
 80242de:	4413      	add	r3, r2
 80242e0:	00db      	lsls	r3, r3, #3
 80242e2:	440b      	add	r3, r1
 80242e4:	3314      	adds	r3, #20
 80242e6:	781b      	ldrb	r3, [r3, #0]
 80242e8:	2b00      	cmp	r3, #0
 80242ea:	d115      	bne.n	8024318 <etharp_query+0xc4>
    is_new_entry = 1;
 80242ec:	2301      	movs	r3, #1
 80242ee:	623b      	str	r3, [r7, #32]
    arp_table[i].state = ETHARP_STATE_PENDING;
 80242f0:	7c7a      	ldrb	r2, [r7, #17]
 80242f2:	4972      	ldr	r1, [pc, #456]	@ (80244bc <etharp_query+0x268>)
 80242f4:	4613      	mov	r3, r2
 80242f6:	005b      	lsls	r3, r3, #1
 80242f8:	4413      	add	r3, r2
 80242fa:	00db      	lsls	r3, r3, #3
 80242fc:	440b      	add	r3, r1
 80242fe:	3314      	adds	r3, #20
 8024300:	2201      	movs	r2, #1
 8024302:	701a      	strb	r2, [r3, #0]
    /* record network interface for re-sending arp request in etharp_tmr */
    arp_table[i].netif = netif;
 8024304:	7c7a      	ldrb	r2, [r7, #17]
 8024306:	496d      	ldr	r1, [pc, #436]	@ (80244bc <etharp_query+0x268>)
 8024308:	4613      	mov	r3, r2
 802430a:	005b      	lsls	r3, r3, #1
 802430c:	4413      	add	r3, r2
 802430e:	00db      	lsls	r3, r3, #3
 8024310:	440b      	add	r3, r1
 8024312:	3308      	adds	r3, #8
 8024314:	68fa      	ldr	r2, [r7, #12]
 8024316:	601a      	str	r2, [r3, #0]
  }

  /* { i is either a STABLE or (new or existing) PENDING entry } */
  LWIP_ASSERT("arp_table[i].state == PENDING or STABLE",
 8024318:	7c7a      	ldrb	r2, [r7, #17]
 802431a:	4968      	ldr	r1, [pc, #416]	@ (80244bc <etharp_query+0x268>)
 802431c:	4613      	mov	r3, r2
 802431e:	005b      	lsls	r3, r3, #1
 8024320:	4413      	add	r3, r2
 8024322:	00db      	lsls	r3, r3, #3
 8024324:	440b      	add	r3, r1
 8024326:	3314      	adds	r3, #20
 8024328:	781b      	ldrb	r3, [r3, #0]
 802432a:	2b01      	cmp	r3, #1
 802432c:	d011      	beq.n	8024352 <etharp_query+0xfe>
 802432e:	7c7a      	ldrb	r2, [r7, #17]
 8024330:	4962      	ldr	r1, [pc, #392]	@ (80244bc <etharp_query+0x268>)
 8024332:	4613      	mov	r3, r2
 8024334:	005b      	lsls	r3, r3, #1
 8024336:	4413      	add	r3, r2
 8024338:	00db      	lsls	r3, r3, #3
 802433a:	440b      	add	r3, r1
 802433c:	3314      	adds	r3, #20
 802433e:	781b      	ldrb	r3, [r3, #0]
 8024340:	2b01      	cmp	r3, #1
 8024342:	d806      	bhi.n	8024352 <etharp_query+0xfe>
 8024344:	4b5a      	ldr	r3, [pc, #360]	@ (80244b0 <etharp_query+0x25c>)
 8024346:	f240 32cd 	movw	r2, #973	@ 0x3cd
 802434a:	495d      	ldr	r1, [pc, #372]	@ (80244c0 <etharp_query+0x26c>)
 802434c:	485a      	ldr	r0, [pc, #360]	@ (80244b8 <etharp_query+0x264>)
 802434e:	f005 fb45 	bl	80299dc <iprintf>
              ((arp_table[i].state == ETHARP_STATE_PENDING) ||
               (arp_table[i].state >= ETHARP_STATE_STABLE)));

  /* do we have a new entry? or an implicit query request? */
  if (is_new_entry || (q == NULL)) {
 8024352:	6a3b      	ldr	r3, [r7, #32]
 8024354:	2b00      	cmp	r3, #0
 8024356:	d102      	bne.n	802435e <etharp_query+0x10a>
 8024358:	687b      	ldr	r3, [r7, #4]
 802435a:	2b00      	cmp	r3, #0
 802435c:	d10c      	bne.n	8024378 <etharp_query+0x124>
    /* try to resolve it; send out ARP request */
    result = etharp_request(netif, ipaddr);
 802435e:	68b9      	ldr	r1, [r7, #8]
 8024360:	68f8      	ldr	r0, [r7, #12]
 8024362:	f000 f963 	bl	802462c <etharp_request>
 8024366:	4603      	mov	r3, r0
 8024368:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
      /* ARP request couldn't be sent */
      /* We don't re-send arp request in etharp_tmr, but we still queue packets,
         since this failure could be temporary, and the next packet calling
         etharp_query again could lead to sending the queued packets. */
    }
    if (q == NULL) {
 802436c:	687b      	ldr	r3, [r7, #4]
 802436e:	2b00      	cmp	r3, #0
 8024370:	d102      	bne.n	8024378 <etharp_query+0x124>
      return result;
 8024372:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8024376:	e096      	b.n	80244a6 <etharp_query+0x252>
    }
  }

  /* packet given? */
  LWIP_ASSERT("q != NULL", q != NULL);
 8024378:	687b      	ldr	r3, [r7, #4]
 802437a:	2b00      	cmp	r3, #0
 802437c:	d106      	bne.n	802438c <etharp_query+0x138>
 802437e:	4b4c      	ldr	r3, [pc, #304]	@ (80244b0 <etharp_query+0x25c>)
 8024380:	f240 32e1 	movw	r2, #993	@ 0x3e1
 8024384:	494f      	ldr	r1, [pc, #316]	@ (80244c4 <etharp_query+0x270>)
 8024386:	484c      	ldr	r0, [pc, #304]	@ (80244b8 <etharp_query+0x264>)
 8024388:	f005 fb28 	bl	80299dc <iprintf>
  /* stable entry? */
  if (arp_table[i].state >= ETHARP_STATE_STABLE) {
 802438c:	7c7a      	ldrb	r2, [r7, #17]
 802438e:	494b      	ldr	r1, [pc, #300]	@ (80244bc <etharp_query+0x268>)
 8024390:	4613      	mov	r3, r2
 8024392:	005b      	lsls	r3, r3, #1
 8024394:	4413      	add	r3, r2
 8024396:	00db      	lsls	r3, r3, #3
 8024398:	440b      	add	r3, r1
 802439a:	3314      	adds	r3, #20
 802439c:	781b      	ldrb	r3, [r3, #0]
 802439e:	2b01      	cmp	r3, #1
 80243a0:	d917      	bls.n	80243d2 <etharp_query+0x17e>
    /* we have a valid IP->Ethernet address mapping */
    ETHARP_SET_ADDRHINT(netif, i);
 80243a2:	4a49      	ldr	r2, [pc, #292]	@ (80244c8 <etharp_query+0x274>)
 80243a4:	7c7b      	ldrb	r3, [r7, #17]
 80243a6:	7013      	strb	r3, [r2, #0]
    /* send the packet */
    result = ethernet_output(netif, q, srcaddr, &(arp_table[i].ethaddr), ETHTYPE_IP);
 80243a8:	7c7a      	ldrb	r2, [r7, #17]
 80243aa:	4613      	mov	r3, r2
 80243ac:	005b      	lsls	r3, r3, #1
 80243ae:	4413      	add	r3, r2
 80243b0:	00db      	lsls	r3, r3, #3
 80243b2:	3308      	adds	r3, #8
 80243b4:	4a41      	ldr	r2, [pc, #260]	@ (80244bc <etharp_query+0x268>)
 80243b6:	4413      	add	r3, r2
 80243b8:	3304      	adds	r3, #4
 80243ba:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 80243be:	9200      	str	r2, [sp, #0]
 80243c0:	697a      	ldr	r2, [r7, #20]
 80243c2:	6879      	ldr	r1, [r7, #4]
 80243c4:	68f8      	ldr	r0, [r7, #12]
 80243c6:	f001 fe91 	bl	80260ec <ethernet_output>
 80243ca:	4603      	mov	r3, r0
 80243cc:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 80243d0:	e067      	b.n	80244a2 <etharp_query+0x24e>
    /* pending entry? (either just created or already pending */
  } else if (arp_table[i].state == ETHARP_STATE_PENDING) {
 80243d2:	7c7a      	ldrb	r2, [r7, #17]
 80243d4:	4939      	ldr	r1, [pc, #228]	@ (80244bc <etharp_query+0x268>)
 80243d6:	4613      	mov	r3, r2
 80243d8:	005b      	lsls	r3, r3, #1
 80243da:	4413      	add	r3, r2
 80243dc:	00db      	lsls	r3, r3, #3
 80243de:	440b      	add	r3, r1
 80243e0:	3314      	adds	r3, #20
 80243e2:	781b      	ldrb	r3, [r3, #0]
 80243e4:	2b01      	cmp	r3, #1
 80243e6:	d15c      	bne.n	80244a2 <etharp_query+0x24e>
    /* entry is still pending, queue the given packet 'q' */
    struct pbuf *p;
    int copy_needed = 0;
 80243e8:	2300      	movs	r3, #0
 80243ea:	61bb      	str	r3, [r7, #24]
    /* IF q includes a pbuf that must be copied, copy the whole chain into a
     * new PBUF_RAM. See the definition of PBUF_NEEDS_COPY for details. */
    p = q;
 80243ec:	687b      	ldr	r3, [r7, #4]
 80243ee:	61fb      	str	r3, [r7, #28]
    while (p) {
 80243f0:	e01c      	b.n	802442c <etharp_query+0x1d8>
      LWIP_ASSERT("no packet queues allowed!", (p->len != p->tot_len) || (p->next == 0));
 80243f2:	69fb      	ldr	r3, [r7, #28]
 80243f4:	895a      	ldrh	r2, [r3, #10]
 80243f6:	69fb      	ldr	r3, [r7, #28]
 80243f8:	891b      	ldrh	r3, [r3, #8]
 80243fa:	429a      	cmp	r2, r3
 80243fc:	d10a      	bne.n	8024414 <etharp_query+0x1c0>
 80243fe:	69fb      	ldr	r3, [r7, #28]
 8024400:	681b      	ldr	r3, [r3, #0]
 8024402:	2b00      	cmp	r3, #0
 8024404:	d006      	beq.n	8024414 <etharp_query+0x1c0>
 8024406:	4b2a      	ldr	r3, [pc, #168]	@ (80244b0 <etharp_query+0x25c>)
 8024408:	f240 32f1 	movw	r2, #1009	@ 0x3f1
 802440c:	492f      	ldr	r1, [pc, #188]	@ (80244cc <etharp_query+0x278>)
 802440e:	482a      	ldr	r0, [pc, #168]	@ (80244b8 <etharp_query+0x264>)
 8024410:	f005 fae4 	bl	80299dc <iprintf>
      if (PBUF_NEEDS_COPY(p)) {
 8024414:	69fb      	ldr	r3, [r7, #28]
 8024416:	7b1b      	ldrb	r3, [r3, #12]
 8024418:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 802441c:	2b00      	cmp	r3, #0
 802441e:	d002      	beq.n	8024426 <etharp_query+0x1d2>
        copy_needed = 1;
 8024420:	2301      	movs	r3, #1
 8024422:	61bb      	str	r3, [r7, #24]
        break;
 8024424:	e005      	b.n	8024432 <etharp_query+0x1de>
      }
      p = p->next;
 8024426:	69fb      	ldr	r3, [r7, #28]
 8024428:	681b      	ldr	r3, [r3, #0]
 802442a:	61fb      	str	r3, [r7, #28]
    while (p) {
 802442c:	69fb      	ldr	r3, [r7, #28]
 802442e:	2b00      	cmp	r3, #0
 8024430:	d1df      	bne.n	80243f2 <etharp_query+0x19e>
    }
    if (copy_needed) {
 8024432:	69bb      	ldr	r3, [r7, #24]
 8024434:	2b00      	cmp	r3, #0
 8024436:	d007      	beq.n	8024448 <etharp_query+0x1f4>
      /* copy the whole packet into new pbufs */
      p = pbuf_clone(PBUF_LINK, PBUF_RAM, q);
 8024438:	687a      	ldr	r2, [r7, #4]
 802443a:	f44f 7120 	mov.w	r1, #640	@ 0x280
 802443e:	200e      	movs	r0, #14
 8024440:	f7f6 facc 	bl	801a9dc <pbuf_clone>
 8024444:	61f8      	str	r0, [r7, #28]
 8024446:	e004      	b.n	8024452 <etharp_query+0x1fe>
    } else {
      /* referencing the old pbuf is enough */
      p = q;
 8024448:	687b      	ldr	r3, [r7, #4]
 802444a:	61fb      	str	r3, [r7, #28]
      pbuf_ref(p);
 802444c:	69f8      	ldr	r0, [r7, #28]
 802444e:	f7f6 f8f3 	bl	801a638 <pbuf_ref>
    }
    /* packet could be taken over? */
    if (p != NULL) {
 8024452:	69fb      	ldr	r3, [r7, #28]
 8024454:	2b00      	cmp	r3, #0
 8024456:	d021      	beq.n	802449c <etharp_query+0x248>
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q));
        result = ERR_MEM;
      }
#else /* ARP_QUEUEING */
      /* always queue one packet per ARP request only, freeing a previously queued packet */
      if (arp_table[i].q != NULL) {
 8024458:	7c7a      	ldrb	r2, [r7, #17]
 802445a:	4918      	ldr	r1, [pc, #96]	@ (80244bc <etharp_query+0x268>)
 802445c:	4613      	mov	r3, r2
 802445e:	005b      	lsls	r3, r3, #1
 8024460:	4413      	add	r3, r2
 8024462:	00db      	lsls	r3, r3, #3
 8024464:	440b      	add	r3, r1
 8024466:	681b      	ldr	r3, [r3, #0]
 8024468:	2b00      	cmp	r3, #0
 802446a:	d00a      	beq.n	8024482 <etharp_query+0x22e>
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: dropped previously queued packet %p for ARP entry %"U16_F"\n", (void *)q, (u16_t)i));
        pbuf_free(arp_table[i].q);
 802446c:	7c7a      	ldrb	r2, [r7, #17]
 802446e:	4913      	ldr	r1, [pc, #76]	@ (80244bc <etharp_query+0x268>)
 8024470:	4613      	mov	r3, r2
 8024472:	005b      	lsls	r3, r3, #1
 8024474:	4413      	add	r3, r2
 8024476:	00db      	lsls	r3, r3, #3
 8024478:	440b      	add	r3, r1
 802447a:	681b      	ldr	r3, [r3, #0]
 802447c:	4618      	mov	r0, r3
 802447e:	f7f6 f835 	bl	801a4ec <pbuf_free>
      }
      arp_table[i].q = p;
 8024482:	7c7a      	ldrb	r2, [r7, #17]
 8024484:	490d      	ldr	r1, [pc, #52]	@ (80244bc <etharp_query+0x268>)
 8024486:	4613      	mov	r3, r2
 8024488:	005b      	lsls	r3, r3, #1
 802448a:	4413      	add	r3, r2
 802448c:	00db      	lsls	r3, r3, #3
 802448e:	440b      	add	r3, r1
 8024490:	69fa      	ldr	r2, [r7, #28]
 8024492:	601a      	str	r2, [r3, #0]
      result = ERR_OK;
 8024494:	2300      	movs	r3, #0
 8024496:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 802449a:	e002      	b.n	80244a2 <etharp_query+0x24e>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"U16_F"\n", (void *)q, (u16_t)i));
#endif /* ARP_QUEUEING */
    } else {
      ETHARP_STATS_INC(etharp.memerr);
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q));
      result = ERR_MEM;
 802449c:	23ff      	movs	r3, #255	@ 0xff
 802449e:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    }
  }
  return result;
 80244a2:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
}
 80244a6:	4618      	mov	r0, r3
 80244a8:	3728      	adds	r7, #40	@ 0x28
 80244aa:	46bd      	mov	sp, r7
 80244ac:	bd80      	pop	{r7, pc}
 80244ae:	bf00      	nop
 80244b0:	0803023c 	.word	0x0803023c
 80244b4:	080303e8 	.word	0x080303e8
 80244b8:	080302b4 	.word	0x080302b4
 80244bc:	2402af20 	.word	0x2402af20
 80244c0:	080303f8 	.word	0x080303f8
 80244c4:	080303dc 	.word	0x080303dc
 80244c8:	2402b010 	.word	0x2402b010
 80244cc:	08030420 	.word	0x08030420

080244d0 <etharp_raw>:
etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr,
           const struct eth_addr *ethdst_addr,
           const struct eth_addr *hwsrc_addr, const ip4_addr_t *ipsrc_addr,
           const struct eth_addr *hwdst_addr, const ip4_addr_t *ipdst_addr,
           const u16_t opcode)
{
 80244d0:	b580      	push	{r7, lr}
 80244d2:	b08a      	sub	sp, #40	@ 0x28
 80244d4:	af02      	add	r7, sp, #8
 80244d6:	60f8      	str	r0, [r7, #12]
 80244d8:	60b9      	str	r1, [r7, #8]
 80244da:	607a      	str	r2, [r7, #4]
 80244dc:	603b      	str	r3, [r7, #0]
  struct pbuf *p;
  err_t result = ERR_OK;
 80244de:	2300      	movs	r3, #0
 80244e0:	77fb      	strb	r3, [r7, #31]
  struct etharp_hdr *hdr;

  LWIP_ASSERT("netif != NULL", netif != NULL);
 80244e2:	68fb      	ldr	r3, [r7, #12]
 80244e4:	2b00      	cmp	r3, #0
 80244e6:	d106      	bne.n	80244f6 <etharp_raw+0x26>
 80244e8:	4b3a      	ldr	r3, [pc, #232]	@ (80245d4 <etharp_raw+0x104>)
 80244ea:	f240 4257 	movw	r2, #1111	@ 0x457
 80244ee:	493a      	ldr	r1, [pc, #232]	@ (80245d8 <etharp_raw+0x108>)
 80244f0:	483a      	ldr	r0, [pc, #232]	@ (80245dc <etharp_raw+0x10c>)
 80244f2:	f005 fa73 	bl	80299dc <iprintf>

  /* allocate a pbuf for the outgoing ARP request packet */
  p = pbuf_alloc(PBUF_LINK, SIZEOF_ETHARP_HDR, PBUF_RAM);
 80244f6:	f44f 7220 	mov.w	r2, #640	@ 0x280
 80244fa:	211c      	movs	r1, #28
 80244fc:	200e      	movs	r0, #14
 80244fe:	f7f5 fcdf 	bl	8019ec0 <pbuf_alloc>
 8024502:	61b8      	str	r0, [r7, #24]
  /* could allocate a pbuf for an ARP request? */
  if (p == NULL) {
 8024504:	69bb      	ldr	r3, [r7, #24]
 8024506:	2b00      	cmp	r3, #0
 8024508:	d102      	bne.n	8024510 <etharp_raw+0x40>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("etharp_raw: could not allocate pbuf for ARP request.\n"));
    ETHARP_STATS_INC(etharp.memerr);
    return ERR_MEM;
 802450a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802450e:	e05d      	b.n	80245cc <etharp_raw+0xfc>
  }
  LWIP_ASSERT("check that first pbuf can hold struct etharp_hdr",
 8024510:	69bb      	ldr	r3, [r7, #24]
 8024512:	895b      	ldrh	r3, [r3, #10]
 8024514:	2b1b      	cmp	r3, #27
 8024516:	d806      	bhi.n	8024526 <etharp_raw+0x56>
 8024518:	4b2e      	ldr	r3, [pc, #184]	@ (80245d4 <etharp_raw+0x104>)
 802451a:	f240 4262 	movw	r2, #1122	@ 0x462
 802451e:	4930      	ldr	r1, [pc, #192]	@ (80245e0 <etharp_raw+0x110>)
 8024520:	482e      	ldr	r0, [pc, #184]	@ (80245dc <etharp_raw+0x10c>)
 8024522:	f005 fa5b 	bl	80299dc <iprintf>
              (p->len >= SIZEOF_ETHARP_HDR));

  hdr = (struct etharp_hdr *)p->payload;
 8024526:	69bb      	ldr	r3, [r7, #24]
 8024528:	685b      	ldr	r3, [r3, #4]
 802452a:	617b      	str	r3, [r7, #20]
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_raw: sending raw ARP packet.\n"));
  hdr->opcode = lwip_htons(opcode);
 802452c:	8ebb      	ldrh	r3, [r7, #52]	@ 0x34
 802452e:	4618      	mov	r0, r3
 8024530:	f7f4 fafa 	bl	8018b28 <lwip_htons>
 8024534:	4603      	mov	r3, r0
 8024536:	461a      	mov	r2, r3
 8024538:	697b      	ldr	r3, [r7, #20]
 802453a:	80da      	strh	r2, [r3, #6]

  LWIP_ASSERT("netif->hwaddr_len must be the same as ETH_HWADDR_LEN for etharp!",
 802453c:	68fb      	ldr	r3, [r7, #12]
 802453e:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8024542:	2b06      	cmp	r3, #6
 8024544:	d006      	beq.n	8024554 <etharp_raw+0x84>
 8024546:	4b23      	ldr	r3, [pc, #140]	@ (80245d4 <etharp_raw+0x104>)
 8024548:	f240 4269 	movw	r2, #1129	@ 0x469
 802454c:	4925      	ldr	r1, [pc, #148]	@ (80245e4 <etharp_raw+0x114>)
 802454e:	4823      	ldr	r0, [pc, #140]	@ (80245dc <etharp_raw+0x10c>)
 8024550:	f005 fa44 	bl	80299dc <iprintf>
              (netif->hwaddr_len == ETH_HWADDR_LEN));

  /* Write the ARP MAC-Addresses */
  SMEMCPY(&hdr->shwaddr, hwsrc_addr, ETH_HWADDR_LEN);
 8024554:	697b      	ldr	r3, [r7, #20]
 8024556:	3308      	adds	r3, #8
 8024558:	2206      	movs	r2, #6
 802455a:	6839      	ldr	r1, [r7, #0]
 802455c:	4618      	mov	r0, r3
 802455e:	f005 fcc6 	bl	8029eee <memcpy>
  SMEMCPY(&hdr->dhwaddr, hwdst_addr, ETH_HWADDR_LEN);
 8024562:	697b      	ldr	r3, [r7, #20]
 8024564:	3312      	adds	r3, #18
 8024566:	2206      	movs	r2, #6
 8024568:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 802456a:	4618      	mov	r0, r3
 802456c:	f005 fcbf 	bl	8029eee <memcpy>
  /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without
   * structure packing. */
  IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->sipaddr, ipsrc_addr);
 8024570:	697b      	ldr	r3, [r7, #20]
 8024572:	330e      	adds	r3, #14
 8024574:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8024576:	6812      	ldr	r2, [r2, #0]
 8024578:	601a      	str	r2, [r3, #0]
  IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->dipaddr, ipdst_addr);
 802457a:	697b      	ldr	r3, [r7, #20]
 802457c:	3318      	adds	r3, #24
 802457e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8024580:	6812      	ldr	r2, [r2, #0]
 8024582:	601a      	str	r2, [r3, #0]

  hdr->hwtype = PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET);
 8024584:	697b      	ldr	r3, [r7, #20]
 8024586:	2200      	movs	r2, #0
 8024588:	701a      	strb	r2, [r3, #0]
 802458a:	2200      	movs	r2, #0
 802458c:	f042 0201 	orr.w	r2, r2, #1
 8024590:	705a      	strb	r2, [r3, #1]
  hdr->proto = PP_HTONS(ETHTYPE_IP);
 8024592:	697b      	ldr	r3, [r7, #20]
 8024594:	2200      	movs	r2, #0
 8024596:	f042 0208 	orr.w	r2, r2, #8
 802459a:	709a      	strb	r2, [r3, #2]
 802459c:	2200      	movs	r2, #0
 802459e:	70da      	strb	r2, [r3, #3]
  /* set hwlen and protolen */
  hdr->hwlen = ETH_HWADDR_LEN;
 80245a0:	697b      	ldr	r3, [r7, #20]
 80245a2:	2206      	movs	r2, #6
 80245a4:	711a      	strb	r2, [r3, #4]
  hdr->protolen = sizeof(ip4_addr_t);
 80245a6:	697b      	ldr	r3, [r7, #20]
 80245a8:	2204      	movs	r2, #4
 80245aa:	715a      	strb	r2, [r3, #5]
  if (ip4_addr_islinklocal(ipsrc_addr)) {
    ethernet_output(netif, p, ethsrc_addr, &ethbroadcast, ETHTYPE_ARP);
  } else
#endif /* LWIP_AUTOIP */
  {
    ethernet_output(netif, p, ethsrc_addr, ethdst_addr, ETHTYPE_ARP);
 80245ac:	f640 0306 	movw	r3, #2054	@ 0x806
 80245b0:	9300      	str	r3, [sp, #0]
 80245b2:	687b      	ldr	r3, [r7, #4]
 80245b4:	68ba      	ldr	r2, [r7, #8]
 80245b6:	69b9      	ldr	r1, [r7, #24]
 80245b8:	68f8      	ldr	r0, [r7, #12]
 80245ba:	f001 fd97 	bl	80260ec <ethernet_output>
  }

  ETHARP_STATS_INC(etharp.xmit);
  /* free ARP query packet */
  pbuf_free(p);
 80245be:	69b8      	ldr	r0, [r7, #24]
 80245c0:	f7f5 ff94 	bl	801a4ec <pbuf_free>
  p = NULL;
 80245c4:	2300      	movs	r3, #0
 80245c6:	61bb      	str	r3, [r7, #24]
  /* could not allocate pbuf for ARP request */

  return result;
 80245c8:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 80245cc:	4618      	mov	r0, r3
 80245ce:	3720      	adds	r7, #32
 80245d0:	46bd      	mov	sp, r7
 80245d2:	bd80      	pop	{r7, pc}
 80245d4:	0803023c 	.word	0x0803023c
 80245d8:	0803038c 	.word	0x0803038c
 80245dc:	080302b4 	.word	0x080302b4
 80245e0:	0803043c 	.word	0x0803043c
 80245e4:	08030470 	.word	0x08030470

080245e8 <etharp_request_dst>:
 *         ERR_MEM if the ARP packet couldn't be allocated
 *         any other err_t on failure
 */
static err_t
etharp_request_dst(struct netif *netif, const ip4_addr_t *ipaddr, const struct eth_addr *hw_dst_addr)
{
 80245e8:	b580      	push	{r7, lr}
 80245ea:	b088      	sub	sp, #32
 80245ec:	af04      	add	r7, sp, #16
 80245ee:	60f8      	str	r0, [r7, #12]
 80245f0:	60b9      	str	r1, [r7, #8]
 80245f2:	607a      	str	r2, [r7, #4]
  return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr,
 80245f4:	68fb      	ldr	r3, [r7, #12]
 80245f6:	f103 012a 	add.w	r1, r3, #42	@ 0x2a
                    (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif), &ethzero,
 80245fa:	68fb      	ldr	r3, [r7, #12]
 80245fc:	f103 002a 	add.w	r0, r3, #42	@ 0x2a
 8024600:	68fb      	ldr	r3, [r7, #12]
 8024602:	3304      	adds	r3, #4
  return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr,
 8024604:	2201      	movs	r2, #1
 8024606:	9203      	str	r2, [sp, #12]
 8024608:	68ba      	ldr	r2, [r7, #8]
 802460a:	9202      	str	r2, [sp, #8]
 802460c:	4a06      	ldr	r2, [pc, #24]	@ (8024628 <etharp_request_dst+0x40>)
 802460e:	9201      	str	r2, [sp, #4]
 8024610:	9300      	str	r3, [sp, #0]
 8024612:	4603      	mov	r3, r0
 8024614:	687a      	ldr	r2, [r7, #4]
 8024616:	68f8      	ldr	r0, [r7, #12]
 8024618:	f7ff ff5a 	bl	80244d0 <etharp_raw>
 802461c:	4603      	mov	r3, r0
                    ipaddr, ARP_REQUEST);
}
 802461e:	4618      	mov	r0, r3
 8024620:	3710      	adds	r7, #16
 8024622:	46bd      	mov	sp, r7
 8024624:	bd80      	pop	{r7, pc}
 8024626:	bf00      	nop
 8024628:	08030c78 	.word	0x08030c78

0802462c <etharp_request>:
 *         ERR_MEM if the ARP packet couldn't be allocated
 *         any other err_t on failure
 */
err_t
etharp_request(struct netif *netif, const ip4_addr_t *ipaddr)
{
 802462c:	b580      	push	{r7, lr}
 802462e:	b082      	sub	sp, #8
 8024630:	af00      	add	r7, sp, #0
 8024632:	6078      	str	r0, [r7, #4]
 8024634:	6039      	str	r1, [r7, #0]
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_request: sending ARP request.\n"));
  return etharp_request_dst(netif, ipaddr, &ethbroadcast);
 8024636:	4a05      	ldr	r2, [pc, #20]	@ (802464c <etharp_request+0x20>)
 8024638:	6839      	ldr	r1, [r7, #0]
 802463a:	6878      	ldr	r0, [r7, #4]
 802463c:	f7ff ffd4 	bl	80245e8 <etharp_request_dst>
 8024640:	4603      	mov	r3, r0
}
 8024642:	4618      	mov	r0, r3
 8024644:	3708      	adds	r7, #8
 8024646:	46bd      	mov	sp, r7
 8024648:	bd80      	pop	{r7, pc}
 802464a:	bf00      	nop
 802464c:	08030c70 	.word	0x08030c70

08024650 <icmp_input>:
 * @param p the icmp echo request packet, p->payload pointing to the icmp header
 * @param inp the netif on which this packet was received
 */
void
icmp_input(struct pbuf *p, struct netif *inp)
{
 8024650:	b580      	push	{r7, lr}
 8024652:	b08e      	sub	sp, #56	@ 0x38
 8024654:	af04      	add	r7, sp, #16
 8024656:	6078      	str	r0, [r7, #4]
 8024658:	6039      	str	r1, [r7, #0]
  const ip4_addr_t *src;

  ICMP_STATS_INC(icmp.recv);
  MIB2_STATS_INC(mib2.icmpinmsgs);

  iphdr_in = ip4_current_header();
 802465a:	4b89      	ldr	r3, [pc, #548]	@ (8024880 <icmp_input+0x230>)
 802465c:	689b      	ldr	r3, [r3, #8]
 802465e:	627b      	str	r3, [r7, #36]	@ 0x24
  hlen = IPH_HL_BYTES(iphdr_in);
 8024660:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8024662:	781b      	ldrb	r3, [r3, #0]
 8024664:	f003 030f 	and.w	r3, r3, #15
 8024668:	b2db      	uxtb	r3, r3
 802466a:	009b      	lsls	r3, r3, #2
 802466c:	b2db      	uxtb	r3, r3
 802466e:	847b      	strh	r3, [r7, #34]	@ 0x22
  if (hlen < IP_HLEN) {
 8024670:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024672:	2b13      	cmp	r3, #19
 8024674:	f240 80ed 	bls.w	8024852 <icmp_input+0x202>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short IP header (%"S16_F" bytes) received\n", hlen));
    goto lenerr;
  }
  if (p->len < sizeof(u16_t) * 2) {
 8024678:	687b      	ldr	r3, [r7, #4]
 802467a:	895b      	ldrh	r3, [r3, #10]
 802467c:	2b03      	cmp	r3, #3
 802467e:	f240 80ea 	bls.w	8024856 <icmp_input+0x206>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len));
    goto lenerr;
  }

  type = *((u8_t *)p->payload);
 8024682:	687b      	ldr	r3, [r7, #4]
 8024684:	685b      	ldr	r3, [r3, #4]
 8024686:	781b      	ldrb	r3, [r3, #0]
 8024688:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
#ifdef LWIP_DEBUG
  code = *(((u8_t *)p->payload) + 1);
 802468c:	687b      	ldr	r3, [r7, #4]
 802468e:	685b      	ldr	r3, [r3, #4]
 8024690:	785b      	ldrb	r3, [r3, #1]
 8024692:	f887 3020 	strb.w	r3, [r7, #32]
  /* if debug is enabled but debug statement below is somehow disabled: */
  LWIP_UNUSED_ARG(code);
#endif /* LWIP_DEBUG */
  switch (type) {
 8024696:	f897 3021 	ldrb.w	r3, [r7, #33]	@ 0x21
 802469a:	2b00      	cmp	r3, #0
 802469c:	f000 80d2 	beq.w	8024844 <icmp_input+0x1f4>
 80246a0:	2b08      	cmp	r3, #8
 80246a2:	f040 80d2 	bne.w	802484a <icmp_input+0x1fa>
         (as obviously, an echo request has been sent, too). */
      MIB2_STATS_INC(mib2.icmpinechoreps);
      break;
    case ICMP_ECHO:
      MIB2_STATS_INC(mib2.icmpinechos);
      src = ip4_current_dest_addr();
 80246a6:	4b77      	ldr	r3, [pc, #476]	@ (8024884 <icmp_input+0x234>)
 80246a8:	61fb      	str	r3, [r7, #28]
      /* multicast destination address? */
      if (ip4_addr_ismulticast(ip4_current_dest_addr())) {
 80246aa:	4b75      	ldr	r3, [pc, #468]	@ (8024880 <icmp_input+0x230>)
 80246ac:	695b      	ldr	r3, [r3, #20]
 80246ae:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80246b2:	2be0      	cmp	r3, #224	@ 0xe0
 80246b4:	f000 80d6 	beq.w	8024864 <icmp_input+0x214>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast pings\n"));
        goto icmperr;
#endif /* LWIP_MULTICAST_PING */
      }
      /* broadcast destination address? */
      if (ip4_addr_isbroadcast(ip4_current_dest_addr(), ip_current_netif())) {
 80246b8:	4b71      	ldr	r3, [pc, #452]	@ (8024880 <icmp_input+0x230>)
 80246ba:	695b      	ldr	r3, [r3, #20]
 80246bc:	4a70      	ldr	r2, [pc, #448]	@ (8024880 <icmp_input+0x230>)
 80246be:	6812      	ldr	r2, [r2, #0]
 80246c0:	4611      	mov	r1, r2
 80246c2:	4618      	mov	r0, r3
 80246c4:	f000 fc34 	bl	8024f30 <ip4_addr_isbroadcast_u32>
 80246c8:	4603      	mov	r3, r0
 80246ca:	2b00      	cmp	r3, #0
 80246cc:	f040 80cc 	bne.w	8024868 <icmp_input+0x218>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to broadcast pings\n"));
        goto icmperr;
#endif /* LWIP_BROADCAST_PING */
      }
      LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n"));
      if (p->tot_len < sizeof(struct icmp_echo_hdr)) {
 80246d0:	687b      	ldr	r3, [r7, #4]
 80246d2:	891b      	ldrh	r3, [r3, #8]
 80246d4:	2b07      	cmp	r3, #7
 80246d6:	f240 80c0 	bls.w	802485a <icmp_input+0x20a>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n"));
        goto lenerr;
      }
#if CHECKSUM_CHECK_ICMP
      IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_CHECK_ICMP) {
        if (inet_chksum_pbuf(p) != 0) {
 80246da:	6878      	ldr	r0, [r7, #4]
 80246dc:	f7f4 fac1 	bl	8018c62 <inet_chksum_pbuf>
 80246e0:	4603      	mov	r3, r0
 80246e2:	2b00      	cmp	r3, #0
 80246e4:	d003      	beq.n	80246ee <icmp_input+0x9e>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo\n"));
          pbuf_free(p);
 80246e6:	6878      	ldr	r0, [r7, #4]
 80246e8:	f7f5 ff00 	bl	801a4ec <pbuf_free>
          ICMP_STATS_INC(icmp.chkerr);
          MIB2_STATS_INC(mib2.icmpinerrors);
          return;
 80246ec:	e0c5      	b.n	802487a <icmp_input+0x22a>
        }
      }
#endif
#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN
      if (pbuf_add_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) {
 80246ee:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80246f0:	330e      	adds	r3, #14
 80246f2:	4619      	mov	r1, r3
 80246f4:	6878      	ldr	r0, [r7, #4]
 80246f6:	f7f5 fe31 	bl	801a35c <pbuf_add_header>
 80246fa:	4603      	mov	r3, r0
 80246fc:	2b00      	cmp	r3, #0
 80246fe:	d04b      	beq.n	8024798 <icmp_input+0x148>
        /* p is not big enough to contain link headers
         * allocate a new one and copy p into it
         */
        struct pbuf *r;
        u16_t alloc_len = (u16_t)(p->tot_len + hlen);
 8024700:	687b      	ldr	r3, [r7, #4]
 8024702:	891a      	ldrh	r2, [r3, #8]
 8024704:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024706:	4413      	add	r3, r2
 8024708:	837b      	strh	r3, [r7, #26]
        if (alloc_len < p->tot_len) {
 802470a:	687b      	ldr	r3, [r7, #4]
 802470c:	891b      	ldrh	r3, [r3, #8]
 802470e:	8b7a      	ldrh	r2, [r7, #26]
 8024710:	429a      	cmp	r2, r3
 8024712:	f0c0 80ab 	bcc.w	802486c <icmp_input+0x21c>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed (tot_len overflow)\n"));
          goto icmperr;
        }
        /* allocate new packet buffer with space for link headers */
        r = pbuf_alloc(PBUF_LINK, alloc_len, PBUF_RAM);
 8024716:	8b7b      	ldrh	r3, [r7, #26]
 8024718:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802471c:	4619      	mov	r1, r3
 802471e:	200e      	movs	r0, #14
 8024720:	f7f5 fbce 	bl	8019ec0 <pbuf_alloc>
 8024724:	6178      	str	r0, [r7, #20]
        if (r == NULL) {
 8024726:	697b      	ldr	r3, [r7, #20]
 8024728:	2b00      	cmp	r3, #0
 802472a:	f000 80a1 	beq.w	8024870 <icmp_input+0x220>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed\n"));
          goto icmperr;
        }
        if (r->len < hlen + sizeof(struct icmp_echo_hdr)) {
 802472e:	697b      	ldr	r3, [r7, #20]
 8024730:	895b      	ldrh	r3, [r3, #10]
 8024732:	461a      	mov	r2, r3
 8024734:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024736:	3308      	adds	r3, #8
 8024738:	429a      	cmp	r2, r3
 802473a:	d203      	bcs.n	8024744 <icmp_input+0xf4>
          LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("first pbuf cannot hold the ICMP header"));
          pbuf_free(r);
 802473c:	6978      	ldr	r0, [r7, #20]
 802473e:	f7f5 fed5 	bl	801a4ec <pbuf_free>
          goto icmperr;
 8024742:	e096      	b.n	8024872 <icmp_input+0x222>
        }
        /* copy the ip header */
        MEMCPY(r->payload, iphdr_in, hlen);
 8024744:	697b      	ldr	r3, [r7, #20]
 8024746:	685b      	ldr	r3, [r3, #4]
 8024748:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 802474a:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 802474c:	4618      	mov	r0, r3
 802474e:	f005 fbce 	bl	8029eee <memcpy>
        /* switch r->payload back to icmp header (cannot fail) */
        if (pbuf_remove_header(r, hlen)) {
 8024752:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024754:	4619      	mov	r1, r3
 8024756:	6978      	ldr	r0, [r7, #20]
 8024758:	f7f5 fe10 	bl	801a37c <pbuf_remove_header>
 802475c:	4603      	mov	r3, r0
 802475e:	2b00      	cmp	r3, #0
 8024760:	d009      	beq.n	8024776 <icmp_input+0x126>
          LWIP_ASSERT("icmp_input: moving r->payload to icmp header failed\n", 0);
 8024762:	4b49      	ldr	r3, [pc, #292]	@ (8024888 <icmp_input+0x238>)
 8024764:	22b6      	movs	r2, #182	@ 0xb6
 8024766:	4949      	ldr	r1, [pc, #292]	@ (802488c <icmp_input+0x23c>)
 8024768:	4849      	ldr	r0, [pc, #292]	@ (8024890 <icmp_input+0x240>)
 802476a:	f005 f937 	bl	80299dc <iprintf>
          pbuf_free(r);
 802476e:	6978      	ldr	r0, [r7, #20]
 8024770:	f7f5 febc 	bl	801a4ec <pbuf_free>
          goto icmperr;
 8024774:	e07d      	b.n	8024872 <icmp_input+0x222>
        }
        /* copy the rest of the packet without ip header */
        if (pbuf_copy(r, p) != ERR_OK) {
 8024776:	6879      	ldr	r1, [r7, #4]
 8024778:	6978      	ldr	r0, [r7, #20]
 802477a:	f7f5 ffeb 	bl	801a754 <pbuf_copy>
 802477e:	4603      	mov	r3, r0
 8024780:	2b00      	cmp	r3, #0
 8024782:	d003      	beq.n	802478c <icmp_input+0x13c>
          LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("icmp_input: copying to new pbuf failed"));
          pbuf_free(r);
 8024784:	6978      	ldr	r0, [r7, #20]
 8024786:	f7f5 feb1 	bl	801a4ec <pbuf_free>
          goto icmperr;
 802478a:	e072      	b.n	8024872 <icmp_input+0x222>
        }
        /* free the original p */
        pbuf_free(p);
 802478c:	6878      	ldr	r0, [r7, #4]
 802478e:	f7f5 fead 	bl	801a4ec <pbuf_free>
        /* we now have an identical copy of p that has room for link headers */
        p = r;
 8024792:	697b      	ldr	r3, [r7, #20]
 8024794:	607b      	str	r3, [r7, #4]
 8024796:	e00f      	b.n	80247b8 <icmp_input+0x168>
      } else {
        /* restore p->payload to point to icmp header (cannot fail) */
        if (pbuf_remove_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) {
 8024798:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 802479a:	330e      	adds	r3, #14
 802479c:	4619      	mov	r1, r3
 802479e:	6878      	ldr	r0, [r7, #4]
 80247a0:	f7f5 fdec 	bl	801a37c <pbuf_remove_header>
 80247a4:	4603      	mov	r3, r0
 80247a6:	2b00      	cmp	r3, #0
 80247a8:	d006      	beq.n	80247b8 <icmp_input+0x168>
          LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0);
 80247aa:	4b37      	ldr	r3, [pc, #220]	@ (8024888 <icmp_input+0x238>)
 80247ac:	22c7      	movs	r2, #199	@ 0xc7
 80247ae:	4939      	ldr	r1, [pc, #228]	@ (8024894 <icmp_input+0x244>)
 80247b0:	4837      	ldr	r0, [pc, #220]	@ (8024890 <icmp_input+0x240>)
 80247b2:	f005 f913 	bl	80299dc <iprintf>
          goto icmperr;
 80247b6:	e05c      	b.n	8024872 <icmp_input+0x222>
      }
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */
      /* At this point, all checks are OK. */
      /* We generate an answer by switching the dest and src ip addresses,
       * setting the icmp type to ECHO_RESPONSE and updating the checksum. */
      iecho = (struct icmp_echo_hdr *)p->payload;
 80247b8:	687b      	ldr	r3, [r7, #4]
 80247ba:	685b      	ldr	r3, [r3, #4]
 80247bc:	613b      	str	r3, [r7, #16]
      if (pbuf_add_header(p, hlen)) {
 80247be:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80247c0:	4619      	mov	r1, r3
 80247c2:	6878      	ldr	r0, [r7, #4]
 80247c4:	f7f5 fdca 	bl	801a35c <pbuf_add_header>
 80247c8:	4603      	mov	r3, r0
 80247ca:	2b00      	cmp	r3, #0
 80247cc:	d13c      	bne.n	8024848 <icmp_input+0x1f8>
        LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("Can't move over header in packet"));
      } else {
        err_t ret;
        struct ip_hdr *iphdr = (struct ip_hdr *)p->payload;
 80247ce:	687b      	ldr	r3, [r7, #4]
 80247d0:	685b      	ldr	r3, [r3, #4]
 80247d2:	60fb      	str	r3, [r7, #12]
        ip4_addr_copy(iphdr->src, *src);
 80247d4:	69fb      	ldr	r3, [r7, #28]
 80247d6:	681a      	ldr	r2, [r3, #0]
 80247d8:	68fb      	ldr	r3, [r7, #12]
 80247da:	60da      	str	r2, [r3, #12]
        ip4_addr_copy(iphdr->dest, *ip4_current_src_addr());
 80247dc:	4b28      	ldr	r3, [pc, #160]	@ (8024880 <icmp_input+0x230>)
 80247de:	691a      	ldr	r2, [r3, #16]
 80247e0:	68fb      	ldr	r3, [r7, #12]
 80247e2:	611a      	str	r2, [r3, #16]
        ICMPH_TYPE_SET(iecho, ICMP_ER);
 80247e4:	693b      	ldr	r3, [r7, #16]
 80247e6:	2200      	movs	r2, #0
 80247e8:	701a      	strb	r2, [r3, #0]
#if CHECKSUM_GEN_ICMP
        IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_GEN_ICMP) {
          /* adjust the checksum */
          if (iecho->chksum > PP_HTONS(0xffffU - (ICMP_ECHO << 8))) {
 80247ea:	693b      	ldr	r3, [r7, #16]
 80247ec:	885b      	ldrh	r3, [r3, #2]
 80247ee:	b29b      	uxth	r3, r3
 80247f0:	f64f 72f7 	movw	r2, #65527	@ 0xfff7
 80247f4:	4293      	cmp	r3, r2
 80247f6:	d907      	bls.n	8024808 <icmp_input+0x1b8>
            iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS((u16_t)(ICMP_ECHO << 8)) + 1);
 80247f8:	693b      	ldr	r3, [r7, #16]
 80247fa:	885b      	ldrh	r3, [r3, #2]
 80247fc:	b29b      	uxth	r3, r3
 80247fe:	3309      	adds	r3, #9
 8024800:	b29a      	uxth	r2, r3
 8024802:	693b      	ldr	r3, [r7, #16]
 8024804:	805a      	strh	r2, [r3, #2]
 8024806:	e006      	b.n	8024816 <icmp_input+0x1c6>
          } else {
            iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS(ICMP_ECHO << 8));
 8024808:	693b      	ldr	r3, [r7, #16]
 802480a:	885b      	ldrh	r3, [r3, #2]
 802480c:	b29b      	uxth	r3, r3
 802480e:	3308      	adds	r3, #8
 8024810:	b29a      	uxth	r2, r3
 8024812:	693b      	ldr	r3, [r7, #16]
 8024814:	805a      	strh	r2, [r3, #2]
#else /* CHECKSUM_GEN_ICMP */
        iecho->chksum = 0;
#endif /* CHECKSUM_GEN_ICMP */

        /* Set the correct TTL and recalculate the header checksum. */
        IPH_TTL_SET(iphdr, ICMP_TTL);
 8024816:	68fb      	ldr	r3, [r7, #12]
 8024818:	22ff      	movs	r2, #255	@ 0xff
 802481a:	721a      	strb	r2, [r3, #8]
        IPH_CHKSUM_SET(iphdr, 0);
 802481c:	68fb      	ldr	r3, [r7, #12]
 802481e:	2200      	movs	r2, #0
 8024820:	729a      	strb	r2, [r3, #10]
 8024822:	2200      	movs	r2, #0
 8024824:	72da      	strb	r2, [r3, #11]
        MIB2_STATS_INC(mib2.icmpoutmsgs);
        /* increase number of echo replies attempted to send */
        MIB2_STATS_INC(mib2.icmpoutechoreps);

        /* send an ICMP packet */
        ret = ip4_output_if(p, src, LWIP_IP_HDRINCL,
 8024826:	683b      	ldr	r3, [r7, #0]
 8024828:	9302      	str	r3, [sp, #8]
 802482a:	2301      	movs	r3, #1
 802482c:	9301      	str	r3, [sp, #4]
 802482e:	2300      	movs	r3, #0
 8024830:	9300      	str	r3, [sp, #0]
 8024832:	23ff      	movs	r3, #255	@ 0xff
 8024834:	2200      	movs	r2, #0
 8024836:	69f9      	ldr	r1, [r7, #28]
 8024838:	6878      	ldr	r0, [r7, #4]
 802483a:	f000 fa9f 	bl	8024d7c <ip4_output_if>
 802483e:	4603      	mov	r3, r0
 8024840:	72fb      	strb	r3, [r7, #11]
                            ICMP_TTL, 0, IP_PROTO_ICMP, inp);
        if (ret != ERR_OK) {
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ip_output_if returned an error: %s\n", lwip_strerr(ret)));
        }
      }
      break;
 8024842:	e001      	b.n	8024848 <icmp_input+0x1f8>
      break;
 8024844:	bf00      	nop
 8024846:	e000      	b.n	802484a <icmp_input+0x1fa>
      break;
 8024848:	bf00      	nop
      LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n",
                               (s16_t)type, (s16_t)code));
      ICMP_STATS_INC(icmp.proterr);
      ICMP_STATS_INC(icmp.drop);
  }
  pbuf_free(p);
 802484a:	6878      	ldr	r0, [r7, #4]
 802484c:	f7f5 fe4e 	bl	801a4ec <pbuf_free>
  return;
 8024850:	e013      	b.n	802487a <icmp_input+0x22a>
    goto lenerr;
 8024852:	bf00      	nop
 8024854:	e002      	b.n	802485c <icmp_input+0x20c>
    goto lenerr;
 8024856:	bf00      	nop
 8024858:	e000      	b.n	802485c <icmp_input+0x20c>
        goto lenerr;
 802485a:	bf00      	nop
lenerr:
  pbuf_free(p);
 802485c:	6878      	ldr	r0, [r7, #4]
 802485e:	f7f5 fe45 	bl	801a4ec <pbuf_free>
  ICMP_STATS_INC(icmp.lenerr);
  MIB2_STATS_INC(mib2.icmpinerrors);
  return;
 8024862:	e00a      	b.n	802487a <icmp_input+0x22a>
        goto icmperr;
 8024864:	bf00      	nop
 8024866:	e004      	b.n	8024872 <icmp_input+0x222>
        goto icmperr;
 8024868:	bf00      	nop
 802486a:	e002      	b.n	8024872 <icmp_input+0x222>
          goto icmperr;
 802486c:	bf00      	nop
 802486e:	e000      	b.n	8024872 <icmp_input+0x222>
          goto icmperr;
 8024870:	bf00      	nop
#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING
icmperr:
  pbuf_free(p);
 8024872:	6878      	ldr	r0, [r7, #4]
 8024874:	f7f5 fe3a 	bl	801a4ec <pbuf_free>
  ICMP_STATS_INC(icmp.err);
  MIB2_STATS_INC(mib2.icmpinerrors);
  return;
 8024878:	bf00      	nop
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING */
}
 802487a:	3728      	adds	r7, #40	@ 0x28
 802487c:	46bd      	mov	sp, r7
 802487e:	bd80      	pop	{r7, pc}
 8024880:	24024338 	.word	0x24024338
 8024884:	2402434c 	.word	0x2402434c
 8024888:	080304b4 	.word	0x080304b4
 802488c:	080304ec 	.word	0x080304ec
 8024890:	08030524 	.word	0x08030524
 8024894:	0803054c 	.word	0x0803054c

08024898 <icmp_dest_unreach>:
 *          p->payload pointing to the IP header
 * @param t type of the 'unreachable' packet
 */
void
icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t)
{
 8024898:	b580      	push	{r7, lr}
 802489a:	b082      	sub	sp, #8
 802489c:	af00      	add	r7, sp, #0
 802489e:	6078      	str	r0, [r7, #4]
 80248a0:	460b      	mov	r3, r1
 80248a2:	70fb      	strb	r3, [r7, #3]
  MIB2_STATS_INC(mib2.icmpoutdestunreachs);
  icmp_send_response(p, ICMP_DUR, t);
 80248a4:	78fb      	ldrb	r3, [r7, #3]
 80248a6:	461a      	mov	r2, r3
 80248a8:	2103      	movs	r1, #3
 80248aa:	6878      	ldr	r0, [r7, #4]
 80248ac:	f000 f814 	bl	80248d8 <icmp_send_response>
}
 80248b0:	bf00      	nop
 80248b2:	3708      	adds	r7, #8
 80248b4:	46bd      	mov	sp, r7
 80248b6:	bd80      	pop	{r7, pc}

080248b8 <icmp_time_exceeded>:
 *          p->payload pointing to the IP header
 * @param t type of the 'time exceeded' packet
 */
void
icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t)
{
 80248b8:	b580      	push	{r7, lr}
 80248ba:	b082      	sub	sp, #8
 80248bc:	af00      	add	r7, sp, #0
 80248be:	6078      	str	r0, [r7, #4]
 80248c0:	460b      	mov	r3, r1
 80248c2:	70fb      	strb	r3, [r7, #3]
  MIB2_STATS_INC(mib2.icmpouttimeexcds);
  icmp_send_response(p, ICMP_TE, t);
 80248c4:	78fb      	ldrb	r3, [r7, #3]
 80248c6:	461a      	mov	r2, r3
 80248c8:	210b      	movs	r1, #11
 80248ca:	6878      	ldr	r0, [r7, #4]
 80248cc:	f000 f804 	bl	80248d8 <icmp_send_response>
}
 80248d0:	bf00      	nop
 80248d2:	3708      	adds	r7, #8
 80248d4:	46bd      	mov	sp, r7
 80248d6:	bd80      	pop	{r7, pc}

080248d8 <icmp_send_response>:
 * @param type Type of the ICMP header
 * @param code Code of the ICMP header
 */
static void
icmp_send_response(struct pbuf *p, u8_t type, u8_t code)
{
 80248d8:	b580      	push	{r7, lr}
 80248da:	b08c      	sub	sp, #48	@ 0x30
 80248dc:	af04      	add	r7, sp, #16
 80248de:	6078      	str	r0, [r7, #4]
 80248e0:	460b      	mov	r3, r1
 80248e2:	70fb      	strb	r3, [r7, #3]
 80248e4:	4613      	mov	r3, r2
 80248e6:	70bb      	strb	r3, [r7, #2]

  /* increase number of messages attempted to send */
  MIB2_STATS_INC(mib2.icmpoutmsgs);

  /* ICMP header + IP header + 8 bytes of data */
  q = pbuf_alloc(PBUF_IP, sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE,
 80248e8:	f44f 7220 	mov.w	r2, #640	@ 0x280
 80248ec:	2124      	movs	r1, #36	@ 0x24
 80248ee:	2022      	movs	r0, #34	@ 0x22
 80248f0:	f7f5 fae6 	bl	8019ec0 <pbuf_alloc>
 80248f4:	61b8      	str	r0, [r7, #24]
                 PBUF_RAM);
  if (q == NULL) {
 80248f6:	69bb      	ldr	r3, [r7, #24]
 80248f8:	2b00      	cmp	r3, #0
 80248fa:	d056      	beq.n	80249aa <icmp_send_response+0xd2>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded: failed to allocate pbuf for ICMP packet.\n"));
    MIB2_STATS_INC(mib2.icmpouterrors);
    return;
  }
  LWIP_ASSERT("check that first pbuf can hold icmp message",
 80248fc:	69bb      	ldr	r3, [r7, #24]
 80248fe:	895b      	ldrh	r3, [r3, #10]
 8024900:	2b23      	cmp	r3, #35	@ 0x23
 8024902:	d806      	bhi.n	8024912 <icmp_send_response+0x3a>
 8024904:	4b2b      	ldr	r3, [pc, #172]	@ (80249b4 <icmp_send_response+0xdc>)
 8024906:	f44f 72b4 	mov.w	r2, #360	@ 0x168
 802490a:	492b      	ldr	r1, [pc, #172]	@ (80249b8 <icmp_send_response+0xe0>)
 802490c:	482b      	ldr	r0, [pc, #172]	@ (80249bc <icmp_send_response+0xe4>)
 802490e:	f005 f865 	bl	80299dc <iprintf>
              (q->len >= (sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE)));

  iphdr = (struct ip_hdr *)p->payload;
 8024912:	687b      	ldr	r3, [r7, #4]
 8024914:	685b      	ldr	r3, [r3, #4]
 8024916:	617b      	str	r3, [r7, #20]
  ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->src);
  LWIP_DEBUGF(ICMP_DEBUG, (" to "));
  ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->dest);
  LWIP_DEBUGF(ICMP_DEBUG, ("\n"));

  icmphdr = (struct icmp_echo_hdr *)q->payload;
 8024918:	69bb      	ldr	r3, [r7, #24]
 802491a:	685b      	ldr	r3, [r3, #4]
 802491c:	613b      	str	r3, [r7, #16]
  icmphdr->type = type;
 802491e:	693b      	ldr	r3, [r7, #16]
 8024920:	78fa      	ldrb	r2, [r7, #3]
 8024922:	701a      	strb	r2, [r3, #0]
  icmphdr->code = code;
 8024924:	693b      	ldr	r3, [r7, #16]
 8024926:	78ba      	ldrb	r2, [r7, #2]
 8024928:	705a      	strb	r2, [r3, #1]
  icmphdr->id = 0;
 802492a:	693b      	ldr	r3, [r7, #16]
 802492c:	2200      	movs	r2, #0
 802492e:	711a      	strb	r2, [r3, #4]
 8024930:	2200      	movs	r2, #0
 8024932:	715a      	strb	r2, [r3, #5]
  icmphdr->seqno = 0;
 8024934:	693b      	ldr	r3, [r7, #16]
 8024936:	2200      	movs	r2, #0
 8024938:	719a      	strb	r2, [r3, #6]
 802493a:	2200      	movs	r2, #0
 802493c:	71da      	strb	r2, [r3, #7]

  /* copy fields from original packet */
  SMEMCPY((u8_t *)q->payload + sizeof(struct icmp_echo_hdr), (u8_t *)p->payload,
 802493e:	69bb      	ldr	r3, [r7, #24]
 8024940:	685b      	ldr	r3, [r3, #4]
 8024942:	f103 0008 	add.w	r0, r3, #8
 8024946:	687b      	ldr	r3, [r7, #4]
 8024948:	685b      	ldr	r3, [r3, #4]
 802494a:	221c      	movs	r2, #28
 802494c:	4619      	mov	r1, r3
 802494e:	f005 face 	bl	8029eee <memcpy>
          IP_HLEN + ICMP_DEST_UNREACH_DATASIZE);

  ip4_addr_copy(iphdr_src, iphdr->src);
 8024952:	697b      	ldr	r3, [r7, #20]
 8024954:	68db      	ldr	r3, [r3, #12]
 8024956:	60fb      	str	r3, [r7, #12]
    ip4_addr_t iphdr_dst;
    ip4_addr_copy(iphdr_dst, iphdr->dest);
    netif = ip4_route_src(&iphdr_dst, &iphdr_src);
  }
#else
  netif = ip4_route(&iphdr_src);
 8024958:	f107 030c 	add.w	r3, r7, #12
 802495c:	4618      	mov	r0, r3
 802495e:	f000 f82f 	bl	80249c0 <ip4_route>
 8024962:	61f8      	str	r0, [r7, #28]
#endif
  if (netif != NULL) {
 8024964:	69fb      	ldr	r3, [r7, #28]
 8024966:	2b00      	cmp	r3, #0
 8024968:	d01b      	beq.n	80249a2 <icmp_send_response+0xca>
    /* calculate checksum */
    icmphdr->chksum = 0;
 802496a:	693b      	ldr	r3, [r7, #16]
 802496c:	2200      	movs	r2, #0
 802496e:	709a      	strb	r2, [r3, #2]
 8024970:	2200      	movs	r2, #0
 8024972:	70da      	strb	r2, [r3, #3]
#if CHECKSUM_GEN_ICMP
    IF__NETIF_CHECKSUM_ENABLED(netif, NETIF_CHECKSUM_GEN_ICMP) {
      icmphdr->chksum = inet_chksum(icmphdr, q->len);
 8024974:	69bb      	ldr	r3, [r7, #24]
 8024976:	895b      	ldrh	r3, [r3, #10]
 8024978:	4619      	mov	r1, r3
 802497a:	6938      	ldr	r0, [r7, #16]
 802497c:	f7f4 f95f 	bl	8018c3e <inet_chksum>
 8024980:	4603      	mov	r3, r0
 8024982:	461a      	mov	r2, r3
 8024984:	693b      	ldr	r3, [r7, #16]
 8024986:	805a      	strh	r2, [r3, #2]
    }
#endif
    ICMP_STATS_INC(icmp.xmit);
    ip4_output_if(q, NULL, &iphdr_src, ICMP_TTL, 0, IP_PROTO_ICMP, netif);
 8024988:	f107 020c 	add.w	r2, r7, #12
 802498c:	69fb      	ldr	r3, [r7, #28]
 802498e:	9302      	str	r3, [sp, #8]
 8024990:	2301      	movs	r3, #1
 8024992:	9301      	str	r3, [sp, #4]
 8024994:	2300      	movs	r3, #0
 8024996:	9300      	str	r3, [sp, #0]
 8024998:	23ff      	movs	r3, #255	@ 0xff
 802499a:	2100      	movs	r1, #0
 802499c:	69b8      	ldr	r0, [r7, #24]
 802499e:	f000 f9ed 	bl	8024d7c <ip4_output_if>
  }
  pbuf_free(q);
 80249a2:	69b8      	ldr	r0, [r7, #24]
 80249a4:	f7f5 fda2 	bl	801a4ec <pbuf_free>
 80249a8:	e000      	b.n	80249ac <icmp_send_response+0xd4>
    return;
 80249aa:	bf00      	nop
}
 80249ac:	3720      	adds	r7, #32
 80249ae:	46bd      	mov	sp, r7
 80249b0:	bd80      	pop	{r7, pc}
 80249b2:	bf00      	nop
 80249b4:	080304b4 	.word	0x080304b4
 80249b8:	08030580 	.word	0x08030580
 80249bc:	08030524 	.word	0x08030524

080249c0 <ip4_route>:
 * @param dest the destination IP address for which to find the route
 * @return the netif on which to send to reach dest
 */
struct netif *
ip4_route(const ip4_addr_t *dest)
{
 80249c0:	b580      	push	{r7, lr}
 80249c2:	b084      	sub	sp, #16
 80249c4:	af00      	add	r7, sp, #0
 80249c6:	6078      	str	r0, [r7, #4]
#if !LWIP_SINGLE_NETIF
  struct netif *netif;

  LWIP_ASSERT_CORE_LOCKED();
 80249c8:	f7eb fdbc 	bl	8010544 <sys_check_core_locking>

  /* bug #54569: in case LWIP_SINGLE_NETIF=1 and LWIP_DEBUGF() disabled, the following loop is optimized away */
  LWIP_UNUSED_ARG(dest);

  /* iterate through netifs */
  NETIF_FOREACH(netif) {
 80249cc:	4b32      	ldr	r3, [pc, #200]	@ (8024a98 <ip4_route+0xd8>)
 80249ce:	681b      	ldr	r3, [r3, #0]
 80249d0:	60fb      	str	r3, [r7, #12]
 80249d2:	e036      	b.n	8024a42 <ip4_route+0x82>
    /* is the netif up, does it have a link and a valid address? */
    if (netif_is_up(netif) && netif_is_link_up(netif) && !ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 80249d4:	68fb      	ldr	r3, [r7, #12]
 80249d6:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80249da:	f003 0301 	and.w	r3, r3, #1
 80249de:	b2db      	uxtb	r3, r3
 80249e0:	2b00      	cmp	r3, #0
 80249e2:	d02b      	beq.n	8024a3c <ip4_route+0x7c>
 80249e4:	68fb      	ldr	r3, [r7, #12]
 80249e6:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80249ea:	089b      	lsrs	r3, r3, #2
 80249ec:	f003 0301 	and.w	r3, r3, #1
 80249f0:	b2db      	uxtb	r3, r3
 80249f2:	2b00      	cmp	r3, #0
 80249f4:	d022      	beq.n	8024a3c <ip4_route+0x7c>
 80249f6:	68fb      	ldr	r3, [r7, #12]
 80249f8:	3304      	adds	r3, #4
 80249fa:	681b      	ldr	r3, [r3, #0]
 80249fc:	2b00      	cmp	r3, #0
 80249fe:	d01d      	beq.n	8024a3c <ip4_route+0x7c>
      /* network mask matches? */
      if (ip4_addr_netcmp(dest, netif_ip4_addr(netif), netif_ip4_netmask(netif))) {
 8024a00:	687b      	ldr	r3, [r7, #4]
 8024a02:	681a      	ldr	r2, [r3, #0]
 8024a04:	68fb      	ldr	r3, [r7, #12]
 8024a06:	3304      	adds	r3, #4
 8024a08:	681b      	ldr	r3, [r3, #0]
 8024a0a:	405a      	eors	r2, r3
 8024a0c:	68fb      	ldr	r3, [r7, #12]
 8024a0e:	3308      	adds	r3, #8
 8024a10:	681b      	ldr	r3, [r3, #0]
 8024a12:	4013      	ands	r3, r2
 8024a14:	2b00      	cmp	r3, #0
 8024a16:	d101      	bne.n	8024a1c <ip4_route+0x5c>
        /* return netif on which to forward IP packet */
        return netif;
 8024a18:	68fb      	ldr	r3, [r7, #12]
 8024a1a:	e038      	b.n	8024a8e <ip4_route+0xce>
      }
      /* gateway matches on a non broadcast interface? (i.e. peer in a point to point interface) */
      if (((netif->flags & NETIF_FLAG_BROADCAST) == 0) && ip4_addr_cmp(dest, netif_ip4_gw(netif))) {
 8024a1c:	68fb      	ldr	r3, [r7, #12]
 8024a1e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8024a22:	f003 0302 	and.w	r3, r3, #2
 8024a26:	2b00      	cmp	r3, #0
 8024a28:	d108      	bne.n	8024a3c <ip4_route+0x7c>
 8024a2a:	687b      	ldr	r3, [r7, #4]
 8024a2c:	681a      	ldr	r2, [r3, #0]
 8024a2e:	68fb      	ldr	r3, [r7, #12]
 8024a30:	330c      	adds	r3, #12
 8024a32:	681b      	ldr	r3, [r3, #0]
 8024a34:	429a      	cmp	r2, r3
 8024a36:	d101      	bne.n	8024a3c <ip4_route+0x7c>
        /* return netif on which to forward IP packet */
        return netif;
 8024a38:	68fb      	ldr	r3, [r7, #12]
 8024a3a:	e028      	b.n	8024a8e <ip4_route+0xce>
  NETIF_FOREACH(netif) {
 8024a3c:	68fb      	ldr	r3, [r7, #12]
 8024a3e:	681b      	ldr	r3, [r3, #0]
 8024a40:	60fb      	str	r3, [r7, #12]
 8024a42:	68fb      	ldr	r3, [r7, #12]
 8024a44:	2b00      	cmp	r3, #0
 8024a46:	d1c5      	bne.n	80249d4 <ip4_route+0x14>
    return netif;
  }
#endif
#endif /* !LWIP_SINGLE_NETIF */

  if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) ||
 8024a48:	4b14      	ldr	r3, [pc, #80]	@ (8024a9c <ip4_route+0xdc>)
 8024a4a:	681b      	ldr	r3, [r3, #0]
 8024a4c:	2b00      	cmp	r3, #0
 8024a4e:	d01a      	beq.n	8024a86 <ip4_route+0xc6>
 8024a50:	4b12      	ldr	r3, [pc, #72]	@ (8024a9c <ip4_route+0xdc>)
 8024a52:	681b      	ldr	r3, [r3, #0]
 8024a54:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8024a58:	f003 0301 	and.w	r3, r3, #1
 8024a5c:	2b00      	cmp	r3, #0
 8024a5e:	d012      	beq.n	8024a86 <ip4_route+0xc6>
 8024a60:	4b0e      	ldr	r3, [pc, #56]	@ (8024a9c <ip4_route+0xdc>)
 8024a62:	681b      	ldr	r3, [r3, #0]
 8024a64:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8024a68:	f003 0304 	and.w	r3, r3, #4
 8024a6c:	2b00      	cmp	r3, #0
 8024a6e:	d00a      	beq.n	8024a86 <ip4_route+0xc6>
      ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) {
 8024a70:	4b0a      	ldr	r3, [pc, #40]	@ (8024a9c <ip4_route+0xdc>)
 8024a72:	681b      	ldr	r3, [r3, #0]
 8024a74:	3304      	adds	r3, #4
 8024a76:	681b      	ldr	r3, [r3, #0]
  if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) ||
 8024a78:	2b00      	cmp	r3, #0
 8024a7a:	d004      	beq.n	8024a86 <ip4_route+0xc6>
      ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) {
 8024a7c:	687b      	ldr	r3, [r7, #4]
 8024a7e:	681b      	ldr	r3, [r3, #0]
 8024a80:	b2db      	uxtb	r3, r3
 8024a82:	2b7f      	cmp	r3, #127	@ 0x7f
 8024a84:	d101      	bne.n	8024a8a <ip4_route+0xca>
       If this is not good enough for you, use LWIP_HOOK_IP4_ROUTE() */
    LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_route: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n",
                ip4_addr1_16(dest), ip4_addr2_16(dest), ip4_addr3_16(dest), ip4_addr4_16(dest)));
    IP_STATS_INC(ip.rterr);
    MIB2_STATS_INC(mib2.ipoutnoroutes);
    return NULL;
 8024a86:	2300      	movs	r3, #0
 8024a88:	e001      	b.n	8024a8e <ip4_route+0xce>
  }

  return netif_default;
 8024a8a:	4b04      	ldr	r3, [pc, #16]	@ (8024a9c <ip4_route+0xdc>)
 8024a8c:	681b      	ldr	r3, [r3, #0]
}
 8024a8e:	4618      	mov	r0, r3
 8024a90:	3710      	adds	r7, #16
 8024a92:	46bd      	mov	sp, r7
 8024a94:	bd80      	pop	{r7, pc}
 8024a96:	bf00      	nop
 8024a98:	2402ae7c 	.word	0x2402ae7c
 8024a9c:	2402ae80 	.word	0x2402ae80

08024aa0 <ip4_input_accept>:
#endif /* IP_FORWARD */

/** Return true if the current input packet should be accepted on this netif */
static int
ip4_input_accept(struct netif *netif)
{
 8024aa0:	b580      	push	{r7, lr}
 8024aa2:	b082      	sub	sp, #8
 8024aa4:	af00      	add	r7, sp, #0
 8024aa6:	6078      	str	r0, [r7, #4]
                         ip4_addr_get_u32(ip4_current_dest_addr()) & ip4_addr_get_u32(netif_ip4_netmask(netif)),
                         ip4_addr_get_u32(netif_ip4_addr(netif)) & ip4_addr_get_u32(netif_ip4_netmask(netif)),
                         ip4_addr_get_u32(ip4_current_dest_addr()) & ~ip4_addr_get_u32(netif_ip4_netmask(netif))));

  /* interface is up and configured? */
  if ((netif_is_up(netif)) && (!ip4_addr_isany_val(*netif_ip4_addr(netif)))) {
 8024aa8:	687b      	ldr	r3, [r7, #4]
 8024aaa:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8024aae:	f003 0301 	and.w	r3, r3, #1
 8024ab2:	b2db      	uxtb	r3, r3
 8024ab4:	2b00      	cmp	r3, #0
 8024ab6:	d016      	beq.n	8024ae6 <ip4_input_accept+0x46>
 8024ab8:	687b      	ldr	r3, [r7, #4]
 8024aba:	3304      	adds	r3, #4
 8024abc:	681b      	ldr	r3, [r3, #0]
 8024abe:	2b00      	cmp	r3, #0
 8024ac0:	d011      	beq.n	8024ae6 <ip4_input_accept+0x46>
    /* unicast to this interface address? */
    if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) ||
 8024ac2:	4b0b      	ldr	r3, [pc, #44]	@ (8024af0 <ip4_input_accept+0x50>)
 8024ac4:	695a      	ldr	r2, [r3, #20]
 8024ac6:	687b      	ldr	r3, [r7, #4]
 8024ac8:	3304      	adds	r3, #4
 8024aca:	681b      	ldr	r3, [r3, #0]
 8024acc:	429a      	cmp	r2, r3
 8024ace:	d008      	beq.n	8024ae2 <ip4_input_accept+0x42>
        /* or broadcast on this interface network address? */
        ip4_addr_isbroadcast(ip4_current_dest_addr(), netif)
 8024ad0:	4b07      	ldr	r3, [pc, #28]	@ (8024af0 <ip4_input_accept+0x50>)
 8024ad2:	695b      	ldr	r3, [r3, #20]
 8024ad4:	6879      	ldr	r1, [r7, #4]
 8024ad6:	4618      	mov	r0, r3
 8024ad8:	f000 fa2a 	bl	8024f30 <ip4_addr_isbroadcast_u32>
 8024adc:	4603      	mov	r3, r0
    if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) ||
 8024ade:	2b00      	cmp	r3, #0
 8024ae0:	d001      	beq.n	8024ae6 <ip4_input_accept+0x46>
#endif /* LWIP_NETIF_LOOPBACK && !LWIP_HAVE_LOOPIF */
       ) {
      LWIP_DEBUGF(IP_DEBUG, ("ip4_input: packet accepted on interface %c%c\n",
                             netif->name[0], netif->name[1]));
      /* accept on this netif */
      return 1;
 8024ae2:	2301      	movs	r3, #1
 8024ae4:	e000      	b.n	8024ae8 <ip4_input_accept+0x48>
      /* accept on this netif */
      return 1;
    }
#endif /* LWIP_AUTOIP */
  }
  return 0;
 8024ae6:	2300      	movs	r3, #0
}
 8024ae8:	4618      	mov	r0, r3
 8024aea:	3708      	adds	r7, #8
 8024aec:	46bd      	mov	sp, r7
 8024aee:	bd80      	pop	{r7, pc}
 8024af0:	24024338 	.word	0x24024338

08024af4 <ip4_input>:
 * @return ERR_OK if the packet was processed (could return ERR_* if it wasn't
 *         processed, but currently always returns ERR_OK)
 */
err_t
ip4_input(struct pbuf *p, struct netif *inp)
{
 8024af4:	b580      	push	{r7, lr}
 8024af6:	b088      	sub	sp, #32
 8024af8:	af00      	add	r7, sp, #0
 8024afa:	6078      	str	r0, [r7, #4]
 8024afc:	6039      	str	r1, [r7, #0]
  const struct ip_hdr *iphdr;
  struct netif *netif;
  u16_t iphdr_hlen;
  u16_t iphdr_len;
#if IP_ACCEPT_LINK_LAYER_ADDRESSING || LWIP_IGMP
  int check_ip_src = 1;
 8024afe:	2301      	movs	r3, #1
 8024b00:	617b      	str	r3, [r7, #20]
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING || LWIP_IGMP */
#if LWIP_RAW
  raw_input_state_t raw_status;
#endif /* LWIP_RAW */

  LWIP_ASSERT_CORE_LOCKED();
 8024b02:	f7eb fd1f 	bl	8010544 <sys_check_core_locking>

  IP_STATS_INC(ip.recv);
  MIB2_STATS_INC(mib2.ipinreceives);

  /* identify the IP header */
  iphdr = (struct ip_hdr *)p->payload;
 8024b06:	687b      	ldr	r3, [r7, #4]
 8024b08:	685b      	ldr	r3, [r3, #4]
 8024b0a:	613b      	str	r3, [r7, #16]
  if (IPH_V(iphdr) != 4) {
 8024b0c:	693b      	ldr	r3, [r7, #16]
 8024b0e:	781b      	ldrb	r3, [r3, #0]
 8024b10:	091b      	lsrs	r3, r3, #4
 8024b12:	b2db      	uxtb	r3, r3
 8024b14:	2b04      	cmp	r3, #4
 8024b16:	d004      	beq.n	8024b22 <ip4_input+0x2e>
    LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_WARNING, ("IP packet dropped due to bad version number %"U16_F"\n", (u16_t)IPH_V(iphdr)));
    ip4_debug_print(p);
    pbuf_free(p);
 8024b18:	6878      	ldr	r0, [r7, #4]
 8024b1a:	f7f5 fce7 	bl	801a4ec <pbuf_free>
    IP_STATS_INC(ip.err);
    IP_STATS_INC(ip.drop);
    MIB2_STATS_INC(mib2.ipinhdrerrors);
    return ERR_OK;
 8024b1e:	2300      	movs	r3, #0
 8024b20:	e123      	b.n	8024d6a <ip4_input+0x276>
    return ERR_OK;
  }
#endif

  /* obtain IP header length in bytes */
  iphdr_hlen = IPH_HL_BYTES(iphdr);
 8024b22:	693b      	ldr	r3, [r7, #16]
 8024b24:	781b      	ldrb	r3, [r3, #0]
 8024b26:	f003 030f 	and.w	r3, r3, #15
 8024b2a:	b2db      	uxtb	r3, r3
 8024b2c:	009b      	lsls	r3, r3, #2
 8024b2e:	b2db      	uxtb	r3, r3
 8024b30:	81fb      	strh	r3, [r7, #14]
  /* obtain ip length in bytes */
  iphdr_len = lwip_ntohs(IPH_LEN(iphdr));
 8024b32:	693b      	ldr	r3, [r7, #16]
 8024b34:	885b      	ldrh	r3, [r3, #2]
 8024b36:	b29b      	uxth	r3, r3
 8024b38:	4618      	mov	r0, r3
 8024b3a:	f7f3 fff5 	bl	8018b28 <lwip_htons>
 8024b3e:	4603      	mov	r3, r0
 8024b40:	837b      	strh	r3, [r7, #26]

  /* Trim pbuf. This is especially required for packets < 60 bytes. */
  if (iphdr_len < p->tot_len) {
 8024b42:	687b      	ldr	r3, [r7, #4]
 8024b44:	891b      	ldrh	r3, [r3, #8]
 8024b46:	8b7a      	ldrh	r2, [r7, #26]
 8024b48:	429a      	cmp	r2, r3
 8024b4a:	d204      	bcs.n	8024b56 <ip4_input+0x62>
    pbuf_realloc(p, iphdr_len);
 8024b4c:	8b7b      	ldrh	r3, [r7, #26]
 8024b4e:	4619      	mov	r1, r3
 8024b50:	6878      	ldr	r0, [r7, #4]
 8024b52:	f7f5 fb15 	bl	801a180 <pbuf_realloc>
  }

  /* header length exceeds first pbuf length, or ip length exceeds total pbuf length? */
  if ((iphdr_hlen > p->len) || (iphdr_len > p->tot_len) || (iphdr_hlen < IP_HLEN)) {
 8024b56:	687b      	ldr	r3, [r7, #4]
 8024b58:	895b      	ldrh	r3, [r3, #10]
 8024b5a:	89fa      	ldrh	r2, [r7, #14]
 8024b5c:	429a      	cmp	r2, r3
 8024b5e:	d807      	bhi.n	8024b70 <ip4_input+0x7c>
 8024b60:	687b      	ldr	r3, [r7, #4]
 8024b62:	891b      	ldrh	r3, [r3, #8]
 8024b64:	8b7a      	ldrh	r2, [r7, #26]
 8024b66:	429a      	cmp	r2, r3
 8024b68:	d802      	bhi.n	8024b70 <ip4_input+0x7c>
 8024b6a:	89fb      	ldrh	r3, [r7, #14]
 8024b6c:	2b13      	cmp	r3, #19
 8024b6e:	d804      	bhi.n	8024b7a <ip4_input+0x86>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                  ("IP (len %"U16_F") is longer than pbuf (len %"U16_F"), IP packet dropped.\n",
                   iphdr_len, p->tot_len));
    }
    /* free (drop) packet pbufs */
    pbuf_free(p);
 8024b70:	6878      	ldr	r0, [r7, #4]
 8024b72:	f7f5 fcbb 	bl	801a4ec <pbuf_free>
    IP_STATS_INC(ip.lenerr);
    IP_STATS_INC(ip.drop);
    MIB2_STATS_INC(mib2.ipindiscards);
    return ERR_OK;
 8024b76:	2300      	movs	r3, #0
 8024b78:	e0f7      	b.n	8024d6a <ip4_input+0x276>
    }
  }
#endif

  /* copy IP addresses to aligned ip_addr_t */
  ip_addr_copy_from_ip4(ip_data.current_iphdr_dest, iphdr->dest);
 8024b7a:	693b      	ldr	r3, [r7, #16]
 8024b7c:	691b      	ldr	r3, [r3, #16]
 8024b7e:	4a7d      	ldr	r2, [pc, #500]	@ (8024d74 <ip4_input+0x280>)
 8024b80:	6153      	str	r3, [r2, #20]
  ip_addr_copy_from_ip4(ip_data.current_iphdr_src, iphdr->src);
 8024b82:	693b      	ldr	r3, [r7, #16]
 8024b84:	68db      	ldr	r3, [r3, #12]
 8024b86:	4a7b      	ldr	r2, [pc, #492]	@ (8024d74 <ip4_input+0x280>)
 8024b88:	6113      	str	r3, [r2, #16]

  /* match packet against an interface, i.e. is this packet for us? */
  if (ip4_addr_ismulticast(ip4_current_dest_addr())) {
 8024b8a:	4b7a      	ldr	r3, [pc, #488]	@ (8024d74 <ip4_input+0x280>)
 8024b8c:	695b      	ldr	r3, [r3, #20]
 8024b8e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8024b92:	2be0      	cmp	r3, #224	@ 0xe0
 8024b94:	d112      	bne.n	8024bbc <ip4_input+0xc8>
      netif = inp;
    } else {
      netif = NULL;
    }
#else /* LWIP_IGMP */
    if ((netif_is_up(inp)) && (!ip4_addr_isany_val(*netif_ip4_addr(inp)))) {
 8024b96:	683b      	ldr	r3, [r7, #0]
 8024b98:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8024b9c:	f003 0301 	and.w	r3, r3, #1
 8024ba0:	b2db      	uxtb	r3, r3
 8024ba2:	2b00      	cmp	r3, #0
 8024ba4:	d007      	beq.n	8024bb6 <ip4_input+0xc2>
 8024ba6:	683b      	ldr	r3, [r7, #0]
 8024ba8:	3304      	adds	r3, #4
 8024baa:	681b      	ldr	r3, [r3, #0]
 8024bac:	2b00      	cmp	r3, #0
 8024bae:	d002      	beq.n	8024bb6 <ip4_input+0xc2>
      netif = inp;
 8024bb0:	683b      	ldr	r3, [r7, #0]
 8024bb2:	61fb      	str	r3, [r7, #28]
 8024bb4:	e02a      	b.n	8024c0c <ip4_input+0x118>
    } else {
      netif = NULL;
 8024bb6:	2300      	movs	r3, #0
 8024bb8:	61fb      	str	r3, [r7, #28]
 8024bba:	e027      	b.n	8024c0c <ip4_input+0x118>
    }
#endif /* LWIP_IGMP */
  } else {
    /* start trying with inp. if that's not acceptable, start walking the
       list of configured netifs. */
    if (ip4_input_accept(inp)) {
 8024bbc:	6838      	ldr	r0, [r7, #0]
 8024bbe:	f7ff ff6f 	bl	8024aa0 <ip4_input_accept>
 8024bc2:	4603      	mov	r3, r0
 8024bc4:	2b00      	cmp	r3, #0
 8024bc6:	d002      	beq.n	8024bce <ip4_input+0xda>
      netif = inp;
 8024bc8:	683b      	ldr	r3, [r7, #0]
 8024bca:	61fb      	str	r3, [r7, #28]
 8024bcc:	e01e      	b.n	8024c0c <ip4_input+0x118>
    } else {
      netif = NULL;
 8024bce:	2300      	movs	r3, #0
 8024bd0:	61fb      	str	r3, [r7, #28]
#if !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF
      /* Packets sent to the loopback address must not be accepted on an
       * interface that does not have the loopback address assigned to it,
       * unless a non-loopback interface is used for loopback traffic. */
      if (!ip4_addr_isloopback(ip4_current_dest_addr()))
 8024bd2:	4b68      	ldr	r3, [pc, #416]	@ (8024d74 <ip4_input+0x280>)
 8024bd4:	695b      	ldr	r3, [r3, #20]
 8024bd6:	b2db      	uxtb	r3, r3
 8024bd8:	2b7f      	cmp	r3, #127	@ 0x7f
 8024bda:	d017      	beq.n	8024c0c <ip4_input+0x118>
#endif /* !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF */
      {
#if !LWIP_SINGLE_NETIF
        NETIF_FOREACH(netif) {
 8024bdc:	4b66      	ldr	r3, [pc, #408]	@ (8024d78 <ip4_input+0x284>)
 8024bde:	681b      	ldr	r3, [r3, #0]
 8024be0:	61fb      	str	r3, [r7, #28]
 8024be2:	e00e      	b.n	8024c02 <ip4_input+0x10e>
          if (netif == inp) {
 8024be4:	69fa      	ldr	r2, [r7, #28]
 8024be6:	683b      	ldr	r3, [r7, #0]
 8024be8:	429a      	cmp	r2, r3
 8024bea:	d006      	beq.n	8024bfa <ip4_input+0x106>
            /* we checked that before already */
            continue;
          }
          if (ip4_input_accept(netif)) {
 8024bec:	69f8      	ldr	r0, [r7, #28]
 8024bee:	f7ff ff57 	bl	8024aa0 <ip4_input_accept>
 8024bf2:	4603      	mov	r3, r0
 8024bf4:	2b00      	cmp	r3, #0
 8024bf6:	d108      	bne.n	8024c0a <ip4_input+0x116>
 8024bf8:	e000      	b.n	8024bfc <ip4_input+0x108>
            continue;
 8024bfa:	bf00      	nop
        NETIF_FOREACH(netif) {
 8024bfc:	69fb      	ldr	r3, [r7, #28]
 8024bfe:	681b      	ldr	r3, [r3, #0]
 8024c00:	61fb      	str	r3, [r7, #28]
 8024c02:	69fb      	ldr	r3, [r7, #28]
 8024c04:	2b00      	cmp	r3, #0
 8024c06:	d1ed      	bne.n	8024be4 <ip4_input+0xf0>
 8024c08:	e000      	b.n	8024c0c <ip4_input+0x118>
            break;
 8024c0a:	bf00      	nop
   * If you want to accept private broadcast communication while a netif is down,
   * define LWIP_IP_ACCEPT_UDP_PORT(dst_port), e.g.:
   *
   * #define LWIP_IP_ACCEPT_UDP_PORT(dst_port) ((dst_port) == PP_NTOHS(12345))
   */
  if (netif == NULL) {
 8024c0c:	69fb      	ldr	r3, [r7, #28]
 8024c0e:	2b00      	cmp	r3, #0
 8024c10:	d111      	bne.n	8024c36 <ip4_input+0x142>
    /* remote port is DHCP server? */
    if (IPH_PROTO(iphdr) == IP_PROTO_UDP) {
 8024c12:	693b      	ldr	r3, [r7, #16]
 8024c14:	7a5b      	ldrb	r3, [r3, #9]
 8024c16:	2b11      	cmp	r3, #17
 8024c18:	d10d      	bne.n	8024c36 <ip4_input+0x142>
      const struct udp_hdr *udphdr = (const struct udp_hdr *)((const u8_t *)iphdr + iphdr_hlen);
 8024c1a:	89fb      	ldrh	r3, [r7, #14]
 8024c1c:	693a      	ldr	r2, [r7, #16]
 8024c1e:	4413      	add	r3, r2
 8024c20:	60bb      	str	r3, [r7, #8]
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip4_input: UDP packet to DHCP client port %"U16_F"\n",
                                              lwip_ntohs(udphdr->dest)));
      if (IP_ACCEPT_LINK_LAYER_ADDRESSED_PORT(udphdr->dest)) {
 8024c22:	68bb      	ldr	r3, [r7, #8]
 8024c24:	885b      	ldrh	r3, [r3, #2]
 8024c26:	b29b      	uxth	r3, r3
 8024c28:	f5b3 4f88 	cmp.w	r3, #17408	@ 0x4400
 8024c2c:	d103      	bne.n	8024c36 <ip4_input+0x142>
        LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip4_input: DHCP packet accepted.\n"));
        netif = inp;
 8024c2e:	683b      	ldr	r3, [r7, #0]
 8024c30:	61fb      	str	r3, [r7, #28]
        check_ip_src = 0;
 8024c32:	2300      	movs	r3, #0
 8024c34:	617b      	str	r3, [r7, #20]
  }
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */

  /* broadcast or multicast packet source address? Compliant with RFC 1122: 3.2.1.3 */
#if LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING
  if (check_ip_src
 8024c36:	697b      	ldr	r3, [r7, #20]
 8024c38:	2b00      	cmp	r3, #0
 8024c3a:	d017      	beq.n	8024c6c <ip4_input+0x178>
#if IP_ACCEPT_LINK_LAYER_ADDRESSING
      /* DHCP servers need 0.0.0.0 to be allowed as source address (RFC 1.1.2.2: 3.2.1.3/a) */
      && !ip4_addr_isany_val(*ip4_current_src_addr())
 8024c3c:	4b4d      	ldr	r3, [pc, #308]	@ (8024d74 <ip4_input+0x280>)
 8024c3e:	691b      	ldr	r3, [r3, #16]
 8024c40:	2b00      	cmp	r3, #0
 8024c42:	d013      	beq.n	8024c6c <ip4_input+0x178>
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */
     )
#endif /* LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING */
  {
    if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) ||
 8024c44:	4b4b      	ldr	r3, [pc, #300]	@ (8024d74 <ip4_input+0x280>)
 8024c46:	691b      	ldr	r3, [r3, #16]
 8024c48:	6839      	ldr	r1, [r7, #0]
 8024c4a:	4618      	mov	r0, r3
 8024c4c:	f000 f970 	bl	8024f30 <ip4_addr_isbroadcast_u32>
 8024c50:	4603      	mov	r3, r0
 8024c52:	2b00      	cmp	r3, #0
 8024c54:	d105      	bne.n	8024c62 <ip4_input+0x16e>
        (ip4_addr_ismulticast(ip4_current_src_addr()))) {
 8024c56:	4b47      	ldr	r3, [pc, #284]	@ (8024d74 <ip4_input+0x280>)
 8024c58:	691b      	ldr	r3, [r3, #16]
 8024c5a:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
    if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) ||
 8024c5e:	2be0      	cmp	r3, #224	@ 0xe0
 8024c60:	d104      	bne.n	8024c6c <ip4_input+0x178>
      /* packet source is not valid */
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("ip4_input: packet source is not valid.\n"));
      /* free (drop) packet pbufs */
      pbuf_free(p);
 8024c62:	6878      	ldr	r0, [r7, #4]
 8024c64:	f7f5 fc42 	bl	801a4ec <pbuf_free>
      IP_STATS_INC(ip.drop);
      MIB2_STATS_INC(mib2.ipinaddrerrors);
      MIB2_STATS_INC(mib2.ipindiscards);
      return ERR_OK;
 8024c68:	2300      	movs	r3, #0
 8024c6a:	e07e      	b.n	8024d6a <ip4_input+0x276>
    }
  }

  /* packet not for us? */
  if (netif == NULL) {
 8024c6c:	69fb      	ldr	r3, [r7, #28]
 8024c6e:	2b00      	cmp	r3, #0
 8024c70:	d104      	bne.n	8024c7c <ip4_input+0x188>
    {
      IP_STATS_INC(ip.drop);
      MIB2_STATS_INC(mib2.ipinaddrerrors);
      MIB2_STATS_INC(mib2.ipindiscards);
    }
    pbuf_free(p);
 8024c72:	6878      	ldr	r0, [r7, #4]
 8024c74:	f7f5 fc3a 	bl	801a4ec <pbuf_free>
    return ERR_OK;
 8024c78:	2300      	movs	r3, #0
 8024c7a:	e076      	b.n	8024d6a <ip4_input+0x276>
  }
  /* packet consists of multiple fragments? */
  if ((IPH_OFFSET(iphdr) & PP_HTONS(IP_OFFMASK | IP_MF)) != 0) {
 8024c7c:	693b      	ldr	r3, [r7, #16]
 8024c7e:	88db      	ldrh	r3, [r3, #6]
 8024c80:	b29b      	uxth	r3, r3
 8024c82:	461a      	mov	r2, r3
 8024c84:	f64f 733f 	movw	r3, #65343	@ 0xff3f
 8024c88:	4013      	ands	r3, r2
 8024c8a:	2b00      	cmp	r3, #0
 8024c8c:	d00b      	beq.n	8024ca6 <ip4_input+0x1b2>
#if IP_REASSEMBLY /* packet fragment reassembly code present? */
    LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip4_reass()\n",
                           lwip_ntohs(IPH_ID(iphdr)), p->tot_len, lwip_ntohs(IPH_LEN(iphdr)), (u16_t)!!(IPH_OFFSET(iphdr) & PP_HTONS(IP_MF)), (u16_t)((lwip_ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK) * 8)));
    /* reassemble the packet*/
    p = ip4_reass(p);
 8024c8e:	6878      	ldr	r0, [r7, #4]
 8024c90:	f000 fe62 	bl	8025958 <ip4_reass>
 8024c94:	6078      	str	r0, [r7, #4]
    /* packet not fully reassembled yet? */
    if (p == NULL) {
 8024c96:	687b      	ldr	r3, [r7, #4]
 8024c98:	2b00      	cmp	r3, #0
 8024c9a:	d101      	bne.n	8024ca0 <ip4_input+0x1ac>
      return ERR_OK;
 8024c9c:	2300      	movs	r3, #0
 8024c9e:	e064      	b.n	8024d6a <ip4_input+0x276>
    }
    iphdr = (const struct ip_hdr *)p->payload;
 8024ca0:	687b      	ldr	r3, [r7, #4]
 8024ca2:	685b      	ldr	r3, [r3, #4]
 8024ca4:	613b      	str	r3, [r7, #16]
  /* send to upper layers */
  LWIP_DEBUGF(IP_DEBUG, ("ip4_input: \n"));
  ip4_debug_print(p);
  LWIP_DEBUGF(IP_DEBUG, ("ip4_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len));

  ip_data.current_netif = netif;
 8024ca6:	4a33      	ldr	r2, [pc, #204]	@ (8024d74 <ip4_input+0x280>)
 8024ca8:	69fb      	ldr	r3, [r7, #28]
 8024caa:	6013      	str	r3, [r2, #0]
  ip_data.current_input_netif = inp;
 8024cac:	4a31      	ldr	r2, [pc, #196]	@ (8024d74 <ip4_input+0x280>)
 8024cae:	683b      	ldr	r3, [r7, #0]
 8024cb0:	6053      	str	r3, [r2, #4]
  ip_data.current_ip4_header = iphdr;
 8024cb2:	4a30      	ldr	r2, [pc, #192]	@ (8024d74 <ip4_input+0x280>)
 8024cb4:	693b      	ldr	r3, [r7, #16]
 8024cb6:	6093      	str	r3, [r2, #8]
  ip_data.current_ip_header_tot_len = IPH_HL_BYTES(iphdr);
 8024cb8:	693b      	ldr	r3, [r7, #16]
 8024cba:	781b      	ldrb	r3, [r3, #0]
 8024cbc:	f003 030f 	and.w	r3, r3, #15
 8024cc0:	b2db      	uxtb	r3, r3
 8024cc2:	009b      	lsls	r3, r3, #2
 8024cc4:	b2db      	uxtb	r3, r3
 8024cc6:	461a      	mov	r2, r3
 8024cc8:	4b2a      	ldr	r3, [pc, #168]	@ (8024d74 <ip4_input+0x280>)
 8024cca:	819a      	strh	r2, [r3, #12]
  /* raw input did not eat the packet? */
  raw_status = raw_input(p, inp);
  if (raw_status != RAW_INPUT_EATEN)
#endif /* LWIP_RAW */
  {
    pbuf_remove_header(p, iphdr_hlen); /* Move to payload, no check necessary. */
 8024ccc:	89fb      	ldrh	r3, [r7, #14]
 8024cce:	4619      	mov	r1, r3
 8024cd0:	6878      	ldr	r0, [r7, #4]
 8024cd2:	f7f5 fb53 	bl	801a37c <pbuf_remove_header>

    switch (IPH_PROTO(iphdr)) {
 8024cd6:	693b      	ldr	r3, [r7, #16]
 8024cd8:	7a5b      	ldrb	r3, [r3, #9]
 8024cda:	2b11      	cmp	r3, #17
 8024cdc:	d006      	beq.n	8024cec <ip4_input+0x1f8>
 8024cde:	2b11      	cmp	r3, #17
 8024ce0:	dc13      	bgt.n	8024d0a <ip4_input+0x216>
 8024ce2:	2b01      	cmp	r3, #1
 8024ce4:	d00c      	beq.n	8024d00 <ip4_input+0x20c>
 8024ce6:	2b06      	cmp	r3, #6
 8024ce8:	d005      	beq.n	8024cf6 <ip4_input+0x202>
 8024cea:	e00e      	b.n	8024d0a <ip4_input+0x216>
      case IP_PROTO_UDP:
#if LWIP_UDPLITE
      case IP_PROTO_UDPLITE:
#endif /* LWIP_UDPLITE */
        MIB2_STATS_INC(mib2.ipindelivers);
        udp_input(p, inp);
 8024cec:	6839      	ldr	r1, [r7, #0]
 8024cee:	6878      	ldr	r0, [r7, #4]
 8024cf0:	f7fc f99c 	bl	802102c <udp_input>
        break;
 8024cf4:	e026      	b.n	8024d44 <ip4_input+0x250>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case IP_PROTO_TCP:
        MIB2_STATS_INC(mib2.ipindelivers);
        tcp_input(p, inp);
 8024cf6:	6839      	ldr	r1, [r7, #0]
 8024cf8:	6878      	ldr	r0, [r7, #4]
 8024cfa:	f7f7 fcdd 	bl	801c6b8 <tcp_input>
        break;
 8024cfe:	e021      	b.n	8024d44 <ip4_input+0x250>
#endif /* LWIP_TCP */
#if LWIP_ICMP
      case IP_PROTO_ICMP:
        MIB2_STATS_INC(mib2.ipindelivers);
        icmp_input(p, inp);
 8024d00:	6839      	ldr	r1, [r7, #0]
 8024d02:	6878      	ldr	r0, [r7, #4]
 8024d04:	f7ff fca4 	bl	8024650 <icmp_input>
        break;
 8024d08:	e01c      	b.n	8024d44 <ip4_input+0x250>
        } else
#endif /* LWIP_RAW */
        {
#if LWIP_ICMP
          /* send ICMP destination protocol unreachable unless is was a broadcast */
          if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) &&
 8024d0a:	4b1a      	ldr	r3, [pc, #104]	@ (8024d74 <ip4_input+0x280>)
 8024d0c:	695b      	ldr	r3, [r3, #20]
 8024d0e:	69f9      	ldr	r1, [r7, #28]
 8024d10:	4618      	mov	r0, r3
 8024d12:	f000 f90d 	bl	8024f30 <ip4_addr_isbroadcast_u32>
 8024d16:	4603      	mov	r3, r0
 8024d18:	2b00      	cmp	r3, #0
 8024d1a:	d10f      	bne.n	8024d3c <ip4_input+0x248>
              !ip4_addr_ismulticast(ip4_current_dest_addr())) {
 8024d1c:	4b15      	ldr	r3, [pc, #84]	@ (8024d74 <ip4_input+0x280>)
 8024d1e:	695b      	ldr	r3, [r3, #20]
 8024d20:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
          if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) &&
 8024d24:	2be0      	cmp	r3, #224	@ 0xe0
 8024d26:	d009      	beq.n	8024d3c <ip4_input+0x248>
            pbuf_header_force(p, (s16_t)iphdr_hlen); /* Move to ip header, no check necessary. */
 8024d28:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
 8024d2c:	4619      	mov	r1, r3
 8024d2e:	6878      	ldr	r0, [r7, #4]
 8024d30:	f7f5 fb97 	bl	801a462 <pbuf_header_force>
            icmp_dest_unreach(p, ICMP_DUR_PROTO);
 8024d34:	2102      	movs	r1, #2
 8024d36:	6878      	ldr	r0, [r7, #4]
 8024d38:	f7ff fdae 	bl	8024898 <icmp_dest_unreach>

          IP_STATS_INC(ip.proterr);
          IP_STATS_INC(ip.drop);
          MIB2_STATS_INC(mib2.ipinunknownprotos);
        }
        pbuf_free(p);
 8024d3c:	6878      	ldr	r0, [r7, #4]
 8024d3e:	f7f5 fbd5 	bl	801a4ec <pbuf_free>
        break;
 8024d42:	bf00      	nop
    }
  }

  /* @todo: this is not really necessary... */
  ip_data.current_netif = NULL;
 8024d44:	4b0b      	ldr	r3, [pc, #44]	@ (8024d74 <ip4_input+0x280>)
 8024d46:	2200      	movs	r2, #0
 8024d48:	601a      	str	r2, [r3, #0]
  ip_data.current_input_netif = NULL;
 8024d4a:	4b0a      	ldr	r3, [pc, #40]	@ (8024d74 <ip4_input+0x280>)
 8024d4c:	2200      	movs	r2, #0
 8024d4e:	605a      	str	r2, [r3, #4]
  ip_data.current_ip4_header = NULL;
 8024d50:	4b08      	ldr	r3, [pc, #32]	@ (8024d74 <ip4_input+0x280>)
 8024d52:	2200      	movs	r2, #0
 8024d54:	609a      	str	r2, [r3, #8]
  ip_data.current_ip_header_tot_len = 0;
 8024d56:	4b07      	ldr	r3, [pc, #28]	@ (8024d74 <ip4_input+0x280>)
 8024d58:	2200      	movs	r2, #0
 8024d5a:	819a      	strh	r2, [r3, #12]
  ip4_addr_set_any(ip4_current_src_addr());
 8024d5c:	4b05      	ldr	r3, [pc, #20]	@ (8024d74 <ip4_input+0x280>)
 8024d5e:	2200      	movs	r2, #0
 8024d60:	611a      	str	r2, [r3, #16]
  ip4_addr_set_any(ip4_current_dest_addr());
 8024d62:	4b04      	ldr	r3, [pc, #16]	@ (8024d74 <ip4_input+0x280>)
 8024d64:	2200      	movs	r2, #0
 8024d66:	615a      	str	r2, [r3, #20]

  return ERR_OK;
 8024d68:	2300      	movs	r3, #0
}
 8024d6a:	4618      	mov	r0, r3
 8024d6c:	3720      	adds	r7, #32
 8024d6e:	46bd      	mov	sp, r7
 8024d70:	bd80      	pop	{r7, pc}
 8024d72:	bf00      	nop
 8024d74:	24024338 	.word	0x24024338
 8024d78:	2402ae7c 	.word	0x2402ae7c

08024d7c <ip4_output_if>:
 */
err_t
ip4_output_if(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
              u8_t ttl, u8_t tos,
              u8_t proto, struct netif *netif)
{
 8024d7c:	b580      	push	{r7, lr}
 8024d7e:	b08a      	sub	sp, #40	@ 0x28
 8024d80:	af04      	add	r7, sp, #16
 8024d82:	60f8      	str	r0, [r7, #12]
 8024d84:	60b9      	str	r1, [r7, #8]
 8024d86:	607a      	str	r2, [r7, #4]
 8024d88:	70fb      	strb	r3, [r7, #3]
ip4_output_if_opt(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
                  u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options,
                  u16_t optlen)
{
#endif /* IP_OPTIONS_SEND */
  const ip4_addr_t *src_used = src;
 8024d8a:	68bb      	ldr	r3, [r7, #8]
 8024d8c:	617b      	str	r3, [r7, #20]
  if (dest != LWIP_IP_HDRINCL) {
 8024d8e:	687b      	ldr	r3, [r7, #4]
 8024d90:	2b00      	cmp	r3, #0
 8024d92:	d009      	beq.n	8024da8 <ip4_output_if+0x2c>
    if (ip4_addr_isany(src)) {
 8024d94:	68bb      	ldr	r3, [r7, #8]
 8024d96:	2b00      	cmp	r3, #0
 8024d98:	d003      	beq.n	8024da2 <ip4_output_if+0x26>
 8024d9a:	68bb      	ldr	r3, [r7, #8]
 8024d9c:	681b      	ldr	r3, [r3, #0]
 8024d9e:	2b00      	cmp	r3, #0
 8024da0:	d102      	bne.n	8024da8 <ip4_output_if+0x2c>
      src_used = netif_ip4_addr(netif);
 8024da2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8024da4:	3304      	adds	r3, #4
 8024da6:	617b      	str	r3, [r7, #20]

#if IP_OPTIONS_SEND
  return ip4_output_if_opt_src(p, src_used, dest, ttl, tos, proto, netif,
                               ip_options, optlen);
#else /* IP_OPTIONS_SEND */
  return ip4_output_if_src(p, src_used, dest, ttl, tos, proto, netif);
 8024da8:	78fa      	ldrb	r2, [r7, #3]
 8024daa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8024dac:	9302      	str	r3, [sp, #8]
 8024dae:	f897 3024 	ldrb.w	r3, [r7, #36]	@ 0x24
 8024db2:	9301      	str	r3, [sp, #4]
 8024db4:	f897 3020 	ldrb.w	r3, [r7, #32]
 8024db8:	9300      	str	r3, [sp, #0]
 8024dba:	4613      	mov	r3, r2
 8024dbc:	687a      	ldr	r2, [r7, #4]
 8024dbe:	6979      	ldr	r1, [r7, #20]
 8024dc0:	68f8      	ldr	r0, [r7, #12]
 8024dc2:	f000 f805 	bl	8024dd0 <ip4_output_if_src>
 8024dc6:	4603      	mov	r3, r0
#endif /* IP_OPTIONS_SEND */
}
 8024dc8:	4618      	mov	r0, r3
 8024dca:	3718      	adds	r7, #24
 8024dcc:	46bd      	mov	sp, r7
 8024dce:	bd80      	pop	{r7, pc}

08024dd0 <ip4_output_if_src>:
 */
err_t
ip4_output_if_src(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
                  u8_t ttl, u8_t tos,
                  u8_t proto, struct netif *netif)
{
 8024dd0:	b580      	push	{r7, lr}
 8024dd2:	b088      	sub	sp, #32
 8024dd4:	af00      	add	r7, sp, #0
 8024dd6:	60f8      	str	r0, [r7, #12]
 8024dd8:	60b9      	str	r1, [r7, #8]
 8024dda:	607a      	str	r2, [r7, #4]
 8024ddc:	70fb      	strb	r3, [r7, #3]
  ip4_addr_t dest_addr;
#if CHECKSUM_GEN_IP_INLINE
  u32_t chk_sum = 0;
#endif /* CHECKSUM_GEN_IP_INLINE */

  LWIP_ASSERT_CORE_LOCKED();
 8024dde:	f7eb fbb1 	bl	8010544 <sys_check_core_locking>
  LWIP_IP_CHECK_PBUF_REF_COUNT_FOR_TX(p);
 8024de2:	68fb      	ldr	r3, [r7, #12]
 8024de4:	7b9b      	ldrb	r3, [r3, #14]
 8024de6:	2b01      	cmp	r3, #1
 8024de8:	d006      	beq.n	8024df8 <ip4_output_if_src+0x28>
 8024dea:	4b4b      	ldr	r3, [pc, #300]	@ (8024f18 <ip4_output_if_src+0x148>)
 8024dec:	f44f 7255 	mov.w	r2, #852	@ 0x354
 8024df0:	494a      	ldr	r1, [pc, #296]	@ (8024f1c <ip4_output_if_src+0x14c>)
 8024df2:	484b      	ldr	r0, [pc, #300]	@ (8024f20 <ip4_output_if_src+0x150>)
 8024df4:	f004 fdf2 	bl	80299dc <iprintf>

  MIB2_STATS_INC(mib2.ipoutrequests);

  /* Should the IP header be generated or is it already included in p? */
  if (dest != LWIP_IP_HDRINCL) {
 8024df8:	687b      	ldr	r3, [r7, #4]
 8024dfa:	2b00      	cmp	r3, #0
 8024dfc:	d060      	beq.n	8024ec0 <ip4_output_if_src+0xf0>
    u16_t ip_hlen = IP_HLEN;
 8024dfe:	2314      	movs	r3, #20
 8024e00:	837b      	strh	r3, [r7, #26]
      }
#endif /* CHECKSUM_GEN_IP_INLINE */
    }
#endif /* IP_OPTIONS_SEND */
    /* generate IP header */
    if (pbuf_add_header(p, IP_HLEN)) {
 8024e02:	2114      	movs	r1, #20
 8024e04:	68f8      	ldr	r0, [r7, #12]
 8024e06:	f7f5 faa9 	bl	801a35c <pbuf_add_header>
 8024e0a:	4603      	mov	r3, r0
 8024e0c:	2b00      	cmp	r3, #0
 8024e0e:	d002      	beq.n	8024e16 <ip4_output_if_src+0x46>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: not enough room for IP header in pbuf\n"));

      IP_STATS_INC(ip.err);
      MIB2_STATS_INC(mib2.ipoutdiscards);
      return ERR_BUF;
 8024e10:	f06f 0301 	mvn.w	r3, #1
 8024e14:	e07c      	b.n	8024f10 <ip4_output_if_src+0x140>
    }

    iphdr = (struct ip_hdr *)p->payload;
 8024e16:	68fb      	ldr	r3, [r7, #12]
 8024e18:	685b      	ldr	r3, [r3, #4]
 8024e1a:	61fb      	str	r3, [r7, #28]
    LWIP_ASSERT("check that first pbuf can hold struct ip_hdr",
 8024e1c:	68fb      	ldr	r3, [r7, #12]
 8024e1e:	895b      	ldrh	r3, [r3, #10]
 8024e20:	2b13      	cmp	r3, #19
 8024e22:	d806      	bhi.n	8024e32 <ip4_output_if_src+0x62>
 8024e24:	4b3c      	ldr	r3, [pc, #240]	@ (8024f18 <ip4_output_if_src+0x148>)
 8024e26:	f44f 7262 	mov.w	r2, #904	@ 0x388
 8024e2a:	493e      	ldr	r1, [pc, #248]	@ (8024f24 <ip4_output_if_src+0x154>)
 8024e2c:	483c      	ldr	r0, [pc, #240]	@ (8024f20 <ip4_output_if_src+0x150>)
 8024e2e:	f004 fdd5 	bl	80299dc <iprintf>
                (p->len >= sizeof(struct ip_hdr)));

    IPH_TTL_SET(iphdr, ttl);
 8024e32:	69fb      	ldr	r3, [r7, #28]
 8024e34:	78fa      	ldrb	r2, [r7, #3]
 8024e36:	721a      	strb	r2, [r3, #8]
    IPH_PROTO_SET(iphdr, proto);
 8024e38:	69fb      	ldr	r3, [r7, #28]
 8024e3a:	f897 202c 	ldrb.w	r2, [r7, #44]	@ 0x2c
 8024e3e:	725a      	strb	r2, [r3, #9]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += PP_NTOHS(proto | (ttl << 8));
#endif /* CHECKSUM_GEN_IP_INLINE */

    /* dest cannot be NULL here */
    ip4_addr_copy(iphdr->dest, *dest);
 8024e40:	687b      	ldr	r3, [r7, #4]
 8024e42:	681a      	ldr	r2, [r3, #0]
 8024e44:	69fb      	ldr	r3, [r7, #28]
 8024e46:	611a      	str	r2, [r3, #16]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += ip4_addr_get_u32(&iphdr->dest) & 0xFFFF;
    chk_sum += ip4_addr_get_u32(&iphdr->dest) >> 16;
#endif /* CHECKSUM_GEN_IP_INLINE */

    IPH_VHL_SET(iphdr, 4, ip_hlen / 4);
 8024e48:	8b7b      	ldrh	r3, [r7, #26]
 8024e4a:	089b      	lsrs	r3, r3, #2
 8024e4c:	b29b      	uxth	r3, r3
 8024e4e:	b2db      	uxtb	r3, r3
 8024e50:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 8024e54:	b2da      	uxtb	r2, r3
 8024e56:	69fb      	ldr	r3, [r7, #28]
 8024e58:	701a      	strb	r2, [r3, #0]
    IPH_TOS_SET(iphdr, tos);
 8024e5a:	69fb      	ldr	r3, [r7, #28]
 8024e5c:	f897 2028 	ldrb.w	r2, [r7, #40]	@ 0x28
 8024e60:	705a      	strb	r2, [r3, #1]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += PP_NTOHS(tos | (iphdr->_v_hl << 8));
#endif /* CHECKSUM_GEN_IP_INLINE */
    IPH_LEN_SET(iphdr, lwip_htons(p->tot_len));
 8024e62:	68fb      	ldr	r3, [r7, #12]
 8024e64:	891b      	ldrh	r3, [r3, #8]
 8024e66:	4618      	mov	r0, r3
 8024e68:	f7f3 fe5e 	bl	8018b28 <lwip_htons>
 8024e6c:	4603      	mov	r3, r0
 8024e6e:	461a      	mov	r2, r3
 8024e70:	69fb      	ldr	r3, [r7, #28]
 8024e72:	805a      	strh	r2, [r3, #2]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += iphdr->_len;
#endif /* CHECKSUM_GEN_IP_INLINE */
    IPH_OFFSET_SET(iphdr, 0);
 8024e74:	69fb      	ldr	r3, [r7, #28]
 8024e76:	2200      	movs	r2, #0
 8024e78:	719a      	strb	r2, [r3, #6]
 8024e7a:	2200      	movs	r2, #0
 8024e7c:	71da      	strb	r2, [r3, #7]
    IPH_ID_SET(iphdr, lwip_htons(ip_id));
 8024e7e:	4b2a      	ldr	r3, [pc, #168]	@ (8024f28 <ip4_output_if_src+0x158>)
 8024e80:	881b      	ldrh	r3, [r3, #0]
 8024e82:	4618      	mov	r0, r3
 8024e84:	f7f3 fe50 	bl	8018b28 <lwip_htons>
 8024e88:	4603      	mov	r3, r0
 8024e8a:	461a      	mov	r2, r3
 8024e8c:	69fb      	ldr	r3, [r7, #28]
 8024e8e:	809a      	strh	r2, [r3, #4]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += iphdr->_id;
#endif /* CHECKSUM_GEN_IP_INLINE */
    ++ip_id;
 8024e90:	4b25      	ldr	r3, [pc, #148]	@ (8024f28 <ip4_output_if_src+0x158>)
 8024e92:	881b      	ldrh	r3, [r3, #0]
 8024e94:	3301      	adds	r3, #1
 8024e96:	b29a      	uxth	r2, r3
 8024e98:	4b23      	ldr	r3, [pc, #140]	@ (8024f28 <ip4_output_if_src+0x158>)
 8024e9a:	801a      	strh	r2, [r3, #0]

    if (src == NULL) {
 8024e9c:	68bb      	ldr	r3, [r7, #8]
 8024e9e:	2b00      	cmp	r3, #0
 8024ea0:	d104      	bne.n	8024eac <ip4_output_if_src+0xdc>
      ip4_addr_copy(iphdr->src, *IP4_ADDR_ANY4);
 8024ea2:	4b22      	ldr	r3, [pc, #136]	@ (8024f2c <ip4_output_if_src+0x15c>)
 8024ea4:	681a      	ldr	r2, [r3, #0]
 8024ea6:	69fb      	ldr	r3, [r7, #28]
 8024ea8:	60da      	str	r2, [r3, #12]
 8024eaa:	e003      	b.n	8024eb4 <ip4_output_if_src+0xe4>
    } else {
      /* src cannot be NULL here */
      ip4_addr_copy(iphdr->src, *src);
 8024eac:	68bb      	ldr	r3, [r7, #8]
 8024eae:	681a      	ldr	r2, [r3, #0]
 8024eb0:	69fb      	ldr	r3, [r7, #28]
 8024eb2:	60da      	str	r2, [r3, #12]
    else {
      IPH_CHKSUM_SET(iphdr, 0);
    }
#endif /* LWIP_CHECKSUM_CTRL_PER_NETIF*/
#else /* CHECKSUM_GEN_IP_INLINE */
    IPH_CHKSUM_SET(iphdr, 0);
 8024eb4:	69fb      	ldr	r3, [r7, #28]
 8024eb6:	2200      	movs	r2, #0
 8024eb8:	729a      	strb	r2, [r3, #10]
 8024eba:	2200      	movs	r2, #0
 8024ebc:	72da      	strb	r2, [r3, #11]
 8024ebe:	e00f      	b.n	8024ee0 <ip4_output_if_src+0x110>
    }
#endif /* CHECKSUM_GEN_IP */
#endif /* CHECKSUM_GEN_IP_INLINE */
  } else {
    /* IP header already included in p */
    if (p->len < IP_HLEN) {
 8024ec0:	68fb      	ldr	r3, [r7, #12]
 8024ec2:	895b      	ldrh	r3, [r3, #10]
 8024ec4:	2b13      	cmp	r3, #19
 8024ec6:	d802      	bhi.n	8024ece <ip4_output_if_src+0xfe>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: LWIP_IP_HDRINCL but pbuf is too short\n"));
      IP_STATS_INC(ip.err);
      MIB2_STATS_INC(mib2.ipoutdiscards);
      return ERR_BUF;
 8024ec8:	f06f 0301 	mvn.w	r3, #1
 8024ecc:	e020      	b.n	8024f10 <ip4_output_if_src+0x140>
    }
    iphdr = (struct ip_hdr *)p->payload;
 8024ece:	68fb      	ldr	r3, [r7, #12]
 8024ed0:	685b      	ldr	r3, [r3, #4]
 8024ed2:	61fb      	str	r3, [r7, #28]
    ip4_addr_copy(dest_addr, iphdr->dest);
 8024ed4:	69fb      	ldr	r3, [r7, #28]
 8024ed6:	691b      	ldr	r3, [r3, #16]
 8024ed8:	617b      	str	r3, [r7, #20]
    dest = &dest_addr;
 8024eda:	f107 0314 	add.w	r3, r7, #20
 8024ede:	607b      	str	r3, [r7, #4]
  }
#endif /* LWIP_MULTICAST_TX_OPTIONS */
#endif /* ENABLE_LOOPBACK */
#if IP_FRAG
  /* don't fragment if interface has mtu set to 0 [loopif] */
  if (netif->mtu && (p->tot_len > netif->mtu)) {
 8024ee0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8024ee2:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8024ee4:	2b00      	cmp	r3, #0
 8024ee6:	d00c      	beq.n	8024f02 <ip4_output_if_src+0x132>
 8024ee8:	68fb      	ldr	r3, [r7, #12]
 8024eea:	891a      	ldrh	r2, [r3, #8]
 8024eec:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8024eee:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8024ef0:	429a      	cmp	r2, r3
 8024ef2:	d906      	bls.n	8024f02 <ip4_output_if_src+0x132>
    return ip4_frag(p, netif, dest);
 8024ef4:	687a      	ldr	r2, [r7, #4]
 8024ef6:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 8024ef8:	68f8      	ldr	r0, [r7, #12]
 8024efa:	f000 ff21 	bl	8025d40 <ip4_frag>
 8024efe:	4603      	mov	r3, r0
 8024f00:	e006      	b.n	8024f10 <ip4_output_if_src+0x140>
  }
#endif /* IP_FRAG */

  LWIP_DEBUGF(IP_DEBUG, ("ip4_output_if: call netif->output()\n"));
  return netif->output(netif, p, dest);
 8024f02:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8024f04:	695b      	ldr	r3, [r3, #20]
 8024f06:	687a      	ldr	r2, [r7, #4]
 8024f08:	68f9      	ldr	r1, [r7, #12]
 8024f0a:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8024f0c:	4798      	blx	r3
 8024f0e:	4603      	mov	r3, r0
}
 8024f10:	4618      	mov	r0, r3
 8024f12:	3720      	adds	r7, #32
 8024f14:	46bd      	mov	sp, r7
 8024f16:	bd80      	pop	{r7, pc}
 8024f18:	080305ac 	.word	0x080305ac
 8024f1c:	080305e0 	.word	0x080305e0
 8024f20:	080305ec 	.word	0x080305ec
 8024f24:	08030614 	.word	0x08030614
 8024f28:	2402b012 	.word	0x2402b012
 8024f2c:	08030c68 	.word	0x08030c68

08024f30 <ip4_addr_isbroadcast_u32>:
 * @param netif the network interface against which the address is checked
 * @return returns non-zero if the address is a broadcast address
 */
u8_t
ip4_addr_isbroadcast_u32(u32_t addr, const struct netif *netif)
{
 8024f30:	b480      	push	{r7}
 8024f32:	b085      	sub	sp, #20
 8024f34:	af00      	add	r7, sp, #0
 8024f36:	6078      	str	r0, [r7, #4]
 8024f38:	6039      	str	r1, [r7, #0]
  ip4_addr_t ipaddr;
  ip4_addr_set_u32(&ipaddr, addr);
 8024f3a:	687b      	ldr	r3, [r7, #4]
 8024f3c:	60fb      	str	r3, [r7, #12]

  /* all ones (broadcast) or all zeroes (old skool broadcast) */
  if ((~addr == IPADDR_ANY) ||
 8024f3e:	687b      	ldr	r3, [r7, #4]
 8024f40:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8024f44:	d002      	beq.n	8024f4c <ip4_addr_isbroadcast_u32+0x1c>
 8024f46:	687b      	ldr	r3, [r7, #4]
 8024f48:	2b00      	cmp	r3, #0
 8024f4a:	d101      	bne.n	8024f50 <ip4_addr_isbroadcast_u32+0x20>
      (addr == IPADDR_ANY)) {
    return 1;
 8024f4c:	2301      	movs	r3, #1
 8024f4e:	e02a      	b.n	8024fa6 <ip4_addr_isbroadcast_u32+0x76>
    /* no broadcast support on this network interface? */
  } else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0) {
 8024f50:	683b      	ldr	r3, [r7, #0]
 8024f52:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8024f56:	f003 0302 	and.w	r3, r3, #2
 8024f5a:	2b00      	cmp	r3, #0
 8024f5c:	d101      	bne.n	8024f62 <ip4_addr_isbroadcast_u32+0x32>
    /* the given address cannot be a broadcast address
     * nor can we check against any broadcast addresses */
    return 0;
 8024f5e:	2300      	movs	r3, #0
 8024f60:	e021      	b.n	8024fa6 <ip4_addr_isbroadcast_u32+0x76>
    /* address matches network interface address exactly? => no broadcast */
  } else if (addr == ip4_addr_get_u32(netif_ip4_addr(netif))) {
 8024f62:	683b      	ldr	r3, [r7, #0]
 8024f64:	3304      	adds	r3, #4
 8024f66:	681b      	ldr	r3, [r3, #0]
 8024f68:	687a      	ldr	r2, [r7, #4]
 8024f6a:	429a      	cmp	r2, r3
 8024f6c:	d101      	bne.n	8024f72 <ip4_addr_isbroadcast_u32+0x42>
    return 0;
 8024f6e:	2300      	movs	r3, #0
 8024f70:	e019      	b.n	8024fa6 <ip4_addr_isbroadcast_u32+0x76>
    /*  on the same (sub) network... */
  } else if (ip4_addr_netcmp(&ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif))
 8024f72:	68fa      	ldr	r2, [r7, #12]
 8024f74:	683b      	ldr	r3, [r7, #0]
 8024f76:	3304      	adds	r3, #4
 8024f78:	681b      	ldr	r3, [r3, #0]
 8024f7a:	405a      	eors	r2, r3
 8024f7c:	683b      	ldr	r3, [r7, #0]
 8024f7e:	3308      	adds	r3, #8
 8024f80:	681b      	ldr	r3, [r3, #0]
 8024f82:	4013      	ands	r3, r2
 8024f84:	2b00      	cmp	r3, #0
 8024f86:	d10d      	bne.n	8024fa4 <ip4_addr_isbroadcast_u32+0x74>
             /* ...and host identifier bits are all ones? =>... */
             && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) ==
 8024f88:	683b      	ldr	r3, [r7, #0]
 8024f8a:	3308      	adds	r3, #8
 8024f8c:	681b      	ldr	r3, [r3, #0]
 8024f8e:	43da      	mvns	r2, r3
 8024f90:	687b      	ldr	r3, [r7, #4]
 8024f92:	401a      	ands	r2, r3
                 (IPADDR_BROADCAST & ~ip4_addr_get_u32(netif_ip4_netmask(netif))))) {
 8024f94:	683b      	ldr	r3, [r7, #0]
 8024f96:	3308      	adds	r3, #8
 8024f98:	681b      	ldr	r3, [r3, #0]
 8024f9a:	43db      	mvns	r3, r3
             && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) ==
 8024f9c:	429a      	cmp	r2, r3
 8024f9e:	d101      	bne.n	8024fa4 <ip4_addr_isbroadcast_u32+0x74>
    /* => network broadcast address */
    return 1;
 8024fa0:	2301      	movs	r3, #1
 8024fa2:	e000      	b.n	8024fa6 <ip4_addr_isbroadcast_u32+0x76>
  } else {
    return 0;
 8024fa4:	2300      	movs	r3, #0
  }
}
 8024fa6:	4618      	mov	r0, r3
 8024fa8:	3714      	adds	r7, #20
 8024faa:	46bd      	mov	sp, r7
 8024fac:	f85d 7b04 	ldr.w	r7, [sp], #4
 8024fb0:	4770      	bx	lr

08024fb2 <ipaddr_addr>:
 * @param cp IP address in ascii representation (e.g. "127.0.0.1")
 * @return ip address in network order
 */
u32_t
ipaddr_addr(const char *cp)
{
 8024fb2:	b580      	push	{r7, lr}
 8024fb4:	b084      	sub	sp, #16
 8024fb6:	af00      	add	r7, sp, #0
 8024fb8:	6078      	str	r0, [r7, #4]
  ip4_addr_t val;

  if (ip4addr_aton(cp, &val)) {
 8024fba:	f107 030c 	add.w	r3, r7, #12
 8024fbe:	4619      	mov	r1, r3
 8024fc0:	6878      	ldr	r0, [r7, #4]
 8024fc2:	f000 f80b 	bl	8024fdc <ip4addr_aton>
 8024fc6:	4603      	mov	r3, r0
 8024fc8:	2b00      	cmp	r3, #0
 8024fca:	d001      	beq.n	8024fd0 <ipaddr_addr+0x1e>
    return ip4_addr_get_u32(&val);
 8024fcc:	68fb      	ldr	r3, [r7, #12]
 8024fce:	e001      	b.n	8024fd4 <ipaddr_addr+0x22>
  }
  return (IPADDR_NONE);
 8024fd0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8024fd4:	4618      	mov	r0, r3
 8024fd6:	3710      	adds	r7, #16
 8024fd8:	46bd      	mov	sp, r7
 8024fda:	bd80      	pop	{r7, pc}

08024fdc <ip4addr_aton>:
 * @param addr pointer to which to save the ip address in network order
 * @return 1 if cp could be converted to addr, 0 on failure
 */
int
ip4addr_aton(const char *cp, ip4_addr_t *addr)
{
 8024fdc:	b580      	push	{r7, lr}
 8024fde:	b08a      	sub	sp, #40	@ 0x28
 8024fe0:	af00      	add	r7, sp, #0
 8024fe2:	6078      	str	r0, [r7, #4]
 8024fe4:	6039      	str	r1, [r7, #0]
  u32_t val;
  u8_t base;
  char c;
  u32_t parts[4];
  u32_t *pp = parts;
 8024fe6:	f107 030c 	add.w	r3, r7, #12
 8024fea:	61fb      	str	r3, [r7, #28]

  c = *cp;
 8024fec:	687b      	ldr	r3, [r7, #4]
 8024fee:	781b      	ldrb	r3, [r3, #0]
 8024ff0:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    /*
     * Collect number up to ``.''.
     * Values are specified as for C:
     * 0x=hex, 0=octal, 1-9=decimal.
     */
    if (!lwip_isdigit(c)) {
 8024ff4:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8024ff8:	3301      	adds	r3, #1
 8024ffa:	4a89      	ldr	r2, [pc, #548]	@ (8025220 <ip4addr_aton+0x244>)
 8024ffc:	4413      	add	r3, r2
 8024ffe:	781b      	ldrb	r3, [r3, #0]
 8025000:	f003 0304 	and.w	r3, r3, #4
 8025004:	2b00      	cmp	r3, #0
 8025006:	d101      	bne.n	802500c <ip4addr_aton+0x30>
      return 0;
 8025008:	2300      	movs	r3, #0
 802500a:	e105      	b.n	8025218 <ip4addr_aton+0x23c>
    }
    val = 0;
 802500c:	2300      	movs	r3, #0
 802500e:	627b      	str	r3, [r7, #36]	@ 0x24
    base = 10;
 8025010:	230a      	movs	r3, #10
 8025012:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    if (c == '0') {
 8025016:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 802501a:	2b30      	cmp	r3, #48	@ 0x30
 802501c:	d11c      	bne.n	8025058 <ip4addr_aton+0x7c>
      c = *++cp;
 802501e:	687b      	ldr	r3, [r7, #4]
 8025020:	3301      	adds	r3, #1
 8025022:	607b      	str	r3, [r7, #4]
 8025024:	687b      	ldr	r3, [r7, #4]
 8025026:	781b      	ldrb	r3, [r3, #0]
 8025028:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      if (c == 'x' || c == 'X') {
 802502c:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025030:	2b78      	cmp	r3, #120	@ 0x78
 8025032:	d003      	beq.n	802503c <ip4addr_aton+0x60>
 8025034:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025038:	2b58      	cmp	r3, #88	@ 0x58
 802503a:	d10a      	bne.n	8025052 <ip4addr_aton+0x76>
        base = 16;
 802503c:	2310      	movs	r3, #16
 802503e:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        c = *++cp;
 8025042:	687b      	ldr	r3, [r7, #4]
 8025044:	3301      	adds	r3, #1
 8025046:	607b      	str	r3, [r7, #4]
 8025048:	687b      	ldr	r3, [r7, #4]
 802504a:	781b      	ldrb	r3, [r3, #0]
 802504c:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8025050:	e002      	b.n	8025058 <ip4addr_aton+0x7c>
      } else {
        base = 8;
 8025052:	2308      	movs	r3, #8
 8025054:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
      }
    }
    for (;;) {
      if (lwip_isdigit(c)) {
 8025058:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 802505c:	3301      	adds	r3, #1
 802505e:	4a70      	ldr	r2, [pc, #448]	@ (8025220 <ip4addr_aton+0x244>)
 8025060:	4413      	add	r3, r2
 8025062:	781b      	ldrb	r3, [r3, #0]
 8025064:	f003 0304 	and.w	r3, r3, #4
 8025068:	2b00      	cmp	r3, #0
 802506a:	d011      	beq.n	8025090 <ip4addr_aton+0xb4>
        val = (val * base) + (u32_t)(c - '0');
 802506c:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8025070:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8025072:	fb03 f202 	mul.w	r2, r3, r2
 8025076:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 802507a:	4413      	add	r3, r2
 802507c:	3b30      	subs	r3, #48	@ 0x30
 802507e:	627b      	str	r3, [r7, #36]	@ 0x24
        c = *++cp;
 8025080:	687b      	ldr	r3, [r7, #4]
 8025082:	3301      	adds	r3, #1
 8025084:	607b      	str	r3, [r7, #4]
 8025086:	687b      	ldr	r3, [r7, #4]
 8025088:	781b      	ldrb	r3, [r3, #0]
 802508a:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 802508e:	e7e3      	b.n	8025058 <ip4addr_aton+0x7c>
      } else if (base == 16 && lwip_isxdigit(c)) {
 8025090:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8025094:	2b10      	cmp	r3, #16
 8025096:	d127      	bne.n	80250e8 <ip4addr_aton+0x10c>
 8025098:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 802509c:	3301      	adds	r3, #1
 802509e:	4a60      	ldr	r2, [pc, #384]	@ (8025220 <ip4addr_aton+0x244>)
 80250a0:	4413      	add	r3, r2
 80250a2:	781b      	ldrb	r3, [r3, #0]
 80250a4:	f003 0344 	and.w	r3, r3, #68	@ 0x44
 80250a8:	2b00      	cmp	r3, #0
 80250aa:	d01d      	beq.n	80250e8 <ip4addr_aton+0x10c>
        val = (val << 4) | (u32_t)(c + 10 - (lwip_islower(c) ? 'a' : 'A'));
 80250ac:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80250ae:	011b      	lsls	r3, r3, #4
 80250b0:	f897 2022 	ldrb.w	r2, [r7, #34]	@ 0x22
 80250b4:	f102 010a 	add.w	r1, r2, #10
 80250b8:	f897 2022 	ldrb.w	r2, [r7, #34]	@ 0x22
 80250bc:	3201      	adds	r2, #1
 80250be:	4858      	ldr	r0, [pc, #352]	@ (8025220 <ip4addr_aton+0x244>)
 80250c0:	4402      	add	r2, r0
 80250c2:	7812      	ldrb	r2, [r2, #0]
 80250c4:	f002 0203 	and.w	r2, r2, #3
 80250c8:	2a02      	cmp	r2, #2
 80250ca:	d101      	bne.n	80250d0 <ip4addr_aton+0xf4>
 80250cc:	2261      	movs	r2, #97	@ 0x61
 80250ce:	e000      	b.n	80250d2 <ip4addr_aton+0xf6>
 80250d0:	2241      	movs	r2, #65	@ 0x41
 80250d2:	1a8a      	subs	r2, r1, r2
 80250d4:	4313      	orrs	r3, r2
 80250d6:	627b      	str	r3, [r7, #36]	@ 0x24
        c = *++cp;
 80250d8:	687b      	ldr	r3, [r7, #4]
 80250da:	3301      	adds	r3, #1
 80250dc:	607b      	str	r3, [r7, #4]
 80250de:	687b      	ldr	r3, [r7, #4]
 80250e0:	781b      	ldrb	r3, [r3, #0]
 80250e2:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      if (lwip_isdigit(c)) {
 80250e6:	e7b7      	b.n	8025058 <ip4addr_aton+0x7c>
      } else {
        break;
      }
    }
    if (c == '.') {
 80250e8:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 80250ec:	2b2e      	cmp	r3, #46	@ 0x2e
 80250ee:	d114      	bne.n	802511a <ip4addr_aton+0x13e>
       * Internet format:
       *  a.b.c.d
       *  a.b.c   (with c treated as 16 bits)
       *  a.b (with b treated as 24 bits)
       */
      if (pp >= parts + 3) {
 80250f0:	f107 030c 	add.w	r3, r7, #12
 80250f4:	330c      	adds	r3, #12
 80250f6:	69fa      	ldr	r2, [r7, #28]
 80250f8:	429a      	cmp	r2, r3
 80250fa:	d301      	bcc.n	8025100 <ip4addr_aton+0x124>
        return 0;
 80250fc:	2300      	movs	r3, #0
 80250fe:	e08b      	b.n	8025218 <ip4addr_aton+0x23c>
      }
      *pp++ = val;
 8025100:	69fb      	ldr	r3, [r7, #28]
 8025102:	1d1a      	adds	r2, r3, #4
 8025104:	61fa      	str	r2, [r7, #28]
 8025106:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8025108:	601a      	str	r2, [r3, #0]
      c = *++cp;
 802510a:	687b      	ldr	r3, [r7, #4]
 802510c:	3301      	adds	r3, #1
 802510e:	607b      	str	r3, [r7, #4]
 8025110:	687b      	ldr	r3, [r7, #4]
 8025112:	781b      	ldrb	r3, [r3, #0]
 8025114:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    if (!lwip_isdigit(c)) {
 8025118:	e76c      	b.n	8024ff4 <ip4addr_aton+0x18>
    } else {
      break;
 802511a:	bf00      	nop
    }
  }
  /*
   * Check for trailing characters.
   */
  if (c != '\0' && !lwip_isspace(c)) {
 802511c:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025120:	2b00      	cmp	r3, #0
 8025122:	d00b      	beq.n	802513c <ip4addr_aton+0x160>
 8025124:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025128:	3301      	adds	r3, #1
 802512a:	4a3d      	ldr	r2, [pc, #244]	@ (8025220 <ip4addr_aton+0x244>)
 802512c:	4413      	add	r3, r2
 802512e:	781b      	ldrb	r3, [r3, #0]
 8025130:	f003 0308 	and.w	r3, r3, #8
 8025134:	2b00      	cmp	r3, #0
 8025136:	d101      	bne.n	802513c <ip4addr_aton+0x160>
    return 0;
 8025138:	2300      	movs	r3, #0
 802513a:	e06d      	b.n	8025218 <ip4addr_aton+0x23c>
  }
  /*
   * Concoct the address according to
   * the number of parts specified.
   */
  switch (pp - parts + 1) {
 802513c:	f107 030c 	add.w	r3, r7, #12
 8025140:	69fa      	ldr	r2, [r7, #28]
 8025142:	1ad3      	subs	r3, r2, r3
 8025144:	109b      	asrs	r3, r3, #2
 8025146:	3301      	adds	r3, #1
 8025148:	2b04      	cmp	r3, #4
 802514a:	d853      	bhi.n	80251f4 <ip4addr_aton+0x218>
 802514c:	a201      	add	r2, pc, #4	@ (adr r2, 8025154 <ip4addr_aton+0x178>)
 802514e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8025152:	bf00      	nop
 8025154:	08025169 	.word	0x08025169
 8025158:	08025203 	.word	0x08025203
 802515c:	0802516d 	.word	0x0802516d
 8025160:	0802518f 	.word	0x0802518f
 8025164:	080251bd 	.word	0x080251bd

    case 0:
      return 0;       /* initial nondigit */
 8025168:	2300      	movs	r3, #0
 802516a:	e055      	b.n	8025218 <ip4addr_aton+0x23c>

    case 1:             /* a -- 32 bits */
      break;

    case 2:             /* a.b -- 8.24 bits */
      if (val > 0xffffffUL) {
 802516c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802516e:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 8025172:	d301      	bcc.n	8025178 <ip4addr_aton+0x19c>
        return 0;
 8025174:	2300      	movs	r3, #0
 8025176:	e04f      	b.n	8025218 <ip4addr_aton+0x23c>
      }
      if (parts[0] > 0xff) {
 8025178:	68fb      	ldr	r3, [r7, #12]
 802517a:	2bff      	cmp	r3, #255	@ 0xff
 802517c:	d901      	bls.n	8025182 <ip4addr_aton+0x1a6>
        return 0;
 802517e:	2300      	movs	r3, #0
 8025180:	e04a      	b.n	8025218 <ip4addr_aton+0x23c>
      }
      val |= parts[0] << 24;
 8025182:	68fb      	ldr	r3, [r7, #12]
 8025184:	061b      	lsls	r3, r3, #24
 8025186:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8025188:	4313      	orrs	r3, r2
 802518a:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 802518c:	e03a      	b.n	8025204 <ip4addr_aton+0x228>

    case 3:             /* a.b.c -- 8.8.16 bits */
      if (val > 0xffff) {
 802518e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025190:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8025194:	d301      	bcc.n	802519a <ip4addr_aton+0x1be>
        return 0;
 8025196:	2300      	movs	r3, #0
 8025198:	e03e      	b.n	8025218 <ip4addr_aton+0x23c>
      }
      if ((parts[0] > 0xff) || (parts[1] > 0xff)) {
 802519a:	68fb      	ldr	r3, [r7, #12]
 802519c:	2bff      	cmp	r3, #255	@ 0xff
 802519e:	d802      	bhi.n	80251a6 <ip4addr_aton+0x1ca>
 80251a0:	693b      	ldr	r3, [r7, #16]
 80251a2:	2bff      	cmp	r3, #255	@ 0xff
 80251a4:	d901      	bls.n	80251aa <ip4addr_aton+0x1ce>
        return 0;
 80251a6:	2300      	movs	r3, #0
 80251a8:	e036      	b.n	8025218 <ip4addr_aton+0x23c>
      }
      val |= (parts[0] << 24) | (parts[1] << 16);
 80251aa:	68fb      	ldr	r3, [r7, #12]
 80251ac:	061a      	lsls	r2, r3, #24
 80251ae:	693b      	ldr	r3, [r7, #16]
 80251b0:	041b      	lsls	r3, r3, #16
 80251b2:	4313      	orrs	r3, r2
 80251b4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80251b6:	4313      	orrs	r3, r2
 80251b8:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 80251ba:	e023      	b.n	8025204 <ip4addr_aton+0x228>

    case 4:             /* a.b.c.d -- 8.8.8.8 bits */
      if (val > 0xff) {
 80251bc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80251be:	2bff      	cmp	r3, #255	@ 0xff
 80251c0:	d901      	bls.n	80251c6 <ip4addr_aton+0x1ea>
        return 0;
 80251c2:	2300      	movs	r3, #0
 80251c4:	e028      	b.n	8025218 <ip4addr_aton+0x23c>
      }
      if ((parts[0] > 0xff) || (parts[1] > 0xff) || (parts[2] > 0xff)) {
 80251c6:	68fb      	ldr	r3, [r7, #12]
 80251c8:	2bff      	cmp	r3, #255	@ 0xff
 80251ca:	d805      	bhi.n	80251d8 <ip4addr_aton+0x1fc>
 80251cc:	693b      	ldr	r3, [r7, #16]
 80251ce:	2bff      	cmp	r3, #255	@ 0xff
 80251d0:	d802      	bhi.n	80251d8 <ip4addr_aton+0x1fc>
 80251d2:	697b      	ldr	r3, [r7, #20]
 80251d4:	2bff      	cmp	r3, #255	@ 0xff
 80251d6:	d901      	bls.n	80251dc <ip4addr_aton+0x200>
        return 0;
 80251d8:	2300      	movs	r3, #0
 80251da:	e01d      	b.n	8025218 <ip4addr_aton+0x23c>
      }
      val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);
 80251dc:	68fb      	ldr	r3, [r7, #12]
 80251de:	061a      	lsls	r2, r3, #24
 80251e0:	693b      	ldr	r3, [r7, #16]
 80251e2:	041b      	lsls	r3, r3, #16
 80251e4:	431a      	orrs	r2, r3
 80251e6:	697b      	ldr	r3, [r7, #20]
 80251e8:	021b      	lsls	r3, r3, #8
 80251ea:	4313      	orrs	r3, r2
 80251ec:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80251ee:	4313      	orrs	r3, r2
 80251f0:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 80251f2:	e007      	b.n	8025204 <ip4addr_aton+0x228>
    default:
      LWIP_ASSERT("unhandled", 0);
 80251f4:	4b0b      	ldr	r3, [pc, #44]	@ (8025224 <ip4addr_aton+0x248>)
 80251f6:	22f9      	movs	r2, #249	@ 0xf9
 80251f8:	490b      	ldr	r1, [pc, #44]	@ (8025228 <ip4addr_aton+0x24c>)
 80251fa:	480c      	ldr	r0, [pc, #48]	@ (802522c <ip4addr_aton+0x250>)
 80251fc:	f004 fbee 	bl	80299dc <iprintf>
      break;
 8025200:	e000      	b.n	8025204 <ip4addr_aton+0x228>
      break;
 8025202:	bf00      	nop
  }
  if (addr) {
 8025204:	683b      	ldr	r3, [r7, #0]
 8025206:	2b00      	cmp	r3, #0
 8025208:	d005      	beq.n	8025216 <ip4addr_aton+0x23a>
    ip4_addr_set_u32(addr, lwip_htonl(val));
 802520a:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 802520c:	f7f3 fca1 	bl	8018b52 <lwip_htonl>
 8025210:	4602      	mov	r2, r0
 8025212:	683b      	ldr	r3, [r7, #0]
 8025214:	601a      	str	r2, [r3, #0]
  }
  return 1;
 8025216:	2301      	movs	r3, #1
}
 8025218:	4618      	mov	r0, r3
 802521a:	3728      	adds	r7, #40	@ 0x28
 802521c:	46bd      	mov	sp, r7
 802521e:	bd80      	pop	{r7, pc}
 8025220:	08030d40 	.word	0x08030d40
 8025224:	08030644 	.word	0x08030644
 8025228:	08030680 	.word	0x08030680
 802522c:	0803068c 	.word	0x0803068c

08025230 <ip4addr_ntoa>:
 * @return pointer to a global static (!) buffer that holds the ASCII
 *         representation of addr
 */
char *
ip4addr_ntoa(const ip4_addr_t *addr)
{
 8025230:	b580      	push	{r7, lr}
 8025232:	b082      	sub	sp, #8
 8025234:	af00      	add	r7, sp, #0
 8025236:	6078      	str	r0, [r7, #4]
  static char str[IP4ADDR_STRLEN_MAX];
  return ip4addr_ntoa_r(addr, str, IP4ADDR_STRLEN_MAX);
 8025238:	2210      	movs	r2, #16
 802523a:	4904      	ldr	r1, [pc, #16]	@ (802524c <ip4addr_ntoa+0x1c>)
 802523c:	6878      	ldr	r0, [r7, #4]
 802523e:	f000 f807 	bl	8025250 <ip4addr_ntoa_r>
 8025242:	4603      	mov	r3, r0
}
 8025244:	4618      	mov	r0, r3
 8025246:	3708      	adds	r7, #8
 8025248:	46bd      	mov	sp, r7
 802524a:	bd80      	pop	{r7, pc}
 802524c:	2402b014 	.word	0x2402b014

08025250 <ip4addr_ntoa_r>:
 * @return either pointer to buf which now holds the ASCII
 *         representation of addr or NULL if buf was too small
 */
char *
ip4addr_ntoa_r(const ip4_addr_t *addr, char *buf, int buflen)
{
 8025250:	b480      	push	{r7}
 8025252:	b08d      	sub	sp, #52	@ 0x34
 8025254:	af00      	add	r7, sp, #0
 8025256:	60f8      	str	r0, [r7, #12]
 8025258:	60b9      	str	r1, [r7, #8]
 802525a:	607a      	str	r2, [r7, #4]
  char *rp;
  u8_t *ap;
  u8_t rem;
  u8_t n;
  u8_t i;
  int len = 0;
 802525c:	2300      	movs	r3, #0
 802525e:	623b      	str	r3, [r7, #32]

  s_addr = ip4_addr_get_u32(addr);
 8025260:	68fb      	ldr	r3, [r7, #12]
 8025262:	681b      	ldr	r3, [r3, #0]
 8025264:	61bb      	str	r3, [r7, #24]

  rp = buf;
 8025266:	68bb      	ldr	r3, [r7, #8]
 8025268:	62fb      	str	r3, [r7, #44]	@ 0x2c
  ap = (u8_t *)&s_addr;
 802526a:	f107 0318 	add.w	r3, r7, #24
 802526e:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (n = 0; n < 4; n++) {
 8025270:	2300      	movs	r3, #0
 8025272:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 8025276:	e058      	b.n	802532a <ip4addr_ntoa_r+0xda>
    i = 0;
 8025278:	2300      	movs	r3, #0
 802527a:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
    do {
      rem = *ap % (u8_t)10;
 802527e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025280:	781a      	ldrb	r2, [r3, #0]
 8025282:	4b32      	ldr	r3, [pc, #200]	@ (802534c <ip4addr_ntoa_r+0xfc>)
 8025284:	fba3 1302 	umull	r1, r3, r3, r2
 8025288:	08d9      	lsrs	r1, r3, #3
 802528a:	460b      	mov	r3, r1
 802528c:	009b      	lsls	r3, r3, #2
 802528e:	440b      	add	r3, r1
 8025290:	005b      	lsls	r3, r3, #1
 8025292:	1ad3      	subs	r3, r2, r3
 8025294:	77fb      	strb	r3, [r7, #31]
      *ap /= (u8_t)10;
 8025296:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025298:	781b      	ldrb	r3, [r3, #0]
 802529a:	4a2c      	ldr	r2, [pc, #176]	@ (802534c <ip4addr_ntoa_r+0xfc>)
 802529c:	fba2 2303 	umull	r2, r3, r2, r3
 80252a0:	08db      	lsrs	r3, r3, #3
 80252a2:	b2da      	uxtb	r2, r3
 80252a4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80252a6:	701a      	strb	r2, [r3, #0]
      inv[i++] = (char)('0' + rem);
 80252a8:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 80252ac:	1c5a      	adds	r2, r3, #1
 80252ae:	f887 2026 	strb.w	r2, [r7, #38]	@ 0x26
 80252b2:	4619      	mov	r1, r3
 80252b4:	7ffb      	ldrb	r3, [r7, #31]
 80252b6:	3330      	adds	r3, #48	@ 0x30
 80252b8:	b2da      	uxtb	r2, r3
 80252ba:	f101 0330 	add.w	r3, r1, #48	@ 0x30
 80252be:	443b      	add	r3, r7
 80252c0:	f803 2c1c 	strb.w	r2, [r3, #-28]
    } while (*ap);
 80252c4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80252c6:	781b      	ldrb	r3, [r3, #0]
 80252c8:	2b00      	cmp	r3, #0
 80252ca:	d1d8      	bne.n	802527e <ip4addr_ntoa_r+0x2e>
    while (i--) {
 80252cc:	e011      	b.n	80252f2 <ip4addr_ntoa_r+0xa2>
      if (len++ >= buflen) {
 80252ce:	6a3b      	ldr	r3, [r7, #32]
 80252d0:	1c5a      	adds	r2, r3, #1
 80252d2:	623a      	str	r2, [r7, #32]
 80252d4:	687a      	ldr	r2, [r7, #4]
 80252d6:	429a      	cmp	r2, r3
 80252d8:	dc01      	bgt.n	80252de <ip4addr_ntoa_r+0x8e>
        return NULL;
 80252da:	2300      	movs	r3, #0
 80252dc:	e030      	b.n	8025340 <ip4addr_ntoa_r+0xf0>
      }
      *rp++ = inv[i];
 80252de:	f897 2026 	ldrb.w	r2, [r7, #38]	@ 0x26
 80252e2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80252e4:	1c59      	adds	r1, r3, #1
 80252e6:	62f9      	str	r1, [r7, #44]	@ 0x2c
 80252e8:	3230      	adds	r2, #48	@ 0x30
 80252ea:	443a      	add	r2, r7
 80252ec:	f812 2c1c 	ldrb.w	r2, [r2, #-28]
 80252f0:	701a      	strb	r2, [r3, #0]
    while (i--) {
 80252f2:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 80252f6:	1e5a      	subs	r2, r3, #1
 80252f8:	f887 2026 	strb.w	r2, [r7, #38]	@ 0x26
 80252fc:	2b00      	cmp	r3, #0
 80252fe:	d1e6      	bne.n	80252ce <ip4addr_ntoa_r+0x7e>
    }
    if (len++ >= buflen) {
 8025300:	6a3b      	ldr	r3, [r7, #32]
 8025302:	1c5a      	adds	r2, r3, #1
 8025304:	623a      	str	r2, [r7, #32]
 8025306:	687a      	ldr	r2, [r7, #4]
 8025308:	429a      	cmp	r2, r3
 802530a:	dc01      	bgt.n	8025310 <ip4addr_ntoa_r+0xc0>
      return NULL;
 802530c:	2300      	movs	r3, #0
 802530e:	e017      	b.n	8025340 <ip4addr_ntoa_r+0xf0>
    }
    *rp++ = '.';
 8025310:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025312:	1c5a      	adds	r2, r3, #1
 8025314:	62fa      	str	r2, [r7, #44]	@ 0x2c
 8025316:	222e      	movs	r2, #46	@ 0x2e
 8025318:	701a      	strb	r2, [r3, #0]
    ap++;
 802531a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802531c:	3301      	adds	r3, #1
 802531e:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (n = 0; n < 4; n++) {
 8025320:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8025324:	3301      	adds	r3, #1
 8025326:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 802532a:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 802532e:	2b03      	cmp	r3, #3
 8025330:	d9a2      	bls.n	8025278 <ip4addr_ntoa_r+0x28>
  }
  *--rp = 0;
 8025332:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025334:	3b01      	subs	r3, #1
 8025336:	62fb      	str	r3, [r7, #44]	@ 0x2c
 8025338:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802533a:	2200      	movs	r2, #0
 802533c:	701a      	strb	r2, [r3, #0]
  return buf;
 802533e:	68bb      	ldr	r3, [r7, #8]
}
 8025340:	4618      	mov	r0, r3
 8025342:	3734      	adds	r7, #52	@ 0x34
 8025344:	46bd      	mov	sp, r7
 8025346:	f85d 7b04 	ldr.w	r7, [sp], #4
 802534a:	4770      	bx	lr
 802534c:	cccccccd 	.word	0xcccccccd

08025350 <ip_reass_tmr>:
 *
 * Should be called every 1000 msec (defined by IP_TMR_INTERVAL).
 */
void
ip_reass_tmr(void)
{
 8025350:	b580      	push	{r7, lr}
 8025352:	b084      	sub	sp, #16
 8025354:	af00      	add	r7, sp, #0
  struct ip_reassdata *r, *prev = NULL;
 8025356:	2300      	movs	r3, #0
 8025358:	60bb      	str	r3, [r7, #8]

  r = reassdatagrams;
 802535a:	4b12      	ldr	r3, [pc, #72]	@ (80253a4 <ip_reass_tmr+0x54>)
 802535c:	681b      	ldr	r3, [r3, #0]
 802535e:	60fb      	str	r3, [r7, #12]
  while (r != NULL) {
 8025360:	e018      	b.n	8025394 <ip_reass_tmr+0x44>
    /* Decrement the timer. Once it reaches 0,
     * clean up the incomplete fragment assembly */
    if (r->timer > 0) {
 8025362:	68fb      	ldr	r3, [r7, #12]
 8025364:	7fdb      	ldrb	r3, [r3, #31]
 8025366:	2b00      	cmp	r3, #0
 8025368:	d00b      	beq.n	8025382 <ip_reass_tmr+0x32>
      r->timer--;
 802536a:	68fb      	ldr	r3, [r7, #12]
 802536c:	7fdb      	ldrb	r3, [r3, #31]
 802536e:	3b01      	subs	r3, #1
 8025370:	b2da      	uxtb	r2, r3
 8025372:	68fb      	ldr	r3, [r7, #12]
 8025374:	77da      	strb	r2, [r3, #31]
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer dec %"U16_F"\n", (u16_t)r->timer));
      prev = r;
 8025376:	68fb      	ldr	r3, [r7, #12]
 8025378:	60bb      	str	r3, [r7, #8]
      r = r->next;
 802537a:	68fb      	ldr	r3, [r7, #12]
 802537c:	681b      	ldr	r3, [r3, #0]
 802537e:	60fb      	str	r3, [r7, #12]
 8025380:	e008      	b.n	8025394 <ip_reass_tmr+0x44>
    } else {
      /* reassembly timed out */
      struct ip_reassdata *tmp;
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer timed out\n"));
      tmp = r;
 8025382:	68fb      	ldr	r3, [r7, #12]
 8025384:	607b      	str	r3, [r7, #4]
      /* get the next pointer before freeing */
      r = r->next;
 8025386:	68fb      	ldr	r3, [r7, #12]
 8025388:	681b      	ldr	r3, [r3, #0]
 802538a:	60fb      	str	r3, [r7, #12]
      /* free the helper struct and all enqueued pbufs */
      ip_reass_free_complete_datagram(tmp, prev);
 802538c:	68b9      	ldr	r1, [r7, #8]
 802538e:	6878      	ldr	r0, [r7, #4]
 8025390:	f000 f80a 	bl	80253a8 <ip_reass_free_complete_datagram>
  while (r != NULL) {
 8025394:	68fb      	ldr	r3, [r7, #12]
 8025396:	2b00      	cmp	r3, #0
 8025398:	d1e3      	bne.n	8025362 <ip_reass_tmr+0x12>
    }
  }
}
 802539a:	bf00      	nop
 802539c:	bf00      	nop
 802539e:	3710      	adds	r7, #16
 80253a0:	46bd      	mov	sp, r7
 80253a2:	bd80      	pop	{r7, pc}
 80253a4:	2402b024 	.word	0x2402b024

080253a8 <ip_reass_free_complete_datagram>:
 * @param prev the previous datagram in the linked list
 * @return the number of pbufs freed
 */
static int
ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
{
 80253a8:	b580      	push	{r7, lr}
 80253aa:	b088      	sub	sp, #32
 80253ac:	af00      	add	r7, sp, #0
 80253ae:	6078      	str	r0, [r7, #4]
 80253b0:	6039      	str	r1, [r7, #0]
  u16_t pbufs_freed = 0;
 80253b2:	2300      	movs	r3, #0
 80253b4:	83fb      	strh	r3, [r7, #30]
  u16_t clen;
  struct pbuf *p;
  struct ip_reass_helper *iprh;

  LWIP_ASSERT("prev != ipr", prev != ipr);
 80253b6:	683a      	ldr	r2, [r7, #0]
 80253b8:	687b      	ldr	r3, [r7, #4]
 80253ba:	429a      	cmp	r2, r3
 80253bc:	d105      	bne.n	80253ca <ip_reass_free_complete_datagram+0x22>
 80253be:	4b45      	ldr	r3, [pc, #276]	@ (80254d4 <ip_reass_free_complete_datagram+0x12c>)
 80253c0:	22ab      	movs	r2, #171	@ 0xab
 80253c2:	4945      	ldr	r1, [pc, #276]	@ (80254d8 <ip_reass_free_complete_datagram+0x130>)
 80253c4:	4845      	ldr	r0, [pc, #276]	@ (80254dc <ip_reass_free_complete_datagram+0x134>)
 80253c6:	f004 fb09 	bl	80299dc <iprintf>
  if (prev != NULL) {
 80253ca:	683b      	ldr	r3, [r7, #0]
 80253cc:	2b00      	cmp	r3, #0
 80253ce:	d00a      	beq.n	80253e6 <ip_reass_free_complete_datagram+0x3e>
    LWIP_ASSERT("prev->next == ipr", prev->next == ipr);
 80253d0:	683b      	ldr	r3, [r7, #0]
 80253d2:	681b      	ldr	r3, [r3, #0]
 80253d4:	687a      	ldr	r2, [r7, #4]
 80253d6:	429a      	cmp	r2, r3
 80253d8:	d005      	beq.n	80253e6 <ip_reass_free_complete_datagram+0x3e>
 80253da:	4b3e      	ldr	r3, [pc, #248]	@ (80254d4 <ip_reass_free_complete_datagram+0x12c>)
 80253dc:	22ad      	movs	r2, #173	@ 0xad
 80253de:	4940      	ldr	r1, [pc, #256]	@ (80254e0 <ip_reass_free_complete_datagram+0x138>)
 80253e0:	483e      	ldr	r0, [pc, #248]	@ (80254dc <ip_reass_free_complete_datagram+0x134>)
 80253e2:	f004 fafb 	bl	80299dc <iprintf>
  }

  MIB2_STATS_INC(mib2.ipreasmfails);
#if LWIP_ICMP
  iprh = (struct ip_reass_helper *)ipr->p->payload;
 80253e6:	687b      	ldr	r3, [r7, #4]
 80253e8:	685b      	ldr	r3, [r3, #4]
 80253ea:	685b      	ldr	r3, [r3, #4]
 80253ec:	617b      	str	r3, [r7, #20]
  if (iprh->start == 0) {
 80253ee:	697b      	ldr	r3, [r7, #20]
 80253f0:	889b      	ldrh	r3, [r3, #4]
 80253f2:	b29b      	uxth	r3, r3
 80253f4:	2b00      	cmp	r3, #0
 80253f6:	d12a      	bne.n	802544e <ip_reass_free_complete_datagram+0xa6>
    /* The first fragment was received, send ICMP time exceeded. */
    /* First, de-queue the first pbuf from r->p. */
    p = ipr->p;
 80253f8:	687b      	ldr	r3, [r7, #4]
 80253fa:	685b      	ldr	r3, [r3, #4]
 80253fc:	61bb      	str	r3, [r7, #24]
    ipr->p = iprh->next_pbuf;
 80253fe:	697b      	ldr	r3, [r7, #20]
 8025400:	681a      	ldr	r2, [r3, #0]
 8025402:	687b      	ldr	r3, [r7, #4]
 8025404:	605a      	str	r2, [r3, #4]
    /* Then, copy the original header into it. */
    SMEMCPY(p->payload, &ipr->iphdr, IP_HLEN);
 8025406:	69bb      	ldr	r3, [r7, #24]
 8025408:	6858      	ldr	r0, [r3, #4]
 802540a:	687b      	ldr	r3, [r7, #4]
 802540c:	3308      	adds	r3, #8
 802540e:	2214      	movs	r2, #20
 8025410:	4619      	mov	r1, r3
 8025412:	f004 fd6c 	bl	8029eee <memcpy>
    icmp_time_exceeded(p, ICMP_TE_FRAG);
 8025416:	2101      	movs	r1, #1
 8025418:	69b8      	ldr	r0, [r7, #24]
 802541a:	f7ff fa4d 	bl	80248b8 <icmp_time_exceeded>
    clen = pbuf_clen(p);
 802541e:	69b8      	ldr	r0, [r7, #24]
 8025420:	f7f5 f8f2 	bl	801a608 <pbuf_clen>
 8025424:	4603      	mov	r3, r0
 8025426:	827b      	strh	r3, [r7, #18]
    LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff);
 8025428:	8bfa      	ldrh	r2, [r7, #30]
 802542a:	8a7b      	ldrh	r3, [r7, #18]
 802542c:	4413      	add	r3, r2
 802542e:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8025432:	db05      	blt.n	8025440 <ip_reass_free_complete_datagram+0x98>
 8025434:	4b27      	ldr	r3, [pc, #156]	@ (80254d4 <ip_reass_free_complete_datagram+0x12c>)
 8025436:	22bc      	movs	r2, #188	@ 0xbc
 8025438:	492a      	ldr	r1, [pc, #168]	@ (80254e4 <ip_reass_free_complete_datagram+0x13c>)
 802543a:	4828      	ldr	r0, [pc, #160]	@ (80254dc <ip_reass_free_complete_datagram+0x134>)
 802543c:	f004 face 	bl	80299dc <iprintf>
    pbufs_freed = (u16_t)(pbufs_freed + clen);
 8025440:	8bfa      	ldrh	r2, [r7, #30]
 8025442:	8a7b      	ldrh	r3, [r7, #18]
 8025444:	4413      	add	r3, r2
 8025446:	83fb      	strh	r3, [r7, #30]
    pbuf_free(p);
 8025448:	69b8      	ldr	r0, [r7, #24]
 802544a:	f7f5 f84f 	bl	801a4ec <pbuf_free>
  }
#endif /* LWIP_ICMP */

  /* First, free all received pbufs.  The individual pbufs need to be released
     separately as they have not yet been chained */
  p = ipr->p;
 802544e:	687b      	ldr	r3, [r7, #4]
 8025450:	685b      	ldr	r3, [r3, #4]
 8025452:	61bb      	str	r3, [r7, #24]
  while (p != NULL) {
 8025454:	e01f      	b.n	8025496 <ip_reass_free_complete_datagram+0xee>
    struct pbuf *pcur;
    iprh = (struct ip_reass_helper *)p->payload;
 8025456:	69bb      	ldr	r3, [r7, #24]
 8025458:	685b      	ldr	r3, [r3, #4]
 802545a:	617b      	str	r3, [r7, #20]
    pcur = p;
 802545c:	69bb      	ldr	r3, [r7, #24]
 802545e:	60fb      	str	r3, [r7, #12]
    /* get the next pointer before freeing */
    p = iprh->next_pbuf;
 8025460:	697b      	ldr	r3, [r7, #20]
 8025462:	681b      	ldr	r3, [r3, #0]
 8025464:	61bb      	str	r3, [r7, #24]
    clen = pbuf_clen(pcur);
 8025466:	68f8      	ldr	r0, [r7, #12]
 8025468:	f7f5 f8ce 	bl	801a608 <pbuf_clen>
 802546c:	4603      	mov	r3, r0
 802546e:	827b      	strh	r3, [r7, #18]
    LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff);
 8025470:	8bfa      	ldrh	r2, [r7, #30]
 8025472:	8a7b      	ldrh	r3, [r7, #18]
 8025474:	4413      	add	r3, r2
 8025476:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 802547a:	db05      	blt.n	8025488 <ip_reass_free_complete_datagram+0xe0>
 802547c:	4b15      	ldr	r3, [pc, #84]	@ (80254d4 <ip_reass_free_complete_datagram+0x12c>)
 802547e:	22cc      	movs	r2, #204	@ 0xcc
 8025480:	4918      	ldr	r1, [pc, #96]	@ (80254e4 <ip_reass_free_complete_datagram+0x13c>)
 8025482:	4816      	ldr	r0, [pc, #88]	@ (80254dc <ip_reass_free_complete_datagram+0x134>)
 8025484:	f004 faaa 	bl	80299dc <iprintf>
    pbufs_freed = (u16_t)(pbufs_freed + clen);
 8025488:	8bfa      	ldrh	r2, [r7, #30]
 802548a:	8a7b      	ldrh	r3, [r7, #18]
 802548c:	4413      	add	r3, r2
 802548e:	83fb      	strh	r3, [r7, #30]
    pbuf_free(pcur);
 8025490:	68f8      	ldr	r0, [r7, #12]
 8025492:	f7f5 f82b 	bl	801a4ec <pbuf_free>
  while (p != NULL) {
 8025496:	69bb      	ldr	r3, [r7, #24]
 8025498:	2b00      	cmp	r3, #0
 802549a:	d1dc      	bne.n	8025456 <ip_reass_free_complete_datagram+0xae>
  }
  /* Then, unchain the struct ip_reassdata from the list and free it. */
  ip_reass_dequeue_datagram(ipr, prev);
 802549c:	6839      	ldr	r1, [r7, #0]
 802549e:	6878      	ldr	r0, [r7, #4]
 80254a0:	f000 f8c2 	bl	8025628 <ip_reass_dequeue_datagram>
  LWIP_ASSERT("ip_reass_pbufcount >= pbufs_freed", ip_reass_pbufcount >= pbufs_freed);
 80254a4:	4b10      	ldr	r3, [pc, #64]	@ (80254e8 <ip_reass_free_complete_datagram+0x140>)
 80254a6:	881b      	ldrh	r3, [r3, #0]
 80254a8:	8bfa      	ldrh	r2, [r7, #30]
 80254aa:	429a      	cmp	r2, r3
 80254ac:	d905      	bls.n	80254ba <ip_reass_free_complete_datagram+0x112>
 80254ae:	4b09      	ldr	r3, [pc, #36]	@ (80254d4 <ip_reass_free_complete_datagram+0x12c>)
 80254b0:	22d2      	movs	r2, #210	@ 0xd2
 80254b2:	490e      	ldr	r1, [pc, #56]	@ (80254ec <ip_reass_free_complete_datagram+0x144>)
 80254b4:	4809      	ldr	r0, [pc, #36]	@ (80254dc <ip_reass_free_complete_datagram+0x134>)
 80254b6:	f004 fa91 	bl	80299dc <iprintf>
  ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - pbufs_freed);
 80254ba:	4b0b      	ldr	r3, [pc, #44]	@ (80254e8 <ip_reass_free_complete_datagram+0x140>)
 80254bc:	881a      	ldrh	r2, [r3, #0]
 80254be:	8bfb      	ldrh	r3, [r7, #30]
 80254c0:	1ad3      	subs	r3, r2, r3
 80254c2:	b29a      	uxth	r2, r3
 80254c4:	4b08      	ldr	r3, [pc, #32]	@ (80254e8 <ip_reass_free_complete_datagram+0x140>)
 80254c6:	801a      	strh	r2, [r3, #0]

  return pbufs_freed;
 80254c8:	8bfb      	ldrh	r3, [r7, #30]
}
 80254ca:	4618      	mov	r0, r3
 80254cc:	3720      	adds	r7, #32
 80254ce:	46bd      	mov	sp, r7
 80254d0:	bd80      	pop	{r7, pc}
 80254d2:	bf00      	nop
 80254d4:	080306b4 	.word	0x080306b4
 80254d8:	080306f0 	.word	0x080306f0
 80254dc:	080306fc 	.word	0x080306fc
 80254e0:	08030724 	.word	0x08030724
 80254e4:	08030738 	.word	0x08030738
 80254e8:	2402b028 	.word	0x2402b028
 80254ec:	08030758 	.word	0x08030758

080254f0 <ip_reass_remove_oldest_datagram>:
 *        (used for freeing other datagrams if not enough space)
 * @return the number of pbufs freed
 */
static int
ip_reass_remove_oldest_datagram(struct ip_hdr *fraghdr, int pbufs_needed)
{
 80254f0:	b580      	push	{r7, lr}
 80254f2:	b08a      	sub	sp, #40	@ 0x28
 80254f4:	af00      	add	r7, sp, #0
 80254f6:	6078      	str	r0, [r7, #4]
 80254f8:	6039      	str	r1, [r7, #0]
  /* @todo Can't we simply remove the last datagram in the
   *       linked list behind reassdatagrams?
   */
  struct ip_reassdata *r, *oldest, *prev, *oldest_prev;
  int pbufs_freed = 0, pbufs_freed_current;
 80254fa:	2300      	movs	r3, #0
 80254fc:	617b      	str	r3, [r7, #20]
  int other_datagrams;

  /* Free datagrams until being allowed to enqueue 'pbufs_needed' pbufs,
   * but don't free the datagram that 'fraghdr' belongs to! */
  do {
    oldest = NULL;
 80254fe:	2300      	movs	r3, #0
 8025500:	623b      	str	r3, [r7, #32]
    prev = NULL;
 8025502:	2300      	movs	r3, #0
 8025504:	61fb      	str	r3, [r7, #28]
    oldest_prev = NULL;
 8025506:	2300      	movs	r3, #0
 8025508:	61bb      	str	r3, [r7, #24]
    other_datagrams = 0;
 802550a:	2300      	movs	r3, #0
 802550c:	613b      	str	r3, [r7, #16]
    r = reassdatagrams;
 802550e:	4b28      	ldr	r3, [pc, #160]	@ (80255b0 <ip_reass_remove_oldest_datagram+0xc0>)
 8025510:	681b      	ldr	r3, [r3, #0]
 8025512:	627b      	str	r3, [r7, #36]	@ 0x24
    while (r != NULL) {
 8025514:	e030      	b.n	8025578 <ip_reass_remove_oldest_datagram+0x88>
      if (!IP_ADDRESSES_AND_ID_MATCH(&r->iphdr, fraghdr)) {
 8025516:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025518:	695a      	ldr	r2, [r3, #20]
 802551a:	687b      	ldr	r3, [r7, #4]
 802551c:	68db      	ldr	r3, [r3, #12]
 802551e:	429a      	cmp	r2, r3
 8025520:	d10c      	bne.n	802553c <ip_reass_remove_oldest_datagram+0x4c>
 8025522:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025524:	699a      	ldr	r2, [r3, #24]
 8025526:	687b      	ldr	r3, [r7, #4]
 8025528:	691b      	ldr	r3, [r3, #16]
 802552a:	429a      	cmp	r2, r3
 802552c:	d106      	bne.n	802553c <ip_reass_remove_oldest_datagram+0x4c>
 802552e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025530:	899a      	ldrh	r2, [r3, #12]
 8025532:	687b      	ldr	r3, [r7, #4]
 8025534:	889b      	ldrh	r3, [r3, #4]
 8025536:	b29b      	uxth	r3, r3
 8025538:	429a      	cmp	r2, r3
 802553a:	d014      	beq.n	8025566 <ip_reass_remove_oldest_datagram+0x76>
        /* Not the same datagram as fraghdr */
        other_datagrams++;
 802553c:	693b      	ldr	r3, [r7, #16]
 802553e:	3301      	adds	r3, #1
 8025540:	613b      	str	r3, [r7, #16]
        if (oldest == NULL) {
 8025542:	6a3b      	ldr	r3, [r7, #32]
 8025544:	2b00      	cmp	r3, #0
 8025546:	d104      	bne.n	8025552 <ip_reass_remove_oldest_datagram+0x62>
          oldest = r;
 8025548:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802554a:	623b      	str	r3, [r7, #32]
          oldest_prev = prev;
 802554c:	69fb      	ldr	r3, [r7, #28]
 802554e:	61bb      	str	r3, [r7, #24]
 8025550:	e009      	b.n	8025566 <ip_reass_remove_oldest_datagram+0x76>
        } else if (r->timer <= oldest->timer) {
 8025552:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025554:	7fda      	ldrb	r2, [r3, #31]
 8025556:	6a3b      	ldr	r3, [r7, #32]
 8025558:	7fdb      	ldrb	r3, [r3, #31]
 802555a:	429a      	cmp	r2, r3
 802555c:	d803      	bhi.n	8025566 <ip_reass_remove_oldest_datagram+0x76>
          /* older than the previous oldest */
          oldest = r;
 802555e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025560:	623b      	str	r3, [r7, #32]
          oldest_prev = prev;
 8025562:	69fb      	ldr	r3, [r7, #28]
 8025564:	61bb      	str	r3, [r7, #24]
        }
      }
      if (r->next != NULL) {
 8025566:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025568:	681b      	ldr	r3, [r3, #0]
 802556a:	2b00      	cmp	r3, #0
 802556c:	d001      	beq.n	8025572 <ip_reass_remove_oldest_datagram+0x82>
        prev = r;
 802556e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025570:	61fb      	str	r3, [r7, #28]
      }
      r = r->next;
 8025572:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025574:	681b      	ldr	r3, [r3, #0]
 8025576:	627b      	str	r3, [r7, #36]	@ 0x24
    while (r != NULL) {
 8025578:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802557a:	2b00      	cmp	r3, #0
 802557c:	d1cb      	bne.n	8025516 <ip_reass_remove_oldest_datagram+0x26>
    }
    if (oldest != NULL) {
 802557e:	6a3b      	ldr	r3, [r7, #32]
 8025580:	2b00      	cmp	r3, #0
 8025582:	d008      	beq.n	8025596 <ip_reass_remove_oldest_datagram+0xa6>
      pbufs_freed_current = ip_reass_free_complete_datagram(oldest, oldest_prev);
 8025584:	69b9      	ldr	r1, [r7, #24]
 8025586:	6a38      	ldr	r0, [r7, #32]
 8025588:	f7ff ff0e 	bl	80253a8 <ip_reass_free_complete_datagram>
 802558c:	60f8      	str	r0, [r7, #12]
      pbufs_freed += pbufs_freed_current;
 802558e:	697a      	ldr	r2, [r7, #20]
 8025590:	68fb      	ldr	r3, [r7, #12]
 8025592:	4413      	add	r3, r2
 8025594:	617b      	str	r3, [r7, #20]
    }
  } while ((pbufs_freed < pbufs_needed) && (other_datagrams > 1));
 8025596:	697a      	ldr	r2, [r7, #20]
 8025598:	683b      	ldr	r3, [r7, #0]
 802559a:	429a      	cmp	r2, r3
 802559c:	da02      	bge.n	80255a4 <ip_reass_remove_oldest_datagram+0xb4>
 802559e:	693b      	ldr	r3, [r7, #16]
 80255a0:	2b01      	cmp	r3, #1
 80255a2:	dcac      	bgt.n	80254fe <ip_reass_remove_oldest_datagram+0xe>
  return pbufs_freed;
 80255a4:	697b      	ldr	r3, [r7, #20]
}
 80255a6:	4618      	mov	r0, r3
 80255a8:	3728      	adds	r7, #40	@ 0x28
 80255aa:	46bd      	mov	sp, r7
 80255ac:	bd80      	pop	{r7, pc}
 80255ae:	bf00      	nop
 80255b0:	2402b024 	.word	0x2402b024

080255b4 <ip_reass_enqueue_new_datagram>:
 * @param clen number of pbufs needed to enqueue (used for freeing other datagrams if not enough space)
 * @return A pointer to the queue location into which the fragment was enqueued
 */
static struct ip_reassdata *
ip_reass_enqueue_new_datagram(struct ip_hdr *fraghdr, int clen)
{
 80255b4:	b580      	push	{r7, lr}
 80255b6:	b084      	sub	sp, #16
 80255b8:	af00      	add	r7, sp, #0
 80255ba:	6078      	str	r0, [r7, #4]
 80255bc:	6039      	str	r1, [r7, #0]
#if ! IP_REASS_FREE_OLDEST
  LWIP_UNUSED_ARG(clen);
#endif

  /* No matching previous fragment found, allocate a new reassdata struct */
  ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA);
 80255be:	2004      	movs	r0, #4
 80255c0:	f7f4 f830 	bl	8019624 <memp_malloc>
 80255c4:	60f8      	str	r0, [r7, #12]
  if (ipr == NULL) {
 80255c6:	68fb      	ldr	r3, [r7, #12]
 80255c8:	2b00      	cmp	r3, #0
 80255ca:	d110      	bne.n	80255ee <ip_reass_enqueue_new_datagram+0x3a>
#if IP_REASS_FREE_OLDEST
    if (ip_reass_remove_oldest_datagram(fraghdr, clen) >= clen) {
 80255cc:	6839      	ldr	r1, [r7, #0]
 80255ce:	6878      	ldr	r0, [r7, #4]
 80255d0:	f7ff ff8e 	bl	80254f0 <ip_reass_remove_oldest_datagram>
 80255d4:	4602      	mov	r2, r0
 80255d6:	683b      	ldr	r3, [r7, #0]
 80255d8:	4293      	cmp	r3, r2
 80255da:	dc03      	bgt.n	80255e4 <ip_reass_enqueue_new_datagram+0x30>
      ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA);
 80255dc:	2004      	movs	r0, #4
 80255de:	f7f4 f821 	bl	8019624 <memp_malloc>
 80255e2:	60f8      	str	r0, [r7, #12]
    }
    if (ipr == NULL)
 80255e4:	68fb      	ldr	r3, [r7, #12]
 80255e6:	2b00      	cmp	r3, #0
 80255e8:	d101      	bne.n	80255ee <ip_reass_enqueue_new_datagram+0x3a>
#endif /* IP_REASS_FREE_OLDEST */
    {
      IPFRAG_STATS_INC(ip_frag.memerr);
      LWIP_DEBUGF(IP_REASS_DEBUG, ("Failed to alloc reassdata struct\n"));
      return NULL;
 80255ea:	2300      	movs	r3, #0
 80255ec:	e016      	b.n	802561c <ip_reass_enqueue_new_datagram+0x68>
    }
  }
  memset(ipr, 0, sizeof(struct ip_reassdata));
 80255ee:	2220      	movs	r2, #32
 80255f0:	2100      	movs	r1, #0
 80255f2:	68f8      	ldr	r0, [r7, #12]
 80255f4:	f004 fb84 	bl	8029d00 <memset>
  ipr->timer = IP_REASS_MAXAGE;
 80255f8:	68fb      	ldr	r3, [r7, #12]
 80255fa:	220f      	movs	r2, #15
 80255fc:	77da      	strb	r2, [r3, #31]

  /* enqueue the new structure to the front of the list */
  ipr->next = reassdatagrams;
 80255fe:	4b09      	ldr	r3, [pc, #36]	@ (8025624 <ip_reass_enqueue_new_datagram+0x70>)
 8025600:	681a      	ldr	r2, [r3, #0]
 8025602:	68fb      	ldr	r3, [r7, #12]
 8025604:	601a      	str	r2, [r3, #0]
  reassdatagrams = ipr;
 8025606:	4a07      	ldr	r2, [pc, #28]	@ (8025624 <ip_reass_enqueue_new_datagram+0x70>)
 8025608:	68fb      	ldr	r3, [r7, #12]
 802560a:	6013      	str	r3, [r2, #0]
  /* copy the ip header for later tests and input */
  /* @todo: no ip options supported? */
  SMEMCPY(&(ipr->iphdr), fraghdr, IP_HLEN);
 802560c:	68fb      	ldr	r3, [r7, #12]
 802560e:	3308      	adds	r3, #8
 8025610:	2214      	movs	r2, #20
 8025612:	6879      	ldr	r1, [r7, #4]
 8025614:	4618      	mov	r0, r3
 8025616:	f004 fc6a 	bl	8029eee <memcpy>
  return ipr;
 802561a:	68fb      	ldr	r3, [r7, #12]
}
 802561c:	4618      	mov	r0, r3
 802561e:	3710      	adds	r7, #16
 8025620:	46bd      	mov	sp, r7
 8025622:	bd80      	pop	{r7, pc}
 8025624:	2402b024 	.word	0x2402b024

08025628 <ip_reass_dequeue_datagram>:
 * Dequeues a datagram from the datagram queue. Doesn't deallocate the pbufs.
 * @param ipr points to the queue entry to dequeue
 */
static void
ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
{
 8025628:	b580      	push	{r7, lr}
 802562a:	b082      	sub	sp, #8
 802562c:	af00      	add	r7, sp, #0
 802562e:	6078      	str	r0, [r7, #4]
 8025630:	6039      	str	r1, [r7, #0]
  /* dequeue the reass struct  */
  if (reassdatagrams == ipr) {
 8025632:	4b10      	ldr	r3, [pc, #64]	@ (8025674 <ip_reass_dequeue_datagram+0x4c>)
 8025634:	681b      	ldr	r3, [r3, #0]
 8025636:	687a      	ldr	r2, [r7, #4]
 8025638:	429a      	cmp	r2, r3
 802563a:	d104      	bne.n	8025646 <ip_reass_dequeue_datagram+0x1e>
    /* it was the first in the list */
    reassdatagrams = ipr->next;
 802563c:	687b      	ldr	r3, [r7, #4]
 802563e:	681b      	ldr	r3, [r3, #0]
 8025640:	4a0c      	ldr	r2, [pc, #48]	@ (8025674 <ip_reass_dequeue_datagram+0x4c>)
 8025642:	6013      	str	r3, [r2, #0]
 8025644:	e00d      	b.n	8025662 <ip_reass_dequeue_datagram+0x3a>
  } else {
    /* it wasn't the first, so it must have a valid 'prev' */
    LWIP_ASSERT("sanity check linked list", prev != NULL);
 8025646:	683b      	ldr	r3, [r7, #0]
 8025648:	2b00      	cmp	r3, #0
 802564a:	d106      	bne.n	802565a <ip_reass_dequeue_datagram+0x32>
 802564c:	4b0a      	ldr	r3, [pc, #40]	@ (8025678 <ip_reass_dequeue_datagram+0x50>)
 802564e:	f240 1245 	movw	r2, #325	@ 0x145
 8025652:	490a      	ldr	r1, [pc, #40]	@ (802567c <ip_reass_dequeue_datagram+0x54>)
 8025654:	480a      	ldr	r0, [pc, #40]	@ (8025680 <ip_reass_dequeue_datagram+0x58>)
 8025656:	f004 f9c1 	bl	80299dc <iprintf>
    prev->next = ipr->next;
 802565a:	687b      	ldr	r3, [r7, #4]
 802565c:	681a      	ldr	r2, [r3, #0]
 802565e:	683b      	ldr	r3, [r7, #0]
 8025660:	601a      	str	r2, [r3, #0]
  }

  /* now we can free the ip_reassdata struct */
  memp_free(MEMP_REASSDATA, ipr);
 8025662:	6879      	ldr	r1, [r7, #4]
 8025664:	2004      	movs	r0, #4
 8025666:	f7f4 f853 	bl	8019710 <memp_free>
}
 802566a:	bf00      	nop
 802566c:	3708      	adds	r7, #8
 802566e:	46bd      	mov	sp, r7
 8025670:	bd80      	pop	{r7, pc}
 8025672:	bf00      	nop
 8025674:	2402b024 	.word	0x2402b024
 8025678:	080306b4 	.word	0x080306b4
 802567c:	0803077c 	.word	0x0803077c
 8025680:	080306fc 	.word	0x080306fc

08025684 <ip_reass_chain_frag_into_datagram_and_validate>:
 * @param is_last is 1 if this pbuf has MF==0 (ipr->flags not updated yet)
 * @return see IP_REASS_VALIDATE_* defines
 */
static int
ip_reass_chain_frag_into_datagram_and_validate(struct ip_reassdata *ipr, struct pbuf *new_p, int is_last)
{
 8025684:	b580      	push	{r7, lr}
 8025686:	b08c      	sub	sp, #48	@ 0x30
 8025688:	af00      	add	r7, sp, #0
 802568a:	60f8      	str	r0, [r7, #12]
 802568c:	60b9      	str	r1, [r7, #8]
 802568e:	607a      	str	r2, [r7, #4]
  struct ip_reass_helper *iprh, *iprh_tmp, *iprh_prev = NULL;
 8025690:	2300      	movs	r3, #0
 8025692:	62bb      	str	r3, [r7, #40]	@ 0x28
  struct pbuf *q;
  u16_t offset, len;
  u8_t hlen;
  struct ip_hdr *fraghdr;
  int valid = 1;
 8025694:	2301      	movs	r3, #1
 8025696:	623b      	str	r3, [r7, #32]

  /* Extract length and fragment offset from current fragment */
  fraghdr = (struct ip_hdr *)new_p->payload;
 8025698:	68bb      	ldr	r3, [r7, #8]
 802569a:	685b      	ldr	r3, [r3, #4]
 802569c:	61fb      	str	r3, [r7, #28]
  len = lwip_ntohs(IPH_LEN(fraghdr));
 802569e:	69fb      	ldr	r3, [r7, #28]
 80256a0:	885b      	ldrh	r3, [r3, #2]
 80256a2:	b29b      	uxth	r3, r3
 80256a4:	4618      	mov	r0, r3
 80256a6:	f7f3 fa3f 	bl	8018b28 <lwip_htons>
 80256aa:	4603      	mov	r3, r0
 80256ac:	837b      	strh	r3, [r7, #26]
  hlen = IPH_HL_BYTES(fraghdr);
 80256ae:	69fb      	ldr	r3, [r7, #28]
 80256b0:	781b      	ldrb	r3, [r3, #0]
 80256b2:	f003 030f 	and.w	r3, r3, #15
 80256b6:	b2db      	uxtb	r3, r3
 80256b8:	009b      	lsls	r3, r3, #2
 80256ba:	767b      	strb	r3, [r7, #25]
  if (hlen > len) {
 80256bc:	7e7b      	ldrb	r3, [r7, #25]
 80256be:	b29b      	uxth	r3, r3
 80256c0:	8b7a      	ldrh	r2, [r7, #26]
 80256c2:	429a      	cmp	r2, r3
 80256c4:	d202      	bcs.n	80256cc <ip_reass_chain_frag_into_datagram_and_validate+0x48>
    /* invalid datagram */
    return IP_REASS_VALIDATE_PBUF_DROPPED;
 80256c6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80256ca:	e135      	b.n	8025938 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }
  len = (u16_t)(len - hlen);
 80256cc:	7e7b      	ldrb	r3, [r7, #25]
 80256ce:	b29b      	uxth	r3, r3
 80256d0:	8b7a      	ldrh	r2, [r7, #26]
 80256d2:	1ad3      	subs	r3, r2, r3
 80256d4:	837b      	strh	r3, [r7, #26]
  offset = IPH_OFFSET_BYTES(fraghdr);
 80256d6:	69fb      	ldr	r3, [r7, #28]
 80256d8:	88db      	ldrh	r3, [r3, #6]
 80256da:	b29b      	uxth	r3, r3
 80256dc:	4618      	mov	r0, r3
 80256de:	f7f3 fa23 	bl	8018b28 <lwip_htons>
 80256e2:	4603      	mov	r3, r0
 80256e4:	f3c3 030c 	ubfx	r3, r3, #0, #13
 80256e8:	b29b      	uxth	r3, r3
 80256ea:	00db      	lsls	r3, r3, #3
 80256ec:	82fb      	strh	r3, [r7, #22]
  /* overwrite the fragment's ip header from the pbuf with our helper struct,
   * and setup the embedded helper structure. */
  /* make sure the struct ip_reass_helper fits into the IP header */
  LWIP_ASSERT("sizeof(struct ip_reass_helper) <= IP_HLEN",
              sizeof(struct ip_reass_helper) <= IP_HLEN);
  iprh = (struct ip_reass_helper *)new_p->payload;
 80256ee:	68bb      	ldr	r3, [r7, #8]
 80256f0:	685b      	ldr	r3, [r3, #4]
 80256f2:	62fb      	str	r3, [r7, #44]	@ 0x2c
  iprh->next_pbuf = NULL;
 80256f4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80256f6:	2200      	movs	r2, #0
 80256f8:	701a      	strb	r2, [r3, #0]
 80256fa:	2200      	movs	r2, #0
 80256fc:	705a      	strb	r2, [r3, #1]
 80256fe:	2200      	movs	r2, #0
 8025700:	709a      	strb	r2, [r3, #2]
 8025702:	2200      	movs	r2, #0
 8025704:	70da      	strb	r2, [r3, #3]
  iprh->start = offset;
 8025706:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025708:	8afa      	ldrh	r2, [r7, #22]
 802570a:	809a      	strh	r2, [r3, #4]
  iprh->end = (u16_t)(offset + len);
 802570c:	8afa      	ldrh	r2, [r7, #22]
 802570e:	8b7b      	ldrh	r3, [r7, #26]
 8025710:	4413      	add	r3, r2
 8025712:	b29a      	uxth	r2, r3
 8025714:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025716:	80da      	strh	r2, [r3, #6]
  if (iprh->end < offset) {
 8025718:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802571a:	88db      	ldrh	r3, [r3, #6]
 802571c:	b29b      	uxth	r3, r3
 802571e:	8afa      	ldrh	r2, [r7, #22]
 8025720:	429a      	cmp	r2, r3
 8025722:	d902      	bls.n	802572a <ip_reass_chain_frag_into_datagram_and_validate+0xa6>
    /* u16_t overflow, cannot handle this */
    return IP_REASS_VALIDATE_PBUF_DROPPED;
 8025724:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025728:	e106      	b.n	8025938 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }

  /* Iterate through until we either get to the end of the list (append),
   * or we find one with a larger offset (insert). */
  for (q = ipr->p; q != NULL;) {
 802572a:	68fb      	ldr	r3, [r7, #12]
 802572c:	685b      	ldr	r3, [r3, #4]
 802572e:	627b      	str	r3, [r7, #36]	@ 0x24
 8025730:	e068      	b.n	8025804 <ip_reass_chain_frag_into_datagram_and_validate+0x180>
    iprh_tmp = (struct ip_reass_helper *)q->payload;
 8025732:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025734:	685b      	ldr	r3, [r3, #4]
 8025736:	613b      	str	r3, [r7, #16]
    if (iprh->start < iprh_tmp->start) {
 8025738:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802573a:	889b      	ldrh	r3, [r3, #4]
 802573c:	b29a      	uxth	r2, r3
 802573e:	693b      	ldr	r3, [r7, #16]
 8025740:	889b      	ldrh	r3, [r3, #4]
 8025742:	b29b      	uxth	r3, r3
 8025744:	429a      	cmp	r2, r3
 8025746:	d235      	bcs.n	80257b4 <ip_reass_chain_frag_into_datagram_and_validate+0x130>
      /* the new pbuf should be inserted before this */
      iprh->next_pbuf = q;
 8025748:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802574a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802574c:	601a      	str	r2, [r3, #0]
      if (iprh_prev != NULL) {
 802574e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025750:	2b00      	cmp	r3, #0
 8025752:	d020      	beq.n	8025796 <ip_reass_chain_frag_into_datagram_and_validate+0x112>
        /* not the fragment with the lowest offset */
#if IP_REASS_CHECK_OVERLAP
        if ((iprh->start < iprh_prev->end) || (iprh->end > iprh_tmp->start)) {
 8025754:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025756:	889b      	ldrh	r3, [r3, #4]
 8025758:	b29a      	uxth	r2, r3
 802575a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802575c:	88db      	ldrh	r3, [r3, #6]
 802575e:	b29b      	uxth	r3, r3
 8025760:	429a      	cmp	r2, r3
 8025762:	d307      	bcc.n	8025774 <ip_reass_chain_frag_into_datagram_and_validate+0xf0>
 8025764:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025766:	88db      	ldrh	r3, [r3, #6]
 8025768:	b29a      	uxth	r2, r3
 802576a:	693b      	ldr	r3, [r7, #16]
 802576c:	889b      	ldrh	r3, [r3, #4]
 802576e:	b29b      	uxth	r3, r3
 8025770:	429a      	cmp	r2, r3
 8025772:	d902      	bls.n	802577a <ip_reass_chain_frag_into_datagram_and_validate+0xf6>
          /* fragment overlaps with previous or following, throw away */
          return IP_REASS_VALIDATE_PBUF_DROPPED;
 8025774:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025778:	e0de      	b.n	8025938 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
        }
#endif /* IP_REASS_CHECK_OVERLAP */
        iprh_prev->next_pbuf = new_p;
 802577a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802577c:	68ba      	ldr	r2, [r7, #8]
 802577e:	601a      	str	r2, [r3, #0]
        if (iprh_prev->end != iprh->start) {
 8025780:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025782:	88db      	ldrh	r3, [r3, #6]
 8025784:	b29a      	uxth	r2, r3
 8025786:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025788:	889b      	ldrh	r3, [r3, #4]
 802578a:	b29b      	uxth	r3, r3
 802578c:	429a      	cmp	r2, r3
 802578e:	d03d      	beq.n	802580c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
          /* There is a fragment missing between the current
           * and the previous fragment */
          valid = 0;
 8025790:	2300      	movs	r3, #0
 8025792:	623b      	str	r3, [r7, #32]
        }
#endif /* IP_REASS_CHECK_OVERLAP */
        /* fragment with the lowest offset */
        ipr->p = new_p;
      }
      break;
 8025794:	e03a      	b.n	802580c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
        if (iprh->end > iprh_tmp->start) {
 8025796:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025798:	88db      	ldrh	r3, [r3, #6]
 802579a:	b29a      	uxth	r2, r3
 802579c:	693b      	ldr	r3, [r7, #16]
 802579e:	889b      	ldrh	r3, [r3, #4]
 80257a0:	b29b      	uxth	r3, r3
 80257a2:	429a      	cmp	r2, r3
 80257a4:	d902      	bls.n	80257ac <ip_reass_chain_frag_into_datagram_and_validate+0x128>
          return IP_REASS_VALIDATE_PBUF_DROPPED;
 80257a6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80257aa:	e0c5      	b.n	8025938 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
        ipr->p = new_p;
 80257ac:	68fb      	ldr	r3, [r7, #12]
 80257ae:	68ba      	ldr	r2, [r7, #8]
 80257b0:	605a      	str	r2, [r3, #4]
      break;
 80257b2:	e02b      	b.n	802580c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
    } else if (iprh->start == iprh_tmp->start) {
 80257b4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80257b6:	889b      	ldrh	r3, [r3, #4]
 80257b8:	b29a      	uxth	r2, r3
 80257ba:	693b      	ldr	r3, [r7, #16]
 80257bc:	889b      	ldrh	r3, [r3, #4]
 80257be:	b29b      	uxth	r3, r3
 80257c0:	429a      	cmp	r2, r3
 80257c2:	d102      	bne.n	80257ca <ip_reass_chain_frag_into_datagram_and_validate+0x146>
      /* received the same datagram twice: no need to keep the datagram */
      return IP_REASS_VALIDATE_PBUF_DROPPED;
 80257c4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80257c8:	e0b6      	b.n	8025938 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
#if IP_REASS_CHECK_OVERLAP
    } else if (iprh->start < iprh_tmp->end) {
 80257ca:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80257cc:	889b      	ldrh	r3, [r3, #4]
 80257ce:	b29a      	uxth	r2, r3
 80257d0:	693b      	ldr	r3, [r7, #16]
 80257d2:	88db      	ldrh	r3, [r3, #6]
 80257d4:	b29b      	uxth	r3, r3
 80257d6:	429a      	cmp	r2, r3
 80257d8:	d202      	bcs.n	80257e0 <ip_reass_chain_frag_into_datagram_and_validate+0x15c>
      /* overlap: no need to keep the new datagram */
      return IP_REASS_VALIDATE_PBUF_DROPPED;
 80257da:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80257de:	e0ab      	b.n	8025938 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
#endif /* IP_REASS_CHECK_OVERLAP */
    } else {
      /* Check if the fragments received so far have no holes. */
      if (iprh_prev != NULL) {
 80257e0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80257e2:	2b00      	cmp	r3, #0
 80257e4:	d009      	beq.n	80257fa <ip_reass_chain_frag_into_datagram_and_validate+0x176>
        if (iprh_prev->end != iprh_tmp->start) {
 80257e6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80257e8:	88db      	ldrh	r3, [r3, #6]
 80257ea:	b29a      	uxth	r2, r3
 80257ec:	693b      	ldr	r3, [r7, #16]
 80257ee:	889b      	ldrh	r3, [r3, #4]
 80257f0:	b29b      	uxth	r3, r3
 80257f2:	429a      	cmp	r2, r3
 80257f4:	d001      	beq.n	80257fa <ip_reass_chain_frag_into_datagram_and_validate+0x176>
          /* There is a fragment missing between the current
           * and the previous fragment */
          valid = 0;
 80257f6:	2300      	movs	r3, #0
 80257f8:	623b      	str	r3, [r7, #32]
        }
      }
    }
    q = iprh_tmp->next_pbuf;
 80257fa:	693b      	ldr	r3, [r7, #16]
 80257fc:	681b      	ldr	r3, [r3, #0]
 80257fe:	627b      	str	r3, [r7, #36]	@ 0x24
    iprh_prev = iprh_tmp;
 8025800:	693b      	ldr	r3, [r7, #16]
 8025802:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (q = ipr->p; q != NULL;) {
 8025804:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025806:	2b00      	cmp	r3, #0
 8025808:	d193      	bne.n	8025732 <ip_reass_chain_frag_into_datagram_and_validate+0xae>
 802580a:	e000      	b.n	802580e <ip_reass_chain_frag_into_datagram_and_validate+0x18a>
      break;
 802580c:	bf00      	nop
  }

  /* If q is NULL, then we made it to the end of the list. Determine what to do now */
  if (q == NULL) {
 802580e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025810:	2b00      	cmp	r3, #0
 8025812:	d12d      	bne.n	8025870 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
    if (iprh_prev != NULL) {
 8025814:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025816:	2b00      	cmp	r3, #0
 8025818:	d01c      	beq.n	8025854 <ip_reass_chain_frag_into_datagram_and_validate+0x1d0>
      /* this is (for now), the fragment with the highest offset:
       * chain it to the last fragment */
#if IP_REASS_CHECK_OVERLAP
      LWIP_ASSERT("check fragments don't overlap", iprh_prev->end <= iprh->start);
 802581a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802581c:	88db      	ldrh	r3, [r3, #6]
 802581e:	b29a      	uxth	r2, r3
 8025820:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025822:	889b      	ldrh	r3, [r3, #4]
 8025824:	b29b      	uxth	r3, r3
 8025826:	429a      	cmp	r2, r3
 8025828:	d906      	bls.n	8025838 <ip_reass_chain_frag_into_datagram_and_validate+0x1b4>
 802582a:	4b45      	ldr	r3, [pc, #276]	@ (8025940 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 802582c:	f44f 72db 	mov.w	r2, #438	@ 0x1b6
 8025830:	4944      	ldr	r1, [pc, #272]	@ (8025944 <ip_reass_chain_frag_into_datagram_and_validate+0x2c0>)
 8025832:	4845      	ldr	r0, [pc, #276]	@ (8025948 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 8025834:	f004 f8d2 	bl	80299dc <iprintf>
#endif /* IP_REASS_CHECK_OVERLAP */
      iprh_prev->next_pbuf = new_p;
 8025838:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802583a:	68ba      	ldr	r2, [r7, #8]
 802583c:	601a      	str	r2, [r3, #0]
      if (iprh_prev->end != iprh->start) {
 802583e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025840:	88db      	ldrh	r3, [r3, #6]
 8025842:	b29a      	uxth	r2, r3
 8025844:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025846:	889b      	ldrh	r3, [r3, #4]
 8025848:	b29b      	uxth	r3, r3
 802584a:	429a      	cmp	r2, r3
 802584c:	d010      	beq.n	8025870 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
        valid = 0;
 802584e:	2300      	movs	r3, #0
 8025850:	623b      	str	r3, [r7, #32]
 8025852:	e00d      	b.n	8025870 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
      }
    } else {
#if IP_REASS_CHECK_OVERLAP
      LWIP_ASSERT("no previous fragment, this must be the first fragment!",
 8025854:	68fb      	ldr	r3, [r7, #12]
 8025856:	685b      	ldr	r3, [r3, #4]
 8025858:	2b00      	cmp	r3, #0
 802585a:	d006      	beq.n	802586a <ip_reass_chain_frag_into_datagram_and_validate+0x1e6>
 802585c:	4b38      	ldr	r3, [pc, #224]	@ (8025940 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 802585e:	f44f 72df 	mov.w	r2, #446	@ 0x1be
 8025862:	493a      	ldr	r1, [pc, #232]	@ (802594c <ip_reass_chain_frag_into_datagram_and_validate+0x2c8>)
 8025864:	4838      	ldr	r0, [pc, #224]	@ (8025948 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 8025866:	f004 f8b9 	bl	80299dc <iprintf>
                  ipr->p == NULL);
#endif /* IP_REASS_CHECK_OVERLAP */
      /* this is the first fragment we ever received for this ip datagram */
      ipr->p = new_p;
 802586a:	68fb      	ldr	r3, [r7, #12]
 802586c:	68ba      	ldr	r2, [r7, #8]
 802586e:	605a      	str	r2, [r3, #4]
    }
  }

  /* At this point, the validation part begins: */
  /* If we already received the last fragment */
  if (is_last || ((ipr->flags & IP_REASS_FLAG_LASTFRAG) != 0)) {
 8025870:	687b      	ldr	r3, [r7, #4]
 8025872:	2b00      	cmp	r3, #0
 8025874:	d105      	bne.n	8025882 <ip_reass_chain_frag_into_datagram_and_validate+0x1fe>
 8025876:	68fb      	ldr	r3, [r7, #12]
 8025878:	7f9b      	ldrb	r3, [r3, #30]
 802587a:	f003 0301 	and.w	r3, r3, #1
 802587e:	2b00      	cmp	r3, #0
 8025880:	d059      	beq.n	8025936 <ip_reass_chain_frag_into_datagram_and_validate+0x2b2>
    /* and had no holes so far */
    if (valid) {
 8025882:	6a3b      	ldr	r3, [r7, #32]
 8025884:	2b00      	cmp	r3, #0
 8025886:	d04f      	beq.n	8025928 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
      /* then check if the rest of the fragments is here */
      /* Check if the queue starts with the first datagram */
      if ((ipr->p == NULL) || (((struct ip_reass_helper *)ipr->p->payload)->start != 0)) {
 8025888:	68fb      	ldr	r3, [r7, #12]
 802588a:	685b      	ldr	r3, [r3, #4]
 802588c:	2b00      	cmp	r3, #0
 802588e:	d006      	beq.n	802589e <ip_reass_chain_frag_into_datagram_and_validate+0x21a>
 8025890:	68fb      	ldr	r3, [r7, #12]
 8025892:	685b      	ldr	r3, [r3, #4]
 8025894:	685b      	ldr	r3, [r3, #4]
 8025896:	889b      	ldrh	r3, [r3, #4]
 8025898:	b29b      	uxth	r3, r3
 802589a:	2b00      	cmp	r3, #0
 802589c:	d002      	beq.n	80258a4 <ip_reass_chain_frag_into_datagram_and_validate+0x220>
        valid = 0;
 802589e:	2300      	movs	r3, #0
 80258a0:	623b      	str	r3, [r7, #32]
 80258a2:	e041      	b.n	8025928 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
      } else {
        /* and check that there are no holes after this datagram */
        iprh_prev = iprh;
 80258a4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80258a6:	62bb      	str	r3, [r7, #40]	@ 0x28
        q = iprh->next_pbuf;
 80258a8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80258aa:	681b      	ldr	r3, [r3, #0]
 80258ac:	627b      	str	r3, [r7, #36]	@ 0x24
        while (q != NULL) {
 80258ae:	e012      	b.n	80258d6 <ip_reass_chain_frag_into_datagram_and_validate+0x252>
          iprh = (struct ip_reass_helper *)q->payload;
 80258b0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80258b2:	685b      	ldr	r3, [r3, #4]
 80258b4:	62fb      	str	r3, [r7, #44]	@ 0x2c
          if (iprh_prev->end != iprh->start) {
 80258b6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80258b8:	88db      	ldrh	r3, [r3, #6]
 80258ba:	b29a      	uxth	r2, r3
 80258bc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80258be:	889b      	ldrh	r3, [r3, #4]
 80258c0:	b29b      	uxth	r3, r3
 80258c2:	429a      	cmp	r2, r3
 80258c4:	d002      	beq.n	80258cc <ip_reass_chain_frag_into_datagram_and_validate+0x248>
            valid = 0;
 80258c6:	2300      	movs	r3, #0
 80258c8:	623b      	str	r3, [r7, #32]
            break;
 80258ca:	e007      	b.n	80258dc <ip_reass_chain_frag_into_datagram_and_validate+0x258>
          }
          iprh_prev = iprh;
 80258cc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80258ce:	62bb      	str	r3, [r7, #40]	@ 0x28
          q = iprh->next_pbuf;
 80258d0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80258d2:	681b      	ldr	r3, [r3, #0]
 80258d4:	627b      	str	r3, [r7, #36]	@ 0x24
        while (q != NULL) {
 80258d6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80258d8:	2b00      	cmp	r3, #0
 80258da:	d1e9      	bne.n	80258b0 <ip_reass_chain_frag_into_datagram_and_validate+0x22c>
        }
        /* if still valid, all fragments are received
         * (because to the MF==0 already arrived */
        if (valid) {
 80258dc:	6a3b      	ldr	r3, [r7, #32]
 80258de:	2b00      	cmp	r3, #0
 80258e0:	d022      	beq.n	8025928 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
          LWIP_ASSERT("sanity check", ipr->p != NULL);
 80258e2:	68fb      	ldr	r3, [r7, #12]
 80258e4:	685b      	ldr	r3, [r3, #4]
 80258e6:	2b00      	cmp	r3, #0
 80258e8:	d106      	bne.n	80258f8 <ip_reass_chain_frag_into_datagram_and_validate+0x274>
 80258ea:	4b15      	ldr	r3, [pc, #84]	@ (8025940 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 80258ec:	f240 12df 	movw	r2, #479	@ 0x1df
 80258f0:	4917      	ldr	r1, [pc, #92]	@ (8025950 <ip_reass_chain_frag_into_datagram_and_validate+0x2cc>)
 80258f2:	4815      	ldr	r0, [pc, #84]	@ (8025948 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 80258f4:	f004 f872 	bl	80299dc <iprintf>
          LWIP_ASSERT("sanity check",
 80258f8:	68fb      	ldr	r3, [r7, #12]
 80258fa:	685b      	ldr	r3, [r3, #4]
 80258fc:	685b      	ldr	r3, [r3, #4]
 80258fe:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8025900:	429a      	cmp	r2, r3
 8025902:	d106      	bne.n	8025912 <ip_reass_chain_frag_into_datagram_and_validate+0x28e>
 8025904:	4b0e      	ldr	r3, [pc, #56]	@ (8025940 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 8025906:	f44f 72f0 	mov.w	r2, #480	@ 0x1e0
 802590a:	4911      	ldr	r1, [pc, #68]	@ (8025950 <ip_reass_chain_frag_into_datagram_and_validate+0x2cc>)
 802590c:	480e      	ldr	r0, [pc, #56]	@ (8025948 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 802590e:	f004 f865 	bl	80299dc <iprintf>
                      ((struct ip_reass_helper *)ipr->p->payload) != iprh);
          LWIP_ASSERT("validate_datagram:next_pbuf!=NULL",
 8025912:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025914:	681b      	ldr	r3, [r3, #0]
 8025916:	2b00      	cmp	r3, #0
 8025918:	d006      	beq.n	8025928 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
 802591a:	4b09      	ldr	r3, [pc, #36]	@ (8025940 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 802591c:	f44f 72f1 	mov.w	r2, #482	@ 0x1e2
 8025920:	490c      	ldr	r1, [pc, #48]	@ (8025954 <ip_reass_chain_frag_into_datagram_and_validate+0x2d0>)
 8025922:	4809      	ldr	r0, [pc, #36]	@ (8025948 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 8025924:	f004 f85a 	bl	80299dc <iprintf>
      }
    }
    /* If valid is 0 here, there are some fragments missing in the middle
     * (since MF == 0 has already arrived). Such datagrams simply time out if
     * no more fragments are received... */
    return valid ? IP_REASS_VALIDATE_TELEGRAM_FINISHED : IP_REASS_VALIDATE_PBUF_QUEUED;
 8025928:	6a3b      	ldr	r3, [r7, #32]
 802592a:	2b00      	cmp	r3, #0
 802592c:	bf14      	ite	ne
 802592e:	2301      	movne	r3, #1
 8025930:	2300      	moveq	r3, #0
 8025932:	b2db      	uxtb	r3, r3
 8025934:	e000      	b.n	8025938 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }
  /* If we come here, not all fragments were received, yet! */
  return IP_REASS_VALIDATE_PBUF_QUEUED; /* not yet valid! */
 8025936:	2300      	movs	r3, #0
}
 8025938:	4618      	mov	r0, r3
 802593a:	3730      	adds	r7, #48	@ 0x30
 802593c:	46bd      	mov	sp, r7
 802593e:	bd80      	pop	{r7, pc}
 8025940:	080306b4 	.word	0x080306b4
 8025944:	08030798 	.word	0x08030798
 8025948:	080306fc 	.word	0x080306fc
 802594c:	080307b8 	.word	0x080307b8
 8025950:	080307f0 	.word	0x080307f0
 8025954:	08030800 	.word	0x08030800

08025958 <ip4_reass>:
 * @param p points to a pbuf chain of the fragment
 * @return NULL if reassembly is incomplete, ? otherwise
 */
struct pbuf *
ip4_reass(struct pbuf *p)
{
 8025958:	b580      	push	{r7, lr}
 802595a:	b08e      	sub	sp, #56	@ 0x38
 802595c:	af00      	add	r7, sp, #0
 802595e:	6078      	str	r0, [r7, #4]
  int is_last;

  IPFRAG_STATS_INC(ip_frag.recv);
  MIB2_STATS_INC(mib2.ipreasmreqds);

  fraghdr = (struct ip_hdr *)p->payload;
 8025960:	687b      	ldr	r3, [r7, #4]
 8025962:	685b      	ldr	r3, [r3, #4]
 8025964:	62bb      	str	r3, [r7, #40]	@ 0x28

  if (IPH_HL_BYTES(fraghdr) != IP_HLEN) {
 8025966:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025968:	781b      	ldrb	r3, [r3, #0]
 802596a:	f003 030f 	and.w	r3, r3, #15
 802596e:	b2db      	uxtb	r3, r3
 8025970:	009b      	lsls	r3, r3, #2
 8025972:	b2db      	uxtb	r3, r3
 8025974:	2b14      	cmp	r3, #20
 8025976:	f040 8171 	bne.w	8025c5c <ip4_reass+0x304>
    LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: IP options currently not supported!\n"));
    IPFRAG_STATS_INC(ip_frag.err);
    goto nullreturn;
  }

  offset = IPH_OFFSET_BYTES(fraghdr);
 802597a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802597c:	88db      	ldrh	r3, [r3, #6]
 802597e:	b29b      	uxth	r3, r3
 8025980:	4618      	mov	r0, r3
 8025982:	f7f3 f8d1 	bl	8018b28 <lwip_htons>
 8025986:	4603      	mov	r3, r0
 8025988:	f3c3 030c 	ubfx	r3, r3, #0, #13
 802598c:	b29b      	uxth	r3, r3
 802598e:	00db      	lsls	r3, r3, #3
 8025990:	84fb      	strh	r3, [r7, #38]	@ 0x26
  len = lwip_ntohs(IPH_LEN(fraghdr));
 8025992:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025994:	885b      	ldrh	r3, [r3, #2]
 8025996:	b29b      	uxth	r3, r3
 8025998:	4618      	mov	r0, r3
 802599a:	f7f3 f8c5 	bl	8018b28 <lwip_htons>
 802599e:	4603      	mov	r3, r0
 80259a0:	84bb      	strh	r3, [r7, #36]	@ 0x24
  hlen = IPH_HL_BYTES(fraghdr);
 80259a2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80259a4:	781b      	ldrb	r3, [r3, #0]
 80259a6:	f003 030f 	and.w	r3, r3, #15
 80259aa:	b2db      	uxtb	r3, r3
 80259ac:	009b      	lsls	r3, r3, #2
 80259ae:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  if (hlen > len) {
 80259b2:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80259b6:	b29b      	uxth	r3, r3
 80259b8:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 80259ba:	429a      	cmp	r2, r3
 80259bc:	f0c0 8150 	bcc.w	8025c60 <ip4_reass+0x308>
    /* invalid datagram */
    goto nullreturn;
  }
  len = (u16_t)(len - hlen);
 80259c0:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80259c4:	b29b      	uxth	r3, r3
 80259c6:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 80259c8:	1ad3      	subs	r3, r2, r3
 80259ca:	84bb      	strh	r3, [r7, #36]	@ 0x24

  /* Check if we are allowed to enqueue more datagrams. */
  clen = pbuf_clen(p);
 80259cc:	6878      	ldr	r0, [r7, #4]
 80259ce:	f7f4 fe1b 	bl	801a608 <pbuf_clen>
 80259d2:	4603      	mov	r3, r0
 80259d4:	843b      	strh	r3, [r7, #32]
  if ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS) {
 80259d6:	4b8c      	ldr	r3, [pc, #560]	@ (8025c08 <ip4_reass+0x2b0>)
 80259d8:	881b      	ldrh	r3, [r3, #0]
 80259da:	461a      	mov	r2, r3
 80259dc:	8c3b      	ldrh	r3, [r7, #32]
 80259de:	4413      	add	r3, r2
 80259e0:	2b0a      	cmp	r3, #10
 80259e2:	dd10      	ble.n	8025a06 <ip4_reass+0xae>
#if IP_REASS_FREE_OLDEST
    if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
 80259e4:	8c3b      	ldrh	r3, [r7, #32]
 80259e6:	4619      	mov	r1, r3
 80259e8:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 80259ea:	f7ff fd81 	bl	80254f0 <ip_reass_remove_oldest_datagram>
 80259ee:	4603      	mov	r3, r0
 80259f0:	2b00      	cmp	r3, #0
 80259f2:	f000 8137 	beq.w	8025c64 <ip4_reass+0x30c>
        ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS))
 80259f6:	4b84      	ldr	r3, [pc, #528]	@ (8025c08 <ip4_reass+0x2b0>)
 80259f8:	881b      	ldrh	r3, [r3, #0]
 80259fa:	461a      	mov	r2, r3
 80259fc:	8c3b      	ldrh	r3, [r7, #32]
 80259fe:	4413      	add	r3, r2
    if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
 8025a00:	2b0a      	cmp	r3, #10
 8025a02:	f300 812f 	bgt.w	8025c64 <ip4_reass+0x30c>
    }
  }

  /* Look for the datagram the fragment belongs to in the current datagram queue,
   * remembering the previous in the queue for later dequeueing. */
  for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
 8025a06:	4b81      	ldr	r3, [pc, #516]	@ (8025c0c <ip4_reass+0x2b4>)
 8025a08:	681b      	ldr	r3, [r3, #0]
 8025a0a:	633b      	str	r3, [r7, #48]	@ 0x30
 8025a0c:	e015      	b.n	8025a3a <ip4_reass+0xe2>
    /* Check if the incoming fragment matches the one currently present
       in the reassembly buffer. If so, we proceed with copying the
       fragment into the buffer. */
    if (IP_ADDRESSES_AND_ID_MATCH(&ipr->iphdr, fraghdr)) {
 8025a0e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025a10:	695a      	ldr	r2, [r3, #20]
 8025a12:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025a14:	68db      	ldr	r3, [r3, #12]
 8025a16:	429a      	cmp	r2, r3
 8025a18:	d10c      	bne.n	8025a34 <ip4_reass+0xdc>
 8025a1a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025a1c:	699a      	ldr	r2, [r3, #24]
 8025a1e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025a20:	691b      	ldr	r3, [r3, #16]
 8025a22:	429a      	cmp	r2, r3
 8025a24:	d106      	bne.n	8025a34 <ip4_reass+0xdc>
 8025a26:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025a28:	899a      	ldrh	r2, [r3, #12]
 8025a2a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025a2c:	889b      	ldrh	r3, [r3, #4]
 8025a2e:	b29b      	uxth	r3, r3
 8025a30:	429a      	cmp	r2, r3
 8025a32:	d006      	beq.n	8025a42 <ip4_reass+0xea>
  for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
 8025a34:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025a36:	681b      	ldr	r3, [r3, #0]
 8025a38:	633b      	str	r3, [r7, #48]	@ 0x30
 8025a3a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025a3c:	2b00      	cmp	r3, #0
 8025a3e:	d1e6      	bne.n	8025a0e <ip4_reass+0xb6>
 8025a40:	e000      	b.n	8025a44 <ip4_reass+0xec>
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: matching previous fragment ID=%"X16_F"\n",
                                   lwip_ntohs(IPH_ID(fraghdr))));
      IPFRAG_STATS_INC(ip_frag.cachehit);
      break;
 8025a42:	bf00      	nop
    }
  }

  if (ipr == NULL) {
 8025a44:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025a46:	2b00      	cmp	r3, #0
 8025a48:	d109      	bne.n	8025a5e <ip4_reass+0x106>
    /* Enqueue a new datagram into the datagram queue */
    ipr = ip_reass_enqueue_new_datagram(fraghdr, clen);
 8025a4a:	8c3b      	ldrh	r3, [r7, #32]
 8025a4c:	4619      	mov	r1, r3
 8025a4e:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8025a50:	f7ff fdb0 	bl	80255b4 <ip_reass_enqueue_new_datagram>
 8025a54:	6338      	str	r0, [r7, #48]	@ 0x30
    /* Bail if unable to enqueue */
    if (ipr == NULL) {
 8025a56:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025a58:	2b00      	cmp	r3, #0
 8025a5a:	d11c      	bne.n	8025a96 <ip4_reass+0x13e>
      goto nullreturn;
 8025a5c:	e105      	b.n	8025c6a <ip4_reass+0x312>
    }
  } else {
    if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
 8025a5e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025a60:	88db      	ldrh	r3, [r3, #6]
 8025a62:	b29b      	uxth	r3, r3
 8025a64:	4618      	mov	r0, r3
 8025a66:	f7f3 f85f 	bl	8018b28 <lwip_htons>
 8025a6a:	4603      	mov	r3, r0
 8025a6c:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8025a70:	2b00      	cmp	r3, #0
 8025a72:	d110      	bne.n	8025a96 <ip4_reass+0x13e>
        ((lwip_ntohs(IPH_OFFSET(&ipr->iphdr)) & IP_OFFMASK) != 0)) {
 8025a74:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025a76:	89db      	ldrh	r3, [r3, #14]
 8025a78:	4618      	mov	r0, r3
 8025a7a:	f7f3 f855 	bl	8018b28 <lwip_htons>
 8025a7e:	4603      	mov	r3, r0
 8025a80:	f3c3 030c 	ubfx	r3, r3, #0, #13
    if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
 8025a84:	2b00      	cmp	r3, #0
 8025a86:	d006      	beq.n	8025a96 <ip4_reass+0x13e>
      /* ipr->iphdr is not the header from the first fragment, but fraghdr is
       * -> copy fraghdr into ipr->iphdr since we want to have the header
       * of the first fragment (for ICMP time exceeded and later, for copying
       * all options, if supported)*/
      SMEMCPY(&ipr->iphdr, fraghdr, IP_HLEN);
 8025a88:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025a8a:	3308      	adds	r3, #8
 8025a8c:	2214      	movs	r2, #20
 8025a8e:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 8025a90:	4618      	mov	r0, r3
 8025a92:	f004 fa2c 	bl	8029eee <memcpy>

  /* At this point, we have either created a new entry or pointing
   * to an existing one */

  /* check for 'no more fragments', and update queue entry*/
  is_last = (IPH_OFFSET(fraghdr) & PP_NTOHS(IP_MF)) == 0;
 8025a96:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025a98:	88db      	ldrh	r3, [r3, #6]
 8025a9a:	b29b      	uxth	r3, r3
 8025a9c:	f003 0320 	and.w	r3, r3, #32
 8025aa0:	2b00      	cmp	r3, #0
 8025aa2:	bf0c      	ite	eq
 8025aa4:	2301      	moveq	r3, #1
 8025aa6:	2300      	movne	r3, #0
 8025aa8:	b2db      	uxtb	r3, r3
 8025aaa:	61fb      	str	r3, [r7, #28]
  if (is_last) {
 8025aac:	69fb      	ldr	r3, [r7, #28]
 8025aae:	2b00      	cmp	r3, #0
 8025ab0:	d00e      	beq.n	8025ad0 <ip4_reass+0x178>
    u16_t datagram_len = (u16_t)(offset + len);
 8025ab2:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 8025ab4:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8025ab6:	4413      	add	r3, r2
 8025ab8:	837b      	strh	r3, [r7, #26]
    if ((datagram_len < offset) || (datagram_len > (0xFFFF - IP_HLEN))) {
 8025aba:	8b7a      	ldrh	r2, [r7, #26]
 8025abc:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8025abe:	429a      	cmp	r2, r3
 8025ac0:	f0c0 80a0 	bcc.w	8025c04 <ip4_reass+0x2ac>
 8025ac4:	8b7b      	ldrh	r3, [r7, #26]
 8025ac6:	f64f 72eb 	movw	r2, #65515	@ 0xffeb
 8025aca:	4293      	cmp	r3, r2
 8025acc:	f200 809a 	bhi.w	8025c04 <ip4_reass+0x2ac>
      goto nullreturn_ipr;
    }
  }
  /* find the right place to insert this pbuf */
  /* @todo: trim pbufs if fragments are overlapping */
  valid = ip_reass_chain_frag_into_datagram_and_validate(ipr, p, is_last);
 8025ad0:	69fa      	ldr	r2, [r7, #28]
 8025ad2:	6879      	ldr	r1, [r7, #4]
 8025ad4:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8025ad6:	f7ff fdd5 	bl	8025684 <ip_reass_chain_frag_into_datagram_and_validate>
 8025ada:	6178      	str	r0, [r7, #20]
  if (valid == IP_REASS_VALIDATE_PBUF_DROPPED) {
 8025adc:	697b      	ldr	r3, [r7, #20]
 8025ade:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8025ae2:	f000 809b 	beq.w	8025c1c <ip4_reass+0x2c4>
  /* if we come here, the pbuf has been enqueued */

  /* Track the current number of pbufs current 'in-flight', in order to limit
     the number of fragments that may be enqueued at any one time
     (overflow checked by testing against IP_REASS_MAX_PBUFS) */
  ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount + clen);
 8025ae6:	4b48      	ldr	r3, [pc, #288]	@ (8025c08 <ip4_reass+0x2b0>)
 8025ae8:	881a      	ldrh	r2, [r3, #0]
 8025aea:	8c3b      	ldrh	r3, [r7, #32]
 8025aec:	4413      	add	r3, r2
 8025aee:	b29a      	uxth	r2, r3
 8025af0:	4b45      	ldr	r3, [pc, #276]	@ (8025c08 <ip4_reass+0x2b0>)
 8025af2:	801a      	strh	r2, [r3, #0]
  if (is_last) {
 8025af4:	69fb      	ldr	r3, [r7, #28]
 8025af6:	2b00      	cmp	r3, #0
 8025af8:	d00d      	beq.n	8025b16 <ip4_reass+0x1be>
    u16_t datagram_len = (u16_t)(offset + len);
 8025afa:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 8025afc:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8025afe:	4413      	add	r3, r2
 8025b00:	827b      	strh	r3, [r7, #18]
    ipr->datagram_len = datagram_len;
 8025b02:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025b04:	8a7a      	ldrh	r2, [r7, #18]
 8025b06:	839a      	strh	r2, [r3, #28]
    ipr->flags |= IP_REASS_FLAG_LASTFRAG;
 8025b08:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025b0a:	7f9b      	ldrb	r3, [r3, #30]
 8025b0c:	f043 0301 	orr.w	r3, r3, #1
 8025b10:	b2da      	uxtb	r2, r3
 8025b12:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025b14:	779a      	strb	r2, [r3, #30]
    LWIP_DEBUGF(IP_REASS_DEBUG,
                ("ip4_reass: last fragment seen, total len %"S16_F"\n",
                 ipr->datagram_len));
  }

  if (valid == IP_REASS_VALIDATE_TELEGRAM_FINISHED) {
 8025b16:	697b      	ldr	r3, [r7, #20]
 8025b18:	2b01      	cmp	r3, #1
 8025b1a:	d171      	bne.n	8025c00 <ip4_reass+0x2a8>
    struct ip_reassdata *ipr_prev;
    /* the totally last fragment (flag more fragments = 0) was received at least
     * once AND all fragments are received */
    u16_t datagram_len = (u16_t)(ipr->datagram_len + IP_HLEN);
 8025b1c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025b1e:	8b9b      	ldrh	r3, [r3, #28]
 8025b20:	3314      	adds	r3, #20
 8025b22:	823b      	strh	r3, [r7, #16]

    /* save the second pbuf before copying the header over the pointer */
    r = ((struct ip_reass_helper *)ipr->p->payload)->next_pbuf;
 8025b24:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025b26:	685b      	ldr	r3, [r3, #4]
 8025b28:	685b      	ldr	r3, [r3, #4]
 8025b2a:	681b      	ldr	r3, [r3, #0]
 8025b2c:	62fb      	str	r3, [r7, #44]	@ 0x2c

    /* copy the original ip header back to the first pbuf */
    fraghdr = (struct ip_hdr *)(ipr->p->payload);
 8025b2e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025b30:	685b      	ldr	r3, [r3, #4]
 8025b32:	685b      	ldr	r3, [r3, #4]
 8025b34:	62bb      	str	r3, [r7, #40]	@ 0x28
    SMEMCPY(fraghdr, &ipr->iphdr, IP_HLEN);
 8025b36:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025b38:	3308      	adds	r3, #8
 8025b3a:	2214      	movs	r2, #20
 8025b3c:	4619      	mov	r1, r3
 8025b3e:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8025b40:	f004 f9d5 	bl	8029eee <memcpy>
    IPH_LEN_SET(fraghdr, lwip_htons(datagram_len));
 8025b44:	8a3b      	ldrh	r3, [r7, #16]
 8025b46:	4618      	mov	r0, r3
 8025b48:	f7f2 ffee 	bl	8018b28 <lwip_htons>
 8025b4c:	4603      	mov	r3, r0
 8025b4e:	461a      	mov	r2, r3
 8025b50:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025b52:	805a      	strh	r2, [r3, #2]
    IPH_OFFSET_SET(fraghdr, 0);
 8025b54:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025b56:	2200      	movs	r2, #0
 8025b58:	719a      	strb	r2, [r3, #6]
 8025b5a:	2200      	movs	r2, #0
 8025b5c:	71da      	strb	r2, [r3, #7]
    IPH_CHKSUM_SET(fraghdr, 0);
 8025b5e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025b60:	2200      	movs	r2, #0
 8025b62:	729a      	strb	r2, [r3, #10]
 8025b64:	2200      	movs	r2, #0
 8025b66:	72da      	strb	r2, [r3, #11]
    IF__NETIF_CHECKSUM_ENABLED(ip_current_input_netif(), NETIF_CHECKSUM_GEN_IP) {
      IPH_CHKSUM_SET(fraghdr, inet_chksum(fraghdr, IP_HLEN));
    }
#endif /* CHECKSUM_GEN_IP */

    p = ipr->p;
 8025b68:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025b6a:	685b      	ldr	r3, [r3, #4]
 8025b6c:	607b      	str	r3, [r7, #4]

    /* chain together the pbufs contained within the reass_data list. */
    while (r != NULL) {
 8025b6e:	e00d      	b.n	8025b8c <ip4_reass+0x234>
      iprh = (struct ip_reass_helper *)r->payload;
 8025b70:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025b72:	685b      	ldr	r3, [r3, #4]
 8025b74:	60fb      	str	r3, [r7, #12]

      /* hide the ip header for every succeeding fragment */
      pbuf_remove_header(r, IP_HLEN);
 8025b76:	2114      	movs	r1, #20
 8025b78:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8025b7a:	f7f4 fbff 	bl	801a37c <pbuf_remove_header>
      pbuf_cat(p, r);
 8025b7e:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 8025b80:	6878      	ldr	r0, [r7, #4]
 8025b82:	f7f4 fd81 	bl	801a688 <pbuf_cat>
      r = iprh->next_pbuf;
 8025b86:	68fb      	ldr	r3, [r7, #12]
 8025b88:	681b      	ldr	r3, [r3, #0]
 8025b8a:	62fb      	str	r3, [r7, #44]	@ 0x2c
    while (r != NULL) {
 8025b8c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025b8e:	2b00      	cmp	r3, #0
 8025b90:	d1ee      	bne.n	8025b70 <ip4_reass+0x218>
    }

    /* find the previous entry in the linked list */
    if (ipr == reassdatagrams) {
 8025b92:	4b1e      	ldr	r3, [pc, #120]	@ (8025c0c <ip4_reass+0x2b4>)
 8025b94:	681b      	ldr	r3, [r3, #0]
 8025b96:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8025b98:	429a      	cmp	r2, r3
 8025b9a:	d102      	bne.n	8025ba2 <ip4_reass+0x24a>
      ipr_prev = NULL;
 8025b9c:	2300      	movs	r3, #0
 8025b9e:	637b      	str	r3, [r7, #52]	@ 0x34
 8025ba0:	e010      	b.n	8025bc4 <ip4_reass+0x26c>
    } else {
      for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) {
 8025ba2:	4b1a      	ldr	r3, [pc, #104]	@ (8025c0c <ip4_reass+0x2b4>)
 8025ba4:	681b      	ldr	r3, [r3, #0]
 8025ba6:	637b      	str	r3, [r7, #52]	@ 0x34
 8025ba8:	e007      	b.n	8025bba <ip4_reass+0x262>
        if (ipr_prev->next == ipr) {
 8025baa:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8025bac:	681b      	ldr	r3, [r3, #0]
 8025bae:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8025bb0:	429a      	cmp	r2, r3
 8025bb2:	d006      	beq.n	8025bc2 <ip4_reass+0x26a>
      for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) {
 8025bb4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8025bb6:	681b      	ldr	r3, [r3, #0]
 8025bb8:	637b      	str	r3, [r7, #52]	@ 0x34
 8025bba:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8025bbc:	2b00      	cmp	r3, #0
 8025bbe:	d1f4      	bne.n	8025baa <ip4_reass+0x252>
 8025bc0:	e000      	b.n	8025bc4 <ip4_reass+0x26c>
          break;
 8025bc2:	bf00      	nop
        }
      }
    }

    /* release the sources allocate for the fragment queue entry */
    ip_reass_dequeue_datagram(ipr, ipr_prev);
 8025bc4:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8025bc6:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8025bc8:	f7ff fd2e 	bl	8025628 <ip_reass_dequeue_datagram>

    /* and adjust the number of pbufs currently queued for reassembly. */
    clen = pbuf_clen(p);
 8025bcc:	6878      	ldr	r0, [r7, #4]
 8025bce:	f7f4 fd1b 	bl	801a608 <pbuf_clen>
 8025bd2:	4603      	mov	r3, r0
 8025bd4:	843b      	strh	r3, [r7, #32]
    LWIP_ASSERT("ip_reass_pbufcount >= clen", ip_reass_pbufcount >= clen);
 8025bd6:	4b0c      	ldr	r3, [pc, #48]	@ (8025c08 <ip4_reass+0x2b0>)
 8025bd8:	881b      	ldrh	r3, [r3, #0]
 8025bda:	8c3a      	ldrh	r2, [r7, #32]
 8025bdc:	429a      	cmp	r2, r3
 8025bde:	d906      	bls.n	8025bee <ip4_reass+0x296>
 8025be0:	4b0b      	ldr	r3, [pc, #44]	@ (8025c10 <ip4_reass+0x2b8>)
 8025be2:	f240 229b 	movw	r2, #667	@ 0x29b
 8025be6:	490b      	ldr	r1, [pc, #44]	@ (8025c14 <ip4_reass+0x2bc>)
 8025be8:	480b      	ldr	r0, [pc, #44]	@ (8025c18 <ip4_reass+0x2c0>)
 8025bea:	f003 fef7 	bl	80299dc <iprintf>
    ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - clen);
 8025bee:	4b06      	ldr	r3, [pc, #24]	@ (8025c08 <ip4_reass+0x2b0>)
 8025bf0:	881a      	ldrh	r2, [r3, #0]
 8025bf2:	8c3b      	ldrh	r3, [r7, #32]
 8025bf4:	1ad3      	subs	r3, r2, r3
 8025bf6:	b29a      	uxth	r2, r3
 8025bf8:	4b03      	ldr	r3, [pc, #12]	@ (8025c08 <ip4_reass+0x2b0>)
 8025bfa:	801a      	strh	r2, [r3, #0]

    MIB2_STATS_INC(mib2.ipreasmoks);

    /* Return the pbuf chain */
    return p;
 8025bfc:	687b      	ldr	r3, [r7, #4]
 8025bfe:	e038      	b.n	8025c72 <ip4_reass+0x31a>
  }
  /* the datagram is not (yet?) reassembled completely */
  LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_pbufcount: %d out\n", ip_reass_pbufcount));
  return NULL;
 8025c00:	2300      	movs	r3, #0
 8025c02:	e036      	b.n	8025c72 <ip4_reass+0x31a>
      goto nullreturn_ipr;
 8025c04:	bf00      	nop
 8025c06:	e00a      	b.n	8025c1e <ip4_reass+0x2c6>
 8025c08:	2402b028 	.word	0x2402b028
 8025c0c:	2402b024 	.word	0x2402b024
 8025c10:	080306b4 	.word	0x080306b4
 8025c14:	08030824 	.word	0x08030824
 8025c18:	080306fc 	.word	0x080306fc
    goto nullreturn_ipr;
 8025c1c:	bf00      	nop

nullreturn_ipr:
  LWIP_ASSERT("ipr != NULL", ipr != NULL);
 8025c1e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025c20:	2b00      	cmp	r3, #0
 8025c22:	d106      	bne.n	8025c32 <ip4_reass+0x2da>
 8025c24:	4b15      	ldr	r3, [pc, #84]	@ (8025c7c <ip4_reass+0x324>)
 8025c26:	f44f 722a 	mov.w	r2, #680	@ 0x2a8
 8025c2a:	4915      	ldr	r1, [pc, #84]	@ (8025c80 <ip4_reass+0x328>)
 8025c2c:	4815      	ldr	r0, [pc, #84]	@ (8025c84 <ip4_reass+0x32c>)
 8025c2e:	f003 fed5 	bl	80299dc <iprintf>
  if (ipr->p == NULL) {
 8025c32:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025c34:	685b      	ldr	r3, [r3, #4]
 8025c36:	2b00      	cmp	r3, #0
 8025c38:	d116      	bne.n	8025c68 <ip4_reass+0x310>
    /* dropped pbuf after creating a new datagram entry: remove the entry, too */
    LWIP_ASSERT("not firstalthough just enqueued", ipr == reassdatagrams);
 8025c3a:	4b13      	ldr	r3, [pc, #76]	@ (8025c88 <ip4_reass+0x330>)
 8025c3c:	681b      	ldr	r3, [r3, #0]
 8025c3e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8025c40:	429a      	cmp	r2, r3
 8025c42:	d006      	beq.n	8025c52 <ip4_reass+0x2fa>
 8025c44:	4b0d      	ldr	r3, [pc, #52]	@ (8025c7c <ip4_reass+0x324>)
 8025c46:	f240 22ab 	movw	r2, #683	@ 0x2ab
 8025c4a:	4910      	ldr	r1, [pc, #64]	@ (8025c8c <ip4_reass+0x334>)
 8025c4c:	480d      	ldr	r0, [pc, #52]	@ (8025c84 <ip4_reass+0x32c>)
 8025c4e:	f003 fec5 	bl	80299dc <iprintf>
    ip_reass_dequeue_datagram(ipr, NULL);
 8025c52:	2100      	movs	r1, #0
 8025c54:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8025c56:	f7ff fce7 	bl	8025628 <ip_reass_dequeue_datagram>
 8025c5a:	e006      	b.n	8025c6a <ip4_reass+0x312>
    goto nullreturn;
 8025c5c:	bf00      	nop
 8025c5e:	e004      	b.n	8025c6a <ip4_reass+0x312>
    goto nullreturn;
 8025c60:	bf00      	nop
 8025c62:	e002      	b.n	8025c6a <ip4_reass+0x312>
      goto nullreturn;
 8025c64:	bf00      	nop
 8025c66:	e000      	b.n	8025c6a <ip4_reass+0x312>
  }

nullreturn:
 8025c68:	bf00      	nop
  LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: nullreturn\n"));
  IPFRAG_STATS_INC(ip_frag.drop);
  pbuf_free(p);
 8025c6a:	6878      	ldr	r0, [r7, #4]
 8025c6c:	f7f4 fc3e 	bl	801a4ec <pbuf_free>
  return NULL;
 8025c70:	2300      	movs	r3, #0
}
 8025c72:	4618      	mov	r0, r3
 8025c74:	3738      	adds	r7, #56	@ 0x38
 8025c76:	46bd      	mov	sp, r7
 8025c78:	bd80      	pop	{r7, pc}
 8025c7a:	bf00      	nop
 8025c7c:	080306b4 	.word	0x080306b4
 8025c80:	08030840 	.word	0x08030840
 8025c84:	080306fc 	.word	0x080306fc
 8025c88:	2402b024 	.word	0x2402b024
 8025c8c:	0803084c 	.word	0x0803084c

08025c90 <ip_frag_alloc_pbuf_custom_ref>:
#if IP_FRAG
#if !LWIP_NETIF_TX_SINGLE_PBUF
/** Allocate a new struct pbuf_custom_ref */
static struct pbuf_custom_ref *
ip_frag_alloc_pbuf_custom_ref(void)
{
 8025c90:	b580      	push	{r7, lr}
 8025c92:	af00      	add	r7, sp, #0
  return (struct pbuf_custom_ref *)memp_malloc(MEMP_FRAG_PBUF);
 8025c94:	2005      	movs	r0, #5
 8025c96:	f7f3 fcc5 	bl	8019624 <memp_malloc>
 8025c9a:	4603      	mov	r3, r0
}
 8025c9c:	4618      	mov	r0, r3
 8025c9e:	bd80      	pop	{r7, pc}

08025ca0 <ip_frag_free_pbuf_custom_ref>:

/** Free a struct pbuf_custom_ref */
static void
ip_frag_free_pbuf_custom_ref(struct pbuf_custom_ref *p)
{
 8025ca0:	b580      	push	{r7, lr}
 8025ca2:	b082      	sub	sp, #8
 8025ca4:	af00      	add	r7, sp, #0
 8025ca6:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("p != NULL", p != NULL);
 8025ca8:	687b      	ldr	r3, [r7, #4]
 8025caa:	2b00      	cmp	r3, #0
 8025cac:	d106      	bne.n	8025cbc <ip_frag_free_pbuf_custom_ref+0x1c>
 8025cae:	4b07      	ldr	r3, [pc, #28]	@ (8025ccc <ip_frag_free_pbuf_custom_ref+0x2c>)
 8025cb0:	f44f 7231 	mov.w	r2, #708	@ 0x2c4
 8025cb4:	4906      	ldr	r1, [pc, #24]	@ (8025cd0 <ip_frag_free_pbuf_custom_ref+0x30>)
 8025cb6:	4807      	ldr	r0, [pc, #28]	@ (8025cd4 <ip_frag_free_pbuf_custom_ref+0x34>)
 8025cb8:	f003 fe90 	bl	80299dc <iprintf>
  memp_free(MEMP_FRAG_PBUF, p);
 8025cbc:	6879      	ldr	r1, [r7, #4]
 8025cbe:	2005      	movs	r0, #5
 8025cc0:	f7f3 fd26 	bl	8019710 <memp_free>
}
 8025cc4:	bf00      	nop
 8025cc6:	3708      	adds	r7, #8
 8025cc8:	46bd      	mov	sp, r7
 8025cca:	bd80      	pop	{r7, pc}
 8025ccc:	080306b4 	.word	0x080306b4
 8025cd0:	0803086c 	.word	0x0803086c
 8025cd4:	080306fc 	.word	0x080306fc

08025cd8 <ipfrag_free_pbuf_custom>:

/** Free-callback function to free a 'struct pbuf_custom_ref', called by
 * pbuf_free. */
static void
ipfrag_free_pbuf_custom(struct pbuf *p)
{
 8025cd8:	b580      	push	{r7, lr}
 8025cda:	b084      	sub	sp, #16
 8025cdc:	af00      	add	r7, sp, #0
 8025cde:	6078      	str	r0, [r7, #4]
  struct pbuf_custom_ref *pcr = (struct pbuf_custom_ref *)p;
 8025ce0:	687b      	ldr	r3, [r7, #4]
 8025ce2:	60fb      	str	r3, [r7, #12]
  LWIP_ASSERT("pcr != NULL", pcr != NULL);
 8025ce4:	68fb      	ldr	r3, [r7, #12]
 8025ce6:	2b00      	cmp	r3, #0
 8025ce8:	d106      	bne.n	8025cf8 <ipfrag_free_pbuf_custom+0x20>
 8025cea:	4b11      	ldr	r3, [pc, #68]	@ (8025d30 <ipfrag_free_pbuf_custom+0x58>)
 8025cec:	f240 22ce 	movw	r2, #718	@ 0x2ce
 8025cf0:	4910      	ldr	r1, [pc, #64]	@ (8025d34 <ipfrag_free_pbuf_custom+0x5c>)
 8025cf2:	4811      	ldr	r0, [pc, #68]	@ (8025d38 <ipfrag_free_pbuf_custom+0x60>)
 8025cf4:	f003 fe72 	bl	80299dc <iprintf>
  LWIP_ASSERT("pcr == p", (void *)pcr == (void *)p);
 8025cf8:	68fa      	ldr	r2, [r7, #12]
 8025cfa:	687b      	ldr	r3, [r7, #4]
 8025cfc:	429a      	cmp	r2, r3
 8025cfe:	d006      	beq.n	8025d0e <ipfrag_free_pbuf_custom+0x36>
 8025d00:	4b0b      	ldr	r3, [pc, #44]	@ (8025d30 <ipfrag_free_pbuf_custom+0x58>)
 8025d02:	f240 22cf 	movw	r2, #719	@ 0x2cf
 8025d06:	490d      	ldr	r1, [pc, #52]	@ (8025d3c <ipfrag_free_pbuf_custom+0x64>)
 8025d08:	480b      	ldr	r0, [pc, #44]	@ (8025d38 <ipfrag_free_pbuf_custom+0x60>)
 8025d0a:	f003 fe67 	bl	80299dc <iprintf>
  if (pcr->original != NULL) {
 8025d0e:	68fb      	ldr	r3, [r7, #12]
 8025d10:	695b      	ldr	r3, [r3, #20]
 8025d12:	2b00      	cmp	r3, #0
 8025d14:	d004      	beq.n	8025d20 <ipfrag_free_pbuf_custom+0x48>
    pbuf_free(pcr->original);
 8025d16:	68fb      	ldr	r3, [r7, #12]
 8025d18:	695b      	ldr	r3, [r3, #20]
 8025d1a:	4618      	mov	r0, r3
 8025d1c:	f7f4 fbe6 	bl	801a4ec <pbuf_free>
  }
  ip_frag_free_pbuf_custom_ref(pcr);
 8025d20:	68f8      	ldr	r0, [r7, #12]
 8025d22:	f7ff ffbd 	bl	8025ca0 <ip_frag_free_pbuf_custom_ref>
}
 8025d26:	bf00      	nop
 8025d28:	3710      	adds	r7, #16
 8025d2a:	46bd      	mov	sp, r7
 8025d2c:	bd80      	pop	{r7, pc}
 8025d2e:	bf00      	nop
 8025d30:	080306b4 	.word	0x080306b4
 8025d34:	08030878 	.word	0x08030878
 8025d38:	080306fc 	.word	0x080306fc
 8025d3c:	08030884 	.word	0x08030884

08025d40 <ip4_frag>:
 *
 * @return ERR_OK if sent successfully, err_t otherwise
 */
err_t
ip4_frag(struct pbuf *p, struct netif *netif, const ip4_addr_t *dest)
{
 8025d40:	b580      	push	{r7, lr}
 8025d42:	b094      	sub	sp, #80	@ 0x50
 8025d44:	af02      	add	r7, sp, #8
 8025d46:	60f8      	str	r0, [r7, #12]
 8025d48:	60b9      	str	r1, [r7, #8]
 8025d4a:	607a      	str	r2, [r7, #4]
  struct pbuf *rambuf;
#if !LWIP_NETIF_TX_SINGLE_PBUF
  struct pbuf *newpbuf;
  u16_t newpbuflen = 0;
 8025d4c:	2300      	movs	r3, #0
 8025d4e:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
  u16_t left_to_copy;
#endif
  struct ip_hdr *original_iphdr;
  struct ip_hdr *iphdr;
  const u16_t nfb = (u16_t)((netif->mtu - IP_HLEN) / 8);
 8025d52:	68bb      	ldr	r3, [r7, #8]
 8025d54:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8025d56:	3b14      	subs	r3, #20
 8025d58:	2b00      	cmp	r3, #0
 8025d5a:	da00      	bge.n	8025d5e <ip4_frag+0x1e>
 8025d5c:	3307      	adds	r3, #7
 8025d5e:	10db      	asrs	r3, r3, #3
 8025d60:	877b      	strh	r3, [r7, #58]	@ 0x3a
  u16_t left, fragsize;
  u16_t ofo;
  int last;
  u16_t poff = IP_HLEN;
 8025d62:	2314      	movs	r3, #20
 8025d64:	87fb      	strh	r3, [r7, #62]	@ 0x3e
  u16_t tmp;
  int mf_set;

  original_iphdr = (struct ip_hdr *)p->payload;
 8025d66:	68fb      	ldr	r3, [r7, #12]
 8025d68:	685b      	ldr	r3, [r3, #4]
 8025d6a:	637b      	str	r3, [r7, #52]	@ 0x34
  iphdr = original_iphdr;
 8025d6c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8025d6e:	633b      	str	r3, [r7, #48]	@ 0x30
  if (IPH_HL_BYTES(iphdr) != IP_HLEN) {
 8025d70:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025d72:	781b      	ldrb	r3, [r3, #0]
 8025d74:	f003 030f 	and.w	r3, r3, #15
 8025d78:	b2db      	uxtb	r3, r3
 8025d7a:	009b      	lsls	r3, r3, #2
 8025d7c:	b2db      	uxtb	r3, r3
 8025d7e:	2b14      	cmp	r3, #20
 8025d80:	d002      	beq.n	8025d88 <ip4_frag+0x48>
    /* ip4_frag() does not support IP options */
    return ERR_VAL;
 8025d82:	f06f 0305 	mvn.w	r3, #5
 8025d86:	e110      	b.n	8025faa <ip4_frag+0x26a>
  }
  LWIP_ERROR("ip4_frag(): pbuf too short", p->len >= IP_HLEN, return ERR_VAL);
 8025d88:	68fb      	ldr	r3, [r7, #12]
 8025d8a:	895b      	ldrh	r3, [r3, #10]
 8025d8c:	2b13      	cmp	r3, #19
 8025d8e:	d809      	bhi.n	8025da4 <ip4_frag+0x64>
 8025d90:	4b88      	ldr	r3, [pc, #544]	@ (8025fb4 <ip4_frag+0x274>)
 8025d92:	f44f 723f 	mov.w	r2, #764	@ 0x2fc
 8025d96:	4988      	ldr	r1, [pc, #544]	@ (8025fb8 <ip4_frag+0x278>)
 8025d98:	4888      	ldr	r0, [pc, #544]	@ (8025fbc <ip4_frag+0x27c>)
 8025d9a:	f003 fe1f 	bl	80299dc <iprintf>
 8025d9e:	f06f 0305 	mvn.w	r3, #5
 8025da2:	e102      	b.n	8025faa <ip4_frag+0x26a>

  /* Save original offset */
  tmp = lwip_ntohs(IPH_OFFSET(iphdr));
 8025da4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025da6:	88db      	ldrh	r3, [r3, #6]
 8025da8:	b29b      	uxth	r3, r3
 8025daa:	4618      	mov	r0, r3
 8025dac:	f7f2 febc 	bl	8018b28 <lwip_htons>
 8025db0:	4603      	mov	r3, r0
 8025db2:	87bb      	strh	r3, [r7, #60]	@ 0x3c
  ofo = tmp & IP_OFFMASK;
 8025db4:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8025db6:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8025dba:	f8a7 3040 	strh.w	r3, [r7, #64]	@ 0x40
  /* already fragmented? if so, the last fragment we create must have MF, too */
  mf_set = tmp & IP_MF;
 8025dbe:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8025dc0:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8025dc4:	62fb      	str	r3, [r7, #44]	@ 0x2c

  left = (u16_t)(p->tot_len - IP_HLEN);
 8025dc6:	68fb      	ldr	r3, [r7, #12]
 8025dc8:	891b      	ldrh	r3, [r3, #8]
 8025dca:	3b14      	subs	r3, #20
 8025dcc:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42

  while (left) {
 8025dd0:	e0e1      	b.n	8025f96 <ip4_frag+0x256>
    /* Fill this fragment */
    fragsize = LWIP_MIN(left, (u16_t)(nfb * 8));
 8025dd2:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8025dd4:	00db      	lsls	r3, r3, #3
 8025dd6:	b29b      	uxth	r3, r3
 8025dd8:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 8025ddc:	4293      	cmp	r3, r2
 8025dde:	bf28      	it	cs
 8025de0:	4613      	movcs	r3, r2
 8025de2:	857b      	strh	r3, [r7, #42]	@ 0x2a
    /* When not using a static buffer, create a chain of pbufs.
     * The first will be a PBUF_RAM holding the link and IP header.
     * The rest will be PBUF_REFs mirroring the pbuf chain to be fragged,
     * but limited to the size of an mtu.
     */
    rambuf = pbuf_alloc(PBUF_LINK, IP_HLEN, PBUF_RAM);
 8025de4:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8025de8:	2114      	movs	r1, #20
 8025dea:	200e      	movs	r0, #14
 8025dec:	f7f4 f868 	bl	8019ec0 <pbuf_alloc>
 8025df0:	6278      	str	r0, [r7, #36]	@ 0x24
    if (rambuf == NULL) {
 8025df2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025df4:	2b00      	cmp	r3, #0
 8025df6:	f000 80d5 	beq.w	8025fa4 <ip4_frag+0x264>
      goto memerr;
    }
    LWIP_ASSERT("this needs a pbuf in one piece!",
 8025dfa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025dfc:	895b      	ldrh	r3, [r3, #10]
 8025dfe:	2b13      	cmp	r3, #19
 8025e00:	d806      	bhi.n	8025e10 <ip4_frag+0xd0>
 8025e02:	4b6c      	ldr	r3, [pc, #432]	@ (8025fb4 <ip4_frag+0x274>)
 8025e04:	f44f 7249 	mov.w	r2, #804	@ 0x324
 8025e08:	496d      	ldr	r1, [pc, #436]	@ (8025fc0 <ip4_frag+0x280>)
 8025e0a:	486c      	ldr	r0, [pc, #432]	@ (8025fbc <ip4_frag+0x27c>)
 8025e0c:	f003 fde6 	bl	80299dc <iprintf>
                (rambuf->len >= (IP_HLEN)));
    SMEMCPY(rambuf->payload, original_iphdr, IP_HLEN);
 8025e10:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025e12:	685b      	ldr	r3, [r3, #4]
 8025e14:	2214      	movs	r2, #20
 8025e16:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8025e18:	4618      	mov	r0, r3
 8025e1a:	f004 f868 	bl	8029eee <memcpy>
    iphdr = (struct ip_hdr *)rambuf->payload;
 8025e1e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025e20:	685b      	ldr	r3, [r3, #4]
 8025e22:	633b      	str	r3, [r7, #48]	@ 0x30

    left_to_copy = fragsize;
 8025e24:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8025e26:	f8a7 3044 	strh.w	r3, [r7, #68]	@ 0x44
    while (left_to_copy) {
 8025e2a:	e064      	b.n	8025ef6 <ip4_frag+0x1b6>
      struct pbuf_custom_ref *pcr;
      u16_t plen = (u16_t)(p->len - poff);
 8025e2c:	68fb      	ldr	r3, [r7, #12]
 8025e2e:	895a      	ldrh	r2, [r3, #10]
 8025e30:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8025e32:	1ad3      	subs	r3, r2, r3
 8025e34:	83fb      	strh	r3, [r7, #30]
      LWIP_ASSERT("p->len >= poff", p->len >= poff);
 8025e36:	68fb      	ldr	r3, [r7, #12]
 8025e38:	895b      	ldrh	r3, [r3, #10]
 8025e3a:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 8025e3c:	429a      	cmp	r2, r3
 8025e3e:	d906      	bls.n	8025e4e <ip4_frag+0x10e>
 8025e40:	4b5c      	ldr	r3, [pc, #368]	@ (8025fb4 <ip4_frag+0x274>)
 8025e42:	f240 322d 	movw	r2, #813	@ 0x32d
 8025e46:	495f      	ldr	r1, [pc, #380]	@ (8025fc4 <ip4_frag+0x284>)
 8025e48:	485c      	ldr	r0, [pc, #368]	@ (8025fbc <ip4_frag+0x27c>)
 8025e4a:	f003 fdc7 	bl	80299dc <iprintf>
      newpbuflen = LWIP_MIN(left_to_copy, plen);
 8025e4e:	8bfa      	ldrh	r2, [r7, #30]
 8025e50:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 8025e54:	4293      	cmp	r3, r2
 8025e56:	bf28      	it	cs
 8025e58:	4613      	movcs	r3, r2
 8025e5a:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      /* Is this pbuf already empty? */
      if (!newpbuflen) {
 8025e5e:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8025e62:	2b00      	cmp	r3, #0
 8025e64:	d105      	bne.n	8025e72 <ip4_frag+0x132>
        poff = 0;
 8025e66:	2300      	movs	r3, #0
 8025e68:	87fb      	strh	r3, [r7, #62]	@ 0x3e
        p = p->next;
 8025e6a:	68fb      	ldr	r3, [r7, #12]
 8025e6c:	681b      	ldr	r3, [r3, #0]
 8025e6e:	60fb      	str	r3, [r7, #12]
        continue;
 8025e70:	e041      	b.n	8025ef6 <ip4_frag+0x1b6>
      }
      pcr = ip_frag_alloc_pbuf_custom_ref();
 8025e72:	f7ff ff0d 	bl	8025c90 <ip_frag_alloc_pbuf_custom_ref>
 8025e76:	61b8      	str	r0, [r7, #24]
      if (pcr == NULL) {
 8025e78:	69bb      	ldr	r3, [r7, #24]
 8025e7a:	2b00      	cmp	r3, #0
 8025e7c:	d103      	bne.n	8025e86 <ip4_frag+0x146>
        pbuf_free(rambuf);
 8025e7e:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8025e80:	f7f4 fb34 	bl	801a4ec <pbuf_free>
        goto memerr;
 8025e84:	e08f      	b.n	8025fa6 <ip4_frag+0x266>
      }
      /* Mirror this pbuf, although we might not need all of it. */
      newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc,
 8025e86:	69b8      	ldr	r0, [r7, #24]
                                    (u8_t *)p->payload + poff, newpbuflen);
 8025e88:	68fb      	ldr	r3, [r7, #12]
 8025e8a:	685a      	ldr	r2, [r3, #4]
      newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc,
 8025e8c:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8025e8e:	4413      	add	r3, r2
 8025e90:	f8b7 1046 	ldrh.w	r1, [r7, #70]	@ 0x46
 8025e94:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8025e98:	9201      	str	r2, [sp, #4]
 8025e9a:	9300      	str	r3, [sp, #0]
 8025e9c:	4603      	mov	r3, r0
 8025e9e:	2241      	movs	r2, #65	@ 0x41
 8025ea0:	2000      	movs	r0, #0
 8025ea2:	f7f4 f939 	bl	801a118 <pbuf_alloced_custom>
 8025ea6:	6178      	str	r0, [r7, #20]
      if (newpbuf == NULL) {
 8025ea8:	697b      	ldr	r3, [r7, #20]
 8025eaa:	2b00      	cmp	r3, #0
 8025eac:	d106      	bne.n	8025ebc <ip4_frag+0x17c>
        ip_frag_free_pbuf_custom_ref(pcr);
 8025eae:	69b8      	ldr	r0, [r7, #24]
 8025eb0:	f7ff fef6 	bl	8025ca0 <ip_frag_free_pbuf_custom_ref>
        pbuf_free(rambuf);
 8025eb4:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8025eb6:	f7f4 fb19 	bl	801a4ec <pbuf_free>
        goto memerr;
 8025eba:	e074      	b.n	8025fa6 <ip4_frag+0x266>
      }
      pbuf_ref(p);
 8025ebc:	68f8      	ldr	r0, [r7, #12]
 8025ebe:	f7f4 fbbb 	bl	801a638 <pbuf_ref>
      pcr->original = p;
 8025ec2:	69bb      	ldr	r3, [r7, #24]
 8025ec4:	68fa      	ldr	r2, [r7, #12]
 8025ec6:	615a      	str	r2, [r3, #20]
      pcr->pc.custom_free_function = ipfrag_free_pbuf_custom;
 8025ec8:	69bb      	ldr	r3, [r7, #24]
 8025eca:	4a3f      	ldr	r2, [pc, #252]	@ (8025fc8 <ip4_frag+0x288>)
 8025ecc:	611a      	str	r2, [r3, #16]

      /* Add it to end of rambuf's chain, but using pbuf_cat, not pbuf_chain
       * so that it is removed when pbuf_dechain is later called on rambuf.
       */
      pbuf_cat(rambuf, newpbuf);
 8025ece:	6979      	ldr	r1, [r7, #20]
 8025ed0:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8025ed2:	f7f4 fbd9 	bl	801a688 <pbuf_cat>
      left_to_copy = (u16_t)(left_to_copy - newpbuflen);
 8025ed6:	f8b7 2044 	ldrh.w	r2, [r7, #68]	@ 0x44
 8025eda:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8025ede:	1ad3      	subs	r3, r2, r3
 8025ee0:	f8a7 3044 	strh.w	r3, [r7, #68]	@ 0x44
      if (left_to_copy) {
 8025ee4:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 8025ee8:	2b00      	cmp	r3, #0
 8025eea:	d004      	beq.n	8025ef6 <ip4_frag+0x1b6>
        poff = 0;
 8025eec:	2300      	movs	r3, #0
 8025eee:	87fb      	strh	r3, [r7, #62]	@ 0x3e
        p = p->next;
 8025ef0:	68fb      	ldr	r3, [r7, #12]
 8025ef2:	681b      	ldr	r3, [r3, #0]
 8025ef4:	60fb      	str	r3, [r7, #12]
    while (left_to_copy) {
 8025ef6:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 8025efa:	2b00      	cmp	r3, #0
 8025efc:	d196      	bne.n	8025e2c <ip4_frag+0xec>
      }
    }
    poff = (u16_t)(poff + newpbuflen);
 8025efe:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 8025f00:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8025f04:	4413      	add	r3, r2
 8025f06:	87fb      	strh	r3, [r7, #62]	@ 0x3e
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */

    /* Correct header */
    last = (left <= netif->mtu - IP_HLEN);
 8025f08:	68bb      	ldr	r3, [r7, #8]
 8025f0a:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8025f0c:	f1a3 0213 	sub.w	r2, r3, #19
 8025f10:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 8025f14:	429a      	cmp	r2, r3
 8025f16:	bfcc      	ite	gt
 8025f18:	2301      	movgt	r3, #1
 8025f1a:	2300      	movle	r3, #0
 8025f1c:	b2db      	uxtb	r3, r3
 8025f1e:	623b      	str	r3, [r7, #32]

    /* Set new offset and MF flag */
    tmp = (IP_OFFMASK & (ofo));
 8025f20:	f8b7 3040 	ldrh.w	r3, [r7, #64]	@ 0x40
 8025f24:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8025f28:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    if (!last || mf_set) {
 8025f2a:	6a3b      	ldr	r3, [r7, #32]
 8025f2c:	2b00      	cmp	r3, #0
 8025f2e:	d002      	beq.n	8025f36 <ip4_frag+0x1f6>
 8025f30:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025f32:	2b00      	cmp	r3, #0
 8025f34:	d003      	beq.n	8025f3e <ip4_frag+0x1fe>
      /* the last fragment has MF set if the input frame had it */
      tmp = tmp | IP_MF;
 8025f36:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8025f38:	f443 5300 	orr.w	r3, r3, #8192	@ 0x2000
 8025f3c:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    }
    IPH_OFFSET_SET(iphdr, lwip_htons(tmp));
 8025f3e:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8025f40:	4618      	mov	r0, r3
 8025f42:	f7f2 fdf1 	bl	8018b28 <lwip_htons>
 8025f46:	4603      	mov	r3, r0
 8025f48:	461a      	mov	r2, r3
 8025f4a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025f4c:	80da      	strh	r2, [r3, #6]
    IPH_LEN_SET(iphdr, lwip_htons((u16_t)(fragsize + IP_HLEN)));
 8025f4e:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8025f50:	3314      	adds	r3, #20
 8025f52:	b29b      	uxth	r3, r3
 8025f54:	4618      	mov	r0, r3
 8025f56:	f7f2 fde7 	bl	8018b28 <lwip_htons>
 8025f5a:	4603      	mov	r3, r0
 8025f5c:	461a      	mov	r2, r3
 8025f5e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025f60:	805a      	strh	r2, [r3, #2]
    IPH_CHKSUM_SET(iphdr, 0);
 8025f62:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025f64:	2200      	movs	r2, #0
 8025f66:	729a      	strb	r2, [r3, #10]
 8025f68:	2200      	movs	r2, #0
 8025f6a:	72da      	strb	r2, [r3, #11]
#endif /* CHECKSUM_GEN_IP */

    /* No need for separate header pbuf - we allowed room for it in rambuf
     * when allocated.
     */
    netif->output(netif, rambuf, dest);
 8025f6c:	68bb      	ldr	r3, [r7, #8]
 8025f6e:	695b      	ldr	r3, [r3, #20]
 8025f70:	687a      	ldr	r2, [r7, #4]
 8025f72:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8025f74:	68b8      	ldr	r0, [r7, #8]
 8025f76:	4798      	blx	r3
     * recreate it next time round the loop. If we're lucky the hardware
     * will have already sent the packet, the free will really free, and
     * there will be zero memory penalty.
     */

    pbuf_free(rambuf);
 8025f78:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8025f7a:	f7f4 fab7 	bl	801a4ec <pbuf_free>
    left = (u16_t)(left - fragsize);
 8025f7e:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 8025f82:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8025f84:	1ad3      	subs	r3, r2, r3
 8025f86:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
    ofo = (u16_t)(ofo + nfb);
 8025f8a:	f8b7 2040 	ldrh.w	r2, [r7, #64]	@ 0x40
 8025f8e:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8025f90:	4413      	add	r3, r2
 8025f92:	f8a7 3040 	strh.w	r3, [r7, #64]	@ 0x40
  while (left) {
 8025f96:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 8025f9a:	2b00      	cmp	r3, #0
 8025f9c:	f47f af19 	bne.w	8025dd2 <ip4_frag+0x92>
  }
  MIB2_STATS_INC(mib2.ipfragoks);
  return ERR_OK;
 8025fa0:	2300      	movs	r3, #0
 8025fa2:	e002      	b.n	8025faa <ip4_frag+0x26a>
      goto memerr;
 8025fa4:	bf00      	nop
memerr:
  MIB2_STATS_INC(mib2.ipfragfails);
  return ERR_MEM;
 8025fa6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8025faa:	4618      	mov	r0, r3
 8025fac:	3748      	adds	r7, #72	@ 0x48
 8025fae:	46bd      	mov	sp, r7
 8025fb0:	bd80      	pop	{r7, pc}
 8025fb2:	bf00      	nop
 8025fb4:	080306b4 	.word	0x080306b4
 8025fb8:	08030890 	.word	0x08030890
 8025fbc:	080306fc 	.word	0x080306fc
 8025fc0:	080308ac 	.word	0x080308ac
 8025fc4:	080308cc 	.word	0x080308cc
 8025fc8:	08025cd9 	.word	0x08025cd9

08025fcc <ethernet_input>:
 * @see ETHARP_SUPPORT_VLAN
 * @see LWIP_HOOK_VLAN_CHECK
 */
err_t
ethernet_input(struct pbuf *p, struct netif *netif)
{
 8025fcc:	b580      	push	{r7, lr}
 8025fce:	b086      	sub	sp, #24
 8025fd0:	af00      	add	r7, sp, #0
 8025fd2:	6078      	str	r0, [r7, #4]
 8025fd4:	6039      	str	r1, [r7, #0]
  struct eth_hdr *ethhdr;
  u16_t type;
#if LWIP_ARP || ETHARP_SUPPORT_VLAN || LWIP_IPV6
  u16_t next_hdr_offset = SIZEOF_ETH_HDR;
 8025fd6:	230e      	movs	r3, #14
 8025fd8:	82fb      	strh	r3, [r7, #22]
#endif /* LWIP_ARP || ETHARP_SUPPORT_VLAN */

  LWIP_ASSERT_CORE_LOCKED();
 8025fda:	f7ea fab3 	bl	8010544 <sys_check_core_locking>

  if (p->len <= SIZEOF_ETH_HDR) {
 8025fde:	687b      	ldr	r3, [r7, #4]
 8025fe0:	895b      	ldrh	r3, [r3, #10]
 8025fe2:	2b0e      	cmp	r3, #14
 8025fe4:	d96e      	bls.n	80260c4 <ethernet_input+0xf8>
    ETHARP_STATS_INC(etharp.drop);
    MIB2_STATS_NETIF_INC(netif, ifinerrors);
    goto free_and_return;
  }

  if (p->if_idx == NETIF_NO_INDEX) {
 8025fe6:	687b      	ldr	r3, [r7, #4]
 8025fe8:	7bdb      	ldrb	r3, [r3, #15]
 8025fea:	2b00      	cmp	r3, #0
 8025fec:	d106      	bne.n	8025ffc <ethernet_input+0x30>
    p->if_idx = netif_get_index(netif);
 8025fee:	683b      	ldr	r3, [r7, #0]
 8025ff0:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8025ff4:	3301      	adds	r3, #1
 8025ff6:	b2da      	uxtb	r2, r3
 8025ff8:	687b      	ldr	r3, [r7, #4]
 8025ffa:	73da      	strb	r2, [r3, #15]
  }

  /* points to packet payload, which starts with an Ethernet header */
  ethhdr = (struct eth_hdr *)p->payload;
 8025ffc:	687b      	ldr	r3, [r7, #4]
 8025ffe:	685b      	ldr	r3, [r3, #4]
 8026000:	613b      	str	r3, [r7, #16]
               (unsigned char)ethhdr->dest.addr[3], (unsigned char)ethhdr->dest.addr[4], (unsigned char)ethhdr->dest.addr[5],
               (unsigned char)ethhdr->src.addr[0],  (unsigned char)ethhdr->src.addr[1],  (unsigned char)ethhdr->src.addr[2],
               (unsigned char)ethhdr->src.addr[3],  (unsigned char)ethhdr->src.addr[4],  (unsigned char)ethhdr->src.addr[5],
               lwip_htons(ethhdr->type)));

  type = ethhdr->type;
 8026002:	693b      	ldr	r3, [r7, #16]
 8026004:	7b1a      	ldrb	r2, [r3, #12]
 8026006:	7b5b      	ldrb	r3, [r3, #13]
 8026008:	021b      	lsls	r3, r3, #8
 802600a:	4313      	orrs	r3, r2
 802600c:	81fb      	strh	r3, [r7, #14]

#if LWIP_ARP_FILTER_NETIF
  netif = LWIP_ARP_FILTER_NETIF_FN(p, netif, lwip_htons(type));
#endif /* LWIP_ARP_FILTER_NETIF*/

  if (ethhdr->dest.addr[0] & 1) {
 802600e:	693b      	ldr	r3, [r7, #16]
 8026010:	781b      	ldrb	r3, [r3, #0]
 8026012:	f003 0301 	and.w	r3, r3, #1
 8026016:	2b00      	cmp	r3, #0
 8026018:	d023      	beq.n	8026062 <ethernet_input+0x96>
    /* this might be a multicast or broadcast packet */
    if (ethhdr->dest.addr[0] == LL_IP4_MULTICAST_ADDR_0) {
 802601a:	693b      	ldr	r3, [r7, #16]
 802601c:	781b      	ldrb	r3, [r3, #0]
 802601e:	2b01      	cmp	r3, #1
 8026020:	d10f      	bne.n	8026042 <ethernet_input+0x76>
#if LWIP_IPV4
      if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) &&
 8026022:	693b      	ldr	r3, [r7, #16]
 8026024:	785b      	ldrb	r3, [r3, #1]
 8026026:	2b00      	cmp	r3, #0
 8026028:	d11b      	bne.n	8026062 <ethernet_input+0x96>
          (ethhdr->dest.addr[2] == LL_IP4_MULTICAST_ADDR_2)) {
 802602a:	693b      	ldr	r3, [r7, #16]
 802602c:	789b      	ldrb	r3, [r3, #2]
      if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) &&
 802602e:	2b5e      	cmp	r3, #94	@ 0x5e
 8026030:	d117      	bne.n	8026062 <ethernet_input+0x96>
        /* mark the pbuf as link-layer multicast */
        p->flags |= PBUF_FLAG_LLMCAST;
 8026032:	687b      	ldr	r3, [r7, #4]
 8026034:	7b5b      	ldrb	r3, [r3, #13]
 8026036:	f043 0310 	orr.w	r3, r3, #16
 802603a:	b2da      	uxtb	r2, r3
 802603c:	687b      	ldr	r3, [r7, #4]
 802603e:	735a      	strb	r2, [r3, #13]
 8026040:	e00f      	b.n	8026062 <ethernet_input+0x96>
             (ethhdr->dest.addr[1] == LL_IP6_MULTICAST_ADDR_1)) {
      /* mark the pbuf as link-layer multicast */
      p->flags |= PBUF_FLAG_LLMCAST;
    }
#endif /* LWIP_IPV6 */
    else if (eth_addr_cmp(&ethhdr->dest, &ethbroadcast)) {
 8026042:	693b      	ldr	r3, [r7, #16]
 8026044:	2206      	movs	r2, #6
 8026046:	4928      	ldr	r1, [pc, #160]	@ (80260e8 <ethernet_input+0x11c>)
 8026048:	4618      	mov	r0, r3
 802604a:	f003 fe2f 	bl	8029cac <memcmp>
 802604e:	4603      	mov	r3, r0
 8026050:	2b00      	cmp	r3, #0
 8026052:	d106      	bne.n	8026062 <ethernet_input+0x96>
      /* mark the pbuf as link-layer broadcast */
      p->flags |= PBUF_FLAG_LLBCAST;
 8026054:	687b      	ldr	r3, [r7, #4]
 8026056:	7b5b      	ldrb	r3, [r3, #13]
 8026058:	f043 0308 	orr.w	r3, r3, #8
 802605c:	b2da      	uxtb	r2, r3
 802605e:	687b      	ldr	r3, [r7, #4]
 8026060:	735a      	strb	r2, [r3, #13]
    }
  }

  switch (type) {
 8026062:	89fb      	ldrh	r3, [r7, #14]
 8026064:	2b08      	cmp	r3, #8
 8026066:	d003      	beq.n	8026070 <ethernet_input+0xa4>
 8026068:	f5b3 6fc1 	cmp.w	r3, #1544	@ 0x608
 802606c:	d014      	beq.n	8026098 <ethernet_input+0xcc>
      }
#endif
      ETHARP_STATS_INC(etharp.proterr);
      ETHARP_STATS_INC(etharp.drop);
      MIB2_STATS_NETIF_INC(netif, ifinunknownprotos);
      goto free_and_return;
 802606e:	e032      	b.n	80260d6 <ethernet_input+0x10a>
      if (!(netif->flags & NETIF_FLAG_ETHARP)) {
 8026070:	683b      	ldr	r3, [r7, #0]
 8026072:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8026076:	f003 0308 	and.w	r3, r3, #8
 802607a:	2b00      	cmp	r3, #0
 802607c:	d024      	beq.n	80260c8 <ethernet_input+0xfc>
      if (pbuf_remove_header(p, next_hdr_offset)) {
 802607e:	8afb      	ldrh	r3, [r7, #22]
 8026080:	4619      	mov	r1, r3
 8026082:	6878      	ldr	r0, [r7, #4]
 8026084:	f7f4 f97a 	bl	801a37c <pbuf_remove_header>
 8026088:	4603      	mov	r3, r0
 802608a:	2b00      	cmp	r3, #0
 802608c:	d11e      	bne.n	80260cc <ethernet_input+0x100>
        ip4_input(p, netif);
 802608e:	6839      	ldr	r1, [r7, #0]
 8026090:	6878      	ldr	r0, [r7, #4]
 8026092:	f7fe fd2f 	bl	8024af4 <ip4_input>
      break;
 8026096:	e013      	b.n	80260c0 <ethernet_input+0xf4>
      if (!(netif->flags & NETIF_FLAG_ETHARP)) {
 8026098:	683b      	ldr	r3, [r7, #0]
 802609a:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 802609e:	f003 0308 	and.w	r3, r3, #8
 80260a2:	2b00      	cmp	r3, #0
 80260a4:	d014      	beq.n	80260d0 <ethernet_input+0x104>
      if (pbuf_remove_header(p, next_hdr_offset)) {
 80260a6:	8afb      	ldrh	r3, [r7, #22]
 80260a8:	4619      	mov	r1, r3
 80260aa:	6878      	ldr	r0, [r7, #4]
 80260ac:	f7f4 f966 	bl	801a37c <pbuf_remove_header>
 80260b0:	4603      	mov	r3, r0
 80260b2:	2b00      	cmp	r3, #0
 80260b4:	d10e      	bne.n	80260d4 <ethernet_input+0x108>
        etharp_input(p, netif);
 80260b6:	6839      	ldr	r1, [r7, #0]
 80260b8:	6878      	ldr	r0, [r7, #4]
 80260ba:	f7fd fe9d 	bl	8023df8 <etharp_input>
      break;
 80260be:	bf00      	nop
  }

  /* This means the pbuf is freed or consumed,
     so the caller doesn't have to free it again */
  return ERR_OK;
 80260c0:	2300      	movs	r3, #0
 80260c2:	e00c      	b.n	80260de <ethernet_input+0x112>
    goto free_and_return;
 80260c4:	bf00      	nop
 80260c6:	e006      	b.n	80260d6 <ethernet_input+0x10a>
        goto free_and_return;
 80260c8:	bf00      	nop
 80260ca:	e004      	b.n	80260d6 <ethernet_input+0x10a>
        goto free_and_return;
 80260cc:	bf00      	nop
 80260ce:	e002      	b.n	80260d6 <ethernet_input+0x10a>
        goto free_and_return;
 80260d0:	bf00      	nop
 80260d2:	e000      	b.n	80260d6 <ethernet_input+0x10a>
        goto free_and_return;
 80260d4:	bf00      	nop

free_and_return:
  pbuf_free(p);
 80260d6:	6878      	ldr	r0, [r7, #4]
 80260d8:	f7f4 fa08 	bl	801a4ec <pbuf_free>
  return ERR_OK;
 80260dc:	2300      	movs	r3, #0
}
 80260de:	4618      	mov	r0, r3
 80260e0:	3718      	adds	r7, #24
 80260e2:	46bd      	mov	sp, r7
 80260e4:	bd80      	pop	{r7, pc}
 80260e6:	bf00      	nop
 80260e8:	08030c70 	.word	0x08030c70

080260ec <ethernet_output>:
 * @return ERR_OK if the packet was sent, any other err_t on failure
 */
err_t
ethernet_output(struct netif * netif, struct pbuf * p,
                const struct eth_addr * src, const struct eth_addr * dst,
                u16_t eth_type) {
 80260ec:	b580      	push	{r7, lr}
 80260ee:	b086      	sub	sp, #24
 80260f0:	af00      	add	r7, sp, #0
 80260f2:	60f8      	str	r0, [r7, #12]
 80260f4:	60b9      	str	r1, [r7, #8]
 80260f6:	607a      	str	r2, [r7, #4]
 80260f8:	603b      	str	r3, [r7, #0]
  struct eth_hdr *ethhdr;
  u16_t eth_type_be = lwip_htons(eth_type);
 80260fa:	8c3b      	ldrh	r3, [r7, #32]
 80260fc:	4618      	mov	r0, r3
 80260fe:	f7f2 fd13 	bl	8018b28 <lwip_htons>
 8026102:	4603      	mov	r3, r0
 8026104:	82fb      	strh	r3, [r7, #22]

    eth_type_be = PP_HTONS(ETHTYPE_VLAN);
  } else
#endif /* ETHARP_SUPPORT_VLAN && defined(LWIP_HOOK_VLAN_SET) */
  {
    if (pbuf_add_header(p, SIZEOF_ETH_HDR) != 0) {
 8026106:	210e      	movs	r1, #14
 8026108:	68b8      	ldr	r0, [r7, #8]
 802610a:	f7f4 f927 	bl	801a35c <pbuf_add_header>
 802610e:	4603      	mov	r3, r0
 8026110:	2b00      	cmp	r3, #0
 8026112:	d127      	bne.n	8026164 <ethernet_output+0x78>
      goto pbuf_header_failed;
    }
  }

  LWIP_ASSERT_CORE_LOCKED();
 8026114:	f7ea fa16 	bl	8010544 <sys_check_core_locking>

  ethhdr = (struct eth_hdr *)p->payload;
 8026118:	68bb      	ldr	r3, [r7, #8]
 802611a:	685b      	ldr	r3, [r3, #4]
 802611c:	613b      	str	r3, [r7, #16]
  ethhdr->type = eth_type_be;
 802611e:	693b      	ldr	r3, [r7, #16]
 8026120:	8afa      	ldrh	r2, [r7, #22]
 8026122:	819a      	strh	r2, [r3, #12]
  SMEMCPY(&ethhdr->dest, dst, ETH_HWADDR_LEN);
 8026124:	693b      	ldr	r3, [r7, #16]
 8026126:	2206      	movs	r2, #6
 8026128:	6839      	ldr	r1, [r7, #0]
 802612a:	4618      	mov	r0, r3
 802612c:	f003 fedf 	bl	8029eee <memcpy>
  SMEMCPY(&ethhdr->src,  src, ETH_HWADDR_LEN);
 8026130:	693b      	ldr	r3, [r7, #16]
 8026132:	3306      	adds	r3, #6
 8026134:	2206      	movs	r2, #6
 8026136:	6879      	ldr	r1, [r7, #4]
 8026138:	4618      	mov	r0, r3
 802613a:	f003 fed8 	bl	8029eee <memcpy>

  LWIP_ASSERT("netif->hwaddr_len must be 6 for ethernet_output!",
 802613e:	68fb      	ldr	r3, [r7, #12]
 8026140:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8026144:	2b06      	cmp	r3, #6
 8026146:	d006      	beq.n	8026156 <ethernet_output+0x6a>
 8026148:	4b0a      	ldr	r3, [pc, #40]	@ (8026174 <ethernet_output+0x88>)
 802614a:	f44f 7299 	mov.w	r2, #306	@ 0x132
 802614e:	490a      	ldr	r1, [pc, #40]	@ (8026178 <ethernet_output+0x8c>)
 8026150:	480a      	ldr	r0, [pc, #40]	@ (802617c <ethernet_output+0x90>)
 8026152:	f003 fc43 	bl	80299dc <iprintf>
              (netif->hwaddr_len == ETH_HWADDR_LEN));
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE,
              ("ethernet_output: sending packet %p\n", (void *)p));

  /* send the packet */
  return netif->linkoutput(netif, p);
 8026156:	68fb      	ldr	r3, [r7, #12]
 8026158:	699b      	ldr	r3, [r3, #24]
 802615a:	68b9      	ldr	r1, [r7, #8]
 802615c:	68f8      	ldr	r0, [r7, #12]
 802615e:	4798      	blx	r3
 8026160:	4603      	mov	r3, r0
 8026162:	e002      	b.n	802616a <ethernet_output+0x7e>
      goto pbuf_header_failed;
 8026164:	bf00      	nop

pbuf_header_failed:
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
              ("ethernet_output: could not allocate room for header.\n"));
  LINK_STATS_INC(link.lenerr);
  return ERR_BUF;
 8026166:	f06f 0301 	mvn.w	r3, #1
}
 802616a:	4618      	mov	r0, r3
 802616c:	3718      	adds	r7, #24
 802616e:	46bd      	mov	sp, r7
 8026170:	bd80      	pop	{r7, pc}
 8026172:	bf00      	nop
 8026174:	080308dc 	.word	0x080308dc
 8026178:	08030914 	.word	0x08030914
 802617c:	08030948 	.word	0x08030948

08026180 <sys_mbox_new>:
#endif

/*-----------------------------------------------------------------------------------*/
//  Creates an empty mailbox.
err_t sys_mbox_new(sys_mbox_t *mbox, int size)
{
 8026180:	b580      	push	{r7, lr}
 8026182:	b082      	sub	sp, #8
 8026184:	af00      	add	r7, sp, #0
 8026186:	6078      	str	r0, [r7, #4]
 8026188:	6039      	str	r1, [r7, #0]
#if (osCMSIS < 0x20000U)
  osMessageQDef(QUEUE, size, void *);
  *mbox = osMessageCreate(osMessageQ(QUEUE), NULL);
#else
  *mbox = osMessageQueueNew(size, sizeof(void *), NULL);
 802618a:	683b      	ldr	r3, [r7, #0]
 802618c:	2200      	movs	r2, #0
 802618e:	2104      	movs	r1, #4
 8026190:	4618      	mov	r0, r3
 8026192:	f7ea fe6d 	bl	8010e70 <osMessageQueueNew>
 8026196:	4602      	mov	r2, r0
 8026198:	687b      	ldr	r3, [r7, #4]
 802619a:	601a      	str	r2, [r3, #0]
  if(lwip_stats.sys.mbox.max < lwip_stats.sys.mbox.used)
  {
    lwip_stats.sys.mbox.max = lwip_stats.sys.mbox.used;
  }
#endif /* SYS_STATS */
  if(*mbox == NULL)
 802619c:	687b      	ldr	r3, [r7, #4]
 802619e:	681b      	ldr	r3, [r3, #0]
 80261a0:	2b00      	cmp	r3, #0
 80261a2:	d102      	bne.n	80261aa <sys_mbox_new+0x2a>
    return ERR_MEM;
 80261a4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80261a8:	e000      	b.n	80261ac <sys_mbox_new+0x2c>

  return ERR_OK;
 80261aa:	2300      	movs	r3, #0
}
 80261ac:	4618      	mov	r0, r3
 80261ae:	3708      	adds	r7, #8
 80261b0:	46bd      	mov	sp, r7
 80261b2:	bd80      	pop	{r7, pc}

080261b4 <sys_mbox_free>:
  Deallocates a mailbox. If there are messages still present in the
  mailbox when the mailbox is deallocated, it is an indication of a
  programming error in lwIP and the developer should be notified.
*/
void sys_mbox_free(sys_mbox_t *mbox)
{
 80261b4:	b580      	push	{r7, lr}
 80261b6:	b082      	sub	sp, #8
 80261b8:	af00      	add	r7, sp, #0
 80261ba:	6078      	str	r0, [r7, #4]
#if (osCMSIS < 0x20000U)
  if(osMessageWaiting(*mbox))
#else
  if(osMessageQueueGetCount(*mbox))
 80261bc:	687b      	ldr	r3, [r7, #4]
 80261be:	681b      	ldr	r3, [r3, #0]
 80261c0:	4618      	mov	r0, r3
 80261c2:	f7ea ff87 	bl	80110d4 <osMessageQueueGetCount>

  }
#if (osCMSIS < 0x20000U)
  osMessageDelete(*mbox);
#else
  osMessageQueueDelete(*mbox);
 80261c6:	687b      	ldr	r3, [r7, #4]
 80261c8:	681b      	ldr	r3, [r3, #0]
 80261ca:	4618      	mov	r0, r3
 80261cc:	f7ea ffa2 	bl	8011114 <osMessageQueueDelete>
#endif
#if SYS_STATS
  --lwip_stats.sys.mbox.used;
#endif /* SYS_STATS */
}
 80261d0:	bf00      	nop
 80261d2:	3708      	adds	r7, #8
 80261d4:	46bd      	mov	sp, r7
 80261d6:	bd80      	pop	{r7, pc}

080261d8 <sys_mbox_trypost>:


/*-----------------------------------------------------------------------------------*/
//   Try to post the "msg" to the mailbox.
err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg)
{
 80261d8:	b580      	push	{r7, lr}
 80261da:	b084      	sub	sp, #16
 80261dc:	af00      	add	r7, sp, #0
 80261de:	6078      	str	r0, [r7, #4]
 80261e0:	6039      	str	r1, [r7, #0]
  err_t result;
#if (osCMSIS < 0x20000U)
  if(osMessagePut(*mbox, (uint32_t)msg, 0) == osOK)
#else
  if(osMessageQueuePut(*mbox, &msg, 0, 0) == osOK)
 80261e2:	687b      	ldr	r3, [r7, #4]
 80261e4:	6818      	ldr	r0, [r3, #0]
 80261e6:	4639      	mov	r1, r7
 80261e8:	2300      	movs	r3, #0
 80261ea:	2200      	movs	r2, #0
 80261ec:	f7ea feb4 	bl	8010f58 <osMessageQueuePut>
 80261f0:	4603      	mov	r3, r0
 80261f2:	2b00      	cmp	r3, #0
 80261f4:	d102      	bne.n	80261fc <sys_mbox_trypost+0x24>
#endif
  {
    result = ERR_OK;
 80261f6:	2300      	movs	r3, #0
 80261f8:	73fb      	strb	r3, [r7, #15]
 80261fa:	e001      	b.n	8026200 <sys_mbox_trypost+0x28>
  }
  else
  {
    // could not post, queue must be full
    result = ERR_MEM;
 80261fc:	23ff      	movs	r3, #255	@ 0xff
 80261fe:	73fb      	strb	r3, [r7, #15]
#if SYS_STATS
    lwip_stats.sys.mbox.err++;
#endif /* SYS_STATS */
  }

  return result;
 8026200:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8026204:	4618      	mov	r0, r3
 8026206:	3710      	adds	r7, #16
 8026208:	46bd      	mov	sp, r7
 802620a:	bd80      	pop	{r7, pc}

0802620c <sys_arch_mbox_fetch>:

  Note that a function with a similar name, sys_mbox_fetch(), is
  implemented by lwIP.
*/
u32_t sys_arch_mbox_fetch(sys_mbox_t *mbox, void **msg, u32_t timeout)
{
 802620c:	b580      	push	{r7, lr}
 802620e:	b086      	sub	sp, #24
 8026210:	af00      	add	r7, sp, #0
 8026212:	60f8      	str	r0, [r7, #12]
 8026214:	60b9      	str	r1, [r7, #8]
 8026216:	607a      	str	r2, [r7, #4]
#if (osCMSIS < 0x20000U)
  osEvent event;
  uint32_t starttime = osKernelSysTick();
#else
  osStatus_t status;
  uint32_t starttime = osKernelGetTickCount();
 8026218:	f7ea fb0a 	bl	8010830 <osKernelGetTickCount>
 802621c:	6178      	str	r0, [r7, #20]
#endif
  if(timeout != 0)
 802621e:	687b      	ldr	r3, [r7, #4]
 8026220:	2b00      	cmp	r3, #0
 8026222:	d013      	beq.n	802624c <sys_arch_mbox_fetch+0x40>
    {
      *msg = (void *)event.value.v;
      return (osKernelSysTick() - starttime);
    }
#else
    status = osMessageQueueGet(*mbox, msg, 0, timeout);
 8026224:	68fb      	ldr	r3, [r7, #12]
 8026226:	6818      	ldr	r0, [r3, #0]
 8026228:	687b      	ldr	r3, [r7, #4]
 802622a:	2200      	movs	r2, #0
 802622c:	68b9      	ldr	r1, [r7, #8]
 802622e:	f7ea fef3 	bl	8011018 <osMessageQueueGet>
 8026232:	6138      	str	r0, [r7, #16]
    if (status == osOK)
 8026234:	693b      	ldr	r3, [r7, #16]
 8026236:	2b00      	cmp	r3, #0
 8026238:	d105      	bne.n	8026246 <sys_arch_mbox_fetch+0x3a>
    {
      return (osKernelGetTickCount() - starttime);
 802623a:	f7ea faf9 	bl	8010830 <osKernelGetTickCount>
 802623e:	4602      	mov	r2, r0
 8026240:	697b      	ldr	r3, [r7, #20]
 8026242:	1ad3      	subs	r3, r2, r3
 8026244:	e00f      	b.n	8026266 <sys_arch_mbox_fetch+0x5a>
    }
#endif
    else
    {
      return SYS_ARCH_TIMEOUT;
 8026246:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802624a:	e00c      	b.n	8026266 <sys_arch_mbox_fetch+0x5a>
#if (osCMSIS < 0x20000U)
    event = osMessageGet (*mbox, osWaitForever);
    *msg = (void *)event.value.v;
    return (osKernelSysTick() - starttime);
#else
    osMessageQueueGet(*mbox, msg, 0, osWaitForever );
 802624c:	68fb      	ldr	r3, [r7, #12]
 802624e:	6818      	ldr	r0, [r3, #0]
 8026250:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026254:	2200      	movs	r2, #0
 8026256:	68b9      	ldr	r1, [r7, #8]
 8026258:	f7ea fede 	bl	8011018 <osMessageQueueGet>
    return (osKernelGetTickCount() - starttime);
 802625c:	f7ea fae8 	bl	8010830 <osKernelGetTickCount>
 8026260:	4602      	mov	r2, r0
 8026262:	697b      	ldr	r3, [r7, #20]
 8026264:	1ad3      	subs	r3, r2, r3
#endif
  }
}
 8026266:	4618      	mov	r0, r3
 8026268:	3718      	adds	r7, #24
 802626a:	46bd      	mov	sp, r7
 802626c:	bd80      	pop	{r7, pc}

0802626e <sys_arch_mbox_tryfetch>:
/*
  Similar to sys_arch_mbox_fetch, but if message is not ready immediately, we'll
  return with SYS_MBOX_EMPTY.  On success, 0 is returned.
*/
u32_t sys_arch_mbox_tryfetch(sys_mbox_t *mbox, void **msg)
{
 802626e:	b580      	push	{r7, lr}
 8026270:	b082      	sub	sp, #8
 8026272:	af00      	add	r7, sp, #0
 8026274:	6078      	str	r0, [r7, #4]
 8026276:	6039      	str	r1, [r7, #0]

  if(event.status == osEventMessage)
  {
    *msg = (void *)event.value.v;
#else
  if (osMessageQueueGet(*mbox, msg, 0, 0) == osOK)
 8026278:	687b      	ldr	r3, [r7, #4]
 802627a:	6818      	ldr	r0, [r3, #0]
 802627c:	2300      	movs	r3, #0
 802627e:	2200      	movs	r2, #0
 8026280:	6839      	ldr	r1, [r7, #0]
 8026282:	f7ea fec9 	bl	8011018 <osMessageQueueGet>
 8026286:	4603      	mov	r3, r0
 8026288:	2b00      	cmp	r3, #0
 802628a:	d101      	bne.n	8026290 <sys_arch_mbox_tryfetch+0x22>
  {
#endif
    return ERR_OK;
 802628c:	2300      	movs	r3, #0
 802628e:	e001      	b.n	8026294 <sys_arch_mbox_tryfetch+0x26>
  }
  else
  {
    return SYS_MBOX_EMPTY;
 8026290:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
  }
}
 8026294:	4618      	mov	r0, r3
 8026296:	3708      	adds	r7, #8
 8026298:	46bd      	mov	sp, r7
 802629a:	bd80      	pop	{r7, pc}

0802629c <sys_mbox_valid>:
/*----------------------------------------------------------------------------------*/
int sys_mbox_valid(sys_mbox_t *mbox)
{
 802629c:	b480      	push	{r7}
 802629e:	b083      	sub	sp, #12
 80262a0:	af00      	add	r7, sp, #0
 80262a2:	6078      	str	r0, [r7, #4]
  if (*mbox == SYS_MBOX_NULL)
 80262a4:	687b      	ldr	r3, [r7, #4]
 80262a6:	681b      	ldr	r3, [r3, #0]
 80262a8:	2b00      	cmp	r3, #0
 80262aa:	d101      	bne.n	80262b0 <sys_mbox_valid+0x14>
    return 0;
 80262ac:	2300      	movs	r3, #0
 80262ae:	e000      	b.n	80262b2 <sys_mbox_valid+0x16>
  else
    return 1;
 80262b0:	2301      	movs	r3, #1
}
 80262b2:	4618      	mov	r0, r3
 80262b4:	370c      	adds	r7, #12
 80262b6:	46bd      	mov	sp, r7
 80262b8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80262bc:	4770      	bx	lr

080262be <sys_mbox_set_invalid>:
/*-----------------------------------------------------------------------------------*/
void sys_mbox_set_invalid(sys_mbox_t *mbox)
{
 80262be:	b480      	push	{r7}
 80262c0:	b083      	sub	sp, #12
 80262c2:	af00      	add	r7, sp, #0
 80262c4:	6078      	str	r0, [r7, #4]
  *mbox = SYS_MBOX_NULL;
 80262c6:	687b      	ldr	r3, [r7, #4]
 80262c8:	2200      	movs	r2, #0
 80262ca:	601a      	str	r2, [r3, #0]
}
 80262cc:	bf00      	nop
 80262ce:	370c      	adds	r7, #12
 80262d0:	46bd      	mov	sp, r7
 80262d2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80262d6:	4770      	bx	lr

080262d8 <sys_sem_new>:

/*-----------------------------------------------------------------------------------*/
//  Creates a new semaphore. The "count" argument specifies
//  the initial state of the semaphore.
err_t sys_sem_new(sys_sem_t *sem, u8_t count)
{
 80262d8:	b580      	push	{r7, lr}
 80262da:	b082      	sub	sp, #8
 80262dc:	af00      	add	r7, sp, #0
 80262de:	6078      	str	r0, [r7, #4]
 80262e0:	460b      	mov	r3, r1
 80262e2:	70fb      	strb	r3, [r7, #3]
#if (osCMSIS < 0x20000U)
  osSemaphoreDef(SEM);
  *sem = osSemaphoreCreate (osSemaphore(SEM), 1);
#else
  *sem = osSemaphoreNew(UINT16_MAX, count, NULL);
 80262e4:	78fb      	ldrb	r3, [r7, #3]
 80262e6:	2200      	movs	r2, #0
 80262e8:	4619      	mov	r1, r3
 80262ea:	f64f 70ff 	movw	r0, #65535	@ 0xffff
 80262ee:	f7ea fc7b 	bl	8010be8 <osSemaphoreNew>
 80262f2:	4602      	mov	r2, r0
 80262f4:	687b      	ldr	r3, [r7, #4]
 80262f6:	601a      	str	r2, [r3, #0]
#endif

  if(*sem == NULL)
 80262f8:	687b      	ldr	r3, [r7, #4]
 80262fa:	681b      	ldr	r3, [r3, #0]
 80262fc:	2b00      	cmp	r3, #0
 80262fe:	d102      	bne.n	8026306 <sys_sem_new+0x2e>
  {
#if SYS_STATS
    ++lwip_stats.sys.sem.err;
#endif /* SYS_STATS */
    return ERR_MEM;
 8026300:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026304:	e009      	b.n	802631a <sys_sem_new+0x42>
  }

  if(count == 0)	// Means it can't be taken
 8026306:	78fb      	ldrb	r3, [r7, #3]
 8026308:	2b00      	cmp	r3, #0
 802630a:	d105      	bne.n	8026318 <sys_sem_new+0x40>
  {
#if (osCMSIS < 0x20000U)
    osSemaphoreWait(*sem, 0);
#else
    osSemaphoreAcquire(*sem, 0);
 802630c:	687b      	ldr	r3, [r7, #4]
 802630e:	681b      	ldr	r3, [r3, #0]
 8026310:	2100      	movs	r1, #0
 8026312:	4618      	mov	r0, r3
 8026314:	f7ea fcf2 	bl	8010cfc <osSemaphoreAcquire>
  if (lwip_stats.sys.sem.max < lwip_stats.sys.sem.used) {
    lwip_stats.sys.sem.max = lwip_stats.sys.sem.used;
  }
#endif /* SYS_STATS */

  return ERR_OK;
 8026318:	2300      	movs	r3, #0
}
 802631a:	4618      	mov	r0, r3
 802631c:	3708      	adds	r7, #8
 802631e:	46bd      	mov	sp, r7
 8026320:	bd80      	pop	{r7, pc}

08026322 <sys_arch_sem_wait>:

  Notice that lwIP implements a function with a similar name,
  sys_sem_wait(), that uses the sys_arch_sem_wait() function.
*/
u32_t sys_arch_sem_wait(sys_sem_t *sem, u32_t timeout)
{
 8026322:	b580      	push	{r7, lr}
 8026324:	b084      	sub	sp, #16
 8026326:	af00      	add	r7, sp, #0
 8026328:	6078      	str	r0, [r7, #4]
 802632a:	6039      	str	r1, [r7, #0]
#if (osCMSIS < 0x20000U)
  uint32_t starttime = osKernelSysTick();
#else
  uint32_t starttime = osKernelGetTickCount();
 802632c:	f7ea fa80 	bl	8010830 <osKernelGetTickCount>
 8026330:	60f8      	str	r0, [r7, #12]
#endif
  if(timeout != 0)
 8026332:	683b      	ldr	r3, [r7, #0]
 8026334:	2b00      	cmp	r3, #0
 8026336:	d011      	beq.n	802635c <sys_arch_sem_wait+0x3a>
#if (osCMSIS < 0x20000U)
    if(osSemaphoreWait (*sem, timeout) == osOK)
    {
      return (osKernelSysTick() - starttime);
#else
    if(osSemaphoreAcquire(*sem, timeout) == osOK)
 8026338:	687b      	ldr	r3, [r7, #4]
 802633a:	681b      	ldr	r3, [r3, #0]
 802633c:	6839      	ldr	r1, [r7, #0]
 802633e:	4618      	mov	r0, r3
 8026340:	f7ea fcdc 	bl	8010cfc <osSemaphoreAcquire>
 8026344:	4603      	mov	r3, r0
 8026346:	2b00      	cmp	r3, #0
 8026348:	d105      	bne.n	8026356 <sys_arch_sem_wait+0x34>
    {
        return (osKernelGetTickCount() - starttime);
 802634a:	f7ea fa71 	bl	8010830 <osKernelGetTickCount>
 802634e:	4602      	mov	r2, r0
 8026350:	68fb      	ldr	r3, [r7, #12]
 8026352:	1ad3      	subs	r3, r2, r3
 8026354:	e012      	b.n	802637c <sys_arch_sem_wait+0x5a>
#endif
    }
    else
    {
      return SYS_ARCH_TIMEOUT;
 8026356:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802635a:	e00f      	b.n	802637c <sys_arch_sem_wait+0x5a>
  {
#if (osCMSIS < 0x20000U)
    while(osSemaphoreWait (*sem, osWaitForever) != osOK);
    return (osKernelSysTick() - starttime);
#else
    while(osSemaphoreAcquire(*sem, osWaitForever) != osOK);
 802635c:	bf00      	nop
 802635e:	687b      	ldr	r3, [r7, #4]
 8026360:	681b      	ldr	r3, [r3, #0]
 8026362:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8026366:	4618      	mov	r0, r3
 8026368:	f7ea fcc8 	bl	8010cfc <osSemaphoreAcquire>
 802636c:	4603      	mov	r3, r0
 802636e:	2b00      	cmp	r3, #0
 8026370:	d1f5      	bne.n	802635e <sys_arch_sem_wait+0x3c>
    return (osKernelGetTickCount() - starttime);
 8026372:	f7ea fa5d 	bl	8010830 <osKernelGetTickCount>
 8026376:	4602      	mov	r2, r0
 8026378:	68fb      	ldr	r3, [r7, #12]
 802637a:	1ad3      	subs	r3, r2, r3
#endif
  }
}
 802637c:	4618      	mov	r0, r3
 802637e:	3710      	adds	r7, #16
 8026380:	46bd      	mov	sp, r7
 8026382:	bd80      	pop	{r7, pc}

08026384 <sys_sem_signal>:

/*-----------------------------------------------------------------------------------*/
// Signals a semaphore
void sys_sem_signal(sys_sem_t *sem)
{
 8026384:	b580      	push	{r7, lr}
 8026386:	b082      	sub	sp, #8
 8026388:	af00      	add	r7, sp, #0
 802638a:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(*sem);
 802638c:	687b      	ldr	r3, [r7, #4]
 802638e:	681b      	ldr	r3, [r3, #0]
 8026390:	4618      	mov	r0, r3
 8026392:	f7ea fd05 	bl	8010da0 <osSemaphoreRelease>
}
 8026396:	bf00      	nop
 8026398:	3708      	adds	r7, #8
 802639a:	46bd      	mov	sp, r7
 802639c:	bd80      	pop	{r7, pc}

0802639e <sys_sem_free>:

/*-----------------------------------------------------------------------------------*/
// Deallocates a semaphore
void sys_sem_free(sys_sem_t *sem)
{
 802639e:	b580      	push	{r7, lr}
 80263a0:	b082      	sub	sp, #8
 80263a2:	af00      	add	r7, sp, #0
 80263a4:	6078      	str	r0, [r7, #4]
#if SYS_STATS
  --lwip_stats.sys.sem.used;
#endif /* SYS_STATS */

  osSemaphoreDelete(*sem);
 80263a6:	687b      	ldr	r3, [r7, #4]
 80263a8:	681b      	ldr	r3, [r3, #0]
 80263aa:	4618      	mov	r0, r3
 80263ac:	f7ea fd3c 	bl	8010e28 <osSemaphoreDelete>
}
 80263b0:	bf00      	nop
 80263b2:	3708      	adds	r7, #8
 80263b4:	46bd      	mov	sp, r7
 80263b6:	bd80      	pop	{r7, pc}

080263b8 <sys_sem_valid>:
/*-----------------------------------------------------------------------------------*/
int sys_sem_valid(sys_sem_t *sem)
{
 80263b8:	b480      	push	{r7}
 80263ba:	b083      	sub	sp, #12
 80263bc:	af00      	add	r7, sp, #0
 80263be:	6078      	str	r0, [r7, #4]
  if (*sem == SYS_SEM_NULL)
 80263c0:	687b      	ldr	r3, [r7, #4]
 80263c2:	681b      	ldr	r3, [r3, #0]
 80263c4:	2b00      	cmp	r3, #0
 80263c6:	d101      	bne.n	80263cc <sys_sem_valid+0x14>
    return 0;
 80263c8:	2300      	movs	r3, #0
 80263ca:	e000      	b.n	80263ce <sys_sem_valid+0x16>
  else
    return 1;
 80263cc:	2301      	movs	r3, #1
}
 80263ce:	4618      	mov	r0, r3
 80263d0:	370c      	adds	r7, #12
 80263d2:	46bd      	mov	sp, r7
 80263d4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80263d8:	4770      	bx	lr

080263da <sys_sem_set_invalid>:

/*-----------------------------------------------------------------------------------*/
void sys_sem_set_invalid(sys_sem_t *sem)
{
 80263da:	b480      	push	{r7}
 80263dc:	b083      	sub	sp, #12
 80263de:	af00      	add	r7, sp, #0
 80263e0:	6078      	str	r0, [r7, #4]
  *sem = SYS_SEM_NULL;
 80263e2:	687b      	ldr	r3, [r7, #4]
 80263e4:	2200      	movs	r2, #0
 80263e6:	601a      	str	r2, [r3, #0]
}
 80263e8:	bf00      	nop
 80263ea:	370c      	adds	r7, #12
 80263ec:	46bd      	mov	sp, r7
 80263ee:	f85d 7b04 	ldr.w	r7, [sp], #4
 80263f2:	4770      	bx	lr

080263f4 <sys_init>:
#else
osMutexId_t lwip_sys_mutex;
#endif
// Initialize sys arch
void sys_init(void)
{
 80263f4:	b580      	push	{r7, lr}
 80263f6:	af00      	add	r7, sp, #0
#if (osCMSIS < 0x20000U)
  lwip_sys_mutex = osMutexCreate(osMutex(lwip_sys_mutex));
#else
  lwip_sys_mutex = osMutexNew(NULL);
 80263f8:	2000      	movs	r0, #0
 80263fa:	f7ea fae7 	bl	80109cc <osMutexNew>
 80263fe:	4603      	mov	r3, r0
 8026400:	4a01      	ldr	r2, [pc, #4]	@ (8026408 <sys_init+0x14>)
 8026402:	6013      	str	r3, [r2, #0]
#endif
}
 8026404:	bf00      	nop
 8026406:	bd80      	pop	{r7, pc}
 8026408:	2402b02c 	.word	0x2402b02c

0802640c <sys_mutex_new>:
                                      /* Mutexes*/
/*-----------------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------------------*/
#if LWIP_COMPAT_MUTEX == 0
/* Create a new mutex*/
err_t sys_mutex_new(sys_mutex_t *mutex) {
 802640c:	b580      	push	{r7, lr}
 802640e:	b082      	sub	sp, #8
 8026410:	af00      	add	r7, sp, #0
 8026412:	6078      	str	r0, [r7, #4]

#if (osCMSIS < 0x20000U)
  osMutexDef(MUTEX);
  *mutex = osMutexCreate(osMutex(MUTEX));
#else
  *mutex = osMutexNew(NULL);
 8026414:	2000      	movs	r0, #0
 8026416:	f7ea fad9 	bl	80109cc <osMutexNew>
 802641a:	4602      	mov	r2, r0
 802641c:	687b      	ldr	r3, [r7, #4]
 802641e:	601a      	str	r2, [r3, #0]
#endif

  if(*mutex == NULL)
 8026420:	687b      	ldr	r3, [r7, #4]
 8026422:	681b      	ldr	r3, [r3, #0]
 8026424:	2b00      	cmp	r3, #0
 8026426:	d102      	bne.n	802642e <sys_mutex_new+0x22>
  {
#if SYS_STATS
    ++lwip_stats.sys.mutex.err;
#endif /* SYS_STATS */
    return ERR_MEM;
 8026428:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802642c:	e000      	b.n	8026430 <sys_mutex_new+0x24>
  ++lwip_stats.sys.mutex.used;
  if (lwip_stats.sys.mutex.max < lwip_stats.sys.mutex.used) {
    lwip_stats.sys.mutex.max = lwip_stats.sys.mutex.used;
  }
#endif /* SYS_STATS */
  return ERR_OK;
 802642e:	2300      	movs	r3, #0
}
 8026430:	4618      	mov	r0, r3
 8026432:	3708      	adds	r7, #8
 8026434:	46bd      	mov	sp, r7
 8026436:	bd80      	pop	{r7, pc}

08026438 <sys_mutex_lock>:
  osMutexDelete(*mutex);
}
/*-----------------------------------------------------------------------------------*/
/* Lock a mutex*/
void sys_mutex_lock(sys_mutex_t *mutex)
{
 8026438:	b580      	push	{r7, lr}
 802643a:	b082      	sub	sp, #8
 802643c:	af00      	add	r7, sp, #0
 802643e:	6078      	str	r0, [r7, #4]
#if (osCMSIS < 0x20000U)
  osMutexWait(*mutex, osWaitForever);
#else
  osMutexAcquire(*mutex, osWaitForever);
 8026440:	687b      	ldr	r3, [r7, #4]
 8026442:	681b      	ldr	r3, [r3, #0]
 8026444:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8026448:	4618      	mov	r0, r3
 802644a:	f7ea fb45 	bl	8010ad8 <osMutexAcquire>
#endif
}
 802644e:	bf00      	nop
 8026450:	3708      	adds	r7, #8
 8026452:	46bd      	mov	sp, r7
 8026454:	bd80      	pop	{r7, pc}

08026456 <sys_mutex_unlock>:

/*-----------------------------------------------------------------------------------*/
/* Unlock a mutex*/
void sys_mutex_unlock(sys_mutex_t *mutex)
{
 8026456:	b580      	push	{r7, lr}
 8026458:	b082      	sub	sp, #8
 802645a:	af00      	add	r7, sp, #0
 802645c:	6078      	str	r0, [r7, #4]
  osMutexRelease(*mutex);
 802645e:	687b      	ldr	r3, [r7, #4]
 8026460:	681b      	ldr	r3, [r3, #0]
 8026462:	4618      	mov	r0, r3
 8026464:	f7ea fb83 	bl	8010b6e <osMutexRelease>
}
 8026468:	bf00      	nop
 802646a:	3708      	adds	r7, #8
 802646c:	46bd      	mov	sp, r7
 802646e:	bd80      	pop	{r7, pc}

08026470 <sys_thread_new>:
  function "thread()". The "arg" argument will be passed as an argument to the
  thread() function. The id of the new thread is returned. Both the id and
  the priority are system dependent.
*/
sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread , void *arg, int stacksize, int prio)
{
 8026470:	b580      	push	{r7, lr}
 8026472:	b08e      	sub	sp, #56	@ 0x38
 8026474:	af00      	add	r7, sp, #0
 8026476:	60f8      	str	r0, [r7, #12]
 8026478:	60b9      	str	r1, [r7, #8]
 802647a:	607a      	str	r2, [r7, #4]
 802647c:	603b      	str	r3, [r7, #0]
#if (osCMSIS < 0x20000U)
  const osThreadDef_t os_thread_def = { (char *)name, (os_pthread)thread, (osPriority)prio, 0, stacksize};
  return osThreadCreate(&os_thread_def, arg);
#else
  const osThreadAttr_t attributes = {
 802647e:	f107 0314 	add.w	r3, r7, #20
 8026482:	2224      	movs	r2, #36	@ 0x24
 8026484:	2100      	movs	r1, #0
 8026486:	4618      	mov	r0, r3
 8026488:	f003 fc3a 	bl	8029d00 <memset>
 802648c:	68fb      	ldr	r3, [r7, #12]
 802648e:	617b      	str	r3, [r7, #20]
 8026490:	683b      	ldr	r3, [r7, #0]
 8026492:	62bb      	str	r3, [r7, #40]	@ 0x28
 8026494:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8026496:	62fb      	str	r3, [r7, #44]	@ 0x2c
                        .name = name,
                        .stack_size = stacksize,
                        .priority = (osPriority_t)prio,
                      };
  return osThreadNew(thread, arg, &attributes);
 8026498:	f107 0314 	add.w	r3, r7, #20
 802649c:	461a      	mov	r2, r3
 802649e:	6879      	ldr	r1, [r7, #4]
 80264a0:	68b8      	ldr	r0, [r7, #8]
 80264a2:	f7ea f9da 	bl	801085a <osThreadNew>
 80264a6:	4603      	mov	r3, r0
#endif
}
 80264a8:	4618      	mov	r0, r3
 80264aa:	3738      	adds	r7, #56	@ 0x38
 80264ac:	46bd      	mov	sp, r7
 80264ae:	bd80      	pop	{r7, pc}

080264b0 <sys_arch_protect>:

  Note: This function is based on FreeRTOS API, because no equivalent CMSIS-RTOS
        API is available
*/
sys_prot_t sys_arch_protect(void)
{
 80264b0:	b580      	push	{r7, lr}
 80264b2:	af00      	add	r7, sp, #0
#if (osCMSIS < 0x20000U)
  osMutexWait(lwip_sys_mutex, osWaitForever);
#else
  osMutexAcquire(lwip_sys_mutex, osWaitForever);
 80264b4:	4b04      	ldr	r3, [pc, #16]	@ (80264c8 <sys_arch_protect+0x18>)
 80264b6:	681b      	ldr	r3, [r3, #0]
 80264b8:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80264bc:	4618      	mov	r0, r3
 80264be:	f7ea fb0b 	bl	8010ad8 <osMutexAcquire>
#endif
  return (sys_prot_t)1;
 80264c2:	2301      	movs	r3, #1
}
 80264c4:	4618      	mov	r0, r3
 80264c6:	bd80      	pop	{r7, pc}
 80264c8:	2402b02c 	.word	0x2402b02c

080264cc <sys_arch_unprotect>:

  Note: This function is based on FreeRTOS API, because no equivalent CMSIS-RTOS
        API is available
*/
void sys_arch_unprotect(sys_prot_t pval)
{
 80264cc:	b580      	push	{r7, lr}
 80264ce:	b082      	sub	sp, #8
 80264d0:	af00      	add	r7, sp, #0
 80264d2:	6078      	str	r0, [r7, #4]
  ( void ) pval;
  osMutexRelease(lwip_sys_mutex);
 80264d4:	4b04      	ldr	r3, [pc, #16]	@ (80264e8 <sys_arch_unprotect+0x1c>)
 80264d6:	681b      	ldr	r3, [r3, #0]
 80264d8:	4618      	mov	r0, r3
 80264da:	f7ea fb48 	bl	8010b6e <osMutexRelease>
}
 80264de:	bf00      	nop
 80264e0:	3708      	adds	r7, #8
 80264e2:	46bd      	mov	sp, r7
 80264e4:	bd80      	pop	{r7, pc}
 80264e6:	bf00      	nop
 80264e8:	2402b02c 	.word	0x2402b02c

080264ec <NewMessageData>:
#include <string.h>
//#include "cmsis_os.h"

osMutexId_t mqttMutex;

static void NewMessageData(MessageData* md, MQTTString* aTopicName, MQTTMessage* aMessage) {
 80264ec:	b480      	push	{r7}
 80264ee:	b085      	sub	sp, #20
 80264f0:	af00      	add	r7, sp, #0
 80264f2:	60f8      	str	r0, [r7, #12]
 80264f4:	60b9      	str	r1, [r7, #8]
 80264f6:	607a      	str	r2, [r7, #4]
    md->topicName = aTopicName;
 80264f8:	68fb      	ldr	r3, [r7, #12]
 80264fa:	68ba      	ldr	r2, [r7, #8]
 80264fc:	605a      	str	r2, [r3, #4]
    md->message = aMessage;
 80264fe:	68fb      	ldr	r3, [r7, #12]
 8026500:	687a      	ldr	r2, [r7, #4]
 8026502:	601a      	str	r2, [r3, #0]
}
 8026504:	bf00      	nop
 8026506:	3714      	adds	r7, #20
 8026508:	46bd      	mov	sp, r7
 802650a:	f85d 7b04 	ldr.w	r7, [sp], #4
 802650e:	4770      	bx	lr

08026510 <getNextPacketId>:


static int getNextPacketId(MQTTClient *c) {
 8026510:	b480      	push	{r7}
 8026512:	b083      	sub	sp, #12
 8026514:	af00      	add	r7, sp, #0
 8026516:	6078      	str	r0, [r7, #4]
    return c->next_packetid = (c->next_packetid == MAX_PACKET_ID) ? 1 : c->next_packetid + 1;
 8026518:	687b      	ldr	r3, [r7, #4]
 802651a:	681b      	ldr	r3, [r3, #0]
 802651c:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 8026520:	4293      	cmp	r3, r2
 8026522:	d003      	beq.n	802652c <getNextPacketId+0x1c>
 8026524:	687b      	ldr	r3, [r7, #4]
 8026526:	681b      	ldr	r3, [r3, #0]
 8026528:	3301      	adds	r3, #1
 802652a:	e000      	b.n	802652e <getNextPacketId+0x1e>
 802652c:	2301      	movs	r3, #1
 802652e:	687a      	ldr	r2, [r7, #4]
 8026530:	6013      	str	r3, [r2, #0]
 8026532:	687b      	ldr	r3, [r7, #4]
 8026534:	681b      	ldr	r3, [r3, #0]
}
 8026536:	4618      	mov	r0, r3
 8026538:	370c      	adds	r7, #12
 802653a:	46bd      	mov	sp, r7
 802653c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026540:	4770      	bx	lr

08026542 <sendPacket>:


static int sendPacket(MQTTClient* c, int length, Timer* timer)
{
 8026542:	b5f0      	push	{r4, r5, r6, r7, lr}
 8026544:	b087      	sub	sp, #28
 8026546:	af00      	add	r7, sp, #0
 8026548:	60f8      	str	r0, [r7, #12]
 802654a:	60b9      	str	r1, [r7, #8]
 802654c:	607a      	str	r2, [r7, #4]
    int rc = FAILURE,
 802654e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026552:	617b      	str	r3, [r7, #20]
        sent = 0;
 8026554:	2300      	movs	r3, #0
 8026556:	613b      	str	r3, [r7, #16]

    while (sent < length && !TimerIsExpired(timer))
 8026558:	e018      	b.n	802658c <sendPacket+0x4a>
    {
        rc = c->ipstack->mqttwrite(c->ipstack, &c->buf[sent], length, TimerLeftMS(timer));
 802655a:	68fb      	ldr	r3, [r7, #12]
 802655c:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 802655e:	689c      	ldr	r4, [r3, #8]
 8026560:	68fb      	ldr	r3, [r7, #12]
 8026562:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 8026564:	68fb      	ldr	r3, [r7, #12]
 8026566:	691a      	ldr	r2, [r3, #16]
 8026568:	693b      	ldr	r3, [r7, #16]
 802656a:	18d6      	adds	r6, r2, r3
 802656c:	6878      	ldr	r0, [r7, #4]
 802656e:	f000 fed3 	bl	8027318 <TimerLeftMS>
 8026572:	4603      	mov	r3, r0
 8026574:	68ba      	ldr	r2, [r7, #8]
 8026576:	4631      	mov	r1, r6
 8026578:	4628      	mov	r0, r5
 802657a:	47a0      	blx	r4
 802657c:	6178      	str	r0, [r7, #20]
        if (rc < 0)  // there was an error writing the data
 802657e:	697b      	ldr	r3, [r7, #20]
 8026580:	2b00      	cmp	r3, #0
 8026582:	db0e      	blt.n	80265a2 <sendPacket+0x60>
            break;
        sent += rc;
 8026584:	693a      	ldr	r2, [r7, #16]
 8026586:	697b      	ldr	r3, [r7, #20]
 8026588:	4413      	add	r3, r2
 802658a:	613b      	str	r3, [r7, #16]
    while (sent < length && !TimerIsExpired(timer))
 802658c:	693a      	ldr	r2, [r7, #16]
 802658e:	68bb      	ldr	r3, [r7, #8]
 8026590:	429a      	cmp	r2, r3
 8026592:	da07      	bge.n	80265a4 <sendPacket+0x62>
 8026594:	6878      	ldr	r0, [r7, #4]
 8026596:	f000 fe7d 	bl	8027294 <TimerIsExpired>
 802659a:	4603      	mov	r3, r0
 802659c:	2b00      	cmp	r3, #0
 802659e:	d0dc      	beq.n	802655a <sendPacket+0x18>
 80265a0:	e000      	b.n	80265a4 <sendPacket+0x62>
            break;
 80265a2:	bf00      	nop
    }
    if (sent == length)
 80265a4:	693a      	ldr	r2, [r7, #16]
 80265a6:	68bb      	ldr	r3, [r7, #8]
 80265a8:	429a      	cmp	r2, r3
 80265aa:	d10b      	bne.n	80265c4 <sendPacket+0x82>
    {
        TimerCountdown(&c->last_sent, c->keepAliveInterval); // record the fact that we have MQTT_SUCCESSfully sent the packet
 80265ac:	68fb      	ldr	r3, [r7, #12]
 80265ae:	f103 0258 	add.w	r2, r3, #88	@ 0x58
 80265b2:	68fb      	ldr	r3, [r7, #12]
 80265b4:	699b      	ldr	r3, [r3, #24]
 80265b6:	4619      	mov	r1, r3
 80265b8:	4610      	mov	r0, r2
 80265ba:	f000 fe95 	bl	80272e8 <TimerCountdown>
        rc = MQTT_SUCCESS;
 80265be:	2300      	movs	r3, #0
 80265c0:	617b      	str	r3, [r7, #20]
 80265c2:	e002      	b.n	80265ca <sendPacket+0x88>
    }
    else
        rc = FAILURE;
 80265c4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80265c8:	617b      	str	r3, [r7, #20]
    return rc;
 80265ca:	697b      	ldr	r3, [r7, #20]
}
 80265cc:	4618      	mov	r0, r3
 80265ce:	371c      	adds	r7, #28
 80265d0:	46bd      	mov	sp, r7
 80265d2:	bdf0      	pop	{r4, r5, r6, r7, pc}

080265d4 <MQTTClientInit>:


void MQTTClientInit(MQTTClient* c, Network* network, unsigned int command_timeout_ms,
		unsigned char* sendbuf, size_t sendbuf_size, unsigned char* readbuf, size_t readbuf_size)
{
 80265d4:	b580      	push	{r7, lr}
 80265d6:	b086      	sub	sp, #24
 80265d8:	af00      	add	r7, sp, #0
 80265da:	60f8      	str	r0, [r7, #12]
 80265dc:	60b9      	str	r1, [r7, #8]
 80265de:	607a      	str	r2, [r7, #4]
 80265e0:	603b      	str	r3, [r7, #0]
    int i;
    c->ipstack = network;
 80265e2:	68fb      	ldr	r3, [r7, #12]
 80265e4:	68ba      	ldr	r2, [r7, #8]
 80265e6:	655a      	str	r2, [r3, #84]	@ 0x54

    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 80265e8:	2300      	movs	r3, #0
 80265ea:	617b      	str	r3, [r7, #20]
 80265ec:	e008      	b.n	8026600 <MQTTClientInit+0x2c>
        c->messageHandlers[i].topicFilter = 0;
 80265ee:	68fb      	ldr	r3, [r7, #12]
 80265f0:	697a      	ldr	r2, [r7, #20]
 80265f2:	3205      	adds	r2, #5
 80265f4:	2100      	movs	r1, #0
 80265f6:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 80265fa:	697b      	ldr	r3, [r7, #20]
 80265fc:	3301      	adds	r3, #1
 80265fe:	617b      	str	r3, [r7, #20]
 8026600:	697b      	ldr	r3, [r7, #20]
 8026602:	2b04      	cmp	r3, #4
 8026604:	ddf3      	ble.n	80265ee <MQTTClientInit+0x1a>
    c->command_timeout_ms = command_timeout_ms;
 8026606:	68fb      	ldr	r3, [r7, #12]
 8026608:	687a      	ldr	r2, [r7, #4]
 802660a:	605a      	str	r2, [r3, #4]
    c->buf = sendbuf;
 802660c:	68fb      	ldr	r3, [r7, #12]
 802660e:	683a      	ldr	r2, [r7, #0]
 8026610:	611a      	str	r2, [r3, #16]
    c->buf_size = sendbuf_size;
 8026612:	68fb      	ldr	r3, [r7, #12]
 8026614:	6a3a      	ldr	r2, [r7, #32]
 8026616:	609a      	str	r2, [r3, #8]
    c->readbuf = readbuf;
 8026618:	68fb      	ldr	r3, [r7, #12]
 802661a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802661c:	615a      	str	r2, [r3, #20]
    c->readbuf_size = readbuf_size;
 802661e:	68fb      	ldr	r3, [r7, #12]
 8026620:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8026622:	60da      	str	r2, [r3, #12]
    c->isconnected = 0;
 8026624:	68fb      	ldr	r3, [r7, #12]
 8026626:	2200      	movs	r2, #0
 8026628:	621a      	str	r2, [r3, #32]
    c->cleansession = 0;
 802662a:	68fb      	ldr	r3, [r7, #12]
 802662c:	2200      	movs	r2, #0
 802662e:	625a      	str	r2, [r3, #36]	@ 0x24
    c->ping_outstanding = 0;
 8026630:	68fb      	ldr	r3, [r7, #12]
 8026632:	2200      	movs	r2, #0
 8026634:	771a      	strb	r2, [r3, #28]
    c->defaultMessageHandler = NULL;
 8026636:	68fb      	ldr	r3, [r7, #12]
 8026638:	2200      	movs	r2, #0
 802663a:	651a      	str	r2, [r3, #80]	@ 0x50
	  c->next_packetid = 1;
 802663c:	68fb      	ldr	r3, [r7, #12]
 802663e:	2201      	movs	r2, #1
 8026640:	601a      	str	r2, [r3, #0]
    TimerInit(&c->last_sent);
 8026642:	68fb      	ldr	r3, [r7, #12]
 8026644:	3358      	adds	r3, #88	@ 0x58
 8026646:	4618      	mov	r0, r3
 8026648:	f000 fe7c 	bl	8027344 <TimerInit>
    TimerInit(&c->last_received);
 802664c:	68fb      	ldr	r3, [r7, #12]
 802664e:	3360      	adds	r3, #96	@ 0x60
 8026650:	4618      	mov	r0, r3
 8026652:	f000 fe77 	bl	8027344 <TimerInit>
#if defined(MQTT_TASK)
	  MutexInit(&c->mutex);
#endif
	  if(mqttMutex == NULL)
 8026656:	4b07      	ldr	r3, [pc, #28]	@ (8026674 <MQTTClientInit+0xa0>)
 8026658:	681b      	ldr	r3, [r3, #0]
 802665a:	2b00      	cmp	r3, #0
 802665c:	d105      	bne.n	802666a <MQTTClientInit+0x96>
	  {
//		  osMutexDef(mqttMutex);
//		  mqttMutex = osMutexNew(NULL);
		  c->mutex = osMutexNew(NULL);
 802665e:	2000      	movs	r0, #0
 8026660:	f7ea f9b4 	bl	80109cc <osMutexNew>
 8026664:	4602      	mov	r2, r0
 8026666:	68fb      	ldr	r3, [r7, #12]
 8026668:	669a      	str	r2, [r3, #104]	@ 0x68

	  }
}
 802666a:	bf00      	nop
 802666c:	3718      	adds	r7, #24
 802666e:	46bd      	mov	sp, r7
 8026670:	bd80      	pop	{r7, pc}
 8026672:	bf00      	nop
 8026674:	2402b030 	.word	0x2402b030

08026678 <decodePacket>:


static int decodePacket(MQTTClient* c, int* value, int timeout)
{
 8026678:	b590      	push	{r4, r7, lr}
 802667a:	b08b      	sub	sp, #44	@ 0x2c
 802667c:	af00      	add	r7, sp, #0
 802667e:	60f8      	str	r0, [r7, #12]
 8026680:	60b9      	str	r1, [r7, #8]
 8026682:	607a      	str	r2, [r7, #4]
    unsigned char i;
    int multiplier = 1;
 8026684:	2301      	movs	r3, #1
 8026686:	627b      	str	r3, [r7, #36]	@ 0x24
    int len = 0;
 8026688:	2300      	movs	r3, #0
 802668a:	623b      	str	r3, [r7, #32]
    const int MAX_NO_OF_REMAINING_LENGTH_BYTES = 4;
 802668c:	2304      	movs	r3, #4
 802668e:	61fb      	str	r3, [r7, #28]

    *value = 0;
 8026690:	68bb      	ldr	r3, [r7, #8]
 8026692:	2200      	movs	r2, #0
 8026694:	601a      	str	r2, [r3, #0]
    do
    {
        int rc = MQTTPACKET_READ_ERROR;
 8026696:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802669a:	61bb      	str	r3, [r7, #24]

        if (++len > MAX_NO_OF_REMAINING_LENGTH_BYTES)
 802669c:	6a3b      	ldr	r3, [r7, #32]
 802669e:	3301      	adds	r3, #1
 80266a0:	623b      	str	r3, [r7, #32]
 80266a2:	6a3a      	ldr	r2, [r7, #32]
 80266a4:	69fb      	ldr	r3, [r7, #28]
 80266a6:	429a      	cmp	r2, r3
 80266a8:	dd03      	ble.n	80266b2 <decodePacket+0x3a>
        {
            rc = MQTTPACKET_READ_ERROR; /* bad data */
 80266aa:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80266ae:	61bb      	str	r3, [r7, #24]
            goto exit;
 80266b0:	e021      	b.n	80266f6 <decodePacket+0x7e>
        }
        rc = c->ipstack->mqttread(c->ipstack, &i, 1, timeout);
 80266b2:	68fb      	ldr	r3, [r7, #12]
 80266b4:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 80266b6:	685c      	ldr	r4, [r3, #4]
 80266b8:	68fb      	ldr	r3, [r7, #12]
 80266ba:	6d58      	ldr	r0, [r3, #84]	@ 0x54
 80266bc:	f107 0117 	add.w	r1, r7, #23
 80266c0:	687b      	ldr	r3, [r7, #4]
 80266c2:	2201      	movs	r2, #1
 80266c4:	47a0      	blx	r4
 80266c6:	61b8      	str	r0, [r7, #24]
        if (rc != 1)
 80266c8:	69bb      	ldr	r3, [r7, #24]
 80266ca:	2b01      	cmp	r3, #1
 80266cc:	d112      	bne.n	80266f4 <decodePacket+0x7c>
            goto exit;
        *value += (i & 127) * multiplier;
 80266ce:	68bb      	ldr	r3, [r7, #8]
 80266d0:	681a      	ldr	r2, [r3, #0]
 80266d2:	7dfb      	ldrb	r3, [r7, #23]
 80266d4:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 80266d8:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 80266da:	fb01 f303 	mul.w	r3, r1, r3
 80266de:	441a      	add	r2, r3
 80266e0:	68bb      	ldr	r3, [r7, #8]
 80266e2:	601a      	str	r2, [r3, #0]
        multiplier *= 128;
 80266e4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80266e6:	01db      	lsls	r3, r3, #7
 80266e8:	627b      	str	r3, [r7, #36]	@ 0x24
    } while ((i & 128) != 0);
 80266ea:	7dfb      	ldrb	r3, [r7, #23]
 80266ec:	b25b      	sxtb	r3, r3
 80266ee:	2b00      	cmp	r3, #0
 80266f0:	dbd1      	blt.n	8026696 <decodePacket+0x1e>
exit:
 80266f2:	e000      	b.n	80266f6 <decodePacket+0x7e>
            goto exit;
 80266f4:	bf00      	nop
    return len;
 80266f6:	6a3b      	ldr	r3, [r7, #32]
}
 80266f8:	4618      	mov	r0, r3
 80266fa:	372c      	adds	r7, #44	@ 0x2c
 80266fc:	46bd      	mov	sp, r7
 80266fe:	bd90      	pop	{r4, r7, pc}

08026700 <readPacket>:


static int readPacket(MQTTClient* c, Timer* timer)
{
 8026700:	b5f0      	push	{r4, r5, r6, r7, lr}
 8026702:	b089      	sub	sp, #36	@ 0x24
 8026704:	af00      	add	r7, sp, #0
 8026706:	60f8      	str	r0, [r7, #12]
 8026708:	60b9      	str	r1, [r7, #8]
    MQTTHeader header = {0};
 802670a:	2300      	movs	r3, #0
 802670c:	617b      	str	r3, [r7, #20]
    int len = 0;
 802670e:	2300      	movs	r3, #0
 8026710:	61bb      	str	r3, [r7, #24]
    int rem_len = 0;
 8026712:	2300      	movs	r3, #0
 8026714:	613b      	str	r3, [r7, #16]

    /* 1. read the header byte.  This has the packet type in it */
    int rc = c->ipstack->mqttread(c->ipstack, c->readbuf, 1, TimerLeftMS(timer));
 8026716:	68fb      	ldr	r3, [r7, #12]
 8026718:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 802671a:	685c      	ldr	r4, [r3, #4]
 802671c:	68fb      	ldr	r3, [r7, #12]
 802671e:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 8026720:	68fb      	ldr	r3, [r7, #12]
 8026722:	695e      	ldr	r6, [r3, #20]
 8026724:	68b8      	ldr	r0, [r7, #8]
 8026726:	f000 fdf7 	bl	8027318 <TimerLeftMS>
 802672a:	4603      	mov	r3, r0
 802672c:	2201      	movs	r2, #1
 802672e:	4631      	mov	r1, r6
 8026730:	4628      	mov	r0, r5
 8026732:	47a0      	blx	r4
 8026734:	61f8      	str	r0, [r7, #28]
    if (rc != 1)
 8026736:	69fb      	ldr	r3, [r7, #28]
 8026738:	2b01      	cmp	r3, #1
 802673a:	d15d      	bne.n	80267f8 <readPacket+0xf8>
        goto exit;

    len = 1;
 802673c:	2301      	movs	r3, #1
 802673e:	61bb      	str	r3, [r7, #24]
    /* 2. read the remaining length.  This is variable in itself */
    decodePacket(c, &rem_len, TimerLeftMS(timer));
 8026740:	68b8      	ldr	r0, [r7, #8]
 8026742:	f000 fde9 	bl	8027318 <TimerLeftMS>
 8026746:	4602      	mov	r2, r0
 8026748:	f107 0310 	add.w	r3, r7, #16
 802674c:	4619      	mov	r1, r3
 802674e:	68f8      	ldr	r0, [r7, #12]
 8026750:	f7ff ff92 	bl	8026678 <decodePacket>
    len += MQTTPacket_encode(c->readbuf + 1, rem_len); /* put the original remaining length back into the buffer */
 8026754:	68fb      	ldr	r3, [r7, #12]
 8026756:	695b      	ldr	r3, [r3, #20]
 8026758:	3301      	adds	r3, #1
 802675a:	693a      	ldr	r2, [r7, #16]
 802675c:	4611      	mov	r1, r2
 802675e:	4618      	mov	r0, r3
 8026760:	f001 f959 	bl	8027a16 <MQTTPacket_encode>
 8026764:	4602      	mov	r2, r0
 8026766:	69bb      	ldr	r3, [r7, #24]
 8026768:	4413      	add	r3, r2
 802676a:	61bb      	str	r3, [r7, #24]

    if (rem_len > (c->readbuf_size - len))
 802676c:	68fb      	ldr	r3, [r7, #12]
 802676e:	68da      	ldr	r2, [r3, #12]
 8026770:	69bb      	ldr	r3, [r7, #24]
 8026772:	1ad3      	subs	r3, r2, r3
 8026774:	693a      	ldr	r2, [r7, #16]
 8026776:	4293      	cmp	r3, r2
 8026778:	d203      	bcs.n	8026782 <readPacket+0x82>
    {
        rc = BUFFER_OVERFLOW;
 802677a:	f06f 0301 	mvn.w	r3, #1
 802677e:	61fb      	str	r3, [r7, #28]
        goto exit;
 8026780:	e03d      	b.n	80267fe <readPacket+0xfe>
    }

    /* 3. read the rest of the buffer using a callback to supply the rest of the data */
    if (rem_len > 0 && (rc = c->ipstack->mqttread(c->ipstack, c->readbuf + len, rem_len, TimerLeftMS(timer)) != rem_len)) {
 8026782:	693b      	ldr	r3, [r7, #16]
 8026784:	2b00      	cmp	r3, #0
 8026786:	dd20      	ble.n	80267ca <readPacket+0xca>
 8026788:	68fb      	ldr	r3, [r7, #12]
 802678a:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 802678c:	685c      	ldr	r4, [r3, #4]
 802678e:	68fb      	ldr	r3, [r7, #12]
 8026790:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 8026792:	68fb      	ldr	r3, [r7, #12]
 8026794:	695a      	ldr	r2, [r3, #20]
 8026796:	69bb      	ldr	r3, [r7, #24]
 8026798:	18d6      	adds	r6, r2, r3
 802679a:	693b      	ldr	r3, [r7, #16]
 802679c:	607b      	str	r3, [r7, #4]
 802679e:	68b8      	ldr	r0, [r7, #8]
 80267a0:	f000 fdba 	bl	8027318 <TimerLeftMS>
 80267a4:	4603      	mov	r3, r0
 80267a6:	687a      	ldr	r2, [r7, #4]
 80267a8:	4631      	mov	r1, r6
 80267aa:	4628      	mov	r0, r5
 80267ac:	47a0      	blx	r4
 80267ae:	4602      	mov	r2, r0
 80267b0:	693b      	ldr	r3, [r7, #16]
 80267b2:	429a      	cmp	r2, r3
 80267b4:	bf14      	ite	ne
 80267b6:	2301      	movne	r3, #1
 80267b8:	2300      	moveq	r3, #0
 80267ba:	b2db      	uxtb	r3, r3
 80267bc:	61fb      	str	r3, [r7, #28]
 80267be:	69fb      	ldr	r3, [r7, #28]
 80267c0:	2b00      	cmp	r3, #0
 80267c2:	d002      	beq.n	80267ca <readPacket+0xca>
        rc = 0;
 80267c4:	2300      	movs	r3, #0
 80267c6:	61fb      	str	r3, [r7, #28]
        goto exit;
 80267c8:	e019      	b.n	80267fe <readPacket+0xfe>
    }

    header.byte = c->readbuf[0];
 80267ca:	68fb      	ldr	r3, [r7, #12]
 80267cc:	695b      	ldr	r3, [r3, #20]
 80267ce:	781b      	ldrb	r3, [r3, #0]
 80267d0:	753b      	strb	r3, [r7, #20]
    rc = header.bits.type;
 80267d2:	7d3b      	ldrb	r3, [r7, #20]
 80267d4:	f3c3 1303 	ubfx	r3, r3, #4, #4
 80267d8:	b2db      	uxtb	r3, r3
 80267da:	61fb      	str	r3, [r7, #28]
    if (c->keepAliveInterval > 0)
 80267dc:	68fb      	ldr	r3, [r7, #12]
 80267de:	699b      	ldr	r3, [r3, #24]
 80267e0:	2b00      	cmp	r3, #0
 80267e2:	d00b      	beq.n	80267fc <readPacket+0xfc>
        TimerCountdown(&c->last_received, c->keepAliveInterval); // record the fact that we have MQTT_SUCCESSfully received a packet
 80267e4:	68fb      	ldr	r3, [r7, #12]
 80267e6:	f103 0260 	add.w	r2, r3, #96	@ 0x60
 80267ea:	68fb      	ldr	r3, [r7, #12]
 80267ec:	699b      	ldr	r3, [r3, #24]
 80267ee:	4619      	mov	r1, r3
 80267f0:	4610      	mov	r0, r2
 80267f2:	f000 fd79 	bl	80272e8 <TimerCountdown>
 80267f6:	e002      	b.n	80267fe <readPacket+0xfe>
        goto exit;
 80267f8:	bf00      	nop
 80267fa:	e000      	b.n	80267fe <readPacket+0xfe>
exit:
 80267fc:	bf00      	nop
    return rc;
 80267fe:	69fb      	ldr	r3, [r7, #28]
}
 8026800:	4618      	mov	r0, r3
 8026802:	3724      	adds	r7, #36	@ 0x24
 8026804:	46bd      	mov	sp, r7
 8026806:	bdf0      	pop	{r4, r5, r6, r7, pc}

08026808 <isTopicMatched>:

// assume topic filter and name is in correct format
// # can only be at end
// + and # can only be next to separator
static char isTopicMatched(char* topicFilter, MQTTString* topicName)
{
 8026808:	b480      	push	{r7}
 802680a:	b087      	sub	sp, #28
 802680c:	af00      	add	r7, sp, #0
 802680e:	6078      	str	r0, [r7, #4]
 8026810:	6039      	str	r1, [r7, #0]
    char* curf = topicFilter;
 8026812:	687b      	ldr	r3, [r7, #4]
 8026814:	617b      	str	r3, [r7, #20]
    char* curn = topicName->lenstring.data;
 8026816:	683b      	ldr	r3, [r7, #0]
 8026818:	689b      	ldr	r3, [r3, #8]
 802681a:	613b      	str	r3, [r7, #16]
    char* curn_end = curn + topicName->lenstring.len;
 802681c:	683b      	ldr	r3, [r7, #0]
 802681e:	685b      	ldr	r3, [r3, #4]
 8026820:	461a      	mov	r2, r3
 8026822:	693b      	ldr	r3, [r7, #16]
 8026824:	4413      	add	r3, r2
 8026826:	60bb      	str	r3, [r7, #8]

    while (*curf && curn < curn_end)
 8026828:	e039      	b.n	802689e <isTopicMatched+0x96>
    {
        if (*curn == '/' && *curf != '/')
 802682a:	693b      	ldr	r3, [r7, #16]
 802682c:	781b      	ldrb	r3, [r3, #0]
 802682e:	2b2f      	cmp	r3, #47	@ 0x2f
 8026830:	d103      	bne.n	802683a <isTopicMatched+0x32>
 8026832:	697b      	ldr	r3, [r7, #20]
 8026834:	781b      	ldrb	r3, [r3, #0]
 8026836:	2b2f      	cmp	r3, #47	@ 0x2f
 8026838:	d13a      	bne.n	80268b0 <isTopicMatched+0xa8>
            break;
        if (*curf != '+' && *curf != '#' && *curf != *curn)
 802683a:	697b      	ldr	r3, [r7, #20]
 802683c:	781b      	ldrb	r3, [r3, #0]
 802683e:	2b2b      	cmp	r3, #43	@ 0x2b
 8026840:	d009      	beq.n	8026856 <isTopicMatched+0x4e>
 8026842:	697b      	ldr	r3, [r7, #20]
 8026844:	781b      	ldrb	r3, [r3, #0]
 8026846:	2b23      	cmp	r3, #35	@ 0x23
 8026848:	d005      	beq.n	8026856 <isTopicMatched+0x4e>
 802684a:	697b      	ldr	r3, [r7, #20]
 802684c:	781a      	ldrb	r2, [r3, #0]
 802684e:	693b      	ldr	r3, [r7, #16]
 8026850:	781b      	ldrb	r3, [r3, #0]
 8026852:	429a      	cmp	r2, r3
 8026854:	d12e      	bne.n	80268b4 <isTopicMatched+0xac>
            break;
        if (*curf == '+')
 8026856:	697b      	ldr	r3, [r7, #20]
 8026858:	781b      	ldrb	r3, [r3, #0]
 802685a:	2b2b      	cmp	r3, #43	@ 0x2b
 802685c:	d112      	bne.n	8026884 <isTopicMatched+0x7c>
        {   // skip until we meet the next separator, or end of string
            char* nextpos = curn + 1;
 802685e:	693b      	ldr	r3, [r7, #16]
 8026860:	3301      	adds	r3, #1
 8026862:	60fb      	str	r3, [r7, #12]
            while (nextpos < curn_end && *nextpos != '/')
 8026864:	e005      	b.n	8026872 <isTopicMatched+0x6a>
                nextpos = ++curn + 1;
 8026866:	693b      	ldr	r3, [r7, #16]
 8026868:	3301      	adds	r3, #1
 802686a:	613b      	str	r3, [r7, #16]
 802686c:	693b      	ldr	r3, [r7, #16]
 802686e:	3301      	adds	r3, #1
 8026870:	60fb      	str	r3, [r7, #12]
            while (nextpos < curn_end && *nextpos != '/')
 8026872:	68fa      	ldr	r2, [r7, #12]
 8026874:	68bb      	ldr	r3, [r7, #8]
 8026876:	429a      	cmp	r2, r3
 8026878:	d20b      	bcs.n	8026892 <isTopicMatched+0x8a>
 802687a:	68fb      	ldr	r3, [r7, #12]
 802687c:	781b      	ldrb	r3, [r3, #0]
 802687e:	2b2f      	cmp	r3, #47	@ 0x2f
 8026880:	d1f1      	bne.n	8026866 <isTopicMatched+0x5e>
 8026882:	e006      	b.n	8026892 <isTopicMatched+0x8a>
        }
        else if (*curf == '#')
 8026884:	697b      	ldr	r3, [r7, #20]
 8026886:	781b      	ldrb	r3, [r3, #0]
 8026888:	2b23      	cmp	r3, #35	@ 0x23
 802688a:	d102      	bne.n	8026892 <isTopicMatched+0x8a>
            curn = curn_end - 1;    // skip until end of string
 802688c:	68bb      	ldr	r3, [r7, #8]
 802688e:	3b01      	subs	r3, #1
 8026890:	613b      	str	r3, [r7, #16]
        curf++;
 8026892:	697b      	ldr	r3, [r7, #20]
 8026894:	3301      	adds	r3, #1
 8026896:	617b      	str	r3, [r7, #20]
        curn++;
 8026898:	693b      	ldr	r3, [r7, #16]
 802689a:	3301      	adds	r3, #1
 802689c:	613b      	str	r3, [r7, #16]
    while (*curf && curn < curn_end)
 802689e:	697b      	ldr	r3, [r7, #20]
 80268a0:	781b      	ldrb	r3, [r3, #0]
 80268a2:	2b00      	cmp	r3, #0
 80268a4:	d007      	beq.n	80268b6 <isTopicMatched+0xae>
 80268a6:	693a      	ldr	r2, [r7, #16]
 80268a8:	68bb      	ldr	r3, [r7, #8]
 80268aa:	429a      	cmp	r2, r3
 80268ac:	d3bd      	bcc.n	802682a <isTopicMatched+0x22>
 80268ae:	e002      	b.n	80268b6 <isTopicMatched+0xae>
            break;
 80268b0:	bf00      	nop
 80268b2:	e000      	b.n	80268b6 <isTopicMatched+0xae>
            break;
 80268b4:	bf00      	nop
    };

    return (curn == curn_end) && (*curf == '\0');
 80268b6:	693a      	ldr	r2, [r7, #16]
 80268b8:	68bb      	ldr	r3, [r7, #8]
 80268ba:	429a      	cmp	r2, r3
 80268bc:	d105      	bne.n	80268ca <isTopicMatched+0xc2>
 80268be:	697b      	ldr	r3, [r7, #20]
 80268c0:	781b      	ldrb	r3, [r3, #0]
 80268c2:	2b00      	cmp	r3, #0
 80268c4:	d101      	bne.n	80268ca <isTopicMatched+0xc2>
 80268c6:	2301      	movs	r3, #1
 80268c8:	e000      	b.n	80268cc <isTopicMatched+0xc4>
 80268ca:	2300      	movs	r3, #0
 80268cc:	b2db      	uxtb	r3, r3
}
 80268ce:	4618      	mov	r0, r3
 80268d0:	371c      	adds	r7, #28
 80268d2:	46bd      	mov	sp, r7
 80268d4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80268d8:	4770      	bx	lr

080268da <deliverMessage>:


int deliverMessage(MQTTClient* c, MQTTString* topicName, MQTTMessage* message)
{
 80268da:	b580      	push	{r7, lr}
 80268dc:	b08a      	sub	sp, #40	@ 0x28
 80268de:	af00      	add	r7, sp, #0
 80268e0:	60f8      	str	r0, [r7, #12]
 80268e2:	60b9      	str	r1, [r7, #8]
 80268e4:	607a      	str	r2, [r7, #4]
    int i;
    int rc = FAILURE;
 80268e6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80268ea:	623b      	str	r3, [r7, #32]

    // we have to find the right message handler - indexed by topic
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 80268ec:	2300      	movs	r3, #0
 80268ee:	627b      	str	r3, [r7, #36]	@ 0x24
 80268f0:	e03c      	b.n	802696c <deliverMessage+0x92>
    {
        if (c->messageHandlers[i].topicFilter != 0 && (MQTTPacket_equals(topicName, (char*)c->messageHandlers[i].topicFilter) ||
 80268f2:	68fb      	ldr	r3, [r7, #12]
 80268f4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80268f6:	3205      	adds	r2, #5
 80268f8:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 80268fc:	2b00      	cmp	r3, #0
 80268fe:	d032      	beq.n	8026966 <deliverMessage+0x8c>
 8026900:	68fb      	ldr	r3, [r7, #12]
 8026902:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8026904:	3205      	adds	r2, #5
 8026906:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 802690a:	4619      	mov	r1, r3
 802690c:	68b8      	ldr	r0, [r7, #8]
 802690e:	f001 fa51 	bl	8027db4 <MQTTPacket_equals>
 8026912:	4603      	mov	r3, r0
 8026914:	2b00      	cmp	r3, #0
 8026916:	d10b      	bne.n	8026930 <deliverMessage+0x56>
                isTopicMatched((char*)c->messageHandlers[i].topicFilter, topicName)))
 8026918:	68fb      	ldr	r3, [r7, #12]
 802691a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802691c:	3205      	adds	r2, #5
 802691e:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8026922:	68b9      	ldr	r1, [r7, #8]
 8026924:	4618      	mov	r0, r3
 8026926:	f7ff ff6f 	bl	8026808 <isTopicMatched>
 802692a:	4603      	mov	r3, r0
        if (c->messageHandlers[i].topicFilter != 0 && (MQTTPacket_equals(topicName, (char*)c->messageHandlers[i].topicFilter) ||
 802692c:	2b00      	cmp	r3, #0
 802692e:	d01a      	beq.n	8026966 <deliverMessage+0x8c>
        {
            if (c->messageHandlers[i].fp != NULL)
 8026930:	68fa      	ldr	r2, [r7, #12]
 8026932:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026934:	3305      	adds	r3, #5
 8026936:	00db      	lsls	r3, r3, #3
 8026938:	4413      	add	r3, r2
 802693a:	685b      	ldr	r3, [r3, #4]
 802693c:	2b00      	cmp	r3, #0
 802693e:	d012      	beq.n	8026966 <deliverMessage+0x8c>
            {
                MessageData md;
                NewMessageData(&md, topicName, message);
 8026940:	f107 0318 	add.w	r3, r7, #24
 8026944:	687a      	ldr	r2, [r7, #4]
 8026946:	68b9      	ldr	r1, [r7, #8]
 8026948:	4618      	mov	r0, r3
 802694a:	f7ff fdcf 	bl	80264ec <NewMessageData>
                c->messageHandlers[i].fp(&md);
 802694e:	68fa      	ldr	r2, [r7, #12]
 8026950:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026952:	3305      	adds	r3, #5
 8026954:	00db      	lsls	r3, r3, #3
 8026956:	4413      	add	r3, r2
 8026958:	685b      	ldr	r3, [r3, #4]
 802695a:	f107 0218 	add.w	r2, r7, #24
 802695e:	4610      	mov	r0, r2
 8026960:	4798      	blx	r3
                rc = MQTT_SUCCESS;
 8026962:	2300      	movs	r3, #0
 8026964:	623b      	str	r3, [r7, #32]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026966:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026968:	3301      	adds	r3, #1
 802696a:	627b      	str	r3, [r7, #36]	@ 0x24
 802696c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802696e:	2b04      	cmp	r3, #4
 8026970:	ddbf      	ble.n	80268f2 <deliverMessage+0x18>
            }
        }
    }

    if (rc == FAILURE && c->defaultMessageHandler != NULL)
 8026972:	6a3b      	ldr	r3, [r7, #32]
 8026974:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8026978:	d112      	bne.n	80269a0 <deliverMessage+0xc6>
 802697a:	68fb      	ldr	r3, [r7, #12]
 802697c:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 802697e:	2b00      	cmp	r3, #0
 8026980:	d00e      	beq.n	80269a0 <deliverMessage+0xc6>
    {
        MessageData md;
        NewMessageData(&md, topicName, message);
 8026982:	f107 0310 	add.w	r3, r7, #16
 8026986:	687a      	ldr	r2, [r7, #4]
 8026988:	68b9      	ldr	r1, [r7, #8]
 802698a:	4618      	mov	r0, r3
 802698c:	f7ff fdae 	bl	80264ec <NewMessageData>
        c->defaultMessageHandler(&md);
 8026990:	68fb      	ldr	r3, [r7, #12]
 8026992:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8026994:	f107 0210 	add.w	r2, r7, #16
 8026998:	4610      	mov	r0, r2
 802699a:	4798      	blx	r3
        rc = MQTT_SUCCESS;
 802699c:	2300      	movs	r3, #0
 802699e:	623b      	str	r3, [r7, #32]
    }

    return rc;
 80269a0:	6a3b      	ldr	r3, [r7, #32]
}
 80269a2:	4618      	mov	r0, r3
 80269a4:	3728      	adds	r7, #40	@ 0x28
 80269a6:	46bd      	mov	sp, r7
 80269a8:	bd80      	pop	{r7, pc}

080269aa <keepalive>:


int keepalive(MQTTClient* c)
{
 80269aa:	b580      	push	{r7, lr}
 80269ac:	b086      	sub	sp, #24
 80269ae:	af00      	add	r7, sp, #0
 80269b0:	6078      	str	r0, [r7, #4]
    int rc = MQTT_SUCCESS;
 80269b2:	2300      	movs	r3, #0
 80269b4:	617b      	str	r3, [r7, #20]

    if (c->keepAliveInterval == 0)
 80269b6:	687b      	ldr	r3, [r7, #4]
 80269b8:	699b      	ldr	r3, [r3, #24]
 80269ba:	2b00      	cmp	r3, #0
 80269bc:	d03e      	beq.n	8026a3c <keepalive+0x92>
        goto exit;

    if (TimerIsExpired(&c->last_sent) || TimerIsExpired(&c->last_received))
 80269be:	687b      	ldr	r3, [r7, #4]
 80269c0:	3358      	adds	r3, #88	@ 0x58
 80269c2:	4618      	mov	r0, r3
 80269c4:	f000 fc66 	bl	8027294 <TimerIsExpired>
 80269c8:	4603      	mov	r3, r0
 80269ca:	2b00      	cmp	r3, #0
 80269cc:	d107      	bne.n	80269de <keepalive+0x34>
 80269ce:	687b      	ldr	r3, [r7, #4]
 80269d0:	3360      	adds	r3, #96	@ 0x60
 80269d2:	4618      	mov	r0, r3
 80269d4:	f000 fc5e 	bl	8027294 <TimerIsExpired>
 80269d8:	4603      	mov	r3, r0
 80269da:	2b00      	cmp	r3, #0
 80269dc:	d030      	beq.n	8026a40 <keepalive+0x96>
    {
        if (c->ping_outstanding)
 80269de:	687b      	ldr	r3, [r7, #4]
 80269e0:	7f1b      	ldrb	r3, [r3, #28]
 80269e2:	2b00      	cmp	r3, #0
 80269e4:	d003      	beq.n	80269ee <keepalive+0x44>
            rc = FAILURE; /* PINGRESP not received in keepalive interval */
 80269e6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80269ea:	617b      	str	r3, [r7, #20]
 80269ec:	e029      	b.n	8026a42 <keepalive+0x98>
        else
        {
            Timer timer;
            TimerInit(&timer);
 80269ee:	f107 0308 	add.w	r3, r7, #8
 80269f2:	4618      	mov	r0, r3
 80269f4:	f000 fca6 	bl	8027344 <TimerInit>
            TimerCountdownMS(&timer, 1000);
 80269f8:	f107 0308 	add.w	r3, r7, #8
 80269fc:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
 8026a00:	4618      	mov	r0, r3
 8026a02:	f000 fc5d 	bl	80272c0 <TimerCountdownMS>
            int len = MQTTSerialize_pingreq(c->buf, c->buf_size);
 8026a06:	687b      	ldr	r3, [r7, #4]
 8026a08:	691a      	ldr	r2, [r3, #16]
 8026a0a:	687b      	ldr	r3, [r7, #4]
 8026a0c:	689b      	ldr	r3, [r3, #8]
 8026a0e:	4619      	mov	r1, r3
 8026a10:	4610      	mov	r0, r2
 8026a12:	f000 ff34 	bl	802787e <MQTTSerialize_pingreq>
 8026a16:	6138      	str	r0, [r7, #16]
            if (len > 0 && (rc = sendPacket(c, len, &timer)) == MQTT_SUCCESS) // send the ping packet
 8026a18:	693b      	ldr	r3, [r7, #16]
 8026a1a:	2b00      	cmp	r3, #0
 8026a1c:	dd11      	ble.n	8026a42 <keepalive+0x98>
 8026a1e:	f107 0308 	add.w	r3, r7, #8
 8026a22:	461a      	mov	r2, r3
 8026a24:	6939      	ldr	r1, [r7, #16]
 8026a26:	6878      	ldr	r0, [r7, #4]
 8026a28:	f7ff fd8b 	bl	8026542 <sendPacket>
 8026a2c:	6178      	str	r0, [r7, #20]
 8026a2e:	697b      	ldr	r3, [r7, #20]
 8026a30:	2b00      	cmp	r3, #0
 8026a32:	d106      	bne.n	8026a42 <keepalive+0x98>
                c->ping_outstanding = 1;
 8026a34:	687b      	ldr	r3, [r7, #4]
 8026a36:	2201      	movs	r2, #1
 8026a38:	771a      	strb	r2, [r3, #28]
 8026a3a:	e002      	b.n	8026a42 <keepalive+0x98>
        goto exit;
 8026a3c:	bf00      	nop
 8026a3e:	e000      	b.n	8026a42 <keepalive+0x98>
        }
    }

exit:
 8026a40:	bf00      	nop
    return rc;
 8026a42:	697b      	ldr	r3, [r7, #20]
}
 8026a44:	4618      	mov	r0, r3
 8026a46:	3718      	adds	r7, #24
 8026a48:	46bd      	mov	sp, r7
 8026a4a:	bd80      	pop	{r7, pc}

08026a4c <MQTTCleanSession>:


void MQTTCleanSession(MQTTClient* c)
{
 8026a4c:	b480      	push	{r7}
 8026a4e:	b085      	sub	sp, #20
 8026a50:	af00      	add	r7, sp, #0
 8026a52:	6078      	str	r0, [r7, #4]
    int i = 0;
 8026a54:	2300      	movs	r3, #0
 8026a56:	60fb      	str	r3, [r7, #12]

    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026a58:	2300      	movs	r3, #0
 8026a5a:	60fb      	str	r3, [r7, #12]
 8026a5c:	e008      	b.n	8026a70 <MQTTCleanSession+0x24>
        c->messageHandlers[i].topicFilter = NULL;
 8026a5e:	687b      	ldr	r3, [r7, #4]
 8026a60:	68fa      	ldr	r2, [r7, #12]
 8026a62:	3205      	adds	r2, #5
 8026a64:	2100      	movs	r1, #0
 8026a66:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026a6a:	68fb      	ldr	r3, [r7, #12]
 8026a6c:	3301      	adds	r3, #1
 8026a6e:	60fb      	str	r3, [r7, #12]
 8026a70:	68fb      	ldr	r3, [r7, #12]
 8026a72:	2b04      	cmp	r3, #4
 8026a74:	ddf3      	ble.n	8026a5e <MQTTCleanSession+0x12>
}
 8026a76:	bf00      	nop
 8026a78:	bf00      	nop
 8026a7a:	3714      	adds	r7, #20
 8026a7c:	46bd      	mov	sp, r7
 8026a7e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026a82:	4770      	bx	lr

08026a84 <MQTTCloseSession>:


void MQTTCloseSession(MQTTClient* c)
{
 8026a84:	b580      	push	{r7, lr}
 8026a86:	b082      	sub	sp, #8
 8026a88:	af00      	add	r7, sp, #0
 8026a8a:	6078      	str	r0, [r7, #4]
    c->ping_outstanding = 0;
 8026a8c:	687b      	ldr	r3, [r7, #4]
 8026a8e:	2200      	movs	r2, #0
 8026a90:	771a      	strb	r2, [r3, #28]
    c->isconnected = 0;
 8026a92:	687b      	ldr	r3, [r7, #4]
 8026a94:	2200      	movs	r2, #0
 8026a96:	621a      	str	r2, [r3, #32]
    if (c->cleansession)
 8026a98:	687b      	ldr	r3, [r7, #4]
 8026a9a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8026a9c:	2b00      	cmp	r3, #0
 8026a9e:	d002      	beq.n	8026aa6 <MQTTCloseSession+0x22>
        MQTTCleanSession(c);
 8026aa0:	6878      	ldr	r0, [r7, #4]
 8026aa2:	f7ff ffd3 	bl	8026a4c <MQTTCleanSession>
}
 8026aa6:	bf00      	nop
 8026aa8:	3708      	adds	r7, #8
 8026aaa:	46bd      	mov	sp, r7
 8026aac:	bd80      	pop	{r7, pc}
	...

08026ab0 <cycle>:


int cycle(MQTTClient* c, Timer* timer)
{
 8026ab0:	b5f0      	push	{r4, r5, r6, r7, lr}
 8026ab2:	b095      	sub	sp, #84	@ 0x54
 8026ab4:	af06      	add	r7, sp, #24
 8026ab6:	6078      	str	r0, [r7, #4]
 8026ab8:	6039      	str	r1, [r7, #0]
    int len = 0,
 8026aba:	2300      	movs	r3, #0
 8026abc:	637b      	str	r3, [r7, #52]	@ 0x34
        rc = MQTT_SUCCESS;
 8026abe:	2300      	movs	r3, #0
 8026ac0:	633b      	str	r3, [r7, #48]	@ 0x30

    int packet_type = readPacket(c, timer);     /* read the socket, see what work is due */
 8026ac2:	6839      	ldr	r1, [r7, #0]
 8026ac4:	6878      	ldr	r0, [r7, #4]
 8026ac6:	f7ff fe1b 	bl	8026700 <readPacket>
 8026aca:	62f8      	str	r0, [r7, #44]	@ 0x2c

    switch (packet_type)
 8026acc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026ace:	2b0d      	cmp	r3, #13
 8026ad0:	d81e      	bhi.n	8026b10 <cycle+0x60>
 8026ad2:	a201      	add	r2, pc, #4	@ (adr r2, 8026ad8 <cycle+0x28>)
 8026ad4:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8026ad8:	08026c67 	.word	0x08026c67
 8026adc:	08026b11 	.word	0x08026b11
 8026ae0:	08026c67 	.word	0x08026c67
 8026ae4:	08026b17 	.word	0x08026b17
 8026ae8:	08026c67 	.word	0x08026c67
 8026aec:	08026be3 	.word	0x08026be3
 8026af0:	08026be3 	.word	0x08026be3
 8026af4:	08026c67 	.word	0x08026c67
 8026af8:	08026b11 	.word	0x08026b11
 8026afc:	08026c67 	.word	0x08026c67
 8026b00:	08026b11 	.word	0x08026b11
 8026b04:	08026c67 	.word	0x08026c67
 8026b08:	08026b11 	.word	0x08026b11
 8026b0c:	08026c5f 	.word	0x08026c5f
    {
        default:
            /* no more data to read, unrecoverable. Or read packet fails due to unexpected network error */
            rc = packet_type;
 8026b10:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026b12:	633b      	str	r3, [r7, #48]	@ 0x30
            goto exit;
 8026b14:	e0b9      	b.n	8026c8a <cycle+0x1da>
        case PUBLISH:
        {
            MQTTString topicName;
            MQTTMessage msg;
            int intQoS;
            msg.payloadlen = 0; /* this is a size_t, but deserialize publish sets this as int */
 8026b16:	2300      	movs	r3, #0
 8026b18:	61fb      	str	r3, [r7, #28]
            if (MQTTDeserialize_publish(&msg.dup, &intQoS, &msg.retained, &msg.id, &topicName,
 8026b1a:	687b      	ldr	r3, [r7, #4]
 8026b1c:	695b      	ldr	r3, [r3, #20]
               (unsigned char**)&msg.payload, (int*)&msg.payloadlen, c->readbuf, c->readbuf_size) != 1)
 8026b1e:	687a      	ldr	r2, [r7, #4]
 8026b20:	68d2      	ldr	r2, [r2, #12]
            if (MQTTDeserialize_publish(&msg.dup, &intQoS, &msg.retained, &msg.id, &topicName,
 8026b22:	4616      	mov	r6, r2
 8026b24:	f107 0210 	add.w	r2, r7, #16
 8026b28:	1d15      	adds	r5, r2, #4
 8026b2a:	f107 0210 	add.w	r2, r7, #16
 8026b2e:	1c54      	adds	r4, r2, #1
 8026b30:	f107 010c 	add.w	r1, r7, #12
 8026b34:	f107 0210 	add.w	r2, r7, #16
 8026b38:	1c90      	adds	r0, r2, #2
 8026b3a:	9604      	str	r6, [sp, #16]
 8026b3c:	9303      	str	r3, [sp, #12]
 8026b3e:	f107 0310 	add.w	r3, r7, #16
 8026b42:	330c      	adds	r3, #12
 8026b44:	9302      	str	r3, [sp, #8]
 8026b46:	f107 0310 	add.w	r3, r7, #16
 8026b4a:	3308      	adds	r3, #8
 8026b4c:	9301      	str	r3, [sp, #4]
 8026b4e:	f107 0320 	add.w	r3, r7, #32
 8026b52:	9300      	str	r3, [sp, #0]
 8026b54:	462b      	mov	r3, r5
 8026b56:	4622      	mov	r2, r4
 8026b58:	f000 fea0 	bl	802789c <MQTTDeserialize_publish>
 8026b5c:	4603      	mov	r3, r0
 8026b5e:	2b01      	cmp	r3, #1
 8026b60:	f040 8090 	bne.w	8026c84 <cycle+0x1d4>
                goto exit;
            msg.qos = (enum QoS)intQoS;
 8026b64:	68fb      	ldr	r3, [r7, #12]
 8026b66:	b2db      	uxtb	r3, r3
 8026b68:	743b      	strb	r3, [r7, #16]
            deliverMessage(c, &topicName, &msg);
 8026b6a:	f107 0210 	add.w	r2, r7, #16
 8026b6e:	f107 0320 	add.w	r3, r7, #32
 8026b72:	4619      	mov	r1, r3
 8026b74:	6878      	ldr	r0, [r7, #4]
 8026b76:	f7ff feb0 	bl	80268da <deliverMessage>
            if (msg.qos != QOS0)
 8026b7a:	7c3b      	ldrb	r3, [r7, #16]
 8026b7c:	2b00      	cmp	r3, #0
 8026b7e:	d074      	beq.n	8026c6a <cycle+0x1ba>
            {
                if (msg.qos == QOS1)
 8026b80:	7c3b      	ldrb	r3, [r7, #16]
 8026b82:	2b01      	cmp	r3, #1
 8026b84:	d10c      	bne.n	8026ba0 <cycle+0xf0>
                    len = MQTTSerialize_ack(c->buf, c->buf_size, PUBACK, 0, msg.id);
 8026b86:	687b      	ldr	r3, [r7, #4]
 8026b88:	6918      	ldr	r0, [r3, #16]
 8026b8a:	687b      	ldr	r3, [r7, #4]
 8026b8c:	689b      	ldr	r3, [r3, #8]
 8026b8e:	4619      	mov	r1, r3
 8026b90:	8abb      	ldrh	r3, [r7, #20]
 8026b92:	9300      	str	r3, [sp, #0]
 8026b94:	2300      	movs	r3, #0
 8026b96:	2204      	movs	r2, #4
 8026b98:	f001 f9d9 	bl	8027f4e <MQTTSerialize_ack>
 8026b9c:	6378      	str	r0, [r7, #52]	@ 0x34
 8026b9e:	e00e      	b.n	8026bbe <cycle+0x10e>
                else if (msg.qos == QOS2)
 8026ba0:	7c3b      	ldrb	r3, [r7, #16]
 8026ba2:	2b02      	cmp	r3, #2
 8026ba4:	d10b      	bne.n	8026bbe <cycle+0x10e>
                    len = MQTTSerialize_ack(c->buf, c->buf_size, PUBREC, 0, msg.id);
 8026ba6:	687b      	ldr	r3, [r7, #4]
 8026ba8:	6918      	ldr	r0, [r3, #16]
 8026baa:	687b      	ldr	r3, [r7, #4]
 8026bac:	689b      	ldr	r3, [r3, #8]
 8026bae:	4619      	mov	r1, r3
 8026bb0:	8abb      	ldrh	r3, [r7, #20]
 8026bb2:	9300      	str	r3, [sp, #0]
 8026bb4:	2300      	movs	r3, #0
 8026bb6:	2205      	movs	r2, #5
 8026bb8:	f001 f9c9 	bl	8027f4e <MQTTSerialize_ack>
 8026bbc:	6378      	str	r0, [r7, #52]	@ 0x34
                if (len <= 0)
 8026bbe:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8026bc0:	2b00      	cmp	r3, #0
 8026bc2:	dc03      	bgt.n	8026bcc <cycle+0x11c>
                    rc = FAILURE;
 8026bc4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026bc8:	633b      	str	r3, [r7, #48]	@ 0x30
 8026bca:	e005      	b.n	8026bd8 <cycle+0x128>
                else
                    rc = sendPacket(c, len, timer);
 8026bcc:	683a      	ldr	r2, [r7, #0]
 8026bce:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8026bd0:	6878      	ldr	r0, [r7, #4]
 8026bd2:	f7ff fcb6 	bl	8026542 <sendPacket>
 8026bd6:	6338      	str	r0, [r7, #48]	@ 0x30
                if (rc == FAILURE)
 8026bd8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026bda:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8026bde:	d144      	bne.n	8026c6a <cycle+0x1ba>
                    goto exit; // there was a problem
 8026be0:	e053      	b.n	8026c8a <cycle+0x1da>
        case PUBREC:
        case PUBREL:
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 8026be2:	687b      	ldr	r3, [r7, #4]
 8026be4:	695c      	ldr	r4, [r3, #20]
 8026be6:	687b      	ldr	r3, [r7, #4]
 8026be8:	68db      	ldr	r3, [r3, #12]
 8026bea:	f107 020a 	add.w	r2, r7, #10
 8026bee:	f107 0109 	add.w	r1, r7, #9
 8026bf2:	f107 0008 	add.w	r0, r7, #8
 8026bf6:	9300      	str	r3, [sp, #0]
 8026bf8:	4623      	mov	r3, r4
 8026bfa:	f000 fec1 	bl	8027980 <MQTTDeserialize_ack>
 8026bfe:	4603      	mov	r3, r0
 8026c00:	2b01      	cmp	r3, #1
 8026c02:	d003      	beq.n	8026c0c <cycle+0x15c>
                rc = FAILURE;
 8026c04:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026c08:	633b      	str	r3, [r7, #48]	@ 0x30
 8026c0a:	e023      	b.n	8026c54 <cycle+0x1a4>
            else if ((len = MQTTSerialize_ack(c->buf, c->buf_size,
 8026c0c:	687b      	ldr	r3, [r7, #4]
 8026c0e:	6918      	ldr	r0, [r3, #16]
 8026c10:	687b      	ldr	r3, [r7, #4]
 8026c12:	689b      	ldr	r3, [r3, #8]
 8026c14:	4619      	mov	r1, r3
 8026c16:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026c18:	2b05      	cmp	r3, #5
 8026c1a:	d101      	bne.n	8026c20 <cycle+0x170>
 8026c1c:	2206      	movs	r2, #6
 8026c1e:	e000      	b.n	8026c22 <cycle+0x172>
 8026c20:	2207      	movs	r2, #7
 8026c22:	897b      	ldrh	r3, [r7, #10]
 8026c24:	9300      	str	r3, [sp, #0]
 8026c26:	2300      	movs	r3, #0
 8026c28:	f001 f991 	bl	8027f4e <MQTTSerialize_ack>
 8026c2c:	6378      	str	r0, [r7, #52]	@ 0x34
 8026c2e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8026c30:	2b00      	cmp	r3, #0
 8026c32:	dc03      	bgt.n	8026c3c <cycle+0x18c>
                (packet_type == PUBREC) ? PUBREL : PUBCOMP, 0, mypacketid)) <= 0)
                rc = FAILURE;
 8026c34:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026c38:	633b      	str	r3, [r7, #48]	@ 0x30
 8026c3a:	e00b      	b.n	8026c54 <cycle+0x1a4>
            else if ((rc = sendPacket(c, len, timer)) != MQTT_SUCCESS) // send the PUBREL packet
 8026c3c:	683a      	ldr	r2, [r7, #0]
 8026c3e:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8026c40:	6878      	ldr	r0, [r7, #4]
 8026c42:	f7ff fc7e 	bl	8026542 <sendPacket>
 8026c46:	6338      	str	r0, [r7, #48]	@ 0x30
 8026c48:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026c4a:	2b00      	cmp	r3, #0
 8026c4c:	d002      	beq.n	8026c54 <cycle+0x1a4>
                rc = FAILURE; // there was a problem
 8026c4e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026c52:	633b      	str	r3, [r7, #48]	@ 0x30
            if (rc == FAILURE)
 8026c54:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026c56:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8026c5a:	d108      	bne.n	8026c6e <cycle+0x1be>
                goto exit; // there was a problem
 8026c5c:	e015      	b.n	8026c8a <cycle+0x1da>
        }

        case PUBCOMP:
            break;
        case PINGRESP:
            c->ping_outstanding = 0;
 8026c5e:	687b      	ldr	r3, [r7, #4]
 8026c60:	2200      	movs	r2, #0
 8026c62:	771a      	strb	r2, [r3, #28]
            break;
 8026c64:	e004      	b.n	8026c70 <cycle+0x1c0>
            break;
 8026c66:	bf00      	nop
 8026c68:	e002      	b.n	8026c70 <cycle+0x1c0>
            break;
 8026c6a:	bf00      	nop
 8026c6c:	e000      	b.n	8026c70 <cycle+0x1c0>
            break;
 8026c6e:	bf00      	nop
    }

    if (keepalive(c) != MQTT_SUCCESS) {
 8026c70:	6878      	ldr	r0, [r7, #4]
 8026c72:	f7ff fe9a 	bl	80269aa <keepalive>
 8026c76:	4603      	mov	r3, r0
 8026c78:	2b00      	cmp	r3, #0
 8026c7a:	d005      	beq.n	8026c88 <cycle+0x1d8>
        //check only keepalive FAILURE status so that previous FAILURE status can be considered as FAULT
        rc = FAILURE;
 8026c7c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026c80:	633b      	str	r3, [r7, #48]	@ 0x30
 8026c82:	e002      	b.n	8026c8a <cycle+0x1da>
                goto exit;
 8026c84:	bf00      	nop
 8026c86:	e000      	b.n	8026c8a <cycle+0x1da>
    }

exit:
 8026c88:	bf00      	nop
    if (rc == MQTT_SUCCESS)
 8026c8a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026c8c:	2b00      	cmp	r3, #0
 8026c8e:	d102      	bne.n	8026c96 <cycle+0x1e6>
        rc = packet_type;
 8026c90:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026c92:	633b      	str	r3, [r7, #48]	@ 0x30
 8026c94:	e006      	b.n	8026ca4 <cycle+0x1f4>
    else if (c->isconnected)
 8026c96:	687b      	ldr	r3, [r7, #4]
 8026c98:	6a1b      	ldr	r3, [r3, #32]
 8026c9a:	2b00      	cmp	r3, #0
 8026c9c:	d002      	beq.n	8026ca4 <cycle+0x1f4>
        MQTTCloseSession(c);
 8026c9e:	6878      	ldr	r0, [r7, #4]
 8026ca0:	f7ff fef0 	bl	8026a84 <MQTTCloseSession>
    return rc;
 8026ca4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
}
 8026ca6:	4618      	mov	r0, r3
 8026ca8:	373c      	adds	r7, #60	@ 0x3c
 8026caa:	46bd      	mov	sp, r7
 8026cac:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8026cae:	bf00      	nop

08026cb0 <MQTTYield>:


int MQTTYield(MQTTClient* c, int timeout_ms)
{
 8026cb0:	b580      	push	{r7, lr}
 8026cb2:	b086      	sub	sp, #24
 8026cb4:	af00      	add	r7, sp, #0
 8026cb6:	6078      	str	r0, [r7, #4]
 8026cb8:	6039      	str	r1, [r7, #0]
    int rc = MQTT_SUCCESS;
 8026cba:	2300      	movs	r3, #0
 8026cbc:	617b      	str	r3, [r7, #20]
    Timer timer;

    TimerInit(&timer);
 8026cbe:	f107 030c 	add.w	r3, r7, #12
 8026cc2:	4618      	mov	r0, r3
 8026cc4:	f000 fb3e 	bl	8027344 <TimerInit>
    TimerCountdownMS(&timer, timeout_ms);
 8026cc8:	683a      	ldr	r2, [r7, #0]
 8026cca:	f107 030c 	add.w	r3, r7, #12
 8026cce:	4611      	mov	r1, r2
 8026cd0:	4618      	mov	r0, r3
 8026cd2:	f000 faf5 	bl	80272c0 <TimerCountdownMS>

	  do
    {
        if (cycle(c, &timer) < 0)
 8026cd6:	f107 030c 	add.w	r3, r7, #12
 8026cda:	4619      	mov	r1, r3
 8026cdc:	6878      	ldr	r0, [r7, #4]
 8026cde:	f7ff fee7 	bl	8026ab0 <cycle>
 8026ce2:	4603      	mov	r3, r0
 8026ce4:	2b00      	cmp	r3, #0
 8026ce6:	da03      	bge.n	8026cf0 <MQTTYield+0x40>
        {
            rc = FAILURE;
 8026ce8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026cec:	617b      	str	r3, [r7, #20]
            break;
 8026cee:	e007      	b.n	8026d00 <MQTTYield+0x50>
        }
  	} while (!TimerIsExpired(&timer));
 8026cf0:	f107 030c 	add.w	r3, r7, #12
 8026cf4:	4618      	mov	r0, r3
 8026cf6:	f000 facd 	bl	8027294 <TimerIsExpired>
 8026cfa:	4603      	mov	r3, r0
 8026cfc:	2b00      	cmp	r3, #0
 8026cfe:	d0ea      	beq.n	8026cd6 <MQTTYield+0x26>

    return rc;
 8026d00:	697b      	ldr	r3, [r7, #20]
}
 8026d02:	4618      	mov	r0, r3
 8026d04:	3718      	adds	r7, #24
 8026d06:	46bd      	mov	sp, r7
 8026d08:	bd80      	pop	{r7, pc}

08026d0a <waitfor>:
}
#endif


int waitfor(MQTTClient* c, int packet_type, Timer* timer)
{
 8026d0a:	b580      	push	{r7, lr}
 8026d0c:	b086      	sub	sp, #24
 8026d0e:	af00      	add	r7, sp, #0
 8026d10:	60f8      	str	r0, [r7, #12]
 8026d12:	60b9      	str	r1, [r7, #8]
 8026d14:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 8026d16:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026d1a:	617b      	str	r3, [r7, #20]

    do
    {
        if (TimerIsExpired(timer))
 8026d1c:	6878      	ldr	r0, [r7, #4]
 8026d1e:	f000 fab9 	bl	8027294 <TimerIsExpired>
 8026d22:	4603      	mov	r3, r0
 8026d24:	2b00      	cmp	r3, #0
 8026d26:	d10c      	bne.n	8026d42 <waitfor+0x38>
            break; // we timed out
        rc = cycle(c, timer);
 8026d28:	6879      	ldr	r1, [r7, #4]
 8026d2a:	68f8      	ldr	r0, [r7, #12]
 8026d2c:	f7ff fec0 	bl	8026ab0 <cycle>
 8026d30:	6178      	str	r0, [r7, #20]
    }
    while (rc != packet_type && rc >= 0);
 8026d32:	697a      	ldr	r2, [r7, #20]
 8026d34:	68bb      	ldr	r3, [r7, #8]
 8026d36:	429a      	cmp	r2, r3
 8026d38:	d004      	beq.n	8026d44 <waitfor+0x3a>
 8026d3a:	697b      	ldr	r3, [r7, #20]
 8026d3c:	2b00      	cmp	r3, #0
 8026d3e:	daed      	bge.n	8026d1c <waitfor+0x12>
 8026d40:	e000      	b.n	8026d44 <waitfor+0x3a>
            break; // we timed out
 8026d42:	bf00      	nop

    return rc;
 8026d44:	697b      	ldr	r3, [r7, #20]
}
 8026d46:	4618      	mov	r0, r3
 8026d48:	3718      	adds	r7, #24
 8026d4a:	46bd      	mov	sp, r7
 8026d4c:	bd80      	pop	{r7, pc}
	...

08026d50 <MQTTConnectWithResults>:




int MQTTConnectWithResults(MQTTClient* c, MQTTPacket_connectData* options, MQTTConnackData* data)
{
 8026d50:	b580      	push	{r7, lr}
 8026d52:	b09e      	sub	sp, #120	@ 0x78
 8026d54:	af00      	add	r7, sp, #0
 8026d56:	60f8      	str	r0, [r7, #12]
 8026d58:	60b9      	str	r1, [r7, #8]
 8026d5a:	607a      	str	r2, [r7, #4]
    Timer connect_timer;
    int rc = FAILURE;
 8026d5c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026d60:	677b      	str	r3, [r7, #116]	@ 0x74
    MQTTPacket_connectData default_options = MQTTPacket_connectData_initializer;
 8026d62:	4a49      	ldr	r2, [pc, #292]	@ (8026e88 <MQTTConnectWithResults+0x138>)
 8026d64:	f107 0310 	add.w	r3, r7, #16
 8026d68:	4611      	mov	r1, r2
 8026d6a:	2258      	movs	r2, #88	@ 0x58
 8026d6c:	4618      	mov	r0, r3
 8026d6e:	f003 f8be 	bl	8029eee <memcpy>
    int len = 0;
 8026d72:	2300      	movs	r3, #0
 8026d74:	673b      	str	r3, [r7, #112]	@ 0x70

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 8026d76:	68fb      	ldr	r3, [r7, #12]
 8026d78:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8026d7a:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8026d7e:	4618      	mov	r0, r3
 8026d80:	f7e9 feaa 	bl	8010ad8 <osMutexAcquire>
	  if (c->isconnected) /* don't send connect packet again if we are already connected */
 8026d84:	68fb      	ldr	r3, [r7, #12]
 8026d86:	6a1b      	ldr	r3, [r3, #32]
 8026d88:	2b00      	cmp	r3, #0
 8026d8a:	d164      	bne.n	8026e56 <MQTTConnectWithResults+0x106>
		  goto exit;

    TimerInit(&connect_timer);
 8026d8c:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 8026d90:	4618      	mov	r0, r3
 8026d92:	f000 fad7 	bl	8027344 <TimerInit>
    TimerCountdownMS(&connect_timer, c->command_timeout_ms);
 8026d96:	68fb      	ldr	r3, [r7, #12]
 8026d98:	685a      	ldr	r2, [r3, #4]
 8026d9a:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 8026d9e:	4611      	mov	r1, r2
 8026da0:	4618      	mov	r0, r3
 8026da2:	f000 fa8d 	bl	80272c0 <TimerCountdownMS>

    if (options == 0)
 8026da6:	68bb      	ldr	r3, [r7, #8]
 8026da8:	2b00      	cmp	r3, #0
 8026daa:	d102      	bne.n	8026db2 <MQTTConnectWithResults+0x62>
        options = &default_options; /* set default options if none were supplied */
 8026dac:	f107 0310 	add.w	r3, r7, #16
 8026db0:	60bb      	str	r3, [r7, #8]

    c->keepAliveInterval = options->keepAliveInterval;
 8026db2:	68bb      	ldr	r3, [r7, #8]
 8026db4:	8b1b      	ldrh	r3, [r3, #24]
 8026db6:	461a      	mov	r2, r3
 8026db8:	68fb      	ldr	r3, [r7, #12]
 8026dba:	619a      	str	r2, [r3, #24]
    c->cleansession = options->cleansession;
 8026dbc:	68bb      	ldr	r3, [r7, #8]
 8026dbe:	7e9b      	ldrb	r3, [r3, #26]
 8026dc0:	461a      	mov	r2, r3
 8026dc2:	68fb      	ldr	r3, [r7, #12]
 8026dc4:	625a      	str	r2, [r3, #36]	@ 0x24
    TimerCountdown(&c->last_received, c->keepAliveInterval);
 8026dc6:	68fb      	ldr	r3, [r7, #12]
 8026dc8:	f103 0260 	add.w	r2, r3, #96	@ 0x60
 8026dcc:	68fb      	ldr	r3, [r7, #12]
 8026dce:	699b      	ldr	r3, [r3, #24]
 8026dd0:	4619      	mov	r1, r3
 8026dd2:	4610      	mov	r0, r2
 8026dd4:	f000 fa88 	bl	80272e8 <TimerCountdown>
    if ((len = MQTTSerialize_connect(c->buf, c->buf_size, options)) <= 0)
 8026dd8:	68fb      	ldr	r3, [r7, #12]
 8026dda:	6918      	ldr	r0, [r3, #16]
 8026ddc:	68fb      	ldr	r3, [r7, #12]
 8026dde:	689b      	ldr	r3, [r3, #8]
 8026de0:	68ba      	ldr	r2, [r7, #8]
 8026de2:	4619      	mov	r1, r3
 8026de4:	f000 fbd2 	bl	802758c <MQTTSerialize_connect>
 8026de8:	6738      	str	r0, [r7, #112]	@ 0x70
 8026dea:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 8026dec:	2b00      	cmp	r3, #0
 8026dee:	dd34      	ble.n	8026e5a <MQTTConnectWithResults+0x10a>
        goto exit;
    if ((rc = sendPacket(c, len, &connect_timer)) != MQTT_SUCCESS)  // send the connect packet
 8026df0:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 8026df4:	461a      	mov	r2, r3
 8026df6:	6f39      	ldr	r1, [r7, #112]	@ 0x70
 8026df8:	68f8      	ldr	r0, [r7, #12]
 8026dfa:	f7ff fba2 	bl	8026542 <sendPacket>
 8026dfe:	6778      	str	r0, [r7, #116]	@ 0x74
 8026e00:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 8026e02:	2b00      	cmp	r3, #0
 8026e04:	d12b      	bne.n	8026e5e <MQTTConnectWithResults+0x10e>
        goto exit; // there was a problem

    // this will be a blocking call, wait for the connack
    if (waitfor(c, CONNACK, &connect_timer) == CONNACK)
 8026e06:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 8026e0a:	461a      	mov	r2, r3
 8026e0c:	2102      	movs	r1, #2
 8026e0e:	68f8      	ldr	r0, [r7, #12]
 8026e10:	f7ff ff7b 	bl	8026d0a <waitfor>
 8026e14:	4603      	mov	r3, r0
 8026e16:	2b02      	cmp	r3, #2
 8026e18:	d119      	bne.n	8026e4e <MQTTConnectWithResults+0xfe>
    {
        data->rc = 0;
 8026e1a:	687b      	ldr	r3, [r7, #4]
 8026e1c:	2200      	movs	r2, #0
 8026e1e:	701a      	strb	r2, [r3, #0]
        data->sessionPresent = 0;
 8026e20:	687b      	ldr	r3, [r7, #4]
 8026e22:	2200      	movs	r2, #0
 8026e24:	705a      	strb	r2, [r3, #1]
        if (MQTTDeserialize_connack(&data->sessionPresent, &data->rc, c->readbuf, c->readbuf_size) == 1)
 8026e26:	687b      	ldr	r3, [r7, #4]
 8026e28:	1c58      	adds	r0, r3, #1
 8026e2a:	6879      	ldr	r1, [r7, #4]
 8026e2c:	68fb      	ldr	r3, [r7, #12]
 8026e2e:	695a      	ldr	r2, [r3, #20]
 8026e30:	68fb      	ldr	r3, [r7, #12]
 8026e32:	68db      	ldr	r3, [r3, #12]
 8026e34:	f000 fc96 	bl	8027764 <MQTTDeserialize_connack>
 8026e38:	4603      	mov	r3, r0
 8026e3a:	2b01      	cmp	r3, #1
 8026e3c:	d103      	bne.n	8026e46 <MQTTConnectWithResults+0xf6>
            rc = data->rc;
 8026e3e:	687b      	ldr	r3, [r7, #4]
 8026e40:	781b      	ldrb	r3, [r3, #0]
 8026e42:	677b      	str	r3, [r7, #116]	@ 0x74
 8026e44:	e00c      	b.n	8026e60 <MQTTConnectWithResults+0x110>
//        	rc = MQTT_SUCCESS;
        else
            rc = FAILURE;
 8026e46:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026e4a:	677b      	str	r3, [r7, #116]	@ 0x74
 8026e4c:	e008      	b.n	8026e60 <MQTTConnectWithResults+0x110>
    }
    else
        rc = FAILURE;
 8026e4e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026e52:	677b      	str	r3, [r7, #116]	@ 0x74
 8026e54:	e004      	b.n	8026e60 <MQTTConnectWithResults+0x110>
		  goto exit;
 8026e56:	bf00      	nop
 8026e58:	e002      	b.n	8026e60 <MQTTConnectWithResults+0x110>
        goto exit;
 8026e5a:	bf00      	nop
 8026e5c:	e000      	b.n	8026e60 <MQTTConnectWithResults+0x110>
        goto exit; // there was a problem
 8026e5e:	bf00      	nop

exit:
    if (rc == MQTT_SUCCESS)
 8026e60:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 8026e62:	2b00      	cmp	r3, #0
 8026e64:	d105      	bne.n	8026e72 <MQTTConnectWithResults+0x122>
    {
        c->isconnected = 1;
 8026e66:	68fb      	ldr	r3, [r7, #12]
 8026e68:	2201      	movs	r2, #1
 8026e6a:	621a      	str	r2, [r3, #32]
        c->ping_outstanding = 0;
 8026e6c:	68fb      	ldr	r3, [r7, #12]
 8026e6e:	2200      	movs	r2, #0
 8026e70:	771a      	strb	r2, [r3, #28]

#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	osMutexRelease(mqttMutex);
	osMutexRelease(c->mutex);
 8026e72:	68fb      	ldr	r3, [r7, #12]
 8026e74:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8026e76:	4618      	mov	r0, r3
 8026e78:	f7e9 fe79 	bl	8010b6e <osMutexRelease>
    return rc;
 8026e7c:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
}
 8026e7e:	4618      	mov	r0, r3
 8026e80:	3778      	adds	r7, #120	@ 0x78
 8026e82:	46bd      	mov	sp, r7
 8026e84:	bd80      	pop	{r7, pc}
 8026e86:	bf00      	nop
 8026e88:	08030970 	.word	0x08030970

08026e8c <MQTTConnect>:


int MQTTConnect(MQTTClient* c, MQTTPacket_connectData* options)
{
 8026e8c:	b580      	push	{r7, lr}
 8026e8e:	b084      	sub	sp, #16
 8026e90:	af00      	add	r7, sp, #0
 8026e92:	6078      	str	r0, [r7, #4]
 8026e94:	6039      	str	r1, [r7, #0]
    MQTTConnackData data;
    return MQTTConnectWithResults(c, options, &data);
 8026e96:	f107 030c 	add.w	r3, r7, #12
 8026e9a:	461a      	mov	r2, r3
 8026e9c:	6839      	ldr	r1, [r7, #0]
 8026e9e:	6878      	ldr	r0, [r7, #4]
 8026ea0:	f7ff ff56 	bl	8026d50 <MQTTConnectWithResults>
 8026ea4:	4603      	mov	r3, r0
}
 8026ea6:	4618      	mov	r0, r3
 8026ea8:	3710      	adds	r7, #16
 8026eaa:	46bd      	mov	sp, r7
 8026eac:	bd80      	pop	{r7, pc}

08026eae <MQTTSetMessageHandler>:


int MQTTSetMessageHandler(MQTTClient* c, const char* topicFilter, messageHandler messageHandler)
{
 8026eae:	b580      	push	{r7, lr}
 8026eb0:	b086      	sub	sp, #24
 8026eb2:	af00      	add	r7, sp, #0
 8026eb4:	60f8      	str	r0, [r7, #12]
 8026eb6:	60b9      	str	r1, [r7, #8]
 8026eb8:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 8026eba:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026ebe:	617b      	str	r3, [r7, #20]
    int i = -1;
 8026ec0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026ec4:	613b      	str	r3, [r7, #16]

    /* first check for an existing matching slot */
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026ec6:	2300      	movs	r3, #0
 8026ec8:	613b      	str	r3, [r7, #16]
 8026eca:	e028      	b.n	8026f1e <MQTTSetMessageHandler+0x70>
    {
        if (c->messageHandlers[i].topicFilter != NULL && strcmp(c->messageHandlers[i].topicFilter, topicFilter) == 0)
 8026ecc:	68fb      	ldr	r3, [r7, #12]
 8026ece:	693a      	ldr	r2, [r7, #16]
 8026ed0:	3205      	adds	r2, #5
 8026ed2:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8026ed6:	2b00      	cmp	r3, #0
 8026ed8:	d01e      	beq.n	8026f18 <MQTTSetMessageHandler+0x6a>
 8026eda:	68fb      	ldr	r3, [r7, #12]
 8026edc:	693a      	ldr	r2, [r7, #16]
 8026ede:	3205      	adds	r2, #5
 8026ee0:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8026ee4:	68b9      	ldr	r1, [r7, #8]
 8026ee6:	4618      	mov	r0, r3
 8026ee8:	f7d9 f9fa 	bl	80002e0 <strcmp>
 8026eec:	4603      	mov	r3, r0
 8026eee:	2b00      	cmp	r3, #0
 8026ef0:	d112      	bne.n	8026f18 <MQTTSetMessageHandler+0x6a>
        {
            if (messageHandler == NULL) /* remove existing */
 8026ef2:	687b      	ldr	r3, [r7, #4]
 8026ef4:	2b00      	cmp	r3, #0
 8026ef6:	d10c      	bne.n	8026f12 <MQTTSetMessageHandler+0x64>
            {
                c->messageHandlers[i].topicFilter = NULL;
 8026ef8:	68fb      	ldr	r3, [r7, #12]
 8026efa:	693a      	ldr	r2, [r7, #16]
 8026efc:	3205      	adds	r2, #5
 8026efe:	2100      	movs	r1, #0
 8026f00:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
                c->messageHandlers[i].fp = NULL;
 8026f04:	68fa      	ldr	r2, [r7, #12]
 8026f06:	693b      	ldr	r3, [r7, #16]
 8026f08:	3305      	adds	r3, #5
 8026f0a:	00db      	lsls	r3, r3, #3
 8026f0c:	4413      	add	r3, r2
 8026f0e:	2200      	movs	r2, #0
 8026f10:	605a      	str	r2, [r3, #4]
            }
            rc = MQTT_SUCCESS; /* return i when adding new subscription */
 8026f12:	2300      	movs	r3, #0
 8026f14:	617b      	str	r3, [r7, #20]
            break;
 8026f16:	e005      	b.n	8026f24 <MQTTSetMessageHandler+0x76>
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026f18:	693b      	ldr	r3, [r7, #16]
 8026f1a:	3301      	adds	r3, #1
 8026f1c:	613b      	str	r3, [r7, #16]
 8026f1e:	693b      	ldr	r3, [r7, #16]
 8026f20:	2b04      	cmp	r3, #4
 8026f22:	ddd3      	ble.n	8026ecc <MQTTSetMessageHandler+0x1e>
        }
    }
    /* if no existing, look for empty slot (unless we are removing) */
    if (messageHandler != NULL) {
 8026f24:	687b      	ldr	r3, [r7, #4]
 8026f26:	2b00      	cmp	r3, #0
 8026f28:	d026      	beq.n	8026f78 <MQTTSetMessageHandler+0xca>
        if (rc == FAILURE)
 8026f2a:	697b      	ldr	r3, [r7, #20]
 8026f2c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8026f30:	d112      	bne.n	8026f58 <MQTTSetMessageHandler+0xaa>
        {
            for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026f32:	2300      	movs	r3, #0
 8026f34:	613b      	str	r3, [r7, #16]
 8026f36:	e00c      	b.n	8026f52 <MQTTSetMessageHandler+0xa4>
            {
                if (c->messageHandlers[i].topicFilter == NULL)
 8026f38:	68fb      	ldr	r3, [r7, #12]
 8026f3a:	693a      	ldr	r2, [r7, #16]
 8026f3c:	3205      	adds	r2, #5
 8026f3e:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8026f42:	2b00      	cmp	r3, #0
 8026f44:	d102      	bne.n	8026f4c <MQTTSetMessageHandler+0x9e>
                {
                    rc = MQTT_SUCCESS;
 8026f46:	2300      	movs	r3, #0
 8026f48:	617b      	str	r3, [r7, #20]
                    break;
 8026f4a:	e005      	b.n	8026f58 <MQTTSetMessageHandler+0xaa>
            for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026f4c:	693b      	ldr	r3, [r7, #16]
 8026f4e:	3301      	adds	r3, #1
 8026f50:	613b      	str	r3, [r7, #16]
 8026f52:	693b      	ldr	r3, [r7, #16]
 8026f54:	2b04      	cmp	r3, #4
 8026f56:	ddef      	ble.n	8026f38 <MQTTSetMessageHandler+0x8a>
                }
            }
        }
        if (i < MAX_MESSAGE_HANDLERS)
 8026f58:	693b      	ldr	r3, [r7, #16]
 8026f5a:	2b04      	cmp	r3, #4
 8026f5c:	dc0c      	bgt.n	8026f78 <MQTTSetMessageHandler+0xca>
        {
            c->messageHandlers[i].topicFilter = topicFilter;
 8026f5e:	68fb      	ldr	r3, [r7, #12]
 8026f60:	693a      	ldr	r2, [r7, #16]
 8026f62:	3205      	adds	r2, #5
 8026f64:	68b9      	ldr	r1, [r7, #8]
 8026f66:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
            c->messageHandlers[i].fp = messageHandler;
 8026f6a:	68fa      	ldr	r2, [r7, #12]
 8026f6c:	693b      	ldr	r3, [r7, #16]
 8026f6e:	3305      	adds	r3, #5
 8026f70:	00db      	lsls	r3, r3, #3
 8026f72:	4413      	add	r3, r2
 8026f74:	687a      	ldr	r2, [r7, #4]
 8026f76:	605a      	str	r2, [r3, #4]
        }
    }
    return rc;
 8026f78:	697b      	ldr	r3, [r7, #20]
}
 8026f7a:	4618      	mov	r0, r3
 8026f7c:	3718      	adds	r7, #24
 8026f7e:	46bd      	mov	sp, r7
 8026f80:	bd80      	pop	{r7, pc}

08026f82 <MQTTSubscribeWithResults>:


int MQTTSubscribeWithResults(MQTTClient* c, const char* topicFilter, enum QoS qos,
       messageHandler messageHandler, MQTTSubackData* data)
{
 8026f82:	b5b0      	push	{r4, r5, r7, lr}
 8026f84:	b094      	sub	sp, #80	@ 0x50
 8026f86:	af04      	add	r7, sp, #16
 8026f88:	60f8      	str	r0, [r7, #12]
 8026f8a:	60b9      	str	r1, [r7, #8]
 8026f8c:	603b      	str	r3, [r7, #0]
 8026f8e:	4613      	mov	r3, r2
 8026f90:	71fb      	strb	r3, [r7, #7]
    int rc = FAILURE;
 8026f92:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026f96:	63fb      	str	r3, [r7, #60]	@ 0x3c
    Timer timer;
    int len = 0;
 8026f98:	2300      	movs	r3, #0
 8026f9a:	63bb      	str	r3, [r7, #56]	@ 0x38
    MQTTString topic = MQTTString_initializer;
 8026f9c:	2300      	movs	r3, #0
 8026f9e:	627b      	str	r3, [r7, #36]	@ 0x24
 8026fa0:	2300      	movs	r3, #0
 8026fa2:	62bb      	str	r3, [r7, #40]	@ 0x28
 8026fa4:	2300      	movs	r3, #0
 8026fa6:	62fb      	str	r3, [r7, #44]	@ 0x2c
    topic.cstring = (char *)topicFilter;
 8026fa8:	68bb      	ldr	r3, [r7, #8]
 8026faa:	627b      	str	r3, [r7, #36]	@ 0x24

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 8026fac:	68fb      	ldr	r3, [r7, #12]
 8026fae:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8026fb0:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8026fb4:	4618      	mov	r0, r3
 8026fb6:	f7e9 fd8f 	bl	8010ad8 <osMutexAcquire>
	  if (!c->isconnected)
 8026fba:	68fb      	ldr	r3, [r7, #12]
 8026fbc:	6a1b      	ldr	r3, [r3, #32]
 8026fbe:	2b00      	cmp	r3, #0
 8026fc0:	d069      	beq.n	8027096 <MQTTSubscribeWithResults+0x114>
		    goto exit;

    TimerInit(&timer);
 8026fc2:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8026fc6:	4618      	mov	r0, r3
 8026fc8:	f000 f9bc 	bl	8027344 <TimerInit>
    TimerCountdownMS(&timer, c->command_timeout_ms);
 8026fcc:	68fb      	ldr	r3, [r7, #12]
 8026fce:	685a      	ldr	r2, [r3, #4]
 8026fd0:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8026fd4:	4611      	mov	r1, r2
 8026fd6:	4618      	mov	r0, r3
 8026fd8:	f000 f972 	bl	80272c0 <TimerCountdownMS>
    int _qos[1] = {(int)qos};
 8026fdc:	79fb      	ldrb	r3, [r7, #7]
 8026fde:	623b      	str	r3, [r7, #32]
    len = MQTTSerialize_subscribe(c->buf, c->buf_size, 0, getNextPacketId(c), 1, &topic, _qos);
 8026fe0:	68fb      	ldr	r3, [r7, #12]
 8026fe2:	691c      	ldr	r4, [r3, #16]
 8026fe4:	68fb      	ldr	r3, [r7, #12]
 8026fe6:	689b      	ldr	r3, [r3, #8]
 8026fe8:	461d      	mov	r5, r3
 8026fea:	68f8      	ldr	r0, [r7, #12]
 8026fec:	f7ff fa90 	bl	8026510 <getNextPacketId>
 8026ff0:	4603      	mov	r3, r0
 8026ff2:	b29a      	uxth	r2, r3
 8026ff4:	f107 0320 	add.w	r3, r7, #32
 8026ff8:	9302      	str	r3, [sp, #8]
 8026ffa:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8026ffe:	9301      	str	r3, [sp, #4]
 8027000:	2301      	movs	r3, #1
 8027002:	9300      	str	r3, [sp, #0]
 8027004:	4613      	mov	r3, r2
 8027006:	2200      	movs	r2, #0
 8027008:	4629      	mov	r1, r5
 802700a:	4620      	mov	r0, r4
 802700c:	f001 f81b 	bl	8028046 <MQTTSerialize_subscribe>
 8027010:	63b8      	str	r0, [r7, #56]	@ 0x38
//    len = MQTTSerialize_subscribe(c->buf, c->buf_size, 0, getNextPacketId(c), 1, &topic, (int*)&qos);
    if (len <= 0)
 8027012:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8027014:	2b00      	cmp	r3, #0
 8027016:	dd40      	ble.n	802709a <MQTTSubscribeWithResults+0x118>
        goto exit;
    if ((rc = sendPacket(c, len, &timer)) != MQTT_SUCCESS) // send the subscribe packet
 8027018:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 802701c:	461a      	mov	r2, r3
 802701e:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 8027020:	68f8      	ldr	r0, [r7, #12]
 8027022:	f7ff fa8e 	bl	8026542 <sendPacket>
 8027026:	63f8      	str	r0, [r7, #60]	@ 0x3c
 8027028:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 802702a:	2b00      	cmp	r3, #0
 802702c:	d137      	bne.n	802709e <MQTTSubscribeWithResults+0x11c>
        goto exit;             // there was a problem

    if (waitfor(c, SUBACK, &timer) == SUBACK)      // wait for suback
 802702e:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8027032:	461a      	mov	r2, r3
 8027034:	2109      	movs	r1, #9
 8027036:	68f8      	ldr	r0, [r7, #12]
 8027038:	f7ff fe67 	bl	8026d0a <waitfor>
 802703c:	4603      	mov	r3, r0
 802703e:	2b09      	cmp	r3, #9
 8027040:	d125      	bne.n	802708e <MQTTSubscribeWithResults+0x10c>
    {
        int count = 0;
 8027042:	2300      	movs	r3, #0
 8027044:	61fb      	str	r3, [r7, #28]
        unsigned short mypacketid;
        data->grantedQoS = QOS0;
 8027046:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8027048:	2200      	movs	r2, #0
 802704a:	701a      	strb	r2, [r3, #0]
        int _grantedQoS[1] = {(int)&data->grantedQoS};
 802704c:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 802704e:	617b      	str	r3, [r7, #20]
//        if (MQTTDeserialize_suback(&mypacketid, 1, &count, (int*)&data->grantedQoS, c->readbuf, c->readbuf_size) == 1)
        if (MQTTDeserialize_suback(&mypacketid, 1, &count, _grantedQoS, c->readbuf, c->readbuf_size) == 1)
 8027050:	68fb      	ldr	r3, [r7, #12]
 8027052:	695b      	ldr	r3, [r3, #20]
 8027054:	68fa      	ldr	r2, [r7, #12]
 8027056:	68d2      	ldr	r2, [r2, #12]
 8027058:	4614      	mov	r4, r2
 802705a:	f107 0114 	add.w	r1, r7, #20
 802705e:	f107 021c 	add.w	r2, r7, #28
 8027062:	f107 001a 	add.w	r0, r7, #26
 8027066:	9401      	str	r4, [sp, #4]
 8027068:	9300      	str	r3, [sp, #0]
 802706a:	460b      	mov	r3, r1
 802706c:	2101      	movs	r1, #1
 802706e:	f001 f866 	bl	802813e <MQTTDeserialize_suback>
 8027072:	4603      	mov	r3, r0
 8027074:	2b01      	cmp	r3, #1
 8027076:	d113      	bne.n	80270a0 <MQTTSubscribeWithResults+0x11e>
        {
            if (data->grantedQoS != 0x80)
 8027078:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 802707a:	781b      	ldrb	r3, [r3, #0]
 802707c:	2b80      	cmp	r3, #128	@ 0x80
 802707e:	d00f      	beq.n	80270a0 <MQTTSubscribeWithResults+0x11e>
                rc = MQTTSetMessageHandler(c, topicFilter, messageHandler);
 8027080:	683a      	ldr	r2, [r7, #0]
 8027082:	68b9      	ldr	r1, [r7, #8]
 8027084:	68f8      	ldr	r0, [r7, #12]
 8027086:	f7ff ff12 	bl	8026eae <MQTTSetMessageHandler>
 802708a:	63f8      	str	r0, [r7, #60]	@ 0x3c
 802708c:	e008      	b.n	80270a0 <MQTTSubscribeWithResults+0x11e>
        }
    }
    else
        rc = FAILURE;
 802708e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027092:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8027094:	e004      	b.n	80270a0 <MQTTSubscribeWithResults+0x11e>
		    goto exit;
 8027096:	bf00      	nop
 8027098:	e002      	b.n	80270a0 <MQTTSubscribeWithResults+0x11e>
        goto exit;
 802709a:	bf00      	nop
 802709c:	e000      	b.n	80270a0 <MQTTSubscribeWithResults+0x11e>
        goto exit;             // there was a problem
 802709e:	bf00      	nop

exit:
    if (rc == FAILURE)
 80270a0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80270a2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80270a6:	d102      	bne.n	80270ae <MQTTSubscribeWithResults+0x12c>
        MQTTCloseSession(c);
 80270a8:	68f8      	ldr	r0, [r7, #12]
 80270aa:	f7ff fceb 	bl	8026a84 <MQTTCloseSession>
#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	osMutexRelease(mqttMutex);
	osMutexRelease(c->mutex);
 80270ae:	68fb      	ldr	r3, [r7, #12]
 80270b0:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 80270b2:	4618      	mov	r0, r3
 80270b4:	f7e9 fd5b 	bl	8010b6e <osMutexRelease>
    return rc;
 80270b8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
}
 80270ba:	4618      	mov	r0, r3
 80270bc:	3740      	adds	r7, #64	@ 0x40
 80270be:	46bd      	mov	sp, r7
 80270c0:	bdb0      	pop	{r4, r5, r7, pc}

080270c2 <MQTTSubscribe>:


int MQTTSubscribe(MQTTClient* c, const char* topicFilter, enum QoS qos,
       messageHandler messageHandler)
{
 80270c2:	b580      	push	{r7, lr}
 80270c4:	b088      	sub	sp, #32
 80270c6:	af02      	add	r7, sp, #8
 80270c8:	60f8      	str	r0, [r7, #12]
 80270ca:	60b9      	str	r1, [r7, #8]
 80270cc:	603b      	str	r3, [r7, #0]
 80270ce:	4613      	mov	r3, r2
 80270d0:	71fb      	strb	r3, [r7, #7]
    MQTTSubackData data;
    return MQTTSubscribeWithResults(c, topicFilter, qos, messageHandler, &data);
 80270d2:	79fa      	ldrb	r2, [r7, #7]
 80270d4:	f107 0314 	add.w	r3, r7, #20
 80270d8:	9300      	str	r3, [sp, #0]
 80270da:	683b      	ldr	r3, [r7, #0]
 80270dc:	68b9      	ldr	r1, [r7, #8]
 80270de:	68f8      	ldr	r0, [r7, #12]
 80270e0:	f7ff ff4f 	bl	8026f82 <MQTTSubscribeWithResults>
 80270e4:	4603      	mov	r3, r0
}
 80270e6:	4618      	mov	r0, r3
 80270e8:	3718      	adds	r7, #24
 80270ea:	46bd      	mov	sp, r7
 80270ec:	bd80      	pop	{r7, pc}

080270ee <MQTTPublish>:
    return rc;
}


int MQTTPublish(MQTTClient* c, const char* topicName, MQTTMessage* message)
{
 80270ee:	b5f0      	push	{r4, r5, r6, r7, lr}
 80270f0:	b097      	sub	sp, #92	@ 0x5c
 80270f2:	af08      	add	r7, sp, #32
 80270f4:	60f8      	str	r0, [r7, #12]
 80270f6:	60b9      	str	r1, [r7, #8]
 80270f8:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 80270fa:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80270fe:	637b      	str	r3, [r7, #52]	@ 0x34
    Timer timer;
    MQTTString topic = MQTTString_initializer;
 8027100:	2300      	movs	r3, #0
 8027102:	61fb      	str	r3, [r7, #28]
 8027104:	2300      	movs	r3, #0
 8027106:	623b      	str	r3, [r7, #32]
 8027108:	2300      	movs	r3, #0
 802710a:	627b      	str	r3, [r7, #36]	@ 0x24
    topic.cstring = (char *)topicName;
 802710c:	68bb      	ldr	r3, [r7, #8]
 802710e:	61fb      	str	r3, [r7, #28]
    int len = 0;
 8027110:	2300      	movs	r3, #0
 8027112:	633b      	str	r3, [r7, #48]	@ 0x30

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 8027114:	68fb      	ldr	r3, [r7, #12]
 8027116:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8027118:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 802711c:	4618      	mov	r0, r3
 802711e:	f7e9 fcdb 	bl	8010ad8 <osMutexAcquire>
	  if (!c->isconnected)
 8027122:	68fb      	ldr	r3, [r7, #12]
 8027124:	6a1b      	ldr	r3, [r3, #32]
 8027126:	2b00      	cmp	r3, #0
 8027128:	f000 809b 	beq.w	8027262 <MQTTPublish+0x174>
		    goto exit;

    TimerInit(&timer);
 802712c:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8027130:	4618      	mov	r0, r3
 8027132:	f000 f907 	bl	8027344 <TimerInit>
    TimerCountdownMS(&timer, c->command_timeout_ms);
 8027136:	68fb      	ldr	r3, [r7, #12]
 8027138:	685a      	ldr	r2, [r3, #4]
 802713a:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 802713e:	4611      	mov	r1, r2
 8027140:	4618      	mov	r0, r3
 8027142:	f000 f8bd 	bl	80272c0 <TimerCountdownMS>

    if (message->qos == QOS1 || message->qos == QOS2)
 8027146:	687b      	ldr	r3, [r7, #4]
 8027148:	781b      	ldrb	r3, [r3, #0]
 802714a:	2b01      	cmp	r3, #1
 802714c:	d003      	beq.n	8027156 <MQTTPublish+0x68>
 802714e:	687b      	ldr	r3, [r7, #4]
 8027150:	781b      	ldrb	r3, [r3, #0]
 8027152:	2b02      	cmp	r3, #2
 8027154:	d106      	bne.n	8027164 <MQTTPublish+0x76>
        message->id = getNextPacketId(c);
 8027156:	68f8      	ldr	r0, [r7, #12]
 8027158:	f7ff f9da 	bl	8026510 <getNextPacketId>
 802715c:	4603      	mov	r3, r0
 802715e:	b29a      	uxth	r2, r3
 8027160:	687b      	ldr	r3, [r7, #4]
 8027162:	809a      	strh	r2, [r3, #4]

    len = MQTTSerialize_publish(c->buf, c->buf_size, 0, message->qos, message->retained, message->id,
 8027164:	68fb      	ldr	r3, [r7, #12]
 8027166:	691b      	ldr	r3, [r3, #16]
 8027168:	603b      	str	r3, [r7, #0]
 802716a:	68fb      	ldr	r3, [r7, #12]
 802716c:	689b      	ldr	r3, [r3, #8]
 802716e:	469c      	mov	ip, r3
 8027170:	687b      	ldr	r3, [r7, #4]
 8027172:	781b      	ldrb	r3, [r3, #0]
 8027174:	469e      	mov	lr, r3
 8027176:	687b      	ldr	r3, [r7, #4]
 8027178:	785d      	ldrb	r5, [r3, #1]
 802717a:	687b      	ldr	r3, [r7, #4]
 802717c:	889e      	ldrh	r6, [r3, #4]
              topic, (unsigned char*)message->payload, message->payloadlen);
 802717e:	687b      	ldr	r3, [r7, #4]
 8027180:	689b      	ldr	r3, [r3, #8]
 8027182:	687a      	ldr	r2, [r7, #4]
 8027184:	68d2      	ldr	r2, [r2, #12]
    len = MQTTSerialize_publish(c->buf, c->buf_size, 0, message->qos, message->retained, message->id,
 8027186:	9206      	str	r2, [sp, #24]
 8027188:	9305      	str	r3, [sp, #20]
 802718a:	ac02      	add	r4, sp, #8
 802718c:	f107 031c 	add.w	r3, r7, #28
 8027190:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027194:	e884 0007 	stmia.w	r4, {r0, r1, r2}
 8027198:	9601      	str	r6, [sp, #4]
 802719a:	9500      	str	r5, [sp, #0]
 802719c:	4673      	mov	r3, lr
 802719e:	2200      	movs	r2, #0
 80271a0:	4661      	mov	r1, ip
 80271a2:	6838      	ldr	r0, [r7, #0]
 80271a4:	f000 fe5d 	bl	8027e62 <MQTTSerialize_publish>
 80271a8:	6338      	str	r0, [r7, #48]	@ 0x30
    if (len <= 0)
 80271aa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80271ac:	2b00      	cmp	r3, #0
 80271ae:	dd5a      	ble.n	8027266 <MQTTPublish+0x178>
        goto exit;
    if ((rc = sendPacket(c, len, &timer)) != MQTT_SUCCESS) // send the subscribe packet
 80271b0:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 80271b4:	461a      	mov	r2, r3
 80271b6:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 80271b8:	68f8      	ldr	r0, [r7, #12]
 80271ba:	f7ff f9c2 	bl	8026542 <sendPacket>
 80271be:	6378      	str	r0, [r7, #52]	@ 0x34
 80271c0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80271c2:	2b00      	cmp	r3, #0
 80271c4:	d151      	bne.n	802726a <MQTTPublish+0x17c>
        goto exit; // there was a problem

    if (message->qos == QOS1)
 80271c6:	687b      	ldr	r3, [r7, #4]
 80271c8:	781b      	ldrb	r3, [r3, #0]
 80271ca:	2b01      	cmp	r3, #1
 80271cc:	d122      	bne.n	8027214 <MQTTPublish+0x126>
    {
        if (waitfor(c, PUBACK, &timer) == PUBACK)
 80271ce:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 80271d2:	461a      	mov	r2, r3
 80271d4:	2104      	movs	r1, #4
 80271d6:	68f8      	ldr	r0, [r7, #12]
 80271d8:	f7ff fd97 	bl	8026d0a <waitfor>
 80271dc:	4603      	mov	r3, r0
 80271de:	2b04      	cmp	r3, #4
 80271e0:	d114      	bne.n	802720c <MQTTPublish+0x11e>
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 80271e2:	68fb      	ldr	r3, [r7, #12]
 80271e4:	695c      	ldr	r4, [r3, #20]
 80271e6:	68fb      	ldr	r3, [r7, #12]
 80271e8:	68db      	ldr	r3, [r3, #12]
 80271ea:	f107 021a 	add.w	r2, r7, #26
 80271ee:	f107 0119 	add.w	r1, r7, #25
 80271f2:	f107 0018 	add.w	r0, r7, #24
 80271f6:	9300      	str	r3, [sp, #0]
 80271f8:	4623      	mov	r3, r4
 80271fa:	f000 fbc1 	bl	8027980 <MQTTDeserialize_ack>
 80271fe:	4603      	mov	r3, r0
 8027200:	2b01      	cmp	r3, #1
 8027202:	d035      	beq.n	8027270 <MQTTPublish+0x182>
                rc = FAILURE;
 8027204:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027208:	637b      	str	r3, [r7, #52]	@ 0x34
 802720a:	e031      	b.n	8027270 <MQTTPublish+0x182>
        }
        else
            rc = FAILURE;
 802720c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027210:	637b      	str	r3, [r7, #52]	@ 0x34
 8027212:	e02d      	b.n	8027270 <MQTTPublish+0x182>
    }
    else if (message->qos == QOS2)
 8027214:	687b      	ldr	r3, [r7, #4]
 8027216:	781b      	ldrb	r3, [r3, #0]
 8027218:	2b02      	cmp	r3, #2
 802721a:	d128      	bne.n	802726e <MQTTPublish+0x180>
    {
        if (waitfor(c, PUBCOMP, &timer) == PUBCOMP)
 802721c:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8027220:	461a      	mov	r2, r3
 8027222:	2107      	movs	r1, #7
 8027224:	68f8      	ldr	r0, [r7, #12]
 8027226:	f7ff fd70 	bl	8026d0a <waitfor>
 802722a:	4603      	mov	r3, r0
 802722c:	2b07      	cmp	r3, #7
 802722e:	d114      	bne.n	802725a <MQTTPublish+0x16c>
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 8027230:	68fb      	ldr	r3, [r7, #12]
 8027232:	695c      	ldr	r4, [r3, #20]
 8027234:	68fb      	ldr	r3, [r7, #12]
 8027236:	68db      	ldr	r3, [r3, #12]
 8027238:	f107 0216 	add.w	r2, r7, #22
 802723c:	f107 0115 	add.w	r1, r7, #21
 8027240:	f107 0014 	add.w	r0, r7, #20
 8027244:	9300      	str	r3, [sp, #0]
 8027246:	4623      	mov	r3, r4
 8027248:	f000 fb9a 	bl	8027980 <MQTTDeserialize_ack>
 802724c:	4603      	mov	r3, r0
 802724e:	2b01      	cmp	r3, #1
 8027250:	d00e      	beq.n	8027270 <MQTTPublish+0x182>
                rc = FAILURE;
 8027252:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027256:	637b      	str	r3, [r7, #52]	@ 0x34
 8027258:	e00a      	b.n	8027270 <MQTTPublish+0x182>
        }
        else
            rc = FAILURE;
 802725a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802725e:	637b      	str	r3, [r7, #52]	@ 0x34
 8027260:	e006      	b.n	8027270 <MQTTPublish+0x182>
		    goto exit;
 8027262:	bf00      	nop
 8027264:	e004      	b.n	8027270 <MQTTPublish+0x182>
        goto exit;
 8027266:	bf00      	nop
 8027268:	e002      	b.n	8027270 <MQTTPublish+0x182>
        goto exit; // there was a problem
 802726a:	bf00      	nop
 802726c:	e000      	b.n	8027270 <MQTTPublish+0x182>
    }

exit:
 802726e:	bf00      	nop
    if (rc == FAILURE)
 8027270:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8027272:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8027276:	d102      	bne.n	802727e <MQTTPublish+0x190>
        MQTTCloseSession(c);
 8027278:	68f8      	ldr	r0, [r7, #12]
 802727a:	f7ff fc03 	bl	8026a84 <MQTTCloseSession>
#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	  osMutexRelease(mqttMutex);
	  osMutexRelease(c->mutex);
 802727e:	68fb      	ldr	r3, [r7, #12]
 8027280:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8027282:	4618      	mov	r0, r3
 8027284:	f7e9 fc73 	bl	8010b6e <osMutexRelease>
    return rc;
 8027288:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 802728a:	4618      	mov	r0, r3
 802728c:	373c      	adds	r7, #60	@ 0x3c
 802728e:	46bd      	mov	sp, r7
 8027290:	bdf0      	pop	{r4, r5, r6, r7, pc}
	...

08027294 <TimerIsExpired>:
#define SERVER_IP4	34

uint32_t MilliTimer;

//Timer functions
char TimerIsExpired(Timer *timer) {
 8027294:	b480      	push	{r7}
 8027296:	b085      	sub	sp, #20
 8027298:	af00      	add	r7, sp, #0
 802729a:	6078      	str	r0, [r7, #4]
	long left = timer->end_time - MilliTimer;
 802729c:	687b      	ldr	r3, [r7, #4]
 802729e:	685a      	ldr	r2, [r3, #4]
 80272a0:	4b06      	ldr	r3, [pc, #24]	@ (80272bc <TimerIsExpired+0x28>)
 80272a2:	681b      	ldr	r3, [r3, #0]
 80272a4:	1ad3      	subs	r3, r2, r3
 80272a6:	60fb      	str	r3, [r7, #12]
	return (left < 0);
 80272a8:	68fb      	ldr	r3, [r7, #12]
 80272aa:	0fdb      	lsrs	r3, r3, #31
 80272ac:	b2db      	uxtb	r3, r3
}
 80272ae:	4618      	mov	r0, r3
 80272b0:	3714      	adds	r7, #20
 80272b2:	46bd      	mov	sp, r7
 80272b4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80272b8:	4770      	bx	lr
 80272ba:	bf00      	nop
 80272bc:	2402b034 	.word	0x2402b034

080272c0 <TimerCountdownMS>:

void TimerCountdownMS(Timer *timer, unsigned int timeout) {
 80272c0:	b480      	push	{r7}
 80272c2:	b083      	sub	sp, #12
 80272c4:	af00      	add	r7, sp, #0
 80272c6:	6078      	str	r0, [r7, #4]
 80272c8:	6039      	str	r1, [r7, #0]
	timer->end_time = MilliTimer + timeout;
 80272ca:	4b06      	ldr	r3, [pc, #24]	@ (80272e4 <TimerCountdownMS+0x24>)
 80272cc:	681a      	ldr	r2, [r3, #0]
 80272ce:	683b      	ldr	r3, [r7, #0]
 80272d0:	441a      	add	r2, r3
 80272d2:	687b      	ldr	r3, [r7, #4]
 80272d4:	605a      	str	r2, [r3, #4]
}
 80272d6:	bf00      	nop
 80272d8:	370c      	adds	r7, #12
 80272da:	46bd      	mov	sp, r7
 80272dc:	f85d 7b04 	ldr.w	r7, [sp], #4
 80272e0:	4770      	bx	lr
 80272e2:	bf00      	nop
 80272e4:	2402b034 	.word	0x2402b034

080272e8 <TimerCountdown>:

void TimerCountdown(Timer *timer, unsigned int timeout) {
 80272e8:	b480      	push	{r7}
 80272ea:	b083      	sub	sp, #12
 80272ec:	af00      	add	r7, sp, #0
 80272ee:	6078      	str	r0, [r7, #4]
 80272f0:	6039      	str	r1, [r7, #0]
	timer->end_time = MilliTimer + (timeout * 1000);
 80272f2:	683b      	ldr	r3, [r7, #0]
 80272f4:	f44f 727a 	mov.w	r2, #1000	@ 0x3e8
 80272f8:	fb03 f202 	mul.w	r2, r3, r2
 80272fc:	4b05      	ldr	r3, [pc, #20]	@ (8027314 <TimerCountdown+0x2c>)
 80272fe:	681b      	ldr	r3, [r3, #0]
 8027300:	441a      	add	r2, r3
 8027302:	687b      	ldr	r3, [r7, #4]
 8027304:	605a      	str	r2, [r3, #4]
}
 8027306:	bf00      	nop
 8027308:	370c      	adds	r7, #12
 802730a:	46bd      	mov	sp, r7
 802730c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027310:	4770      	bx	lr
 8027312:	bf00      	nop
 8027314:	2402b034 	.word	0x2402b034

08027318 <TimerLeftMS>:

int TimerLeftMS(Timer *timer) {
 8027318:	b480      	push	{r7}
 802731a:	b085      	sub	sp, #20
 802731c:	af00      	add	r7, sp, #0
 802731e:	6078      	str	r0, [r7, #4]
	long left = timer->end_time - MilliTimer;
 8027320:	687b      	ldr	r3, [r7, #4]
 8027322:	685a      	ldr	r2, [r3, #4]
 8027324:	4b06      	ldr	r3, [pc, #24]	@ (8027340 <TimerLeftMS+0x28>)
 8027326:	681b      	ldr	r3, [r3, #0]
 8027328:	1ad3      	subs	r3, r2, r3
 802732a:	60fb      	str	r3, [r7, #12]
	return (left < 0) ? 0 : left;
 802732c:	68fb      	ldr	r3, [r7, #12]
 802732e:	ea23 73e3 	bic.w	r3, r3, r3, asr #31
}
 8027332:	4618      	mov	r0, r3
 8027334:	3714      	adds	r7, #20
 8027336:	46bd      	mov	sp, r7
 8027338:	f85d 7b04 	ldr.w	r7, [sp], #4
 802733c:	4770      	bx	lr
 802733e:	bf00      	nop
 8027340:	2402b034 	.word	0x2402b034

08027344 <TimerInit>:

void TimerInit(Timer *timer) {
 8027344:	b480      	push	{r7}
 8027346:	b083      	sub	sp, #12
 8027348:	af00      	add	r7, sp, #0
 802734a:	6078      	str	r0, [r7, #4]
	timer->end_time = 0;
 802734c:	687b      	ldr	r3, [r7, #4]
 802734e:	2200      	movs	r2, #0
 8027350:	605a      	str	r2, [r3, #4]
}
 8027352:	bf00      	nop
 8027354:	370c      	adds	r7, #12
 8027356:	46bd      	mov	sp, r7
 8027358:	f85d 7b04 	ldr.w	r7, [sp], #4
 802735c:	4770      	bx	lr
	...

08027360 <NewNetwork>:

#ifdef MQTT_LWIP_SOCKET
void NewNetwork(Network *n) {
 8027360:	b480      	push	{r7}
 8027362:	b083      	sub	sp, #12
 8027364:	af00      	add	r7, sp, #0
 8027366:	6078      	str	r0, [r7, #4]
	n->socket = 0; //clear
 8027368:	687b      	ldr	r3, [r7, #4]
 802736a:	2200      	movs	r2, #0
 802736c:	601a      	str	r2, [r3, #0]
	n->mqttread = net_read; //receive function
 802736e:	687b      	ldr	r3, [r7, #4]
 8027370:	4a06      	ldr	r2, [pc, #24]	@ (802738c <NewNetwork+0x2c>)
 8027372:	605a      	str	r2, [r3, #4]
	n->mqttwrite = net_write; //send function
 8027374:	687b      	ldr	r3, [r7, #4]
 8027376:	4a06      	ldr	r2, [pc, #24]	@ (8027390 <NewNetwork+0x30>)
 8027378:	609a      	str	r2, [r3, #8]
	n->disconnect = net_disconnect; //disconnection function
 802737a:	687b      	ldr	r3, [r7, #4]
 802737c:	4a05      	ldr	r2, [pc, #20]	@ (8027394 <NewNetwork+0x34>)
 802737e:	60da      	str	r2, [r3, #12]
}
 8027380:	bf00      	nop
 8027382:	370c      	adds	r7, #12
 8027384:	46bd      	mov	sp, r7
 8027386:	f85d 7b04 	ldr.w	r7, [sp], #4
 802738a:	4770      	bx	lr
 802738c:	08027435 	.word	0x08027435
 8027390:	08027485 	.word	0x08027485
 8027394:	080274ab 	.word	0x080274ab

08027398 <ConnectNetwork>:

int ConnectNetwork(Network *n, char *ip, int port) {
 8027398:	b580      	push	{r7, lr}
 802739a:	b088      	sub	sp, #32
 802739c:	af00      	add	r7, sp, #0
 802739e:	60f8      	str	r0, [r7, #12]
 80273a0:	60b9      	str	r1, [r7, #8]
 80273a2:	607a      	str	r2, [r7, #4]
	struct sockaddr_in server_addr;

	if(n->socket)
 80273a4:	68fb      	ldr	r3, [r7, #12]
 80273a6:	681b      	ldr	r3, [r3, #0]
 80273a8:	2b00      	cmp	r3, #0
 80273aa:	d004      	beq.n	80273b6 <ConnectNetwork+0x1e>
	{
		close(n->socket);
 80273ac:	68fb      	ldr	r3, [r7, #12]
 80273ae:	681b      	ldr	r3, [r3, #0]
 80273b0:	4618      	mov	r0, r3
 80273b2:	f7f0 fa65 	bl	8017880 <lwip_close>
	}

	n->socket = socket(PF_INET, SOCK_STREAM, 0); //create socket
 80273b6:	2200      	movs	r2, #0
 80273b8:	2101      	movs	r1, #1
 80273ba:	2002      	movs	r0, #2
 80273bc:	f7f0 ff72 	bl	80182a4 <lwip_socket>
 80273c0:	4602      	mov	r2, r0
 80273c2:	68fb      	ldr	r3, [r7, #12]
 80273c4:	601a      	str	r2, [r3, #0]
	if(n->socket < 0)
 80273c6:	68fb      	ldr	r3, [r7, #12]
 80273c8:	681b      	ldr	r3, [r3, #0]
 80273ca:	2b00      	cmp	r3, #0
 80273cc:	da05      	bge.n	80273da <ConnectNetwork+0x42>
	{
		n->socket = 0;
 80273ce:	68fb      	ldr	r3, [r7, #12]
 80273d0:	2200      	movs	r2, #0
 80273d2:	601a      	str	r2, [r3, #0]
		return -1;
 80273d4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80273d8:	e028      	b.n	802742c <ConnectNetwork+0x94>
	}

	memset(&server_addr, 0, sizeof(struct sockaddr_in)); //broker address info
 80273da:	f107 0310 	add.w	r3, r7, #16
 80273de:	2210      	movs	r2, #16
 80273e0:	2100      	movs	r1, #0
 80273e2:	4618      	mov	r0, r3
 80273e4:	f002 fc8c 	bl	8029d00 <memset>
	server_addr.sin_family = AF_INET;
 80273e8:	2302      	movs	r3, #2
 80273ea:	747b      	strb	r3, [r7, #17]
	server_addr.sin_addr.s_addr = inet_addr(ip);
 80273ec:	68b8      	ldr	r0, [r7, #8]
 80273ee:	f7fd fde0 	bl	8024fb2 <ipaddr_addr>
 80273f2:	4603      	mov	r3, r0
 80273f4:	617b      	str	r3, [r7, #20]
	server_addr.sin_port = htons(port);
 80273f6:	687b      	ldr	r3, [r7, #4]
 80273f8:	b29b      	uxth	r3, r3
 80273fa:	4618      	mov	r0, r3
 80273fc:	f7f1 fb94 	bl	8018b28 <lwip_htons>
 8027400:	4603      	mov	r3, r0
 8027402:	827b      	strh	r3, [r7, #18]

	if(connect(n->socket, (struct sockaddr*)&server_addr, sizeof(struct sockaddr_in)) < 0) //connect to the broker
 8027404:	68fb      	ldr	r3, [r7, #12]
 8027406:	681b      	ldr	r3, [r3, #0]
 8027408:	f107 0110 	add.w	r1, r7, #16
 802740c:	2210      	movs	r2, #16
 802740e:	4618      	mov	r0, r3
 8027410:	f7f0 fa8c 	bl	801792c <lwip_connect>
 8027414:	4603      	mov	r3, r0
 8027416:	2b00      	cmp	r3, #0
 8027418:	da07      	bge.n	802742a <ConnectNetwork+0x92>
	{
		close(n->socket);
 802741a:	68fb      	ldr	r3, [r7, #12]
 802741c:	681b      	ldr	r3, [r3, #0]
 802741e:	4618      	mov	r0, r3
 8027420:	f7f0 fa2e 	bl	8017880 <lwip_close>
		return -1;
 8027424:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027428:	e000      	b.n	802742c <ConnectNetwork+0x94>
	}
	return 0;
 802742a:	2300      	movs	r3, #0
}
 802742c:	4618      	mov	r0, r3
 802742e:	3720      	adds	r7, #32
 8027430:	46bd      	mov	sp, r7
 8027432:	bd80      	pop	{r7, pc}

08027434 <net_read>:

int net_read(Network *n, unsigned char *buffer, int len, int timeout_ms) {
 8027434:	b580      	push	{r7, lr}
 8027436:	b086      	sub	sp, #24
 8027438:	af00      	add	r7, sp, #0
 802743a:	60f8      	str	r0, [r7, #12]
 802743c:	60b9      	str	r1, [r7, #8]
 802743e:	607a      	str	r2, [r7, #4]
 8027440:	603b      	str	r3, [r7, #0]
	int available;

	/* !!! LWIP_SO_RCVBUF must be enabled !!! */
	if(ioctl(n->socket, FIONREAD, &available) < 0) return -1; //check receive buffer
 8027442:	68fb      	ldr	r3, [r7, #12]
 8027444:	681b      	ldr	r3, [r3, #0]
 8027446:	f107 0214 	add.w	r2, r7, #20
 802744a:	490d      	ldr	r1, [pc, #52]	@ (8027480 <net_read+0x4c>)
 802744c:	4618      	mov	r0, r3
 802744e:	f7f1 f917 	bl	8018680 <lwip_ioctl>
 8027452:	4603      	mov	r3, r0
 8027454:	2b00      	cmp	r3, #0
 8027456:	da02      	bge.n	802745e <net_read+0x2a>
 8027458:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802745c:	e00c      	b.n	8027478 <net_read+0x44>

	if(available > 0)
 802745e:	697b      	ldr	r3, [r7, #20]
 8027460:	2b00      	cmp	r3, #0
 8027462:	dd08      	ble.n	8027476 <net_read+0x42>
	{
		return recv(n->socket, buffer, len, 0);
 8027464:	68fb      	ldr	r3, [r7, #12]
 8027466:	6818      	ldr	r0, [r3, #0]
 8027468:	687a      	ldr	r2, [r7, #4]
 802746a:	2300      	movs	r3, #0
 802746c:	68b9      	ldr	r1, [r7, #8]
 802746e:	f7f0 fdf3 	bl	8018058 <lwip_recv>
 8027472:	4603      	mov	r3, r0
 8027474:	e000      	b.n	8027478 <net_read+0x44>
	}

	return 0;
 8027476:	2300      	movs	r3, #0
}
 8027478:	4618      	mov	r0, r3
 802747a:	3718      	adds	r7, #24
 802747c:	46bd      	mov	sp, r7
 802747e:	bd80      	pop	{r7, pc}
 8027480:	4004667f 	.word	0x4004667f

08027484 <net_write>:

int net_write(Network *n, unsigned char *buffer, int len, int timeout_ms) {
 8027484:	b580      	push	{r7, lr}
 8027486:	b084      	sub	sp, #16
 8027488:	af00      	add	r7, sp, #0
 802748a:	60f8      	str	r0, [r7, #12]
 802748c:	60b9      	str	r1, [r7, #8]
 802748e:	607a      	str	r2, [r7, #4]
 8027490:	603b      	str	r3, [r7, #0]
	return send(n->socket, buffer, len, 0);
 8027492:	68fb      	ldr	r3, [r7, #12]
 8027494:	6818      	ldr	r0, [r3, #0]
 8027496:	687a      	ldr	r2, [r7, #4]
 8027498:	2300      	movs	r3, #0
 802749a:	68b9      	ldr	r1, [r7, #8]
 802749c:	f7f0 fdf2 	bl	8018084 <lwip_send>
 80274a0:	4603      	mov	r3, r0
}
 80274a2:	4618      	mov	r0, r3
 80274a4:	3710      	adds	r7, #16
 80274a6:	46bd      	mov	sp, r7
 80274a8:	bd80      	pop	{r7, pc}

080274aa <net_disconnect>:

void net_disconnect(Network *n) {
 80274aa:	b580      	push	{r7, lr}
 80274ac:	b082      	sub	sp, #8
 80274ae:	af00      	add	r7, sp, #0
 80274b0:	6078      	str	r0, [r7, #4]
	close(n->socket);
 80274b2:	687b      	ldr	r3, [r7, #4]
 80274b4:	681b      	ldr	r3, [r3, #0]
 80274b6:	4618      	mov	r0, r3
 80274b8:	f7f0 f9e2 	bl	8017880 <lwip_close>
	n->socket = 0;
 80274bc:	687b      	ldr	r3, [r7, #4]
 80274be:	2200      	movs	r2, #0
 80274c0:	601a      	str	r2, [r3, #0]
}
 80274c2:	bf00      	nop
 80274c4:	3708      	adds	r7, #8
 80274c6:	46bd      	mov	sp, r7
 80274c8:	bd80      	pop	{r7, pc}

080274ca <MQTTSerialize_connectLength>:
  * Determines the length of the MQTT connect packet that would be produced using the supplied connect options.
  * @param options the options to be used to build the connect packet
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_connectLength(MQTTPacket_connectData* options)
{
 80274ca:	b590      	push	{r4, r7, lr}
 80274cc:	b085      	sub	sp, #20
 80274ce:	af00      	add	r7, sp, #0
 80274d0:	6078      	str	r0, [r7, #4]
	int len = 0;
 80274d2:	2300      	movs	r3, #0
 80274d4:	60fb      	str	r3, [r7, #12]

	FUNC_ENTRY;

	if (options->MQTTVersion == 3)
 80274d6:	687b      	ldr	r3, [r7, #4]
 80274d8:	7a1b      	ldrb	r3, [r3, #8]
 80274da:	2b03      	cmp	r3, #3
 80274dc:	d102      	bne.n	80274e4 <MQTTSerialize_connectLength+0x1a>
		len = 12; /* variable depending on MQTT or MQIsdp */
 80274de:	230c      	movs	r3, #12
 80274e0:	60fb      	str	r3, [r7, #12]
 80274e2:	e005      	b.n	80274f0 <MQTTSerialize_connectLength+0x26>
	else if (options->MQTTVersion == 4)
 80274e4:	687b      	ldr	r3, [r7, #4]
 80274e6:	7a1b      	ldrb	r3, [r3, #8]
 80274e8:	2b04      	cmp	r3, #4
 80274ea:	d101      	bne.n	80274f0 <MQTTSerialize_connectLength+0x26>
		len = 10;
 80274ec:	230a      	movs	r3, #10
 80274ee:	60fb      	str	r3, [r7, #12]

	len += MQTTstrlen(options->clientID)+2;
 80274f0:	687b      	ldr	r3, [r7, #4]
 80274f2:	330c      	adds	r3, #12
 80274f4:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 80274f8:	f000 fc43 	bl	8027d82 <MQTTstrlen>
 80274fc:	4603      	mov	r3, r0
 80274fe:	3302      	adds	r3, #2
 8027500:	68fa      	ldr	r2, [r7, #12]
 8027502:	4413      	add	r3, r2
 8027504:	60fb      	str	r3, [r7, #12]
	if (options->willFlag)
 8027506:	687b      	ldr	r3, [r7, #4]
 8027508:	7edb      	ldrb	r3, [r3, #27]
 802750a:	2b00      	cmp	r3, #0
 802750c:	d013      	beq.n	8027536 <MQTTSerialize_connectLength+0x6c>
		len += MQTTstrlen(options->will.topicName)+2 + MQTTstrlen(options->will.message)+2;
 802750e:	687b      	ldr	r3, [r7, #4]
 8027510:	3324      	adds	r3, #36	@ 0x24
 8027512:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027516:	f000 fc34 	bl	8027d82 <MQTTstrlen>
 802751a:	4603      	mov	r3, r0
 802751c:	1c9c      	adds	r4, r3, #2
 802751e:	687b      	ldr	r3, [r7, #4]
 8027520:	3330      	adds	r3, #48	@ 0x30
 8027522:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027526:	f000 fc2c 	bl	8027d82 <MQTTstrlen>
 802752a:	4603      	mov	r3, r0
 802752c:	4423      	add	r3, r4
 802752e:	3302      	adds	r3, #2
 8027530:	68fa      	ldr	r2, [r7, #12]
 8027532:	4413      	add	r3, r2
 8027534:	60fb      	str	r3, [r7, #12]
	if (options->username.cstring || options->username.lenstring.data)
 8027536:	687b      	ldr	r3, [r7, #4]
 8027538:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 802753a:	2b00      	cmp	r3, #0
 802753c:	d103      	bne.n	8027546 <MQTTSerialize_connectLength+0x7c>
 802753e:	687b      	ldr	r3, [r7, #4]
 8027540:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8027542:	2b00      	cmp	r3, #0
 8027544:	d00a      	beq.n	802755c <MQTTSerialize_connectLength+0x92>
		len += MQTTstrlen(options->username)+2;
 8027546:	687b      	ldr	r3, [r7, #4]
 8027548:	3340      	adds	r3, #64	@ 0x40
 802754a:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 802754e:	f000 fc18 	bl	8027d82 <MQTTstrlen>
 8027552:	4603      	mov	r3, r0
 8027554:	3302      	adds	r3, #2
 8027556:	68fa      	ldr	r2, [r7, #12]
 8027558:	4413      	add	r3, r2
 802755a:	60fb      	str	r3, [r7, #12]
	if (options->password.cstring || options->password.lenstring.data)
 802755c:	687b      	ldr	r3, [r7, #4]
 802755e:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8027560:	2b00      	cmp	r3, #0
 8027562:	d103      	bne.n	802756c <MQTTSerialize_connectLength+0xa2>
 8027564:	687b      	ldr	r3, [r7, #4]
 8027566:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8027568:	2b00      	cmp	r3, #0
 802756a:	d00a      	beq.n	8027582 <MQTTSerialize_connectLength+0xb8>
		len += MQTTstrlen(options->password)+2;
 802756c:	687b      	ldr	r3, [r7, #4]
 802756e:	334c      	adds	r3, #76	@ 0x4c
 8027570:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027574:	f000 fc05 	bl	8027d82 <MQTTstrlen>
 8027578:	4603      	mov	r3, r0
 802757a:	3302      	adds	r3, #2
 802757c:	68fa      	ldr	r2, [r7, #12]
 802757e:	4413      	add	r3, r2
 8027580:	60fb      	str	r3, [r7, #12]

	FUNC_EXIT_RC(len);
	return len;
 8027582:	68fb      	ldr	r3, [r7, #12]
}
 8027584:	4618      	mov	r0, r3
 8027586:	3714      	adds	r7, #20
 8027588:	46bd      	mov	sp, r7
 802758a:	bd90      	pop	{r4, r7, pc}

0802758c <MQTTSerialize_connect>:
  * @param len the length in bytes of the supplied buffer
  * @param options the options to be used to build the connect packet
  * @return serialized length, or error if 0
  */
int MQTTSerialize_connect(unsigned char* buf, int buflen, MQTTPacket_connectData* options)
{
 802758c:	b580      	push	{r7, lr}
 802758e:	b08a      	sub	sp, #40	@ 0x28
 8027590:	af00      	add	r7, sp, #0
 8027592:	60f8      	str	r0, [r7, #12]
 8027594:	60b9      	str	r1, [r7, #8]
 8027596:	607a      	str	r2, [r7, #4]
	unsigned char *ptr = buf;
 8027598:	68fb      	ldr	r3, [r7, #12]
 802759a:	61fb      	str	r3, [r7, #28]
	MQTTHeader header = {0};
 802759c:	2300      	movs	r3, #0
 802759e:	61bb      	str	r3, [r7, #24]
	MQTTConnectFlags flags = {0};
 80275a0:	2300      	movs	r3, #0
 80275a2:	617b      	str	r3, [r7, #20]
	int len = 0;
 80275a4:	2300      	movs	r3, #0
 80275a6:	623b      	str	r3, [r7, #32]
	int rc = -1;
 80275a8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80275ac:	627b      	str	r3, [r7, #36]	@ 0x24

	FUNC_ENTRY;
	if (MQTTPacket_len(len = MQTTSerialize_connectLength(options)) > buflen)
 80275ae:	6878      	ldr	r0, [r7, #4]
 80275b0:	f7ff ff8b 	bl	80274ca <MQTTSerialize_connectLength>
 80275b4:	6238      	str	r0, [r7, #32]
 80275b6:	6a38      	ldr	r0, [r7, #32]
 80275b8:	f000 fa98 	bl	8027aec <MQTTPacket_len>
 80275bc:	4602      	mov	r2, r0
 80275be:	68bb      	ldr	r3, [r7, #8]
 80275c0:	4293      	cmp	r3, r2
 80275c2:	da03      	bge.n	80275cc <MQTTSerialize_connect+0x40>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 80275c4:	f06f 0301 	mvn.w	r3, #1
 80275c8:	627b      	str	r3, [r7, #36]	@ 0x24
		goto exit;
 80275ca:	e0c2      	b.n	8027752 <MQTTSerialize_connect+0x1c6>
	}

	header.byte = 0;
 80275cc:	2300      	movs	r3, #0
 80275ce:	763b      	strb	r3, [r7, #24]
	header.bits.type = CONNECT;
 80275d0:	7e3b      	ldrb	r3, [r7, #24]
 80275d2:	2201      	movs	r2, #1
 80275d4:	f362 1307 	bfi	r3, r2, #4, #4
 80275d8:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 80275da:	7e3a      	ldrb	r2, [r7, #24]
 80275dc:	f107 031c 	add.w	r3, r7, #28
 80275e0:	4611      	mov	r1, r2
 80275e2:	4618      	mov	r0, r3
 80275e4:	f000 fb11 	bl	8027c0a <writeChar>

	ptr += MQTTPacket_encode(ptr, len); /* write remaining length */
 80275e8:	69fb      	ldr	r3, [r7, #28]
 80275ea:	6a39      	ldr	r1, [r7, #32]
 80275ec:	4618      	mov	r0, r3
 80275ee:	f000 fa12 	bl	8027a16 <MQTTPacket_encode>
 80275f2:	4602      	mov	r2, r0
 80275f4:	69fb      	ldr	r3, [r7, #28]
 80275f6:	4413      	add	r3, r2
 80275f8:	61fb      	str	r3, [r7, #28]

	if (options->MQTTVersion == 4)
 80275fa:	687b      	ldr	r3, [r7, #4]
 80275fc:	7a1b      	ldrb	r3, [r3, #8]
 80275fe:	2b04      	cmp	r3, #4
 8027600:	d10c      	bne.n	802761c <MQTTSerialize_connect+0x90>
	{
		writeCString(&ptr, "MQTT");
 8027602:	f107 031c 	add.w	r3, r7, #28
 8027606:	4955      	ldr	r1, [pc, #340]	@ (802775c <MQTTSerialize_connect+0x1d0>)
 8027608:	4618      	mov	r0, r3
 802760a:	f000 fb3c 	bl	8027c86 <writeCString>
		writeChar(&ptr, (char) 4);
 802760e:	f107 031c 	add.w	r3, r7, #28
 8027612:	2104      	movs	r1, #4
 8027614:	4618      	mov	r0, r3
 8027616:	f000 faf8 	bl	8027c0a <writeChar>
 802761a:	e00b      	b.n	8027634 <MQTTSerialize_connect+0xa8>
	}
	else
	{
		writeCString(&ptr, "MQIsdp");
 802761c:	f107 031c 	add.w	r3, r7, #28
 8027620:	494f      	ldr	r1, [pc, #316]	@ (8027760 <MQTTSerialize_connect+0x1d4>)
 8027622:	4618      	mov	r0, r3
 8027624:	f000 fb2f 	bl	8027c86 <writeCString>
		writeChar(&ptr, (char) 3);
 8027628:	f107 031c 	add.w	r3, r7, #28
 802762c:	2103      	movs	r1, #3
 802762e:	4618      	mov	r0, r3
 8027630:	f000 faeb 	bl	8027c0a <writeChar>
	}

	flags.all = 0;
 8027634:	2300      	movs	r3, #0
 8027636:	753b      	strb	r3, [r7, #20]
	flags.bits.cleansession = options->cleansession;
 8027638:	687b      	ldr	r3, [r7, #4]
 802763a:	7e9b      	ldrb	r3, [r3, #26]
 802763c:	f003 0301 	and.w	r3, r3, #1
 8027640:	b2da      	uxtb	r2, r3
 8027642:	7d3b      	ldrb	r3, [r7, #20]
 8027644:	f362 0341 	bfi	r3, r2, #1, #1
 8027648:	753b      	strb	r3, [r7, #20]
	flags.bits.will = (options->willFlag) ? 1 : 0;
 802764a:	687b      	ldr	r3, [r7, #4]
 802764c:	7edb      	ldrb	r3, [r3, #27]
 802764e:	2b00      	cmp	r3, #0
 8027650:	bf14      	ite	ne
 8027652:	2301      	movne	r3, #1
 8027654:	2300      	moveq	r3, #0
 8027656:	b2da      	uxtb	r2, r3
 8027658:	7d3b      	ldrb	r3, [r7, #20]
 802765a:	f362 0382 	bfi	r3, r2, #2, #1
 802765e:	753b      	strb	r3, [r7, #20]
	if (flags.bits.will)
 8027660:	7d3b      	ldrb	r3, [r7, #20]
 8027662:	f003 0304 	and.w	r3, r3, #4
 8027666:	b2db      	uxtb	r3, r3
 8027668:	2b00      	cmp	r3, #0
 802766a:	d013      	beq.n	8027694 <MQTTSerialize_connect+0x108>
	{
		flags.bits.willQoS = options->will.qos;
 802766c:	687b      	ldr	r3, [r7, #4]
 802766e:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 8027672:	f003 0303 	and.w	r3, r3, #3
 8027676:	b2da      	uxtb	r2, r3
 8027678:	7d3b      	ldrb	r3, [r7, #20]
 802767a:	f362 03c4 	bfi	r3, r2, #3, #2
 802767e:	753b      	strb	r3, [r7, #20]
		flags.bits.willRetain = options->will.retained;
 8027680:	687b      	ldr	r3, [r7, #4]
 8027682:	f893 303c 	ldrb.w	r3, [r3, #60]	@ 0x3c
 8027686:	f003 0301 	and.w	r3, r3, #1
 802768a:	b2da      	uxtb	r2, r3
 802768c:	7d3b      	ldrb	r3, [r7, #20]
 802768e:	f362 1345 	bfi	r3, r2, #5, #1
 8027692:	753b      	strb	r3, [r7, #20]
	}

	if (options->username.cstring || options->username.lenstring.data)
 8027694:	687b      	ldr	r3, [r7, #4]
 8027696:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8027698:	2b00      	cmp	r3, #0
 802769a:	d103      	bne.n	80276a4 <MQTTSerialize_connect+0x118>
 802769c:	687b      	ldr	r3, [r7, #4]
 802769e:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 80276a0:	2b00      	cmp	r3, #0
 80276a2:	d003      	beq.n	80276ac <MQTTSerialize_connect+0x120>
		flags.bits.username = 1;
 80276a4:	7d3b      	ldrb	r3, [r7, #20]
 80276a6:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 80276aa:	753b      	strb	r3, [r7, #20]
	if (options->password.cstring || options->password.lenstring.data)
 80276ac:	687b      	ldr	r3, [r7, #4]
 80276ae:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 80276b0:	2b00      	cmp	r3, #0
 80276b2:	d103      	bne.n	80276bc <MQTTSerialize_connect+0x130>
 80276b4:	687b      	ldr	r3, [r7, #4]
 80276b6:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 80276b8:	2b00      	cmp	r3, #0
 80276ba:	d003      	beq.n	80276c4 <MQTTSerialize_connect+0x138>
		flags.bits.password = 1;
 80276bc:	7d3b      	ldrb	r3, [r7, #20]
 80276be:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 80276c2:	753b      	strb	r3, [r7, #20]

	writeChar(&ptr, flags.all);
 80276c4:	7d3a      	ldrb	r2, [r7, #20]
 80276c6:	f107 031c 	add.w	r3, r7, #28
 80276ca:	4611      	mov	r1, r2
 80276cc:	4618      	mov	r0, r3
 80276ce:	f000 fa9c 	bl	8027c0a <writeChar>
	writeInt(&ptr, options->keepAliveInterval);
 80276d2:	687b      	ldr	r3, [r7, #4]
 80276d4:	8b1b      	ldrh	r3, [r3, #24]
 80276d6:	461a      	mov	r2, r3
 80276d8:	f107 031c 	add.w	r3, r7, #28
 80276dc:	4611      	mov	r1, r2
 80276de:	4618      	mov	r0, r3
 80276e0:	f000 faa8 	bl	8027c34 <writeInt>
	writeMQTTString(&ptr, options->clientID);
 80276e4:	687b      	ldr	r3, [r7, #4]
 80276e6:	f107 001c 	add.w	r0, r7, #28
 80276ea:	330c      	adds	r3, #12
 80276ec:	cb0e      	ldmia	r3, {r1, r2, r3}
 80276ee:	f000 fae9 	bl	8027cc4 <writeMQTTString>
	if (options->willFlag)
 80276f2:	687b      	ldr	r3, [r7, #4]
 80276f4:	7edb      	ldrb	r3, [r3, #27]
 80276f6:	2b00      	cmp	r3, #0
 80276f8:	d00d      	beq.n	8027716 <MQTTSerialize_connect+0x18a>
	{
		writeMQTTString(&ptr, options->will.topicName);
 80276fa:	687b      	ldr	r3, [r7, #4]
 80276fc:	f107 001c 	add.w	r0, r7, #28
 8027700:	3324      	adds	r3, #36	@ 0x24
 8027702:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027704:	f000 fade 	bl	8027cc4 <writeMQTTString>
		writeMQTTString(&ptr, options->will.message);
 8027708:	687b      	ldr	r3, [r7, #4]
 802770a:	f107 001c 	add.w	r0, r7, #28
 802770e:	3330      	adds	r3, #48	@ 0x30
 8027710:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027712:	f000 fad7 	bl	8027cc4 <writeMQTTString>
	}
	if (flags.bits.username)
 8027716:	7d3b      	ldrb	r3, [r7, #20]
 8027718:	f023 037f 	bic.w	r3, r3, #127	@ 0x7f
 802771c:	b2db      	uxtb	r3, r3
 802771e:	2b00      	cmp	r3, #0
 8027720:	d006      	beq.n	8027730 <MQTTSerialize_connect+0x1a4>
		writeMQTTString(&ptr, options->username);
 8027722:	687b      	ldr	r3, [r7, #4]
 8027724:	f107 001c 	add.w	r0, r7, #28
 8027728:	3340      	adds	r3, #64	@ 0x40
 802772a:	cb0e      	ldmia	r3, {r1, r2, r3}
 802772c:	f000 faca 	bl	8027cc4 <writeMQTTString>
	if (flags.bits.password)
 8027730:	7d3b      	ldrb	r3, [r7, #20]
 8027732:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8027736:	b2db      	uxtb	r3, r3
 8027738:	2b00      	cmp	r3, #0
 802773a:	d006      	beq.n	802774a <MQTTSerialize_connect+0x1be>
		writeMQTTString(&ptr, options->password);
 802773c:	687b      	ldr	r3, [r7, #4]
 802773e:	f107 001c 	add.w	r0, r7, #28
 8027742:	334c      	adds	r3, #76	@ 0x4c
 8027744:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027746:	f000 fabd 	bl	8027cc4 <writeMQTTString>

	rc = ptr - buf;
 802774a:	69fa      	ldr	r2, [r7, #28]
 802774c:	68fb      	ldr	r3, [r7, #12]
 802774e:	1ad3      	subs	r3, r2, r3
 8027750:	627b      	str	r3, [r7, #36]	@ 0x24

	exit: FUNC_EXIT_RC(rc);
	return rc;
 8027752:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8027754:	4618      	mov	r0, r3
 8027756:	3728      	adds	r7, #40	@ 0x28
 8027758:	46bd      	mov	sp, r7
 802775a:	bd80      	pop	{r7, pc}
 802775c:	080309c8 	.word	0x080309c8
 8027760:	080309d0 	.word	0x080309d0

08027764 <MQTTDeserialize_connack>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param len the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_connack(unsigned char* sessionPresent, unsigned char* connack_rc, unsigned char* buf, int buflen)
{
 8027764:	b580      	push	{r7, lr}
 8027766:	b08a      	sub	sp, #40	@ 0x28
 8027768:	af00      	add	r7, sp, #0
 802776a:	60f8      	str	r0, [r7, #12]
 802776c:	60b9      	str	r1, [r7, #8]
 802776e:	607a      	str	r2, [r7, #4]
 8027770:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 8027772:	2300      	movs	r3, #0
 8027774:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 8027776:	687b      	ldr	r3, [r7, #4]
 8027778:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 802777a:	2300      	movs	r3, #0
 802777c:	623b      	str	r3, [r7, #32]
	int rc = 0;
 802777e:	2300      	movs	r3, #0
 8027780:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;
	MQTTConnackFlags flags = {0};
 8027782:	2300      	movs	r3, #0
 8027784:	613b      	str	r3, [r7, #16]

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 8027786:	f107 0318 	add.w	r3, r7, #24
 802778a:	4618      	mov	r0, r3
 802778c:	f000 fa29 	bl	8027be2 <readChar>
 8027790:	4603      	mov	r3, r0
 8027792:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != CONNACK)
 8027794:	7f3b      	ldrb	r3, [r7, #28]
 8027796:	f023 030f 	bic.w	r3, r3, #15
 802779a:	b2db      	uxtb	r3, r3
 802779c:	2b20      	cmp	r3, #32
 802779e:	d12e      	bne.n	80277fe <MQTTDeserialize_connack+0x9a>
		goto exit;

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 80277a0:	69bb      	ldr	r3, [r7, #24]
 80277a2:	f107 0214 	add.w	r2, r7, #20
 80277a6:	4611      	mov	r1, r2
 80277a8:	4618      	mov	r0, r3
 80277aa:	f000 f9e9 	bl	8027b80 <MQTTPacket_decodeBuf>
 80277ae:	6278      	str	r0, [r7, #36]	@ 0x24
 80277b0:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80277b2:	69bb      	ldr	r3, [r7, #24]
 80277b4:	4413      	add	r3, r2
 80277b6:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 80277b8:	69bb      	ldr	r3, [r7, #24]
 80277ba:	697a      	ldr	r2, [r7, #20]
 80277bc:	4413      	add	r3, r2
 80277be:	623b      	str	r3, [r7, #32]
	if (enddata - curdata < 2)
 80277c0:	69bb      	ldr	r3, [r7, #24]
 80277c2:	6a3a      	ldr	r2, [r7, #32]
 80277c4:	1ad3      	subs	r3, r2, r3
 80277c6:	2b01      	cmp	r3, #1
 80277c8:	dd1b      	ble.n	8027802 <MQTTDeserialize_connack+0x9e>
		goto exit;

	flags.all = readChar(&curdata);
 80277ca:	f107 0318 	add.w	r3, r7, #24
 80277ce:	4618      	mov	r0, r3
 80277d0:	f000 fa07 	bl	8027be2 <readChar>
 80277d4:	4603      	mov	r3, r0
 80277d6:	743b      	strb	r3, [r7, #16]
	*sessionPresent = flags.bits.sessionpresent;
 80277d8:	7c3b      	ldrb	r3, [r7, #16]
 80277da:	f3c3 0300 	ubfx	r3, r3, #0, #1
 80277de:	b2db      	uxtb	r3, r3
 80277e0:	461a      	mov	r2, r3
 80277e2:	68fb      	ldr	r3, [r7, #12]
 80277e4:	701a      	strb	r2, [r3, #0]
	*connack_rc = readChar(&curdata);
 80277e6:	f107 0318 	add.w	r3, r7, #24
 80277ea:	4618      	mov	r0, r3
 80277ec:	f000 f9f9 	bl	8027be2 <readChar>
 80277f0:	4603      	mov	r3, r0
 80277f2:	461a      	mov	r2, r3
 80277f4:	68bb      	ldr	r3, [r7, #8]
 80277f6:	701a      	strb	r2, [r3, #0]

	rc = 1;
 80277f8:	2301      	movs	r3, #1
 80277fa:	627b      	str	r3, [r7, #36]	@ 0x24
 80277fc:	e002      	b.n	8027804 <MQTTDeserialize_connack+0xa0>
		goto exit;
 80277fe:	bf00      	nop
 8027800:	e000      	b.n	8027804 <MQTTDeserialize_connack+0xa0>
		goto exit;
 8027802:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8027804:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8027806:	4618      	mov	r0, r3
 8027808:	3728      	adds	r7, #40	@ 0x28
 802780a:	46bd      	mov	sp, r7
 802780c:	bd80      	pop	{r7, pc}

0802780e <MQTTSerialize_zero>:
  * @param buflen the length in bytes of the supplied buffer, to avoid overruns
  * @param packettype the message type
  * @return serialized length, or error if 0
  */
int MQTTSerialize_zero(unsigned char* buf, int buflen, unsigned char packettype)
{
 802780e:	b580      	push	{r7, lr}
 8027810:	b088      	sub	sp, #32
 8027812:	af00      	add	r7, sp, #0
 8027814:	60f8      	str	r0, [r7, #12]
 8027816:	60b9      	str	r1, [r7, #8]
 8027818:	4613      	mov	r3, r2
 802781a:	71fb      	strb	r3, [r7, #7]
	MQTTHeader header = {0};
 802781c:	2300      	movs	r3, #0
 802781e:	61bb      	str	r3, [r7, #24]
	int rc = -1;
 8027820:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027824:	61fb      	str	r3, [r7, #28]
	unsigned char *ptr = buf;
 8027826:	68fb      	ldr	r3, [r7, #12]
 8027828:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	if (buflen < 2)
 802782a:	68bb      	ldr	r3, [r7, #8]
 802782c:	2b01      	cmp	r3, #1
 802782e:	dc03      	bgt.n	8027838 <MQTTSerialize_zero+0x2a>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8027830:	f06f 0301 	mvn.w	r3, #1
 8027834:	61fb      	str	r3, [r7, #28]
		goto exit;
 8027836:	e01d      	b.n	8027874 <MQTTSerialize_zero+0x66>
	}
	header.byte = 0;
 8027838:	2300      	movs	r3, #0
 802783a:	763b      	strb	r3, [r7, #24]
	header.bits.type = packettype;
 802783c:	79fb      	ldrb	r3, [r7, #7]
 802783e:	f003 030f 	and.w	r3, r3, #15
 8027842:	b2da      	uxtb	r2, r3
 8027844:	7e3b      	ldrb	r3, [r7, #24]
 8027846:	f362 1307 	bfi	r3, r2, #4, #4
 802784a:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 802784c:	7e3a      	ldrb	r2, [r7, #24]
 802784e:	f107 0314 	add.w	r3, r7, #20
 8027852:	4611      	mov	r1, r2
 8027854:	4618      	mov	r0, r3
 8027856:	f000 f9d8 	bl	8027c0a <writeChar>

	ptr += MQTTPacket_encode(ptr, 0); /* write remaining length */
 802785a:	697b      	ldr	r3, [r7, #20]
 802785c:	2100      	movs	r1, #0
 802785e:	4618      	mov	r0, r3
 8027860:	f000 f8d9 	bl	8027a16 <MQTTPacket_encode>
 8027864:	4602      	mov	r2, r0
 8027866:	697b      	ldr	r3, [r7, #20]
 8027868:	4413      	add	r3, r2
 802786a:	617b      	str	r3, [r7, #20]
	rc = ptr - buf;
 802786c:	697a      	ldr	r2, [r7, #20]
 802786e:	68fb      	ldr	r3, [r7, #12]
 8027870:	1ad3      	subs	r3, r2, r3
 8027872:	61fb      	str	r3, [r7, #28]
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8027874:	69fb      	ldr	r3, [r7, #28]
}
 8027876:	4618      	mov	r0, r3
 8027878:	3720      	adds	r7, #32
 802787a:	46bd      	mov	sp, r7
 802787c:	bd80      	pop	{r7, pc}

0802787e <MQTTSerialize_pingreq>:
  * @param buf the buffer into which the packet will be serialized
  * @param buflen the length in bytes of the supplied buffer, to avoid overruns
  * @return serialized length, or error if 0
  */
int MQTTSerialize_pingreq(unsigned char* buf, int buflen)
{
 802787e:	b580      	push	{r7, lr}
 8027880:	b082      	sub	sp, #8
 8027882:	af00      	add	r7, sp, #0
 8027884:	6078      	str	r0, [r7, #4]
 8027886:	6039      	str	r1, [r7, #0]
	return MQTTSerialize_zero(buf, buflen, PINGREQ);
 8027888:	220c      	movs	r2, #12
 802788a:	6839      	ldr	r1, [r7, #0]
 802788c:	6878      	ldr	r0, [r7, #4]
 802788e:	f7ff ffbe 	bl	802780e <MQTTSerialize_zero>
 8027892:	4603      	mov	r3, r0
}
 8027894:	4618      	mov	r0, r3
 8027896:	3708      	adds	r7, #8
 8027898:	46bd      	mov	sp, r7
 802789a:	bd80      	pop	{r7, pc}

0802789c <MQTTDeserialize_publish>:
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success
  */
int MQTTDeserialize_publish(unsigned char* dup, int* qos, unsigned char* retained, unsigned short* packetid, MQTTString* topicName,
		unsigned char** payload, int* payloadlen, unsigned char* buf, int buflen)
{
 802789c:	b580      	push	{r7, lr}
 802789e:	b08a      	sub	sp, #40	@ 0x28
 80278a0:	af00      	add	r7, sp, #0
 80278a2:	60f8      	str	r0, [r7, #12]
 80278a4:	60b9      	str	r1, [r7, #8]
 80278a6:	607a      	str	r2, [r7, #4]
 80278a8:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 80278aa:	2300      	movs	r3, #0
 80278ac:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 80278ae:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80278b0:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 80278b2:	2300      	movs	r3, #0
 80278b4:	623b      	str	r3, [r7, #32]
	int rc = 0;
 80278b6:	2300      	movs	r3, #0
 80278b8:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen = 0;
 80278ba:	2300      	movs	r3, #0
 80278bc:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 80278be:	f107 0318 	add.w	r3, r7, #24
 80278c2:	4618      	mov	r0, r3
 80278c4:	f000 f98d 	bl	8027be2 <readChar>
 80278c8:	4603      	mov	r3, r0
 80278ca:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != PUBLISH)
 80278cc:	7f3b      	ldrb	r3, [r7, #28]
 80278ce:	f023 030f 	bic.w	r3, r3, #15
 80278d2:	b2db      	uxtb	r3, r3
 80278d4:	2b30      	cmp	r3, #48	@ 0x30
 80278d6:	d14b      	bne.n	8027970 <MQTTDeserialize_publish+0xd4>
		goto exit;
	*dup = header.bits.dup;
 80278d8:	7f3b      	ldrb	r3, [r7, #28]
 80278da:	f3c3 03c0 	ubfx	r3, r3, #3, #1
 80278de:	b2db      	uxtb	r3, r3
 80278e0:	461a      	mov	r2, r3
 80278e2:	68fb      	ldr	r3, [r7, #12]
 80278e4:	701a      	strb	r2, [r3, #0]
	*qos = header.bits.qos;
 80278e6:	7f3b      	ldrb	r3, [r7, #28]
 80278e8:	f3c3 0341 	ubfx	r3, r3, #1, #2
 80278ec:	b2db      	uxtb	r3, r3
 80278ee:	461a      	mov	r2, r3
 80278f0:	68bb      	ldr	r3, [r7, #8]
 80278f2:	601a      	str	r2, [r3, #0]
	*retained = header.bits.retain;
 80278f4:	7f3b      	ldrb	r3, [r7, #28]
 80278f6:	f3c3 0300 	ubfx	r3, r3, #0, #1
 80278fa:	b2db      	uxtb	r3, r3
 80278fc:	461a      	mov	r2, r3
 80278fe:	687b      	ldr	r3, [r7, #4]
 8027900:	701a      	strb	r2, [r3, #0]

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 8027902:	69bb      	ldr	r3, [r7, #24]
 8027904:	f107 0214 	add.w	r2, r7, #20
 8027908:	4611      	mov	r1, r2
 802790a:	4618      	mov	r0, r3
 802790c:	f000 f938 	bl	8027b80 <MQTTPacket_decodeBuf>
 8027910:	6278      	str	r0, [r7, #36]	@ 0x24
 8027912:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8027914:	69bb      	ldr	r3, [r7, #24]
 8027916:	4413      	add	r3, r2
 8027918:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 802791a:	69bb      	ldr	r3, [r7, #24]
 802791c:	697a      	ldr	r2, [r7, #20]
 802791e:	4413      	add	r3, r2
 8027920:	623b      	str	r3, [r7, #32]

	if (!readMQTTLenString(topicName, &curdata, enddata) ||
 8027922:	f107 0318 	add.w	r3, r7, #24
 8027926:	6a3a      	ldr	r2, [r7, #32]
 8027928:	4619      	mov	r1, r3
 802792a:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 802792c:	f000 f9f8 	bl	8027d20 <readMQTTLenString>
 8027930:	4603      	mov	r3, r0
 8027932:	2b00      	cmp	r3, #0
 8027934:	d01e      	beq.n	8027974 <MQTTDeserialize_publish+0xd8>
		enddata - curdata < 0) /* do we have enough data to read the protocol version byte? */
 8027936:	69bb      	ldr	r3, [r7, #24]
 8027938:	6a3a      	ldr	r2, [r7, #32]
 802793a:	1ad3      	subs	r3, r2, r3
	if (!readMQTTLenString(topicName, &curdata, enddata) ||
 802793c:	2b00      	cmp	r3, #0
 802793e:	db19      	blt.n	8027974 <MQTTDeserialize_publish+0xd8>
		goto exit;

	if (*qos > 0)
 8027940:	68bb      	ldr	r3, [r7, #8]
 8027942:	681b      	ldr	r3, [r3, #0]
 8027944:	2b00      	cmp	r3, #0
 8027946:	dd08      	ble.n	802795a <MQTTDeserialize_publish+0xbe>
		*packetid = readInt(&curdata);
 8027948:	f107 0318 	add.w	r3, r7, #24
 802794c:	4618      	mov	r0, r3
 802794e:	f000 f92d 	bl	8027bac <readInt>
 8027952:	4603      	mov	r3, r0
 8027954:	b29a      	uxth	r2, r3
 8027956:	683b      	ldr	r3, [r7, #0]
 8027958:	801a      	strh	r2, [r3, #0]

	*payloadlen = enddata - curdata;
 802795a:	69bb      	ldr	r3, [r7, #24]
 802795c:	6a3a      	ldr	r2, [r7, #32]
 802795e:	1ad2      	subs	r2, r2, r3
 8027960:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8027962:	601a      	str	r2, [r3, #0]
	*payload = curdata;
 8027964:	69ba      	ldr	r2, [r7, #24]
 8027966:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8027968:	601a      	str	r2, [r3, #0]
	rc = 1;
 802796a:	2301      	movs	r3, #1
 802796c:	627b      	str	r3, [r7, #36]	@ 0x24
 802796e:	e002      	b.n	8027976 <MQTTDeserialize_publish+0xda>
		goto exit;
 8027970:	bf00      	nop
 8027972:	e000      	b.n	8027976 <MQTTDeserialize_publish+0xda>
		goto exit;
 8027974:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8027976:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8027978:	4618      	mov	r0, r3
 802797a:	3728      	adds	r7, #40	@ 0x28
 802797c:	46bd      	mov	sp, r7
 802797e:	bd80      	pop	{r7, pc}

08027980 <MQTTDeserialize_ack>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_ack(unsigned char* packettype, unsigned char* dup, unsigned short* packetid, unsigned char* buf, int buflen)
{
 8027980:	b580      	push	{r7, lr}
 8027982:	b08a      	sub	sp, #40	@ 0x28
 8027984:	af00      	add	r7, sp, #0
 8027986:	60f8      	str	r0, [r7, #12]
 8027988:	60b9      	str	r1, [r7, #8]
 802798a:	607a      	str	r2, [r7, #4]
 802798c:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 802798e:	2300      	movs	r3, #0
 8027990:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 8027992:	683b      	ldr	r3, [r7, #0]
 8027994:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 8027996:	2300      	movs	r3, #0
 8027998:	623b      	str	r3, [r7, #32]
	int rc = 0;
 802799a:	2300      	movs	r3, #0
 802799c:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 802799e:	f107 0318 	add.w	r3, r7, #24
 80279a2:	4618      	mov	r0, r3
 80279a4:	f000 f91d 	bl	8027be2 <readChar>
 80279a8:	4603      	mov	r3, r0
 80279aa:	773b      	strb	r3, [r7, #28]
	*dup = header.bits.dup;
 80279ac:	7f3b      	ldrb	r3, [r7, #28]
 80279ae:	f3c3 03c0 	ubfx	r3, r3, #3, #1
 80279b2:	b2db      	uxtb	r3, r3
 80279b4:	461a      	mov	r2, r3
 80279b6:	68bb      	ldr	r3, [r7, #8]
 80279b8:	701a      	strb	r2, [r3, #0]
	*packettype = header.bits.type;
 80279ba:	7f3b      	ldrb	r3, [r7, #28]
 80279bc:	f3c3 1303 	ubfx	r3, r3, #4, #4
 80279c0:	b2db      	uxtb	r3, r3
 80279c2:	461a      	mov	r2, r3
 80279c4:	68fb      	ldr	r3, [r7, #12]
 80279c6:	701a      	strb	r2, [r3, #0]

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 80279c8:	69bb      	ldr	r3, [r7, #24]
 80279ca:	f107 0214 	add.w	r2, r7, #20
 80279ce:	4611      	mov	r1, r2
 80279d0:	4618      	mov	r0, r3
 80279d2:	f000 f8d5 	bl	8027b80 <MQTTPacket_decodeBuf>
 80279d6:	6278      	str	r0, [r7, #36]	@ 0x24
 80279d8:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80279da:	69bb      	ldr	r3, [r7, #24]
 80279dc:	4413      	add	r3, r2
 80279de:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 80279e0:	69bb      	ldr	r3, [r7, #24]
 80279e2:	697a      	ldr	r2, [r7, #20]
 80279e4:	4413      	add	r3, r2
 80279e6:	623b      	str	r3, [r7, #32]

	if (enddata - curdata < 2)
 80279e8:	69bb      	ldr	r3, [r7, #24]
 80279ea:	6a3a      	ldr	r2, [r7, #32]
 80279ec:	1ad3      	subs	r3, r2, r3
 80279ee:	2b01      	cmp	r3, #1
 80279f0:	dd0b      	ble.n	8027a0a <MQTTDeserialize_ack+0x8a>
		goto exit;
	*packetid = readInt(&curdata);
 80279f2:	f107 0318 	add.w	r3, r7, #24
 80279f6:	4618      	mov	r0, r3
 80279f8:	f000 f8d8 	bl	8027bac <readInt>
 80279fc:	4603      	mov	r3, r0
 80279fe:	b29a      	uxth	r2, r3
 8027a00:	687b      	ldr	r3, [r7, #4]
 8027a02:	801a      	strh	r2, [r3, #0]

	rc = 1;
 8027a04:	2301      	movs	r3, #1
 8027a06:	627b      	str	r3, [r7, #36]	@ 0x24
 8027a08:	e000      	b.n	8027a0c <MQTTDeserialize_ack+0x8c>
		goto exit;
 8027a0a:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8027a0c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8027a0e:	4618      	mov	r0, r3
 8027a10:	3728      	adds	r7, #40	@ 0x28
 8027a12:	46bd      	mov	sp, r7
 8027a14:	bd80      	pop	{r7, pc}

08027a16 <MQTTPacket_encode>:
 * @param buf the buffer into which the encoded data is written
 * @param length the length to be encoded
 * @return the number of bytes written to buffer
 */
int MQTTPacket_encode(unsigned char* buf, int length)
{
 8027a16:	b480      	push	{r7}
 8027a18:	b085      	sub	sp, #20
 8027a1a:	af00      	add	r7, sp, #0
 8027a1c:	6078      	str	r0, [r7, #4]
 8027a1e:	6039      	str	r1, [r7, #0]
	int rc = 0;
 8027a20:	2300      	movs	r3, #0
 8027a22:	60fb      	str	r3, [r7, #12]

	FUNC_ENTRY;
	do
	{
		char d = length % 128;
 8027a24:	683b      	ldr	r3, [r7, #0]
 8027a26:	425a      	negs	r2, r3
 8027a28:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 8027a2c:	f002 027f 	and.w	r2, r2, #127	@ 0x7f
 8027a30:	bf58      	it	pl
 8027a32:	4253      	negpl	r3, r2
 8027a34:	72fb      	strb	r3, [r7, #11]
		length /= 128;
 8027a36:	683b      	ldr	r3, [r7, #0]
 8027a38:	2b00      	cmp	r3, #0
 8027a3a:	da00      	bge.n	8027a3e <MQTTPacket_encode+0x28>
 8027a3c:	337f      	adds	r3, #127	@ 0x7f
 8027a3e:	11db      	asrs	r3, r3, #7
 8027a40:	603b      	str	r3, [r7, #0]
		/* if there are more digits to encode, set the top bit of this digit */
		if (length > 0)
 8027a42:	683b      	ldr	r3, [r7, #0]
 8027a44:	2b00      	cmp	r3, #0
 8027a46:	dd03      	ble.n	8027a50 <MQTTPacket_encode+0x3a>
			d |= 0x80;
 8027a48:	7afb      	ldrb	r3, [r7, #11]
 8027a4a:	f063 037f 	orn	r3, r3, #127	@ 0x7f
 8027a4e:	72fb      	strb	r3, [r7, #11]
		buf[rc++] = d;
 8027a50:	68fb      	ldr	r3, [r7, #12]
 8027a52:	1c5a      	adds	r2, r3, #1
 8027a54:	60fa      	str	r2, [r7, #12]
 8027a56:	461a      	mov	r2, r3
 8027a58:	687b      	ldr	r3, [r7, #4]
 8027a5a:	4413      	add	r3, r2
 8027a5c:	7afa      	ldrb	r2, [r7, #11]
 8027a5e:	701a      	strb	r2, [r3, #0]
	} while (length > 0);
 8027a60:	683b      	ldr	r3, [r7, #0]
 8027a62:	2b00      	cmp	r3, #0
 8027a64:	dcde      	bgt.n	8027a24 <MQTTPacket_encode+0xe>
	FUNC_EXIT_RC(rc);
	return rc;
 8027a66:	68fb      	ldr	r3, [r7, #12]
}
 8027a68:	4618      	mov	r0, r3
 8027a6a:	3714      	adds	r7, #20
 8027a6c:	46bd      	mov	sp, r7
 8027a6e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027a72:	4770      	bx	lr

08027a74 <MQTTPacket_decode>:
 * @param getcharfn pointer to function to read the next character from the data source
 * @param value the decoded length returned
 * @return the number of bytes read from the socket
 */
int MQTTPacket_decode(int (*getcharfn)(unsigned char*, int), int* value)
{
 8027a74:	b580      	push	{r7, lr}
 8027a76:	b086      	sub	sp, #24
 8027a78:	af00      	add	r7, sp, #0
 8027a7a:	6078      	str	r0, [r7, #4]
 8027a7c:	6039      	str	r1, [r7, #0]
	unsigned char c;
	int multiplier = 1;
 8027a7e:	2301      	movs	r3, #1
 8027a80:	617b      	str	r3, [r7, #20]
	int len = 0;
 8027a82:	2300      	movs	r3, #0
 8027a84:	613b      	str	r3, [r7, #16]
#define MAX_NO_OF_REMAINING_LENGTH_BYTES 4

	FUNC_ENTRY;
	*value = 0;
 8027a86:	683b      	ldr	r3, [r7, #0]
 8027a88:	2200      	movs	r2, #0
 8027a8a:	601a      	str	r2, [r3, #0]
	do
	{
		int rc = MQTTPACKET_READ_ERROR;
 8027a8c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027a90:	60fb      	str	r3, [r7, #12]

		if (++len > MAX_NO_OF_REMAINING_LENGTH_BYTES)
 8027a92:	693b      	ldr	r3, [r7, #16]
 8027a94:	3301      	adds	r3, #1
 8027a96:	613b      	str	r3, [r7, #16]
 8027a98:	693b      	ldr	r3, [r7, #16]
 8027a9a:	2b04      	cmp	r3, #4
 8027a9c:	dd03      	ble.n	8027aa6 <MQTTPacket_decode+0x32>
		{
			rc = MQTTPACKET_READ_ERROR;	/* bad data */
 8027a9e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027aa2:	60fb      	str	r3, [r7, #12]
			goto exit;
 8027aa4:	e01d      	b.n	8027ae2 <MQTTPacket_decode+0x6e>
		}
		rc = (*getcharfn)(&c, 1);
 8027aa6:	f107 020b 	add.w	r2, r7, #11
 8027aaa:	687b      	ldr	r3, [r7, #4]
 8027aac:	2101      	movs	r1, #1
 8027aae:	4610      	mov	r0, r2
 8027ab0:	4798      	blx	r3
 8027ab2:	60f8      	str	r0, [r7, #12]
		if (rc != 1)
 8027ab4:	68fb      	ldr	r3, [r7, #12]
 8027ab6:	2b01      	cmp	r3, #1
 8027ab8:	d112      	bne.n	8027ae0 <MQTTPacket_decode+0x6c>
			goto exit;
		*value += (c & 127) * multiplier;
 8027aba:	683b      	ldr	r3, [r7, #0]
 8027abc:	681a      	ldr	r2, [r3, #0]
 8027abe:	7afb      	ldrb	r3, [r7, #11]
 8027ac0:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 8027ac4:	6979      	ldr	r1, [r7, #20]
 8027ac6:	fb01 f303 	mul.w	r3, r1, r3
 8027aca:	441a      	add	r2, r3
 8027acc:	683b      	ldr	r3, [r7, #0]
 8027ace:	601a      	str	r2, [r3, #0]
		multiplier *= 128;
 8027ad0:	697b      	ldr	r3, [r7, #20]
 8027ad2:	01db      	lsls	r3, r3, #7
 8027ad4:	617b      	str	r3, [r7, #20]
	} while ((c & 128) != 0);
 8027ad6:	7afb      	ldrb	r3, [r7, #11]
 8027ad8:	b25b      	sxtb	r3, r3
 8027ada:	2b00      	cmp	r3, #0
 8027adc:	dbd6      	blt.n	8027a8c <MQTTPacket_decode+0x18>
exit:
 8027ade:	e000      	b.n	8027ae2 <MQTTPacket_decode+0x6e>
			goto exit;
 8027ae0:	bf00      	nop
	FUNC_EXIT_RC(len);
	return len;
 8027ae2:	693b      	ldr	r3, [r7, #16]
}
 8027ae4:	4618      	mov	r0, r3
 8027ae6:	3718      	adds	r7, #24
 8027ae8:	46bd      	mov	sp, r7
 8027aea:	bd80      	pop	{r7, pc}

08027aec <MQTTPacket_len>:


int MQTTPacket_len(int rem_len)
{
 8027aec:	b480      	push	{r7}
 8027aee:	b083      	sub	sp, #12
 8027af0:	af00      	add	r7, sp, #0
 8027af2:	6078      	str	r0, [r7, #4]
	rem_len += 1; /* header byte */
 8027af4:	687b      	ldr	r3, [r7, #4]
 8027af6:	3301      	adds	r3, #1
 8027af8:	607b      	str	r3, [r7, #4]

	/* now remaining_length field */
	if (rem_len < 128)
 8027afa:	687b      	ldr	r3, [r7, #4]
 8027afc:	2b7f      	cmp	r3, #127	@ 0x7f
 8027afe:	dc03      	bgt.n	8027b08 <MQTTPacket_len+0x1c>
		rem_len += 1;
 8027b00:	687b      	ldr	r3, [r7, #4]
 8027b02:	3301      	adds	r3, #1
 8027b04:	607b      	str	r3, [r7, #4]
 8027b06:	e012      	b.n	8027b2e <MQTTPacket_len+0x42>
	else if (rem_len < 16384)
 8027b08:	687b      	ldr	r3, [r7, #4]
 8027b0a:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 8027b0e:	da03      	bge.n	8027b18 <MQTTPacket_len+0x2c>
		rem_len += 2;
 8027b10:	687b      	ldr	r3, [r7, #4]
 8027b12:	3302      	adds	r3, #2
 8027b14:	607b      	str	r3, [r7, #4]
 8027b16:	e00a      	b.n	8027b2e <MQTTPacket_len+0x42>
	else if (rem_len < 2097151)
 8027b18:	687b      	ldr	r3, [r7, #4]
 8027b1a:	4a08      	ldr	r2, [pc, #32]	@ (8027b3c <MQTTPacket_len+0x50>)
 8027b1c:	4293      	cmp	r3, r2
 8027b1e:	dc03      	bgt.n	8027b28 <MQTTPacket_len+0x3c>
		rem_len += 3;
 8027b20:	687b      	ldr	r3, [r7, #4]
 8027b22:	3303      	adds	r3, #3
 8027b24:	607b      	str	r3, [r7, #4]
 8027b26:	e002      	b.n	8027b2e <MQTTPacket_len+0x42>
	else
		rem_len += 4;
 8027b28:	687b      	ldr	r3, [r7, #4]
 8027b2a:	3304      	adds	r3, #4
 8027b2c:	607b      	str	r3, [r7, #4]
	return rem_len;
 8027b2e:	687b      	ldr	r3, [r7, #4]
}
 8027b30:	4618      	mov	r0, r3
 8027b32:	370c      	adds	r7, #12
 8027b34:	46bd      	mov	sp, r7
 8027b36:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027b3a:	4770      	bx	lr
 8027b3c:	001ffffe 	.word	0x001ffffe

08027b40 <bufchar>:


static unsigned char* bufptr;

int bufchar(unsigned char* c, int count)
{
 8027b40:	b480      	push	{r7}
 8027b42:	b085      	sub	sp, #20
 8027b44:	af00      	add	r7, sp, #0
 8027b46:	6078      	str	r0, [r7, #4]
 8027b48:	6039      	str	r1, [r7, #0]
	int i;

	for (i = 0; i < count; ++i)
 8027b4a:	2300      	movs	r3, #0
 8027b4c:	60fb      	str	r3, [r7, #12]
 8027b4e:	e00a      	b.n	8027b66 <bufchar+0x26>
		*c = *bufptr++;
 8027b50:	4b0a      	ldr	r3, [pc, #40]	@ (8027b7c <bufchar+0x3c>)
 8027b52:	681b      	ldr	r3, [r3, #0]
 8027b54:	1c5a      	adds	r2, r3, #1
 8027b56:	4909      	ldr	r1, [pc, #36]	@ (8027b7c <bufchar+0x3c>)
 8027b58:	600a      	str	r2, [r1, #0]
 8027b5a:	781a      	ldrb	r2, [r3, #0]
 8027b5c:	687b      	ldr	r3, [r7, #4]
 8027b5e:	701a      	strb	r2, [r3, #0]
	for (i = 0; i < count; ++i)
 8027b60:	68fb      	ldr	r3, [r7, #12]
 8027b62:	3301      	adds	r3, #1
 8027b64:	60fb      	str	r3, [r7, #12]
 8027b66:	68fa      	ldr	r2, [r7, #12]
 8027b68:	683b      	ldr	r3, [r7, #0]
 8027b6a:	429a      	cmp	r2, r3
 8027b6c:	dbf0      	blt.n	8027b50 <bufchar+0x10>
	return count;
 8027b6e:	683b      	ldr	r3, [r7, #0]
}
 8027b70:	4618      	mov	r0, r3
 8027b72:	3714      	adds	r7, #20
 8027b74:	46bd      	mov	sp, r7
 8027b76:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027b7a:	4770      	bx	lr
 8027b7c:	2402b038 	.word	0x2402b038

08027b80 <MQTTPacket_decodeBuf>:


int MQTTPacket_decodeBuf(unsigned char* buf, int* value)
{
 8027b80:	b580      	push	{r7, lr}
 8027b82:	b082      	sub	sp, #8
 8027b84:	af00      	add	r7, sp, #0
 8027b86:	6078      	str	r0, [r7, #4]
 8027b88:	6039      	str	r1, [r7, #0]
	bufptr = buf;
 8027b8a:	4a06      	ldr	r2, [pc, #24]	@ (8027ba4 <MQTTPacket_decodeBuf+0x24>)
 8027b8c:	687b      	ldr	r3, [r7, #4]
 8027b8e:	6013      	str	r3, [r2, #0]
	return MQTTPacket_decode(bufchar, value);
 8027b90:	6839      	ldr	r1, [r7, #0]
 8027b92:	4805      	ldr	r0, [pc, #20]	@ (8027ba8 <MQTTPacket_decodeBuf+0x28>)
 8027b94:	f7ff ff6e 	bl	8027a74 <MQTTPacket_decode>
 8027b98:	4603      	mov	r3, r0
}
 8027b9a:	4618      	mov	r0, r3
 8027b9c:	3708      	adds	r7, #8
 8027b9e:	46bd      	mov	sp, r7
 8027ba0:	bd80      	pop	{r7, pc}
 8027ba2:	bf00      	nop
 8027ba4:	2402b038 	.word	0x2402b038
 8027ba8:	08027b41 	.word	0x08027b41

08027bac <readInt>:
 * Calculates an integer from two bytes read from the input buffer
 * @param pptr pointer to the input buffer - incremented by the number of bytes used & returned
 * @return the integer value calculated
 */
int readInt(unsigned char** pptr)
{
 8027bac:	b480      	push	{r7}
 8027bae:	b085      	sub	sp, #20
 8027bb0:	af00      	add	r7, sp, #0
 8027bb2:	6078      	str	r0, [r7, #4]
	unsigned char* ptr = *pptr;
 8027bb4:	687b      	ldr	r3, [r7, #4]
 8027bb6:	681b      	ldr	r3, [r3, #0]
 8027bb8:	60fb      	str	r3, [r7, #12]
	int len = 256*(*ptr) + (*(ptr+1));
 8027bba:	68fb      	ldr	r3, [r7, #12]
 8027bbc:	781b      	ldrb	r3, [r3, #0]
 8027bbe:	021b      	lsls	r3, r3, #8
 8027bc0:	68fa      	ldr	r2, [r7, #12]
 8027bc2:	3201      	adds	r2, #1
 8027bc4:	7812      	ldrb	r2, [r2, #0]
 8027bc6:	4413      	add	r3, r2
 8027bc8:	60bb      	str	r3, [r7, #8]
	*pptr += 2;
 8027bca:	687b      	ldr	r3, [r7, #4]
 8027bcc:	681b      	ldr	r3, [r3, #0]
 8027bce:	1c9a      	adds	r2, r3, #2
 8027bd0:	687b      	ldr	r3, [r7, #4]
 8027bd2:	601a      	str	r2, [r3, #0]
	return len;
 8027bd4:	68bb      	ldr	r3, [r7, #8]
}
 8027bd6:	4618      	mov	r0, r3
 8027bd8:	3714      	adds	r7, #20
 8027bda:	46bd      	mov	sp, r7
 8027bdc:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027be0:	4770      	bx	lr

08027be2 <readChar>:
 * Reads one character from the input buffer.
 * @param pptr pointer to the input buffer - incremented by the number of bytes used & returned
 * @return the character read
 */
char readChar(unsigned char** pptr)
{
 8027be2:	b480      	push	{r7}
 8027be4:	b085      	sub	sp, #20
 8027be6:	af00      	add	r7, sp, #0
 8027be8:	6078      	str	r0, [r7, #4]
	char c = **pptr;
 8027bea:	687b      	ldr	r3, [r7, #4]
 8027bec:	681b      	ldr	r3, [r3, #0]
 8027bee:	781b      	ldrb	r3, [r3, #0]
 8027bf0:	73fb      	strb	r3, [r7, #15]
	(*pptr)++;
 8027bf2:	687b      	ldr	r3, [r7, #4]
 8027bf4:	681b      	ldr	r3, [r3, #0]
 8027bf6:	1c5a      	adds	r2, r3, #1
 8027bf8:	687b      	ldr	r3, [r7, #4]
 8027bfa:	601a      	str	r2, [r3, #0]
	return c;
 8027bfc:	7bfb      	ldrb	r3, [r7, #15]
}
 8027bfe:	4618      	mov	r0, r3
 8027c00:	3714      	adds	r7, #20
 8027c02:	46bd      	mov	sp, r7
 8027c04:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027c08:	4770      	bx	lr

08027c0a <writeChar>:
 * Writes one character to an output buffer.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param c the character to write
 */
void writeChar(unsigned char** pptr, char c)
{
 8027c0a:	b480      	push	{r7}
 8027c0c:	b083      	sub	sp, #12
 8027c0e:	af00      	add	r7, sp, #0
 8027c10:	6078      	str	r0, [r7, #4]
 8027c12:	460b      	mov	r3, r1
 8027c14:	70fb      	strb	r3, [r7, #3]
	**pptr = c;
 8027c16:	687b      	ldr	r3, [r7, #4]
 8027c18:	681b      	ldr	r3, [r3, #0]
 8027c1a:	78fa      	ldrb	r2, [r7, #3]
 8027c1c:	701a      	strb	r2, [r3, #0]
	(*pptr)++;
 8027c1e:	687b      	ldr	r3, [r7, #4]
 8027c20:	681b      	ldr	r3, [r3, #0]
 8027c22:	1c5a      	adds	r2, r3, #1
 8027c24:	687b      	ldr	r3, [r7, #4]
 8027c26:	601a      	str	r2, [r3, #0]
}
 8027c28:	bf00      	nop
 8027c2a:	370c      	adds	r7, #12
 8027c2c:	46bd      	mov	sp, r7
 8027c2e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027c32:	4770      	bx	lr

08027c34 <writeInt>:
 * Writes an integer as 2 bytes to an output buffer.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param anInt the integer to write
 */
void writeInt(unsigned char** pptr, int anInt)
{
 8027c34:	b480      	push	{r7}
 8027c36:	b083      	sub	sp, #12
 8027c38:	af00      	add	r7, sp, #0
 8027c3a:	6078      	str	r0, [r7, #4]
 8027c3c:	6039      	str	r1, [r7, #0]
	**pptr = (unsigned char)(anInt / 256);
 8027c3e:	683b      	ldr	r3, [r7, #0]
 8027c40:	2b00      	cmp	r3, #0
 8027c42:	da00      	bge.n	8027c46 <writeInt+0x12>
 8027c44:	33ff      	adds	r3, #255	@ 0xff
 8027c46:	121b      	asrs	r3, r3, #8
 8027c48:	461a      	mov	r2, r3
 8027c4a:	687b      	ldr	r3, [r7, #4]
 8027c4c:	681b      	ldr	r3, [r3, #0]
 8027c4e:	b2d2      	uxtb	r2, r2
 8027c50:	701a      	strb	r2, [r3, #0]
	(*pptr)++;
 8027c52:	687b      	ldr	r3, [r7, #4]
 8027c54:	681b      	ldr	r3, [r3, #0]
 8027c56:	1c5a      	adds	r2, r3, #1
 8027c58:	687b      	ldr	r3, [r7, #4]
 8027c5a:	601a      	str	r2, [r3, #0]
	**pptr = (unsigned char)(anInt % 256);
 8027c5c:	683b      	ldr	r3, [r7, #0]
 8027c5e:	425a      	negs	r2, r3
 8027c60:	b2db      	uxtb	r3, r3
 8027c62:	b2d2      	uxtb	r2, r2
 8027c64:	bf58      	it	pl
 8027c66:	4253      	negpl	r3, r2
 8027c68:	687a      	ldr	r2, [r7, #4]
 8027c6a:	6812      	ldr	r2, [r2, #0]
 8027c6c:	b2db      	uxtb	r3, r3
 8027c6e:	7013      	strb	r3, [r2, #0]
	(*pptr)++;
 8027c70:	687b      	ldr	r3, [r7, #4]
 8027c72:	681b      	ldr	r3, [r3, #0]
 8027c74:	1c5a      	adds	r2, r3, #1
 8027c76:	687b      	ldr	r3, [r7, #4]
 8027c78:	601a      	str	r2, [r3, #0]
}
 8027c7a:	bf00      	nop
 8027c7c:	370c      	adds	r7, #12
 8027c7e:	46bd      	mov	sp, r7
 8027c80:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027c84:	4770      	bx	lr

08027c86 <writeCString>:
 * Writes a "UTF" string to an output buffer.  Converts C string to length-delimited.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param string the C string to write
 */
void writeCString(unsigned char** pptr, const char* string)
{
 8027c86:	b580      	push	{r7, lr}
 8027c88:	b084      	sub	sp, #16
 8027c8a:	af00      	add	r7, sp, #0
 8027c8c:	6078      	str	r0, [r7, #4]
 8027c8e:	6039      	str	r1, [r7, #0]
	int len = strlen(string);
 8027c90:	6838      	ldr	r0, [r7, #0]
 8027c92:	f7d8 fb85 	bl	80003a0 <strlen>
 8027c96:	4603      	mov	r3, r0
 8027c98:	60fb      	str	r3, [r7, #12]
	writeInt(pptr, len);
 8027c9a:	68f9      	ldr	r1, [r7, #12]
 8027c9c:	6878      	ldr	r0, [r7, #4]
 8027c9e:	f7ff ffc9 	bl	8027c34 <writeInt>
	memcpy(*pptr, string, len);
 8027ca2:	687b      	ldr	r3, [r7, #4]
 8027ca4:	681b      	ldr	r3, [r3, #0]
 8027ca6:	68fa      	ldr	r2, [r7, #12]
 8027ca8:	6839      	ldr	r1, [r7, #0]
 8027caa:	4618      	mov	r0, r3
 8027cac:	f002 f91f 	bl	8029eee <memcpy>
	*pptr += len;
 8027cb0:	687b      	ldr	r3, [r7, #4]
 8027cb2:	681a      	ldr	r2, [r3, #0]
 8027cb4:	68fb      	ldr	r3, [r7, #12]
 8027cb6:	441a      	add	r2, r3
 8027cb8:	687b      	ldr	r3, [r7, #4]
 8027cba:	601a      	str	r2, [r3, #0]
}
 8027cbc:	bf00      	nop
 8027cbe:	3710      	adds	r7, #16
 8027cc0:	46bd      	mov	sp, r7
 8027cc2:	bd80      	pop	{r7, pc}

08027cc4 <writeMQTTString>:
	return len;
}


void writeMQTTString(unsigned char** pptr, MQTTString mqttstring)
{
 8027cc4:	b580      	push	{r7, lr}
 8027cc6:	b084      	sub	sp, #16
 8027cc8:	af00      	add	r7, sp, #0
 8027cca:	60f8      	str	r0, [r7, #12]
 8027ccc:	4638      	mov	r0, r7
 8027cce:	e880 000e 	stmia.w	r0, {r1, r2, r3}
	if (mqttstring.lenstring.len > 0)
 8027cd2:	687b      	ldr	r3, [r7, #4]
 8027cd4:	2b00      	cmp	r3, #0
 8027cd6:	dd12      	ble.n	8027cfe <writeMQTTString+0x3a>
	{
		writeInt(pptr, mqttstring.lenstring.len);
 8027cd8:	687b      	ldr	r3, [r7, #4]
 8027cda:	4619      	mov	r1, r3
 8027cdc:	68f8      	ldr	r0, [r7, #12]
 8027cde:	f7ff ffa9 	bl	8027c34 <writeInt>
		memcpy(*pptr, mqttstring.lenstring.data, mqttstring.lenstring.len);
 8027ce2:	68fb      	ldr	r3, [r7, #12]
 8027ce4:	681b      	ldr	r3, [r3, #0]
 8027ce6:	68b9      	ldr	r1, [r7, #8]
 8027ce8:	687a      	ldr	r2, [r7, #4]
 8027cea:	4618      	mov	r0, r3
 8027cec:	f002 f8ff 	bl	8029eee <memcpy>
		*pptr += mqttstring.lenstring.len;
 8027cf0:	68fb      	ldr	r3, [r7, #12]
 8027cf2:	681b      	ldr	r3, [r3, #0]
 8027cf4:	687a      	ldr	r2, [r7, #4]
 8027cf6:	441a      	add	r2, r3
 8027cf8:	68fb      	ldr	r3, [r7, #12]
 8027cfa:	601a      	str	r2, [r3, #0]
	}
	else if (mqttstring.cstring)
		writeCString(pptr, mqttstring.cstring);
	else
		writeInt(pptr, 0);
}
 8027cfc:	e00c      	b.n	8027d18 <writeMQTTString+0x54>
	else if (mqttstring.cstring)
 8027cfe:	683b      	ldr	r3, [r7, #0]
 8027d00:	2b00      	cmp	r3, #0
 8027d02:	d005      	beq.n	8027d10 <writeMQTTString+0x4c>
		writeCString(pptr, mqttstring.cstring);
 8027d04:	683b      	ldr	r3, [r7, #0]
 8027d06:	4619      	mov	r1, r3
 8027d08:	68f8      	ldr	r0, [r7, #12]
 8027d0a:	f7ff ffbc 	bl	8027c86 <writeCString>
}
 8027d0e:	e003      	b.n	8027d18 <writeMQTTString+0x54>
		writeInt(pptr, 0);
 8027d10:	2100      	movs	r1, #0
 8027d12:	68f8      	ldr	r0, [r7, #12]
 8027d14:	f7ff ff8e 	bl	8027c34 <writeInt>
}
 8027d18:	bf00      	nop
 8027d1a:	3710      	adds	r7, #16
 8027d1c:	46bd      	mov	sp, r7
 8027d1e:	bd80      	pop	{r7, pc}

08027d20 <readMQTTLenString>:
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param enddata pointer to the end of the data: do not read beyond
 * @return 1 if successful, 0 if not
 */
int readMQTTLenString(MQTTString* mqttstring, unsigned char** pptr, unsigned char* enddata)
{
 8027d20:	b580      	push	{r7, lr}
 8027d22:	b086      	sub	sp, #24
 8027d24:	af00      	add	r7, sp, #0
 8027d26:	60f8      	str	r0, [r7, #12]
 8027d28:	60b9      	str	r1, [r7, #8]
 8027d2a:	607a      	str	r2, [r7, #4]
	int rc = 0;
 8027d2c:	2300      	movs	r3, #0
 8027d2e:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	/* the first two bytes are the length of the string */
	if (enddata - (*pptr) > 1) /* enough length to read the integer? */
 8027d30:	68bb      	ldr	r3, [r7, #8]
 8027d32:	681b      	ldr	r3, [r3, #0]
 8027d34:	687a      	ldr	r2, [r7, #4]
 8027d36:	1ad3      	subs	r3, r2, r3
 8027d38:	2b01      	cmp	r3, #1
 8027d3a:	dd1a      	ble.n	8027d72 <readMQTTLenString+0x52>
	{
		mqttstring->lenstring.len = readInt(pptr); /* increments pptr to point past length */
 8027d3c:	68b8      	ldr	r0, [r7, #8]
 8027d3e:	f7ff ff35 	bl	8027bac <readInt>
 8027d42:	4602      	mov	r2, r0
 8027d44:	68fb      	ldr	r3, [r7, #12]
 8027d46:	605a      	str	r2, [r3, #4]
		if (&(*pptr)[mqttstring->lenstring.len] <= enddata)
 8027d48:	68bb      	ldr	r3, [r7, #8]
 8027d4a:	681b      	ldr	r3, [r3, #0]
 8027d4c:	68fa      	ldr	r2, [r7, #12]
 8027d4e:	6852      	ldr	r2, [r2, #4]
 8027d50:	4413      	add	r3, r2
 8027d52:	687a      	ldr	r2, [r7, #4]
 8027d54:	429a      	cmp	r2, r3
 8027d56:	d30c      	bcc.n	8027d72 <readMQTTLenString+0x52>
		{
			mqttstring->lenstring.data = (char*)*pptr;
 8027d58:	68bb      	ldr	r3, [r7, #8]
 8027d5a:	681a      	ldr	r2, [r3, #0]
 8027d5c:	68fb      	ldr	r3, [r7, #12]
 8027d5e:	609a      	str	r2, [r3, #8]
			*pptr += mqttstring->lenstring.len;
 8027d60:	68bb      	ldr	r3, [r7, #8]
 8027d62:	681b      	ldr	r3, [r3, #0]
 8027d64:	68fa      	ldr	r2, [r7, #12]
 8027d66:	6852      	ldr	r2, [r2, #4]
 8027d68:	441a      	add	r2, r3
 8027d6a:	68bb      	ldr	r3, [r7, #8]
 8027d6c:	601a      	str	r2, [r3, #0]
			rc = 1;
 8027d6e:	2301      	movs	r3, #1
 8027d70:	617b      	str	r3, [r7, #20]
		}
	}
	mqttstring->cstring = NULL;
 8027d72:	68fb      	ldr	r3, [r7, #12]
 8027d74:	2200      	movs	r2, #0
 8027d76:	601a      	str	r2, [r3, #0]
	FUNC_EXIT_RC(rc);
	return rc;
 8027d78:	697b      	ldr	r3, [r7, #20]
}
 8027d7a:	4618      	mov	r0, r3
 8027d7c:	3718      	adds	r7, #24
 8027d7e:	46bd      	mov	sp, r7
 8027d80:	bd80      	pop	{r7, pc}

08027d82 <MQTTstrlen>:
 * Return the length of the MQTTstring - C string if there is one, otherwise the length delimited string
 * @param mqttstring the string to return the length of
 * @return the length of the string
 */
int MQTTstrlen(MQTTString mqttstring)
{
 8027d82:	b580      	push	{r7, lr}
 8027d84:	b086      	sub	sp, #24
 8027d86:	af00      	add	r7, sp, #0
 8027d88:	1d3b      	adds	r3, r7, #4
 8027d8a:	e883 0007 	stmia.w	r3, {r0, r1, r2}
	int rc = 0;
 8027d8e:	2300      	movs	r3, #0
 8027d90:	617b      	str	r3, [r7, #20]

	if (mqttstring.cstring)
 8027d92:	687b      	ldr	r3, [r7, #4]
 8027d94:	2b00      	cmp	r3, #0
 8027d96:	d006      	beq.n	8027da6 <MQTTstrlen+0x24>
		rc = strlen(mqttstring.cstring);
 8027d98:	687b      	ldr	r3, [r7, #4]
 8027d9a:	4618      	mov	r0, r3
 8027d9c:	f7d8 fb00 	bl	80003a0 <strlen>
 8027da0:	4603      	mov	r3, r0
 8027da2:	617b      	str	r3, [r7, #20]
 8027da4:	e001      	b.n	8027daa <MQTTstrlen+0x28>
	else
		rc = mqttstring.lenstring.len;
 8027da6:	68bb      	ldr	r3, [r7, #8]
 8027da8:	617b      	str	r3, [r7, #20]
	return rc;
 8027daa:	697b      	ldr	r3, [r7, #20]
}
 8027dac:	4618      	mov	r0, r3
 8027dae:	3718      	adds	r7, #24
 8027db0:	46bd      	mov	sp, r7
 8027db2:	bd80      	pop	{r7, pc}

08027db4 <MQTTPacket_equals>:
 * @param a the MQTTString to compare
 * @param bptr the C string to compare
 * @return boolean - equal or not
 */
int MQTTPacket_equals(MQTTString* a, char* bptr)
{
 8027db4:	b580      	push	{r7, lr}
 8027db6:	b086      	sub	sp, #24
 8027db8:	af00      	add	r7, sp, #0
 8027dba:	6078      	str	r0, [r7, #4]
 8027dbc:	6039      	str	r1, [r7, #0]
	int alen = 0,
 8027dbe:	2300      	movs	r3, #0
 8027dc0:	617b      	str	r3, [r7, #20]
		blen = 0;
 8027dc2:	2300      	movs	r3, #0
 8027dc4:	60fb      	str	r3, [r7, #12]
	char *aptr;
	
	if (a->cstring)
 8027dc6:	687b      	ldr	r3, [r7, #4]
 8027dc8:	681b      	ldr	r3, [r3, #0]
 8027dca:	2b00      	cmp	r3, #0
 8027dcc:	d00a      	beq.n	8027de4 <MQTTPacket_equals+0x30>
	{
		aptr = a->cstring;
 8027dce:	687b      	ldr	r3, [r7, #4]
 8027dd0:	681b      	ldr	r3, [r3, #0]
 8027dd2:	613b      	str	r3, [r7, #16]
		alen = strlen(a->cstring);
 8027dd4:	687b      	ldr	r3, [r7, #4]
 8027dd6:	681b      	ldr	r3, [r3, #0]
 8027dd8:	4618      	mov	r0, r3
 8027dda:	f7d8 fae1 	bl	80003a0 <strlen>
 8027dde:	4603      	mov	r3, r0
 8027de0:	617b      	str	r3, [r7, #20]
 8027de2:	e005      	b.n	8027df0 <MQTTPacket_equals+0x3c>
	}
	else
	{
		aptr = a->lenstring.data;
 8027de4:	687b      	ldr	r3, [r7, #4]
 8027de6:	689b      	ldr	r3, [r3, #8]
 8027de8:	613b      	str	r3, [r7, #16]
		alen = a->lenstring.len;
 8027dea:	687b      	ldr	r3, [r7, #4]
 8027dec:	685b      	ldr	r3, [r3, #4]
 8027dee:	617b      	str	r3, [r7, #20]
	}
	blen = strlen(bptr);
 8027df0:	6838      	ldr	r0, [r7, #0]
 8027df2:	f7d8 fad5 	bl	80003a0 <strlen>
 8027df6:	4603      	mov	r3, r0
 8027df8:	60fb      	str	r3, [r7, #12]
	
	return (alen == blen) && (strncmp(aptr, bptr, alen) == 0);
 8027dfa:	697a      	ldr	r2, [r7, #20]
 8027dfc:	68fb      	ldr	r3, [r7, #12]
 8027dfe:	429a      	cmp	r2, r3
 8027e00:	d10a      	bne.n	8027e18 <MQTTPacket_equals+0x64>
 8027e02:	697b      	ldr	r3, [r7, #20]
 8027e04:	461a      	mov	r2, r3
 8027e06:	6839      	ldr	r1, [r7, #0]
 8027e08:	6938      	ldr	r0, [r7, #16]
 8027e0a:	f001 ff81 	bl	8029d10 <strncmp>
 8027e0e:	4603      	mov	r3, r0
 8027e10:	2b00      	cmp	r3, #0
 8027e12:	d101      	bne.n	8027e18 <MQTTPacket_equals+0x64>
 8027e14:	2301      	movs	r3, #1
 8027e16:	e000      	b.n	8027e1a <MQTTPacket_equals+0x66>
 8027e18:	2300      	movs	r3, #0
}
 8027e1a:	4618      	mov	r0, r3
 8027e1c:	3718      	adds	r7, #24
 8027e1e:	46bd      	mov	sp, r7
 8027e20:	bd80      	pop	{r7, pc}

08027e22 <MQTTSerialize_publishLength>:
  * @param topicName the topic name to be used in the publish  
  * @param payloadlen the length of the payload to be sent
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_publishLength(int qos, MQTTString topicName, int payloadlen)
{
 8027e22:	b580      	push	{r7, lr}
 8027e24:	b086      	sub	sp, #24
 8027e26:	af00      	add	r7, sp, #0
 8027e28:	60f8      	str	r0, [r7, #12]
 8027e2a:	4638      	mov	r0, r7
 8027e2c:	e880 000e 	stmia.w	r0, {r1, r2, r3}
	int len = 0;
 8027e30:	2300      	movs	r3, #0
 8027e32:	617b      	str	r3, [r7, #20]

	len += 2 + MQTTstrlen(topicName) + payloadlen;
 8027e34:	463b      	mov	r3, r7
 8027e36:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027e3a:	f7ff ffa2 	bl	8027d82 <MQTTstrlen>
 8027e3e:	4603      	mov	r3, r0
 8027e40:	1c9a      	adds	r2, r3, #2
 8027e42:	6a3b      	ldr	r3, [r7, #32]
 8027e44:	4413      	add	r3, r2
 8027e46:	697a      	ldr	r2, [r7, #20]
 8027e48:	4413      	add	r3, r2
 8027e4a:	617b      	str	r3, [r7, #20]
	if (qos > 0)
 8027e4c:	68fb      	ldr	r3, [r7, #12]
 8027e4e:	2b00      	cmp	r3, #0
 8027e50:	dd02      	ble.n	8027e58 <MQTTSerialize_publishLength+0x36>
		len += 2; /* packetid */
 8027e52:	697b      	ldr	r3, [r7, #20]
 8027e54:	3302      	adds	r3, #2
 8027e56:	617b      	str	r3, [r7, #20]
	return len;
 8027e58:	697b      	ldr	r3, [r7, #20]
}
 8027e5a:	4618      	mov	r0, r3
 8027e5c:	3718      	adds	r7, #24
 8027e5e:	46bd      	mov	sp, r7
 8027e60:	bd80      	pop	{r7, pc}

08027e62 <MQTTSerialize_publish>:
  * @param payloadlen integer - the length of the MQTT payload
  * @return the length of the serialized data.  <= 0 indicates error
  */
int MQTTSerialize_publish(unsigned char* buf, int buflen, unsigned char dup, int qos, unsigned char retained, unsigned short packetid,
		MQTTString topicName, unsigned char* payload, int payloadlen)
{
 8027e62:	b580      	push	{r7, lr}
 8027e64:	b08a      	sub	sp, #40	@ 0x28
 8027e66:	af02      	add	r7, sp, #8
 8027e68:	60f8      	str	r0, [r7, #12]
 8027e6a:	60b9      	str	r1, [r7, #8]
 8027e6c:	603b      	str	r3, [r7, #0]
 8027e6e:	4613      	mov	r3, r2
 8027e70:	71fb      	strb	r3, [r7, #7]
	unsigned char *ptr = buf;
 8027e72:	68fb      	ldr	r3, [r7, #12]
 8027e74:	617b      	str	r3, [r7, #20]
	MQTTHeader header = {0};
 8027e76:	2300      	movs	r3, #0
 8027e78:	613b      	str	r3, [r7, #16]
	int rem_len = 0;
 8027e7a:	2300      	movs	r3, #0
 8027e7c:	61bb      	str	r3, [r7, #24]
	int rc = 0;
 8027e7e:	2300      	movs	r3, #0
 8027e80:	61fb      	str	r3, [r7, #28]

	FUNC_ENTRY;
	if (MQTTPacket_len(rem_len = MQTTSerialize_publishLength(qos, topicName, payloadlen)) > buflen)
 8027e82:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8027e84:	9300      	str	r3, [sp, #0]
 8027e86:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8027e8a:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027e8c:	6838      	ldr	r0, [r7, #0]
 8027e8e:	f7ff ffc8 	bl	8027e22 <MQTTSerialize_publishLength>
 8027e92:	61b8      	str	r0, [r7, #24]
 8027e94:	69b8      	ldr	r0, [r7, #24]
 8027e96:	f7ff fe29 	bl	8027aec <MQTTPacket_len>
 8027e9a:	4602      	mov	r2, r0
 8027e9c:	68bb      	ldr	r3, [r7, #8]
 8027e9e:	4293      	cmp	r3, r2
 8027ea0:	da03      	bge.n	8027eaa <MQTTSerialize_publish+0x48>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8027ea2:	f06f 0301 	mvn.w	r3, #1
 8027ea6:	61fb      	str	r3, [r7, #28]
		goto exit;
 8027ea8:	e04c      	b.n	8027f44 <MQTTSerialize_publish+0xe2>
	}

	header.bits.type = PUBLISH;
 8027eaa:	7c3b      	ldrb	r3, [r7, #16]
 8027eac:	2203      	movs	r2, #3
 8027eae:	f362 1307 	bfi	r3, r2, #4, #4
 8027eb2:	743b      	strb	r3, [r7, #16]
	header.bits.dup = dup;
 8027eb4:	79fb      	ldrb	r3, [r7, #7]
 8027eb6:	f003 0301 	and.w	r3, r3, #1
 8027eba:	b2da      	uxtb	r2, r3
 8027ebc:	7c3b      	ldrb	r3, [r7, #16]
 8027ebe:	f362 03c3 	bfi	r3, r2, #3, #1
 8027ec2:	743b      	strb	r3, [r7, #16]
	header.bits.qos = qos;
 8027ec4:	683b      	ldr	r3, [r7, #0]
 8027ec6:	f003 0303 	and.w	r3, r3, #3
 8027eca:	b2da      	uxtb	r2, r3
 8027ecc:	7c3b      	ldrb	r3, [r7, #16]
 8027ece:	f362 0342 	bfi	r3, r2, #1, #2
 8027ed2:	743b      	strb	r3, [r7, #16]
	header.bits.retain = retained;
 8027ed4:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 8027ed8:	f003 0301 	and.w	r3, r3, #1
 8027edc:	b2da      	uxtb	r2, r3
 8027ede:	7c3b      	ldrb	r3, [r7, #16]
 8027ee0:	f362 0300 	bfi	r3, r2, #0, #1
 8027ee4:	743b      	strb	r3, [r7, #16]
	writeChar(&ptr, header.byte); /* write header */
 8027ee6:	7c3a      	ldrb	r2, [r7, #16]
 8027ee8:	f107 0314 	add.w	r3, r7, #20
 8027eec:	4611      	mov	r1, r2
 8027eee:	4618      	mov	r0, r3
 8027ef0:	f7ff fe8b 	bl	8027c0a <writeChar>

	ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */;
 8027ef4:	697b      	ldr	r3, [r7, #20]
 8027ef6:	69b9      	ldr	r1, [r7, #24]
 8027ef8:	4618      	mov	r0, r3
 8027efa:	f7ff fd8c 	bl	8027a16 <MQTTPacket_encode>
 8027efe:	4602      	mov	r2, r0
 8027f00:	697b      	ldr	r3, [r7, #20]
 8027f02:	4413      	add	r3, r2
 8027f04:	617b      	str	r3, [r7, #20]

	writeMQTTString(&ptr, topicName);
 8027f06:	f107 0014 	add.w	r0, r7, #20
 8027f0a:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8027f0e:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027f10:	f7ff fed8 	bl	8027cc4 <writeMQTTString>

	if (qos > 0)
 8027f14:	683b      	ldr	r3, [r7, #0]
 8027f16:	2b00      	cmp	r3, #0
 8027f18:	dd06      	ble.n	8027f28 <MQTTSerialize_publish+0xc6>
		writeInt(&ptr, packetid);
 8027f1a:	8dba      	ldrh	r2, [r7, #44]	@ 0x2c
 8027f1c:	f107 0314 	add.w	r3, r7, #20
 8027f20:	4611      	mov	r1, r2
 8027f22:	4618      	mov	r0, r3
 8027f24:	f7ff fe86 	bl	8027c34 <writeInt>

	memcpy(ptr, payload, payloadlen);
 8027f28:	697b      	ldr	r3, [r7, #20]
 8027f2a:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8027f2c:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 8027f2e:	4618      	mov	r0, r3
 8027f30:	f001 ffdd 	bl	8029eee <memcpy>
	ptr += payloadlen;
 8027f34:	697a      	ldr	r2, [r7, #20]
 8027f36:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8027f38:	4413      	add	r3, r2
 8027f3a:	617b      	str	r3, [r7, #20]

	rc = ptr - buf;
 8027f3c:	697a      	ldr	r2, [r7, #20]
 8027f3e:	68fb      	ldr	r3, [r7, #12]
 8027f40:	1ad3      	subs	r3, r2, r3
 8027f42:	61fb      	str	r3, [r7, #28]

exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8027f44:	69fb      	ldr	r3, [r7, #28]
}
 8027f46:	4618      	mov	r0, r3
 8027f48:	3720      	adds	r7, #32
 8027f4a:	46bd      	mov	sp, r7
 8027f4c:	bd80      	pop	{r7, pc}

08027f4e <MQTTSerialize_ack>:
  * @param dup the MQTT dup flag
  * @param packetid the MQTT packet identifier
  * @return serialized length, or error if 0
  */
int MQTTSerialize_ack(unsigned char* buf, int buflen, unsigned char packettype, unsigned char dup, unsigned short packetid)
{
 8027f4e:	b580      	push	{r7, lr}
 8027f50:	b088      	sub	sp, #32
 8027f52:	af00      	add	r7, sp, #0
 8027f54:	60f8      	str	r0, [r7, #12]
 8027f56:	60b9      	str	r1, [r7, #8]
 8027f58:	4611      	mov	r1, r2
 8027f5a:	461a      	mov	r2, r3
 8027f5c:	460b      	mov	r3, r1
 8027f5e:	71fb      	strb	r3, [r7, #7]
 8027f60:	4613      	mov	r3, r2
 8027f62:	71bb      	strb	r3, [r7, #6]
	MQTTHeader header = {0};
 8027f64:	2300      	movs	r3, #0
 8027f66:	61bb      	str	r3, [r7, #24]
	int rc = 0;
 8027f68:	2300      	movs	r3, #0
 8027f6a:	61fb      	str	r3, [r7, #28]
	unsigned char *ptr = buf;
 8027f6c:	68fb      	ldr	r3, [r7, #12]
 8027f6e:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	if (buflen < 4)
 8027f70:	68bb      	ldr	r3, [r7, #8]
 8027f72:	2b03      	cmp	r3, #3
 8027f74:	dc03      	bgt.n	8027f7e <MQTTSerialize_ack+0x30>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8027f76:	f06f 0301 	mvn.w	r3, #1
 8027f7a:	61fb      	str	r3, [r7, #28]
		goto exit;
 8027f7c:	e037      	b.n	8027fee <MQTTSerialize_ack+0xa0>
	}
	header.bits.type = packettype;
 8027f7e:	79fb      	ldrb	r3, [r7, #7]
 8027f80:	f003 030f 	and.w	r3, r3, #15
 8027f84:	b2da      	uxtb	r2, r3
 8027f86:	7e3b      	ldrb	r3, [r7, #24]
 8027f88:	f362 1307 	bfi	r3, r2, #4, #4
 8027f8c:	763b      	strb	r3, [r7, #24]
	header.bits.dup = dup;
 8027f8e:	79bb      	ldrb	r3, [r7, #6]
 8027f90:	f003 0301 	and.w	r3, r3, #1
 8027f94:	b2da      	uxtb	r2, r3
 8027f96:	7e3b      	ldrb	r3, [r7, #24]
 8027f98:	f362 03c3 	bfi	r3, r2, #3, #1
 8027f9c:	763b      	strb	r3, [r7, #24]
	header.bits.qos = (packettype == PUBREL) ? 1 : 0;
 8027f9e:	79fb      	ldrb	r3, [r7, #7]
 8027fa0:	2b06      	cmp	r3, #6
 8027fa2:	bf0c      	ite	eq
 8027fa4:	2301      	moveq	r3, #1
 8027fa6:	2300      	movne	r3, #0
 8027fa8:	b2db      	uxtb	r3, r3
 8027faa:	f003 0303 	and.w	r3, r3, #3
 8027fae:	b2da      	uxtb	r2, r3
 8027fb0:	7e3b      	ldrb	r3, [r7, #24]
 8027fb2:	f362 0342 	bfi	r3, r2, #1, #2
 8027fb6:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 8027fb8:	7e3a      	ldrb	r2, [r7, #24]
 8027fba:	f107 0314 	add.w	r3, r7, #20
 8027fbe:	4611      	mov	r1, r2
 8027fc0:	4618      	mov	r0, r3
 8027fc2:	f7ff fe22 	bl	8027c0a <writeChar>

	ptr += MQTTPacket_encode(ptr, 2); /* write remaining length */
 8027fc6:	697b      	ldr	r3, [r7, #20]
 8027fc8:	2102      	movs	r1, #2
 8027fca:	4618      	mov	r0, r3
 8027fcc:	f7ff fd23 	bl	8027a16 <MQTTPacket_encode>
 8027fd0:	4602      	mov	r2, r0
 8027fd2:	697b      	ldr	r3, [r7, #20]
 8027fd4:	4413      	add	r3, r2
 8027fd6:	617b      	str	r3, [r7, #20]
	writeInt(&ptr, packetid);
 8027fd8:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 8027fda:	f107 0314 	add.w	r3, r7, #20
 8027fde:	4611      	mov	r1, r2
 8027fe0:	4618      	mov	r0, r3
 8027fe2:	f7ff fe27 	bl	8027c34 <writeInt>
	rc = ptr - buf;
 8027fe6:	697a      	ldr	r2, [r7, #20]
 8027fe8:	68fb      	ldr	r3, [r7, #12]
 8027fea:	1ad3      	subs	r3, r2, r3
 8027fec:	61fb      	str	r3, [r7, #28]
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8027fee:	69fb      	ldr	r3, [r7, #28]
}
 8027ff0:	4618      	mov	r0, r3
 8027ff2:	3720      	adds	r7, #32
 8027ff4:	46bd      	mov	sp, r7
 8027ff6:	bd80      	pop	{r7, pc}

08027ff8 <MQTTSerialize_subscribeLength>:
  * @param count the number of topic filter strings in topicFilters
  * @param topicFilters the array of topic filter strings to be used in the publish
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_subscribeLength(int count, MQTTString topicFilters[])
{
 8027ff8:	b580      	push	{r7, lr}
 8027ffa:	b084      	sub	sp, #16
 8027ffc:	af00      	add	r7, sp, #0
 8027ffe:	6078      	str	r0, [r7, #4]
 8028000:	6039      	str	r1, [r7, #0]
	int i;
	int len = 2; /* packetid */
 8028002:	2302      	movs	r3, #2
 8028004:	60bb      	str	r3, [r7, #8]

	for (i = 0; i < count; ++i)
 8028006:	2300      	movs	r3, #0
 8028008:	60fb      	str	r3, [r7, #12]
 802800a:	e013      	b.n	8028034 <MQTTSerialize_subscribeLength+0x3c>
		len += 2 + MQTTstrlen(topicFilters[i]) + 1; /* length + topic + req_qos */
 802800c:	68fa      	ldr	r2, [r7, #12]
 802800e:	4613      	mov	r3, r2
 8028010:	005b      	lsls	r3, r3, #1
 8028012:	4413      	add	r3, r2
 8028014:	009b      	lsls	r3, r3, #2
 8028016:	461a      	mov	r2, r3
 8028018:	683b      	ldr	r3, [r7, #0]
 802801a:	4413      	add	r3, r2
 802801c:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8028020:	f7ff feaf 	bl	8027d82 <MQTTstrlen>
 8028024:	4603      	mov	r3, r0
 8028026:	3303      	adds	r3, #3
 8028028:	68ba      	ldr	r2, [r7, #8]
 802802a:	4413      	add	r3, r2
 802802c:	60bb      	str	r3, [r7, #8]
	for (i = 0; i < count; ++i)
 802802e:	68fb      	ldr	r3, [r7, #12]
 8028030:	3301      	adds	r3, #1
 8028032:	60fb      	str	r3, [r7, #12]
 8028034:	68fa      	ldr	r2, [r7, #12]
 8028036:	687b      	ldr	r3, [r7, #4]
 8028038:	429a      	cmp	r2, r3
 802803a:	dbe7      	blt.n	802800c <MQTTSerialize_subscribeLength+0x14>
	return len;
 802803c:	68bb      	ldr	r3, [r7, #8]
}
 802803e:	4618      	mov	r0, r3
 8028040:	3710      	adds	r7, #16
 8028042:	46bd      	mov	sp, r7
 8028044:	bd80      	pop	{r7, pc}

08028046 <MQTTSerialize_subscribe>:
  * @param requestedQoSs - array of requested QoS
  * @return the length of the serialized data.  <= 0 indicates error
  */
int MQTTSerialize_subscribe(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid, int count,
		MQTTString topicFilters[], int requestedQoSs[])
{
 8028046:	b580      	push	{r7, lr}
 8028048:	b08a      	sub	sp, #40	@ 0x28
 802804a:	af00      	add	r7, sp, #0
 802804c:	60f8      	str	r0, [r7, #12]
 802804e:	60b9      	str	r1, [r7, #8]
 8028050:	4611      	mov	r1, r2
 8028052:	461a      	mov	r2, r3
 8028054:	460b      	mov	r3, r1
 8028056:	71fb      	strb	r3, [r7, #7]
 8028058:	4613      	mov	r3, r2
 802805a:	80bb      	strh	r3, [r7, #4]
	unsigned char *ptr = buf;
 802805c:	68fb      	ldr	r3, [r7, #12]
 802805e:	61bb      	str	r3, [r7, #24]
	MQTTHeader header = {0};
 8028060:	2300      	movs	r3, #0
 8028062:	617b      	str	r3, [r7, #20]
	int rem_len = 0;
 8028064:	2300      	movs	r3, #0
 8028066:	61fb      	str	r3, [r7, #28]
	int rc = 0;
 8028068:	2300      	movs	r3, #0
 802806a:	627b      	str	r3, [r7, #36]	@ 0x24
	int i = 0;
 802806c:	2300      	movs	r3, #0
 802806e:	623b      	str	r3, [r7, #32]

	FUNC_ENTRY;
	if (MQTTPacket_len(rem_len = MQTTSerialize_subscribeLength(count, topicFilters)) > buflen)
 8028070:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8028072:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8028074:	f7ff ffc0 	bl	8027ff8 <MQTTSerialize_subscribeLength>
 8028078:	61f8      	str	r0, [r7, #28]
 802807a:	69f8      	ldr	r0, [r7, #28]
 802807c:	f7ff fd36 	bl	8027aec <MQTTPacket_len>
 8028080:	4602      	mov	r2, r0
 8028082:	68bb      	ldr	r3, [r7, #8]
 8028084:	4293      	cmp	r3, r2
 8028086:	da03      	bge.n	8028090 <MQTTSerialize_subscribe+0x4a>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8028088:	f06f 0301 	mvn.w	r3, #1
 802808c:	627b      	str	r3, [r7, #36]	@ 0x24
		goto exit;
 802808e:	e051      	b.n	8028134 <MQTTSerialize_subscribe+0xee>
	}

	header.byte = 0;
 8028090:	2300      	movs	r3, #0
 8028092:	753b      	strb	r3, [r7, #20]
	header.bits.type = SUBSCRIBE;
 8028094:	7d3b      	ldrb	r3, [r7, #20]
 8028096:	2208      	movs	r2, #8
 8028098:	f362 1307 	bfi	r3, r2, #4, #4
 802809c:	753b      	strb	r3, [r7, #20]
	header.bits.dup = dup;
 802809e:	79fb      	ldrb	r3, [r7, #7]
 80280a0:	f003 0301 	and.w	r3, r3, #1
 80280a4:	b2da      	uxtb	r2, r3
 80280a6:	7d3b      	ldrb	r3, [r7, #20]
 80280a8:	f362 03c3 	bfi	r3, r2, #3, #1
 80280ac:	753b      	strb	r3, [r7, #20]
	header.bits.qos = 1;
 80280ae:	7d3b      	ldrb	r3, [r7, #20]
 80280b0:	2201      	movs	r2, #1
 80280b2:	f362 0342 	bfi	r3, r2, #1, #2
 80280b6:	753b      	strb	r3, [r7, #20]
	writeChar(&ptr, header.byte); /* write header */
 80280b8:	7d3a      	ldrb	r2, [r7, #20]
 80280ba:	f107 0318 	add.w	r3, r7, #24
 80280be:	4611      	mov	r1, r2
 80280c0:	4618      	mov	r0, r3
 80280c2:	f7ff fda2 	bl	8027c0a <writeChar>

	ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */;
 80280c6:	69bb      	ldr	r3, [r7, #24]
 80280c8:	69f9      	ldr	r1, [r7, #28]
 80280ca:	4618      	mov	r0, r3
 80280cc:	f7ff fca3 	bl	8027a16 <MQTTPacket_encode>
 80280d0:	4602      	mov	r2, r0
 80280d2:	69bb      	ldr	r3, [r7, #24]
 80280d4:	4413      	add	r3, r2
 80280d6:	61bb      	str	r3, [r7, #24]

	writeInt(&ptr, packetid);
 80280d8:	88ba      	ldrh	r2, [r7, #4]
 80280da:	f107 0318 	add.w	r3, r7, #24
 80280de:	4611      	mov	r1, r2
 80280e0:	4618      	mov	r0, r3
 80280e2:	f7ff fda7 	bl	8027c34 <writeInt>

	for (i = 0; i < count; ++i)
 80280e6:	2300      	movs	r3, #0
 80280e8:	623b      	str	r3, [r7, #32]
 80280ea:	e01b      	b.n	8028124 <MQTTSerialize_subscribe+0xde>
	{
		writeMQTTString(&ptr, topicFilters[i]);
 80280ec:	6a3a      	ldr	r2, [r7, #32]
 80280ee:	4613      	mov	r3, r2
 80280f0:	005b      	lsls	r3, r3, #1
 80280f2:	4413      	add	r3, r2
 80280f4:	009b      	lsls	r3, r3, #2
 80280f6:	461a      	mov	r2, r3
 80280f8:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80280fa:	4413      	add	r3, r2
 80280fc:	f107 0018 	add.w	r0, r7, #24
 8028100:	cb0e      	ldmia	r3, {r1, r2, r3}
 8028102:	f7ff fddf 	bl	8027cc4 <writeMQTTString>
		writeChar(&ptr, requestedQoSs[i]);
 8028106:	6a3b      	ldr	r3, [r7, #32]
 8028108:	009b      	lsls	r3, r3, #2
 802810a:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 802810c:	4413      	add	r3, r2
 802810e:	681b      	ldr	r3, [r3, #0]
 8028110:	b2da      	uxtb	r2, r3
 8028112:	f107 0318 	add.w	r3, r7, #24
 8028116:	4611      	mov	r1, r2
 8028118:	4618      	mov	r0, r3
 802811a:	f7ff fd76 	bl	8027c0a <writeChar>
	for (i = 0; i < count; ++i)
 802811e:	6a3b      	ldr	r3, [r7, #32]
 8028120:	3301      	adds	r3, #1
 8028122:	623b      	str	r3, [r7, #32]
 8028124:	6a3a      	ldr	r2, [r7, #32]
 8028126:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8028128:	429a      	cmp	r2, r3
 802812a:	dbdf      	blt.n	80280ec <MQTTSerialize_subscribe+0xa6>
	}

	rc = ptr - buf;
 802812c:	69ba      	ldr	r2, [r7, #24]
 802812e:	68fb      	ldr	r3, [r7, #12]
 8028130:	1ad3      	subs	r3, r2, r3
 8028132:	627b      	str	r3, [r7, #36]	@ 0x24
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8028134:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8028136:	4618      	mov	r0, r3
 8028138:	3728      	adds	r7, #40	@ 0x28
 802813a:	46bd      	mov	sp, r7
 802813c:	bd80      	pop	{r7, pc}

0802813e <MQTTDeserialize_suback>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_suback(unsigned short* packetid, int maxcount, int* count, int grantedQoSs[], unsigned char* buf, int buflen)
{
 802813e:	b580      	push	{r7, lr}
 8028140:	b08a      	sub	sp, #40	@ 0x28
 8028142:	af00      	add	r7, sp, #0
 8028144:	60f8      	str	r0, [r7, #12]
 8028146:	60b9      	str	r1, [r7, #8]
 8028148:	607a      	str	r2, [r7, #4]
 802814a:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 802814c:	2300      	movs	r3, #0
 802814e:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 8028150:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8028152:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 8028154:	2300      	movs	r3, #0
 8028156:	623b      	str	r3, [r7, #32]
	int rc = 0;
 8028158:	2300      	movs	r3, #0
 802815a:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 802815c:	f107 0318 	add.w	r3, r7, #24
 8028160:	4618      	mov	r0, r3
 8028162:	f7ff fd3e 	bl	8027be2 <readChar>
 8028166:	4603      	mov	r3, r0
 8028168:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != SUBACK)
 802816a:	7f3b      	ldrb	r3, [r7, #28]
 802816c:	f023 030f 	bic.w	r3, r3, #15
 8028170:	b2db      	uxtb	r3, r3
 8028172:	2b90      	cmp	r3, #144	@ 0x90
 8028174:	d142      	bne.n	80281fc <MQTTDeserialize_suback+0xbe>
		goto exit;

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 8028176:	69bb      	ldr	r3, [r7, #24]
 8028178:	f107 0214 	add.w	r2, r7, #20
 802817c:	4611      	mov	r1, r2
 802817e:	4618      	mov	r0, r3
 8028180:	f7ff fcfe 	bl	8027b80 <MQTTPacket_decodeBuf>
 8028184:	6278      	str	r0, [r7, #36]	@ 0x24
 8028186:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8028188:	69bb      	ldr	r3, [r7, #24]
 802818a:	4413      	add	r3, r2
 802818c:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 802818e:	69bb      	ldr	r3, [r7, #24]
 8028190:	697a      	ldr	r2, [r7, #20]
 8028192:	4413      	add	r3, r2
 8028194:	623b      	str	r3, [r7, #32]
	if (enddata - curdata < 2)
 8028196:	69bb      	ldr	r3, [r7, #24]
 8028198:	6a3a      	ldr	r2, [r7, #32]
 802819a:	1ad3      	subs	r3, r2, r3
 802819c:	2b01      	cmp	r3, #1
 802819e:	dd2f      	ble.n	8028200 <MQTTDeserialize_suback+0xc2>
		goto exit;

	*packetid = readInt(&curdata);
 80281a0:	f107 0318 	add.w	r3, r7, #24
 80281a4:	4618      	mov	r0, r3
 80281a6:	f7ff fd01 	bl	8027bac <readInt>
 80281aa:	4603      	mov	r3, r0
 80281ac:	b29a      	uxth	r2, r3
 80281ae:	68fb      	ldr	r3, [r7, #12]
 80281b0:	801a      	strh	r2, [r3, #0]

	*count = 0;
 80281b2:	687b      	ldr	r3, [r7, #4]
 80281b4:	2200      	movs	r2, #0
 80281b6:	601a      	str	r2, [r3, #0]
	while (curdata < enddata)
 80281b8:	e019      	b.n	80281ee <MQTTDeserialize_suback+0xb0>
	{
		if (*count > maxcount)
 80281ba:	687b      	ldr	r3, [r7, #4]
 80281bc:	681b      	ldr	r3, [r3, #0]
 80281be:	68ba      	ldr	r2, [r7, #8]
 80281c0:	429a      	cmp	r2, r3
 80281c2:	da03      	bge.n	80281cc <MQTTDeserialize_suback+0x8e>
		{
			rc = -1;
 80281c4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80281c8:	627b      	str	r3, [r7, #36]	@ 0x24
			goto exit;
 80281ca:	e01a      	b.n	8028202 <MQTTDeserialize_suback+0xc4>
		}
		grantedQoSs[(*count)++] = readChar(&curdata);
 80281cc:	f107 0318 	add.w	r3, r7, #24
 80281d0:	4618      	mov	r0, r3
 80281d2:	f7ff fd06 	bl	8027be2 <readChar>
 80281d6:	4603      	mov	r3, r0
 80281d8:	4618      	mov	r0, r3
 80281da:	687b      	ldr	r3, [r7, #4]
 80281dc:	681b      	ldr	r3, [r3, #0]
 80281de:	1c59      	adds	r1, r3, #1
 80281e0:	687a      	ldr	r2, [r7, #4]
 80281e2:	6011      	str	r1, [r2, #0]
 80281e4:	009b      	lsls	r3, r3, #2
 80281e6:	683a      	ldr	r2, [r7, #0]
 80281e8:	4413      	add	r3, r2
 80281ea:	4602      	mov	r2, r0
 80281ec:	601a      	str	r2, [r3, #0]
	while (curdata < enddata)
 80281ee:	69bb      	ldr	r3, [r7, #24]
 80281f0:	6a3a      	ldr	r2, [r7, #32]
 80281f2:	429a      	cmp	r2, r3
 80281f4:	d8e1      	bhi.n	80281ba <MQTTDeserialize_suback+0x7c>
	}

	rc = 1;
 80281f6:	2301      	movs	r3, #1
 80281f8:	627b      	str	r3, [r7, #36]	@ 0x24
 80281fa:	e002      	b.n	8028202 <MQTTDeserialize_suback+0xc4>
		goto exit;
 80281fc:	bf00      	nop
 80281fe:	e000      	b.n	8028202 <MQTTDeserialize_suback+0xc4>
		goto exit;
 8028200:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8028202:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8028204:	4618      	mov	r0, r3
 8028206:	3728      	adds	r7, #40	@ 0x28
 8028208:	46bd      	mov	sp, r7
 802820a:	bd80      	pop	{r7, pc}

0802820c <malloc>:
 802820c:	4b02      	ldr	r3, [pc, #8]	@ (8028218 <malloc+0xc>)
 802820e:	4601      	mov	r1, r0
 8028210:	6818      	ldr	r0, [r3, #0]
 8028212:	f000 b82d 	b.w	8028270 <_malloc_r>
 8028216:	bf00      	nop
 8028218:	240001d4 	.word	0x240001d4

0802821c <free>:
 802821c:	4b02      	ldr	r3, [pc, #8]	@ (8028228 <free+0xc>)
 802821e:	4601      	mov	r1, r0
 8028220:	6818      	ldr	r0, [r3, #0]
 8028222:	f002 bc7b 	b.w	802ab1c <_free_r>
 8028226:	bf00      	nop
 8028228:	240001d4 	.word	0x240001d4

0802822c <sbrk_aligned>:
 802822c:	b570      	push	{r4, r5, r6, lr}
 802822e:	4e0f      	ldr	r6, [pc, #60]	@ (802826c <sbrk_aligned+0x40>)
 8028230:	460c      	mov	r4, r1
 8028232:	6831      	ldr	r1, [r6, #0]
 8028234:	4605      	mov	r5, r0
 8028236:	b911      	cbnz	r1, 802823e <sbrk_aligned+0x12>
 8028238:	f001 fe0a 	bl	8029e50 <_sbrk_r>
 802823c:	6030      	str	r0, [r6, #0]
 802823e:	4621      	mov	r1, r4
 8028240:	4628      	mov	r0, r5
 8028242:	f001 fe05 	bl	8029e50 <_sbrk_r>
 8028246:	1c43      	adds	r3, r0, #1
 8028248:	d103      	bne.n	8028252 <sbrk_aligned+0x26>
 802824a:	f04f 34ff 	mov.w	r4, #4294967295	@ 0xffffffff
 802824e:	4620      	mov	r0, r4
 8028250:	bd70      	pop	{r4, r5, r6, pc}
 8028252:	1cc4      	adds	r4, r0, #3
 8028254:	f024 0403 	bic.w	r4, r4, #3
 8028258:	42a0      	cmp	r0, r4
 802825a:	d0f8      	beq.n	802824e <sbrk_aligned+0x22>
 802825c:	1a21      	subs	r1, r4, r0
 802825e:	4628      	mov	r0, r5
 8028260:	f001 fdf6 	bl	8029e50 <_sbrk_r>
 8028264:	3001      	adds	r0, #1
 8028266:	d1f2      	bne.n	802824e <sbrk_aligned+0x22>
 8028268:	e7ef      	b.n	802824a <sbrk_aligned+0x1e>
 802826a:	bf00      	nop
 802826c:	2402b03c 	.word	0x2402b03c

08028270 <_malloc_r>:
 8028270:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 8028274:	1ccd      	adds	r5, r1, #3
 8028276:	f025 0503 	bic.w	r5, r5, #3
 802827a:	3508      	adds	r5, #8
 802827c:	2d0c      	cmp	r5, #12
 802827e:	bf38      	it	cc
 8028280:	250c      	movcc	r5, #12
 8028282:	2d00      	cmp	r5, #0
 8028284:	4606      	mov	r6, r0
 8028286:	db01      	blt.n	802828c <_malloc_r+0x1c>
 8028288:	42a9      	cmp	r1, r5
 802828a:	d904      	bls.n	8028296 <_malloc_r+0x26>
 802828c:	230c      	movs	r3, #12
 802828e:	6033      	str	r3, [r6, #0]
 8028290:	2000      	movs	r0, #0
 8028292:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 8028296:	f8df 80d4 	ldr.w	r8, [pc, #212]	@ 802836c <_malloc_r+0xfc>
 802829a:	f000 f869 	bl	8028370 <__malloc_lock>
 802829e:	f8d8 3000 	ldr.w	r3, [r8]
 80282a2:	461c      	mov	r4, r3
 80282a4:	bb44      	cbnz	r4, 80282f8 <_malloc_r+0x88>
 80282a6:	4629      	mov	r1, r5
 80282a8:	4630      	mov	r0, r6
 80282aa:	f7ff ffbf 	bl	802822c <sbrk_aligned>
 80282ae:	1c43      	adds	r3, r0, #1
 80282b0:	4604      	mov	r4, r0
 80282b2:	d158      	bne.n	8028366 <_malloc_r+0xf6>
 80282b4:	f8d8 4000 	ldr.w	r4, [r8]
 80282b8:	4627      	mov	r7, r4
 80282ba:	2f00      	cmp	r7, #0
 80282bc:	d143      	bne.n	8028346 <_malloc_r+0xd6>
 80282be:	2c00      	cmp	r4, #0
 80282c0:	d04b      	beq.n	802835a <_malloc_r+0xea>
 80282c2:	6823      	ldr	r3, [r4, #0]
 80282c4:	4639      	mov	r1, r7
 80282c6:	4630      	mov	r0, r6
 80282c8:	eb04 0903 	add.w	r9, r4, r3
 80282cc:	f001 fdc0 	bl	8029e50 <_sbrk_r>
 80282d0:	4581      	cmp	r9, r0
 80282d2:	d142      	bne.n	802835a <_malloc_r+0xea>
 80282d4:	6821      	ldr	r1, [r4, #0]
 80282d6:	1a6d      	subs	r5, r5, r1
 80282d8:	4629      	mov	r1, r5
 80282da:	4630      	mov	r0, r6
 80282dc:	f7ff ffa6 	bl	802822c <sbrk_aligned>
 80282e0:	3001      	adds	r0, #1
 80282e2:	d03a      	beq.n	802835a <_malloc_r+0xea>
 80282e4:	6823      	ldr	r3, [r4, #0]
 80282e6:	442b      	add	r3, r5
 80282e8:	6023      	str	r3, [r4, #0]
 80282ea:	f8d8 3000 	ldr.w	r3, [r8]
 80282ee:	685a      	ldr	r2, [r3, #4]
 80282f0:	bb62      	cbnz	r2, 802834c <_malloc_r+0xdc>
 80282f2:	f8c8 7000 	str.w	r7, [r8]
 80282f6:	e00f      	b.n	8028318 <_malloc_r+0xa8>
 80282f8:	6822      	ldr	r2, [r4, #0]
 80282fa:	1b52      	subs	r2, r2, r5
 80282fc:	d420      	bmi.n	8028340 <_malloc_r+0xd0>
 80282fe:	2a0b      	cmp	r2, #11
 8028300:	d917      	bls.n	8028332 <_malloc_r+0xc2>
 8028302:	1961      	adds	r1, r4, r5
 8028304:	42a3      	cmp	r3, r4
 8028306:	6025      	str	r5, [r4, #0]
 8028308:	bf18      	it	ne
 802830a:	6059      	strne	r1, [r3, #4]
 802830c:	6863      	ldr	r3, [r4, #4]
 802830e:	bf08      	it	eq
 8028310:	f8c8 1000 	streq.w	r1, [r8]
 8028314:	5162      	str	r2, [r4, r5]
 8028316:	604b      	str	r3, [r1, #4]
 8028318:	4630      	mov	r0, r6
 802831a:	f000 f82f 	bl	802837c <__malloc_unlock>
 802831e:	f104 000b 	add.w	r0, r4, #11
 8028322:	1d23      	adds	r3, r4, #4
 8028324:	f020 0007 	bic.w	r0, r0, #7
 8028328:	1ac2      	subs	r2, r0, r3
 802832a:	bf1c      	itt	ne
 802832c:	1a1b      	subne	r3, r3, r0
 802832e:	50a3      	strne	r3, [r4, r2]
 8028330:	e7af      	b.n	8028292 <_malloc_r+0x22>
 8028332:	6862      	ldr	r2, [r4, #4]
 8028334:	42a3      	cmp	r3, r4
 8028336:	bf0c      	ite	eq
 8028338:	f8c8 2000 	streq.w	r2, [r8]
 802833c:	605a      	strne	r2, [r3, #4]
 802833e:	e7eb      	b.n	8028318 <_malloc_r+0xa8>
 8028340:	4623      	mov	r3, r4
 8028342:	6864      	ldr	r4, [r4, #4]
 8028344:	e7ae      	b.n	80282a4 <_malloc_r+0x34>
 8028346:	463c      	mov	r4, r7
 8028348:	687f      	ldr	r7, [r7, #4]
 802834a:	e7b6      	b.n	80282ba <_malloc_r+0x4a>
 802834c:	461a      	mov	r2, r3
 802834e:	685b      	ldr	r3, [r3, #4]
 8028350:	42a3      	cmp	r3, r4
 8028352:	d1fb      	bne.n	802834c <_malloc_r+0xdc>
 8028354:	2300      	movs	r3, #0
 8028356:	6053      	str	r3, [r2, #4]
 8028358:	e7de      	b.n	8028318 <_malloc_r+0xa8>
 802835a:	230c      	movs	r3, #12
 802835c:	6033      	str	r3, [r6, #0]
 802835e:	4630      	mov	r0, r6
 8028360:	f000 f80c 	bl	802837c <__malloc_unlock>
 8028364:	e794      	b.n	8028290 <_malloc_r+0x20>
 8028366:	6005      	str	r5, [r0, #0]
 8028368:	e7d6      	b.n	8028318 <_malloc_r+0xa8>
 802836a:	bf00      	nop
 802836c:	2402b040 	.word	0x2402b040

08028370 <__malloc_lock>:
 8028370:	4801      	ldr	r0, [pc, #4]	@ (8028378 <__malloc_lock+0x8>)
 8028372:	f001 bdba 	b.w	8029eea <__retarget_lock_acquire_recursive>
 8028376:	bf00      	nop
 8028378:	2402b184 	.word	0x2402b184

0802837c <__malloc_unlock>:
 802837c:	4801      	ldr	r0, [pc, #4]	@ (8028384 <__malloc_unlock+0x8>)
 802837e:	f001 bdb5 	b.w	8029eec <__retarget_lock_release_recursive>
 8028382:	bf00      	nop
 8028384:	2402b184 	.word	0x2402b184

08028388 <rand>:
 8028388:	4b16      	ldr	r3, [pc, #88]	@ (80283e4 <rand+0x5c>)
 802838a:	b510      	push	{r4, lr}
 802838c:	681c      	ldr	r4, [r3, #0]
 802838e:	6b23      	ldr	r3, [r4, #48]	@ 0x30
 8028390:	b9b3      	cbnz	r3, 80283c0 <rand+0x38>
 8028392:	2018      	movs	r0, #24
 8028394:	f7ff ff3a 	bl	802820c <malloc>
 8028398:	4602      	mov	r2, r0
 802839a:	6320      	str	r0, [r4, #48]	@ 0x30
 802839c:	b920      	cbnz	r0, 80283a8 <rand+0x20>
 802839e:	4b12      	ldr	r3, [pc, #72]	@ (80283e8 <rand+0x60>)
 80283a0:	4812      	ldr	r0, [pc, #72]	@ (80283ec <rand+0x64>)
 80283a2:	2152      	movs	r1, #82	@ 0x52
 80283a4:	f001 fdbc 	bl	8029f20 <__assert_func>
 80283a8:	4911      	ldr	r1, [pc, #68]	@ (80283f0 <rand+0x68>)
 80283aa:	4b12      	ldr	r3, [pc, #72]	@ (80283f4 <rand+0x6c>)
 80283ac:	e9c0 1300 	strd	r1, r3, [r0]
 80283b0:	4b11      	ldr	r3, [pc, #68]	@ (80283f8 <rand+0x70>)
 80283b2:	6083      	str	r3, [r0, #8]
 80283b4:	230b      	movs	r3, #11
 80283b6:	8183      	strh	r3, [r0, #12]
 80283b8:	2100      	movs	r1, #0
 80283ba:	2001      	movs	r0, #1
 80283bc:	e9c2 0104 	strd	r0, r1, [r2, #16]
 80283c0:	6b21      	ldr	r1, [r4, #48]	@ 0x30
 80283c2:	480e      	ldr	r0, [pc, #56]	@ (80283fc <rand+0x74>)
 80283c4:	690b      	ldr	r3, [r1, #16]
 80283c6:	694c      	ldr	r4, [r1, #20]
 80283c8:	4a0d      	ldr	r2, [pc, #52]	@ (8028400 <rand+0x78>)
 80283ca:	4358      	muls	r0, r3
 80283cc:	fb02 0004 	mla	r0, r2, r4, r0
 80283d0:	fba3 3202 	umull	r3, r2, r3, r2
 80283d4:	3301      	adds	r3, #1
 80283d6:	eb40 0002 	adc.w	r0, r0, r2
 80283da:	e9c1 3004 	strd	r3, r0, [r1, #16]
 80283de:	f020 4000 	bic.w	r0, r0, #2147483648	@ 0x80000000
 80283e2:	bd10      	pop	{r4, pc}
 80283e4:	240001d4 	.word	0x240001d4
 80283e8:	08030c7e 	.word	0x08030c7e
 80283ec:	08030c95 	.word	0x08030c95
 80283f0:	abcd330e 	.word	0xabcd330e
 80283f4:	e66d1234 	.word	0xe66d1234
 80283f8:	0005deec 	.word	0x0005deec
 80283fc:	5851f42d 	.word	0x5851f42d
 8028400:	4c957f2d 	.word	0x4c957f2d

08028404 <realloc>:
 8028404:	4b02      	ldr	r3, [pc, #8]	@ (8028410 <realloc+0xc>)
 8028406:	460a      	mov	r2, r1
 8028408:	4601      	mov	r1, r0
 802840a:	6818      	ldr	r0, [r3, #0]
 802840c:	f000 b802 	b.w	8028414 <_realloc_r>
 8028410:	240001d4 	.word	0x240001d4

08028414 <_realloc_r>:
 8028414:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8028418:	4680      	mov	r8, r0
 802841a:	4615      	mov	r5, r2
 802841c:	460c      	mov	r4, r1
 802841e:	b921      	cbnz	r1, 802842a <_realloc_r+0x16>
 8028420:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 8028424:	4611      	mov	r1, r2
 8028426:	f7ff bf23 	b.w	8028270 <_malloc_r>
 802842a:	b92a      	cbnz	r2, 8028438 <_realloc_r+0x24>
 802842c:	f002 fb76 	bl	802ab1c <_free_r>
 8028430:	2400      	movs	r4, #0
 8028432:	4620      	mov	r0, r4
 8028434:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8028438:	f003 fbb5 	bl	802bba6 <_malloc_usable_size_r>
 802843c:	4285      	cmp	r5, r0
 802843e:	4606      	mov	r6, r0
 8028440:	d802      	bhi.n	8028448 <_realloc_r+0x34>
 8028442:	ebb5 0f50 	cmp.w	r5, r0, lsr #1
 8028446:	d8f4      	bhi.n	8028432 <_realloc_r+0x1e>
 8028448:	4629      	mov	r1, r5
 802844a:	4640      	mov	r0, r8
 802844c:	f7ff ff10 	bl	8028270 <_malloc_r>
 8028450:	4607      	mov	r7, r0
 8028452:	2800      	cmp	r0, #0
 8028454:	d0ec      	beq.n	8028430 <_realloc_r+0x1c>
 8028456:	42b5      	cmp	r5, r6
 8028458:	462a      	mov	r2, r5
 802845a:	4621      	mov	r1, r4
 802845c:	bf28      	it	cs
 802845e:	4632      	movcs	r2, r6
 8028460:	f001 fd45 	bl	8029eee <memcpy>
 8028464:	4621      	mov	r1, r4
 8028466:	4640      	mov	r0, r8
 8028468:	f002 fb58 	bl	802ab1c <_free_r>
 802846c:	463c      	mov	r4, r7
 802846e:	e7e0      	b.n	8028432 <_realloc_r+0x1e>

08028470 <sulp>:
 8028470:	b570      	push	{r4, r5, r6, lr}
 8028472:	4604      	mov	r4, r0
 8028474:	460d      	mov	r5, r1
 8028476:	4616      	mov	r6, r2
 8028478:	ec45 4b10 	vmov	d0, r4, r5
 802847c:	f003 fa58 	bl	802b930 <__ulp>
 8028480:	b17e      	cbz	r6, 80284a2 <sulp+0x32>
 8028482:	f3c5 530a 	ubfx	r3, r5, #20, #11
 8028486:	f1c3 036b 	rsb	r3, r3, #107	@ 0x6b
 802848a:	2b00      	cmp	r3, #0
 802848c:	dd09      	ble.n	80284a2 <sulp+0x32>
 802848e:	051b      	lsls	r3, r3, #20
 8028490:	f103 517f 	add.w	r1, r3, #1069547520	@ 0x3fc00000
 8028494:	2000      	movs	r0, #0
 8028496:	f501 1140 	add.w	r1, r1, #3145728	@ 0x300000
 802849a:	ec41 0b17 	vmov	d7, r0, r1
 802849e:	ee20 0b07 	vmul.f64	d0, d0, d7
 80284a2:	bd70      	pop	{r4, r5, r6, pc}
 80284a4:	0000      	movs	r0, r0
	...

080284a8 <_strtod_l>:
 80284a8:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 80284ac:	ed2d 8b0a 	vpush	{d8-d12}
 80284b0:	b097      	sub	sp, #92	@ 0x5c
 80284b2:	4688      	mov	r8, r1
 80284b4:	920e      	str	r2, [sp, #56]	@ 0x38
 80284b6:	2200      	movs	r2, #0
 80284b8:	9212      	str	r2, [sp, #72]	@ 0x48
 80284ba:	9005      	str	r0, [sp, #20]
 80284bc:	f04f 0a00 	mov.w	sl, #0
 80284c0:	f04f 0b00 	mov.w	fp, #0
 80284c4:	460a      	mov	r2, r1
 80284c6:	9211      	str	r2, [sp, #68]	@ 0x44
 80284c8:	7811      	ldrb	r1, [r2, #0]
 80284ca:	292b      	cmp	r1, #43	@ 0x2b
 80284cc:	d04c      	beq.n	8028568 <_strtod_l+0xc0>
 80284ce:	d839      	bhi.n	8028544 <_strtod_l+0x9c>
 80284d0:	290d      	cmp	r1, #13
 80284d2:	d833      	bhi.n	802853c <_strtod_l+0x94>
 80284d4:	2908      	cmp	r1, #8
 80284d6:	d833      	bhi.n	8028540 <_strtod_l+0x98>
 80284d8:	2900      	cmp	r1, #0
 80284da:	d03c      	beq.n	8028556 <_strtod_l+0xae>
 80284dc:	2200      	movs	r2, #0
 80284de:	9208      	str	r2, [sp, #32]
 80284e0:	9d11      	ldr	r5, [sp, #68]	@ 0x44
 80284e2:	782a      	ldrb	r2, [r5, #0]
 80284e4:	2a30      	cmp	r2, #48	@ 0x30
 80284e6:	f040 80b5 	bne.w	8028654 <_strtod_l+0x1ac>
 80284ea:	786a      	ldrb	r2, [r5, #1]
 80284ec:	f002 02df 	and.w	r2, r2, #223	@ 0xdf
 80284f0:	2a58      	cmp	r2, #88	@ 0x58
 80284f2:	d170      	bne.n	80285d6 <_strtod_l+0x12e>
 80284f4:	9302      	str	r3, [sp, #8]
 80284f6:	9b08      	ldr	r3, [sp, #32]
 80284f8:	9301      	str	r3, [sp, #4]
 80284fa:	ab12      	add	r3, sp, #72	@ 0x48
 80284fc:	9300      	str	r3, [sp, #0]
 80284fe:	4a8b      	ldr	r2, [pc, #556]	@ (802872c <_strtod_l+0x284>)
 8028500:	9805      	ldr	r0, [sp, #20]
 8028502:	ab13      	add	r3, sp, #76	@ 0x4c
 8028504:	a911      	add	r1, sp, #68	@ 0x44
 8028506:	f002 fbbb 	bl	802ac80 <__gethex>
 802850a:	f010 060f 	ands.w	r6, r0, #15
 802850e:	4604      	mov	r4, r0
 8028510:	d005      	beq.n	802851e <_strtod_l+0x76>
 8028512:	2e06      	cmp	r6, #6
 8028514:	d12a      	bne.n	802856c <_strtod_l+0xc4>
 8028516:	3501      	adds	r5, #1
 8028518:	2300      	movs	r3, #0
 802851a:	9511      	str	r5, [sp, #68]	@ 0x44
 802851c:	9308      	str	r3, [sp, #32]
 802851e:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 8028520:	2b00      	cmp	r3, #0
 8028522:	f040 852f 	bne.w	8028f84 <_strtod_l+0xadc>
 8028526:	9b08      	ldr	r3, [sp, #32]
 8028528:	ec4b ab10 	vmov	d0, sl, fp
 802852c:	b1cb      	cbz	r3, 8028562 <_strtod_l+0xba>
 802852e:	eeb1 0b40 	vneg.f64	d0, d0
 8028532:	b017      	add	sp, #92	@ 0x5c
 8028534:	ecbd 8b0a 	vpop	{d8-d12}
 8028538:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802853c:	2920      	cmp	r1, #32
 802853e:	d1cd      	bne.n	80284dc <_strtod_l+0x34>
 8028540:	3201      	adds	r2, #1
 8028542:	e7c0      	b.n	80284c6 <_strtod_l+0x1e>
 8028544:	292d      	cmp	r1, #45	@ 0x2d
 8028546:	d1c9      	bne.n	80284dc <_strtod_l+0x34>
 8028548:	2101      	movs	r1, #1
 802854a:	9108      	str	r1, [sp, #32]
 802854c:	1c51      	adds	r1, r2, #1
 802854e:	9111      	str	r1, [sp, #68]	@ 0x44
 8028550:	7852      	ldrb	r2, [r2, #1]
 8028552:	2a00      	cmp	r2, #0
 8028554:	d1c4      	bne.n	80284e0 <_strtod_l+0x38>
 8028556:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 8028558:	f8cd 8044 	str.w	r8, [sp, #68]	@ 0x44
 802855c:	2b00      	cmp	r3, #0
 802855e:	f040 850f 	bne.w	8028f80 <_strtod_l+0xad8>
 8028562:	ec4b ab10 	vmov	d0, sl, fp
 8028566:	e7e4      	b.n	8028532 <_strtod_l+0x8a>
 8028568:	2100      	movs	r1, #0
 802856a:	e7ee      	b.n	802854a <_strtod_l+0xa2>
 802856c:	9a12      	ldr	r2, [sp, #72]	@ 0x48
 802856e:	b13a      	cbz	r2, 8028580 <_strtod_l+0xd8>
 8028570:	2135      	movs	r1, #53	@ 0x35
 8028572:	a814      	add	r0, sp, #80	@ 0x50
 8028574:	f003 fad3 	bl	802bb1e <__copybits>
 8028578:	9912      	ldr	r1, [sp, #72]	@ 0x48
 802857a:	9805      	ldr	r0, [sp, #20]
 802857c:	f002 fea4 	bl	802b2c8 <_Bfree>
 8028580:	1e73      	subs	r3, r6, #1
 8028582:	9a13      	ldr	r2, [sp, #76]	@ 0x4c
 8028584:	2b04      	cmp	r3, #4
 8028586:	d806      	bhi.n	8028596 <_strtod_l+0xee>
 8028588:	e8df f003 	tbb	[pc, r3]
 802858c:	201d0314 	.word	0x201d0314
 8028590:	14          	.byte	0x14
 8028591:	00          	.byte	0x00
 8028592:	e9dd ab14 	ldrd	sl, fp, [sp, #80]	@ 0x50
 8028596:	05e3      	lsls	r3, r4, #23
 8028598:	bf48      	it	mi
 802859a:	f04b 4b00 	orrmi.w	fp, fp, #2147483648	@ 0x80000000
 802859e:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 80285a2:	0d1b      	lsrs	r3, r3, #20
 80285a4:	051b      	lsls	r3, r3, #20
 80285a6:	2b00      	cmp	r3, #0
 80285a8:	d1b9      	bne.n	802851e <_strtod_l+0x76>
 80285aa:	f001 fc73 	bl	8029e94 <__errno>
 80285ae:	2322      	movs	r3, #34	@ 0x22
 80285b0:	6003      	str	r3, [r0, #0]
 80285b2:	e7b4      	b.n	802851e <_strtod_l+0x76>
 80285b4:	e9dd a314 	ldrd	sl, r3, [sp, #80]	@ 0x50
 80285b8:	f202 4233 	addw	r2, r2, #1075	@ 0x433
 80285bc:	f423 1380 	bic.w	r3, r3, #1048576	@ 0x100000
 80285c0:	ea43 5b02 	orr.w	fp, r3, r2, lsl #20
 80285c4:	e7e7      	b.n	8028596 <_strtod_l+0xee>
 80285c6:	f8df b16c 	ldr.w	fp, [pc, #364]	@ 8028734 <_strtod_l+0x28c>
 80285ca:	e7e4      	b.n	8028596 <_strtod_l+0xee>
 80285cc:	f06f 4b00 	mvn.w	fp, #2147483648	@ 0x80000000
 80285d0:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 80285d4:	e7df      	b.n	8028596 <_strtod_l+0xee>
 80285d6:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 80285d8:	1c5a      	adds	r2, r3, #1
 80285da:	9211      	str	r2, [sp, #68]	@ 0x44
 80285dc:	785b      	ldrb	r3, [r3, #1]
 80285de:	2b30      	cmp	r3, #48	@ 0x30
 80285e0:	d0f9      	beq.n	80285d6 <_strtod_l+0x12e>
 80285e2:	2b00      	cmp	r3, #0
 80285e4:	d09b      	beq.n	802851e <_strtod_l+0x76>
 80285e6:	2301      	movs	r3, #1
 80285e8:	2600      	movs	r6, #0
 80285ea:	9307      	str	r3, [sp, #28]
 80285ec:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 80285ee:	930a      	str	r3, [sp, #40]	@ 0x28
 80285f0:	46b1      	mov	r9, r6
 80285f2:	4635      	mov	r5, r6
 80285f4:	220a      	movs	r2, #10
 80285f6:	9811      	ldr	r0, [sp, #68]	@ 0x44
 80285f8:	7804      	ldrb	r4, [r0, #0]
 80285fa:	f1a4 0330 	sub.w	r3, r4, #48	@ 0x30
 80285fe:	b2d9      	uxtb	r1, r3
 8028600:	2909      	cmp	r1, #9
 8028602:	d929      	bls.n	8028658 <_strtod_l+0x1b0>
 8028604:	494a      	ldr	r1, [pc, #296]	@ (8028730 <_strtod_l+0x288>)
 8028606:	2201      	movs	r2, #1
 8028608:	f001 fb82 	bl	8029d10 <strncmp>
 802860c:	b378      	cbz	r0, 802866e <_strtod_l+0x1c6>
 802860e:	2000      	movs	r0, #0
 8028610:	4622      	mov	r2, r4
 8028612:	462b      	mov	r3, r5
 8028614:	4607      	mov	r7, r0
 8028616:	9006      	str	r0, [sp, #24]
 8028618:	2a65      	cmp	r2, #101	@ 0x65
 802861a:	d001      	beq.n	8028620 <_strtod_l+0x178>
 802861c:	2a45      	cmp	r2, #69	@ 0x45
 802861e:	d117      	bne.n	8028650 <_strtod_l+0x1a8>
 8028620:	b91b      	cbnz	r3, 802862a <_strtod_l+0x182>
 8028622:	9b07      	ldr	r3, [sp, #28]
 8028624:	4303      	orrs	r3, r0
 8028626:	d096      	beq.n	8028556 <_strtod_l+0xae>
 8028628:	2300      	movs	r3, #0
 802862a:	f8dd 8044 	ldr.w	r8, [sp, #68]	@ 0x44
 802862e:	f108 0201 	add.w	r2, r8, #1
 8028632:	9211      	str	r2, [sp, #68]	@ 0x44
 8028634:	f898 2001 	ldrb.w	r2, [r8, #1]
 8028638:	2a2b      	cmp	r2, #43	@ 0x2b
 802863a:	d06b      	beq.n	8028714 <_strtod_l+0x26c>
 802863c:	2a2d      	cmp	r2, #45	@ 0x2d
 802863e:	d071      	beq.n	8028724 <_strtod_l+0x27c>
 8028640:	f04f 0e00 	mov.w	lr, #0
 8028644:	f1a2 0430 	sub.w	r4, r2, #48	@ 0x30
 8028648:	2c09      	cmp	r4, #9
 802864a:	d979      	bls.n	8028740 <_strtod_l+0x298>
 802864c:	f8cd 8044 	str.w	r8, [sp, #68]	@ 0x44
 8028650:	2400      	movs	r4, #0
 8028652:	e094      	b.n	802877e <_strtod_l+0x2d6>
 8028654:	2300      	movs	r3, #0
 8028656:	e7c7      	b.n	80285e8 <_strtod_l+0x140>
 8028658:	2d08      	cmp	r5, #8
 802865a:	f100 0001 	add.w	r0, r0, #1
 802865e:	bfd4      	ite	le
 8028660:	fb02 3909 	mlale	r9, r2, r9, r3
 8028664:	fb02 3606 	mlagt	r6, r2, r6, r3
 8028668:	3501      	adds	r5, #1
 802866a:	9011      	str	r0, [sp, #68]	@ 0x44
 802866c:	e7c3      	b.n	80285f6 <_strtod_l+0x14e>
 802866e:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028670:	1c5a      	adds	r2, r3, #1
 8028672:	9211      	str	r2, [sp, #68]	@ 0x44
 8028674:	785a      	ldrb	r2, [r3, #1]
 8028676:	b375      	cbz	r5, 80286d6 <_strtod_l+0x22e>
 8028678:	4607      	mov	r7, r0
 802867a:	462b      	mov	r3, r5
 802867c:	f1a2 0130 	sub.w	r1, r2, #48	@ 0x30
 8028680:	2909      	cmp	r1, #9
 8028682:	d913      	bls.n	80286ac <_strtod_l+0x204>
 8028684:	2101      	movs	r1, #1
 8028686:	9106      	str	r1, [sp, #24]
 8028688:	e7c6      	b.n	8028618 <_strtod_l+0x170>
 802868a:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 802868c:	1c5a      	adds	r2, r3, #1
 802868e:	9211      	str	r2, [sp, #68]	@ 0x44
 8028690:	785a      	ldrb	r2, [r3, #1]
 8028692:	3001      	adds	r0, #1
 8028694:	2a30      	cmp	r2, #48	@ 0x30
 8028696:	d0f8      	beq.n	802868a <_strtod_l+0x1e2>
 8028698:	f1a2 0331 	sub.w	r3, r2, #49	@ 0x31
 802869c:	2b08      	cmp	r3, #8
 802869e:	f200 8476 	bhi.w	8028f8e <_strtod_l+0xae6>
 80286a2:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 80286a4:	930a      	str	r3, [sp, #40]	@ 0x28
 80286a6:	4607      	mov	r7, r0
 80286a8:	2000      	movs	r0, #0
 80286aa:	4603      	mov	r3, r0
 80286ac:	3a30      	subs	r2, #48	@ 0x30
 80286ae:	f100 0101 	add.w	r1, r0, #1
 80286b2:	d023      	beq.n	80286fc <_strtod_l+0x254>
 80286b4:	440f      	add	r7, r1
 80286b6:	eb00 0c03 	add.w	ip, r0, r3
 80286ba:	4619      	mov	r1, r3
 80286bc:	240a      	movs	r4, #10
 80286be:	4561      	cmp	r1, ip
 80286c0:	d10b      	bne.n	80286da <_strtod_l+0x232>
 80286c2:	1c5c      	adds	r4, r3, #1
 80286c4:	4403      	add	r3, r0
 80286c6:	2b08      	cmp	r3, #8
 80286c8:	4404      	add	r4, r0
 80286ca:	dc11      	bgt.n	80286f0 <_strtod_l+0x248>
 80286cc:	230a      	movs	r3, #10
 80286ce:	fb03 2909 	mla	r9, r3, r9, r2
 80286d2:	2100      	movs	r1, #0
 80286d4:	e013      	b.n	80286fe <_strtod_l+0x256>
 80286d6:	4628      	mov	r0, r5
 80286d8:	e7dc      	b.n	8028694 <_strtod_l+0x1ec>
 80286da:	2908      	cmp	r1, #8
 80286dc:	f101 0101 	add.w	r1, r1, #1
 80286e0:	dc02      	bgt.n	80286e8 <_strtod_l+0x240>
 80286e2:	fb04 f909 	mul.w	r9, r4, r9
 80286e6:	e7ea      	b.n	80286be <_strtod_l+0x216>
 80286e8:	2910      	cmp	r1, #16
 80286ea:	bfd8      	it	le
 80286ec:	4366      	mulle	r6, r4
 80286ee:	e7e6      	b.n	80286be <_strtod_l+0x216>
 80286f0:	2b0f      	cmp	r3, #15
 80286f2:	dcee      	bgt.n	80286d2 <_strtod_l+0x22a>
 80286f4:	230a      	movs	r3, #10
 80286f6:	fb03 2606 	mla	r6, r3, r6, r2
 80286fa:	e7ea      	b.n	80286d2 <_strtod_l+0x22a>
 80286fc:	461c      	mov	r4, r3
 80286fe:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028700:	1c5a      	adds	r2, r3, #1
 8028702:	9211      	str	r2, [sp, #68]	@ 0x44
 8028704:	785a      	ldrb	r2, [r3, #1]
 8028706:	4608      	mov	r0, r1
 8028708:	4623      	mov	r3, r4
 802870a:	e7b7      	b.n	802867c <_strtod_l+0x1d4>
 802870c:	2301      	movs	r3, #1
 802870e:	2700      	movs	r7, #0
 8028710:	9306      	str	r3, [sp, #24]
 8028712:	e786      	b.n	8028622 <_strtod_l+0x17a>
 8028714:	f04f 0e00 	mov.w	lr, #0
 8028718:	f108 0202 	add.w	r2, r8, #2
 802871c:	9211      	str	r2, [sp, #68]	@ 0x44
 802871e:	f898 2002 	ldrb.w	r2, [r8, #2]
 8028722:	e78f      	b.n	8028644 <_strtod_l+0x19c>
 8028724:	f04f 0e01 	mov.w	lr, #1
 8028728:	e7f6      	b.n	8028718 <_strtod_l+0x270>
 802872a:	bf00      	nop
 802872c:	08030d04 	.word	0x08030d04
 8028730:	08030ced 	.word	0x08030ced
 8028734:	7ff00000 	.word	0x7ff00000
 8028738:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 802873a:	1c54      	adds	r4, r2, #1
 802873c:	9411      	str	r4, [sp, #68]	@ 0x44
 802873e:	7852      	ldrb	r2, [r2, #1]
 8028740:	2a30      	cmp	r2, #48	@ 0x30
 8028742:	d0f9      	beq.n	8028738 <_strtod_l+0x290>
 8028744:	f1a2 0431 	sub.w	r4, r2, #49	@ 0x31
 8028748:	2c08      	cmp	r4, #8
 802874a:	d881      	bhi.n	8028650 <_strtod_l+0x1a8>
 802874c:	f1a2 0c30 	sub.w	ip, r2, #48	@ 0x30
 8028750:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 8028752:	9209      	str	r2, [sp, #36]	@ 0x24
 8028754:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 8028756:	1c51      	adds	r1, r2, #1
 8028758:	9111      	str	r1, [sp, #68]	@ 0x44
 802875a:	7852      	ldrb	r2, [r2, #1]
 802875c:	f1a2 0430 	sub.w	r4, r2, #48	@ 0x30
 8028760:	2c09      	cmp	r4, #9
 8028762:	d938      	bls.n	80287d6 <_strtod_l+0x32e>
 8028764:	9c09      	ldr	r4, [sp, #36]	@ 0x24
 8028766:	1b0c      	subs	r4, r1, r4
 8028768:	2c08      	cmp	r4, #8
 802876a:	f644 641f 	movw	r4, #19999	@ 0x4e1f
 802876e:	dc02      	bgt.n	8028776 <_strtod_l+0x2ce>
 8028770:	4564      	cmp	r4, ip
 8028772:	bfa8      	it	ge
 8028774:	4664      	movge	r4, ip
 8028776:	f1be 0f00 	cmp.w	lr, #0
 802877a:	d000      	beq.n	802877e <_strtod_l+0x2d6>
 802877c:	4264      	negs	r4, r4
 802877e:	2b00      	cmp	r3, #0
 8028780:	d14e      	bne.n	8028820 <_strtod_l+0x378>
 8028782:	9b07      	ldr	r3, [sp, #28]
 8028784:	4318      	orrs	r0, r3
 8028786:	f47f aeca 	bne.w	802851e <_strtod_l+0x76>
 802878a:	9b06      	ldr	r3, [sp, #24]
 802878c:	2b00      	cmp	r3, #0
 802878e:	f47f aee2 	bne.w	8028556 <_strtod_l+0xae>
 8028792:	2a69      	cmp	r2, #105	@ 0x69
 8028794:	d027      	beq.n	80287e6 <_strtod_l+0x33e>
 8028796:	dc24      	bgt.n	80287e2 <_strtod_l+0x33a>
 8028798:	2a49      	cmp	r2, #73	@ 0x49
 802879a:	d024      	beq.n	80287e6 <_strtod_l+0x33e>
 802879c:	2a4e      	cmp	r2, #78	@ 0x4e
 802879e:	f47f aeda 	bne.w	8028556 <_strtod_l+0xae>
 80287a2:	4997      	ldr	r1, [pc, #604]	@ (8028a00 <_strtod_l+0x558>)
 80287a4:	a811      	add	r0, sp, #68	@ 0x44
 80287a6:	f002 fc8d 	bl	802b0c4 <__match>
 80287aa:	2800      	cmp	r0, #0
 80287ac:	f43f aed3 	beq.w	8028556 <_strtod_l+0xae>
 80287b0:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 80287b2:	781b      	ldrb	r3, [r3, #0]
 80287b4:	2b28      	cmp	r3, #40	@ 0x28
 80287b6:	d12d      	bne.n	8028814 <_strtod_l+0x36c>
 80287b8:	4992      	ldr	r1, [pc, #584]	@ (8028a04 <_strtod_l+0x55c>)
 80287ba:	aa14      	add	r2, sp, #80	@ 0x50
 80287bc:	a811      	add	r0, sp, #68	@ 0x44
 80287be:	f002 fc95 	bl	802b0ec <__hexnan>
 80287c2:	2805      	cmp	r0, #5
 80287c4:	d126      	bne.n	8028814 <_strtod_l+0x36c>
 80287c6:	9b15      	ldr	r3, [sp, #84]	@ 0x54
 80287c8:	f8dd a050 	ldr.w	sl, [sp, #80]	@ 0x50
 80287cc:	f043 4bff 	orr.w	fp, r3, #2139095040	@ 0x7f800000
 80287d0:	f44b 0be0 	orr.w	fp, fp, #7340032	@ 0x700000
 80287d4:	e6a3      	b.n	802851e <_strtod_l+0x76>
 80287d6:	240a      	movs	r4, #10
 80287d8:	fb04 2c0c 	mla	ip, r4, ip, r2
 80287dc:	f1ac 0c30 	sub.w	ip, ip, #48	@ 0x30
 80287e0:	e7b8      	b.n	8028754 <_strtod_l+0x2ac>
 80287e2:	2a6e      	cmp	r2, #110	@ 0x6e
 80287e4:	e7db      	b.n	802879e <_strtod_l+0x2f6>
 80287e6:	4988      	ldr	r1, [pc, #544]	@ (8028a08 <_strtod_l+0x560>)
 80287e8:	a811      	add	r0, sp, #68	@ 0x44
 80287ea:	f002 fc6b 	bl	802b0c4 <__match>
 80287ee:	2800      	cmp	r0, #0
 80287f0:	f43f aeb1 	beq.w	8028556 <_strtod_l+0xae>
 80287f4:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 80287f6:	4985      	ldr	r1, [pc, #532]	@ (8028a0c <_strtod_l+0x564>)
 80287f8:	3b01      	subs	r3, #1
 80287fa:	a811      	add	r0, sp, #68	@ 0x44
 80287fc:	9311      	str	r3, [sp, #68]	@ 0x44
 80287fe:	f002 fc61 	bl	802b0c4 <__match>
 8028802:	b910      	cbnz	r0, 802880a <_strtod_l+0x362>
 8028804:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028806:	3301      	adds	r3, #1
 8028808:	9311      	str	r3, [sp, #68]	@ 0x44
 802880a:	f8df b214 	ldr.w	fp, [pc, #532]	@ 8028a20 <_strtod_l+0x578>
 802880e:	f04f 0a00 	mov.w	sl, #0
 8028812:	e684      	b.n	802851e <_strtod_l+0x76>
 8028814:	487e      	ldr	r0, [pc, #504]	@ (8028a10 <_strtod_l+0x568>)
 8028816:	f001 fb7b 	bl	8029f10 <nan>
 802881a:	ec5b ab10 	vmov	sl, fp, d0
 802881e:	e67e      	b.n	802851e <_strtod_l+0x76>
 8028820:	ee07 9a90 	vmov	s15, r9
 8028824:	1be2      	subs	r2, r4, r7
 8028826:	eeb8 7b67 	vcvt.f64.u32	d7, s15
 802882a:	2d00      	cmp	r5, #0
 802882c:	bf08      	it	eq
 802882e:	461d      	moveq	r5, r3
 8028830:	2b10      	cmp	r3, #16
 8028832:	9209      	str	r2, [sp, #36]	@ 0x24
 8028834:	461a      	mov	r2, r3
 8028836:	bfa8      	it	ge
 8028838:	2210      	movge	r2, #16
 802883a:	2b09      	cmp	r3, #9
 802883c:	ec5b ab17 	vmov	sl, fp, d7
 8028840:	dc15      	bgt.n	802886e <_strtod_l+0x3c6>
 8028842:	1be1      	subs	r1, r4, r7
 8028844:	2900      	cmp	r1, #0
 8028846:	f43f ae6a 	beq.w	802851e <_strtod_l+0x76>
 802884a:	eba4 0107 	sub.w	r1, r4, r7
 802884e:	dd72      	ble.n	8028936 <_strtod_l+0x48e>
 8028850:	2916      	cmp	r1, #22
 8028852:	dc59      	bgt.n	8028908 <_strtod_l+0x460>
 8028854:	4b6f      	ldr	r3, [pc, #444]	@ (8028a14 <_strtod_l+0x56c>)
 8028856:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 8028858:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
 802885c:	ed93 7b00 	vldr	d7, [r3]
 8028860:	ec4b ab16 	vmov	d6, sl, fp
 8028864:	ee27 7b06 	vmul.f64	d7, d7, d6
 8028868:	ec5b ab17 	vmov	sl, fp, d7
 802886c:	e657      	b.n	802851e <_strtod_l+0x76>
 802886e:	4969      	ldr	r1, [pc, #420]	@ (8028a14 <_strtod_l+0x56c>)
 8028870:	eb01 01c2 	add.w	r1, r1, r2, lsl #3
 8028874:	ed11 5b12 	vldr	d5, [r1, #-72]	@ 0xffffffb8
 8028878:	ee06 6a90 	vmov	s13, r6
 802887c:	2b0f      	cmp	r3, #15
 802887e:	eeb8 6b66 	vcvt.f64.u32	d6, s13
 8028882:	eea7 6b05 	vfma.f64	d6, d7, d5
 8028886:	ec5b ab16 	vmov	sl, fp, d6
 802888a:	ddda      	ble.n	8028842 <_strtod_l+0x39a>
 802888c:	1a9a      	subs	r2, r3, r2
 802888e:	1be1      	subs	r1, r4, r7
 8028890:	440a      	add	r2, r1
 8028892:	2a00      	cmp	r2, #0
 8028894:	f340 8094 	ble.w	80289c0 <_strtod_l+0x518>
 8028898:	f012 000f 	ands.w	r0, r2, #15
 802889c:	d00a      	beq.n	80288b4 <_strtod_l+0x40c>
 802889e:	495d      	ldr	r1, [pc, #372]	@ (8028a14 <_strtod_l+0x56c>)
 80288a0:	eb01 01c0 	add.w	r1, r1, r0, lsl #3
 80288a4:	ed91 7b00 	vldr	d7, [r1]
 80288a8:	ec4b ab16 	vmov	d6, sl, fp
 80288ac:	ee27 7b06 	vmul.f64	d7, d7, d6
 80288b0:	ec5b ab17 	vmov	sl, fp, d7
 80288b4:	f032 020f 	bics.w	r2, r2, #15
 80288b8:	d073      	beq.n	80289a2 <_strtod_l+0x4fa>
 80288ba:	f5b2 7f9a 	cmp.w	r2, #308	@ 0x134
 80288be:	dd47      	ble.n	8028950 <_strtod_l+0x4a8>
 80288c0:	2400      	movs	r4, #0
 80288c2:	4625      	mov	r5, r4
 80288c4:	9407      	str	r4, [sp, #28]
 80288c6:	4626      	mov	r6, r4
 80288c8:	9a05      	ldr	r2, [sp, #20]
 80288ca:	f8df b154 	ldr.w	fp, [pc, #340]	@ 8028a20 <_strtod_l+0x578>
 80288ce:	2322      	movs	r3, #34	@ 0x22
 80288d0:	6013      	str	r3, [r2, #0]
 80288d2:	f04f 0a00 	mov.w	sl, #0
 80288d6:	9b07      	ldr	r3, [sp, #28]
 80288d8:	2b00      	cmp	r3, #0
 80288da:	f43f ae20 	beq.w	802851e <_strtod_l+0x76>
 80288de:	9912      	ldr	r1, [sp, #72]	@ 0x48
 80288e0:	9805      	ldr	r0, [sp, #20]
 80288e2:	f002 fcf1 	bl	802b2c8 <_Bfree>
 80288e6:	9805      	ldr	r0, [sp, #20]
 80288e8:	4631      	mov	r1, r6
 80288ea:	f002 fced 	bl	802b2c8 <_Bfree>
 80288ee:	9805      	ldr	r0, [sp, #20]
 80288f0:	4629      	mov	r1, r5
 80288f2:	f002 fce9 	bl	802b2c8 <_Bfree>
 80288f6:	9907      	ldr	r1, [sp, #28]
 80288f8:	9805      	ldr	r0, [sp, #20]
 80288fa:	f002 fce5 	bl	802b2c8 <_Bfree>
 80288fe:	9805      	ldr	r0, [sp, #20]
 8028900:	4621      	mov	r1, r4
 8028902:	f002 fce1 	bl	802b2c8 <_Bfree>
 8028906:	e60a      	b.n	802851e <_strtod_l+0x76>
 8028908:	f1c3 0125 	rsb	r1, r3, #37	@ 0x25
 802890c:	1be0      	subs	r0, r4, r7
 802890e:	4281      	cmp	r1, r0
 8028910:	dbbc      	blt.n	802888c <_strtod_l+0x3e4>
 8028912:	4a40      	ldr	r2, [pc, #256]	@ (8028a14 <_strtod_l+0x56c>)
 8028914:	f1c3 030f 	rsb	r3, r3, #15
 8028918:	eb02 01c3 	add.w	r1, r2, r3, lsl #3
 802891c:	ed91 7b00 	vldr	d7, [r1]
 8028920:	9909      	ldr	r1, [sp, #36]	@ 0x24
 8028922:	ec4b ab16 	vmov	d6, sl, fp
 8028926:	1acb      	subs	r3, r1, r3
 8028928:	eb02 02c3 	add.w	r2, r2, r3, lsl #3
 802892c:	ee27 7b06 	vmul.f64	d7, d7, d6
 8028930:	ed92 6b00 	vldr	d6, [r2]
 8028934:	e796      	b.n	8028864 <_strtod_l+0x3bc>
 8028936:	3116      	adds	r1, #22
 8028938:	dba8      	blt.n	802888c <_strtod_l+0x3e4>
 802893a:	4b36      	ldr	r3, [pc, #216]	@ (8028a14 <_strtod_l+0x56c>)
 802893c:	1b3c      	subs	r4, r7, r4
 802893e:	eb03 04c4 	add.w	r4, r3, r4, lsl #3
 8028942:	ed94 7b00 	vldr	d7, [r4]
 8028946:	ec4b ab16 	vmov	d6, sl, fp
 802894a:	ee86 7b07 	vdiv.f64	d7, d6, d7
 802894e:	e78b      	b.n	8028868 <_strtod_l+0x3c0>
 8028950:	2000      	movs	r0, #0
 8028952:	ec4b ab17 	vmov	d7, sl, fp
 8028956:	4e30      	ldr	r6, [pc, #192]	@ (8028a18 <_strtod_l+0x570>)
 8028958:	1112      	asrs	r2, r2, #4
 802895a:	4601      	mov	r1, r0
 802895c:	2a01      	cmp	r2, #1
 802895e:	dc23      	bgt.n	80289a8 <_strtod_l+0x500>
 8028960:	b108      	cbz	r0, 8028966 <_strtod_l+0x4be>
 8028962:	ec5b ab17 	vmov	sl, fp, d7
 8028966:	4a2c      	ldr	r2, [pc, #176]	@ (8028a18 <_strtod_l+0x570>)
 8028968:	482c      	ldr	r0, [pc, #176]	@ (8028a1c <_strtod_l+0x574>)
 802896a:	eb02 02c1 	add.w	r2, r2, r1, lsl #3
 802896e:	ed92 7b00 	vldr	d7, [r2]
 8028972:	f1ab 7b54 	sub.w	fp, fp, #55574528	@ 0x3500000
 8028976:	ec4b ab16 	vmov	d6, sl, fp
 802897a:	4a29      	ldr	r2, [pc, #164]	@ (8028a20 <_strtod_l+0x578>)
 802897c:	ee27 7b06 	vmul.f64	d7, d7, d6
 8028980:	ee17 1a90 	vmov	r1, s15
 8028984:	400a      	ands	r2, r1
 8028986:	4282      	cmp	r2, r0
 8028988:	ec5b ab17 	vmov	sl, fp, d7
 802898c:	d898      	bhi.n	80288c0 <_strtod_l+0x418>
 802898e:	f5a0 1080 	sub.w	r0, r0, #1048576	@ 0x100000
 8028992:	4282      	cmp	r2, r0
 8028994:	bf86      	itte	hi
 8028996:	f8df b08c 	ldrhi.w	fp, [pc, #140]	@ 8028a24 <_strtod_l+0x57c>
 802899a:	f04f 3aff 	movhi.w	sl, #4294967295	@ 0xffffffff
 802899e:	f101 7b54 	addls.w	fp, r1, #55574528	@ 0x3500000
 80289a2:	2200      	movs	r2, #0
 80289a4:	9206      	str	r2, [sp, #24]
 80289a6:	e076      	b.n	8028a96 <_strtod_l+0x5ee>
 80289a8:	f012 0f01 	tst.w	r2, #1
 80289ac:	d004      	beq.n	80289b8 <_strtod_l+0x510>
 80289ae:	ed96 6b00 	vldr	d6, [r6]
 80289b2:	2001      	movs	r0, #1
 80289b4:	ee27 7b06 	vmul.f64	d7, d7, d6
 80289b8:	3101      	adds	r1, #1
 80289ba:	1052      	asrs	r2, r2, #1
 80289bc:	3608      	adds	r6, #8
 80289be:	e7cd      	b.n	802895c <_strtod_l+0x4b4>
 80289c0:	d0ef      	beq.n	80289a2 <_strtod_l+0x4fa>
 80289c2:	4252      	negs	r2, r2
 80289c4:	f012 000f 	ands.w	r0, r2, #15
 80289c8:	d00a      	beq.n	80289e0 <_strtod_l+0x538>
 80289ca:	4912      	ldr	r1, [pc, #72]	@ (8028a14 <_strtod_l+0x56c>)
 80289cc:	eb01 01c0 	add.w	r1, r1, r0, lsl #3
 80289d0:	ed91 7b00 	vldr	d7, [r1]
 80289d4:	ec4b ab16 	vmov	d6, sl, fp
 80289d8:	ee86 7b07 	vdiv.f64	d7, d6, d7
 80289dc:	ec5b ab17 	vmov	sl, fp, d7
 80289e0:	1112      	asrs	r2, r2, #4
 80289e2:	d0de      	beq.n	80289a2 <_strtod_l+0x4fa>
 80289e4:	2a1f      	cmp	r2, #31
 80289e6:	dd1f      	ble.n	8028a28 <_strtod_l+0x580>
 80289e8:	2400      	movs	r4, #0
 80289ea:	4625      	mov	r5, r4
 80289ec:	9407      	str	r4, [sp, #28]
 80289ee:	4626      	mov	r6, r4
 80289f0:	9a05      	ldr	r2, [sp, #20]
 80289f2:	2322      	movs	r3, #34	@ 0x22
 80289f4:	f04f 0a00 	mov.w	sl, #0
 80289f8:	f04f 0b00 	mov.w	fp, #0
 80289fc:	6013      	str	r3, [r2, #0]
 80289fe:	e76a      	b.n	80288d6 <_strtod_l+0x42e>
 8028a00:	08030e4e 	.word	0x08030e4e
 8028a04:	08030cf0 	.word	0x08030cf0
 8028a08:	08030e46 	.word	0x08030e46
 8028a0c:	08030ebc 	.word	0x08030ebc
 8028a10:	08030eb8 	.word	0x08030eb8
 8028a14:	08031020 	.word	0x08031020
 8028a18:	08030ff8 	.word	0x08030ff8
 8028a1c:	7ca00000 	.word	0x7ca00000
 8028a20:	7ff00000 	.word	0x7ff00000
 8028a24:	7fefffff 	.word	0x7fefffff
 8028a28:	f012 0110 	ands.w	r1, r2, #16
 8028a2c:	bf18      	it	ne
 8028a2e:	216a      	movne	r1, #106	@ 0x6a
 8028a30:	9106      	str	r1, [sp, #24]
 8028a32:	ec4b ab17 	vmov	d7, sl, fp
 8028a36:	49b0      	ldr	r1, [pc, #704]	@ (8028cf8 <_strtod_l+0x850>)
 8028a38:	2000      	movs	r0, #0
 8028a3a:	07d6      	lsls	r6, r2, #31
 8028a3c:	d504      	bpl.n	8028a48 <_strtod_l+0x5a0>
 8028a3e:	ed91 6b00 	vldr	d6, [r1]
 8028a42:	2001      	movs	r0, #1
 8028a44:	ee27 7b06 	vmul.f64	d7, d7, d6
 8028a48:	1052      	asrs	r2, r2, #1
 8028a4a:	f101 0108 	add.w	r1, r1, #8
 8028a4e:	d1f4      	bne.n	8028a3a <_strtod_l+0x592>
 8028a50:	b108      	cbz	r0, 8028a56 <_strtod_l+0x5ae>
 8028a52:	ec5b ab17 	vmov	sl, fp, d7
 8028a56:	9a06      	ldr	r2, [sp, #24]
 8028a58:	b1b2      	cbz	r2, 8028a88 <_strtod_l+0x5e0>
 8028a5a:	f3cb 510a 	ubfx	r1, fp, #20, #11
 8028a5e:	f1c1 026b 	rsb	r2, r1, #107	@ 0x6b
 8028a62:	2a00      	cmp	r2, #0
 8028a64:	4658      	mov	r0, fp
 8028a66:	dd0f      	ble.n	8028a88 <_strtod_l+0x5e0>
 8028a68:	2a1f      	cmp	r2, #31
 8028a6a:	dd55      	ble.n	8028b18 <_strtod_l+0x670>
 8028a6c:	2a34      	cmp	r2, #52	@ 0x34
 8028a6e:	bfde      	ittt	le
 8028a70:	f04f 32ff 	movle.w	r2, #4294967295	@ 0xffffffff
 8028a74:	f1c1 014b 	rsble	r1, r1, #75	@ 0x4b
 8028a78:	408a      	lslle	r2, r1
 8028a7a:	f04f 0a00 	mov.w	sl, #0
 8028a7e:	bfcc      	ite	gt
 8028a80:	f04f 7b5c 	movgt.w	fp, #57671680	@ 0x3700000
 8028a84:	ea02 0b00 	andle.w	fp, r2, r0
 8028a88:	ec4b ab17 	vmov	d7, sl, fp
 8028a8c:	eeb5 7b40 	vcmp.f64	d7, #0.0
 8028a90:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028a94:	d0a8      	beq.n	80289e8 <_strtod_l+0x540>
 8028a96:	990a      	ldr	r1, [sp, #40]	@ 0x28
 8028a98:	9805      	ldr	r0, [sp, #20]
 8028a9a:	f8cd 9000 	str.w	r9, [sp]
 8028a9e:	462a      	mov	r2, r5
 8028aa0:	f002 fc7a 	bl	802b398 <__s2b>
 8028aa4:	9007      	str	r0, [sp, #28]
 8028aa6:	2800      	cmp	r0, #0
 8028aa8:	f43f af0a 	beq.w	80288c0 <_strtod_l+0x418>
 8028aac:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8028aae:	1b3f      	subs	r7, r7, r4
 8028ab0:	2b00      	cmp	r3, #0
 8028ab2:	bfb4      	ite	lt
 8028ab4:	463b      	movlt	r3, r7
 8028ab6:	2300      	movge	r3, #0
 8028ab8:	930a      	str	r3, [sp, #40]	@ 0x28
 8028aba:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8028abc:	ed9f bb8a 	vldr	d11, [pc, #552]	@ 8028ce8 <_strtod_l+0x840>
 8028ac0:	ea23 73e3 	bic.w	r3, r3, r3, asr #31
 8028ac4:	2400      	movs	r4, #0
 8028ac6:	930d      	str	r3, [sp, #52]	@ 0x34
 8028ac8:	4625      	mov	r5, r4
 8028aca:	9b07      	ldr	r3, [sp, #28]
 8028acc:	9805      	ldr	r0, [sp, #20]
 8028ace:	6859      	ldr	r1, [r3, #4]
 8028ad0:	f002 fbba 	bl	802b248 <_Balloc>
 8028ad4:	4606      	mov	r6, r0
 8028ad6:	2800      	cmp	r0, #0
 8028ad8:	f43f aef6 	beq.w	80288c8 <_strtod_l+0x420>
 8028adc:	9b07      	ldr	r3, [sp, #28]
 8028ade:	691a      	ldr	r2, [r3, #16]
 8028ae0:	ec4b ab19 	vmov	d9, sl, fp
 8028ae4:	3202      	adds	r2, #2
 8028ae6:	f103 010c 	add.w	r1, r3, #12
 8028aea:	0092      	lsls	r2, r2, #2
 8028aec:	300c      	adds	r0, #12
 8028aee:	f001 f9fe 	bl	8029eee <memcpy>
 8028af2:	eeb0 0b49 	vmov.f64	d0, d9
 8028af6:	9805      	ldr	r0, [sp, #20]
 8028af8:	aa14      	add	r2, sp, #80	@ 0x50
 8028afa:	a913      	add	r1, sp, #76	@ 0x4c
 8028afc:	f002 ff88 	bl	802ba10 <__d2b>
 8028b00:	9012      	str	r0, [sp, #72]	@ 0x48
 8028b02:	2800      	cmp	r0, #0
 8028b04:	f43f aee0 	beq.w	80288c8 <_strtod_l+0x420>
 8028b08:	9805      	ldr	r0, [sp, #20]
 8028b0a:	2101      	movs	r1, #1
 8028b0c:	f002 fcda 	bl	802b4c4 <__i2b>
 8028b10:	4605      	mov	r5, r0
 8028b12:	b940      	cbnz	r0, 8028b26 <_strtod_l+0x67e>
 8028b14:	2500      	movs	r5, #0
 8028b16:	e6d7      	b.n	80288c8 <_strtod_l+0x420>
 8028b18:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8028b1c:	fa01 f202 	lsl.w	r2, r1, r2
 8028b20:	ea02 0a0a 	and.w	sl, r2, sl
 8028b24:	e7b0      	b.n	8028a88 <_strtod_l+0x5e0>
 8028b26:	9f13      	ldr	r7, [sp, #76]	@ 0x4c
 8028b28:	9a14      	ldr	r2, [sp, #80]	@ 0x50
 8028b2a:	2f00      	cmp	r7, #0
 8028b2c:	bfab      	itete	ge
 8028b2e:	9b0a      	ldrge	r3, [sp, #40]	@ 0x28
 8028b30:	9b0d      	ldrlt	r3, [sp, #52]	@ 0x34
 8028b32:	f8dd 8034 	ldrge.w	r8, [sp, #52]	@ 0x34
 8028b36:	f8dd 9028 	ldrlt.w	r9, [sp, #40]	@ 0x28
 8028b3a:	bfac      	ite	ge
 8028b3c:	eb07 0903 	addge.w	r9, r7, r3
 8028b40:	eba3 0807 	sublt.w	r8, r3, r7
 8028b44:	9b06      	ldr	r3, [sp, #24]
 8028b46:	1aff      	subs	r7, r7, r3
 8028b48:	4417      	add	r7, r2
 8028b4a:	f1c2 0336 	rsb	r3, r2, #54	@ 0x36
 8028b4e:	4a6b      	ldr	r2, [pc, #428]	@ (8028cfc <_strtod_l+0x854>)
 8028b50:	3f01      	subs	r7, #1
 8028b52:	4297      	cmp	r7, r2
 8028b54:	da51      	bge.n	8028bfa <_strtod_l+0x752>
 8028b56:	1bd1      	subs	r1, r2, r7
 8028b58:	291f      	cmp	r1, #31
 8028b5a:	eba3 0301 	sub.w	r3, r3, r1
 8028b5e:	f04f 0201 	mov.w	r2, #1
 8028b62:	dc3e      	bgt.n	8028be2 <_strtod_l+0x73a>
 8028b64:	408a      	lsls	r2, r1
 8028b66:	920c      	str	r2, [sp, #48]	@ 0x30
 8028b68:	2200      	movs	r2, #0
 8028b6a:	920b      	str	r2, [sp, #44]	@ 0x2c
 8028b6c:	eb09 0703 	add.w	r7, r9, r3
 8028b70:	4498      	add	r8, r3
 8028b72:	9b06      	ldr	r3, [sp, #24]
 8028b74:	45b9      	cmp	r9, r7
 8028b76:	4498      	add	r8, r3
 8028b78:	464b      	mov	r3, r9
 8028b7a:	bfa8      	it	ge
 8028b7c:	463b      	movge	r3, r7
 8028b7e:	4543      	cmp	r3, r8
 8028b80:	bfa8      	it	ge
 8028b82:	4643      	movge	r3, r8
 8028b84:	2b00      	cmp	r3, #0
 8028b86:	bfc2      	ittt	gt
 8028b88:	1aff      	subgt	r7, r7, r3
 8028b8a:	eba8 0803 	subgt.w	r8, r8, r3
 8028b8e:	eba9 0903 	subgt.w	r9, r9, r3
 8028b92:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 8028b94:	2b00      	cmp	r3, #0
 8028b96:	dd16      	ble.n	8028bc6 <_strtod_l+0x71e>
 8028b98:	4629      	mov	r1, r5
 8028b9a:	9805      	ldr	r0, [sp, #20]
 8028b9c:	461a      	mov	r2, r3
 8028b9e:	f002 fd51 	bl	802b644 <__pow5mult>
 8028ba2:	4605      	mov	r5, r0
 8028ba4:	2800      	cmp	r0, #0
 8028ba6:	d0b5      	beq.n	8028b14 <_strtod_l+0x66c>
 8028ba8:	4601      	mov	r1, r0
 8028baa:	9a12      	ldr	r2, [sp, #72]	@ 0x48
 8028bac:	9805      	ldr	r0, [sp, #20]
 8028bae:	f002 fc9f 	bl	802b4f0 <__multiply>
 8028bb2:	900f      	str	r0, [sp, #60]	@ 0x3c
 8028bb4:	2800      	cmp	r0, #0
 8028bb6:	f43f ae87 	beq.w	80288c8 <_strtod_l+0x420>
 8028bba:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8028bbc:	9805      	ldr	r0, [sp, #20]
 8028bbe:	f002 fb83 	bl	802b2c8 <_Bfree>
 8028bc2:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 8028bc4:	9312      	str	r3, [sp, #72]	@ 0x48
 8028bc6:	2f00      	cmp	r7, #0
 8028bc8:	dc1b      	bgt.n	8028c02 <_strtod_l+0x75a>
 8028bca:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8028bcc:	2b00      	cmp	r3, #0
 8028bce:	dd21      	ble.n	8028c14 <_strtod_l+0x76c>
 8028bd0:	4631      	mov	r1, r6
 8028bd2:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 8028bd4:	9805      	ldr	r0, [sp, #20]
 8028bd6:	f002 fd35 	bl	802b644 <__pow5mult>
 8028bda:	4606      	mov	r6, r0
 8028bdc:	b9d0      	cbnz	r0, 8028c14 <_strtod_l+0x76c>
 8028bde:	2600      	movs	r6, #0
 8028be0:	e672      	b.n	80288c8 <_strtod_l+0x420>
 8028be2:	f1c7 477f 	rsb	r7, r7, #4278190080	@ 0xff000000
 8028be6:	f507 077f 	add.w	r7, r7, #16711680	@ 0xff0000
 8028bea:	f507 477b 	add.w	r7, r7, #64256	@ 0xfb00
 8028bee:	37e2      	adds	r7, #226	@ 0xe2
 8028bf0:	fa02 f107 	lsl.w	r1, r2, r7
 8028bf4:	910b      	str	r1, [sp, #44]	@ 0x2c
 8028bf6:	920c      	str	r2, [sp, #48]	@ 0x30
 8028bf8:	e7b8      	b.n	8028b6c <_strtod_l+0x6c4>
 8028bfa:	2200      	movs	r2, #0
 8028bfc:	920b      	str	r2, [sp, #44]	@ 0x2c
 8028bfe:	2201      	movs	r2, #1
 8028c00:	e7f9      	b.n	8028bf6 <_strtod_l+0x74e>
 8028c02:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8028c04:	9805      	ldr	r0, [sp, #20]
 8028c06:	463a      	mov	r2, r7
 8028c08:	f002 fd76 	bl	802b6f8 <__lshift>
 8028c0c:	9012      	str	r0, [sp, #72]	@ 0x48
 8028c0e:	2800      	cmp	r0, #0
 8028c10:	d1db      	bne.n	8028bca <_strtod_l+0x722>
 8028c12:	e659      	b.n	80288c8 <_strtod_l+0x420>
 8028c14:	f1b8 0f00 	cmp.w	r8, #0
 8028c18:	dd07      	ble.n	8028c2a <_strtod_l+0x782>
 8028c1a:	4631      	mov	r1, r6
 8028c1c:	9805      	ldr	r0, [sp, #20]
 8028c1e:	4642      	mov	r2, r8
 8028c20:	f002 fd6a 	bl	802b6f8 <__lshift>
 8028c24:	4606      	mov	r6, r0
 8028c26:	2800      	cmp	r0, #0
 8028c28:	d0d9      	beq.n	8028bde <_strtod_l+0x736>
 8028c2a:	f1b9 0f00 	cmp.w	r9, #0
 8028c2e:	dd08      	ble.n	8028c42 <_strtod_l+0x79a>
 8028c30:	4629      	mov	r1, r5
 8028c32:	9805      	ldr	r0, [sp, #20]
 8028c34:	464a      	mov	r2, r9
 8028c36:	f002 fd5f 	bl	802b6f8 <__lshift>
 8028c3a:	4605      	mov	r5, r0
 8028c3c:	2800      	cmp	r0, #0
 8028c3e:	f43f ae43 	beq.w	80288c8 <_strtod_l+0x420>
 8028c42:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8028c44:	9805      	ldr	r0, [sp, #20]
 8028c46:	4632      	mov	r2, r6
 8028c48:	f002 fdde 	bl	802b808 <__mdiff>
 8028c4c:	4604      	mov	r4, r0
 8028c4e:	2800      	cmp	r0, #0
 8028c50:	f43f ae3a 	beq.w	80288c8 <_strtod_l+0x420>
 8028c54:	2300      	movs	r3, #0
 8028c56:	f8d0 800c 	ldr.w	r8, [r0, #12]
 8028c5a:	60c3      	str	r3, [r0, #12]
 8028c5c:	4629      	mov	r1, r5
 8028c5e:	f002 fdb7 	bl	802b7d0 <__mcmp>
 8028c62:	2800      	cmp	r0, #0
 8028c64:	da4e      	bge.n	8028d04 <_strtod_l+0x85c>
 8028c66:	ea58 080a 	orrs.w	r8, r8, sl
 8028c6a:	d174      	bne.n	8028d56 <_strtod_l+0x8ae>
 8028c6c:	f3cb 0313 	ubfx	r3, fp, #0, #20
 8028c70:	2b00      	cmp	r3, #0
 8028c72:	d170      	bne.n	8028d56 <_strtod_l+0x8ae>
 8028c74:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 8028c78:	0d1b      	lsrs	r3, r3, #20
 8028c7a:	051b      	lsls	r3, r3, #20
 8028c7c:	f1b3 6fd6 	cmp.w	r3, #112197632	@ 0x6b00000
 8028c80:	d969      	bls.n	8028d56 <_strtod_l+0x8ae>
 8028c82:	6963      	ldr	r3, [r4, #20]
 8028c84:	b913      	cbnz	r3, 8028c8c <_strtod_l+0x7e4>
 8028c86:	6923      	ldr	r3, [r4, #16]
 8028c88:	2b01      	cmp	r3, #1
 8028c8a:	dd64      	ble.n	8028d56 <_strtod_l+0x8ae>
 8028c8c:	4621      	mov	r1, r4
 8028c8e:	2201      	movs	r2, #1
 8028c90:	9805      	ldr	r0, [sp, #20]
 8028c92:	f002 fd31 	bl	802b6f8 <__lshift>
 8028c96:	4629      	mov	r1, r5
 8028c98:	4604      	mov	r4, r0
 8028c9a:	f002 fd99 	bl	802b7d0 <__mcmp>
 8028c9e:	2800      	cmp	r0, #0
 8028ca0:	dd59      	ble.n	8028d56 <_strtod_l+0x8ae>
 8028ca2:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 8028ca6:	9a06      	ldr	r2, [sp, #24]
 8028ca8:	0d1b      	lsrs	r3, r3, #20
 8028caa:	051b      	lsls	r3, r3, #20
 8028cac:	2a00      	cmp	r2, #0
 8028cae:	d070      	beq.n	8028d92 <_strtod_l+0x8ea>
 8028cb0:	f1b3 6fd6 	cmp.w	r3, #112197632	@ 0x6b00000
 8028cb4:	d86d      	bhi.n	8028d92 <_strtod_l+0x8ea>
 8028cb6:	f1b3 7f5c 	cmp.w	r3, #57671680	@ 0x3700000
 8028cba:	f67f ae99 	bls.w	80289f0 <_strtod_l+0x548>
 8028cbe:	ed9f 7b0c 	vldr	d7, [pc, #48]	@ 8028cf0 <_strtod_l+0x848>
 8028cc2:	ec4b ab16 	vmov	d6, sl, fp
 8028cc6:	4b0e      	ldr	r3, [pc, #56]	@ (8028d00 <_strtod_l+0x858>)
 8028cc8:	ee26 7b07 	vmul.f64	d7, d6, d7
 8028ccc:	ee17 2a90 	vmov	r2, s15
 8028cd0:	4013      	ands	r3, r2
 8028cd2:	ec5b ab17 	vmov	sl, fp, d7
 8028cd6:	2b00      	cmp	r3, #0
 8028cd8:	f47f ae01 	bne.w	80288de <_strtod_l+0x436>
 8028cdc:	9a05      	ldr	r2, [sp, #20]
 8028cde:	2322      	movs	r3, #34	@ 0x22
 8028ce0:	6013      	str	r3, [r2, #0]
 8028ce2:	e5fc      	b.n	80288de <_strtod_l+0x436>
 8028ce4:	f3af 8000 	nop.w
 8028ce8:	ffc00000 	.word	0xffc00000
 8028cec:	41dfffff 	.word	0x41dfffff
 8028cf0:	00000000 	.word	0x00000000
 8028cf4:	39500000 	.word	0x39500000
 8028cf8:	08030d18 	.word	0x08030d18
 8028cfc:	fffffc02 	.word	0xfffffc02
 8028d00:	7ff00000 	.word	0x7ff00000
 8028d04:	46d9      	mov	r9, fp
 8028d06:	d15d      	bne.n	8028dc4 <_strtod_l+0x91c>
 8028d08:	f3cb 0313 	ubfx	r3, fp, #0, #20
 8028d0c:	f1b8 0f00 	cmp.w	r8, #0
 8028d10:	d02a      	beq.n	8028d68 <_strtod_l+0x8c0>
 8028d12:	4aab      	ldr	r2, [pc, #684]	@ (8028fc0 <_strtod_l+0xb18>)
 8028d14:	4293      	cmp	r3, r2
 8028d16:	d12a      	bne.n	8028d6e <_strtod_l+0x8c6>
 8028d18:	9b06      	ldr	r3, [sp, #24]
 8028d1a:	4652      	mov	r2, sl
 8028d1c:	b1fb      	cbz	r3, 8028d5e <_strtod_l+0x8b6>
 8028d1e:	4ba9      	ldr	r3, [pc, #676]	@ (8028fc4 <_strtod_l+0xb1c>)
 8028d20:	ea0b 0303 	and.w	r3, fp, r3
 8028d24:	f1b3 6fd4 	cmp.w	r3, #111149056	@ 0x6a00000
 8028d28:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8028d2c:	d81a      	bhi.n	8028d64 <_strtod_l+0x8bc>
 8028d2e:	0d1b      	lsrs	r3, r3, #20
 8028d30:	f1c3 036b 	rsb	r3, r3, #107	@ 0x6b
 8028d34:	fa01 f303 	lsl.w	r3, r1, r3
 8028d38:	429a      	cmp	r2, r3
 8028d3a:	d118      	bne.n	8028d6e <_strtod_l+0x8c6>
 8028d3c:	4ba2      	ldr	r3, [pc, #648]	@ (8028fc8 <_strtod_l+0xb20>)
 8028d3e:	4599      	cmp	r9, r3
 8028d40:	d102      	bne.n	8028d48 <_strtod_l+0x8a0>
 8028d42:	3201      	adds	r2, #1
 8028d44:	f43f adc0 	beq.w	80288c8 <_strtod_l+0x420>
 8028d48:	4b9e      	ldr	r3, [pc, #632]	@ (8028fc4 <_strtod_l+0xb1c>)
 8028d4a:	ea09 0303 	and.w	r3, r9, r3
 8028d4e:	f503 1b80 	add.w	fp, r3, #1048576	@ 0x100000
 8028d52:	f04f 0a00 	mov.w	sl, #0
 8028d56:	9b06      	ldr	r3, [sp, #24]
 8028d58:	2b00      	cmp	r3, #0
 8028d5a:	d1b0      	bne.n	8028cbe <_strtod_l+0x816>
 8028d5c:	e5bf      	b.n	80288de <_strtod_l+0x436>
 8028d5e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028d62:	e7e9      	b.n	8028d38 <_strtod_l+0x890>
 8028d64:	460b      	mov	r3, r1
 8028d66:	e7e7      	b.n	8028d38 <_strtod_l+0x890>
 8028d68:	ea53 030a 	orrs.w	r3, r3, sl
 8028d6c:	d099      	beq.n	8028ca2 <_strtod_l+0x7fa>
 8028d6e:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 8028d70:	b1c3      	cbz	r3, 8028da4 <_strtod_l+0x8fc>
 8028d72:	ea13 0f09 	tst.w	r3, r9
 8028d76:	d0ee      	beq.n	8028d56 <_strtod_l+0x8ae>
 8028d78:	9a06      	ldr	r2, [sp, #24]
 8028d7a:	4650      	mov	r0, sl
 8028d7c:	4659      	mov	r1, fp
 8028d7e:	f1b8 0f00 	cmp.w	r8, #0
 8028d82:	d013      	beq.n	8028dac <_strtod_l+0x904>
 8028d84:	f7ff fb74 	bl	8028470 <sulp>
 8028d88:	ee39 7b00 	vadd.f64	d7, d9, d0
 8028d8c:	ec5b ab17 	vmov	sl, fp, d7
 8028d90:	e7e1      	b.n	8028d56 <_strtod_l+0x8ae>
 8028d92:	f5a3 1380 	sub.w	r3, r3, #1048576	@ 0x100000
 8028d96:	ea6f 5b13 	mvn.w	fp, r3, lsr #20
 8028d9a:	ea6f 5b0b 	mvn.w	fp, fp, lsl #20
 8028d9e:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 8028da2:	e7d8      	b.n	8028d56 <_strtod_l+0x8ae>
 8028da4:	9b0c      	ldr	r3, [sp, #48]	@ 0x30
 8028da6:	ea13 0f0a 	tst.w	r3, sl
 8028daa:	e7e4      	b.n	8028d76 <_strtod_l+0x8ce>
 8028dac:	f7ff fb60 	bl	8028470 <sulp>
 8028db0:	ee39 0b40 	vsub.f64	d0, d9, d0
 8028db4:	eeb5 0b40 	vcmp.f64	d0, #0.0
 8028db8:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028dbc:	ec5b ab10 	vmov	sl, fp, d0
 8028dc0:	d1c9      	bne.n	8028d56 <_strtod_l+0x8ae>
 8028dc2:	e615      	b.n	80289f0 <_strtod_l+0x548>
 8028dc4:	4629      	mov	r1, r5
 8028dc6:	4620      	mov	r0, r4
 8028dc8:	f002 fe7a 	bl	802bac0 <__ratio>
 8028dcc:	eeb0 7b00 	vmov.f64	d7, #0	@ 0x40000000  2.0
 8028dd0:	eeb4 0bc7 	vcmpe.f64	d0, d7
 8028dd4:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028dd8:	d85d      	bhi.n	8028e96 <_strtod_l+0x9ee>
 8028dda:	f1b8 0f00 	cmp.w	r8, #0
 8028dde:	d164      	bne.n	8028eaa <_strtod_l+0xa02>
 8028de0:	f1ba 0f00 	cmp.w	sl, #0
 8028de4:	d14b      	bne.n	8028e7e <_strtod_l+0x9d6>
 8028de6:	f3cb 0313 	ubfx	r3, fp, #0, #20
 8028dea:	eeb7 8b00 	vmov.f64	d8, #112	@ 0x3f800000  1.0
 8028dee:	2b00      	cmp	r3, #0
 8028df0:	d160      	bne.n	8028eb4 <_strtod_l+0xa0c>
 8028df2:	eeb4 0bc8 	vcmpe.f64	d0, d8
 8028df6:	eeb6 8b00 	vmov.f64	d8, #96	@ 0x3f000000  0.5
 8028dfa:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028dfe:	d401      	bmi.n	8028e04 <_strtod_l+0x95c>
 8028e00:	ee20 8b08 	vmul.f64	d8, d0, d8
 8028e04:	eeb1 ab48 	vneg.f64	d10, d8
 8028e08:	486e      	ldr	r0, [pc, #440]	@ (8028fc4 <_strtod_l+0xb1c>)
 8028e0a:	4970      	ldr	r1, [pc, #448]	@ (8028fcc <_strtod_l+0xb24>)
 8028e0c:	ea09 0700 	and.w	r7, r9, r0
 8028e10:	428f      	cmp	r7, r1
 8028e12:	ec53 2b1a 	vmov	r2, r3, d10
 8028e16:	d17d      	bne.n	8028f14 <_strtod_l+0xa6c>
 8028e18:	f1a9 7b54 	sub.w	fp, r9, #55574528	@ 0x3500000
 8028e1c:	ec4b ab1c 	vmov	d12, sl, fp
 8028e20:	eeb0 0b4c 	vmov.f64	d0, d12
 8028e24:	f002 fd84 	bl	802b930 <__ulp>
 8028e28:	4866      	ldr	r0, [pc, #408]	@ (8028fc4 <_strtod_l+0xb1c>)
 8028e2a:	eea0 cb0a 	vfma.f64	d12, d0, d10
 8028e2e:	ee1c 3a90 	vmov	r3, s25
 8028e32:	4a67      	ldr	r2, [pc, #412]	@ (8028fd0 <_strtod_l+0xb28>)
 8028e34:	ea03 0100 	and.w	r1, r3, r0
 8028e38:	4291      	cmp	r1, r2
 8028e3a:	ec5b ab1c 	vmov	sl, fp, d12
 8028e3e:	d93c      	bls.n	8028eba <_strtod_l+0xa12>
 8028e40:	ee19 2a90 	vmov	r2, s19
 8028e44:	4b60      	ldr	r3, [pc, #384]	@ (8028fc8 <_strtod_l+0xb20>)
 8028e46:	429a      	cmp	r2, r3
 8028e48:	d104      	bne.n	8028e54 <_strtod_l+0x9ac>
 8028e4a:	ee19 3a10 	vmov	r3, s18
 8028e4e:	3301      	adds	r3, #1
 8028e50:	f43f ad3a 	beq.w	80288c8 <_strtod_l+0x420>
 8028e54:	f8df b170 	ldr.w	fp, [pc, #368]	@ 8028fc8 <_strtod_l+0xb20>
 8028e58:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 8028e5c:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8028e5e:	9805      	ldr	r0, [sp, #20]
 8028e60:	f002 fa32 	bl	802b2c8 <_Bfree>
 8028e64:	9805      	ldr	r0, [sp, #20]
 8028e66:	4631      	mov	r1, r6
 8028e68:	f002 fa2e 	bl	802b2c8 <_Bfree>
 8028e6c:	9805      	ldr	r0, [sp, #20]
 8028e6e:	4629      	mov	r1, r5
 8028e70:	f002 fa2a 	bl	802b2c8 <_Bfree>
 8028e74:	9805      	ldr	r0, [sp, #20]
 8028e76:	4621      	mov	r1, r4
 8028e78:	f002 fa26 	bl	802b2c8 <_Bfree>
 8028e7c:	e625      	b.n	8028aca <_strtod_l+0x622>
 8028e7e:	f1ba 0f01 	cmp.w	sl, #1
 8028e82:	d103      	bne.n	8028e8c <_strtod_l+0x9e4>
 8028e84:	f1bb 0f00 	cmp.w	fp, #0
 8028e88:	f43f adb2 	beq.w	80289f0 <_strtod_l+0x548>
 8028e8c:	eebf ab00 	vmov.f64	d10, #240	@ 0xbf800000 -1.0
 8028e90:	eeb7 8b00 	vmov.f64	d8, #112	@ 0x3f800000  1.0
 8028e94:	e7b8      	b.n	8028e08 <_strtod_l+0x960>
 8028e96:	eeb6 8b00 	vmov.f64	d8, #96	@ 0x3f000000  0.5
 8028e9a:	ee20 8b08 	vmul.f64	d8, d0, d8
 8028e9e:	f1b8 0f00 	cmp.w	r8, #0
 8028ea2:	d0af      	beq.n	8028e04 <_strtod_l+0x95c>
 8028ea4:	eeb0 ab48 	vmov.f64	d10, d8
 8028ea8:	e7ae      	b.n	8028e08 <_strtod_l+0x960>
 8028eaa:	eeb7 ab00 	vmov.f64	d10, #112	@ 0x3f800000  1.0
 8028eae:	eeb0 8b4a 	vmov.f64	d8, d10
 8028eb2:	e7a9      	b.n	8028e08 <_strtod_l+0x960>
 8028eb4:	eebf ab00 	vmov.f64	d10, #240	@ 0xbf800000 -1.0
 8028eb8:	e7a6      	b.n	8028e08 <_strtod_l+0x960>
 8028eba:	f103 7b54 	add.w	fp, r3, #55574528	@ 0x3500000
 8028ebe:	9b06      	ldr	r3, [sp, #24]
 8028ec0:	46d9      	mov	r9, fp
 8028ec2:	2b00      	cmp	r3, #0
 8028ec4:	d1ca      	bne.n	8028e5c <_strtod_l+0x9b4>
 8028ec6:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 8028eca:	0d1b      	lsrs	r3, r3, #20
 8028ecc:	051b      	lsls	r3, r3, #20
 8028ece:	429f      	cmp	r7, r3
 8028ed0:	d1c4      	bne.n	8028e5c <_strtod_l+0x9b4>
 8028ed2:	ec51 0b18 	vmov	r0, r1, d8
 8028ed6:	f7d7 fc3f 	bl	8000758 <__aeabi_d2lz>
 8028eda:	f7d7 fbf7 	bl	80006cc <__aeabi_l2d>
 8028ede:	f3cb 0913 	ubfx	r9, fp, #0, #20
 8028ee2:	ec41 0b17 	vmov	d7, r0, r1
 8028ee6:	ea49 090a 	orr.w	r9, r9, sl
 8028eea:	ea59 0908 	orrs.w	r9, r9, r8
 8028eee:	ee38 8b47 	vsub.f64	d8, d8, d7
 8028ef2:	d03c      	beq.n	8028f6e <_strtod_l+0xac6>
 8028ef4:	ed9f 7b2c 	vldr	d7, [pc, #176]	@ 8028fa8 <_strtod_l+0xb00>
 8028ef8:	eeb4 8bc7 	vcmpe.f64	d8, d7
 8028efc:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028f00:	f53f aced 	bmi.w	80288de <_strtod_l+0x436>
 8028f04:	ed9f 7b2a 	vldr	d7, [pc, #168]	@ 8028fb0 <_strtod_l+0xb08>
 8028f08:	eeb4 8bc7 	vcmpe.f64	d8, d7
 8028f0c:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028f10:	dda4      	ble.n	8028e5c <_strtod_l+0x9b4>
 8028f12:	e4e4      	b.n	80288de <_strtod_l+0x436>
 8028f14:	9906      	ldr	r1, [sp, #24]
 8028f16:	b1e1      	cbz	r1, 8028f52 <_strtod_l+0xaaa>
 8028f18:	f1b7 6fd4 	cmp.w	r7, #111149056	@ 0x6a00000
 8028f1c:	d819      	bhi.n	8028f52 <_strtod_l+0xaaa>
 8028f1e:	eeb4 8bcb 	vcmpe.f64	d8, d11
 8028f22:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028f26:	d811      	bhi.n	8028f4c <_strtod_l+0xaa4>
 8028f28:	eebc 8bc8 	vcvt.u32.f64	s16, d8
 8028f2c:	ee18 3a10 	vmov	r3, s16
 8028f30:	2b01      	cmp	r3, #1
 8028f32:	bf38      	it	cc
 8028f34:	2301      	movcc	r3, #1
 8028f36:	ee08 3a10 	vmov	s16, r3
 8028f3a:	eeb8 8b48 	vcvt.f64.u32	d8, s16
 8028f3e:	f1b8 0f00 	cmp.w	r8, #0
 8028f42:	d111      	bne.n	8028f68 <_strtod_l+0xac0>
 8028f44:	eeb1 7b48 	vneg.f64	d7, d8
 8028f48:	ec53 2b17 	vmov	r2, r3, d7
 8028f4c:	f103 61d6 	add.w	r1, r3, #112197632	@ 0x6b00000
 8028f50:	1bcb      	subs	r3, r1, r7
 8028f52:	eeb0 0b49 	vmov.f64	d0, d9
 8028f56:	ec43 2b1a 	vmov	d10, r2, r3
 8028f5a:	f002 fce9 	bl	802b930 <__ulp>
 8028f5e:	eeaa 9b00 	vfma.f64	d9, d10, d0
 8028f62:	ec5b ab19 	vmov	sl, fp, d9
 8028f66:	e7aa      	b.n	8028ebe <_strtod_l+0xa16>
 8028f68:	eeb0 7b48 	vmov.f64	d7, d8
 8028f6c:	e7ec      	b.n	8028f48 <_strtod_l+0xaa0>
 8028f6e:	ed9f 7b12 	vldr	d7, [pc, #72]	@ 8028fb8 <_strtod_l+0xb10>
 8028f72:	eeb4 8bc7 	vcmpe.f64	d8, d7
 8028f76:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028f7a:	f57f af6f 	bpl.w	8028e5c <_strtod_l+0x9b4>
 8028f7e:	e4ae      	b.n	80288de <_strtod_l+0x436>
 8028f80:	2300      	movs	r3, #0
 8028f82:	9308      	str	r3, [sp, #32]
 8028f84:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 8028f86:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028f88:	6013      	str	r3, [r2, #0]
 8028f8a:	f7ff bacc 	b.w	8028526 <_strtod_l+0x7e>
 8028f8e:	2a65      	cmp	r2, #101	@ 0x65
 8028f90:	f43f abbc 	beq.w	802870c <_strtod_l+0x264>
 8028f94:	2a45      	cmp	r2, #69	@ 0x45
 8028f96:	f43f abb9 	beq.w	802870c <_strtod_l+0x264>
 8028f9a:	2301      	movs	r3, #1
 8028f9c:	9306      	str	r3, [sp, #24]
 8028f9e:	f7ff bbf0 	b.w	8028782 <_strtod_l+0x2da>
 8028fa2:	bf00      	nop
 8028fa4:	f3af 8000 	nop.w
 8028fa8:	94a03595 	.word	0x94a03595
 8028fac:	3fdfffff 	.word	0x3fdfffff
 8028fb0:	35afe535 	.word	0x35afe535
 8028fb4:	3fe00000 	.word	0x3fe00000
 8028fb8:	94a03595 	.word	0x94a03595
 8028fbc:	3fcfffff 	.word	0x3fcfffff
 8028fc0:	000fffff 	.word	0x000fffff
 8028fc4:	7ff00000 	.word	0x7ff00000
 8028fc8:	7fefffff 	.word	0x7fefffff
 8028fcc:	7fe00000 	.word	0x7fe00000
 8028fd0:	7c9fffff 	.word	0x7c9fffff

08028fd4 <strtod>:
 8028fd4:	460a      	mov	r2, r1
 8028fd6:	4601      	mov	r1, r0
 8028fd8:	4802      	ldr	r0, [pc, #8]	@ (8028fe4 <strtod+0x10>)
 8028fda:	4b03      	ldr	r3, [pc, #12]	@ (8028fe8 <strtod+0x14>)
 8028fdc:	6800      	ldr	r0, [r0, #0]
 8028fde:	f7ff ba63 	b.w	80284a8 <_strtod_l>
 8028fe2:	bf00      	nop
 8028fe4:	240001d4 	.word	0x240001d4
 8028fe8:	24000068 	.word	0x24000068

08028fec <__cvt>:
 8028fec:	b5f0      	push	{r4, r5, r6, r7, lr}
 8028fee:	ed2d 8b02 	vpush	{d8}
 8028ff2:	eeb0 8b40 	vmov.f64	d8, d0
 8028ff6:	b085      	sub	sp, #20
 8028ff8:	4617      	mov	r7, r2
 8028ffa:	9d0d      	ldr	r5, [sp, #52]	@ 0x34
 8028ffc:	9e0c      	ldr	r6, [sp, #48]	@ 0x30
 8028ffe:	ee18 2a90 	vmov	r2, s17
 8029002:	f025 0520 	bic.w	r5, r5, #32
 8029006:	2a00      	cmp	r2, #0
 8029008:	bfb6      	itet	lt
 802900a:	222d      	movlt	r2, #45	@ 0x2d
 802900c:	2200      	movge	r2, #0
 802900e:	eeb1 8b40 	vneglt.f64	d8, d0
 8029012:	2d46      	cmp	r5, #70	@ 0x46
 8029014:	460c      	mov	r4, r1
 8029016:	701a      	strb	r2, [r3, #0]
 8029018:	d004      	beq.n	8029024 <__cvt+0x38>
 802901a:	2d45      	cmp	r5, #69	@ 0x45
 802901c:	d100      	bne.n	8029020 <__cvt+0x34>
 802901e:	3401      	adds	r4, #1
 8029020:	2102      	movs	r1, #2
 8029022:	e000      	b.n	8029026 <__cvt+0x3a>
 8029024:	2103      	movs	r1, #3
 8029026:	ab03      	add	r3, sp, #12
 8029028:	9301      	str	r3, [sp, #4]
 802902a:	ab02      	add	r3, sp, #8
 802902c:	9300      	str	r3, [sp, #0]
 802902e:	4622      	mov	r2, r4
 8029030:	4633      	mov	r3, r6
 8029032:	eeb0 0b48 	vmov.f64	d0, d8
 8029036:	f001 f81b 	bl	802a070 <_dtoa_r>
 802903a:	2d47      	cmp	r5, #71	@ 0x47
 802903c:	d114      	bne.n	8029068 <__cvt+0x7c>
 802903e:	07fb      	lsls	r3, r7, #31
 8029040:	d50a      	bpl.n	8029058 <__cvt+0x6c>
 8029042:	1902      	adds	r2, r0, r4
 8029044:	eeb5 8b40 	vcmp.f64	d8, #0.0
 8029048:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802904c:	bf08      	it	eq
 802904e:	9203      	streq	r2, [sp, #12]
 8029050:	2130      	movs	r1, #48	@ 0x30
 8029052:	9b03      	ldr	r3, [sp, #12]
 8029054:	4293      	cmp	r3, r2
 8029056:	d319      	bcc.n	802908c <__cvt+0xa0>
 8029058:	9b03      	ldr	r3, [sp, #12]
 802905a:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802905c:	1a1b      	subs	r3, r3, r0
 802905e:	6013      	str	r3, [r2, #0]
 8029060:	b005      	add	sp, #20
 8029062:	ecbd 8b02 	vpop	{d8}
 8029066:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8029068:	2d46      	cmp	r5, #70	@ 0x46
 802906a:	eb00 0204 	add.w	r2, r0, r4
 802906e:	d1e9      	bne.n	8029044 <__cvt+0x58>
 8029070:	7803      	ldrb	r3, [r0, #0]
 8029072:	2b30      	cmp	r3, #48	@ 0x30
 8029074:	d107      	bne.n	8029086 <__cvt+0x9a>
 8029076:	eeb5 8b40 	vcmp.f64	d8, #0.0
 802907a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802907e:	bf1c      	itt	ne
 8029080:	f1c4 0401 	rsbne	r4, r4, #1
 8029084:	6034      	strne	r4, [r6, #0]
 8029086:	6833      	ldr	r3, [r6, #0]
 8029088:	441a      	add	r2, r3
 802908a:	e7db      	b.n	8029044 <__cvt+0x58>
 802908c:	1c5c      	adds	r4, r3, #1
 802908e:	9403      	str	r4, [sp, #12]
 8029090:	7019      	strb	r1, [r3, #0]
 8029092:	e7de      	b.n	8029052 <__cvt+0x66>

08029094 <__exponent>:
 8029094:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 8029096:	2900      	cmp	r1, #0
 8029098:	bfba      	itte	lt
 802909a:	4249      	neglt	r1, r1
 802909c:	232d      	movlt	r3, #45	@ 0x2d
 802909e:	232b      	movge	r3, #43	@ 0x2b
 80290a0:	2909      	cmp	r1, #9
 80290a2:	7002      	strb	r2, [r0, #0]
 80290a4:	7043      	strb	r3, [r0, #1]
 80290a6:	dd29      	ble.n	80290fc <__exponent+0x68>
 80290a8:	f10d 0307 	add.w	r3, sp, #7
 80290ac:	461d      	mov	r5, r3
 80290ae:	270a      	movs	r7, #10
 80290b0:	461a      	mov	r2, r3
 80290b2:	fbb1 f6f7 	udiv	r6, r1, r7
 80290b6:	fb07 1416 	mls	r4, r7, r6, r1
 80290ba:	3430      	adds	r4, #48	@ 0x30
 80290bc:	f802 4c01 	strb.w	r4, [r2, #-1]
 80290c0:	460c      	mov	r4, r1
 80290c2:	2c63      	cmp	r4, #99	@ 0x63
 80290c4:	f103 33ff 	add.w	r3, r3, #4294967295	@ 0xffffffff
 80290c8:	4631      	mov	r1, r6
 80290ca:	dcf1      	bgt.n	80290b0 <__exponent+0x1c>
 80290cc:	3130      	adds	r1, #48	@ 0x30
 80290ce:	1e94      	subs	r4, r2, #2
 80290d0:	f803 1c01 	strb.w	r1, [r3, #-1]
 80290d4:	1c41      	adds	r1, r0, #1
 80290d6:	4623      	mov	r3, r4
 80290d8:	42ab      	cmp	r3, r5
 80290da:	d30a      	bcc.n	80290f2 <__exponent+0x5e>
 80290dc:	f10d 0309 	add.w	r3, sp, #9
 80290e0:	1a9b      	subs	r3, r3, r2
 80290e2:	42ac      	cmp	r4, r5
 80290e4:	bf88      	it	hi
 80290e6:	2300      	movhi	r3, #0
 80290e8:	3302      	adds	r3, #2
 80290ea:	4403      	add	r3, r0
 80290ec:	1a18      	subs	r0, r3, r0
 80290ee:	b003      	add	sp, #12
 80290f0:	bdf0      	pop	{r4, r5, r6, r7, pc}
 80290f2:	f813 6b01 	ldrb.w	r6, [r3], #1
 80290f6:	f801 6f01 	strb.w	r6, [r1, #1]!
 80290fa:	e7ed      	b.n	80290d8 <__exponent+0x44>
 80290fc:	2330      	movs	r3, #48	@ 0x30
 80290fe:	3130      	adds	r1, #48	@ 0x30
 8029100:	7083      	strb	r3, [r0, #2]
 8029102:	70c1      	strb	r1, [r0, #3]
 8029104:	1d03      	adds	r3, r0, #4
 8029106:	e7f1      	b.n	80290ec <__exponent+0x58>

08029108 <_printf_float>:
 8029108:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802910c:	b08d      	sub	sp, #52	@ 0x34
 802910e:	460c      	mov	r4, r1
 8029110:	f8dd 8058 	ldr.w	r8, [sp, #88]	@ 0x58
 8029114:	4616      	mov	r6, r2
 8029116:	461f      	mov	r7, r3
 8029118:	4605      	mov	r5, r0
 802911a:	f000 fe0b 	bl	8029d34 <_localeconv_r>
 802911e:	f8d0 b000 	ldr.w	fp, [r0]
 8029122:	4658      	mov	r0, fp
 8029124:	f7d7 f93c 	bl	80003a0 <strlen>
 8029128:	2300      	movs	r3, #0
 802912a:	930a      	str	r3, [sp, #40]	@ 0x28
 802912c:	f8d8 3000 	ldr.w	r3, [r8]
 8029130:	f894 9018 	ldrb.w	r9, [r4, #24]
 8029134:	6822      	ldr	r2, [r4, #0]
 8029136:	9005      	str	r0, [sp, #20]
 8029138:	3307      	adds	r3, #7
 802913a:	f023 0307 	bic.w	r3, r3, #7
 802913e:	f103 0108 	add.w	r1, r3, #8
 8029142:	f8c8 1000 	str.w	r1, [r8]
 8029146:	ed93 0b00 	vldr	d0, [r3]
 802914a:	ed9f 6b97 	vldr	d6, [pc, #604]	@ 80293a8 <_printf_float+0x2a0>
 802914e:	eeb0 7bc0 	vabs.f64	d7, d0
 8029152:	eeb4 7b46 	vcmp.f64	d7, d6
 8029156:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802915a:	ed84 0b12 	vstr	d0, [r4, #72]	@ 0x48
 802915e:	dd24      	ble.n	80291aa <_printf_float+0xa2>
 8029160:	eeb5 0bc0 	vcmpe.f64	d0, #0.0
 8029164:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029168:	d502      	bpl.n	8029170 <_printf_float+0x68>
 802916a:	232d      	movs	r3, #45	@ 0x2d
 802916c:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 8029170:	498f      	ldr	r1, [pc, #572]	@ (80293b0 <_printf_float+0x2a8>)
 8029172:	4b90      	ldr	r3, [pc, #576]	@ (80293b4 <_printf_float+0x2ac>)
 8029174:	f1b9 0f47 	cmp.w	r9, #71	@ 0x47
 8029178:	bf94      	ite	ls
 802917a:	4688      	movls	r8, r1
 802917c:	4698      	movhi	r8, r3
 802917e:	f022 0204 	bic.w	r2, r2, #4
 8029182:	2303      	movs	r3, #3
 8029184:	6123      	str	r3, [r4, #16]
 8029186:	6022      	str	r2, [r4, #0]
 8029188:	f04f 0a00 	mov.w	sl, #0
 802918c:	9700      	str	r7, [sp, #0]
 802918e:	4633      	mov	r3, r6
 8029190:	aa0b      	add	r2, sp, #44	@ 0x2c
 8029192:	4621      	mov	r1, r4
 8029194:	4628      	mov	r0, r5
 8029196:	f000 f9d1 	bl	802953c <_printf_common>
 802919a:	3001      	adds	r0, #1
 802919c:	f040 8089 	bne.w	80292b2 <_printf_float+0x1aa>
 80291a0:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 80291a4:	b00d      	add	sp, #52	@ 0x34
 80291a6:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 80291aa:	eeb4 0b40 	vcmp.f64	d0, d0
 80291ae:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 80291b2:	d709      	bvc.n	80291c8 <_printf_float+0xc0>
 80291b4:	ee10 3a90 	vmov	r3, s1
 80291b8:	2b00      	cmp	r3, #0
 80291ba:	bfbc      	itt	lt
 80291bc:	232d      	movlt	r3, #45	@ 0x2d
 80291be:	f884 3043 	strblt.w	r3, [r4, #67]	@ 0x43
 80291c2:	497d      	ldr	r1, [pc, #500]	@ (80293b8 <_printf_float+0x2b0>)
 80291c4:	4b7d      	ldr	r3, [pc, #500]	@ (80293bc <_printf_float+0x2b4>)
 80291c6:	e7d5      	b.n	8029174 <_printf_float+0x6c>
 80291c8:	6863      	ldr	r3, [r4, #4]
 80291ca:	1c59      	adds	r1, r3, #1
 80291cc:	f009 0adf 	and.w	sl, r9, #223	@ 0xdf
 80291d0:	d139      	bne.n	8029246 <_printf_float+0x13e>
 80291d2:	2306      	movs	r3, #6
 80291d4:	6063      	str	r3, [r4, #4]
 80291d6:	f442 6280 	orr.w	r2, r2, #1024	@ 0x400
 80291da:	2300      	movs	r3, #0
 80291dc:	6022      	str	r2, [r4, #0]
 80291de:	9303      	str	r3, [sp, #12]
 80291e0:	ab0a      	add	r3, sp, #40	@ 0x28
 80291e2:	e9cd 9301 	strd	r9, r3, [sp, #4]
 80291e6:	ab09      	add	r3, sp, #36	@ 0x24
 80291e8:	9300      	str	r3, [sp, #0]
 80291ea:	6861      	ldr	r1, [r4, #4]
 80291ec:	f10d 0323 	add.w	r3, sp, #35	@ 0x23
 80291f0:	4628      	mov	r0, r5
 80291f2:	f7ff fefb 	bl	8028fec <__cvt>
 80291f6:	f1ba 0f47 	cmp.w	sl, #71	@ 0x47
 80291fa:	9909      	ldr	r1, [sp, #36]	@ 0x24
 80291fc:	4680      	mov	r8, r0
 80291fe:	d129      	bne.n	8029254 <_printf_float+0x14c>
 8029200:	1cc8      	adds	r0, r1, #3
 8029202:	db02      	blt.n	802920a <_printf_float+0x102>
 8029204:	6863      	ldr	r3, [r4, #4]
 8029206:	4299      	cmp	r1, r3
 8029208:	dd41      	ble.n	802928e <_printf_float+0x186>
 802920a:	f1a9 0902 	sub.w	r9, r9, #2
 802920e:	fa5f f989 	uxtb.w	r9, r9
 8029212:	3901      	subs	r1, #1
 8029214:	464a      	mov	r2, r9
 8029216:	f104 0050 	add.w	r0, r4, #80	@ 0x50
 802921a:	9109      	str	r1, [sp, #36]	@ 0x24
 802921c:	f7ff ff3a 	bl	8029094 <__exponent>
 8029220:	9a0a      	ldr	r2, [sp, #40]	@ 0x28
 8029222:	1813      	adds	r3, r2, r0
 8029224:	2a01      	cmp	r2, #1
 8029226:	4682      	mov	sl, r0
 8029228:	6123      	str	r3, [r4, #16]
 802922a:	dc02      	bgt.n	8029232 <_printf_float+0x12a>
 802922c:	6822      	ldr	r2, [r4, #0]
 802922e:	07d2      	lsls	r2, r2, #31
 8029230:	d501      	bpl.n	8029236 <_printf_float+0x12e>
 8029232:	3301      	adds	r3, #1
 8029234:	6123      	str	r3, [r4, #16]
 8029236:	f89d 3023 	ldrb.w	r3, [sp, #35]	@ 0x23
 802923a:	2b00      	cmp	r3, #0
 802923c:	d0a6      	beq.n	802918c <_printf_float+0x84>
 802923e:	232d      	movs	r3, #45	@ 0x2d
 8029240:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 8029244:	e7a2      	b.n	802918c <_printf_float+0x84>
 8029246:	f1ba 0f47 	cmp.w	sl, #71	@ 0x47
 802924a:	d1c4      	bne.n	80291d6 <_printf_float+0xce>
 802924c:	2b00      	cmp	r3, #0
 802924e:	d1c2      	bne.n	80291d6 <_printf_float+0xce>
 8029250:	2301      	movs	r3, #1
 8029252:	e7bf      	b.n	80291d4 <_printf_float+0xcc>
 8029254:	f1b9 0f65 	cmp.w	r9, #101	@ 0x65
 8029258:	d9db      	bls.n	8029212 <_printf_float+0x10a>
 802925a:	f1b9 0f66 	cmp.w	r9, #102	@ 0x66
 802925e:	d118      	bne.n	8029292 <_printf_float+0x18a>
 8029260:	2900      	cmp	r1, #0
 8029262:	6863      	ldr	r3, [r4, #4]
 8029264:	dd0b      	ble.n	802927e <_printf_float+0x176>
 8029266:	6121      	str	r1, [r4, #16]
 8029268:	b913      	cbnz	r3, 8029270 <_printf_float+0x168>
 802926a:	6822      	ldr	r2, [r4, #0]
 802926c:	07d0      	lsls	r0, r2, #31
 802926e:	d502      	bpl.n	8029276 <_printf_float+0x16e>
 8029270:	3301      	adds	r3, #1
 8029272:	440b      	add	r3, r1
 8029274:	6123      	str	r3, [r4, #16]
 8029276:	65a1      	str	r1, [r4, #88]	@ 0x58
 8029278:	f04f 0a00 	mov.w	sl, #0
 802927c:	e7db      	b.n	8029236 <_printf_float+0x12e>
 802927e:	b913      	cbnz	r3, 8029286 <_printf_float+0x17e>
 8029280:	6822      	ldr	r2, [r4, #0]
 8029282:	07d2      	lsls	r2, r2, #31
 8029284:	d501      	bpl.n	802928a <_printf_float+0x182>
 8029286:	3302      	adds	r3, #2
 8029288:	e7f4      	b.n	8029274 <_printf_float+0x16c>
 802928a:	2301      	movs	r3, #1
 802928c:	e7f2      	b.n	8029274 <_printf_float+0x16c>
 802928e:	f04f 0967 	mov.w	r9, #103	@ 0x67
 8029292:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 8029294:	4299      	cmp	r1, r3
 8029296:	db05      	blt.n	80292a4 <_printf_float+0x19c>
 8029298:	6823      	ldr	r3, [r4, #0]
 802929a:	6121      	str	r1, [r4, #16]
 802929c:	07d8      	lsls	r0, r3, #31
 802929e:	d5ea      	bpl.n	8029276 <_printf_float+0x16e>
 80292a0:	1c4b      	adds	r3, r1, #1
 80292a2:	e7e7      	b.n	8029274 <_printf_float+0x16c>
 80292a4:	2900      	cmp	r1, #0
 80292a6:	bfd4      	ite	le
 80292a8:	f1c1 0202 	rsble	r2, r1, #2
 80292ac:	2201      	movgt	r2, #1
 80292ae:	4413      	add	r3, r2
 80292b0:	e7e0      	b.n	8029274 <_printf_float+0x16c>
 80292b2:	6823      	ldr	r3, [r4, #0]
 80292b4:	055a      	lsls	r2, r3, #21
 80292b6:	d407      	bmi.n	80292c8 <_printf_float+0x1c0>
 80292b8:	6923      	ldr	r3, [r4, #16]
 80292ba:	4642      	mov	r2, r8
 80292bc:	4631      	mov	r1, r6
 80292be:	4628      	mov	r0, r5
 80292c0:	47b8      	blx	r7
 80292c2:	3001      	adds	r0, #1
 80292c4:	d12a      	bne.n	802931c <_printf_float+0x214>
 80292c6:	e76b      	b.n	80291a0 <_printf_float+0x98>
 80292c8:	f1b9 0f65 	cmp.w	r9, #101	@ 0x65
 80292cc:	f240 80e0 	bls.w	8029490 <_printf_float+0x388>
 80292d0:	ed94 7b12 	vldr	d7, [r4, #72]	@ 0x48
 80292d4:	eeb5 7b40 	vcmp.f64	d7, #0.0
 80292d8:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 80292dc:	d133      	bne.n	8029346 <_printf_float+0x23e>
 80292de:	4a38      	ldr	r2, [pc, #224]	@ (80293c0 <_printf_float+0x2b8>)
 80292e0:	2301      	movs	r3, #1
 80292e2:	4631      	mov	r1, r6
 80292e4:	4628      	mov	r0, r5
 80292e6:	47b8      	blx	r7
 80292e8:	3001      	adds	r0, #1
 80292ea:	f43f af59 	beq.w	80291a0 <_printf_float+0x98>
 80292ee:	e9dd 3809 	ldrd	r3, r8, [sp, #36]	@ 0x24
 80292f2:	4543      	cmp	r3, r8
 80292f4:	db02      	blt.n	80292fc <_printf_float+0x1f4>
 80292f6:	6823      	ldr	r3, [r4, #0]
 80292f8:	07d8      	lsls	r0, r3, #31
 80292fa:	d50f      	bpl.n	802931c <_printf_float+0x214>
 80292fc:	9b05      	ldr	r3, [sp, #20]
 80292fe:	465a      	mov	r2, fp
 8029300:	4631      	mov	r1, r6
 8029302:	4628      	mov	r0, r5
 8029304:	47b8      	blx	r7
 8029306:	3001      	adds	r0, #1
 8029308:	f43f af4a 	beq.w	80291a0 <_printf_float+0x98>
 802930c:	f04f 0900 	mov.w	r9, #0
 8029310:	f108 38ff 	add.w	r8, r8, #4294967295	@ 0xffffffff
 8029314:	f104 0a1a 	add.w	sl, r4, #26
 8029318:	45c8      	cmp	r8, r9
 802931a:	dc09      	bgt.n	8029330 <_printf_float+0x228>
 802931c:	6823      	ldr	r3, [r4, #0]
 802931e:	079b      	lsls	r3, r3, #30
 8029320:	f100 8107 	bmi.w	8029532 <_printf_float+0x42a>
 8029324:	68e0      	ldr	r0, [r4, #12]
 8029326:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 8029328:	4298      	cmp	r0, r3
 802932a:	bfb8      	it	lt
 802932c:	4618      	movlt	r0, r3
 802932e:	e739      	b.n	80291a4 <_printf_float+0x9c>
 8029330:	2301      	movs	r3, #1
 8029332:	4652      	mov	r2, sl
 8029334:	4631      	mov	r1, r6
 8029336:	4628      	mov	r0, r5
 8029338:	47b8      	blx	r7
 802933a:	3001      	adds	r0, #1
 802933c:	f43f af30 	beq.w	80291a0 <_printf_float+0x98>
 8029340:	f109 0901 	add.w	r9, r9, #1
 8029344:	e7e8      	b.n	8029318 <_printf_float+0x210>
 8029346:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8029348:	2b00      	cmp	r3, #0
 802934a:	dc3b      	bgt.n	80293c4 <_printf_float+0x2bc>
 802934c:	4a1c      	ldr	r2, [pc, #112]	@ (80293c0 <_printf_float+0x2b8>)
 802934e:	2301      	movs	r3, #1
 8029350:	4631      	mov	r1, r6
 8029352:	4628      	mov	r0, r5
 8029354:	47b8      	blx	r7
 8029356:	3001      	adds	r0, #1
 8029358:	f43f af22 	beq.w	80291a0 <_printf_float+0x98>
 802935c:	e9dd 3909 	ldrd	r3, r9, [sp, #36]	@ 0x24
 8029360:	ea59 0303 	orrs.w	r3, r9, r3
 8029364:	d102      	bne.n	802936c <_printf_float+0x264>
 8029366:	6823      	ldr	r3, [r4, #0]
 8029368:	07d9      	lsls	r1, r3, #31
 802936a:	d5d7      	bpl.n	802931c <_printf_float+0x214>
 802936c:	9b05      	ldr	r3, [sp, #20]
 802936e:	465a      	mov	r2, fp
 8029370:	4631      	mov	r1, r6
 8029372:	4628      	mov	r0, r5
 8029374:	47b8      	blx	r7
 8029376:	3001      	adds	r0, #1
 8029378:	f43f af12 	beq.w	80291a0 <_printf_float+0x98>
 802937c:	f04f 0a00 	mov.w	sl, #0
 8029380:	f104 0b1a 	add.w	fp, r4, #26
 8029384:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8029386:	425b      	negs	r3, r3
 8029388:	4553      	cmp	r3, sl
 802938a:	dc01      	bgt.n	8029390 <_printf_float+0x288>
 802938c:	464b      	mov	r3, r9
 802938e:	e794      	b.n	80292ba <_printf_float+0x1b2>
 8029390:	2301      	movs	r3, #1
 8029392:	465a      	mov	r2, fp
 8029394:	4631      	mov	r1, r6
 8029396:	4628      	mov	r0, r5
 8029398:	47b8      	blx	r7
 802939a:	3001      	adds	r0, #1
 802939c:	f43f af00 	beq.w	80291a0 <_printf_float+0x98>
 80293a0:	f10a 0a01 	add.w	sl, sl, #1
 80293a4:	e7ee      	b.n	8029384 <_printf_float+0x27c>
 80293a6:	bf00      	nop
 80293a8:	ffffffff 	.word	0xffffffff
 80293ac:	7fefffff 	.word	0x7fefffff
 80293b0:	08030e41 	.word	0x08030e41
 80293b4:	08030e45 	.word	0x08030e45
 80293b8:	08030e49 	.word	0x08030e49
 80293bc:	08030e4d 	.word	0x08030e4d
 80293c0:	08030e51 	.word	0x08030e51
 80293c4:	6da3      	ldr	r3, [r4, #88]	@ 0x58
 80293c6:	f8dd a028 	ldr.w	sl, [sp, #40]	@ 0x28
 80293ca:	4553      	cmp	r3, sl
 80293cc:	bfa8      	it	ge
 80293ce:	4653      	movge	r3, sl
 80293d0:	2b00      	cmp	r3, #0
 80293d2:	4699      	mov	r9, r3
 80293d4:	dc37      	bgt.n	8029446 <_printf_float+0x33e>
 80293d6:	2300      	movs	r3, #0
 80293d8:	9307      	str	r3, [sp, #28]
 80293da:	ea29 79e9 	bic.w	r9, r9, r9, asr #31
 80293de:	f104 021a 	add.w	r2, r4, #26
 80293e2:	6da3      	ldr	r3, [r4, #88]	@ 0x58
 80293e4:	9907      	ldr	r1, [sp, #28]
 80293e6:	9306      	str	r3, [sp, #24]
 80293e8:	eba3 0309 	sub.w	r3, r3, r9
 80293ec:	428b      	cmp	r3, r1
 80293ee:	dc31      	bgt.n	8029454 <_printf_float+0x34c>
 80293f0:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 80293f2:	459a      	cmp	sl, r3
 80293f4:	dc3b      	bgt.n	802946e <_printf_float+0x366>
 80293f6:	6823      	ldr	r3, [r4, #0]
 80293f8:	07da      	lsls	r2, r3, #31
 80293fa:	d438      	bmi.n	802946e <_printf_float+0x366>
 80293fc:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 80293fe:	ebaa 0903 	sub.w	r9, sl, r3
 8029402:	9b06      	ldr	r3, [sp, #24]
 8029404:	ebaa 0303 	sub.w	r3, sl, r3
 8029408:	4599      	cmp	r9, r3
 802940a:	bfa8      	it	ge
 802940c:	4699      	movge	r9, r3
 802940e:	f1b9 0f00 	cmp.w	r9, #0
 8029412:	dc34      	bgt.n	802947e <_printf_float+0x376>
 8029414:	f04f 0800 	mov.w	r8, #0
 8029418:	ea29 79e9 	bic.w	r9, r9, r9, asr #31
 802941c:	f104 0b1a 	add.w	fp, r4, #26
 8029420:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8029422:	ebaa 0303 	sub.w	r3, sl, r3
 8029426:	eba3 0309 	sub.w	r3, r3, r9
 802942a:	4543      	cmp	r3, r8
 802942c:	f77f af76 	ble.w	802931c <_printf_float+0x214>
 8029430:	2301      	movs	r3, #1
 8029432:	465a      	mov	r2, fp
 8029434:	4631      	mov	r1, r6
 8029436:	4628      	mov	r0, r5
 8029438:	47b8      	blx	r7
 802943a:	3001      	adds	r0, #1
 802943c:	f43f aeb0 	beq.w	80291a0 <_printf_float+0x98>
 8029440:	f108 0801 	add.w	r8, r8, #1
 8029444:	e7ec      	b.n	8029420 <_printf_float+0x318>
 8029446:	4642      	mov	r2, r8
 8029448:	4631      	mov	r1, r6
 802944a:	4628      	mov	r0, r5
 802944c:	47b8      	blx	r7
 802944e:	3001      	adds	r0, #1
 8029450:	d1c1      	bne.n	80293d6 <_printf_float+0x2ce>
 8029452:	e6a5      	b.n	80291a0 <_printf_float+0x98>
 8029454:	2301      	movs	r3, #1
 8029456:	4631      	mov	r1, r6
 8029458:	4628      	mov	r0, r5
 802945a:	9206      	str	r2, [sp, #24]
 802945c:	47b8      	blx	r7
 802945e:	3001      	adds	r0, #1
 8029460:	f43f ae9e 	beq.w	80291a0 <_printf_float+0x98>
 8029464:	9b07      	ldr	r3, [sp, #28]
 8029466:	9a06      	ldr	r2, [sp, #24]
 8029468:	3301      	adds	r3, #1
 802946a:	9307      	str	r3, [sp, #28]
 802946c:	e7b9      	b.n	80293e2 <_printf_float+0x2da>
 802946e:	9b05      	ldr	r3, [sp, #20]
 8029470:	465a      	mov	r2, fp
 8029472:	4631      	mov	r1, r6
 8029474:	4628      	mov	r0, r5
 8029476:	47b8      	blx	r7
 8029478:	3001      	adds	r0, #1
 802947a:	d1bf      	bne.n	80293fc <_printf_float+0x2f4>
 802947c:	e690      	b.n	80291a0 <_printf_float+0x98>
 802947e:	9a06      	ldr	r2, [sp, #24]
 8029480:	464b      	mov	r3, r9
 8029482:	4442      	add	r2, r8
 8029484:	4631      	mov	r1, r6
 8029486:	4628      	mov	r0, r5
 8029488:	47b8      	blx	r7
 802948a:	3001      	adds	r0, #1
 802948c:	d1c2      	bne.n	8029414 <_printf_float+0x30c>
 802948e:	e687      	b.n	80291a0 <_printf_float+0x98>
 8029490:	f8dd 9028 	ldr.w	r9, [sp, #40]	@ 0x28
 8029494:	f1b9 0f01 	cmp.w	r9, #1
 8029498:	dc01      	bgt.n	802949e <_printf_float+0x396>
 802949a:	07db      	lsls	r3, r3, #31
 802949c:	d536      	bpl.n	802950c <_printf_float+0x404>
 802949e:	2301      	movs	r3, #1
 80294a0:	4642      	mov	r2, r8
 80294a2:	4631      	mov	r1, r6
 80294a4:	4628      	mov	r0, r5
 80294a6:	47b8      	blx	r7
 80294a8:	3001      	adds	r0, #1
 80294aa:	f43f ae79 	beq.w	80291a0 <_printf_float+0x98>
 80294ae:	9b05      	ldr	r3, [sp, #20]
 80294b0:	465a      	mov	r2, fp
 80294b2:	4631      	mov	r1, r6
 80294b4:	4628      	mov	r0, r5
 80294b6:	47b8      	blx	r7
 80294b8:	3001      	adds	r0, #1
 80294ba:	f43f ae71 	beq.w	80291a0 <_printf_float+0x98>
 80294be:	ed94 7b12 	vldr	d7, [r4, #72]	@ 0x48
 80294c2:	eeb5 7b40 	vcmp.f64	d7, #0.0
 80294c6:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 80294ca:	f109 39ff 	add.w	r9, r9, #4294967295	@ 0xffffffff
 80294ce:	d018      	beq.n	8029502 <_printf_float+0x3fa>
 80294d0:	464b      	mov	r3, r9
 80294d2:	f108 0201 	add.w	r2, r8, #1
 80294d6:	4631      	mov	r1, r6
 80294d8:	4628      	mov	r0, r5
 80294da:	47b8      	blx	r7
 80294dc:	3001      	adds	r0, #1
 80294de:	d10c      	bne.n	80294fa <_printf_float+0x3f2>
 80294e0:	e65e      	b.n	80291a0 <_printf_float+0x98>
 80294e2:	2301      	movs	r3, #1
 80294e4:	465a      	mov	r2, fp
 80294e6:	4631      	mov	r1, r6
 80294e8:	4628      	mov	r0, r5
 80294ea:	47b8      	blx	r7
 80294ec:	3001      	adds	r0, #1
 80294ee:	f43f ae57 	beq.w	80291a0 <_printf_float+0x98>
 80294f2:	f108 0801 	add.w	r8, r8, #1
 80294f6:	45c8      	cmp	r8, r9
 80294f8:	dbf3      	blt.n	80294e2 <_printf_float+0x3da>
 80294fa:	4653      	mov	r3, sl
 80294fc:	f104 0250 	add.w	r2, r4, #80	@ 0x50
 8029500:	e6dc      	b.n	80292bc <_printf_float+0x1b4>
 8029502:	f04f 0800 	mov.w	r8, #0
 8029506:	f104 0b1a 	add.w	fp, r4, #26
 802950a:	e7f4      	b.n	80294f6 <_printf_float+0x3ee>
 802950c:	2301      	movs	r3, #1
 802950e:	4642      	mov	r2, r8
 8029510:	e7e1      	b.n	80294d6 <_printf_float+0x3ce>
 8029512:	2301      	movs	r3, #1
 8029514:	464a      	mov	r2, r9
 8029516:	4631      	mov	r1, r6
 8029518:	4628      	mov	r0, r5
 802951a:	47b8      	blx	r7
 802951c:	3001      	adds	r0, #1
 802951e:	f43f ae3f 	beq.w	80291a0 <_printf_float+0x98>
 8029522:	f108 0801 	add.w	r8, r8, #1
 8029526:	68e3      	ldr	r3, [r4, #12]
 8029528:	990b      	ldr	r1, [sp, #44]	@ 0x2c
 802952a:	1a5b      	subs	r3, r3, r1
 802952c:	4543      	cmp	r3, r8
 802952e:	dcf0      	bgt.n	8029512 <_printf_float+0x40a>
 8029530:	e6f8      	b.n	8029324 <_printf_float+0x21c>
 8029532:	f04f 0800 	mov.w	r8, #0
 8029536:	f104 0919 	add.w	r9, r4, #25
 802953a:	e7f4      	b.n	8029526 <_printf_float+0x41e>

0802953c <_printf_common>:
 802953c:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8029540:	4616      	mov	r6, r2
 8029542:	4698      	mov	r8, r3
 8029544:	688a      	ldr	r2, [r1, #8]
 8029546:	690b      	ldr	r3, [r1, #16]
 8029548:	f8dd 9020 	ldr.w	r9, [sp, #32]
 802954c:	4293      	cmp	r3, r2
 802954e:	bfb8      	it	lt
 8029550:	4613      	movlt	r3, r2
 8029552:	6033      	str	r3, [r6, #0]
 8029554:	f891 2043 	ldrb.w	r2, [r1, #67]	@ 0x43
 8029558:	4607      	mov	r7, r0
 802955a:	460c      	mov	r4, r1
 802955c:	b10a      	cbz	r2, 8029562 <_printf_common+0x26>
 802955e:	3301      	adds	r3, #1
 8029560:	6033      	str	r3, [r6, #0]
 8029562:	6823      	ldr	r3, [r4, #0]
 8029564:	0699      	lsls	r1, r3, #26
 8029566:	bf42      	ittt	mi
 8029568:	6833      	ldrmi	r3, [r6, #0]
 802956a:	3302      	addmi	r3, #2
 802956c:	6033      	strmi	r3, [r6, #0]
 802956e:	6825      	ldr	r5, [r4, #0]
 8029570:	f015 0506 	ands.w	r5, r5, #6
 8029574:	d106      	bne.n	8029584 <_printf_common+0x48>
 8029576:	f104 0a19 	add.w	sl, r4, #25
 802957a:	68e3      	ldr	r3, [r4, #12]
 802957c:	6832      	ldr	r2, [r6, #0]
 802957e:	1a9b      	subs	r3, r3, r2
 8029580:	42ab      	cmp	r3, r5
 8029582:	dc26      	bgt.n	80295d2 <_printf_common+0x96>
 8029584:	f894 3043 	ldrb.w	r3, [r4, #67]	@ 0x43
 8029588:	6822      	ldr	r2, [r4, #0]
 802958a:	3b00      	subs	r3, #0
 802958c:	bf18      	it	ne
 802958e:	2301      	movne	r3, #1
 8029590:	0692      	lsls	r2, r2, #26
 8029592:	d42b      	bmi.n	80295ec <_printf_common+0xb0>
 8029594:	f104 0243 	add.w	r2, r4, #67	@ 0x43
 8029598:	4641      	mov	r1, r8
 802959a:	4638      	mov	r0, r7
 802959c:	47c8      	blx	r9
 802959e:	3001      	adds	r0, #1
 80295a0:	d01e      	beq.n	80295e0 <_printf_common+0xa4>
 80295a2:	6823      	ldr	r3, [r4, #0]
 80295a4:	6922      	ldr	r2, [r4, #16]
 80295a6:	f003 0306 	and.w	r3, r3, #6
 80295aa:	2b04      	cmp	r3, #4
 80295ac:	bf02      	ittt	eq
 80295ae:	68e5      	ldreq	r5, [r4, #12]
 80295b0:	6833      	ldreq	r3, [r6, #0]
 80295b2:	1aed      	subeq	r5, r5, r3
 80295b4:	68a3      	ldr	r3, [r4, #8]
 80295b6:	bf0c      	ite	eq
 80295b8:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 80295bc:	2500      	movne	r5, #0
 80295be:	4293      	cmp	r3, r2
 80295c0:	bfc4      	itt	gt
 80295c2:	1a9b      	subgt	r3, r3, r2
 80295c4:	18ed      	addgt	r5, r5, r3
 80295c6:	2600      	movs	r6, #0
 80295c8:	341a      	adds	r4, #26
 80295ca:	42b5      	cmp	r5, r6
 80295cc:	d11a      	bne.n	8029604 <_printf_common+0xc8>
 80295ce:	2000      	movs	r0, #0
 80295d0:	e008      	b.n	80295e4 <_printf_common+0xa8>
 80295d2:	2301      	movs	r3, #1
 80295d4:	4652      	mov	r2, sl
 80295d6:	4641      	mov	r1, r8
 80295d8:	4638      	mov	r0, r7
 80295da:	47c8      	blx	r9
 80295dc:	3001      	adds	r0, #1
 80295de:	d103      	bne.n	80295e8 <_printf_common+0xac>
 80295e0:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 80295e4:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80295e8:	3501      	adds	r5, #1
 80295ea:	e7c6      	b.n	802957a <_printf_common+0x3e>
 80295ec:	18e1      	adds	r1, r4, r3
 80295ee:	1c5a      	adds	r2, r3, #1
 80295f0:	2030      	movs	r0, #48	@ 0x30
 80295f2:	f881 0043 	strb.w	r0, [r1, #67]	@ 0x43
 80295f6:	4422      	add	r2, r4
 80295f8:	f894 1045 	ldrb.w	r1, [r4, #69]	@ 0x45
 80295fc:	f882 1043 	strb.w	r1, [r2, #67]	@ 0x43
 8029600:	3302      	adds	r3, #2
 8029602:	e7c7      	b.n	8029594 <_printf_common+0x58>
 8029604:	2301      	movs	r3, #1
 8029606:	4622      	mov	r2, r4
 8029608:	4641      	mov	r1, r8
 802960a:	4638      	mov	r0, r7
 802960c:	47c8      	blx	r9
 802960e:	3001      	adds	r0, #1
 8029610:	d0e6      	beq.n	80295e0 <_printf_common+0xa4>
 8029612:	3601      	adds	r6, #1
 8029614:	e7d9      	b.n	80295ca <_printf_common+0x8e>
	...

08029618 <_printf_i>:
 8029618:	e92d 47ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
 802961c:	7e0f      	ldrb	r7, [r1, #24]
 802961e:	9e0c      	ldr	r6, [sp, #48]	@ 0x30
 8029620:	2f78      	cmp	r7, #120	@ 0x78
 8029622:	4691      	mov	r9, r2
 8029624:	4680      	mov	r8, r0
 8029626:	460c      	mov	r4, r1
 8029628:	469a      	mov	sl, r3
 802962a:	f101 0243 	add.w	r2, r1, #67	@ 0x43
 802962e:	d807      	bhi.n	8029640 <_printf_i+0x28>
 8029630:	2f62      	cmp	r7, #98	@ 0x62
 8029632:	d80a      	bhi.n	802964a <_printf_i+0x32>
 8029634:	2f00      	cmp	r7, #0
 8029636:	f000 80d2 	beq.w	80297de <_printf_i+0x1c6>
 802963a:	2f58      	cmp	r7, #88	@ 0x58
 802963c:	f000 80b9 	beq.w	80297b2 <_printf_i+0x19a>
 8029640:	f104 0642 	add.w	r6, r4, #66	@ 0x42
 8029644:	f884 7042 	strb.w	r7, [r4, #66]	@ 0x42
 8029648:	e03a      	b.n	80296c0 <_printf_i+0xa8>
 802964a:	f1a7 0363 	sub.w	r3, r7, #99	@ 0x63
 802964e:	2b15      	cmp	r3, #21
 8029650:	d8f6      	bhi.n	8029640 <_printf_i+0x28>
 8029652:	a101      	add	r1, pc, #4	@ (adr r1, 8029658 <_printf_i+0x40>)
 8029654:	f851 f023 	ldr.w	pc, [r1, r3, lsl #2]
 8029658:	080296b1 	.word	0x080296b1
 802965c:	080296c5 	.word	0x080296c5
 8029660:	08029641 	.word	0x08029641
 8029664:	08029641 	.word	0x08029641
 8029668:	08029641 	.word	0x08029641
 802966c:	08029641 	.word	0x08029641
 8029670:	080296c5 	.word	0x080296c5
 8029674:	08029641 	.word	0x08029641
 8029678:	08029641 	.word	0x08029641
 802967c:	08029641 	.word	0x08029641
 8029680:	08029641 	.word	0x08029641
 8029684:	080297c5 	.word	0x080297c5
 8029688:	080296ef 	.word	0x080296ef
 802968c:	0802977f 	.word	0x0802977f
 8029690:	08029641 	.word	0x08029641
 8029694:	08029641 	.word	0x08029641
 8029698:	080297e7 	.word	0x080297e7
 802969c:	08029641 	.word	0x08029641
 80296a0:	080296ef 	.word	0x080296ef
 80296a4:	08029641 	.word	0x08029641
 80296a8:	08029641 	.word	0x08029641
 80296ac:	08029787 	.word	0x08029787
 80296b0:	6833      	ldr	r3, [r6, #0]
 80296b2:	1d1a      	adds	r2, r3, #4
 80296b4:	681b      	ldr	r3, [r3, #0]
 80296b6:	6032      	str	r2, [r6, #0]
 80296b8:	f104 0642 	add.w	r6, r4, #66	@ 0x42
 80296bc:	f884 3042 	strb.w	r3, [r4, #66]	@ 0x42
 80296c0:	2301      	movs	r3, #1
 80296c2:	e09d      	b.n	8029800 <_printf_i+0x1e8>
 80296c4:	6833      	ldr	r3, [r6, #0]
 80296c6:	6820      	ldr	r0, [r4, #0]
 80296c8:	1d19      	adds	r1, r3, #4
 80296ca:	6031      	str	r1, [r6, #0]
 80296cc:	0606      	lsls	r6, r0, #24
 80296ce:	d501      	bpl.n	80296d4 <_printf_i+0xbc>
 80296d0:	681d      	ldr	r5, [r3, #0]
 80296d2:	e003      	b.n	80296dc <_printf_i+0xc4>
 80296d4:	0645      	lsls	r5, r0, #25
 80296d6:	d5fb      	bpl.n	80296d0 <_printf_i+0xb8>
 80296d8:	f9b3 5000 	ldrsh.w	r5, [r3]
 80296dc:	2d00      	cmp	r5, #0
 80296de:	da03      	bge.n	80296e8 <_printf_i+0xd0>
 80296e0:	232d      	movs	r3, #45	@ 0x2d
 80296e2:	426d      	negs	r5, r5
 80296e4:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 80296e8:	4859      	ldr	r0, [pc, #356]	@ (8029850 <_printf_i+0x238>)
 80296ea:	230a      	movs	r3, #10
 80296ec:	e011      	b.n	8029712 <_printf_i+0xfa>
 80296ee:	6821      	ldr	r1, [r4, #0]
 80296f0:	6833      	ldr	r3, [r6, #0]
 80296f2:	0608      	lsls	r0, r1, #24
 80296f4:	f853 5b04 	ldr.w	r5, [r3], #4
 80296f8:	d402      	bmi.n	8029700 <_printf_i+0xe8>
 80296fa:	0649      	lsls	r1, r1, #25
 80296fc:	bf48      	it	mi
 80296fe:	b2ad      	uxthmi	r5, r5
 8029700:	2f6f      	cmp	r7, #111	@ 0x6f
 8029702:	4853      	ldr	r0, [pc, #332]	@ (8029850 <_printf_i+0x238>)
 8029704:	6033      	str	r3, [r6, #0]
 8029706:	bf14      	ite	ne
 8029708:	230a      	movne	r3, #10
 802970a:	2308      	moveq	r3, #8
 802970c:	2100      	movs	r1, #0
 802970e:	f884 1043 	strb.w	r1, [r4, #67]	@ 0x43
 8029712:	6866      	ldr	r6, [r4, #4]
 8029714:	60a6      	str	r6, [r4, #8]
 8029716:	2e00      	cmp	r6, #0
 8029718:	bfa2      	ittt	ge
 802971a:	6821      	ldrge	r1, [r4, #0]
 802971c:	f021 0104 	bicge.w	r1, r1, #4
 8029720:	6021      	strge	r1, [r4, #0]
 8029722:	b90d      	cbnz	r5, 8029728 <_printf_i+0x110>
 8029724:	2e00      	cmp	r6, #0
 8029726:	d04b      	beq.n	80297c0 <_printf_i+0x1a8>
 8029728:	4616      	mov	r6, r2
 802972a:	fbb5 f1f3 	udiv	r1, r5, r3
 802972e:	fb03 5711 	mls	r7, r3, r1, r5
 8029732:	5dc7      	ldrb	r7, [r0, r7]
 8029734:	f806 7d01 	strb.w	r7, [r6, #-1]!
 8029738:	462f      	mov	r7, r5
 802973a:	42bb      	cmp	r3, r7
 802973c:	460d      	mov	r5, r1
 802973e:	d9f4      	bls.n	802972a <_printf_i+0x112>
 8029740:	2b08      	cmp	r3, #8
 8029742:	d10b      	bne.n	802975c <_printf_i+0x144>
 8029744:	6823      	ldr	r3, [r4, #0]
 8029746:	07df      	lsls	r7, r3, #31
 8029748:	d508      	bpl.n	802975c <_printf_i+0x144>
 802974a:	6923      	ldr	r3, [r4, #16]
 802974c:	6861      	ldr	r1, [r4, #4]
 802974e:	4299      	cmp	r1, r3
 8029750:	bfde      	ittt	le
 8029752:	2330      	movle	r3, #48	@ 0x30
 8029754:	f806 3c01 	strble.w	r3, [r6, #-1]
 8029758:	f106 36ff 	addle.w	r6, r6, #4294967295	@ 0xffffffff
 802975c:	1b92      	subs	r2, r2, r6
 802975e:	6122      	str	r2, [r4, #16]
 8029760:	f8cd a000 	str.w	sl, [sp]
 8029764:	464b      	mov	r3, r9
 8029766:	aa03      	add	r2, sp, #12
 8029768:	4621      	mov	r1, r4
 802976a:	4640      	mov	r0, r8
 802976c:	f7ff fee6 	bl	802953c <_printf_common>
 8029770:	3001      	adds	r0, #1
 8029772:	d14a      	bne.n	802980a <_printf_i+0x1f2>
 8029774:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 8029778:	b004      	add	sp, #16
 802977a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802977e:	6823      	ldr	r3, [r4, #0]
 8029780:	f043 0320 	orr.w	r3, r3, #32
 8029784:	6023      	str	r3, [r4, #0]
 8029786:	4833      	ldr	r0, [pc, #204]	@ (8029854 <_printf_i+0x23c>)
 8029788:	2778      	movs	r7, #120	@ 0x78
 802978a:	f884 7045 	strb.w	r7, [r4, #69]	@ 0x45
 802978e:	6823      	ldr	r3, [r4, #0]
 8029790:	6831      	ldr	r1, [r6, #0]
 8029792:	061f      	lsls	r7, r3, #24
 8029794:	f851 5b04 	ldr.w	r5, [r1], #4
 8029798:	d402      	bmi.n	80297a0 <_printf_i+0x188>
 802979a:	065f      	lsls	r7, r3, #25
 802979c:	bf48      	it	mi
 802979e:	b2ad      	uxthmi	r5, r5
 80297a0:	6031      	str	r1, [r6, #0]
 80297a2:	07d9      	lsls	r1, r3, #31
 80297a4:	bf44      	itt	mi
 80297a6:	f043 0320 	orrmi.w	r3, r3, #32
 80297aa:	6023      	strmi	r3, [r4, #0]
 80297ac:	b11d      	cbz	r5, 80297b6 <_printf_i+0x19e>
 80297ae:	2310      	movs	r3, #16
 80297b0:	e7ac      	b.n	802970c <_printf_i+0xf4>
 80297b2:	4827      	ldr	r0, [pc, #156]	@ (8029850 <_printf_i+0x238>)
 80297b4:	e7e9      	b.n	802978a <_printf_i+0x172>
 80297b6:	6823      	ldr	r3, [r4, #0]
 80297b8:	f023 0320 	bic.w	r3, r3, #32
 80297bc:	6023      	str	r3, [r4, #0]
 80297be:	e7f6      	b.n	80297ae <_printf_i+0x196>
 80297c0:	4616      	mov	r6, r2
 80297c2:	e7bd      	b.n	8029740 <_printf_i+0x128>
 80297c4:	6833      	ldr	r3, [r6, #0]
 80297c6:	6825      	ldr	r5, [r4, #0]
 80297c8:	6961      	ldr	r1, [r4, #20]
 80297ca:	1d18      	adds	r0, r3, #4
 80297cc:	6030      	str	r0, [r6, #0]
 80297ce:	062e      	lsls	r6, r5, #24
 80297d0:	681b      	ldr	r3, [r3, #0]
 80297d2:	d501      	bpl.n	80297d8 <_printf_i+0x1c0>
 80297d4:	6019      	str	r1, [r3, #0]
 80297d6:	e002      	b.n	80297de <_printf_i+0x1c6>
 80297d8:	0668      	lsls	r0, r5, #25
 80297da:	d5fb      	bpl.n	80297d4 <_printf_i+0x1bc>
 80297dc:	8019      	strh	r1, [r3, #0]
 80297de:	2300      	movs	r3, #0
 80297e0:	6123      	str	r3, [r4, #16]
 80297e2:	4616      	mov	r6, r2
 80297e4:	e7bc      	b.n	8029760 <_printf_i+0x148>
 80297e6:	6833      	ldr	r3, [r6, #0]
 80297e8:	1d1a      	adds	r2, r3, #4
 80297ea:	6032      	str	r2, [r6, #0]
 80297ec:	681e      	ldr	r6, [r3, #0]
 80297ee:	6862      	ldr	r2, [r4, #4]
 80297f0:	2100      	movs	r1, #0
 80297f2:	4630      	mov	r0, r6
 80297f4:	f7d6 fd84 	bl	8000300 <memchr>
 80297f8:	b108      	cbz	r0, 80297fe <_printf_i+0x1e6>
 80297fa:	1b80      	subs	r0, r0, r6
 80297fc:	6060      	str	r0, [r4, #4]
 80297fe:	6863      	ldr	r3, [r4, #4]
 8029800:	6123      	str	r3, [r4, #16]
 8029802:	2300      	movs	r3, #0
 8029804:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 8029808:	e7aa      	b.n	8029760 <_printf_i+0x148>
 802980a:	6923      	ldr	r3, [r4, #16]
 802980c:	4632      	mov	r2, r6
 802980e:	4649      	mov	r1, r9
 8029810:	4640      	mov	r0, r8
 8029812:	47d0      	blx	sl
 8029814:	3001      	adds	r0, #1
 8029816:	d0ad      	beq.n	8029774 <_printf_i+0x15c>
 8029818:	6823      	ldr	r3, [r4, #0]
 802981a:	079b      	lsls	r3, r3, #30
 802981c:	d413      	bmi.n	8029846 <_printf_i+0x22e>
 802981e:	68e0      	ldr	r0, [r4, #12]
 8029820:	9b03      	ldr	r3, [sp, #12]
 8029822:	4298      	cmp	r0, r3
 8029824:	bfb8      	it	lt
 8029826:	4618      	movlt	r0, r3
 8029828:	e7a6      	b.n	8029778 <_printf_i+0x160>
 802982a:	2301      	movs	r3, #1
 802982c:	4632      	mov	r2, r6
 802982e:	4649      	mov	r1, r9
 8029830:	4640      	mov	r0, r8
 8029832:	47d0      	blx	sl
 8029834:	3001      	adds	r0, #1
 8029836:	d09d      	beq.n	8029774 <_printf_i+0x15c>
 8029838:	3501      	adds	r5, #1
 802983a:	68e3      	ldr	r3, [r4, #12]
 802983c:	9903      	ldr	r1, [sp, #12]
 802983e:	1a5b      	subs	r3, r3, r1
 8029840:	42ab      	cmp	r3, r5
 8029842:	dcf2      	bgt.n	802982a <_printf_i+0x212>
 8029844:	e7eb      	b.n	802981e <_printf_i+0x206>
 8029846:	2500      	movs	r5, #0
 8029848:	f104 0619 	add.w	r6, r4, #25
 802984c:	e7f5      	b.n	802983a <_printf_i+0x222>
 802984e:	bf00      	nop
 8029850:	08030e53 	.word	0x08030e53
 8029854:	08030e64 	.word	0x08030e64

08029858 <std>:
 8029858:	2300      	movs	r3, #0
 802985a:	b510      	push	{r4, lr}
 802985c:	4604      	mov	r4, r0
 802985e:	e9c0 3300 	strd	r3, r3, [r0]
 8029862:	e9c0 3304 	strd	r3, r3, [r0, #16]
 8029866:	6083      	str	r3, [r0, #8]
 8029868:	8181      	strh	r1, [r0, #12]
 802986a:	6643      	str	r3, [r0, #100]	@ 0x64
 802986c:	81c2      	strh	r2, [r0, #14]
 802986e:	6183      	str	r3, [r0, #24]
 8029870:	4619      	mov	r1, r3
 8029872:	2208      	movs	r2, #8
 8029874:	305c      	adds	r0, #92	@ 0x5c
 8029876:	f000 fa43 	bl	8029d00 <memset>
 802987a:	4b0d      	ldr	r3, [pc, #52]	@ (80298b0 <std+0x58>)
 802987c:	6263      	str	r3, [r4, #36]	@ 0x24
 802987e:	4b0d      	ldr	r3, [pc, #52]	@ (80298b4 <std+0x5c>)
 8029880:	62a3      	str	r3, [r4, #40]	@ 0x28
 8029882:	4b0d      	ldr	r3, [pc, #52]	@ (80298b8 <std+0x60>)
 8029884:	62e3      	str	r3, [r4, #44]	@ 0x2c
 8029886:	4b0d      	ldr	r3, [pc, #52]	@ (80298bc <std+0x64>)
 8029888:	6323      	str	r3, [r4, #48]	@ 0x30
 802988a:	4b0d      	ldr	r3, [pc, #52]	@ (80298c0 <std+0x68>)
 802988c:	6224      	str	r4, [r4, #32]
 802988e:	429c      	cmp	r4, r3
 8029890:	d006      	beq.n	80298a0 <std+0x48>
 8029892:	f103 0268 	add.w	r2, r3, #104	@ 0x68
 8029896:	4294      	cmp	r4, r2
 8029898:	d002      	beq.n	80298a0 <std+0x48>
 802989a:	33d0      	adds	r3, #208	@ 0xd0
 802989c:	429c      	cmp	r4, r3
 802989e:	d105      	bne.n	80298ac <std+0x54>
 80298a0:	f104 0058 	add.w	r0, r4, #88	@ 0x58
 80298a4:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 80298a8:	f000 bb1e 	b.w	8029ee8 <__retarget_lock_init_recursive>
 80298ac:	bd10      	pop	{r4, pc}
 80298ae:	bf00      	nop
 80298b0:	08029afd 	.word	0x08029afd
 80298b4:	08029b1f 	.word	0x08029b1f
 80298b8:	08029b57 	.word	0x08029b57
 80298bc:	08029b7b 	.word	0x08029b7b
 80298c0:	2402b044 	.word	0x2402b044

080298c4 <stdio_exit_handler>:
 80298c4:	4a02      	ldr	r2, [pc, #8]	@ (80298d0 <stdio_exit_handler+0xc>)
 80298c6:	4903      	ldr	r1, [pc, #12]	@ (80298d4 <stdio_exit_handler+0x10>)
 80298c8:	4803      	ldr	r0, [pc, #12]	@ (80298d8 <stdio_exit_handler+0x14>)
 80298ca:	f000 b869 	b.w	80299a0 <_fwalk_sglue>
 80298ce:	bf00      	nop
 80298d0:	2400005c 	.word	0x2400005c
 80298d4:	0802c20d 	.word	0x0802c20d
 80298d8:	240001d8 	.word	0x240001d8

080298dc <cleanup_stdio>:
 80298dc:	6841      	ldr	r1, [r0, #4]
 80298de:	4b0c      	ldr	r3, [pc, #48]	@ (8029910 <cleanup_stdio+0x34>)
 80298e0:	4299      	cmp	r1, r3
 80298e2:	b510      	push	{r4, lr}
 80298e4:	4604      	mov	r4, r0
 80298e6:	d001      	beq.n	80298ec <cleanup_stdio+0x10>
 80298e8:	f002 fc90 	bl	802c20c <_fflush_r>
 80298ec:	68a1      	ldr	r1, [r4, #8]
 80298ee:	4b09      	ldr	r3, [pc, #36]	@ (8029914 <cleanup_stdio+0x38>)
 80298f0:	4299      	cmp	r1, r3
 80298f2:	d002      	beq.n	80298fa <cleanup_stdio+0x1e>
 80298f4:	4620      	mov	r0, r4
 80298f6:	f002 fc89 	bl	802c20c <_fflush_r>
 80298fa:	68e1      	ldr	r1, [r4, #12]
 80298fc:	4b06      	ldr	r3, [pc, #24]	@ (8029918 <cleanup_stdio+0x3c>)
 80298fe:	4299      	cmp	r1, r3
 8029900:	d004      	beq.n	802990c <cleanup_stdio+0x30>
 8029902:	4620      	mov	r0, r4
 8029904:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 8029908:	f002 bc80 	b.w	802c20c <_fflush_r>
 802990c:	bd10      	pop	{r4, pc}
 802990e:	bf00      	nop
 8029910:	2402b044 	.word	0x2402b044
 8029914:	2402b0ac 	.word	0x2402b0ac
 8029918:	2402b114 	.word	0x2402b114

0802991c <global_stdio_init.part.0>:
 802991c:	b510      	push	{r4, lr}
 802991e:	4b0b      	ldr	r3, [pc, #44]	@ (802994c <global_stdio_init.part.0+0x30>)
 8029920:	4c0b      	ldr	r4, [pc, #44]	@ (8029950 <global_stdio_init.part.0+0x34>)
 8029922:	4a0c      	ldr	r2, [pc, #48]	@ (8029954 <global_stdio_init.part.0+0x38>)
 8029924:	601a      	str	r2, [r3, #0]
 8029926:	4620      	mov	r0, r4
 8029928:	2200      	movs	r2, #0
 802992a:	2104      	movs	r1, #4
 802992c:	f7ff ff94 	bl	8029858 <std>
 8029930:	f104 0068 	add.w	r0, r4, #104	@ 0x68
 8029934:	2201      	movs	r2, #1
 8029936:	2109      	movs	r1, #9
 8029938:	f7ff ff8e 	bl	8029858 <std>
 802993c:	f104 00d0 	add.w	r0, r4, #208	@ 0xd0
 8029940:	2202      	movs	r2, #2
 8029942:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 8029946:	2112      	movs	r1, #18
 8029948:	f7ff bf86 	b.w	8029858 <std>
 802994c:	2402b17c 	.word	0x2402b17c
 8029950:	2402b044 	.word	0x2402b044
 8029954:	080298c5 	.word	0x080298c5

08029958 <__sfp_lock_acquire>:
 8029958:	4801      	ldr	r0, [pc, #4]	@ (8029960 <__sfp_lock_acquire+0x8>)
 802995a:	f000 bac6 	b.w	8029eea <__retarget_lock_acquire_recursive>
 802995e:	bf00      	nop
 8029960:	2402b185 	.word	0x2402b185

08029964 <__sfp_lock_release>:
 8029964:	4801      	ldr	r0, [pc, #4]	@ (802996c <__sfp_lock_release+0x8>)
 8029966:	f000 bac1 	b.w	8029eec <__retarget_lock_release_recursive>
 802996a:	bf00      	nop
 802996c:	2402b185 	.word	0x2402b185

08029970 <__sinit>:
 8029970:	b510      	push	{r4, lr}
 8029972:	4604      	mov	r4, r0
 8029974:	f7ff fff0 	bl	8029958 <__sfp_lock_acquire>
 8029978:	6a23      	ldr	r3, [r4, #32]
 802997a:	b11b      	cbz	r3, 8029984 <__sinit+0x14>
 802997c:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 8029980:	f7ff bff0 	b.w	8029964 <__sfp_lock_release>
 8029984:	4b04      	ldr	r3, [pc, #16]	@ (8029998 <__sinit+0x28>)
 8029986:	6223      	str	r3, [r4, #32]
 8029988:	4b04      	ldr	r3, [pc, #16]	@ (802999c <__sinit+0x2c>)
 802998a:	681b      	ldr	r3, [r3, #0]
 802998c:	2b00      	cmp	r3, #0
 802998e:	d1f5      	bne.n	802997c <__sinit+0xc>
 8029990:	f7ff ffc4 	bl	802991c <global_stdio_init.part.0>
 8029994:	e7f2      	b.n	802997c <__sinit+0xc>
 8029996:	bf00      	nop
 8029998:	080298dd 	.word	0x080298dd
 802999c:	2402b17c 	.word	0x2402b17c

080299a0 <_fwalk_sglue>:
 80299a0:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 80299a4:	4607      	mov	r7, r0
 80299a6:	4688      	mov	r8, r1
 80299a8:	4614      	mov	r4, r2
 80299aa:	2600      	movs	r6, #0
 80299ac:	e9d4 9501 	ldrd	r9, r5, [r4, #4]
 80299b0:	f1b9 0901 	subs.w	r9, r9, #1
 80299b4:	d505      	bpl.n	80299c2 <_fwalk_sglue+0x22>
 80299b6:	6824      	ldr	r4, [r4, #0]
 80299b8:	2c00      	cmp	r4, #0
 80299ba:	d1f7      	bne.n	80299ac <_fwalk_sglue+0xc>
 80299bc:	4630      	mov	r0, r6
 80299be:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 80299c2:	89ab      	ldrh	r3, [r5, #12]
 80299c4:	2b01      	cmp	r3, #1
 80299c6:	d907      	bls.n	80299d8 <_fwalk_sglue+0x38>
 80299c8:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 80299cc:	3301      	adds	r3, #1
 80299ce:	d003      	beq.n	80299d8 <_fwalk_sglue+0x38>
 80299d0:	4629      	mov	r1, r5
 80299d2:	4638      	mov	r0, r7
 80299d4:	47c0      	blx	r8
 80299d6:	4306      	orrs	r6, r0
 80299d8:	3568      	adds	r5, #104	@ 0x68
 80299da:	e7e9      	b.n	80299b0 <_fwalk_sglue+0x10>

080299dc <iprintf>:
 80299dc:	b40f      	push	{r0, r1, r2, r3}
 80299de:	b507      	push	{r0, r1, r2, lr}
 80299e0:	4906      	ldr	r1, [pc, #24]	@ (80299fc <iprintf+0x20>)
 80299e2:	ab04      	add	r3, sp, #16
 80299e4:	6808      	ldr	r0, [r1, #0]
 80299e6:	f853 2b04 	ldr.w	r2, [r3], #4
 80299ea:	6881      	ldr	r1, [r0, #8]
 80299ec:	9301      	str	r3, [sp, #4]
 80299ee:	f002 fa71 	bl	802bed4 <_vfiprintf_r>
 80299f2:	b003      	add	sp, #12
 80299f4:	f85d eb04 	ldr.w	lr, [sp], #4
 80299f8:	b004      	add	sp, #16
 80299fa:	4770      	bx	lr
 80299fc:	240001d4 	.word	0x240001d4

08029a00 <_puts_r>:
 8029a00:	6a03      	ldr	r3, [r0, #32]
 8029a02:	b570      	push	{r4, r5, r6, lr}
 8029a04:	6884      	ldr	r4, [r0, #8]
 8029a06:	4605      	mov	r5, r0
 8029a08:	460e      	mov	r6, r1
 8029a0a:	b90b      	cbnz	r3, 8029a10 <_puts_r+0x10>
 8029a0c:	f7ff ffb0 	bl	8029970 <__sinit>
 8029a10:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 8029a12:	07db      	lsls	r3, r3, #31
 8029a14:	d405      	bmi.n	8029a22 <_puts_r+0x22>
 8029a16:	89a3      	ldrh	r3, [r4, #12]
 8029a18:	0598      	lsls	r0, r3, #22
 8029a1a:	d402      	bmi.n	8029a22 <_puts_r+0x22>
 8029a1c:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 8029a1e:	f000 fa64 	bl	8029eea <__retarget_lock_acquire_recursive>
 8029a22:	89a3      	ldrh	r3, [r4, #12]
 8029a24:	0719      	lsls	r1, r3, #28
 8029a26:	d502      	bpl.n	8029a2e <_puts_r+0x2e>
 8029a28:	6923      	ldr	r3, [r4, #16]
 8029a2a:	2b00      	cmp	r3, #0
 8029a2c:	d135      	bne.n	8029a9a <_puts_r+0x9a>
 8029a2e:	4621      	mov	r1, r4
 8029a30:	4628      	mov	r0, r5
 8029a32:	f000 f8e5 	bl	8029c00 <__swsetup_r>
 8029a36:	b380      	cbz	r0, 8029a9a <_puts_r+0x9a>
 8029a38:	f04f 35ff 	mov.w	r5, #4294967295	@ 0xffffffff
 8029a3c:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 8029a3e:	07da      	lsls	r2, r3, #31
 8029a40:	d405      	bmi.n	8029a4e <_puts_r+0x4e>
 8029a42:	89a3      	ldrh	r3, [r4, #12]
 8029a44:	059b      	lsls	r3, r3, #22
 8029a46:	d402      	bmi.n	8029a4e <_puts_r+0x4e>
 8029a48:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 8029a4a:	f000 fa4f 	bl	8029eec <__retarget_lock_release_recursive>
 8029a4e:	4628      	mov	r0, r5
 8029a50:	bd70      	pop	{r4, r5, r6, pc}
 8029a52:	2b00      	cmp	r3, #0
 8029a54:	da04      	bge.n	8029a60 <_puts_r+0x60>
 8029a56:	69a2      	ldr	r2, [r4, #24]
 8029a58:	429a      	cmp	r2, r3
 8029a5a:	dc17      	bgt.n	8029a8c <_puts_r+0x8c>
 8029a5c:	290a      	cmp	r1, #10
 8029a5e:	d015      	beq.n	8029a8c <_puts_r+0x8c>
 8029a60:	6823      	ldr	r3, [r4, #0]
 8029a62:	1c5a      	adds	r2, r3, #1
 8029a64:	6022      	str	r2, [r4, #0]
 8029a66:	7019      	strb	r1, [r3, #0]
 8029a68:	68a3      	ldr	r3, [r4, #8]
 8029a6a:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 8029a6e:	3b01      	subs	r3, #1
 8029a70:	60a3      	str	r3, [r4, #8]
 8029a72:	2900      	cmp	r1, #0
 8029a74:	d1ed      	bne.n	8029a52 <_puts_r+0x52>
 8029a76:	2b00      	cmp	r3, #0
 8029a78:	da11      	bge.n	8029a9e <_puts_r+0x9e>
 8029a7a:	4622      	mov	r2, r4
 8029a7c:	210a      	movs	r1, #10
 8029a7e:	4628      	mov	r0, r5
 8029a80:	f000 f87f 	bl	8029b82 <__swbuf_r>
 8029a84:	3001      	adds	r0, #1
 8029a86:	d0d7      	beq.n	8029a38 <_puts_r+0x38>
 8029a88:	250a      	movs	r5, #10
 8029a8a:	e7d7      	b.n	8029a3c <_puts_r+0x3c>
 8029a8c:	4622      	mov	r2, r4
 8029a8e:	4628      	mov	r0, r5
 8029a90:	f000 f877 	bl	8029b82 <__swbuf_r>
 8029a94:	3001      	adds	r0, #1
 8029a96:	d1e7      	bne.n	8029a68 <_puts_r+0x68>
 8029a98:	e7ce      	b.n	8029a38 <_puts_r+0x38>
 8029a9a:	3e01      	subs	r6, #1
 8029a9c:	e7e4      	b.n	8029a68 <_puts_r+0x68>
 8029a9e:	6823      	ldr	r3, [r4, #0]
 8029aa0:	1c5a      	adds	r2, r3, #1
 8029aa2:	6022      	str	r2, [r4, #0]
 8029aa4:	220a      	movs	r2, #10
 8029aa6:	701a      	strb	r2, [r3, #0]
 8029aa8:	e7ee      	b.n	8029a88 <_puts_r+0x88>
	...

08029aac <puts>:
 8029aac:	4b02      	ldr	r3, [pc, #8]	@ (8029ab8 <puts+0xc>)
 8029aae:	4601      	mov	r1, r0
 8029ab0:	6818      	ldr	r0, [r3, #0]
 8029ab2:	f7ff bfa5 	b.w	8029a00 <_puts_r>
 8029ab6:	bf00      	nop
 8029ab8:	240001d4 	.word	0x240001d4

08029abc <siprintf>:
 8029abc:	b40e      	push	{r1, r2, r3}
 8029abe:	b500      	push	{lr}
 8029ac0:	b09c      	sub	sp, #112	@ 0x70
 8029ac2:	ab1d      	add	r3, sp, #116	@ 0x74
 8029ac4:	9002      	str	r0, [sp, #8]
 8029ac6:	9006      	str	r0, [sp, #24]
 8029ac8:	f06f 4100 	mvn.w	r1, #2147483648	@ 0x80000000
 8029acc:	4809      	ldr	r0, [pc, #36]	@ (8029af4 <siprintf+0x38>)
 8029ace:	9107      	str	r1, [sp, #28]
 8029ad0:	9104      	str	r1, [sp, #16]
 8029ad2:	4909      	ldr	r1, [pc, #36]	@ (8029af8 <siprintf+0x3c>)
 8029ad4:	f853 2b04 	ldr.w	r2, [r3], #4
 8029ad8:	9105      	str	r1, [sp, #20]
 8029ada:	6800      	ldr	r0, [r0, #0]
 8029adc:	9301      	str	r3, [sp, #4]
 8029ade:	a902      	add	r1, sp, #8
 8029ae0:	f002 f8d2 	bl	802bc88 <_svfiprintf_r>
 8029ae4:	9b02      	ldr	r3, [sp, #8]
 8029ae6:	2200      	movs	r2, #0
 8029ae8:	701a      	strb	r2, [r3, #0]
 8029aea:	b01c      	add	sp, #112	@ 0x70
 8029aec:	f85d eb04 	ldr.w	lr, [sp], #4
 8029af0:	b003      	add	sp, #12
 8029af2:	4770      	bx	lr
 8029af4:	240001d4 	.word	0x240001d4
 8029af8:	ffff0208 	.word	0xffff0208

08029afc <__sread>:
 8029afc:	b510      	push	{r4, lr}
 8029afe:	460c      	mov	r4, r1
 8029b00:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8029b04:	f000 f992 	bl	8029e2c <_read_r>
 8029b08:	2800      	cmp	r0, #0
 8029b0a:	bfab      	itete	ge
 8029b0c:	6d63      	ldrge	r3, [r4, #84]	@ 0x54
 8029b0e:	89a3      	ldrhlt	r3, [r4, #12]
 8029b10:	181b      	addge	r3, r3, r0
 8029b12:	f423 5380 	biclt.w	r3, r3, #4096	@ 0x1000
 8029b16:	bfac      	ite	ge
 8029b18:	6563      	strge	r3, [r4, #84]	@ 0x54
 8029b1a:	81a3      	strhlt	r3, [r4, #12]
 8029b1c:	bd10      	pop	{r4, pc}

08029b1e <__swrite>:
 8029b1e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8029b22:	461f      	mov	r7, r3
 8029b24:	898b      	ldrh	r3, [r1, #12]
 8029b26:	05db      	lsls	r3, r3, #23
 8029b28:	4605      	mov	r5, r0
 8029b2a:	460c      	mov	r4, r1
 8029b2c:	4616      	mov	r6, r2
 8029b2e:	d505      	bpl.n	8029b3c <__swrite+0x1e>
 8029b30:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8029b34:	2302      	movs	r3, #2
 8029b36:	2200      	movs	r2, #0
 8029b38:	f000 f966 	bl	8029e08 <_lseek_r>
 8029b3c:	89a3      	ldrh	r3, [r4, #12]
 8029b3e:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 8029b42:	f423 5380 	bic.w	r3, r3, #4096	@ 0x1000
 8029b46:	81a3      	strh	r3, [r4, #12]
 8029b48:	4632      	mov	r2, r6
 8029b4a:	463b      	mov	r3, r7
 8029b4c:	4628      	mov	r0, r5
 8029b4e:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 8029b52:	f000 b98d 	b.w	8029e70 <_write_r>

08029b56 <__sseek>:
 8029b56:	b510      	push	{r4, lr}
 8029b58:	460c      	mov	r4, r1
 8029b5a:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8029b5e:	f000 f953 	bl	8029e08 <_lseek_r>
 8029b62:	1c43      	adds	r3, r0, #1
 8029b64:	89a3      	ldrh	r3, [r4, #12]
 8029b66:	bf15      	itete	ne
 8029b68:	6560      	strne	r0, [r4, #84]	@ 0x54
 8029b6a:	f423 5380 	biceq.w	r3, r3, #4096	@ 0x1000
 8029b6e:	f443 5380 	orrne.w	r3, r3, #4096	@ 0x1000
 8029b72:	81a3      	strheq	r3, [r4, #12]
 8029b74:	bf18      	it	ne
 8029b76:	81a3      	strhne	r3, [r4, #12]
 8029b78:	bd10      	pop	{r4, pc}

08029b7a <__sclose>:
 8029b7a:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8029b7e:	f000 b8dd 	b.w	8029d3c <_close_r>

08029b82 <__swbuf_r>:
 8029b82:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8029b84:	460e      	mov	r6, r1
 8029b86:	4614      	mov	r4, r2
 8029b88:	4605      	mov	r5, r0
 8029b8a:	b118      	cbz	r0, 8029b94 <__swbuf_r+0x12>
 8029b8c:	6a03      	ldr	r3, [r0, #32]
 8029b8e:	b90b      	cbnz	r3, 8029b94 <__swbuf_r+0x12>
 8029b90:	f7ff feee 	bl	8029970 <__sinit>
 8029b94:	69a3      	ldr	r3, [r4, #24]
 8029b96:	60a3      	str	r3, [r4, #8]
 8029b98:	89a3      	ldrh	r3, [r4, #12]
 8029b9a:	071a      	lsls	r2, r3, #28
 8029b9c:	d501      	bpl.n	8029ba2 <__swbuf_r+0x20>
 8029b9e:	6923      	ldr	r3, [r4, #16]
 8029ba0:	b943      	cbnz	r3, 8029bb4 <__swbuf_r+0x32>
 8029ba2:	4621      	mov	r1, r4
 8029ba4:	4628      	mov	r0, r5
 8029ba6:	f000 f82b 	bl	8029c00 <__swsetup_r>
 8029baa:	b118      	cbz	r0, 8029bb4 <__swbuf_r+0x32>
 8029bac:	f04f 37ff 	mov.w	r7, #4294967295	@ 0xffffffff
 8029bb0:	4638      	mov	r0, r7
 8029bb2:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8029bb4:	6823      	ldr	r3, [r4, #0]
 8029bb6:	6922      	ldr	r2, [r4, #16]
 8029bb8:	1a98      	subs	r0, r3, r2
 8029bba:	6963      	ldr	r3, [r4, #20]
 8029bbc:	b2f6      	uxtb	r6, r6
 8029bbe:	4283      	cmp	r3, r0
 8029bc0:	4637      	mov	r7, r6
 8029bc2:	dc05      	bgt.n	8029bd0 <__swbuf_r+0x4e>
 8029bc4:	4621      	mov	r1, r4
 8029bc6:	4628      	mov	r0, r5
 8029bc8:	f002 fb20 	bl	802c20c <_fflush_r>
 8029bcc:	2800      	cmp	r0, #0
 8029bce:	d1ed      	bne.n	8029bac <__swbuf_r+0x2a>
 8029bd0:	68a3      	ldr	r3, [r4, #8]
 8029bd2:	3b01      	subs	r3, #1
 8029bd4:	60a3      	str	r3, [r4, #8]
 8029bd6:	6823      	ldr	r3, [r4, #0]
 8029bd8:	1c5a      	adds	r2, r3, #1
 8029bda:	6022      	str	r2, [r4, #0]
 8029bdc:	701e      	strb	r6, [r3, #0]
 8029bde:	6962      	ldr	r2, [r4, #20]
 8029be0:	1c43      	adds	r3, r0, #1
 8029be2:	429a      	cmp	r2, r3
 8029be4:	d004      	beq.n	8029bf0 <__swbuf_r+0x6e>
 8029be6:	89a3      	ldrh	r3, [r4, #12]
 8029be8:	07db      	lsls	r3, r3, #31
 8029bea:	d5e1      	bpl.n	8029bb0 <__swbuf_r+0x2e>
 8029bec:	2e0a      	cmp	r6, #10
 8029bee:	d1df      	bne.n	8029bb0 <__swbuf_r+0x2e>
 8029bf0:	4621      	mov	r1, r4
 8029bf2:	4628      	mov	r0, r5
 8029bf4:	f002 fb0a 	bl	802c20c <_fflush_r>
 8029bf8:	2800      	cmp	r0, #0
 8029bfa:	d0d9      	beq.n	8029bb0 <__swbuf_r+0x2e>
 8029bfc:	e7d6      	b.n	8029bac <__swbuf_r+0x2a>
	...

08029c00 <__swsetup_r>:
 8029c00:	b538      	push	{r3, r4, r5, lr}
 8029c02:	4b29      	ldr	r3, [pc, #164]	@ (8029ca8 <__swsetup_r+0xa8>)
 8029c04:	4605      	mov	r5, r0
 8029c06:	6818      	ldr	r0, [r3, #0]
 8029c08:	460c      	mov	r4, r1
 8029c0a:	b118      	cbz	r0, 8029c14 <__swsetup_r+0x14>
 8029c0c:	6a03      	ldr	r3, [r0, #32]
 8029c0e:	b90b      	cbnz	r3, 8029c14 <__swsetup_r+0x14>
 8029c10:	f7ff feae 	bl	8029970 <__sinit>
 8029c14:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8029c18:	0719      	lsls	r1, r3, #28
 8029c1a:	d422      	bmi.n	8029c62 <__swsetup_r+0x62>
 8029c1c:	06da      	lsls	r2, r3, #27
 8029c1e:	d407      	bmi.n	8029c30 <__swsetup_r+0x30>
 8029c20:	2209      	movs	r2, #9
 8029c22:	602a      	str	r2, [r5, #0]
 8029c24:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 8029c28:	81a3      	strh	r3, [r4, #12]
 8029c2a:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 8029c2e:	e033      	b.n	8029c98 <__swsetup_r+0x98>
 8029c30:	0758      	lsls	r0, r3, #29
 8029c32:	d512      	bpl.n	8029c5a <__swsetup_r+0x5a>
 8029c34:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 8029c36:	b141      	cbz	r1, 8029c4a <__swsetup_r+0x4a>
 8029c38:	f104 0344 	add.w	r3, r4, #68	@ 0x44
 8029c3c:	4299      	cmp	r1, r3
 8029c3e:	d002      	beq.n	8029c46 <__swsetup_r+0x46>
 8029c40:	4628      	mov	r0, r5
 8029c42:	f000 ff6b 	bl	802ab1c <_free_r>
 8029c46:	2300      	movs	r3, #0
 8029c48:	6363      	str	r3, [r4, #52]	@ 0x34
 8029c4a:	89a3      	ldrh	r3, [r4, #12]
 8029c4c:	f023 0324 	bic.w	r3, r3, #36	@ 0x24
 8029c50:	81a3      	strh	r3, [r4, #12]
 8029c52:	2300      	movs	r3, #0
 8029c54:	6063      	str	r3, [r4, #4]
 8029c56:	6923      	ldr	r3, [r4, #16]
 8029c58:	6023      	str	r3, [r4, #0]
 8029c5a:	89a3      	ldrh	r3, [r4, #12]
 8029c5c:	f043 0308 	orr.w	r3, r3, #8
 8029c60:	81a3      	strh	r3, [r4, #12]
 8029c62:	6923      	ldr	r3, [r4, #16]
 8029c64:	b94b      	cbnz	r3, 8029c7a <__swsetup_r+0x7a>
 8029c66:	89a3      	ldrh	r3, [r4, #12]
 8029c68:	f403 7320 	and.w	r3, r3, #640	@ 0x280
 8029c6c:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 8029c70:	d003      	beq.n	8029c7a <__swsetup_r+0x7a>
 8029c72:	4621      	mov	r1, r4
 8029c74:	4628      	mov	r0, r5
 8029c76:	f002 fb29 	bl	802c2cc <__smakebuf_r>
 8029c7a:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8029c7e:	f013 0201 	ands.w	r2, r3, #1
 8029c82:	d00a      	beq.n	8029c9a <__swsetup_r+0x9a>
 8029c84:	2200      	movs	r2, #0
 8029c86:	60a2      	str	r2, [r4, #8]
 8029c88:	6962      	ldr	r2, [r4, #20]
 8029c8a:	4252      	negs	r2, r2
 8029c8c:	61a2      	str	r2, [r4, #24]
 8029c8e:	6922      	ldr	r2, [r4, #16]
 8029c90:	b942      	cbnz	r2, 8029ca4 <__swsetup_r+0xa4>
 8029c92:	f013 0080 	ands.w	r0, r3, #128	@ 0x80
 8029c96:	d1c5      	bne.n	8029c24 <__swsetup_r+0x24>
 8029c98:	bd38      	pop	{r3, r4, r5, pc}
 8029c9a:	0799      	lsls	r1, r3, #30
 8029c9c:	bf58      	it	pl
 8029c9e:	6962      	ldrpl	r2, [r4, #20]
 8029ca0:	60a2      	str	r2, [r4, #8]
 8029ca2:	e7f4      	b.n	8029c8e <__swsetup_r+0x8e>
 8029ca4:	2000      	movs	r0, #0
 8029ca6:	e7f7      	b.n	8029c98 <__swsetup_r+0x98>
 8029ca8:	240001d4 	.word	0x240001d4

08029cac <memcmp>:
 8029cac:	b510      	push	{r4, lr}
 8029cae:	3901      	subs	r1, #1
 8029cb0:	4402      	add	r2, r0
 8029cb2:	4290      	cmp	r0, r2
 8029cb4:	d101      	bne.n	8029cba <memcmp+0xe>
 8029cb6:	2000      	movs	r0, #0
 8029cb8:	e005      	b.n	8029cc6 <memcmp+0x1a>
 8029cba:	7803      	ldrb	r3, [r0, #0]
 8029cbc:	f811 4f01 	ldrb.w	r4, [r1, #1]!
 8029cc0:	42a3      	cmp	r3, r4
 8029cc2:	d001      	beq.n	8029cc8 <memcmp+0x1c>
 8029cc4:	1b18      	subs	r0, r3, r4
 8029cc6:	bd10      	pop	{r4, pc}
 8029cc8:	3001      	adds	r0, #1
 8029cca:	e7f2      	b.n	8029cb2 <memcmp+0x6>

08029ccc <memmove>:
 8029ccc:	4288      	cmp	r0, r1
 8029cce:	b510      	push	{r4, lr}
 8029cd0:	eb01 0402 	add.w	r4, r1, r2
 8029cd4:	d902      	bls.n	8029cdc <memmove+0x10>
 8029cd6:	4284      	cmp	r4, r0
 8029cd8:	4623      	mov	r3, r4
 8029cda:	d807      	bhi.n	8029cec <memmove+0x20>
 8029cdc:	1e43      	subs	r3, r0, #1
 8029cde:	42a1      	cmp	r1, r4
 8029ce0:	d008      	beq.n	8029cf4 <memmove+0x28>
 8029ce2:	f811 2b01 	ldrb.w	r2, [r1], #1
 8029ce6:	f803 2f01 	strb.w	r2, [r3, #1]!
 8029cea:	e7f8      	b.n	8029cde <memmove+0x12>
 8029cec:	4402      	add	r2, r0
 8029cee:	4601      	mov	r1, r0
 8029cf0:	428a      	cmp	r2, r1
 8029cf2:	d100      	bne.n	8029cf6 <memmove+0x2a>
 8029cf4:	bd10      	pop	{r4, pc}
 8029cf6:	f813 4d01 	ldrb.w	r4, [r3, #-1]!
 8029cfa:	f802 4d01 	strb.w	r4, [r2, #-1]!
 8029cfe:	e7f7      	b.n	8029cf0 <memmove+0x24>

08029d00 <memset>:
 8029d00:	4402      	add	r2, r0
 8029d02:	4603      	mov	r3, r0
 8029d04:	4293      	cmp	r3, r2
 8029d06:	d100      	bne.n	8029d0a <memset+0xa>
 8029d08:	4770      	bx	lr
 8029d0a:	f803 1b01 	strb.w	r1, [r3], #1
 8029d0e:	e7f9      	b.n	8029d04 <memset+0x4>

08029d10 <strncmp>:
 8029d10:	b510      	push	{r4, lr}
 8029d12:	b16a      	cbz	r2, 8029d30 <strncmp+0x20>
 8029d14:	3901      	subs	r1, #1
 8029d16:	1884      	adds	r4, r0, r2
 8029d18:	f810 2b01 	ldrb.w	r2, [r0], #1
 8029d1c:	f811 3f01 	ldrb.w	r3, [r1, #1]!
 8029d20:	429a      	cmp	r2, r3
 8029d22:	d103      	bne.n	8029d2c <strncmp+0x1c>
 8029d24:	42a0      	cmp	r0, r4
 8029d26:	d001      	beq.n	8029d2c <strncmp+0x1c>
 8029d28:	2a00      	cmp	r2, #0
 8029d2a:	d1f5      	bne.n	8029d18 <strncmp+0x8>
 8029d2c:	1ad0      	subs	r0, r2, r3
 8029d2e:	bd10      	pop	{r4, pc}
 8029d30:	4610      	mov	r0, r2
 8029d32:	e7fc      	b.n	8029d2e <strncmp+0x1e>

08029d34 <_localeconv_r>:
 8029d34:	4800      	ldr	r0, [pc, #0]	@ (8029d38 <_localeconv_r+0x4>)
 8029d36:	4770      	bx	lr
 8029d38:	24000158 	.word	0x24000158

08029d3c <_close_r>:
 8029d3c:	b538      	push	{r3, r4, r5, lr}
 8029d3e:	4d06      	ldr	r5, [pc, #24]	@ (8029d58 <_close_r+0x1c>)
 8029d40:	2300      	movs	r3, #0
 8029d42:	4604      	mov	r4, r0
 8029d44:	4608      	mov	r0, r1
 8029d46:	602b      	str	r3, [r5, #0]
 8029d48:	f7d9 ff3c 	bl	8003bc4 <_close>
 8029d4c:	1c43      	adds	r3, r0, #1
 8029d4e:	d102      	bne.n	8029d56 <_close_r+0x1a>
 8029d50:	682b      	ldr	r3, [r5, #0]
 8029d52:	b103      	cbz	r3, 8029d56 <_close_r+0x1a>
 8029d54:	6023      	str	r3, [r4, #0]
 8029d56:	bd38      	pop	{r3, r4, r5, pc}
 8029d58:	2402b180 	.word	0x2402b180

08029d5c <_reclaim_reent>:
 8029d5c:	4b29      	ldr	r3, [pc, #164]	@ (8029e04 <_reclaim_reent+0xa8>)
 8029d5e:	681b      	ldr	r3, [r3, #0]
 8029d60:	4283      	cmp	r3, r0
 8029d62:	b570      	push	{r4, r5, r6, lr}
 8029d64:	4604      	mov	r4, r0
 8029d66:	d04b      	beq.n	8029e00 <_reclaim_reent+0xa4>
 8029d68:	69c3      	ldr	r3, [r0, #28]
 8029d6a:	b1ab      	cbz	r3, 8029d98 <_reclaim_reent+0x3c>
 8029d6c:	68db      	ldr	r3, [r3, #12]
 8029d6e:	b16b      	cbz	r3, 8029d8c <_reclaim_reent+0x30>
 8029d70:	2500      	movs	r5, #0
 8029d72:	69e3      	ldr	r3, [r4, #28]
 8029d74:	68db      	ldr	r3, [r3, #12]
 8029d76:	5959      	ldr	r1, [r3, r5]
 8029d78:	2900      	cmp	r1, #0
 8029d7a:	d13b      	bne.n	8029df4 <_reclaim_reent+0x98>
 8029d7c:	3504      	adds	r5, #4
 8029d7e:	2d80      	cmp	r5, #128	@ 0x80
 8029d80:	d1f7      	bne.n	8029d72 <_reclaim_reent+0x16>
 8029d82:	69e3      	ldr	r3, [r4, #28]
 8029d84:	4620      	mov	r0, r4
 8029d86:	68d9      	ldr	r1, [r3, #12]
 8029d88:	f000 fec8 	bl	802ab1c <_free_r>
 8029d8c:	69e3      	ldr	r3, [r4, #28]
 8029d8e:	6819      	ldr	r1, [r3, #0]
 8029d90:	b111      	cbz	r1, 8029d98 <_reclaim_reent+0x3c>
 8029d92:	4620      	mov	r0, r4
 8029d94:	f000 fec2 	bl	802ab1c <_free_r>
 8029d98:	6961      	ldr	r1, [r4, #20]
 8029d9a:	b111      	cbz	r1, 8029da2 <_reclaim_reent+0x46>
 8029d9c:	4620      	mov	r0, r4
 8029d9e:	f000 febd 	bl	802ab1c <_free_r>
 8029da2:	69e1      	ldr	r1, [r4, #28]
 8029da4:	b111      	cbz	r1, 8029dac <_reclaim_reent+0x50>
 8029da6:	4620      	mov	r0, r4
 8029da8:	f000 feb8 	bl	802ab1c <_free_r>
 8029dac:	6b21      	ldr	r1, [r4, #48]	@ 0x30
 8029dae:	b111      	cbz	r1, 8029db6 <_reclaim_reent+0x5a>
 8029db0:	4620      	mov	r0, r4
 8029db2:	f000 feb3 	bl	802ab1c <_free_r>
 8029db6:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 8029db8:	b111      	cbz	r1, 8029dc0 <_reclaim_reent+0x64>
 8029dba:	4620      	mov	r0, r4
 8029dbc:	f000 feae 	bl	802ab1c <_free_r>
 8029dc0:	6ba1      	ldr	r1, [r4, #56]	@ 0x38
 8029dc2:	b111      	cbz	r1, 8029dca <_reclaim_reent+0x6e>
 8029dc4:	4620      	mov	r0, r4
 8029dc6:	f000 fea9 	bl	802ab1c <_free_r>
 8029dca:	6ca1      	ldr	r1, [r4, #72]	@ 0x48
 8029dcc:	b111      	cbz	r1, 8029dd4 <_reclaim_reent+0x78>
 8029dce:	4620      	mov	r0, r4
 8029dd0:	f000 fea4 	bl	802ab1c <_free_r>
 8029dd4:	6c61      	ldr	r1, [r4, #68]	@ 0x44
 8029dd6:	b111      	cbz	r1, 8029dde <_reclaim_reent+0x82>
 8029dd8:	4620      	mov	r0, r4
 8029dda:	f000 fe9f 	bl	802ab1c <_free_r>
 8029dde:	6ae1      	ldr	r1, [r4, #44]	@ 0x2c
 8029de0:	b111      	cbz	r1, 8029de8 <_reclaim_reent+0x8c>
 8029de2:	4620      	mov	r0, r4
 8029de4:	f000 fe9a 	bl	802ab1c <_free_r>
 8029de8:	6a23      	ldr	r3, [r4, #32]
 8029dea:	b14b      	cbz	r3, 8029e00 <_reclaim_reent+0xa4>
 8029dec:	4620      	mov	r0, r4
 8029dee:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
 8029df2:	4718      	bx	r3
 8029df4:	680e      	ldr	r6, [r1, #0]
 8029df6:	4620      	mov	r0, r4
 8029df8:	f000 fe90 	bl	802ab1c <_free_r>
 8029dfc:	4631      	mov	r1, r6
 8029dfe:	e7bb      	b.n	8029d78 <_reclaim_reent+0x1c>
 8029e00:	bd70      	pop	{r4, r5, r6, pc}
 8029e02:	bf00      	nop
 8029e04:	240001d4 	.word	0x240001d4

08029e08 <_lseek_r>:
 8029e08:	b538      	push	{r3, r4, r5, lr}
 8029e0a:	4d07      	ldr	r5, [pc, #28]	@ (8029e28 <_lseek_r+0x20>)
 8029e0c:	4604      	mov	r4, r0
 8029e0e:	4608      	mov	r0, r1
 8029e10:	4611      	mov	r1, r2
 8029e12:	2200      	movs	r2, #0
 8029e14:	602a      	str	r2, [r5, #0]
 8029e16:	461a      	mov	r2, r3
 8029e18:	f7d9 fefb 	bl	8003c12 <_lseek>
 8029e1c:	1c43      	adds	r3, r0, #1
 8029e1e:	d102      	bne.n	8029e26 <_lseek_r+0x1e>
 8029e20:	682b      	ldr	r3, [r5, #0]
 8029e22:	b103      	cbz	r3, 8029e26 <_lseek_r+0x1e>
 8029e24:	6023      	str	r3, [r4, #0]
 8029e26:	bd38      	pop	{r3, r4, r5, pc}
 8029e28:	2402b180 	.word	0x2402b180

08029e2c <_read_r>:
 8029e2c:	b538      	push	{r3, r4, r5, lr}
 8029e2e:	4d07      	ldr	r5, [pc, #28]	@ (8029e4c <_read_r+0x20>)
 8029e30:	4604      	mov	r4, r0
 8029e32:	4608      	mov	r0, r1
 8029e34:	4611      	mov	r1, r2
 8029e36:	2200      	movs	r2, #0
 8029e38:	602a      	str	r2, [r5, #0]
 8029e3a:	461a      	mov	r2, r3
 8029e3c:	f7d9 fe89 	bl	8003b52 <_read>
 8029e40:	1c43      	adds	r3, r0, #1
 8029e42:	d102      	bne.n	8029e4a <_read_r+0x1e>
 8029e44:	682b      	ldr	r3, [r5, #0]
 8029e46:	b103      	cbz	r3, 8029e4a <_read_r+0x1e>
 8029e48:	6023      	str	r3, [r4, #0]
 8029e4a:	bd38      	pop	{r3, r4, r5, pc}
 8029e4c:	2402b180 	.word	0x2402b180

08029e50 <_sbrk_r>:
 8029e50:	b538      	push	{r3, r4, r5, lr}
 8029e52:	4d06      	ldr	r5, [pc, #24]	@ (8029e6c <_sbrk_r+0x1c>)
 8029e54:	2300      	movs	r3, #0
 8029e56:	4604      	mov	r4, r0
 8029e58:	4608      	mov	r0, r1
 8029e5a:	602b      	str	r3, [r5, #0]
 8029e5c:	f7d9 fee6 	bl	8003c2c <_sbrk>
 8029e60:	1c43      	adds	r3, r0, #1
 8029e62:	d102      	bne.n	8029e6a <_sbrk_r+0x1a>
 8029e64:	682b      	ldr	r3, [r5, #0]
 8029e66:	b103      	cbz	r3, 8029e6a <_sbrk_r+0x1a>
 8029e68:	6023      	str	r3, [r4, #0]
 8029e6a:	bd38      	pop	{r3, r4, r5, pc}
 8029e6c:	2402b180 	.word	0x2402b180

08029e70 <_write_r>:
 8029e70:	b538      	push	{r3, r4, r5, lr}
 8029e72:	4d07      	ldr	r5, [pc, #28]	@ (8029e90 <_write_r+0x20>)
 8029e74:	4604      	mov	r4, r0
 8029e76:	4608      	mov	r0, r1
 8029e78:	4611      	mov	r1, r2
 8029e7a:	2200      	movs	r2, #0
 8029e7c:	602a      	str	r2, [r5, #0]
 8029e7e:	461a      	mov	r2, r3
 8029e80:	f7d9 fe84 	bl	8003b8c <_write>
 8029e84:	1c43      	adds	r3, r0, #1
 8029e86:	d102      	bne.n	8029e8e <_write_r+0x1e>
 8029e88:	682b      	ldr	r3, [r5, #0]
 8029e8a:	b103      	cbz	r3, 8029e8e <_write_r+0x1e>
 8029e8c:	6023      	str	r3, [r4, #0]
 8029e8e:	bd38      	pop	{r3, r4, r5, pc}
 8029e90:	2402b180 	.word	0x2402b180

08029e94 <__errno>:
 8029e94:	4b01      	ldr	r3, [pc, #4]	@ (8029e9c <__errno+0x8>)
 8029e96:	6818      	ldr	r0, [r3, #0]
 8029e98:	4770      	bx	lr
 8029e9a:	bf00      	nop
 8029e9c:	240001d4 	.word	0x240001d4

08029ea0 <__libc_init_array>:
 8029ea0:	b570      	push	{r4, r5, r6, lr}
 8029ea2:	4d0d      	ldr	r5, [pc, #52]	@ (8029ed8 <__libc_init_array+0x38>)
 8029ea4:	4c0d      	ldr	r4, [pc, #52]	@ (8029edc <__libc_init_array+0x3c>)
 8029ea6:	1b64      	subs	r4, r4, r5
 8029ea8:	10a4      	asrs	r4, r4, #2
 8029eaa:	2600      	movs	r6, #0
 8029eac:	42a6      	cmp	r6, r4
 8029eae:	d109      	bne.n	8029ec4 <__libc_init_array+0x24>
 8029eb0:	4d0b      	ldr	r5, [pc, #44]	@ (8029ee0 <__libc_init_array+0x40>)
 8029eb2:	4c0c      	ldr	r4, [pc, #48]	@ (8029ee4 <__libc_init_array+0x44>)
 8029eb4:	f002 fac8 	bl	802c448 <_init>
 8029eb8:	1b64      	subs	r4, r4, r5
 8029eba:	10a4      	asrs	r4, r4, #2
 8029ebc:	2600      	movs	r6, #0
 8029ebe:	42a6      	cmp	r6, r4
 8029ec0:	d105      	bne.n	8029ece <__libc_init_array+0x2e>
 8029ec2:	bd70      	pop	{r4, r5, r6, pc}
 8029ec4:	f855 3b04 	ldr.w	r3, [r5], #4
 8029ec8:	4798      	blx	r3
 8029eca:	3601      	adds	r6, #1
 8029ecc:	e7ee      	b.n	8029eac <__libc_init_array+0xc>
 8029ece:	f855 3b04 	ldr.w	r3, [r5], #4
 8029ed2:	4798      	blx	r3
 8029ed4:	3601      	adds	r6, #1
 8029ed6:	e7f2      	b.n	8029ebe <__libc_init_array+0x1e>
 8029ed8:	08031104 	.word	0x08031104
 8029edc:	08031104 	.word	0x08031104
 8029ee0:	08031104 	.word	0x08031104
 8029ee4:	08031108 	.word	0x08031108

08029ee8 <__retarget_lock_init_recursive>:
 8029ee8:	4770      	bx	lr

08029eea <__retarget_lock_acquire_recursive>:
 8029eea:	4770      	bx	lr

08029eec <__retarget_lock_release_recursive>:
 8029eec:	4770      	bx	lr

08029eee <memcpy>:
 8029eee:	440a      	add	r2, r1
 8029ef0:	4291      	cmp	r1, r2
 8029ef2:	f100 33ff 	add.w	r3, r0, #4294967295	@ 0xffffffff
 8029ef6:	d100      	bne.n	8029efa <memcpy+0xc>
 8029ef8:	4770      	bx	lr
 8029efa:	b510      	push	{r4, lr}
 8029efc:	f811 4b01 	ldrb.w	r4, [r1], #1
 8029f00:	f803 4f01 	strb.w	r4, [r3, #1]!
 8029f04:	4291      	cmp	r1, r2
 8029f06:	d1f9      	bne.n	8029efc <memcpy+0xe>
 8029f08:	bd10      	pop	{r4, pc}
 8029f0a:	0000      	movs	r0, r0
 8029f0c:	0000      	movs	r0, r0
	...

08029f10 <nan>:
 8029f10:	ed9f 0b01 	vldr	d0, [pc, #4]	@ 8029f18 <nan+0x8>
 8029f14:	4770      	bx	lr
 8029f16:	bf00      	nop
 8029f18:	00000000 	.word	0x00000000
 8029f1c:	7ff80000 	.word	0x7ff80000

08029f20 <__assert_func>:
 8029f20:	b51f      	push	{r0, r1, r2, r3, r4, lr}
 8029f22:	4614      	mov	r4, r2
 8029f24:	461a      	mov	r2, r3
 8029f26:	4b09      	ldr	r3, [pc, #36]	@ (8029f4c <__assert_func+0x2c>)
 8029f28:	681b      	ldr	r3, [r3, #0]
 8029f2a:	4605      	mov	r5, r0
 8029f2c:	68d8      	ldr	r0, [r3, #12]
 8029f2e:	b954      	cbnz	r4, 8029f46 <__assert_func+0x26>
 8029f30:	4b07      	ldr	r3, [pc, #28]	@ (8029f50 <__assert_func+0x30>)
 8029f32:	461c      	mov	r4, r3
 8029f34:	e9cd 3401 	strd	r3, r4, [sp, #4]
 8029f38:	9100      	str	r1, [sp, #0]
 8029f3a:	462b      	mov	r3, r5
 8029f3c:	4905      	ldr	r1, [pc, #20]	@ (8029f54 <__assert_func+0x34>)
 8029f3e:	f002 f98d 	bl	802c25c <fiprintf>
 8029f42:	f002 fa21 	bl	802c388 <abort>
 8029f46:	4b04      	ldr	r3, [pc, #16]	@ (8029f58 <__assert_func+0x38>)
 8029f48:	e7f4      	b.n	8029f34 <__assert_func+0x14>
 8029f4a:	bf00      	nop
 8029f4c:	240001d4 	.word	0x240001d4
 8029f50:	08030eb8 	.word	0x08030eb8
 8029f54:	08030e8a 	.word	0x08030e8a
 8029f58:	08030e7d 	.word	0x08030e7d

08029f5c <quorem>:
 8029f5c:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8029f60:	6903      	ldr	r3, [r0, #16]
 8029f62:	690c      	ldr	r4, [r1, #16]
 8029f64:	42a3      	cmp	r3, r4
 8029f66:	4607      	mov	r7, r0
 8029f68:	db7e      	blt.n	802a068 <quorem+0x10c>
 8029f6a:	3c01      	subs	r4, #1
 8029f6c:	f101 0814 	add.w	r8, r1, #20
 8029f70:	00a3      	lsls	r3, r4, #2
 8029f72:	f100 0514 	add.w	r5, r0, #20
 8029f76:	9300      	str	r3, [sp, #0]
 8029f78:	eb05 0384 	add.w	r3, r5, r4, lsl #2
 8029f7c:	9301      	str	r3, [sp, #4]
 8029f7e:	f858 3024 	ldr.w	r3, [r8, r4, lsl #2]
 8029f82:	f855 2024 	ldr.w	r2, [r5, r4, lsl #2]
 8029f86:	3301      	adds	r3, #1
 8029f88:	429a      	cmp	r2, r3
 8029f8a:	eb08 0984 	add.w	r9, r8, r4, lsl #2
 8029f8e:	fbb2 f6f3 	udiv	r6, r2, r3
 8029f92:	d32e      	bcc.n	8029ff2 <quorem+0x96>
 8029f94:	f04f 0a00 	mov.w	sl, #0
 8029f98:	46c4      	mov	ip, r8
 8029f9a:	46ae      	mov	lr, r5
 8029f9c:	46d3      	mov	fp, sl
 8029f9e:	f85c 3b04 	ldr.w	r3, [ip], #4
 8029fa2:	b298      	uxth	r0, r3
 8029fa4:	fb06 a000 	mla	r0, r6, r0, sl
 8029fa8:	0c02      	lsrs	r2, r0, #16
 8029faa:	0c1b      	lsrs	r3, r3, #16
 8029fac:	fb06 2303 	mla	r3, r6, r3, r2
 8029fb0:	f8de 2000 	ldr.w	r2, [lr]
 8029fb4:	b280      	uxth	r0, r0
 8029fb6:	b292      	uxth	r2, r2
 8029fb8:	1a12      	subs	r2, r2, r0
 8029fba:	445a      	add	r2, fp
 8029fbc:	f8de 0000 	ldr.w	r0, [lr]
 8029fc0:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 8029fc4:	b29b      	uxth	r3, r3
 8029fc6:	ebc3 4322 	rsb	r3, r3, r2, asr #16
 8029fca:	eb03 4310 	add.w	r3, r3, r0, lsr #16
 8029fce:	b292      	uxth	r2, r2
 8029fd0:	ea42 4203 	orr.w	r2, r2, r3, lsl #16
 8029fd4:	45e1      	cmp	r9, ip
 8029fd6:	f84e 2b04 	str.w	r2, [lr], #4
 8029fda:	ea4f 4b23 	mov.w	fp, r3, asr #16
 8029fde:	d2de      	bcs.n	8029f9e <quorem+0x42>
 8029fe0:	9b00      	ldr	r3, [sp, #0]
 8029fe2:	58eb      	ldr	r3, [r5, r3]
 8029fe4:	b92b      	cbnz	r3, 8029ff2 <quorem+0x96>
 8029fe6:	9b01      	ldr	r3, [sp, #4]
 8029fe8:	3b04      	subs	r3, #4
 8029fea:	429d      	cmp	r5, r3
 8029fec:	461a      	mov	r2, r3
 8029fee:	d32f      	bcc.n	802a050 <quorem+0xf4>
 8029ff0:	613c      	str	r4, [r7, #16]
 8029ff2:	4638      	mov	r0, r7
 8029ff4:	f001 fbec 	bl	802b7d0 <__mcmp>
 8029ff8:	2800      	cmp	r0, #0
 8029ffa:	db25      	blt.n	802a048 <quorem+0xec>
 8029ffc:	4629      	mov	r1, r5
 8029ffe:	2000      	movs	r0, #0
 802a000:	f858 2b04 	ldr.w	r2, [r8], #4
 802a004:	f8d1 c000 	ldr.w	ip, [r1]
 802a008:	fa1f fe82 	uxth.w	lr, r2
 802a00c:	fa1f f38c 	uxth.w	r3, ip
 802a010:	eba3 030e 	sub.w	r3, r3, lr
 802a014:	4403      	add	r3, r0
 802a016:	0c12      	lsrs	r2, r2, #16
 802a018:	ebc2 4223 	rsb	r2, r2, r3, asr #16
 802a01c:	eb02 421c 	add.w	r2, r2, ip, lsr #16
 802a020:	b29b      	uxth	r3, r3
 802a022:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
 802a026:	45c1      	cmp	r9, r8
 802a028:	f841 3b04 	str.w	r3, [r1], #4
 802a02c:	ea4f 4022 	mov.w	r0, r2, asr #16
 802a030:	d2e6      	bcs.n	802a000 <quorem+0xa4>
 802a032:	f855 2024 	ldr.w	r2, [r5, r4, lsl #2]
 802a036:	eb05 0384 	add.w	r3, r5, r4, lsl #2
 802a03a:	b922      	cbnz	r2, 802a046 <quorem+0xea>
 802a03c:	3b04      	subs	r3, #4
 802a03e:	429d      	cmp	r5, r3
 802a040:	461a      	mov	r2, r3
 802a042:	d30b      	bcc.n	802a05c <quorem+0x100>
 802a044:	613c      	str	r4, [r7, #16]
 802a046:	3601      	adds	r6, #1
 802a048:	4630      	mov	r0, r6
 802a04a:	b003      	add	sp, #12
 802a04c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802a050:	6812      	ldr	r2, [r2, #0]
 802a052:	3b04      	subs	r3, #4
 802a054:	2a00      	cmp	r2, #0
 802a056:	d1cb      	bne.n	8029ff0 <quorem+0x94>
 802a058:	3c01      	subs	r4, #1
 802a05a:	e7c6      	b.n	8029fea <quorem+0x8e>
 802a05c:	6812      	ldr	r2, [r2, #0]
 802a05e:	3b04      	subs	r3, #4
 802a060:	2a00      	cmp	r2, #0
 802a062:	d1ef      	bne.n	802a044 <quorem+0xe8>
 802a064:	3c01      	subs	r4, #1
 802a066:	e7ea      	b.n	802a03e <quorem+0xe2>
 802a068:	2000      	movs	r0, #0
 802a06a:	e7ee      	b.n	802a04a <quorem+0xee>
 802a06c:	0000      	movs	r0, r0
	...

0802a070 <_dtoa_r>:
 802a070:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802a074:	ed2d 8b02 	vpush	{d8}
 802a078:	69c7      	ldr	r7, [r0, #28]
 802a07a:	b091      	sub	sp, #68	@ 0x44
 802a07c:	ed8d 0b02 	vstr	d0, [sp, #8]
 802a080:	ec55 4b10 	vmov	r4, r5, d0
 802a084:	9e1c      	ldr	r6, [sp, #112]	@ 0x70
 802a086:	9107      	str	r1, [sp, #28]
 802a088:	4681      	mov	r9, r0
 802a08a:	9209      	str	r2, [sp, #36]	@ 0x24
 802a08c:	930d      	str	r3, [sp, #52]	@ 0x34
 802a08e:	b97f      	cbnz	r7, 802a0b0 <_dtoa_r+0x40>
 802a090:	2010      	movs	r0, #16
 802a092:	f7fe f8bb 	bl	802820c <malloc>
 802a096:	4602      	mov	r2, r0
 802a098:	f8c9 001c 	str.w	r0, [r9, #28]
 802a09c:	b920      	cbnz	r0, 802a0a8 <_dtoa_r+0x38>
 802a09e:	4ba0      	ldr	r3, [pc, #640]	@ (802a320 <_dtoa_r+0x2b0>)
 802a0a0:	21ef      	movs	r1, #239	@ 0xef
 802a0a2:	48a0      	ldr	r0, [pc, #640]	@ (802a324 <_dtoa_r+0x2b4>)
 802a0a4:	f7ff ff3c 	bl	8029f20 <__assert_func>
 802a0a8:	e9c0 7701 	strd	r7, r7, [r0, #4]
 802a0ac:	6007      	str	r7, [r0, #0]
 802a0ae:	60c7      	str	r7, [r0, #12]
 802a0b0:	f8d9 301c 	ldr.w	r3, [r9, #28]
 802a0b4:	6819      	ldr	r1, [r3, #0]
 802a0b6:	b159      	cbz	r1, 802a0d0 <_dtoa_r+0x60>
 802a0b8:	685a      	ldr	r2, [r3, #4]
 802a0ba:	604a      	str	r2, [r1, #4]
 802a0bc:	2301      	movs	r3, #1
 802a0be:	4093      	lsls	r3, r2
 802a0c0:	608b      	str	r3, [r1, #8]
 802a0c2:	4648      	mov	r0, r9
 802a0c4:	f001 f900 	bl	802b2c8 <_Bfree>
 802a0c8:	f8d9 301c 	ldr.w	r3, [r9, #28]
 802a0cc:	2200      	movs	r2, #0
 802a0ce:	601a      	str	r2, [r3, #0]
 802a0d0:	1e2b      	subs	r3, r5, #0
 802a0d2:	bfbb      	ittet	lt
 802a0d4:	f023 4300 	biclt.w	r3, r3, #2147483648	@ 0x80000000
 802a0d8:	9303      	strlt	r3, [sp, #12]
 802a0da:	2300      	movge	r3, #0
 802a0dc:	2201      	movlt	r2, #1
 802a0de:	bfac      	ite	ge
 802a0e0:	6033      	strge	r3, [r6, #0]
 802a0e2:	6032      	strlt	r2, [r6, #0]
 802a0e4:	4b90      	ldr	r3, [pc, #576]	@ (802a328 <_dtoa_r+0x2b8>)
 802a0e6:	9e03      	ldr	r6, [sp, #12]
 802a0e8:	43b3      	bics	r3, r6
 802a0ea:	d110      	bne.n	802a10e <_dtoa_r+0x9e>
 802a0ec:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 802a0ee:	f242 730f 	movw	r3, #9999	@ 0x270f
 802a0f2:	6013      	str	r3, [r2, #0]
 802a0f4:	f3c6 0313 	ubfx	r3, r6, #0, #20
 802a0f8:	4323      	orrs	r3, r4
 802a0fa:	f000 84de 	beq.w	802aaba <_dtoa_r+0xa4a>
 802a0fe:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802a100:	4f8a      	ldr	r7, [pc, #552]	@ (802a32c <_dtoa_r+0x2bc>)
 802a102:	2b00      	cmp	r3, #0
 802a104:	f000 84e0 	beq.w	802aac8 <_dtoa_r+0xa58>
 802a108:	1cfb      	adds	r3, r7, #3
 802a10a:	f000 bcdb 	b.w	802aac4 <_dtoa_r+0xa54>
 802a10e:	ed9d 8b02 	vldr	d8, [sp, #8]
 802a112:	eeb5 8b40 	vcmp.f64	d8, #0.0
 802a116:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a11a:	d10a      	bne.n	802a132 <_dtoa_r+0xc2>
 802a11c:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 802a11e:	2301      	movs	r3, #1
 802a120:	6013      	str	r3, [r2, #0]
 802a122:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802a124:	b113      	cbz	r3, 802a12c <_dtoa_r+0xbc>
 802a126:	9a1d      	ldr	r2, [sp, #116]	@ 0x74
 802a128:	4b81      	ldr	r3, [pc, #516]	@ (802a330 <_dtoa_r+0x2c0>)
 802a12a:	6013      	str	r3, [r2, #0]
 802a12c:	4f81      	ldr	r7, [pc, #516]	@ (802a334 <_dtoa_r+0x2c4>)
 802a12e:	f000 bccb 	b.w	802aac8 <_dtoa_r+0xa58>
 802a132:	aa0e      	add	r2, sp, #56	@ 0x38
 802a134:	a90f      	add	r1, sp, #60	@ 0x3c
 802a136:	4648      	mov	r0, r9
 802a138:	eeb0 0b48 	vmov.f64	d0, d8
 802a13c:	f001 fc68 	bl	802ba10 <__d2b>
 802a140:	f3c6 530a 	ubfx	r3, r6, #20, #11
 802a144:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802a146:	9001      	str	r0, [sp, #4]
 802a148:	2b00      	cmp	r3, #0
 802a14a:	d045      	beq.n	802a1d8 <_dtoa_r+0x168>
 802a14c:	eeb0 7b48 	vmov.f64	d7, d8
 802a150:	ee18 1a90 	vmov	r1, s17
 802a154:	f3c1 0113 	ubfx	r1, r1, #0, #20
 802a158:	f041 517f 	orr.w	r1, r1, #1069547520	@ 0x3fc00000
 802a15c:	f441 1140 	orr.w	r1, r1, #3145728	@ 0x300000
 802a160:	f2a3 33ff 	subw	r3, r3, #1023	@ 0x3ff
 802a164:	2500      	movs	r5, #0
 802a166:	ee07 1a90 	vmov	s15, r1
 802a16a:	eeb7 6b08 	vmov.f64	d6, #120	@ 0x3fc00000  1.5
 802a16e:	ed9f 5b66 	vldr	d5, [pc, #408]	@ 802a308 <_dtoa_r+0x298>
 802a172:	ee37 7b46 	vsub.f64	d7, d7, d6
 802a176:	ed9f 6b66 	vldr	d6, [pc, #408]	@ 802a310 <_dtoa_r+0x2a0>
 802a17a:	eea7 6b05 	vfma.f64	d6, d7, d5
 802a17e:	ed9f 5b66 	vldr	d5, [pc, #408]	@ 802a318 <_dtoa_r+0x2a8>
 802a182:	ee07 3a90 	vmov	s15, r3
 802a186:	eeb8 4be7 	vcvt.f64.s32	d4, s15
 802a18a:	eeb0 7b46 	vmov.f64	d7, d6
 802a18e:	eea4 7b05 	vfma.f64	d7, d4, d5
 802a192:	eefd 6bc7 	vcvt.s32.f64	s13, d7
 802a196:	eeb5 7bc0 	vcmpe.f64	d7, #0.0
 802a19a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a19e:	ee16 8a90 	vmov	r8, s13
 802a1a2:	d508      	bpl.n	802a1b6 <_dtoa_r+0x146>
 802a1a4:	eeb8 6be6 	vcvt.f64.s32	d6, s13
 802a1a8:	eeb4 6b47 	vcmp.f64	d6, d7
 802a1ac:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a1b0:	bf18      	it	ne
 802a1b2:	f108 38ff 	addne.w	r8, r8, #4294967295	@ 0xffffffff
 802a1b6:	f1b8 0f16 	cmp.w	r8, #22
 802a1ba:	d82b      	bhi.n	802a214 <_dtoa_r+0x1a4>
 802a1bc:	495e      	ldr	r1, [pc, #376]	@ (802a338 <_dtoa_r+0x2c8>)
 802a1be:	eb01 01c8 	add.w	r1, r1, r8, lsl #3
 802a1c2:	ed91 7b00 	vldr	d7, [r1]
 802a1c6:	eeb4 8bc7 	vcmpe.f64	d8, d7
 802a1ca:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a1ce:	d501      	bpl.n	802a1d4 <_dtoa_r+0x164>
 802a1d0:	f108 38ff 	add.w	r8, r8, #4294967295	@ 0xffffffff
 802a1d4:	2100      	movs	r1, #0
 802a1d6:	e01e      	b.n	802a216 <_dtoa_r+0x1a6>
 802a1d8:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802a1da:	4413      	add	r3, r2
 802a1dc:	f203 4132 	addw	r1, r3, #1074	@ 0x432
 802a1e0:	2920      	cmp	r1, #32
 802a1e2:	bfc1      	itttt	gt
 802a1e4:	f1c1 0140 	rsbgt	r1, r1, #64	@ 0x40
 802a1e8:	408e      	lslgt	r6, r1
 802a1ea:	f203 4112 	addwgt	r1, r3, #1042	@ 0x412
 802a1ee:	fa24 f101 	lsrgt.w	r1, r4, r1
 802a1f2:	bfd6      	itet	le
 802a1f4:	f1c1 0120 	rsble	r1, r1, #32
 802a1f8:	4331      	orrgt	r1, r6
 802a1fa:	fa04 f101 	lslle.w	r1, r4, r1
 802a1fe:	ee07 1a90 	vmov	s15, r1
 802a202:	eeb8 7b67 	vcvt.f64.u32	d7, s15
 802a206:	3b01      	subs	r3, #1
 802a208:	ee17 1a90 	vmov	r1, s15
 802a20c:	2501      	movs	r5, #1
 802a20e:	f1a1 71f8 	sub.w	r1, r1, #32505856	@ 0x1f00000
 802a212:	e7a8      	b.n	802a166 <_dtoa_r+0xf6>
 802a214:	2101      	movs	r1, #1
 802a216:	1ad2      	subs	r2, r2, r3
 802a218:	1e53      	subs	r3, r2, #1
 802a21a:	9306      	str	r3, [sp, #24]
 802a21c:	bf45      	ittet	mi
 802a21e:	f1c2 0301 	rsbmi	r3, r2, #1
 802a222:	9305      	strmi	r3, [sp, #20]
 802a224:	2300      	movpl	r3, #0
 802a226:	2300      	movmi	r3, #0
 802a228:	bf4c      	ite	mi
 802a22a:	9306      	strmi	r3, [sp, #24]
 802a22c:	9305      	strpl	r3, [sp, #20]
 802a22e:	f1b8 0f00 	cmp.w	r8, #0
 802a232:	910c      	str	r1, [sp, #48]	@ 0x30
 802a234:	db18      	blt.n	802a268 <_dtoa_r+0x1f8>
 802a236:	9b06      	ldr	r3, [sp, #24]
 802a238:	f8cd 8028 	str.w	r8, [sp, #40]	@ 0x28
 802a23c:	4443      	add	r3, r8
 802a23e:	9306      	str	r3, [sp, #24]
 802a240:	2300      	movs	r3, #0
 802a242:	9a07      	ldr	r2, [sp, #28]
 802a244:	2a09      	cmp	r2, #9
 802a246:	d849      	bhi.n	802a2dc <_dtoa_r+0x26c>
 802a248:	2a05      	cmp	r2, #5
 802a24a:	bfc4      	itt	gt
 802a24c:	3a04      	subgt	r2, #4
 802a24e:	9207      	strgt	r2, [sp, #28]
 802a250:	9a07      	ldr	r2, [sp, #28]
 802a252:	f1a2 0202 	sub.w	r2, r2, #2
 802a256:	bfcc      	ite	gt
 802a258:	2400      	movgt	r4, #0
 802a25a:	2401      	movle	r4, #1
 802a25c:	2a03      	cmp	r2, #3
 802a25e:	d848      	bhi.n	802a2f2 <_dtoa_r+0x282>
 802a260:	e8df f002 	tbb	[pc, r2]
 802a264:	3a2c2e0b 	.word	0x3a2c2e0b
 802a268:	9b05      	ldr	r3, [sp, #20]
 802a26a:	2200      	movs	r2, #0
 802a26c:	eba3 0308 	sub.w	r3, r3, r8
 802a270:	9305      	str	r3, [sp, #20]
 802a272:	920a      	str	r2, [sp, #40]	@ 0x28
 802a274:	f1c8 0300 	rsb	r3, r8, #0
 802a278:	e7e3      	b.n	802a242 <_dtoa_r+0x1d2>
 802a27a:	2200      	movs	r2, #0
 802a27c:	9208      	str	r2, [sp, #32]
 802a27e:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802a280:	2a00      	cmp	r2, #0
 802a282:	dc39      	bgt.n	802a2f8 <_dtoa_r+0x288>
 802a284:	f04f 0b01 	mov.w	fp, #1
 802a288:	46da      	mov	sl, fp
 802a28a:	465a      	mov	r2, fp
 802a28c:	f8cd b024 	str.w	fp, [sp, #36]	@ 0x24
 802a290:	f8d9 701c 	ldr.w	r7, [r9, #28]
 802a294:	2100      	movs	r1, #0
 802a296:	2004      	movs	r0, #4
 802a298:	f100 0614 	add.w	r6, r0, #20
 802a29c:	4296      	cmp	r6, r2
 802a29e:	d930      	bls.n	802a302 <_dtoa_r+0x292>
 802a2a0:	6079      	str	r1, [r7, #4]
 802a2a2:	4648      	mov	r0, r9
 802a2a4:	9304      	str	r3, [sp, #16]
 802a2a6:	f000 ffcf 	bl	802b248 <_Balloc>
 802a2aa:	9b04      	ldr	r3, [sp, #16]
 802a2ac:	4607      	mov	r7, r0
 802a2ae:	2800      	cmp	r0, #0
 802a2b0:	d146      	bne.n	802a340 <_dtoa_r+0x2d0>
 802a2b2:	4b22      	ldr	r3, [pc, #136]	@ (802a33c <_dtoa_r+0x2cc>)
 802a2b4:	4602      	mov	r2, r0
 802a2b6:	f240 11af 	movw	r1, #431	@ 0x1af
 802a2ba:	e6f2      	b.n	802a0a2 <_dtoa_r+0x32>
 802a2bc:	2201      	movs	r2, #1
 802a2be:	e7dd      	b.n	802a27c <_dtoa_r+0x20c>
 802a2c0:	2200      	movs	r2, #0
 802a2c2:	9208      	str	r2, [sp, #32]
 802a2c4:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802a2c6:	eb08 0b02 	add.w	fp, r8, r2
 802a2ca:	f10b 0a01 	add.w	sl, fp, #1
 802a2ce:	4652      	mov	r2, sl
 802a2d0:	2a01      	cmp	r2, #1
 802a2d2:	bfb8      	it	lt
 802a2d4:	2201      	movlt	r2, #1
 802a2d6:	e7db      	b.n	802a290 <_dtoa_r+0x220>
 802a2d8:	2201      	movs	r2, #1
 802a2da:	e7f2      	b.n	802a2c2 <_dtoa_r+0x252>
 802a2dc:	2401      	movs	r4, #1
 802a2de:	2200      	movs	r2, #0
 802a2e0:	e9cd 2407 	strd	r2, r4, [sp, #28]
 802a2e4:	f04f 3bff 	mov.w	fp, #4294967295	@ 0xffffffff
 802a2e8:	2100      	movs	r1, #0
 802a2ea:	46da      	mov	sl, fp
 802a2ec:	2212      	movs	r2, #18
 802a2ee:	9109      	str	r1, [sp, #36]	@ 0x24
 802a2f0:	e7ce      	b.n	802a290 <_dtoa_r+0x220>
 802a2f2:	2201      	movs	r2, #1
 802a2f4:	9208      	str	r2, [sp, #32]
 802a2f6:	e7f5      	b.n	802a2e4 <_dtoa_r+0x274>
 802a2f8:	f8dd b024 	ldr.w	fp, [sp, #36]	@ 0x24
 802a2fc:	46da      	mov	sl, fp
 802a2fe:	465a      	mov	r2, fp
 802a300:	e7c6      	b.n	802a290 <_dtoa_r+0x220>
 802a302:	3101      	adds	r1, #1
 802a304:	0040      	lsls	r0, r0, #1
 802a306:	e7c7      	b.n	802a298 <_dtoa_r+0x228>
 802a308:	636f4361 	.word	0x636f4361
 802a30c:	3fd287a7 	.word	0x3fd287a7
 802a310:	8b60c8b3 	.word	0x8b60c8b3
 802a314:	3fc68a28 	.word	0x3fc68a28
 802a318:	509f79fb 	.word	0x509f79fb
 802a31c:	3fd34413 	.word	0x3fd34413
 802a320:	08030c7e 	.word	0x08030c7e
 802a324:	08030ec6 	.word	0x08030ec6
 802a328:	7ff00000 	.word	0x7ff00000
 802a32c:	08030ec2 	.word	0x08030ec2
 802a330:	08030e52 	.word	0x08030e52
 802a334:	08030e51 	.word	0x08030e51
 802a338:	08031020 	.word	0x08031020
 802a33c:	08030f1e 	.word	0x08030f1e
 802a340:	f8d9 201c 	ldr.w	r2, [r9, #28]
 802a344:	f1ba 0f0e 	cmp.w	sl, #14
 802a348:	6010      	str	r0, [r2, #0]
 802a34a:	d86f      	bhi.n	802a42c <_dtoa_r+0x3bc>
 802a34c:	2c00      	cmp	r4, #0
 802a34e:	d06d      	beq.n	802a42c <_dtoa_r+0x3bc>
 802a350:	f1b8 0f00 	cmp.w	r8, #0
 802a354:	f340 80c2 	ble.w	802a4dc <_dtoa_r+0x46c>
 802a358:	4aca      	ldr	r2, [pc, #808]	@ (802a684 <_dtoa_r+0x614>)
 802a35a:	f008 010f 	and.w	r1, r8, #15
 802a35e:	eb02 02c1 	add.w	r2, r2, r1, lsl #3
 802a362:	f418 7f80 	tst.w	r8, #256	@ 0x100
 802a366:	ed92 7b00 	vldr	d7, [r2]
 802a36a:	ea4f 1128 	mov.w	r1, r8, asr #4
 802a36e:	f000 80a9 	beq.w	802a4c4 <_dtoa_r+0x454>
 802a372:	4ac5      	ldr	r2, [pc, #788]	@ (802a688 <_dtoa_r+0x618>)
 802a374:	ed92 6b08 	vldr	d6, [r2, #32]
 802a378:	ee88 6b06 	vdiv.f64	d6, d8, d6
 802a37c:	ed8d 6b02 	vstr	d6, [sp, #8]
 802a380:	f001 010f 	and.w	r1, r1, #15
 802a384:	2203      	movs	r2, #3
 802a386:	48c0      	ldr	r0, [pc, #768]	@ (802a688 <_dtoa_r+0x618>)
 802a388:	2900      	cmp	r1, #0
 802a38a:	f040 809d 	bne.w	802a4c8 <_dtoa_r+0x458>
 802a38e:	ed9d 6b02 	vldr	d6, [sp, #8]
 802a392:	ee86 7b07 	vdiv.f64	d7, d6, d7
 802a396:	ed8d 7b02 	vstr	d7, [sp, #8]
 802a39a:	990c      	ldr	r1, [sp, #48]	@ 0x30
 802a39c:	ed9d 7b02 	vldr	d7, [sp, #8]
 802a3a0:	2900      	cmp	r1, #0
 802a3a2:	f000 80c1 	beq.w	802a528 <_dtoa_r+0x4b8>
 802a3a6:	eeb7 6b00 	vmov.f64	d6, #112	@ 0x3f800000  1.0
 802a3aa:	eeb4 7bc6 	vcmpe.f64	d7, d6
 802a3ae:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a3b2:	f140 80b9 	bpl.w	802a528 <_dtoa_r+0x4b8>
 802a3b6:	f1ba 0f00 	cmp.w	sl, #0
 802a3ba:	f000 80b5 	beq.w	802a528 <_dtoa_r+0x4b8>
 802a3be:	f1bb 0f00 	cmp.w	fp, #0
 802a3c2:	dd31      	ble.n	802a428 <_dtoa_r+0x3b8>
 802a3c4:	eeb2 6b04 	vmov.f64	d6, #36	@ 0x41200000  10.0
 802a3c8:	ee27 7b06 	vmul.f64	d7, d7, d6
 802a3cc:	ed8d 7b02 	vstr	d7, [sp, #8]
 802a3d0:	f108 31ff 	add.w	r1, r8, #4294967295	@ 0xffffffff
 802a3d4:	9104      	str	r1, [sp, #16]
 802a3d6:	3201      	adds	r2, #1
 802a3d8:	465c      	mov	r4, fp
 802a3da:	ed9d 6b02 	vldr	d6, [sp, #8]
 802a3de:	eeb1 5b0c 	vmov.f64	d5, #28	@ 0x40e00000  7.0
 802a3e2:	ee07 2a90 	vmov	s15, r2
 802a3e6:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 802a3ea:	eea7 5b06 	vfma.f64	d5, d7, d6
 802a3ee:	ee15 2a90 	vmov	r2, s11
 802a3f2:	ec51 0b15 	vmov	r0, r1, d5
 802a3f6:	f1a2 7150 	sub.w	r1, r2, #54525952	@ 0x3400000
 802a3fa:	2c00      	cmp	r4, #0
 802a3fc:	f040 8098 	bne.w	802a530 <_dtoa_r+0x4c0>
 802a400:	eeb1 7b04 	vmov.f64	d7, #20	@ 0x40a00000  5.0
 802a404:	ee36 6b47 	vsub.f64	d6, d6, d7
 802a408:	ec41 0b17 	vmov	d7, r0, r1
 802a40c:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802a410:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a414:	f300 8261 	bgt.w	802a8da <_dtoa_r+0x86a>
 802a418:	eeb1 7b47 	vneg.f64	d7, d7
 802a41c:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802a420:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a424:	f100 80f5 	bmi.w	802a612 <_dtoa_r+0x5a2>
 802a428:	ed8d 8b02 	vstr	d8, [sp, #8]
 802a42c:	9a0f      	ldr	r2, [sp, #60]	@ 0x3c
 802a42e:	2a00      	cmp	r2, #0
 802a430:	f2c0 812c 	blt.w	802a68c <_dtoa_r+0x61c>
 802a434:	f1b8 0f0e 	cmp.w	r8, #14
 802a438:	f300 8128 	bgt.w	802a68c <_dtoa_r+0x61c>
 802a43c:	4b91      	ldr	r3, [pc, #580]	@ (802a684 <_dtoa_r+0x614>)
 802a43e:	eb03 03c8 	add.w	r3, r3, r8, lsl #3
 802a442:	ed93 6b00 	vldr	d6, [r3]
 802a446:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802a448:	2b00      	cmp	r3, #0
 802a44a:	da03      	bge.n	802a454 <_dtoa_r+0x3e4>
 802a44c:	f1ba 0f00 	cmp.w	sl, #0
 802a450:	f340 80d2 	ble.w	802a5f8 <_dtoa_r+0x588>
 802a454:	eeb2 4b04 	vmov.f64	d4, #36	@ 0x41200000  10.0
 802a458:	ed9d 7b02 	vldr	d7, [sp, #8]
 802a45c:	463e      	mov	r6, r7
 802a45e:	ee87 5b06 	vdiv.f64	d5, d7, d6
 802a462:	eebd 5bc5 	vcvt.s32.f64	s10, d5
 802a466:	ee15 3a10 	vmov	r3, s10
 802a46a:	3330      	adds	r3, #48	@ 0x30
 802a46c:	f806 3b01 	strb.w	r3, [r6], #1
 802a470:	1bf3      	subs	r3, r6, r7
 802a472:	459a      	cmp	sl, r3
 802a474:	eeb8 3bc5 	vcvt.f64.s32	d3, s10
 802a478:	eea3 7b46 	vfms.f64	d7, d3, d6
 802a47c:	f040 80f8 	bne.w	802a670 <_dtoa_r+0x600>
 802a480:	ee37 7b07 	vadd.f64	d7, d7, d7
 802a484:	eeb4 7bc6 	vcmpe.f64	d7, d6
 802a488:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a48c:	f300 80dd 	bgt.w	802a64a <_dtoa_r+0x5da>
 802a490:	eeb4 7b46 	vcmp.f64	d7, d6
 802a494:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a498:	d104      	bne.n	802a4a4 <_dtoa_r+0x434>
 802a49a:	ee15 3a10 	vmov	r3, s10
 802a49e:	07db      	lsls	r3, r3, #31
 802a4a0:	f100 80d3 	bmi.w	802a64a <_dtoa_r+0x5da>
 802a4a4:	9901      	ldr	r1, [sp, #4]
 802a4a6:	4648      	mov	r0, r9
 802a4a8:	f000 ff0e 	bl	802b2c8 <_Bfree>
 802a4ac:	2300      	movs	r3, #0
 802a4ae:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 802a4b0:	7033      	strb	r3, [r6, #0]
 802a4b2:	f108 0301 	add.w	r3, r8, #1
 802a4b6:	6013      	str	r3, [r2, #0]
 802a4b8:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802a4ba:	2b00      	cmp	r3, #0
 802a4bc:	f000 8304 	beq.w	802aac8 <_dtoa_r+0xa58>
 802a4c0:	601e      	str	r6, [r3, #0]
 802a4c2:	e301      	b.n	802aac8 <_dtoa_r+0xa58>
 802a4c4:	2202      	movs	r2, #2
 802a4c6:	e75e      	b.n	802a386 <_dtoa_r+0x316>
 802a4c8:	07cc      	lsls	r4, r1, #31
 802a4ca:	d504      	bpl.n	802a4d6 <_dtoa_r+0x466>
 802a4cc:	ed90 6b00 	vldr	d6, [r0]
 802a4d0:	3201      	adds	r2, #1
 802a4d2:	ee27 7b06 	vmul.f64	d7, d7, d6
 802a4d6:	1049      	asrs	r1, r1, #1
 802a4d8:	3008      	adds	r0, #8
 802a4da:	e755      	b.n	802a388 <_dtoa_r+0x318>
 802a4dc:	d022      	beq.n	802a524 <_dtoa_r+0x4b4>
 802a4de:	f1c8 0100 	rsb	r1, r8, #0
 802a4e2:	4a68      	ldr	r2, [pc, #416]	@ (802a684 <_dtoa_r+0x614>)
 802a4e4:	f001 000f 	and.w	r0, r1, #15
 802a4e8:	eb02 02c0 	add.w	r2, r2, r0, lsl #3
 802a4ec:	ed92 7b00 	vldr	d7, [r2]
 802a4f0:	ee28 7b07 	vmul.f64	d7, d8, d7
 802a4f4:	ed8d 7b02 	vstr	d7, [sp, #8]
 802a4f8:	4863      	ldr	r0, [pc, #396]	@ (802a688 <_dtoa_r+0x618>)
 802a4fa:	1109      	asrs	r1, r1, #4
 802a4fc:	2400      	movs	r4, #0
 802a4fe:	2202      	movs	r2, #2
 802a500:	b929      	cbnz	r1, 802a50e <_dtoa_r+0x49e>
 802a502:	2c00      	cmp	r4, #0
 802a504:	f43f af49 	beq.w	802a39a <_dtoa_r+0x32a>
 802a508:	ed8d 7b02 	vstr	d7, [sp, #8]
 802a50c:	e745      	b.n	802a39a <_dtoa_r+0x32a>
 802a50e:	07ce      	lsls	r6, r1, #31
 802a510:	d505      	bpl.n	802a51e <_dtoa_r+0x4ae>
 802a512:	ed90 6b00 	vldr	d6, [r0]
 802a516:	3201      	adds	r2, #1
 802a518:	2401      	movs	r4, #1
 802a51a:	ee27 7b06 	vmul.f64	d7, d7, d6
 802a51e:	1049      	asrs	r1, r1, #1
 802a520:	3008      	adds	r0, #8
 802a522:	e7ed      	b.n	802a500 <_dtoa_r+0x490>
 802a524:	2202      	movs	r2, #2
 802a526:	e738      	b.n	802a39a <_dtoa_r+0x32a>
 802a528:	f8cd 8010 	str.w	r8, [sp, #16]
 802a52c:	4654      	mov	r4, sl
 802a52e:	e754      	b.n	802a3da <_dtoa_r+0x36a>
 802a530:	4a54      	ldr	r2, [pc, #336]	@ (802a684 <_dtoa_r+0x614>)
 802a532:	eb02 02c4 	add.w	r2, r2, r4, lsl #3
 802a536:	ed12 4b02 	vldr	d4, [r2, #-8]
 802a53a:	9a08      	ldr	r2, [sp, #32]
 802a53c:	ec41 0b17 	vmov	d7, r0, r1
 802a540:	443c      	add	r4, r7
 802a542:	b34a      	cbz	r2, 802a598 <_dtoa_r+0x528>
 802a544:	eeb6 3b00 	vmov.f64	d3, #96	@ 0x3f000000  0.5
 802a548:	eeb7 2b00 	vmov.f64	d2, #112	@ 0x3f800000  1.0
 802a54c:	463e      	mov	r6, r7
 802a54e:	ee83 5b04 	vdiv.f64	d5, d3, d4
 802a552:	eeb2 3b04 	vmov.f64	d3, #36	@ 0x41200000  10.0
 802a556:	ee35 7b47 	vsub.f64	d7, d5, d7
 802a55a:	eefd 4bc6 	vcvt.s32.f64	s9, d6
 802a55e:	ee14 2a90 	vmov	r2, s9
 802a562:	eeb8 5be4 	vcvt.f64.s32	d5, s9
 802a566:	3230      	adds	r2, #48	@ 0x30
 802a568:	ee36 6b45 	vsub.f64	d6, d6, d5
 802a56c:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802a570:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a574:	f806 2b01 	strb.w	r2, [r6], #1
 802a578:	d438      	bmi.n	802a5ec <_dtoa_r+0x57c>
 802a57a:	ee32 5b46 	vsub.f64	d5, d2, d6
 802a57e:	eeb4 5bc7 	vcmpe.f64	d5, d7
 802a582:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a586:	d462      	bmi.n	802a64e <_dtoa_r+0x5de>
 802a588:	42a6      	cmp	r6, r4
 802a58a:	f43f af4d 	beq.w	802a428 <_dtoa_r+0x3b8>
 802a58e:	ee27 7b03 	vmul.f64	d7, d7, d3
 802a592:	ee26 6b03 	vmul.f64	d6, d6, d3
 802a596:	e7e0      	b.n	802a55a <_dtoa_r+0x4ea>
 802a598:	4621      	mov	r1, r4
 802a59a:	463e      	mov	r6, r7
 802a59c:	ee27 7b04 	vmul.f64	d7, d7, d4
 802a5a0:	eeb2 3b04 	vmov.f64	d3, #36	@ 0x41200000  10.0
 802a5a4:	eefd 4bc6 	vcvt.s32.f64	s9, d6
 802a5a8:	ee14 2a90 	vmov	r2, s9
 802a5ac:	3230      	adds	r2, #48	@ 0x30
 802a5ae:	f806 2b01 	strb.w	r2, [r6], #1
 802a5b2:	42a6      	cmp	r6, r4
 802a5b4:	eeb8 5be4 	vcvt.f64.s32	d5, s9
 802a5b8:	ee36 6b45 	vsub.f64	d6, d6, d5
 802a5bc:	d119      	bne.n	802a5f2 <_dtoa_r+0x582>
 802a5be:	eeb6 5b00 	vmov.f64	d5, #96	@ 0x3f000000  0.5
 802a5c2:	ee37 4b05 	vadd.f64	d4, d7, d5
 802a5c6:	eeb4 6bc4 	vcmpe.f64	d6, d4
 802a5ca:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a5ce:	dc3e      	bgt.n	802a64e <_dtoa_r+0x5de>
 802a5d0:	ee35 5b47 	vsub.f64	d5, d5, d7
 802a5d4:	eeb4 6bc5 	vcmpe.f64	d6, d5
 802a5d8:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a5dc:	f57f af24 	bpl.w	802a428 <_dtoa_r+0x3b8>
 802a5e0:	460e      	mov	r6, r1
 802a5e2:	3901      	subs	r1, #1
 802a5e4:	f816 3c01 	ldrb.w	r3, [r6, #-1]
 802a5e8:	2b30      	cmp	r3, #48	@ 0x30
 802a5ea:	d0f9      	beq.n	802a5e0 <_dtoa_r+0x570>
 802a5ec:	f8dd 8010 	ldr.w	r8, [sp, #16]
 802a5f0:	e758      	b.n	802a4a4 <_dtoa_r+0x434>
 802a5f2:	ee26 6b03 	vmul.f64	d6, d6, d3
 802a5f6:	e7d5      	b.n	802a5a4 <_dtoa_r+0x534>
 802a5f8:	d10b      	bne.n	802a612 <_dtoa_r+0x5a2>
 802a5fa:	eeb1 7b04 	vmov.f64	d7, #20	@ 0x40a00000  5.0
 802a5fe:	ee26 6b07 	vmul.f64	d6, d6, d7
 802a602:	ed9d 7b02 	vldr	d7, [sp, #8]
 802a606:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802a60a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a60e:	f2c0 8161 	blt.w	802a8d4 <_dtoa_r+0x864>
 802a612:	2400      	movs	r4, #0
 802a614:	4625      	mov	r5, r4
 802a616:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802a618:	43db      	mvns	r3, r3
 802a61a:	9304      	str	r3, [sp, #16]
 802a61c:	463e      	mov	r6, r7
 802a61e:	f04f 0800 	mov.w	r8, #0
 802a622:	4621      	mov	r1, r4
 802a624:	4648      	mov	r0, r9
 802a626:	f000 fe4f 	bl	802b2c8 <_Bfree>
 802a62a:	2d00      	cmp	r5, #0
 802a62c:	d0de      	beq.n	802a5ec <_dtoa_r+0x57c>
 802a62e:	f1b8 0f00 	cmp.w	r8, #0
 802a632:	d005      	beq.n	802a640 <_dtoa_r+0x5d0>
 802a634:	45a8      	cmp	r8, r5
 802a636:	d003      	beq.n	802a640 <_dtoa_r+0x5d0>
 802a638:	4641      	mov	r1, r8
 802a63a:	4648      	mov	r0, r9
 802a63c:	f000 fe44 	bl	802b2c8 <_Bfree>
 802a640:	4629      	mov	r1, r5
 802a642:	4648      	mov	r0, r9
 802a644:	f000 fe40 	bl	802b2c8 <_Bfree>
 802a648:	e7d0      	b.n	802a5ec <_dtoa_r+0x57c>
 802a64a:	f8cd 8010 	str.w	r8, [sp, #16]
 802a64e:	4633      	mov	r3, r6
 802a650:	461e      	mov	r6, r3
 802a652:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
 802a656:	2a39      	cmp	r2, #57	@ 0x39
 802a658:	d106      	bne.n	802a668 <_dtoa_r+0x5f8>
 802a65a:	429f      	cmp	r7, r3
 802a65c:	d1f8      	bne.n	802a650 <_dtoa_r+0x5e0>
 802a65e:	9a04      	ldr	r2, [sp, #16]
 802a660:	3201      	adds	r2, #1
 802a662:	9204      	str	r2, [sp, #16]
 802a664:	2230      	movs	r2, #48	@ 0x30
 802a666:	703a      	strb	r2, [r7, #0]
 802a668:	781a      	ldrb	r2, [r3, #0]
 802a66a:	3201      	adds	r2, #1
 802a66c:	701a      	strb	r2, [r3, #0]
 802a66e:	e7bd      	b.n	802a5ec <_dtoa_r+0x57c>
 802a670:	ee27 7b04 	vmul.f64	d7, d7, d4
 802a674:	eeb5 7b40 	vcmp.f64	d7, #0.0
 802a678:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a67c:	f47f aeef 	bne.w	802a45e <_dtoa_r+0x3ee>
 802a680:	e710      	b.n	802a4a4 <_dtoa_r+0x434>
 802a682:	bf00      	nop
 802a684:	08031020 	.word	0x08031020
 802a688:	08030ff8 	.word	0x08030ff8
 802a68c:	9908      	ldr	r1, [sp, #32]
 802a68e:	2900      	cmp	r1, #0
 802a690:	f000 80e3 	beq.w	802a85a <_dtoa_r+0x7ea>
 802a694:	9907      	ldr	r1, [sp, #28]
 802a696:	2901      	cmp	r1, #1
 802a698:	f300 80c8 	bgt.w	802a82c <_dtoa_r+0x7bc>
 802a69c:	2d00      	cmp	r5, #0
 802a69e:	f000 80c1 	beq.w	802a824 <_dtoa_r+0x7b4>
 802a6a2:	f202 4233 	addw	r2, r2, #1075	@ 0x433
 802a6a6:	9e05      	ldr	r6, [sp, #20]
 802a6a8:	461c      	mov	r4, r3
 802a6aa:	9304      	str	r3, [sp, #16]
 802a6ac:	9b05      	ldr	r3, [sp, #20]
 802a6ae:	4413      	add	r3, r2
 802a6b0:	9305      	str	r3, [sp, #20]
 802a6b2:	9b06      	ldr	r3, [sp, #24]
 802a6b4:	2101      	movs	r1, #1
 802a6b6:	4413      	add	r3, r2
 802a6b8:	4648      	mov	r0, r9
 802a6ba:	9306      	str	r3, [sp, #24]
 802a6bc:	f000 ff02 	bl	802b4c4 <__i2b>
 802a6c0:	9b04      	ldr	r3, [sp, #16]
 802a6c2:	4605      	mov	r5, r0
 802a6c4:	b166      	cbz	r6, 802a6e0 <_dtoa_r+0x670>
 802a6c6:	9a06      	ldr	r2, [sp, #24]
 802a6c8:	2a00      	cmp	r2, #0
 802a6ca:	dd09      	ble.n	802a6e0 <_dtoa_r+0x670>
 802a6cc:	42b2      	cmp	r2, r6
 802a6ce:	9905      	ldr	r1, [sp, #20]
 802a6d0:	bfa8      	it	ge
 802a6d2:	4632      	movge	r2, r6
 802a6d4:	1a89      	subs	r1, r1, r2
 802a6d6:	9105      	str	r1, [sp, #20]
 802a6d8:	9906      	ldr	r1, [sp, #24]
 802a6da:	1ab6      	subs	r6, r6, r2
 802a6dc:	1a8a      	subs	r2, r1, r2
 802a6de:	9206      	str	r2, [sp, #24]
 802a6e0:	b1fb      	cbz	r3, 802a722 <_dtoa_r+0x6b2>
 802a6e2:	9a08      	ldr	r2, [sp, #32]
 802a6e4:	2a00      	cmp	r2, #0
 802a6e6:	f000 80bc 	beq.w	802a862 <_dtoa_r+0x7f2>
 802a6ea:	b19c      	cbz	r4, 802a714 <_dtoa_r+0x6a4>
 802a6ec:	4629      	mov	r1, r5
 802a6ee:	4622      	mov	r2, r4
 802a6f0:	4648      	mov	r0, r9
 802a6f2:	930b      	str	r3, [sp, #44]	@ 0x2c
 802a6f4:	f000 ffa6 	bl	802b644 <__pow5mult>
 802a6f8:	9a01      	ldr	r2, [sp, #4]
 802a6fa:	4601      	mov	r1, r0
 802a6fc:	4605      	mov	r5, r0
 802a6fe:	4648      	mov	r0, r9
 802a700:	f000 fef6 	bl	802b4f0 <__multiply>
 802a704:	9901      	ldr	r1, [sp, #4]
 802a706:	9004      	str	r0, [sp, #16]
 802a708:	4648      	mov	r0, r9
 802a70a:	f000 fddd 	bl	802b2c8 <_Bfree>
 802a70e:	9a04      	ldr	r2, [sp, #16]
 802a710:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 802a712:	9201      	str	r2, [sp, #4]
 802a714:	1b1a      	subs	r2, r3, r4
 802a716:	d004      	beq.n	802a722 <_dtoa_r+0x6b2>
 802a718:	9901      	ldr	r1, [sp, #4]
 802a71a:	4648      	mov	r0, r9
 802a71c:	f000 ff92 	bl	802b644 <__pow5mult>
 802a720:	9001      	str	r0, [sp, #4]
 802a722:	2101      	movs	r1, #1
 802a724:	4648      	mov	r0, r9
 802a726:	f000 fecd 	bl	802b4c4 <__i2b>
 802a72a:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802a72c:	4604      	mov	r4, r0
 802a72e:	2b00      	cmp	r3, #0
 802a730:	f000 81d0 	beq.w	802aad4 <_dtoa_r+0xa64>
 802a734:	461a      	mov	r2, r3
 802a736:	4601      	mov	r1, r0
 802a738:	4648      	mov	r0, r9
 802a73a:	f000 ff83 	bl	802b644 <__pow5mult>
 802a73e:	9b07      	ldr	r3, [sp, #28]
 802a740:	2b01      	cmp	r3, #1
 802a742:	4604      	mov	r4, r0
 802a744:	f300 8095 	bgt.w	802a872 <_dtoa_r+0x802>
 802a748:	9b02      	ldr	r3, [sp, #8]
 802a74a:	2b00      	cmp	r3, #0
 802a74c:	f040 808b 	bne.w	802a866 <_dtoa_r+0x7f6>
 802a750:	9b03      	ldr	r3, [sp, #12]
 802a752:	f3c3 0213 	ubfx	r2, r3, #0, #20
 802a756:	2a00      	cmp	r2, #0
 802a758:	f040 8087 	bne.w	802a86a <_dtoa_r+0x7fa>
 802a75c:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 802a760:	0d12      	lsrs	r2, r2, #20
 802a762:	0512      	lsls	r2, r2, #20
 802a764:	2a00      	cmp	r2, #0
 802a766:	f000 8082 	beq.w	802a86e <_dtoa_r+0x7fe>
 802a76a:	9b05      	ldr	r3, [sp, #20]
 802a76c:	3301      	adds	r3, #1
 802a76e:	9305      	str	r3, [sp, #20]
 802a770:	9b06      	ldr	r3, [sp, #24]
 802a772:	3301      	adds	r3, #1
 802a774:	9306      	str	r3, [sp, #24]
 802a776:	2301      	movs	r3, #1
 802a778:	930b      	str	r3, [sp, #44]	@ 0x2c
 802a77a:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802a77c:	2b00      	cmp	r3, #0
 802a77e:	f000 81af 	beq.w	802aae0 <_dtoa_r+0xa70>
 802a782:	6922      	ldr	r2, [r4, #16]
 802a784:	eb04 0282 	add.w	r2, r4, r2, lsl #2
 802a788:	6910      	ldr	r0, [r2, #16]
 802a78a:	f000 fe4f 	bl	802b42c <__hi0bits>
 802a78e:	f1c0 0020 	rsb	r0, r0, #32
 802a792:	9b06      	ldr	r3, [sp, #24]
 802a794:	4418      	add	r0, r3
 802a796:	f010 001f 	ands.w	r0, r0, #31
 802a79a:	d076      	beq.n	802a88a <_dtoa_r+0x81a>
 802a79c:	f1c0 0220 	rsb	r2, r0, #32
 802a7a0:	2a04      	cmp	r2, #4
 802a7a2:	dd69      	ble.n	802a878 <_dtoa_r+0x808>
 802a7a4:	9b05      	ldr	r3, [sp, #20]
 802a7a6:	f1c0 001c 	rsb	r0, r0, #28
 802a7aa:	4403      	add	r3, r0
 802a7ac:	9305      	str	r3, [sp, #20]
 802a7ae:	9b06      	ldr	r3, [sp, #24]
 802a7b0:	4406      	add	r6, r0
 802a7b2:	4403      	add	r3, r0
 802a7b4:	9306      	str	r3, [sp, #24]
 802a7b6:	9b05      	ldr	r3, [sp, #20]
 802a7b8:	2b00      	cmp	r3, #0
 802a7ba:	dd05      	ble.n	802a7c8 <_dtoa_r+0x758>
 802a7bc:	9901      	ldr	r1, [sp, #4]
 802a7be:	461a      	mov	r2, r3
 802a7c0:	4648      	mov	r0, r9
 802a7c2:	f000 ff99 	bl	802b6f8 <__lshift>
 802a7c6:	9001      	str	r0, [sp, #4]
 802a7c8:	9b06      	ldr	r3, [sp, #24]
 802a7ca:	2b00      	cmp	r3, #0
 802a7cc:	dd05      	ble.n	802a7da <_dtoa_r+0x76a>
 802a7ce:	4621      	mov	r1, r4
 802a7d0:	461a      	mov	r2, r3
 802a7d2:	4648      	mov	r0, r9
 802a7d4:	f000 ff90 	bl	802b6f8 <__lshift>
 802a7d8:	4604      	mov	r4, r0
 802a7da:	9b0c      	ldr	r3, [sp, #48]	@ 0x30
 802a7dc:	2b00      	cmp	r3, #0
 802a7de:	d056      	beq.n	802a88e <_dtoa_r+0x81e>
 802a7e0:	9801      	ldr	r0, [sp, #4]
 802a7e2:	4621      	mov	r1, r4
 802a7e4:	f000 fff4 	bl	802b7d0 <__mcmp>
 802a7e8:	2800      	cmp	r0, #0
 802a7ea:	da50      	bge.n	802a88e <_dtoa_r+0x81e>
 802a7ec:	f108 33ff 	add.w	r3, r8, #4294967295	@ 0xffffffff
 802a7f0:	9304      	str	r3, [sp, #16]
 802a7f2:	9901      	ldr	r1, [sp, #4]
 802a7f4:	2300      	movs	r3, #0
 802a7f6:	220a      	movs	r2, #10
 802a7f8:	4648      	mov	r0, r9
 802a7fa:	f000 fd87 	bl	802b30c <__multadd>
 802a7fe:	9b08      	ldr	r3, [sp, #32]
 802a800:	9001      	str	r0, [sp, #4]
 802a802:	2b00      	cmp	r3, #0
 802a804:	f000 816e 	beq.w	802aae4 <_dtoa_r+0xa74>
 802a808:	4629      	mov	r1, r5
 802a80a:	2300      	movs	r3, #0
 802a80c:	220a      	movs	r2, #10
 802a80e:	4648      	mov	r0, r9
 802a810:	f000 fd7c 	bl	802b30c <__multadd>
 802a814:	f1bb 0f00 	cmp.w	fp, #0
 802a818:	4605      	mov	r5, r0
 802a81a:	dc64      	bgt.n	802a8e6 <_dtoa_r+0x876>
 802a81c:	9b07      	ldr	r3, [sp, #28]
 802a81e:	2b02      	cmp	r3, #2
 802a820:	dc3e      	bgt.n	802a8a0 <_dtoa_r+0x830>
 802a822:	e060      	b.n	802a8e6 <_dtoa_r+0x876>
 802a824:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802a826:	f1c2 0236 	rsb	r2, r2, #54	@ 0x36
 802a82a:	e73c      	b.n	802a6a6 <_dtoa_r+0x636>
 802a82c:	f10a 34ff 	add.w	r4, sl, #4294967295	@ 0xffffffff
 802a830:	42a3      	cmp	r3, r4
 802a832:	bfbf      	itttt	lt
 802a834:	1ae2      	sublt	r2, r4, r3
 802a836:	9b0a      	ldrlt	r3, [sp, #40]	@ 0x28
 802a838:	189b      	addlt	r3, r3, r2
 802a83a:	930a      	strlt	r3, [sp, #40]	@ 0x28
 802a83c:	bfae      	itee	ge
 802a83e:	1b1c      	subge	r4, r3, r4
 802a840:	4623      	movlt	r3, r4
 802a842:	2400      	movlt	r4, #0
 802a844:	f1ba 0f00 	cmp.w	sl, #0
 802a848:	bfb5      	itete	lt
 802a84a:	9a05      	ldrlt	r2, [sp, #20]
 802a84c:	9e05      	ldrge	r6, [sp, #20]
 802a84e:	eba2 060a 	sublt.w	r6, r2, sl
 802a852:	4652      	movge	r2, sl
 802a854:	bfb8      	it	lt
 802a856:	2200      	movlt	r2, #0
 802a858:	e727      	b.n	802a6aa <_dtoa_r+0x63a>
 802a85a:	9e05      	ldr	r6, [sp, #20]
 802a85c:	9d08      	ldr	r5, [sp, #32]
 802a85e:	461c      	mov	r4, r3
 802a860:	e730      	b.n	802a6c4 <_dtoa_r+0x654>
 802a862:	461a      	mov	r2, r3
 802a864:	e758      	b.n	802a718 <_dtoa_r+0x6a8>
 802a866:	2300      	movs	r3, #0
 802a868:	e786      	b.n	802a778 <_dtoa_r+0x708>
 802a86a:	9b02      	ldr	r3, [sp, #8]
 802a86c:	e784      	b.n	802a778 <_dtoa_r+0x708>
 802a86e:	920b      	str	r2, [sp, #44]	@ 0x2c
 802a870:	e783      	b.n	802a77a <_dtoa_r+0x70a>
 802a872:	2300      	movs	r3, #0
 802a874:	930b      	str	r3, [sp, #44]	@ 0x2c
 802a876:	e784      	b.n	802a782 <_dtoa_r+0x712>
 802a878:	d09d      	beq.n	802a7b6 <_dtoa_r+0x746>
 802a87a:	9b05      	ldr	r3, [sp, #20]
 802a87c:	321c      	adds	r2, #28
 802a87e:	4413      	add	r3, r2
 802a880:	9305      	str	r3, [sp, #20]
 802a882:	9b06      	ldr	r3, [sp, #24]
 802a884:	4416      	add	r6, r2
 802a886:	4413      	add	r3, r2
 802a888:	e794      	b.n	802a7b4 <_dtoa_r+0x744>
 802a88a:	4602      	mov	r2, r0
 802a88c:	e7f5      	b.n	802a87a <_dtoa_r+0x80a>
 802a88e:	f1ba 0f00 	cmp.w	sl, #0
 802a892:	f8cd 8010 	str.w	r8, [sp, #16]
 802a896:	46d3      	mov	fp, sl
 802a898:	dc21      	bgt.n	802a8de <_dtoa_r+0x86e>
 802a89a:	9b07      	ldr	r3, [sp, #28]
 802a89c:	2b02      	cmp	r3, #2
 802a89e:	dd1e      	ble.n	802a8de <_dtoa_r+0x86e>
 802a8a0:	f1bb 0f00 	cmp.w	fp, #0
 802a8a4:	f47f aeb7 	bne.w	802a616 <_dtoa_r+0x5a6>
 802a8a8:	4621      	mov	r1, r4
 802a8aa:	465b      	mov	r3, fp
 802a8ac:	2205      	movs	r2, #5
 802a8ae:	4648      	mov	r0, r9
 802a8b0:	f000 fd2c 	bl	802b30c <__multadd>
 802a8b4:	4601      	mov	r1, r0
 802a8b6:	4604      	mov	r4, r0
 802a8b8:	9801      	ldr	r0, [sp, #4]
 802a8ba:	f000 ff89 	bl	802b7d0 <__mcmp>
 802a8be:	2800      	cmp	r0, #0
 802a8c0:	f77f aea9 	ble.w	802a616 <_dtoa_r+0x5a6>
 802a8c4:	463e      	mov	r6, r7
 802a8c6:	2331      	movs	r3, #49	@ 0x31
 802a8c8:	f806 3b01 	strb.w	r3, [r6], #1
 802a8cc:	9b04      	ldr	r3, [sp, #16]
 802a8ce:	3301      	adds	r3, #1
 802a8d0:	9304      	str	r3, [sp, #16]
 802a8d2:	e6a4      	b.n	802a61e <_dtoa_r+0x5ae>
 802a8d4:	f8cd 8010 	str.w	r8, [sp, #16]
 802a8d8:	4654      	mov	r4, sl
 802a8da:	4625      	mov	r5, r4
 802a8dc:	e7f2      	b.n	802a8c4 <_dtoa_r+0x854>
 802a8de:	9b08      	ldr	r3, [sp, #32]
 802a8e0:	2b00      	cmp	r3, #0
 802a8e2:	f000 8103 	beq.w	802aaec <_dtoa_r+0xa7c>
 802a8e6:	2e00      	cmp	r6, #0
 802a8e8:	dd05      	ble.n	802a8f6 <_dtoa_r+0x886>
 802a8ea:	4629      	mov	r1, r5
 802a8ec:	4632      	mov	r2, r6
 802a8ee:	4648      	mov	r0, r9
 802a8f0:	f000 ff02 	bl	802b6f8 <__lshift>
 802a8f4:	4605      	mov	r5, r0
 802a8f6:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 802a8f8:	2b00      	cmp	r3, #0
 802a8fa:	d058      	beq.n	802a9ae <_dtoa_r+0x93e>
 802a8fc:	6869      	ldr	r1, [r5, #4]
 802a8fe:	4648      	mov	r0, r9
 802a900:	f000 fca2 	bl	802b248 <_Balloc>
 802a904:	4606      	mov	r6, r0
 802a906:	b928      	cbnz	r0, 802a914 <_dtoa_r+0x8a4>
 802a908:	4b82      	ldr	r3, [pc, #520]	@ (802ab14 <_dtoa_r+0xaa4>)
 802a90a:	4602      	mov	r2, r0
 802a90c:	f240 21ef 	movw	r1, #751	@ 0x2ef
 802a910:	f7ff bbc7 	b.w	802a0a2 <_dtoa_r+0x32>
 802a914:	692a      	ldr	r2, [r5, #16]
 802a916:	3202      	adds	r2, #2
 802a918:	0092      	lsls	r2, r2, #2
 802a91a:	f105 010c 	add.w	r1, r5, #12
 802a91e:	300c      	adds	r0, #12
 802a920:	f7ff fae5 	bl	8029eee <memcpy>
 802a924:	2201      	movs	r2, #1
 802a926:	4631      	mov	r1, r6
 802a928:	4648      	mov	r0, r9
 802a92a:	f000 fee5 	bl	802b6f8 <__lshift>
 802a92e:	1c7b      	adds	r3, r7, #1
 802a930:	9305      	str	r3, [sp, #20]
 802a932:	eb07 030b 	add.w	r3, r7, fp
 802a936:	9309      	str	r3, [sp, #36]	@ 0x24
 802a938:	9b02      	ldr	r3, [sp, #8]
 802a93a:	f003 0301 	and.w	r3, r3, #1
 802a93e:	46a8      	mov	r8, r5
 802a940:	9308      	str	r3, [sp, #32]
 802a942:	4605      	mov	r5, r0
 802a944:	9b05      	ldr	r3, [sp, #20]
 802a946:	9801      	ldr	r0, [sp, #4]
 802a948:	4621      	mov	r1, r4
 802a94a:	f103 3bff 	add.w	fp, r3, #4294967295	@ 0xffffffff
 802a94e:	f7ff fb05 	bl	8029f5c <quorem>
 802a952:	4641      	mov	r1, r8
 802a954:	9002      	str	r0, [sp, #8]
 802a956:	f100 0a30 	add.w	sl, r0, #48	@ 0x30
 802a95a:	9801      	ldr	r0, [sp, #4]
 802a95c:	f000 ff38 	bl	802b7d0 <__mcmp>
 802a960:	462a      	mov	r2, r5
 802a962:	9006      	str	r0, [sp, #24]
 802a964:	4621      	mov	r1, r4
 802a966:	4648      	mov	r0, r9
 802a968:	f000 ff4e 	bl	802b808 <__mdiff>
 802a96c:	68c2      	ldr	r2, [r0, #12]
 802a96e:	4606      	mov	r6, r0
 802a970:	b9fa      	cbnz	r2, 802a9b2 <_dtoa_r+0x942>
 802a972:	4601      	mov	r1, r0
 802a974:	9801      	ldr	r0, [sp, #4]
 802a976:	f000 ff2b 	bl	802b7d0 <__mcmp>
 802a97a:	4602      	mov	r2, r0
 802a97c:	4631      	mov	r1, r6
 802a97e:	4648      	mov	r0, r9
 802a980:	920a      	str	r2, [sp, #40]	@ 0x28
 802a982:	f000 fca1 	bl	802b2c8 <_Bfree>
 802a986:	9b07      	ldr	r3, [sp, #28]
 802a988:	9a0a      	ldr	r2, [sp, #40]	@ 0x28
 802a98a:	9e05      	ldr	r6, [sp, #20]
 802a98c:	ea43 0102 	orr.w	r1, r3, r2
 802a990:	9b08      	ldr	r3, [sp, #32]
 802a992:	4319      	orrs	r1, r3
 802a994:	d10f      	bne.n	802a9b6 <_dtoa_r+0x946>
 802a996:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802a99a:	d028      	beq.n	802a9ee <_dtoa_r+0x97e>
 802a99c:	9b06      	ldr	r3, [sp, #24]
 802a99e:	2b00      	cmp	r3, #0
 802a9a0:	dd02      	ble.n	802a9a8 <_dtoa_r+0x938>
 802a9a2:	9b02      	ldr	r3, [sp, #8]
 802a9a4:	f103 0a31 	add.w	sl, r3, #49	@ 0x31
 802a9a8:	f88b a000 	strb.w	sl, [fp]
 802a9ac:	e639      	b.n	802a622 <_dtoa_r+0x5b2>
 802a9ae:	4628      	mov	r0, r5
 802a9b0:	e7bd      	b.n	802a92e <_dtoa_r+0x8be>
 802a9b2:	2201      	movs	r2, #1
 802a9b4:	e7e2      	b.n	802a97c <_dtoa_r+0x90c>
 802a9b6:	9b06      	ldr	r3, [sp, #24]
 802a9b8:	2b00      	cmp	r3, #0
 802a9ba:	db04      	blt.n	802a9c6 <_dtoa_r+0x956>
 802a9bc:	9907      	ldr	r1, [sp, #28]
 802a9be:	430b      	orrs	r3, r1
 802a9c0:	9908      	ldr	r1, [sp, #32]
 802a9c2:	430b      	orrs	r3, r1
 802a9c4:	d120      	bne.n	802aa08 <_dtoa_r+0x998>
 802a9c6:	2a00      	cmp	r2, #0
 802a9c8:	ddee      	ble.n	802a9a8 <_dtoa_r+0x938>
 802a9ca:	9901      	ldr	r1, [sp, #4]
 802a9cc:	2201      	movs	r2, #1
 802a9ce:	4648      	mov	r0, r9
 802a9d0:	f000 fe92 	bl	802b6f8 <__lshift>
 802a9d4:	4621      	mov	r1, r4
 802a9d6:	9001      	str	r0, [sp, #4]
 802a9d8:	f000 fefa 	bl	802b7d0 <__mcmp>
 802a9dc:	2800      	cmp	r0, #0
 802a9de:	dc03      	bgt.n	802a9e8 <_dtoa_r+0x978>
 802a9e0:	d1e2      	bne.n	802a9a8 <_dtoa_r+0x938>
 802a9e2:	f01a 0f01 	tst.w	sl, #1
 802a9e6:	d0df      	beq.n	802a9a8 <_dtoa_r+0x938>
 802a9e8:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802a9ec:	d1d9      	bne.n	802a9a2 <_dtoa_r+0x932>
 802a9ee:	2339      	movs	r3, #57	@ 0x39
 802a9f0:	f88b 3000 	strb.w	r3, [fp]
 802a9f4:	4633      	mov	r3, r6
 802a9f6:	461e      	mov	r6, r3
 802a9f8:	3b01      	subs	r3, #1
 802a9fa:	f816 2c01 	ldrb.w	r2, [r6, #-1]
 802a9fe:	2a39      	cmp	r2, #57	@ 0x39
 802aa00:	d053      	beq.n	802aaaa <_dtoa_r+0xa3a>
 802aa02:	3201      	adds	r2, #1
 802aa04:	701a      	strb	r2, [r3, #0]
 802aa06:	e60c      	b.n	802a622 <_dtoa_r+0x5b2>
 802aa08:	2a00      	cmp	r2, #0
 802aa0a:	dd07      	ble.n	802aa1c <_dtoa_r+0x9ac>
 802aa0c:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802aa10:	d0ed      	beq.n	802a9ee <_dtoa_r+0x97e>
 802aa12:	f10a 0301 	add.w	r3, sl, #1
 802aa16:	f88b 3000 	strb.w	r3, [fp]
 802aa1a:	e602      	b.n	802a622 <_dtoa_r+0x5b2>
 802aa1c:	9b05      	ldr	r3, [sp, #20]
 802aa1e:	9a05      	ldr	r2, [sp, #20]
 802aa20:	f803 ac01 	strb.w	sl, [r3, #-1]
 802aa24:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802aa26:	4293      	cmp	r3, r2
 802aa28:	d029      	beq.n	802aa7e <_dtoa_r+0xa0e>
 802aa2a:	9901      	ldr	r1, [sp, #4]
 802aa2c:	2300      	movs	r3, #0
 802aa2e:	220a      	movs	r2, #10
 802aa30:	4648      	mov	r0, r9
 802aa32:	f000 fc6b 	bl	802b30c <__multadd>
 802aa36:	45a8      	cmp	r8, r5
 802aa38:	9001      	str	r0, [sp, #4]
 802aa3a:	f04f 0300 	mov.w	r3, #0
 802aa3e:	f04f 020a 	mov.w	r2, #10
 802aa42:	4641      	mov	r1, r8
 802aa44:	4648      	mov	r0, r9
 802aa46:	d107      	bne.n	802aa58 <_dtoa_r+0x9e8>
 802aa48:	f000 fc60 	bl	802b30c <__multadd>
 802aa4c:	4680      	mov	r8, r0
 802aa4e:	4605      	mov	r5, r0
 802aa50:	9b05      	ldr	r3, [sp, #20]
 802aa52:	3301      	adds	r3, #1
 802aa54:	9305      	str	r3, [sp, #20]
 802aa56:	e775      	b.n	802a944 <_dtoa_r+0x8d4>
 802aa58:	f000 fc58 	bl	802b30c <__multadd>
 802aa5c:	4629      	mov	r1, r5
 802aa5e:	4680      	mov	r8, r0
 802aa60:	2300      	movs	r3, #0
 802aa62:	220a      	movs	r2, #10
 802aa64:	4648      	mov	r0, r9
 802aa66:	f000 fc51 	bl	802b30c <__multadd>
 802aa6a:	4605      	mov	r5, r0
 802aa6c:	e7f0      	b.n	802aa50 <_dtoa_r+0x9e0>
 802aa6e:	f1bb 0f00 	cmp.w	fp, #0
 802aa72:	bfcc      	ite	gt
 802aa74:	465e      	movgt	r6, fp
 802aa76:	2601      	movle	r6, #1
 802aa78:	443e      	add	r6, r7
 802aa7a:	f04f 0800 	mov.w	r8, #0
 802aa7e:	9901      	ldr	r1, [sp, #4]
 802aa80:	2201      	movs	r2, #1
 802aa82:	4648      	mov	r0, r9
 802aa84:	f000 fe38 	bl	802b6f8 <__lshift>
 802aa88:	4621      	mov	r1, r4
 802aa8a:	9001      	str	r0, [sp, #4]
 802aa8c:	f000 fea0 	bl	802b7d0 <__mcmp>
 802aa90:	2800      	cmp	r0, #0
 802aa92:	dcaf      	bgt.n	802a9f4 <_dtoa_r+0x984>
 802aa94:	d102      	bne.n	802aa9c <_dtoa_r+0xa2c>
 802aa96:	f01a 0f01 	tst.w	sl, #1
 802aa9a:	d1ab      	bne.n	802a9f4 <_dtoa_r+0x984>
 802aa9c:	4633      	mov	r3, r6
 802aa9e:	461e      	mov	r6, r3
 802aaa0:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
 802aaa4:	2a30      	cmp	r2, #48	@ 0x30
 802aaa6:	d0fa      	beq.n	802aa9e <_dtoa_r+0xa2e>
 802aaa8:	e5bb      	b.n	802a622 <_dtoa_r+0x5b2>
 802aaaa:	429f      	cmp	r7, r3
 802aaac:	d1a3      	bne.n	802a9f6 <_dtoa_r+0x986>
 802aaae:	9b04      	ldr	r3, [sp, #16]
 802aab0:	3301      	adds	r3, #1
 802aab2:	9304      	str	r3, [sp, #16]
 802aab4:	2331      	movs	r3, #49	@ 0x31
 802aab6:	703b      	strb	r3, [r7, #0]
 802aab8:	e5b3      	b.n	802a622 <_dtoa_r+0x5b2>
 802aaba:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802aabc:	4f16      	ldr	r7, [pc, #88]	@ (802ab18 <_dtoa_r+0xaa8>)
 802aabe:	b11b      	cbz	r3, 802aac8 <_dtoa_r+0xa58>
 802aac0:	f107 0308 	add.w	r3, r7, #8
 802aac4:	9a1d      	ldr	r2, [sp, #116]	@ 0x74
 802aac6:	6013      	str	r3, [r2, #0]
 802aac8:	4638      	mov	r0, r7
 802aaca:	b011      	add	sp, #68	@ 0x44
 802aacc:	ecbd 8b02 	vpop	{d8}
 802aad0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802aad4:	9b07      	ldr	r3, [sp, #28]
 802aad6:	2b01      	cmp	r3, #1
 802aad8:	f77f ae36 	ble.w	802a748 <_dtoa_r+0x6d8>
 802aadc:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802aade:	930b      	str	r3, [sp, #44]	@ 0x2c
 802aae0:	2001      	movs	r0, #1
 802aae2:	e656      	b.n	802a792 <_dtoa_r+0x722>
 802aae4:	f1bb 0f00 	cmp.w	fp, #0
 802aae8:	f77f aed7 	ble.w	802a89a <_dtoa_r+0x82a>
 802aaec:	463e      	mov	r6, r7
 802aaee:	9801      	ldr	r0, [sp, #4]
 802aaf0:	4621      	mov	r1, r4
 802aaf2:	f7ff fa33 	bl	8029f5c <quorem>
 802aaf6:	f100 0a30 	add.w	sl, r0, #48	@ 0x30
 802aafa:	f806 ab01 	strb.w	sl, [r6], #1
 802aafe:	1bf2      	subs	r2, r6, r7
 802ab00:	4593      	cmp	fp, r2
 802ab02:	ddb4      	ble.n	802aa6e <_dtoa_r+0x9fe>
 802ab04:	9901      	ldr	r1, [sp, #4]
 802ab06:	2300      	movs	r3, #0
 802ab08:	220a      	movs	r2, #10
 802ab0a:	4648      	mov	r0, r9
 802ab0c:	f000 fbfe 	bl	802b30c <__multadd>
 802ab10:	9001      	str	r0, [sp, #4]
 802ab12:	e7ec      	b.n	802aaee <_dtoa_r+0xa7e>
 802ab14:	08030f1e 	.word	0x08030f1e
 802ab18:	08030eb9 	.word	0x08030eb9

0802ab1c <_free_r>:
 802ab1c:	b538      	push	{r3, r4, r5, lr}
 802ab1e:	4605      	mov	r5, r0
 802ab20:	2900      	cmp	r1, #0
 802ab22:	d041      	beq.n	802aba8 <_free_r+0x8c>
 802ab24:	f851 3c04 	ldr.w	r3, [r1, #-4]
 802ab28:	1f0c      	subs	r4, r1, #4
 802ab2a:	2b00      	cmp	r3, #0
 802ab2c:	bfb8      	it	lt
 802ab2e:	18e4      	addlt	r4, r4, r3
 802ab30:	f7fd fc1e 	bl	8028370 <__malloc_lock>
 802ab34:	4a1d      	ldr	r2, [pc, #116]	@ (802abac <_free_r+0x90>)
 802ab36:	6813      	ldr	r3, [r2, #0]
 802ab38:	b933      	cbnz	r3, 802ab48 <_free_r+0x2c>
 802ab3a:	6063      	str	r3, [r4, #4]
 802ab3c:	6014      	str	r4, [r2, #0]
 802ab3e:	4628      	mov	r0, r5
 802ab40:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 802ab44:	f7fd bc1a 	b.w	802837c <__malloc_unlock>
 802ab48:	42a3      	cmp	r3, r4
 802ab4a:	d908      	bls.n	802ab5e <_free_r+0x42>
 802ab4c:	6820      	ldr	r0, [r4, #0]
 802ab4e:	1821      	adds	r1, r4, r0
 802ab50:	428b      	cmp	r3, r1
 802ab52:	bf01      	itttt	eq
 802ab54:	6819      	ldreq	r1, [r3, #0]
 802ab56:	685b      	ldreq	r3, [r3, #4]
 802ab58:	1809      	addeq	r1, r1, r0
 802ab5a:	6021      	streq	r1, [r4, #0]
 802ab5c:	e7ed      	b.n	802ab3a <_free_r+0x1e>
 802ab5e:	461a      	mov	r2, r3
 802ab60:	685b      	ldr	r3, [r3, #4]
 802ab62:	b10b      	cbz	r3, 802ab68 <_free_r+0x4c>
 802ab64:	42a3      	cmp	r3, r4
 802ab66:	d9fa      	bls.n	802ab5e <_free_r+0x42>
 802ab68:	6811      	ldr	r1, [r2, #0]
 802ab6a:	1850      	adds	r0, r2, r1
 802ab6c:	42a0      	cmp	r0, r4
 802ab6e:	d10b      	bne.n	802ab88 <_free_r+0x6c>
 802ab70:	6820      	ldr	r0, [r4, #0]
 802ab72:	4401      	add	r1, r0
 802ab74:	1850      	adds	r0, r2, r1
 802ab76:	4283      	cmp	r3, r0
 802ab78:	6011      	str	r1, [r2, #0]
 802ab7a:	d1e0      	bne.n	802ab3e <_free_r+0x22>
 802ab7c:	6818      	ldr	r0, [r3, #0]
 802ab7e:	685b      	ldr	r3, [r3, #4]
 802ab80:	6053      	str	r3, [r2, #4]
 802ab82:	4408      	add	r0, r1
 802ab84:	6010      	str	r0, [r2, #0]
 802ab86:	e7da      	b.n	802ab3e <_free_r+0x22>
 802ab88:	d902      	bls.n	802ab90 <_free_r+0x74>
 802ab8a:	230c      	movs	r3, #12
 802ab8c:	602b      	str	r3, [r5, #0]
 802ab8e:	e7d6      	b.n	802ab3e <_free_r+0x22>
 802ab90:	6820      	ldr	r0, [r4, #0]
 802ab92:	1821      	adds	r1, r4, r0
 802ab94:	428b      	cmp	r3, r1
 802ab96:	bf04      	itt	eq
 802ab98:	6819      	ldreq	r1, [r3, #0]
 802ab9a:	685b      	ldreq	r3, [r3, #4]
 802ab9c:	6063      	str	r3, [r4, #4]
 802ab9e:	bf04      	itt	eq
 802aba0:	1809      	addeq	r1, r1, r0
 802aba2:	6021      	streq	r1, [r4, #0]
 802aba4:	6054      	str	r4, [r2, #4]
 802aba6:	e7ca      	b.n	802ab3e <_free_r+0x22>
 802aba8:	bd38      	pop	{r3, r4, r5, pc}
 802abaa:	bf00      	nop
 802abac:	2402b040 	.word	0x2402b040

0802abb0 <rshift>:
 802abb0:	6903      	ldr	r3, [r0, #16]
 802abb2:	ebb3 1f61 	cmp.w	r3, r1, asr #5
 802abb6:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 802abba:	ea4f 1261 	mov.w	r2, r1, asr #5
 802abbe:	f100 0414 	add.w	r4, r0, #20
 802abc2:	dd45      	ble.n	802ac50 <rshift+0xa0>
 802abc4:	f011 011f 	ands.w	r1, r1, #31
 802abc8:	eb04 0683 	add.w	r6, r4, r3, lsl #2
 802abcc:	eb04 0582 	add.w	r5, r4, r2, lsl #2
 802abd0:	d10c      	bne.n	802abec <rshift+0x3c>
 802abd2:	f100 0710 	add.w	r7, r0, #16
 802abd6:	4629      	mov	r1, r5
 802abd8:	42b1      	cmp	r1, r6
 802abda:	d334      	bcc.n	802ac46 <rshift+0x96>
 802abdc:	1a9b      	subs	r3, r3, r2
 802abde:	009b      	lsls	r3, r3, #2
 802abe0:	1eea      	subs	r2, r5, #3
 802abe2:	4296      	cmp	r6, r2
 802abe4:	bf38      	it	cc
 802abe6:	2300      	movcc	r3, #0
 802abe8:	4423      	add	r3, r4
 802abea:	e015      	b.n	802ac18 <rshift+0x68>
 802abec:	f854 7022 	ldr.w	r7, [r4, r2, lsl #2]
 802abf0:	f1c1 0820 	rsb	r8, r1, #32
 802abf4:	40cf      	lsrs	r7, r1
 802abf6:	f105 0e04 	add.w	lr, r5, #4
 802abfa:	46a1      	mov	r9, r4
 802abfc:	4576      	cmp	r6, lr
 802abfe:	46f4      	mov	ip, lr
 802ac00:	d815      	bhi.n	802ac2e <rshift+0x7e>
 802ac02:	1a9a      	subs	r2, r3, r2
 802ac04:	0092      	lsls	r2, r2, #2
 802ac06:	3a04      	subs	r2, #4
 802ac08:	3501      	adds	r5, #1
 802ac0a:	42ae      	cmp	r6, r5
 802ac0c:	bf38      	it	cc
 802ac0e:	2200      	movcc	r2, #0
 802ac10:	18a3      	adds	r3, r4, r2
 802ac12:	50a7      	str	r7, [r4, r2]
 802ac14:	b107      	cbz	r7, 802ac18 <rshift+0x68>
 802ac16:	3304      	adds	r3, #4
 802ac18:	1b1a      	subs	r2, r3, r4
 802ac1a:	42a3      	cmp	r3, r4
 802ac1c:	ea4f 02a2 	mov.w	r2, r2, asr #2
 802ac20:	bf08      	it	eq
 802ac22:	2300      	moveq	r3, #0
 802ac24:	6102      	str	r2, [r0, #16]
 802ac26:	bf08      	it	eq
 802ac28:	6143      	streq	r3, [r0, #20]
 802ac2a:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 802ac2e:	f8dc c000 	ldr.w	ip, [ip]
 802ac32:	fa0c fc08 	lsl.w	ip, ip, r8
 802ac36:	ea4c 0707 	orr.w	r7, ip, r7
 802ac3a:	f849 7b04 	str.w	r7, [r9], #4
 802ac3e:	f85e 7b04 	ldr.w	r7, [lr], #4
 802ac42:	40cf      	lsrs	r7, r1
 802ac44:	e7da      	b.n	802abfc <rshift+0x4c>
 802ac46:	f851 cb04 	ldr.w	ip, [r1], #4
 802ac4a:	f847 cf04 	str.w	ip, [r7, #4]!
 802ac4e:	e7c3      	b.n	802abd8 <rshift+0x28>
 802ac50:	4623      	mov	r3, r4
 802ac52:	e7e1      	b.n	802ac18 <rshift+0x68>

0802ac54 <__hexdig_fun>:
 802ac54:	f1a0 0330 	sub.w	r3, r0, #48	@ 0x30
 802ac58:	2b09      	cmp	r3, #9
 802ac5a:	d802      	bhi.n	802ac62 <__hexdig_fun+0xe>
 802ac5c:	3820      	subs	r0, #32
 802ac5e:	b2c0      	uxtb	r0, r0
 802ac60:	4770      	bx	lr
 802ac62:	f1a0 0361 	sub.w	r3, r0, #97	@ 0x61
 802ac66:	2b05      	cmp	r3, #5
 802ac68:	d801      	bhi.n	802ac6e <__hexdig_fun+0x1a>
 802ac6a:	3847      	subs	r0, #71	@ 0x47
 802ac6c:	e7f7      	b.n	802ac5e <__hexdig_fun+0xa>
 802ac6e:	f1a0 0341 	sub.w	r3, r0, #65	@ 0x41
 802ac72:	2b05      	cmp	r3, #5
 802ac74:	d801      	bhi.n	802ac7a <__hexdig_fun+0x26>
 802ac76:	3827      	subs	r0, #39	@ 0x27
 802ac78:	e7f1      	b.n	802ac5e <__hexdig_fun+0xa>
 802ac7a:	2000      	movs	r0, #0
 802ac7c:	4770      	bx	lr
	...

0802ac80 <__gethex>:
 802ac80:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802ac84:	b085      	sub	sp, #20
 802ac86:	468a      	mov	sl, r1
 802ac88:	9302      	str	r3, [sp, #8]
 802ac8a:	680b      	ldr	r3, [r1, #0]
 802ac8c:	9001      	str	r0, [sp, #4]
 802ac8e:	4690      	mov	r8, r2
 802ac90:	1c9c      	adds	r4, r3, #2
 802ac92:	46a1      	mov	r9, r4
 802ac94:	f814 0b01 	ldrb.w	r0, [r4], #1
 802ac98:	2830      	cmp	r0, #48	@ 0x30
 802ac9a:	d0fa      	beq.n	802ac92 <__gethex+0x12>
 802ac9c:	eba9 0303 	sub.w	r3, r9, r3
 802aca0:	f1a3 0b02 	sub.w	fp, r3, #2
 802aca4:	f7ff ffd6 	bl	802ac54 <__hexdig_fun>
 802aca8:	4605      	mov	r5, r0
 802acaa:	2800      	cmp	r0, #0
 802acac:	d168      	bne.n	802ad80 <__gethex+0x100>
 802acae:	49a0      	ldr	r1, [pc, #640]	@ (802af30 <__gethex+0x2b0>)
 802acb0:	2201      	movs	r2, #1
 802acb2:	4648      	mov	r0, r9
 802acb4:	f7ff f82c 	bl	8029d10 <strncmp>
 802acb8:	4607      	mov	r7, r0
 802acba:	2800      	cmp	r0, #0
 802acbc:	d167      	bne.n	802ad8e <__gethex+0x10e>
 802acbe:	f899 0001 	ldrb.w	r0, [r9, #1]
 802acc2:	4626      	mov	r6, r4
 802acc4:	f7ff ffc6 	bl	802ac54 <__hexdig_fun>
 802acc8:	2800      	cmp	r0, #0
 802acca:	d062      	beq.n	802ad92 <__gethex+0x112>
 802accc:	4623      	mov	r3, r4
 802acce:	7818      	ldrb	r0, [r3, #0]
 802acd0:	2830      	cmp	r0, #48	@ 0x30
 802acd2:	4699      	mov	r9, r3
 802acd4:	f103 0301 	add.w	r3, r3, #1
 802acd8:	d0f9      	beq.n	802acce <__gethex+0x4e>
 802acda:	f7ff ffbb 	bl	802ac54 <__hexdig_fun>
 802acde:	fab0 f580 	clz	r5, r0
 802ace2:	096d      	lsrs	r5, r5, #5
 802ace4:	f04f 0b01 	mov.w	fp, #1
 802ace8:	464a      	mov	r2, r9
 802acea:	4616      	mov	r6, r2
 802acec:	3201      	adds	r2, #1
 802acee:	7830      	ldrb	r0, [r6, #0]
 802acf0:	f7ff ffb0 	bl	802ac54 <__hexdig_fun>
 802acf4:	2800      	cmp	r0, #0
 802acf6:	d1f8      	bne.n	802acea <__gethex+0x6a>
 802acf8:	498d      	ldr	r1, [pc, #564]	@ (802af30 <__gethex+0x2b0>)
 802acfa:	2201      	movs	r2, #1
 802acfc:	4630      	mov	r0, r6
 802acfe:	f7ff f807 	bl	8029d10 <strncmp>
 802ad02:	2800      	cmp	r0, #0
 802ad04:	d13f      	bne.n	802ad86 <__gethex+0x106>
 802ad06:	b944      	cbnz	r4, 802ad1a <__gethex+0x9a>
 802ad08:	1c74      	adds	r4, r6, #1
 802ad0a:	4622      	mov	r2, r4
 802ad0c:	4616      	mov	r6, r2
 802ad0e:	3201      	adds	r2, #1
 802ad10:	7830      	ldrb	r0, [r6, #0]
 802ad12:	f7ff ff9f 	bl	802ac54 <__hexdig_fun>
 802ad16:	2800      	cmp	r0, #0
 802ad18:	d1f8      	bne.n	802ad0c <__gethex+0x8c>
 802ad1a:	1ba4      	subs	r4, r4, r6
 802ad1c:	00a7      	lsls	r7, r4, #2
 802ad1e:	7833      	ldrb	r3, [r6, #0]
 802ad20:	f003 03df 	and.w	r3, r3, #223	@ 0xdf
 802ad24:	2b50      	cmp	r3, #80	@ 0x50
 802ad26:	d13e      	bne.n	802ada6 <__gethex+0x126>
 802ad28:	7873      	ldrb	r3, [r6, #1]
 802ad2a:	2b2b      	cmp	r3, #43	@ 0x2b
 802ad2c:	d033      	beq.n	802ad96 <__gethex+0x116>
 802ad2e:	2b2d      	cmp	r3, #45	@ 0x2d
 802ad30:	d034      	beq.n	802ad9c <__gethex+0x11c>
 802ad32:	1c71      	adds	r1, r6, #1
 802ad34:	2400      	movs	r4, #0
 802ad36:	7808      	ldrb	r0, [r1, #0]
 802ad38:	f7ff ff8c 	bl	802ac54 <__hexdig_fun>
 802ad3c:	1e43      	subs	r3, r0, #1
 802ad3e:	b2db      	uxtb	r3, r3
 802ad40:	2b18      	cmp	r3, #24
 802ad42:	d830      	bhi.n	802ada6 <__gethex+0x126>
 802ad44:	f1a0 0210 	sub.w	r2, r0, #16
 802ad48:	f811 0f01 	ldrb.w	r0, [r1, #1]!
 802ad4c:	f7ff ff82 	bl	802ac54 <__hexdig_fun>
 802ad50:	f100 3cff 	add.w	ip, r0, #4294967295	@ 0xffffffff
 802ad54:	fa5f fc8c 	uxtb.w	ip, ip
 802ad58:	f1bc 0f18 	cmp.w	ip, #24
 802ad5c:	f04f 030a 	mov.w	r3, #10
 802ad60:	d91e      	bls.n	802ada0 <__gethex+0x120>
 802ad62:	b104      	cbz	r4, 802ad66 <__gethex+0xe6>
 802ad64:	4252      	negs	r2, r2
 802ad66:	4417      	add	r7, r2
 802ad68:	f8ca 1000 	str.w	r1, [sl]
 802ad6c:	b1ed      	cbz	r5, 802adaa <__gethex+0x12a>
 802ad6e:	f1bb 0f00 	cmp.w	fp, #0
 802ad72:	bf0c      	ite	eq
 802ad74:	2506      	moveq	r5, #6
 802ad76:	2500      	movne	r5, #0
 802ad78:	4628      	mov	r0, r5
 802ad7a:	b005      	add	sp, #20
 802ad7c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802ad80:	2500      	movs	r5, #0
 802ad82:	462c      	mov	r4, r5
 802ad84:	e7b0      	b.n	802ace8 <__gethex+0x68>
 802ad86:	2c00      	cmp	r4, #0
 802ad88:	d1c7      	bne.n	802ad1a <__gethex+0x9a>
 802ad8a:	4627      	mov	r7, r4
 802ad8c:	e7c7      	b.n	802ad1e <__gethex+0x9e>
 802ad8e:	464e      	mov	r6, r9
 802ad90:	462f      	mov	r7, r5
 802ad92:	2501      	movs	r5, #1
 802ad94:	e7c3      	b.n	802ad1e <__gethex+0x9e>
 802ad96:	2400      	movs	r4, #0
 802ad98:	1cb1      	adds	r1, r6, #2
 802ad9a:	e7cc      	b.n	802ad36 <__gethex+0xb6>
 802ad9c:	2401      	movs	r4, #1
 802ad9e:	e7fb      	b.n	802ad98 <__gethex+0x118>
 802ada0:	fb03 0002 	mla	r0, r3, r2, r0
 802ada4:	e7ce      	b.n	802ad44 <__gethex+0xc4>
 802ada6:	4631      	mov	r1, r6
 802ada8:	e7de      	b.n	802ad68 <__gethex+0xe8>
 802adaa:	eba6 0309 	sub.w	r3, r6, r9
 802adae:	3b01      	subs	r3, #1
 802adb0:	4629      	mov	r1, r5
 802adb2:	2b07      	cmp	r3, #7
 802adb4:	dc0a      	bgt.n	802adcc <__gethex+0x14c>
 802adb6:	9801      	ldr	r0, [sp, #4]
 802adb8:	f000 fa46 	bl	802b248 <_Balloc>
 802adbc:	4604      	mov	r4, r0
 802adbe:	b940      	cbnz	r0, 802add2 <__gethex+0x152>
 802adc0:	4b5c      	ldr	r3, [pc, #368]	@ (802af34 <__gethex+0x2b4>)
 802adc2:	4602      	mov	r2, r0
 802adc4:	21e4      	movs	r1, #228	@ 0xe4
 802adc6:	485c      	ldr	r0, [pc, #368]	@ (802af38 <__gethex+0x2b8>)
 802adc8:	f7ff f8aa 	bl	8029f20 <__assert_func>
 802adcc:	3101      	adds	r1, #1
 802adce:	105b      	asrs	r3, r3, #1
 802add0:	e7ef      	b.n	802adb2 <__gethex+0x132>
 802add2:	f100 0a14 	add.w	sl, r0, #20
 802add6:	2300      	movs	r3, #0
 802add8:	4655      	mov	r5, sl
 802adda:	469b      	mov	fp, r3
 802addc:	45b1      	cmp	r9, r6
 802adde:	d337      	bcc.n	802ae50 <__gethex+0x1d0>
 802ade0:	f845 bb04 	str.w	fp, [r5], #4
 802ade4:	eba5 050a 	sub.w	r5, r5, sl
 802ade8:	10ad      	asrs	r5, r5, #2
 802adea:	6125      	str	r5, [r4, #16]
 802adec:	4658      	mov	r0, fp
 802adee:	f000 fb1d 	bl	802b42c <__hi0bits>
 802adf2:	016d      	lsls	r5, r5, #5
 802adf4:	f8d8 6000 	ldr.w	r6, [r8]
 802adf8:	1a2d      	subs	r5, r5, r0
 802adfa:	42b5      	cmp	r5, r6
 802adfc:	dd54      	ble.n	802aea8 <__gethex+0x228>
 802adfe:	1bad      	subs	r5, r5, r6
 802ae00:	4629      	mov	r1, r5
 802ae02:	4620      	mov	r0, r4
 802ae04:	f000 feae 	bl	802bb64 <__any_on>
 802ae08:	4681      	mov	r9, r0
 802ae0a:	b178      	cbz	r0, 802ae2c <__gethex+0x1ac>
 802ae0c:	1e6b      	subs	r3, r5, #1
 802ae0e:	1159      	asrs	r1, r3, #5
 802ae10:	f003 021f 	and.w	r2, r3, #31
 802ae14:	f85a 1021 	ldr.w	r1, [sl, r1, lsl #2]
 802ae18:	f04f 0901 	mov.w	r9, #1
 802ae1c:	fa09 f202 	lsl.w	r2, r9, r2
 802ae20:	420a      	tst	r2, r1
 802ae22:	d003      	beq.n	802ae2c <__gethex+0x1ac>
 802ae24:	454b      	cmp	r3, r9
 802ae26:	dc36      	bgt.n	802ae96 <__gethex+0x216>
 802ae28:	f04f 0902 	mov.w	r9, #2
 802ae2c:	4629      	mov	r1, r5
 802ae2e:	4620      	mov	r0, r4
 802ae30:	f7ff febe 	bl	802abb0 <rshift>
 802ae34:	442f      	add	r7, r5
 802ae36:	f8d8 3008 	ldr.w	r3, [r8, #8]
 802ae3a:	42bb      	cmp	r3, r7
 802ae3c:	da42      	bge.n	802aec4 <__gethex+0x244>
 802ae3e:	9801      	ldr	r0, [sp, #4]
 802ae40:	4621      	mov	r1, r4
 802ae42:	f000 fa41 	bl	802b2c8 <_Bfree>
 802ae46:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802ae48:	2300      	movs	r3, #0
 802ae4a:	6013      	str	r3, [r2, #0]
 802ae4c:	25a3      	movs	r5, #163	@ 0xa3
 802ae4e:	e793      	b.n	802ad78 <__gethex+0xf8>
 802ae50:	f816 2d01 	ldrb.w	r2, [r6, #-1]!
 802ae54:	2a2e      	cmp	r2, #46	@ 0x2e
 802ae56:	d012      	beq.n	802ae7e <__gethex+0x1fe>
 802ae58:	2b20      	cmp	r3, #32
 802ae5a:	d104      	bne.n	802ae66 <__gethex+0x1e6>
 802ae5c:	f845 bb04 	str.w	fp, [r5], #4
 802ae60:	f04f 0b00 	mov.w	fp, #0
 802ae64:	465b      	mov	r3, fp
 802ae66:	7830      	ldrb	r0, [r6, #0]
 802ae68:	9303      	str	r3, [sp, #12]
 802ae6a:	f7ff fef3 	bl	802ac54 <__hexdig_fun>
 802ae6e:	9b03      	ldr	r3, [sp, #12]
 802ae70:	f000 000f 	and.w	r0, r0, #15
 802ae74:	4098      	lsls	r0, r3
 802ae76:	ea4b 0b00 	orr.w	fp, fp, r0
 802ae7a:	3304      	adds	r3, #4
 802ae7c:	e7ae      	b.n	802addc <__gethex+0x15c>
 802ae7e:	45b1      	cmp	r9, r6
 802ae80:	d8ea      	bhi.n	802ae58 <__gethex+0x1d8>
 802ae82:	492b      	ldr	r1, [pc, #172]	@ (802af30 <__gethex+0x2b0>)
 802ae84:	9303      	str	r3, [sp, #12]
 802ae86:	2201      	movs	r2, #1
 802ae88:	4630      	mov	r0, r6
 802ae8a:	f7fe ff41 	bl	8029d10 <strncmp>
 802ae8e:	9b03      	ldr	r3, [sp, #12]
 802ae90:	2800      	cmp	r0, #0
 802ae92:	d1e1      	bne.n	802ae58 <__gethex+0x1d8>
 802ae94:	e7a2      	b.n	802addc <__gethex+0x15c>
 802ae96:	1ea9      	subs	r1, r5, #2
 802ae98:	4620      	mov	r0, r4
 802ae9a:	f000 fe63 	bl	802bb64 <__any_on>
 802ae9e:	2800      	cmp	r0, #0
 802aea0:	d0c2      	beq.n	802ae28 <__gethex+0x1a8>
 802aea2:	f04f 0903 	mov.w	r9, #3
 802aea6:	e7c1      	b.n	802ae2c <__gethex+0x1ac>
 802aea8:	da09      	bge.n	802aebe <__gethex+0x23e>
 802aeaa:	1b75      	subs	r5, r6, r5
 802aeac:	4621      	mov	r1, r4
 802aeae:	9801      	ldr	r0, [sp, #4]
 802aeb0:	462a      	mov	r2, r5
 802aeb2:	f000 fc21 	bl	802b6f8 <__lshift>
 802aeb6:	1b7f      	subs	r7, r7, r5
 802aeb8:	4604      	mov	r4, r0
 802aeba:	f100 0a14 	add.w	sl, r0, #20
 802aebe:	f04f 0900 	mov.w	r9, #0
 802aec2:	e7b8      	b.n	802ae36 <__gethex+0x1b6>
 802aec4:	f8d8 5004 	ldr.w	r5, [r8, #4]
 802aec8:	42bd      	cmp	r5, r7
 802aeca:	dd6f      	ble.n	802afac <__gethex+0x32c>
 802aecc:	1bed      	subs	r5, r5, r7
 802aece:	42ae      	cmp	r6, r5
 802aed0:	dc34      	bgt.n	802af3c <__gethex+0x2bc>
 802aed2:	f8d8 300c 	ldr.w	r3, [r8, #12]
 802aed6:	2b02      	cmp	r3, #2
 802aed8:	d022      	beq.n	802af20 <__gethex+0x2a0>
 802aeda:	2b03      	cmp	r3, #3
 802aedc:	d024      	beq.n	802af28 <__gethex+0x2a8>
 802aede:	2b01      	cmp	r3, #1
 802aee0:	d115      	bne.n	802af0e <__gethex+0x28e>
 802aee2:	42ae      	cmp	r6, r5
 802aee4:	d113      	bne.n	802af0e <__gethex+0x28e>
 802aee6:	2e01      	cmp	r6, #1
 802aee8:	d10b      	bne.n	802af02 <__gethex+0x282>
 802aeea:	9a02      	ldr	r2, [sp, #8]
 802aeec:	f8d8 3004 	ldr.w	r3, [r8, #4]
 802aef0:	6013      	str	r3, [r2, #0]
 802aef2:	2301      	movs	r3, #1
 802aef4:	6123      	str	r3, [r4, #16]
 802aef6:	f8ca 3000 	str.w	r3, [sl]
 802aefa:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 802aefc:	2562      	movs	r5, #98	@ 0x62
 802aefe:	601c      	str	r4, [r3, #0]
 802af00:	e73a      	b.n	802ad78 <__gethex+0xf8>
 802af02:	1e71      	subs	r1, r6, #1
 802af04:	4620      	mov	r0, r4
 802af06:	f000 fe2d 	bl	802bb64 <__any_on>
 802af0a:	2800      	cmp	r0, #0
 802af0c:	d1ed      	bne.n	802aeea <__gethex+0x26a>
 802af0e:	9801      	ldr	r0, [sp, #4]
 802af10:	4621      	mov	r1, r4
 802af12:	f000 f9d9 	bl	802b2c8 <_Bfree>
 802af16:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802af18:	2300      	movs	r3, #0
 802af1a:	6013      	str	r3, [r2, #0]
 802af1c:	2550      	movs	r5, #80	@ 0x50
 802af1e:	e72b      	b.n	802ad78 <__gethex+0xf8>
 802af20:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802af22:	2b00      	cmp	r3, #0
 802af24:	d1f3      	bne.n	802af0e <__gethex+0x28e>
 802af26:	e7e0      	b.n	802aeea <__gethex+0x26a>
 802af28:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802af2a:	2b00      	cmp	r3, #0
 802af2c:	d1dd      	bne.n	802aeea <__gethex+0x26a>
 802af2e:	e7ee      	b.n	802af0e <__gethex+0x28e>
 802af30:	08030ced 	.word	0x08030ced
 802af34:	08030f1e 	.word	0x08030f1e
 802af38:	08030f2f 	.word	0x08030f2f
 802af3c:	1e6f      	subs	r7, r5, #1
 802af3e:	f1b9 0f00 	cmp.w	r9, #0
 802af42:	d130      	bne.n	802afa6 <__gethex+0x326>
 802af44:	b127      	cbz	r7, 802af50 <__gethex+0x2d0>
 802af46:	4639      	mov	r1, r7
 802af48:	4620      	mov	r0, r4
 802af4a:	f000 fe0b 	bl	802bb64 <__any_on>
 802af4e:	4681      	mov	r9, r0
 802af50:	117a      	asrs	r2, r7, #5
 802af52:	2301      	movs	r3, #1
 802af54:	f85a 2022 	ldr.w	r2, [sl, r2, lsl #2]
 802af58:	f007 071f 	and.w	r7, r7, #31
 802af5c:	40bb      	lsls	r3, r7
 802af5e:	4213      	tst	r3, r2
 802af60:	4629      	mov	r1, r5
 802af62:	4620      	mov	r0, r4
 802af64:	bf18      	it	ne
 802af66:	f049 0902 	orrne.w	r9, r9, #2
 802af6a:	f7ff fe21 	bl	802abb0 <rshift>
 802af6e:	f8d8 7004 	ldr.w	r7, [r8, #4]
 802af72:	1b76      	subs	r6, r6, r5
 802af74:	2502      	movs	r5, #2
 802af76:	f1b9 0f00 	cmp.w	r9, #0
 802af7a:	d047      	beq.n	802b00c <__gethex+0x38c>
 802af7c:	f8d8 300c 	ldr.w	r3, [r8, #12]
 802af80:	2b02      	cmp	r3, #2
 802af82:	d015      	beq.n	802afb0 <__gethex+0x330>
 802af84:	2b03      	cmp	r3, #3
 802af86:	d017      	beq.n	802afb8 <__gethex+0x338>
 802af88:	2b01      	cmp	r3, #1
 802af8a:	d109      	bne.n	802afa0 <__gethex+0x320>
 802af8c:	f019 0f02 	tst.w	r9, #2
 802af90:	d006      	beq.n	802afa0 <__gethex+0x320>
 802af92:	f8da 3000 	ldr.w	r3, [sl]
 802af96:	ea49 0903 	orr.w	r9, r9, r3
 802af9a:	f019 0f01 	tst.w	r9, #1
 802af9e:	d10e      	bne.n	802afbe <__gethex+0x33e>
 802afa0:	f045 0510 	orr.w	r5, r5, #16
 802afa4:	e032      	b.n	802b00c <__gethex+0x38c>
 802afa6:	f04f 0901 	mov.w	r9, #1
 802afaa:	e7d1      	b.n	802af50 <__gethex+0x2d0>
 802afac:	2501      	movs	r5, #1
 802afae:	e7e2      	b.n	802af76 <__gethex+0x2f6>
 802afb0:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802afb2:	f1c3 0301 	rsb	r3, r3, #1
 802afb6:	930f      	str	r3, [sp, #60]	@ 0x3c
 802afb8:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802afba:	2b00      	cmp	r3, #0
 802afbc:	d0f0      	beq.n	802afa0 <__gethex+0x320>
 802afbe:	f8d4 b010 	ldr.w	fp, [r4, #16]
 802afc2:	f104 0314 	add.w	r3, r4, #20
 802afc6:	ea4f 0a8b 	mov.w	sl, fp, lsl #2
 802afca:	eb03 018b 	add.w	r1, r3, fp, lsl #2
 802afce:	f04f 0c00 	mov.w	ip, #0
 802afd2:	4618      	mov	r0, r3
 802afd4:	f853 2b04 	ldr.w	r2, [r3], #4
 802afd8:	f1b2 3fff 	cmp.w	r2, #4294967295	@ 0xffffffff
 802afdc:	d01b      	beq.n	802b016 <__gethex+0x396>
 802afde:	3201      	adds	r2, #1
 802afe0:	6002      	str	r2, [r0, #0]
 802afe2:	2d02      	cmp	r5, #2
 802afe4:	f104 0314 	add.w	r3, r4, #20
 802afe8:	d13c      	bne.n	802b064 <__gethex+0x3e4>
 802afea:	f8d8 2000 	ldr.w	r2, [r8]
 802afee:	3a01      	subs	r2, #1
 802aff0:	42b2      	cmp	r2, r6
 802aff2:	d109      	bne.n	802b008 <__gethex+0x388>
 802aff4:	1171      	asrs	r1, r6, #5
 802aff6:	2201      	movs	r2, #1
 802aff8:	f853 3021 	ldr.w	r3, [r3, r1, lsl #2]
 802affc:	f006 061f 	and.w	r6, r6, #31
 802b000:	fa02 f606 	lsl.w	r6, r2, r6
 802b004:	421e      	tst	r6, r3
 802b006:	d13a      	bne.n	802b07e <__gethex+0x3fe>
 802b008:	f045 0520 	orr.w	r5, r5, #32
 802b00c:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 802b00e:	601c      	str	r4, [r3, #0]
 802b010:	9b02      	ldr	r3, [sp, #8]
 802b012:	601f      	str	r7, [r3, #0]
 802b014:	e6b0      	b.n	802ad78 <__gethex+0xf8>
 802b016:	4299      	cmp	r1, r3
 802b018:	f843 cc04 	str.w	ip, [r3, #-4]
 802b01c:	d8d9      	bhi.n	802afd2 <__gethex+0x352>
 802b01e:	68a3      	ldr	r3, [r4, #8]
 802b020:	459b      	cmp	fp, r3
 802b022:	db17      	blt.n	802b054 <__gethex+0x3d4>
 802b024:	6861      	ldr	r1, [r4, #4]
 802b026:	9801      	ldr	r0, [sp, #4]
 802b028:	3101      	adds	r1, #1
 802b02a:	f000 f90d 	bl	802b248 <_Balloc>
 802b02e:	4681      	mov	r9, r0
 802b030:	b918      	cbnz	r0, 802b03a <__gethex+0x3ba>
 802b032:	4b1a      	ldr	r3, [pc, #104]	@ (802b09c <__gethex+0x41c>)
 802b034:	4602      	mov	r2, r0
 802b036:	2184      	movs	r1, #132	@ 0x84
 802b038:	e6c5      	b.n	802adc6 <__gethex+0x146>
 802b03a:	6922      	ldr	r2, [r4, #16]
 802b03c:	3202      	adds	r2, #2
 802b03e:	f104 010c 	add.w	r1, r4, #12
 802b042:	0092      	lsls	r2, r2, #2
 802b044:	300c      	adds	r0, #12
 802b046:	f7fe ff52 	bl	8029eee <memcpy>
 802b04a:	4621      	mov	r1, r4
 802b04c:	9801      	ldr	r0, [sp, #4]
 802b04e:	f000 f93b 	bl	802b2c8 <_Bfree>
 802b052:	464c      	mov	r4, r9
 802b054:	6923      	ldr	r3, [r4, #16]
 802b056:	1c5a      	adds	r2, r3, #1
 802b058:	eb04 0383 	add.w	r3, r4, r3, lsl #2
 802b05c:	6122      	str	r2, [r4, #16]
 802b05e:	2201      	movs	r2, #1
 802b060:	615a      	str	r2, [r3, #20]
 802b062:	e7be      	b.n	802afe2 <__gethex+0x362>
 802b064:	6922      	ldr	r2, [r4, #16]
 802b066:	455a      	cmp	r2, fp
 802b068:	dd0b      	ble.n	802b082 <__gethex+0x402>
 802b06a:	2101      	movs	r1, #1
 802b06c:	4620      	mov	r0, r4
 802b06e:	f7ff fd9f 	bl	802abb0 <rshift>
 802b072:	f8d8 3008 	ldr.w	r3, [r8, #8]
 802b076:	3701      	adds	r7, #1
 802b078:	42bb      	cmp	r3, r7
 802b07a:	f6ff aee0 	blt.w	802ae3e <__gethex+0x1be>
 802b07e:	2501      	movs	r5, #1
 802b080:	e7c2      	b.n	802b008 <__gethex+0x388>
 802b082:	f016 061f 	ands.w	r6, r6, #31
 802b086:	d0fa      	beq.n	802b07e <__gethex+0x3fe>
 802b088:	4453      	add	r3, sl
 802b08a:	f1c6 0620 	rsb	r6, r6, #32
 802b08e:	f853 0c04 	ldr.w	r0, [r3, #-4]
 802b092:	f000 f9cb 	bl	802b42c <__hi0bits>
 802b096:	42b0      	cmp	r0, r6
 802b098:	dbe7      	blt.n	802b06a <__gethex+0x3ea>
 802b09a:	e7f0      	b.n	802b07e <__gethex+0x3fe>
 802b09c:	08030f1e 	.word	0x08030f1e

0802b0a0 <L_shift>:
 802b0a0:	f1c2 0208 	rsb	r2, r2, #8
 802b0a4:	0092      	lsls	r2, r2, #2
 802b0a6:	b570      	push	{r4, r5, r6, lr}
 802b0a8:	f1c2 0620 	rsb	r6, r2, #32
 802b0ac:	6843      	ldr	r3, [r0, #4]
 802b0ae:	6804      	ldr	r4, [r0, #0]
 802b0b0:	fa03 f506 	lsl.w	r5, r3, r6
 802b0b4:	432c      	orrs	r4, r5
 802b0b6:	40d3      	lsrs	r3, r2
 802b0b8:	6004      	str	r4, [r0, #0]
 802b0ba:	f840 3f04 	str.w	r3, [r0, #4]!
 802b0be:	4288      	cmp	r0, r1
 802b0c0:	d3f4      	bcc.n	802b0ac <L_shift+0xc>
 802b0c2:	bd70      	pop	{r4, r5, r6, pc}

0802b0c4 <__match>:
 802b0c4:	b530      	push	{r4, r5, lr}
 802b0c6:	6803      	ldr	r3, [r0, #0]
 802b0c8:	3301      	adds	r3, #1
 802b0ca:	f811 4b01 	ldrb.w	r4, [r1], #1
 802b0ce:	b914      	cbnz	r4, 802b0d6 <__match+0x12>
 802b0d0:	6003      	str	r3, [r0, #0]
 802b0d2:	2001      	movs	r0, #1
 802b0d4:	bd30      	pop	{r4, r5, pc}
 802b0d6:	f813 2b01 	ldrb.w	r2, [r3], #1
 802b0da:	f1a2 0541 	sub.w	r5, r2, #65	@ 0x41
 802b0de:	2d19      	cmp	r5, #25
 802b0e0:	bf98      	it	ls
 802b0e2:	3220      	addls	r2, #32
 802b0e4:	42a2      	cmp	r2, r4
 802b0e6:	d0f0      	beq.n	802b0ca <__match+0x6>
 802b0e8:	2000      	movs	r0, #0
 802b0ea:	e7f3      	b.n	802b0d4 <__match+0x10>

0802b0ec <__hexnan>:
 802b0ec:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802b0f0:	680b      	ldr	r3, [r1, #0]
 802b0f2:	6801      	ldr	r1, [r0, #0]
 802b0f4:	115e      	asrs	r6, r3, #5
 802b0f6:	eb02 0686 	add.w	r6, r2, r6, lsl #2
 802b0fa:	f013 031f 	ands.w	r3, r3, #31
 802b0fe:	b087      	sub	sp, #28
 802b100:	bf18      	it	ne
 802b102:	3604      	addne	r6, #4
 802b104:	2500      	movs	r5, #0
 802b106:	1f37      	subs	r7, r6, #4
 802b108:	4682      	mov	sl, r0
 802b10a:	4690      	mov	r8, r2
 802b10c:	9301      	str	r3, [sp, #4]
 802b10e:	f846 5c04 	str.w	r5, [r6, #-4]
 802b112:	46b9      	mov	r9, r7
 802b114:	463c      	mov	r4, r7
 802b116:	9502      	str	r5, [sp, #8]
 802b118:	46ab      	mov	fp, r5
 802b11a:	784a      	ldrb	r2, [r1, #1]
 802b11c:	1c4b      	adds	r3, r1, #1
 802b11e:	9303      	str	r3, [sp, #12]
 802b120:	b342      	cbz	r2, 802b174 <__hexnan+0x88>
 802b122:	4610      	mov	r0, r2
 802b124:	9105      	str	r1, [sp, #20]
 802b126:	9204      	str	r2, [sp, #16]
 802b128:	f7ff fd94 	bl	802ac54 <__hexdig_fun>
 802b12c:	2800      	cmp	r0, #0
 802b12e:	d151      	bne.n	802b1d4 <__hexnan+0xe8>
 802b130:	9a04      	ldr	r2, [sp, #16]
 802b132:	9905      	ldr	r1, [sp, #20]
 802b134:	2a20      	cmp	r2, #32
 802b136:	d818      	bhi.n	802b16a <__hexnan+0x7e>
 802b138:	9b02      	ldr	r3, [sp, #8]
 802b13a:	459b      	cmp	fp, r3
 802b13c:	dd13      	ble.n	802b166 <__hexnan+0x7a>
 802b13e:	454c      	cmp	r4, r9
 802b140:	d206      	bcs.n	802b150 <__hexnan+0x64>
 802b142:	2d07      	cmp	r5, #7
 802b144:	dc04      	bgt.n	802b150 <__hexnan+0x64>
 802b146:	462a      	mov	r2, r5
 802b148:	4649      	mov	r1, r9
 802b14a:	4620      	mov	r0, r4
 802b14c:	f7ff ffa8 	bl	802b0a0 <L_shift>
 802b150:	4544      	cmp	r4, r8
 802b152:	d952      	bls.n	802b1fa <__hexnan+0x10e>
 802b154:	2300      	movs	r3, #0
 802b156:	f1a4 0904 	sub.w	r9, r4, #4
 802b15a:	f844 3c04 	str.w	r3, [r4, #-4]
 802b15e:	f8cd b008 	str.w	fp, [sp, #8]
 802b162:	464c      	mov	r4, r9
 802b164:	461d      	mov	r5, r3
 802b166:	9903      	ldr	r1, [sp, #12]
 802b168:	e7d7      	b.n	802b11a <__hexnan+0x2e>
 802b16a:	2a29      	cmp	r2, #41	@ 0x29
 802b16c:	d157      	bne.n	802b21e <__hexnan+0x132>
 802b16e:	3102      	adds	r1, #2
 802b170:	f8ca 1000 	str.w	r1, [sl]
 802b174:	f1bb 0f00 	cmp.w	fp, #0
 802b178:	d051      	beq.n	802b21e <__hexnan+0x132>
 802b17a:	454c      	cmp	r4, r9
 802b17c:	d206      	bcs.n	802b18c <__hexnan+0xa0>
 802b17e:	2d07      	cmp	r5, #7
 802b180:	dc04      	bgt.n	802b18c <__hexnan+0xa0>
 802b182:	462a      	mov	r2, r5
 802b184:	4649      	mov	r1, r9
 802b186:	4620      	mov	r0, r4
 802b188:	f7ff ff8a 	bl	802b0a0 <L_shift>
 802b18c:	4544      	cmp	r4, r8
 802b18e:	d936      	bls.n	802b1fe <__hexnan+0x112>
 802b190:	f1a8 0204 	sub.w	r2, r8, #4
 802b194:	4623      	mov	r3, r4
 802b196:	f853 1b04 	ldr.w	r1, [r3], #4
 802b19a:	f842 1f04 	str.w	r1, [r2, #4]!
 802b19e:	429f      	cmp	r7, r3
 802b1a0:	d2f9      	bcs.n	802b196 <__hexnan+0xaa>
 802b1a2:	1b3b      	subs	r3, r7, r4
 802b1a4:	f023 0303 	bic.w	r3, r3, #3
 802b1a8:	3304      	adds	r3, #4
 802b1aa:	3401      	adds	r4, #1
 802b1ac:	3e03      	subs	r6, #3
 802b1ae:	42b4      	cmp	r4, r6
 802b1b0:	bf88      	it	hi
 802b1b2:	2304      	movhi	r3, #4
 802b1b4:	4443      	add	r3, r8
 802b1b6:	2200      	movs	r2, #0
 802b1b8:	f843 2b04 	str.w	r2, [r3], #4
 802b1bc:	429f      	cmp	r7, r3
 802b1be:	d2fb      	bcs.n	802b1b8 <__hexnan+0xcc>
 802b1c0:	683b      	ldr	r3, [r7, #0]
 802b1c2:	b91b      	cbnz	r3, 802b1cc <__hexnan+0xe0>
 802b1c4:	4547      	cmp	r7, r8
 802b1c6:	d128      	bne.n	802b21a <__hexnan+0x12e>
 802b1c8:	2301      	movs	r3, #1
 802b1ca:	603b      	str	r3, [r7, #0]
 802b1cc:	2005      	movs	r0, #5
 802b1ce:	b007      	add	sp, #28
 802b1d0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802b1d4:	3501      	adds	r5, #1
 802b1d6:	2d08      	cmp	r5, #8
 802b1d8:	f10b 0b01 	add.w	fp, fp, #1
 802b1dc:	dd06      	ble.n	802b1ec <__hexnan+0x100>
 802b1de:	4544      	cmp	r4, r8
 802b1e0:	d9c1      	bls.n	802b166 <__hexnan+0x7a>
 802b1e2:	2300      	movs	r3, #0
 802b1e4:	f844 3c04 	str.w	r3, [r4, #-4]
 802b1e8:	2501      	movs	r5, #1
 802b1ea:	3c04      	subs	r4, #4
 802b1ec:	6822      	ldr	r2, [r4, #0]
 802b1ee:	f000 000f 	and.w	r0, r0, #15
 802b1f2:	ea40 1002 	orr.w	r0, r0, r2, lsl #4
 802b1f6:	6020      	str	r0, [r4, #0]
 802b1f8:	e7b5      	b.n	802b166 <__hexnan+0x7a>
 802b1fa:	2508      	movs	r5, #8
 802b1fc:	e7b3      	b.n	802b166 <__hexnan+0x7a>
 802b1fe:	9b01      	ldr	r3, [sp, #4]
 802b200:	2b00      	cmp	r3, #0
 802b202:	d0dd      	beq.n	802b1c0 <__hexnan+0xd4>
 802b204:	f1c3 0320 	rsb	r3, r3, #32
 802b208:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802b20c:	40da      	lsrs	r2, r3
 802b20e:	f856 3c04 	ldr.w	r3, [r6, #-4]
 802b212:	4013      	ands	r3, r2
 802b214:	f846 3c04 	str.w	r3, [r6, #-4]
 802b218:	e7d2      	b.n	802b1c0 <__hexnan+0xd4>
 802b21a:	3f04      	subs	r7, #4
 802b21c:	e7d0      	b.n	802b1c0 <__hexnan+0xd4>
 802b21e:	2004      	movs	r0, #4
 802b220:	e7d5      	b.n	802b1ce <__hexnan+0xe2>

0802b222 <__ascii_mbtowc>:
 802b222:	b082      	sub	sp, #8
 802b224:	b901      	cbnz	r1, 802b228 <__ascii_mbtowc+0x6>
 802b226:	a901      	add	r1, sp, #4
 802b228:	b142      	cbz	r2, 802b23c <__ascii_mbtowc+0x1a>
 802b22a:	b14b      	cbz	r3, 802b240 <__ascii_mbtowc+0x1e>
 802b22c:	7813      	ldrb	r3, [r2, #0]
 802b22e:	600b      	str	r3, [r1, #0]
 802b230:	7812      	ldrb	r2, [r2, #0]
 802b232:	1e10      	subs	r0, r2, #0
 802b234:	bf18      	it	ne
 802b236:	2001      	movne	r0, #1
 802b238:	b002      	add	sp, #8
 802b23a:	4770      	bx	lr
 802b23c:	4610      	mov	r0, r2
 802b23e:	e7fb      	b.n	802b238 <__ascii_mbtowc+0x16>
 802b240:	f06f 0001 	mvn.w	r0, #1
 802b244:	e7f8      	b.n	802b238 <__ascii_mbtowc+0x16>
	...

0802b248 <_Balloc>:
 802b248:	b570      	push	{r4, r5, r6, lr}
 802b24a:	69c6      	ldr	r6, [r0, #28]
 802b24c:	4604      	mov	r4, r0
 802b24e:	460d      	mov	r5, r1
 802b250:	b976      	cbnz	r6, 802b270 <_Balloc+0x28>
 802b252:	2010      	movs	r0, #16
 802b254:	f7fc ffda 	bl	802820c <malloc>
 802b258:	4602      	mov	r2, r0
 802b25a:	61e0      	str	r0, [r4, #28]
 802b25c:	b920      	cbnz	r0, 802b268 <_Balloc+0x20>
 802b25e:	4b18      	ldr	r3, [pc, #96]	@ (802b2c0 <_Balloc+0x78>)
 802b260:	4818      	ldr	r0, [pc, #96]	@ (802b2c4 <_Balloc+0x7c>)
 802b262:	216b      	movs	r1, #107	@ 0x6b
 802b264:	f7fe fe5c 	bl	8029f20 <__assert_func>
 802b268:	e9c0 6601 	strd	r6, r6, [r0, #4]
 802b26c:	6006      	str	r6, [r0, #0]
 802b26e:	60c6      	str	r6, [r0, #12]
 802b270:	69e6      	ldr	r6, [r4, #28]
 802b272:	68f3      	ldr	r3, [r6, #12]
 802b274:	b183      	cbz	r3, 802b298 <_Balloc+0x50>
 802b276:	69e3      	ldr	r3, [r4, #28]
 802b278:	68db      	ldr	r3, [r3, #12]
 802b27a:	f853 0025 	ldr.w	r0, [r3, r5, lsl #2]
 802b27e:	b9b8      	cbnz	r0, 802b2b0 <_Balloc+0x68>
 802b280:	2101      	movs	r1, #1
 802b282:	fa01 f605 	lsl.w	r6, r1, r5
 802b286:	1d72      	adds	r2, r6, #5
 802b288:	0092      	lsls	r2, r2, #2
 802b28a:	4620      	mov	r0, r4
 802b28c:	f001 f883 	bl	802c396 <_calloc_r>
 802b290:	b160      	cbz	r0, 802b2ac <_Balloc+0x64>
 802b292:	e9c0 5601 	strd	r5, r6, [r0, #4]
 802b296:	e00e      	b.n	802b2b6 <_Balloc+0x6e>
 802b298:	2221      	movs	r2, #33	@ 0x21
 802b29a:	2104      	movs	r1, #4
 802b29c:	4620      	mov	r0, r4
 802b29e:	f001 f87a 	bl	802c396 <_calloc_r>
 802b2a2:	69e3      	ldr	r3, [r4, #28]
 802b2a4:	60f0      	str	r0, [r6, #12]
 802b2a6:	68db      	ldr	r3, [r3, #12]
 802b2a8:	2b00      	cmp	r3, #0
 802b2aa:	d1e4      	bne.n	802b276 <_Balloc+0x2e>
 802b2ac:	2000      	movs	r0, #0
 802b2ae:	bd70      	pop	{r4, r5, r6, pc}
 802b2b0:	6802      	ldr	r2, [r0, #0]
 802b2b2:	f843 2025 	str.w	r2, [r3, r5, lsl #2]
 802b2b6:	2300      	movs	r3, #0
 802b2b8:	e9c0 3303 	strd	r3, r3, [r0, #12]
 802b2bc:	e7f7      	b.n	802b2ae <_Balloc+0x66>
 802b2be:	bf00      	nop
 802b2c0:	08030c7e 	.word	0x08030c7e
 802b2c4:	08030f8f 	.word	0x08030f8f

0802b2c8 <_Bfree>:
 802b2c8:	b570      	push	{r4, r5, r6, lr}
 802b2ca:	69c6      	ldr	r6, [r0, #28]
 802b2cc:	4605      	mov	r5, r0
 802b2ce:	460c      	mov	r4, r1
 802b2d0:	b976      	cbnz	r6, 802b2f0 <_Bfree+0x28>
 802b2d2:	2010      	movs	r0, #16
 802b2d4:	f7fc ff9a 	bl	802820c <malloc>
 802b2d8:	4602      	mov	r2, r0
 802b2da:	61e8      	str	r0, [r5, #28]
 802b2dc:	b920      	cbnz	r0, 802b2e8 <_Bfree+0x20>
 802b2de:	4b09      	ldr	r3, [pc, #36]	@ (802b304 <_Bfree+0x3c>)
 802b2e0:	4809      	ldr	r0, [pc, #36]	@ (802b308 <_Bfree+0x40>)
 802b2e2:	218f      	movs	r1, #143	@ 0x8f
 802b2e4:	f7fe fe1c 	bl	8029f20 <__assert_func>
 802b2e8:	e9c0 6601 	strd	r6, r6, [r0, #4]
 802b2ec:	6006      	str	r6, [r0, #0]
 802b2ee:	60c6      	str	r6, [r0, #12]
 802b2f0:	b13c      	cbz	r4, 802b302 <_Bfree+0x3a>
 802b2f2:	69eb      	ldr	r3, [r5, #28]
 802b2f4:	6862      	ldr	r2, [r4, #4]
 802b2f6:	68db      	ldr	r3, [r3, #12]
 802b2f8:	f853 1022 	ldr.w	r1, [r3, r2, lsl #2]
 802b2fc:	6021      	str	r1, [r4, #0]
 802b2fe:	f843 4022 	str.w	r4, [r3, r2, lsl #2]
 802b302:	bd70      	pop	{r4, r5, r6, pc}
 802b304:	08030c7e 	.word	0x08030c7e
 802b308:	08030f8f 	.word	0x08030f8f

0802b30c <__multadd>:
 802b30c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802b310:	690d      	ldr	r5, [r1, #16]
 802b312:	4607      	mov	r7, r0
 802b314:	460c      	mov	r4, r1
 802b316:	461e      	mov	r6, r3
 802b318:	f101 0c14 	add.w	ip, r1, #20
 802b31c:	2000      	movs	r0, #0
 802b31e:	f8dc 3000 	ldr.w	r3, [ip]
 802b322:	b299      	uxth	r1, r3
 802b324:	fb02 6101 	mla	r1, r2, r1, r6
 802b328:	0c1e      	lsrs	r6, r3, #16
 802b32a:	0c0b      	lsrs	r3, r1, #16
 802b32c:	fb02 3306 	mla	r3, r2, r6, r3
 802b330:	b289      	uxth	r1, r1
 802b332:	3001      	adds	r0, #1
 802b334:	eb01 4103 	add.w	r1, r1, r3, lsl #16
 802b338:	4285      	cmp	r5, r0
 802b33a:	f84c 1b04 	str.w	r1, [ip], #4
 802b33e:	ea4f 4613 	mov.w	r6, r3, lsr #16
 802b342:	dcec      	bgt.n	802b31e <__multadd+0x12>
 802b344:	b30e      	cbz	r6, 802b38a <__multadd+0x7e>
 802b346:	68a3      	ldr	r3, [r4, #8]
 802b348:	42ab      	cmp	r3, r5
 802b34a:	dc19      	bgt.n	802b380 <__multadd+0x74>
 802b34c:	6861      	ldr	r1, [r4, #4]
 802b34e:	4638      	mov	r0, r7
 802b350:	3101      	adds	r1, #1
 802b352:	f7ff ff79 	bl	802b248 <_Balloc>
 802b356:	4680      	mov	r8, r0
 802b358:	b928      	cbnz	r0, 802b366 <__multadd+0x5a>
 802b35a:	4602      	mov	r2, r0
 802b35c:	4b0c      	ldr	r3, [pc, #48]	@ (802b390 <__multadd+0x84>)
 802b35e:	480d      	ldr	r0, [pc, #52]	@ (802b394 <__multadd+0x88>)
 802b360:	21ba      	movs	r1, #186	@ 0xba
 802b362:	f7fe fddd 	bl	8029f20 <__assert_func>
 802b366:	6922      	ldr	r2, [r4, #16]
 802b368:	3202      	adds	r2, #2
 802b36a:	f104 010c 	add.w	r1, r4, #12
 802b36e:	0092      	lsls	r2, r2, #2
 802b370:	300c      	adds	r0, #12
 802b372:	f7fe fdbc 	bl	8029eee <memcpy>
 802b376:	4621      	mov	r1, r4
 802b378:	4638      	mov	r0, r7
 802b37a:	f7ff ffa5 	bl	802b2c8 <_Bfree>
 802b37e:	4644      	mov	r4, r8
 802b380:	eb04 0385 	add.w	r3, r4, r5, lsl #2
 802b384:	3501      	adds	r5, #1
 802b386:	615e      	str	r6, [r3, #20]
 802b388:	6125      	str	r5, [r4, #16]
 802b38a:	4620      	mov	r0, r4
 802b38c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802b390:	08030f1e 	.word	0x08030f1e
 802b394:	08030f8f 	.word	0x08030f8f

0802b398 <__s2b>:
 802b398:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 802b39c:	460c      	mov	r4, r1
 802b39e:	4615      	mov	r5, r2
 802b3a0:	461f      	mov	r7, r3
 802b3a2:	2209      	movs	r2, #9
 802b3a4:	3308      	adds	r3, #8
 802b3a6:	4606      	mov	r6, r0
 802b3a8:	fb93 f3f2 	sdiv	r3, r3, r2
 802b3ac:	2100      	movs	r1, #0
 802b3ae:	2201      	movs	r2, #1
 802b3b0:	429a      	cmp	r2, r3
 802b3b2:	db09      	blt.n	802b3c8 <__s2b+0x30>
 802b3b4:	4630      	mov	r0, r6
 802b3b6:	f7ff ff47 	bl	802b248 <_Balloc>
 802b3ba:	b940      	cbnz	r0, 802b3ce <__s2b+0x36>
 802b3bc:	4602      	mov	r2, r0
 802b3be:	4b19      	ldr	r3, [pc, #100]	@ (802b424 <__s2b+0x8c>)
 802b3c0:	4819      	ldr	r0, [pc, #100]	@ (802b428 <__s2b+0x90>)
 802b3c2:	21d3      	movs	r1, #211	@ 0xd3
 802b3c4:	f7fe fdac 	bl	8029f20 <__assert_func>
 802b3c8:	0052      	lsls	r2, r2, #1
 802b3ca:	3101      	adds	r1, #1
 802b3cc:	e7f0      	b.n	802b3b0 <__s2b+0x18>
 802b3ce:	9b08      	ldr	r3, [sp, #32]
 802b3d0:	6143      	str	r3, [r0, #20]
 802b3d2:	2d09      	cmp	r5, #9
 802b3d4:	f04f 0301 	mov.w	r3, #1
 802b3d8:	6103      	str	r3, [r0, #16]
 802b3da:	dd16      	ble.n	802b40a <__s2b+0x72>
 802b3dc:	f104 0909 	add.w	r9, r4, #9
 802b3e0:	46c8      	mov	r8, r9
 802b3e2:	442c      	add	r4, r5
 802b3e4:	f818 3b01 	ldrb.w	r3, [r8], #1
 802b3e8:	4601      	mov	r1, r0
 802b3ea:	3b30      	subs	r3, #48	@ 0x30
 802b3ec:	220a      	movs	r2, #10
 802b3ee:	4630      	mov	r0, r6
 802b3f0:	f7ff ff8c 	bl	802b30c <__multadd>
 802b3f4:	45a0      	cmp	r8, r4
 802b3f6:	d1f5      	bne.n	802b3e4 <__s2b+0x4c>
 802b3f8:	f1a5 0408 	sub.w	r4, r5, #8
 802b3fc:	444c      	add	r4, r9
 802b3fe:	1b2d      	subs	r5, r5, r4
 802b400:	1963      	adds	r3, r4, r5
 802b402:	42bb      	cmp	r3, r7
 802b404:	db04      	blt.n	802b410 <__s2b+0x78>
 802b406:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 802b40a:	340a      	adds	r4, #10
 802b40c:	2509      	movs	r5, #9
 802b40e:	e7f6      	b.n	802b3fe <__s2b+0x66>
 802b410:	f814 3b01 	ldrb.w	r3, [r4], #1
 802b414:	4601      	mov	r1, r0
 802b416:	3b30      	subs	r3, #48	@ 0x30
 802b418:	220a      	movs	r2, #10
 802b41a:	4630      	mov	r0, r6
 802b41c:	f7ff ff76 	bl	802b30c <__multadd>
 802b420:	e7ee      	b.n	802b400 <__s2b+0x68>
 802b422:	bf00      	nop
 802b424:	08030f1e 	.word	0x08030f1e
 802b428:	08030f8f 	.word	0x08030f8f

0802b42c <__hi0bits>:
 802b42c:	f5b0 3f80 	cmp.w	r0, #65536	@ 0x10000
 802b430:	4603      	mov	r3, r0
 802b432:	bf36      	itet	cc
 802b434:	0403      	lslcc	r3, r0, #16
 802b436:	2000      	movcs	r0, #0
 802b438:	2010      	movcc	r0, #16
 802b43a:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 802b43e:	bf3c      	itt	cc
 802b440:	021b      	lslcc	r3, r3, #8
 802b442:	3008      	addcc	r0, #8
 802b444:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 802b448:	bf3c      	itt	cc
 802b44a:	011b      	lslcc	r3, r3, #4
 802b44c:	3004      	addcc	r0, #4
 802b44e:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 802b452:	bf3c      	itt	cc
 802b454:	009b      	lslcc	r3, r3, #2
 802b456:	3002      	addcc	r0, #2
 802b458:	2b00      	cmp	r3, #0
 802b45a:	db05      	blt.n	802b468 <__hi0bits+0x3c>
 802b45c:	f013 4f80 	tst.w	r3, #1073741824	@ 0x40000000
 802b460:	f100 0001 	add.w	r0, r0, #1
 802b464:	bf08      	it	eq
 802b466:	2020      	moveq	r0, #32
 802b468:	4770      	bx	lr

0802b46a <__lo0bits>:
 802b46a:	6803      	ldr	r3, [r0, #0]
 802b46c:	4602      	mov	r2, r0
 802b46e:	f013 0007 	ands.w	r0, r3, #7
 802b472:	d00b      	beq.n	802b48c <__lo0bits+0x22>
 802b474:	07d9      	lsls	r1, r3, #31
 802b476:	d421      	bmi.n	802b4bc <__lo0bits+0x52>
 802b478:	0798      	lsls	r0, r3, #30
 802b47a:	bf49      	itett	mi
 802b47c:	085b      	lsrmi	r3, r3, #1
 802b47e:	089b      	lsrpl	r3, r3, #2
 802b480:	2001      	movmi	r0, #1
 802b482:	6013      	strmi	r3, [r2, #0]
 802b484:	bf5c      	itt	pl
 802b486:	6013      	strpl	r3, [r2, #0]
 802b488:	2002      	movpl	r0, #2
 802b48a:	4770      	bx	lr
 802b48c:	b299      	uxth	r1, r3
 802b48e:	b909      	cbnz	r1, 802b494 <__lo0bits+0x2a>
 802b490:	0c1b      	lsrs	r3, r3, #16
 802b492:	2010      	movs	r0, #16
 802b494:	b2d9      	uxtb	r1, r3
 802b496:	b909      	cbnz	r1, 802b49c <__lo0bits+0x32>
 802b498:	3008      	adds	r0, #8
 802b49a:	0a1b      	lsrs	r3, r3, #8
 802b49c:	0719      	lsls	r1, r3, #28
 802b49e:	bf04      	itt	eq
 802b4a0:	091b      	lsreq	r3, r3, #4
 802b4a2:	3004      	addeq	r0, #4
 802b4a4:	0799      	lsls	r1, r3, #30
 802b4a6:	bf04      	itt	eq
 802b4a8:	089b      	lsreq	r3, r3, #2
 802b4aa:	3002      	addeq	r0, #2
 802b4ac:	07d9      	lsls	r1, r3, #31
 802b4ae:	d403      	bmi.n	802b4b8 <__lo0bits+0x4e>
 802b4b0:	085b      	lsrs	r3, r3, #1
 802b4b2:	f100 0001 	add.w	r0, r0, #1
 802b4b6:	d003      	beq.n	802b4c0 <__lo0bits+0x56>
 802b4b8:	6013      	str	r3, [r2, #0]
 802b4ba:	4770      	bx	lr
 802b4bc:	2000      	movs	r0, #0
 802b4be:	4770      	bx	lr
 802b4c0:	2020      	movs	r0, #32
 802b4c2:	4770      	bx	lr

0802b4c4 <__i2b>:
 802b4c4:	b510      	push	{r4, lr}
 802b4c6:	460c      	mov	r4, r1
 802b4c8:	2101      	movs	r1, #1
 802b4ca:	f7ff febd 	bl	802b248 <_Balloc>
 802b4ce:	4602      	mov	r2, r0
 802b4d0:	b928      	cbnz	r0, 802b4de <__i2b+0x1a>
 802b4d2:	4b05      	ldr	r3, [pc, #20]	@ (802b4e8 <__i2b+0x24>)
 802b4d4:	4805      	ldr	r0, [pc, #20]	@ (802b4ec <__i2b+0x28>)
 802b4d6:	f240 1145 	movw	r1, #325	@ 0x145
 802b4da:	f7fe fd21 	bl	8029f20 <__assert_func>
 802b4de:	2301      	movs	r3, #1
 802b4e0:	6144      	str	r4, [r0, #20]
 802b4e2:	6103      	str	r3, [r0, #16]
 802b4e4:	bd10      	pop	{r4, pc}
 802b4e6:	bf00      	nop
 802b4e8:	08030f1e 	.word	0x08030f1e
 802b4ec:	08030f8f 	.word	0x08030f8f

0802b4f0 <__multiply>:
 802b4f0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802b4f4:	4614      	mov	r4, r2
 802b4f6:	690a      	ldr	r2, [r1, #16]
 802b4f8:	6923      	ldr	r3, [r4, #16]
 802b4fa:	429a      	cmp	r2, r3
 802b4fc:	bfa8      	it	ge
 802b4fe:	4623      	movge	r3, r4
 802b500:	460f      	mov	r7, r1
 802b502:	bfa4      	itt	ge
 802b504:	460c      	movge	r4, r1
 802b506:	461f      	movge	r7, r3
 802b508:	f8d4 a010 	ldr.w	sl, [r4, #16]
 802b50c:	f8d7 9010 	ldr.w	r9, [r7, #16]
 802b510:	68a3      	ldr	r3, [r4, #8]
 802b512:	6861      	ldr	r1, [r4, #4]
 802b514:	eb0a 0609 	add.w	r6, sl, r9
 802b518:	42b3      	cmp	r3, r6
 802b51a:	b085      	sub	sp, #20
 802b51c:	bfb8      	it	lt
 802b51e:	3101      	addlt	r1, #1
 802b520:	f7ff fe92 	bl	802b248 <_Balloc>
 802b524:	b930      	cbnz	r0, 802b534 <__multiply+0x44>
 802b526:	4602      	mov	r2, r0
 802b528:	4b44      	ldr	r3, [pc, #272]	@ (802b63c <__multiply+0x14c>)
 802b52a:	4845      	ldr	r0, [pc, #276]	@ (802b640 <__multiply+0x150>)
 802b52c:	f44f 71b1 	mov.w	r1, #354	@ 0x162
 802b530:	f7fe fcf6 	bl	8029f20 <__assert_func>
 802b534:	f100 0514 	add.w	r5, r0, #20
 802b538:	eb05 0886 	add.w	r8, r5, r6, lsl #2
 802b53c:	462b      	mov	r3, r5
 802b53e:	2200      	movs	r2, #0
 802b540:	4543      	cmp	r3, r8
 802b542:	d321      	bcc.n	802b588 <__multiply+0x98>
 802b544:	f107 0114 	add.w	r1, r7, #20
 802b548:	f104 0214 	add.w	r2, r4, #20
 802b54c:	eb02 028a 	add.w	r2, r2, sl, lsl #2
 802b550:	eb01 0389 	add.w	r3, r1, r9, lsl #2
 802b554:	9302      	str	r3, [sp, #8]
 802b556:	1b13      	subs	r3, r2, r4
 802b558:	3b15      	subs	r3, #21
 802b55a:	f023 0303 	bic.w	r3, r3, #3
 802b55e:	3304      	adds	r3, #4
 802b560:	f104 0715 	add.w	r7, r4, #21
 802b564:	42ba      	cmp	r2, r7
 802b566:	bf38      	it	cc
 802b568:	2304      	movcc	r3, #4
 802b56a:	9301      	str	r3, [sp, #4]
 802b56c:	9b02      	ldr	r3, [sp, #8]
 802b56e:	9103      	str	r1, [sp, #12]
 802b570:	428b      	cmp	r3, r1
 802b572:	d80c      	bhi.n	802b58e <__multiply+0x9e>
 802b574:	2e00      	cmp	r6, #0
 802b576:	dd03      	ble.n	802b580 <__multiply+0x90>
 802b578:	f858 3d04 	ldr.w	r3, [r8, #-4]!
 802b57c:	2b00      	cmp	r3, #0
 802b57e:	d05b      	beq.n	802b638 <__multiply+0x148>
 802b580:	6106      	str	r6, [r0, #16]
 802b582:	b005      	add	sp, #20
 802b584:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802b588:	f843 2b04 	str.w	r2, [r3], #4
 802b58c:	e7d8      	b.n	802b540 <__multiply+0x50>
 802b58e:	f8b1 a000 	ldrh.w	sl, [r1]
 802b592:	f1ba 0f00 	cmp.w	sl, #0
 802b596:	d024      	beq.n	802b5e2 <__multiply+0xf2>
 802b598:	f104 0e14 	add.w	lr, r4, #20
 802b59c:	46a9      	mov	r9, r5
 802b59e:	f04f 0c00 	mov.w	ip, #0
 802b5a2:	f85e 7b04 	ldr.w	r7, [lr], #4
 802b5a6:	f8d9 3000 	ldr.w	r3, [r9]
 802b5aa:	fa1f fb87 	uxth.w	fp, r7
 802b5ae:	b29b      	uxth	r3, r3
 802b5b0:	fb0a 330b 	mla	r3, sl, fp, r3
 802b5b4:	ea4f 4b17 	mov.w	fp, r7, lsr #16
 802b5b8:	f8d9 7000 	ldr.w	r7, [r9]
 802b5bc:	4463      	add	r3, ip
 802b5be:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 802b5c2:	fb0a c70b 	mla	r7, sl, fp, ip
 802b5c6:	eb07 4713 	add.w	r7, r7, r3, lsr #16
 802b5ca:	b29b      	uxth	r3, r3
 802b5cc:	ea43 4307 	orr.w	r3, r3, r7, lsl #16
 802b5d0:	4572      	cmp	r2, lr
 802b5d2:	f849 3b04 	str.w	r3, [r9], #4
 802b5d6:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 802b5da:	d8e2      	bhi.n	802b5a2 <__multiply+0xb2>
 802b5dc:	9b01      	ldr	r3, [sp, #4]
 802b5de:	f845 c003 	str.w	ip, [r5, r3]
 802b5e2:	9b03      	ldr	r3, [sp, #12]
 802b5e4:	f8b3 9002 	ldrh.w	r9, [r3, #2]
 802b5e8:	3104      	adds	r1, #4
 802b5ea:	f1b9 0f00 	cmp.w	r9, #0
 802b5ee:	d021      	beq.n	802b634 <__multiply+0x144>
 802b5f0:	682b      	ldr	r3, [r5, #0]
 802b5f2:	f104 0c14 	add.w	ip, r4, #20
 802b5f6:	46ae      	mov	lr, r5
 802b5f8:	f04f 0a00 	mov.w	sl, #0
 802b5fc:	f8bc b000 	ldrh.w	fp, [ip]
 802b600:	f8be 7002 	ldrh.w	r7, [lr, #2]
 802b604:	fb09 770b 	mla	r7, r9, fp, r7
 802b608:	4457      	add	r7, sl
 802b60a:	b29b      	uxth	r3, r3
 802b60c:	ea43 4307 	orr.w	r3, r3, r7, lsl #16
 802b610:	f84e 3b04 	str.w	r3, [lr], #4
 802b614:	f85c 3b04 	ldr.w	r3, [ip], #4
 802b618:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 802b61c:	f8be 3000 	ldrh.w	r3, [lr]
 802b620:	fb09 330a 	mla	r3, r9, sl, r3
 802b624:	eb03 4317 	add.w	r3, r3, r7, lsr #16
 802b628:	4562      	cmp	r2, ip
 802b62a:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 802b62e:	d8e5      	bhi.n	802b5fc <__multiply+0x10c>
 802b630:	9f01      	ldr	r7, [sp, #4]
 802b632:	51eb      	str	r3, [r5, r7]
 802b634:	3504      	adds	r5, #4
 802b636:	e799      	b.n	802b56c <__multiply+0x7c>
 802b638:	3e01      	subs	r6, #1
 802b63a:	e79b      	b.n	802b574 <__multiply+0x84>
 802b63c:	08030f1e 	.word	0x08030f1e
 802b640:	08030f8f 	.word	0x08030f8f

0802b644 <__pow5mult>:
 802b644:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 802b648:	4615      	mov	r5, r2
 802b64a:	f012 0203 	ands.w	r2, r2, #3
 802b64e:	4607      	mov	r7, r0
 802b650:	460e      	mov	r6, r1
 802b652:	d007      	beq.n	802b664 <__pow5mult+0x20>
 802b654:	4c25      	ldr	r4, [pc, #148]	@ (802b6ec <__pow5mult+0xa8>)
 802b656:	3a01      	subs	r2, #1
 802b658:	2300      	movs	r3, #0
 802b65a:	f854 2022 	ldr.w	r2, [r4, r2, lsl #2]
 802b65e:	f7ff fe55 	bl	802b30c <__multadd>
 802b662:	4606      	mov	r6, r0
 802b664:	10ad      	asrs	r5, r5, #2
 802b666:	d03d      	beq.n	802b6e4 <__pow5mult+0xa0>
 802b668:	69fc      	ldr	r4, [r7, #28]
 802b66a:	b97c      	cbnz	r4, 802b68c <__pow5mult+0x48>
 802b66c:	2010      	movs	r0, #16
 802b66e:	f7fc fdcd 	bl	802820c <malloc>
 802b672:	4602      	mov	r2, r0
 802b674:	61f8      	str	r0, [r7, #28]
 802b676:	b928      	cbnz	r0, 802b684 <__pow5mult+0x40>
 802b678:	4b1d      	ldr	r3, [pc, #116]	@ (802b6f0 <__pow5mult+0xac>)
 802b67a:	481e      	ldr	r0, [pc, #120]	@ (802b6f4 <__pow5mult+0xb0>)
 802b67c:	f240 11b3 	movw	r1, #435	@ 0x1b3
 802b680:	f7fe fc4e 	bl	8029f20 <__assert_func>
 802b684:	e9c0 4401 	strd	r4, r4, [r0, #4]
 802b688:	6004      	str	r4, [r0, #0]
 802b68a:	60c4      	str	r4, [r0, #12]
 802b68c:	f8d7 801c 	ldr.w	r8, [r7, #28]
 802b690:	f8d8 4008 	ldr.w	r4, [r8, #8]
 802b694:	b94c      	cbnz	r4, 802b6aa <__pow5mult+0x66>
 802b696:	f240 2171 	movw	r1, #625	@ 0x271
 802b69a:	4638      	mov	r0, r7
 802b69c:	f7ff ff12 	bl	802b4c4 <__i2b>
 802b6a0:	2300      	movs	r3, #0
 802b6a2:	f8c8 0008 	str.w	r0, [r8, #8]
 802b6a6:	4604      	mov	r4, r0
 802b6a8:	6003      	str	r3, [r0, #0]
 802b6aa:	f04f 0900 	mov.w	r9, #0
 802b6ae:	07eb      	lsls	r3, r5, #31
 802b6b0:	d50a      	bpl.n	802b6c8 <__pow5mult+0x84>
 802b6b2:	4631      	mov	r1, r6
 802b6b4:	4622      	mov	r2, r4
 802b6b6:	4638      	mov	r0, r7
 802b6b8:	f7ff ff1a 	bl	802b4f0 <__multiply>
 802b6bc:	4631      	mov	r1, r6
 802b6be:	4680      	mov	r8, r0
 802b6c0:	4638      	mov	r0, r7
 802b6c2:	f7ff fe01 	bl	802b2c8 <_Bfree>
 802b6c6:	4646      	mov	r6, r8
 802b6c8:	106d      	asrs	r5, r5, #1
 802b6ca:	d00b      	beq.n	802b6e4 <__pow5mult+0xa0>
 802b6cc:	6820      	ldr	r0, [r4, #0]
 802b6ce:	b938      	cbnz	r0, 802b6e0 <__pow5mult+0x9c>
 802b6d0:	4622      	mov	r2, r4
 802b6d2:	4621      	mov	r1, r4
 802b6d4:	4638      	mov	r0, r7
 802b6d6:	f7ff ff0b 	bl	802b4f0 <__multiply>
 802b6da:	6020      	str	r0, [r4, #0]
 802b6dc:	f8c0 9000 	str.w	r9, [r0]
 802b6e0:	4604      	mov	r4, r0
 802b6e2:	e7e4      	b.n	802b6ae <__pow5mult+0x6a>
 802b6e4:	4630      	mov	r0, r6
 802b6e6:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 802b6ea:	bf00      	nop
 802b6ec:	08030fe8 	.word	0x08030fe8
 802b6f0:	08030c7e 	.word	0x08030c7e
 802b6f4:	08030f8f 	.word	0x08030f8f

0802b6f8 <__lshift>:
 802b6f8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 802b6fc:	460c      	mov	r4, r1
 802b6fe:	6849      	ldr	r1, [r1, #4]
 802b700:	6923      	ldr	r3, [r4, #16]
 802b702:	eb03 1862 	add.w	r8, r3, r2, asr #5
 802b706:	68a3      	ldr	r3, [r4, #8]
 802b708:	4607      	mov	r7, r0
 802b70a:	4691      	mov	r9, r2
 802b70c:	ea4f 1a62 	mov.w	sl, r2, asr #5
 802b710:	f108 0601 	add.w	r6, r8, #1
 802b714:	42b3      	cmp	r3, r6
 802b716:	db0b      	blt.n	802b730 <__lshift+0x38>
 802b718:	4638      	mov	r0, r7
 802b71a:	f7ff fd95 	bl	802b248 <_Balloc>
 802b71e:	4605      	mov	r5, r0
 802b720:	b948      	cbnz	r0, 802b736 <__lshift+0x3e>
 802b722:	4602      	mov	r2, r0
 802b724:	4b28      	ldr	r3, [pc, #160]	@ (802b7c8 <__lshift+0xd0>)
 802b726:	4829      	ldr	r0, [pc, #164]	@ (802b7cc <__lshift+0xd4>)
 802b728:	f44f 71ef 	mov.w	r1, #478	@ 0x1de
 802b72c:	f7fe fbf8 	bl	8029f20 <__assert_func>
 802b730:	3101      	adds	r1, #1
 802b732:	005b      	lsls	r3, r3, #1
 802b734:	e7ee      	b.n	802b714 <__lshift+0x1c>
 802b736:	2300      	movs	r3, #0
 802b738:	f100 0114 	add.w	r1, r0, #20
 802b73c:	f100 0210 	add.w	r2, r0, #16
 802b740:	4618      	mov	r0, r3
 802b742:	4553      	cmp	r3, sl
 802b744:	db33      	blt.n	802b7ae <__lshift+0xb6>
 802b746:	6920      	ldr	r0, [r4, #16]
 802b748:	ea2a 7aea 	bic.w	sl, sl, sl, asr #31
 802b74c:	f104 0314 	add.w	r3, r4, #20
 802b750:	f019 091f 	ands.w	r9, r9, #31
 802b754:	eb01 018a 	add.w	r1, r1, sl, lsl #2
 802b758:	eb03 0c80 	add.w	ip, r3, r0, lsl #2
 802b75c:	d02b      	beq.n	802b7b6 <__lshift+0xbe>
 802b75e:	f1c9 0e20 	rsb	lr, r9, #32
 802b762:	468a      	mov	sl, r1
 802b764:	2200      	movs	r2, #0
 802b766:	6818      	ldr	r0, [r3, #0]
 802b768:	fa00 f009 	lsl.w	r0, r0, r9
 802b76c:	4310      	orrs	r0, r2
 802b76e:	f84a 0b04 	str.w	r0, [sl], #4
 802b772:	f853 2b04 	ldr.w	r2, [r3], #4
 802b776:	459c      	cmp	ip, r3
 802b778:	fa22 f20e 	lsr.w	r2, r2, lr
 802b77c:	d8f3      	bhi.n	802b766 <__lshift+0x6e>
 802b77e:	ebac 0304 	sub.w	r3, ip, r4
 802b782:	3b15      	subs	r3, #21
 802b784:	f023 0303 	bic.w	r3, r3, #3
 802b788:	3304      	adds	r3, #4
 802b78a:	f104 0015 	add.w	r0, r4, #21
 802b78e:	4584      	cmp	ip, r0
 802b790:	bf38      	it	cc
 802b792:	2304      	movcc	r3, #4
 802b794:	50ca      	str	r2, [r1, r3]
 802b796:	b10a      	cbz	r2, 802b79c <__lshift+0xa4>
 802b798:	f108 0602 	add.w	r6, r8, #2
 802b79c:	3e01      	subs	r6, #1
 802b79e:	4638      	mov	r0, r7
 802b7a0:	612e      	str	r6, [r5, #16]
 802b7a2:	4621      	mov	r1, r4
 802b7a4:	f7ff fd90 	bl	802b2c8 <_Bfree>
 802b7a8:	4628      	mov	r0, r5
 802b7aa:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802b7ae:	f842 0f04 	str.w	r0, [r2, #4]!
 802b7b2:	3301      	adds	r3, #1
 802b7b4:	e7c5      	b.n	802b742 <__lshift+0x4a>
 802b7b6:	3904      	subs	r1, #4
 802b7b8:	f853 2b04 	ldr.w	r2, [r3], #4
 802b7bc:	f841 2f04 	str.w	r2, [r1, #4]!
 802b7c0:	459c      	cmp	ip, r3
 802b7c2:	d8f9      	bhi.n	802b7b8 <__lshift+0xc0>
 802b7c4:	e7ea      	b.n	802b79c <__lshift+0xa4>
 802b7c6:	bf00      	nop
 802b7c8:	08030f1e 	.word	0x08030f1e
 802b7cc:	08030f8f 	.word	0x08030f8f

0802b7d0 <__mcmp>:
 802b7d0:	690a      	ldr	r2, [r1, #16]
 802b7d2:	4603      	mov	r3, r0
 802b7d4:	6900      	ldr	r0, [r0, #16]
 802b7d6:	1a80      	subs	r0, r0, r2
 802b7d8:	b530      	push	{r4, r5, lr}
 802b7da:	d10e      	bne.n	802b7fa <__mcmp+0x2a>
 802b7dc:	3314      	adds	r3, #20
 802b7de:	3114      	adds	r1, #20
 802b7e0:	eb03 0482 	add.w	r4, r3, r2, lsl #2
 802b7e4:	eb01 0182 	add.w	r1, r1, r2, lsl #2
 802b7e8:	f854 5d04 	ldr.w	r5, [r4, #-4]!
 802b7ec:	f851 2d04 	ldr.w	r2, [r1, #-4]!
 802b7f0:	4295      	cmp	r5, r2
 802b7f2:	d003      	beq.n	802b7fc <__mcmp+0x2c>
 802b7f4:	d205      	bcs.n	802b802 <__mcmp+0x32>
 802b7f6:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802b7fa:	bd30      	pop	{r4, r5, pc}
 802b7fc:	42a3      	cmp	r3, r4
 802b7fe:	d3f3      	bcc.n	802b7e8 <__mcmp+0x18>
 802b800:	e7fb      	b.n	802b7fa <__mcmp+0x2a>
 802b802:	2001      	movs	r0, #1
 802b804:	e7f9      	b.n	802b7fa <__mcmp+0x2a>
	...

0802b808 <__mdiff>:
 802b808:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802b80c:	4689      	mov	r9, r1
 802b80e:	4606      	mov	r6, r0
 802b810:	4611      	mov	r1, r2
 802b812:	4648      	mov	r0, r9
 802b814:	4614      	mov	r4, r2
 802b816:	f7ff ffdb 	bl	802b7d0 <__mcmp>
 802b81a:	1e05      	subs	r5, r0, #0
 802b81c:	d112      	bne.n	802b844 <__mdiff+0x3c>
 802b81e:	4629      	mov	r1, r5
 802b820:	4630      	mov	r0, r6
 802b822:	f7ff fd11 	bl	802b248 <_Balloc>
 802b826:	4602      	mov	r2, r0
 802b828:	b928      	cbnz	r0, 802b836 <__mdiff+0x2e>
 802b82a:	4b3f      	ldr	r3, [pc, #252]	@ (802b928 <__mdiff+0x120>)
 802b82c:	f240 2137 	movw	r1, #567	@ 0x237
 802b830:	483e      	ldr	r0, [pc, #248]	@ (802b92c <__mdiff+0x124>)
 802b832:	f7fe fb75 	bl	8029f20 <__assert_func>
 802b836:	2301      	movs	r3, #1
 802b838:	e9c0 3504 	strd	r3, r5, [r0, #16]
 802b83c:	4610      	mov	r0, r2
 802b83e:	b003      	add	sp, #12
 802b840:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802b844:	bfbc      	itt	lt
 802b846:	464b      	movlt	r3, r9
 802b848:	46a1      	movlt	r9, r4
 802b84a:	4630      	mov	r0, r6
 802b84c:	f8d9 1004 	ldr.w	r1, [r9, #4]
 802b850:	bfba      	itte	lt
 802b852:	461c      	movlt	r4, r3
 802b854:	2501      	movlt	r5, #1
 802b856:	2500      	movge	r5, #0
 802b858:	f7ff fcf6 	bl	802b248 <_Balloc>
 802b85c:	4602      	mov	r2, r0
 802b85e:	b918      	cbnz	r0, 802b868 <__mdiff+0x60>
 802b860:	4b31      	ldr	r3, [pc, #196]	@ (802b928 <__mdiff+0x120>)
 802b862:	f240 2145 	movw	r1, #581	@ 0x245
 802b866:	e7e3      	b.n	802b830 <__mdiff+0x28>
 802b868:	f8d9 7010 	ldr.w	r7, [r9, #16]
 802b86c:	6926      	ldr	r6, [r4, #16]
 802b86e:	60c5      	str	r5, [r0, #12]
 802b870:	f109 0310 	add.w	r3, r9, #16
 802b874:	f109 0514 	add.w	r5, r9, #20
 802b878:	f104 0e14 	add.w	lr, r4, #20
 802b87c:	f100 0b14 	add.w	fp, r0, #20
 802b880:	eb05 0887 	add.w	r8, r5, r7, lsl #2
 802b884:	eb0e 0686 	add.w	r6, lr, r6, lsl #2
 802b888:	9301      	str	r3, [sp, #4]
 802b88a:	46d9      	mov	r9, fp
 802b88c:	f04f 0c00 	mov.w	ip, #0
 802b890:	9b01      	ldr	r3, [sp, #4]
 802b892:	f85e 0b04 	ldr.w	r0, [lr], #4
 802b896:	f853 af04 	ldr.w	sl, [r3, #4]!
 802b89a:	9301      	str	r3, [sp, #4]
 802b89c:	fa1f f38a 	uxth.w	r3, sl
 802b8a0:	4619      	mov	r1, r3
 802b8a2:	b283      	uxth	r3, r0
 802b8a4:	1acb      	subs	r3, r1, r3
 802b8a6:	0c00      	lsrs	r0, r0, #16
 802b8a8:	4463      	add	r3, ip
 802b8aa:	ebc0 401a 	rsb	r0, r0, sl, lsr #16
 802b8ae:	eb00 4023 	add.w	r0, r0, r3, asr #16
 802b8b2:	b29b      	uxth	r3, r3
 802b8b4:	ea43 4300 	orr.w	r3, r3, r0, lsl #16
 802b8b8:	4576      	cmp	r6, lr
 802b8ba:	f849 3b04 	str.w	r3, [r9], #4
 802b8be:	ea4f 4c20 	mov.w	ip, r0, asr #16
 802b8c2:	d8e5      	bhi.n	802b890 <__mdiff+0x88>
 802b8c4:	1b33      	subs	r3, r6, r4
 802b8c6:	3b15      	subs	r3, #21
 802b8c8:	f023 0303 	bic.w	r3, r3, #3
 802b8cc:	3415      	adds	r4, #21
 802b8ce:	3304      	adds	r3, #4
 802b8d0:	42a6      	cmp	r6, r4
 802b8d2:	bf38      	it	cc
 802b8d4:	2304      	movcc	r3, #4
 802b8d6:	441d      	add	r5, r3
 802b8d8:	445b      	add	r3, fp
 802b8da:	461e      	mov	r6, r3
 802b8dc:	462c      	mov	r4, r5
 802b8de:	4544      	cmp	r4, r8
 802b8e0:	d30e      	bcc.n	802b900 <__mdiff+0xf8>
 802b8e2:	f108 0103 	add.w	r1, r8, #3
 802b8e6:	1b49      	subs	r1, r1, r5
 802b8e8:	f021 0103 	bic.w	r1, r1, #3
 802b8ec:	3d03      	subs	r5, #3
 802b8ee:	45a8      	cmp	r8, r5
 802b8f0:	bf38      	it	cc
 802b8f2:	2100      	movcc	r1, #0
 802b8f4:	440b      	add	r3, r1
 802b8f6:	f853 1d04 	ldr.w	r1, [r3, #-4]!
 802b8fa:	b191      	cbz	r1, 802b922 <__mdiff+0x11a>
 802b8fc:	6117      	str	r7, [r2, #16]
 802b8fe:	e79d      	b.n	802b83c <__mdiff+0x34>
 802b900:	f854 1b04 	ldr.w	r1, [r4], #4
 802b904:	46e6      	mov	lr, ip
 802b906:	0c08      	lsrs	r0, r1, #16
 802b908:	fa1c fc81 	uxtah	ip, ip, r1
 802b90c:	4471      	add	r1, lr
 802b90e:	eb00 402c 	add.w	r0, r0, ip, asr #16
 802b912:	b289      	uxth	r1, r1
 802b914:	ea41 4100 	orr.w	r1, r1, r0, lsl #16
 802b918:	f846 1b04 	str.w	r1, [r6], #4
 802b91c:	ea4f 4c20 	mov.w	ip, r0, asr #16
 802b920:	e7dd      	b.n	802b8de <__mdiff+0xd6>
 802b922:	3f01      	subs	r7, #1
 802b924:	e7e7      	b.n	802b8f6 <__mdiff+0xee>
 802b926:	bf00      	nop
 802b928:	08030f1e 	.word	0x08030f1e
 802b92c:	08030f8f 	.word	0x08030f8f

0802b930 <__ulp>:
 802b930:	b082      	sub	sp, #8
 802b932:	ed8d 0b00 	vstr	d0, [sp]
 802b936:	9a01      	ldr	r2, [sp, #4]
 802b938:	4b0f      	ldr	r3, [pc, #60]	@ (802b978 <__ulp+0x48>)
 802b93a:	4013      	ands	r3, r2
 802b93c:	f1a3 7350 	sub.w	r3, r3, #54525952	@ 0x3400000
 802b940:	2b00      	cmp	r3, #0
 802b942:	dc08      	bgt.n	802b956 <__ulp+0x26>
 802b944:	425b      	negs	r3, r3
 802b946:	f1b3 7fa0 	cmp.w	r3, #20971520	@ 0x1400000
 802b94a:	ea4f 5223 	mov.w	r2, r3, asr #20
 802b94e:	da04      	bge.n	802b95a <__ulp+0x2a>
 802b950:	f44f 2300 	mov.w	r3, #524288	@ 0x80000
 802b954:	4113      	asrs	r3, r2
 802b956:	2200      	movs	r2, #0
 802b958:	e008      	b.n	802b96c <__ulp+0x3c>
 802b95a:	f1a2 0314 	sub.w	r3, r2, #20
 802b95e:	2b1e      	cmp	r3, #30
 802b960:	bfda      	itte	le
 802b962:	f04f 4200 	movle.w	r2, #2147483648	@ 0x80000000
 802b966:	40da      	lsrle	r2, r3
 802b968:	2201      	movgt	r2, #1
 802b96a:	2300      	movs	r3, #0
 802b96c:	4619      	mov	r1, r3
 802b96e:	4610      	mov	r0, r2
 802b970:	ec41 0b10 	vmov	d0, r0, r1
 802b974:	b002      	add	sp, #8
 802b976:	4770      	bx	lr
 802b978:	7ff00000 	.word	0x7ff00000

0802b97c <__b2d>:
 802b97c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802b980:	6906      	ldr	r6, [r0, #16]
 802b982:	f100 0814 	add.w	r8, r0, #20
 802b986:	eb08 0686 	add.w	r6, r8, r6, lsl #2
 802b98a:	1f37      	subs	r7, r6, #4
 802b98c:	f856 2c04 	ldr.w	r2, [r6, #-4]
 802b990:	4610      	mov	r0, r2
 802b992:	f7ff fd4b 	bl	802b42c <__hi0bits>
 802b996:	f1c0 0320 	rsb	r3, r0, #32
 802b99a:	280a      	cmp	r0, #10
 802b99c:	600b      	str	r3, [r1, #0]
 802b99e:	491b      	ldr	r1, [pc, #108]	@ (802ba0c <__b2d+0x90>)
 802b9a0:	dc15      	bgt.n	802b9ce <__b2d+0x52>
 802b9a2:	f1c0 0c0b 	rsb	ip, r0, #11
 802b9a6:	fa22 f30c 	lsr.w	r3, r2, ip
 802b9aa:	45b8      	cmp	r8, r7
 802b9ac:	ea43 0501 	orr.w	r5, r3, r1
 802b9b0:	bf34      	ite	cc
 802b9b2:	f856 3c08 	ldrcc.w	r3, [r6, #-8]
 802b9b6:	2300      	movcs	r3, #0
 802b9b8:	3015      	adds	r0, #21
 802b9ba:	fa02 f000 	lsl.w	r0, r2, r0
 802b9be:	fa23 f30c 	lsr.w	r3, r3, ip
 802b9c2:	4303      	orrs	r3, r0
 802b9c4:	461c      	mov	r4, r3
 802b9c6:	ec45 4b10 	vmov	d0, r4, r5
 802b9ca:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802b9ce:	45b8      	cmp	r8, r7
 802b9d0:	bf3a      	itte	cc
 802b9d2:	f856 3c08 	ldrcc.w	r3, [r6, #-8]
 802b9d6:	f1a6 0708 	subcc.w	r7, r6, #8
 802b9da:	2300      	movcs	r3, #0
 802b9dc:	380b      	subs	r0, #11
 802b9de:	d012      	beq.n	802ba06 <__b2d+0x8a>
 802b9e0:	f1c0 0120 	rsb	r1, r0, #32
 802b9e4:	fa23 f401 	lsr.w	r4, r3, r1
 802b9e8:	4082      	lsls	r2, r0
 802b9ea:	4322      	orrs	r2, r4
 802b9ec:	4547      	cmp	r7, r8
 802b9ee:	f042 557f 	orr.w	r5, r2, #1069547520	@ 0x3fc00000
 802b9f2:	bf8c      	ite	hi
 802b9f4:	f857 2c04 	ldrhi.w	r2, [r7, #-4]
 802b9f8:	2200      	movls	r2, #0
 802b9fa:	4083      	lsls	r3, r0
 802b9fc:	40ca      	lsrs	r2, r1
 802b9fe:	f445 1540 	orr.w	r5, r5, #3145728	@ 0x300000
 802ba02:	4313      	orrs	r3, r2
 802ba04:	e7de      	b.n	802b9c4 <__b2d+0x48>
 802ba06:	ea42 0501 	orr.w	r5, r2, r1
 802ba0a:	e7db      	b.n	802b9c4 <__b2d+0x48>
 802ba0c:	3ff00000 	.word	0x3ff00000

0802ba10 <__d2b>:
 802ba10:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 802ba14:	460f      	mov	r7, r1
 802ba16:	2101      	movs	r1, #1
 802ba18:	ec59 8b10 	vmov	r8, r9, d0
 802ba1c:	4616      	mov	r6, r2
 802ba1e:	f7ff fc13 	bl	802b248 <_Balloc>
 802ba22:	4604      	mov	r4, r0
 802ba24:	b930      	cbnz	r0, 802ba34 <__d2b+0x24>
 802ba26:	4602      	mov	r2, r0
 802ba28:	4b23      	ldr	r3, [pc, #140]	@ (802bab8 <__d2b+0xa8>)
 802ba2a:	4824      	ldr	r0, [pc, #144]	@ (802babc <__d2b+0xac>)
 802ba2c:	f240 310f 	movw	r1, #783	@ 0x30f
 802ba30:	f7fe fa76 	bl	8029f20 <__assert_func>
 802ba34:	f3c9 550a 	ubfx	r5, r9, #20, #11
 802ba38:	f3c9 0313 	ubfx	r3, r9, #0, #20
 802ba3c:	b10d      	cbz	r5, 802ba42 <__d2b+0x32>
 802ba3e:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 802ba42:	9301      	str	r3, [sp, #4]
 802ba44:	f1b8 0300 	subs.w	r3, r8, #0
 802ba48:	d023      	beq.n	802ba92 <__d2b+0x82>
 802ba4a:	4668      	mov	r0, sp
 802ba4c:	9300      	str	r3, [sp, #0]
 802ba4e:	f7ff fd0c 	bl	802b46a <__lo0bits>
 802ba52:	e9dd 1200 	ldrd	r1, r2, [sp]
 802ba56:	b1d0      	cbz	r0, 802ba8e <__d2b+0x7e>
 802ba58:	f1c0 0320 	rsb	r3, r0, #32
 802ba5c:	fa02 f303 	lsl.w	r3, r2, r3
 802ba60:	430b      	orrs	r3, r1
 802ba62:	40c2      	lsrs	r2, r0
 802ba64:	6163      	str	r3, [r4, #20]
 802ba66:	9201      	str	r2, [sp, #4]
 802ba68:	9b01      	ldr	r3, [sp, #4]
 802ba6a:	61a3      	str	r3, [r4, #24]
 802ba6c:	2b00      	cmp	r3, #0
 802ba6e:	bf0c      	ite	eq
 802ba70:	2201      	moveq	r2, #1
 802ba72:	2202      	movne	r2, #2
 802ba74:	6122      	str	r2, [r4, #16]
 802ba76:	b1a5      	cbz	r5, 802baa2 <__d2b+0x92>
 802ba78:	f2a5 4533 	subw	r5, r5, #1075	@ 0x433
 802ba7c:	4405      	add	r5, r0
 802ba7e:	603d      	str	r5, [r7, #0]
 802ba80:	f1c0 0035 	rsb	r0, r0, #53	@ 0x35
 802ba84:	6030      	str	r0, [r6, #0]
 802ba86:	4620      	mov	r0, r4
 802ba88:	b003      	add	sp, #12
 802ba8a:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 802ba8e:	6161      	str	r1, [r4, #20]
 802ba90:	e7ea      	b.n	802ba68 <__d2b+0x58>
 802ba92:	a801      	add	r0, sp, #4
 802ba94:	f7ff fce9 	bl	802b46a <__lo0bits>
 802ba98:	9b01      	ldr	r3, [sp, #4]
 802ba9a:	6163      	str	r3, [r4, #20]
 802ba9c:	3020      	adds	r0, #32
 802ba9e:	2201      	movs	r2, #1
 802baa0:	e7e8      	b.n	802ba74 <__d2b+0x64>
 802baa2:	eb04 0382 	add.w	r3, r4, r2, lsl #2
 802baa6:	f2a0 4032 	subw	r0, r0, #1074	@ 0x432
 802baaa:	6038      	str	r0, [r7, #0]
 802baac:	6918      	ldr	r0, [r3, #16]
 802baae:	f7ff fcbd 	bl	802b42c <__hi0bits>
 802bab2:	ebc0 1042 	rsb	r0, r0, r2, lsl #5
 802bab6:	e7e5      	b.n	802ba84 <__d2b+0x74>
 802bab8:	08030f1e 	.word	0x08030f1e
 802babc:	08030f8f 	.word	0x08030f8f

0802bac0 <__ratio>:
 802bac0:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802bac4:	4688      	mov	r8, r1
 802bac6:	4669      	mov	r1, sp
 802bac8:	4681      	mov	r9, r0
 802baca:	f7ff ff57 	bl	802b97c <__b2d>
 802bace:	a901      	add	r1, sp, #4
 802bad0:	4640      	mov	r0, r8
 802bad2:	ec55 4b10 	vmov	r4, r5, d0
 802bad6:	f7ff ff51 	bl	802b97c <__b2d>
 802bada:	f8d8 3010 	ldr.w	r3, [r8, #16]
 802bade:	f8d9 2010 	ldr.w	r2, [r9, #16]
 802bae2:	1ad2      	subs	r2, r2, r3
 802bae4:	e9dd 3100 	ldrd	r3, r1, [sp]
 802bae8:	1a5b      	subs	r3, r3, r1
 802baea:	eb03 1342 	add.w	r3, r3, r2, lsl #5
 802baee:	ec57 6b10 	vmov	r6, r7, d0
 802baf2:	2b00      	cmp	r3, #0
 802baf4:	bfd6      	itet	le
 802baf6:	ebc3 3303 	rsble	r3, r3, r3, lsl #12
 802bafa:	462a      	movgt	r2, r5
 802bafc:	463a      	movle	r2, r7
 802bafe:	46ab      	mov	fp, r5
 802bb00:	46a2      	mov	sl, r4
 802bb02:	bfce      	itee	gt
 802bb04:	eb02 5b03 	addgt.w	fp, r2, r3, lsl #20
 802bb08:	eb02 5303 	addle.w	r3, r2, r3, lsl #20
 802bb0c:	ee00 3a90 	vmovle	s1, r3
 802bb10:	ec4b ab17 	vmov	d7, sl, fp
 802bb14:	ee87 0b00 	vdiv.f64	d0, d7, d0
 802bb18:	b003      	add	sp, #12
 802bb1a:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

0802bb1e <__copybits>:
 802bb1e:	3901      	subs	r1, #1
 802bb20:	b570      	push	{r4, r5, r6, lr}
 802bb22:	1149      	asrs	r1, r1, #5
 802bb24:	6914      	ldr	r4, [r2, #16]
 802bb26:	3101      	adds	r1, #1
 802bb28:	f102 0314 	add.w	r3, r2, #20
 802bb2c:	eb00 0181 	add.w	r1, r0, r1, lsl #2
 802bb30:	eb03 0484 	add.w	r4, r3, r4, lsl #2
 802bb34:	1f05      	subs	r5, r0, #4
 802bb36:	42a3      	cmp	r3, r4
 802bb38:	d30c      	bcc.n	802bb54 <__copybits+0x36>
 802bb3a:	1aa3      	subs	r3, r4, r2
 802bb3c:	3b11      	subs	r3, #17
 802bb3e:	f023 0303 	bic.w	r3, r3, #3
 802bb42:	3211      	adds	r2, #17
 802bb44:	42a2      	cmp	r2, r4
 802bb46:	bf88      	it	hi
 802bb48:	2300      	movhi	r3, #0
 802bb4a:	4418      	add	r0, r3
 802bb4c:	2300      	movs	r3, #0
 802bb4e:	4288      	cmp	r0, r1
 802bb50:	d305      	bcc.n	802bb5e <__copybits+0x40>
 802bb52:	bd70      	pop	{r4, r5, r6, pc}
 802bb54:	f853 6b04 	ldr.w	r6, [r3], #4
 802bb58:	f845 6f04 	str.w	r6, [r5, #4]!
 802bb5c:	e7eb      	b.n	802bb36 <__copybits+0x18>
 802bb5e:	f840 3b04 	str.w	r3, [r0], #4
 802bb62:	e7f4      	b.n	802bb4e <__copybits+0x30>

0802bb64 <__any_on>:
 802bb64:	f100 0214 	add.w	r2, r0, #20
 802bb68:	6900      	ldr	r0, [r0, #16]
 802bb6a:	114b      	asrs	r3, r1, #5
 802bb6c:	4298      	cmp	r0, r3
 802bb6e:	b510      	push	{r4, lr}
 802bb70:	db11      	blt.n	802bb96 <__any_on+0x32>
 802bb72:	dd0a      	ble.n	802bb8a <__any_on+0x26>
 802bb74:	f011 011f 	ands.w	r1, r1, #31
 802bb78:	d007      	beq.n	802bb8a <__any_on+0x26>
 802bb7a:	f852 4023 	ldr.w	r4, [r2, r3, lsl #2]
 802bb7e:	fa24 f001 	lsr.w	r0, r4, r1
 802bb82:	fa00 f101 	lsl.w	r1, r0, r1
 802bb86:	428c      	cmp	r4, r1
 802bb88:	d10b      	bne.n	802bba2 <__any_on+0x3e>
 802bb8a:	eb02 0383 	add.w	r3, r2, r3, lsl #2
 802bb8e:	4293      	cmp	r3, r2
 802bb90:	d803      	bhi.n	802bb9a <__any_on+0x36>
 802bb92:	2000      	movs	r0, #0
 802bb94:	bd10      	pop	{r4, pc}
 802bb96:	4603      	mov	r3, r0
 802bb98:	e7f7      	b.n	802bb8a <__any_on+0x26>
 802bb9a:	f853 1d04 	ldr.w	r1, [r3, #-4]!
 802bb9e:	2900      	cmp	r1, #0
 802bba0:	d0f5      	beq.n	802bb8e <__any_on+0x2a>
 802bba2:	2001      	movs	r0, #1
 802bba4:	e7f6      	b.n	802bb94 <__any_on+0x30>

0802bba6 <_malloc_usable_size_r>:
 802bba6:	f851 3c04 	ldr.w	r3, [r1, #-4]
 802bbaa:	1f18      	subs	r0, r3, #4
 802bbac:	2b00      	cmp	r3, #0
 802bbae:	bfbc      	itt	lt
 802bbb0:	580b      	ldrlt	r3, [r1, r0]
 802bbb2:	18c0      	addlt	r0, r0, r3
 802bbb4:	4770      	bx	lr

0802bbb6 <__ascii_wctomb>:
 802bbb6:	4603      	mov	r3, r0
 802bbb8:	4608      	mov	r0, r1
 802bbba:	b141      	cbz	r1, 802bbce <__ascii_wctomb+0x18>
 802bbbc:	2aff      	cmp	r2, #255	@ 0xff
 802bbbe:	d904      	bls.n	802bbca <__ascii_wctomb+0x14>
 802bbc0:	228a      	movs	r2, #138	@ 0x8a
 802bbc2:	601a      	str	r2, [r3, #0]
 802bbc4:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802bbc8:	4770      	bx	lr
 802bbca:	700a      	strb	r2, [r1, #0]
 802bbcc:	2001      	movs	r0, #1
 802bbce:	4770      	bx	lr

0802bbd0 <__ssputs_r>:
 802bbd0:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 802bbd4:	688e      	ldr	r6, [r1, #8]
 802bbd6:	461f      	mov	r7, r3
 802bbd8:	42be      	cmp	r6, r7
 802bbda:	680b      	ldr	r3, [r1, #0]
 802bbdc:	4682      	mov	sl, r0
 802bbde:	460c      	mov	r4, r1
 802bbe0:	4690      	mov	r8, r2
 802bbe2:	d82d      	bhi.n	802bc40 <__ssputs_r+0x70>
 802bbe4:	f9b1 200c 	ldrsh.w	r2, [r1, #12]
 802bbe8:	f412 6f90 	tst.w	r2, #1152	@ 0x480
 802bbec:	d026      	beq.n	802bc3c <__ssputs_r+0x6c>
 802bbee:	6965      	ldr	r5, [r4, #20]
 802bbf0:	6909      	ldr	r1, [r1, #16]
 802bbf2:	eb05 0545 	add.w	r5, r5, r5, lsl #1
 802bbf6:	eba3 0901 	sub.w	r9, r3, r1
 802bbfa:	eb05 75d5 	add.w	r5, r5, r5, lsr #31
 802bbfe:	1c7b      	adds	r3, r7, #1
 802bc00:	444b      	add	r3, r9
 802bc02:	106d      	asrs	r5, r5, #1
 802bc04:	429d      	cmp	r5, r3
 802bc06:	bf38      	it	cc
 802bc08:	461d      	movcc	r5, r3
 802bc0a:	0553      	lsls	r3, r2, #21
 802bc0c:	d527      	bpl.n	802bc5e <__ssputs_r+0x8e>
 802bc0e:	4629      	mov	r1, r5
 802bc10:	f7fc fb2e 	bl	8028270 <_malloc_r>
 802bc14:	4606      	mov	r6, r0
 802bc16:	b360      	cbz	r0, 802bc72 <__ssputs_r+0xa2>
 802bc18:	6921      	ldr	r1, [r4, #16]
 802bc1a:	464a      	mov	r2, r9
 802bc1c:	f7fe f967 	bl	8029eee <memcpy>
 802bc20:	89a3      	ldrh	r3, [r4, #12]
 802bc22:	f423 6390 	bic.w	r3, r3, #1152	@ 0x480
 802bc26:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802bc2a:	81a3      	strh	r3, [r4, #12]
 802bc2c:	6126      	str	r6, [r4, #16]
 802bc2e:	6165      	str	r5, [r4, #20]
 802bc30:	444e      	add	r6, r9
 802bc32:	eba5 0509 	sub.w	r5, r5, r9
 802bc36:	6026      	str	r6, [r4, #0]
 802bc38:	60a5      	str	r5, [r4, #8]
 802bc3a:	463e      	mov	r6, r7
 802bc3c:	42be      	cmp	r6, r7
 802bc3e:	d900      	bls.n	802bc42 <__ssputs_r+0x72>
 802bc40:	463e      	mov	r6, r7
 802bc42:	6820      	ldr	r0, [r4, #0]
 802bc44:	4632      	mov	r2, r6
 802bc46:	4641      	mov	r1, r8
 802bc48:	f7fe f840 	bl	8029ccc <memmove>
 802bc4c:	68a3      	ldr	r3, [r4, #8]
 802bc4e:	1b9b      	subs	r3, r3, r6
 802bc50:	60a3      	str	r3, [r4, #8]
 802bc52:	6823      	ldr	r3, [r4, #0]
 802bc54:	4433      	add	r3, r6
 802bc56:	6023      	str	r3, [r4, #0]
 802bc58:	2000      	movs	r0, #0
 802bc5a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802bc5e:	462a      	mov	r2, r5
 802bc60:	f7fc fbd8 	bl	8028414 <_realloc_r>
 802bc64:	4606      	mov	r6, r0
 802bc66:	2800      	cmp	r0, #0
 802bc68:	d1e0      	bne.n	802bc2c <__ssputs_r+0x5c>
 802bc6a:	6921      	ldr	r1, [r4, #16]
 802bc6c:	4650      	mov	r0, sl
 802bc6e:	f7fe ff55 	bl	802ab1c <_free_r>
 802bc72:	230c      	movs	r3, #12
 802bc74:	f8ca 3000 	str.w	r3, [sl]
 802bc78:	89a3      	ldrh	r3, [r4, #12]
 802bc7a:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802bc7e:	81a3      	strh	r3, [r4, #12]
 802bc80:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802bc84:	e7e9      	b.n	802bc5a <__ssputs_r+0x8a>
	...

0802bc88 <_svfiprintf_r>:
 802bc88:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802bc8c:	4698      	mov	r8, r3
 802bc8e:	898b      	ldrh	r3, [r1, #12]
 802bc90:	061b      	lsls	r3, r3, #24
 802bc92:	b09d      	sub	sp, #116	@ 0x74
 802bc94:	4607      	mov	r7, r0
 802bc96:	460d      	mov	r5, r1
 802bc98:	4614      	mov	r4, r2
 802bc9a:	d510      	bpl.n	802bcbe <_svfiprintf_r+0x36>
 802bc9c:	690b      	ldr	r3, [r1, #16]
 802bc9e:	b973      	cbnz	r3, 802bcbe <_svfiprintf_r+0x36>
 802bca0:	2140      	movs	r1, #64	@ 0x40
 802bca2:	f7fc fae5 	bl	8028270 <_malloc_r>
 802bca6:	6028      	str	r0, [r5, #0]
 802bca8:	6128      	str	r0, [r5, #16]
 802bcaa:	b930      	cbnz	r0, 802bcba <_svfiprintf_r+0x32>
 802bcac:	230c      	movs	r3, #12
 802bcae:	603b      	str	r3, [r7, #0]
 802bcb0:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802bcb4:	b01d      	add	sp, #116	@ 0x74
 802bcb6:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802bcba:	2340      	movs	r3, #64	@ 0x40
 802bcbc:	616b      	str	r3, [r5, #20]
 802bcbe:	2300      	movs	r3, #0
 802bcc0:	9309      	str	r3, [sp, #36]	@ 0x24
 802bcc2:	2320      	movs	r3, #32
 802bcc4:	f88d 3029 	strb.w	r3, [sp, #41]	@ 0x29
 802bcc8:	f8cd 800c 	str.w	r8, [sp, #12]
 802bccc:	2330      	movs	r3, #48	@ 0x30
 802bcce:	f8df 819c 	ldr.w	r8, [pc, #412]	@ 802be6c <_svfiprintf_r+0x1e4>
 802bcd2:	f88d 302a 	strb.w	r3, [sp, #42]	@ 0x2a
 802bcd6:	f04f 0901 	mov.w	r9, #1
 802bcda:	4623      	mov	r3, r4
 802bcdc:	469a      	mov	sl, r3
 802bcde:	f813 2b01 	ldrb.w	r2, [r3], #1
 802bce2:	b10a      	cbz	r2, 802bce8 <_svfiprintf_r+0x60>
 802bce4:	2a25      	cmp	r2, #37	@ 0x25
 802bce6:	d1f9      	bne.n	802bcdc <_svfiprintf_r+0x54>
 802bce8:	ebba 0b04 	subs.w	fp, sl, r4
 802bcec:	d00b      	beq.n	802bd06 <_svfiprintf_r+0x7e>
 802bcee:	465b      	mov	r3, fp
 802bcf0:	4622      	mov	r2, r4
 802bcf2:	4629      	mov	r1, r5
 802bcf4:	4638      	mov	r0, r7
 802bcf6:	f7ff ff6b 	bl	802bbd0 <__ssputs_r>
 802bcfa:	3001      	adds	r0, #1
 802bcfc:	f000 80a7 	beq.w	802be4e <_svfiprintf_r+0x1c6>
 802bd00:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802bd02:	445a      	add	r2, fp
 802bd04:	9209      	str	r2, [sp, #36]	@ 0x24
 802bd06:	f89a 3000 	ldrb.w	r3, [sl]
 802bd0a:	2b00      	cmp	r3, #0
 802bd0c:	f000 809f 	beq.w	802be4e <_svfiprintf_r+0x1c6>
 802bd10:	2300      	movs	r3, #0
 802bd12:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802bd16:	e9cd 2305 	strd	r2, r3, [sp, #20]
 802bd1a:	f10a 0a01 	add.w	sl, sl, #1
 802bd1e:	9304      	str	r3, [sp, #16]
 802bd20:	9307      	str	r3, [sp, #28]
 802bd22:	f88d 3053 	strb.w	r3, [sp, #83]	@ 0x53
 802bd26:	931a      	str	r3, [sp, #104]	@ 0x68
 802bd28:	4654      	mov	r4, sl
 802bd2a:	2205      	movs	r2, #5
 802bd2c:	f814 1b01 	ldrb.w	r1, [r4], #1
 802bd30:	484e      	ldr	r0, [pc, #312]	@ (802be6c <_svfiprintf_r+0x1e4>)
 802bd32:	f7d4 fae5 	bl	8000300 <memchr>
 802bd36:	9a04      	ldr	r2, [sp, #16]
 802bd38:	b9d8      	cbnz	r0, 802bd72 <_svfiprintf_r+0xea>
 802bd3a:	06d0      	lsls	r0, r2, #27
 802bd3c:	bf44      	itt	mi
 802bd3e:	2320      	movmi	r3, #32
 802bd40:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802bd44:	0711      	lsls	r1, r2, #28
 802bd46:	bf44      	itt	mi
 802bd48:	232b      	movmi	r3, #43	@ 0x2b
 802bd4a:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802bd4e:	f89a 3000 	ldrb.w	r3, [sl]
 802bd52:	2b2a      	cmp	r3, #42	@ 0x2a
 802bd54:	d015      	beq.n	802bd82 <_svfiprintf_r+0xfa>
 802bd56:	9a07      	ldr	r2, [sp, #28]
 802bd58:	4654      	mov	r4, sl
 802bd5a:	2000      	movs	r0, #0
 802bd5c:	f04f 0c0a 	mov.w	ip, #10
 802bd60:	4621      	mov	r1, r4
 802bd62:	f811 3b01 	ldrb.w	r3, [r1], #1
 802bd66:	3b30      	subs	r3, #48	@ 0x30
 802bd68:	2b09      	cmp	r3, #9
 802bd6a:	d94b      	bls.n	802be04 <_svfiprintf_r+0x17c>
 802bd6c:	b1b0      	cbz	r0, 802bd9c <_svfiprintf_r+0x114>
 802bd6e:	9207      	str	r2, [sp, #28]
 802bd70:	e014      	b.n	802bd9c <_svfiprintf_r+0x114>
 802bd72:	eba0 0308 	sub.w	r3, r0, r8
 802bd76:	fa09 f303 	lsl.w	r3, r9, r3
 802bd7a:	4313      	orrs	r3, r2
 802bd7c:	9304      	str	r3, [sp, #16]
 802bd7e:	46a2      	mov	sl, r4
 802bd80:	e7d2      	b.n	802bd28 <_svfiprintf_r+0xa0>
 802bd82:	9b03      	ldr	r3, [sp, #12]
 802bd84:	1d19      	adds	r1, r3, #4
 802bd86:	681b      	ldr	r3, [r3, #0]
 802bd88:	9103      	str	r1, [sp, #12]
 802bd8a:	2b00      	cmp	r3, #0
 802bd8c:	bfbb      	ittet	lt
 802bd8e:	425b      	neglt	r3, r3
 802bd90:	f042 0202 	orrlt.w	r2, r2, #2
 802bd94:	9307      	strge	r3, [sp, #28]
 802bd96:	9307      	strlt	r3, [sp, #28]
 802bd98:	bfb8      	it	lt
 802bd9a:	9204      	strlt	r2, [sp, #16]
 802bd9c:	7823      	ldrb	r3, [r4, #0]
 802bd9e:	2b2e      	cmp	r3, #46	@ 0x2e
 802bda0:	d10a      	bne.n	802bdb8 <_svfiprintf_r+0x130>
 802bda2:	7863      	ldrb	r3, [r4, #1]
 802bda4:	2b2a      	cmp	r3, #42	@ 0x2a
 802bda6:	d132      	bne.n	802be0e <_svfiprintf_r+0x186>
 802bda8:	9b03      	ldr	r3, [sp, #12]
 802bdaa:	1d1a      	adds	r2, r3, #4
 802bdac:	681b      	ldr	r3, [r3, #0]
 802bdae:	9203      	str	r2, [sp, #12]
 802bdb0:	ea43 73e3 	orr.w	r3, r3, r3, asr #31
 802bdb4:	3402      	adds	r4, #2
 802bdb6:	9305      	str	r3, [sp, #20]
 802bdb8:	f8df a0c0 	ldr.w	sl, [pc, #192]	@ 802be7c <_svfiprintf_r+0x1f4>
 802bdbc:	7821      	ldrb	r1, [r4, #0]
 802bdbe:	2203      	movs	r2, #3
 802bdc0:	4650      	mov	r0, sl
 802bdc2:	f7d4 fa9d 	bl	8000300 <memchr>
 802bdc6:	b138      	cbz	r0, 802bdd8 <_svfiprintf_r+0x150>
 802bdc8:	9b04      	ldr	r3, [sp, #16]
 802bdca:	eba0 000a 	sub.w	r0, r0, sl
 802bdce:	2240      	movs	r2, #64	@ 0x40
 802bdd0:	4082      	lsls	r2, r0
 802bdd2:	4313      	orrs	r3, r2
 802bdd4:	3401      	adds	r4, #1
 802bdd6:	9304      	str	r3, [sp, #16]
 802bdd8:	f814 1b01 	ldrb.w	r1, [r4], #1
 802bddc:	4824      	ldr	r0, [pc, #144]	@ (802be70 <_svfiprintf_r+0x1e8>)
 802bdde:	f88d 1028 	strb.w	r1, [sp, #40]	@ 0x28
 802bde2:	2206      	movs	r2, #6
 802bde4:	f7d4 fa8c 	bl	8000300 <memchr>
 802bde8:	2800      	cmp	r0, #0
 802bdea:	d036      	beq.n	802be5a <_svfiprintf_r+0x1d2>
 802bdec:	4b21      	ldr	r3, [pc, #132]	@ (802be74 <_svfiprintf_r+0x1ec>)
 802bdee:	bb1b      	cbnz	r3, 802be38 <_svfiprintf_r+0x1b0>
 802bdf0:	9b03      	ldr	r3, [sp, #12]
 802bdf2:	3307      	adds	r3, #7
 802bdf4:	f023 0307 	bic.w	r3, r3, #7
 802bdf8:	3308      	adds	r3, #8
 802bdfa:	9303      	str	r3, [sp, #12]
 802bdfc:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802bdfe:	4433      	add	r3, r6
 802be00:	9309      	str	r3, [sp, #36]	@ 0x24
 802be02:	e76a      	b.n	802bcda <_svfiprintf_r+0x52>
 802be04:	fb0c 3202 	mla	r2, ip, r2, r3
 802be08:	460c      	mov	r4, r1
 802be0a:	2001      	movs	r0, #1
 802be0c:	e7a8      	b.n	802bd60 <_svfiprintf_r+0xd8>
 802be0e:	2300      	movs	r3, #0
 802be10:	3401      	adds	r4, #1
 802be12:	9305      	str	r3, [sp, #20]
 802be14:	4619      	mov	r1, r3
 802be16:	f04f 0c0a 	mov.w	ip, #10
 802be1a:	4620      	mov	r0, r4
 802be1c:	f810 2b01 	ldrb.w	r2, [r0], #1
 802be20:	3a30      	subs	r2, #48	@ 0x30
 802be22:	2a09      	cmp	r2, #9
 802be24:	d903      	bls.n	802be2e <_svfiprintf_r+0x1a6>
 802be26:	2b00      	cmp	r3, #0
 802be28:	d0c6      	beq.n	802bdb8 <_svfiprintf_r+0x130>
 802be2a:	9105      	str	r1, [sp, #20]
 802be2c:	e7c4      	b.n	802bdb8 <_svfiprintf_r+0x130>
 802be2e:	fb0c 2101 	mla	r1, ip, r1, r2
 802be32:	4604      	mov	r4, r0
 802be34:	2301      	movs	r3, #1
 802be36:	e7f0      	b.n	802be1a <_svfiprintf_r+0x192>
 802be38:	ab03      	add	r3, sp, #12
 802be3a:	9300      	str	r3, [sp, #0]
 802be3c:	462a      	mov	r2, r5
 802be3e:	4b0e      	ldr	r3, [pc, #56]	@ (802be78 <_svfiprintf_r+0x1f0>)
 802be40:	a904      	add	r1, sp, #16
 802be42:	4638      	mov	r0, r7
 802be44:	f7fd f960 	bl	8029108 <_printf_float>
 802be48:	1c42      	adds	r2, r0, #1
 802be4a:	4606      	mov	r6, r0
 802be4c:	d1d6      	bne.n	802bdfc <_svfiprintf_r+0x174>
 802be4e:	89ab      	ldrh	r3, [r5, #12]
 802be50:	065b      	lsls	r3, r3, #25
 802be52:	f53f af2d 	bmi.w	802bcb0 <_svfiprintf_r+0x28>
 802be56:	9809      	ldr	r0, [sp, #36]	@ 0x24
 802be58:	e72c      	b.n	802bcb4 <_svfiprintf_r+0x2c>
 802be5a:	ab03      	add	r3, sp, #12
 802be5c:	9300      	str	r3, [sp, #0]
 802be5e:	462a      	mov	r2, r5
 802be60:	4b05      	ldr	r3, [pc, #20]	@ (802be78 <_svfiprintf_r+0x1f0>)
 802be62:	a904      	add	r1, sp, #16
 802be64:	4638      	mov	r0, r7
 802be66:	f7fd fbd7 	bl	8029618 <_printf_i>
 802be6a:	e7ed      	b.n	802be48 <_svfiprintf_r+0x1c0>
 802be6c:	080310e8 	.word	0x080310e8
 802be70:	080310f2 	.word	0x080310f2
 802be74:	08029109 	.word	0x08029109
 802be78:	0802bbd1 	.word	0x0802bbd1
 802be7c:	080310ee 	.word	0x080310ee

0802be80 <__sfputc_r>:
 802be80:	6893      	ldr	r3, [r2, #8]
 802be82:	3b01      	subs	r3, #1
 802be84:	2b00      	cmp	r3, #0
 802be86:	b410      	push	{r4}
 802be88:	6093      	str	r3, [r2, #8]
 802be8a:	da08      	bge.n	802be9e <__sfputc_r+0x1e>
 802be8c:	6994      	ldr	r4, [r2, #24]
 802be8e:	42a3      	cmp	r3, r4
 802be90:	db01      	blt.n	802be96 <__sfputc_r+0x16>
 802be92:	290a      	cmp	r1, #10
 802be94:	d103      	bne.n	802be9e <__sfputc_r+0x1e>
 802be96:	f85d 4b04 	ldr.w	r4, [sp], #4
 802be9a:	f7fd be72 	b.w	8029b82 <__swbuf_r>
 802be9e:	6813      	ldr	r3, [r2, #0]
 802bea0:	1c58      	adds	r0, r3, #1
 802bea2:	6010      	str	r0, [r2, #0]
 802bea4:	7019      	strb	r1, [r3, #0]
 802bea6:	4608      	mov	r0, r1
 802bea8:	f85d 4b04 	ldr.w	r4, [sp], #4
 802beac:	4770      	bx	lr

0802beae <__sfputs_r>:
 802beae:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802beb0:	4606      	mov	r6, r0
 802beb2:	460f      	mov	r7, r1
 802beb4:	4614      	mov	r4, r2
 802beb6:	18d5      	adds	r5, r2, r3
 802beb8:	42ac      	cmp	r4, r5
 802beba:	d101      	bne.n	802bec0 <__sfputs_r+0x12>
 802bebc:	2000      	movs	r0, #0
 802bebe:	e007      	b.n	802bed0 <__sfputs_r+0x22>
 802bec0:	f814 1b01 	ldrb.w	r1, [r4], #1
 802bec4:	463a      	mov	r2, r7
 802bec6:	4630      	mov	r0, r6
 802bec8:	f7ff ffda 	bl	802be80 <__sfputc_r>
 802becc:	1c43      	adds	r3, r0, #1
 802bece:	d1f3      	bne.n	802beb8 <__sfputs_r+0xa>
 802bed0:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	...

0802bed4 <_vfiprintf_r>:
 802bed4:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802bed8:	460d      	mov	r5, r1
 802beda:	b09d      	sub	sp, #116	@ 0x74
 802bedc:	4614      	mov	r4, r2
 802bede:	4698      	mov	r8, r3
 802bee0:	4606      	mov	r6, r0
 802bee2:	b118      	cbz	r0, 802beec <_vfiprintf_r+0x18>
 802bee4:	6a03      	ldr	r3, [r0, #32]
 802bee6:	b90b      	cbnz	r3, 802beec <_vfiprintf_r+0x18>
 802bee8:	f7fd fd42 	bl	8029970 <__sinit>
 802beec:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802beee:	07d9      	lsls	r1, r3, #31
 802bef0:	d405      	bmi.n	802befe <_vfiprintf_r+0x2a>
 802bef2:	89ab      	ldrh	r3, [r5, #12]
 802bef4:	059a      	lsls	r2, r3, #22
 802bef6:	d402      	bmi.n	802befe <_vfiprintf_r+0x2a>
 802bef8:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802befa:	f7fd fff6 	bl	8029eea <__retarget_lock_acquire_recursive>
 802befe:	89ab      	ldrh	r3, [r5, #12]
 802bf00:	071b      	lsls	r3, r3, #28
 802bf02:	d501      	bpl.n	802bf08 <_vfiprintf_r+0x34>
 802bf04:	692b      	ldr	r3, [r5, #16]
 802bf06:	b99b      	cbnz	r3, 802bf30 <_vfiprintf_r+0x5c>
 802bf08:	4629      	mov	r1, r5
 802bf0a:	4630      	mov	r0, r6
 802bf0c:	f7fd fe78 	bl	8029c00 <__swsetup_r>
 802bf10:	b170      	cbz	r0, 802bf30 <_vfiprintf_r+0x5c>
 802bf12:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802bf14:	07dc      	lsls	r4, r3, #31
 802bf16:	d504      	bpl.n	802bf22 <_vfiprintf_r+0x4e>
 802bf18:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802bf1c:	b01d      	add	sp, #116	@ 0x74
 802bf1e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802bf22:	89ab      	ldrh	r3, [r5, #12]
 802bf24:	0598      	lsls	r0, r3, #22
 802bf26:	d4f7      	bmi.n	802bf18 <_vfiprintf_r+0x44>
 802bf28:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802bf2a:	f7fd ffdf 	bl	8029eec <__retarget_lock_release_recursive>
 802bf2e:	e7f3      	b.n	802bf18 <_vfiprintf_r+0x44>
 802bf30:	2300      	movs	r3, #0
 802bf32:	9309      	str	r3, [sp, #36]	@ 0x24
 802bf34:	2320      	movs	r3, #32
 802bf36:	f88d 3029 	strb.w	r3, [sp, #41]	@ 0x29
 802bf3a:	f8cd 800c 	str.w	r8, [sp, #12]
 802bf3e:	2330      	movs	r3, #48	@ 0x30
 802bf40:	f8df 81ac 	ldr.w	r8, [pc, #428]	@ 802c0f0 <_vfiprintf_r+0x21c>
 802bf44:	f88d 302a 	strb.w	r3, [sp, #42]	@ 0x2a
 802bf48:	f04f 0901 	mov.w	r9, #1
 802bf4c:	4623      	mov	r3, r4
 802bf4e:	469a      	mov	sl, r3
 802bf50:	f813 2b01 	ldrb.w	r2, [r3], #1
 802bf54:	b10a      	cbz	r2, 802bf5a <_vfiprintf_r+0x86>
 802bf56:	2a25      	cmp	r2, #37	@ 0x25
 802bf58:	d1f9      	bne.n	802bf4e <_vfiprintf_r+0x7a>
 802bf5a:	ebba 0b04 	subs.w	fp, sl, r4
 802bf5e:	d00b      	beq.n	802bf78 <_vfiprintf_r+0xa4>
 802bf60:	465b      	mov	r3, fp
 802bf62:	4622      	mov	r2, r4
 802bf64:	4629      	mov	r1, r5
 802bf66:	4630      	mov	r0, r6
 802bf68:	f7ff ffa1 	bl	802beae <__sfputs_r>
 802bf6c:	3001      	adds	r0, #1
 802bf6e:	f000 80a7 	beq.w	802c0c0 <_vfiprintf_r+0x1ec>
 802bf72:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802bf74:	445a      	add	r2, fp
 802bf76:	9209      	str	r2, [sp, #36]	@ 0x24
 802bf78:	f89a 3000 	ldrb.w	r3, [sl]
 802bf7c:	2b00      	cmp	r3, #0
 802bf7e:	f000 809f 	beq.w	802c0c0 <_vfiprintf_r+0x1ec>
 802bf82:	2300      	movs	r3, #0
 802bf84:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802bf88:	e9cd 2305 	strd	r2, r3, [sp, #20]
 802bf8c:	f10a 0a01 	add.w	sl, sl, #1
 802bf90:	9304      	str	r3, [sp, #16]
 802bf92:	9307      	str	r3, [sp, #28]
 802bf94:	f88d 3053 	strb.w	r3, [sp, #83]	@ 0x53
 802bf98:	931a      	str	r3, [sp, #104]	@ 0x68
 802bf9a:	4654      	mov	r4, sl
 802bf9c:	2205      	movs	r2, #5
 802bf9e:	f814 1b01 	ldrb.w	r1, [r4], #1
 802bfa2:	4853      	ldr	r0, [pc, #332]	@ (802c0f0 <_vfiprintf_r+0x21c>)
 802bfa4:	f7d4 f9ac 	bl	8000300 <memchr>
 802bfa8:	9a04      	ldr	r2, [sp, #16]
 802bfaa:	b9d8      	cbnz	r0, 802bfe4 <_vfiprintf_r+0x110>
 802bfac:	06d1      	lsls	r1, r2, #27
 802bfae:	bf44      	itt	mi
 802bfb0:	2320      	movmi	r3, #32
 802bfb2:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802bfb6:	0713      	lsls	r3, r2, #28
 802bfb8:	bf44      	itt	mi
 802bfba:	232b      	movmi	r3, #43	@ 0x2b
 802bfbc:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802bfc0:	f89a 3000 	ldrb.w	r3, [sl]
 802bfc4:	2b2a      	cmp	r3, #42	@ 0x2a
 802bfc6:	d015      	beq.n	802bff4 <_vfiprintf_r+0x120>
 802bfc8:	9a07      	ldr	r2, [sp, #28]
 802bfca:	4654      	mov	r4, sl
 802bfcc:	2000      	movs	r0, #0
 802bfce:	f04f 0c0a 	mov.w	ip, #10
 802bfd2:	4621      	mov	r1, r4
 802bfd4:	f811 3b01 	ldrb.w	r3, [r1], #1
 802bfd8:	3b30      	subs	r3, #48	@ 0x30
 802bfda:	2b09      	cmp	r3, #9
 802bfdc:	d94b      	bls.n	802c076 <_vfiprintf_r+0x1a2>
 802bfde:	b1b0      	cbz	r0, 802c00e <_vfiprintf_r+0x13a>
 802bfe0:	9207      	str	r2, [sp, #28]
 802bfe2:	e014      	b.n	802c00e <_vfiprintf_r+0x13a>
 802bfe4:	eba0 0308 	sub.w	r3, r0, r8
 802bfe8:	fa09 f303 	lsl.w	r3, r9, r3
 802bfec:	4313      	orrs	r3, r2
 802bfee:	9304      	str	r3, [sp, #16]
 802bff0:	46a2      	mov	sl, r4
 802bff2:	e7d2      	b.n	802bf9a <_vfiprintf_r+0xc6>
 802bff4:	9b03      	ldr	r3, [sp, #12]
 802bff6:	1d19      	adds	r1, r3, #4
 802bff8:	681b      	ldr	r3, [r3, #0]
 802bffa:	9103      	str	r1, [sp, #12]
 802bffc:	2b00      	cmp	r3, #0
 802bffe:	bfbb      	ittet	lt
 802c000:	425b      	neglt	r3, r3
 802c002:	f042 0202 	orrlt.w	r2, r2, #2
 802c006:	9307      	strge	r3, [sp, #28]
 802c008:	9307      	strlt	r3, [sp, #28]
 802c00a:	bfb8      	it	lt
 802c00c:	9204      	strlt	r2, [sp, #16]
 802c00e:	7823      	ldrb	r3, [r4, #0]
 802c010:	2b2e      	cmp	r3, #46	@ 0x2e
 802c012:	d10a      	bne.n	802c02a <_vfiprintf_r+0x156>
 802c014:	7863      	ldrb	r3, [r4, #1]
 802c016:	2b2a      	cmp	r3, #42	@ 0x2a
 802c018:	d132      	bne.n	802c080 <_vfiprintf_r+0x1ac>
 802c01a:	9b03      	ldr	r3, [sp, #12]
 802c01c:	1d1a      	adds	r2, r3, #4
 802c01e:	681b      	ldr	r3, [r3, #0]
 802c020:	9203      	str	r2, [sp, #12]
 802c022:	ea43 73e3 	orr.w	r3, r3, r3, asr #31
 802c026:	3402      	adds	r4, #2
 802c028:	9305      	str	r3, [sp, #20]
 802c02a:	f8df a0d4 	ldr.w	sl, [pc, #212]	@ 802c100 <_vfiprintf_r+0x22c>
 802c02e:	7821      	ldrb	r1, [r4, #0]
 802c030:	2203      	movs	r2, #3
 802c032:	4650      	mov	r0, sl
 802c034:	f7d4 f964 	bl	8000300 <memchr>
 802c038:	b138      	cbz	r0, 802c04a <_vfiprintf_r+0x176>
 802c03a:	9b04      	ldr	r3, [sp, #16]
 802c03c:	eba0 000a 	sub.w	r0, r0, sl
 802c040:	2240      	movs	r2, #64	@ 0x40
 802c042:	4082      	lsls	r2, r0
 802c044:	4313      	orrs	r3, r2
 802c046:	3401      	adds	r4, #1
 802c048:	9304      	str	r3, [sp, #16]
 802c04a:	f814 1b01 	ldrb.w	r1, [r4], #1
 802c04e:	4829      	ldr	r0, [pc, #164]	@ (802c0f4 <_vfiprintf_r+0x220>)
 802c050:	f88d 1028 	strb.w	r1, [sp, #40]	@ 0x28
 802c054:	2206      	movs	r2, #6
 802c056:	f7d4 f953 	bl	8000300 <memchr>
 802c05a:	2800      	cmp	r0, #0
 802c05c:	d03f      	beq.n	802c0de <_vfiprintf_r+0x20a>
 802c05e:	4b26      	ldr	r3, [pc, #152]	@ (802c0f8 <_vfiprintf_r+0x224>)
 802c060:	bb1b      	cbnz	r3, 802c0aa <_vfiprintf_r+0x1d6>
 802c062:	9b03      	ldr	r3, [sp, #12]
 802c064:	3307      	adds	r3, #7
 802c066:	f023 0307 	bic.w	r3, r3, #7
 802c06a:	3308      	adds	r3, #8
 802c06c:	9303      	str	r3, [sp, #12]
 802c06e:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802c070:	443b      	add	r3, r7
 802c072:	9309      	str	r3, [sp, #36]	@ 0x24
 802c074:	e76a      	b.n	802bf4c <_vfiprintf_r+0x78>
 802c076:	fb0c 3202 	mla	r2, ip, r2, r3
 802c07a:	460c      	mov	r4, r1
 802c07c:	2001      	movs	r0, #1
 802c07e:	e7a8      	b.n	802bfd2 <_vfiprintf_r+0xfe>
 802c080:	2300      	movs	r3, #0
 802c082:	3401      	adds	r4, #1
 802c084:	9305      	str	r3, [sp, #20]
 802c086:	4619      	mov	r1, r3
 802c088:	f04f 0c0a 	mov.w	ip, #10
 802c08c:	4620      	mov	r0, r4
 802c08e:	f810 2b01 	ldrb.w	r2, [r0], #1
 802c092:	3a30      	subs	r2, #48	@ 0x30
 802c094:	2a09      	cmp	r2, #9
 802c096:	d903      	bls.n	802c0a0 <_vfiprintf_r+0x1cc>
 802c098:	2b00      	cmp	r3, #0
 802c09a:	d0c6      	beq.n	802c02a <_vfiprintf_r+0x156>
 802c09c:	9105      	str	r1, [sp, #20]
 802c09e:	e7c4      	b.n	802c02a <_vfiprintf_r+0x156>
 802c0a0:	fb0c 2101 	mla	r1, ip, r1, r2
 802c0a4:	4604      	mov	r4, r0
 802c0a6:	2301      	movs	r3, #1
 802c0a8:	e7f0      	b.n	802c08c <_vfiprintf_r+0x1b8>
 802c0aa:	ab03      	add	r3, sp, #12
 802c0ac:	9300      	str	r3, [sp, #0]
 802c0ae:	462a      	mov	r2, r5
 802c0b0:	4b12      	ldr	r3, [pc, #72]	@ (802c0fc <_vfiprintf_r+0x228>)
 802c0b2:	a904      	add	r1, sp, #16
 802c0b4:	4630      	mov	r0, r6
 802c0b6:	f7fd f827 	bl	8029108 <_printf_float>
 802c0ba:	4607      	mov	r7, r0
 802c0bc:	1c78      	adds	r0, r7, #1
 802c0be:	d1d6      	bne.n	802c06e <_vfiprintf_r+0x19a>
 802c0c0:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802c0c2:	07d9      	lsls	r1, r3, #31
 802c0c4:	d405      	bmi.n	802c0d2 <_vfiprintf_r+0x1fe>
 802c0c6:	89ab      	ldrh	r3, [r5, #12]
 802c0c8:	059a      	lsls	r2, r3, #22
 802c0ca:	d402      	bmi.n	802c0d2 <_vfiprintf_r+0x1fe>
 802c0cc:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802c0ce:	f7fd ff0d 	bl	8029eec <__retarget_lock_release_recursive>
 802c0d2:	89ab      	ldrh	r3, [r5, #12]
 802c0d4:	065b      	lsls	r3, r3, #25
 802c0d6:	f53f af1f 	bmi.w	802bf18 <_vfiprintf_r+0x44>
 802c0da:	9809      	ldr	r0, [sp, #36]	@ 0x24
 802c0dc:	e71e      	b.n	802bf1c <_vfiprintf_r+0x48>
 802c0de:	ab03      	add	r3, sp, #12
 802c0e0:	9300      	str	r3, [sp, #0]
 802c0e2:	462a      	mov	r2, r5
 802c0e4:	4b05      	ldr	r3, [pc, #20]	@ (802c0fc <_vfiprintf_r+0x228>)
 802c0e6:	a904      	add	r1, sp, #16
 802c0e8:	4630      	mov	r0, r6
 802c0ea:	f7fd fa95 	bl	8029618 <_printf_i>
 802c0ee:	e7e4      	b.n	802c0ba <_vfiprintf_r+0x1e6>
 802c0f0:	080310e8 	.word	0x080310e8
 802c0f4:	080310f2 	.word	0x080310f2
 802c0f8:	08029109 	.word	0x08029109
 802c0fc:	0802beaf 	.word	0x0802beaf
 802c100:	080310ee 	.word	0x080310ee

0802c104 <__sflush_r>:
 802c104:	f9b1 200c 	ldrsh.w	r2, [r1, #12]
 802c108:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802c10c:	0716      	lsls	r6, r2, #28
 802c10e:	4605      	mov	r5, r0
 802c110:	460c      	mov	r4, r1
 802c112:	d454      	bmi.n	802c1be <__sflush_r+0xba>
 802c114:	684b      	ldr	r3, [r1, #4]
 802c116:	2b00      	cmp	r3, #0
 802c118:	dc02      	bgt.n	802c120 <__sflush_r+0x1c>
 802c11a:	6c0b      	ldr	r3, [r1, #64]	@ 0x40
 802c11c:	2b00      	cmp	r3, #0
 802c11e:	dd48      	ble.n	802c1b2 <__sflush_r+0xae>
 802c120:	6ae6      	ldr	r6, [r4, #44]	@ 0x2c
 802c122:	2e00      	cmp	r6, #0
 802c124:	d045      	beq.n	802c1b2 <__sflush_r+0xae>
 802c126:	2300      	movs	r3, #0
 802c128:	f412 5280 	ands.w	r2, r2, #4096	@ 0x1000
 802c12c:	682f      	ldr	r7, [r5, #0]
 802c12e:	6a21      	ldr	r1, [r4, #32]
 802c130:	602b      	str	r3, [r5, #0]
 802c132:	d030      	beq.n	802c196 <__sflush_r+0x92>
 802c134:	6d62      	ldr	r2, [r4, #84]	@ 0x54
 802c136:	89a3      	ldrh	r3, [r4, #12]
 802c138:	0759      	lsls	r1, r3, #29
 802c13a:	d505      	bpl.n	802c148 <__sflush_r+0x44>
 802c13c:	6863      	ldr	r3, [r4, #4]
 802c13e:	1ad2      	subs	r2, r2, r3
 802c140:	6b63      	ldr	r3, [r4, #52]	@ 0x34
 802c142:	b10b      	cbz	r3, 802c148 <__sflush_r+0x44>
 802c144:	6c23      	ldr	r3, [r4, #64]	@ 0x40
 802c146:	1ad2      	subs	r2, r2, r3
 802c148:	2300      	movs	r3, #0
 802c14a:	6ae6      	ldr	r6, [r4, #44]	@ 0x2c
 802c14c:	6a21      	ldr	r1, [r4, #32]
 802c14e:	4628      	mov	r0, r5
 802c150:	47b0      	blx	r6
 802c152:	1c43      	adds	r3, r0, #1
 802c154:	89a3      	ldrh	r3, [r4, #12]
 802c156:	d106      	bne.n	802c166 <__sflush_r+0x62>
 802c158:	6829      	ldr	r1, [r5, #0]
 802c15a:	291d      	cmp	r1, #29
 802c15c:	d82b      	bhi.n	802c1b6 <__sflush_r+0xb2>
 802c15e:	4a2a      	ldr	r2, [pc, #168]	@ (802c208 <__sflush_r+0x104>)
 802c160:	410a      	asrs	r2, r1
 802c162:	07d6      	lsls	r6, r2, #31
 802c164:	d427      	bmi.n	802c1b6 <__sflush_r+0xb2>
 802c166:	2200      	movs	r2, #0
 802c168:	6062      	str	r2, [r4, #4]
 802c16a:	04d9      	lsls	r1, r3, #19
 802c16c:	6922      	ldr	r2, [r4, #16]
 802c16e:	6022      	str	r2, [r4, #0]
 802c170:	d504      	bpl.n	802c17c <__sflush_r+0x78>
 802c172:	1c42      	adds	r2, r0, #1
 802c174:	d101      	bne.n	802c17a <__sflush_r+0x76>
 802c176:	682b      	ldr	r3, [r5, #0]
 802c178:	b903      	cbnz	r3, 802c17c <__sflush_r+0x78>
 802c17a:	6560      	str	r0, [r4, #84]	@ 0x54
 802c17c:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 802c17e:	602f      	str	r7, [r5, #0]
 802c180:	b1b9      	cbz	r1, 802c1b2 <__sflush_r+0xae>
 802c182:	f104 0344 	add.w	r3, r4, #68	@ 0x44
 802c186:	4299      	cmp	r1, r3
 802c188:	d002      	beq.n	802c190 <__sflush_r+0x8c>
 802c18a:	4628      	mov	r0, r5
 802c18c:	f7fe fcc6 	bl	802ab1c <_free_r>
 802c190:	2300      	movs	r3, #0
 802c192:	6363      	str	r3, [r4, #52]	@ 0x34
 802c194:	e00d      	b.n	802c1b2 <__sflush_r+0xae>
 802c196:	2301      	movs	r3, #1
 802c198:	4628      	mov	r0, r5
 802c19a:	47b0      	blx	r6
 802c19c:	4602      	mov	r2, r0
 802c19e:	1c50      	adds	r0, r2, #1
 802c1a0:	d1c9      	bne.n	802c136 <__sflush_r+0x32>
 802c1a2:	682b      	ldr	r3, [r5, #0]
 802c1a4:	2b00      	cmp	r3, #0
 802c1a6:	d0c6      	beq.n	802c136 <__sflush_r+0x32>
 802c1a8:	2b1d      	cmp	r3, #29
 802c1aa:	d001      	beq.n	802c1b0 <__sflush_r+0xac>
 802c1ac:	2b16      	cmp	r3, #22
 802c1ae:	d11e      	bne.n	802c1ee <__sflush_r+0xea>
 802c1b0:	602f      	str	r7, [r5, #0]
 802c1b2:	2000      	movs	r0, #0
 802c1b4:	e022      	b.n	802c1fc <__sflush_r+0xf8>
 802c1b6:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802c1ba:	b21b      	sxth	r3, r3
 802c1bc:	e01b      	b.n	802c1f6 <__sflush_r+0xf2>
 802c1be:	690f      	ldr	r7, [r1, #16]
 802c1c0:	2f00      	cmp	r7, #0
 802c1c2:	d0f6      	beq.n	802c1b2 <__sflush_r+0xae>
 802c1c4:	0793      	lsls	r3, r2, #30
 802c1c6:	680e      	ldr	r6, [r1, #0]
 802c1c8:	bf08      	it	eq
 802c1ca:	694b      	ldreq	r3, [r1, #20]
 802c1cc:	600f      	str	r7, [r1, #0]
 802c1ce:	bf18      	it	ne
 802c1d0:	2300      	movne	r3, #0
 802c1d2:	eba6 0807 	sub.w	r8, r6, r7
 802c1d6:	608b      	str	r3, [r1, #8]
 802c1d8:	f1b8 0f00 	cmp.w	r8, #0
 802c1dc:	dde9      	ble.n	802c1b2 <__sflush_r+0xae>
 802c1de:	6a21      	ldr	r1, [r4, #32]
 802c1e0:	6aa6      	ldr	r6, [r4, #40]	@ 0x28
 802c1e2:	4643      	mov	r3, r8
 802c1e4:	463a      	mov	r2, r7
 802c1e6:	4628      	mov	r0, r5
 802c1e8:	47b0      	blx	r6
 802c1ea:	2800      	cmp	r0, #0
 802c1ec:	dc08      	bgt.n	802c200 <__sflush_r+0xfc>
 802c1ee:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802c1f2:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802c1f6:	81a3      	strh	r3, [r4, #12]
 802c1f8:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802c1fc:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802c200:	4407      	add	r7, r0
 802c202:	eba8 0800 	sub.w	r8, r8, r0
 802c206:	e7e7      	b.n	802c1d8 <__sflush_r+0xd4>
 802c208:	dfbffffe 	.word	0xdfbffffe

0802c20c <_fflush_r>:
 802c20c:	b538      	push	{r3, r4, r5, lr}
 802c20e:	690b      	ldr	r3, [r1, #16]
 802c210:	4605      	mov	r5, r0
 802c212:	460c      	mov	r4, r1
 802c214:	b913      	cbnz	r3, 802c21c <_fflush_r+0x10>
 802c216:	2500      	movs	r5, #0
 802c218:	4628      	mov	r0, r5
 802c21a:	bd38      	pop	{r3, r4, r5, pc}
 802c21c:	b118      	cbz	r0, 802c226 <_fflush_r+0x1a>
 802c21e:	6a03      	ldr	r3, [r0, #32]
 802c220:	b90b      	cbnz	r3, 802c226 <_fflush_r+0x1a>
 802c222:	f7fd fba5 	bl	8029970 <__sinit>
 802c226:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802c22a:	2b00      	cmp	r3, #0
 802c22c:	d0f3      	beq.n	802c216 <_fflush_r+0xa>
 802c22e:	6e62      	ldr	r2, [r4, #100]	@ 0x64
 802c230:	07d0      	lsls	r0, r2, #31
 802c232:	d404      	bmi.n	802c23e <_fflush_r+0x32>
 802c234:	0599      	lsls	r1, r3, #22
 802c236:	d402      	bmi.n	802c23e <_fflush_r+0x32>
 802c238:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802c23a:	f7fd fe56 	bl	8029eea <__retarget_lock_acquire_recursive>
 802c23e:	4628      	mov	r0, r5
 802c240:	4621      	mov	r1, r4
 802c242:	f7ff ff5f 	bl	802c104 <__sflush_r>
 802c246:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 802c248:	07da      	lsls	r2, r3, #31
 802c24a:	4605      	mov	r5, r0
 802c24c:	d4e4      	bmi.n	802c218 <_fflush_r+0xc>
 802c24e:	89a3      	ldrh	r3, [r4, #12]
 802c250:	059b      	lsls	r3, r3, #22
 802c252:	d4e1      	bmi.n	802c218 <_fflush_r+0xc>
 802c254:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802c256:	f7fd fe49 	bl	8029eec <__retarget_lock_release_recursive>
 802c25a:	e7dd      	b.n	802c218 <_fflush_r+0xc>

0802c25c <fiprintf>:
 802c25c:	b40e      	push	{r1, r2, r3}
 802c25e:	b503      	push	{r0, r1, lr}
 802c260:	4601      	mov	r1, r0
 802c262:	ab03      	add	r3, sp, #12
 802c264:	4805      	ldr	r0, [pc, #20]	@ (802c27c <fiprintf+0x20>)
 802c266:	f853 2b04 	ldr.w	r2, [r3], #4
 802c26a:	6800      	ldr	r0, [r0, #0]
 802c26c:	9301      	str	r3, [sp, #4]
 802c26e:	f7ff fe31 	bl	802bed4 <_vfiprintf_r>
 802c272:	b002      	add	sp, #8
 802c274:	f85d eb04 	ldr.w	lr, [sp], #4
 802c278:	b003      	add	sp, #12
 802c27a:	4770      	bx	lr
 802c27c:	240001d4 	.word	0x240001d4

0802c280 <__swhatbuf_r>:
 802c280:	b570      	push	{r4, r5, r6, lr}
 802c282:	460c      	mov	r4, r1
 802c284:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802c288:	2900      	cmp	r1, #0
 802c28a:	b096      	sub	sp, #88	@ 0x58
 802c28c:	4615      	mov	r5, r2
 802c28e:	461e      	mov	r6, r3
 802c290:	da0d      	bge.n	802c2ae <__swhatbuf_r+0x2e>
 802c292:	89a3      	ldrh	r3, [r4, #12]
 802c294:	f013 0f80 	tst.w	r3, #128	@ 0x80
 802c298:	f04f 0100 	mov.w	r1, #0
 802c29c:	bf14      	ite	ne
 802c29e:	2340      	movne	r3, #64	@ 0x40
 802c2a0:	f44f 6380 	moveq.w	r3, #1024	@ 0x400
 802c2a4:	2000      	movs	r0, #0
 802c2a6:	6031      	str	r1, [r6, #0]
 802c2a8:	602b      	str	r3, [r5, #0]
 802c2aa:	b016      	add	sp, #88	@ 0x58
 802c2ac:	bd70      	pop	{r4, r5, r6, pc}
 802c2ae:	466a      	mov	r2, sp
 802c2b0:	f000 f848 	bl	802c344 <_fstat_r>
 802c2b4:	2800      	cmp	r0, #0
 802c2b6:	dbec      	blt.n	802c292 <__swhatbuf_r+0x12>
 802c2b8:	9901      	ldr	r1, [sp, #4]
 802c2ba:	f401 4170 	and.w	r1, r1, #61440	@ 0xf000
 802c2be:	f5a1 5300 	sub.w	r3, r1, #8192	@ 0x2000
 802c2c2:	4259      	negs	r1, r3
 802c2c4:	4159      	adcs	r1, r3
 802c2c6:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 802c2ca:	e7eb      	b.n	802c2a4 <__swhatbuf_r+0x24>

0802c2cc <__smakebuf_r>:
 802c2cc:	898b      	ldrh	r3, [r1, #12]
 802c2ce:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 802c2d0:	079d      	lsls	r5, r3, #30
 802c2d2:	4606      	mov	r6, r0
 802c2d4:	460c      	mov	r4, r1
 802c2d6:	d507      	bpl.n	802c2e8 <__smakebuf_r+0x1c>
 802c2d8:	f104 0347 	add.w	r3, r4, #71	@ 0x47
 802c2dc:	6023      	str	r3, [r4, #0]
 802c2de:	6123      	str	r3, [r4, #16]
 802c2e0:	2301      	movs	r3, #1
 802c2e2:	6163      	str	r3, [r4, #20]
 802c2e4:	b003      	add	sp, #12
 802c2e6:	bdf0      	pop	{r4, r5, r6, r7, pc}
 802c2e8:	ab01      	add	r3, sp, #4
 802c2ea:	466a      	mov	r2, sp
 802c2ec:	f7ff ffc8 	bl	802c280 <__swhatbuf_r>
 802c2f0:	9f00      	ldr	r7, [sp, #0]
 802c2f2:	4605      	mov	r5, r0
 802c2f4:	4639      	mov	r1, r7
 802c2f6:	4630      	mov	r0, r6
 802c2f8:	f7fb ffba 	bl	8028270 <_malloc_r>
 802c2fc:	b948      	cbnz	r0, 802c312 <__smakebuf_r+0x46>
 802c2fe:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802c302:	059a      	lsls	r2, r3, #22
 802c304:	d4ee      	bmi.n	802c2e4 <__smakebuf_r+0x18>
 802c306:	f023 0303 	bic.w	r3, r3, #3
 802c30a:	f043 0302 	orr.w	r3, r3, #2
 802c30e:	81a3      	strh	r3, [r4, #12]
 802c310:	e7e2      	b.n	802c2d8 <__smakebuf_r+0xc>
 802c312:	89a3      	ldrh	r3, [r4, #12]
 802c314:	6020      	str	r0, [r4, #0]
 802c316:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802c31a:	81a3      	strh	r3, [r4, #12]
 802c31c:	9b01      	ldr	r3, [sp, #4]
 802c31e:	e9c4 0704 	strd	r0, r7, [r4, #16]
 802c322:	b15b      	cbz	r3, 802c33c <__smakebuf_r+0x70>
 802c324:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 802c328:	4630      	mov	r0, r6
 802c32a:	f000 f81d 	bl	802c368 <_isatty_r>
 802c32e:	b128      	cbz	r0, 802c33c <__smakebuf_r+0x70>
 802c330:	89a3      	ldrh	r3, [r4, #12]
 802c332:	f023 0303 	bic.w	r3, r3, #3
 802c336:	f043 0301 	orr.w	r3, r3, #1
 802c33a:	81a3      	strh	r3, [r4, #12]
 802c33c:	89a3      	ldrh	r3, [r4, #12]
 802c33e:	431d      	orrs	r5, r3
 802c340:	81a5      	strh	r5, [r4, #12]
 802c342:	e7cf      	b.n	802c2e4 <__smakebuf_r+0x18>

0802c344 <_fstat_r>:
 802c344:	b538      	push	{r3, r4, r5, lr}
 802c346:	4d07      	ldr	r5, [pc, #28]	@ (802c364 <_fstat_r+0x20>)
 802c348:	2300      	movs	r3, #0
 802c34a:	4604      	mov	r4, r0
 802c34c:	4608      	mov	r0, r1
 802c34e:	4611      	mov	r1, r2
 802c350:	602b      	str	r3, [r5, #0]
 802c352:	f7d7 fc43 	bl	8003bdc <_fstat>
 802c356:	1c43      	adds	r3, r0, #1
 802c358:	d102      	bne.n	802c360 <_fstat_r+0x1c>
 802c35a:	682b      	ldr	r3, [r5, #0]
 802c35c:	b103      	cbz	r3, 802c360 <_fstat_r+0x1c>
 802c35e:	6023      	str	r3, [r4, #0]
 802c360:	bd38      	pop	{r3, r4, r5, pc}
 802c362:	bf00      	nop
 802c364:	2402b180 	.word	0x2402b180

0802c368 <_isatty_r>:
 802c368:	b538      	push	{r3, r4, r5, lr}
 802c36a:	4d06      	ldr	r5, [pc, #24]	@ (802c384 <_isatty_r+0x1c>)
 802c36c:	2300      	movs	r3, #0
 802c36e:	4604      	mov	r4, r0
 802c370:	4608      	mov	r0, r1
 802c372:	602b      	str	r3, [r5, #0]
 802c374:	f7d7 fc42 	bl	8003bfc <_isatty>
 802c378:	1c43      	adds	r3, r0, #1
 802c37a:	d102      	bne.n	802c382 <_isatty_r+0x1a>
 802c37c:	682b      	ldr	r3, [r5, #0]
 802c37e:	b103      	cbz	r3, 802c382 <_isatty_r+0x1a>
 802c380:	6023      	str	r3, [r4, #0]
 802c382:	bd38      	pop	{r3, r4, r5, pc}
 802c384:	2402b180 	.word	0x2402b180

0802c388 <abort>:
 802c388:	b508      	push	{r3, lr}
 802c38a:	2006      	movs	r0, #6
 802c38c:	f000 f840 	bl	802c410 <raise>
 802c390:	2001      	movs	r0, #1
 802c392:	f7d7 fbd3 	bl	8003b3c <_exit>

0802c396 <_calloc_r>:
 802c396:	b570      	push	{r4, r5, r6, lr}
 802c398:	fba1 5402 	umull	r5, r4, r1, r2
 802c39c:	b93c      	cbnz	r4, 802c3ae <_calloc_r+0x18>
 802c39e:	4629      	mov	r1, r5
 802c3a0:	f7fb ff66 	bl	8028270 <_malloc_r>
 802c3a4:	4606      	mov	r6, r0
 802c3a6:	b928      	cbnz	r0, 802c3b4 <_calloc_r+0x1e>
 802c3a8:	2600      	movs	r6, #0
 802c3aa:	4630      	mov	r0, r6
 802c3ac:	bd70      	pop	{r4, r5, r6, pc}
 802c3ae:	220c      	movs	r2, #12
 802c3b0:	6002      	str	r2, [r0, #0]
 802c3b2:	e7f9      	b.n	802c3a8 <_calloc_r+0x12>
 802c3b4:	462a      	mov	r2, r5
 802c3b6:	4621      	mov	r1, r4
 802c3b8:	f7fd fca2 	bl	8029d00 <memset>
 802c3bc:	e7f5      	b.n	802c3aa <_calloc_r+0x14>

0802c3be <_raise_r>:
 802c3be:	291f      	cmp	r1, #31
 802c3c0:	b538      	push	{r3, r4, r5, lr}
 802c3c2:	4605      	mov	r5, r0
 802c3c4:	460c      	mov	r4, r1
 802c3c6:	d904      	bls.n	802c3d2 <_raise_r+0x14>
 802c3c8:	2316      	movs	r3, #22
 802c3ca:	6003      	str	r3, [r0, #0]
 802c3cc:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802c3d0:	bd38      	pop	{r3, r4, r5, pc}
 802c3d2:	6bc2      	ldr	r2, [r0, #60]	@ 0x3c
 802c3d4:	b112      	cbz	r2, 802c3dc <_raise_r+0x1e>
 802c3d6:	f852 3021 	ldr.w	r3, [r2, r1, lsl #2]
 802c3da:	b94b      	cbnz	r3, 802c3f0 <_raise_r+0x32>
 802c3dc:	4628      	mov	r0, r5
 802c3de:	f000 f831 	bl	802c444 <_getpid_r>
 802c3e2:	4622      	mov	r2, r4
 802c3e4:	4601      	mov	r1, r0
 802c3e6:	4628      	mov	r0, r5
 802c3e8:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 802c3ec:	f000 b818 	b.w	802c420 <_kill_r>
 802c3f0:	2b01      	cmp	r3, #1
 802c3f2:	d00a      	beq.n	802c40a <_raise_r+0x4c>
 802c3f4:	1c59      	adds	r1, r3, #1
 802c3f6:	d103      	bne.n	802c400 <_raise_r+0x42>
 802c3f8:	2316      	movs	r3, #22
 802c3fa:	6003      	str	r3, [r0, #0]
 802c3fc:	2001      	movs	r0, #1
 802c3fe:	e7e7      	b.n	802c3d0 <_raise_r+0x12>
 802c400:	2100      	movs	r1, #0
 802c402:	f842 1024 	str.w	r1, [r2, r4, lsl #2]
 802c406:	4620      	mov	r0, r4
 802c408:	4798      	blx	r3
 802c40a:	2000      	movs	r0, #0
 802c40c:	e7e0      	b.n	802c3d0 <_raise_r+0x12>
	...

0802c410 <raise>:
 802c410:	4b02      	ldr	r3, [pc, #8]	@ (802c41c <raise+0xc>)
 802c412:	4601      	mov	r1, r0
 802c414:	6818      	ldr	r0, [r3, #0]
 802c416:	f7ff bfd2 	b.w	802c3be <_raise_r>
 802c41a:	bf00      	nop
 802c41c:	240001d4 	.word	0x240001d4

0802c420 <_kill_r>:
 802c420:	b538      	push	{r3, r4, r5, lr}
 802c422:	4d07      	ldr	r5, [pc, #28]	@ (802c440 <_kill_r+0x20>)
 802c424:	2300      	movs	r3, #0
 802c426:	4604      	mov	r4, r0
 802c428:	4608      	mov	r0, r1
 802c42a:	4611      	mov	r1, r2
 802c42c:	602b      	str	r3, [r5, #0]
 802c42e:	f7d7 fb73 	bl	8003b18 <_kill>
 802c432:	1c43      	adds	r3, r0, #1
 802c434:	d102      	bne.n	802c43c <_kill_r+0x1c>
 802c436:	682b      	ldr	r3, [r5, #0]
 802c438:	b103      	cbz	r3, 802c43c <_kill_r+0x1c>
 802c43a:	6023      	str	r3, [r4, #0]
 802c43c:	bd38      	pop	{r3, r4, r5, pc}
 802c43e:	bf00      	nop
 802c440:	2402b180 	.word	0x2402b180

0802c444 <_getpid_r>:
 802c444:	f7d7 bb5f 	b.w	8003b06 <_getpid>

0802c448 <_init>:
 802c448:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802c44a:	bf00      	nop
 802c44c:	bcf8      	pop	{r3, r4, r5, r6, r7}
 802c44e:	bc08      	pop	{r3}
 802c450:	469e      	mov	lr, r3
 802c452:	4770      	bx	lr

0802c454 <_fini>:
 802c454:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802c456:	bf00      	nop
 802c458:	bcf8      	pop	{r3, r4, r5, r6, r7}
 802c45a:	bc08      	pop	{r3}
 802c45c:	469e      	mov	lr, r3
 802c45e:	4770      	bx	lr