| 1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218521952205221522252235224522552265227522852295230523152325233523452355236523752385239524052415242524352445245524652475248524952505251525252535254525552565257525852595260526152625263526452655266526752685269527052715272527352745275527652775278527952805281528252835284528552865287528852895290529152925293529452955296529752985299530053015302530353045305530653075308530953105311531253135314531553165317531853195320532153225323532453255326532753285329533053315332533353345335533653375338533953405341534253435344534553465347534853495350535153525353535453555356535753585359536053615362536353645365536653675368536953705371537253735374537553765377537853795380538153825383538453855386538753885389539053915392539353945395539653975398539954005401540254035404540554065407540854095410541154125413541454155416541754185419542054215422542354245425542654275428542954305431543254335434543554365437543854395440544154425443544454455446544754485449545054515452545354545455545654575458545954605461546254635464546554665467546854695470547154725473547454755476547754785479548054815482548354845485548654875488548954905491549254935494549554965497549854995500550155025503550455055506550755085509551055115512551355145515551655175518551955205521552255235524552555265527552855295530553155325533553455355536553755385539554055415542554355445545554655475548554955505551555255535554555555565557555855595560556155625563556455655566556755685569557055715572557355745575557655775578557955805581558255835584558555865587558855895590559155925593559455955596559755985599560056015602560356045605560656075608560956105611561256135614561556165617561856195620562156225623562456255626562756285629563056315632563356345635563656375638563956405641564256435644564556465647564856495650565156525653565456555656565756585659566056615662566356645665566656675668566956705671567256735674567556765677567856795680568156825683568456855686568756885689569056915692569356945695569656975698569957005701570257035704570557065707570857095710571157125713571457155716571757185719572057215722572357245725572657275728572957305731573257335734573557365737573857395740574157425743574457455746574757485749575057515752575357545755575657575758575957605761576257635764576557665767576857695770577157725773577457755776577757785779578057815782578357845785578657875788578957905791579257935794579557965797579857995800580158025803580458055806580758085809581058115812581358145815581658175818581958205821582258235824582558265827582858295830583158325833583458355836583758385839584058415842584358445845584658475848584958505851585258535854585558565857585858595860586158625863586458655866586758685869587058715872587358745875587658775878587958805881588258835884588558865887588858895890589158925893589458955896589758985899590059015902590359045905590659075908590959105911591259135914591559165917591859195920592159225923592459255926592759285929593059315932593359345935593659375938593959405941594259435944594559465947594859495950595159525953595459555956595759585959596059615962596359645965596659675968596959705971597259735974597559765977597859795980598159825983598459855986598759885989599059915992599359945995599659975998599960006001600260036004600560066007600860096010601160126013601460156016601760186019602060216022602360246025602660276028602960306031603260336034603560366037603860396040604160426043604460456046604760486049605060516052605360546055605660576058605960606061606260636064606560666067606860696070607160726073607460756076607760786079608060816082608360846085608660876088608960906091609260936094609560966097609860996100610161026103610461056106610761086109611061116112611361146115611661176118611961206121612261236124612561266127612861296130613161326133613461356136613761386139614061416142614361446145614661476148614961506151615261536154615561566157615861596160616161626163616461656166616761686169617061716172617361746175617661776178617961806181618261836184618561866187618861896190619161926193619461956196619761986199620062016202620362046205620662076208620962106211621262136214621562166217621862196220622162226223622462256226622762286229623062316232623362346235623662376238623962406241624262436244624562466247624862496250625162526253625462556256625762586259626062616262626362646265626662676268626962706271627262736274627562766277627862796280628162826283628462856286628762886289629062916292629362946295629662976298629963006301630263036304630563066307630863096310631163126313631463156316631763186319632063216322632363246325632663276328632963306331633263336334633563366337633863396340634163426343634463456346634763486349635063516352635363546355635663576358635963606361636263636364636563666367636863696370637163726373637463756376637763786379638063816382638363846385638663876388638963906391639263936394639563966397639863996400640164026403640464056406640764086409641064116412641364146415641664176418641964206421642264236424642564266427642864296430643164326433643464356436643764386439644064416442644364446445644664476448644964506451645264536454645564566457645864596460646164626463646464656466646764686469647064716472647364746475647664776478647964806481648264836484648564866487648864896490649164926493649464956496649764986499650065016502650365046505650665076508650965106511651265136514651565166517651865196520652165226523652465256526652765286529653065316532653365346535653665376538653965406541654265436544654565466547654865496550655165526553655465556556655765586559656065616562656365646565656665676568656965706571657265736574657565766577657865796580658165826583658465856586658765886589659065916592659365946595659665976598659966006601660266036604660566066607660866096610661166126613661466156616661766186619662066216622662366246625662666276628662966306631663266336634663566366637663866396640664166426643664466456646664766486649665066516652665366546655665666576658665966606661666266636664666566666667666866696670667166726673667466756676667766786679668066816682668366846685668666876688668966906691669266936694669566966697669866996700670167026703670467056706670767086709671067116712671367146715671667176718671967206721672267236724672567266727672867296730673167326733673467356736673767386739674067416742674367446745674667476748674967506751675267536754675567566757675867596760676167626763676467656766676767686769677067716772677367746775677667776778677967806781678267836784678567866787678867896790679167926793679467956796679767986799680068016802680368046805680668076808680968106811681268136814681568166817681868196820682168226823682468256826682768286829683068316832683368346835683668376838683968406841684268436844684568466847684868496850685168526853685468556856685768586859686068616862686368646865686668676868686968706871687268736874687568766877687868796880688168826883688468856886688768886889689068916892689368946895689668976898689969006901690269036904690569066907690869096910691169126913691469156916691769186919692069216922692369246925692669276928692969306931693269336934693569366937693869396940694169426943694469456946694769486949695069516952695369546955695669576958695969606961696269636964696569666967696869696970697169726973697469756976697769786979698069816982698369846985698669876988698969906991699269936994699569966997699869997000700170027003700470057006700770087009701070117012701370147015701670177018701970207021702270237024702570267027702870297030703170327033703470357036703770387039704070417042704370447045704670477048704970507051705270537054705570567057705870597060706170627063706470657066706770687069707070717072707370747075707670777078707970807081708270837084708570867087708870897090709170927093709470957096709770987099710071017102710371047105710671077108710971107111711271137114711571167117711871197120712171227123712471257126712771287129713071317132713371347135713671377138713971407141714271437144714571467147714871497150715171527153715471557156715771587159716071617162716371647165716671677168716971707171717271737174717571767177717871797180718171827183718471857186718771887189719071917192719371947195719671977198719972007201720272037204720572067207720872097210721172127213721472157216721772187219722072217222722372247225722672277228722972307231723272337234723572367237723872397240724172427243724472457246724772487249725072517252725372547255725672577258725972607261726272637264726572667267726872697270727172727273727472757276727772787279728072817282728372847285728672877288728972907291729272937294729572967297729872997300730173027303730473057306730773087309731073117312731373147315731673177318731973207321732273237324732573267327732873297330733173327333733473357336733773387339734073417342734373447345734673477348734973507351735273537354735573567357735873597360736173627363736473657366736773687369737073717372737373747375737673777378737973807381738273837384738573867387738873897390739173927393739473957396739773987399740074017402740374047405740674077408740974107411741274137414741574167417741874197420742174227423742474257426742774287429743074317432743374347435743674377438743974407441744274437444744574467447744874497450745174527453745474557456745774587459746074617462746374647465746674677468746974707471747274737474747574767477747874797480748174827483748474857486748774887489749074917492749374947495749674977498749975007501750275037504750575067507750875097510751175127513751475157516751775187519752075217522752375247525752675277528752975307531753275337534753575367537753875397540754175427543754475457546754775487549755075517552755375547555755675577558755975607561756275637564756575667567756875697570757175727573757475757576757775787579758075817582758375847585758675877588758975907591759275937594759575967597759875997600760176027603760476057606760776087609761076117612761376147615761676177618761976207621762276237624762576267627762876297630763176327633763476357636763776387639764076417642764376447645764676477648764976507651765276537654765576567657765876597660766176627663766476657666766776687669767076717672767376747675767676777678767976807681768276837684768576867687768876897690769176927693769476957696769776987699770077017702770377047705770677077708770977107711771277137714771577167717771877197720772177227723772477257726772777287729773077317732773377347735773677377738773977407741774277437744774577467747774877497750775177527753775477557756775777587759776077617762776377647765776677677768776977707771777277737774777577767777777877797780778177827783778477857786778777887789779077917792779377947795779677977798779978007801780278037804780578067807780878097810781178127813781478157816781778187819782078217822782378247825782678277828782978307831783278337834783578367837783878397840784178427843784478457846784778487849785078517852785378547855785678577858785978607861786278637864786578667867786878697870787178727873787478757876787778787879788078817882788378847885788678877888788978907891789278937894789578967897789878997900790179027903790479057906790779087909791079117912791379147915791679177918791979207921792279237924792579267927792879297930793179327933793479357936793779387939794079417942794379447945794679477948794979507951795279537954795579567957795879597960796179627963796479657966796779687969797079717972797379747975797679777978797979807981798279837984798579867987798879897990799179927993799479957996799779987999800080018002800380048005800680078008800980108011801280138014801580168017801880198020802180228023802480258026802780288029803080318032803380348035803680378038803980408041804280438044804580468047804880498050805180528053805480558056805780588059806080618062806380648065806680678068806980708071807280738074807580768077807880798080808180828083808480858086808780888089809080918092809380948095809680978098809981008101810281038104810581068107810881098110811181128113811481158116811781188119812081218122812381248125812681278128812981308131813281338134813581368137813881398140814181428143814481458146814781488149815081518152815381548155815681578158815981608161816281638164816581668167816881698170817181728173817481758176817781788179818081818182818381848185818681878188818981908191819281938194819581968197819881998200820182028203820482058206820782088209821082118212821382148215821682178218821982208221822282238224822582268227822882298230823182328233823482358236823782388239824082418242824382448245824682478248824982508251825282538254825582568257825882598260826182628263826482658266826782688269827082718272827382748275827682778278827982808281828282838284828582868287828882898290829182928293829482958296829782988299830083018302830383048305830683078308830983108311831283138314831583168317831883198320832183228323832483258326832783288329833083318332833383348335833683378338833983408341834283438344834583468347834883498350835183528353835483558356835783588359836083618362836383648365836683678368836983708371837283738374837583768377837883798380838183828383838483858386838783888389839083918392839383948395839683978398839984008401840284038404840584068407840884098410841184128413841484158416841784188419842084218422842384248425842684278428842984308431843284338434843584368437843884398440844184428443844484458446844784488449845084518452845384548455845684578458845984608461846284638464846584668467846884698470847184728473847484758476847784788479848084818482848384848485848684878488848984908491849284938494849584968497849884998500850185028503850485058506850785088509851085118512851385148515851685178518851985208521852285238524852585268527852885298530853185328533853485358536853785388539854085418542854385448545854685478548854985508551855285538554855585568557855885598560856185628563856485658566856785688569857085718572857385748575857685778578857985808581858285838584858585868587858885898590859185928593859485958596859785988599860086018602860386048605860686078608860986108611861286138614861586168617861886198620862186228623862486258626862786288629863086318632863386348635863686378638863986408641864286438644864586468647864886498650865186528653865486558656865786588659866086618662866386648665866686678668866986708671867286738674867586768677867886798680868186828683868486858686868786888689869086918692869386948695869686978698869987008701870287038704870587068707870887098710871187128713871487158716871787188719872087218722872387248725872687278728872987308731873287338734873587368737873887398740874187428743874487458746874787488749875087518752875387548755875687578758875987608761876287638764876587668767876887698770877187728773877487758776877787788779878087818782878387848785878687878788878987908791879287938794879587968797879887998800880188028803880488058806880788088809881088118812881388148815881688178818881988208821882288238824882588268827882888298830883188328833883488358836883788388839884088418842884388448845884688478848884988508851885288538854885588568857885888598860886188628863886488658866886788688869887088718872887388748875887688778878887988808881888288838884888588868887888888898890889188928893889488958896889788988899890089018902890389048905890689078908890989108911891289138914891589168917891889198920892189228923892489258926892789288929893089318932893389348935893689378938893989408941894289438944894589468947894889498950895189528953895489558956895789588959896089618962896389648965896689678968896989708971897289738974897589768977897889798980898189828983898489858986898789888989899089918992899389948995899689978998899990009001900290039004900590069007900890099010901190129013901490159016901790189019902090219022902390249025902690279028902990309031903290339034903590369037903890399040904190429043904490459046904790489049905090519052905390549055905690579058905990609061906290639064906590669067906890699070907190729073907490759076907790789079908090819082908390849085908690879088908990909091909290939094909590969097909890999100910191029103910491059106910791089109911091119112911391149115911691179118911991209121912291239124912591269127912891299130913191329133913491359136913791389139914091419142914391449145914691479148914991509151915291539154915591569157915891599160916191629163916491659166916791689169917091719172917391749175917691779178917991809181918291839184918591869187918891899190919191929193919491959196919791989199920092019202920392049205920692079208920992109211921292139214921592169217921892199220922192229223922492259226922792289229923092319232923392349235923692379238923992409241924292439244924592469247924892499250925192529253925492559256925792589259926092619262926392649265926692679268926992709271927292739274927592769277927892799280928192829283928492859286928792889289929092919292929392949295929692979298929993009301930293039304930593069307930893099310931193129313931493159316931793189319932093219322932393249325932693279328932993309331933293339334933593369337933893399340934193429343934493459346934793489349935093519352935393549355935693579358935993609361936293639364936593669367936893699370937193729373937493759376937793789379938093819382938393849385938693879388938993909391939293939394939593969397939893999400940194029403940494059406940794089409941094119412941394149415941694179418941994209421942294239424942594269427942894299430943194329433943494359436943794389439944094419442944394449445944694479448944994509451945294539454945594569457945894599460946194629463946494659466946794689469947094719472947394749475947694779478947994809481948294839484948594869487948894899490949194929493949494959496949794989499950095019502950395049505950695079508950995109511951295139514951595169517951895199520952195229523952495259526952795289529953095319532953395349535953695379538953995409541954295439544954595469547954895499550955195529553955495559556955795589559956095619562956395649565956695679568956995709571957295739574957595769577957895799580958195829583958495859586958795889589959095919592959395949595959695979598959996009601960296039604960596069607960896099610961196129613961496159616961796189619962096219622962396249625962696279628962996309631963296339634963596369637963896399640964196429643964496459646964796489649965096519652965396549655965696579658965996609661966296639664966596669667966896699670967196729673967496759676967796789679968096819682968396849685968696879688968996909691969296939694969596969697969896999700970197029703970497059706970797089709971097119712971397149715971697179718971997209721972297239724972597269727972897299730973197329733973497359736973797389739974097419742974397449745974697479748974997509751975297539754975597569757975897599760976197629763976497659766976797689769977097719772977397749775977697779778977997809781978297839784978597869787978897899790979197929793979497959796979797989799980098019802980398049805980698079808980998109811981298139814981598169817981898199820982198229823982498259826982798289829983098319832983398349835983698379838983998409841984298439844984598469847984898499850985198529853985498559856985798589859986098619862986398649865986698679868986998709871987298739874987598769877987898799880988198829883988498859886988798889889989098919892989398949895989698979898989999009901990299039904990599069907990899099910991199129913991499159916991799189919992099219922992399249925992699279928992999309931993299339934993599369937993899399940994199429943994499459946994799489949995099519952995399549955995699579958995999609961996299639964996599669967996899699970997199729973997499759976997799789979998099819982998399849985998699879988998999909991999299939994999599969997999899991000010001100021000310004100051000610007100081000910010100111001210013100141001510016100171001810019100201002110022100231002410025100261002710028100291003010031100321003310034100351003610037100381003910040100411004210043100441004510046100471004810049100501005110052100531005410055100561005710058100591006010061100621006310064100651006610067100681006910070100711007210073100741007510076100771007810079100801008110082100831008410085100861008710088100891009010091100921009310094100951009610097100981009910100101011010210103101041010510106101071010810109101101011110112101131011410115101161011710118101191012010121101221012310124101251012610127101281012910130101311013210133101341013510136101371013810139101401014110142101431014410145101461014710148101491015010151101521015310154101551015610157101581015910160101611016210163101641016510166101671016810169101701017110172101731017410175101761017710178101791018010181101821018310184101851018610187101881018910190101911019210193101941019510196101971019810199102001020110202102031020410205102061020710208102091021010211102121021310214102151021610217102181021910220102211022210223102241022510226102271022810229102301023110232102331023410235102361023710238102391024010241102421024310244102451024610247102481024910250102511025210253102541025510256102571025810259102601026110262102631026410265102661026710268102691027010271102721027310274102751027610277102781027910280102811028210283102841028510286102871028810289102901029110292102931029410295102961029710298102991030010301103021030310304103051030610307103081030910310103111031210313103141031510316103171031810319103201032110322103231032410325103261032710328103291033010331103321033310334103351033610337103381033910340103411034210343103441034510346103471034810349103501035110352103531035410355103561035710358103591036010361103621036310364103651036610367103681036910370103711037210373103741037510376103771037810379103801038110382103831038410385103861038710388103891039010391103921039310394103951039610397103981039910400104011040210403104041040510406104071040810409104101041110412104131041410415104161041710418104191042010421104221042310424104251042610427104281042910430104311043210433104341043510436104371043810439104401044110442104431044410445104461044710448104491045010451104521045310454104551045610457104581045910460104611046210463104641046510466104671046810469104701047110472104731047410475104761047710478104791048010481104821048310484104851048610487104881048910490104911049210493104941049510496104971049810499105001050110502105031050410505105061050710508105091051010511105121051310514105151051610517105181051910520105211052210523105241052510526105271052810529105301053110532105331053410535105361053710538105391054010541105421054310544105451054610547105481054910550105511055210553105541055510556105571055810559105601056110562105631056410565105661056710568105691057010571105721057310574105751057610577105781057910580105811058210583105841058510586105871058810589105901059110592105931059410595105961059710598105991060010601106021060310604106051060610607106081060910610106111061210613106141061510616106171061810619106201062110622106231062410625106261062710628106291063010631106321063310634106351063610637106381063910640106411064210643106441064510646106471064810649106501065110652106531065410655106561065710658106591066010661106621066310664106651066610667106681066910670106711067210673106741067510676106771067810679106801068110682106831068410685106861068710688106891069010691106921069310694106951069610697106981069910700107011070210703107041070510706107071070810709107101071110712107131071410715107161071710718107191072010721107221072310724107251072610727107281072910730107311073210733107341073510736107371073810739107401074110742107431074410745107461074710748107491075010751107521075310754107551075610757107581075910760107611076210763107641076510766107671076810769107701077110772107731077410775107761077710778107791078010781107821078310784107851078610787107881078910790107911079210793107941079510796107971079810799108001080110802108031080410805108061080710808108091081010811108121081310814108151081610817108181081910820108211082210823108241082510826108271082810829108301083110832108331083410835108361083710838108391084010841108421084310844108451084610847108481084910850108511085210853108541085510856108571085810859108601086110862108631086410865108661086710868108691087010871108721087310874108751087610877108781087910880108811088210883108841088510886108871088810889108901089110892108931089410895108961089710898108991090010901109021090310904109051090610907109081090910910109111091210913109141091510916109171091810919109201092110922109231092410925109261092710928109291093010931109321093310934109351093610937109381093910940109411094210943109441094510946109471094810949109501095110952109531095410955109561095710958109591096010961109621096310964109651096610967109681096910970109711097210973109741097510976109771097810979109801098110982109831098410985109861098710988109891099010991109921099310994109951099610997109981099911000110011100211003110041100511006110071100811009110101101111012110131101411015110161101711018110191102011021110221102311024110251102611027110281102911030110311103211033110341103511036110371103811039110401104111042110431104411045110461104711048110491105011051110521105311054110551105611057110581105911060110611106211063110641106511066110671106811069110701107111072110731107411075110761107711078110791108011081110821108311084110851108611087110881108911090110911109211093110941109511096110971109811099111001110111102111031110411105111061110711108111091111011111111121111311114111151111611117111181111911120111211112211123111241112511126111271112811129111301113111132111331113411135111361113711138111391114011141111421114311144111451114611147111481114911150111511115211153111541115511156111571115811159111601116111162111631116411165111661116711168111691117011171111721117311174111751117611177111781117911180111811118211183111841118511186111871118811189111901119111192111931119411195111961119711198111991120011201112021120311204112051120611207112081120911210112111121211213112141121511216112171121811219112201122111222112231122411225112261122711228112291123011231112321123311234112351123611237112381123911240112411124211243112441124511246112471124811249112501125111252112531125411255112561125711258112591126011261112621126311264112651126611267112681126911270112711127211273112741127511276112771127811279112801128111282112831128411285112861128711288112891129011291112921129311294112951129611297112981129911300113011130211303113041130511306113071130811309113101131111312113131131411315113161131711318113191132011321113221132311324113251132611327113281132911330113311133211333113341133511336113371133811339113401134111342113431134411345113461134711348113491135011351113521135311354113551135611357113581135911360113611136211363113641136511366113671136811369113701137111372113731137411375113761137711378113791138011381113821138311384113851138611387113881138911390113911139211393113941139511396113971139811399114001140111402114031140411405114061140711408114091141011411114121141311414114151141611417114181141911420114211142211423114241142511426114271142811429114301143111432114331143411435114361143711438114391144011441114421144311444114451144611447114481144911450114511145211453114541145511456114571145811459114601146111462114631146411465114661146711468114691147011471114721147311474114751147611477114781147911480114811148211483114841148511486114871148811489114901149111492114931149411495114961149711498114991150011501115021150311504115051150611507115081150911510115111151211513115141151511516115171151811519115201152111522115231152411525115261152711528115291153011531115321153311534115351153611537115381153911540115411154211543115441154511546115471154811549115501155111552115531155411555115561155711558115591156011561115621156311564115651156611567115681156911570115711157211573115741157511576115771157811579115801158111582115831158411585115861158711588115891159011591115921159311594115951159611597115981159911600116011160211603116041160511606116071160811609116101161111612116131161411615116161161711618116191162011621116221162311624116251162611627116281162911630116311163211633116341163511636116371163811639116401164111642116431164411645116461164711648116491165011651116521165311654116551165611657116581165911660116611166211663116641166511666116671166811669116701167111672116731167411675116761167711678116791168011681116821168311684116851168611687116881168911690116911169211693116941169511696116971169811699117001170111702117031170411705117061170711708117091171011711117121171311714117151171611717117181171911720117211172211723117241172511726117271172811729117301173111732117331173411735117361173711738117391174011741117421174311744117451174611747117481174911750117511175211753117541175511756117571175811759117601176111762117631176411765117661176711768117691177011771117721177311774117751177611777117781177911780117811178211783117841178511786117871178811789117901179111792117931179411795117961179711798117991180011801118021180311804118051180611807118081180911810118111181211813118141181511816118171181811819118201182111822118231182411825118261182711828118291183011831118321183311834118351183611837118381183911840118411184211843118441184511846118471184811849118501185111852118531185411855118561185711858118591186011861118621186311864118651186611867118681186911870118711187211873118741187511876118771187811879118801188111882118831188411885118861188711888118891189011891118921189311894118951189611897118981189911900119011190211903119041190511906119071190811909119101191111912119131191411915119161191711918119191192011921119221192311924119251192611927119281192911930119311193211933119341193511936119371193811939119401194111942119431194411945119461194711948119491195011951119521195311954119551195611957119581195911960119611196211963119641196511966119671196811969119701197111972119731197411975119761197711978119791198011981119821198311984119851198611987119881198911990119911199211993119941199511996119971199811999120001200112002120031200412005120061200712008120091201012011120121201312014120151201612017120181201912020120211202212023120241202512026120271202812029120301203112032120331203412035120361203712038120391204012041120421204312044120451204612047120481204912050120511205212053120541205512056120571205812059120601206112062120631206412065120661206712068120691207012071120721207312074120751207612077120781207912080120811208212083120841208512086120871208812089120901209112092120931209412095120961209712098120991210012101121021210312104121051210612107121081210912110121111211212113121141211512116121171211812119121201212112122121231212412125121261212712128121291213012131121321213312134121351213612137121381213912140121411214212143121441214512146121471214812149121501215112152121531215412155121561215712158121591216012161121621216312164121651216612167121681216912170121711217212173121741217512176121771217812179121801218112182121831218412185121861218712188121891219012191121921219312194121951219612197121981219912200122011220212203122041220512206122071220812209122101221112212122131221412215122161221712218122191222012221122221222312224122251222612227122281222912230122311223212233122341223512236122371223812239122401224112242122431224412245122461224712248122491225012251122521225312254122551225612257122581225912260122611226212263122641226512266122671226812269122701227112272122731227412275122761227712278122791228012281122821228312284122851228612287122881228912290122911229212293122941229512296122971229812299123001230112302123031230412305123061230712308123091231012311123121231312314123151231612317123181231912320123211232212323123241232512326123271232812329123301233112332123331233412335123361233712338123391234012341123421234312344123451234612347123481234912350123511235212353123541235512356123571235812359123601236112362123631236412365123661236712368123691237012371123721237312374123751237612377123781237912380123811238212383123841238512386123871238812389123901239112392123931239412395123961239712398123991240012401124021240312404124051240612407124081240912410124111241212413124141241512416124171241812419124201242112422124231242412425124261242712428124291243012431124321243312434124351243612437124381243912440124411244212443124441244512446124471244812449124501245112452124531245412455124561245712458124591246012461124621246312464124651246612467124681246912470124711247212473124741247512476124771247812479124801248112482124831248412485124861248712488124891249012491124921249312494124951249612497124981249912500125011250212503125041250512506125071250812509125101251112512125131251412515125161251712518125191252012521125221252312524125251252612527125281252912530125311253212533125341253512536125371253812539125401254112542125431254412545125461254712548125491255012551125521255312554125551255612557125581255912560125611256212563125641256512566125671256812569125701257112572125731257412575125761257712578125791258012581125821258312584125851258612587125881258912590125911259212593125941259512596125971259812599126001260112602126031260412605126061260712608126091261012611126121261312614126151261612617126181261912620126211262212623126241262512626126271262812629126301263112632126331263412635126361263712638126391264012641126421264312644126451264612647126481264912650126511265212653126541265512656126571265812659126601266112662126631266412665126661266712668126691267012671126721267312674126751267612677126781267912680126811268212683126841268512686126871268812689126901269112692126931269412695126961269712698126991270012701127021270312704127051270612707127081270912710127111271212713127141271512716127171271812719127201272112722127231272412725127261272712728127291273012731127321273312734127351273612737127381273912740127411274212743127441274512746127471274812749127501275112752127531275412755127561275712758127591276012761127621276312764127651276612767127681276912770127711277212773127741277512776127771277812779127801278112782127831278412785127861278712788127891279012791127921279312794127951279612797127981279912800128011280212803128041280512806128071280812809128101281112812128131281412815128161281712818128191282012821128221282312824128251282612827128281282912830128311283212833128341283512836128371283812839128401284112842128431284412845128461284712848128491285012851128521285312854128551285612857128581285912860128611286212863128641286512866128671286812869128701287112872128731287412875128761287712878128791288012881128821288312884128851288612887128881288912890128911289212893128941289512896128971289812899129001290112902129031290412905129061290712908129091291012911129121291312914129151291612917129181291912920129211292212923129241292512926129271292812929129301293112932129331293412935129361293712938129391294012941129421294312944129451294612947129481294912950129511295212953129541295512956129571295812959129601296112962129631296412965129661296712968129691297012971129721297312974129751297612977129781297912980129811298212983129841298512986129871298812989129901299112992129931299412995129961299712998129991300013001130021300313004130051300613007130081300913010130111301213013130141301513016130171301813019130201302113022130231302413025130261302713028130291303013031130321303313034130351303613037130381303913040130411304213043130441304513046130471304813049130501305113052130531305413055130561305713058130591306013061130621306313064130651306613067130681306913070130711307213073130741307513076130771307813079130801308113082130831308413085130861308713088130891309013091130921309313094130951309613097130981309913100131011310213103131041310513106131071310813109131101311113112131131311413115131161311713118131191312013121131221312313124131251312613127131281312913130131311313213133131341313513136131371313813139131401314113142131431314413145131461314713148131491315013151131521315313154131551315613157131581315913160131611316213163131641316513166131671316813169131701317113172131731317413175131761317713178131791318013181131821318313184131851318613187131881318913190131911319213193131941319513196131971319813199132001320113202132031320413205132061320713208132091321013211132121321313214132151321613217132181321913220132211322213223132241322513226132271322813229132301323113232132331323413235132361323713238132391324013241132421324313244132451324613247132481324913250132511325213253132541325513256132571325813259132601326113262132631326413265132661326713268132691327013271132721327313274132751327613277132781327913280132811328213283132841328513286132871328813289132901329113292132931329413295132961329713298132991330013301133021330313304133051330613307133081330913310133111331213313133141331513316133171331813319133201332113322133231332413325133261332713328133291333013331133321333313334133351333613337133381333913340133411334213343133441334513346133471334813349133501335113352133531335413355133561335713358133591336013361133621336313364133651336613367133681336913370133711337213373133741337513376133771337813379133801338113382133831338413385133861338713388133891339013391133921339313394133951339613397133981339913400134011340213403134041340513406134071340813409134101341113412134131341413415134161341713418134191342013421134221342313424134251342613427134281342913430134311343213433134341343513436134371343813439134401344113442134431344413445134461344713448134491345013451134521345313454134551345613457134581345913460134611346213463134641346513466134671346813469134701347113472134731347413475134761347713478134791348013481134821348313484134851348613487134881348913490134911349213493134941349513496134971349813499135001350113502135031350413505135061350713508135091351013511135121351313514135151351613517135181351913520135211352213523135241352513526135271352813529135301353113532135331353413535135361353713538135391354013541135421354313544135451354613547135481354913550135511355213553135541355513556135571355813559135601356113562135631356413565135661356713568135691357013571135721357313574135751357613577135781357913580135811358213583135841358513586135871358813589135901359113592135931359413595135961359713598135991360013601136021360313604136051360613607136081360913610136111361213613136141361513616136171361813619136201362113622136231362413625136261362713628136291363013631136321363313634136351363613637136381363913640136411364213643136441364513646136471364813649136501365113652136531365413655136561365713658136591366013661136621366313664136651366613667136681366913670136711367213673136741367513676136771367813679136801368113682136831368413685136861368713688136891369013691136921369313694136951369613697136981369913700137011370213703137041370513706137071370813709137101371113712137131371413715137161371713718137191372013721137221372313724137251372613727137281372913730137311373213733137341373513736137371373813739137401374113742137431374413745137461374713748137491375013751137521375313754137551375613757137581375913760137611376213763137641376513766137671376813769137701377113772137731377413775137761377713778137791378013781137821378313784137851378613787137881378913790137911379213793137941379513796137971379813799138001380113802138031380413805138061380713808138091381013811138121381313814138151381613817138181381913820138211382213823138241382513826138271382813829138301383113832138331383413835138361383713838138391384013841138421384313844138451384613847138481384913850138511385213853138541385513856138571385813859138601386113862138631386413865138661386713868138691387013871138721387313874138751387613877138781387913880138811388213883138841388513886138871388813889138901389113892138931389413895138961389713898138991390013901139021390313904139051390613907139081390913910139111391213913139141391513916139171391813919139201392113922139231392413925139261392713928139291393013931139321393313934139351393613937139381393913940139411394213943139441394513946139471394813949139501395113952139531395413955139561395713958139591396013961139621396313964139651396613967139681396913970139711397213973139741397513976139771397813979139801398113982139831398413985139861398713988139891399013991139921399313994139951399613997139981399914000140011400214003140041400514006140071400814009140101401114012140131401414015140161401714018140191402014021140221402314024140251402614027140281402914030140311403214033140341403514036140371403814039140401404114042140431404414045140461404714048140491405014051140521405314054140551405614057140581405914060140611406214063140641406514066140671406814069140701407114072140731407414075140761407714078140791408014081140821408314084140851408614087140881408914090140911409214093140941409514096140971409814099141001410114102141031410414105141061410714108141091411014111141121411314114141151411614117141181411914120141211412214123141241412514126141271412814129141301413114132141331413414135141361413714138141391414014141141421414314144141451414614147141481414914150141511415214153141541415514156141571415814159141601416114162141631416414165141661416714168141691417014171141721417314174141751417614177141781417914180141811418214183141841418514186141871418814189141901419114192141931419414195141961419714198141991420014201142021420314204142051420614207142081420914210142111421214213142141421514216142171421814219142201422114222142231422414225142261422714228142291423014231142321423314234142351423614237142381423914240142411424214243142441424514246142471424814249142501425114252142531425414255142561425714258142591426014261142621426314264142651426614267142681426914270142711427214273142741427514276142771427814279142801428114282142831428414285142861428714288142891429014291142921429314294142951429614297142981429914300143011430214303143041430514306143071430814309143101431114312143131431414315143161431714318143191432014321143221432314324143251432614327143281432914330143311433214333143341433514336143371433814339143401434114342143431434414345143461434714348143491435014351143521435314354143551435614357143581435914360143611436214363143641436514366143671436814369143701437114372143731437414375143761437714378143791438014381143821438314384143851438614387143881438914390143911439214393143941439514396143971439814399144001440114402144031440414405144061440714408144091441014411144121441314414144151441614417144181441914420144211442214423144241442514426144271442814429144301443114432144331443414435144361443714438144391444014441144421444314444144451444614447144481444914450144511445214453144541445514456144571445814459144601446114462144631446414465144661446714468144691447014471144721447314474144751447614477144781447914480144811448214483144841448514486144871448814489144901449114492144931449414495144961449714498144991450014501145021450314504145051450614507145081450914510145111451214513145141451514516145171451814519145201452114522145231452414525145261452714528145291453014531145321453314534145351453614537145381453914540145411454214543145441454514546145471454814549145501455114552145531455414555145561455714558145591456014561145621456314564145651456614567145681456914570145711457214573145741457514576145771457814579145801458114582145831458414585145861458714588145891459014591145921459314594145951459614597145981459914600146011460214603146041460514606146071460814609146101461114612146131461414615146161461714618146191462014621146221462314624146251462614627146281462914630146311463214633146341463514636146371463814639146401464114642146431464414645146461464714648146491465014651146521465314654146551465614657146581465914660146611466214663146641466514666146671466814669146701467114672146731467414675146761467714678146791468014681146821468314684146851468614687146881468914690146911469214693146941469514696146971469814699147001470114702147031470414705147061470714708147091471014711147121471314714147151471614717147181471914720147211472214723147241472514726147271472814729147301473114732147331473414735147361473714738147391474014741147421474314744147451474614747147481474914750147511475214753147541475514756147571475814759147601476114762147631476414765147661476714768147691477014771147721477314774147751477614777147781477914780147811478214783147841478514786147871478814789147901479114792147931479414795147961479714798147991480014801148021480314804148051480614807148081480914810148111481214813148141481514816148171481814819148201482114822148231482414825148261482714828148291483014831148321483314834148351483614837148381483914840148411484214843148441484514846148471484814849148501485114852148531485414855148561485714858148591486014861148621486314864148651486614867148681486914870148711487214873148741487514876148771487814879148801488114882148831488414885148861488714888148891489014891148921489314894148951489614897148981489914900149011490214903149041490514906149071490814909149101491114912149131491414915149161491714918149191492014921149221492314924149251492614927149281492914930149311493214933149341493514936149371493814939149401494114942149431494414945149461494714948149491495014951149521495314954149551495614957149581495914960149611496214963149641496514966149671496814969149701497114972149731497414975149761497714978149791498014981149821498314984149851498614987149881498914990149911499214993149941499514996149971499814999150001500115002150031500415005150061500715008150091501015011150121501315014150151501615017150181501915020150211502215023150241502515026150271502815029150301503115032150331503415035150361503715038150391504015041150421504315044150451504615047150481504915050150511505215053150541505515056150571505815059150601506115062150631506415065150661506715068150691507015071150721507315074150751507615077150781507915080150811508215083150841508515086150871508815089150901509115092150931509415095150961509715098150991510015101151021510315104151051510615107151081510915110151111511215113151141511515116151171511815119151201512115122151231512415125151261512715128151291513015131151321513315134151351513615137151381513915140151411514215143151441514515146151471514815149151501515115152151531515415155151561515715158151591516015161151621516315164151651516615167151681516915170151711517215173151741517515176151771517815179151801518115182151831518415185151861518715188151891519015191151921519315194151951519615197151981519915200152011520215203152041520515206152071520815209152101521115212152131521415215152161521715218152191522015221152221522315224152251522615227152281522915230152311523215233152341523515236152371523815239152401524115242152431524415245152461524715248152491525015251152521525315254152551525615257152581525915260152611526215263152641526515266152671526815269152701527115272152731527415275152761527715278152791528015281152821528315284152851528615287152881528915290152911529215293152941529515296152971529815299153001530115302153031530415305153061530715308153091531015311153121531315314153151531615317153181531915320153211532215323153241532515326153271532815329153301533115332153331533415335153361533715338153391534015341153421534315344153451534615347153481534915350153511535215353153541535515356153571535815359153601536115362153631536415365153661536715368153691537015371153721537315374153751537615377153781537915380153811538215383153841538515386153871538815389153901539115392153931539415395153961539715398153991540015401154021540315404154051540615407154081540915410154111541215413154141541515416154171541815419154201542115422154231542415425154261542715428154291543015431154321543315434154351543615437154381543915440154411544215443154441544515446154471544815449154501545115452154531545415455154561545715458154591546015461154621546315464154651546615467154681546915470154711547215473154741547515476154771547815479154801548115482154831548415485154861548715488154891549015491154921549315494154951549615497154981549915500155011550215503155041550515506155071550815509155101551115512155131551415515155161551715518155191552015521155221552315524155251552615527155281552915530155311553215533155341553515536155371553815539155401554115542155431554415545155461554715548155491555015551155521555315554155551555615557155581555915560155611556215563155641556515566155671556815569155701557115572155731557415575155761557715578155791558015581155821558315584155851558615587155881558915590155911559215593155941559515596155971559815599156001560115602156031560415605156061560715608156091561015611156121561315614156151561615617156181561915620156211562215623156241562515626156271562815629156301563115632156331563415635156361563715638156391564015641156421564315644156451564615647156481564915650156511565215653156541565515656156571565815659156601566115662156631566415665156661566715668156691567015671156721567315674156751567615677156781567915680156811568215683156841568515686156871568815689156901569115692156931569415695156961569715698156991570015701157021570315704157051570615707157081570915710157111571215713157141571515716157171571815719157201572115722157231572415725157261572715728157291573015731157321573315734157351573615737157381573915740157411574215743157441574515746157471574815749157501575115752157531575415755157561575715758157591576015761157621576315764157651576615767157681576915770157711577215773157741577515776157771577815779157801578115782157831578415785157861578715788157891579015791157921579315794157951579615797157981579915800158011580215803158041580515806158071580815809158101581115812158131581415815158161581715818158191582015821158221582315824158251582615827158281582915830158311583215833158341583515836158371583815839158401584115842158431584415845158461584715848158491585015851158521585315854158551585615857158581585915860158611586215863158641586515866158671586815869158701587115872158731587415875158761587715878158791588015881158821588315884158851588615887158881588915890158911589215893158941589515896158971589815899159001590115902159031590415905159061590715908159091591015911159121591315914159151591615917159181591915920159211592215923159241592515926159271592815929159301593115932159331593415935159361593715938159391594015941159421594315944159451594615947159481594915950159511595215953159541595515956159571595815959159601596115962159631596415965159661596715968159691597015971159721597315974159751597615977159781597915980159811598215983159841598515986159871598815989159901599115992159931599415995159961599715998159991600016001160021600316004160051600616007160081600916010160111601216013160141601516016160171601816019160201602116022160231602416025160261602716028160291603016031160321603316034160351603616037160381603916040160411604216043160441604516046160471604816049160501605116052160531605416055160561605716058160591606016061160621606316064160651606616067160681606916070160711607216073160741607516076160771607816079160801608116082160831608416085160861608716088160891609016091160921609316094160951609616097160981609916100161011610216103161041610516106161071610816109161101611116112161131611416115161161611716118161191612016121161221612316124161251612616127161281612916130161311613216133161341613516136161371613816139161401614116142161431614416145161461614716148161491615016151161521615316154161551615616157161581615916160161611616216163161641616516166161671616816169161701617116172161731617416175161761617716178161791618016181161821618316184161851618616187161881618916190161911619216193161941619516196161971619816199162001620116202162031620416205162061620716208162091621016211162121621316214162151621616217162181621916220162211622216223162241622516226162271622816229162301623116232162331623416235162361623716238162391624016241162421624316244162451624616247162481624916250162511625216253162541625516256162571625816259162601626116262162631626416265162661626716268162691627016271162721627316274162751627616277162781627916280162811628216283162841628516286162871628816289162901629116292162931629416295162961629716298162991630016301163021630316304163051630616307163081630916310163111631216313163141631516316163171631816319163201632116322163231632416325163261632716328163291633016331163321633316334163351633616337163381633916340163411634216343163441634516346163471634816349163501635116352163531635416355163561635716358163591636016361163621636316364163651636616367163681636916370163711637216373163741637516376163771637816379163801638116382163831638416385163861638716388163891639016391163921639316394163951639616397163981639916400164011640216403164041640516406164071640816409164101641116412164131641416415164161641716418164191642016421164221642316424164251642616427164281642916430164311643216433164341643516436164371643816439164401644116442164431644416445164461644716448164491645016451164521645316454164551645616457164581645916460164611646216463164641646516466164671646816469164701647116472164731647416475164761647716478164791648016481164821648316484164851648616487164881648916490164911649216493164941649516496164971649816499165001650116502165031650416505165061650716508165091651016511165121651316514165151651616517165181651916520165211652216523165241652516526165271652816529165301653116532165331653416535165361653716538165391654016541165421654316544165451654616547165481654916550165511655216553165541655516556165571655816559165601656116562165631656416565165661656716568165691657016571165721657316574165751657616577165781657916580165811658216583165841658516586165871658816589165901659116592165931659416595165961659716598165991660016601166021660316604166051660616607166081660916610166111661216613166141661516616166171661816619166201662116622166231662416625166261662716628166291663016631166321663316634166351663616637166381663916640166411664216643166441664516646166471664816649166501665116652166531665416655166561665716658166591666016661166621666316664166651666616667166681666916670166711667216673166741667516676166771667816679166801668116682166831668416685166861668716688166891669016691166921669316694166951669616697166981669916700167011670216703167041670516706167071670816709167101671116712167131671416715167161671716718167191672016721167221672316724167251672616727167281672916730167311673216733167341673516736167371673816739167401674116742167431674416745167461674716748167491675016751167521675316754167551675616757167581675916760167611676216763167641676516766167671676816769167701677116772167731677416775167761677716778167791678016781167821678316784167851678616787167881678916790167911679216793167941679516796167971679816799168001680116802168031680416805168061680716808168091681016811168121681316814168151681616817168181681916820168211682216823168241682516826168271682816829168301683116832168331683416835168361683716838168391684016841168421684316844168451684616847168481684916850168511685216853168541685516856168571685816859168601686116862168631686416865168661686716868168691687016871168721687316874168751687616877168781687916880168811688216883168841688516886168871688816889168901689116892168931689416895168961689716898168991690016901169021690316904169051690616907169081690916910169111691216913169141691516916169171691816919169201692116922169231692416925169261692716928169291693016931169321693316934169351693616937169381693916940169411694216943169441694516946169471694816949169501695116952169531695416955169561695716958169591696016961169621696316964169651696616967169681696916970169711697216973169741697516976169771697816979169801698116982169831698416985169861698716988169891699016991169921699316994169951699616997169981699917000170011700217003170041700517006170071700817009170101701117012170131701417015170161701717018170191702017021170221702317024170251702617027170281702917030170311703217033170341703517036170371703817039170401704117042170431704417045170461704717048170491705017051170521705317054170551705617057170581705917060170611706217063170641706517066170671706817069170701707117072170731707417075170761707717078170791708017081170821708317084170851708617087170881708917090170911709217093170941709517096170971709817099171001710117102171031710417105171061710717108171091711017111171121711317114171151711617117171181711917120171211712217123171241712517126171271712817129171301713117132171331713417135171361713717138171391714017141171421714317144171451714617147171481714917150171511715217153171541715517156171571715817159171601716117162171631716417165171661716717168171691717017171171721717317174171751717617177171781717917180171811718217183171841718517186171871718817189171901719117192171931719417195171961719717198171991720017201172021720317204172051720617207172081720917210172111721217213172141721517216172171721817219172201722117222172231722417225172261722717228172291723017231172321723317234172351723617237172381723917240172411724217243172441724517246172471724817249172501725117252172531725417255172561725717258172591726017261172621726317264172651726617267172681726917270172711727217273172741727517276172771727817279172801728117282172831728417285172861728717288172891729017291172921729317294172951729617297172981729917300173011730217303173041730517306173071730817309173101731117312173131731417315173161731717318173191732017321173221732317324173251732617327173281732917330173311733217333173341733517336173371733817339173401734117342173431734417345173461734717348173491735017351173521735317354173551735617357173581735917360173611736217363173641736517366173671736817369173701737117372173731737417375173761737717378173791738017381173821738317384173851738617387173881738917390173911739217393173941739517396173971739817399174001740117402174031740417405174061740717408174091741017411174121741317414174151741617417174181741917420174211742217423174241742517426174271742817429174301743117432174331743417435174361743717438174391744017441174421744317444174451744617447174481744917450174511745217453174541745517456174571745817459174601746117462174631746417465174661746717468174691747017471174721747317474174751747617477174781747917480174811748217483174841748517486174871748817489174901749117492174931749417495174961749717498174991750017501175021750317504175051750617507175081750917510175111751217513175141751517516175171751817519175201752117522175231752417525175261752717528175291753017531175321753317534175351753617537175381753917540175411754217543175441754517546175471754817549175501755117552175531755417555175561755717558175591756017561175621756317564175651756617567175681756917570175711757217573175741757517576175771757817579175801758117582175831758417585175861758717588175891759017591175921759317594175951759617597175981759917600176011760217603176041760517606176071760817609176101761117612176131761417615176161761717618176191762017621176221762317624176251762617627176281762917630176311763217633176341763517636176371763817639176401764117642176431764417645176461764717648176491765017651176521765317654176551765617657176581765917660176611766217663176641766517666176671766817669176701767117672176731767417675176761767717678176791768017681176821768317684176851768617687176881768917690176911769217693176941769517696176971769817699177001770117702177031770417705177061770717708177091771017711177121771317714177151771617717177181771917720177211772217723177241772517726177271772817729177301773117732177331773417735177361773717738177391774017741177421774317744177451774617747177481774917750177511775217753177541775517756177571775817759177601776117762177631776417765177661776717768177691777017771177721777317774177751777617777177781777917780177811778217783177841778517786177871778817789177901779117792177931779417795177961779717798177991780017801178021780317804178051780617807178081780917810178111781217813178141781517816178171781817819178201782117822178231782417825178261782717828178291783017831178321783317834178351783617837178381783917840178411784217843178441784517846178471784817849178501785117852178531785417855178561785717858178591786017861178621786317864178651786617867178681786917870178711787217873178741787517876178771787817879178801788117882178831788417885178861788717888178891789017891178921789317894178951789617897178981789917900179011790217903179041790517906179071790817909179101791117912179131791417915179161791717918179191792017921179221792317924179251792617927179281792917930179311793217933179341793517936179371793817939179401794117942179431794417945179461794717948179491795017951179521795317954179551795617957179581795917960179611796217963179641796517966179671796817969179701797117972179731797417975179761797717978179791798017981179821798317984179851798617987179881798917990179911799217993179941799517996179971799817999180001800118002180031800418005180061800718008180091801018011180121801318014180151801618017180181801918020180211802218023180241802518026180271802818029180301803118032180331803418035180361803718038180391804018041180421804318044180451804618047180481804918050180511805218053180541805518056180571805818059180601806118062180631806418065180661806718068180691807018071180721807318074180751807618077180781807918080180811808218083180841808518086180871808818089180901809118092180931809418095180961809718098180991810018101181021810318104181051810618107181081810918110181111811218113181141811518116181171811818119181201812118122181231812418125181261812718128181291813018131181321813318134181351813618137181381813918140181411814218143181441814518146181471814818149181501815118152181531815418155181561815718158181591816018161181621816318164181651816618167181681816918170181711817218173181741817518176181771817818179181801818118182181831818418185181861818718188181891819018191181921819318194181951819618197181981819918200182011820218203182041820518206182071820818209182101821118212182131821418215182161821718218182191822018221182221822318224182251822618227182281822918230182311823218233182341823518236182371823818239182401824118242182431824418245182461824718248182491825018251182521825318254182551825618257182581825918260182611826218263182641826518266182671826818269182701827118272182731827418275182761827718278182791828018281182821828318284182851828618287182881828918290182911829218293182941829518296182971829818299183001830118302183031830418305183061830718308183091831018311183121831318314183151831618317183181831918320183211832218323183241832518326183271832818329183301833118332183331833418335183361833718338183391834018341183421834318344183451834618347183481834918350183511835218353183541835518356183571835818359183601836118362183631836418365183661836718368183691837018371183721837318374183751837618377183781837918380183811838218383183841838518386183871838818389183901839118392183931839418395183961839718398183991840018401184021840318404184051840618407184081840918410184111841218413184141841518416184171841818419184201842118422184231842418425184261842718428184291843018431184321843318434184351843618437184381843918440184411844218443184441844518446184471844818449184501845118452184531845418455184561845718458184591846018461184621846318464184651846618467184681846918470184711847218473184741847518476184771847818479184801848118482184831848418485184861848718488184891849018491184921849318494184951849618497184981849918500185011850218503185041850518506185071850818509185101851118512185131851418515185161851718518185191852018521185221852318524185251852618527185281852918530185311853218533185341853518536185371853818539185401854118542185431854418545185461854718548185491855018551185521855318554185551855618557185581855918560185611856218563185641856518566185671856818569185701857118572185731857418575185761857718578185791858018581185821858318584185851858618587185881858918590185911859218593185941859518596185971859818599186001860118602186031860418605186061860718608186091861018611186121861318614186151861618617186181861918620186211862218623186241862518626186271862818629186301863118632186331863418635186361863718638186391864018641186421864318644186451864618647186481864918650186511865218653186541865518656186571865818659186601866118662186631866418665186661866718668186691867018671186721867318674186751867618677186781867918680186811868218683186841868518686186871868818689186901869118692186931869418695186961869718698186991870018701187021870318704187051870618707187081870918710187111871218713187141871518716187171871818719187201872118722187231872418725187261872718728187291873018731187321873318734187351873618737187381873918740187411874218743187441874518746187471874818749187501875118752187531875418755187561875718758187591876018761187621876318764187651876618767187681876918770187711877218773187741877518776187771877818779187801878118782187831878418785187861878718788187891879018791187921879318794187951879618797187981879918800188011880218803188041880518806188071880818809188101881118812188131881418815188161881718818188191882018821188221882318824188251882618827188281882918830188311883218833188341883518836188371883818839188401884118842188431884418845188461884718848188491885018851188521885318854188551885618857188581885918860188611886218863188641886518866188671886818869188701887118872188731887418875188761887718878188791888018881188821888318884188851888618887188881888918890188911889218893188941889518896188971889818899189001890118902189031890418905189061890718908189091891018911189121891318914189151891618917189181891918920189211892218923189241892518926189271892818929189301893118932189331893418935189361893718938189391894018941189421894318944189451894618947189481894918950189511895218953189541895518956189571895818959189601896118962189631896418965189661896718968189691897018971189721897318974189751897618977189781897918980189811898218983189841898518986189871898818989189901899118992189931899418995189961899718998189991900019001190021900319004190051900619007190081900919010190111901219013190141901519016190171901819019190201902119022190231902419025190261902719028190291903019031190321903319034190351903619037190381903919040190411904219043190441904519046190471904819049190501905119052190531905419055190561905719058190591906019061190621906319064190651906619067190681906919070190711907219073190741907519076190771907819079190801908119082190831908419085190861908719088190891909019091190921909319094190951909619097190981909919100191011910219103191041910519106191071910819109191101911119112191131911419115191161911719118191191912019121191221912319124191251912619127191281912919130191311913219133191341913519136191371913819139191401914119142191431914419145191461914719148191491915019151191521915319154191551915619157191581915919160191611916219163191641916519166191671916819169191701917119172191731917419175191761917719178191791918019181191821918319184191851918619187191881918919190191911919219193191941919519196191971919819199192001920119202192031920419205192061920719208192091921019211192121921319214192151921619217192181921919220192211922219223192241922519226192271922819229192301923119232192331923419235192361923719238192391924019241192421924319244192451924619247192481924919250192511925219253192541925519256192571925819259192601926119262192631926419265192661926719268192691927019271192721927319274192751927619277192781927919280192811928219283192841928519286192871928819289192901929119292192931929419295192961929719298192991930019301193021930319304193051930619307193081930919310193111931219313193141931519316193171931819319193201932119322193231932419325193261932719328193291933019331193321933319334193351933619337193381933919340193411934219343193441934519346193471934819349193501935119352193531935419355193561935719358193591936019361193621936319364193651936619367193681936919370193711937219373193741937519376193771937819379193801938119382193831938419385193861938719388193891939019391193921939319394193951939619397193981939919400194011940219403194041940519406194071940819409194101941119412194131941419415194161941719418194191942019421194221942319424194251942619427194281942919430194311943219433194341943519436194371943819439194401944119442194431944419445194461944719448194491945019451194521945319454194551945619457194581945919460194611946219463194641946519466194671946819469194701947119472194731947419475194761947719478194791948019481194821948319484194851948619487194881948919490194911949219493194941949519496194971949819499195001950119502195031950419505195061950719508195091951019511195121951319514195151951619517195181951919520195211952219523195241952519526195271952819529195301953119532195331953419535195361953719538195391954019541195421954319544195451954619547195481954919550195511955219553195541955519556195571955819559195601956119562195631956419565195661956719568195691957019571195721957319574195751957619577195781957919580195811958219583195841958519586195871958819589195901959119592195931959419595195961959719598195991960019601196021960319604196051960619607196081960919610196111961219613196141961519616196171961819619196201962119622196231962419625196261962719628196291963019631196321963319634196351963619637196381963919640196411964219643196441964519646196471964819649196501965119652196531965419655196561965719658196591966019661196621966319664196651966619667196681966919670196711967219673196741967519676196771967819679196801968119682196831968419685196861968719688196891969019691196921969319694196951969619697196981969919700197011970219703197041970519706197071970819709197101971119712197131971419715197161971719718197191972019721197221972319724197251972619727197281972919730197311973219733197341973519736197371973819739197401974119742197431974419745197461974719748197491975019751197521975319754197551975619757197581975919760197611976219763197641976519766197671976819769197701977119772197731977419775197761977719778197791978019781197821978319784197851978619787197881978919790197911979219793197941979519796197971979819799198001980119802198031980419805198061980719808198091981019811198121981319814198151981619817198181981919820198211982219823198241982519826198271982819829198301983119832198331983419835198361983719838198391984019841198421984319844198451984619847198481984919850198511985219853198541985519856198571985819859198601986119862198631986419865198661986719868198691987019871198721987319874198751987619877198781987919880198811988219883198841988519886198871988819889198901989119892198931989419895198961989719898198991990019901199021990319904199051990619907199081990919910199111991219913199141991519916199171991819919199201992119922199231992419925199261992719928199291993019931199321993319934199351993619937199381993919940199411994219943199441994519946199471994819949199501995119952199531995419955199561995719958199591996019961199621996319964199651996619967199681996919970199711997219973199741997519976199771997819979199801998119982199831998419985199861998719988199891999019991199921999319994199951999619997199981999920000200012000220003200042000520006200072000820009200102001120012200132001420015200162001720018200192002020021200222002320024200252002620027200282002920030200312003220033200342003520036200372003820039200402004120042200432004420045200462004720048200492005020051200522005320054200552005620057200582005920060200612006220063200642006520066200672006820069200702007120072200732007420075200762007720078200792008020081200822008320084200852008620087200882008920090200912009220093200942009520096200972009820099201002010120102201032010420105201062010720108201092011020111201122011320114201152011620117201182011920120201212012220123201242012520126201272012820129201302013120132201332013420135201362013720138201392014020141201422014320144201452014620147201482014920150201512015220153201542015520156201572015820159201602016120162201632016420165201662016720168201692017020171201722017320174201752017620177201782017920180201812018220183201842018520186201872018820189201902019120192201932019420195201962019720198201992020020201202022020320204202052020620207202082020920210202112021220213202142021520216202172021820219202202022120222202232022420225202262022720228202292023020231202322023320234202352023620237202382023920240202412024220243202442024520246202472024820249202502025120252202532025420255202562025720258202592026020261202622026320264202652026620267202682026920270202712027220273202742027520276202772027820279202802028120282202832028420285202862028720288202892029020291202922029320294202952029620297202982029920300203012030220303203042030520306203072030820309203102031120312203132031420315203162031720318203192032020321203222032320324203252032620327203282032920330203312033220333203342033520336203372033820339203402034120342203432034420345203462034720348203492035020351203522035320354203552035620357203582035920360203612036220363203642036520366203672036820369203702037120372203732037420375203762037720378203792038020381203822038320384203852038620387203882038920390203912039220393203942039520396203972039820399204002040120402204032040420405204062040720408204092041020411204122041320414204152041620417204182041920420204212042220423204242042520426204272042820429204302043120432204332043420435204362043720438204392044020441204422044320444204452044620447204482044920450204512045220453204542045520456204572045820459204602046120462204632046420465204662046720468204692047020471204722047320474204752047620477204782047920480204812048220483204842048520486204872048820489204902049120492204932049420495204962049720498204992050020501205022050320504205052050620507205082050920510205112051220513205142051520516205172051820519205202052120522205232052420525205262052720528205292053020531205322053320534205352053620537205382053920540205412054220543205442054520546205472054820549205502055120552205532055420555205562055720558205592056020561205622056320564205652056620567205682056920570205712057220573205742057520576205772057820579205802058120582205832058420585205862058720588205892059020591205922059320594205952059620597205982059920600206012060220603206042060520606206072060820609206102061120612206132061420615206162061720618206192062020621206222062320624206252062620627206282062920630206312063220633206342063520636206372063820639206402064120642206432064420645206462064720648206492065020651206522065320654206552065620657206582065920660206612066220663206642066520666206672066820669206702067120672206732067420675206762067720678206792068020681206822068320684206852068620687206882068920690206912069220693206942069520696206972069820699207002070120702207032070420705207062070720708207092071020711207122071320714207152071620717207182071920720207212072220723207242072520726207272072820729207302073120732207332073420735207362073720738207392074020741207422074320744207452074620747207482074920750207512075220753207542075520756207572075820759207602076120762207632076420765207662076720768207692077020771207722077320774207752077620777207782077920780207812078220783207842078520786207872078820789207902079120792207932079420795207962079720798207992080020801208022080320804208052080620807208082080920810208112081220813208142081520816208172081820819208202082120822208232082420825208262082720828208292083020831208322083320834208352083620837208382083920840208412084220843208442084520846208472084820849208502085120852208532085420855208562085720858208592086020861208622086320864208652086620867208682086920870208712087220873208742087520876208772087820879208802088120882208832088420885208862088720888208892089020891208922089320894208952089620897208982089920900209012090220903209042090520906209072090820909209102091120912209132091420915209162091720918209192092020921209222092320924209252092620927209282092920930209312093220933209342093520936209372093820939209402094120942209432094420945209462094720948209492095020951209522095320954209552095620957209582095920960209612096220963209642096520966209672096820969209702097120972209732097420975209762097720978209792098020981209822098320984209852098620987209882098920990209912099220993209942099520996209972099820999210002100121002210032100421005210062100721008210092101021011210122101321014210152101621017210182101921020210212102221023210242102521026210272102821029210302103121032210332103421035210362103721038210392104021041210422104321044210452104621047210482104921050210512105221053210542105521056210572105821059210602106121062210632106421065210662106721068210692107021071210722107321074210752107621077210782107921080210812108221083210842108521086210872108821089210902109121092210932109421095210962109721098210992110021101211022110321104211052110621107211082110921110211112111221113211142111521116211172111821119211202112121122211232112421125211262112721128211292113021131211322113321134211352113621137211382113921140211412114221143211442114521146211472114821149211502115121152211532115421155211562115721158211592116021161211622116321164211652116621167211682116921170211712117221173211742117521176211772117821179211802118121182211832118421185211862118721188211892119021191211922119321194211952119621197211982119921200212012120221203212042120521206212072120821209212102121121212212132121421215212162121721218212192122021221212222122321224212252122621227212282122921230212312123221233212342123521236212372123821239212402124121242212432124421245212462124721248212492125021251212522125321254212552125621257212582125921260212612126221263212642126521266212672126821269212702127121272212732127421275212762127721278212792128021281212822128321284212852128621287212882128921290212912129221293212942129521296212972129821299213002130121302213032130421305213062130721308213092131021311213122131321314213152131621317213182131921320213212132221323213242132521326213272132821329213302133121332213332133421335213362133721338213392134021341213422134321344213452134621347213482134921350213512135221353213542135521356213572135821359213602136121362213632136421365213662136721368213692137021371213722137321374213752137621377213782137921380213812138221383213842138521386213872138821389213902139121392213932139421395213962139721398213992140021401214022140321404214052140621407214082140921410214112141221413214142141521416214172141821419214202142121422214232142421425214262142721428214292143021431214322143321434214352143621437214382143921440214412144221443214442144521446214472144821449214502145121452214532145421455214562145721458214592146021461214622146321464214652146621467214682146921470214712147221473214742147521476214772147821479214802148121482214832148421485214862148721488214892149021491214922149321494214952149621497214982149921500215012150221503215042150521506215072150821509215102151121512215132151421515215162151721518215192152021521215222152321524215252152621527215282152921530215312153221533215342153521536215372153821539215402154121542215432154421545215462154721548215492155021551215522155321554215552155621557215582155921560215612156221563215642156521566215672156821569215702157121572215732157421575215762157721578215792158021581215822158321584215852158621587215882158921590215912159221593215942159521596215972159821599216002160121602216032160421605216062160721608216092161021611216122161321614216152161621617216182161921620216212162221623216242162521626216272162821629216302163121632216332163421635216362163721638216392164021641216422164321644216452164621647216482164921650216512165221653216542165521656216572165821659216602166121662216632166421665216662166721668216692167021671216722167321674216752167621677216782167921680216812168221683216842168521686216872168821689216902169121692216932169421695216962169721698216992170021701217022170321704217052170621707217082170921710217112171221713217142171521716217172171821719217202172121722217232172421725217262172721728217292173021731217322173321734217352173621737217382173921740217412174221743217442174521746217472174821749217502175121752217532175421755217562175721758217592176021761217622176321764217652176621767217682176921770217712177221773217742177521776217772177821779217802178121782217832178421785217862178721788217892179021791217922179321794217952179621797217982179921800218012180221803218042180521806218072180821809218102181121812218132181421815218162181721818218192182021821218222182321824218252182621827218282182921830218312183221833218342183521836218372183821839218402184121842218432184421845218462184721848218492185021851218522185321854218552185621857218582185921860218612186221863218642186521866218672186821869218702187121872218732187421875218762187721878218792188021881218822188321884218852188621887218882188921890218912189221893218942189521896218972189821899219002190121902219032190421905219062190721908219092191021911219122191321914219152191621917219182191921920219212192221923219242192521926219272192821929219302193121932219332193421935219362193721938219392194021941219422194321944219452194621947219482194921950219512195221953219542195521956219572195821959219602196121962219632196421965219662196721968219692197021971219722197321974219752197621977219782197921980219812198221983219842198521986219872198821989219902199121992219932199421995219962199721998219992200022001220022200322004220052200622007220082200922010220112201222013220142201522016220172201822019220202202122022220232202422025220262202722028220292203022031220322203322034220352203622037220382203922040220412204222043220442204522046220472204822049220502205122052220532205422055220562205722058220592206022061220622206322064220652206622067220682206922070220712207222073220742207522076220772207822079220802208122082220832208422085220862208722088220892209022091220922209322094220952209622097220982209922100221012210222103221042210522106221072210822109221102211122112221132211422115221162211722118221192212022121221222212322124221252212622127221282212922130221312213222133221342213522136221372213822139221402214122142221432214422145221462214722148221492215022151221522215322154221552215622157221582215922160221612216222163221642216522166221672216822169221702217122172221732217422175221762217722178221792218022181221822218322184221852218622187221882218922190221912219222193221942219522196221972219822199222002220122202222032220422205222062220722208222092221022211222122221322214222152221622217222182221922220222212222222223222242222522226222272222822229222302223122232222332223422235222362223722238222392224022241222422224322244222452224622247222482224922250222512225222253222542225522256222572225822259222602226122262222632226422265222662226722268222692227022271222722227322274222752227622277222782227922280222812228222283222842228522286222872228822289222902229122292222932229422295222962229722298222992230022301223022230322304223052230622307223082230922310223112231222313223142231522316223172231822319223202232122322223232232422325223262232722328223292233022331223322233322334223352233622337223382233922340223412234222343223442234522346223472234822349223502235122352223532235422355223562235722358223592236022361223622236322364223652236622367223682236922370223712237222373223742237522376223772237822379223802238122382223832238422385223862238722388223892239022391223922239322394223952239622397223982239922400224012240222403224042240522406224072240822409224102241122412224132241422415224162241722418224192242022421224222242322424224252242622427224282242922430224312243222433224342243522436224372243822439224402244122442224432244422445224462244722448224492245022451224522245322454224552245622457224582245922460224612246222463224642246522466224672246822469224702247122472224732247422475224762247722478224792248022481224822248322484224852248622487224882248922490224912249222493224942249522496224972249822499225002250122502225032250422505225062250722508225092251022511225122251322514225152251622517225182251922520225212252222523225242252522526225272252822529225302253122532225332253422535225362253722538225392254022541225422254322544225452254622547225482254922550225512255222553225542255522556225572255822559225602256122562225632256422565225662256722568225692257022571225722257322574225752257622577225782257922580225812258222583225842258522586225872258822589225902259122592225932259422595225962259722598225992260022601226022260322604226052260622607226082260922610226112261222613226142261522616226172261822619226202262122622226232262422625226262262722628226292263022631226322263322634226352263622637226382263922640226412264222643226442264522646226472264822649226502265122652226532265422655226562265722658226592266022661226622266322664226652266622667226682266922670226712267222673226742267522676226772267822679226802268122682226832268422685226862268722688226892269022691226922269322694226952269622697226982269922700227012270222703227042270522706227072270822709227102271122712227132271422715227162271722718227192272022721227222272322724227252272622727227282272922730227312273222733227342273522736227372273822739227402274122742227432274422745227462274722748227492275022751227522275322754227552275622757227582275922760227612276222763227642276522766227672276822769227702277122772227732277422775227762277722778227792278022781227822278322784227852278622787227882278922790227912279222793227942279522796227972279822799228002280122802228032280422805228062280722808228092281022811228122281322814228152281622817228182281922820228212282222823228242282522826228272282822829228302283122832228332283422835228362283722838228392284022841228422284322844228452284622847228482284922850228512285222853228542285522856228572285822859228602286122862228632286422865228662286722868228692287022871228722287322874228752287622877228782287922880228812288222883228842288522886228872288822889228902289122892228932289422895228962289722898228992290022901229022290322904229052290622907229082290922910229112291222913229142291522916229172291822919229202292122922229232292422925229262292722928229292293022931229322293322934229352293622937229382293922940229412294222943229442294522946229472294822949229502295122952229532295422955229562295722958229592296022961229622296322964229652296622967229682296922970229712297222973229742297522976229772297822979229802298122982229832298422985229862298722988229892299022991229922299322994229952299622997229982299923000230012300223003230042300523006230072300823009230102301123012230132301423015230162301723018230192302023021230222302323024230252302623027230282302923030230312303223033230342303523036230372303823039230402304123042230432304423045230462304723048230492305023051230522305323054230552305623057230582305923060230612306223063230642306523066230672306823069230702307123072230732307423075230762307723078230792308023081230822308323084230852308623087230882308923090230912309223093230942309523096230972309823099231002310123102231032310423105231062310723108231092311023111231122311323114231152311623117231182311923120231212312223123231242312523126231272312823129231302313123132231332313423135231362313723138231392314023141231422314323144231452314623147231482314923150231512315223153231542315523156231572315823159231602316123162231632316423165231662316723168231692317023171231722317323174231752317623177231782317923180231812318223183231842318523186231872318823189231902319123192231932319423195231962319723198231992320023201232022320323204232052320623207232082320923210232112321223213232142321523216232172321823219232202322123222232232322423225232262322723228232292323023231232322323323234232352323623237232382323923240232412324223243232442324523246232472324823249232502325123252232532325423255232562325723258232592326023261232622326323264232652326623267232682326923270232712327223273232742327523276232772327823279232802328123282232832328423285232862328723288232892329023291232922329323294232952329623297232982329923300233012330223303233042330523306233072330823309233102331123312233132331423315233162331723318233192332023321233222332323324233252332623327233282332923330233312333223333233342333523336233372333823339233402334123342233432334423345233462334723348233492335023351233522335323354233552335623357233582335923360233612336223363233642336523366233672336823369233702337123372233732337423375233762337723378233792338023381233822338323384233852338623387233882338923390233912339223393233942339523396233972339823399234002340123402234032340423405234062340723408234092341023411234122341323414234152341623417234182341923420234212342223423234242342523426234272342823429234302343123432234332343423435234362343723438234392344023441234422344323444234452344623447234482344923450234512345223453234542345523456234572345823459234602346123462234632346423465234662346723468234692347023471234722347323474234752347623477234782347923480234812348223483234842348523486234872348823489234902349123492234932349423495234962349723498234992350023501235022350323504235052350623507235082350923510235112351223513235142351523516235172351823519235202352123522235232352423525235262352723528235292353023531235322353323534235352353623537235382353923540235412354223543235442354523546235472354823549235502355123552235532355423555235562355723558235592356023561235622356323564235652356623567235682356923570235712357223573235742357523576235772357823579235802358123582235832358423585235862358723588235892359023591235922359323594235952359623597235982359923600236012360223603236042360523606236072360823609236102361123612236132361423615236162361723618236192362023621236222362323624236252362623627236282362923630236312363223633236342363523636236372363823639236402364123642236432364423645236462364723648236492365023651236522365323654236552365623657236582365923660236612366223663236642366523666236672366823669236702367123672236732367423675236762367723678236792368023681236822368323684236852368623687236882368923690236912369223693236942369523696236972369823699237002370123702237032370423705237062370723708237092371023711237122371323714237152371623717237182371923720237212372223723237242372523726237272372823729237302373123732237332373423735237362373723738237392374023741237422374323744237452374623747237482374923750237512375223753237542375523756237572375823759237602376123762237632376423765237662376723768237692377023771237722377323774237752377623777237782377923780237812378223783237842378523786237872378823789237902379123792237932379423795237962379723798237992380023801238022380323804238052380623807238082380923810238112381223813238142381523816238172381823819238202382123822238232382423825238262382723828238292383023831238322383323834238352383623837238382383923840238412384223843238442384523846238472384823849238502385123852238532385423855238562385723858238592386023861238622386323864238652386623867238682386923870238712387223873238742387523876238772387823879238802388123882238832388423885238862388723888238892389023891238922389323894238952389623897238982389923900239012390223903239042390523906239072390823909239102391123912239132391423915239162391723918239192392023921239222392323924239252392623927239282392923930239312393223933239342393523936239372393823939239402394123942239432394423945239462394723948239492395023951239522395323954239552395623957239582395923960239612396223963239642396523966239672396823969239702397123972239732397423975239762397723978239792398023981239822398323984239852398623987239882398923990239912399223993239942399523996239972399823999240002400124002240032400424005240062400724008240092401024011240122401324014240152401624017240182401924020240212402224023240242402524026240272402824029240302403124032240332403424035240362403724038240392404024041240422404324044240452404624047240482404924050240512405224053240542405524056240572405824059240602406124062240632406424065240662406724068240692407024071240722407324074240752407624077240782407924080240812408224083240842408524086240872408824089240902409124092240932409424095240962409724098240992410024101241022410324104241052410624107241082410924110241112411224113241142411524116241172411824119241202412124122241232412424125241262412724128241292413024131241322413324134241352413624137241382413924140241412414224143241442414524146241472414824149241502415124152241532415424155241562415724158241592416024161241622416324164241652416624167241682416924170241712417224173241742417524176241772417824179241802418124182241832418424185241862418724188241892419024191241922419324194241952419624197241982419924200242012420224203242042420524206242072420824209242102421124212242132421424215242162421724218242192422024221242222422324224242252422624227242282422924230242312423224233242342423524236242372423824239242402424124242242432424424245242462424724248242492425024251242522425324254242552425624257242582425924260242612426224263242642426524266242672426824269242702427124272242732427424275242762427724278242792428024281242822428324284242852428624287242882428924290242912429224293242942429524296242972429824299243002430124302243032430424305243062430724308243092431024311243122431324314243152431624317243182431924320243212432224323243242432524326243272432824329243302433124332243332433424335243362433724338243392434024341243422434324344243452434624347243482434924350243512435224353243542435524356243572435824359243602436124362243632436424365243662436724368243692437024371243722437324374243752437624377243782437924380243812438224383243842438524386243872438824389243902439124392243932439424395243962439724398243992440024401244022440324404244052440624407244082440924410244112441224413244142441524416244172441824419244202442124422244232442424425244262442724428244292443024431244322443324434244352443624437244382443924440244412444224443244442444524446244472444824449244502445124452244532445424455244562445724458244592446024461244622446324464244652446624467244682446924470244712447224473244742447524476244772447824479244802448124482244832448424485244862448724488244892449024491244922449324494244952449624497244982449924500245012450224503245042450524506245072450824509245102451124512245132451424515245162451724518245192452024521245222452324524245252452624527245282452924530245312453224533245342453524536245372453824539245402454124542245432454424545245462454724548245492455024551245522455324554245552455624557245582455924560245612456224563245642456524566245672456824569245702457124572245732457424575245762457724578245792458024581245822458324584245852458624587245882458924590245912459224593245942459524596245972459824599246002460124602246032460424605246062460724608246092461024611246122461324614246152461624617246182461924620246212462224623246242462524626246272462824629246302463124632246332463424635246362463724638246392464024641246422464324644246452464624647246482464924650246512465224653246542465524656246572465824659246602466124662246632466424665246662466724668246692467024671246722467324674246752467624677246782467924680246812468224683246842468524686246872468824689246902469124692246932469424695246962469724698246992470024701247022470324704247052470624707247082470924710247112471224713247142471524716247172471824719247202472124722247232472424725247262472724728247292473024731247322473324734247352473624737247382473924740247412474224743247442474524746247472474824749247502475124752247532475424755247562475724758247592476024761247622476324764247652476624767247682476924770247712477224773247742477524776247772477824779247802478124782247832478424785247862478724788247892479024791247922479324794247952479624797247982479924800248012480224803248042480524806248072480824809248102481124812248132481424815248162481724818248192482024821248222482324824248252482624827248282482924830248312483224833248342483524836248372483824839248402484124842248432484424845248462484724848248492485024851248522485324854248552485624857248582485924860248612486224863248642486524866248672486824869248702487124872248732487424875248762487724878248792488024881248822488324884248852488624887248882488924890248912489224893248942489524896248972489824899249002490124902249032490424905249062490724908249092491024911249122491324914249152491624917249182491924920249212492224923249242492524926249272492824929249302493124932249332493424935249362493724938249392494024941249422494324944249452494624947249482494924950249512495224953249542495524956249572495824959249602496124962249632496424965249662496724968249692497024971249722497324974249752497624977249782497924980249812498224983249842498524986249872498824989249902499124992249932499424995249962499724998249992500025001250022500325004250052500625007250082500925010250112501225013250142501525016250172501825019250202502125022250232502425025250262502725028250292503025031250322503325034250352503625037250382503925040250412504225043250442504525046250472504825049250502505125052250532505425055250562505725058250592506025061250622506325064250652506625067250682506925070250712507225073250742507525076250772507825079250802508125082250832508425085250862508725088250892509025091250922509325094250952509625097250982509925100251012510225103251042510525106251072510825109251102511125112251132511425115251162511725118251192512025121251222512325124251252512625127251282512925130251312513225133251342513525136251372513825139251402514125142251432514425145251462514725148251492515025151251522515325154251552515625157251582515925160251612516225163251642516525166251672516825169251702517125172251732517425175251762517725178251792518025181251822518325184251852518625187251882518925190251912519225193251942519525196251972519825199252002520125202252032520425205252062520725208252092521025211252122521325214252152521625217252182521925220252212522225223252242522525226252272522825229252302523125232252332523425235252362523725238252392524025241252422524325244252452524625247252482524925250252512525225253252542525525256252572525825259252602526125262252632526425265252662526725268252692527025271252722527325274252752527625277252782527925280252812528225283252842528525286252872528825289252902529125292252932529425295252962529725298252992530025301253022530325304253052530625307253082530925310253112531225313253142531525316253172531825319253202532125322253232532425325253262532725328253292533025331253322533325334253352533625337253382533925340253412534225343253442534525346253472534825349253502535125352253532535425355253562535725358253592536025361253622536325364253652536625367253682536925370253712537225373253742537525376253772537825379253802538125382253832538425385253862538725388253892539025391253922539325394253952539625397253982539925400254012540225403254042540525406254072540825409254102541125412254132541425415254162541725418254192542025421254222542325424254252542625427254282542925430254312543225433254342543525436254372543825439254402544125442254432544425445254462544725448254492545025451254522545325454254552545625457254582545925460254612546225463254642546525466254672546825469254702547125472254732547425475254762547725478254792548025481254822548325484254852548625487254882548925490254912549225493254942549525496254972549825499255002550125502255032550425505255062550725508255092551025511255122551325514255152551625517255182551925520255212552225523255242552525526255272552825529255302553125532255332553425535255362553725538255392554025541255422554325544255452554625547255482554925550255512555225553255542555525556255572555825559255602556125562255632556425565255662556725568255692557025571255722557325574255752557625577255782557925580255812558225583255842558525586255872558825589255902559125592255932559425595255962559725598255992560025601256022560325604256052560625607256082560925610256112561225613256142561525616256172561825619256202562125622256232562425625256262562725628256292563025631256322563325634256352563625637256382563925640256412564225643256442564525646256472564825649256502565125652256532565425655256562565725658256592566025661256622566325664256652566625667256682566925670256712567225673256742567525676256772567825679256802568125682256832568425685256862568725688256892569025691256922569325694256952569625697256982569925700257012570225703257042570525706257072570825709257102571125712257132571425715257162571725718257192572025721257222572325724257252572625727257282572925730257312573225733257342573525736257372573825739257402574125742257432574425745257462574725748257492575025751257522575325754257552575625757257582575925760257612576225763257642576525766257672576825769257702577125772257732577425775257762577725778257792578025781257822578325784257852578625787257882578925790257912579225793257942579525796257972579825799258002580125802258032580425805258062580725808258092581025811258122581325814258152581625817258182581925820258212582225823258242582525826258272582825829258302583125832258332583425835258362583725838258392584025841258422584325844258452584625847258482584925850258512585225853258542585525856258572585825859258602586125862258632586425865258662586725868258692587025871258722587325874258752587625877258782587925880258812588225883258842588525886258872588825889258902589125892258932589425895258962589725898258992590025901259022590325904259052590625907259082590925910259112591225913259142591525916259172591825919259202592125922259232592425925259262592725928259292593025931259322593325934259352593625937259382593925940259412594225943259442594525946259472594825949259502595125952259532595425955259562595725958259592596025961259622596325964259652596625967259682596925970259712597225973259742597525976259772597825979259802598125982259832598425985259862598725988259892599025991259922599325994259952599625997259982599926000260012600226003260042600526006260072600826009260102601126012260132601426015260162601726018260192602026021260222602326024260252602626027260282602926030260312603226033260342603526036260372603826039260402604126042260432604426045260462604726048260492605026051260522605326054260552605626057260582605926060260612606226063260642606526066260672606826069260702607126072260732607426075260762607726078260792608026081260822608326084260852608626087260882608926090260912609226093260942609526096260972609826099261002610126102261032610426105261062610726108261092611026111261122611326114261152611626117261182611926120261212612226123261242612526126261272612826129261302613126132261332613426135261362613726138261392614026141261422614326144261452614626147261482614926150261512615226153261542615526156261572615826159261602616126162261632616426165261662616726168261692617026171261722617326174261752617626177261782617926180261812618226183261842618526186261872618826189261902619126192261932619426195261962619726198261992620026201262022620326204262052620626207262082620926210262112621226213262142621526216262172621826219262202622126222262232622426225262262622726228262292623026231262322623326234262352623626237262382623926240262412624226243262442624526246262472624826249262502625126252262532625426255262562625726258262592626026261262622626326264262652626626267262682626926270262712627226273262742627526276262772627826279262802628126282262832628426285262862628726288262892629026291262922629326294262952629626297262982629926300263012630226303263042630526306263072630826309263102631126312263132631426315263162631726318263192632026321263222632326324263252632626327263282632926330263312633226333263342633526336263372633826339263402634126342263432634426345263462634726348263492635026351263522635326354263552635626357263582635926360263612636226363263642636526366263672636826369263702637126372263732637426375263762637726378263792638026381263822638326384263852638626387263882638926390263912639226393263942639526396263972639826399264002640126402264032640426405264062640726408264092641026411264122641326414264152641626417264182641926420264212642226423264242642526426264272642826429264302643126432264332643426435264362643726438264392644026441264422644326444264452644626447264482644926450264512645226453264542645526456264572645826459264602646126462264632646426465264662646726468264692647026471264722647326474264752647626477264782647926480264812648226483264842648526486264872648826489264902649126492264932649426495264962649726498264992650026501265022650326504265052650626507265082650926510265112651226513265142651526516265172651826519265202652126522265232652426525265262652726528265292653026531265322653326534265352653626537265382653926540265412654226543265442654526546265472654826549265502655126552265532655426555265562655726558265592656026561265622656326564265652656626567265682656926570265712657226573265742657526576265772657826579265802658126582265832658426585265862658726588265892659026591265922659326594265952659626597265982659926600266012660226603266042660526606266072660826609266102661126612266132661426615266162661726618266192662026621266222662326624266252662626627266282662926630266312663226633266342663526636266372663826639266402664126642266432664426645266462664726648266492665026651266522665326654266552665626657266582665926660266612666226663266642666526666266672666826669266702667126672266732667426675266762667726678266792668026681266822668326684266852668626687266882668926690266912669226693266942669526696266972669826699267002670126702267032670426705267062670726708267092671026711267122671326714267152671626717267182671926720267212672226723267242672526726267272672826729267302673126732267332673426735267362673726738267392674026741267422674326744267452674626747267482674926750267512675226753267542675526756267572675826759267602676126762267632676426765267662676726768267692677026771267722677326774267752677626777267782677926780267812678226783267842678526786267872678826789267902679126792267932679426795267962679726798267992680026801268022680326804268052680626807268082680926810268112681226813268142681526816268172681826819268202682126822268232682426825268262682726828268292683026831268322683326834268352683626837268382683926840268412684226843268442684526846268472684826849268502685126852268532685426855268562685726858268592686026861268622686326864268652686626867268682686926870268712687226873268742687526876268772687826879268802688126882268832688426885268862688726888268892689026891268922689326894268952689626897268982689926900269012690226903269042690526906269072690826909269102691126912269132691426915269162691726918269192692026921269222692326924269252692626927269282692926930269312693226933269342693526936269372693826939269402694126942269432694426945269462694726948269492695026951269522695326954269552695626957269582695926960269612696226963269642696526966269672696826969269702697126972269732697426975269762697726978269792698026981269822698326984269852698626987269882698926990269912699226993269942699526996269972699826999270002700127002270032700427005270062700727008270092701027011270122701327014270152701627017270182701927020270212702227023270242702527026270272702827029270302703127032270332703427035270362703727038270392704027041270422704327044270452704627047270482704927050270512705227053270542705527056270572705827059270602706127062270632706427065270662706727068270692707027071270722707327074270752707627077270782707927080270812708227083270842708527086270872708827089270902709127092270932709427095270962709727098270992710027101271022710327104271052710627107271082710927110271112711227113271142711527116271172711827119271202712127122271232712427125271262712727128271292713027131271322713327134271352713627137271382713927140271412714227143271442714527146271472714827149271502715127152271532715427155271562715727158271592716027161271622716327164271652716627167271682716927170271712717227173271742717527176271772717827179271802718127182271832718427185271862718727188271892719027191271922719327194271952719627197271982719927200272012720227203272042720527206272072720827209272102721127212272132721427215272162721727218272192722027221272222722327224272252722627227272282722927230272312723227233272342723527236272372723827239272402724127242272432724427245272462724727248272492725027251272522725327254272552725627257272582725927260272612726227263272642726527266272672726827269272702727127272272732727427275272762727727278272792728027281272822728327284272852728627287272882728927290272912729227293272942729527296272972729827299273002730127302273032730427305273062730727308273092731027311273122731327314273152731627317273182731927320273212732227323273242732527326273272732827329273302733127332273332733427335273362733727338273392734027341273422734327344273452734627347273482734927350273512735227353273542735527356273572735827359273602736127362273632736427365273662736727368273692737027371273722737327374273752737627377273782737927380273812738227383273842738527386273872738827389273902739127392273932739427395273962739727398273992740027401274022740327404274052740627407274082740927410274112741227413274142741527416274172741827419274202742127422274232742427425274262742727428274292743027431274322743327434274352743627437274382743927440274412744227443274442744527446274472744827449274502745127452274532745427455274562745727458274592746027461274622746327464274652746627467274682746927470274712747227473274742747527476274772747827479274802748127482274832748427485274862748727488274892749027491274922749327494274952749627497274982749927500275012750227503275042750527506275072750827509275102751127512275132751427515275162751727518275192752027521275222752327524275252752627527275282752927530275312753227533275342753527536275372753827539275402754127542275432754427545275462754727548275492755027551275522755327554275552755627557275582755927560275612756227563275642756527566275672756827569275702757127572275732757427575275762757727578275792758027581275822758327584275852758627587275882758927590275912759227593275942759527596275972759827599276002760127602276032760427605276062760727608276092761027611276122761327614276152761627617276182761927620276212762227623276242762527626276272762827629276302763127632276332763427635276362763727638276392764027641276422764327644276452764627647276482764927650276512765227653276542765527656276572765827659276602766127662276632766427665276662766727668276692767027671276722767327674276752767627677276782767927680276812768227683276842768527686276872768827689276902769127692276932769427695276962769727698276992770027701277022770327704277052770627707277082770927710277112771227713277142771527716277172771827719277202772127722277232772427725277262772727728277292773027731277322773327734277352773627737277382773927740277412774227743277442774527746277472774827749277502775127752277532775427755277562775727758277592776027761277622776327764277652776627767277682776927770277712777227773277742777527776277772777827779277802778127782277832778427785277862778727788277892779027791277922779327794277952779627797277982779927800278012780227803278042780527806278072780827809278102781127812278132781427815278162781727818278192782027821278222782327824278252782627827278282782927830278312783227833278342783527836278372783827839278402784127842278432784427845278462784727848278492785027851278522785327854278552785627857278582785927860278612786227863278642786527866278672786827869278702787127872278732787427875278762787727878278792788027881278822788327884278852788627887278882788927890278912789227893278942789527896278972789827899279002790127902279032790427905279062790727908279092791027911279122791327914279152791627917279182791927920279212792227923279242792527926279272792827929279302793127932279332793427935279362793727938279392794027941279422794327944279452794627947279482794927950279512795227953279542795527956279572795827959279602796127962279632796427965279662796727968279692797027971279722797327974279752797627977279782797927980279812798227983279842798527986279872798827989279902799127992279932799427995279962799727998279992800028001280022800328004280052800628007280082800928010280112801228013280142801528016280172801828019280202802128022280232802428025280262802728028280292803028031280322803328034280352803628037280382803928040280412804228043280442804528046280472804828049280502805128052280532805428055280562805728058280592806028061280622806328064280652806628067280682806928070280712807228073280742807528076280772807828079280802808128082280832808428085280862808728088280892809028091280922809328094280952809628097280982809928100281012810228103281042810528106281072810828109281102811128112281132811428115281162811728118281192812028121281222812328124281252812628127281282812928130281312813228133281342813528136281372813828139281402814128142281432814428145281462814728148281492815028151281522815328154281552815628157281582815928160281612816228163281642816528166281672816828169281702817128172281732817428175281762817728178281792818028181281822818328184281852818628187281882818928190281912819228193281942819528196281972819828199282002820128202282032820428205282062820728208282092821028211282122821328214282152821628217282182821928220282212822228223282242822528226282272822828229282302823128232282332823428235282362823728238282392824028241282422824328244282452824628247282482824928250282512825228253282542825528256282572825828259282602826128262282632826428265282662826728268282692827028271282722827328274282752827628277282782827928280282812828228283282842828528286282872828828289282902829128292282932829428295282962829728298282992830028301283022830328304283052830628307283082830928310283112831228313283142831528316283172831828319283202832128322283232832428325283262832728328283292833028331283322833328334283352833628337283382833928340283412834228343283442834528346283472834828349283502835128352283532835428355283562835728358283592836028361283622836328364283652836628367283682836928370283712837228373283742837528376283772837828379283802838128382283832838428385283862838728388283892839028391283922839328394283952839628397283982839928400284012840228403284042840528406284072840828409284102841128412284132841428415284162841728418284192842028421284222842328424284252842628427284282842928430284312843228433284342843528436284372843828439284402844128442284432844428445284462844728448284492845028451284522845328454284552845628457284582845928460284612846228463284642846528466284672846828469284702847128472284732847428475284762847728478284792848028481284822848328484284852848628487284882848928490284912849228493284942849528496284972849828499285002850128502285032850428505285062850728508285092851028511285122851328514285152851628517285182851928520285212852228523285242852528526285272852828529285302853128532285332853428535285362853728538285392854028541285422854328544285452854628547285482854928550285512855228553285542855528556285572855828559285602856128562285632856428565285662856728568285692857028571285722857328574285752857628577285782857928580285812858228583285842858528586285872858828589285902859128592285932859428595285962859728598285992860028601286022860328604286052860628607286082860928610286112861228613286142861528616286172861828619286202862128622286232862428625286262862728628286292863028631286322863328634286352863628637286382863928640286412864228643286442864528646286472864828649286502865128652286532865428655286562865728658286592866028661286622866328664286652866628667286682866928670286712867228673286742867528676286772867828679286802868128682286832868428685286862868728688286892869028691286922869328694286952869628697286982869928700287012870228703287042870528706287072870828709287102871128712287132871428715287162871728718287192872028721287222872328724287252872628727287282872928730287312873228733287342873528736287372873828739287402874128742287432874428745287462874728748287492875028751287522875328754287552875628757287582875928760287612876228763287642876528766287672876828769287702877128772287732877428775287762877728778287792878028781287822878328784287852878628787287882878928790287912879228793287942879528796287972879828799288002880128802288032880428805288062880728808288092881028811288122881328814288152881628817288182881928820288212882228823288242882528826288272882828829288302883128832288332883428835288362883728838288392884028841288422884328844288452884628847288482884928850288512885228853288542885528856288572885828859288602886128862288632886428865288662886728868288692887028871288722887328874288752887628877288782887928880288812888228883288842888528886288872888828889288902889128892288932889428895288962889728898288992890028901289022890328904289052890628907289082890928910289112891228913289142891528916289172891828919289202892128922289232892428925289262892728928289292893028931289322893328934289352893628937289382893928940289412894228943289442894528946289472894828949289502895128952289532895428955289562895728958289592896028961289622896328964289652896628967289682896928970289712897228973289742897528976289772897828979289802898128982289832898428985289862898728988289892899028991289922899328994289952899628997289982899929000290012900229003290042900529006290072900829009290102901129012290132901429015290162901729018290192902029021290222902329024290252902629027290282902929030290312903229033290342903529036290372903829039290402904129042290432904429045290462904729048290492905029051290522905329054290552905629057290582905929060290612906229063290642906529066290672906829069290702907129072290732907429075290762907729078290792908029081290822908329084290852908629087290882908929090290912909229093290942909529096290972909829099291002910129102291032910429105291062910729108291092911029111291122911329114291152911629117291182911929120291212912229123291242912529126291272912829129291302913129132291332913429135291362913729138291392914029141291422914329144291452914629147291482914929150291512915229153291542915529156291572915829159291602916129162291632916429165291662916729168291692917029171291722917329174291752917629177291782917929180291812918229183291842918529186291872918829189291902919129192291932919429195291962919729198291992920029201292022920329204292052920629207292082920929210292112921229213292142921529216292172921829219292202922129222292232922429225292262922729228292292923029231292322923329234292352923629237292382923929240292412924229243292442924529246292472924829249292502925129252292532925429255292562925729258292592926029261292622926329264292652926629267292682926929270292712927229273292742927529276292772927829279292802928129282292832928429285292862928729288292892929029291292922929329294292952929629297292982929929300293012930229303293042930529306293072930829309293102931129312293132931429315293162931729318293192932029321293222932329324293252932629327293282932929330293312933229333293342933529336293372933829339293402934129342293432934429345293462934729348293492935029351293522935329354293552935629357293582935929360293612936229363293642936529366293672936829369293702937129372293732937429375293762937729378293792938029381293822938329384293852938629387293882938929390293912939229393293942939529396293972939829399294002940129402294032940429405294062940729408294092941029411294122941329414294152941629417294182941929420294212942229423294242942529426294272942829429294302943129432294332943429435294362943729438294392944029441294422944329444294452944629447294482944929450294512945229453294542945529456294572945829459294602946129462294632946429465294662946729468294692947029471294722947329474294752947629477294782947929480294812948229483294842948529486294872948829489294902949129492294932949429495294962949729498294992950029501295022950329504295052950629507295082950929510295112951229513295142951529516295172951829519295202952129522295232952429525295262952729528295292953029531295322953329534295352953629537295382953929540295412954229543295442954529546295472954829549295502955129552295532955429555295562955729558295592956029561295622956329564295652956629567295682956929570295712957229573295742957529576295772957829579295802958129582295832958429585295862958729588295892959029591295922959329594295952959629597295982959929600296012960229603296042960529606296072960829609296102961129612296132961429615296162961729618296192962029621296222962329624296252962629627296282962929630296312963229633296342963529636296372963829639296402964129642296432964429645296462964729648296492965029651296522965329654296552965629657296582965929660296612966229663296642966529666296672966829669296702967129672296732967429675296762967729678296792968029681296822968329684296852968629687296882968929690296912969229693296942969529696296972969829699297002970129702297032970429705297062970729708297092971029711297122971329714297152971629717297182971929720297212972229723297242972529726297272972829729297302973129732297332973429735297362973729738297392974029741297422974329744297452974629747297482974929750297512975229753297542975529756297572975829759297602976129762297632976429765297662976729768297692977029771297722977329774297752977629777297782977929780297812978229783297842978529786297872978829789297902979129792297932979429795297962979729798297992980029801298022980329804298052980629807298082980929810298112981229813298142981529816298172981829819298202982129822298232982429825298262982729828298292983029831298322983329834298352983629837298382983929840298412984229843298442984529846298472984829849298502985129852298532985429855298562985729858298592986029861298622986329864298652986629867298682986929870298712987229873298742987529876298772987829879298802988129882298832988429885298862988729888298892989029891298922989329894298952989629897298982989929900299012990229903299042990529906299072990829909299102991129912299132991429915299162991729918299192992029921299222992329924299252992629927299282992929930299312993229933299342993529936299372993829939299402994129942299432994429945299462994729948299492995029951299522995329954299552995629957299582995929960299612996229963299642996529966299672996829969299702997129972299732997429975299762997729978299792998029981299822998329984299852998629987299882998929990299912999229993299942999529996299972999829999300003000130002300033000430005300063000730008300093001030011300123001330014300153001630017300183001930020300213002230023300243002530026300273002830029300303003130032300333003430035300363003730038300393004030041300423004330044300453004630047300483004930050300513005230053300543005530056300573005830059300603006130062300633006430065300663006730068300693007030071300723007330074300753007630077300783007930080300813008230083300843008530086300873008830089300903009130092300933009430095300963009730098300993010030101301023010330104301053010630107301083010930110301113011230113301143011530116301173011830119301203012130122301233012430125301263012730128301293013030131301323013330134301353013630137301383013930140301413014230143301443014530146301473014830149301503015130152301533015430155301563015730158301593016030161301623016330164301653016630167301683016930170301713017230173301743017530176301773017830179301803018130182301833018430185301863018730188301893019030191301923019330194301953019630197301983019930200302013020230203302043020530206302073020830209302103021130212302133021430215302163021730218302193022030221302223022330224302253022630227302283022930230302313023230233302343023530236302373023830239302403024130242302433024430245302463024730248302493025030251302523025330254302553025630257302583025930260302613026230263302643026530266302673026830269302703027130272302733027430275302763027730278302793028030281302823028330284302853028630287302883028930290302913029230293302943029530296302973029830299303003030130302303033030430305303063030730308303093031030311303123031330314303153031630317303183031930320303213032230323303243032530326303273032830329303303033130332303333033430335303363033730338303393034030341303423034330344303453034630347303483034930350303513035230353303543035530356303573035830359303603036130362303633036430365303663036730368303693037030371303723037330374303753037630377303783037930380303813038230383303843038530386303873038830389303903039130392303933039430395303963039730398303993040030401304023040330404304053040630407304083040930410304113041230413304143041530416304173041830419304203042130422304233042430425304263042730428304293043030431304323043330434304353043630437304383043930440304413044230443304443044530446304473044830449304503045130452304533045430455304563045730458304593046030461304623046330464304653046630467304683046930470304713047230473304743047530476304773047830479304803048130482304833048430485304863048730488304893049030491304923049330494304953049630497304983049930500305013050230503305043050530506305073050830509305103051130512305133051430515305163051730518305193052030521305223052330524305253052630527305283052930530305313053230533305343053530536305373053830539305403054130542305433054430545305463054730548305493055030551305523055330554305553055630557305583055930560305613056230563305643056530566305673056830569305703057130572305733057430575305763057730578305793058030581305823058330584305853058630587305883058930590305913059230593305943059530596305973059830599306003060130602306033060430605306063060730608306093061030611306123061330614306153061630617306183061930620306213062230623306243062530626306273062830629306303063130632306333063430635306363063730638306393064030641306423064330644306453064630647306483064930650306513065230653306543065530656306573065830659306603066130662306633066430665306663066730668306693067030671306723067330674306753067630677306783067930680306813068230683306843068530686306873068830689306903069130692306933069430695306963069730698306993070030701307023070330704307053070630707307083070930710307113071230713307143071530716307173071830719307203072130722307233072430725307263072730728307293073030731307323073330734307353073630737307383073930740307413074230743307443074530746307473074830749307503075130752307533075430755307563075730758307593076030761307623076330764307653076630767307683076930770307713077230773307743077530776307773077830779307803078130782307833078430785307863078730788307893079030791307923079330794307953079630797307983079930800308013080230803308043080530806308073080830809308103081130812308133081430815308163081730818308193082030821308223082330824308253082630827308283082930830308313083230833308343083530836308373083830839308403084130842308433084430845308463084730848308493085030851308523085330854308553085630857308583085930860308613086230863308643086530866308673086830869308703087130872308733087430875308763087730878308793088030881308823088330884308853088630887308883088930890308913089230893308943089530896308973089830899309003090130902309033090430905309063090730908309093091030911309123091330914309153091630917309183091930920309213092230923309243092530926309273092830929309303093130932309333093430935309363093730938309393094030941309423094330944309453094630947309483094930950309513095230953309543095530956309573095830959309603096130962309633096430965309663096730968309693097030971309723097330974309753097630977309783097930980309813098230983309843098530986309873098830989309903099130992309933099430995309963099730998309993100031001310023100331004310053100631007310083100931010310113101231013310143101531016310173101831019310203102131022310233102431025310263102731028310293103031031310323103331034310353103631037310383103931040310413104231043310443104531046310473104831049310503105131052310533105431055310563105731058310593106031061310623106331064310653106631067310683106931070310713107231073310743107531076310773107831079310803108131082310833108431085310863108731088310893109031091310923109331094310953109631097310983109931100311013110231103311043110531106311073110831109311103111131112311133111431115311163111731118311193112031121311223112331124311253112631127311283112931130311313113231133311343113531136311373113831139311403114131142311433114431145311463114731148311493115031151311523115331154311553115631157311583115931160311613116231163311643116531166311673116831169311703117131172311733117431175311763117731178311793118031181311823118331184311853118631187311883118931190311913119231193311943119531196311973119831199312003120131202312033120431205312063120731208312093121031211312123121331214312153121631217312183121931220312213122231223312243122531226312273122831229312303123131232312333123431235312363123731238312393124031241312423124331244312453124631247312483124931250312513125231253312543125531256312573125831259312603126131262312633126431265312663126731268312693127031271312723127331274312753127631277312783127931280312813128231283312843128531286312873128831289312903129131292312933129431295312963129731298312993130031301313023130331304313053130631307313083130931310313113131231313313143131531316313173131831319313203132131322313233132431325313263132731328313293133031331313323133331334313353133631337313383133931340313413134231343313443134531346313473134831349313503135131352313533135431355313563135731358313593136031361313623136331364313653136631367313683136931370313713137231373313743137531376313773137831379313803138131382313833138431385313863138731388313893139031391313923139331394313953139631397313983139931400314013140231403314043140531406314073140831409314103141131412314133141431415314163141731418314193142031421314223142331424314253142631427314283142931430314313143231433314343143531436314373143831439314403144131442314433144431445314463144731448314493145031451314523145331454314553145631457314583145931460314613146231463314643146531466314673146831469314703147131472314733147431475314763147731478314793148031481314823148331484314853148631487314883148931490314913149231493314943149531496314973149831499315003150131502315033150431505315063150731508315093151031511315123151331514315153151631517315183151931520315213152231523315243152531526315273152831529315303153131532315333153431535315363153731538315393154031541315423154331544315453154631547315483154931550315513155231553315543155531556315573155831559315603156131562315633156431565315663156731568315693157031571315723157331574315753157631577315783157931580315813158231583315843158531586315873158831589315903159131592315933159431595315963159731598315993160031601316023160331604316053160631607316083160931610316113161231613316143161531616316173161831619316203162131622316233162431625316263162731628316293163031631316323163331634316353163631637316383163931640316413164231643316443164531646316473164831649316503165131652316533165431655316563165731658316593166031661316623166331664316653166631667316683166931670316713167231673316743167531676316773167831679316803168131682316833168431685316863168731688316893169031691316923169331694316953169631697316983169931700317013170231703317043170531706317073170831709317103171131712317133171431715317163171731718317193172031721317223172331724317253172631727317283172931730317313173231733317343173531736317373173831739317403174131742317433174431745317463174731748317493175031751317523175331754317553175631757317583175931760317613176231763317643176531766317673176831769317703177131772317733177431775317763177731778317793178031781317823178331784317853178631787317883178931790317913179231793317943179531796317973179831799318003180131802318033180431805318063180731808318093181031811318123181331814318153181631817318183181931820318213182231823318243182531826318273182831829318303183131832318333183431835318363183731838318393184031841318423184331844318453184631847318483184931850318513185231853318543185531856318573185831859318603186131862318633186431865318663186731868318693187031871318723187331874318753187631877318783187931880318813188231883318843188531886318873188831889318903189131892318933189431895318963189731898318993190031901319023190331904319053190631907319083190931910319113191231913319143191531916319173191831919319203192131922319233192431925319263192731928319293193031931319323193331934319353193631937319383193931940319413194231943319443194531946319473194831949319503195131952319533195431955319563195731958319593196031961319623196331964319653196631967319683196931970319713197231973319743197531976319773197831979319803198131982319833198431985319863198731988319893199031991319923199331994319953199631997319983199932000320013200232003320043200532006320073200832009320103201132012320133201432015320163201732018320193202032021320223202332024320253202632027320283202932030320313203232033320343203532036320373203832039320403204132042320433204432045320463204732048320493205032051320523205332054320553205632057320583205932060320613206232063320643206532066320673206832069320703207132072320733207432075320763207732078320793208032081320823208332084320853208632087320883208932090320913209232093320943209532096320973209832099321003210132102321033210432105321063210732108321093211032111321123211332114321153211632117321183211932120321213212232123321243212532126321273212832129321303213132132321333213432135321363213732138321393214032141321423214332144321453214632147321483214932150321513215232153321543215532156321573215832159321603216132162321633216432165321663216732168321693217032171321723217332174321753217632177321783217932180321813218232183321843218532186321873218832189321903219132192321933219432195321963219732198321993220032201322023220332204322053220632207322083220932210322113221232213322143221532216322173221832219322203222132222322233222432225322263222732228322293223032231322323223332234322353223632237322383223932240322413224232243322443224532246322473224832249322503225132252322533225432255322563225732258322593226032261322623226332264322653226632267322683226932270322713227232273322743227532276322773227832279322803228132282322833228432285322863228732288322893229032291322923229332294322953229632297322983229932300323013230232303323043230532306323073230832309323103231132312323133231432315323163231732318323193232032321323223232332324323253232632327323283232932330323313233232333323343233532336323373233832339323403234132342323433234432345323463234732348323493235032351323523235332354323553235632357323583235932360323613236232363323643236532366323673236832369323703237132372323733237432375323763237732378323793238032381323823238332384323853238632387323883238932390323913239232393323943239532396323973239832399324003240132402324033240432405324063240732408324093241032411324123241332414324153241632417324183241932420324213242232423324243242532426324273242832429324303243132432324333243432435324363243732438324393244032441324423244332444324453244632447324483244932450324513245232453324543245532456324573245832459324603246132462324633246432465324663246732468324693247032471324723247332474324753247632477324783247932480324813248232483324843248532486324873248832489324903249132492324933249432495324963249732498324993250032501325023250332504325053250632507325083250932510325113251232513325143251532516325173251832519325203252132522325233252432525325263252732528325293253032531325323253332534325353253632537325383253932540325413254232543325443254532546325473254832549325503255132552325533255432555325563255732558325593256032561325623256332564325653256632567325683256932570325713257232573325743257532576325773257832579325803258132582325833258432585325863258732588325893259032591325923259332594325953259632597325983259932600326013260232603326043260532606326073260832609326103261132612326133261432615326163261732618326193262032621326223262332624326253262632627326283262932630326313263232633326343263532636326373263832639326403264132642326433264432645326463264732648326493265032651326523265332654326553265632657326583265932660326613266232663326643266532666326673266832669326703267132672326733267432675326763267732678326793268032681326823268332684326853268632687326883268932690326913269232693326943269532696326973269832699327003270132702327033270432705327063270732708327093271032711327123271332714327153271632717327183271932720327213272232723327243272532726327273272832729327303273132732327333273432735327363273732738327393274032741327423274332744327453274632747327483274932750327513275232753327543275532756327573275832759327603276132762327633276432765327663276732768327693277032771327723277332774327753277632777327783277932780327813278232783327843278532786327873278832789327903279132792327933279432795327963279732798327993280032801328023280332804328053280632807328083280932810328113281232813328143281532816328173281832819328203282132822328233282432825328263282732828328293283032831328323283332834328353283632837328383283932840328413284232843328443284532846328473284832849328503285132852328533285432855328563285732858328593286032861328623286332864328653286632867328683286932870328713287232873328743287532876328773287832879328803288132882328833288432885328863288732888328893289032891328923289332894328953289632897328983289932900329013290232903329043290532906329073290832909329103291132912329133291432915329163291732918329193292032921329223292332924329253292632927329283292932930329313293232933329343293532936329373293832939329403294132942329433294432945329463294732948329493295032951329523295332954329553295632957329583295932960329613296232963329643296532966329673296832969329703297132972329733297432975329763297732978329793298032981329823298332984329853298632987329883298932990329913299232993329943299532996329973299832999330003300133002330033300433005330063300733008330093301033011330123301333014330153301633017330183301933020330213302233023330243302533026330273302833029330303303133032330333303433035330363303733038330393304033041330423304333044330453304633047330483304933050330513305233053330543305533056330573305833059330603306133062330633306433065330663306733068330693307033071330723307333074330753307633077330783307933080330813308233083330843308533086330873308833089330903309133092330933309433095330963309733098330993310033101331023310333104331053310633107331083310933110331113311233113331143311533116331173311833119331203312133122331233312433125331263312733128331293313033131331323313333134331353313633137331383313933140331413314233143331443314533146331473314833149331503315133152331533315433155331563315733158331593316033161331623316333164331653316633167331683316933170331713317233173331743317533176331773317833179331803318133182331833318433185331863318733188331893319033191331923319333194331953319633197331983319933200332013320233203332043320533206332073320833209332103321133212332133321433215332163321733218332193322033221332223322333224332253322633227332283322933230332313323233233332343323533236332373323833239332403324133242332433324433245332463324733248332493325033251332523325333254332553325633257332583325933260332613326233263332643326533266332673326833269332703327133272332733327433275332763327733278332793328033281332823328333284332853328633287332883328933290332913329233293332943329533296332973329833299333003330133302333033330433305333063330733308333093331033311333123331333314333153331633317333183331933320333213332233323333243332533326333273332833329333303333133332333333333433335333363333733338333393334033341333423334333344333453334633347333483334933350333513335233353333543335533356333573335833359333603336133362333633336433365333663336733368333693337033371333723337333374333753337633377333783337933380333813338233383333843338533386333873338833389333903339133392333933339433395333963339733398333993340033401334023340333404334053340633407334083340933410334113341233413334143341533416334173341833419334203342133422334233342433425334263342733428334293343033431334323343333434334353343633437334383343933440334413344233443334443344533446334473344833449334503345133452334533345433455334563345733458334593346033461334623346333464334653346633467334683346933470334713347233473334743347533476334773347833479334803348133482334833348433485334863348733488334893349033491334923349333494334953349633497334983349933500335013350233503335043350533506335073350833509335103351133512335133351433515335163351733518335193352033521335223352333524335253352633527335283352933530335313353233533335343353533536335373353833539335403354133542335433354433545335463354733548335493355033551335523355333554335553355633557335583355933560335613356233563335643356533566335673356833569335703357133572335733357433575335763357733578335793358033581335823358333584335853358633587335883358933590335913359233593335943359533596335973359833599336003360133602336033360433605336063360733608336093361033611336123361333614336153361633617336183361933620336213362233623336243362533626336273362833629336303363133632336333363433635336363363733638336393364033641336423364333644336453364633647336483364933650336513365233653336543365533656336573365833659336603366133662336633366433665336663366733668336693367033671336723367333674336753367633677336783367933680336813368233683336843368533686336873368833689336903369133692336933369433695336963369733698336993370033701337023370333704337053370633707337083370933710337113371233713337143371533716337173371833719337203372133722337233372433725337263372733728337293373033731337323373333734337353373633737337383373933740337413374233743337443374533746337473374833749337503375133752337533375433755337563375733758337593376033761337623376333764337653376633767337683376933770337713377233773337743377533776337773377833779337803378133782337833378433785337863378733788337893379033791337923379333794337953379633797337983379933800338013380233803338043380533806338073380833809338103381133812338133381433815338163381733818338193382033821338223382333824338253382633827338283382933830338313383233833338343383533836338373383833839338403384133842338433384433845338463384733848338493385033851338523385333854338553385633857338583385933860338613386233863338643386533866338673386833869338703387133872338733387433875338763387733878338793388033881338823388333884338853388633887338883388933890338913389233893338943389533896338973389833899339003390133902339033390433905339063390733908339093391033911339123391333914339153391633917339183391933920339213392233923339243392533926339273392833929339303393133932339333393433935339363393733938339393394033941339423394333944339453394633947339483394933950339513395233953339543395533956339573395833959339603396133962339633396433965339663396733968339693397033971339723397333974339753397633977339783397933980339813398233983339843398533986339873398833989339903399133992339933399433995339963399733998339993400034001340023400334004340053400634007340083400934010340113401234013340143401534016340173401834019340203402134022340233402434025340263402734028340293403034031340323403334034340353403634037340383403934040340413404234043340443404534046340473404834049340503405134052340533405434055340563405734058340593406034061340623406334064340653406634067340683406934070340713407234073340743407534076340773407834079340803408134082340833408434085340863408734088340893409034091340923409334094340953409634097340983409934100341013410234103341043410534106341073410834109341103411134112341133411434115341163411734118341193412034121341223412334124341253412634127341283412934130341313413234133341343413534136341373413834139341403414134142341433414434145341463414734148341493415034151341523415334154341553415634157341583415934160341613416234163341643416534166341673416834169341703417134172341733417434175341763417734178341793418034181341823418334184341853418634187341883418934190341913419234193341943419534196341973419834199342003420134202342033420434205342063420734208342093421034211342123421334214342153421634217342183421934220342213422234223342243422534226342273422834229342303423134232342333423434235342363423734238342393424034241342423424334244342453424634247342483424934250342513425234253342543425534256342573425834259342603426134262342633426434265342663426734268342693427034271342723427334274342753427634277342783427934280342813428234283342843428534286342873428834289342903429134292342933429434295342963429734298342993430034301343023430334304343053430634307343083430934310343113431234313343143431534316343173431834319343203432134322343233432434325343263432734328343293433034331343323433334334343353433634337343383433934340343413434234343343443434534346343473434834349343503435134352343533435434355343563435734358343593436034361343623436334364343653436634367343683436934370343713437234373343743437534376343773437834379343803438134382343833438434385343863438734388343893439034391343923439334394343953439634397343983439934400344013440234403344043440534406344073440834409344103441134412344133441434415344163441734418344193442034421344223442334424344253442634427344283442934430344313443234433344343443534436344373443834439344403444134442344433444434445344463444734448344493445034451344523445334454344553445634457344583445934460344613446234463344643446534466344673446834469344703447134472344733447434475344763447734478344793448034481344823448334484344853448634487344883448934490344913449234493344943449534496344973449834499345003450134502345033450434505345063450734508345093451034511345123451334514345153451634517345183451934520345213452234523345243452534526345273452834529345303453134532345333453434535345363453734538345393454034541345423454334544345453454634547345483454934550345513455234553345543455534556345573455834559345603456134562345633456434565345663456734568345693457034571345723457334574345753457634577345783457934580345813458234583345843458534586345873458834589345903459134592345933459434595345963459734598345993460034601346023460334604346053460634607346083460934610346113461234613346143461534616346173461834619346203462134622346233462434625346263462734628346293463034631346323463334634346353463634637346383463934640346413464234643346443464534646346473464834649346503465134652346533465434655346563465734658346593466034661346623466334664346653466634667346683466934670346713467234673346743467534676346773467834679346803468134682346833468434685346863468734688346893469034691346923469334694346953469634697346983469934700347013470234703347043470534706347073470834709347103471134712347133471434715347163471734718347193472034721347223472334724347253472634727347283472934730347313473234733347343473534736347373473834739347403474134742347433474434745347463474734748347493475034751347523475334754347553475634757347583475934760347613476234763347643476534766347673476834769347703477134772347733477434775347763477734778347793478034781347823478334784347853478634787347883478934790347913479234793347943479534796347973479834799348003480134802348033480434805348063480734808348093481034811348123481334814348153481634817348183481934820348213482234823348243482534826348273482834829348303483134832348333483434835348363483734838348393484034841348423484334844348453484634847348483484934850348513485234853348543485534856348573485834859348603486134862348633486434865348663486734868348693487034871348723487334874348753487634877348783487934880348813488234883348843488534886348873488834889348903489134892348933489434895348963489734898348993490034901349023490334904349053490634907349083490934910349113491234913349143491534916349173491834919349203492134922349233492434925349263492734928349293493034931349323493334934349353493634937349383493934940349413494234943349443494534946349473494834949349503495134952349533495434955349563495734958349593496034961349623496334964349653496634967349683496934970349713497234973349743497534976349773497834979349803498134982349833498434985349863498734988349893499034991349923499334994349953499634997349983499935000350013500235003350043500535006350073500835009350103501135012350133501435015350163501735018350193502035021350223502335024350253502635027350283502935030350313503235033350343503535036350373503835039350403504135042350433504435045350463504735048350493505035051350523505335054350553505635057350583505935060350613506235063350643506535066350673506835069350703507135072350733507435075350763507735078350793508035081350823508335084350853508635087350883508935090350913509235093350943509535096350973509835099351003510135102351033510435105351063510735108351093511035111351123511335114351153511635117351183511935120351213512235123351243512535126351273512835129351303513135132351333513435135351363513735138351393514035141351423514335144351453514635147351483514935150351513515235153351543515535156351573515835159351603516135162351633516435165351663516735168351693517035171351723517335174351753517635177351783517935180351813518235183351843518535186351873518835189351903519135192351933519435195351963519735198351993520035201352023520335204352053520635207352083520935210352113521235213352143521535216352173521835219352203522135222352233522435225352263522735228352293523035231352323523335234352353523635237352383523935240352413524235243352443524535246352473524835249352503525135252352533525435255352563525735258352593526035261352623526335264352653526635267352683526935270352713527235273352743527535276352773527835279352803528135282352833528435285352863528735288352893529035291352923529335294352953529635297352983529935300353013530235303353043530535306353073530835309353103531135312353133531435315353163531735318353193532035321353223532335324353253532635327353283532935330353313533235333353343533535336353373533835339353403534135342353433534435345353463534735348353493535035351353523535335354353553535635357353583535935360353613536235363353643536535366353673536835369353703537135372353733537435375353763537735378353793538035381353823538335384353853538635387353883538935390353913539235393353943539535396353973539835399354003540135402354033540435405354063540735408354093541035411354123541335414354153541635417354183541935420354213542235423354243542535426354273542835429354303543135432354333543435435354363543735438354393544035441354423544335444354453544635447354483544935450354513545235453354543545535456354573545835459354603546135462354633546435465354663546735468354693547035471354723547335474354753547635477354783547935480354813548235483354843548535486354873548835489354903549135492354933549435495354963549735498354993550035501355023550335504355053550635507355083550935510355113551235513355143551535516355173551835519355203552135522355233552435525355263552735528355293553035531355323553335534355353553635537355383553935540355413554235543355443554535546355473554835549355503555135552355533555435555355563555735558355593556035561355623556335564355653556635567355683556935570355713557235573355743557535576355773557835579355803558135582355833558435585355863558735588355893559035591355923559335594355953559635597355983559935600356013560235603356043560535606356073560835609356103561135612356133561435615356163561735618356193562035621356223562335624356253562635627356283562935630356313563235633356343563535636356373563835639356403564135642356433564435645356463564735648356493565035651356523565335654356553565635657356583565935660356613566235663356643566535666356673566835669356703567135672356733567435675356763567735678356793568035681356823568335684356853568635687356883568935690356913569235693356943569535696356973569835699357003570135702357033570435705357063570735708357093571035711357123571335714357153571635717357183571935720357213572235723357243572535726357273572835729357303573135732357333573435735357363573735738357393574035741357423574335744357453574635747357483574935750357513575235753357543575535756357573575835759357603576135762357633576435765357663576735768357693577035771357723577335774357753577635777357783577935780357813578235783357843578535786357873578835789357903579135792357933579435795357963579735798357993580035801358023580335804358053580635807358083580935810358113581235813358143581535816358173581835819358203582135822358233582435825358263582735828358293583035831358323583335834358353583635837358383583935840358413584235843358443584535846358473584835849358503585135852358533585435855358563585735858358593586035861358623586335864358653586635867358683586935870358713587235873358743587535876358773587835879358803588135882358833588435885358863588735888358893589035891358923589335894358953589635897358983589935900359013590235903359043590535906359073590835909359103591135912359133591435915359163591735918359193592035921359223592335924359253592635927359283592935930359313593235933359343593535936359373593835939359403594135942359433594435945359463594735948359493595035951359523595335954359553595635957359583595935960359613596235963359643596535966359673596835969359703597135972359733597435975359763597735978359793598035981359823598335984359853598635987359883598935990359913599235993359943599535996359973599835999360003600136002360033600436005360063600736008360093601036011360123601336014360153601636017360183601936020360213602236023360243602536026360273602836029360303603136032360333603436035360363603736038360393604036041360423604336044360453604636047360483604936050360513605236053360543605536056360573605836059360603606136062360633606436065360663606736068360693607036071360723607336074360753607636077360783607936080360813608236083360843608536086360873608836089360903609136092360933609436095360963609736098360993610036101361023610336104361053610636107361083610936110361113611236113361143611536116361173611836119361203612136122361233612436125361263612736128361293613036131361323613336134361353613636137361383613936140361413614236143361443614536146361473614836149361503615136152361533615436155361563615736158361593616036161361623616336164361653616636167361683616936170361713617236173361743617536176361773617836179361803618136182361833618436185361863618736188361893619036191361923619336194361953619636197361983619936200362013620236203362043620536206362073620836209362103621136212362133621436215362163621736218362193622036221362223622336224362253622636227362283622936230362313623236233362343623536236362373623836239362403624136242362433624436245362463624736248362493625036251362523625336254362553625636257362583625936260362613626236263362643626536266362673626836269362703627136272362733627436275362763627736278362793628036281362823628336284362853628636287362883628936290362913629236293362943629536296362973629836299363003630136302363033630436305363063630736308363093631036311363123631336314363153631636317363183631936320363213632236323363243632536326363273632836329363303633136332363333633436335363363633736338363393634036341363423634336344363453634636347363483634936350363513635236353363543635536356363573635836359363603636136362363633636436365363663636736368363693637036371363723637336374363753637636377363783637936380363813638236383363843638536386363873638836389363903639136392363933639436395363963639736398363993640036401364023640336404364053640636407364083640936410364113641236413364143641536416364173641836419364203642136422364233642436425364263642736428364293643036431364323643336434364353643636437364383643936440364413644236443364443644536446364473644836449364503645136452364533645436455364563645736458364593646036461364623646336464364653646636467364683646936470364713647236473364743647536476364773647836479364803648136482364833648436485364863648736488364893649036491364923649336494364953649636497364983649936500365013650236503365043650536506365073650836509365103651136512365133651436515365163651736518365193652036521365223652336524365253652636527365283652936530365313653236533365343653536536365373653836539365403654136542365433654436545365463654736548365493655036551365523655336554365553655636557365583655936560365613656236563365643656536566365673656836569365703657136572365733657436575365763657736578365793658036581365823658336584365853658636587365883658936590365913659236593365943659536596365973659836599366003660136602366033660436605366063660736608366093661036611366123661336614366153661636617366183661936620366213662236623366243662536626366273662836629366303663136632366333663436635366363663736638366393664036641366423664336644366453664636647366483664936650366513665236653366543665536656366573665836659366603666136662366633666436665366663666736668366693667036671366723667336674366753667636677366783667936680366813668236683366843668536686366873668836689366903669136692366933669436695366963669736698366993670036701367023670336704367053670636707367083670936710367113671236713367143671536716367173671836719367203672136722367233672436725367263672736728367293673036731367323673336734367353673636737367383673936740367413674236743367443674536746367473674836749367503675136752367533675436755367563675736758367593676036761367623676336764367653676636767367683676936770367713677236773367743677536776367773677836779367803678136782367833678436785367863678736788367893679036791367923679336794367953679636797367983679936800368013680236803368043680536806368073680836809368103681136812368133681436815368163681736818368193682036821368223682336824368253682636827368283682936830368313683236833368343683536836368373683836839368403684136842368433684436845368463684736848368493685036851368523685336854368553685636857368583685936860368613686236863368643686536866368673686836869368703687136872368733687436875368763687736878368793688036881368823688336884368853688636887368883688936890368913689236893368943689536896368973689836899369003690136902369033690436905369063690736908369093691036911369123691336914369153691636917369183691936920369213692236923369243692536926369273692836929369303693136932369333693436935369363693736938369393694036941369423694336944369453694636947369483694936950369513695236953369543695536956369573695836959369603696136962369633696436965369663696736968369693697036971369723697336974369753697636977369783697936980369813698236983369843698536986369873698836989369903699136992369933699436995369963699736998369993700037001370023700337004370053700637007370083700937010370113701237013370143701537016370173701837019370203702137022370233702437025370263702737028370293703037031370323703337034370353703637037370383703937040370413704237043370443704537046370473704837049370503705137052370533705437055370563705737058370593706037061370623706337064370653706637067370683706937070370713707237073370743707537076370773707837079370803708137082370833708437085370863708737088370893709037091370923709337094370953709637097370983709937100371013710237103371043710537106371073710837109371103711137112371133711437115371163711737118371193712037121371223712337124371253712637127371283712937130371313713237133371343713537136371373713837139371403714137142371433714437145371463714737148371493715037151371523715337154371553715637157371583715937160371613716237163371643716537166371673716837169371703717137172371733717437175371763717737178371793718037181371823718337184371853718637187371883718937190371913719237193371943719537196371973719837199372003720137202372033720437205372063720737208372093721037211372123721337214372153721637217372183721937220372213722237223372243722537226372273722837229372303723137232372333723437235372363723737238372393724037241372423724337244372453724637247372483724937250372513725237253372543725537256372573725837259372603726137262372633726437265372663726737268372693727037271372723727337274372753727637277372783727937280372813728237283372843728537286372873728837289372903729137292372933729437295372963729737298372993730037301373023730337304373053730637307373083730937310373113731237313373143731537316373173731837319373203732137322373233732437325373263732737328373293733037331373323733337334373353733637337373383733937340373413734237343373443734537346373473734837349373503735137352373533735437355373563735737358373593736037361373623736337364373653736637367373683736937370373713737237373373743737537376373773737837379373803738137382373833738437385373863738737388373893739037391373923739337394373953739637397373983739937400374013740237403374043740537406374073740837409374103741137412374133741437415374163741737418374193742037421374223742337424374253742637427374283742937430374313743237433374343743537436374373743837439374403744137442374433744437445374463744737448374493745037451374523745337454374553745637457374583745937460374613746237463374643746537466374673746837469374703747137472374733747437475374763747737478374793748037481374823748337484374853748637487374883748937490374913749237493374943749537496374973749837499375003750137502375033750437505375063750737508375093751037511375123751337514375153751637517375183751937520375213752237523375243752537526375273752837529375303753137532375333753437535375363753737538375393754037541375423754337544375453754637547375483754937550375513755237553375543755537556375573755837559375603756137562375633756437565375663756737568375693757037571375723757337574375753757637577375783757937580375813758237583375843758537586375873758837589375903759137592375933759437595375963759737598375993760037601376023760337604376053760637607376083760937610376113761237613376143761537616376173761837619376203762137622376233762437625376263762737628376293763037631376323763337634376353763637637376383763937640376413764237643376443764537646376473764837649376503765137652376533765437655376563765737658376593766037661376623766337664376653766637667376683766937670376713767237673376743767537676376773767837679376803768137682376833768437685376863768737688376893769037691376923769337694376953769637697376983769937700377013770237703377043770537706377073770837709377103771137712377133771437715377163771737718377193772037721377223772337724377253772637727377283772937730377313773237733377343773537736377373773837739377403774137742377433774437745377463774737748377493775037751377523775337754377553775637757377583775937760377613776237763377643776537766377673776837769377703777137772377733777437775377763777737778377793778037781377823778337784377853778637787377883778937790377913779237793377943779537796377973779837799378003780137802378033780437805378063780737808378093781037811378123781337814378153781637817378183781937820378213782237823378243782537826378273782837829378303783137832378333783437835378363783737838378393784037841378423784337844378453784637847378483784937850378513785237853378543785537856378573785837859378603786137862378633786437865378663786737868378693787037871378723787337874378753787637877378783787937880378813788237883378843788537886378873788837889378903789137892378933789437895378963789737898378993790037901379023790337904379053790637907379083790937910379113791237913379143791537916379173791837919379203792137922379233792437925379263792737928379293793037931379323793337934379353793637937379383793937940379413794237943379443794537946379473794837949379503795137952379533795437955379563795737958379593796037961379623796337964379653796637967379683796937970379713797237973379743797537976379773797837979379803798137982379833798437985379863798737988379893799037991379923799337994379953799637997379983799938000380013800238003380043800538006380073800838009380103801138012380133801438015380163801738018380193802038021380223802338024380253802638027380283802938030380313803238033380343803538036380373803838039380403804138042380433804438045380463804738048380493805038051380523805338054380553805638057380583805938060380613806238063380643806538066380673806838069380703807138072380733807438075380763807738078380793808038081380823808338084380853808638087380883808938090380913809238093380943809538096380973809838099381003810138102381033810438105381063810738108381093811038111381123811338114381153811638117381183811938120381213812238123381243812538126381273812838129381303813138132381333813438135381363813738138381393814038141381423814338144381453814638147381483814938150381513815238153381543815538156381573815838159381603816138162381633816438165381663816738168381693817038171381723817338174381753817638177381783817938180381813818238183381843818538186381873818838189381903819138192381933819438195381963819738198381993820038201382023820338204382053820638207382083820938210382113821238213382143821538216382173821838219382203822138222382233822438225382263822738228382293823038231382323823338234382353823638237382383823938240382413824238243382443824538246382473824838249382503825138252382533825438255382563825738258382593826038261382623826338264382653826638267382683826938270382713827238273382743827538276382773827838279382803828138282382833828438285382863828738288382893829038291382923829338294382953829638297382983829938300383013830238303383043830538306383073830838309383103831138312383133831438315383163831738318383193832038321383223832338324383253832638327383283832938330383313833238333383343833538336383373833838339383403834138342383433834438345383463834738348383493835038351383523835338354383553835638357383583835938360383613836238363383643836538366383673836838369383703837138372383733837438375383763837738378383793838038381383823838338384383853838638387383883838938390383913839238393383943839538396383973839838399384003840138402384033840438405384063840738408384093841038411384123841338414384153841638417384183841938420384213842238423384243842538426384273842838429384303843138432384333843438435384363843738438384393844038441384423844338444384453844638447384483844938450384513845238453384543845538456384573845838459384603846138462384633846438465384663846738468384693847038471384723847338474384753847638477384783847938480384813848238483384843848538486384873848838489384903849138492384933849438495384963849738498384993850038501385023850338504385053850638507385083850938510385113851238513385143851538516385173851838519385203852138522385233852438525385263852738528385293853038531385323853338534385353853638537385383853938540385413854238543385443854538546385473854838549385503855138552385533855438555385563855738558385593856038561385623856338564385653856638567385683856938570385713857238573385743857538576385773857838579385803858138582385833858438585385863858738588385893859038591385923859338594385953859638597385983859938600386013860238603386043860538606386073860838609386103861138612386133861438615386163861738618386193862038621386223862338624386253862638627386283862938630386313863238633386343863538636386373863838639386403864138642386433864438645386463864738648386493865038651386523865338654386553865638657386583865938660386613866238663386643866538666386673866838669386703867138672386733867438675386763867738678386793868038681386823868338684386853868638687386883868938690386913869238693386943869538696386973869838699387003870138702387033870438705387063870738708387093871038711387123871338714387153871638717387183871938720387213872238723387243872538726387273872838729387303873138732387333873438735387363873738738387393874038741387423874338744387453874638747387483874938750387513875238753387543875538756387573875838759387603876138762387633876438765387663876738768387693877038771387723877338774387753877638777387783877938780387813878238783387843878538786387873878838789387903879138792387933879438795387963879738798387993880038801388023880338804388053880638807388083880938810388113881238813388143881538816388173881838819388203882138822388233882438825388263882738828388293883038831388323883338834388353883638837388383883938840388413884238843388443884538846388473884838849388503885138852388533885438855388563885738858388593886038861388623886338864388653886638867388683886938870388713887238873388743887538876388773887838879388803888138882388833888438885388863888738888388893889038891388923889338894388953889638897388983889938900389013890238903389043890538906389073890838909389103891138912389133891438915389163891738918389193892038921389223892338924389253892638927389283892938930389313893238933389343893538936389373893838939389403894138942389433894438945389463894738948389493895038951389523895338954389553895638957389583895938960389613896238963389643896538966389673896838969389703897138972389733897438975389763897738978389793898038981389823898338984389853898638987389883898938990389913899238993389943899538996389973899838999390003900139002390033900439005390063900739008390093901039011390123901339014390153901639017390183901939020390213902239023390243902539026390273902839029390303903139032390333903439035390363903739038390393904039041390423904339044390453904639047390483904939050390513905239053390543905539056390573905839059390603906139062390633906439065390663906739068390693907039071390723907339074390753907639077390783907939080390813908239083390843908539086390873908839089390903909139092390933909439095390963909739098390993910039101391023910339104391053910639107391083910939110391113911239113391143911539116391173911839119391203912139122391233912439125391263912739128391293913039131391323913339134391353913639137391383913939140391413914239143391443914539146391473914839149391503915139152391533915439155391563915739158391593916039161391623916339164391653916639167391683916939170391713917239173391743917539176391773917839179391803918139182391833918439185391863918739188391893919039191391923919339194391953919639197391983919939200392013920239203392043920539206392073920839209392103921139212392133921439215392163921739218392193922039221392223922339224392253922639227392283922939230392313923239233392343923539236392373923839239392403924139242392433924439245392463924739248392493925039251392523925339254392553925639257392583925939260392613926239263392643926539266392673926839269392703927139272392733927439275392763927739278392793928039281392823928339284392853928639287392883928939290392913929239293392943929539296392973929839299393003930139302393033930439305393063930739308393093931039311393123931339314393153931639317393183931939320393213932239323393243932539326393273932839329393303933139332393333933439335393363933739338393393934039341393423934339344393453934639347393483934939350393513935239353393543935539356393573935839359393603936139362393633936439365393663936739368393693937039371393723937339374393753937639377393783937939380393813938239383393843938539386393873938839389393903939139392393933939439395393963939739398393993940039401394023940339404394053940639407394083940939410394113941239413394143941539416394173941839419394203942139422394233942439425394263942739428394293943039431394323943339434394353943639437394383943939440394413944239443394443944539446394473944839449394503945139452394533945439455394563945739458394593946039461394623946339464394653946639467394683946939470394713947239473394743947539476394773947839479394803948139482394833948439485394863948739488394893949039491394923949339494394953949639497394983949939500395013950239503395043950539506395073950839509395103951139512395133951439515395163951739518395193952039521395223952339524395253952639527395283952939530395313953239533395343953539536395373953839539395403954139542395433954439545395463954739548395493955039551395523955339554395553955639557395583955939560395613956239563395643956539566395673956839569395703957139572395733957439575395763957739578395793958039581395823958339584395853958639587395883958939590395913959239593395943959539596395973959839599396003960139602396033960439605396063960739608396093961039611396123961339614396153961639617396183961939620396213962239623396243962539626396273962839629396303963139632396333963439635396363963739638396393964039641396423964339644396453964639647396483964939650396513965239653396543965539656396573965839659396603966139662396633966439665396663966739668396693967039671396723967339674396753967639677396783967939680396813968239683396843968539686396873968839689396903969139692396933969439695396963969739698396993970039701397023970339704397053970639707397083970939710397113971239713397143971539716397173971839719397203972139722397233972439725397263972739728397293973039731397323973339734397353973639737397383973939740397413974239743397443974539746397473974839749397503975139752397533975439755397563975739758397593976039761397623976339764397653976639767397683976939770397713977239773397743977539776397773977839779397803978139782397833978439785397863978739788397893979039791397923979339794397953979639797397983979939800398013980239803398043980539806398073980839809398103981139812398133981439815398163981739818398193982039821398223982339824398253982639827398283982939830398313983239833398343983539836398373983839839398403984139842398433984439845398463984739848398493985039851398523985339854398553985639857398583985939860398613986239863398643986539866398673986839869398703987139872398733987439875398763987739878398793988039881398823988339884398853988639887398883988939890398913989239893398943989539896398973989839899399003990139902399033990439905399063990739908399093991039911399123991339914399153991639917399183991939920399213992239923399243992539926399273992839929399303993139932399333993439935399363993739938399393994039941399423994339944399453994639947399483994939950399513995239953399543995539956399573995839959399603996139962399633996439965399663996739968399693997039971399723997339974399753997639977399783997939980399813998239983399843998539986399873998839989399903999139992399933999439995399963999739998399994000040001400024000340004400054000640007400084000940010400114001240013400144001540016400174001840019400204002140022400234002440025400264002740028400294003040031400324003340034400354003640037400384003940040400414004240043400444004540046400474004840049400504005140052400534005440055400564005740058400594006040061400624006340064400654006640067400684006940070400714007240073400744007540076400774007840079400804008140082400834008440085400864008740088400894009040091400924009340094400954009640097400984009940100401014010240103401044010540106401074010840109401104011140112401134011440115401164011740118401194012040121401224012340124401254012640127401284012940130401314013240133401344013540136401374013840139401404014140142401434014440145401464014740148401494015040151401524015340154401554015640157401584015940160401614016240163401644016540166401674016840169401704017140172401734017440175401764017740178401794018040181401824018340184401854018640187401884018940190401914019240193401944019540196401974019840199402004020140202402034020440205402064020740208402094021040211402124021340214402154021640217402184021940220402214022240223402244022540226402274022840229402304023140232402334023440235402364023740238402394024040241402424024340244402454024640247402484024940250402514025240253402544025540256402574025840259402604026140262402634026440265402664026740268402694027040271402724027340274402754027640277402784027940280402814028240283402844028540286402874028840289402904029140292402934029440295402964029740298402994030040301403024030340304403054030640307403084030940310403114031240313403144031540316403174031840319403204032140322403234032440325403264032740328403294033040331403324033340334403354033640337403384033940340403414034240343403444034540346403474034840349403504035140352403534035440355403564035740358403594036040361403624036340364403654036640367403684036940370403714037240373403744037540376403774037840379403804038140382403834038440385403864038740388403894039040391403924039340394403954039640397403984039940400404014040240403404044040540406404074040840409404104041140412404134041440415404164041740418404194042040421404224042340424404254042640427404284042940430404314043240433404344043540436404374043840439404404044140442404434044440445404464044740448404494045040451404524045340454404554045640457404584045940460404614046240463404644046540466404674046840469404704047140472404734047440475404764047740478404794048040481404824048340484404854048640487404884048940490404914049240493404944049540496404974049840499405004050140502405034050440505405064050740508405094051040511405124051340514405154051640517405184051940520405214052240523405244052540526405274052840529405304053140532405334053440535405364053740538405394054040541405424054340544405454054640547405484054940550405514055240553405544055540556405574055840559405604056140562405634056440565405664056740568405694057040571405724057340574405754057640577405784057940580405814058240583405844058540586405874058840589405904059140592405934059440595405964059740598405994060040601406024060340604406054060640607406084060940610406114061240613406144061540616406174061840619406204062140622406234062440625406264062740628406294063040631406324063340634406354063640637406384063940640406414064240643406444064540646406474064840649406504065140652406534065440655406564065740658406594066040661406624066340664406654066640667406684066940670406714067240673406744067540676406774067840679406804068140682406834068440685406864068740688406894069040691406924069340694406954069640697406984069940700407014070240703407044070540706407074070840709407104071140712407134071440715407164071740718407194072040721407224072340724407254072640727407284072940730407314073240733407344073540736407374073840739407404074140742407434074440745407464074740748407494075040751407524075340754407554075640757407584075940760407614076240763407644076540766407674076840769407704077140772407734077440775407764077740778407794078040781407824078340784407854078640787407884078940790407914079240793407944079540796407974079840799408004080140802408034080440805408064080740808408094081040811408124081340814408154081640817408184081940820408214082240823408244082540826408274082840829408304083140832408334083440835408364083740838408394084040841408424084340844408454084640847408484084940850408514085240853408544085540856408574085840859408604086140862408634086440865408664086740868408694087040871408724087340874408754087640877408784087940880408814088240883408844088540886408874088840889408904089140892408934089440895408964089740898408994090040901409024090340904409054090640907409084090940910409114091240913409144091540916409174091840919409204092140922409234092440925409264092740928409294093040931409324093340934409354093640937409384093940940409414094240943409444094540946409474094840949409504095140952409534095440955409564095740958409594096040961409624096340964409654096640967409684096940970409714097240973409744097540976409774097840979409804098140982409834098440985409864098740988409894099040991409924099340994409954099640997409984099941000410014100241003410044100541006410074100841009410104101141012410134101441015410164101741018410194102041021410224102341024410254102641027410284102941030410314103241033410344103541036410374103841039410404104141042410434104441045410464104741048410494105041051410524105341054410554105641057410584105941060410614106241063410644106541066410674106841069410704107141072410734107441075410764107741078410794108041081410824108341084410854108641087410884108941090410914109241093410944109541096410974109841099411004110141102411034110441105411064110741108411094111041111411124111341114411154111641117411184111941120411214112241123411244112541126411274112841129411304113141132411334113441135411364113741138411394114041141411424114341144411454114641147411484114941150411514115241153411544115541156411574115841159411604116141162411634116441165411664116741168411694117041171411724117341174411754117641177411784117941180411814118241183411844118541186411874118841189411904119141192411934119441195411964119741198411994120041201412024120341204412054120641207412084120941210412114121241213412144121541216412174121841219412204122141222412234122441225412264122741228412294123041231412324123341234412354123641237412384123941240412414124241243412444124541246412474124841249412504125141252412534125441255412564125741258412594126041261412624126341264412654126641267412684126941270412714127241273412744127541276412774127841279412804128141282412834128441285412864128741288412894129041291412924129341294412954129641297412984129941300413014130241303413044130541306413074130841309413104131141312413134131441315413164131741318413194132041321413224132341324413254132641327413284132941330413314133241333413344133541336413374133841339413404134141342413434134441345413464134741348413494135041351413524135341354413554135641357413584135941360413614136241363413644136541366413674136841369413704137141372413734137441375413764137741378413794138041381413824138341384413854138641387413884138941390413914139241393413944139541396413974139841399414004140141402414034140441405414064140741408414094141041411414124141341414414154141641417414184141941420414214142241423414244142541426414274142841429414304143141432414334143441435414364143741438414394144041441414424144341444414454144641447414484144941450414514145241453414544145541456414574145841459414604146141462414634146441465414664146741468414694147041471414724147341474414754147641477414784147941480414814148241483414844148541486414874148841489414904149141492414934149441495414964149741498414994150041501415024150341504415054150641507415084150941510415114151241513415144151541516415174151841519415204152141522415234152441525415264152741528415294153041531415324153341534415354153641537415384153941540415414154241543415444154541546415474154841549415504155141552415534155441555415564155741558415594156041561415624156341564415654156641567415684156941570415714157241573415744157541576415774157841579415804158141582415834158441585415864158741588415894159041591415924159341594415954159641597415984159941600416014160241603416044160541606416074160841609416104161141612416134161441615416164161741618416194162041621416224162341624416254162641627416284162941630416314163241633416344163541636416374163841639416404164141642416434164441645416464164741648416494165041651416524165341654416554165641657416584165941660416614166241663416644166541666416674166841669416704167141672416734167441675416764167741678416794168041681416824168341684416854168641687416884168941690416914169241693416944169541696416974169841699417004170141702417034170441705417064170741708417094171041711417124171341714417154171641717417184171941720417214172241723417244172541726417274172841729417304173141732417334173441735417364173741738417394174041741417424174341744417454174641747417484174941750417514175241753417544175541756417574175841759417604176141762417634176441765417664176741768417694177041771417724177341774417754177641777417784177941780417814178241783417844178541786417874178841789417904179141792417934179441795417964179741798417994180041801418024180341804418054180641807418084180941810418114181241813418144181541816418174181841819418204182141822418234182441825418264182741828418294183041831418324183341834418354183641837418384183941840418414184241843418444184541846418474184841849418504185141852418534185441855418564185741858418594186041861418624186341864418654186641867418684186941870418714187241873418744187541876418774187841879418804188141882418834188441885418864188741888418894189041891418924189341894418954189641897418984189941900419014190241903419044190541906419074190841909419104191141912419134191441915419164191741918419194192041921419224192341924419254192641927419284192941930419314193241933419344193541936419374193841939419404194141942419434194441945419464194741948419494195041951419524195341954419554195641957419584195941960419614196241963419644196541966419674196841969419704197141972419734197441975419764197741978419794198041981419824198341984419854198641987419884198941990419914199241993419944199541996419974199841999420004200142002420034200442005420064200742008420094201042011420124201342014420154201642017420184201942020420214202242023420244202542026420274202842029420304203142032420334203442035420364203742038420394204042041420424204342044420454204642047420484204942050420514205242053420544205542056420574205842059420604206142062420634206442065420664206742068420694207042071420724207342074420754207642077420784207942080420814208242083420844208542086420874208842089420904209142092420934209442095420964209742098420994210042101421024210342104421054210642107421084210942110421114211242113421144211542116421174211842119421204212142122421234212442125421264212742128421294213042131421324213342134421354213642137421384213942140421414214242143421444214542146421474214842149421504215142152421534215442155421564215742158421594216042161421624216342164421654216642167421684216942170421714217242173421744217542176421774217842179421804218142182421834218442185421864218742188421894219042191421924219342194421954219642197421984219942200422014220242203422044220542206422074220842209422104221142212422134221442215422164221742218422194222042221422224222342224422254222642227422284222942230422314223242233422344223542236422374223842239422404224142242422434224442245422464224742248422494225042251422524225342254422554225642257422584225942260422614226242263422644226542266422674226842269422704227142272422734227442275422764227742278422794228042281422824228342284422854228642287422884228942290422914229242293422944229542296422974229842299423004230142302423034230442305423064230742308423094231042311423124231342314423154231642317423184231942320423214232242323423244232542326423274232842329423304233142332423334233442335423364233742338423394234042341423424234342344423454234642347423484234942350423514235242353423544235542356423574235842359423604236142362423634236442365423664236742368423694237042371423724237342374423754237642377423784237942380423814238242383423844238542386423874238842389423904239142392423934239442395423964239742398423994240042401424024240342404424054240642407424084240942410424114241242413424144241542416424174241842419424204242142422424234242442425424264242742428424294243042431424324243342434424354243642437424384243942440424414244242443424444244542446424474244842449424504245142452424534245442455424564245742458424594246042461424624246342464424654246642467424684246942470424714247242473424744247542476424774247842479424804248142482424834248442485424864248742488424894249042491424924249342494424954249642497424984249942500425014250242503425044250542506425074250842509425104251142512425134251442515425164251742518425194252042521425224252342524425254252642527425284252942530425314253242533425344253542536425374253842539425404254142542425434254442545425464254742548425494255042551425524255342554425554255642557425584255942560425614256242563425644256542566425674256842569425704257142572425734257442575425764257742578425794258042581425824258342584425854258642587425884258942590425914259242593425944259542596425974259842599426004260142602426034260442605426064260742608426094261042611426124261342614426154261642617426184261942620426214262242623426244262542626426274262842629426304263142632426334263442635426364263742638426394264042641426424264342644426454264642647426484264942650426514265242653426544265542656426574265842659426604266142662426634266442665426664266742668426694267042671426724267342674426754267642677426784267942680426814268242683426844268542686426874268842689426904269142692426934269442695426964269742698426994270042701427024270342704427054270642707427084270942710427114271242713427144271542716427174271842719427204272142722427234272442725427264272742728427294273042731427324273342734427354273642737427384273942740427414274242743427444274542746427474274842749427504275142752427534275442755427564275742758427594276042761427624276342764427654276642767427684276942770427714277242773427744277542776427774277842779427804278142782427834278442785427864278742788427894279042791427924279342794427954279642797427984279942800428014280242803428044280542806428074280842809428104281142812428134281442815428164281742818428194282042821428224282342824428254282642827428284282942830428314283242833428344283542836428374283842839428404284142842428434284442845428464284742848428494285042851428524285342854428554285642857428584285942860428614286242863428644286542866428674286842869428704287142872428734287442875428764287742878428794288042881428824288342884428854288642887428884288942890428914289242893428944289542896428974289842899429004290142902429034290442905429064290742908429094291042911429124291342914429154291642917429184291942920429214292242923429244292542926429274292842929429304293142932429334293442935429364293742938429394294042941429424294342944429454294642947429484294942950429514295242953429544295542956429574295842959429604296142962429634296442965429664296742968429694297042971429724297342974429754297642977429784297942980429814298242983429844298542986429874298842989429904299142992429934299442995429964299742998429994300043001430024300343004430054300643007430084300943010430114301243013430144301543016430174301843019430204302143022430234302443025430264302743028430294303043031430324303343034430354303643037430384303943040430414304243043430444304543046430474304843049430504305143052430534305443055430564305743058430594306043061430624306343064430654306643067430684306943070430714307243073430744307543076430774307843079430804308143082430834308443085430864308743088430894309043091430924309343094430954309643097430984309943100431014310243103431044310543106431074310843109431104311143112431134311443115431164311743118431194312043121431224312343124431254312643127431284312943130431314313243133431344313543136431374313843139431404314143142431434314443145431464314743148431494315043151431524315343154431554315643157431584315943160431614316243163431644316543166431674316843169431704317143172431734317443175431764317743178431794318043181431824318343184431854318643187431884318943190431914319243193431944319543196431974319843199432004320143202432034320443205432064320743208432094321043211432124321343214432154321643217432184321943220432214322243223432244322543226432274322843229432304323143232432334323443235432364323743238432394324043241432424324343244432454324643247432484324943250432514325243253432544325543256432574325843259432604326143262432634326443265432664326743268432694327043271432724327343274432754327643277432784327943280432814328243283432844328543286432874328843289432904329143292432934329443295432964329743298432994330043301433024330343304433054330643307433084330943310433114331243313433144331543316433174331843319433204332143322433234332443325433264332743328433294333043331433324333343334433354333643337433384333943340433414334243343433444334543346433474334843349433504335143352433534335443355433564335743358433594336043361433624336343364433654336643367433684336943370433714337243373433744337543376433774337843379433804338143382433834338443385433864338743388433894339043391433924339343394433954339643397433984339943400434014340243403434044340543406434074340843409434104341143412434134341443415434164341743418434194342043421434224342343424434254342643427434284342943430434314343243433434344343543436434374343843439434404344143442434434344443445434464344743448434494345043451434524345343454434554345643457434584345943460434614346243463434644346543466434674346843469434704347143472434734347443475434764347743478434794348043481434824348343484434854348643487434884348943490434914349243493434944349543496434974349843499435004350143502435034350443505435064350743508435094351043511435124351343514435154351643517435184351943520435214352243523435244352543526435274352843529435304353143532435334353443535435364353743538435394354043541435424354343544435454354643547435484354943550435514355243553435544355543556435574355843559435604356143562435634356443565435664356743568435694357043571435724357343574435754357643577435784357943580435814358243583435844358543586435874358843589435904359143592435934359443595435964359743598435994360043601436024360343604436054360643607436084360943610436114361243613436144361543616436174361843619436204362143622436234362443625436264362743628436294363043631436324363343634436354363643637436384363943640436414364243643436444364543646436474364843649436504365143652436534365443655436564365743658436594366043661436624366343664436654366643667436684366943670436714367243673436744367543676436774367843679436804368143682436834368443685436864368743688436894369043691436924369343694436954369643697436984369943700437014370243703437044370543706437074370843709437104371143712437134371443715437164371743718437194372043721437224372343724437254372643727437284372943730437314373243733437344373543736437374373843739437404374143742437434374443745437464374743748437494375043751437524375343754437554375643757437584375943760437614376243763437644376543766437674376843769437704377143772437734377443775437764377743778437794378043781437824378343784437854378643787437884378943790437914379243793437944379543796437974379843799438004380143802438034380443805438064380743808438094381043811438124381343814438154381643817438184381943820438214382243823438244382543826438274382843829438304383143832438334383443835438364383743838438394384043841438424384343844438454384643847438484384943850438514385243853438544385543856438574385843859438604386143862438634386443865438664386743868438694387043871438724387343874438754387643877438784387943880438814388243883438844388543886438874388843889438904389143892438934389443895438964389743898438994390043901439024390343904439054390643907439084390943910439114391243913439144391543916439174391843919439204392143922439234392443925439264392743928439294393043931439324393343934439354393643937439384393943940439414394243943439444394543946439474394843949439504395143952439534395443955439564395743958439594396043961439624396343964439654396643967439684396943970439714397243973439744397543976439774397843979439804398143982439834398443985439864398743988439894399043991439924399343994439954399643997439984399944000440014400244003440044400544006440074400844009440104401144012440134401444015440164401744018440194402044021440224402344024440254402644027440284402944030440314403244033440344403544036440374403844039440404404144042440434404444045440464404744048440494405044051440524405344054440554405644057440584405944060440614406244063440644406544066440674406844069440704407144072440734407444075440764407744078440794408044081440824408344084440854408644087440884408944090440914409244093440944409544096440974409844099441004410144102441034410444105441064410744108441094411044111441124411344114441154411644117441184411944120441214412244123441244412544126441274412844129441304413144132441334413444135441364413744138441394414044141441424414344144441454414644147441484414944150441514415244153441544415544156441574415844159441604416144162441634416444165441664416744168441694417044171441724417344174441754417644177441784417944180441814418244183441844418544186441874418844189441904419144192441934419444195441964419744198441994420044201442024420344204442054420644207442084420944210442114421244213442144421544216442174421844219442204422144222442234422444225442264422744228442294423044231442324423344234442354423644237442384423944240442414424244243442444424544246442474424844249442504425144252442534425444255442564425744258442594426044261442624426344264442654426644267442684426944270442714427244273442744427544276442774427844279442804428144282442834428444285442864428744288442894429044291442924429344294442954429644297442984429944300443014430244303443044430544306443074430844309443104431144312443134431444315443164431744318443194432044321443224432344324443254432644327443284432944330443314433244333443344433544336443374433844339443404434144342443434434444345443464434744348443494435044351443524435344354443554435644357443584435944360443614436244363443644436544366443674436844369443704437144372443734437444375443764437744378443794438044381443824438344384443854438644387443884438944390443914439244393443944439544396443974439844399444004440144402444034440444405444064440744408444094441044411444124441344414444154441644417444184441944420444214442244423444244442544426444274442844429444304443144432444334443444435444364443744438444394444044441444424444344444444454444644447444484444944450444514445244453444544445544456444574445844459444604446144462444634446444465444664446744468444694447044471444724447344474444754447644477444784447944480444814448244483444844448544486444874448844489444904449144492444934449444495444964449744498444994450044501445024450344504445054450644507445084450944510445114451244513445144451544516445174451844519445204452144522445234452444525445264452744528445294453044531445324453344534445354453644537445384453944540445414454244543445444454544546445474454844549445504455144552445534455444555445564455744558445594456044561445624456344564445654456644567445684456944570445714457244573445744457544576445774457844579445804458144582445834458444585445864458744588445894459044591445924459344594445954459644597445984459944600446014460244603446044460544606446074460844609446104461144612446134461444615446164461744618446194462044621446224462344624446254462644627446284462944630446314463244633446344463544636446374463844639446404464144642446434464444645446464464744648446494465044651446524465344654446554465644657446584465944660446614466244663446644466544666446674466844669446704467144672446734467444675446764467744678446794468044681446824468344684446854468644687446884468944690446914469244693446944469544696446974469844699447004470144702447034470444705447064470744708447094471044711447124471344714447154471644717447184471944720447214472244723447244472544726447274472844729447304473144732447334473444735447364473744738447394474044741447424474344744447454474644747447484474944750447514475244753447544475544756447574475844759447604476144762447634476444765447664476744768447694477044771447724477344774447754477644777447784477944780447814478244783447844478544786447874478844789447904479144792447934479444795447964479744798447994480044801448024480344804448054480644807448084480944810448114481244813448144481544816448174481844819448204482144822448234482444825448264482744828448294483044831448324483344834448354483644837448384483944840448414484244843448444484544846448474484844849448504485144852448534485444855448564485744858448594486044861448624486344864448654486644867448684486944870448714487244873448744487544876448774487844879448804488144882448834488444885448864488744888448894489044891448924489344894448954489644897448984489944900449014490244903449044490544906449074490844909449104491144912449134491444915449164491744918449194492044921449224492344924449254492644927449284492944930449314493244933449344493544936449374493844939449404494144942449434494444945449464494744948449494495044951449524495344954449554495644957449584495944960449614496244963449644496544966449674496844969449704497144972449734497444975449764497744978449794498044981449824498344984449854498644987449884498944990449914499244993449944499544996449974499844999450004500145002450034500445005450064500745008450094501045011450124501345014450154501645017450184501945020450214502245023450244502545026450274502845029450304503145032450334503445035450364503745038450394504045041450424504345044450454504645047450484504945050450514505245053450544505545056450574505845059450604506145062450634506445065450664506745068450694507045071450724507345074450754507645077450784507945080450814508245083450844508545086450874508845089450904509145092450934509445095450964509745098450994510045101451024510345104451054510645107451084510945110451114511245113451144511545116451174511845119451204512145122451234512445125451264512745128451294513045131451324513345134451354513645137451384513945140451414514245143451444514545146451474514845149451504515145152451534515445155451564515745158451594516045161451624516345164451654516645167451684516945170451714517245173451744517545176451774517845179451804518145182451834518445185451864518745188451894519045191451924519345194451954519645197451984519945200452014520245203452044520545206452074520845209452104521145212452134521445215452164521745218452194522045221452224522345224452254522645227452284522945230452314523245233452344523545236452374523845239452404524145242452434524445245452464524745248452494525045251452524525345254452554525645257452584525945260452614526245263452644526545266452674526845269452704527145272452734527445275452764527745278452794528045281452824528345284452854528645287452884528945290452914529245293452944529545296452974529845299453004530145302453034530445305453064530745308453094531045311453124531345314453154531645317453184531945320453214532245323453244532545326453274532845329453304533145332453334533445335453364533745338453394534045341453424534345344453454534645347453484534945350453514535245353453544535545356453574535845359453604536145362453634536445365453664536745368453694537045371453724537345374453754537645377453784537945380453814538245383453844538545386453874538845389453904539145392453934539445395453964539745398453994540045401454024540345404454054540645407454084540945410454114541245413454144541545416454174541845419454204542145422454234542445425454264542745428454294543045431454324543345434454354543645437454384543945440454414544245443454444544545446454474544845449454504545145452454534545445455454564545745458454594546045461454624546345464454654546645467454684546945470454714547245473454744547545476454774547845479454804548145482454834548445485454864548745488454894549045491454924549345494454954549645497454984549945500455014550245503455044550545506455074550845509455104551145512455134551445515455164551745518455194552045521455224552345524455254552645527455284552945530455314553245533455344553545536455374553845539455404554145542455434554445545455464554745548455494555045551455524555345554455554555645557455584555945560455614556245563455644556545566455674556845569455704557145572455734557445575455764557745578455794558045581455824558345584455854558645587455884558945590455914559245593455944559545596455974559845599456004560145602456034560445605456064560745608456094561045611456124561345614456154561645617456184561945620456214562245623456244562545626456274562845629456304563145632456334563445635456364563745638456394564045641456424564345644456454564645647456484564945650456514565245653456544565545656456574565845659456604566145662456634566445665456664566745668456694567045671456724567345674456754567645677456784567945680456814568245683456844568545686456874568845689456904569145692456934569445695456964569745698456994570045701457024570345704457054570645707457084570945710457114571245713457144571545716457174571845719457204572145722457234572445725457264572745728457294573045731457324573345734457354573645737457384573945740457414574245743457444574545746457474574845749457504575145752457534575445755457564575745758457594576045761457624576345764457654576645767457684576945770457714577245773457744577545776457774577845779457804578145782457834578445785457864578745788457894579045791457924579345794457954579645797457984579945800458014580245803458044580545806458074580845809458104581145812458134581445815458164581745818458194582045821458224582345824458254582645827458284582945830458314583245833458344583545836458374583845839458404584145842458434584445845458464584745848458494585045851458524585345854458554585645857458584585945860458614586245863458644586545866458674586845869458704587145872458734587445875458764587745878458794588045881458824588345884458854588645887458884588945890458914589245893458944589545896458974589845899459004590145902459034590445905459064590745908459094591045911459124591345914459154591645917459184591945920459214592245923459244592545926459274592845929459304593145932459334593445935459364593745938459394594045941459424594345944459454594645947459484594945950459514595245953459544595545956459574595845959459604596145962459634596445965459664596745968459694597045971459724597345974459754597645977459784597945980459814598245983459844598545986459874598845989459904599145992459934599445995459964599745998459994600046001460024600346004460054600646007460084600946010460114601246013460144601546016460174601846019460204602146022460234602446025460264602746028460294603046031460324603346034460354603646037460384603946040460414604246043460444604546046460474604846049460504605146052460534605446055460564605746058460594606046061460624606346064460654606646067460684606946070460714607246073460744607546076460774607846079460804608146082460834608446085460864608746088460894609046091460924609346094460954609646097460984609946100461014610246103461044610546106461074610846109461104611146112461134611446115461164611746118461194612046121461224612346124461254612646127461284612946130461314613246133461344613546136461374613846139461404614146142461434614446145461464614746148461494615046151461524615346154461554615646157461584615946160461614616246163461644616546166461674616846169461704617146172461734617446175461764617746178461794618046181461824618346184461854618646187461884618946190461914619246193461944619546196461974619846199462004620146202462034620446205462064620746208462094621046211462124621346214462154621646217462184621946220462214622246223462244622546226462274622846229462304623146232462334623446235462364623746238462394624046241462424624346244462454624646247462484624946250462514625246253462544625546256462574625846259462604626146262462634626446265462664626746268462694627046271462724627346274462754627646277462784627946280462814628246283462844628546286462874628846289462904629146292462934629446295462964629746298462994630046301463024630346304463054630646307463084630946310463114631246313463144631546316463174631846319463204632146322463234632446325463264632746328463294633046331463324633346334463354633646337463384633946340463414634246343463444634546346463474634846349463504635146352463534635446355463564635746358463594636046361463624636346364463654636646367463684636946370463714637246373463744637546376463774637846379463804638146382463834638446385463864638746388463894639046391463924639346394463954639646397463984639946400464014640246403464044640546406464074640846409464104641146412464134641446415464164641746418464194642046421464224642346424464254642646427464284642946430464314643246433464344643546436464374643846439464404644146442464434644446445464464644746448464494645046451464524645346454464554645646457464584645946460464614646246463464644646546466464674646846469464704647146472464734647446475464764647746478464794648046481464824648346484464854648646487464884648946490464914649246493464944649546496464974649846499465004650146502465034650446505465064650746508465094651046511465124651346514465154651646517465184651946520465214652246523465244652546526465274652846529465304653146532465334653446535465364653746538465394654046541465424654346544465454654646547465484654946550465514655246553465544655546556465574655846559465604656146562465634656446565465664656746568465694657046571465724657346574465754657646577465784657946580465814658246583465844658546586465874658846589465904659146592465934659446595465964659746598465994660046601466024660346604466054660646607466084660946610466114661246613466144661546616466174661846619466204662146622466234662446625466264662746628466294663046631466324663346634466354663646637466384663946640466414664246643466444664546646466474664846649466504665146652466534665446655466564665746658466594666046661466624666346664466654666646667466684666946670466714667246673466744667546676466774667846679466804668146682466834668446685466864668746688466894669046691466924669346694466954669646697466984669946700467014670246703467044670546706467074670846709467104671146712467134671446715467164671746718467194672046721467224672346724467254672646727467284672946730467314673246733467344673546736467374673846739467404674146742467434674446745467464674746748467494675046751467524675346754467554675646757467584675946760467614676246763467644676546766467674676846769467704677146772467734677446775467764677746778467794678046781467824678346784467854678646787467884678946790467914679246793467944679546796467974679846799468004680146802468034680446805468064680746808468094681046811468124681346814468154681646817468184681946820468214682246823468244682546826468274682846829468304683146832468334683446835468364683746838468394684046841468424684346844468454684646847468484684946850468514685246853468544685546856468574685846859468604686146862468634686446865468664686746868468694687046871468724687346874468754687646877468784687946880468814688246883468844688546886468874688846889468904689146892468934689446895468964689746898468994690046901469024690346904469054690646907469084690946910469114691246913469144691546916469174691846919469204692146922469234692446925469264692746928469294693046931469324693346934469354693646937469384693946940469414694246943469444694546946469474694846949469504695146952469534695446955469564695746958469594696046961469624696346964469654696646967469684696946970469714697246973469744697546976469774697846979469804698146982469834698446985469864698746988469894699046991469924699346994469954699646997469984699947000470014700247003470044700547006470074700847009470104701147012470134701447015470164701747018470194702047021470224702347024470254702647027470284702947030470314703247033470344703547036470374703847039470404704147042470434704447045470464704747048470494705047051470524705347054470554705647057470584705947060470614706247063470644706547066470674706847069470704707147072470734707447075470764707747078470794708047081470824708347084470854708647087470884708947090470914709247093470944709547096470974709847099471004710147102471034710447105471064710747108471094711047111471124711347114471154711647117471184711947120471214712247123471244712547126471274712847129471304713147132471334713447135471364713747138471394714047141471424714347144471454714647147471484714947150471514715247153471544715547156471574715847159471604716147162471634716447165471664716747168471694717047171471724717347174471754717647177471784717947180471814718247183471844718547186471874718847189471904719147192471934719447195471964719747198471994720047201472024720347204472054720647207472084720947210472114721247213472144721547216472174721847219472204722147222472234722447225472264722747228472294723047231472324723347234472354723647237472384723947240472414724247243472444724547246472474724847249472504725147252472534725447255472564725747258472594726047261472624726347264472654726647267472684726947270472714727247273472744727547276472774727847279472804728147282472834728447285472864728747288472894729047291472924729347294472954729647297472984729947300473014730247303473044730547306473074730847309473104731147312473134731447315473164731747318473194732047321473224732347324473254732647327473284732947330473314733247333473344733547336473374733847339473404734147342473434734447345473464734747348473494735047351473524735347354473554735647357473584735947360473614736247363473644736547366473674736847369473704737147372473734737447375473764737747378473794738047381473824738347384473854738647387473884738947390473914739247393473944739547396473974739847399474004740147402474034740447405474064740747408474094741047411474124741347414474154741647417474184741947420474214742247423474244742547426474274742847429474304743147432474334743447435474364743747438474394744047441474424744347444474454744647447474484744947450474514745247453474544745547456474574745847459474604746147462474634746447465474664746747468474694747047471474724747347474474754747647477474784747947480474814748247483474844748547486474874748847489474904749147492474934749447495474964749747498474994750047501475024750347504475054750647507475084750947510475114751247513475144751547516475174751847519475204752147522475234752447525475264752747528475294753047531475324753347534475354753647537475384753947540475414754247543475444754547546475474754847549475504755147552475534755447555475564755747558475594756047561475624756347564475654756647567475684756947570475714757247573475744757547576475774757847579475804758147582475834758447585475864758747588475894759047591475924759347594475954759647597475984759947600476014760247603476044760547606476074760847609476104761147612476134761447615476164761747618476194762047621476224762347624476254762647627476284762947630476314763247633476344763547636476374763847639476404764147642476434764447645476464764747648476494765047651476524765347654476554765647657476584765947660476614766247663476644766547666476674766847669476704767147672476734767447675476764767747678476794768047681476824768347684476854768647687476884768947690476914769247693476944769547696476974769847699477004770147702477034770447705477064770747708477094771047711477124771347714477154771647717477184771947720477214772247723477244772547726477274772847729477304773147732477334773447735477364773747738477394774047741477424774347744477454774647747477484774947750477514775247753477544775547756477574775847759477604776147762477634776447765477664776747768477694777047771477724777347774477754777647777477784777947780477814778247783477844778547786477874778847789477904779147792477934779447795477964779747798477994780047801478024780347804478054780647807478084780947810478114781247813478144781547816478174781847819478204782147822478234782447825478264782747828478294783047831478324783347834478354783647837478384783947840478414784247843478444784547846478474784847849478504785147852478534785447855478564785747858478594786047861478624786347864478654786647867478684786947870478714787247873478744787547876478774787847879478804788147882478834788447885478864788747888478894789047891478924789347894478954789647897478984789947900479014790247903479044790547906479074790847909479104791147912479134791447915479164791747918479194792047921479224792347924479254792647927479284792947930479314793247933479344793547936479374793847939479404794147942479434794447945479464794747948479494795047951479524795347954479554795647957479584795947960479614796247963479644796547966479674796847969479704797147972479734797447975479764797747978479794798047981479824798347984479854798647987479884798947990479914799247993479944799547996479974799847999480004800148002480034800448005480064800748008480094801048011480124801348014480154801648017480184801948020480214802248023480244802548026480274802848029480304803148032480334803448035480364803748038480394804048041480424804348044480454804648047480484804948050480514805248053480544805548056480574805848059480604806148062480634806448065480664806748068480694807048071480724807348074480754807648077480784807948080480814808248083480844808548086480874808848089480904809148092480934809448095480964809748098480994810048101481024810348104481054810648107481084810948110481114811248113481144811548116481174811848119481204812148122481234812448125481264812748128481294813048131481324813348134481354813648137481384813948140481414814248143481444814548146481474814848149481504815148152481534815448155481564815748158481594816048161481624816348164481654816648167481684816948170481714817248173481744817548176481774817848179481804818148182481834818448185481864818748188481894819048191481924819348194481954819648197481984819948200482014820248203482044820548206482074820848209482104821148212482134821448215482164821748218482194822048221482224822348224482254822648227482284822948230482314823248233482344823548236482374823848239482404824148242482434824448245482464824748248482494825048251482524825348254482554825648257482584825948260482614826248263482644826548266482674826848269482704827148272482734827448275482764827748278482794828048281482824828348284482854828648287482884828948290482914829248293482944829548296482974829848299483004830148302483034830448305483064830748308483094831048311483124831348314483154831648317483184831948320483214832248323483244832548326483274832848329483304833148332483334833448335483364833748338483394834048341483424834348344483454834648347483484834948350483514835248353483544835548356483574835848359483604836148362483634836448365483664836748368483694837048371483724837348374483754837648377483784837948380483814838248383483844838548386483874838848389483904839148392483934839448395483964839748398483994840048401484024840348404484054840648407484084840948410484114841248413484144841548416484174841848419484204842148422484234842448425484264842748428484294843048431484324843348434484354843648437484384843948440484414844248443484444844548446484474844848449484504845148452484534845448455484564845748458484594846048461484624846348464484654846648467484684846948470484714847248473484744847548476484774847848479484804848148482484834848448485484864848748488484894849048491484924849348494484954849648497484984849948500485014850248503485044850548506485074850848509485104851148512485134851448515485164851748518485194852048521485224852348524485254852648527485284852948530485314853248533485344853548536485374853848539485404854148542485434854448545485464854748548485494855048551485524855348554485554855648557485584855948560485614856248563485644856548566485674856848569485704857148572485734857448575485764857748578485794858048581485824858348584485854858648587485884858948590485914859248593485944859548596485974859848599486004860148602486034860448605486064860748608486094861048611486124861348614486154861648617486184861948620486214862248623486244862548626486274862848629486304863148632486334863448635486364863748638486394864048641486424864348644486454864648647486484864948650486514865248653486544865548656486574865848659486604866148662486634866448665486664866748668486694867048671486724867348674486754867648677486784867948680486814868248683486844868548686486874868848689486904869148692486934869448695486964869748698486994870048701487024870348704487054870648707487084870948710487114871248713487144871548716487174871848719487204872148722487234872448725487264872748728487294873048731487324873348734487354873648737487384873948740487414874248743487444874548746487474874848749487504875148752487534875448755487564875748758487594876048761487624876348764487654876648767487684876948770487714877248773487744877548776487774877848779487804878148782487834878448785487864878748788487894879048791487924879348794487954879648797487984879948800488014880248803488044880548806488074880848809488104881148812488134881448815488164881748818488194882048821488224882348824488254882648827488284882948830488314883248833488344883548836488374883848839488404884148842488434884448845488464884748848488494885048851488524885348854488554885648857488584885948860488614886248863488644886548866488674886848869488704887148872488734887448875488764887748878488794888048881488824888348884488854888648887488884888948890488914889248893488944889548896488974889848899489004890148902489034890448905489064890748908489094891048911489124891348914489154891648917489184891948920489214892248923489244892548926489274892848929489304893148932489334893448935489364893748938489394894048941489424894348944489454894648947489484894948950489514895248953489544895548956489574895848959489604896148962489634896448965489664896748968489694897048971489724897348974489754897648977489784897948980489814898248983489844898548986489874898848989489904899148992489934899448995489964899748998489994900049001490024900349004490054900649007490084900949010490114901249013490144901549016490174901849019490204902149022490234902449025490264902749028490294903049031490324903349034490354903649037490384903949040490414904249043490444904549046490474904849049490504905149052490534905449055490564905749058490594906049061490624906349064490654906649067490684906949070490714907249073490744907549076490774907849079490804908149082490834908449085490864908749088490894909049091490924909349094490954909649097490984909949100491014910249103491044910549106491074910849109491104911149112491134911449115491164911749118491194912049121491224912349124491254912649127491284912949130491314913249133491344913549136491374913849139491404914149142491434914449145491464914749148491494915049151491524915349154491554915649157491584915949160491614916249163491644916549166491674916849169491704917149172491734917449175491764917749178491794918049181491824918349184491854918649187491884918949190491914919249193491944919549196491974919849199492004920149202492034920449205492064920749208492094921049211492124921349214492154921649217492184921949220492214922249223492244922549226492274922849229492304923149232492334923449235492364923749238492394924049241492424924349244492454924649247492484924949250492514925249253492544925549256492574925849259492604926149262492634926449265492664926749268492694927049271492724927349274492754927649277492784927949280492814928249283492844928549286492874928849289492904929149292492934929449295492964929749298492994930049301493024930349304493054930649307493084930949310493114931249313493144931549316493174931849319493204932149322493234932449325493264932749328493294933049331493324933349334493354933649337493384933949340493414934249343493444934549346493474934849349493504935149352493534935449355493564935749358493594936049361493624936349364493654936649367493684936949370493714937249373493744937549376493774937849379493804938149382493834938449385493864938749388493894939049391493924939349394493954939649397493984939949400494014940249403494044940549406494074940849409494104941149412494134941449415494164941749418494194942049421494224942349424494254942649427494284942949430494314943249433494344943549436494374943849439494404944149442494434944449445494464944749448494494945049451494524945349454494554945649457494584945949460494614946249463494644946549466494674946849469494704947149472494734947449475494764947749478494794948049481494824948349484494854948649487494884948949490494914949249493494944949549496494974949849499495004950149502495034950449505495064950749508495094951049511495124951349514495154951649517495184951949520495214952249523495244952549526495274952849529495304953149532495334953449535495364953749538495394954049541495424954349544495454954649547495484954949550495514955249553495544955549556495574955849559495604956149562495634956449565495664956749568495694957049571495724957349574495754957649577495784957949580495814958249583495844958549586495874958849589495904959149592495934959449595495964959749598495994960049601496024960349604496054960649607496084960949610496114961249613496144961549616496174961849619496204962149622496234962449625496264962749628496294963049631496324963349634496354963649637496384963949640496414964249643496444964549646496474964849649496504965149652496534965449655496564965749658496594966049661496624966349664496654966649667496684966949670496714967249673496744967549676496774967849679496804968149682496834968449685496864968749688496894969049691496924969349694496954969649697496984969949700497014970249703497044970549706497074970849709497104971149712497134971449715497164971749718497194972049721497224972349724497254972649727497284972949730497314973249733497344973549736497374973849739497404974149742497434974449745497464974749748497494975049751497524975349754497554975649757497584975949760497614976249763497644976549766497674976849769497704977149772497734977449775497764977749778497794978049781497824978349784497854978649787497884978949790497914979249793497944979549796497974979849799498004980149802498034980449805498064980749808498094981049811498124981349814498154981649817498184981949820498214982249823498244982549826498274982849829498304983149832498334983449835498364983749838498394984049841498424984349844498454984649847498484984949850498514985249853498544985549856498574985849859498604986149862498634986449865498664986749868498694987049871498724987349874498754987649877498784987949880498814988249883498844988549886498874988849889498904989149892498934989449895498964989749898498994990049901499024990349904499054990649907499084990949910499114991249913499144991549916499174991849919499204992149922499234992449925499264992749928499294993049931499324993349934499354993649937499384993949940499414994249943499444994549946499474994849949499504995149952499534995449955499564995749958499594996049961499624996349964499654996649967499684996949970499714997249973499744997549976499774997849979499804998149982499834998449985499864998749988499894999049991499924999349994499954999649997499984999950000500015000250003500045000550006500075000850009500105001150012500135001450015500165001750018500195002050021500225002350024500255002650027500285002950030500315003250033500345003550036500375003850039500405004150042500435004450045500465004750048500495005050051500525005350054500555005650057500585005950060500615006250063500645006550066500675006850069500705007150072500735007450075500765007750078500795008050081500825008350084500855008650087500885008950090500915009250093500945009550096500975009850099501005010150102501035010450105501065010750108501095011050111501125011350114501155011650117501185011950120501215012250123501245012550126501275012850129501305013150132501335013450135501365013750138501395014050141501425014350144501455014650147501485014950150501515015250153501545015550156501575015850159501605016150162501635016450165501665016750168501695017050171501725017350174501755017650177501785017950180501815018250183501845018550186501875018850189501905019150192501935019450195501965019750198501995020050201502025020350204502055020650207502085020950210502115021250213502145021550216502175021850219502205022150222502235022450225502265022750228502295023050231502325023350234502355023650237502385023950240502415024250243502445024550246502475024850249502505025150252502535025450255502565025750258502595026050261502625026350264502655026650267502685026950270502715027250273502745027550276502775027850279502805028150282502835028450285502865028750288502895029050291502925029350294502955029650297502985029950300503015030250303503045030550306503075030850309503105031150312503135031450315503165031750318503195032050321503225032350324503255032650327503285032950330503315033250333503345033550336503375033850339503405034150342503435034450345503465034750348503495035050351503525035350354503555035650357503585035950360503615036250363503645036550366503675036850369503705037150372503735037450375503765037750378503795038050381503825038350384503855038650387503885038950390503915039250393503945039550396503975039850399504005040150402504035040450405504065040750408504095041050411504125041350414504155041650417504185041950420504215042250423504245042550426504275042850429504305043150432504335043450435504365043750438504395044050441504425044350444504455044650447504485044950450504515045250453504545045550456504575045850459504605046150462504635046450465504665046750468504695047050471504725047350474504755047650477504785047950480504815048250483504845048550486504875048850489504905049150492504935049450495504965049750498504995050050501505025050350504505055050650507505085050950510505115051250513505145051550516505175051850519505205052150522505235052450525505265052750528505295053050531505325053350534505355053650537505385053950540505415054250543505445054550546505475054850549505505055150552505535055450555505565055750558505595056050561505625056350564505655056650567505685056950570505715057250573505745057550576505775057850579505805058150582505835058450585505865058750588505895059050591505925059350594505955059650597505985059950600506015060250603506045060550606506075060850609506105061150612506135061450615506165061750618506195062050621506225062350624506255062650627506285062950630506315063250633506345063550636506375063850639506405064150642506435064450645506465064750648506495065050651506525065350654506555065650657506585065950660506615066250663506645066550666506675066850669506705067150672506735067450675506765067750678506795068050681506825068350684506855068650687506885068950690506915069250693506945069550696506975069850699507005070150702507035070450705507065070750708507095071050711507125071350714507155071650717507185071950720507215072250723507245072550726507275072850729507305073150732507335073450735507365073750738507395074050741507425074350744507455074650747507485074950750507515075250753507545075550756507575075850759507605076150762507635076450765507665076750768507695077050771507725077350774507755077650777507785077950780507815078250783507845078550786507875078850789507905079150792507935079450795507965079750798507995080050801508025080350804508055080650807508085080950810508115081250813508145081550816508175081850819508205082150822508235082450825508265082750828508295083050831508325083350834508355083650837508385083950840508415084250843508445084550846508475084850849508505085150852508535085450855508565085750858508595086050861508625086350864508655086650867508685086950870508715087250873508745087550876508775087850879508805088150882508835088450885508865088750888508895089050891508925089350894508955089650897508985089950900509015090250903509045090550906509075090850909509105091150912509135091450915509165091750918509195092050921509225092350924509255092650927509285092950930509315093250933509345093550936509375093850939509405094150942509435094450945509465094750948509495095050951509525095350954509555095650957509585095950960509615096250963509645096550966509675096850969509705097150972509735097450975509765097750978509795098050981509825098350984509855098650987509885098950990509915099250993509945099550996509975099850999510005100151002510035100451005510065100751008510095101051011510125101351014510155101651017510185101951020510215102251023510245102551026510275102851029510305103151032510335103451035510365103751038510395104051041510425104351044510455104651047510485104951050510515105251053510545105551056510575105851059510605106151062510635106451065510665106751068510695107051071510725107351074510755107651077510785107951080510815108251083510845108551086510875108851089510905109151092510935109451095510965109751098510995110051101511025110351104511055110651107511085110951110511115111251113511145111551116511175111851119511205112151122511235112451125511265112751128511295113051131511325113351134511355113651137511385113951140511415114251143511445114551146511475114851149511505115151152511535115451155511565115751158511595116051161511625116351164511655116651167511685116951170511715117251173511745117551176511775117851179511805118151182511835118451185511865118751188511895119051191511925119351194511955119651197511985119951200512015120251203512045120551206512075120851209512105121151212512135121451215512165121751218512195122051221512225122351224512255122651227512285122951230512315123251233512345123551236512375123851239512405124151242512435124451245512465124751248512495125051251512525125351254512555125651257512585125951260512615126251263512645126551266512675126851269512705127151272512735127451275512765127751278512795128051281512825128351284512855128651287512885128951290512915129251293512945129551296512975129851299513005130151302513035130451305513065130751308513095131051311513125131351314513155131651317513185131951320513215132251323513245132551326513275132851329513305133151332513335133451335513365133751338513395134051341513425134351344513455134651347513485134951350513515135251353513545135551356513575135851359513605136151362513635136451365513665136751368513695137051371513725137351374513755137651377513785137951380513815138251383513845138551386513875138851389513905139151392513935139451395513965139751398513995140051401514025140351404514055140651407514085140951410514115141251413514145141551416514175141851419514205142151422514235142451425514265142751428514295143051431514325143351434514355143651437514385143951440514415144251443514445144551446514475144851449514505145151452514535145451455514565145751458514595146051461514625146351464514655146651467514685146951470514715147251473514745147551476514775147851479514805148151482514835148451485514865148751488514895149051491514925149351494514955149651497514985149951500515015150251503515045150551506515075150851509515105151151512515135151451515515165151751518515195152051521515225152351524515255152651527515285152951530515315153251533515345153551536515375153851539515405154151542515435154451545515465154751548515495155051551515525155351554515555155651557515585155951560515615156251563515645156551566515675156851569515705157151572515735157451575515765157751578515795158051581515825158351584515855158651587515885158951590515915159251593515945159551596515975159851599516005160151602516035160451605516065160751608516095161051611516125161351614516155161651617516185161951620516215162251623516245162551626516275162851629516305163151632516335163451635516365163751638516395164051641516425164351644516455164651647516485164951650516515165251653516545165551656516575165851659516605166151662516635166451665516665166751668516695167051671516725167351674516755167651677516785167951680516815168251683516845168551686516875168851689516905169151692516935169451695516965169751698516995170051701517025170351704517055170651707517085170951710517115171251713517145171551716517175171851719517205172151722517235172451725517265172751728517295173051731517325173351734517355173651737517385173951740517415174251743517445174551746517475174851749517505175151752517535175451755517565175751758517595176051761517625176351764517655176651767517685176951770517715177251773517745177551776517775177851779517805178151782517835178451785517865178751788517895179051791517925179351794517955179651797517985179951800518015180251803518045180551806518075180851809518105181151812518135181451815518165181751818518195182051821518225182351824518255182651827518285182951830518315183251833518345183551836518375183851839518405184151842518435184451845518465184751848518495185051851518525185351854518555185651857518585185951860518615186251863518645186551866518675186851869518705187151872518735187451875518765187751878518795188051881518825188351884518855188651887518885188951890518915189251893518945189551896518975189851899519005190151902519035190451905519065190751908519095191051911519125191351914519155191651917519185191951920519215192251923519245192551926519275192851929519305193151932519335193451935519365193751938519395194051941519425194351944519455194651947519485194951950519515195251953519545195551956519575195851959519605196151962519635196451965519665196751968519695197051971519725197351974519755197651977519785197951980519815198251983519845198551986519875198851989519905199151992519935199451995519965199751998519995200052001520025200352004520055200652007520085200952010520115201252013520145201552016520175201852019520205202152022520235202452025520265202752028520295203052031520325203352034520355203652037520385203952040520415204252043520445204552046520475204852049520505205152052520535205452055520565205752058520595206052061520625206352064520655206652067520685206952070520715207252073520745207552076520775207852079520805208152082520835208452085520865208752088520895209052091520925209352094520955209652097520985209952100521015210252103521045210552106521075210852109521105211152112521135211452115521165211752118521195212052121521225212352124521255212652127521285212952130521315213252133521345213552136521375213852139521405214152142521435214452145521465214752148521495215052151521525215352154521555215652157521585215952160521615216252163521645216552166521675216852169521705217152172521735217452175521765217752178521795218052181521825218352184521855218652187521885218952190521915219252193521945219552196521975219852199522005220152202522035220452205522065220752208522095221052211522125221352214522155221652217522185221952220522215222252223522245222552226522275222852229522305223152232522335223452235522365223752238522395224052241522425224352244522455224652247522485224952250522515225252253522545225552256522575225852259522605226152262522635226452265522665226752268522695227052271522725227352274522755227652277522785227952280522815228252283522845228552286522875228852289522905229152292522935229452295522965229752298522995230052301523025230352304523055230652307523085230952310523115231252313523145231552316523175231852319523205232152322523235232452325523265232752328523295233052331523325233352334523355233652337523385233952340523415234252343523445234552346523475234852349523505235152352523535235452355523565235752358523595236052361523625236352364523655236652367523685236952370523715237252373523745237552376523775237852379523805238152382523835238452385523865238752388523895239052391523925239352394523955239652397523985239952400524015240252403524045240552406524075240852409524105241152412524135241452415524165241752418524195242052421524225242352424524255242652427524285242952430524315243252433524345243552436524375243852439524405244152442524435244452445524465244752448524495245052451524525245352454524555245652457524585245952460524615246252463524645246552466524675246852469524705247152472524735247452475524765247752478524795248052481524825248352484524855248652487524885248952490524915249252493524945249552496524975249852499525005250152502525035250452505525065250752508525095251052511525125251352514525155251652517525185251952520525215252252523525245252552526525275252852529525305253152532525335253452535525365253752538525395254052541525425254352544525455254652547525485254952550525515255252553525545255552556525575255852559525605256152562525635256452565525665256752568525695257052571525725257352574525755257652577525785257952580525815258252583525845258552586525875258852589525905259152592525935259452595525965259752598525995260052601526025260352604526055260652607526085260952610526115261252613526145261552616526175261852619526205262152622526235262452625526265262752628526295263052631526325263352634526355263652637526385263952640526415264252643526445264552646526475264852649526505265152652526535265452655526565265752658526595266052661526625266352664526655266652667526685266952670526715267252673526745267552676526775267852679526805268152682526835268452685526865268752688526895269052691526925269352694526955269652697526985269952700527015270252703527045270552706527075270852709527105271152712527135271452715527165271752718527195272052721527225272352724527255272652727527285272952730527315273252733527345273552736527375273852739527405274152742527435274452745527465274752748527495275052751527525275352754527555275652757527585275952760527615276252763527645276552766527675276852769527705277152772527735277452775527765277752778527795278052781527825278352784527855278652787527885278952790527915279252793527945279552796527975279852799528005280152802528035280452805528065280752808528095281052811528125281352814528155281652817528185281952820528215282252823528245282552826528275282852829528305283152832528335283452835528365283752838528395284052841528425284352844528455284652847528485284952850528515285252853528545285552856528575285852859528605286152862528635286452865528665286752868528695287052871528725287352874528755287652877528785287952880528815288252883528845288552886528875288852889528905289152892528935289452895528965289752898528995290052901529025290352904529055290652907529085290952910529115291252913529145291552916529175291852919529205292152922529235292452925529265292752928529295293052931529325293352934529355293652937529385293952940529415294252943529445294552946529475294852949529505295152952529535295452955529565295752958529595296052961529625296352964529655296652967529685296952970529715297252973529745297552976529775297852979529805298152982529835298452985529865298752988529895299052991529925299352994529955299652997529985299953000530015300253003530045300553006530075300853009530105301153012530135301453015530165301753018530195302053021530225302353024530255302653027530285302953030530315303253033530345303553036530375303853039530405304153042530435304453045530465304753048530495305053051530525305353054530555305653057530585305953060530615306253063530645306553066530675306853069530705307153072530735307453075530765307753078530795308053081530825308353084530855308653087530885308953090530915309253093530945309553096530975309853099531005310153102531035310453105531065310753108531095311053111531125311353114531155311653117531185311953120531215312253123531245312553126531275312853129531305313153132531335313453135531365313753138531395314053141531425314353144531455314653147531485314953150531515315253153531545315553156531575315853159531605316153162531635316453165531665316753168531695317053171531725317353174531755317653177531785317953180531815318253183531845318553186531875318853189531905319153192531935319453195531965319753198531995320053201532025320353204532055320653207532085320953210532115321253213532145321553216532175321853219532205322153222532235322453225532265322753228532295323053231532325323353234532355323653237532385323953240532415324253243532445324553246532475324853249532505325153252532535325453255532565325753258532595326053261532625326353264532655326653267532685326953270532715327253273532745327553276532775327853279532805328153282532835328453285532865328753288532895329053291532925329353294532955329653297532985329953300533015330253303533045330553306533075330853309533105331153312533135331453315533165331753318533195332053321533225332353324533255332653327533285332953330533315333253333533345333553336533375333853339533405334153342533435334453345533465334753348533495335053351533525335353354533555335653357533585335953360533615336253363533645336553366533675336853369533705337153372533735337453375533765337753378533795338053381533825338353384533855338653387533885338953390533915339253393533945339553396533975339853399534005340153402534035340453405534065340753408534095341053411534125341353414534155341653417534185341953420534215342253423534245342553426534275342853429534305343153432534335343453435534365343753438534395344053441534425344353444534455344653447534485344953450534515345253453534545345553456534575345853459534605346153462534635346453465534665346753468534695347053471534725347353474534755347653477534785347953480534815348253483534845348553486534875348853489534905349153492534935349453495534965349753498534995350053501535025350353504535055350653507535085350953510535115351253513535145351553516535175351853519535205352153522535235352453525535265352753528535295353053531535325353353534535355353653537535385353953540535415354253543535445354553546535475354853549535505355153552535535355453555535565355753558535595356053561535625356353564535655356653567535685356953570535715357253573535745357553576535775357853579535805358153582535835358453585535865358753588535895359053591535925359353594535955359653597535985359953600536015360253603536045360553606536075360853609536105361153612536135361453615536165361753618536195362053621536225362353624536255362653627536285362953630536315363253633536345363553636536375363853639536405364153642536435364453645536465364753648536495365053651536525365353654536555365653657536585365953660536615366253663536645366553666536675366853669536705367153672536735367453675536765367753678536795368053681536825368353684536855368653687536885368953690536915369253693536945369553696536975369853699537005370153702537035370453705537065370753708537095371053711537125371353714537155371653717537185371953720537215372253723537245372553726537275372853729537305373153732537335373453735537365373753738537395374053741537425374353744537455374653747537485374953750537515375253753537545375553756537575375853759537605376153762537635376453765537665376753768537695377053771537725377353774537755377653777537785377953780537815378253783537845378553786537875378853789537905379153792537935379453795537965379753798537995380053801538025380353804538055380653807538085380953810538115381253813538145381553816538175381853819538205382153822538235382453825538265382753828538295383053831538325383353834538355383653837538385383953840538415384253843538445384553846538475384853849538505385153852538535385453855538565385753858538595386053861538625386353864538655386653867538685386953870538715387253873538745387553876538775387853879538805388153882538835388453885538865388753888538895389053891538925389353894538955389653897538985389953900539015390253903539045390553906539075390853909539105391153912539135391453915539165391753918539195392053921539225392353924539255392653927539285392953930539315393253933539345393553936539375393853939539405394153942539435394453945539465394753948539495395053951539525395353954539555395653957539585395953960539615396253963539645396553966539675396853969539705397153972539735397453975539765397753978539795398053981539825398353984539855398653987539885398953990539915399253993539945399553996539975399853999540005400154002540035400454005540065400754008540095401054011540125401354014540155401654017540185401954020540215402254023540245402554026540275402854029540305403154032540335403454035540365403754038540395404054041540425404354044540455404654047540485404954050540515405254053540545405554056540575405854059540605406154062540635406454065540665406754068540695407054071540725407354074540755407654077540785407954080540815408254083540845408554086540875408854089540905409154092540935409454095540965409754098540995410054101541025410354104541055410654107541085410954110541115411254113541145411554116541175411854119541205412154122541235412454125541265412754128541295413054131541325413354134541355413654137541385413954140541415414254143541445414554146541475414854149541505415154152541535415454155541565415754158541595416054161541625416354164541655416654167541685416954170541715417254173541745417554176541775417854179541805418154182541835418454185541865418754188541895419054191541925419354194541955419654197541985419954200542015420254203542045420554206542075420854209542105421154212542135421454215542165421754218542195422054221542225422354224542255422654227542285422954230542315423254233542345423554236542375423854239542405424154242542435424454245542465424754248542495425054251542525425354254542555425654257542585425954260542615426254263542645426554266542675426854269542705427154272542735427454275542765427754278542795428054281542825428354284542855428654287542885428954290542915429254293542945429554296542975429854299543005430154302543035430454305543065430754308543095431054311543125431354314543155431654317543185431954320543215432254323543245432554326543275432854329543305433154332543335433454335543365433754338543395434054341543425434354344543455434654347543485434954350543515435254353543545435554356543575435854359543605436154362543635436454365543665436754368543695437054371543725437354374543755437654377543785437954380543815438254383543845438554386543875438854389543905439154392543935439454395543965439754398543995440054401544025440354404544055440654407544085440954410544115441254413544145441554416544175441854419544205442154422544235442454425544265442754428544295443054431544325443354434544355443654437544385443954440544415444254443544445444554446544475444854449544505445154452544535445454455544565445754458544595446054461544625446354464544655446654467544685446954470544715447254473544745447554476544775447854479544805448154482544835448454485544865448754488544895449054491544925449354494544955449654497544985449954500545015450254503545045450554506545075450854509545105451154512545135451454515545165451754518545195452054521545225452354524545255452654527545285452954530545315453254533545345453554536545375453854539545405454154542545435454454545545465454754548545495455054551545525455354554545555455654557545585455954560545615456254563545645456554566545675456854569545705457154572545735457454575545765457754578545795458054581545825458354584545855458654587545885458954590545915459254593545945459554596545975459854599546005460154602546035460454605546065460754608546095461054611546125461354614546155461654617546185461954620546215462254623546245462554626546275462854629546305463154632546335463454635546365463754638546395464054641546425464354644546455464654647546485464954650546515465254653546545465554656546575465854659546605466154662546635466454665546665466754668546695467054671546725467354674546755467654677546785467954680546815468254683546845468554686546875468854689546905469154692546935469454695546965469754698546995470054701547025470354704547055470654707547085470954710547115471254713547145471554716547175471854719547205472154722547235472454725547265472754728547295473054731547325473354734547355473654737547385473954740547415474254743547445474554746547475474854749547505475154752547535475454755547565475754758547595476054761547625476354764547655476654767547685476954770547715477254773547745477554776547775477854779547805478154782547835478454785547865478754788547895479054791547925479354794547955479654797547985479954800548015480254803548045480554806548075480854809548105481154812548135481454815548165481754818548195482054821548225482354824548255482654827548285482954830548315483254833548345483554836548375483854839548405484154842548435484454845548465484754848548495485054851548525485354854548555485654857548585485954860548615486254863548645486554866548675486854869548705487154872548735487454875548765487754878548795488054881548825488354884548855488654887548885488954890548915489254893548945489554896548975489854899549005490154902549035490454905549065490754908549095491054911549125491354914549155491654917549185491954920549215492254923549245492554926549275492854929549305493154932549335493454935549365493754938549395494054941549425494354944549455494654947549485494954950549515495254953549545495554956549575495854959549605496154962549635496454965549665496754968549695497054971549725497354974549755497654977549785497954980549815498254983549845498554986549875498854989549905499154992549935499454995549965499754998549995500055001550025500355004550055500655007550085500955010550115501255013550145501555016550175501855019550205502155022550235502455025550265502755028550295503055031550325503355034550355503655037550385503955040550415504255043550445504555046550475504855049550505505155052550535505455055550565505755058550595506055061550625506355064550655506655067550685506955070550715507255073550745507555076550775507855079550805508155082550835508455085550865508755088550895509055091550925509355094550955509655097550985509955100551015510255103551045510555106551075510855109551105511155112551135511455115551165511755118551195512055121551225512355124551255512655127551285512955130551315513255133551345513555136551375513855139551405514155142551435514455145551465514755148551495515055151551525515355154551555515655157551585515955160551615516255163551645516555166551675516855169551705517155172551735517455175551765517755178551795518055181551825518355184551855518655187551885518955190551915519255193551945519555196551975519855199552005520155202552035520455205552065520755208552095521055211552125521355214552155521655217552185521955220552215522255223552245522555226552275522855229552305523155232552335523455235552365523755238552395524055241552425524355244552455524655247552485524955250552515525255253552545525555256552575525855259552605526155262552635526455265552665526755268552695527055271552725527355274552755527655277552785527955280552815528255283552845528555286552875528855289552905529155292552935529455295552965529755298552995530055301553025530355304553055530655307553085530955310553115531255313553145531555316553175531855319553205532155322553235532455325553265532755328553295533055331553325533355334553355533655337553385533955340553415534255343553445534555346553475534855349553505535155352553535535455355553565535755358553595536055361553625536355364553655536655367553685536955370553715537255373553745537555376553775537855379553805538155382553835538455385553865538755388553895539055391553925539355394553955539655397553985539955400554015540255403554045540555406554075540855409554105541155412554135541455415554165541755418554195542055421554225542355424554255542655427554285542955430554315543255433554345543555436554375543855439554405544155442554435544455445554465544755448554495545055451554525545355454554555545655457554585545955460554615546255463554645546555466554675546855469554705547155472554735547455475554765547755478554795548055481554825548355484554855548655487554885548955490554915549255493554945549555496554975549855499555005550155502555035550455505555065550755508555095551055511555125551355514555155551655517555185551955520555215552255523555245552555526555275552855529555305553155532555335553455535555365553755538555395554055541555425554355544555455554655547555485554955550555515555255553555545555555556555575555855559555605556155562555635556455565555665556755568555695557055571555725557355574555755557655577555785557955580555815558255583555845558555586555875558855589555905559155592555935559455595555965559755598555995560055601556025560355604556055560655607556085560955610556115561255613556145561555616556175561855619556205562155622556235562455625556265562755628556295563055631556325563355634556355563655637556385563955640556415564255643556445564555646556475564855649556505565155652556535565455655556565565755658556595566055661556625566355664556655566655667556685566955670556715567255673556745567555676556775567855679556805568155682556835568455685556865568755688556895569055691556925569355694556955569655697556985569955700557015570255703557045570555706557075570855709557105571155712557135571455715557165571755718557195572055721557225572355724557255572655727557285572955730557315573255733557345573555736557375573855739557405574155742557435574455745557465574755748557495575055751557525575355754557555575655757557585575955760557615576255763557645576555766557675576855769557705577155772557735577455775557765577755778557795578055781557825578355784557855578655787557885578955790557915579255793557945579555796557975579855799558005580155802558035580455805558065580755808558095581055811558125581355814558155581655817558185581955820558215582255823558245582555826558275582855829558305583155832558335583455835558365583755838558395584055841558425584355844558455584655847558485584955850558515585255853558545585555856558575585855859558605586155862558635586455865558665586755868558695587055871558725587355874558755587655877558785587955880558815588255883558845588555886558875588855889558905589155892558935589455895558965589755898558995590055901559025590355904559055590655907559085590955910559115591255913559145591555916559175591855919559205592155922559235592455925559265592755928559295593055931559325593355934559355593655937559385593955940559415594255943559445594555946559475594855949559505595155952559535595455955559565595755958559595596055961559625596355964559655596655967559685596955970559715597255973559745597555976559775597855979559805598155982559835598455985559865598755988559895599055991559925599355994559955599655997559985599956000560015600256003560045600556006560075600856009560105601156012560135601456015560165601756018560195602056021560225602356024560255602656027560285602956030560315603256033560345603556036560375603856039560405604156042560435604456045560465604756048560495605056051560525605356054560555605656057560585605956060560615606256063560645606556066560675606856069560705607156072560735607456075560765607756078560795608056081560825608356084560855608656087560885608956090560915609256093560945609556096560975609856099561005610156102561035610456105561065610756108561095611056111561125611356114561155611656117561185611956120561215612256123561245612556126561275612856129561305613156132561335613456135561365613756138561395614056141561425614356144561455614656147561485614956150561515615256153561545615556156561575615856159561605616156162561635616456165561665616756168561695617056171561725617356174561755617656177561785617956180561815618256183561845618556186561875618856189561905619156192561935619456195561965619756198561995620056201562025620356204562055620656207562085620956210562115621256213562145621556216562175621856219562205622156222562235622456225562265622756228562295623056231562325623356234562355623656237562385623956240562415624256243562445624556246562475624856249562505625156252562535625456255562565625756258562595626056261562625626356264562655626656267562685626956270562715627256273562745627556276562775627856279562805628156282562835628456285562865628756288562895629056291562925629356294562955629656297562985629956300563015630256303563045630556306563075630856309563105631156312563135631456315563165631756318563195632056321563225632356324563255632656327563285632956330563315633256333563345633556336563375633856339563405634156342563435634456345563465634756348563495635056351563525635356354563555635656357563585635956360563615636256363563645636556366563675636856369563705637156372563735637456375563765637756378563795638056381563825638356384563855638656387563885638956390563915639256393563945639556396563975639856399564005640156402564035640456405564065640756408564095641056411564125641356414564155641656417564185641956420564215642256423564245642556426564275642856429564305643156432564335643456435564365643756438564395644056441564425644356444564455644656447564485644956450564515645256453564545645556456564575645856459564605646156462564635646456465564665646756468564695647056471564725647356474564755647656477564785647956480564815648256483564845648556486564875648856489564905649156492564935649456495564965649756498564995650056501565025650356504565055650656507565085650956510565115651256513565145651556516565175651856519565205652156522565235652456525565265652756528565295653056531565325653356534565355653656537565385653956540565415654256543565445654556546565475654856549565505655156552565535655456555565565655756558565595656056561565625656356564565655656656567565685656956570565715657256573565745657556576565775657856579565805658156582565835658456585565865658756588565895659056591565925659356594565955659656597565985659956600566015660256603566045660556606566075660856609566105661156612566135661456615566165661756618566195662056621566225662356624566255662656627566285662956630566315663256633566345663556636566375663856639566405664156642566435664456645566465664756648566495665056651566525665356654566555665656657566585665956660566615666256663566645666556666566675666856669566705667156672566735667456675566765667756678566795668056681566825668356684566855668656687566885668956690566915669256693566945669556696566975669856699567005670156702567035670456705567065670756708567095671056711567125671356714567155671656717567185671956720567215672256723567245672556726567275672856729567305673156732567335673456735567365673756738567395674056741567425674356744567455674656747567485674956750567515675256753567545675556756567575675856759567605676156762567635676456765567665676756768567695677056771567725677356774567755677656777567785677956780567815678256783567845678556786567875678856789567905679156792567935679456795567965679756798567995680056801568025680356804568055680656807568085680956810568115681256813568145681556816568175681856819568205682156822568235682456825568265682756828568295683056831568325683356834568355683656837568385683956840568415684256843568445684556846568475684856849568505685156852568535685456855568565685756858568595686056861568625686356864568655686656867568685686956870568715687256873568745687556876568775687856879568805688156882568835688456885568865688756888568895689056891568925689356894568955689656897568985689956900569015690256903569045690556906569075690856909569105691156912569135691456915569165691756918569195692056921569225692356924569255692656927569285692956930569315693256933569345693556936569375693856939569405694156942569435694456945569465694756948569495695056951569525695356954569555695656957569585695956960569615696256963569645696556966569675696856969569705697156972569735697456975569765697756978569795698056981569825698356984569855698656987569885698956990569915699256993569945699556996569975699856999570005700157002570035700457005570065700757008570095701057011570125701357014570155701657017570185701957020570215702257023570245702557026570275702857029570305703157032570335703457035570365703757038570395704057041570425704357044570455704657047570485704957050570515705257053570545705557056570575705857059570605706157062570635706457065570665706757068570695707057071570725707357074570755707657077570785707957080570815708257083570845708557086570875708857089570905709157092570935709457095570965709757098570995710057101571025710357104571055710657107571085710957110571115711257113571145711557116571175711857119571205712157122571235712457125571265712757128571295713057131571325713357134571355713657137571385713957140571415714257143571445714557146571475714857149571505715157152571535715457155571565715757158571595716057161571625716357164571655716657167571685716957170571715717257173571745717557176571775717857179571805718157182571835718457185571865718757188571895719057191571925719357194571955719657197571985719957200572015720257203572045720557206572075720857209572105721157212572135721457215572165721757218572195722057221572225722357224572255722657227572285722957230572315723257233572345723557236572375723857239572405724157242572435724457245572465724757248572495725057251572525725357254572555725657257572585725957260572615726257263572645726557266572675726857269572705727157272572735727457275572765727757278572795728057281572825728357284572855728657287572885728957290572915729257293572945729557296572975729857299573005730157302573035730457305573065730757308573095731057311573125731357314573155731657317573185731957320573215732257323573245732557326573275732857329573305733157332573335733457335573365733757338573395734057341573425734357344573455734657347573485734957350573515735257353573545735557356573575735857359573605736157362573635736457365573665736757368573695737057371573725737357374573755737657377573785737957380573815738257383573845738557386573875738857389573905739157392573935739457395573965739757398573995740057401574025740357404574055740657407574085740957410574115741257413574145741557416574175741857419574205742157422574235742457425574265742757428574295743057431574325743357434574355743657437574385743957440574415744257443574445744557446574475744857449574505745157452574535745457455574565745757458574595746057461574625746357464574655746657467574685746957470574715747257473574745747557476574775747857479574805748157482574835748457485574865748757488574895749057491574925749357494574955749657497574985749957500575015750257503575045750557506575075750857509575105751157512575135751457515575165751757518575195752057521575225752357524575255752657527575285752957530575315753257533575345753557536575375753857539575405754157542575435754457545575465754757548575495755057551575525755357554575555755657557575585755957560575615756257563575645756557566575675756857569575705757157572575735757457575575765757757578575795758057581575825758357584575855758657587575885758957590575915759257593575945759557596575975759857599576005760157602576035760457605576065760757608576095761057611576125761357614576155761657617576185761957620576215762257623576245762557626576275762857629576305763157632576335763457635576365763757638576395764057641576425764357644576455764657647576485764957650576515765257653576545765557656576575765857659576605766157662576635766457665576665766757668576695767057671576725767357674576755767657677576785767957680576815768257683576845768557686576875768857689576905769157692576935769457695576965769757698576995770057701577025770357704577055770657707577085770957710577115771257713577145771557716577175771857719577205772157722577235772457725577265772757728577295773057731577325773357734577355773657737577385773957740577415774257743577445774557746577475774857749577505775157752577535775457755577565775757758577595776057761577625776357764577655776657767577685776957770577715777257773577745777557776577775777857779577805778157782577835778457785577865778757788577895779057791577925779357794577955779657797577985779957800578015780257803578045780557806578075780857809578105781157812578135781457815578165781757818578195782057821578225782357824578255782657827578285782957830578315783257833578345783557836578375783857839578405784157842578435784457845578465784757848578495785057851578525785357854578555785657857578585785957860578615786257863578645786557866578675786857869578705787157872578735787457875578765787757878578795788057881578825788357884578855788657887578885788957890578915789257893578945789557896578975789857899579005790157902579035790457905579065790757908579095791057911579125791357914579155791657917579185791957920579215792257923579245792557926579275792857929579305793157932579335793457935579365793757938579395794057941579425794357944579455794657947579485794957950579515795257953579545795557956579575795857959579605796157962579635796457965579665796757968579695797057971579725797357974579755797657977579785797957980579815798257983579845798557986579875798857989579905799157992579935799457995579965799757998579995800058001580025800358004580055800658007580085800958010580115801258013580145801558016580175801858019580205802158022580235802458025580265802758028580295803058031580325803358034580355803658037580385803958040580415804258043580445804558046580475804858049580505805158052580535805458055580565805758058580595806058061580625806358064580655806658067580685806958070580715807258073580745807558076580775807858079580805808158082580835808458085580865808758088580895809058091580925809358094580955809658097580985809958100581015810258103581045810558106581075810858109581105811158112581135811458115581165811758118581195812058121581225812358124581255812658127581285812958130581315813258133581345813558136581375813858139581405814158142581435814458145581465814758148581495815058151581525815358154581555815658157581585815958160581615816258163581645816558166581675816858169581705817158172581735817458175581765817758178581795818058181581825818358184581855818658187581885818958190581915819258193581945819558196581975819858199582005820158202582035820458205582065820758208582095821058211582125821358214582155821658217582185821958220582215822258223582245822558226582275822858229582305823158232582335823458235582365823758238582395824058241582425824358244582455824658247582485824958250582515825258253582545825558256582575825858259582605826158262582635826458265582665826758268582695827058271582725827358274582755827658277582785827958280582815828258283582845828558286582875828858289582905829158292582935829458295582965829758298582995830058301583025830358304583055830658307583085830958310583115831258313583145831558316583175831858319583205832158322583235832458325583265832758328583295833058331583325833358334583355833658337583385833958340583415834258343583445834558346583475834858349583505835158352583535835458355583565835758358583595836058361583625836358364583655836658367583685836958370583715837258373583745837558376583775837858379583805838158382583835838458385583865838758388583895839058391583925839358394583955839658397583985839958400584015840258403584045840558406584075840858409584105841158412584135841458415584165841758418584195842058421584225842358424584255842658427584285842958430584315843258433584345843558436584375843858439584405844158442584435844458445584465844758448584495845058451584525845358454584555845658457584585845958460584615846258463584645846558466584675846858469584705847158472584735847458475584765847758478584795848058481584825848358484584855848658487584885848958490584915849258493584945849558496584975849858499585005850158502585035850458505585065850758508585095851058511585125851358514585155851658517585185851958520585215852258523585245852558526585275852858529585305853158532585335853458535585365853758538585395854058541585425854358544585455854658547585485854958550585515855258553585545855558556585575855858559585605856158562585635856458565585665856758568585695857058571585725857358574585755857658577585785857958580585815858258583585845858558586585875858858589585905859158592585935859458595585965859758598585995860058601586025860358604586055860658607586085860958610586115861258613586145861558616586175861858619586205862158622586235862458625586265862758628586295863058631586325863358634586355863658637586385863958640586415864258643586445864558646586475864858649586505865158652586535865458655586565865758658586595866058661586625866358664586655866658667586685866958670586715867258673586745867558676586775867858679586805868158682586835868458685586865868758688586895869058691586925869358694586955869658697586985869958700587015870258703587045870558706587075870858709587105871158712587135871458715587165871758718587195872058721587225872358724587255872658727587285872958730587315873258733587345873558736587375873858739587405874158742587435874458745587465874758748587495875058751587525875358754587555875658757587585875958760587615876258763587645876558766587675876858769587705877158772587735877458775587765877758778587795878058781587825878358784587855878658787587885878958790587915879258793587945879558796587975879858799588005880158802588035880458805588065880758808588095881058811588125881358814588155881658817588185881958820588215882258823588245882558826588275882858829588305883158832588335883458835588365883758838588395884058841588425884358844588455884658847588485884958850588515885258853588545885558856588575885858859588605886158862588635886458865588665886758868588695887058871588725887358874588755887658877588785887958880588815888258883588845888558886588875888858889588905889158892588935889458895588965889758898588995890058901589025890358904589055890658907589085890958910589115891258913589145891558916589175891858919589205892158922589235892458925589265892758928589295893058931589325893358934589355893658937589385893958940589415894258943589445894558946589475894858949589505895158952589535895458955589565895758958589595896058961589625896358964589655896658967589685896958970589715897258973589745897558976589775897858979589805898158982589835898458985589865898758988589895899058991589925899358994589955899658997589985899959000590015900259003590045900559006590075900859009590105901159012590135901459015590165901759018590195902059021590225902359024590255902659027590285902959030590315903259033590345903559036590375903859039590405904159042590435904459045590465904759048590495905059051590525905359054590555905659057590585905959060590615906259063590645906559066590675906859069590705907159072590735907459075590765907759078590795908059081590825908359084590855908659087590885908959090590915909259093590945909559096590975909859099591005910159102591035910459105591065910759108591095911059111591125911359114591155911659117591185911959120591215912259123591245912559126591275912859129591305913159132591335913459135591365913759138591395914059141591425914359144591455914659147591485914959150591515915259153591545915559156591575915859159591605916159162591635916459165591665916759168591695917059171591725917359174591755917659177591785917959180591815918259183591845918559186591875918859189591905919159192591935919459195591965919759198591995920059201592025920359204592055920659207592085920959210592115921259213592145921559216592175921859219592205922159222592235922459225592265922759228592295923059231592325923359234592355923659237592385923959240592415924259243592445924559246592475924859249592505925159252592535925459255592565925759258592595926059261592625926359264592655926659267592685926959270592715927259273592745927559276592775927859279592805928159282592835928459285592865928759288592895929059291592925929359294592955929659297592985929959300593015930259303593045930559306593075930859309593105931159312593135931459315593165931759318593195932059321593225932359324593255932659327593285932959330593315933259333593345933559336593375933859339593405934159342593435934459345593465934759348593495935059351593525935359354593555935659357593585935959360593615936259363593645936559366593675936859369593705937159372593735937459375593765937759378593795938059381593825938359384593855938659387593885938959390593915939259393593945939559396593975939859399594005940159402594035940459405594065940759408594095941059411594125941359414594155941659417594185941959420594215942259423594245942559426594275942859429594305943159432594335943459435594365943759438594395944059441594425944359444594455944659447594485944959450594515945259453594545945559456594575945859459594605946159462594635946459465594665946759468594695947059471594725947359474594755947659477594785947959480594815948259483594845948559486594875948859489594905949159492594935949459495594965949759498594995950059501595025950359504595055950659507595085950959510595115951259513595145951559516595175951859519595205952159522595235952459525595265952759528595295953059531595325953359534595355953659537595385953959540595415954259543595445954559546595475954859549595505955159552595535955459555595565955759558595595956059561595625956359564595655956659567595685956959570595715957259573595745957559576595775957859579595805958159582595835958459585595865958759588595895959059591595925959359594595955959659597595985959959600596015960259603596045960559606596075960859609596105961159612596135961459615596165961759618596195962059621596225962359624596255962659627596285962959630596315963259633596345963559636596375963859639596405964159642596435964459645596465964759648596495965059651596525965359654596555965659657596585965959660596615966259663596645966559666596675966859669596705967159672596735967459675596765967759678596795968059681596825968359684596855968659687596885968959690596915969259693596945969559696596975969859699597005970159702597035970459705597065970759708597095971059711597125971359714597155971659717597185971959720597215972259723597245972559726597275972859729597305973159732597335973459735597365973759738597395974059741597425974359744597455974659747597485974959750597515975259753597545975559756597575975859759597605976159762597635976459765597665976759768597695977059771597725977359774597755977659777597785977959780597815978259783597845978559786597875978859789597905979159792597935979459795597965979759798597995980059801598025980359804598055980659807598085980959810598115981259813598145981559816598175981859819598205982159822598235982459825598265982759828598295983059831598325983359834598355983659837598385983959840598415984259843598445984559846598475984859849598505985159852598535985459855598565985759858598595986059861598625986359864598655986659867598685986959870598715987259873598745987559876598775987859879598805988159882598835988459885598865988759888598895989059891598925989359894598955989659897598985989959900599015990259903599045990559906599075990859909599105991159912599135991459915599165991759918599195992059921599225992359924599255992659927599285992959930599315993259933599345993559936599375993859939599405994159942599435994459945599465994759948599495995059951599525995359954599555995659957599585995959960599615996259963599645996559966599675996859969599705997159972599735997459975599765997759978599795998059981599825998359984599855998659987599885998959990599915999259993599945999559996599975999859999600006000160002600036000460005600066000760008600096001060011600126001360014600156001660017600186001960020600216002260023600246002560026600276002860029600306003160032600336003460035600366003760038600396004060041600426004360044600456004660047600486004960050600516005260053600546005560056600576005860059600606006160062600636006460065600666006760068600696007060071600726007360074600756007660077600786007960080600816008260083600846008560086600876008860089600906009160092600936009460095600966009760098600996010060101601026010360104601056010660107601086010960110601116011260113601146011560116601176011860119601206012160122601236012460125601266012760128601296013060131601326013360134601356013660137601386013960140601416014260143601446014560146601476014860149601506015160152601536015460155601566015760158601596016060161601626016360164601656016660167601686016960170601716017260173601746017560176601776017860179601806018160182601836018460185601866018760188601896019060191601926019360194601956019660197601986019960200602016020260203602046020560206602076020860209602106021160212602136021460215602166021760218602196022060221602226022360224602256022660227602286022960230602316023260233602346023560236602376023860239602406024160242602436024460245602466024760248602496025060251602526025360254602556025660257602586025960260602616026260263602646026560266602676026860269602706027160272602736027460275602766027760278602796028060281602826028360284602856028660287602886028960290602916029260293602946029560296602976029860299603006030160302603036030460305603066030760308603096031060311603126031360314603156031660317603186031960320603216032260323603246032560326603276032860329603306033160332603336033460335603366033760338603396034060341603426034360344603456034660347603486034960350603516035260353603546035560356603576035860359603606036160362603636036460365603666036760368603696037060371603726037360374603756037660377603786037960380603816038260383603846038560386603876038860389603906039160392603936039460395603966039760398603996040060401604026040360404604056040660407604086040960410604116041260413604146041560416604176041860419604206042160422604236042460425604266042760428604296043060431604326043360434604356043660437604386043960440604416044260443604446044560446604476044860449604506045160452604536045460455604566045760458604596046060461604626046360464604656046660467604686046960470604716047260473604746047560476604776047860479604806048160482604836048460485604866048760488604896049060491604926049360494604956049660497604986049960500605016050260503605046050560506605076050860509605106051160512605136051460515605166051760518605196052060521605226052360524605256052660527605286052960530605316053260533605346053560536605376053860539605406054160542605436054460545605466054760548605496055060551605526055360554605556055660557605586055960560605616056260563605646056560566605676056860569605706057160572605736057460575605766057760578605796058060581605826058360584605856058660587605886058960590605916059260593605946059560596605976059860599606006060160602606036060460605606066060760608606096061060611606126061360614606156061660617606186061960620606216062260623606246062560626606276062860629606306063160632606336063460635606366063760638606396064060641606426064360644606456064660647606486064960650606516065260653606546065560656606576065860659606606066160662606636066460665606666066760668606696067060671606726067360674606756067660677606786067960680606816068260683606846068560686606876068860689606906069160692606936069460695606966069760698606996070060701607026070360704607056070660707607086070960710607116071260713607146071560716607176071860719607206072160722607236072460725607266072760728607296073060731607326073360734607356073660737607386073960740607416074260743607446074560746607476074860749607506075160752607536075460755607566075760758607596076060761607626076360764607656076660767607686076960770607716077260773607746077560776607776077860779607806078160782607836078460785607866078760788607896079060791607926079360794607956079660797607986079960800608016080260803608046080560806608076080860809608106081160812608136081460815608166081760818608196082060821608226082360824608256082660827608286082960830608316083260833608346083560836608376083860839608406084160842608436084460845608466084760848608496085060851608526085360854608556085660857608586085960860608616086260863608646086560866608676086860869608706087160872608736087460875608766087760878608796088060881608826088360884608856088660887608886088960890608916089260893608946089560896608976089860899609006090160902609036090460905609066090760908609096091060911609126091360914609156091660917609186091960920609216092260923609246092560926609276092860929609306093160932609336093460935609366093760938609396094060941609426094360944609456094660947609486094960950609516095260953609546095560956609576095860959609606096160962609636096460965609666096760968609696097060971609726097360974609756097660977609786097960980609816098260983609846098560986609876098860989609906099160992609936099460995609966099760998609996100061001610026100361004610056100661007610086100961010610116101261013610146101561016610176101861019610206102161022610236102461025610266102761028610296103061031610326103361034610356103661037610386103961040610416104261043610446104561046610476104861049610506105161052610536105461055610566105761058610596106061061610626106361064610656106661067610686106961070610716107261073610746107561076610776107861079610806108161082610836108461085610866108761088610896109061091610926109361094610956109661097610986109961100611016110261103611046110561106611076110861109611106111161112611136111461115611166111761118611196112061121611226112361124611256112661127611286112961130611316113261133611346113561136611376113861139611406114161142611436114461145611466114761148611496115061151611526115361154611556115661157611586115961160611616116261163611646116561166611676116861169611706117161172611736117461175611766117761178611796118061181611826118361184611856118661187611886118961190611916119261193611946119561196611976119861199612006120161202612036120461205612066120761208612096121061211612126121361214612156121661217612186121961220612216122261223612246122561226612276122861229612306123161232612336123461235612366123761238612396124061241612426124361244612456124661247612486124961250612516125261253612546125561256612576125861259612606126161262612636126461265612666126761268612696127061271612726127361274612756127661277612786127961280612816128261283612846128561286612876128861289612906129161292612936129461295612966129761298612996130061301613026130361304613056130661307613086130961310613116131261313613146131561316613176131861319613206132161322613236132461325613266132761328613296133061331613326133361334613356133661337613386133961340613416134261343613446134561346613476134861349613506135161352613536135461355613566135761358613596136061361613626136361364613656136661367613686136961370613716137261373613746137561376613776137861379613806138161382613836138461385613866138761388613896139061391613926139361394613956139661397613986139961400614016140261403614046140561406614076140861409614106141161412614136141461415614166141761418614196142061421614226142361424614256142661427614286142961430614316143261433614346143561436614376143861439614406144161442614436144461445614466144761448614496145061451614526145361454614556145661457614586145961460614616146261463614646146561466614676146861469614706147161472614736147461475614766147761478614796148061481614826148361484614856148661487614886148961490614916149261493614946149561496614976149861499615006150161502615036150461505615066150761508615096151061511615126151361514615156151661517615186151961520615216152261523615246152561526615276152861529615306153161532615336153461535615366153761538615396154061541615426154361544615456154661547615486154961550615516155261553615546155561556615576155861559615606156161562615636156461565615666156761568615696157061571615726157361574615756157661577615786157961580615816158261583615846158561586615876158861589615906159161592615936159461595615966159761598615996160061601616026160361604616056160661607616086160961610616116161261613616146161561616616176161861619616206162161622616236162461625616266162761628616296163061631616326163361634616356163661637616386163961640616416164261643616446164561646616476164861649616506165161652616536165461655616566165761658616596166061661616626166361664616656166661667616686166961670616716167261673616746167561676616776167861679616806168161682616836168461685616866168761688616896169061691616926169361694616956169661697616986169961700617016170261703617046170561706617076170861709617106171161712617136171461715617166171761718617196172061721617226172361724617256172661727617286172961730617316173261733617346173561736617376173861739617406174161742617436174461745617466174761748617496175061751617526175361754617556175661757617586175961760617616176261763617646176561766617676176861769617706177161772617736177461775617766177761778617796178061781617826178361784617856178661787617886178961790617916179261793617946179561796617976179861799618006180161802618036180461805618066180761808618096181061811618126181361814618156181661817618186181961820618216182261823618246182561826618276182861829618306183161832618336183461835618366183761838618396184061841618426184361844618456184661847618486184961850618516185261853618546185561856618576185861859618606186161862618636186461865618666186761868618696187061871618726187361874618756187661877618786187961880618816188261883618846188561886618876188861889618906189161892618936189461895618966189761898618996190061901619026190361904619056190661907619086190961910619116191261913619146191561916619176191861919619206192161922619236192461925619266192761928619296193061931619326193361934619356193661937619386193961940619416194261943619446194561946619476194861949619506195161952619536195461955619566195761958619596196061961619626196361964619656196661967619686196961970619716197261973619746197561976619776197861979619806198161982619836198461985619866198761988619896199061991619926199361994619956199661997619986199962000620016200262003620046200562006620076200862009620106201162012620136201462015620166201762018620196202062021620226202362024620256202662027620286202962030620316203262033620346203562036620376203862039620406204162042620436204462045620466204762048620496205062051620526205362054620556205662057620586205962060620616206262063620646206562066620676206862069620706207162072620736207462075620766207762078620796208062081620826208362084620856208662087620886208962090620916209262093620946209562096620976209862099621006210162102621036210462105621066210762108621096211062111621126211362114621156211662117621186211962120621216212262123621246212562126621276212862129621306213162132621336213462135621366213762138621396214062141621426214362144621456214662147621486214962150621516215262153621546215562156621576215862159621606216162162621636216462165621666216762168621696217062171621726217362174621756217662177621786217962180621816218262183621846218562186621876218862189621906219162192621936219462195621966219762198621996220062201622026220362204 |
- OZE_Sensor.elf: file format elf32-littlearm
- Sections:
- Idx Name Size VMA LMA File off Algn
- 0 .isr_vector 00000298 08000000 08000000 00001000 2**0
- CONTENTS, ALLOC, LOAD, READONLY, DATA
- 1 .text 00018818 080002a0 080002a0 000012a0 2**4
- CONTENTS, ALLOC, LOAD, READONLY, CODE
- 2 .rodata 000001d4 08018ab8 08018ab8 00019ab8 2**2
- CONTENTS, ALLOC, LOAD, READONLY, DATA
- 3 .ARM 00000008 08018c8c 08018c8c 00019c8c 2**2
- CONTENTS, ALLOC, LOAD, READONLY, DATA
- 4 .init_array 00000004 08018c94 08018c94 00019c94 2**2
- CONTENTS, ALLOC, LOAD, READONLY, DATA
- 5 .fini_array 00000004 08018c98 08018c98 00019c98 2**2
- CONTENTS, ALLOC, LOAD, READONLY, DATA
- 6 .data 000000a4 24000000 08018c9c 0001a000 2**2
- CONTENTS, ALLOC, LOAD, DATA
- 7 .bss 00012d74 240000c0 08018d40 0001a0c0 2**5
- ALLOC
- 8 ._user_heap_stack 00000604 24012e34 08018d40 0001ae34 2**0
- ALLOC
- 9 .ARM.attributes 0000002e 00000000 00000000 0001a0a4 2**0
- CONTENTS, READONLY
- 10 .debug_info 00034402 00000000 00000000 0001a0d2 2**0
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 11 .debug_abbrev 00006441 00000000 00000000 0004e4d4 2**0
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 12 .debug_aranges 00002518 00000000 00000000 00054918 2**3
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 13 .debug_macro 0003f867 00000000 00000000 00056e30 2**0
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_line 000314d8 00000000 00000000 00096697 2**0
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_str 0018843f 00000000 00000000 000c7b6f 2**0
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .comment 00000043 00000000 00000000 0024ffae 2**0
- CONTENTS, READONLY
- 17 .debug_rnglists 00001c8e 00000000 00000000 0024fff1 2**0
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_frame 0000a3b4 00000000 00000000 00251c80 2**2
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .debug_line_str 00000066 00000000 00000000 0025c034 2**0
- CONTENTS, READONLY, DEBUGGING, OCTETS
- Disassembly of section .text:
- 080002a0 <__do_global_dtors_aux>:
- 80002a0: b510 push {r4, lr}
- 80002a2: 4c05 ldr r4, [pc, #20] @ (80002b8 <__do_global_dtors_aux+0x18>)
- 80002a4: 7823 ldrb r3, [r4, #0]
- 80002a6: b933 cbnz r3, 80002b6 <__do_global_dtors_aux+0x16>
- 80002a8: 4b04 ldr r3, [pc, #16] @ (80002bc <__do_global_dtors_aux+0x1c>)
- 80002aa: b113 cbz r3, 80002b2 <__do_global_dtors_aux+0x12>
- 80002ac: 4804 ldr r0, [pc, #16] @ (80002c0 <__do_global_dtors_aux+0x20>)
- 80002ae: f3af 8000 nop.w
- 80002b2: 2301 movs r3, #1
- 80002b4: 7023 strb r3, [r4, #0]
- 80002b6: bd10 pop {r4, pc}
- 80002b8: 240000c0 .word 0x240000c0
- 80002bc: 00000000 .word 0x00000000
- 80002c0: 08018aa0 .word 0x08018aa0
- 080002c4 <frame_dummy>:
- 80002c4: b508 push {r3, lr}
- 80002c6: 4b03 ldr r3, [pc, #12] @ (80002d4 <frame_dummy+0x10>)
- 80002c8: b11b cbz r3, 80002d2 <frame_dummy+0xe>
- 80002ca: 4903 ldr r1, [pc, #12] @ (80002d8 <frame_dummy+0x14>)
- 80002cc: 4803 ldr r0, [pc, #12] @ (80002dc <frame_dummy+0x18>)
- 80002ce: f3af 8000 nop.w
- 80002d2: bd08 pop {r3, pc}
- 80002d4: 00000000 .word 0x00000000
- 80002d8: 240000c4 .word 0x240000c4
- 80002dc: 08018aa0 .word 0x08018aa0
- 080002e0 <memchr>:
- 80002e0: f001 01ff and.w r1, r1, #255 @ 0xff
- 80002e4: 2a10 cmp r2, #16
- 80002e6: db2b blt.n 8000340 <memchr+0x60>
- 80002e8: f010 0f07 tst.w r0, #7
- 80002ec: d008 beq.n 8000300 <memchr+0x20>
- 80002ee: f810 3b01 ldrb.w r3, [r0], #1
- 80002f2: 3a01 subs r2, #1
- 80002f4: 428b cmp r3, r1
- 80002f6: d02d beq.n 8000354 <memchr+0x74>
- 80002f8: f010 0f07 tst.w r0, #7
- 80002fc: b342 cbz r2, 8000350 <memchr+0x70>
- 80002fe: d1f6 bne.n 80002ee <memchr+0xe>
- 8000300: b4f0 push {r4, r5, r6, r7}
- 8000302: ea41 2101 orr.w r1, r1, r1, lsl #8
- 8000306: ea41 4101 orr.w r1, r1, r1, lsl #16
- 800030a: f022 0407 bic.w r4, r2, #7
- 800030e: f07f 0700 mvns.w r7, #0
- 8000312: 2300 movs r3, #0
- 8000314: e8f0 5602 ldrd r5, r6, [r0], #8
- 8000318: 3c08 subs r4, #8
- 800031a: ea85 0501 eor.w r5, r5, r1
- 800031e: ea86 0601 eor.w r6, r6, r1
- 8000322: fa85 f547 uadd8 r5, r5, r7
- 8000326: faa3 f587 sel r5, r3, r7
- 800032a: fa86 f647 uadd8 r6, r6, r7
- 800032e: faa5 f687 sel r6, r5, r7
- 8000332: b98e cbnz r6, 8000358 <memchr+0x78>
- 8000334: d1ee bne.n 8000314 <memchr+0x34>
- 8000336: bcf0 pop {r4, r5, r6, r7}
- 8000338: f001 01ff and.w r1, r1, #255 @ 0xff
- 800033c: f002 0207 and.w r2, r2, #7
- 8000340: b132 cbz r2, 8000350 <memchr+0x70>
- 8000342: f810 3b01 ldrb.w r3, [r0], #1
- 8000346: 3a01 subs r2, #1
- 8000348: ea83 0301 eor.w r3, r3, r1
- 800034c: b113 cbz r3, 8000354 <memchr+0x74>
- 800034e: d1f8 bne.n 8000342 <memchr+0x62>
- 8000350: 2000 movs r0, #0
- 8000352: 4770 bx lr
- 8000354: 3801 subs r0, #1
- 8000356: 4770 bx lr
- 8000358: 2d00 cmp r5, #0
- 800035a: bf06 itte eq
- 800035c: 4635 moveq r5, r6
- 800035e: 3803 subeq r0, #3
- 8000360: 3807 subne r0, #7
- 8000362: f015 0f01 tst.w r5, #1
- 8000366: d107 bne.n 8000378 <memchr+0x98>
- 8000368: 3001 adds r0, #1
- 800036a: f415 7f80 tst.w r5, #256 @ 0x100
- 800036e: bf02 ittt eq
- 8000370: 3001 addeq r0, #1
- 8000372: f415 3fc0 tsteq.w r5, #98304 @ 0x18000
- 8000376: 3001 addeq r0, #1
- 8000378: bcf0 pop {r4, r5, r6, r7}
- 800037a: 3801 subs r0, #1
- 800037c: 4770 bx lr
- 800037e: bf00 nop
- 08000380 <__aeabi_uldivmod>:
- 8000380: b953 cbnz r3, 8000398 <__aeabi_uldivmod+0x18>
- 8000382: b94a cbnz r2, 8000398 <__aeabi_uldivmod+0x18>
- 8000384: 2900 cmp r1, #0
- 8000386: bf08 it eq
- 8000388: 2800 cmpeq r0, #0
- 800038a: bf1c itt ne
- 800038c: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff
- 8000390: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff
- 8000394: f000 b96a b.w 800066c <__aeabi_idiv0>
- 8000398: f1ad 0c08 sub.w ip, sp, #8
- 800039c: e96d ce04 strd ip, lr, [sp, #-16]!
- 80003a0: f000 f806 bl 80003b0 <__udivmoddi4>
- 80003a4: f8dd e004 ldr.w lr, [sp, #4]
- 80003a8: e9dd 2302 ldrd r2, r3, [sp, #8]
- 80003ac: b004 add sp, #16
- 80003ae: 4770 bx lr
- 080003b0 <__udivmoddi4>:
- 80003b0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 80003b4: 9d08 ldr r5, [sp, #32]
- 80003b6: 460c mov r4, r1
- 80003b8: 2b00 cmp r3, #0
- 80003ba: d14e bne.n 800045a <__udivmoddi4+0xaa>
- 80003bc: 4694 mov ip, r2
- 80003be: 458c cmp ip, r1
- 80003c0: 4686 mov lr, r0
- 80003c2: fab2 f282 clz r2, r2
- 80003c6: d962 bls.n 800048e <__udivmoddi4+0xde>
- 80003c8: b14a cbz r2, 80003de <__udivmoddi4+0x2e>
- 80003ca: f1c2 0320 rsb r3, r2, #32
- 80003ce: 4091 lsls r1, r2
- 80003d0: fa20 f303 lsr.w r3, r0, r3
- 80003d4: fa0c fc02 lsl.w ip, ip, r2
- 80003d8: 4319 orrs r1, r3
- 80003da: fa00 fe02 lsl.w lr, r0, r2
- 80003de: ea4f 471c mov.w r7, ip, lsr #16
- 80003e2: fa1f f68c uxth.w r6, ip
- 80003e6: fbb1 f4f7 udiv r4, r1, r7
- 80003ea: ea4f 431e mov.w r3, lr, lsr #16
- 80003ee: fb07 1114 mls r1, r7, r4, r1
- 80003f2: ea43 4301 orr.w r3, r3, r1, lsl #16
- 80003f6: fb04 f106 mul.w r1, r4, r6
- 80003fa: 4299 cmp r1, r3
- 80003fc: d90a bls.n 8000414 <__udivmoddi4+0x64>
- 80003fe: eb1c 0303 adds.w r3, ip, r3
- 8000402: f104 30ff add.w r0, r4, #4294967295 @ 0xffffffff
- 8000406: f080 8112 bcs.w 800062e <__udivmoddi4+0x27e>
- 800040a: 4299 cmp r1, r3
- 800040c: f240 810f bls.w 800062e <__udivmoddi4+0x27e>
- 8000410: 3c02 subs r4, #2
- 8000412: 4463 add r3, ip
- 8000414: 1a59 subs r1, r3, r1
- 8000416: fa1f f38e uxth.w r3, lr
- 800041a: fbb1 f0f7 udiv r0, r1, r7
- 800041e: fb07 1110 mls r1, r7, r0, r1
- 8000422: ea43 4301 orr.w r3, r3, r1, lsl #16
- 8000426: fb00 f606 mul.w r6, r0, r6
- 800042a: 429e cmp r6, r3
- 800042c: d90a bls.n 8000444 <__udivmoddi4+0x94>
- 800042e: eb1c 0303 adds.w r3, ip, r3
- 8000432: f100 31ff add.w r1, r0, #4294967295 @ 0xffffffff
- 8000436: f080 80fc bcs.w 8000632 <__udivmoddi4+0x282>
- 800043a: 429e cmp r6, r3
- 800043c: f240 80f9 bls.w 8000632 <__udivmoddi4+0x282>
- 8000440: 4463 add r3, ip
- 8000442: 3802 subs r0, #2
- 8000444: 1b9b subs r3, r3, r6
- 8000446: ea40 4004 orr.w r0, r0, r4, lsl #16
- 800044a: 2100 movs r1, #0
- 800044c: b11d cbz r5, 8000456 <__udivmoddi4+0xa6>
- 800044e: 40d3 lsrs r3, r2
- 8000450: 2200 movs r2, #0
- 8000452: e9c5 3200 strd r3, r2, [r5]
- 8000456: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 800045a: 428b cmp r3, r1
- 800045c: d905 bls.n 800046a <__udivmoddi4+0xba>
- 800045e: b10d cbz r5, 8000464 <__udivmoddi4+0xb4>
- 8000460: e9c5 0100 strd r0, r1, [r5]
- 8000464: 2100 movs r1, #0
- 8000466: 4608 mov r0, r1
- 8000468: e7f5 b.n 8000456 <__udivmoddi4+0xa6>
- 800046a: fab3 f183 clz r1, r3
- 800046e: 2900 cmp r1, #0
- 8000470: d146 bne.n 8000500 <__udivmoddi4+0x150>
- 8000472: 42a3 cmp r3, r4
- 8000474: d302 bcc.n 800047c <__udivmoddi4+0xcc>
- 8000476: 4290 cmp r0, r2
- 8000478: f0c0 80f0 bcc.w 800065c <__udivmoddi4+0x2ac>
- 800047c: 1a86 subs r6, r0, r2
- 800047e: eb64 0303 sbc.w r3, r4, r3
- 8000482: 2001 movs r0, #1
- 8000484: 2d00 cmp r5, #0
- 8000486: d0e6 beq.n 8000456 <__udivmoddi4+0xa6>
- 8000488: e9c5 6300 strd r6, r3, [r5]
- 800048c: e7e3 b.n 8000456 <__udivmoddi4+0xa6>
- 800048e: 2a00 cmp r2, #0
- 8000490: f040 8090 bne.w 80005b4 <__udivmoddi4+0x204>
- 8000494: eba1 040c sub.w r4, r1, ip
- 8000498: ea4f 481c mov.w r8, ip, lsr #16
- 800049c: fa1f f78c uxth.w r7, ip
- 80004a0: 2101 movs r1, #1
- 80004a2: fbb4 f6f8 udiv r6, r4, r8
- 80004a6: ea4f 431e mov.w r3, lr, lsr #16
- 80004aa: fb08 4416 mls r4, r8, r6, r4
- 80004ae: ea43 4304 orr.w r3, r3, r4, lsl #16
- 80004b2: fb07 f006 mul.w r0, r7, r6
- 80004b6: 4298 cmp r0, r3
- 80004b8: d908 bls.n 80004cc <__udivmoddi4+0x11c>
- 80004ba: eb1c 0303 adds.w r3, ip, r3
- 80004be: f106 34ff add.w r4, r6, #4294967295 @ 0xffffffff
- 80004c2: d202 bcs.n 80004ca <__udivmoddi4+0x11a>
- 80004c4: 4298 cmp r0, r3
- 80004c6: f200 80cd bhi.w 8000664 <__udivmoddi4+0x2b4>
- 80004ca: 4626 mov r6, r4
- 80004cc: 1a1c subs r4, r3, r0
- 80004ce: fa1f f38e uxth.w r3, lr
- 80004d2: fbb4 f0f8 udiv r0, r4, r8
- 80004d6: fb08 4410 mls r4, r8, r0, r4
- 80004da: ea43 4304 orr.w r3, r3, r4, lsl #16
- 80004de: fb00 f707 mul.w r7, r0, r7
- 80004e2: 429f cmp r7, r3
- 80004e4: d908 bls.n 80004f8 <__udivmoddi4+0x148>
- 80004e6: eb1c 0303 adds.w r3, ip, r3
- 80004ea: f100 34ff add.w r4, r0, #4294967295 @ 0xffffffff
- 80004ee: d202 bcs.n 80004f6 <__udivmoddi4+0x146>
- 80004f0: 429f cmp r7, r3
- 80004f2: f200 80b0 bhi.w 8000656 <__udivmoddi4+0x2a6>
- 80004f6: 4620 mov r0, r4
- 80004f8: 1bdb subs r3, r3, r7
- 80004fa: ea40 4006 orr.w r0, r0, r6, lsl #16
- 80004fe: e7a5 b.n 800044c <__udivmoddi4+0x9c>
- 8000500: f1c1 0620 rsb r6, r1, #32
- 8000504: 408b lsls r3, r1
- 8000506: fa22 f706 lsr.w r7, r2, r6
- 800050a: 431f orrs r7, r3
- 800050c: fa20 fc06 lsr.w ip, r0, r6
- 8000510: fa04 f301 lsl.w r3, r4, r1
- 8000514: ea43 030c orr.w r3, r3, ip
- 8000518: 40f4 lsrs r4, r6
- 800051a: fa00 f801 lsl.w r8, r0, r1
- 800051e: 0c38 lsrs r0, r7, #16
- 8000520: ea4f 4913 mov.w r9, r3, lsr #16
- 8000524: fbb4 fef0 udiv lr, r4, r0
- 8000528: fa1f fc87 uxth.w ip, r7
- 800052c: fb00 441e mls r4, r0, lr, r4
- 8000530: ea49 4404 orr.w r4, r9, r4, lsl #16
- 8000534: fb0e f90c mul.w r9, lr, ip
- 8000538: 45a1 cmp r9, r4
- 800053a: fa02 f201 lsl.w r2, r2, r1
- 800053e: d90a bls.n 8000556 <__udivmoddi4+0x1a6>
- 8000540: 193c adds r4, r7, r4
- 8000542: f10e 3aff add.w sl, lr, #4294967295 @ 0xffffffff
- 8000546: f080 8084 bcs.w 8000652 <__udivmoddi4+0x2a2>
- 800054a: 45a1 cmp r9, r4
- 800054c: f240 8081 bls.w 8000652 <__udivmoddi4+0x2a2>
- 8000550: f1ae 0e02 sub.w lr, lr, #2
- 8000554: 443c add r4, r7
- 8000556: eba4 0409 sub.w r4, r4, r9
- 800055a: fa1f f983 uxth.w r9, r3
- 800055e: fbb4 f3f0 udiv r3, r4, r0
- 8000562: fb00 4413 mls r4, r0, r3, r4
- 8000566: ea49 4404 orr.w r4, r9, r4, lsl #16
- 800056a: fb03 fc0c mul.w ip, r3, ip
- 800056e: 45a4 cmp ip, r4
- 8000570: d907 bls.n 8000582 <__udivmoddi4+0x1d2>
- 8000572: 193c adds r4, r7, r4
- 8000574: f103 30ff add.w r0, r3, #4294967295 @ 0xffffffff
- 8000578: d267 bcs.n 800064a <__udivmoddi4+0x29a>
- 800057a: 45a4 cmp ip, r4
- 800057c: d965 bls.n 800064a <__udivmoddi4+0x29a>
- 800057e: 3b02 subs r3, #2
- 8000580: 443c add r4, r7
- 8000582: ea43 400e orr.w r0, r3, lr, lsl #16
- 8000586: fba0 9302 umull r9, r3, r0, r2
- 800058a: eba4 040c sub.w r4, r4, ip
- 800058e: 429c cmp r4, r3
- 8000590: 46ce mov lr, r9
- 8000592: 469c mov ip, r3
- 8000594: d351 bcc.n 800063a <__udivmoddi4+0x28a>
- 8000596: d04e beq.n 8000636 <__udivmoddi4+0x286>
- 8000598: b155 cbz r5, 80005b0 <__udivmoddi4+0x200>
- 800059a: ebb8 030e subs.w r3, r8, lr
- 800059e: eb64 040c sbc.w r4, r4, ip
- 80005a2: fa04 f606 lsl.w r6, r4, r6
- 80005a6: 40cb lsrs r3, r1
- 80005a8: 431e orrs r6, r3
- 80005aa: 40cc lsrs r4, r1
- 80005ac: e9c5 6400 strd r6, r4, [r5]
- 80005b0: 2100 movs r1, #0
- 80005b2: e750 b.n 8000456 <__udivmoddi4+0xa6>
- 80005b4: f1c2 0320 rsb r3, r2, #32
- 80005b8: fa20 f103 lsr.w r1, r0, r3
- 80005bc: fa0c fc02 lsl.w ip, ip, r2
- 80005c0: fa24 f303 lsr.w r3, r4, r3
- 80005c4: 4094 lsls r4, r2
- 80005c6: 430c orrs r4, r1
- 80005c8: ea4f 481c mov.w r8, ip, lsr #16
- 80005cc: fa00 fe02 lsl.w lr, r0, r2
- 80005d0: fa1f f78c uxth.w r7, ip
- 80005d4: fbb3 f0f8 udiv r0, r3, r8
- 80005d8: fb08 3110 mls r1, r8, r0, r3
- 80005dc: 0c23 lsrs r3, r4, #16
- 80005de: ea43 4301 orr.w r3, r3, r1, lsl #16
- 80005e2: fb00 f107 mul.w r1, r0, r7
- 80005e6: 4299 cmp r1, r3
- 80005e8: d908 bls.n 80005fc <__udivmoddi4+0x24c>
- 80005ea: eb1c 0303 adds.w r3, ip, r3
- 80005ee: f100 36ff add.w r6, r0, #4294967295 @ 0xffffffff
- 80005f2: d22c bcs.n 800064e <__udivmoddi4+0x29e>
- 80005f4: 4299 cmp r1, r3
- 80005f6: d92a bls.n 800064e <__udivmoddi4+0x29e>
- 80005f8: 3802 subs r0, #2
- 80005fa: 4463 add r3, ip
- 80005fc: 1a5b subs r3, r3, r1
- 80005fe: b2a4 uxth r4, r4
- 8000600: fbb3 f1f8 udiv r1, r3, r8
- 8000604: fb08 3311 mls r3, r8, r1, r3
- 8000608: ea44 4403 orr.w r4, r4, r3, lsl #16
- 800060c: fb01 f307 mul.w r3, r1, r7
- 8000610: 42a3 cmp r3, r4
- 8000612: d908 bls.n 8000626 <__udivmoddi4+0x276>
- 8000614: eb1c 0404 adds.w r4, ip, r4
- 8000618: f101 36ff add.w r6, r1, #4294967295 @ 0xffffffff
- 800061c: d213 bcs.n 8000646 <__udivmoddi4+0x296>
- 800061e: 42a3 cmp r3, r4
- 8000620: d911 bls.n 8000646 <__udivmoddi4+0x296>
- 8000622: 3902 subs r1, #2
- 8000624: 4464 add r4, ip
- 8000626: 1ae4 subs r4, r4, r3
- 8000628: ea41 4100 orr.w r1, r1, r0, lsl #16
- 800062c: e739 b.n 80004a2 <__udivmoddi4+0xf2>
- 800062e: 4604 mov r4, r0
- 8000630: e6f0 b.n 8000414 <__udivmoddi4+0x64>
- 8000632: 4608 mov r0, r1
- 8000634: e706 b.n 8000444 <__udivmoddi4+0x94>
- 8000636: 45c8 cmp r8, r9
- 8000638: d2ae bcs.n 8000598 <__udivmoddi4+0x1e8>
- 800063a: ebb9 0e02 subs.w lr, r9, r2
- 800063e: eb63 0c07 sbc.w ip, r3, r7
- 8000642: 3801 subs r0, #1
- 8000644: e7a8 b.n 8000598 <__udivmoddi4+0x1e8>
- 8000646: 4631 mov r1, r6
- 8000648: e7ed b.n 8000626 <__udivmoddi4+0x276>
- 800064a: 4603 mov r3, r0
- 800064c: e799 b.n 8000582 <__udivmoddi4+0x1d2>
- 800064e: 4630 mov r0, r6
- 8000650: e7d4 b.n 80005fc <__udivmoddi4+0x24c>
- 8000652: 46d6 mov lr, sl
- 8000654: e77f b.n 8000556 <__udivmoddi4+0x1a6>
- 8000656: 4463 add r3, ip
- 8000658: 3802 subs r0, #2
- 800065a: e74d b.n 80004f8 <__udivmoddi4+0x148>
- 800065c: 4606 mov r6, r0
- 800065e: 4623 mov r3, r4
- 8000660: 4608 mov r0, r1
- 8000662: e70f b.n 8000484 <__udivmoddi4+0xd4>
- 8000664: 3e02 subs r6, #2
- 8000666: 4463 add r3, ip
- 8000668: e730 b.n 80004cc <__udivmoddi4+0x11c>
- 800066a: bf00 nop
- 0800066c <__aeabi_idiv0>:
- 800066c: 4770 bx lr
- 800066e: bf00 nop
- 08000670 <vApplicationStackOverflowHook>:
- /* Hook prototypes */
- void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName);
- /* USER CODE BEGIN 4 */
- void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
- {
- 8000670: b480 push {r7}
- 8000672: b083 sub sp, #12
- 8000674: af00 add r7, sp, #0
- 8000676: 6078 str r0, [r7, #4]
- 8000678: 6039 str r1, [r7, #0]
- /* Run time stack overflow checking is performed if
- configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is
- called if a stack overflow is detected. */
- }
- 800067a: bf00 nop
- 800067c: 370c adds r7, #12
- 800067e: 46bd mov sp, r7
- 8000680: f85d 7b04 ldr.w r7, [sp], #4
- 8000684: 4770 bx lr
- ...
- 08000688 <__NVIC_SystemReset>:
- /**
- \brief System Reset
- \details Initiates a system reset request to reset the MCU.
- */
- __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
- {
- 8000688: b480 push {r7}
- 800068a: af00 add r7, sp, #0
- \details Acts as a special kind of Data Memory Barrier.
- It completes when all explicit memory accesses before this instruction complete.
- */
- __STATIC_FORCEINLINE void __DSB(void)
- {
- __ASM volatile ("dsb 0xF":::"memory");
- 800068c: f3bf 8f4f dsb sy
- }
- 8000690: bf00 nop
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
- 8000692: 4b06 ldr r3, [pc, #24] @ (80006ac <__NVIC_SystemReset+0x24>)
- 8000694: 68db ldr r3, [r3, #12]
- 8000696: f403 62e0 and.w r2, r3, #1792 @ 0x700
- SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- 800069a: 4904 ldr r1, [pc, #16] @ (80006ac <__NVIC_SystemReset+0x24>)
- 800069c: 4b04 ldr r3, [pc, #16] @ (80006b0 <__NVIC_SystemReset+0x28>)
- 800069e: 4313 orrs r3, r2
- 80006a0: 60cb str r3, [r1, #12]
- __ASM volatile ("dsb 0xF":::"memory");
- 80006a2: f3bf 8f4f dsb sy
- }
- 80006a6: bf00 nop
- SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
- __DSB(); /* Ensure completion of memory access */
- for(;;) /* wait until reset */
- {
- __NOP();
- 80006a8: bf00 nop
- 80006aa: e7fd b.n 80006a8 <__NVIC_SystemReset+0x20>
- 80006ac: e000ed00 .word 0xe000ed00
- 80006b0: 05fa0004 .word 0x05fa0004
- 080006b4 <__io_putchar>:
- /* USER CODE END PFP */
- /* Private user code ---------------------------------------------------------*/
- /* USER CODE BEGIN 0 */
- int __io_putchar(int ch)
- {
- 80006b4: b580 push {r7, lr}
- 80006b6: b082 sub sp, #8
- 80006b8: af00 add r7, sp, #0
- 80006ba: 6078 str r0, [r7, #4]
- #if UART_TASK_LOGS
- HAL_UART_Transmit(&huart8, (uint8_t *)&ch, 1, 0xFFFF); // Use UART8 as debug interface
- 80006bc: 1d39 adds r1, r7, #4
- 80006be: f64f 73ff movw r3, #65535 @ 0xffff
- 80006c2: 2201 movs r2, #1
- 80006c4: 4803 ldr r0, [pc, #12] @ (80006d4 <__io_putchar+0x20>)
- 80006c6: f010 fa6f bl 8010ba8 <HAL_UART_Transmit>
- // ITM_SendChar(ch); // Use SWV as debug interface
- #endif
- return ch;
- 80006ca: 687b ldr r3, [r7, #4]
- }
- 80006cc: 4618 mov r0, r3
- 80006ce: 3708 adds r7, #8
- 80006d0: 46bd mov sp, r7
- 80006d2: bd80 pop {r7, pc}
- 80006d4: 240005d8 .word 0x240005d8
- 080006d8 <HAL_GPIO_EXTI_Callback>:
- void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
- {
- 80006d8: b580 push {r7, lr}
- 80006da: b084 sub sp, #16
- 80006dc: af00 add r7, sp, #0
- 80006de: 4603 mov r3, r0
- 80006e0: 80fb strh r3, [r7, #6]
- LimiterSwitchData limiterSwitchData = { 0 };
- 80006e2: 2300 movs r3, #0
- 80006e4: 60fb str r3, [r7, #12]
- limiterSwitchData.gpioPin = GPIO_Pin;
- 80006e6: 88fb ldrh r3, [r7, #6]
- 80006e8: 81bb strh r3, [r7, #12]
- limiterSwitchData.pinState = HAL_GPIO_ReadPin(GPIOD, GPIO_Pin);
- 80006ea: 88fb ldrh r3, [r7, #6]
- 80006ec: 4619 mov r1, r3
- 80006ee: 4808 ldr r0, [pc, #32] @ (8000710 <HAL_GPIO_EXTI_Callback+0x38>)
- 80006f0: f00a fac2 bl 800ac78 <HAL_GPIO_ReadPin>
- 80006f4: 4603 mov r3, r0
- 80006f6: 73bb strb r3, [r7, #14]
- osMessageQueuePut(limiterSwitchDataQueue, &limiterSwitchData, 0, 0);
- 80006f8: 4b06 ldr r3, [pc, #24] @ (8000714 <HAL_GPIO_EXTI_Callback+0x3c>)
- 80006fa: 6818 ldr r0, [r3, #0]
- 80006fc: f107 010c add.w r1, r7, #12
- 8000700: 2300 movs r3, #0
- 8000702: 2200 movs r2, #0
- 8000704: f013 fc06 bl 8013f14 <osMessageQueuePut>
- }
- 8000708: bf00 nop
- 800070a: 3710 adds r7, #16
- 800070c: 46bd mov sp, r7
- 800070e: bd80 pop {r7, pc}
- 8000710: 58020c00 .word 0x58020c00
- 8000714: 2400082c .word 0x2400082c
- 08000718 <main>:
- /**
- * @brief The application entry point.
- * @retval int
- */
- int main(void)
- {
- 8000718: b580 push {r7, lr}
- 800071a: b084 sub sp, #16
- 800071c: af00 add r7, sp, #0
- /* USER CODE BEGIN 1 */
- /* USER CODE END 1 */
- /* MPU Configuration--------------------------------------------------------*/
- MPU_Config();
- 800071e: f001 fbad bl 8001e7c <MPU_Config>
- \details Turns on I-Cache
- */
- __STATIC_FORCEINLINE void SCB_EnableICache (void)
- {
- #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
- if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */
- 8000722: 4b62 ldr r3, [pc, #392] @ (80008ac <main+0x194>)
- 8000724: 695b ldr r3, [r3, #20]
- 8000726: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800072a: 2b00 cmp r3, #0
- 800072c: d11b bne.n 8000766 <main+0x4e>
- __ASM volatile ("dsb 0xF":::"memory");
- 800072e: f3bf 8f4f dsb sy
- }
- 8000732: bf00 nop
- __ASM volatile ("isb 0xF":::"memory");
- 8000734: f3bf 8f6f isb sy
- }
- 8000738: bf00 nop
- __DSB();
- __ISB();
- SCB->ICIALLU = 0UL; /* invalidate I-Cache */
- 800073a: 4b5c ldr r3, [pc, #368] @ (80008ac <main+0x194>)
- 800073c: 2200 movs r2, #0
- 800073e: f8c3 2250 str.w r2, [r3, #592] @ 0x250
- __ASM volatile ("dsb 0xF":::"memory");
- 8000742: f3bf 8f4f dsb sy
- }
- 8000746: bf00 nop
- __ASM volatile ("isb 0xF":::"memory");
- 8000748: f3bf 8f6f isb sy
- }
- 800074c: bf00 nop
- __DSB();
- __ISB();
- SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */
- 800074e: 4b57 ldr r3, [pc, #348] @ (80008ac <main+0x194>)
- 8000750: 695b ldr r3, [r3, #20]
- 8000752: 4a56 ldr r2, [pc, #344] @ (80008ac <main+0x194>)
- 8000754: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 8000758: 6153 str r3, [r2, #20]
- __ASM volatile ("dsb 0xF":::"memory");
- 800075a: f3bf 8f4f dsb sy
- }
- 800075e: bf00 nop
- __ASM volatile ("isb 0xF":::"memory");
- 8000760: f3bf 8f6f isb sy
- }
- 8000764: e000 b.n 8000768 <main+0x50>
- if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */
- 8000766: bf00 nop
- #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
- uint32_t ccsidr;
- uint32_t sets;
- uint32_t ways;
- if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */
- 8000768: 4b50 ldr r3, [pc, #320] @ (80008ac <main+0x194>)
- 800076a: 695b ldr r3, [r3, #20]
- 800076c: f403 3380 and.w r3, r3, #65536 @ 0x10000
- 8000770: 2b00 cmp r3, #0
- 8000772: d138 bne.n 80007e6 <main+0xce>
- SCB->CSSELR = 0U; /* select Level 1 data cache */
- 8000774: 4b4d ldr r3, [pc, #308] @ (80008ac <main+0x194>)
- 8000776: 2200 movs r2, #0
- 8000778: f8c3 2084 str.w r2, [r3, #132] @ 0x84
- __ASM volatile ("dsb 0xF":::"memory");
- 800077c: f3bf 8f4f dsb sy
- }
- 8000780: bf00 nop
- __DSB();
- ccsidr = SCB->CCSIDR;
- 8000782: 4b4a ldr r3, [pc, #296] @ (80008ac <main+0x194>)
- 8000784: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 8000788: 60fb str r3, [r7, #12]
- /* invalidate D-Cache */
- sets = (uint32_t)(CCSIDR_SETS(ccsidr));
- 800078a: 68fb ldr r3, [r7, #12]
- 800078c: 0b5b lsrs r3, r3, #13
- 800078e: f3c3 030e ubfx r3, r3, #0, #15
- 8000792: 60bb str r3, [r7, #8]
- do {
- ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
- 8000794: 68fb ldr r3, [r7, #12]
- 8000796: 08db lsrs r3, r3, #3
- 8000798: f3c3 0309 ubfx r3, r3, #0, #10
- 800079c: 607b str r3, [r7, #4]
- do {
- SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
- 800079e: 68bb ldr r3, [r7, #8]
- 80007a0: 015a lsls r2, r3, #5
- 80007a2: f643 73e0 movw r3, #16352 @ 0x3fe0
- 80007a6: 4013 ands r3, r2
- ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
- 80007a8: 687a ldr r2, [r7, #4]
- 80007aa: 0792 lsls r2, r2, #30
- SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
- 80007ac: 493f ldr r1, [pc, #252] @ (80008ac <main+0x194>)
- 80007ae: 4313 orrs r3, r2
- 80007b0: f8c1 3260 str.w r3, [r1, #608] @ 0x260
- #if defined ( __CC_ARM )
- __schedule_barrier();
- #endif
- } while (ways-- != 0U);
- 80007b4: 687b ldr r3, [r7, #4]
- 80007b6: 1e5a subs r2, r3, #1
- 80007b8: 607a str r2, [r7, #4]
- 80007ba: 2b00 cmp r3, #0
- 80007bc: d1ef bne.n 800079e <main+0x86>
- } while(sets-- != 0U);
- 80007be: 68bb ldr r3, [r7, #8]
- 80007c0: 1e5a subs r2, r3, #1
- 80007c2: 60ba str r2, [r7, #8]
- 80007c4: 2b00 cmp r3, #0
- 80007c6: d1e5 bne.n 8000794 <main+0x7c>
- __ASM volatile ("dsb 0xF":::"memory");
- 80007c8: f3bf 8f4f dsb sy
- }
- 80007cc: bf00 nop
- __DSB();
- SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */
- 80007ce: 4b37 ldr r3, [pc, #220] @ (80008ac <main+0x194>)
- 80007d0: 695b ldr r3, [r3, #20]
- 80007d2: 4a36 ldr r2, [pc, #216] @ (80008ac <main+0x194>)
- 80007d4: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 80007d8: 6153 str r3, [r2, #20]
- __ASM volatile ("dsb 0xF":::"memory");
- 80007da: f3bf 8f4f dsb sy
- }
- 80007de: bf00 nop
- __ASM volatile ("isb 0xF":::"memory");
- 80007e0: f3bf 8f6f isb sy
- }
- 80007e4: e000 b.n 80007e8 <main+0xd0>
- if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */
- 80007e6: bf00 nop
- SCB_EnableDCache();
- /* MCU Configuration--------------------------------------------------------*/
- /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
- HAL_Init();
- 80007e8: f004 fe6e bl 80054c8 <HAL_Init>
- /* USER CODE BEGIN Init */
- /* USER CODE END Init */
- /* Configure the system clock */
- SystemClock_Config();
- 80007ec: f000 f880 bl 80008f0 <SystemClock_Config>
- /* Configure the peripherals common clocks */
- PeriphCommonClock_Config();
- 80007f0: f000 f8fc bl 80009ec <PeriphCommonClock_Config>
- /* USER CODE BEGIN SysInit */
- /* USER CODE END SysInit */
- /* Initialize all configured peripherals */
- MX_GPIO_Init();
- 80007f4: f000 ff84 bl 8001700 <MX_GPIO_Init>
- MX_DMA_Init();
- 80007f8: f000 ff52 bl 80016a0 <MX_DMA_Init>
- MX_RNG_Init();
- 80007fc: f000 fc04 bl 8001008 <MX_RNG_Init>
- MX_USART1_UART_Init();
- 8000800: f000 fefe bl 8001600 <MX_USART1_UART_Init>
- MX_ADC1_Init();
- 8000804: f000 f922 bl 8000a4c <MX_ADC1_Init>
- MX_UART8_Init();
- 8000808: f000 feae bl 8001568 <MX_UART8_Init>
- MX_CRC_Init();
- 800080c: f000 fb7a bl 8000f04 <MX_CRC_Init>
- MX_ADC2_Init();
- 8000810: f000 fa06 bl 8000c20 <MX_ADC2_Init>
- MX_ADC3_Init();
- 8000814: f000 fa98 bl 8000d48 <MX_ADC3_Init>
- MX_TIM2_Init();
- 8000818: f000 fca8 bl 800116c <MX_TIM2_Init>
- MX_TIM1_Init();
- 800081c: f000 fc0a bl 8001034 <MX_TIM1_Init>
- MX_TIM3_Init();
- 8000820: f000 fd22 bl 8001268 <MX_TIM3_Init>
- MX_DAC1_Init();
- 8000824: f000 fb98 bl 8000f58 <MX_DAC1_Init>
- MX_COMP1_Init();
- 8000828: f000 fb3e bl 8000ea8 <MX_COMP1_Init>
- MX_TIM4_Init();
- 800082c: f000 fdc8 bl 80013c0 <MX_TIM4_Init>
- MX_TIM8_Init();
- 8000830: f000 fe44 bl 80014bc <MX_TIM8_Init>
- MX_IWDG1_Init();
- 8000834: f000 fbcc bl 8000fd0 <MX_IWDG1_Init>
- /* USER CODE BEGIN 2 */
- // HAL_IWDG_Refresh(&hiwdg1);
- /* USER CODE END 2 */
- /* Init scheduler */
- osKernelInitialize();
- 8000838: f012 fffc bl 8013834 <osKernelInitialize>
- /* add semaphores, ... */
- /* USER CODE END RTOS_SEMAPHORES */
- /* Create the timer(s) */
- /* creation of debugLedTimer */
- debugLedTimerHandle = osTimerNew(debugLedTimerCallback, osTimerOnce, NULL, &debugLedTimer_attributes);
- 800083c: 4b1c ldr r3, [pc, #112] @ (80008b0 <main+0x198>)
- 800083e: 2200 movs r2, #0
- 8000840: 2100 movs r1, #0
- 8000842: 481c ldr r0, [pc, #112] @ (80008b4 <main+0x19c>)
- 8000844: f013 f904 bl 8013a50 <osTimerNew>
- 8000848: 4603 mov r3, r0
- 800084a: 4a1b ldr r2, [pc, #108] @ (80008b8 <main+0x1a0>)
- 800084c: 6013 str r3, [r2, #0]
- /* creation of fanTimer */
- fanTimerHandle = osTimerNew(fanTimerCallback, osTimerOnce, NULL, &fanTimer_attributes);
- 800084e: 4b1b ldr r3, [pc, #108] @ (80008bc <main+0x1a4>)
- 8000850: 2200 movs r2, #0
- 8000852: 2100 movs r1, #0
- 8000854: 481a ldr r0, [pc, #104] @ (80008c0 <main+0x1a8>)
- 8000856: f013 f8fb bl 8013a50 <osTimerNew>
- 800085a: 4603 mov r3, r0
- 800085c: 4a19 ldr r2, [pc, #100] @ (80008c4 <main+0x1ac>)
- 800085e: 6013 str r3, [r2, #0]
- /* creation of motorXTimer */
- motorXTimerHandle = osTimerNew(motorXTimerCallback, osTimerPeriodic, NULL, &motorXTimer_attributes);
- 8000860: 4b19 ldr r3, [pc, #100] @ (80008c8 <main+0x1b0>)
- 8000862: 2200 movs r2, #0
- 8000864: 2101 movs r1, #1
- 8000866: 4819 ldr r0, [pc, #100] @ (80008cc <main+0x1b4>)
- 8000868: f013 f8f2 bl 8013a50 <osTimerNew>
- 800086c: 4603 mov r3, r0
- 800086e: 4a18 ldr r2, [pc, #96] @ (80008d0 <main+0x1b8>)
- 8000870: 6013 str r3, [r2, #0]
- /* creation of motorYTimer */
- motorYTimerHandle = osTimerNew(motorYTimerCallback, osTimerPeriodic, NULL, &motorYTimer_attributes);
- 8000872: 4b18 ldr r3, [pc, #96] @ (80008d4 <main+0x1bc>)
- 8000874: 2200 movs r2, #0
- 8000876: 2101 movs r1, #1
- 8000878: 4817 ldr r0, [pc, #92] @ (80008d8 <main+0x1c0>)
- 800087a: f013 f8e9 bl 8013a50 <osTimerNew>
- 800087e: 4603 mov r3, r0
- 8000880: 4a16 ldr r2, [pc, #88] @ (80008dc <main+0x1c4>)
- 8000882: 6013 str r3, [r2, #0]
- /* add queues, ... */
- /* USER CODE END RTOS_QUEUES */
- /* Create the thread(s) */
- /* creation of defaultTask */
- defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes);
- 8000884: 4a16 ldr r2, [pc, #88] @ (80008e0 <main+0x1c8>)
- 8000886: 2100 movs r1, #0
- 8000888: 4816 ldr r0, [pc, #88] @ (80008e4 <main+0x1cc>)
- 800088a: f013 f81d bl 80138c8 <osThreadNew>
- 800088e: 4603 mov r3, r0
- 8000890: 4a15 ldr r2, [pc, #84] @ (80008e8 <main+0x1d0>)
- 8000892: 6013 str r3, [r2, #0]
- /* USER CODE BEGIN RTOS_THREADS */
- /* add threads, ... */
- HAL_IWDG_Refresh(&hiwdg1);
- 8000894: 4815 ldr r0, [pc, #84] @ (80008ec <main+0x1d4>)
- 8000896: f00a faa3 bl 800ade0 <HAL_IWDG_Refresh>
- UartTasksInit();
- 800089a: f003 fd6b bl 8004374 <UartTasksInit>
- #ifdef USER_MOCKS
- MockMeasurmetsTaskInit();
- #else
- MeasTasksInit();
- 800089e: f001 fb79 bl 8001f94 <MeasTasksInit>
- /* USER CODE BEGIN RTOS_EVENTS */
- /* add events, ... */
- /* USER CODE END RTOS_EVENTS */
- /* Start scheduler */
- osKernelStart();
- 80008a2: f012 ffeb bl 801387c <osKernelStart>
- /* We should never get here as control is now taken by the scheduler */
- /* Infinite loop */
- /* USER CODE BEGIN WHILE */
- while (1)
- 80008a6: bf00 nop
- 80008a8: e7fd b.n 80008a6 <main+0x18e>
- 80008aa: bf00 nop
- 80008ac: e000ed00 .word 0xe000ed00
- 80008b0: 08018bd8 .word 0x08018bd8
- 80008b4: 08001dd1 .word 0x08001dd1
- 80008b8: 24000704 .word 0x24000704
- 80008bc: 08018be8 .word 0x08018be8
- 80008c0: 08001de9 .word 0x08001de9
- 80008c4: 24000734 .word 0x24000734
- 80008c8: 08018bf8 .word 0x08018bf8
- 80008cc: 08001e05 .word 0x08001e05
- 80008d0: 24000764 .word 0x24000764
- 80008d4: 08018c08 .word 0x08018c08
- 80008d8: 08001e41 .word 0x08001e41
- 80008dc: 24000794 .word 0x24000794
- 80008e0: 08018bb4 .word 0x08018bb4
- 80008e4: 08001c15 .word 0x08001c15
- 80008e8: 24000700 .word 0x24000700
- 80008ec: 24000438 .word 0x24000438
- 080008f0 <SystemClock_Config>:
- /**
- * @brief System Clock Configuration
- * @retval None
- */
- void SystemClock_Config(void)
- {
- 80008f0: b580 push {r7, lr}
- 80008f2: b09c sub sp, #112 @ 0x70
- 80008f4: af00 add r7, sp, #0
- RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 80008f6: f107 0324 add.w r3, r7, #36 @ 0x24
- 80008fa: 224c movs r2, #76 @ 0x4c
- 80008fc: 2100 movs r1, #0
- 80008fe: 4618 mov r0, r3
- 8000900: f017 fa51 bl 8017da6 <memset>
- RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 8000904: 1d3b adds r3, r7, #4
- 8000906: 2220 movs r2, #32
- 8000908: 2100 movs r1, #0
- 800090a: 4618 mov r0, r3
- 800090c: f017 fa4b bl 8017da6 <memset>
- /** Supply configuration update enable
- */
- HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
- 8000910: 2002 movs r0, #2
- 8000912: f00a faff bl 800af14 <HAL_PWREx_ConfigSupply>
- /** Configure the main internal regulator output voltage
- */
- __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 8000916: 2300 movs r3, #0
- 8000918: 603b str r3, [r7, #0]
- 800091a: 4b32 ldr r3, [pc, #200] @ (80009e4 <SystemClock_Config+0xf4>)
- 800091c: 6adb ldr r3, [r3, #44] @ 0x2c
- 800091e: 4a31 ldr r2, [pc, #196] @ (80009e4 <SystemClock_Config+0xf4>)
- 8000920: f023 0301 bic.w r3, r3, #1
- 8000924: 62d3 str r3, [r2, #44] @ 0x2c
- 8000926: 4b2f ldr r3, [pc, #188] @ (80009e4 <SystemClock_Config+0xf4>)
- 8000928: 6adb ldr r3, [r3, #44] @ 0x2c
- 800092a: f003 0301 and.w r3, r3, #1
- 800092e: 603b str r3, [r7, #0]
- 8000930: 4b2d ldr r3, [pc, #180] @ (80009e8 <SystemClock_Config+0xf8>)
- 8000932: 699b ldr r3, [r3, #24]
- 8000934: 4a2c ldr r2, [pc, #176] @ (80009e8 <SystemClock_Config+0xf8>)
- 8000936: f443 4340 orr.w r3, r3, #49152 @ 0xc000
- 800093a: 6193 str r3, [r2, #24]
- 800093c: 4b2a ldr r3, [pc, #168] @ (80009e8 <SystemClock_Config+0xf8>)
- 800093e: 699b ldr r3, [r3, #24]
- 8000940: f403 4340 and.w r3, r3, #49152 @ 0xc000
- 8000944: 603b str r3, [r7, #0]
- 8000946: 683b ldr r3, [r7, #0]
- while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
- 8000948: bf00 nop
- 800094a: 4b27 ldr r3, [pc, #156] @ (80009e8 <SystemClock_Config+0xf8>)
- 800094c: 699b ldr r3, [r3, #24]
- 800094e: f403 5300 and.w r3, r3, #8192 @ 0x2000
- 8000952: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
- 8000956: d1f8 bne.n 800094a <SystemClock_Config+0x5a>
- /** Initializes the RCC Oscillators according to the specified parameters
- * in the RCC_OscInitTypeDef structure.
- */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_LSI
- 8000958: 2329 movs r3, #41 @ 0x29
- 800095a: 627b str r3, [r7, #36] @ 0x24
- |RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- 800095c: f44f 3380 mov.w r3, #65536 @ 0x10000
- 8000960: 62bb str r3, [r7, #40] @ 0x28
- RCC_OscInitStruct.LSIState = RCC_LSI_ON;
- 8000962: 2301 movs r3, #1
- 8000964: 63bb str r3, [r7, #56] @ 0x38
- RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
- 8000966: 2301 movs r3, #1
- 8000968: 63fb str r3, [r7, #60] @ 0x3c
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- 800096a: 2302 movs r3, #2
- 800096c: 64bb str r3, [r7, #72] @ 0x48
- RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- 800096e: 2302 movs r3, #2
- 8000970: 64fb str r3, [r7, #76] @ 0x4c
- RCC_OscInitStruct.PLL.PLLM = 5;
- 8000972: 2305 movs r3, #5
- 8000974: 653b str r3, [r7, #80] @ 0x50
- RCC_OscInitStruct.PLL.PLLN = 160;
- 8000976: 23a0 movs r3, #160 @ 0xa0
- 8000978: 657b str r3, [r7, #84] @ 0x54
- RCC_OscInitStruct.PLL.PLLP = 2;
- 800097a: 2302 movs r3, #2
- 800097c: 65bb str r3, [r7, #88] @ 0x58
- RCC_OscInitStruct.PLL.PLLQ = 2;
- 800097e: 2302 movs r3, #2
- 8000980: 65fb str r3, [r7, #92] @ 0x5c
- RCC_OscInitStruct.PLL.PLLR = 2;
- 8000982: 2302 movs r3, #2
- 8000984: 663b str r3, [r7, #96] @ 0x60
- RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
- 8000986: 2308 movs r3, #8
- 8000988: 667b str r3, [r7, #100] @ 0x64
- RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
- 800098a: 2300 movs r3, #0
- 800098c: 66bb str r3, [r7, #104] @ 0x68
- RCC_OscInitStruct.PLL.PLLFRACN = 0;
- 800098e: 2300 movs r3, #0
- 8000990: 66fb str r3, [r7, #108] @ 0x6c
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 8000992: f107 0324 add.w r3, r7, #36 @ 0x24
- 8000996: 4618 mov r0, r3
- 8000998: f00a fb7c bl 800b094 <HAL_RCC_OscConfig>
- 800099c: 4603 mov r3, r0
- 800099e: 2b00 cmp r3, #0
- 80009a0: d001 beq.n 80009a6 <SystemClock_Config+0xb6>
- {
- Error_Handler();
- 80009a2: f001 faf1 bl 8001f88 <Error_Handler>
- }
- /** Initializes the CPU, AHB and APB buses clocks
- */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- 80009a6: 233f movs r3, #63 @ 0x3f
- 80009a8: 607b str r3, [r7, #4]
- |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
- |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- 80009aa: 2303 movs r3, #3
- 80009ac: 60bb str r3, [r7, #8]
- RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
- 80009ae: 2300 movs r3, #0
- 80009b0: 60fb str r3, [r7, #12]
- RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
- 80009b2: 2308 movs r3, #8
- 80009b4: 613b str r3, [r7, #16]
- RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
- 80009b6: 2340 movs r3, #64 @ 0x40
- 80009b8: 617b str r3, [r7, #20]
- RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
- 80009ba: 2340 movs r3, #64 @ 0x40
- 80009bc: 61bb str r3, [r7, #24]
- RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
- 80009be: f44f 6380 mov.w r3, #1024 @ 0x400
- 80009c2: 61fb str r3, [r7, #28]
- RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
- 80009c4: 2340 movs r3, #64 @ 0x40
- 80009c6: 623b str r3, [r7, #32]
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
- 80009c8: 1d3b adds r3, r7, #4
- 80009ca: 2102 movs r1, #2
- 80009cc: 4618 mov r0, r3
- 80009ce: f00a ffbb bl 800b948 <HAL_RCC_ClockConfig>
- 80009d2: 4603 mov r3, r0
- 80009d4: 2b00 cmp r3, #0
- 80009d6: d001 beq.n 80009dc <SystemClock_Config+0xec>
- {
- Error_Handler();
- 80009d8: f001 fad6 bl 8001f88 <Error_Handler>
- }
- }
- 80009dc: bf00 nop
- 80009de: 3770 adds r7, #112 @ 0x70
- 80009e0: 46bd mov sp, r7
- 80009e2: bd80 pop {r7, pc}
- 80009e4: 58000400 .word 0x58000400
- 80009e8: 58024800 .word 0x58024800
- 080009ec <PeriphCommonClock_Config>:
- /**
- * @brief Peripherals Common Clock Configuration
- * @retval None
- */
- void PeriphCommonClock_Config(void)
- {
- 80009ec: b580 push {r7, lr}
- 80009ee: b0b0 sub sp, #192 @ 0xc0
- 80009f0: af00 add r7, sp, #0
- RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
- 80009f2: 463b mov r3, r7
- 80009f4: 22c0 movs r2, #192 @ 0xc0
- 80009f6: 2100 movs r1, #0
- 80009f8: 4618 mov r0, r3
- 80009fa: f017 f9d4 bl 8017da6 <memset>
- /** Initializes the peripherals clock
- */
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC;
- 80009fe: f44f 2200 mov.w r2, #524288 @ 0x80000
- 8000a02: f04f 0300 mov.w r3, #0
- 8000a06: e9c7 2300 strd r2, r3, [r7]
- PeriphClkInitStruct.PLL2.PLL2M = 5;
- 8000a0a: 2305 movs r3, #5
- 8000a0c: 60bb str r3, [r7, #8]
- PeriphClkInitStruct.PLL2.PLL2N = 52;
- 8000a0e: 2334 movs r3, #52 @ 0x34
- 8000a10: 60fb str r3, [r7, #12]
- PeriphClkInitStruct.PLL2.PLL2P = 26;
- 8000a12: 231a movs r3, #26
- 8000a14: 613b str r3, [r7, #16]
- PeriphClkInitStruct.PLL2.PLL2Q = 2;
- 8000a16: 2302 movs r3, #2
- 8000a18: 617b str r3, [r7, #20]
- PeriphClkInitStruct.PLL2.PLL2R = 2;
- 8000a1a: 2302 movs r3, #2
- 8000a1c: 61bb str r3, [r7, #24]
- PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_2;
- 8000a1e: 2380 movs r3, #128 @ 0x80
- 8000a20: 61fb str r3, [r7, #28]
- PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
- 8000a22: 2300 movs r3, #0
- 8000a24: 623b str r3, [r7, #32]
- PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
- 8000a26: 2300 movs r3, #0
- 8000a28: 627b str r3, [r7, #36] @ 0x24
- PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
- 8000a2a: 2300 movs r3, #0
- 8000a2c: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
- if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
- 8000a30: 463b mov r3, r7
- 8000a32: 4618 mov r0, r3
- 8000a34: f00b fb56 bl 800c0e4 <HAL_RCCEx_PeriphCLKConfig>
- 8000a38: 4603 mov r3, r0
- 8000a3a: 2b00 cmp r3, #0
- 8000a3c: d001 beq.n 8000a42 <PeriphCommonClock_Config+0x56>
- {
- Error_Handler();
- 8000a3e: f001 faa3 bl 8001f88 <Error_Handler>
- }
- }
- 8000a42: bf00 nop
- 8000a44: 37c0 adds r7, #192 @ 0xc0
- 8000a46: 46bd mov sp, r7
- 8000a48: bd80 pop {r7, pc}
- ...
- 08000a4c <MX_ADC1_Init>:
- * @brief ADC1 Initialization Function
- * @param None
- * @retval None
- */
- static void MX_ADC1_Init(void)
- {
- 8000a4c: b580 push {r7, lr}
- 8000a4e: b08a sub sp, #40 @ 0x28
- 8000a50: af00 add r7, sp, #0
- /* USER CODE BEGIN ADC1_Init 0 */
- /* USER CODE END ADC1_Init 0 */
- ADC_MultiModeTypeDef multimode = {0};
- 8000a52: f107 031c add.w r3, r7, #28
- 8000a56: 2200 movs r2, #0
- 8000a58: 601a str r2, [r3, #0]
- 8000a5a: 605a str r2, [r3, #4]
- 8000a5c: 609a str r2, [r3, #8]
- ADC_ChannelConfTypeDef sConfig = {0};
- 8000a5e: 463b mov r3, r7
- 8000a60: 2200 movs r2, #0
- 8000a62: 601a str r2, [r3, #0]
- 8000a64: 605a str r2, [r3, #4]
- 8000a66: 609a str r2, [r3, #8]
- 8000a68: 60da str r2, [r3, #12]
- 8000a6a: 611a str r2, [r3, #16]
- 8000a6c: 615a str r2, [r3, #20]
- 8000a6e: 619a str r2, [r3, #24]
- /* USER CODE END ADC1_Init 1 */
- /** Common config
- */
- hadc1.Instance = ADC1;
- 8000a70: 4b62 ldr r3, [pc, #392] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000a72: 4a63 ldr r2, [pc, #396] @ (8000c00 <MX_ADC1_Init+0x1b4>)
- 8000a74: 601a str r2, [r3, #0]
- hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
- 8000a76: 4b61 ldr r3, [pc, #388] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000a78: 2200 movs r2, #0
- 8000a7a: 605a str r2, [r3, #4]
- hadc1.Init.Resolution = ADC_RESOLUTION_16B;
- 8000a7c: 4b5f ldr r3, [pc, #380] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000a7e: 2200 movs r2, #0
- 8000a80: 609a str r2, [r3, #8]
- hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
- 8000a82: 4b5e ldr r3, [pc, #376] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000a84: 2201 movs r2, #1
- 8000a86: 60da str r2, [r3, #12]
- hadc1.Init.EOCSelection = ADC_EOC_SEQ_CONV;
- 8000a88: 4b5c ldr r3, [pc, #368] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000a8a: 2208 movs r2, #8
- 8000a8c: 611a str r2, [r3, #16]
- hadc1.Init.LowPowerAutoWait = DISABLE;
- 8000a8e: 4b5b ldr r3, [pc, #364] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000a90: 2200 movs r2, #0
- 8000a92: 751a strb r2, [r3, #20]
- hadc1.Init.ContinuousConvMode = ENABLE;
- 8000a94: 4b59 ldr r3, [pc, #356] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000a96: 2201 movs r2, #1
- 8000a98: 755a strb r2, [r3, #21]
- hadc1.Init.NbrOfConversion = 7;
- 8000a9a: 4b58 ldr r3, [pc, #352] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000a9c: 2207 movs r2, #7
- 8000a9e: 619a str r2, [r3, #24]
- hadc1.Init.DiscontinuousConvMode = DISABLE;
- 8000aa0: 4b56 ldr r3, [pc, #344] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000aa2: 2200 movs r2, #0
- 8000aa4: 771a strb r2, [r3, #28]
- hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T8_TRGO;
- 8000aa6: 4b55 ldr r3, [pc, #340] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000aa8: f44f 629c mov.w r2, #1248 @ 0x4e0
- 8000aac: 625a str r2, [r3, #36] @ 0x24
- hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
- 8000aae: 4b53 ldr r3, [pc, #332] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000ab0: f44f 6280 mov.w r2, #1024 @ 0x400
- 8000ab4: 629a str r2, [r3, #40] @ 0x28
- hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DMA_ONESHOT;
- 8000ab6: 4b51 ldr r3, [pc, #324] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000ab8: 2201 movs r2, #1
- 8000aba: 62da str r2, [r3, #44] @ 0x2c
- hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
- 8000abc: 4b4f ldr r3, [pc, #316] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000abe: 2200 movs r2, #0
- 8000ac0: 631a str r2, [r3, #48] @ 0x30
- hadc1.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
- 8000ac2: 4b4e ldr r3, [pc, #312] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000ac4: 2200 movs r2, #0
- 8000ac6: 635a str r2, [r3, #52] @ 0x34
- hadc1.Init.OversamplingMode = DISABLE;
- 8000ac8: 4b4c ldr r3, [pc, #304] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000aca: 2200 movs r2, #0
- 8000acc: f883 2038 strb.w r2, [r3, #56] @ 0x38
- if (HAL_ADC_Init(&hadc1) != HAL_OK)
- 8000ad0: 484a ldr r0, [pc, #296] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000ad2: f004 ffa9 bl 8005a28 <HAL_ADC_Init>
- 8000ad6: 4603 mov r3, r0
- 8000ad8: 2b00 cmp r3, #0
- 8000ada: d001 beq.n 8000ae0 <MX_ADC1_Init+0x94>
- {
- Error_Handler();
- 8000adc: f001 fa54 bl 8001f88 <Error_Handler>
- }
- /** Configure the ADC multi-mode
- */
- multimode.Mode = ADC_MODE_INDEPENDENT;
- 8000ae0: 2300 movs r3, #0
- 8000ae2: 61fb str r3, [r7, #28]
- if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
- 8000ae4: f107 031c add.w r3, r7, #28
- 8000ae8: 4619 mov r1, r3
- 8000aea: 4844 ldr r0, [pc, #272] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000aec: f006 f8ba bl 8006c64 <HAL_ADCEx_MultiModeConfigChannel>
- 8000af0: 4603 mov r3, r0
- 8000af2: 2b00 cmp r3, #0
- 8000af4: d001 beq.n 8000afa <MX_ADC1_Init+0xae>
- {
- Error_Handler();
- 8000af6: f001 fa47 bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_8;
- 8000afa: 4b42 ldr r3, [pc, #264] @ (8000c04 <MX_ADC1_Init+0x1b8>)
- 8000afc: 603b str r3, [r7, #0]
- sConfig.Rank = ADC_REGULAR_RANK_1;
- 8000afe: 2306 movs r3, #6
- 8000b00: 607b str r3, [r7, #4]
- sConfig.SamplingTime = ADC_SAMPLETIME_387CYCLES_5;
- 8000b02: 2306 movs r3, #6
- 8000b04: 60bb str r3, [r7, #8]
- sConfig.SingleDiff = ADC_SINGLE_ENDED;
- 8000b06: f240 73ff movw r3, #2047 @ 0x7ff
- 8000b0a: 60fb str r3, [r7, #12]
- sConfig.OffsetNumber = ADC_OFFSET_NONE;
- 8000b0c: 2304 movs r3, #4
- 8000b0e: 613b str r3, [r7, #16]
- sConfig.Offset = 0;
- 8000b10: 2300 movs r3, #0
- 8000b12: 617b str r3, [r7, #20]
- sConfig.OffsetSignedSaturation = DISABLE;
- 8000b14: 2300 movs r3, #0
- 8000b16: 767b strb r3, [r7, #25]
- if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8000b18: 463b mov r3, r7
- 8000b1a: 4619 mov r1, r3
- 8000b1c: 4837 ldr r0, [pc, #220] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000b1e: f005 f9fd bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000b22: 4603 mov r3, r0
- 8000b24: 2b00 cmp r3, #0
- 8000b26: d001 beq.n 8000b2c <MX_ADC1_Init+0xe0>
- {
- Error_Handler();
- 8000b28: f001 fa2e bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_7;
- 8000b2c: 4b36 ldr r3, [pc, #216] @ (8000c08 <MX_ADC1_Init+0x1bc>)
- 8000b2e: 603b str r3, [r7, #0]
- sConfig.Rank = ADC_REGULAR_RANK_2;
- 8000b30: 230c movs r3, #12
- 8000b32: 607b str r3, [r7, #4]
- if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8000b34: 463b mov r3, r7
- 8000b36: 4619 mov r1, r3
- 8000b38: 4830 ldr r0, [pc, #192] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000b3a: f005 f9ef bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000b3e: 4603 mov r3, r0
- 8000b40: 2b00 cmp r3, #0
- 8000b42: d001 beq.n 8000b48 <MX_ADC1_Init+0xfc>
- {
- Error_Handler();
- 8000b44: f001 fa20 bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_9;
- 8000b48: 4b30 ldr r3, [pc, #192] @ (8000c0c <MX_ADC1_Init+0x1c0>)
- 8000b4a: 603b str r3, [r7, #0]
- sConfig.Rank = ADC_REGULAR_RANK_3;
- 8000b4c: 2312 movs r3, #18
- 8000b4e: 607b str r3, [r7, #4]
- if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8000b50: 463b mov r3, r7
- 8000b52: 4619 mov r1, r3
- 8000b54: 4829 ldr r0, [pc, #164] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000b56: f005 f9e1 bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000b5a: 4603 mov r3, r0
- 8000b5c: 2b00 cmp r3, #0
- 8000b5e: d001 beq.n 8000b64 <MX_ADC1_Init+0x118>
- {
- Error_Handler();
- 8000b60: f001 fa12 bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_16;
- 8000b64: 4b2a ldr r3, [pc, #168] @ (8000c10 <MX_ADC1_Init+0x1c4>)
- 8000b66: 603b str r3, [r7, #0]
- sConfig.Rank = ADC_REGULAR_RANK_4;
- 8000b68: 2318 movs r3, #24
- 8000b6a: 607b str r3, [r7, #4]
- if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8000b6c: 463b mov r3, r7
- 8000b6e: 4619 mov r1, r3
- 8000b70: 4822 ldr r0, [pc, #136] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000b72: f005 f9d3 bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000b76: 4603 mov r3, r0
- 8000b78: 2b00 cmp r3, #0
- 8000b7a: d001 beq.n 8000b80 <MX_ADC1_Init+0x134>
- {
- Error_Handler();
- 8000b7c: f001 fa04 bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_17;
- 8000b80: 4b24 ldr r3, [pc, #144] @ (8000c14 <MX_ADC1_Init+0x1c8>)
- 8000b82: 603b str r3, [r7, #0]
- sConfig.Rank = ADC_REGULAR_RANK_5;
- 8000b84: f44f 7380 mov.w r3, #256 @ 0x100
- 8000b88: 607b str r3, [r7, #4]
- if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8000b8a: 463b mov r3, r7
- 8000b8c: 4619 mov r1, r3
- 8000b8e: 481b ldr r0, [pc, #108] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000b90: f005 f9c4 bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000b94: 4603 mov r3, r0
- 8000b96: 2b00 cmp r3, #0
- 8000b98: d001 beq.n 8000b9e <MX_ADC1_Init+0x152>
- {
- Error_Handler();
- 8000b9a: f001 f9f5 bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_14;
- 8000b9e: 4b1e ldr r3, [pc, #120] @ (8000c18 <MX_ADC1_Init+0x1cc>)
- 8000ba0: 603b str r3, [r7, #0]
- sConfig.Rank = ADC_REGULAR_RANK_6;
- 8000ba2: f44f 7383 mov.w r3, #262 @ 0x106
- 8000ba6: 607b str r3, [r7, #4]
- if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8000ba8: 463b mov r3, r7
- 8000baa: 4619 mov r1, r3
- 8000bac: 4813 ldr r0, [pc, #76] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000bae: f005 f9b5 bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000bb2: 4603 mov r3, r0
- 8000bb4: 2b00 cmp r3, #0
- 8000bb6: d001 beq.n 8000bbc <MX_ADC1_Init+0x170>
- {
- Error_Handler();
- 8000bb8: f001 f9e6 bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_15;
- 8000bbc: 4b17 ldr r3, [pc, #92] @ (8000c1c <MX_ADC1_Init+0x1d0>)
- 8000bbe: 603b str r3, [r7, #0]
- sConfig.Rank = ADC_REGULAR_RANK_7;
- 8000bc0: f44f 7386 mov.w r3, #268 @ 0x10c
- 8000bc4: 607b str r3, [r7, #4]
- if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8000bc6: 463b mov r3, r7
- 8000bc8: 4619 mov r1, r3
- 8000bca: 480c ldr r0, [pc, #48] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000bcc: f005 f9a6 bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000bd0: 4603 mov r3, r0
- 8000bd2: 2b00 cmp r3, #0
- 8000bd4: d001 beq.n 8000bda <MX_ADC1_Init+0x18e>
- {
- Error_Handler();
- 8000bd6: f001 f9d7 bl 8001f88 <Error_Handler>
- }
- /* USER CODE BEGIN ADC1_Init 2 */
- if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED) != HAL_OK)
- 8000bda: f240 72ff movw r2, #2047 @ 0x7ff
- 8000bde: f04f 1101 mov.w r1, #65537 @ 0x10001
- 8000be2: 4806 ldr r0, [pc, #24] @ (8000bfc <MX_ADC1_Init+0x1b0>)
- 8000be4: f005 ffda bl 8006b9c <HAL_ADCEx_Calibration_Start>
- 8000be8: 4603 mov r3, r0
- 8000bea: 2b00 cmp r3, #0
- 8000bec: d001 beq.n 8000bf2 <MX_ADC1_Init+0x1a6>
- {
- Error_Handler();
- 8000bee: f001 f9cb bl 8001f88 <Error_Handler>
- }
- /* USER CODE END ADC1_Init 2 */
- }
- 8000bf2: bf00 nop
- 8000bf4: 3728 adds r7, #40 @ 0x28
- 8000bf6: 46bd mov sp, r7
- 8000bf8: bd80 pop {r7, pc}
- 8000bfa: bf00 nop
- 8000bfc: 24000140 .word 0x24000140
- 8000c00: 40022000 .word 0x40022000
- 8000c04: 21800100 .word 0x21800100
- 8000c08: 1d500080 .word 0x1d500080
- 8000c0c: 25b00200 .word 0x25b00200
- 8000c10: 43210000 .word 0x43210000
- 8000c14: 47520000 .word 0x47520000
- 8000c18: 3ac04000 .word 0x3ac04000
- 8000c1c: 3ef08000 .word 0x3ef08000
- 08000c20 <MX_ADC2_Init>:
- * @brief ADC2 Initialization Function
- * @param None
- * @retval None
- */
- static void MX_ADC2_Init(void)
- {
- 8000c20: b580 push {r7, lr}
- 8000c22: b088 sub sp, #32
- 8000c24: af00 add r7, sp, #0
- /* USER CODE BEGIN ADC2_Init 0 */
- /* USER CODE END ADC2_Init 0 */
- ADC_ChannelConfTypeDef sConfig = {0};
- 8000c26: 1d3b adds r3, r7, #4
- 8000c28: 2200 movs r2, #0
- 8000c2a: 601a str r2, [r3, #0]
- 8000c2c: 605a str r2, [r3, #4]
- 8000c2e: 609a str r2, [r3, #8]
- 8000c30: 60da str r2, [r3, #12]
- 8000c32: 611a str r2, [r3, #16]
- 8000c34: 615a str r2, [r3, #20]
- 8000c36: 619a str r2, [r3, #24]
- /* USER CODE END ADC2_Init 1 */
- /** Common config
- */
- hadc2.Instance = ADC2;
- 8000c38: 4b3e ldr r3, [pc, #248] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c3a: 4a3f ldr r2, [pc, #252] @ (8000d38 <MX_ADC2_Init+0x118>)
- 8000c3c: 601a str r2, [r3, #0]
- hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
- 8000c3e: 4b3d ldr r3, [pc, #244] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c40: 2200 movs r2, #0
- 8000c42: 605a str r2, [r3, #4]
- hadc2.Init.Resolution = ADC_RESOLUTION_16B;
- 8000c44: 4b3b ldr r3, [pc, #236] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c46: 2200 movs r2, #0
- 8000c48: 609a str r2, [r3, #8]
- hadc2.Init.ScanConvMode = ADC_SCAN_ENABLE;
- 8000c4a: 4b3a ldr r3, [pc, #232] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c4c: 2201 movs r2, #1
- 8000c4e: 60da str r2, [r3, #12]
- hadc2.Init.EOCSelection = ADC_EOC_SEQ_CONV;
- 8000c50: 4b38 ldr r3, [pc, #224] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c52: 2208 movs r2, #8
- 8000c54: 611a str r2, [r3, #16]
- hadc2.Init.LowPowerAutoWait = DISABLE;
- 8000c56: 4b37 ldr r3, [pc, #220] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c58: 2200 movs r2, #0
- 8000c5a: 751a strb r2, [r3, #20]
- hadc2.Init.ContinuousConvMode = ENABLE;
- 8000c5c: 4b35 ldr r3, [pc, #212] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c5e: 2201 movs r2, #1
- 8000c60: 755a strb r2, [r3, #21]
- hadc2.Init.NbrOfConversion = 3;
- 8000c62: 4b34 ldr r3, [pc, #208] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c64: 2203 movs r2, #3
- 8000c66: 619a str r2, [r3, #24]
- hadc2.Init.DiscontinuousConvMode = DISABLE;
- 8000c68: 4b32 ldr r3, [pc, #200] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c6a: 2200 movs r2, #0
- 8000c6c: 771a strb r2, [r3, #28]
- hadc2.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T8_TRGO;
- 8000c6e: 4b31 ldr r3, [pc, #196] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c70: f44f 629c mov.w r2, #1248 @ 0x4e0
- 8000c74: 625a str r2, [r3, #36] @ 0x24
- hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
- 8000c76: 4b2f ldr r3, [pc, #188] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c78: f44f 6280 mov.w r2, #1024 @ 0x400
- 8000c7c: 629a str r2, [r3, #40] @ 0x28
- hadc2.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DMA_ONESHOT;
- 8000c7e: 4b2d ldr r3, [pc, #180] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c80: 2201 movs r2, #1
- 8000c82: 62da str r2, [r3, #44] @ 0x2c
- hadc2.Init.Overrun = ADC_OVR_DATA_PRESERVED;
- 8000c84: 4b2b ldr r3, [pc, #172] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c86: 2200 movs r2, #0
- 8000c88: 631a str r2, [r3, #48] @ 0x30
- hadc2.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
- 8000c8a: 4b2a ldr r3, [pc, #168] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c8c: 2200 movs r2, #0
- 8000c8e: 635a str r2, [r3, #52] @ 0x34
- hadc2.Init.OversamplingMode = DISABLE;
- 8000c90: 4b28 ldr r3, [pc, #160] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c92: 2200 movs r2, #0
- 8000c94: f883 2038 strb.w r2, [r3, #56] @ 0x38
- if (HAL_ADC_Init(&hadc2) != HAL_OK)
- 8000c98: 4826 ldr r0, [pc, #152] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000c9a: f004 fec5 bl 8005a28 <HAL_ADC_Init>
- 8000c9e: 4603 mov r3, r0
- 8000ca0: 2b00 cmp r3, #0
- 8000ca2: d001 beq.n 8000ca8 <MX_ADC2_Init+0x88>
- {
- Error_Handler();
- 8000ca4: f001 f970 bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_3;
- 8000ca8: 4b24 ldr r3, [pc, #144] @ (8000d3c <MX_ADC2_Init+0x11c>)
- 8000caa: 607b str r3, [r7, #4]
- sConfig.Rank = ADC_REGULAR_RANK_1;
- 8000cac: 2306 movs r3, #6
- 8000cae: 60bb str r3, [r7, #8]
- sConfig.SamplingTime = ADC_SAMPLETIME_387CYCLES_5;
- 8000cb0: 2306 movs r3, #6
- 8000cb2: 60fb str r3, [r7, #12]
- sConfig.SingleDiff = ADC_SINGLE_ENDED;
- 8000cb4: f240 73ff movw r3, #2047 @ 0x7ff
- 8000cb8: 613b str r3, [r7, #16]
- sConfig.OffsetNumber = ADC_OFFSET_NONE;
- 8000cba: 2304 movs r3, #4
- 8000cbc: 617b str r3, [r7, #20]
- sConfig.Offset = 0;
- 8000cbe: 2300 movs r3, #0
- 8000cc0: 61bb str r3, [r7, #24]
- sConfig.OffsetSignedSaturation = DISABLE;
- 8000cc2: 2300 movs r3, #0
- 8000cc4: 777b strb r3, [r7, #29]
- if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
- 8000cc6: 1d3b adds r3, r7, #4
- 8000cc8: 4619 mov r1, r3
- 8000cca: 481a ldr r0, [pc, #104] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000ccc: f005 f926 bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000cd0: 4603 mov r3, r0
- 8000cd2: 2b00 cmp r3, #0
- 8000cd4: d001 beq.n 8000cda <MX_ADC2_Init+0xba>
- {
- Error_Handler();
- 8000cd6: f001 f957 bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_4;
- 8000cda: 4b19 ldr r3, [pc, #100] @ (8000d40 <MX_ADC2_Init+0x120>)
- 8000cdc: 607b str r3, [r7, #4]
- sConfig.Rank = ADC_REGULAR_RANK_2;
- 8000cde: 230c movs r3, #12
- 8000ce0: 60bb str r3, [r7, #8]
- if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
- 8000ce2: 1d3b adds r3, r7, #4
- 8000ce4: 4619 mov r1, r3
- 8000ce6: 4813 ldr r0, [pc, #76] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000ce8: f005 f918 bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000cec: 4603 mov r3, r0
- 8000cee: 2b00 cmp r3, #0
- 8000cf0: d001 beq.n 8000cf6 <MX_ADC2_Init+0xd6>
- {
- Error_Handler();
- 8000cf2: f001 f949 bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_5;
- 8000cf6: 4b13 ldr r3, [pc, #76] @ (8000d44 <MX_ADC2_Init+0x124>)
- 8000cf8: 607b str r3, [r7, #4]
- sConfig.Rank = ADC_REGULAR_RANK_3;
- 8000cfa: 2312 movs r3, #18
- 8000cfc: 60bb str r3, [r7, #8]
- if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
- 8000cfe: 1d3b adds r3, r7, #4
- 8000d00: 4619 mov r1, r3
- 8000d02: 480c ldr r0, [pc, #48] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000d04: f005 f90a bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000d08: 4603 mov r3, r0
- 8000d0a: 2b00 cmp r3, #0
- 8000d0c: d001 beq.n 8000d12 <MX_ADC2_Init+0xf2>
- {
- Error_Handler();
- 8000d0e: f001 f93b bl 8001f88 <Error_Handler>
- }
- /* USER CODE BEGIN ADC2_Init 2 */
- if (HAL_ADCEx_Calibration_Start(&hadc2, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED) != HAL_OK)
- 8000d12: f240 72ff movw r2, #2047 @ 0x7ff
- 8000d16: f04f 1101 mov.w r1, #65537 @ 0x10001
- 8000d1a: 4806 ldr r0, [pc, #24] @ (8000d34 <MX_ADC2_Init+0x114>)
- 8000d1c: f005 ff3e bl 8006b9c <HAL_ADCEx_Calibration_Start>
- 8000d20: 4603 mov r3, r0
- 8000d22: 2b00 cmp r3, #0
- 8000d24: d001 beq.n 8000d2a <MX_ADC2_Init+0x10a>
- {
- Error_Handler();
- 8000d26: f001 f92f bl 8001f88 <Error_Handler>
- }
- /* USER CODE END ADC2_Init 2 */
- }
- 8000d2a: bf00 nop
- 8000d2c: 3720 adds r7, #32
- 8000d2e: 46bd mov sp, r7
- 8000d30: bd80 pop {r7, pc}
- 8000d32: bf00 nop
- 8000d34: 240001a4 .word 0x240001a4
- 8000d38: 40022100 .word 0x40022100
- 8000d3c: 0c900008 .word 0x0c900008
- 8000d40: 10c00010 .word 0x10c00010
- 8000d44: 14f00020 .word 0x14f00020
- 08000d48 <MX_ADC3_Init>:
- * @brief ADC3 Initialization Function
- * @param None
- * @retval None
- */
- static void MX_ADC3_Init(void)
- {
- 8000d48: b580 push {r7, lr}
- 8000d4a: b088 sub sp, #32
- 8000d4c: af00 add r7, sp, #0
- /* USER CODE BEGIN ADC3_Init 0 */
- /* USER CODE END ADC3_Init 0 */
- ADC_ChannelConfTypeDef sConfig = {0};
- 8000d4e: 1d3b adds r3, r7, #4
- 8000d50: 2200 movs r2, #0
- 8000d52: 601a str r2, [r3, #0]
- 8000d54: 605a str r2, [r3, #4]
- 8000d56: 609a str r2, [r3, #8]
- 8000d58: 60da str r2, [r3, #12]
- 8000d5a: 611a str r2, [r3, #16]
- 8000d5c: 615a str r2, [r3, #20]
- 8000d5e: 619a str r2, [r3, #24]
- /* USER CODE END ADC3_Init 1 */
- /** Common config
- */
- hadc3.Instance = ADC3;
- 8000d60: 4b4b ldr r3, [pc, #300] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000d62: 4a4c ldr r2, [pc, #304] @ (8000e94 <MX_ADC3_Init+0x14c>)
- 8000d64: 601a str r2, [r3, #0]
- hadc3.Init.Resolution = ADC_RESOLUTION_16B;
- 8000d66: 4b4a ldr r3, [pc, #296] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000d68: 2200 movs r2, #0
- 8000d6a: 609a str r2, [r3, #8]
- hadc3.Init.ScanConvMode = ADC_SCAN_ENABLE;
- 8000d6c: 4b48 ldr r3, [pc, #288] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000d6e: 2201 movs r2, #1
- 8000d70: 60da str r2, [r3, #12]
- hadc3.Init.EOCSelection = ADC_EOC_SEQ_CONV;
- 8000d72: 4b47 ldr r3, [pc, #284] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000d74: 2208 movs r2, #8
- 8000d76: 611a str r2, [r3, #16]
- hadc3.Init.LowPowerAutoWait = DISABLE;
- 8000d78: 4b45 ldr r3, [pc, #276] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000d7a: 2200 movs r2, #0
- 8000d7c: 751a strb r2, [r3, #20]
- hadc3.Init.ContinuousConvMode = ENABLE;
- 8000d7e: 4b44 ldr r3, [pc, #272] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000d80: 2201 movs r2, #1
- 8000d82: 755a strb r2, [r3, #21]
- hadc3.Init.NbrOfConversion = 5;
- 8000d84: 4b42 ldr r3, [pc, #264] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000d86: 2205 movs r2, #5
- 8000d88: 619a str r2, [r3, #24]
- hadc3.Init.DiscontinuousConvMode = DISABLE;
- 8000d8a: 4b41 ldr r3, [pc, #260] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000d8c: 2200 movs r2, #0
- 8000d8e: 771a strb r2, [r3, #28]
- hadc3.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T8_TRGO;
- 8000d90: 4b3f ldr r3, [pc, #252] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000d92: f44f 629c mov.w r2, #1248 @ 0x4e0
- 8000d96: 625a str r2, [r3, #36] @ 0x24
- hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
- 8000d98: 4b3d ldr r3, [pc, #244] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000d9a: f44f 6280 mov.w r2, #1024 @ 0x400
- 8000d9e: 629a str r2, [r3, #40] @ 0x28
- hadc3.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DMA_ONESHOT;
- 8000da0: 4b3b ldr r3, [pc, #236] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000da2: 2201 movs r2, #1
- 8000da4: 62da str r2, [r3, #44] @ 0x2c
- hadc3.Init.Overrun = ADC_OVR_DATA_PRESERVED;
- 8000da6: 4b3a ldr r3, [pc, #232] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000da8: 2200 movs r2, #0
- 8000daa: 631a str r2, [r3, #48] @ 0x30
- hadc3.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
- 8000dac: 4b38 ldr r3, [pc, #224] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000dae: 2200 movs r2, #0
- 8000db0: 635a str r2, [r3, #52] @ 0x34
- hadc3.Init.OversamplingMode = DISABLE;
- 8000db2: 4b37 ldr r3, [pc, #220] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000db4: 2200 movs r2, #0
- 8000db6: f883 2038 strb.w r2, [r3, #56] @ 0x38
- if (HAL_ADC_Init(&hadc3) != HAL_OK)
- 8000dba: 4835 ldr r0, [pc, #212] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000dbc: f004 fe34 bl 8005a28 <HAL_ADC_Init>
- 8000dc0: 4603 mov r3, r0
- 8000dc2: 2b00 cmp r3, #0
- 8000dc4: d001 beq.n 8000dca <MX_ADC3_Init+0x82>
- {
- Error_Handler();
- 8000dc6: f001 f8df bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_0;
- 8000dca: 2301 movs r3, #1
- 8000dcc: 607b str r3, [r7, #4]
- sConfig.Rank = ADC_REGULAR_RANK_1;
- 8000dce: 2306 movs r3, #6
- 8000dd0: 60bb str r3, [r7, #8]
- sConfig.SamplingTime = ADC_SAMPLETIME_387CYCLES_5;
- 8000dd2: 2306 movs r3, #6
- 8000dd4: 60fb str r3, [r7, #12]
- sConfig.SingleDiff = ADC_SINGLE_ENDED;
- 8000dd6: f240 73ff movw r3, #2047 @ 0x7ff
- 8000dda: 613b str r3, [r7, #16]
- sConfig.OffsetNumber = ADC_OFFSET_NONE;
- 8000ddc: 2304 movs r3, #4
- 8000dde: 617b str r3, [r7, #20]
- sConfig.Offset = 0;
- 8000de0: 2300 movs r3, #0
- 8000de2: 61bb str r3, [r7, #24]
- sConfig.OffsetSignedSaturation = DISABLE;
- 8000de4: 2300 movs r3, #0
- 8000de6: 777b strb r3, [r7, #29]
- if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
- 8000de8: 1d3b adds r3, r7, #4
- 8000dea: 4619 mov r1, r3
- 8000dec: 4828 ldr r0, [pc, #160] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000dee: f005 f895 bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000df2: 4603 mov r3, r0
- 8000df4: 2b00 cmp r3, #0
- 8000df6: d001 beq.n 8000dfc <MX_ADC3_Init+0xb4>
- {
- Error_Handler();
- 8000df8: f001 f8c6 bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_1;
- 8000dfc: 4b26 ldr r3, [pc, #152] @ (8000e98 <MX_ADC3_Init+0x150>)
- 8000dfe: 607b str r3, [r7, #4]
- sConfig.Rank = ADC_REGULAR_RANK_2;
- 8000e00: 230c movs r3, #12
- 8000e02: 60bb str r3, [r7, #8]
- if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
- 8000e04: 1d3b adds r3, r7, #4
- 8000e06: 4619 mov r1, r3
- 8000e08: 4821 ldr r0, [pc, #132] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000e0a: f005 f887 bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000e0e: 4603 mov r3, r0
- 8000e10: 2b00 cmp r3, #0
- 8000e12: d001 beq.n 8000e18 <MX_ADC3_Init+0xd0>
- {
- Error_Handler();
- 8000e14: f001 f8b8 bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_10;
- 8000e18: 4b20 ldr r3, [pc, #128] @ (8000e9c <MX_ADC3_Init+0x154>)
- 8000e1a: 607b str r3, [r7, #4]
- sConfig.Rank = ADC_REGULAR_RANK_3;
- 8000e1c: 2312 movs r3, #18
- 8000e1e: 60bb str r3, [r7, #8]
- if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
- 8000e20: 1d3b adds r3, r7, #4
- 8000e22: 4619 mov r1, r3
- 8000e24: 481a ldr r0, [pc, #104] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000e26: f005 f879 bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000e2a: 4603 mov r3, r0
- 8000e2c: 2b00 cmp r3, #0
- 8000e2e: d001 beq.n 8000e34 <MX_ADC3_Init+0xec>
- {
- Error_Handler();
- 8000e30: f001 f8aa bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_11;
- 8000e34: 4b1a ldr r3, [pc, #104] @ (8000ea0 <MX_ADC3_Init+0x158>)
- 8000e36: 607b str r3, [r7, #4]
- sConfig.Rank = ADC_REGULAR_RANK_4;
- 8000e38: 2318 movs r3, #24
- 8000e3a: 60bb str r3, [r7, #8]
- if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
- 8000e3c: 1d3b adds r3, r7, #4
- 8000e3e: 4619 mov r1, r3
- 8000e40: 4813 ldr r0, [pc, #76] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000e42: f005 f86b bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000e46: 4603 mov r3, r0
- 8000e48: 2b00 cmp r3, #0
- 8000e4a: d001 beq.n 8000e50 <MX_ADC3_Init+0x108>
- {
- Error_Handler();
- 8000e4c: f001 f89c bl 8001f88 <Error_Handler>
- }
- /** Configure Regular Channel
- */
- sConfig.Channel = ADC_CHANNEL_VREFINT;
- 8000e50: 4b14 ldr r3, [pc, #80] @ (8000ea4 <MX_ADC3_Init+0x15c>)
- 8000e52: 607b str r3, [r7, #4]
- sConfig.Rank = ADC_REGULAR_RANK_5;
- 8000e54: f44f 7380 mov.w r3, #256 @ 0x100
- 8000e58: 60bb str r3, [r7, #8]
- if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
- 8000e5a: 1d3b adds r3, r7, #4
- 8000e5c: 4619 mov r1, r3
- 8000e5e: 480c ldr r0, [pc, #48] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000e60: f005 f85c bl 8005f1c <HAL_ADC_ConfigChannel>
- 8000e64: 4603 mov r3, r0
- 8000e66: 2b00 cmp r3, #0
- 8000e68: d001 beq.n 8000e6e <MX_ADC3_Init+0x126>
- {
- Error_Handler();
- 8000e6a: f001 f88d bl 8001f88 <Error_Handler>
- }
- /* USER CODE BEGIN ADC3_Init 2 */
- if (HAL_ADCEx_Calibration_Start(&hadc3, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED) != HAL_OK)
- 8000e6e: f240 72ff movw r2, #2047 @ 0x7ff
- 8000e72: f04f 1101 mov.w r1, #65537 @ 0x10001
- 8000e76: 4806 ldr r0, [pc, #24] @ (8000e90 <MX_ADC3_Init+0x148>)
- 8000e78: f005 fe90 bl 8006b9c <HAL_ADCEx_Calibration_Start>
- 8000e7c: 4603 mov r3, r0
- 8000e7e: 2b00 cmp r3, #0
- 8000e80: d001 beq.n 8000e86 <MX_ADC3_Init+0x13e>
- {
- Error_Handler();
- 8000e82: f001 f881 bl 8001f88 <Error_Handler>
- }
- /* USER CODE END ADC3_Init 2 */
- }
- 8000e86: bf00 nop
- 8000e88: 3720 adds r7, #32
- 8000e8a: 46bd mov sp, r7
- 8000e8c: bd80 pop {r7, pc}
- 8000e8e: bf00 nop
- 8000e90: 24000208 .word 0x24000208
- 8000e94: 58026000 .word 0x58026000
- 8000e98: 04300002 .word 0x04300002
- 8000e9c: 2a000400 .word 0x2a000400
- 8000ea0: 2e300800 .word 0x2e300800
- 8000ea4: cfb80000 .word 0xcfb80000
- 08000ea8 <MX_COMP1_Init>:
- * @brief COMP1 Initialization Function
- * @param None
- * @retval None
- */
- static void MX_COMP1_Init(void)
- {
- 8000ea8: b580 push {r7, lr}
- 8000eaa: af00 add r7, sp, #0
- /* USER CODE END COMP1_Init 0 */
- /* USER CODE BEGIN COMP1_Init 1 */
- /* USER CODE END COMP1_Init 1 */
- hcomp1.Instance = COMP1;
- 8000eac: 4b12 ldr r3, [pc, #72] @ (8000ef8 <MX_COMP1_Init+0x50>)
- 8000eae: 4a13 ldr r2, [pc, #76] @ (8000efc <MX_COMP1_Init+0x54>)
- 8000eb0: 601a str r2, [r3, #0]
- hcomp1.Init.InvertingInput = COMP_INPUT_MINUS_3_4VREFINT;
- 8000eb2: 4b11 ldr r3, [pc, #68] @ (8000ef8 <MX_COMP1_Init+0x50>)
- 8000eb4: 4a12 ldr r2, [pc, #72] @ (8000f00 <MX_COMP1_Init+0x58>)
- 8000eb6: 611a str r2, [r3, #16]
- hcomp1.Init.NonInvertingInput = COMP_INPUT_PLUS_IO2;
- 8000eb8: 4b0f ldr r3, [pc, #60] @ (8000ef8 <MX_COMP1_Init+0x50>)
- 8000eba: f44f 1280 mov.w r2, #1048576 @ 0x100000
- 8000ebe: 60da str r2, [r3, #12]
- hcomp1.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED;
- 8000ec0: 4b0d ldr r3, [pc, #52] @ (8000ef8 <MX_COMP1_Init+0x50>)
- 8000ec2: 2200 movs r2, #0
- 8000ec4: 619a str r2, [r3, #24]
- hcomp1.Init.Hysteresis = COMP_HYSTERESIS_NONE;
- 8000ec6: 4b0c ldr r3, [pc, #48] @ (8000ef8 <MX_COMP1_Init+0x50>)
- 8000ec8: 2200 movs r2, #0
- 8000eca: 615a str r2, [r3, #20]
- hcomp1.Init.BlankingSrce = COMP_BLANKINGSRC_NONE;
- 8000ecc: 4b0a ldr r3, [pc, #40] @ (8000ef8 <MX_COMP1_Init+0x50>)
- 8000ece: 2200 movs r2, #0
- 8000ed0: 61da str r2, [r3, #28]
- hcomp1.Init.Mode = COMP_POWERMODE_HIGHSPEED;
- 8000ed2: 4b09 ldr r3, [pc, #36] @ (8000ef8 <MX_COMP1_Init+0x50>)
- 8000ed4: 2200 movs r2, #0
- 8000ed6: 609a str r2, [r3, #8]
- hcomp1.Init.WindowMode = COMP_WINDOWMODE_DISABLE;
- 8000ed8: 4b07 ldr r3, [pc, #28] @ (8000ef8 <MX_COMP1_Init+0x50>)
- 8000eda: 2200 movs r2, #0
- 8000edc: 605a str r2, [r3, #4]
- hcomp1.Init.TriggerMode = COMP_TRIGGERMODE_NONE;
- 8000ede: 4b06 ldr r3, [pc, #24] @ (8000ef8 <MX_COMP1_Init+0x50>)
- 8000ee0: 2200 movs r2, #0
- 8000ee2: 621a str r2, [r3, #32]
- if (HAL_COMP_Init(&hcomp1) != HAL_OK)
- 8000ee4: 4804 ldr r0, [pc, #16] @ (8000ef8 <MX_COMP1_Init+0x50>)
- 8000ee6: f005 ff9b bl 8006e20 <HAL_COMP_Init>
- 8000eea: 4603 mov r3, r0
- 8000eec: 2b00 cmp r3, #0
- 8000eee: d001 beq.n 8000ef4 <MX_COMP1_Init+0x4c>
- {
- Error_Handler();
- 8000ef0: f001 f84a bl 8001f88 <Error_Handler>
- }
- /* USER CODE BEGIN COMP1_Init 2 */
- /* USER CODE END COMP1_Init 2 */
- }
- 8000ef4: bf00 nop
- 8000ef6: bd80 pop {r7, pc}
- 8000ef8: 240003d4 .word 0x240003d4
- 8000efc: 5800380c .word 0x5800380c
- 8000f00: 00020006 .word 0x00020006
- 08000f04 <MX_CRC_Init>:
- * @brief CRC Initialization Function
- * @param None
- * @retval None
- */
- static void MX_CRC_Init(void)
- {
- 8000f04: b580 push {r7, lr}
- 8000f06: af00 add r7, sp, #0
- /* USER CODE END CRC_Init 0 */
- /* USER CODE BEGIN CRC_Init 1 */
- /* USER CODE END CRC_Init 1 */
- hcrc.Instance = CRC;
- 8000f08: 4b11 ldr r3, [pc, #68] @ (8000f50 <MX_CRC_Init+0x4c>)
- 8000f0a: 4a12 ldr r2, [pc, #72] @ (8000f54 <MX_CRC_Init+0x50>)
- 8000f0c: 601a str r2, [r3, #0]
- hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE;
- 8000f0e: 4b10 ldr r3, [pc, #64] @ (8000f50 <MX_CRC_Init+0x4c>)
- 8000f10: 2201 movs r2, #1
- 8000f12: 711a strb r2, [r3, #4]
- hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
- 8000f14: 4b0e ldr r3, [pc, #56] @ (8000f50 <MX_CRC_Init+0x4c>)
- 8000f16: 2200 movs r2, #0
- 8000f18: 715a strb r2, [r3, #5]
- hcrc.Init.GeneratingPolynomial = 4129;
- 8000f1a: 4b0d ldr r3, [pc, #52] @ (8000f50 <MX_CRC_Init+0x4c>)
- 8000f1c: f241 0221 movw r2, #4129 @ 0x1021
- 8000f20: 609a str r2, [r3, #8]
- hcrc.Init.CRCLength = CRC_POLYLENGTH_16B;
- 8000f22: 4b0b ldr r3, [pc, #44] @ (8000f50 <MX_CRC_Init+0x4c>)
- 8000f24: 2208 movs r2, #8
- 8000f26: 60da str r2, [r3, #12]
- hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
- 8000f28: 4b09 ldr r3, [pc, #36] @ (8000f50 <MX_CRC_Init+0x4c>)
- 8000f2a: 2200 movs r2, #0
- 8000f2c: 615a str r2, [r3, #20]
- hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
- 8000f2e: 4b08 ldr r3, [pc, #32] @ (8000f50 <MX_CRC_Init+0x4c>)
- 8000f30: 2200 movs r2, #0
- 8000f32: 619a str r2, [r3, #24]
- hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
- 8000f34: 4b06 ldr r3, [pc, #24] @ (8000f50 <MX_CRC_Init+0x4c>)
- 8000f36: 2201 movs r2, #1
- 8000f38: 621a str r2, [r3, #32]
- if (HAL_CRC_Init(&hcrc) != HAL_OK)
- 8000f3a: 4805 ldr r0, [pc, #20] @ (8000f50 <MX_CRC_Init+0x4c>)
- 8000f3c: f006 fa5a bl 80073f4 <HAL_CRC_Init>
- 8000f40: 4603 mov r3, r0
- 8000f42: 2b00 cmp r3, #0
- 8000f44: d001 beq.n 8000f4a <MX_CRC_Init+0x46>
- {
- Error_Handler();
- 8000f46: f001 f81f bl 8001f88 <Error_Handler>
- }
- /* USER CODE BEGIN CRC_Init 2 */
- /* USER CODE END CRC_Init 2 */
- }
- 8000f4a: bf00 nop
- 8000f4c: bd80 pop {r7, pc}
- 8000f4e: bf00 nop
- 8000f50: 24000400 .word 0x24000400
- 8000f54: 58024c00 .word 0x58024c00
- 08000f58 <MX_DAC1_Init>:
- * @brief DAC1 Initialization Function
- * @param None
- * @retval None
- */
- static void MX_DAC1_Init(void)
- {
- 8000f58: b580 push {r7, lr}
- 8000f5a: b08a sub sp, #40 @ 0x28
- 8000f5c: af00 add r7, sp, #0
- /* USER CODE BEGIN DAC1_Init 0 */
- /* USER CODE END DAC1_Init 0 */
- DAC_ChannelConfTypeDef sConfig = {0};
- 8000f5e: 1d3b adds r3, r7, #4
- 8000f60: 2224 movs r2, #36 @ 0x24
- 8000f62: 2100 movs r1, #0
- 8000f64: 4618 mov r0, r3
- 8000f66: f016 ff1e bl 8017da6 <memset>
- /* USER CODE END DAC1_Init 1 */
- /** DAC Initialization
- */
- hdac1.Instance = DAC1;
- 8000f6a: 4b17 ldr r3, [pc, #92] @ (8000fc8 <MX_DAC1_Init+0x70>)
- 8000f6c: 4a17 ldr r2, [pc, #92] @ (8000fcc <MX_DAC1_Init+0x74>)
- 8000f6e: 601a str r2, [r3, #0]
- if (HAL_DAC_Init(&hdac1) != HAL_OK)
- 8000f70: 4815 ldr r0, [pc, #84] @ (8000fc8 <MX_DAC1_Init+0x70>)
- 8000f72: f006 fc45 bl 8007800 <HAL_DAC_Init>
- 8000f76: 4603 mov r3, r0
- 8000f78: 2b00 cmp r3, #0
- 8000f7a: d001 beq.n 8000f80 <MX_DAC1_Init+0x28>
- {
- Error_Handler();
- 8000f7c: f001 f804 bl 8001f88 <Error_Handler>
- }
- /** DAC channel OUT1 config
- */
- sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
- 8000f80: 2300 movs r3, #0
- 8000f82: 607b str r3, [r7, #4]
- sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
- 8000f84: 2300 movs r3, #0
- 8000f86: 60bb str r3, [r7, #8]
- sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
- 8000f88: 2300 movs r3, #0
- 8000f8a: 60fb str r3, [r7, #12]
- sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_DISABLE;
- 8000f8c: 2301 movs r3, #1
- 8000f8e: 613b str r3, [r7, #16]
- sConfig.DAC_UserTrimming = DAC_TRIMMING_FACTORY;
- 8000f90: 2300 movs r3, #0
- 8000f92: 617b str r3, [r7, #20]
- if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK)
- 8000f94: 1d3b adds r3, r7, #4
- 8000f96: 2200 movs r2, #0
- 8000f98: 4619 mov r1, r3
- 8000f9a: 480b ldr r0, [pc, #44] @ (8000fc8 <MX_DAC1_Init+0x70>)
- 8000f9c: f006 fd34 bl 8007a08 <HAL_DAC_ConfigChannel>
- 8000fa0: 4603 mov r3, r0
- 8000fa2: 2b00 cmp r3, #0
- 8000fa4: d001 beq.n 8000faa <MX_DAC1_Init+0x52>
- {
- Error_Handler();
- 8000fa6: f000 ffef bl 8001f88 <Error_Handler>
- }
- /** DAC channel OUT2 config
- */
- if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_2) != HAL_OK)
- 8000faa: 1d3b adds r3, r7, #4
- 8000fac: 2210 movs r2, #16
- 8000fae: 4619 mov r1, r3
- 8000fb0: 4805 ldr r0, [pc, #20] @ (8000fc8 <MX_DAC1_Init+0x70>)
- 8000fb2: f006 fd29 bl 8007a08 <HAL_DAC_ConfigChannel>
- 8000fb6: 4603 mov r3, r0
- 8000fb8: 2b00 cmp r3, #0
- 8000fba: d001 beq.n 8000fc0 <MX_DAC1_Init+0x68>
- {
- Error_Handler();
- 8000fbc: f000 ffe4 bl 8001f88 <Error_Handler>
- }
- /* USER CODE BEGIN DAC1_Init 2 */
- /* USER CODE END DAC1_Init 2 */
- }
- 8000fc0: bf00 nop
- 8000fc2: 3728 adds r7, #40 @ 0x28
- 8000fc4: 46bd mov sp, r7
- 8000fc6: bd80 pop {r7, pc}
- 8000fc8: 24000424 .word 0x24000424
- 8000fcc: 40007400 .word 0x40007400
- 08000fd0 <MX_IWDG1_Init>:
- * @brief IWDG1 Initialization Function
- * @param None
- * @retval None
- */
- static void MX_IWDG1_Init(void)
- {
- 8000fd0: b580 push {r7, lr}
- 8000fd2: af00 add r7, sp, #0
- /* USER CODE END IWDG1_Init 0 */
- /* USER CODE BEGIN IWDG1_Init 1 */
- /* USER CODE END IWDG1_Init 1 */
- hiwdg1.Instance = IWDG1;
- 8000fd4: 4b0a ldr r3, [pc, #40] @ (8001000 <MX_IWDG1_Init+0x30>)
- 8000fd6: 4a0b ldr r2, [pc, #44] @ (8001004 <MX_IWDG1_Init+0x34>)
- 8000fd8: 601a str r2, [r3, #0]
- hiwdg1.Init.Prescaler = IWDG_PRESCALER_64;
- 8000fda: 4b09 ldr r3, [pc, #36] @ (8001000 <MX_IWDG1_Init+0x30>)
- 8000fdc: 2204 movs r2, #4
- 8000fde: 605a str r2, [r3, #4]
- hiwdg1.Init.Window = 249;
- 8000fe0: 4b07 ldr r3, [pc, #28] @ (8001000 <MX_IWDG1_Init+0x30>)
- 8000fe2: 22f9 movs r2, #249 @ 0xf9
- 8000fe4: 60da str r2, [r3, #12]
- hiwdg1.Init.Reload = 249;
- 8000fe6: 4b06 ldr r3, [pc, #24] @ (8001000 <MX_IWDG1_Init+0x30>)
- 8000fe8: 22f9 movs r2, #249 @ 0xf9
- 8000fea: 609a str r2, [r3, #8]
- if (HAL_IWDG_Init(&hiwdg1) != HAL_OK)
- 8000fec: 4804 ldr r0, [pc, #16] @ (8001000 <MX_IWDG1_Init+0x30>)
- 8000fee: f009 fea8 bl 800ad42 <HAL_IWDG_Init>
- 8000ff2: 4603 mov r3, r0
- 8000ff4: 2b00 cmp r3, #0
- 8000ff6: d001 beq.n 8000ffc <MX_IWDG1_Init+0x2c>
- {
- Error_Handler();
- 8000ff8: f000 ffc6 bl 8001f88 <Error_Handler>
- }
- /* USER CODE BEGIN IWDG1_Init 2 */
- /* USER CODE END IWDG1_Init 2 */
- }
- 8000ffc: bf00 nop
- 8000ffe: bd80 pop {r7, pc}
- 8001000: 24000438 .word 0x24000438
- 8001004: 58004800 .word 0x58004800
- 08001008 <MX_RNG_Init>:
- * @brief RNG Initialization Function
- * @param None
- * @retval None
- */
- static void MX_RNG_Init(void)
- {
- 8001008: b580 push {r7, lr}
- 800100a: af00 add r7, sp, #0
- /* USER CODE END RNG_Init 0 */
- /* USER CODE BEGIN RNG_Init 1 */
- /* USER CODE END RNG_Init 1 */
- hrng.Instance = RNG;
- 800100c: 4b07 ldr r3, [pc, #28] @ (800102c <MX_RNG_Init+0x24>)
- 800100e: 4a08 ldr r2, [pc, #32] @ (8001030 <MX_RNG_Init+0x28>)
- 8001010: 601a str r2, [r3, #0]
- hrng.Init.ClockErrorDetection = RNG_CED_ENABLE;
- 8001012: 4b06 ldr r3, [pc, #24] @ (800102c <MX_RNG_Init+0x24>)
- 8001014: 2200 movs r2, #0
- 8001016: 605a str r2, [r3, #4]
- if (HAL_RNG_Init(&hrng) != HAL_OK)
- 8001018: 4804 ldr r0, [pc, #16] @ (800102c <MX_RNG_Init+0x24>)
- 800101a: f00d fd45 bl 800eaa8 <HAL_RNG_Init>
- 800101e: 4603 mov r3, r0
- 8001020: 2b00 cmp r3, #0
- 8001022: d001 beq.n 8001028 <MX_RNG_Init+0x20>
- {
- Error_Handler();
- 8001024: f000 ffb0 bl 8001f88 <Error_Handler>
- }
- /* USER CODE BEGIN RNG_Init 2 */
- /* USER CODE END RNG_Init 2 */
- }
- 8001028: bf00 nop
- 800102a: bd80 pop {r7, pc}
- 800102c: 24000448 .word 0x24000448
- 8001030: 48021800 .word 0x48021800
- 08001034 <MX_TIM1_Init>:
- * @brief TIM1 Initialization Function
- * @param None
- * @retval None
- */
- static void MX_TIM1_Init(void)
- {
- 8001034: b5b0 push {r4, r5, r7, lr}
- 8001036: b096 sub sp, #88 @ 0x58
- 8001038: af00 add r7, sp, #0
- /* USER CODE BEGIN TIM1_Init 0 */
- /* USER CODE END TIM1_Init 0 */
- TIM_MasterConfigTypeDef sMasterConfig = {0};
- 800103a: f107 034c add.w r3, r7, #76 @ 0x4c
- 800103e: 2200 movs r2, #0
- 8001040: 601a str r2, [r3, #0]
- 8001042: 605a str r2, [r3, #4]
- 8001044: 609a str r2, [r3, #8]
- TIM_OC_InitTypeDef sConfigOC = {0};
- 8001046: f107 0330 add.w r3, r7, #48 @ 0x30
- 800104a: 2200 movs r2, #0
- 800104c: 601a str r2, [r3, #0]
- 800104e: 605a str r2, [r3, #4]
- 8001050: 609a str r2, [r3, #8]
- 8001052: 60da str r2, [r3, #12]
- 8001054: 611a str r2, [r3, #16]
- 8001056: 615a str r2, [r3, #20]
- 8001058: 619a str r2, [r3, #24]
- TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
- 800105a: 1d3b adds r3, r7, #4
- 800105c: 222c movs r2, #44 @ 0x2c
- 800105e: 2100 movs r1, #0
- 8001060: 4618 mov r0, r3
- 8001062: f016 fea0 bl 8017da6 <memset>
- /* USER CODE BEGIN TIM1_Init 1 */
- /* USER CODE END TIM1_Init 1 */
- htim1.Instance = TIM1;
- 8001066: 4b3e ldr r3, [pc, #248] @ (8001160 <MX_TIM1_Init+0x12c>)
- 8001068: 4a3e ldr r2, [pc, #248] @ (8001164 <MX_TIM1_Init+0x130>)
- 800106a: 601a str r2, [r3, #0]
- htim1.Init.Prescaler = 199;
- 800106c: 4b3c ldr r3, [pc, #240] @ (8001160 <MX_TIM1_Init+0x12c>)
- 800106e: 22c7 movs r2, #199 @ 0xc7
- 8001070: 605a str r2, [r3, #4]
- htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
- 8001072: 4b3b ldr r3, [pc, #236] @ (8001160 <MX_TIM1_Init+0x12c>)
- 8001074: 2200 movs r2, #0
- 8001076: 609a str r2, [r3, #8]
- htim1.Init.Period = 999;
- 8001078: 4b39 ldr r3, [pc, #228] @ (8001160 <MX_TIM1_Init+0x12c>)
- 800107a: f240 32e7 movw r2, #999 @ 0x3e7
- 800107e: 60da str r2, [r3, #12]
- htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 8001080: 4b37 ldr r3, [pc, #220] @ (8001160 <MX_TIM1_Init+0x12c>)
- 8001082: 2200 movs r2, #0
- 8001084: 611a str r2, [r3, #16]
- htim1.Init.RepetitionCounter = 0;
- 8001086: 4b36 ldr r3, [pc, #216] @ (8001160 <MX_TIM1_Init+0x12c>)
- 8001088: 2200 movs r2, #0
- 800108a: 615a str r2, [r3, #20]
- htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
- 800108c: 4b34 ldr r3, [pc, #208] @ (8001160 <MX_TIM1_Init+0x12c>)
- 800108e: 2280 movs r2, #128 @ 0x80
- 8001090: 619a str r2, [r3, #24]
- if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
- 8001092: 4833 ldr r0, [pc, #204] @ (8001160 <MX_TIM1_Init+0x12c>)
- 8001094: f00d feaa bl 800edec <HAL_TIM_PWM_Init>
- 8001098: 4603 mov r3, r0
- 800109a: 2b00 cmp r3, #0
- 800109c: d001 beq.n 80010a2 <MX_TIM1_Init+0x6e>
- {
- Error_Handler();
- 800109e: f000 ff73 bl 8001f88 <Error_Handler>
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 80010a2: 2300 movs r3, #0
- 80010a4: 64fb str r3, [r7, #76] @ 0x4c
- sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
- 80010a6: 2300 movs r3, #0
- 80010a8: 653b str r3, [r7, #80] @ 0x50
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 80010aa: 2300 movs r3, #0
- 80010ac: 657b str r3, [r7, #84] @ 0x54
- if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
- 80010ae: f107 034c add.w r3, r7, #76 @ 0x4c
- 80010b2: 4619 mov r1, r3
- 80010b4: 482a ldr r0, [pc, #168] @ (8001160 <MX_TIM1_Init+0x12c>)
- 80010b6: f00f fbfd bl 80108b4 <HAL_TIMEx_MasterConfigSynchronization>
- 80010ba: 4603 mov r3, r0
- 80010bc: 2b00 cmp r3, #0
- 80010be: d001 beq.n 80010c4 <MX_TIM1_Init+0x90>
- {
- Error_Handler();
- 80010c0: f000 ff62 bl 8001f88 <Error_Handler>
- }
- sConfigOC.OCMode = TIM_OCMODE_PWM1;
- 80010c4: 2360 movs r3, #96 @ 0x60
- 80010c6: 633b str r3, [r7, #48] @ 0x30
- sConfigOC.Pulse = 99;
- 80010c8: 2363 movs r3, #99 @ 0x63
- 80010ca: 637b str r3, [r7, #52] @ 0x34
- sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 80010cc: 2300 movs r3, #0
- 80010ce: 63bb str r3, [r7, #56] @ 0x38
- sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
- 80010d0: 2300 movs r3, #0
- 80010d2: 63fb str r3, [r7, #60] @ 0x3c
- sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 80010d4: 2300 movs r3, #0
- 80010d6: 643b str r3, [r7, #64] @ 0x40
- sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
- 80010d8: 2300 movs r3, #0
- 80010da: 647b str r3, [r7, #68] @ 0x44
- sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
- 80010dc: 2300 movs r3, #0
- 80010de: 64bb str r3, [r7, #72] @ 0x48
- if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
- 80010e0: f107 0330 add.w r3, r7, #48 @ 0x30
- 80010e4: 2204 movs r2, #4
- 80010e6: 4619 mov r1, r3
- 80010e8: 481d ldr r0, [pc, #116] @ (8001160 <MX_TIM1_Init+0x12c>)
- 80010ea: f00e fbd1 bl 800f890 <HAL_TIM_PWM_ConfigChannel>
- 80010ee: 4603 mov r3, r0
- 80010f0: 2b00 cmp r3, #0
- 80010f2: d001 beq.n 80010f8 <MX_TIM1_Init+0xc4>
- {
- Error_Handler();
- 80010f4: f000 ff48 bl 8001f88 <Error_Handler>
- }
- sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
- 80010f8: 2300 movs r3, #0
- 80010fa: 607b str r3, [r7, #4]
- sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
- 80010fc: 2300 movs r3, #0
- 80010fe: 60bb str r3, [r7, #8]
- sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
- 8001100: 2300 movs r3, #0
- 8001102: 60fb str r3, [r7, #12]
- sBreakDeadTimeConfig.DeadTime = 0;
- 8001104: 2300 movs r3, #0
- 8001106: 613b str r3, [r7, #16]
- sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
- 8001108: 2300 movs r3, #0
- 800110a: 617b str r3, [r7, #20]
- sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
- 800110c: f44f 5300 mov.w r3, #8192 @ 0x2000
- 8001110: 61bb str r3, [r7, #24]
- sBreakDeadTimeConfig.BreakFilter = 0;
- 8001112: 2300 movs r3, #0
- 8001114: 61fb str r3, [r7, #28]
- sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
- 8001116: 2300 movs r3, #0
- 8001118: 623b str r3, [r7, #32]
- sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
- 800111a: f04f 7300 mov.w r3, #33554432 @ 0x2000000
- 800111e: 627b str r3, [r7, #36] @ 0x24
- sBreakDeadTimeConfig.Break2Filter = 0;
- 8001120: 2300 movs r3, #0
- 8001122: 62bb str r3, [r7, #40] @ 0x28
- sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
- 8001124: 2300 movs r3, #0
- 8001126: 62fb str r3, [r7, #44] @ 0x2c
- if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
- 8001128: 1d3b adds r3, r7, #4
- 800112a: 4619 mov r1, r3
- 800112c: 480c ldr r0, [pc, #48] @ (8001160 <MX_TIM1_Init+0x12c>)
- 800112e: f00f fc4f bl 80109d0 <HAL_TIMEx_ConfigBreakDeadTime>
- 8001132: 4603 mov r3, r0
- 8001134: 2b00 cmp r3, #0
- 8001136: d001 beq.n 800113c <MX_TIM1_Init+0x108>
- {
- Error_Handler();
- 8001138: f000 ff26 bl 8001f88 <Error_Handler>
- }
- /* USER CODE BEGIN TIM1_Init 2 */
- memcpy(&fanTimerConfigOC, &sConfigOC, sizeof(TIM_OC_InitTypeDef));
- 800113c: 4b0a ldr r3, [pc, #40] @ (8001168 <MX_TIM1_Init+0x134>)
- 800113e: 461d mov r5, r3
- 8001140: f107 0430 add.w r4, r7, #48 @ 0x30
- 8001144: cc0f ldmia r4!, {r0, r1, r2, r3}
- 8001146: c50f stmia r5!, {r0, r1, r2, r3}
- 8001148: e894 0007 ldmia.w r4, {r0, r1, r2}
- 800114c: e885 0007 stmia.w r5, {r0, r1, r2}
- /* USER CODE END TIM1_Init 2 */
- HAL_TIM_MspPostInit(&htim1);
- 8001150: 4803 ldr r0, [pc, #12] @ (8001160 <MX_TIM1_Init+0x12c>)
- 8001152: f002 fd95 bl 8003c80 <HAL_TIM_MspPostInit>
- }
- 8001156: bf00 nop
- 8001158: 3758 adds r7, #88 @ 0x58
- 800115a: 46bd mov sp, r7
- 800115c: bdb0 pop {r4, r5, r7, pc}
- 800115e: bf00 nop
- 8001160: 2400045c .word 0x2400045c
- 8001164: 40010000 .word 0x40010000
- 8001168: 240007c4 .word 0x240007c4
- 0800116c <MX_TIM2_Init>:
- * @brief TIM2 Initialization Function
- * @param None
- * @retval None
- */
- static void MX_TIM2_Init(void)
- {
- 800116c: b580 push {r7, lr}
- 800116e: b08c sub sp, #48 @ 0x30
- 8001170: af00 add r7, sp, #0
- /* USER CODE BEGIN TIM2_Init 0 */
- /* USER CODE END TIM2_Init 0 */
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- 8001172: f107 0320 add.w r3, r7, #32
- 8001176: 2200 movs r2, #0
- 8001178: 601a str r2, [r3, #0]
- 800117a: 605a str r2, [r3, #4]
- 800117c: 609a str r2, [r3, #8]
- 800117e: 60da str r2, [r3, #12]
- TIM_MasterConfigTypeDef sMasterConfig = {0};
- 8001180: f107 0314 add.w r3, r7, #20
- 8001184: 2200 movs r2, #0
- 8001186: 601a str r2, [r3, #0]
- 8001188: 605a str r2, [r3, #4]
- 800118a: 609a str r2, [r3, #8]
- TIM_IC_InitTypeDef sConfigIC = {0};
- 800118c: 1d3b adds r3, r7, #4
- 800118e: 2200 movs r2, #0
- 8001190: 601a str r2, [r3, #0]
- 8001192: 605a str r2, [r3, #4]
- 8001194: 609a str r2, [r3, #8]
- 8001196: 60da str r2, [r3, #12]
- /* USER CODE BEGIN TIM2_Init 1 */
- /* USER CODE END TIM2_Init 1 */
- htim2.Instance = TIM2;
- 8001198: 4b32 ldr r3, [pc, #200] @ (8001264 <MX_TIM2_Init+0xf8>)
- 800119a: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
- 800119e: 601a str r2, [r3, #0]
- htim2.Init.Prescaler = 9999;
- 80011a0: 4b30 ldr r3, [pc, #192] @ (8001264 <MX_TIM2_Init+0xf8>)
- 80011a2: f242 720f movw r2, #9999 @ 0x270f
- 80011a6: 605a str r2, [r3, #4]
- htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
- 80011a8: 4b2e ldr r3, [pc, #184] @ (8001264 <MX_TIM2_Init+0xf8>)
- 80011aa: 2200 movs r2, #0
- 80011ac: 609a str r2, [r3, #8]
- htim2.Init.Period = 2999;
- 80011ae: 4b2d ldr r3, [pc, #180] @ (8001264 <MX_TIM2_Init+0xf8>)
- 80011b0: f640 32b7 movw r2, #2999 @ 0xbb7
- 80011b4: 60da str r2, [r3, #12]
- htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV2;
- 80011b6: 4b2b ldr r3, [pc, #172] @ (8001264 <MX_TIM2_Init+0xf8>)
- 80011b8: f44f 7280 mov.w r2, #256 @ 0x100
- 80011bc: 611a str r2, [r3, #16]
- htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
- 80011be: 4b29 ldr r3, [pc, #164] @ (8001264 <MX_TIM2_Init+0xf8>)
- 80011c0: 2280 movs r2, #128 @ 0x80
- 80011c2: 619a str r2, [r3, #24]
- if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
- 80011c4: 4827 ldr r0, [pc, #156] @ (8001264 <MX_TIM2_Init+0xf8>)
- 80011c6: f00d fcd1 bl 800eb6c <HAL_TIM_Base_Init>
- 80011ca: 4603 mov r3, r0
- 80011cc: 2b00 cmp r3, #0
- 80011ce: d001 beq.n 80011d4 <MX_TIM2_Init+0x68>
- {
- Error_Handler();
- 80011d0: f000 feda bl 8001f88 <Error_Handler>
- }
- sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- 80011d4: f44f 5380 mov.w r3, #4096 @ 0x1000
- 80011d8: 623b str r3, [r7, #32]
- if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
- 80011da: f107 0320 add.w r3, r7, #32
- 80011de: 4619 mov r1, r3
- 80011e0: 4820 ldr r0, [pc, #128] @ (8001264 <MX_TIM2_Init+0xf8>)
- 80011e2: f00e fc69 bl 800fab8 <HAL_TIM_ConfigClockSource>
- 80011e6: 4603 mov r3, r0
- 80011e8: 2b00 cmp r3, #0
- 80011ea: d001 beq.n 80011f0 <MX_TIM2_Init+0x84>
- {
- Error_Handler();
- 80011ec: f000 fecc bl 8001f88 <Error_Handler>
- }
- if (HAL_TIM_IC_Init(&htim2) != HAL_OK)
- 80011f0: 481c ldr r0, [pc, #112] @ (8001264 <MX_TIM2_Init+0xf8>)
- 80011f2: f00d fff7 bl 800f1e4 <HAL_TIM_IC_Init>
- 80011f6: 4603 mov r3, r0
- 80011f8: 2b00 cmp r3, #0
- 80011fa: d001 beq.n 8001200 <MX_TIM2_Init+0x94>
- {
- Error_Handler();
- 80011fc: f000 fec4 bl 8001f88 <Error_Handler>
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
- 8001200: 2320 movs r3, #32
- 8001202: 617b str r3, [r7, #20]
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_ENABLE;
- 8001204: 2380 movs r3, #128 @ 0x80
- 8001206: 61fb str r3, [r7, #28]
- if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
- 8001208: f107 0314 add.w r3, r7, #20
- 800120c: 4619 mov r1, r3
- 800120e: 4815 ldr r0, [pc, #84] @ (8001264 <MX_TIM2_Init+0xf8>)
- 8001210: f00f fb50 bl 80108b4 <HAL_TIMEx_MasterConfigSynchronization>
- 8001214: 4603 mov r3, r0
- 8001216: 2b00 cmp r3, #0
- 8001218: d001 beq.n 800121e <MX_TIM2_Init+0xb2>
- {
- Error_Handler();
- 800121a: f000 feb5 bl 8001f88 <Error_Handler>
- }
- sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
- 800121e: 2300 movs r3, #0
- 8001220: 607b str r3, [r7, #4]
- sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
- 8001222: 2301 movs r3, #1
- 8001224: 60bb str r3, [r7, #8]
- sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
- 8001226: 2300 movs r3, #0
- 8001228: 60fb str r3, [r7, #12]
- sConfigIC.ICFilter = 0;
- 800122a: 2300 movs r3, #0
- 800122c: 613b str r3, [r7, #16]
- if (HAL_TIM_IC_ConfigChannel(&htim2, &sConfigIC, TIM_CHANNEL_3) != HAL_OK)
- 800122e: 1d3b adds r3, r7, #4
- 8001230: 2208 movs r2, #8
- 8001232: 4619 mov r1, r3
- 8001234: 480b ldr r0, [pc, #44] @ (8001264 <MX_TIM2_Init+0xf8>)
- 8001236: f00e fa8e bl 800f756 <HAL_TIM_IC_ConfigChannel>
- 800123a: 4603 mov r3, r0
- 800123c: 2b00 cmp r3, #0
- 800123e: d001 beq.n 8001244 <MX_TIM2_Init+0xd8>
- {
- Error_Handler();
- 8001240: f000 fea2 bl 8001f88 <Error_Handler>
- }
- if (HAL_TIM_IC_ConfigChannel(&htim2, &sConfigIC, TIM_CHANNEL_4) != HAL_OK)
- 8001244: 1d3b adds r3, r7, #4
- 8001246: 220c movs r2, #12
- 8001248: 4619 mov r1, r3
- 800124a: 4806 ldr r0, [pc, #24] @ (8001264 <MX_TIM2_Init+0xf8>)
- 800124c: f00e fa83 bl 800f756 <HAL_TIM_IC_ConfigChannel>
- 8001250: 4603 mov r3, r0
- 8001252: 2b00 cmp r3, #0
- 8001254: d001 beq.n 800125a <MX_TIM2_Init+0xee>
- {
- Error_Handler();
- 8001256: f000 fe97 bl 8001f88 <Error_Handler>
- }
- /* USER CODE BEGIN TIM2_Init 2 */
- /* USER CODE END TIM2_Init 2 */
- }
- 800125a: bf00 nop
- 800125c: 3730 adds r7, #48 @ 0x30
- 800125e: 46bd mov sp, r7
- 8001260: bd80 pop {r7, pc}
- 8001262: bf00 nop
- 8001264: 240004a8 .word 0x240004a8
- 08001268 <MX_TIM3_Init>:
- * @brief TIM3 Initialization Function
- * @param None
- * @retval None
- */
- static void MX_TIM3_Init(void)
- {
- 8001268: b5b0 push {r4, r5, r7, lr}
- 800126a: b08a sub sp, #40 @ 0x28
- 800126c: af00 add r7, sp, #0
- /* USER CODE BEGIN TIM3_Init 0 */
- /* USER CODE END TIM3_Init 0 */
- TIM_MasterConfigTypeDef sMasterConfig = {0};
- 800126e: f107 031c add.w r3, r7, #28
- 8001272: 2200 movs r2, #0
- 8001274: 601a str r2, [r3, #0]
- 8001276: 605a str r2, [r3, #4]
- 8001278: 609a str r2, [r3, #8]
- TIM_OC_InitTypeDef sConfigOC = {0};
- 800127a: 463b mov r3, r7
- 800127c: 2200 movs r2, #0
- 800127e: 601a str r2, [r3, #0]
- 8001280: 605a str r2, [r3, #4]
- 8001282: 609a str r2, [r3, #8]
- 8001284: 60da str r2, [r3, #12]
- 8001286: 611a str r2, [r3, #16]
- 8001288: 615a str r2, [r3, #20]
- 800128a: 619a str r2, [r3, #24]
- /* USER CODE BEGIN TIM3_Init 1 */
- /* USER CODE END TIM3_Init 1 */
- htim3.Instance = TIM3;
- 800128c: 4b48 ldr r3, [pc, #288] @ (80013b0 <MX_TIM3_Init+0x148>)
- 800128e: 4a49 ldr r2, [pc, #292] @ (80013b4 <MX_TIM3_Init+0x14c>)
- 8001290: 601a str r2, [r3, #0]
- htim3.Init.Prescaler = 199;
- 8001292: 4b47 ldr r3, [pc, #284] @ (80013b0 <MX_TIM3_Init+0x148>)
- 8001294: 22c7 movs r2, #199 @ 0xc7
- 8001296: 605a str r2, [r3, #4]
- htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
- 8001298: 4b45 ldr r3, [pc, #276] @ (80013b0 <MX_TIM3_Init+0x148>)
- 800129a: 2200 movs r2, #0
- 800129c: 609a str r2, [r3, #8]
- htim3.Init.Period = 999;
- 800129e: 4b44 ldr r3, [pc, #272] @ (80013b0 <MX_TIM3_Init+0x148>)
- 80012a0: f240 32e7 movw r2, #999 @ 0x3e7
- 80012a4: 60da str r2, [r3, #12]
- htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 80012a6: 4b42 ldr r3, [pc, #264] @ (80013b0 <MX_TIM3_Init+0x148>)
- 80012a8: 2200 movs r2, #0
- 80012aa: 611a str r2, [r3, #16]
- htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
- 80012ac: 4b40 ldr r3, [pc, #256] @ (80013b0 <MX_TIM3_Init+0x148>)
- 80012ae: 2280 movs r2, #128 @ 0x80
- 80012b0: 619a str r2, [r3, #24]
- if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
- 80012b2: 483f ldr r0, [pc, #252] @ (80013b0 <MX_TIM3_Init+0x148>)
- 80012b4: f00d fd9a bl 800edec <HAL_TIM_PWM_Init>
- 80012b8: 4603 mov r3, r0
- 80012ba: 2b00 cmp r3, #0
- 80012bc: d001 beq.n 80012c2 <MX_TIM3_Init+0x5a>
- {
- Error_Handler();
- 80012be: f000 fe63 bl 8001f88 <Error_Handler>
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 80012c2: 2300 movs r3, #0
- 80012c4: 61fb str r3, [r7, #28]
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 80012c6: 2300 movs r3, #0
- 80012c8: 627b str r3, [r7, #36] @ 0x24
- if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
- 80012ca: f107 031c add.w r3, r7, #28
- 80012ce: 4619 mov r1, r3
- 80012d0: 4837 ldr r0, [pc, #220] @ (80013b0 <MX_TIM3_Init+0x148>)
- 80012d2: f00f faef bl 80108b4 <HAL_TIMEx_MasterConfigSynchronization>
- 80012d6: 4603 mov r3, r0
- 80012d8: 2b00 cmp r3, #0
- 80012da: d001 beq.n 80012e0 <MX_TIM3_Init+0x78>
- {
- Error_Handler();
- 80012dc: f000 fe54 bl 8001f88 <Error_Handler>
- }
- sConfigOC.OCMode = TIM_OCMODE_COMBINED_PWM1;
- 80012e0: 4b35 ldr r3, [pc, #212] @ (80013b8 <MX_TIM3_Init+0x150>)
- 80012e2: 603b str r3, [r7, #0]
- sConfigOC.Pulse = 500;
- 80012e4: f44f 73fa mov.w r3, #500 @ 0x1f4
- 80012e8: 607b str r3, [r7, #4]
- sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 80012ea: 2300 movs r3, #0
- 80012ec: 60bb str r3, [r7, #8]
- sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 80012ee: 2300 movs r3, #0
- 80012f0: 613b str r3, [r7, #16]
- if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
- 80012f2: 463b mov r3, r7
- 80012f4: 2200 movs r2, #0
- 80012f6: 4619 mov r1, r3
- 80012f8: 482d ldr r0, [pc, #180] @ (80013b0 <MX_TIM3_Init+0x148>)
- 80012fa: f00e fac9 bl 800f890 <HAL_TIM_PWM_ConfigChannel>
- 80012fe: 4603 mov r3, r0
- 8001300: 2b00 cmp r3, #0
- 8001302: d001 beq.n 8001308 <MX_TIM3_Init+0xa0>
- {
- Error_Handler();
- 8001304: f000 fe40 bl 8001f88 <Error_Handler>
- }
- __HAL_TIM_DISABLE_OCxPRELOAD(&htim3, TIM_CHANNEL_1);
- 8001308: 4b29 ldr r3, [pc, #164] @ (80013b0 <MX_TIM3_Init+0x148>)
- 800130a: 681b ldr r3, [r3, #0]
- 800130c: 699a ldr r2, [r3, #24]
- 800130e: 4b28 ldr r3, [pc, #160] @ (80013b0 <MX_TIM3_Init+0x148>)
- 8001310: 681b ldr r3, [r3, #0]
- 8001312: f022 0208 bic.w r2, r2, #8
- 8001316: 619a str r2, [r3, #24]
- sConfigOC.OCMode = TIM_OCMODE_PWM1;
- 8001318: 2360 movs r3, #96 @ 0x60
- 800131a: 603b str r3, [r7, #0]
- if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
- 800131c: 463b mov r3, r7
- 800131e: 2204 movs r2, #4
- 8001320: 4619 mov r1, r3
- 8001322: 4823 ldr r0, [pc, #140] @ (80013b0 <MX_TIM3_Init+0x148>)
- 8001324: f00e fab4 bl 800f890 <HAL_TIM_PWM_ConfigChannel>
- 8001328: 4603 mov r3, r0
- 800132a: 2b00 cmp r3, #0
- 800132c: d001 beq.n 8001332 <MX_TIM3_Init+0xca>
- {
- Error_Handler();
- 800132e: f000 fe2b bl 8001f88 <Error_Handler>
- }
- __HAL_TIM_DISABLE_OCxPRELOAD(&htim3, TIM_CHANNEL_2);
- 8001332: 4b1f ldr r3, [pc, #124] @ (80013b0 <MX_TIM3_Init+0x148>)
- 8001334: 681b ldr r3, [r3, #0]
- 8001336: 699a ldr r2, [r3, #24]
- 8001338: 4b1d ldr r3, [pc, #116] @ (80013b0 <MX_TIM3_Init+0x148>)
- 800133a: 681b ldr r3, [r3, #0]
- 800133c: f422 6200 bic.w r2, r2, #2048 @ 0x800
- 8001340: 619a str r2, [r3, #24]
- if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
- 8001342: 463b mov r3, r7
- 8001344: 2208 movs r2, #8
- 8001346: 4619 mov r1, r3
- 8001348: 4819 ldr r0, [pc, #100] @ (80013b0 <MX_TIM3_Init+0x148>)
- 800134a: f00e faa1 bl 800f890 <HAL_TIM_PWM_ConfigChannel>
- 800134e: 4603 mov r3, r0
- 8001350: 2b00 cmp r3, #0
- 8001352: d001 beq.n 8001358 <MX_TIM3_Init+0xf0>
- {
- Error_Handler();
- 8001354: f000 fe18 bl 8001f88 <Error_Handler>
- }
- __HAL_TIM_DISABLE_OCxPRELOAD(&htim3, TIM_CHANNEL_3);
- 8001358: 4b15 ldr r3, [pc, #84] @ (80013b0 <MX_TIM3_Init+0x148>)
- 800135a: 681b ldr r3, [r3, #0]
- 800135c: 69da ldr r2, [r3, #28]
- 800135e: 4b14 ldr r3, [pc, #80] @ (80013b0 <MX_TIM3_Init+0x148>)
- 8001360: 681b ldr r3, [r3, #0]
- 8001362: f022 0208 bic.w r2, r2, #8
- 8001366: 61da str r2, [r3, #28]
- if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
- 8001368: 463b mov r3, r7
- 800136a: 220c movs r2, #12
- 800136c: 4619 mov r1, r3
- 800136e: 4810 ldr r0, [pc, #64] @ (80013b0 <MX_TIM3_Init+0x148>)
- 8001370: f00e fa8e bl 800f890 <HAL_TIM_PWM_ConfigChannel>
- 8001374: 4603 mov r3, r0
- 8001376: 2b00 cmp r3, #0
- 8001378: d001 beq.n 800137e <MX_TIM3_Init+0x116>
- {
- Error_Handler();
- 800137a: f000 fe05 bl 8001f88 <Error_Handler>
- }
- __HAL_TIM_DISABLE_OCxPRELOAD(&htim3, TIM_CHANNEL_4);
- 800137e: 4b0c ldr r3, [pc, #48] @ (80013b0 <MX_TIM3_Init+0x148>)
- 8001380: 681b ldr r3, [r3, #0]
- 8001382: 69da ldr r2, [r3, #28]
- 8001384: 4b0a ldr r3, [pc, #40] @ (80013b0 <MX_TIM3_Init+0x148>)
- 8001386: 681b ldr r3, [r3, #0]
- 8001388: f422 6200 bic.w r2, r2, #2048 @ 0x800
- 800138c: 61da str r2, [r3, #28]
- /* USER CODE BEGIN TIM3_Init 2 */
- memcpy(&motorXYTimerConfigOC, &sConfigOC, sizeof(TIM_OC_InitTypeDef));
- 800138e: 4b0b ldr r3, [pc, #44] @ (80013bc <MX_TIM3_Init+0x154>)
- 8001390: 461d mov r5, r3
- 8001392: 463c mov r4, r7
- 8001394: cc0f ldmia r4!, {r0, r1, r2, r3}
- 8001396: c50f stmia r5!, {r0, r1, r2, r3}
- 8001398: e894 0007 ldmia.w r4, {r0, r1, r2}
- 800139c: e885 0007 stmia.w r5, {r0, r1, r2}
- /* USER CODE END TIM3_Init 2 */
- HAL_TIM_MspPostInit(&htim3);
- 80013a0: 4803 ldr r0, [pc, #12] @ (80013b0 <MX_TIM3_Init+0x148>)
- 80013a2: f002 fc6d bl 8003c80 <HAL_TIM_MspPostInit>
- }
- 80013a6: bf00 nop
- 80013a8: 3728 adds r7, #40 @ 0x28
- 80013aa: 46bd mov sp, r7
- 80013ac: bdb0 pop {r4, r5, r7, pc}
- 80013ae: bf00 nop
- 80013b0: 240004f4 .word 0x240004f4
- 80013b4: 40000400 .word 0x40000400
- 80013b8: 00010040 .word 0x00010040
- 80013bc: 240007e0 .word 0x240007e0
- 080013c0 <MX_TIM4_Init>:
- * @brief TIM4 Initialization Function
- * @param None
- * @retval None
- */
- static void MX_TIM4_Init(void)
- {
- 80013c0: b580 push {r7, lr}
- 80013c2: b08c sub sp, #48 @ 0x30
- 80013c4: af00 add r7, sp, #0
- /* USER CODE BEGIN TIM4_Init 0 */
- /* USER CODE END TIM4_Init 0 */
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- 80013c6: f107 0320 add.w r3, r7, #32
- 80013ca: 2200 movs r2, #0
- 80013cc: 601a str r2, [r3, #0]
- 80013ce: 605a str r2, [r3, #4]
- 80013d0: 609a str r2, [r3, #8]
- 80013d2: 60da str r2, [r3, #12]
- TIM_MasterConfigTypeDef sMasterConfig = {0};
- 80013d4: f107 0314 add.w r3, r7, #20
- 80013d8: 2200 movs r2, #0
- 80013da: 601a str r2, [r3, #0]
- 80013dc: 605a str r2, [r3, #4]
- 80013de: 609a str r2, [r3, #8]
- TIM_IC_InitTypeDef sConfigIC = {0};
- 80013e0: 1d3b adds r3, r7, #4
- 80013e2: 2200 movs r2, #0
- 80013e4: 601a str r2, [r3, #0]
- 80013e6: 605a str r2, [r3, #4]
- 80013e8: 609a str r2, [r3, #8]
- 80013ea: 60da str r2, [r3, #12]
- /* USER CODE BEGIN TIM4_Init 1 */
- /* USER CODE END TIM4_Init 1 */
- htim4.Instance = TIM4;
- 80013ec: 4b31 ldr r3, [pc, #196] @ (80014b4 <MX_TIM4_Init+0xf4>)
- 80013ee: 4a32 ldr r2, [pc, #200] @ (80014b8 <MX_TIM4_Init+0xf8>)
- 80013f0: 601a str r2, [r3, #0]
- htim4.Init.Prescaler = 9999;
- 80013f2: 4b30 ldr r3, [pc, #192] @ (80014b4 <MX_TIM4_Init+0xf4>)
- 80013f4: f242 720f movw r2, #9999 @ 0x270f
- 80013f8: 605a str r2, [r3, #4]
- htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
- 80013fa: 4b2e ldr r3, [pc, #184] @ (80014b4 <MX_TIM4_Init+0xf4>)
- 80013fc: 2200 movs r2, #0
- 80013fe: 609a str r2, [r3, #8]
- htim4.Init.Period = 2999;
- 8001400: 4b2c ldr r3, [pc, #176] @ (80014b4 <MX_TIM4_Init+0xf4>)
- 8001402: f640 32b7 movw r2, #2999 @ 0xbb7
- 8001406: 60da str r2, [r3, #12]
- htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV2;
- 8001408: 4b2a ldr r3, [pc, #168] @ (80014b4 <MX_TIM4_Init+0xf4>)
- 800140a: f44f 7280 mov.w r2, #256 @ 0x100
- 800140e: 611a str r2, [r3, #16]
- htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
- 8001410: 4b28 ldr r3, [pc, #160] @ (80014b4 <MX_TIM4_Init+0xf4>)
- 8001412: 2280 movs r2, #128 @ 0x80
- 8001414: 619a str r2, [r3, #24]
- if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
- 8001416: 4827 ldr r0, [pc, #156] @ (80014b4 <MX_TIM4_Init+0xf4>)
- 8001418: f00d fba8 bl 800eb6c <HAL_TIM_Base_Init>
- 800141c: 4603 mov r3, r0
- 800141e: 2b00 cmp r3, #0
- 8001420: d001 beq.n 8001426 <MX_TIM4_Init+0x66>
- {
- Error_Handler();
- 8001422: f000 fdb1 bl 8001f88 <Error_Handler>
- }
- sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- 8001426: f44f 5380 mov.w r3, #4096 @ 0x1000
- 800142a: 623b str r3, [r7, #32]
- if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
- 800142c: f107 0320 add.w r3, r7, #32
- 8001430: 4619 mov r1, r3
- 8001432: 4820 ldr r0, [pc, #128] @ (80014b4 <MX_TIM4_Init+0xf4>)
- 8001434: f00e fb40 bl 800fab8 <HAL_TIM_ConfigClockSource>
- 8001438: 4603 mov r3, r0
- 800143a: 2b00 cmp r3, #0
- 800143c: d001 beq.n 8001442 <MX_TIM4_Init+0x82>
- {
- Error_Handler();
- 800143e: f000 fda3 bl 8001f88 <Error_Handler>
- }
- if (HAL_TIM_IC_Init(&htim4) != HAL_OK)
- 8001442: 481c ldr r0, [pc, #112] @ (80014b4 <MX_TIM4_Init+0xf4>)
- 8001444: f00d fece bl 800f1e4 <HAL_TIM_IC_Init>
- 8001448: 4603 mov r3, r0
- 800144a: 2b00 cmp r3, #0
- 800144c: d001 beq.n 8001452 <MX_TIM4_Init+0x92>
- {
- Error_Handler();
- 800144e: f000 fd9b bl 8001f88 <Error_Handler>
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 8001452: 2300 movs r3, #0
- 8001454: 617b str r3, [r7, #20]
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 8001456: 2300 movs r3, #0
- 8001458: 61fb str r3, [r7, #28]
- if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
- 800145a: f107 0314 add.w r3, r7, #20
- 800145e: 4619 mov r1, r3
- 8001460: 4814 ldr r0, [pc, #80] @ (80014b4 <MX_TIM4_Init+0xf4>)
- 8001462: f00f fa27 bl 80108b4 <HAL_TIMEx_MasterConfigSynchronization>
- 8001466: 4603 mov r3, r0
- 8001468: 2b00 cmp r3, #0
- 800146a: d001 beq.n 8001470 <MX_TIM4_Init+0xb0>
- {
- Error_Handler();
- 800146c: f000 fd8c bl 8001f88 <Error_Handler>
- }
- sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
- 8001470: 2300 movs r3, #0
- 8001472: 607b str r3, [r7, #4]
- sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
- 8001474: 2301 movs r3, #1
- 8001476: 60bb str r3, [r7, #8]
- sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
- 8001478: 2300 movs r3, #0
- 800147a: 60fb str r3, [r7, #12]
- sConfigIC.ICFilter = 0;
- 800147c: 2300 movs r3, #0
- 800147e: 613b str r3, [r7, #16]
- if (HAL_TIM_IC_ConfigChannel(&htim4, &sConfigIC, TIM_CHANNEL_3) != HAL_OK)
- 8001480: 1d3b adds r3, r7, #4
- 8001482: 2208 movs r2, #8
- 8001484: 4619 mov r1, r3
- 8001486: 480b ldr r0, [pc, #44] @ (80014b4 <MX_TIM4_Init+0xf4>)
- 8001488: f00e f965 bl 800f756 <HAL_TIM_IC_ConfigChannel>
- 800148c: 4603 mov r3, r0
- 800148e: 2b00 cmp r3, #0
- 8001490: d001 beq.n 8001496 <MX_TIM4_Init+0xd6>
- {
- Error_Handler();
- 8001492: f000 fd79 bl 8001f88 <Error_Handler>
- }
- if (HAL_TIM_IC_ConfigChannel(&htim4, &sConfigIC, TIM_CHANNEL_4) != HAL_OK)
- 8001496: 1d3b adds r3, r7, #4
- 8001498: 220c movs r2, #12
- 800149a: 4619 mov r1, r3
- 800149c: 4805 ldr r0, [pc, #20] @ (80014b4 <MX_TIM4_Init+0xf4>)
- 800149e: f00e f95a bl 800f756 <HAL_TIM_IC_ConfigChannel>
- 80014a2: 4603 mov r3, r0
- 80014a4: 2b00 cmp r3, #0
- 80014a6: d001 beq.n 80014ac <MX_TIM4_Init+0xec>
- {
- Error_Handler();
- 80014a8: f000 fd6e bl 8001f88 <Error_Handler>
- }
- /* USER CODE BEGIN TIM4_Init 2 */
- /* USER CODE END TIM4_Init 2 */
- }
- 80014ac: bf00 nop
- 80014ae: 3730 adds r7, #48 @ 0x30
- 80014b0: 46bd mov sp, r7
- 80014b2: bd80 pop {r7, pc}
- 80014b4: 24000540 .word 0x24000540
- 80014b8: 40000800 .word 0x40000800
- 080014bc <MX_TIM8_Init>:
- * @brief TIM8 Initialization Function
- * @param None
- * @retval None
- */
- static void MX_TIM8_Init(void)
- {
- 80014bc: b580 push {r7, lr}
- 80014be: b088 sub sp, #32
- 80014c0: af00 add r7, sp, #0
- /* USER CODE BEGIN TIM8_Init 0 */
- /* USER CODE END TIM8_Init 0 */
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- 80014c2: f107 0310 add.w r3, r7, #16
- 80014c6: 2200 movs r2, #0
- 80014c8: 601a str r2, [r3, #0]
- 80014ca: 605a str r2, [r3, #4]
- 80014cc: 609a str r2, [r3, #8]
- 80014ce: 60da str r2, [r3, #12]
- TIM_MasterConfigTypeDef sMasterConfig = {0};
- 80014d0: 1d3b adds r3, r7, #4
- 80014d2: 2200 movs r2, #0
- 80014d4: 601a str r2, [r3, #0]
- 80014d6: 605a str r2, [r3, #4]
- 80014d8: 609a str r2, [r3, #8]
- /* USER CODE BEGIN TIM8_Init 1 */
- /* USER CODE END TIM8_Init 1 */
- htim8.Instance = TIM8;
- 80014da: 4b21 ldr r3, [pc, #132] @ (8001560 <MX_TIM8_Init+0xa4>)
- 80014dc: 4a21 ldr r2, [pc, #132] @ (8001564 <MX_TIM8_Init+0xa8>)
- 80014de: 601a str r2, [r3, #0]
- htim8.Init.Prescaler = 9999;
- 80014e0: 4b1f ldr r3, [pc, #124] @ (8001560 <MX_TIM8_Init+0xa4>)
- 80014e2: f242 720f movw r2, #9999 @ 0x270f
- 80014e6: 605a str r2, [r3, #4]
- htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
- 80014e8: 4b1d ldr r3, [pc, #116] @ (8001560 <MX_TIM8_Init+0xa4>)
- 80014ea: 2200 movs r2, #0
- 80014ec: 609a str r2, [r3, #8]
- htim8.Init.Period = 999;
- 80014ee: 4b1c ldr r3, [pc, #112] @ (8001560 <MX_TIM8_Init+0xa4>)
- 80014f0: f240 32e7 movw r2, #999 @ 0x3e7
- 80014f4: 60da str r2, [r3, #12]
- htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV2;
- 80014f6: 4b1a ldr r3, [pc, #104] @ (8001560 <MX_TIM8_Init+0xa4>)
- 80014f8: f44f 7280 mov.w r2, #256 @ 0x100
- 80014fc: 611a str r2, [r3, #16]
- htim8.Init.RepetitionCounter = 0;
- 80014fe: 4b18 ldr r3, [pc, #96] @ (8001560 <MX_TIM8_Init+0xa4>)
- 8001500: 2200 movs r2, #0
- 8001502: 615a str r2, [r3, #20]
- htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
- 8001504: 4b16 ldr r3, [pc, #88] @ (8001560 <MX_TIM8_Init+0xa4>)
- 8001506: 2280 movs r2, #128 @ 0x80
- 8001508: 619a str r2, [r3, #24]
- if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
- 800150a: 4815 ldr r0, [pc, #84] @ (8001560 <MX_TIM8_Init+0xa4>)
- 800150c: f00d fb2e bl 800eb6c <HAL_TIM_Base_Init>
- 8001510: 4603 mov r3, r0
- 8001512: 2b00 cmp r3, #0
- 8001514: d001 beq.n 800151a <MX_TIM8_Init+0x5e>
- {
- Error_Handler();
- 8001516: f000 fd37 bl 8001f88 <Error_Handler>
- }
- sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- 800151a: f44f 5380 mov.w r3, #4096 @ 0x1000
- 800151e: 613b str r3, [r7, #16]
- if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
- 8001520: f107 0310 add.w r3, r7, #16
- 8001524: 4619 mov r1, r3
- 8001526: 480e ldr r0, [pc, #56] @ (8001560 <MX_TIM8_Init+0xa4>)
- 8001528: f00e fac6 bl 800fab8 <HAL_TIM_ConfigClockSource>
- 800152c: 4603 mov r3, r0
- 800152e: 2b00 cmp r3, #0
- 8001530: d001 beq.n 8001536 <MX_TIM8_Init+0x7a>
- {
- Error_Handler();
- 8001532: f000 fd29 bl 8001f88 <Error_Handler>
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
- 8001536: 2320 movs r3, #32
- 8001538: 607b str r3, [r7, #4]
- sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
- 800153a: 2300 movs r3, #0
- 800153c: 60bb str r3, [r7, #8]
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_ENABLE;
- 800153e: 2380 movs r3, #128 @ 0x80
- 8001540: 60fb str r3, [r7, #12]
- if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
- 8001542: 1d3b adds r3, r7, #4
- 8001544: 4619 mov r1, r3
- 8001546: 4806 ldr r0, [pc, #24] @ (8001560 <MX_TIM8_Init+0xa4>)
- 8001548: f00f f9b4 bl 80108b4 <HAL_TIMEx_MasterConfigSynchronization>
- 800154c: 4603 mov r3, r0
- 800154e: 2b00 cmp r3, #0
- 8001550: d001 beq.n 8001556 <MX_TIM8_Init+0x9a>
- {
- Error_Handler();
- 8001552: f000 fd19 bl 8001f88 <Error_Handler>
- }
- /* USER CODE BEGIN TIM8_Init 2 */
- /* USER CODE END TIM8_Init 2 */
- }
- 8001556: bf00 nop
- 8001558: 3720 adds r7, #32
- 800155a: 46bd mov sp, r7
- 800155c: bd80 pop {r7, pc}
- 800155e: bf00 nop
- 8001560: 2400058c .word 0x2400058c
- 8001564: 40010400 .word 0x40010400
- 08001568 <MX_UART8_Init>:
- * @brief UART8 Initialization Function
- * @param None
- * @retval None
- */
- static void MX_UART8_Init(void)
- {
- 8001568: b580 push {r7, lr}
- 800156a: af00 add r7, sp, #0
- /* USER CODE END UART8_Init 0 */
- /* USER CODE BEGIN UART8_Init 1 */
- /* USER CODE END UART8_Init 1 */
- huart8.Instance = UART8;
- 800156c: 4b22 ldr r3, [pc, #136] @ (80015f8 <MX_UART8_Init+0x90>)
- 800156e: 4a23 ldr r2, [pc, #140] @ (80015fc <MX_UART8_Init+0x94>)
- 8001570: 601a str r2, [r3, #0]
- huart8.Init.BaudRate = 115200;
- 8001572: 4b21 ldr r3, [pc, #132] @ (80015f8 <MX_UART8_Init+0x90>)
- 8001574: f44f 32e1 mov.w r2, #115200 @ 0x1c200
- 8001578: 605a str r2, [r3, #4]
- huart8.Init.WordLength = UART_WORDLENGTH_8B;
- 800157a: 4b1f ldr r3, [pc, #124] @ (80015f8 <MX_UART8_Init+0x90>)
- 800157c: 2200 movs r2, #0
- 800157e: 609a str r2, [r3, #8]
- huart8.Init.StopBits = UART_STOPBITS_1;
- 8001580: 4b1d ldr r3, [pc, #116] @ (80015f8 <MX_UART8_Init+0x90>)
- 8001582: 2200 movs r2, #0
- 8001584: 60da str r2, [r3, #12]
- huart8.Init.Parity = UART_PARITY_NONE;
- 8001586: 4b1c ldr r3, [pc, #112] @ (80015f8 <MX_UART8_Init+0x90>)
- 8001588: 2200 movs r2, #0
- 800158a: 611a str r2, [r3, #16]
- huart8.Init.Mode = UART_MODE_TX_RX;
- 800158c: 4b1a ldr r3, [pc, #104] @ (80015f8 <MX_UART8_Init+0x90>)
- 800158e: 220c movs r2, #12
- 8001590: 615a str r2, [r3, #20]
- huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 8001592: 4b19 ldr r3, [pc, #100] @ (80015f8 <MX_UART8_Init+0x90>)
- 8001594: 2200 movs r2, #0
- 8001596: 619a str r2, [r3, #24]
- huart8.Init.OverSampling = UART_OVERSAMPLING_16;
- 8001598: 4b17 ldr r3, [pc, #92] @ (80015f8 <MX_UART8_Init+0x90>)
- 800159a: 2200 movs r2, #0
- 800159c: 61da str r2, [r3, #28]
- huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 800159e: 4b16 ldr r3, [pc, #88] @ (80015f8 <MX_UART8_Init+0x90>)
- 80015a0: 2200 movs r2, #0
- 80015a2: 621a str r2, [r3, #32]
- huart8.Init.ClockPrescaler = UART_PRESCALER_DIV1;
- 80015a4: 4b14 ldr r3, [pc, #80] @ (80015f8 <MX_UART8_Init+0x90>)
- 80015a6: 2200 movs r2, #0
- 80015a8: 625a str r2, [r3, #36] @ 0x24
- huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- 80015aa: 4b13 ldr r3, [pc, #76] @ (80015f8 <MX_UART8_Init+0x90>)
- 80015ac: 2200 movs r2, #0
- 80015ae: 629a str r2, [r3, #40] @ 0x28
- if (HAL_UART_Init(&huart8) != HAL_OK)
- 80015b0: 4811 ldr r0, [pc, #68] @ (80015f8 <MX_UART8_Init+0x90>)
- 80015b2: f00f faa9 bl 8010b08 <HAL_UART_Init>
- 80015b6: 4603 mov r3, r0
- 80015b8: 2b00 cmp r3, #0
- 80015ba: d001 beq.n 80015c0 <MX_UART8_Init+0x58>
- {
- Error_Handler();
- 80015bc: f000 fce4 bl 8001f88 <Error_Handler>
- }
- if (HAL_UARTEx_SetTxFifoThreshold(&huart8, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
- 80015c0: 2100 movs r1, #0
- 80015c2: 480d ldr r0, [pc, #52] @ (80015f8 <MX_UART8_Init+0x90>)
- 80015c4: f011 ffd7 bl 8013576 <HAL_UARTEx_SetTxFifoThreshold>
- 80015c8: 4603 mov r3, r0
- 80015ca: 2b00 cmp r3, #0
- 80015cc: d001 beq.n 80015d2 <MX_UART8_Init+0x6a>
- {
- Error_Handler();
- 80015ce: f000 fcdb bl 8001f88 <Error_Handler>
- }
- if (HAL_UARTEx_SetRxFifoThreshold(&huart8, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
- 80015d2: 2100 movs r1, #0
- 80015d4: 4808 ldr r0, [pc, #32] @ (80015f8 <MX_UART8_Init+0x90>)
- 80015d6: f012 f80c bl 80135f2 <HAL_UARTEx_SetRxFifoThreshold>
- 80015da: 4603 mov r3, r0
- 80015dc: 2b00 cmp r3, #0
- 80015de: d001 beq.n 80015e4 <MX_UART8_Init+0x7c>
- {
- Error_Handler();
- 80015e0: f000 fcd2 bl 8001f88 <Error_Handler>
- }
- if (HAL_UARTEx_DisableFifoMode(&huart8) != HAL_OK)
- 80015e4: 4804 ldr r0, [pc, #16] @ (80015f8 <MX_UART8_Init+0x90>)
- 80015e6: f011 ff8d bl 8013504 <HAL_UARTEx_DisableFifoMode>
- 80015ea: 4603 mov r3, r0
- 80015ec: 2b00 cmp r3, #0
- 80015ee: d001 beq.n 80015f4 <MX_UART8_Init+0x8c>
- {
- Error_Handler();
- 80015f0: f000 fcca bl 8001f88 <Error_Handler>
- }
- /* USER CODE BEGIN UART8_Init 2 */
- /* USER CODE END UART8_Init 2 */
- }
- 80015f4: bf00 nop
- 80015f6: bd80 pop {r7, pc}
- 80015f8: 240005d8 .word 0x240005d8
- 80015fc: 40007c00 .word 0x40007c00
- 08001600 <MX_USART1_UART_Init>:
- * @brief USART1 Initialization Function
- * @param None
- * @retval None
- */
- static void MX_USART1_UART_Init(void)
- {
- 8001600: b580 push {r7, lr}
- 8001602: af00 add r7, sp, #0
- /* USER CODE END USART1_Init 0 */
- /* USER CODE BEGIN USART1_Init 1 */
- /* USER CODE END USART1_Init 1 */
- huart1.Instance = USART1;
- 8001604: 4b24 ldr r3, [pc, #144] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 8001606: 4a25 ldr r2, [pc, #148] @ (800169c <MX_USART1_UART_Init+0x9c>)
- 8001608: 601a str r2, [r3, #0]
- huart1.Init.BaudRate = 115200;
- 800160a: 4b23 ldr r3, [pc, #140] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 800160c: f44f 32e1 mov.w r2, #115200 @ 0x1c200
- 8001610: 605a str r2, [r3, #4]
- huart1.Init.WordLength = UART_WORDLENGTH_8B;
- 8001612: 4b21 ldr r3, [pc, #132] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 8001614: 2200 movs r2, #0
- 8001616: 609a str r2, [r3, #8]
- huart1.Init.StopBits = UART_STOPBITS_1;
- 8001618: 4b1f ldr r3, [pc, #124] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 800161a: 2200 movs r2, #0
- 800161c: 60da str r2, [r3, #12]
- huart1.Init.Parity = UART_PARITY_NONE;
- 800161e: 4b1e ldr r3, [pc, #120] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 8001620: 2200 movs r2, #0
- 8001622: 611a str r2, [r3, #16]
- huart1.Init.Mode = UART_MODE_TX_RX;
- 8001624: 4b1c ldr r3, [pc, #112] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 8001626: 220c movs r2, #12
- 8001628: 615a str r2, [r3, #20]
- huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 800162a: 4b1b ldr r3, [pc, #108] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 800162c: 2200 movs r2, #0
- 800162e: 619a str r2, [r3, #24]
- huart1.Init.OverSampling = UART_OVERSAMPLING_16;
- 8001630: 4b19 ldr r3, [pc, #100] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 8001632: 2200 movs r2, #0
- 8001634: 61da str r2, [r3, #28]
- huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 8001636: 4b18 ldr r3, [pc, #96] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 8001638: 2200 movs r2, #0
- 800163a: 621a str r2, [r3, #32]
- huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
- 800163c: 4b16 ldr r3, [pc, #88] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 800163e: 2200 movs r2, #0
- 8001640: 625a str r2, [r3, #36] @ 0x24
- huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
- 8001642: 4b15 ldr r3, [pc, #84] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 8001644: 2201 movs r2, #1
- 8001646: 629a str r2, [r3, #40] @ 0x28
- huart1.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
- 8001648: 4b13 ldr r3, [pc, #76] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 800164a: f44f 3200 mov.w r2, #131072 @ 0x20000
- 800164e: 62da str r2, [r3, #44] @ 0x2c
- if (HAL_UART_Init(&huart1) != HAL_OK)
- 8001650: 4811 ldr r0, [pc, #68] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 8001652: f00f fa59 bl 8010b08 <HAL_UART_Init>
- 8001656: 4603 mov r3, r0
- 8001658: 2b00 cmp r3, #0
- 800165a: d001 beq.n 8001660 <MX_USART1_UART_Init+0x60>
- {
- Error_Handler();
- 800165c: f000 fc94 bl 8001f88 <Error_Handler>
- }
- if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
- 8001660: 2100 movs r1, #0
- 8001662: 480d ldr r0, [pc, #52] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 8001664: f011 ff87 bl 8013576 <HAL_UARTEx_SetTxFifoThreshold>
- 8001668: 4603 mov r3, r0
- 800166a: 2b00 cmp r3, #0
- 800166c: d001 beq.n 8001672 <MX_USART1_UART_Init+0x72>
- {
- Error_Handler();
- 800166e: f000 fc8b bl 8001f88 <Error_Handler>
- }
- if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
- 8001672: 2100 movs r1, #0
- 8001674: 4808 ldr r0, [pc, #32] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 8001676: f011 ffbc bl 80135f2 <HAL_UARTEx_SetRxFifoThreshold>
- 800167a: 4603 mov r3, r0
- 800167c: 2b00 cmp r3, #0
- 800167e: d001 beq.n 8001684 <MX_USART1_UART_Init+0x84>
- {
- Error_Handler();
- 8001680: f000 fc82 bl 8001f88 <Error_Handler>
- }
- if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
- 8001684: 4804 ldr r0, [pc, #16] @ (8001698 <MX_USART1_UART_Init+0x98>)
- 8001686: f011 ff3d bl 8013504 <HAL_UARTEx_DisableFifoMode>
- 800168a: 4603 mov r3, r0
- 800168c: 2b00 cmp r3, #0
- 800168e: d001 beq.n 8001694 <MX_USART1_UART_Init+0x94>
- {
- Error_Handler();
- 8001690: f000 fc7a bl 8001f88 <Error_Handler>
- }
- /* USER CODE BEGIN USART1_Init 2 */
- /* USER CODE END USART1_Init 2 */
- }
- 8001694: bf00 nop
- 8001696: bd80 pop {r7, pc}
- 8001698: 2400066c .word 0x2400066c
- 800169c: 40011000 .word 0x40011000
- 080016a0 <MX_DMA_Init>:
- /**
- * Enable DMA controller clock
- */
- static void MX_DMA_Init(void)
- {
- 80016a0: b580 push {r7, lr}
- 80016a2: b082 sub sp, #8
- 80016a4: af00 add r7, sp, #0
- /* DMA controller clock enable */
- __HAL_RCC_DMA1_CLK_ENABLE();
- 80016a6: 4b15 ldr r3, [pc, #84] @ (80016fc <MX_DMA_Init+0x5c>)
- 80016a8: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8
- 80016ac: 4a13 ldr r2, [pc, #76] @ (80016fc <MX_DMA_Init+0x5c>)
- 80016ae: f043 0301 orr.w r3, r3, #1
- 80016b2: f8c2 30d8 str.w r3, [r2, #216] @ 0xd8
- 80016b6: 4b11 ldr r3, [pc, #68] @ (80016fc <MX_DMA_Init+0x5c>)
- 80016b8: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8
- 80016bc: f003 0301 and.w r3, r3, #1
- 80016c0: 607b str r3, [r7, #4]
- 80016c2: 687b ldr r3, [r7, #4]
- /* DMA interrupt init */
- /* DMA1_Stream0_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 5, 0);
- 80016c4: 2200 movs r2, #0
- 80016c6: 2105 movs r1, #5
- 80016c8: 200b movs r0, #11
- 80016ca: f005 fdf3 bl 80072b4 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
- 80016ce: 200b movs r0, #11
- 80016d0: f005 fe0a bl 80072e8 <HAL_NVIC_EnableIRQ>
- /* DMA1_Stream1_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0);
- 80016d4: 2200 movs r2, #0
- 80016d6: 2105 movs r1, #5
- 80016d8: 200c movs r0, #12
- 80016da: f005 fdeb bl 80072b4 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
- 80016de: 200c movs r0, #12
- 80016e0: f005 fe02 bl 80072e8 <HAL_NVIC_EnableIRQ>
- /* DMA1_Stream2_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 5, 0);
- 80016e4: 2200 movs r2, #0
- 80016e6: 2105 movs r1, #5
- 80016e8: 200d movs r0, #13
- 80016ea: f005 fde3 bl 80072b4 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
- 80016ee: 200d movs r0, #13
- 80016f0: f005 fdfa bl 80072e8 <HAL_NVIC_EnableIRQ>
- }
- 80016f4: bf00 nop
- 80016f6: 3708 adds r7, #8
- 80016f8: 46bd mov sp, r7
- 80016fa: bd80 pop {r7, pc}
- 80016fc: 58024400 .word 0x58024400
- 08001700 <MX_GPIO_Init>:
- * @brief GPIO Initialization Function
- * @param None
- * @retval None
- */
- static void MX_GPIO_Init(void)
- {
- 8001700: b580 push {r7, lr}
- 8001702: b08c sub sp, #48 @ 0x30
- 8001704: af00 add r7, sp, #0
- GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8001706: f107 031c add.w r3, r7, #28
- 800170a: 2200 movs r2, #0
- 800170c: 601a str r2, [r3, #0]
- 800170e: 605a str r2, [r3, #4]
- 8001710: 609a str r2, [r3, #8]
- 8001712: 60da str r2, [r3, #12]
- 8001714: 611a str r2, [r3, #16]
- /* USER CODE BEGIN MX_GPIO_Init_1 */
- /* USER CODE END MX_GPIO_Init_1 */
- /* GPIO Ports Clock Enable */
- __HAL_RCC_GPIOH_CLK_ENABLE();
- 8001716: 4b58 ldr r3, [pc, #352] @ (8001878 <MX_GPIO_Init+0x178>)
- 8001718: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 800171c: 4a56 ldr r2, [pc, #344] @ (8001878 <MX_GPIO_Init+0x178>)
- 800171e: f043 0380 orr.w r3, r3, #128 @ 0x80
- 8001722: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 8001726: 4b54 ldr r3, [pc, #336] @ (8001878 <MX_GPIO_Init+0x178>)
- 8001728: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 800172c: f003 0380 and.w r3, r3, #128 @ 0x80
- 8001730: 61bb str r3, [r7, #24]
- 8001732: 69bb ldr r3, [r7, #24]
- __HAL_RCC_GPIOC_CLK_ENABLE();
- 8001734: 4b50 ldr r3, [pc, #320] @ (8001878 <MX_GPIO_Init+0x178>)
- 8001736: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 800173a: 4a4f ldr r2, [pc, #316] @ (8001878 <MX_GPIO_Init+0x178>)
- 800173c: f043 0304 orr.w r3, r3, #4
- 8001740: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 8001744: 4b4c ldr r3, [pc, #304] @ (8001878 <MX_GPIO_Init+0x178>)
- 8001746: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 800174a: f003 0304 and.w r3, r3, #4
- 800174e: 617b str r3, [r7, #20]
- 8001750: 697b ldr r3, [r7, #20]
- __HAL_RCC_GPIOA_CLK_ENABLE();
- 8001752: 4b49 ldr r3, [pc, #292] @ (8001878 <MX_GPIO_Init+0x178>)
- 8001754: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8001758: 4a47 ldr r2, [pc, #284] @ (8001878 <MX_GPIO_Init+0x178>)
- 800175a: f043 0301 orr.w r3, r3, #1
- 800175e: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 8001762: 4b45 ldr r3, [pc, #276] @ (8001878 <MX_GPIO_Init+0x178>)
- 8001764: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8001768: f003 0301 and.w r3, r3, #1
- 800176c: 613b str r3, [r7, #16]
- 800176e: 693b ldr r3, [r7, #16]
- __HAL_RCC_GPIOB_CLK_ENABLE();
- 8001770: 4b41 ldr r3, [pc, #260] @ (8001878 <MX_GPIO_Init+0x178>)
- 8001772: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8001776: 4a40 ldr r2, [pc, #256] @ (8001878 <MX_GPIO_Init+0x178>)
- 8001778: f043 0302 orr.w r3, r3, #2
- 800177c: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 8001780: 4b3d ldr r3, [pc, #244] @ (8001878 <MX_GPIO_Init+0x178>)
- 8001782: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8001786: f003 0302 and.w r3, r3, #2
- 800178a: 60fb str r3, [r7, #12]
- 800178c: 68fb ldr r3, [r7, #12]
- __HAL_RCC_GPIOE_CLK_ENABLE();
- 800178e: 4b3a ldr r3, [pc, #232] @ (8001878 <MX_GPIO_Init+0x178>)
- 8001790: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8001794: 4a38 ldr r2, [pc, #224] @ (8001878 <MX_GPIO_Init+0x178>)
- 8001796: f043 0310 orr.w r3, r3, #16
- 800179a: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 800179e: 4b36 ldr r3, [pc, #216] @ (8001878 <MX_GPIO_Init+0x178>)
- 80017a0: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 80017a4: f003 0310 and.w r3, r3, #16
- 80017a8: 60bb str r3, [r7, #8]
- 80017aa: 68bb ldr r3, [r7, #8]
- __HAL_RCC_GPIOD_CLK_ENABLE();
- 80017ac: 4b32 ldr r3, [pc, #200] @ (8001878 <MX_GPIO_Init+0x178>)
- 80017ae: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 80017b2: 4a31 ldr r2, [pc, #196] @ (8001878 <MX_GPIO_Init+0x178>)
- 80017b4: f043 0308 orr.w r3, r3, #8
- 80017b8: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 80017bc: 4b2e ldr r3, [pc, #184] @ (8001878 <MX_GPIO_Init+0x178>)
- 80017be: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 80017c2: f003 0308 and.w r3, r3, #8
- 80017c6: 607b str r3, [r7, #4]
- 80017c8: 687b ldr r3, [r7, #4]
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOE, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
- 80017ca: 2200 movs r2, #0
- 80017cc: f24e 7180 movw r1, #59264 @ 0xe780
- 80017d0: 482a ldr r0, [pc, #168] @ (800187c <MX_GPIO_Init+0x17c>)
- 80017d2: f009 fa69 bl 800aca8 <HAL_GPIO_WritePin>
- |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15, GPIO_PIN_RESET);
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7, GPIO_PIN_RESET);
- 80017d6: 2200 movs r2, #0
- 80017d8: 21f0 movs r1, #240 @ 0xf0
- 80017da: 4829 ldr r0, [pc, #164] @ (8001880 <MX_GPIO_Init+0x180>)
- 80017dc: f009 fa64 bl 800aca8 <HAL_GPIO_WritePin>
- /*Configure GPIO pins : PE7 PE8 PE9 PE10
- PE13 PE14 PE15 */
- GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
- 80017e0: f24e 7380 movw r3, #59264 @ 0xe780
- 80017e4: 61fb str r3, [r7, #28]
- |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 80017e6: 2301 movs r3, #1
- 80017e8: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 80017ea: 2300 movs r3, #0
- 80017ec: 627b str r3, [r7, #36] @ 0x24
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 80017ee: 2300 movs r3, #0
- 80017f0: 62bb str r3, [r7, #40] @ 0x28
- HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 80017f2: f107 031c add.w r3, r7, #28
- 80017f6: 4619 mov r1, r3
- 80017f8: 4820 ldr r0, [pc, #128] @ (800187c <MX_GPIO_Init+0x17c>)
- 80017fa: f009 f88d bl 800a918 <HAL_GPIO_Init>
- /*Configure GPIO pins : PD8 PD9 PD10 PD11
- PD12 PD13 */
- GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
- 80017fe: f44f 537c mov.w r3, #16128 @ 0x3f00
- 8001802: 61fb str r3, [r7, #28]
- |GPIO_PIN_12|GPIO_PIN_13;
- GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING;
- 8001804: f44f 1344 mov.w r3, #3211264 @ 0x310000
- 8001808: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 800180a: 2300 movs r3, #0
- 800180c: 627b str r3, [r7, #36] @ 0x24
- HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
- 800180e: f107 031c add.w r3, r7, #28
- 8001812: 4619 mov r1, r3
- 8001814: 481a ldr r0, [pc, #104] @ (8001880 <MX_GPIO_Init+0x180>)
- 8001816: f009 f87f bl 800a918 <HAL_GPIO_Init>
- /*Configure GPIO pin : PD3 */
- GPIO_InitStruct.Pin = GPIO_PIN_3;
- 800181a: 2308 movs r3, #8
- 800181c: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 800181e: 2300 movs r3, #0
- 8001820: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001822: 2300 movs r3, #0
- 8001824: 627b str r3, [r7, #36] @ 0x24
- HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
- 8001826: f107 031c add.w r3, r7, #28
- 800182a: 4619 mov r1, r3
- 800182c: 4814 ldr r0, [pc, #80] @ (8001880 <MX_GPIO_Init+0x180>)
- 800182e: f009 f873 bl 800a918 <HAL_GPIO_Init>
- /*Configure GPIO pins : PD4 PD5 PD6 PD7 */
- GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
- 8001832: 23f0 movs r3, #240 @ 0xf0
- 8001834: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 8001836: 2301 movs r3, #1
- 8001838: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 800183a: 2300 movs r3, #0
- 800183c: 627b str r3, [r7, #36] @ 0x24
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 800183e: 2300 movs r3, #0
- 8001840: 62bb str r3, [r7, #40] @ 0x28
- HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
- 8001842: f107 031c add.w r3, r7, #28
- 8001846: 4619 mov r1, r3
- 8001848: 480d ldr r0, [pc, #52] @ (8001880 <MX_GPIO_Init+0x180>)
- 800184a: f009 f865 bl 800a918 <HAL_GPIO_Init>
- /* EXTI interrupt init*/
- HAL_NVIC_SetPriority(EXTI9_5_IRQn, 5, 0);
- 800184e: 2200 movs r2, #0
- 8001850: 2105 movs r1, #5
- 8001852: 2017 movs r0, #23
- 8001854: f005 fd2e bl 80072b4 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
- 8001858: 2017 movs r0, #23
- 800185a: f005 fd45 bl 80072e8 <HAL_NVIC_EnableIRQ>
- HAL_NVIC_SetPriority(EXTI15_10_IRQn, 5, 0);
- 800185e: 2200 movs r2, #0
- 8001860: 2105 movs r1, #5
- 8001862: 2028 movs r0, #40 @ 0x28
- 8001864: f005 fd26 bl 80072b4 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(EXTI15_10_IRQn);
- 8001868: 2028 movs r0, #40 @ 0x28
- 800186a: f005 fd3d bl 80072e8 <HAL_NVIC_EnableIRQ>
- /* USER CODE BEGIN MX_GPIO_Init_2 */
- /* USER CODE END MX_GPIO_Init_2 */
- }
- 800186e: bf00 nop
- 8001870: 3730 adds r7, #48 @ 0x30
- 8001872: 46bd mov sp, r7
- 8001874: bd80 pop {r7, pc}
- 8001876: bf00 nop
- 8001878: 58024400 .word 0x58024400
- 800187c: 58021000 .word 0x58021000
- 8001880: 58020c00 .word 0x58020c00
- 08001884 <HAL_ADC_ConvCpltCallback>:
- /* USER CODE BEGIN 4 */
- void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc)
- {
- 8001884: b580 push {r7, lr}
- 8001886: b08e sub sp, #56 @ 0x38
- 8001888: af00 add r7, sp, #0
- 800188a: 6078 str r0, [r7, #4]
- if(hadc->Instance == ADC1)
- 800188c: 687b ldr r3, [r7, #4]
- 800188e: 681b ldr r3, [r3, #0]
- 8001890: 4a67 ldr r2, [pc, #412] @ (8001a30 <HAL_ADC_ConvCpltCallback+0x1ac>)
- 8001892: 4293 cmp r3, r2
- 8001894: d13f bne.n 8001916 <HAL_ADC_ConvCpltCallback+0x92>
- {
- DbgLEDToggle(DBG_LED4);
- 8001896: 2080 movs r0, #128 @ 0x80
- 8001898: f001 fada bl 8002e50 <DbgLEDToggle>
- SCB_InvalidateDCache_by_Addr((uint32_t*)(((uint32_t)adc1Data.adcDataBuffer) & ~(uint32_t)0x1F), __SCB_DCACHE_LINE_SIZE);
- 800189c: 4b65 ldr r3, [pc, #404] @ (8001a34 <HAL_ADC_ConvCpltCallback+0x1b0>)
- 800189e: f023 031f bic.w r3, r3, #31
- 80018a2: 637b str r3, [r7, #52] @ 0x34
- 80018a4: 2320 movs r3, #32
- 80018a6: 633b str r3, [r7, #48] @ 0x30
- \param[in] dsize size of memory block (in number of bytes)
- */
- __STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize)
- {
- #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
- if ( dsize > 0 ) {
- 80018a8: 6b3b ldr r3, [r7, #48] @ 0x30
- 80018aa: 2b00 cmp r3, #0
- 80018ac: dd1d ble.n 80018ea <HAL_ADC_ConvCpltCallback+0x66>
- int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
- 80018ae: 6b7b ldr r3, [r7, #52] @ 0x34
- 80018b0: f003 021f and.w r2, r3, #31
- 80018b4: 6b3b ldr r3, [r7, #48] @ 0x30
- 80018b6: 4413 add r3, r2
- 80018b8: 62fb str r3, [r7, #44] @ 0x2c
- uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
- 80018ba: 6b7b ldr r3, [r7, #52] @ 0x34
- 80018bc: 62bb str r3, [r7, #40] @ 0x28
- __ASM volatile ("dsb 0xF":::"memory");
- 80018be: f3bf 8f4f dsb sy
- }
- 80018c2: bf00 nop
-
- __DSB();
- do {
- SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
- 80018c4: 4a5c ldr r2, [pc, #368] @ (8001a38 <HAL_ADC_ConvCpltCallback+0x1b4>)
- 80018c6: 6abb ldr r3, [r7, #40] @ 0x28
- 80018c8: f8c2 325c str.w r3, [r2, #604] @ 0x25c
- op_addr += __SCB_DCACHE_LINE_SIZE;
- 80018cc: 6abb ldr r3, [r7, #40] @ 0x28
- 80018ce: 3320 adds r3, #32
- 80018d0: 62bb str r3, [r7, #40] @ 0x28
- op_size -= __SCB_DCACHE_LINE_SIZE;
- 80018d2: 6afb ldr r3, [r7, #44] @ 0x2c
- 80018d4: 3b20 subs r3, #32
- 80018d6: 62fb str r3, [r7, #44] @ 0x2c
- } while ( op_size > 0 );
- 80018d8: 6afb ldr r3, [r7, #44] @ 0x2c
- 80018da: 2b00 cmp r3, #0
- 80018dc: dcf2 bgt.n 80018c4 <HAL_ADC_ConvCpltCallback+0x40>
- __ASM volatile ("dsb 0xF":::"memory");
- 80018de: f3bf 8f4f dsb sy
- }
- 80018e2: bf00 nop
- __ASM volatile ("isb 0xF":::"memory");
- 80018e4: f3bf 8f6f isb sy
- }
- 80018e8: bf00 nop
- __DSB();
- __ISB();
- }
- #endif
- }
- 80018ea: bf00 nop
- if(adc1MeasDataQueue != NULL)
- 80018ec: 4b53 ldr r3, [pc, #332] @ (8001a3c <HAL_ADC_ConvCpltCallback+0x1b8>)
- 80018ee: 681b ldr r3, [r3, #0]
- 80018f0: 2b00 cmp r3, #0
- 80018f2: d006 beq.n 8001902 <HAL_ADC_ConvCpltCallback+0x7e>
- {
- osMessageQueuePut(adc1MeasDataQueue, &adc1Data, 0, 0);
- 80018f4: 4b51 ldr r3, [pc, #324] @ (8001a3c <HAL_ADC_ConvCpltCallback+0x1b8>)
- 80018f6: 6818 ldr r0, [r3, #0]
- 80018f8: 2300 movs r3, #0
- 80018fa: 2200 movs r2, #0
- 80018fc: 494d ldr r1, [pc, #308] @ (8001a34 <HAL_ADC_ConvCpltCallback+0x1b0>)
- 80018fe: f012 fb09 bl 8013f14 <osMessageQueuePut>
- }
- if(HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc1Data.adcDataBuffer, ADC1LastData) != HAL_OK)
- 8001902: 2207 movs r2, #7
- 8001904: 494b ldr r1, [pc, #300] @ (8001a34 <HAL_ADC_ConvCpltCallback+0x1b0>)
- 8001906: 484e ldr r0, [pc, #312] @ (8001a40 <HAL_ADC_ConvCpltCallback+0x1bc>)
- 8001908: f004 fa30 bl 8005d6c <HAL_ADC_Start_DMA>
- 800190c: 4603 mov r3, r0
- 800190e: 2b00 cmp r3, #0
- 8001910: d001 beq.n 8001916 <HAL_ADC_ConvCpltCallback+0x92>
- {
- Error_Handler();
- 8001912: f000 fb39 bl 8001f88 <Error_Handler>
- }
- }
- if(hadc->Instance == ADC2)
- 8001916: 687b ldr r3, [r7, #4]
- 8001918: 681b ldr r3, [r3, #0]
- 800191a: 4a4a ldr r2, [pc, #296] @ (8001a44 <HAL_ADC_ConvCpltCallback+0x1c0>)
- 800191c: 4293 cmp r3, r2
- 800191e: d13c bne.n 800199a <HAL_ADC_ConvCpltCallback+0x116>
- {
- SCB_InvalidateDCache_by_Addr((uint32_t*)(((uint32_t)adc2Data.adcDataBuffer) & ~(uint32_t)0x1F), __SCB_DCACHE_LINE_SIZE);
- 8001920: 4b49 ldr r3, [pc, #292] @ (8001a48 <HAL_ADC_ConvCpltCallback+0x1c4>)
- 8001922: f023 031f bic.w r3, r3, #31
- 8001926: 627b str r3, [r7, #36] @ 0x24
- 8001928: 2320 movs r3, #32
- 800192a: 623b str r3, [r7, #32]
- if ( dsize > 0 ) {
- 800192c: 6a3b ldr r3, [r7, #32]
- 800192e: 2b00 cmp r3, #0
- 8001930: dd1d ble.n 800196e <HAL_ADC_ConvCpltCallback+0xea>
- int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
- 8001932: 6a7b ldr r3, [r7, #36] @ 0x24
- 8001934: f003 021f and.w r2, r3, #31
- 8001938: 6a3b ldr r3, [r7, #32]
- 800193a: 4413 add r3, r2
- 800193c: 61fb str r3, [r7, #28]
- uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
- 800193e: 6a7b ldr r3, [r7, #36] @ 0x24
- 8001940: 61bb str r3, [r7, #24]
- __ASM volatile ("dsb 0xF":::"memory");
- 8001942: f3bf 8f4f dsb sy
- }
- 8001946: bf00 nop
- SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
- 8001948: 4a3b ldr r2, [pc, #236] @ (8001a38 <HAL_ADC_ConvCpltCallback+0x1b4>)
- 800194a: 69bb ldr r3, [r7, #24]
- 800194c: f8c2 325c str.w r3, [r2, #604] @ 0x25c
- op_addr += __SCB_DCACHE_LINE_SIZE;
- 8001950: 69bb ldr r3, [r7, #24]
- 8001952: 3320 adds r3, #32
- 8001954: 61bb str r3, [r7, #24]
- op_size -= __SCB_DCACHE_LINE_SIZE;
- 8001956: 69fb ldr r3, [r7, #28]
- 8001958: 3b20 subs r3, #32
- 800195a: 61fb str r3, [r7, #28]
- } while ( op_size > 0 );
- 800195c: 69fb ldr r3, [r7, #28]
- 800195e: 2b00 cmp r3, #0
- 8001960: dcf2 bgt.n 8001948 <HAL_ADC_ConvCpltCallback+0xc4>
- __ASM volatile ("dsb 0xF":::"memory");
- 8001962: f3bf 8f4f dsb sy
- }
- 8001966: bf00 nop
- __ASM volatile ("isb 0xF":::"memory");
- 8001968: f3bf 8f6f isb sy
- }
- 800196c: bf00 nop
- }
- 800196e: bf00 nop
- if(adc2MeasDataQueue != NULL)
- 8001970: 4b36 ldr r3, [pc, #216] @ (8001a4c <HAL_ADC_ConvCpltCallback+0x1c8>)
- 8001972: 681b ldr r3, [r3, #0]
- 8001974: 2b00 cmp r3, #0
- 8001976: d006 beq.n 8001986 <HAL_ADC_ConvCpltCallback+0x102>
- {
- osMessageQueuePut(adc2MeasDataQueue, &adc2Data, 0, 0);
- 8001978: 4b34 ldr r3, [pc, #208] @ (8001a4c <HAL_ADC_ConvCpltCallback+0x1c8>)
- 800197a: 6818 ldr r0, [r3, #0]
- 800197c: 2300 movs r3, #0
- 800197e: 2200 movs r2, #0
- 8001980: 4931 ldr r1, [pc, #196] @ (8001a48 <HAL_ADC_ConvCpltCallback+0x1c4>)
- 8001982: f012 fac7 bl 8013f14 <osMessageQueuePut>
- }
- if(HAL_ADC_Start_DMA(&hadc2, (uint32_t *)adc2Data.adcDataBuffer, ADC2LastData) != HAL_OK)
- 8001986: 2203 movs r2, #3
- 8001988: 492f ldr r1, [pc, #188] @ (8001a48 <HAL_ADC_ConvCpltCallback+0x1c4>)
- 800198a: 4831 ldr r0, [pc, #196] @ (8001a50 <HAL_ADC_ConvCpltCallback+0x1cc>)
- 800198c: f004 f9ee bl 8005d6c <HAL_ADC_Start_DMA>
- 8001990: 4603 mov r3, r0
- 8001992: 2b00 cmp r3, #0
- 8001994: d001 beq.n 800199a <HAL_ADC_ConvCpltCallback+0x116>
- {
- Error_Handler();
- 8001996: f000 faf7 bl 8001f88 <Error_Handler>
- }
- }
- if(hadc->Instance == ADC3)
- 800199a: 687b ldr r3, [r7, #4]
- 800199c: 681b ldr r3, [r3, #0]
- 800199e: 4a2d ldr r2, [pc, #180] @ (8001a54 <HAL_ADC_ConvCpltCallback+0x1d0>)
- 80019a0: 4293 cmp r3, r2
- 80019a2: d13c bne.n 8001a1e <HAL_ADC_ConvCpltCallback+0x19a>
- {
- SCB_InvalidateDCache_by_Addr((uint32_t*)(((uint32_t)adc3Data.adcDataBuffer) & ~(uint32_t)0x1F), __SCB_DCACHE_LINE_SIZE);
- 80019a4: 4b2c ldr r3, [pc, #176] @ (8001a58 <HAL_ADC_ConvCpltCallback+0x1d4>)
- 80019a6: f023 031f bic.w r3, r3, #31
- 80019aa: 617b str r3, [r7, #20]
- 80019ac: 2320 movs r3, #32
- 80019ae: 613b str r3, [r7, #16]
- if ( dsize > 0 ) {
- 80019b0: 693b ldr r3, [r7, #16]
- 80019b2: 2b00 cmp r3, #0
- 80019b4: dd1d ble.n 80019f2 <HAL_ADC_ConvCpltCallback+0x16e>
- int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
- 80019b6: 697b ldr r3, [r7, #20]
- 80019b8: f003 021f and.w r2, r3, #31
- 80019bc: 693b ldr r3, [r7, #16]
- 80019be: 4413 add r3, r2
- 80019c0: 60fb str r3, [r7, #12]
- uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
- 80019c2: 697b ldr r3, [r7, #20]
- 80019c4: 60bb str r3, [r7, #8]
- __ASM volatile ("dsb 0xF":::"memory");
- 80019c6: f3bf 8f4f dsb sy
- }
- 80019ca: bf00 nop
- SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
- 80019cc: 4a1a ldr r2, [pc, #104] @ (8001a38 <HAL_ADC_ConvCpltCallback+0x1b4>)
- 80019ce: 68bb ldr r3, [r7, #8]
- 80019d0: f8c2 325c str.w r3, [r2, #604] @ 0x25c
- op_addr += __SCB_DCACHE_LINE_SIZE;
- 80019d4: 68bb ldr r3, [r7, #8]
- 80019d6: 3320 adds r3, #32
- 80019d8: 60bb str r3, [r7, #8]
- op_size -= __SCB_DCACHE_LINE_SIZE;
- 80019da: 68fb ldr r3, [r7, #12]
- 80019dc: 3b20 subs r3, #32
- 80019de: 60fb str r3, [r7, #12]
- } while ( op_size > 0 );
- 80019e0: 68fb ldr r3, [r7, #12]
- 80019e2: 2b00 cmp r3, #0
- 80019e4: dcf2 bgt.n 80019cc <HAL_ADC_ConvCpltCallback+0x148>
- __ASM volatile ("dsb 0xF":::"memory");
- 80019e6: f3bf 8f4f dsb sy
- }
- 80019ea: bf00 nop
- __ASM volatile ("isb 0xF":::"memory");
- 80019ec: f3bf 8f6f isb sy
- }
- 80019f0: bf00 nop
- }
- 80019f2: bf00 nop
- if(adc3MeasDataQueue != NULL)
- 80019f4: 4b19 ldr r3, [pc, #100] @ (8001a5c <HAL_ADC_ConvCpltCallback+0x1d8>)
- 80019f6: 681b ldr r3, [r3, #0]
- 80019f8: 2b00 cmp r3, #0
- 80019fa: d006 beq.n 8001a0a <HAL_ADC_ConvCpltCallback+0x186>
- {
- osMessageQueuePut(adc3MeasDataQueue, &adc3Data, 0, 0);
- 80019fc: 4b17 ldr r3, [pc, #92] @ (8001a5c <HAL_ADC_ConvCpltCallback+0x1d8>)
- 80019fe: 6818 ldr r0, [r3, #0]
- 8001a00: 2300 movs r3, #0
- 8001a02: 2200 movs r2, #0
- 8001a04: 4914 ldr r1, [pc, #80] @ (8001a58 <HAL_ADC_ConvCpltCallback+0x1d4>)
- 8001a06: f012 fa85 bl 8013f14 <osMessageQueuePut>
- }
- if(HAL_ADC_Start_DMA(&hadc3, (uint32_t *)adc3Data.adcDataBuffer, ADC3LastData) != HAL_OK)
- 8001a0a: 2205 movs r2, #5
- 8001a0c: 4912 ldr r1, [pc, #72] @ (8001a58 <HAL_ADC_ConvCpltCallback+0x1d4>)
- 8001a0e: 4814 ldr r0, [pc, #80] @ (8001a60 <HAL_ADC_ConvCpltCallback+0x1dc>)
- 8001a10: f004 f9ac bl 8005d6c <HAL_ADC_Start_DMA>
- 8001a14: 4603 mov r3, r0
- 8001a16: 2b00 cmp r3, #0
- 8001a18: d001 beq.n 8001a1e <HAL_ADC_ConvCpltCallback+0x19a>
- {
- Error_Handler();
- 8001a1a: f000 fab5 bl 8001f88 <Error_Handler>
- }
- }osTimerStop (debugLedTimerHandle);
- 8001a1e: 4b11 ldr r3, [pc, #68] @ (8001a64 <HAL_ADC_ConvCpltCallback+0x1e0>)
- 8001a20: 681b ldr r3, [r3, #0]
- 8001a22: 4618 mov r0, r3
- 8001a24: f012 f8be bl 8013ba4 <osTimerStop>
- }
- 8001a28: bf00 nop
- 8001a2a: 3738 adds r7, #56 @ 0x38
- 8001a2c: 46bd mov sp, r7
- 8001a2e: bd80 pop {r7, pc}
- 8001a30: 40022000 .word 0x40022000
- 8001a34: 240000e0 .word 0x240000e0
- 8001a38: e000ed00 .word 0xe000ed00
- 8001a3c: 24000820 .word 0x24000820
- 8001a40: 24000140 .word 0x24000140
- 8001a44: 40022100 .word 0x40022100
- 8001a48: 24000100 .word 0x24000100
- 8001a4c: 24000824 .word 0x24000824
- 8001a50: 240001a4 .word 0x240001a4
- 8001a54: 58026000 .word 0x58026000
- 8001a58: 24000120 .word 0x24000120
- 8001a5c: 24000828 .word 0x24000828
- 8001a60: 24000208 .word 0x24000208
- 8001a64: 24000704 .word 0x24000704
- 08001a68 <HAL_TIM_IC_CaptureCallback>:
- void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
- {
- 8001a68: b580 push {r7, lr}
- 8001a6a: b084 sub sp, #16
- 8001a6c: af00 add r7, sp, #0
- 8001a6e: 6078 str r0, [r7, #4]
- if (htim->Instance == TIM4)
- 8001a70: 687b ldr r3, [r7, #4]
- 8001a72: 681b ldr r3, [r3, #0]
- 8001a74: 4a61 ldr r2, [pc, #388] @ (8001bfc <HAL_TIM_IC_CaptureCallback+0x194>)
- 8001a76: 4293 cmp r3, r2
- 8001a78: d15a bne.n 8001b30 <HAL_TIM_IC_CaptureCallback+0xc8>
- {
- if(htim->Channel == HAL_TIM_ACTIVE_CHANNEL_3)
- 8001a7a: 687b ldr r3, [r7, #4]
- 8001a7c: 7f1b ldrb r3, [r3, #28]
- 8001a7e: 2b04 cmp r3, #4
- 8001a80: d114 bne.n 8001aac <HAL_TIM_IC_CaptureCallback+0x44>
- {
- if(encoderXChannelB > 0)
- 8001a82: 4b5f ldr r3, [pc, #380] @ (8001c00 <HAL_TIM_IC_CaptureCallback+0x198>)
- 8001a84: 681b ldr r3, [r3, #0]
- 8001a86: 2b00 cmp r3, #0
- 8001a88: dd08 ble.n 8001a9c <HAL_TIM_IC_CaptureCallback+0x34>
- {
- encoderXChannelA = HAL_TIM_ReadCapturedValue(htim, TIM_CHANNEL_3);
- 8001a8a: 2108 movs r1, #8
- 8001a8c: 6878 ldr r0, [r7, #4]
- 8001a8e: f00e f90b bl 800fca8 <HAL_TIM_ReadCapturedValue>
- 8001a92: 4603 mov r3, r0
- 8001a94: 461a mov r2, r3
- 8001a96: 4b5b ldr r3, [pc, #364] @ (8001c04 <HAL_TIM_IC_CaptureCallback+0x19c>)
- 8001a98: 601a str r2, [r3, #0]
- 8001a9a: e01f b.n 8001adc <HAL_TIM_IC_CaptureCallback+0x74>
- }
- else
- {
- encoderXChannelA = 1;
- 8001a9c: 4b59 ldr r3, [pc, #356] @ (8001c04 <HAL_TIM_IC_CaptureCallback+0x19c>)
- 8001a9e: 2201 movs r2, #1
- 8001aa0: 601a str r2, [r3, #0]
- __HAL_TIM_SET_COUNTER(htim,0);
- 8001aa2: 687b ldr r3, [r7, #4]
- 8001aa4: 681b ldr r3, [r3, #0]
- 8001aa6: 2200 movs r2, #0
- 8001aa8: 625a str r2, [r3, #36] @ 0x24
- 8001aaa: e017 b.n 8001adc <HAL_TIM_IC_CaptureCallback+0x74>
- }
- } else if(htim->Channel == HAL_TIM_ACTIVE_CHANNEL_4)
- 8001aac: 687b ldr r3, [r7, #4]
- 8001aae: 7f1b ldrb r3, [r3, #28]
- 8001ab0: 2b08 cmp r3, #8
- 8001ab2: d113 bne.n 8001adc <HAL_TIM_IC_CaptureCallback+0x74>
- {
- if(encoderXChannelA > 0)
- 8001ab4: 4b53 ldr r3, [pc, #332] @ (8001c04 <HAL_TIM_IC_CaptureCallback+0x19c>)
- 8001ab6: 681b ldr r3, [r3, #0]
- 8001ab8: 2b00 cmp r3, #0
- 8001aba: dd08 ble.n 8001ace <HAL_TIM_IC_CaptureCallback+0x66>
- {
- encoderXChannelB = HAL_TIM_ReadCapturedValue(htim, TIM_CHANNEL_4);
- 8001abc: 210c movs r1, #12
- 8001abe: 6878 ldr r0, [r7, #4]
- 8001ac0: f00e f8f2 bl 800fca8 <HAL_TIM_ReadCapturedValue>
- 8001ac4: 4603 mov r3, r0
- 8001ac6: 461a mov r2, r3
- 8001ac8: 4b4d ldr r3, [pc, #308] @ (8001c00 <HAL_TIM_IC_CaptureCallback+0x198>)
- 8001aca: 601a str r2, [r3, #0]
- 8001acc: e006 b.n 8001adc <HAL_TIM_IC_CaptureCallback+0x74>
- }
- else
- {
- encoderXChannelB = 1;
- 8001ace: 4b4c ldr r3, [pc, #304] @ (8001c00 <HAL_TIM_IC_CaptureCallback+0x198>)
- 8001ad0: 2201 movs r2, #1
- 8001ad2: 601a str r2, [r3, #0]
- __HAL_TIM_SET_COUNTER(htim,0);
- 8001ad4: 687b ldr r3, [r7, #4]
- 8001ad6: 681b ldr r3, [r3, #0]
- 8001ad8: 2200 movs r2, #0
- 8001ada: 625a str r2, [r3, #36] @ 0x24
- }
- }
- if((encoderXChannelA != 0) && (encoderXChannelB != 0))
- 8001adc: 4b49 ldr r3, [pc, #292] @ (8001c04 <HAL_TIM_IC_CaptureCallback+0x19c>)
- 8001ade: 681b ldr r3, [r3, #0]
- 8001ae0: 2b00 cmp r3, #0
- 8001ae2: f000 8086 beq.w 8001bf2 <HAL_TIM_IC_CaptureCallback+0x18a>
- 8001ae6: 4b46 ldr r3, [pc, #280] @ (8001c00 <HAL_TIM_IC_CaptureCallback+0x198>)
- 8001ae8: 681b ldr r3, [r3, #0]
- 8001aea: 2b00 cmp r3, #0
- 8001aec: f000 8081 beq.w 8001bf2 <HAL_TIM_IC_CaptureCallback+0x18a>
- {
- EncoderData encoderData = { 0 };
- 8001af0: 2300 movs r3, #0
- 8001af2: 81bb strh r3, [r7, #12]
- encoderData.axe = encoderAxeX;
- 8001af4: 2300 movs r3, #0
- 8001af6: 733b strb r3, [r7, #12]
- encoderData.direction = encoderXChannelA - encoderXChannelB < 0 ? encoderCW : encoderCCW;
- 8001af8: 4b42 ldr r3, [pc, #264] @ (8001c04 <HAL_TIM_IC_CaptureCallback+0x19c>)
- 8001afa: 681a ldr r2, [r3, #0]
- 8001afc: 4b40 ldr r3, [pc, #256] @ (8001c00 <HAL_TIM_IC_CaptureCallback+0x198>)
- 8001afe: 681b ldr r3, [r3, #0]
- 8001b00: 1ad3 subs r3, r2, r3
- 8001b02: 43db mvns r3, r3
- 8001b04: 0fdb lsrs r3, r3, #31
- 8001b06: b2db uxtb r3, r3
- 8001b08: 737b strb r3, [r7, #13]
- if (encoderData.direction == encoderCCW)
- 8001b0a: 7b7b ldrb r3, [r7, #13]
- 8001b0c: 2b01 cmp r3, #1
- 8001b0e: d100 bne.n 8001b12 <HAL_TIM_IC_CaptureCallback+0xaa>
- {
- asm("nop;");
- 8001b10: bf00 nop
- }
- osMessageQueuePut(encoderDataQueue, &encoderData, 0, 0);
- 8001b12: 4b3d ldr r3, [pc, #244] @ (8001c08 <HAL_TIM_IC_CaptureCallback+0x1a0>)
- 8001b14: 6818 ldr r0, [r3, #0]
- 8001b16: f107 010c add.w r1, r7, #12
- 8001b1a: 2300 movs r3, #0
- 8001b1c: 2200 movs r2, #0
- 8001b1e: f012 f9f9 bl 8013f14 <osMessageQueuePut>
- encoderXChannelA = 0;
- 8001b22: 4b38 ldr r3, [pc, #224] @ (8001c04 <HAL_TIM_IC_CaptureCallback+0x19c>)
- 8001b24: 2200 movs r2, #0
- 8001b26: 601a str r2, [r3, #0]
- encoderXChannelB = 0;
- 8001b28: 4b35 ldr r3, [pc, #212] @ (8001c00 <HAL_TIM_IC_CaptureCallback+0x198>)
- 8001b2a: 2200 movs r2, #0
- 8001b2c: 601a str r2, [r3, #0]
- osMessageQueuePut(encoderDataQueue, &encoderData, 0, 0);
- encoderYChannelA = 0;
- encoderYChannelB = 0;
- }
- }
- }
- 8001b2e: e060 b.n 8001bf2 <HAL_TIM_IC_CaptureCallback+0x18a>
- } else if (htim->Instance == TIM2)
- 8001b30: 687b ldr r3, [r7, #4]
- 8001b32: 681b ldr r3, [r3, #0]
- 8001b34: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 8001b38: d15b bne.n 8001bf2 <HAL_TIM_IC_CaptureCallback+0x18a>
- if(htim->Channel == HAL_TIM_ACTIVE_CHANNEL_3)
- 8001b3a: 687b ldr r3, [r7, #4]
- 8001b3c: 7f1b ldrb r3, [r3, #28]
- 8001b3e: 2b04 cmp r3, #4
- 8001b40: d114 bne.n 8001b6c <HAL_TIM_IC_CaptureCallback+0x104>
- if(encoderYChannelB > 0)
- 8001b42: 4b32 ldr r3, [pc, #200] @ (8001c0c <HAL_TIM_IC_CaptureCallback+0x1a4>)
- 8001b44: 681b ldr r3, [r3, #0]
- 8001b46: 2b00 cmp r3, #0
- 8001b48: dd08 ble.n 8001b5c <HAL_TIM_IC_CaptureCallback+0xf4>
- encoderYChannelA = HAL_TIM_ReadCapturedValue(htim, TIM_CHANNEL_3);
- 8001b4a: 2108 movs r1, #8
- 8001b4c: 6878 ldr r0, [r7, #4]
- 8001b4e: f00e f8ab bl 800fca8 <HAL_TIM_ReadCapturedValue>
- 8001b52: 4603 mov r3, r0
- 8001b54: 461a mov r2, r3
- 8001b56: 4b2e ldr r3, [pc, #184] @ (8001c10 <HAL_TIM_IC_CaptureCallback+0x1a8>)
- 8001b58: 601a str r2, [r3, #0]
- 8001b5a: e01f b.n 8001b9c <HAL_TIM_IC_CaptureCallback+0x134>
- encoderYChannelA = 1;
- 8001b5c: 4b2c ldr r3, [pc, #176] @ (8001c10 <HAL_TIM_IC_CaptureCallback+0x1a8>)
- 8001b5e: 2201 movs r2, #1
- 8001b60: 601a str r2, [r3, #0]
- __HAL_TIM_SET_COUNTER(htim,0);
- 8001b62: 687b ldr r3, [r7, #4]
- 8001b64: 681b ldr r3, [r3, #0]
- 8001b66: 2200 movs r2, #0
- 8001b68: 625a str r2, [r3, #36] @ 0x24
- 8001b6a: e017 b.n 8001b9c <HAL_TIM_IC_CaptureCallback+0x134>
- } else if(htim->Channel == HAL_TIM_ACTIVE_CHANNEL_4)
- 8001b6c: 687b ldr r3, [r7, #4]
- 8001b6e: 7f1b ldrb r3, [r3, #28]
- 8001b70: 2b08 cmp r3, #8
- 8001b72: d113 bne.n 8001b9c <HAL_TIM_IC_CaptureCallback+0x134>
- if(encoderYChannelA > 0)
- 8001b74: 4b26 ldr r3, [pc, #152] @ (8001c10 <HAL_TIM_IC_CaptureCallback+0x1a8>)
- 8001b76: 681b ldr r3, [r3, #0]
- 8001b78: 2b00 cmp r3, #0
- 8001b7a: dd08 ble.n 8001b8e <HAL_TIM_IC_CaptureCallback+0x126>
- encoderYChannelB = HAL_TIM_ReadCapturedValue(htim, TIM_CHANNEL_4);
- 8001b7c: 210c movs r1, #12
- 8001b7e: 6878 ldr r0, [r7, #4]
- 8001b80: f00e f892 bl 800fca8 <HAL_TIM_ReadCapturedValue>
- 8001b84: 4603 mov r3, r0
- 8001b86: 461a mov r2, r3
- 8001b88: 4b20 ldr r3, [pc, #128] @ (8001c0c <HAL_TIM_IC_CaptureCallback+0x1a4>)
- 8001b8a: 601a str r2, [r3, #0]
- 8001b8c: e006 b.n 8001b9c <HAL_TIM_IC_CaptureCallback+0x134>
- encoderYChannelB = 1;
- 8001b8e: 4b1f ldr r3, [pc, #124] @ (8001c0c <HAL_TIM_IC_CaptureCallback+0x1a4>)
- 8001b90: 2201 movs r2, #1
- 8001b92: 601a str r2, [r3, #0]
- __HAL_TIM_SET_COUNTER(htim,0);
- 8001b94: 687b ldr r3, [r7, #4]
- 8001b96: 681b ldr r3, [r3, #0]
- 8001b98: 2200 movs r2, #0
- 8001b9a: 625a str r2, [r3, #36] @ 0x24
- if((encoderYChannelA != 0) && (encoderYChannelB != 0))
- 8001b9c: 4b1c ldr r3, [pc, #112] @ (8001c10 <HAL_TIM_IC_CaptureCallback+0x1a8>)
- 8001b9e: 681b ldr r3, [r3, #0]
- 8001ba0: 2b00 cmp r3, #0
- 8001ba2: d026 beq.n 8001bf2 <HAL_TIM_IC_CaptureCallback+0x18a>
- 8001ba4: 4b19 ldr r3, [pc, #100] @ (8001c0c <HAL_TIM_IC_CaptureCallback+0x1a4>)
- 8001ba6: 681b ldr r3, [r3, #0]
- 8001ba8: 2b00 cmp r3, #0
- 8001baa: d022 beq.n 8001bf2 <HAL_TIM_IC_CaptureCallback+0x18a>
- EncoderData encoderData = { 0 };
- 8001bac: 2300 movs r3, #0
- 8001bae: 813b strh r3, [r7, #8]
- encoderData.axe = encoderAxeY;
- 8001bb0: 2301 movs r3, #1
- 8001bb2: 723b strb r3, [r7, #8]
- encoderData.direction = encoderYChannelA - encoderYChannelB < 0 ? encoderCW : encoderCCW;
- 8001bb4: 4b16 ldr r3, [pc, #88] @ (8001c10 <HAL_TIM_IC_CaptureCallback+0x1a8>)
- 8001bb6: 681a ldr r2, [r3, #0]
- 8001bb8: 4b14 ldr r3, [pc, #80] @ (8001c0c <HAL_TIM_IC_CaptureCallback+0x1a4>)
- 8001bba: 681b ldr r3, [r3, #0]
- 8001bbc: 1ad3 subs r3, r2, r3
- 8001bbe: 43db mvns r3, r3
- 8001bc0: 0fdb lsrs r3, r3, #31
- 8001bc2: b2db uxtb r3, r3
- 8001bc4: 727b strb r3, [r7, #9]
- if (encoderData.direction == encoderCCW)
- 8001bc6: 7a7b ldrb r3, [r7, #9]
- 8001bc8: 2b01 cmp r3, #1
- 8001bca: d100 bne.n 8001bce <HAL_TIM_IC_CaptureCallback+0x166>
- asm("nop;");
- 8001bcc: bf00 nop
- if (encoderData.direction == encoderCW)
- 8001bce: 7a7b ldrb r3, [r7, #9]
- 8001bd0: 2b00 cmp r3, #0
- 8001bd2: d100 bne.n 8001bd6 <HAL_TIM_IC_CaptureCallback+0x16e>
- asm("nop;");
- 8001bd4: bf00 nop
- osMessageQueuePut(encoderDataQueue, &encoderData, 0, 0);
- 8001bd6: 4b0c ldr r3, [pc, #48] @ (8001c08 <HAL_TIM_IC_CaptureCallback+0x1a0>)
- 8001bd8: 6818 ldr r0, [r3, #0]
- 8001bda: f107 0108 add.w r1, r7, #8
- 8001bde: 2300 movs r3, #0
- 8001be0: 2200 movs r2, #0
- 8001be2: f012 f997 bl 8013f14 <osMessageQueuePut>
- encoderYChannelA = 0;
- 8001be6: 4b0a ldr r3, [pc, #40] @ (8001c10 <HAL_TIM_IC_CaptureCallback+0x1a8>)
- 8001be8: 2200 movs r2, #0
- 8001bea: 601a str r2, [r3, #0]
- encoderYChannelB = 0;
- 8001bec: 4b07 ldr r3, [pc, #28] @ (8001c0c <HAL_TIM_IC_CaptureCallback+0x1a4>)
- 8001bee: 2200 movs r2, #0
- 8001bf0: 601a str r2, [r3, #0]
- }
- 8001bf2: bf00 nop
- 8001bf4: 3710 adds r7, #16
- 8001bf6: 46bd mov sp, r7
- 8001bf8: bd80 pop {r7, pc}
- 8001bfa: bf00 nop
- 8001bfc: 40000800 .word 0x40000800
- 8001c00: 24000800 .word 0x24000800
- 8001c04: 240007fc .word 0x240007fc
- 8001c08: 24000830 .word 0x24000830
- 8001c0c: 24000808 .word 0x24000808
- 8001c10: 24000804 .word 0x24000804
- 08001c14 <StartDefaultTask>:
- * @param argument: Not used
- * @retval None
- */
- /* USER CODE END Header_StartDefaultTask */
- void StartDefaultTask(void *argument)
- {
- 8001c14: b580 push {r7, lr}
- 8001c16: b082 sub sp, #8
- 8001c18: af00 add r7, sp, #0
- 8001c1a: 6078 str r0, [r7, #4]
- /* USER CODE BEGIN 5 */
- HAL_IWDG_Refresh(&hiwdg1);
- 8001c1c: 485e ldr r0, [pc, #376] @ (8001d98 <StartDefaultTask+0x184>)
- 8001c1e: f009 f8df bl 800ade0 <HAL_IWDG_Refresh>
- SelectCurrentSensorGain(CurrentSensorL1, csGain3);
- 8001c22: 2102 movs r1, #2
- 8001c24: 2000 movs r0, #0
- 8001c26: f001 f931 bl 8002e8c <SelectCurrentSensorGain>
- SelectCurrentSensorGain(CurrentSensorL2, csGain3);
- 8001c2a: 2102 movs r1, #2
- 8001c2c: 2001 movs r0, #1
- 8001c2e: f001 f92d bl 8002e8c <SelectCurrentSensorGain>
- SelectCurrentSensorGain(CurrentSensorL3, csGain3);
- 8001c32: 2102 movs r1, #2
- 8001c34: 2002 movs r0, #2
- 8001c36: f001 f929 bl 8002e8c <SelectCurrentSensorGain>
- EnableCurrentSensors();
- 8001c3a: f001 f91b bl 8002e74 <EnableCurrentSensors>
- osDelay(pdMS_TO_TICKS(100));
- 8001c3e: 2064 movs r0, #100 @ 0x64
- 8001c40: f011 fed5 bl 80139ee <osDelay>
- HAL_IWDG_Refresh(&hiwdg1);
- 8001c44: 4854 ldr r0, [pc, #336] @ (8001d98 <StartDefaultTask+0x184>)
- 8001c46: f009 f8cb bl 800ade0 <HAL_IWDG_Refresh>
- if(HAL_TIM_Base_Start(&htim8) != HAL_OK)
- 8001c4a: 4854 ldr r0, [pc, #336] @ (8001d9c <StartDefaultTask+0x188>)
- 8001c4c: f00c ffe6 bl 800ec1c <HAL_TIM_Base_Start>
- 8001c50: 4603 mov r3, r0
- 8001c52: 2b00 cmp r3, #0
- 8001c54: d001 beq.n 8001c5a <StartDefaultTask+0x46>
- {
- Error_Handler();
- 8001c56: f000 f997 bl 8001f88 <Error_Handler>
- }
- if(HAL_TIM_Base_Start_IT(&htim2) != HAL_OK)
- 8001c5a: 4851 ldr r0, [pc, #324] @ (8001da0 <StartDefaultTask+0x18c>)
- 8001c5c: f00d f84e bl 800ecfc <HAL_TIM_Base_Start_IT>
- 8001c60: 4603 mov r3, r0
- 8001c62: 2b00 cmp r3, #0
- 8001c64: d001 beq.n 8001c6a <StartDefaultTask+0x56>
- {
- Error_Handler();
- 8001c66: f000 f98f bl 8001f88 <Error_Handler>
- }
- if(HAL_TIM_Base_Start_IT(&htim4) != HAL_OK)
- 8001c6a: 484e ldr r0, [pc, #312] @ (8001da4 <StartDefaultTask+0x190>)
- 8001c6c: f00d f846 bl 800ecfc <HAL_TIM_Base_Start_IT>
- 8001c70: 4603 mov r3, r0
- 8001c72: 2b00 cmp r3, #0
- 8001c74: d001 beq.n 8001c7a <StartDefaultTask+0x66>
- {
- Error_Handler();
- 8001c76: f000 f987 bl 8001f88 <Error_Handler>
- }
- if(HAL_TIM_IC_Start_IT(&htim4, TIM_CHANNEL_3) != HAL_OK)
- 8001c7a: 2108 movs r1, #8
- 8001c7c: 4849 ldr r0, [pc, #292] @ (8001da4 <StartDefaultTask+0x190>)
- 8001c7e: f00d fb13 bl 800f2a8 <HAL_TIM_IC_Start_IT>
- 8001c82: 4603 mov r3, r0
- 8001c84: 2b00 cmp r3, #0
- 8001c86: d001 beq.n 8001c8c <StartDefaultTask+0x78>
- {
- Error_Handler();
- 8001c88: f000 f97e bl 8001f88 <Error_Handler>
- }
- if(HAL_TIM_IC_Start_IT(&htim4, TIM_CHANNEL_4) != HAL_OK)
- 8001c8c: 210c movs r1, #12
- 8001c8e: 4845 ldr r0, [pc, #276] @ (8001da4 <StartDefaultTask+0x190>)
- 8001c90: f00d fb0a bl 800f2a8 <HAL_TIM_IC_Start_IT>
- 8001c94: 4603 mov r3, r0
- 8001c96: 2b00 cmp r3, #0
- 8001c98: d001 beq.n 8001c9e <StartDefaultTask+0x8a>
- {
- Error_Handler();
- 8001c9a: f000 f975 bl 8001f88 <Error_Handler>
- }
- if(HAL_TIM_IC_Start_IT(&htim2, TIM_CHANNEL_3) != HAL_OK)
- 8001c9e: 2108 movs r1, #8
- 8001ca0: 483f ldr r0, [pc, #252] @ (8001da0 <StartDefaultTask+0x18c>)
- 8001ca2: f00d fb01 bl 800f2a8 <HAL_TIM_IC_Start_IT>
- 8001ca6: 4603 mov r3, r0
- 8001ca8: 2b00 cmp r3, #0
- 8001caa: d001 beq.n 8001cb0 <StartDefaultTask+0x9c>
- {
- Error_Handler();
- 8001cac: f000 f96c bl 8001f88 <Error_Handler>
- }
- if(HAL_TIM_IC_Start_IT(&htim2, TIM_CHANNEL_4) != HAL_OK)
- 8001cb0: 210c movs r1, #12
- 8001cb2: 483b ldr r0, [pc, #236] @ (8001da0 <StartDefaultTask+0x18c>)
- 8001cb4: f00d faf8 bl 800f2a8 <HAL_TIM_IC_Start_IT>
- 8001cb8: 4603 mov r3, r0
- 8001cba: 2b00 cmp r3, #0
- 8001cbc: d001 beq.n 8001cc2 <StartDefaultTask+0xae>
- {
- Error_Handler();
- 8001cbe: f000 f963 bl 8001f88 <Error_Handler>
- }
- if(HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc1Data.adcDataBuffer, ADC1LastData) != HAL_OK)
- 8001cc2: 2207 movs r2, #7
- 8001cc4: 4938 ldr r1, [pc, #224] @ (8001da8 <StartDefaultTask+0x194>)
- 8001cc6: 4839 ldr r0, [pc, #228] @ (8001dac <StartDefaultTask+0x198>)
- 8001cc8: f004 f850 bl 8005d6c <HAL_ADC_Start_DMA>
- 8001ccc: 4603 mov r3, r0
- 8001cce: 2b00 cmp r3, #0
- 8001cd0: d001 beq.n 8001cd6 <StartDefaultTask+0xc2>
- {
- Error_Handler();
- 8001cd2: f000 f959 bl 8001f88 <Error_Handler>
- }
- if(HAL_ADC_Start_DMA(&hadc2, (uint32_t *)adc2Data.adcDataBuffer, ADC2LastData) != HAL_OK)
- 8001cd6: 2203 movs r2, #3
- 8001cd8: 4935 ldr r1, [pc, #212] @ (8001db0 <StartDefaultTask+0x19c>)
- 8001cda: 4836 ldr r0, [pc, #216] @ (8001db4 <StartDefaultTask+0x1a0>)
- 8001cdc: f004 f846 bl 8005d6c <HAL_ADC_Start_DMA>
- 8001ce0: 4603 mov r3, r0
- 8001ce2: 2b00 cmp r3, #0
- 8001ce4: d001 beq.n 8001cea <StartDefaultTask+0xd6>
- {
- Error_Handler();
- 8001ce6: f000 f94f bl 8001f88 <Error_Handler>
- }
- if(HAL_ADC_Start_DMA(&hadc3, (uint32_t *)adc3Data.adcDataBuffer, ADC3LastData) != HAL_OK)
- 8001cea: 2205 movs r2, #5
- 8001cec: 4932 ldr r1, [pc, #200] @ (8001db8 <StartDefaultTask+0x1a4>)
- 8001cee: 4833 ldr r0, [pc, #204] @ (8001dbc <StartDefaultTask+0x1a8>)
- 8001cf0: f004 f83c bl 8005d6c <HAL_ADC_Start_DMA>
- 8001cf4: 4603 mov r3, r0
- 8001cf6: 2b00 cmp r3, #0
- 8001cf8: d001 beq.n 8001cfe <StartDefaultTask+0xea>
- {
- Error_Handler();
- 8001cfa: f000 f945 bl 8001f88 <Error_Handler>
- }
- HAL_COMP_Start(&hcomp1);
- 8001cfe: 4830 ldr r0, [pc, #192] @ (8001dc0 <StartDefaultTask+0x1ac>)
- 8001d00: f005 f9b8 bl 8007074 <HAL_COMP_Start>
- HAL_IWDG_Refresh(&hiwdg1);
- 8001d04: 4824 ldr r0, [pc, #144] @ (8001d98 <StartDefaultTask+0x184>)
- 8001d06: f009 f86b bl 800ade0 <HAL_IWDG_Refresh>
- /* Infinite loop */
- for(;;)
- {
- osDelay(pdMS_TO_TICKS(100));
- 8001d0a: 2064 movs r0, #100 @ 0x64
- 8001d0c: f011 fe6f bl 80139ee <osDelay>
- HAL_IWDG_Refresh(&hiwdg1);
- 8001d10: 4821 ldr r0, [pc, #132] @ (8001d98 <StartDefaultTask+0x184>)
- 8001d12: f009 f865 bl 800ade0 <HAL_IWDG_Refresh>
- if(HAL_TIM_GetChannelState(&htim3, TIM_CHANNEL_1) == HAL_TIM_CHANNEL_STATE_READY &&
- 8001d16: 2100 movs r1, #0
- 8001d18: 482a ldr r0, [pc, #168] @ (8001dc4 <StartDefaultTask+0x1b0>)
- 8001d1a: f00e f827 bl 800fd6c <HAL_TIM_GetChannelState>
- 8001d1e: 4603 mov r3, r0
- 8001d20: 2b01 cmp r3, #1
- 8001d22: d118 bne.n 8001d56 <StartDefaultTask+0x142>
- HAL_TIM_GetChannelState(&htim3, TIM_CHANNEL_2) == HAL_TIM_CHANNEL_STATE_READY)
- 8001d24: 2104 movs r1, #4
- 8001d26: 4827 ldr r0, [pc, #156] @ (8001dc4 <StartDefaultTask+0x1b0>)
- 8001d28: f00e f820 bl 800fd6c <HAL_TIM_GetChannelState>
- 8001d2c: 4603 mov r3, r0
- if(HAL_TIM_GetChannelState(&htim3, TIM_CHANNEL_1) == HAL_TIM_CHANNEL_STATE_READY &&
- 8001d2e: 2b01 cmp r3, #1
- 8001d30: d111 bne.n 8001d56 <StartDefaultTask+0x142>
- {
- if(osMutexAcquire(sensorsInfoMutex, osWaitForever) == osOK)
- 8001d32: 4b25 ldr r3, [pc, #148] @ (8001dc8 <StartDefaultTask+0x1b4>)
- 8001d34: 681b ldr r3, [r3, #0]
- 8001d36: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8001d3a: 4618 mov r0, r3
- 8001d3c: f011 ffef bl 8013d1e <osMutexAcquire>
- 8001d40: 4603 mov r3, r0
- 8001d42: 2b00 cmp r3, #0
- 8001d44: d107 bne.n 8001d56 <StartDefaultTask+0x142>
- {
- sensorsInfo.motorXStatus = 0;
- 8001d46: 4b21 ldr r3, [pc, #132] @ (8001dcc <StartDefaultTask+0x1b8>)
- 8001d48: 2200 movs r2, #0
- 8001d4a: 751a strb r2, [r3, #20]
- osMutexRelease(sensorsInfoMutex);
- 8001d4c: 4b1e ldr r3, [pc, #120] @ (8001dc8 <StartDefaultTask+0x1b4>)
- 8001d4e: 681b ldr r3, [r3, #0]
- 8001d50: 4618 mov r0, r3
- 8001d52: f012 f82f bl 8013db4 <osMutexRelease>
- }
- }
- if(HAL_TIM_GetChannelState(&htim3, TIM_CHANNEL_3) == HAL_TIM_CHANNEL_STATE_READY &&
- 8001d56: 2108 movs r1, #8
- 8001d58: 481a ldr r0, [pc, #104] @ (8001dc4 <StartDefaultTask+0x1b0>)
- 8001d5a: f00e f807 bl 800fd6c <HAL_TIM_GetChannelState>
- 8001d5e: 4603 mov r3, r0
- 8001d60: 2b01 cmp r3, #1
- 8001d62: d1d2 bne.n 8001d0a <StartDefaultTask+0xf6>
- HAL_TIM_GetChannelState(&htim3, TIM_CHANNEL_4) == HAL_TIM_CHANNEL_STATE_READY)
- 8001d64: 210c movs r1, #12
- 8001d66: 4817 ldr r0, [pc, #92] @ (8001dc4 <StartDefaultTask+0x1b0>)
- 8001d68: f00e f800 bl 800fd6c <HAL_TIM_GetChannelState>
- 8001d6c: 4603 mov r3, r0
- if(HAL_TIM_GetChannelState(&htim3, TIM_CHANNEL_3) == HAL_TIM_CHANNEL_STATE_READY &&
- 8001d6e: 2b01 cmp r3, #1
- 8001d70: d1cb bne.n 8001d0a <StartDefaultTask+0xf6>
- {
- if(osMutexAcquire(sensorsInfoMutex, osWaitForever) == osOK)
- 8001d72: 4b15 ldr r3, [pc, #84] @ (8001dc8 <StartDefaultTask+0x1b4>)
- 8001d74: 681b ldr r3, [r3, #0]
- 8001d76: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8001d7a: 4618 mov r0, r3
- 8001d7c: f011 ffcf bl 8013d1e <osMutexAcquire>
- 8001d80: 4603 mov r3, r0
- 8001d82: 2b00 cmp r3, #0
- 8001d84: d1c1 bne.n 8001d0a <StartDefaultTask+0xf6>
- {
- sensorsInfo.motorYStatus = 0;
- 8001d86: 4b11 ldr r3, [pc, #68] @ (8001dcc <StartDefaultTask+0x1b8>)
- 8001d88: 2200 movs r2, #0
- 8001d8a: 755a strb r2, [r3, #21]
- osMutexRelease(sensorsInfoMutex);
- 8001d8c: 4b0e ldr r3, [pc, #56] @ (8001dc8 <StartDefaultTask+0x1b4>)
- 8001d8e: 681b ldr r3, [r3, #0]
- 8001d90: 4618 mov r0, r3
- 8001d92: f012 f80f bl 8013db4 <osMutexRelease>
- osDelay(pdMS_TO_TICKS(100));
- 8001d96: e7b8 b.n 8001d0a <StartDefaultTask+0xf6>
- 8001d98: 24000438 .word 0x24000438
- 8001d9c: 2400058c .word 0x2400058c
- 8001da0: 240004a8 .word 0x240004a8
- 8001da4: 24000540 .word 0x24000540
- 8001da8: 240000e0 .word 0x240000e0
- 8001dac: 24000140 .word 0x24000140
- 8001db0: 24000100 .word 0x24000100
- 8001db4: 240001a4 .word 0x240001a4
- 8001db8: 24000120 .word 0x24000120
- 8001dbc: 24000208 .word 0x24000208
- 8001dc0: 240003d4 .word 0x240003d4
- 8001dc4: 240004f4 .word 0x240004f4
- 8001dc8: 2400083c .word 0x2400083c
- 8001dcc: 24000880 .word 0x24000880
- 08001dd0 <debugLedTimerCallback>:
- /* USER CODE END 5 */
- }
- /* debugLedTimerCallback function */
- void debugLedTimerCallback(void *argument)
- {
- 8001dd0: b580 push {r7, lr}
- 8001dd2: b082 sub sp, #8
- 8001dd4: af00 add r7, sp, #0
- 8001dd6: 6078 str r0, [r7, #4]
- /* USER CODE BEGIN debugLedTimerCallback */
- DbgLEDOff (DBG_LED1);
- 8001dd8: 2010 movs r0, #16
- 8001dda: f001 f827 bl 8002e2c <DbgLEDOff>
- /* USER CODE END debugLedTimerCallback */
- }
- 8001dde: bf00 nop
- 8001de0: 3708 adds r7, #8
- 8001de2: 46bd mov sp, r7
- 8001de4: bd80 pop {r7, pc}
- ...
- 08001de8 <fanTimerCallback>:
- /* fanTimerCallback function */
- void fanTimerCallback(void *argument)
- {
- 8001de8: b580 push {r7, lr}
- 8001dea: b082 sub sp, #8
- 8001dec: af00 add r7, sp, #0
- 8001dee: 6078 str r0, [r7, #4]
- /* USER CODE BEGIN fanTimerCallback */
- HAL_TIM_PWM_Stop(&htim1, TIM_CHANNEL_2);
- 8001df0: 2104 movs r1, #4
- 8001df2: 4803 ldr r0, [pc, #12] @ (8001e00 <fanTimerCallback+0x18>)
- 8001df4: f00d f960 bl 800f0b8 <HAL_TIM_PWM_Stop>
- /* USER CODE END fanTimerCallback */
- }
- 8001df8: bf00 nop
- 8001dfa: 3708 adds r7, #8
- 8001dfc: 46bd mov sp, r7
- 8001dfe: bd80 pop {r7, pc}
- 8001e00: 2400045c .word 0x2400045c
- 08001e04 <motorXTimerCallback>:
- /* motorXTimerCallback function */
- void motorXTimerCallback(void *argument)
- {
- 8001e04: b580 push {r7, lr}
- 8001e06: b084 sub sp, #16
- 8001e08: af02 add r7, sp, #8
- 8001e0a: 6078 str r0, [r7, #4]
- /* USER CODE BEGIN motorXTimerCallback */
- motorAction(&htim3, &motorXYTimerConfigOC, TIM_CHANNEL_1, TIM_CHANNEL_2, HiZ, 0);
- 8001e0c: 2300 movs r3, #0
- 8001e0e: 9301 str r3, [sp, #4]
- 8001e10: 2300 movs r3, #0
- 8001e12: 9300 str r3, [sp, #0]
- 8001e14: 2304 movs r3, #4
- 8001e16: 2200 movs r2, #0
- 8001e18: 4907 ldr r1, [pc, #28] @ (8001e38 <motorXTimerCallback+0x34>)
- 8001e1a: 4808 ldr r0, [pc, #32] @ (8001e3c <motorXTimerCallback+0x38>)
- 8001e1c: f001 f9bb bl 8003196 <motorAction>
- HAL_TIM_PWM_Stop(&htim3, TIM_CHANNEL_1);
- 8001e20: 2100 movs r1, #0
- 8001e22: 4806 ldr r0, [pc, #24] @ (8001e3c <motorXTimerCallback+0x38>)
- 8001e24: f00d f948 bl 800f0b8 <HAL_TIM_PWM_Stop>
- HAL_TIM_PWM_Stop(&htim3, TIM_CHANNEL_2);
- 8001e28: 2104 movs r1, #4
- 8001e2a: 4804 ldr r0, [pc, #16] @ (8001e3c <motorXTimerCallback+0x38>)
- 8001e2c: f00d f944 bl 800f0b8 <HAL_TIM_PWM_Stop>
- /* USER CODE END motorXTimerCallback */
- }
- 8001e30: bf00 nop
- 8001e32: 3708 adds r7, #8
- 8001e34: 46bd mov sp, r7
- 8001e36: bd80 pop {r7, pc}
- 8001e38: 240007e0 .word 0x240007e0
- 8001e3c: 240004f4 .word 0x240004f4
- 08001e40 <motorYTimerCallback>:
- /* motorYTimerCallback function */
- void motorYTimerCallback(void *argument)
- {
- 8001e40: b580 push {r7, lr}
- 8001e42: b084 sub sp, #16
- 8001e44: af02 add r7, sp, #8
- 8001e46: 6078 str r0, [r7, #4]
- /* USER CODE BEGIN motorYTimerCallback */
- motorAction(&htim3, &motorXYTimerConfigOC, TIM_CHANNEL_3, TIM_CHANNEL_4, HiZ, 0);
- 8001e48: 2300 movs r3, #0
- 8001e4a: 9301 str r3, [sp, #4]
- 8001e4c: 2300 movs r3, #0
- 8001e4e: 9300 str r3, [sp, #0]
- 8001e50: 230c movs r3, #12
- 8001e52: 2208 movs r2, #8
- 8001e54: 4907 ldr r1, [pc, #28] @ (8001e74 <motorYTimerCallback+0x34>)
- 8001e56: 4808 ldr r0, [pc, #32] @ (8001e78 <motorYTimerCallback+0x38>)
- 8001e58: f001 f99d bl 8003196 <motorAction>
- HAL_TIM_PWM_Stop(&htim3, TIM_CHANNEL_3);
- 8001e5c: 2108 movs r1, #8
- 8001e5e: 4806 ldr r0, [pc, #24] @ (8001e78 <motorYTimerCallback+0x38>)
- 8001e60: f00d f92a bl 800f0b8 <HAL_TIM_PWM_Stop>
- HAL_TIM_PWM_Stop(&htim3, TIM_CHANNEL_4);
- 8001e64: 210c movs r1, #12
- 8001e66: 4804 ldr r0, [pc, #16] @ (8001e78 <motorYTimerCallback+0x38>)
- 8001e68: f00d f926 bl 800f0b8 <HAL_TIM_PWM_Stop>
- /* USER CODE END motorYTimerCallback */
- }
- 8001e6c: bf00 nop
- 8001e6e: 3708 adds r7, #8
- 8001e70: 46bd mov sp, r7
- 8001e72: bd80 pop {r7, pc}
- 8001e74: 240007e0 .word 0x240007e0
- 8001e78: 240004f4 .word 0x240004f4
- 08001e7c <MPU_Config>:
- /* MPU Configuration */
- void MPU_Config(void)
- {
- 8001e7c: b580 push {r7, lr}
- 8001e7e: b084 sub sp, #16
- 8001e80: af00 add r7, sp, #0
- MPU_Region_InitTypeDef MPU_InitStruct = {0};
- 8001e82: 463b mov r3, r7
- 8001e84: 2200 movs r2, #0
- 8001e86: 601a str r2, [r3, #0]
- 8001e88: 605a str r2, [r3, #4]
- 8001e8a: 609a str r2, [r3, #8]
- 8001e8c: 60da str r2, [r3, #12]
- /* Disables the MPU */
- HAL_MPU_Disable();
- 8001e8e: f005 fa39 bl 8007304 <HAL_MPU_Disable>
- /** Initializes and configures the Region and the memory to be protected
- */
- MPU_InitStruct.Enable = MPU_REGION_ENABLE;
- 8001e92: 2301 movs r3, #1
- 8001e94: 703b strb r3, [r7, #0]
- MPU_InitStruct.Number = MPU_REGION_NUMBER0;
- 8001e96: 2300 movs r3, #0
- 8001e98: 707b strb r3, [r7, #1]
- MPU_InitStruct.BaseAddress = 0x0;
- 8001e9a: 2300 movs r3, #0
- 8001e9c: 607b str r3, [r7, #4]
- MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
- 8001e9e: 231f movs r3, #31
- 8001ea0: 723b strb r3, [r7, #8]
- MPU_InitStruct.SubRegionDisable = 0x87;
- 8001ea2: 2387 movs r3, #135 @ 0x87
- 8001ea4: 727b strb r3, [r7, #9]
- MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
- 8001ea6: 2300 movs r3, #0
- 8001ea8: 72bb strb r3, [r7, #10]
- MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
- 8001eaa: 2300 movs r3, #0
- 8001eac: 72fb strb r3, [r7, #11]
- MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
- 8001eae: 2301 movs r3, #1
- 8001eb0: 733b strb r3, [r7, #12]
- MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
- 8001eb2: 2301 movs r3, #1
- 8001eb4: 737b strb r3, [r7, #13]
- MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
- 8001eb6: 2300 movs r3, #0
- 8001eb8: 73bb strb r3, [r7, #14]
- MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
- 8001eba: 2300 movs r3, #0
- 8001ebc: 73fb strb r3, [r7, #15]
- HAL_MPU_ConfigRegion(&MPU_InitStruct);
- 8001ebe: 463b mov r3, r7
- 8001ec0: 4618 mov r0, r3
- 8001ec2: f005 fa57 bl 8007374 <HAL_MPU_ConfigRegion>
- /** Initializes and configures the Region and the memory to be protected
- */
- MPU_InitStruct.Number = MPU_REGION_NUMBER1;
- 8001ec6: 2301 movs r3, #1
- 8001ec8: 707b strb r3, [r7, #1]
- MPU_InitStruct.BaseAddress = 0x24020000;
- 8001eca: 4b13 ldr r3, [pc, #76] @ (8001f18 <MPU_Config+0x9c>)
- 8001ecc: 607b str r3, [r7, #4]
- MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;
- 8001ece: 2310 movs r3, #16
- 8001ed0: 723b strb r3, [r7, #8]
- MPU_InitStruct.SubRegionDisable = 0x0;
- 8001ed2: 2300 movs r3, #0
- 8001ed4: 727b strb r3, [r7, #9]
- MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
- 8001ed6: 2301 movs r3, #1
- 8001ed8: 72bb strb r3, [r7, #10]
- MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
- 8001eda: 2303 movs r3, #3
- 8001edc: 72fb strb r3, [r7, #11]
- MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
- 8001ede: 2300 movs r3, #0
- 8001ee0: 737b strb r3, [r7, #13]
- HAL_MPU_ConfigRegion(&MPU_InitStruct);
- 8001ee2: 463b mov r3, r7
- 8001ee4: 4618 mov r0, r3
- 8001ee6: f005 fa45 bl 8007374 <HAL_MPU_ConfigRegion>
- /** Initializes and configures the Region and the memory to be protected
- */
- MPU_InitStruct.Number = MPU_REGION_NUMBER2;
- 8001eea: 2302 movs r3, #2
- 8001eec: 707b strb r3, [r7, #1]
- MPU_InitStruct.BaseAddress = 0x24040000;
- 8001eee: 4b0b ldr r3, [pc, #44] @ (8001f1c <MPU_Config+0xa0>)
- 8001ef0: 607b str r3, [r7, #4]
- MPU_InitStruct.Size = MPU_REGION_SIZE_512B;
- 8001ef2: 2308 movs r3, #8
- 8001ef4: 723b strb r3, [r7, #8]
- MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
- 8001ef6: 2300 movs r3, #0
- 8001ef8: 72bb strb r3, [r7, #10]
- MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
- 8001efa: 2301 movs r3, #1
- 8001efc: 737b strb r3, [r7, #13]
- MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
- 8001efe: 2301 movs r3, #1
- 8001f00: 73fb strb r3, [r7, #15]
- HAL_MPU_ConfigRegion(&MPU_InitStruct);
- 8001f02: 463b mov r3, r7
- 8001f04: 4618 mov r0, r3
- 8001f06: f005 fa35 bl 8007374 <HAL_MPU_ConfigRegion>
- /* Enables the MPU */
- HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
- 8001f0a: 2004 movs r0, #4
- 8001f0c: f005 fa12 bl 8007334 <HAL_MPU_Enable>
- }
- 8001f10: bf00 nop
- 8001f12: 3710 adds r7, #16
- 8001f14: 46bd mov sp, r7
- 8001f16: bd80 pop {r7, pc}
- 8001f18: 24020000 .word 0x24020000
- 8001f1c: 24040000 .word 0x24040000
- 08001f20 <HAL_TIM_PeriodElapsedCallback>:
- * a global variable "uwTick" used as application time base.
- * @param htim : TIM handle
- * @retval None
- */
- void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
- {
- 8001f20: b580 push {r7, lr}
- 8001f22: b082 sub sp, #8
- 8001f24: af00 add r7, sp, #0
- 8001f26: 6078 str r0, [r7, #4]
- /* USER CODE BEGIN Callback 0 */
- /* USER CODE END Callback 0 */
- if (htim->Instance == TIM6) {
- 8001f28: 687b ldr r3, [r7, #4]
- 8001f2a: 681b ldr r3, [r3, #0]
- 8001f2c: 4a10 ldr r2, [pc, #64] @ (8001f70 <HAL_TIM_PeriodElapsedCallback+0x50>)
- 8001f2e: 4293 cmp r3, r2
- 8001f30: d102 bne.n 8001f38 <HAL_TIM_PeriodElapsedCallback+0x18>
- HAL_IncTick();
- 8001f32: f003 fb05 bl 8005540 <HAL_IncTick>
- {
- encoderYChannelA = 0;
- encoderYChannelB = 0;
- }
- /* USER CODE END Callback 1 */
- }
- 8001f36: e016 b.n 8001f66 <HAL_TIM_PeriodElapsedCallback+0x46>
- else if (htim->Instance == TIM4)
- 8001f38: 687b ldr r3, [r7, #4]
- 8001f3a: 681b ldr r3, [r3, #0]
- 8001f3c: 4a0d ldr r2, [pc, #52] @ (8001f74 <HAL_TIM_PeriodElapsedCallback+0x54>)
- 8001f3e: 4293 cmp r3, r2
- 8001f40: d106 bne.n 8001f50 <HAL_TIM_PeriodElapsedCallback+0x30>
- encoderXChannelA = 0;
- 8001f42: 4b0d ldr r3, [pc, #52] @ (8001f78 <HAL_TIM_PeriodElapsedCallback+0x58>)
- 8001f44: 2200 movs r2, #0
- 8001f46: 601a str r2, [r3, #0]
- encoderXChannelB = 0;
- 8001f48: 4b0c ldr r3, [pc, #48] @ (8001f7c <HAL_TIM_PeriodElapsedCallback+0x5c>)
- 8001f4a: 2200 movs r2, #0
- 8001f4c: 601a str r2, [r3, #0]
- }
- 8001f4e: e00a b.n 8001f66 <HAL_TIM_PeriodElapsedCallback+0x46>
- else if (htim->Instance == TIM2)
- 8001f50: 687b ldr r3, [r7, #4]
- 8001f52: 681b ldr r3, [r3, #0]
- 8001f54: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 8001f58: d105 bne.n 8001f66 <HAL_TIM_PeriodElapsedCallback+0x46>
- encoderYChannelA = 0;
- 8001f5a: 4b09 ldr r3, [pc, #36] @ (8001f80 <HAL_TIM_PeriodElapsedCallback+0x60>)
- 8001f5c: 2200 movs r2, #0
- 8001f5e: 601a str r2, [r3, #0]
- encoderYChannelB = 0;
- 8001f60: 4b08 ldr r3, [pc, #32] @ (8001f84 <HAL_TIM_PeriodElapsedCallback+0x64>)
- 8001f62: 2200 movs r2, #0
- 8001f64: 601a str r2, [r3, #0]
- }
- 8001f66: bf00 nop
- 8001f68: 3708 adds r7, #8
- 8001f6a: 46bd mov sp, r7
- 8001f6c: bd80 pop {r7, pc}
- 8001f6e: bf00 nop
- 8001f70: 40001000 .word 0x40001000
- 8001f74: 40000800 .word 0x40000800
- 8001f78: 240007fc .word 0x240007fc
- 8001f7c: 24000800 .word 0x24000800
- 8001f80: 24000804 .word 0x24000804
- 8001f84: 24000808 .word 0x24000808
- 08001f88 <Error_Handler>:
- /**
- * @brief This function is executed in case of error occurrence.
- * @retval None
- */
- void Error_Handler(void)
- {
- 8001f88: b580 push {r7, lr}
- 8001f8a: af00 add r7, sp, #0
- __ASM volatile ("cpsid i" : : : "memory");
- 8001f8c: b672 cpsid i
- }
- 8001f8e: bf00 nop
- /* USER CODE BEGIN Error_Handler_Debug */
- /* User can add his own implementation to report the HAL error return state */
- __disable_irq();
- NVIC_SystemReset();
- 8001f90: f7fe fb7a bl 8000688 <__NVIC_SystemReset>
- 08001f94 <MeasTasksInit>:
- extern TIM_OC_InitTypeDef motorXYTimerConfigOC;
- extern osTimerId_t motorXTimerHandle;
- extern osTimerId_t motorYTimerHandle;
- void MeasTasksInit (void) {
- 8001f94: b580 push {r7, lr}
- 8001f96: b0ae sub sp, #184 @ 0xb8
- 8001f98: af00 add r7, sp, #0
- vRefmVMutex = osMutexNew (NULL);
- 8001f9a: 2000 movs r0, #0
- 8001f9c: f011 fe39 bl 8013c12 <osMutexNew>
- 8001fa0: 4603 mov r3, r0
- 8001fa2: 4a58 ldr r2, [pc, #352] @ (8002104 <MeasTasksInit+0x170>)
- 8001fa4: 6013 str r3, [r2, #0]
- resMeasurementsMutex = osMutexNew (NULL);
- 8001fa6: 2000 movs r0, #0
- 8001fa8: f011 fe33 bl 8013c12 <osMutexNew>
- 8001fac: 4603 mov r3, r0
- 8001fae: 4a56 ldr r2, [pc, #344] @ (8002108 <MeasTasksInit+0x174>)
- 8001fb0: 6013 str r3, [r2, #0]
- sensorsInfoMutex = osMutexNew (NULL);
- 8001fb2: 2000 movs r0, #0
- 8001fb4: f011 fe2d bl 8013c12 <osMutexNew>
- 8001fb8: 4603 mov r3, r0
- 8001fba: 4a54 ldr r2, [pc, #336] @ (800210c <MeasTasksInit+0x178>)
- 8001fbc: 6013 str r3, [r2, #0]
- ILxRefMutex = osMutexNew (NULL);
- 8001fbe: 2000 movs r0, #0
- 8001fc0: f011 fe27 bl 8013c12 <osMutexNew>
- 8001fc4: 4603 mov r3, r0
- 8001fc6: 4a52 ldr r2, [pc, #328] @ (8002110 <MeasTasksInit+0x17c>)
- 8001fc8: 6013 str r3, [r2, #0]
- adc1MeasDataQueue = osMessageQueueNew (8, sizeof (ADC1_Data), NULL);
- 8001fca: 2200 movs r2, #0
- 8001fcc: 2120 movs r1, #32
- 8001fce: 2008 movs r0, #8
- 8001fd0: f011 ff2d bl 8013e2e <osMessageQueueNew>
- 8001fd4: 4603 mov r3, r0
- 8001fd6: 4a4f ldr r2, [pc, #316] @ (8002114 <MeasTasksInit+0x180>)
- 8001fd8: 6013 str r3, [r2, #0]
- adc2MeasDataQueue = osMessageQueueNew (8, sizeof (ADC2_Data), NULL);
- 8001fda: 2200 movs r2, #0
- 8001fdc: 2120 movs r1, #32
- 8001fde: 2008 movs r0, #8
- 8001fe0: f011 ff25 bl 8013e2e <osMessageQueueNew>
- 8001fe4: 4603 mov r3, r0
- 8001fe6: 4a4c ldr r2, [pc, #304] @ (8002118 <MeasTasksInit+0x184>)
- 8001fe8: 6013 str r3, [r2, #0]
- adc3MeasDataQueue = osMessageQueueNew (8, sizeof (ADC3_Data), NULL);
- 8001fea: 2200 movs r2, #0
- 8001fec: 2120 movs r1, #32
- 8001fee: 2008 movs r0, #8
- 8001ff0: f011 ff1d bl 8013e2e <osMessageQueueNew>
- 8001ff4: 4603 mov r3, r0
- 8001ff6: 4a49 ldr r2, [pc, #292] @ (800211c <MeasTasksInit+0x188>)
- 8001ff8: 6013 str r3, [r2, #0]
- osThreadAttr_t osThreadAttradc1MeasTask = { 0 };
- 8001ffa: f107 0394 add.w r3, r7, #148 @ 0x94
- 8001ffe: 2224 movs r2, #36 @ 0x24
- 8002000: 2100 movs r1, #0
- 8002002: 4618 mov r0, r3
- 8002004: f015 fecf bl 8017da6 <memset>
- osThreadAttr_t osThreadAttradc2MeasTask = { 0 };
- 8002008: f107 0370 add.w r3, r7, #112 @ 0x70
- 800200c: 2224 movs r2, #36 @ 0x24
- 800200e: 2100 movs r1, #0
- 8002010: 4618 mov r0, r3
- 8002012: f015 fec8 bl 8017da6 <memset>
- osThreadAttr_t osThreadAttradc3MeasTask = { 0 };
- 8002016: f107 034c add.w r3, r7, #76 @ 0x4c
- 800201a: 2224 movs r2, #36 @ 0x24
- 800201c: 2100 movs r1, #0
- 800201e: 4618 mov r0, r3
- 8002020: f015 fec1 bl 8017da6 <memset>
- osThreadAttradc1MeasTask.stack_size = configMINIMAL_STACK_SIZE * 2;
- 8002024: f44f 6380 mov.w r3, #1024 @ 0x400
- 8002028: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
- osThreadAttradc1MeasTask.priority = (osPriority_t)osPriorityRealtime;
- 800202c: 2330 movs r3, #48 @ 0x30
- 800202e: f8c7 30ac str.w r3, [r7, #172] @ 0xac
- osThreadAttradc2MeasTask.stack_size = configMINIMAL_STACK_SIZE * 2;
- 8002032: f44f 6380 mov.w r3, #1024 @ 0x400
- 8002036: f8c7 3084 str.w r3, [r7, #132] @ 0x84
- osThreadAttradc2MeasTask.priority = (osPriority_t)osPriorityRealtime;
- 800203a: 2330 movs r3, #48 @ 0x30
- 800203c: f8c7 3088 str.w r3, [r7, #136] @ 0x88
- osThreadAttradc3MeasTask.stack_size = configMINIMAL_STACK_SIZE * 2;
- 8002040: f44f 6380 mov.w r3, #1024 @ 0x400
- 8002044: 663b str r3, [r7, #96] @ 0x60
- osThreadAttradc3MeasTask.priority = (osPriority_t)osPriorityNormal;
- 8002046: 2318 movs r3, #24
- 8002048: 667b str r3, [r7, #100] @ 0x64
- adc1MeasTaskHandle = osThreadNew (ADC1MeasTask, NULL, &osThreadAttradc1MeasTask);
- 800204a: f107 0394 add.w r3, r7, #148 @ 0x94
- 800204e: 461a mov r2, r3
- 8002050: 2100 movs r1, #0
- 8002052: 4833 ldr r0, [pc, #204] @ (8002120 <MeasTasksInit+0x18c>)
- 8002054: f011 fc38 bl 80138c8 <osThreadNew>
- 8002058: 4603 mov r3, r0
- 800205a: 4a32 ldr r2, [pc, #200] @ (8002124 <MeasTasksInit+0x190>)
- 800205c: 6013 str r3, [r2, #0]
- adc2MeasTaskHandle = osThreadNew (ADC2MeasTask, NULL, &osThreadAttradc2MeasTask);
- 800205e: f107 0370 add.w r3, r7, #112 @ 0x70
- 8002062: 461a mov r2, r3
- 8002064: 2100 movs r1, #0
- 8002066: 4830 ldr r0, [pc, #192] @ (8002128 <MeasTasksInit+0x194>)
- 8002068: f011 fc2e bl 80138c8 <osThreadNew>
- 800206c: 4603 mov r3, r0
- 800206e: 4a2f ldr r2, [pc, #188] @ (800212c <MeasTasksInit+0x198>)
- 8002070: 6013 str r3, [r2, #0]
- adc3MeasTaskHandle = osThreadNew (ADC3MeasTask, NULL, &osThreadAttradc3MeasTask);
- 8002072: f107 034c add.w r3, r7, #76 @ 0x4c
- 8002076: 461a mov r2, r3
- 8002078: 2100 movs r1, #0
- 800207a: 482d ldr r0, [pc, #180] @ (8002130 <MeasTasksInit+0x19c>)
- 800207c: f011 fc24 bl 80138c8 <osThreadNew>
- 8002080: 4603 mov r3, r0
- 8002082: 4a2c ldr r2, [pc, #176] @ (8002134 <MeasTasksInit+0x1a0>)
- 8002084: 6013 str r3, [r2, #0]
- limiterSwitchDataQueue = osMessageQueueNew (8, sizeof (LimiterSwitchData), NULL);
- 8002086: 2200 movs r2, #0
- 8002088: 2104 movs r1, #4
- 800208a: 2008 movs r0, #8
- 800208c: f011 fecf bl 8013e2e <osMessageQueueNew>
- 8002090: 4603 mov r3, r0
- 8002092: 4a29 ldr r2, [pc, #164] @ (8002138 <MeasTasksInit+0x1a4>)
- 8002094: 6013 str r3, [r2, #0]
- osThreadAttr_t osThreadAttradc1LimiterSwitchTask = { 0 };
- 8002096: f107 0328 add.w r3, r7, #40 @ 0x28
- 800209a: 2224 movs r2, #36 @ 0x24
- 800209c: 2100 movs r1, #0
- 800209e: 4618 mov r0, r3
- 80020a0: f015 fe81 bl 8017da6 <memset>
- osThreadAttradc1LimiterSwitchTask.stack_size = configMINIMAL_STACK_SIZE * 2;
- 80020a4: f44f 6380 mov.w r3, #1024 @ 0x400
- 80020a8: 63fb str r3, [r7, #60] @ 0x3c
- osThreadAttradc1LimiterSwitchTask.priority = (osPriority_t)osPriorityNormal;
- 80020aa: 2318 movs r3, #24
- 80020ac: 643b str r3, [r7, #64] @ 0x40
- limiterSwitchTaskHandle = osThreadNew (LimiterSwitchTask, NULL, &osThreadAttradc1LimiterSwitchTask);
- 80020ae: f107 0328 add.w r3, r7, #40 @ 0x28
- 80020b2: 461a mov r2, r3
- 80020b4: 2100 movs r1, #0
- 80020b6: 4821 ldr r0, [pc, #132] @ (800213c <MeasTasksInit+0x1a8>)
- 80020b8: f011 fc06 bl 80138c8 <osThreadNew>
- 80020bc: 4603 mov r3, r0
- 80020be: 4a20 ldr r2, [pc, #128] @ (8002140 <MeasTasksInit+0x1ac>)
- 80020c0: 6013 str r3, [r2, #0]
- encoderDataQueue = osMessageQueueNew (16, sizeof (EncoderData), NULL);
- 80020c2: 2200 movs r2, #0
- 80020c4: 2102 movs r1, #2
- 80020c6: 2010 movs r0, #16
- 80020c8: f011 feb1 bl 8013e2e <osMessageQueueNew>
- 80020cc: 4603 mov r3, r0
- 80020ce: 4a1d ldr r2, [pc, #116] @ (8002144 <MeasTasksInit+0x1b0>)
- 80020d0: 6013 str r3, [r2, #0]
- osThreadAttr_t osThreadAttrEncoderTask = { 0 };
- 80020d2: 1d3b adds r3, r7, #4
- 80020d4: 2224 movs r2, #36 @ 0x24
- 80020d6: 2100 movs r1, #0
- 80020d8: 4618 mov r0, r3
- 80020da: f015 fe64 bl 8017da6 <memset>
- osThreadAttrEncoderTask.stack_size = configMINIMAL_STACK_SIZE * 2;
- 80020de: f44f 6380 mov.w r3, #1024 @ 0x400
- 80020e2: 61bb str r3, [r7, #24]
- osThreadAttrEncoderTask.priority = (osPriority_t)osPriorityNormal;
- 80020e4: 2318 movs r3, #24
- 80020e6: 61fb str r3, [r7, #28]
- encoderTaskHandle = osThreadNew (EncoderTask, encoderDataQueue, &osThreadAttrEncoderTask);
- 80020e8: 4b16 ldr r3, [pc, #88] @ (8002144 <MeasTasksInit+0x1b0>)
- 80020ea: 681b ldr r3, [r3, #0]
- 80020ec: 1d3a adds r2, r7, #4
- 80020ee: 4619 mov r1, r3
- 80020f0: 4815 ldr r0, [pc, #84] @ (8002148 <MeasTasksInit+0x1b4>)
- 80020f2: f011 fbe9 bl 80138c8 <osThreadNew>
- 80020f6: 4603 mov r3, r0
- 80020f8: 4a14 ldr r2, [pc, #80] @ (800214c <MeasTasksInit+0x1b8>)
- 80020fa: 6013 str r3, [r2, #0]
- }
- 80020fc: bf00 nop
- 80020fe: 37b8 adds r7, #184 @ 0xb8
- 8002100: 46bd mov sp, r7
- 8002102: bd80 pop {r7, pc}
- 8002104: 24000834 .word 0x24000834
- 8002108: 24000838 .word 0x24000838
- 800210c: 2400083c .word 0x2400083c
- 8002110: 24000840 .word 0x24000840
- 8002114: 24000820 .word 0x24000820
- 8002118: 24000824 .word 0x24000824
- 800211c: 24000828 .word 0x24000828
- 8002120: 08002151 .word 0x08002151
- 8002124: 2400080c .word 0x2400080c
- 8002128: 080024d9 .word 0x080024d9
- 800212c: 24000810 .word 0x24000810
- 8002130: 080027e1 .word 0x080027e1
- 8002134: 24000814 .word 0x24000814
- 8002138: 2400082c .word 0x2400082c
- 800213c: 08002b5d .word 0x08002b5d
- 8002140: 24000818 .word 0x24000818
- 8002144: 24000830 .word 0x24000830
- 8002148: 08002d4d .word 0x08002d4d
- 800214c: 2400081c .word 0x2400081c
- 08002150 <ADC1MeasTask>:
- void ADC1MeasTask (void* arg) {
- 8002150: b580 push {r7, lr}
- 8002152: b09a sub sp, #104 @ 0x68
- 8002154: af00 add r7, sp, #0
- 8002156: 6078 str r0, [r7, #4]
- float circBuffer[VOLTAGES_COUNT][CIRC_BUFF_LEN] = { 0 };
- 8002158: f107 032c add.w r3, r7, #44 @ 0x2c
- 800215c: 2228 movs r2, #40 @ 0x28
- 800215e: 2100 movs r1, #0
- 8002160: 4618 mov r0, r3
- 8002162: f015 fe20 bl 8017da6 <memset>
- float rms[VOLTAGES_COUNT] = { 0 };
- 8002166: f04f 0300 mov.w r3, #0
- 800216a: 62bb str r3, [r7, #40] @ 0x28
- ;
- ADC1_Data adcData = { 0 };
- 800216c: f107 0308 add.w r3, r7, #8
- 8002170: 2220 movs r2, #32
- 8002172: 2100 movs r1, #0
- 8002174: 4618 mov r0, r3
- 8002176: f015 fe16 bl 8017da6 <memset>
- uint32_t circBuffPos = 0;
- 800217a: 2300 movs r3, #0
- 800217c: 667b str r3, [r7, #100] @ 0x64
- float gainCorrection = 1.0;
- 800217e: f04f 537e mov.w r3, #1065353216 @ 0x3f800000
- 8002182: 663b str r3, [r7, #96] @ 0x60
- while (pdTRUE) {
- osMessageQueueGet (adc1MeasDataQueue, &adcData, 0, osWaitForever);
- 8002184: 4bc8 ldr r3, [pc, #800] @ (80024a8 <ADC1MeasTask+0x358>)
- 8002186: 6818 ldr r0, [r3, #0]
- 8002188: f107 0108 add.w r1, r7, #8
- 800218c: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 8002190: 2200 movs r2, #0
- 8002192: f011 ff1f bl 8013fd4 <osMessageQueueGet>
- #ifdef GAIN_AUTO_CORRECTION
- if (osMutexAcquire (vRefmVMutex, osWaitForever) == osOK) {
- 8002196: 4bc5 ldr r3, [pc, #788] @ (80024ac <ADC1MeasTask+0x35c>)
- 8002198: 681b ldr r3, [r3, #0]
- 800219a: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 800219e: 4618 mov r0, r3
- 80021a0: f011 fdbd bl 8013d1e <osMutexAcquire>
- 80021a4: 4603 mov r3, r0
- 80021a6: 2b00 cmp r3, #0
- 80021a8: d10c bne.n 80021c4 <ADC1MeasTask+0x74>
- gainCorrection = (float)vRefmV;
- 80021aa: 4bc1 ldr r3, [pc, #772] @ (80024b0 <ADC1MeasTask+0x360>)
- 80021ac: 681b ldr r3, [r3, #0]
- 80021ae: ee07 3a90 vmov s15, r3
- 80021b2: eef8 7a67 vcvt.f32.u32 s15, s15
- 80021b6: edc7 7a18 vstr s15, [r7, #96] @ 0x60
- osMutexRelease (vRefmVMutex);
- 80021ba: 4bbc ldr r3, [pc, #752] @ (80024ac <ADC1MeasTask+0x35c>)
- 80021bc: 681b ldr r3, [r3, #0]
- 80021be: 4618 mov r0, r3
- 80021c0: f011 fdf8 bl 8013db4 <osMutexRelease>
- }
- gainCorrection = gainCorrection / EXT_VREF_mV;
- 80021c4: ed97 7a18 vldr s14, [r7, #96] @ 0x60
- 80021c8: eddf 6aba vldr s13, [pc, #744] @ 80024b4 <ADC1MeasTask+0x364>
- 80021cc: eec7 7a26 vdiv.f32 s15, s14, s13
- 80021d0: edc7 7a18 vstr s15, [r7, #96] @ 0x60
- #endif
- for (uint8_t i = 0; i < VOLTAGES_COUNT; i++) {
- 80021d4: 2300 movs r3, #0
- 80021d6: f887 305f strb.w r3, [r7, #95] @ 0x5f
- 80021da: e0e7 b.n 80023ac <ADC1MeasTask+0x25c>
- float val = adcData.adcDataBuffer[i] * deltaADC * U_CHANNEL_CONST * gainCorrection * U_MeasCorrectionData[i].gain + U_MeasCorrectionData[i].offset;
- 80021dc: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 80021e0: 005b lsls r3, r3, #1
- 80021e2: 3368 adds r3, #104 @ 0x68
- 80021e4: 443b add r3, r7
- 80021e6: f833 3c60 ldrh.w r3, [r3, #-96]
- 80021ea: ee07 3a90 vmov s15, r3
- 80021ee: eeb8 7be7 vcvt.f64.s32 d7, s15
- 80021f2: eeb0 6b08 vmov.f64 d6, #8 @ 0x40400000 3.0
- 80021f6: ee27 6b06 vmul.f64 d6, d7, d6
- 80021fa: ed9f 5ba5 vldr d5, [pc, #660] @ 8002490 <ADC1MeasTask+0x340>
- 80021fe: ee86 7b05 vdiv.f64 d7, d6, d5
- 8002202: ed9f 6ba5 vldr d6, [pc, #660] @ 8002498 <ADC1MeasTask+0x348>
- 8002206: ee27 6b06 vmul.f64 d6, d7, d6
- 800220a: edd7 7a18 vldr s15, [r7, #96] @ 0x60
- 800220e: eeb7 7ae7 vcvt.f64.f32 d7, s15
- 8002212: ee26 6b07 vmul.f64 d6, d6, d7
- 8002216: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 800221a: 4aa7 ldr r2, [pc, #668] @ (80024b8 <ADC1MeasTask+0x368>)
- 800221c: 00db lsls r3, r3, #3
- 800221e: 4413 add r3, r2
- 8002220: edd3 7a00 vldr s15, [r3]
- 8002224: eeb7 7ae7 vcvt.f64.f32 d7, s15
- 8002228: ee26 6b07 vmul.f64 d6, d6, d7
- 800222c: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 8002230: 4aa1 ldr r2, [pc, #644] @ (80024b8 <ADC1MeasTask+0x368>)
- 8002232: 00db lsls r3, r3, #3
- 8002234: 4413 add r3, r2
- 8002236: 3304 adds r3, #4
- 8002238: edd3 7a00 vldr s15, [r3]
- 800223c: eeb7 7ae7 vcvt.f64.f32 d7, s15
- 8002240: ee36 7b07 vadd.f64 d7, d6, d7
- 8002244: eef7 7bc7 vcvt.f32.f64 s15, d7
- 8002248: edc7 7a15 vstr s15, [r7, #84] @ 0x54
- circBuffer[i][circBuffPos] = val;
- 800224c: f897 205f ldrb.w r2, [r7, #95] @ 0x5f
- 8002250: 4613 mov r3, r2
- 8002252: 009b lsls r3, r3, #2
- 8002254: 4413 add r3, r2
- 8002256: 005b lsls r3, r3, #1
- 8002258: 6e7a ldr r2, [r7, #100] @ 0x64
- 800225a: 4413 add r3, r2
- 800225c: 009b lsls r3, r3, #2
- 800225e: 3368 adds r3, #104 @ 0x68
- 8002260: 443b add r3, r7
- 8002262: 3b3c subs r3, #60 @ 0x3c
- 8002264: 6d7a ldr r2, [r7, #84] @ 0x54
- 8002266: 601a str r2, [r3, #0]
- rms[i] = 0.0;
- 8002268: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 800226c: 009b lsls r3, r3, #2
- 800226e: 3368 adds r3, #104 @ 0x68
- 8002270: 443b add r3, r7
- 8002272: 3b40 subs r3, #64 @ 0x40
- 8002274: f04f 0200 mov.w r2, #0
- 8002278: 601a str r2, [r3, #0]
- for (uint8_t c = 0; c < CIRC_BUFF_LEN; c++) {
- 800227a: 2300 movs r3, #0
- 800227c: f887 305e strb.w r3, [r7, #94] @ 0x5e
- 8002280: e025 b.n 80022ce <ADC1MeasTask+0x17e>
- rms[i] += circBuffer[i][c];
- 8002282: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 8002286: 009b lsls r3, r3, #2
- 8002288: 3368 adds r3, #104 @ 0x68
- 800228a: 443b add r3, r7
- 800228c: 3b40 subs r3, #64 @ 0x40
- 800228e: ed93 7a00 vldr s14, [r3]
- 8002292: f897 205f ldrb.w r2, [r7, #95] @ 0x5f
- 8002296: f897 105e ldrb.w r1, [r7, #94] @ 0x5e
- 800229a: 4613 mov r3, r2
- 800229c: 009b lsls r3, r3, #2
- 800229e: 4413 add r3, r2
- 80022a0: 005b lsls r3, r3, #1
- 80022a2: 440b add r3, r1
- 80022a4: 009b lsls r3, r3, #2
- 80022a6: 3368 adds r3, #104 @ 0x68
- 80022a8: 443b add r3, r7
- 80022aa: 3b3c subs r3, #60 @ 0x3c
- 80022ac: edd3 7a00 vldr s15, [r3]
- 80022b0: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 80022b4: ee77 7a27 vadd.f32 s15, s14, s15
- 80022b8: 009b lsls r3, r3, #2
- 80022ba: 3368 adds r3, #104 @ 0x68
- 80022bc: 443b add r3, r7
- 80022be: 3b40 subs r3, #64 @ 0x40
- 80022c0: edc3 7a00 vstr s15, [r3]
- for (uint8_t c = 0; c < CIRC_BUFF_LEN; c++) {
- 80022c4: f897 305e ldrb.w r3, [r7, #94] @ 0x5e
- 80022c8: 3301 adds r3, #1
- 80022ca: f887 305e strb.w r3, [r7, #94] @ 0x5e
- 80022ce: f897 305e ldrb.w r3, [r7, #94] @ 0x5e
- 80022d2: 2b09 cmp r3, #9
- 80022d4: d9d5 bls.n 8002282 <ADC1MeasTask+0x132>
- }
- rms[i] = rms[i] / CIRC_BUFF_LEN;
- 80022d6: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 80022da: 009b lsls r3, r3, #2
- 80022dc: 3368 adds r3, #104 @ 0x68
- 80022de: 443b add r3, r7
- 80022e0: 3b40 subs r3, #64 @ 0x40
- 80022e2: ed93 7a00 vldr s14, [r3]
- 80022e6: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 80022ea: eef2 6a04 vmov.f32 s13, #36 @ 0x41200000 10.0
- 80022ee: eec7 7a26 vdiv.f32 s15, s14, s13
- 80022f2: 009b lsls r3, r3, #2
- 80022f4: 3368 adds r3, #104 @ 0x68
- 80022f6: 443b add r3, r7
- 80022f8: 3b40 subs r3, #64 @ 0x40
- 80022fa: edc3 7a00 vstr s15, [r3]
- if (osMutexAcquire (resMeasurementsMutex, osWaitForever) == osOK) {
- 80022fe: 4b6f ldr r3, [pc, #444] @ (80024bc <ADC1MeasTask+0x36c>)
- 8002300: 681b ldr r3, [r3, #0]
- 8002302: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8002306: 4618 mov r0, r3
- 8002308: f011 fd09 bl 8013d1e <osMutexAcquire>
- 800230c: 4603 mov r3, r0
- 800230e: 2b00 cmp r3, #0
- 8002310: d147 bne.n 80023a2 <ADC1MeasTask+0x252>
- if (fabs (resMeasurements.voltagePeak[i]) < fabs (val)) {
- 8002312: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 8002316: 4a6a ldr r2, [pc, #424] @ (80024c0 <ADC1MeasTask+0x370>)
- 8002318: 3302 adds r3, #2
- 800231a: 009b lsls r3, r3, #2
- 800231c: 4413 add r3, r2
- 800231e: 3304 adds r3, #4
- 8002320: edd3 7a00 vldr s15, [r3]
- 8002324: eeb0 7ae7 vabs.f32 s14, s15
- 8002328: edd7 7a15 vldr s15, [r7, #84] @ 0x54
- 800232c: eef0 7ae7 vabs.f32 s15, s15
- 8002330: eeb4 7ae7 vcmpe.f32 s14, s15
- 8002334: eef1 fa10 vmrs APSR_nzcv, fpscr
- 8002338: d508 bpl.n 800234c <ADC1MeasTask+0x1fc>
- resMeasurements.voltagePeak[i] = val;
- 800233a: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 800233e: 4a60 ldr r2, [pc, #384] @ (80024c0 <ADC1MeasTask+0x370>)
- 8002340: 3302 adds r3, #2
- 8002342: 009b lsls r3, r3, #2
- 8002344: 4413 add r3, r2
- 8002346: 3304 adds r3, #4
- 8002348: 6d7a ldr r2, [r7, #84] @ 0x54
- 800234a: 601a str r2, [r3, #0]
- }
- resMeasurements.voltageRMS[i] = rms[i];
- 800234c: f897 205f ldrb.w r2, [r7, #95] @ 0x5f
- 8002350: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 8002354: 0092 lsls r2, r2, #2
- 8002356: 3268 adds r2, #104 @ 0x68
- 8002358: 443a add r2, r7
- 800235a: 3a40 subs r2, #64 @ 0x40
- 800235c: 6812 ldr r2, [r2, #0]
- 800235e: 4958 ldr r1, [pc, #352] @ (80024c0 <ADC1MeasTask+0x370>)
- 8002360: 009b lsls r3, r3, #2
- 8002362: 440b add r3, r1
- 8002364: 601a str r2, [r3, #0]
- resMeasurements.power[i] = resMeasurements.voltageRMS[i] * resMeasurements.currentRMS[i];
- 8002366: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 800236a: 4a55 ldr r2, [pc, #340] @ (80024c0 <ADC1MeasTask+0x370>)
- 800236c: 009b lsls r3, r3, #2
- 800236e: 4413 add r3, r2
- 8002370: ed93 7a00 vldr s14, [r3]
- 8002374: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 8002378: 4a51 ldr r2, [pc, #324] @ (80024c0 <ADC1MeasTask+0x370>)
- 800237a: 3306 adds r3, #6
- 800237c: 009b lsls r3, r3, #2
- 800237e: 4413 add r3, r2
- 8002380: edd3 7a00 vldr s15, [r3]
- 8002384: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 8002388: ee67 7a27 vmul.f32 s15, s14, s15
- 800238c: 4a4c ldr r2, [pc, #304] @ (80024c0 <ADC1MeasTask+0x370>)
- 800238e: 330c adds r3, #12
- 8002390: 009b lsls r3, r3, #2
- 8002392: 4413 add r3, r2
- 8002394: edc3 7a00 vstr s15, [r3]
- osMutexRelease (resMeasurementsMutex);
- 8002398: 4b48 ldr r3, [pc, #288] @ (80024bc <ADC1MeasTask+0x36c>)
- 800239a: 681b ldr r3, [r3, #0]
- 800239c: 4618 mov r0, r3
- 800239e: f011 fd09 bl 8013db4 <osMutexRelease>
- for (uint8_t i = 0; i < VOLTAGES_COUNT; i++) {
- 80023a2: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 80023a6: 3301 adds r3, #1
- 80023a8: f887 305f strb.w r3, [r7, #95] @ 0x5f
- 80023ac: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
- 80023b0: 2b00 cmp r3, #0
- 80023b2: f43f af13 beq.w 80021dc <ADC1MeasTask+0x8c>
- }
- }
- ++circBuffPos;
- 80023b6: 6e7b ldr r3, [r7, #100] @ 0x64
- 80023b8: 3301 adds r3, #1
- 80023ba: 667b str r3, [r7, #100] @ 0x64
- circBuffPos = circBuffPos % CIRC_BUFF_LEN;
- 80023bc: 6e7a ldr r2, [r7, #100] @ 0x64
- 80023be: 4b41 ldr r3, [pc, #260] @ (80024c4 <ADC1MeasTask+0x374>)
- 80023c0: fba3 1302 umull r1, r3, r3, r2
- 80023c4: 08d9 lsrs r1, r3, #3
- 80023c6: 460b mov r3, r1
- 80023c8: 009b lsls r3, r3, #2
- 80023ca: 440b add r3, r1
- 80023cc: 005b lsls r3, r3, #1
- 80023ce: 1ad3 subs r3, r2, r3
- 80023d0: 667b str r3, [r7, #100] @ 0x64
- if (osMutexAcquire (ILxRefMutex, osWaitForever) == osOK) {
- 80023d2: 4b3d ldr r3, [pc, #244] @ (80024c8 <ADC1MeasTask+0x378>)
- 80023d4: 681b ldr r3, [r3, #0]
- 80023d6: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 80023da: 4618 mov r0, r3
- 80023dc: f011 fc9f bl 8013d1e <osMutexAcquire>
- 80023e0: 4603 mov r3, r0
- 80023e2: 2b00 cmp r3, #0
- 80023e4: d124 bne.n 8002430 <ADC1MeasTask+0x2e0>
- uint8_t refIdx = 0;
- 80023e6: 2300 movs r3, #0
- 80023e8: f887 305d strb.w r3, [r7, #93] @ 0x5d
- for (uint8_t i = (uint8_t)IL1Ref; i <= (uint8_t)IL3Ref; i++) {
- 80023ec: 2303 movs r3, #3
- 80023ee: f887 305c strb.w r3, [r7, #92] @ 0x5c
- 80023f2: e014 b.n 800241e <ADC1MeasTask+0x2ce>
- ILxRef[refIdx++] = adcData.adcDataBuffer[i];
- 80023f4: f897 205c ldrb.w r2, [r7, #92] @ 0x5c
- 80023f8: f897 305d ldrb.w r3, [r7, #93] @ 0x5d
- 80023fc: 1c59 adds r1, r3, #1
- 80023fe: f887 105d strb.w r1, [r7, #93] @ 0x5d
- 8002402: 4619 mov r1, r3
- 8002404: 0053 lsls r3, r2, #1
- 8002406: 3368 adds r3, #104 @ 0x68
- 8002408: 443b add r3, r7
- 800240a: f833 2c60 ldrh.w r2, [r3, #-96]
- 800240e: 4b2f ldr r3, [pc, #188] @ (80024cc <ADC1MeasTask+0x37c>)
- 8002410: f823 2011 strh.w r2, [r3, r1, lsl #1]
- for (uint8_t i = (uint8_t)IL1Ref; i <= (uint8_t)IL3Ref; i++) {
- 8002414: f897 305c ldrb.w r3, [r7, #92] @ 0x5c
- 8002418: 3301 adds r3, #1
- 800241a: f887 305c strb.w r3, [r7, #92] @ 0x5c
- 800241e: f897 305c ldrb.w r3, [r7, #92] @ 0x5c
- 8002422: 2b05 cmp r3, #5
- 8002424: d9e6 bls.n 80023f4 <ADC1MeasTask+0x2a4>
- }
- osMutexRelease (ILxRefMutex);
- 8002426: 4b28 ldr r3, [pc, #160] @ (80024c8 <ADC1MeasTask+0x378>)
- 8002428: 681b ldr r3, [r3, #0]
- 800242a: 4618 mov r0, r3
- 800242c: f011 fcc2 bl 8013db4 <osMutexRelease>
- }
- float fanFBVoltage = adcData.adcDataBuffer[FanFB] * deltaADC * -4.35 + 12;
- 8002430: 8abb ldrh r3, [r7, #20]
- 8002432: ee07 3a90 vmov s15, r3
- 8002436: eeb8 7be7 vcvt.f64.s32 d7, s15
- 800243a: eeb0 6b08 vmov.f64 d6, #8 @ 0x40400000 3.0
- 800243e: ee27 6b06 vmul.f64 d6, d7, d6
- 8002442: ed9f 5b13 vldr d5, [pc, #76] @ 8002490 <ADC1MeasTask+0x340>
- 8002446: ee86 7b05 vdiv.f64 d7, d6, d5
- 800244a: ed9f 6b15 vldr d6, [pc, #84] @ 80024a0 <ADC1MeasTask+0x350>
- 800244e: ee27 7b06 vmul.f64 d7, d7, d6
- 8002452: eeb2 6b08 vmov.f64 d6, #40 @ 0x41400000 12.0
- 8002456: ee37 7b06 vadd.f64 d7, d7, d6
- 800245a: eef7 7bc7 vcvt.f32.f64 s15, d7
- 800245e: edc7 7a16 vstr s15, [r7, #88] @ 0x58
- if (osMutexAcquire (sensorsInfoMutex, osWaitForever) == osOK) {
- 8002462: 4b1b ldr r3, [pc, #108] @ (80024d0 <ADC1MeasTask+0x380>)
- 8002464: 681b ldr r3, [r3, #0]
- 8002466: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 800246a: 4618 mov r0, r3
- 800246c: f011 fc57 bl 8013d1e <osMutexAcquire>
- 8002470: 4603 mov r3, r0
- 8002472: 2b00 cmp r3, #0
- 8002474: f47f ae86 bne.w 8002184 <ADC1MeasTask+0x34>
- sensorsInfo.fanVoltage = fanFBVoltage;
- 8002478: 4a16 ldr r2, [pc, #88] @ (80024d4 <ADC1MeasTask+0x384>)
- 800247a: 6dbb ldr r3, [r7, #88] @ 0x58
- 800247c: 6093 str r3, [r2, #8]
- osMutexRelease (sensorsInfoMutex);
- 800247e: 4b14 ldr r3, [pc, #80] @ (80024d0 <ADC1MeasTask+0x380>)
- 8002480: 681b ldr r3, [r3, #0]
- 8002482: 4618 mov r0, r3
- 8002484: f011 fc96 bl 8013db4 <osMutexRelease>
- while (pdTRUE) {
- 8002488: e67c b.n 8002184 <ADC1MeasTask+0x34>
- 800248a: bf00 nop
- 800248c: f3af 8000 nop.w
- 8002490: 00000000 .word 0x00000000
- 8002494: 40efffe0 .word 0x40efffe0
- 8002498: f5c28f5c .word 0xf5c28f5c
- 800249c: 401e5c28 .word 0x401e5c28
- 80024a0: 66666666 .word 0x66666666
- 80024a4: c0116666 .word 0xc0116666
- 80024a8: 24000820 .word 0x24000820
- 80024ac: 24000834 .word 0x24000834
- 80024b0: 24000030 .word 0x24000030
- 80024b4: 453b8000 .word 0x453b8000
- 80024b8: 24000000 .word 0x24000000
- 80024bc: 24000838 .word 0x24000838
- 80024c0: 24000844 .word 0x24000844
- 80024c4: cccccccd .word 0xcccccccd
- 80024c8: 24000840 .word 0x24000840
- 80024cc: 240008b0 .word 0x240008b0
- 80024d0: 2400083c .word 0x2400083c
- 80024d4: 24000880 .word 0x24000880
- 080024d8 <ADC2MeasTask>:
- }
- }
- }
- void ADC2MeasTask (void* arg) {
- 80024d8: b580 push {r7, lr}
- 80024da: b09c sub sp, #112 @ 0x70
- 80024dc: af00 add r7, sp, #0
- 80024de: 6078 str r0, [r7, #4]
- float circBuffer[CURRENTS_COUNT][CIRC_BUFF_LEN] = { 0 };
- 80024e0: f107 0334 add.w r3, r7, #52 @ 0x34
- 80024e4: 2228 movs r2, #40 @ 0x28
- 80024e6: 2100 movs r1, #0
- 80024e8: 4618 mov r0, r3
- 80024ea: f015 fc5c bl 8017da6 <memset>
- float rms[CURRENTS_COUNT] = { 0 };
- 80024ee: f04f 0300 mov.w r3, #0
- 80024f2: 633b str r3, [r7, #48] @ 0x30
- ADC2_Data adcData = { 0 };
- 80024f4: f107 0310 add.w r3, r7, #16
- 80024f8: 2220 movs r2, #32
- 80024fa: 2100 movs r1, #0
- 80024fc: 4618 mov r0, r3
- 80024fe: f015 fc52 bl 8017da6 <memset>
- uint32_t circBuffPos = 0;
- 8002502: 2300 movs r3, #0
- 8002504: 66fb str r3, [r7, #108] @ 0x6c
- float gainCorrection = 1.0;
- 8002506: f04f 537e mov.w r3, #1065353216 @ 0x3f800000
- 800250a: 66bb str r3, [r7, #104] @ 0x68
- while (pdTRUE) {
- osMessageQueueGet (adc2MeasDataQueue, &adcData, 0, osWaitForever);
- 800250c: 4baa ldr r3, [pc, #680] @ (80027b8 <ADC2MeasTask+0x2e0>)
- 800250e: 6818 ldr r0, [r3, #0]
- 8002510: f107 0110 add.w r1, r7, #16
- 8002514: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 8002518: 2200 movs r2, #0
- 800251a: f011 fd5b bl 8013fd4 <osMessageQueueGet>
- if (osMutexAcquire (vRefmVMutex, osWaitForever) == osOK) {
- 800251e: 4ba7 ldr r3, [pc, #668] @ (80027bc <ADC2MeasTask+0x2e4>)
- 8002520: 681b ldr r3, [r3, #0]
- 8002522: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8002526: 4618 mov r0, r3
- 8002528: f011 fbf9 bl 8013d1e <osMutexAcquire>
- 800252c: 4603 mov r3, r0
- 800252e: 2b00 cmp r3, #0
- 8002530: d10c bne.n 800254c <ADC2MeasTask+0x74>
- gainCorrection = (float)vRefmV;
- 8002532: 4ba3 ldr r3, [pc, #652] @ (80027c0 <ADC2MeasTask+0x2e8>)
- 8002534: 681b ldr r3, [r3, #0]
- 8002536: ee07 3a90 vmov s15, r3
- 800253a: eef8 7a67 vcvt.f32.u32 s15, s15
- 800253e: edc7 7a1a vstr s15, [r7, #104] @ 0x68
- osMutexRelease (vRefmVMutex);
- 8002542: 4b9e ldr r3, [pc, #632] @ (80027bc <ADC2MeasTask+0x2e4>)
- 8002544: 681b ldr r3, [r3, #0]
- 8002546: 4618 mov r0, r3
- 8002548: f011 fc34 bl 8013db4 <osMutexRelease>
- }
- gainCorrection = gainCorrection / EXT_VREF_mV;
- 800254c: ed97 7a1a vldr s14, [r7, #104] @ 0x68
- 8002550: eddf 6a9c vldr s13, [pc, #624] @ 80027c4 <ADC2MeasTask+0x2ec>
- 8002554: eec7 7a26 vdiv.f32 s15, s14, s13
- 8002558: edc7 7a1a vstr s15, [r7, #104] @ 0x68
- float ref[CURRENTS_COUNT] = { 0 };
- 800255c: f04f 0300 mov.w r3, #0
- 8002560: 60fb str r3, [r7, #12]
- if (osMutexAcquire (ILxRefMutex, osWaitForever) == osOK) {
- 8002562: 4b99 ldr r3, [pc, #612] @ (80027c8 <ADC2MeasTask+0x2f0>)
- 8002564: 681b ldr r3, [r3, #0]
- 8002566: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 800256a: 4618 mov r0, r3
- 800256c: f011 fbd7 bl 8013d1e <osMutexAcquire>
- 8002570: 4603 mov r3, r0
- 8002572: 2b00 cmp r3, #0
- 8002574: d122 bne.n 80025bc <ADC2MeasTask+0xe4>
- for (uint8_t i = 0; i < CURRENTS_COUNT; i++) {
- 8002576: 2300 movs r3, #0
- 8002578: f887 3067 strb.w r3, [r7, #103] @ 0x67
- 800257c: e015 b.n 80025aa <ADC2MeasTask+0xd2>
- ref[i] = (float)ILxRef[i];
- 800257e: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
- 8002582: 4a92 ldr r2, [pc, #584] @ (80027cc <ADC2MeasTask+0x2f4>)
- 8002584: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
- 8002588: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
- 800258c: ee07 2a90 vmov s15, r2
- 8002590: eef8 7a67 vcvt.f32.u32 s15, s15
- 8002594: 009b lsls r3, r3, #2
- 8002596: 3370 adds r3, #112 @ 0x70
- 8002598: 443b add r3, r7
- 800259a: 3b64 subs r3, #100 @ 0x64
- 800259c: edc3 7a00 vstr s15, [r3]
- for (uint8_t i = 0; i < CURRENTS_COUNT; i++) {
- 80025a0: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
- 80025a4: 3301 adds r3, #1
- 80025a6: f887 3067 strb.w r3, [r7, #103] @ 0x67
- 80025aa: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
- 80025ae: 2b00 cmp r3, #0
- 80025b0: d0e5 beq.n 800257e <ADC2MeasTask+0xa6>
- }
- osMutexRelease (ILxRefMutex);
- 80025b2: 4b85 ldr r3, [pc, #532] @ (80027c8 <ADC2MeasTask+0x2f0>)
- 80025b4: 681b ldr r3, [r3, #0]
- 80025b6: 4618 mov r0, r3
- 80025b8: f011 fbfc bl 8013db4 <osMutexRelease>
- }
- for (uint8_t i = 0; i < CURRENTS_COUNT; i++) {
- 80025bc: 2300 movs r3, #0
- 80025be: f887 3066 strb.w r3, [r7, #102] @ 0x66
- 80025c2: e0db b.n 800277c <ADC2MeasTask+0x2a4>
- float adcVal = (float)adcData.adcDataBuffer[i];
- 80025c4: f897 3066 ldrb.w r3, [r7, #102] @ 0x66
- 80025c8: 005b lsls r3, r3, #1
- 80025ca: 3370 adds r3, #112 @ 0x70
- 80025cc: 443b add r3, r7
- 80025ce: f833 3c60 ldrh.w r3, [r3, #-96]
- 80025d2: ee07 3a90 vmov s15, r3
- 80025d6: eef8 7a67 vcvt.f32.u32 s15, s15
- 80025da: edc7 7a18 vstr s15, [r7, #96] @ 0x60
- float val = (adcVal - ref[i]) * deltaADC * I_CHANNEL_CONST * gainCorrection * I_MeasCorrectionData[i].gain + I_MeasCorrectionData[i].offset;
- 80025de: f897 3066 ldrb.w r3, [r7, #102] @ 0x66
- 80025e2: 009b lsls r3, r3, #2
- 80025e4: 3370 adds r3, #112 @ 0x70
- 80025e6: 443b add r3, r7
- 80025e8: 3b64 subs r3, #100 @ 0x64
- 80025ea: edd3 7a00 vldr s15, [r3]
- 80025ee: ed97 7a18 vldr s14, [r7, #96] @ 0x60
- 80025f2: ee77 7a67 vsub.f32 s15, s14, s15
- 80025f6: eeb7 7ae7 vcvt.f64.f32 d7, s15
- 80025fa: eeb0 6b08 vmov.f64 d6, #8 @ 0x40400000 3.0
- 80025fe: ee27 6b06 vmul.f64 d6, d7, d6
- 8002602: ed9f 5b69 vldr d5, [pc, #420] @ 80027a8 <ADC2MeasTask+0x2d0>
- 8002606: ee86 7b05 vdiv.f64 d7, d6, d5
- 800260a: ed9f 6b69 vldr d6, [pc, #420] @ 80027b0 <ADC2MeasTask+0x2d8>
- 800260e: ee27 6b06 vmul.f64 d6, d7, d6
- 8002612: edd7 7a1a vldr s15, [r7, #104] @ 0x68
- 8002616: eeb7 7ae7 vcvt.f64.f32 d7, s15
- 800261a: ee26 6b07 vmul.f64 d6, d6, d7
- 800261e: f897 3066 ldrb.w r3, [r7, #102] @ 0x66
- 8002622: 4a6b ldr r2, [pc, #428] @ (80027d0 <ADC2MeasTask+0x2f8>)
- 8002624: 00db lsls r3, r3, #3
- 8002626: 4413 add r3, r2
- 8002628: edd3 7a00 vldr s15, [r3]
- 800262c: eeb7 7ae7 vcvt.f64.f32 d7, s15
- 8002630: ee26 6b07 vmul.f64 d6, d6, d7
- 8002634: f897 3066 ldrb.w r3, [r7, #102] @ 0x66
- 8002638: 4a65 ldr r2, [pc, #404] @ (80027d0 <ADC2MeasTask+0x2f8>)
- 800263a: 00db lsls r3, r3, #3
- 800263c: 4413 add r3, r2
- 800263e: 3304 adds r3, #4
- 8002640: edd3 7a00 vldr s15, [r3]
- 8002644: eeb7 7ae7 vcvt.f64.f32 d7, s15
- 8002648: ee36 7b07 vadd.f64 d7, d6, d7
- 800264c: eef7 7bc7 vcvt.f32.f64 s15, d7
- 8002650: edc7 7a17 vstr s15, [r7, #92] @ 0x5c
- circBuffer[i][circBuffPos] = val;
- 8002654: f897 2066 ldrb.w r2, [r7, #102] @ 0x66
- 8002658: 4613 mov r3, r2
- 800265a: 009b lsls r3, r3, #2
- 800265c: 4413 add r3, r2
- 800265e: 005b lsls r3, r3, #1
- 8002660: 6efa ldr r2, [r7, #108] @ 0x6c
- 8002662: 4413 add r3, r2
- 8002664: 009b lsls r3, r3, #2
- 8002666: 3370 adds r3, #112 @ 0x70
- 8002668: 443b add r3, r7
- 800266a: 3b3c subs r3, #60 @ 0x3c
- 800266c: 6dfa ldr r2, [r7, #92] @ 0x5c
- 800266e: 601a str r2, [r3, #0]
- rms[i] = 0.0;
- 8002670: f897 3066 ldrb.w r3, [r7, #102] @ 0x66
- 8002674: 009b lsls r3, r3, #2
- 8002676: 3370 adds r3, #112 @ 0x70
- 8002678: 443b add r3, r7
- 800267a: 3b40 subs r3, #64 @ 0x40
- 800267c: f04f 0200 mov.w r2, #0
- 8002680: 601a str r2, [r3, #0]
- for (uint8_t c = 0; c < CIRC_BUFF_LEN; c++) {
- 8002682: 2300 movs r3, #0
- 8002684: f887 3065 strb.w r3, [r7, #101] @ 0x65
- 8002688: e025 b.n 80026d6 <ADC2MeasTask+0x1fe>
- rms[i] += circBuffer[i][c];
- 800268a: f897 3066 ldrb.w r3, [r7, #102] @ 0x66
- 800268e: 009b lsls r3, r3, #2
- 8002690: 3370 adds r3, #112 @ 0x70
- 8002692: 443b add r3, r7
- 8002694: 3b40 subs r3, #64 @ 0x40
- 8002696: ed93 7a00 vldr s14, [r3]
- 800269a: f897 2066 ldrb.w r2, [r7, #102] @ 0x66
- 800269e: f897 1065 ldrb.w r1, [r7, #101] @ 0x65
- 80026a2: 4613 mov r3, r2
- 80026a4: 009b lsls r3, r3, #2
- 80026a6: 4413 add r3, r2
- 80026a8: 005b lsls r3, r3, #1
- 80026aa: 440b add r3, r1
- 80026ac: 009b lsls r3, r3, #2
- 80026ae: 3370 adds r3, #112 @ 0x70
- 80026b0: 443b add r3, r7
- 80026b2: 3b3c subs r3, #60 @ 0x3c
- 80026b4: edd3 7a00 vldr s15, [r3]
- 80026b8: f897 3066 ldrb.w r3, [r7, #102] @ 0x66
- 80026bc: ee77 7a27 vadd.f32 s15, s14, s15
- 80026c0: 009b lsls r3, r3, #2
- 80026c2: 3370 adds r3, #112 @ 0x70
- 80026c4: 443b add r3, r7
- 80026c6: 3b40 subs r3, #64 @ 0x40
- 80026c8: edc3 7a00 vstr s15, [r3]
- for (uint8_t c = 0; c < CIRC_BUFF_LEN; c++) {
- 80026cc: f897 3065 ldrb.w r3, [r7, #101] @ 0x65
- 80026d0: 3301 adds r3, #1
- 80026d2: f887 3065 strb.w r3, [r7, #101] @ 0x65
- 80026d6: f897 3065 ldrb.w r3, [r7, #101] @ 0x65
- 80026da: 2b09 cmp r3, #9
- 80026dc: d9d5 bls.n 800268a <ADC2MeasTask+0x1b2>
- }
- rms[i] = rms[i] / CIRC_BUFF_LEN;
- 80026de: f897 3066 ldrb.w r3, [r7, #102] @ 0x66
- 80026e2: 009b lsls r3, r3, #2
- 80026e4: 3370 adds r3, #112 @ 0x70
- 80026e6: 443b add r3, r7
- 80026e8: 3b40 subs r3, #64 @ 0x40
- 80026ea: ed93 7a00 vldr s14, [r3]
- 80026ee: f897 3066 ldrb.w r3, [r7, #102] @ 0x66
- 80026f2: eef2 6a04 vmov.f32 s13, #36 @ 0x41200000 10.0
- 80026f6: eec7 7a26 vdiv.f32 s15, s14, s13
- 80026fa: 009b lsls r3, r3, #2
- 80026fc: 3370 adds r3, #112 @ 0x70
- 80026fe: 443b add r3, r7
- 8002700: 3b40 subs r3, #64 @ 0x40
- 8002702: edc3 7a00 vstr s15, [r3]
- if (osMutexAcquire (resMeasurementsMutex, osWaitForever) == osOK) {
- 8002706: 4b33 ldr r3, [pc, #204] @ (80027d4 <ADC2MeasTask+0x2fc>)
- 8002708: 681b ldr r3, [r3, #0]
- 800270a: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 800270e: 4618 mov r0, r3
- 8002710: f011 fb05 bl 8013d1e <osMutexAcquire>
- 8002714: 4603 mov r3, r0
- 8002716: 2b00 cmp r3, #0
- 8002718: d12b bne.n 8002772 <ADC2MeasTask+0x29a>
- if (resMeasurements.currentPeak[i] < val) {
- 800271a: f897 3066 ldrb.w r3, [r7, #102] @ 0x66
- 800271e: 4a2e ldr r2, [pc, #184] @ (80027d8 <ADC2MeasTask+0x300>)
- 8002720: 3308 adds r3, #8
- 8002722: 009b lsls r3, r3, #2
- 8002724: 4413 add r3, r2
- 8002726: 3304 adds r3, #4
- 8002728: edd3 7a00 vldr s15, [r3]
- 800272c: ed97 7a17 vldr s14, [r7, #92] @ 0x5c
- 8002730: eeb4 7ae7 vcmpe.f32 s14, s15
- 8002734: eef1 fa10 vmrs APSR_nzcv, fpscr
- 8002738: dd08 ble.n 800274c <ADC2MeasTask+0x274>
- resMeasurements.currentPeak[i] = val;
- 800273a: f897 3066 ldrb.w r3, [r7, #102] @ 0x66
- 800273e: 4a26 ldr r2, [pc, #152] @ (80027d8 <ADC2MeasTask+0x300>)
- 8002740: 3308 adds r3, #8
- 8002742: 009b lsls r3, r3, #2
- 8002744: 4413 add r3, r2
- 8002746: 3304 adds r3, #4
- 8002748: 6dfa ldr r2, [r7, #92] @ 0x5c
- 800274a: 601a str r2, [r3, #0]
- }
- resMeasurements.currentRMS[i] = rms[i];
- 800274c: f897 2066 ldrb.w r2, [r7, #102] @ 0x66
- 8002750: f897 3066 ldrb.w r3, [r7, #102] @ 0x66
- 8002754: 0092 lsls r2, r2, #2
- 8002756: 3270 adds r2, #112 @ 0x70
- 8002758: 443a add r2, r7
- 800275a: 3a40 subs r2, #64 @ 0x40
- 800275c: 6812 ldr r2, [r2, #0]
- 800275e: 491e ldr r1, [pc, #120] @ (80027d8 <ADC2MeasTask+0x300>)
- 8002760: 3306 adds r3, #6
- 8002762: 009b lsls r3, r3, #2
- 8002764: 440b add r3, r1
- 8002766: 601a str r2, [r3, #0]
- osMutexRelease (resMeasurementsMutex);
- 8002768: 4b1a ldr r3, [pc, #104] @ (80027d4 <ADC2MeasTask+0x2fc>)
- 800276a: 681b ldr r3, [r3, #0]
- 800276c: 4618 mov r0, r3
- 800276e: f011 fb21 bl 8013db4 <osMutexRelease>
- for (uint8_t i = 0; i < CURRENTS_COUNT; i++) {
- 8002772: f897 3066 ldrb.w r3, [r7, #102] @ 0x66
- 8002776: 3301 adds r3, #1
- 8002778: f887 3066 strb.w r3, [r7, #102] @ 0x66
- 800277c: f897 3066 ldrb.w r3, [r7, #102] @ 0x66
- 8002780: 2b00 cmp r3, #0
- 8002782: f43f af1f beq.w 80025c4 <ADC2MeasTask+0xec>
- }
- }
- ++circBuffPos;
- 8002786: 6efb ldr r3, [r7, #108] @ 0x6c
- 8002788: 3301 adds r3, #1
- 800278a: 66fb str r3, [r7, #108] @ 0x6c
- circBuffPos = circBuffPos % CIRC_BUFF_LEN;
- 800278c: 6efa ldr r2, [r7, #108] @ 0x6c
- 800278e: 4b13 ldr r3, [pc, #76] @ (80027dc <ADC2MeasTask+0x304>)
- 8002790: fba3 1302 umull r1, r3, r3, r2
- 8002794: 08d9 lsrs r1, r3, #3
- 8002796: 460b mov r3, r1
- 8002798: 009b lsls r3, r3, #2
- 800279a: 440b add r3, r1
- 800279c: 005b lsls r3, r3, #1
- 800279e: 1ad3 subs r3, r2, r3
- 80027a0: 66fb str r3, [r7, #108] @ 0x6c
- while (pdTRUE) {
- 80027a2: e6b3 b.n 800250c <ADC2MeasTask+0x34>
- 80027a4: f3af 8000 nop.w
- 80027a8: 00000000 .word 0x00000000
- 80027ac: 40efffe0 .word 0x40efffe0
- 80027b0: 83e425af .word 0x83e425af
- 80027b4: 401e4d9e .word 0x401e4d9e
- 80027b8: 24000824 .word 0x24000824
- 80027bc: 24000834 .word 0x24000834
- 80027c0: 24000030 .word 0x24000030
- 80027c4: 453b8000 .word 0x453b8000
- 80027c8: 24000840 .word 0x24000840
- 80027cc: 240008b0 .word 0x240008b0
- 80027d0: 24000018 .word 0x24000018
- 80027d4: 24000838 .word 0x24000838
- 80027d8: 24000844 .word 0x24000844
- 80027dc: cccccccd .word 0xcccccccd
- 080027e0 <ADC3MeasTask>:
- }
- }
- void ADC3MeasTask (void* arg) {
- 80027e0: b580 push {r7, lr}
- 80027e2: b0bc sub sp, #240 @ 0xf0
- 80027e4: af00 add r7, sp, #0
- 80027e6: 6078 str r0, [r7, #4]
- float motorXSensCircBuffer[CIRC_BUFF_LEN] = { 0 };
- 80027e8: f107 03a4 add.w r3, r7, #164 @ 0xa4
- 80027ec: 2228 movs r2, #40 @ 0x28
- 80027ee: 2100 movs r1, #0
- 80027f0: 4618 mov r0, r3
- 80027f2: f015 fad8 bl 8017da6 <memset>
- float motorYSensCircBuffer[CIRC_BUFF_LEN] = { 0 };
- 80027f6: f107 037c add.w r3, r7, #124 @ 0x7c
- 80027fa: 2228 movs r2, #40 @ 0x28
- 80027fc: 2100 movs r1, #0
- 80027fe: 4618 mov r0, r3
- 8002800: f015 fad1 bl 8017da6 <memset>
- float pvT1CircBuffer[CIRC_BUFF_LEN] = { 0 };
- 8002804: f107 0354 add.w r3, r7, #84 @ 0x54
- 8002808: 2228 movs r2, #40 @ 0x28
- 800280a: 2100 movs r1, #0
- 800280c: 4618 mov r0, r3
- 800280e: f015 faca bl 8017da6 <memset>
- float pvT2CircBuffer[CIRC_BUFF_LEN] = { 0 };
- 8002812: f107 032c add.w r3, r7, #44 @ 0x2c
- 8002816: 2228 movs r2, #40 @ 0x28
- 8002818: 2100 movs r1, #0
- 800281a: 4618 mov r0, r3
- 800281c: f015 fac3 bl 8017da6 <memset>
- uint32_t circBuffPos = 0;
- 8002820: 2300 movs r3, #0
- 8002822: f8c7 30ec str.w r3, [r7, #236] @ 0xec
- ADC3_Data adcData = { 0 };
- 8002826: f107 030c add.w r3, r7, #12
- 800282a: 2220 movs r2, #32
- 800282c: 2100 movs r1, #0
- 800282e: 4618 mov r0, r3
- 8002830: f015 fab9 bl 8017da6 <memset>
- while (pdTRUE) {
- osMessageQueueGet (adc3MeasDataQueue, &adcData, 0, osWaitForever);
- 8002834: 4bc2 ldr r3, [pc, #776] @ (8002b40 <ADC3MeasTask+0x360>)
- 8002836: 6818 ldr r0, [r3, #0]
- 8002838: f107 010c add.w r1, r7, #12
- 800283c: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 8002840: 2200 movs r2, #0
- 8002842: f011 fbc7 bl 8013fd4 <osMessageQueueGet>
- uint32_t vRef = __LL_ADC_CALC_VREFANALOG_VOLTAGE (adcData.adcDataBuffer[VrefInt], LL_ADC_RESOLUTION_16B);
- 8002846: 4bbf ldr r3, [pc, #764] @ (8002b44 <ADC3MeasTask+0x364>)
- 8002848: 881b ldrh r3, [r3, #0]
- 800284a: 461a mov r2, r3
- 800284c: f640 43e4 movw r3, #3300 @ 0xce4
- 8002850: fb02 f303 mul.w r3, r2, r3
- 8002854: 8aba ldrh r2, [r7, #20]
- 8002856: fbb3 f3f2 udiv r3, r3, r2
- 800285a: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
- if (osMutexAcquire (vRefmVMutex, osWaitForever) == osOK) {
- 800285e: 4bba ldr r3, [pc, #744] @ (8002b48 <ADC3MeasTask+0x368>)
- 8002860: 681b ldr r3, [r3, #0]
- 8002862: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8002866: 4618 mov r0, r3
- 8002868: f011 fa59 bl 8013d1e <osMutexAcquire>
- 800286c: 4603 mov r3, r0
- 800286e: 2b00 cmp r3, #0
- 8002870: d108 bne.n 8002884 <ADC3MeasTask+0xa4>
- vRefmV = vRef;
- 8002872: 4ab6 ldr r2, [pc, #728] @ (8002b4c <ADC3MeasTask+0x36c>)
- 8002874: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
- 8002878: 6013 str r3, [r2, #0]
- osMutexRelease (vRefmVMutex);
- 800287a: 4bb3 ldr r3, [pc, #716] @ (8002b48 <ADC3MeasTask+0x368>)
- 800287c: 681b ldr r3, [r3, #0]
- 800287e: 4618 mov r0, r3
- 8002880: f011 fa98 bl 8013db4 <osMutexRelease>
- }
- float motorXCurrentSense = adcData.adcDataBuffer[motorXSense] * deltaADC * 10 / 8.33333;
- 8002884: 8a3b ldrh r3, [r7, #16]
- 8002886: ee07 3a90 vmov s15, r3
- 800288a: eeb8 7be7 vcvt.f64.s32 d7, s15
- 800288e: eeb0 6b08 vmov.f64 d6, #8 @ 0x40400000 3.0
- 8002892: ee27 6b06 vmul.f64 d6, d7, d6
- 8002896: ed9f 5ba2 vldr d5, [pc, #648] @ 8002b20 <ADC3MeasTask+0x340>
- 800289a: ee86 7b05 vdiv.f64 d7, d6, d5
- 800289e: eeb2 6b04 vmov.f64 d6, #36 @ 0x41200000 10.0
- 80028a2: ee27 6b06 vmul.f64 d6, d7, d6
- 80028a6: ed9f 5ba0 vldr d5, [pc, #640] @ 8002b28 <ADC3MeasTask+0x348>
- 80028aa: ee86 7b05 vdiv.f64 d7, d6, d5
- 80028ae: eef7 7bc7 vcvt.f32.f64 s15, d7
- 80028b2: edc7 7a34 vstr s15, [r7, #208] @ 0xd0
- float motorYCurrentSense = adcData.adcDataBuffer[motorYSense] * deltaADC * 10 / 8.33333;
- 80028b6: 8a7b ldrh r3, [r7, #18]
- 80028b8: ee07 3a90 vmov s15, r3
- 80028bc: eeb8 7be7 vcvt.f64.s32 d7, s15
- 80028c0: eeb0 6b08 vmov.f64 d6, #8 @ 0x40400000 3.0
- 80028c4: ee27 6b06 vmul.f64 d6, d7, d6
- 80028c8: ed9f 5b95 vldr d5, [pc, #596] @ 8002b20 <ADC3MeasTask+0x340>
- 80028cc: ee86 7b05 vdiv.f64 d7, d6, d5
- 80028d0: eeb2 6b04 vmov.f64 d6, #36 @ 0x41200000 10.0
- 80028d4: ee27 6b06 vmul.f64 d6, d7, d6
- 80028d8: ed9f 5b93 vldr d5, [pc, #588] @ 8002b28 <ADC3MeasTask+0x348>
- 80028dc: ee86 7b05 vdiv.f64 d7, d6, d5
- 80028e0: eef7 7bc7 vcvt.f32.f64 s15, d7
- 80028e4: edc7 7a33 vstr s15, [r7, #204] @ 0xcc
- motorXSensCircBuffer[circBuffPos] = motorXCurrentSense;
- 80028e8: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
- 80028ec: 009b lsls r3, r3, #2
- 80028ee: 33f0 adds r3, #240 @ 0xf0
- 80028f0: 443b add r3, r7
- 80028f2: 3b4c subs r3, #76 @ 0x4c
- 80028f4: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0
- 80028f8: 601a str r2, [r3, #0]
- motorYSensCircBuffer[circBuffPos] = motorYCurrentSense;
- 80028fa: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
- 80028fe: 009b lsls r3, r3, #2
- 8002900: 33f0 adds r3, #240 @ 0xf0
- 8002902: 443b add r3, r7
- 8002904: 3b74 subs r3, #116 @ 0x74
- 8002906: f8d7 20cc ldr.w r2, [r7, #204] @ 0xcc
- 800290a: 601a str r2, [r3, #0]
- pvT1CircBuffer[circBuffPos] = adcData.adcDataBuffer[pvTemp1] * deltaADC * 45.33333333 - 63;
- 800290c: 89bb ldrh r3, [r7, #12]
- 800290e: ee07 3a90 vmov s15, r3
- 8002912: eeb8 7be7 vcvt.f64.s32 d7, s15
- 8002916: eeb0 6b08 vmov.f64 d6, #8 @ 0x40400000 3.0
- 800291a: ee27 6b06 vmul.f64 d6, d7, d6
- 800291e: ed9f 5b80 vldr d5, [pc, #512] @ 8002b20 <ADC3MeasTask+0x340>
- 8002922: ee86 7b05 vdiv.f64 d7, d6, d5
- 8002926: ed9f 6b82 vldr d6, [pc, #520] @ 8002b30 <ADC3MeasTask+0x350>
- 800292a: ee27 7b06 vmul.f64 d7, d7, d6
- 800292e: ed9f 6b82 vldr d6, [pc, #520] @ 8002b38 <ADC3MeasTask+0x358>
- 8002932: ee37 7b46 vsub.f64 d7, d7, d6
- 8002936: eef7 7bc7 vcvt.f32.f64 s15, d7
- 800293a: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
- 800293e: 009b lsls r3, r3, #2
- 8002940: 33f0 adds r3, #240 @ 0xf0
- 8002942: 443b add r3, r7
- 8002944: 3b9c subs r3, #156 @ 0x9c
- 8002946: edc3 7a00 vstr s15, [r3]
- pvT2CircBuffer[circBuffPos] = adcData.adcDataBuffer[pvTemp2] * deltaADC * 45.33333333 - 63;
- 800294a: 89fb ldrh r3, [r7, #14]
- 800294c: ee07 3a90 vmov s15, r3
- 8002950: eeb8 7be7 vcvt.f64.s32 d7, s15
- 8002954: eeb0 6b08 vmov.f64 d6, #8 @ 0x40400000 3.0
- 8002958: ee27 6b06 vmul.f64 d6, d7, d6
- 800295c: ed9f 5b70 vldr d5, [pc, #448] @ 8002b20 <ADC3MeasTask+0x340>
- 8002960: ee86 7b05 vdiv.f64 d7, d6, d5
- 8002964: ed9f 6b72 vldr d6, [pc, #456] @ 8002b30 <ADC3MeasTask+0x350>
- 8002968: ee27 7b06 vmul.f64 d7, d7, d6
- 800296c: ed9f 6b72 vldr d6, [pc, #456] @ 8002b38 <ADC3MeasTask+0x358>
- 8002970: ee37 7b46 vsub.f64 d7, d7, d6
- 8002974: eef7 7bc7 vcvt.f32.f64 s15, d7
- 8002978: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
- 800297c: 009b lsls r3, r3, #2
- 800297e: 33f0 adds r3, #240 @ 0xf0
- 8002980: 443b add r3, r7
- 8002982: 3bc4 subs r3, #196 @ 0xc4
- 8002984: edc3 7a00 vstr s15, [r3]
- float motorXAveCurrent = 0;
- 8002988: f04f 0300 mov.w r3, #0
- 800298c: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
- float motorYAveCurrent = 0;
- 8002990: f04f 0300 mov.w r3, #0
- 8002994: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
- float pvT1AveTemp = 0;
- 8002998: f04f 0300 mov.w r3, #0
- 800299c: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
- float pvT2AveTemp = 0;
- 80029a0: f04f 0300 mov.w r3, #0
- 80029a4: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
- for (uint8_t i = 0; i < CIRC_BUFF_LEN; i++) {
- 80029a8: 2300 movs r3, #0
- 80029aa: f887 30db strb.w r3, [r7, #219] @ 0xdb
- 80029ae: e03c b.n 8002a2a <ADC3MeasTask+0x24a>
- motorXAveCurrent += motorXSensCircBuffer[i];
- 80029b0: f897 30db ldrb.w r3, [r7, #219] @ 0xdb
- 80029b4: 009b lsls r3, r3, #2
- 80029b6: 33f0 adds r3, #240 @ 0xf0
- 80029b8: 443b add r3, r7
- 80029ba: 3b4c subs r3, #76 @ 0x4c
- 80029bc: edd3 7a00 vldr s15, [r3]
- 80029c0: ed97 7a3a vldr s14, [r7, #232] @ 0xe8
- 80029c4: ee77 7a27 vadd.f32 s15, s14, s15
- 80029c8: edc7 7a3a vstr s15, [r7, #232] @ 0xe8
- motorYAveCurrent += motorYSensCircBuffer[i];
- 80029cc: f897 30db ldrb.w r3, [r7, #219] @ 0xdb
- 80029d0: 009b lsls r3, r3, #2
- 80029d2: 33f0 adds r3, #240 @ 0xf0
- 80029d4: 443b add r3, r7
- 80029d6: 3b74 subs r3, #116 @ 0x74
- 80029d8: edd3 7a00 vldr s15, [r3]
- 80029dc: ed97 7a39 vldr s14, [r7, #228] @ 0xe4
- 80029e0: ee77 7a27 vadd.f32 s15, s14, s15
- 80029e4: edc7 7a39 vstr s15, [r7, #228] @ 0xe4
- #ifdef PV_BOARD
- pvT1AveTemp += pvT1CircBuffer[i];
- 80029e8: f897 30db ldrb.w r3, [r7, #219] @ 0xdb
- 80029ec: 009b lsls r3, r3, #2
- 80029ee: 33f0 adds r3, #240 @ 0xf0
- 80029f0: 443b add r3, r7
- 80029f2: 3b9c subs r3, #156 @ 0x9c
- 80029f4: edd3 7a00 vldr s15, [r3]
- 80029f8: ed97 7a38 vldr s14, [r7, #224] @ 0xe0
- 80029fc: ee77 7a27 vadd.f32 s15, s14, s15
- 8002a00: edc7 7a38 vstr s15, [r7, #224] @ 0xe0
- pvT2AveTemp += pvT2CircBuffer[i];
- 8002a04: f897 30db ldrb.w r3, [r7, #219] @ 0xdb
- 8002a08: 009b lsls r3, r3, #2
- 8002a0a: 33f0 adds r3, #240 @ 0xf0
- 8002a0c: 443b add r3, r7
- 8002a0e: 3bc4 subs r3, #196 @ 0xc4
- 8002a10: edd3 7a00 vldr s15, [r3]
- 8002a14: ed97 7a37 vldr s14, [r7, #220] @ 0xdc
- 8002a18: ee77 7a27 vadd.f32 s15, s14, s15
- 8002a1c: edc7 7a37 vstr s15, [r7, #220] @ 0xdc
- for (uint8_t i = 0; i < CIRC_BUFF_LEN; i++) {
- 8002a20: f897 30db ldrb.w r3, [r7, #219] @ 0xdb
- 8002a24: 3301 adds r3, #1
- 8002a26: f887 30db strb.w r3, [r7, #219] @ 0xdb
- 8002a2a: f897 30db ldrb.w r3, [r7, #219] @ 0xdb
- 8002a2e: 2b09 cmp r3, #9
- 8002a30: d9be bls.n 80029b0 <ADC3MeasTask+0x1d0>
- #endif
- }
- motorXAveCurrent /= CIRC_BUFF_LEN;
- 8002a32: ed97 7a3a vldr s14, [r7, #232] @ 0xe8
- 8002a36: eef2 6a04 vmov.f32 s13, #36 @ 0x41200000 10.0
- 8002a3a: eec7 7a26 vdiv.f32 s15, s14, s13
- 8002a3e: edc7 7a3a vstr s15, [r7, #232] @ 0xe8
- motorYAveCurrent /= CIRC_BUFF_LEN;
- 8002a42: ed97 7a39 vldr s14, [r7, #228] @ 0xe4
- 8002a46: eef2 6a04 vmov.f32 s13, #36 @ 0x41200000 10.0
- 8002a4a: eec7 7a26 vdiv.f32 s15, s14, s13
- 8002a4e: edc7 7a39 vstr s15, [r7, #228] @ 0xe4
- pvT1AveTemp /= CIRC_BUFF_LEN;
- 8002a52: ed97 7a38 vldr s14, [r7, #224] @ 0xe0
- 8002a56: eef2 6a04 vmov.f32 s13, #36 @ 0x41200000 10.0
- 8002a5a: eec7 7a26 vdiv.f32 s15, s14, s13
- 8002a5e: edc7 7a38 vstr s15, [r7, #224] @ 0xe0
- pvT2AveTemp /= CIRC_BUFF_LEN;
- 8002a62: ed97 7a37 vldr s14, [r7, #220] @ 0xdc
- 8002a66: eef2 6a04 vmov.f32 s13, #36 @ 0x41200000 10.0
- 8002a6a: eec7 7a26 vdiv.f32 s15, s14, s13
- 8002a6e: edc7 7a37 vstr s15, [r7, #220] @ 0xdc
- if (osMutexAcquire (sensorsInfoMutex, osWaitForever) == osOK) {
- 8002a72: 4b37 ldr r3, [pc, #220] @ (8002b50 <ADC3MeasTask+0x370>)
- 8002a74: 681b ldr r3, [r3, #0]
- 8002a76: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8002a7a: 4618 mov r0, r3
- 8002a7c: f011 f94f bl 8013d1e <osMutexAcquire>
- 8002a80: 4603 mov r3, r0
- 8002a82: 2b00 cmp r3, #0
- 8002a84: d138 bne.n 8002af8 <ADC3MeasTask+0x318>
- if (sensorsInfo.motorXStatus == 1) {
- 8002a86: 4b33 ldr r3, [pc, #204] @ (8002b54 <ADC3MeasTask+0x374>)
- 8002a88: 7d1b ldrb r3, [r3, #20]
- 8002a8a: 2b01 cmp r3, #1
- 8002a8c: d111 bne.n 8002ab2 <ADC3MeasTask+0x2d2>
- sensorsInfo.motorXAveCurrent = motorXAveCurrent;
- 8002a8e: 4a31 ldr r2, [pc, #196] @ (8002b54 <ADC3MeasTask+0x374>)
- 8002a90: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
- 8002a94: 6193 str r3, [r2, #24]
- if (sensorsInfo.motorXPeakCurrent < motorXCurrentSense) {
- 8002a96: 4b2f ldr r3, [pc, #188] @ (8002b54 <ADC3MeasTask+0x374>)
- 8002a98: edd3 7a08 vldr s15, [r3, #32]
- 8002a9c: ed97 7a34 vldr s14, [r7, #208] @ 0xd0
- 8002aa0: eeb4 7ae7 vcmpe.f32 s14, s15
- 8002aa4: eef1 fa10 vmrs APSR_nzcv, fpscr
- 8002aa8: dd03 ble.n 8002ab2 <ADC3MeasTask+0x2d2>
- sensorsInfo.motorXPeakCurrent = motorXCurrentSense;
- 8002aaa: 4a2a ldr r2, [pc, #168] @ (8002b54 <ADC3MeasTask+0x374>)
- 8002aac: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
- 8002ab0: 6213 str r3, [r2, #32]
- }
- }
- if (sensorsInfo.motorYStatus == 1) {
- 8002ab2: 4b28 ldr r3, [pc, #160] @ (8002b54 <ADC3MeasTask+0x374>)
- 8002ab4: 7d5b ldrb r3, [r3, #21]
- 8002ab6: 2b01 cmp r3, #1
- 8002ab8: d111 bne.n 8002ade <ADC3MeasTask+0x2fe>
- sensorsInfo.motorYAveCurrent = motorYAveCurrent;
- 8002aba: 4a26 ldr r2, [pc, #152] @ (8002b54 <ADC3MeasTask+0x374>)
- 8002abc: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
- 8002ac0: 61d3 str r3, [r2, #28]
- if (sensorsInfo.motorYPeakCurrent < motorYCurrentSense) {
- 8002ac2: 4b24 ldr r3, [pc, #144] @ (8002b54 <ADC3MeasTask+0x374>)
- 8002ac4: edd3 7a09 vldr s15, [r3, #36] @ 0x24
- 8002ac8: ed97 7a33 vldr s14, [r7, #204] @ 0xcc
- 8002acc: eeb4 7ae7 vcmpe.f32 s14, s15
- 8002ad0: eef1 fa10 vmrs APSR_nzcv, fpscr
- 8002ad4: dd03 ble.n 8002ade <ADC3MeasTask+0x2fe>
- sensorsInfo.motorYPeakCurrent = motorYCurrentSense;
- 8002ad6: 4a1f ldr r2, [pc, #124] @ (8002b54 <ADC3MeasTask+0x374>)
- 8002ad8: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
- 8002adc: 6253 str r3, [r2, #36] @ 0x24
- }
- }
- sensorsInfo.pvTemperature[0] = pvT1AveTemp;
- 8002ade: 4a1d ldr r2, [pc, #116] @ (8002b54 <ADC3MeasTask+0x374>)
- 8002ae0: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
- 8002ae4: 6013 str r3, [r2, #0]
- sensorsInfo.pvTemperature[1] = pvT2AveTemp;
- 8002ae6: 4a1b ldr r2, [pc, #108] @ (8002b54 <ADC3MeasTask+0x374>)
- 8002ae8: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
- 8002aec: 6053 str r3, [r2, #4]
- osMutexRelease (sensorsInfoMutex);
- 8002aee: 4b18 ldr r3, [pc, #96] @ (8002b50 <ADC3MeasTask+0x370>)
- 8002af0: 681b ldr r3, [r3, #0]
- 8002af2: 4618 mov r0, r3
- 8002af4: f011 f95e bl 8013db4 <osMutexRelease>
- }
- ++circBuffPos;
- 8002af8: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
- 8002afc: 3301 adds r3, #1
- 8002afe: f8c7 30ec str.w r3, [r7, #236] @ 0xec
- circBuffPos = circBuffPos % CIRC_BUFF_LEN;
- 8002b02: f8d7 20ec ldr.w r2, [r7, #236] @ 0xec
- 8002b06: 4b14 ldr r3, [pc, #80] @ (8002b58 <ADC3MeasTask+0x378>)
- 8002b08: fba3 1302 umull r1, r3, r3, r2
- 8002b0c: 08d9 lsrs r1, r3, #3
- 8002b0e: 460b mov r3, r1
- 8002b10: 009b lsls r3, r3, #2
- 8002b12: 440b add r3, r1
- 8002b14: 005b lsls r3, r3, #1
- 8002b16: 1ad3 subs r3, r2, r3
- 8002b18: f8c7 30ec str.w r3, [r7, #236] @ 0xec
- while (pdTRUE) {
- 8002b1c: e68a b.n 8002834 <ADC3MeasTask+0x54>
- 8002b1e: bf00 nop
- 8002b20: 00000000 .word 0x00000000
- 8002b24: 40efffe0 .word 0x40efffe0
- 8002b28: 3ad18d26 .word 0x3ad18d26
- 8002b2c: 4020aaaa .word 0x4020aaaa
- 8002b30: aaa38226 .word 0xaaa38226
- 8002b34: 4046aaaa .word 0x4046aaaa
- 8002b38: 00000000 .word 0x00000000
- 8002b3c: 404f8000 .word 0x404f8000
- 8002b40: 24000828 .word 0x24000828
- 8002b44: 1ff1e860 .word 0x1ff1e860
- 8002b48: 24000834 .word 0x24000834
- 8002b4c: 24000030 .word 0x24000030
- 8002b50: 2400083c .word 0x2400083c
- 8002b54: 24000880 .word 0x24000880
- 8002b58: cccccccd .word 0xcccccccd
- 08002b5c <LimiterSwitchTask>:
- }
- }
- void LimiterSwitchTask (void* arg) {
- 8002b5c: b580 push {r7, lr}
- 8002b5e: b08a sub sp, #40 @ 0x28
- 8002b60: af06 add r7, sp, #24
- 8002b62: 6078 str r0, [r7, #4]
- LimiterSwitchData limiterSwitchData = { 0 };
- 8002b64: 2300 movs r3, #0
- 8002b66: 60bb str r3, [r7, #8]
- limiterSwitchData.gpioPin = GPIO_PIN_8;
- 8002b68: f44f 7380 mov.w r3, #256 @ 0x100
- 8002b6c: 813b strh r3, [r7, #8]
- for (uint8_t i = 0; i < 6; i++) {
- 8002b6e: 2300 movs r3, #0
- 8002b70: 73fb strb r3, [r7, #15]
- 8002b72: e015 b.n 8002ba0 <LimiterSwitchTask+0x44>
- limiterSwitchData.pinState = HAL_GPIO_ReadPin (GPIOD, limiterSwitchData.gpioPin);
- 8002b74: 893b ldrh r3, [r7, #8]
- 8002b76: 4619 mov r1, r3
- 8002b78: 486c ldr r0, [pc, #432] @ (8002d2c <LimiterSwitchTask+0x1d0>)
- 8002b7a: f008 f87d bl 800ac78 <HAL_GPIO_ReadPin>
- 8002b7e: 4603 mov r3, r0
- 8002b80: 72bb strb r3, [r7, #10]
- osMessageQueuePut (limiterSwitchDataQueue, &limiterSwitchData, 0, 0);
- 8002b82: 4b6b ldr r3, [pc, #428] @ (8002d30 <LimiterSwitchTask+0x1d4>)
- 8002b84: 6818 ldr r0, [r3, #0]
- 8002b86: f107 0108 add.w r1, r7, #8
- 8002b8a: 2300 movs r3, #0
- 8002b8c: 2200 movs r2, #0
- 8002b8e: f011 f9c1 bl 8013f14 <osMessageQueuePut>
- limiterSwitchData.gpioPin = limiterSwitchData.gpioPin << 1;
- 8002b92: 893b ldrh r3, [r7, #8]
- 8002b94: 005b lsls r3, r3, #1
- 8002b96: b29b uxth r3, r3
- 8002b98: 813b strh r3, [r7, #8]
- for (uint8_t i = 0; i < 6; i++) {
- 8002b9a: 7bfb ldrb r3, [r7, #15]
- 8002b9c: 3301 adds r3, #1
- 8002b9e: 73fb strb r3, [r7, #15]
- 8002ba0: 7bfb ldrb r3, [r7, #15]
- 8002ba2: 2b05 cmp r3, #5
- 8002ba4: d9e6 bls.n 8002b74 <LimiterSwitchTask+0x18>
- }
- while (pdTRUE) {
- osMessageQueueGet (limiterSwitchDataQueue, &limiterSwitchData, 0, osWaitForever);
- 8002ba6: 4b62 ldr r3, [pc, #392] @ (8002d30 <LimiterSwitchTask+0x1d4>)
- 8002ba8: 6818 ldr r0, [r3, #0]
- 8002baa: f107 0108 add.w r1, r7, #8
- 8002bae: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 8002bb2: 2200 movs r2, #0
- 8002bb4: f011 fa0e bl 8013fd4 <osMessageQueueGet>
- if (osMutexAcquire (sensorsInfoMutex, osWaitForever) == osOK) {
- 8002bb8: 4b5e ldr r3, [pc, #376] @ (8002d34 <LimiterSwitchTask+0x1d8>)
- 8002bba: 681b ldr r3, [r3, #0]
- 8002bbc: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8002bc0: 4618 mov r0, r3
- 8002bc2: f011 f8ac bl 8013d1e <osMutexAcquire>
- 8002bc6: 4603 mov r3, r0
- 8002bc8: 2b00 cmp r3, #0
- 8002bca: d1ec bne.n 8002ba6 <LimiterSwitchTask+0x4a>
- switch (limiterSwitchData.gpioPin) {
- 8002bcc: 893b ldrh r3, [r7, #8]
- 8002bce: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
- 8002bd2: d052 beq.n 8002c7a <LimiterSwitchTask+0x11e>
- 8002bd4: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
- 8002bd8: dc5a bgt.n 8002c90 <LimiterSwitchTask+0x134>
- 8002bda: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 8002bde: d041 beq.n 8002c64 <LimiterSwitchTask+0x108>
- 8002be0: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 8002be4: dc54 bgt.n 8002c90 <LimiterSwitchTask+0x134>
- 8002be6: f5b3 6f00 cmp.w r3, #2048 @ 0x800
- 8002bea: d030 beq.n 8002c4e <LimiterSwitchTask+0xf2>
- 8002bec: f5b3 6f00 cmp.w r3, #2048 @ 0x800
- 8002bf0: dc4e bgt.n 8002c90 <LimiterSwitchTask+0x134>
- 8002bf2: f5b3 6f80 cmp.w r3, #1024 @ 0x400
- 8002bf6: d01f beq.n 8002c38 <LimiterSwitchTask+0xdc>
- 8002bf8: f5b3 6f80 cmp.w r3, #1024 @ 0x400
- 8002bfc: dc48 bgt.n 8002c90 <LimiterSwitchTask+0x134>
- 8002bfe: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 8002c02: d003 beq.n 8002c0c <LimiterSwitchTask+0xb0>
- 8002c04: f5b3 7f00 cmp.w r3, #512 @ 0x200
- 8002c08: d00b beq.n 8002c22 <LimiterSwitchTask+0xc6>
- case GPIO_PIN_9: sensorsInfo.limitYSwitchDown = limiterSwitchData.pinState == GPIO_PIN_SET ? 1 : 0; break;
- case GPIO_PIN_10: sensorsInfo.limitXSwitchCenter = limiterSwitchData.pinState == GPIO_PIN_SET ? 1 : 0; break;
- case GPIO_PIN_11: sensorsInfo.limitYSwitchUp = limiterSwitchData.pinState == GPIO_PIN_SET ? 1 : 0; break;
- case GPIO_PIN_12: sensorsInfo.limitXSwitchUp = limiterSwitchData.pinState == GPIO_PIN_SET ? 1 : 0; break;
- case GPIO_PIN_13: sensorsInfo.limitXSwitchDown = limiterSwitchData.pinState == GPIO_PIN_SET ? 1 : 0; break;
- default: break;
- 8002c0a: e041 b.n 8002c90 <LimiterSwitchTask+0x134>
- case GPIO_PIN_8: sensorsInfo.limitYSwitchCenter = limiterSwitchData.pinState == GPIO_PIN_SET ? 1 : 0; break;
- 8002c0c: 7abb ldrb r3, [r7, #10]
- 8002c0e: 2b01 cmp r3, #1
- 8002c10: bf0c ite eq
- 8002c12: 2301 moveq r3, #1
- 8002c14: 2300 movne r3, #0
- 8002c16: b2db uxtb r3, r3
- 8002c18: 461a mov r2, r3
- 8002c1a: 4b47 ldr r3, [pc, #284] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002c1c: f883 202d strb.w r2, [r3, #45] @ 0x2d
- 8002c20: e037 b.n 8002c92 <LimiterSwitchTask+0x136>
- case GPIO_PIN_9: sensorsInfo.limitYSwitchDown = limiterSwitchData.pinState == GPIO_PIN_SET ? 1 : 0; break;
- 8002c22: 7abb ldrb r3, [r7, #10]
- 8002c24: 2b01 cmp r3, #1
- 8002c26: bf0c ite eq
- 8002c28: 2301 moveq r3, #1
- 8002c2a: 2300 movne r3, #0
- 8002c2c: b2db uxtb r3, r3
- 8002c2e: 461a mov r2, r3
- 8002c30: 4b41 ldr r3, [pc, #260] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002c32: f883 202c strb.w r2, [r3, #44] @ 0x2c
- 8002c36: e02c b.n 8002c92 <LimiterSwitchTask+0x136>
- case GPIO_PIN_10: sensorsInfo.limitXSwitchCenter = limiterSwitchData.pinState == GPIO_PIN_SET ? 1 : 0; break;
- 8002c38: 7abb ldrb r3, [r7, #10]
- 8002c3a: 2b01 cmp r3, #1
- 8002c3c: bf0c ite eq
- 8002c3e: 2301 moveq r3, #1
- 8002c40: 2300 movne r3, #0
- 8002c42: b2db uxtb r3, r3
- 8002c44: 461a mov r2, r3
- 8002c46: 4b3c ldr r3, [pc, #240] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002c48: f883 202a strb.w r2, [r3, #42] @ 0x2a
- 8002c4c: e021 b.n 8002c92 <LimiterSwitchTask+0x136>
- case GPIO_PIN_11: sensorsInfo.limitYSwitchUp = limiterSwitchData.pinState == GPIO_PIN_SET ? 1 : 0; break;
- 8002c4e: 7abb ldrb r3, [r7, #10]
- 8002c50: 2b01 cmp r3, #1
- 8002c52: bf0c ite eq
- 8002c54: 2301 moveq r3, #1
- 8002c56: 2300 movne r3, #0
- 8002c58: b2db uxtb r3, r3
- 8002c5a: 461a mov r2, r3
- 8002c5c: 4b36 ldr r3, [pc, #216] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002c5e: f883 202b strb.w r2, [r3, #43] @ 0x2b
- 8002c62: e016 b.n 8002c92 <LimiterSwitchTask+0x136>
- case GPIO_PIN_12: sensorsInfo.limitXSwitchUp = limiterSwitchData.pinState == GPIO_PIN_SET ? 1 : 0; break;
- 8002c64: 7abb ldrb r3, [r7, #10]
- 8002c66: 2b01 cmp r3, #1
- 8002c68: bf0c ite eq
- 8002c6a: 2301 moveq r3, #1
- 8002c6c: 2300 movne r3, #0
- 8002c6e: b2db uxtb r3, r3
- 8002c70: 461a mov r2, r3
- 8002c72: 4b31 ldr r3, [pc, #196] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002c74: f883 2028 strb.w r2, [r3, #40] @ 0x28
- 8002c78: e00b b.n 8002c92 <LimiterSwitchTask+0x136>
- case GPIO_PIN_13: sensorsInfo.limitXSwitchDown = limiterSwitchData.pinState == GPIO_PIN_SET ? 1 : 0; break;
- 8002c7a: 7abb ldrb r3, [r7, #10]
- 8002c7c: 2b01 cmp r3, #1
- 8002c7e: bf0c ite eq
- 8002c80: 2301 moveq r3, #1
- 8002c82: 2300 movne r3, #0
- 8002c84: b2db uxtb r3, r3
- 8002c86: 461a mov r2, r3
- 8002c88: 4b2b ldr r3, [pc, #172] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002c8a: f883 2029 strb.w r2, [r3, #41] @ 0x29
- 8002c8e: e000 b.n 8002c92 <LimiterSwitchTask+0x136>
- default: break;
- 8002c90: bf00 nop
- }
- if ((sensorsInfo.limitXSwitchDown == 1) || (sensorsInfo.limitXSwitchUp == 1)) {
- 8002c92: 4b29 ldr r3, [pc, #164] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002c94: f893 3029 ldrb.w r3, [r3, #41] @ 0x29
- 8002c98: 2b01 cmp r3, #1
- 8002c9a: d004 beq.n 8002ca6 <LimiterSwitchTask+0x14a>
- 8002c9c: 4b26 ldr r3, [pc, #152] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002c9e: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
- 8002ca2: 2b01 cmp r3, #1
- 8002ca4: d118 bne.n 8002cd8 <LimiterSwitchTask+0x17c>
- sensorsInfo.motorXStatus = motorControl (&htim3, &motorXYTimerConfigOC, TIM_CHANNEL_1, TIM_CHANNEL_2, motorXTimerHandle, 0, 0, sensorsInfo.limitXSwitchUp, sensorsInfo.limitXSwitchDown);
- 8002ca6: 4b25 ldr r3, [pc, #148] @ (8002d3c <LimiterSwitchTask+0x1e0>)
- 8002ca8: 681b ldr r3, [r3, #0]
- 8002caa: 4a23 ldr r2, [pc, #140] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002cac: f892 2028 ldrb.w r2, [r2, #40] @ 0x28
- 8002cb0: 4921 ldr r1, [pc, #132] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002cb2: f891 1029 ldrb.w r1, [r1, #41] @ 0x29
- 8002cb6: 9104 str r1, [sp, #16]
- 8002cb8: 9203 str r2, [sp, #12]
- 8002cba: 2200 movs r2, #0
- 8002cbc: 9202 str r2, [sp, #8]
- 8002cbe: 2200 movs r2, #0
- 8002cc0: 9201 str r2, [sp, #4]
- 8002cc2: 9300 str r3, [sp, #0]
- 8002cc4: 2304 movs r3, #4
- 8002cc6: 2200 movs r2, #0
- 8002cc8: 491d ldr r1, [pc, #116] @ (8002d40 <LimiterSwitchTask+0x1e4>)
- 8002cca: 481e ldr r0, [pc, #120] @ (8002d44 <LimiterSwitchTask+0x1e8>)
- 8002ccc: f000 f92a bl 8002f24 <motorControl>
- 8002cd0: 4603 mov r3, r0
- 8002cd2: 461a mov r2, r3
- 8002cd4: 4b18 ldr r3, [pc, #96] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002cd6: 751a strb r2, [r3, #20]
- }
- if ((sensorsInfo.limitYSwitchDown == 1) || (sensorsInfo.limitYSwitchUp == 1)) {
- 8002cd8: 4b17 ldr r3, [pc, #92] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002cda: f893 302c ldrb.w r3, [r3, #44] @ 0x2c
- 8002cde: 2b01 cmp r3, #1
- 8002ce0: d004 beq.n 8002cec <LimiterSwitchTask+0x190>
- 8002ce2: 4b15 ldr r3, [pc, #84] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002ce4: f893 302b ldrb.w r3, [r3, #43] @ 0x2b
- 8002ce8: 2b01 cmp r3, #1
- 8002cea: d118 bne.n 8002d1e <LimiterSwitchTask+0x1c2>
- sensorsInfo.motorYStatus = motorControl (&htim3, &motorXYTimerConfigOC, TIM_CHANNEL_3, TIM_CHANNEL_4, motorYTimerHandle, 0, 0, sensorsInfo.limitYSwitchUp, sensorsInfo.limitYSwitchDown);
- 8002cec: 4b16 ldr r3, [pc, #88] @ (8002d48 <LimiterSwitchTask+0x1ec>)
- 8002cee: 681b ldr r3, [r3, #0]
- 8002cf0: 4a11 ldr r2, [pc, #68] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002cf2: f892 202b ldrb.w r2, [r2, #43] @ 0x2b
- 8002cf6: 4910 ldr r1, [pc, #64] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002cf8: f891 102c ldrb.w r1, [r1, #44] @ 0x2c
- 8002cfc: 9104 str r1, [sp, #16]
- 8002cfe: 9203 str r2, [sp, #12]
- 8002d00: 2200 movs r2, #0
- 8002d02: 9202 str r2, [sp, #8]
- 8002d04: 2200 movs r2, #0
- 8002d06: 9201 str r2, [sp, #4]
- 8002d08: 9300 str r3, [sp, #0]
- 8002d0a: 230c movs r3, #12
- 8002d0c: 2208 movs r2, #8
- 8002d0e: 490c ldr r1, [pc, #48] @ (8002d40 <LimiterSwitchTask+0x1e4>)
- 8002d10: 480c ldr r0, [pc, #48] @ (8002d44 <LimiterSwitchTask+0x1e8>)
- 8002d12: f000 f907 bl 8002f24 <motorControl>
- 8002d16: 4603 mov r3, r0
- 8002d18: 461a mov r2, r3
- 8002d1a: 4b07 ldr r3, [pc, #28] @ (8002d38 <LimiterSwitchTask+0x1dc>)
- 8002d1c: 755a strb r2, [r3, #21]
- }
- osMutexRelease (sensorsInfoMutex);
- 8002d1e: 4b05 ldr r3, [pc, #20] @ (8002d34 <LimiterSwitchTask+0x1d8>)
- 8002d20: 681b ldr r3, [r3, #0]
- 8002d22: 4618 mov r0, r3
- 8002d24: f011 f846 bl 8013db4 <osMutexRelease>
- osMessageQueueGet (limiterSwitchDataQueue, &limiterSwitchData, 0, osWaitForever);
- 8002d28: e73d b.n 8002ba6 <LimiterSwitchTask+0x4a>
- 8002d2a: bf00 nop
- 8002d2c: 58020c00 .word 0x58020c00
- 8002d30: 2400082c .word 0x2400082c
- 8002d34: 2400083c .word 0x2400083c
- 8002d38: 24000880 .word 0x24000880
- 8002d3c: 24000764 .word 0x24000764
- 8002d40: 240007e0 .word 0x240007e0
- 8002d44: 240004f4 .word 0x240004f4
- 8002d48: 24000794 .word 0x24000794
- 08002d4c <EncoderTask>:
- }
- }
- }
- void EncoderTask (void* arg) {
- 8002d4c: b580 push {r7, lr}
- 8002d4e: b084 sub sp, #16
- 8002d50: af00 add r7, sp, #0
- 8002d52: 6078 str r0, [r7, #4]
- EncoderData encoderData = { 0 };
- 8002d54: 2300 movs r3, #0
- 8002d56: 813b strh r3, [r7, #8]
- osMessageQueueId_t encoderQueue = (osMessageQueueId_t)arg;
- 8002d58: 687b ldr r3, [r7, #4]
- 8002d5a: 60fb str r3, [r7, #12]
- while (pdTRUE) {
- osMessageQueueGet (encoderQueue, &encoderData, 0, osWaitForever);
- 8002d5c: f107 0108 add.w r1, r7, #8
- 8002d60: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 8002d64: 2200 movs r2, #0
- 8002d66: 68f8 ldr r0, [r7, #12]
- 8002d68: f011 f934 bl 8013fd4 <osMessageQueueGet>
- if (osMutexAcquire (sensorsInfoMutex, osWaitForever) == osOK) {
- 8002d6c: 4b24 ldr r3, [pc, #144] @ (8002e00 <EncoderTask+0xb4>)
- 8002d6e: 681b ldr r3, [r3, #0]
- 8002d70: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8002d74: 4618 mov r0, r3
- 8002d76: f010 ffd2 bl 8013d1e <osMutexAcquire>
- 8002d7a: 4603 mov r3, r0
- 8002d7c: 2b00 cmp r3, #0
- 8002d7e: d1ed bne.n 8002d5c <EncoderTask+0x10>
- if (encoderData.axe == encoderAxeX) {
- 8002d80: 7a3b ldrb r3, [r7, #8]
- 8002d82: 2b00 cmp r3, #0
- 8002d84: d11b bne.n 8002dbe <EncoderTask+0x72>
- if (encoderData.direction == encoderCW) {
- 8002d86: 7a7b ldrb r3, [r7, #9]
- 8002d88: 2b00 cmp r3, #0
- 8002d8a: d10a bne.n 8002da2 <EncoderTask+0x56>
- sensorsInfo.pvEncoderX += 360.0 / ENCODER_X_IMP_PER_TURN;
- 8002d8c: 4b1d ldr r3, [pc, #116] @ (8002e04 <EncoderTask+0xb8>)
- 8002d8e: edd3 7a03 vldr s15, [r3, #12]
- 8002d92: eeb3 7a02 vmov.f32 s14, #50 @ 0x41900000 18.0
- 8002d96: ee77 7a87 vadd.f32 s15, s15, s14
- 8002d9a: 4b1a ldr r3, [pc, #104] @ (8002e04 <EncoderTask+0xb8>)
- 8002d9c: edc3 7a03 vstr s15, [r3, #12]
- 8002da0: e009 b.n 8002db6 <EncoderTask+0x6a>
- } else {
- sensorsInfo.pvEncoderX -= 360.0 / ENCODER_X_IMP_PER_TURN;
- 8002da2: 4b18 ldr r3, [pc, #96] @ (8002e04 <EncoderTask+0xb8>)
- 8002da4: edd3 7a03 vldr s15, [r3, #12]
- 8002da8: eeb3 7a02 vmov.f32 s14, #50 @ 0x41900000 18.0
- 8002dac: ee77 7ac7 vsub.f32 s15, s15, s14
- 8002db0: 4b14 ldr r3, [pc, #80] @ (8002e04 <EncoderTask+0xb8>)
- 8002db2: edc3 7a03 vstr s15, [r3, #12]
- }
- DbgLEDToggle(DBG_LED2);
- 8002db6: 2020 movs r0, #32
- 8002db8: f000 f84a bl 8002e50 <DbgLEDToggle>
- 8002dbc: e01a b.n 8002df4 <EncoderTask+0xa8>
- } else {
- if (encoderData.direction == encoderCW) {
- 8002dbe: 7a7b ldrb r3, [r7, #9]
- 8002dc0: 2b00 cmp r3, #0
- 8002dc2: d10a bne.n 8002dda <EncoderTask+0x8e>
- sensorsInfo.pvEncoderY += 360.0 / ENCODER_Y_IMP_PER_TURN;
- 8002dc4: 4b0f ldr r3, [pc, #60] @ (8002e04 <EncoderTask+0xb8>)
- 8002dc6: edd3 7a04 vldr s15, [r3, #16]
- 8002dca: eeb3 7a02 vmov.f32 s14, #50 @ 0x41900000 18.0
- 8002dce: ee77 7a87 vadd.f32 s15, s15, s14
- 8002dd2: 4b0c ldr r3, [pc, #48] @ (8002e04 <EncoderTask+0xb8>)
- 8002dd4: edc3 7a04 vstr s15, [r3, #16]
- 8002dd8: e009 b.n 8002dee <EncoderTask+0xa2>
- } else {
- sensorsInfo.pvEncoderY -= 360.0 / ENCODER_Y_IMP_PER_TURN;
- 8002dda: 4b0a ldr r3, [pc, #40] @ (8002e04 <EncoderTask+0xb8>)
- 8002ddc: edd3 7a04 vldr s15, [r3, #16]
- 8002de0: eeb3 7a02 vmov.f32 s14, #50 @ 0x41900000 18.0
- 8002de4: ee77 7ac7 vsub.f32 s15, s15, s14
- 8002de8: 4b06 ldr r3, [pc, #24] @ (8002e04 <EncoderTask+0xb8>)
- 8002dea: edc3 7a04 vstr s15, [r3, #16]
- }
- DbgLEDToggle(DBG_LED3);
- 8002dee: 2040 movs r0, #64 @ 0x40
- 8002df0: f000 f82e bl 8002e50 <DbgLEDToggle>
- }
- osMutexRelease (sensorsInfoMutex);
- 8002df4: 4b02 ldr r3, [pc, #8] @ (8002e00 <EncoderTask+0xb4>)
- 8002df6: 681b ldr r3, [r3, #0]
- 8002df8: 4618 mov r0, r3
- 8002dfa: f010 ffdb bl 8013db4 <osMutexRelease>
- osMessageQueueGet (encoderQueue, &encoderData, 0, osWaitForever);
- 8002dfe: e7ad b.n 8002d5c <EncoderTask+0x10>
- 8002e00: 2400083c .word 0x2400083c
- 8002e04: 24000880 .word 0x24000880
- 08002e08 <DbgLEDOn>:
- #include <stdlib.h>
- #include "peripherial.h"
- void DbgLEDOn (uint8_t ledNumber) {
- 8002e08: b580 push {r7, lr}
- 8002e0a: b082 sub sp, #8
- 8002e0c: af00 add r7, sp, #0
- 8002e0e: 4603 mov r3, r0
- 8002e10: 71fb strb r3, [r7, #7]
- HAL_GPIO_WritePin (GPIOD, ledNumber, GPIO_PIN_SET);
- 8002e12: 79fb ldrb r3, [r7, #7]
- 8002e14: b29b uxth r3, r3
- 8002e16: 2201 movs r2, #1
- 8002e18: 4619 mov r1, r3
- 8002e1a: 4803 ldr r0, [pc, #12] @ (8002e28 <DbgLEDOn+0x20>)
- 8002e1c: f007 ff44 bl 800aca8 <HAL_GPIO_WritePin>
- }
- 8002e20: bf00 nop
- 8002e22: 3708 adds r7, #8
- 8002e24: 46bd mov sp, r7
- 8002e26: bd80 pop {r7, pc}
- 8002e28: 58020c00 .word 0x58020c00
- 08002e2c <DbgLEDOff>:
- void DbgLEDOff (uint8_t ledNumber) {
- 8002e2c: b580 push {r7, lr}
- 8002e2e: b082 sub sp, #8
- 8002e30: af00 add r7, sp, #0
- 8002e32: 4603 mov r3, r0
- 8002e34: 71fb strb r3, [r7, #7]
- HAL_GPIO_WritePin (GPIOD, ledNumber, GPIO_PIN_RESET);
- 8002e36: 79fb ldrb r3, [r7, #7]
- 8002e38: b29b uxth r3, r3
- 8002e3a: 2200 movs r2, #0
- 8002e3c: 4619 mov r1, r3
- 8002e3e: 4803 ldr r0, [pc, #12] @ (8002e4c <DbgLEDOff+0x20>)
- 8002e40: f007 ff32 bl 800aca8 <HAL_GPIO_WritePin>
- }
- 8002e44: bf00 nop
- 8002e46: 3708 adds r7, #8
- 8002e48: 46bd mov sp, r7
- 8002e4a: bd80 pop {r7, pc}
- 8002e4c: 58020c00 .word 0x58020c00
- 08002e50 <DbgLEDToggle>:
- void DbgLEDToggle (uint8_t ledNumber) {
- 8002e50: b580 push {r7, lr}
- 8002e52: b082 sub sp, #8
- 8002e54: af00 add r7, sp, #0
- 8002e56: 4603 mov r3, r0
- 8002e58: 71fb strb r3, [r7, #7]
- HAL_GPIO_TogglePin (GPIOD, ledNumber);
- 8002e5a: 79fb ldrb r3, [r7, #7]
- 8002e5c: b29b uxth r3, r3
- 8002e5e: 4619 mov r1, r3
- 8002e60: 4803 ldr r0, [pc, #12] @ (8002e70 <DbgLEDToggle+0x20>)
- 8002e62: f007 ff3a bl 800acda <HAL_GPIO_TogglePin>
- }
- 8002e66: bf00 nop
- 8002e68: 3708 adds r7, #8
- 8002e6a: 46bd mov sp, r7
- 8002e6c: bd80 pop {r7, pc}
- 8002e6e: bf00 nop
- 8002e70: 58020c00 .word 0x58020c00
- 08002e74 <EnableCurrentSensors>:
- void EnableCurrentSensors (void) {
- 8002e74: b580 push {r7, lr}
- 8002e76: af00 add r7, sp, #0
- HAL_GPIO_WritePin (GPIOE, MCU_CS_PWR_EN, GPIO_PIN_SET);
- 8002e78: 2201 movs r2, #1
- 8002e7a: f44f 4100 mov.w r1, #32768 @ 0x8000
- 8002e7e: 4802 ldr r0, [pc, #8] @ (8002e88 <EnableCurrentSensors+0x14>)
- 8002e80: f007 ff12 bl 800aca8 <HAL_GPIO_WritePin>
- }
- 8002e84: bf00 nop
- 8002e86: bd80 pop {r7, pc}
- 8002e88: 58021000 .word 0x58021000
- 08002e8c <SelectCurrentSensorGain>:
- void DisableCurrentSensors (void) {
- HAL_GPIO_WritePin (GPIOE, MCU_CS_PWR_EN, GPIO_PIN_RESET);
- }
- void SelectCurrentSensorGain (CurrentSensor sensor, CurrentSensorGain gain) {
- 8002e8c: b580 push {r7, lr}
- 8002e8e: b084 sub sp, #16
- 8002e90: af00 add r7, sp, #0
- 8002e92: 4603 mov r3, r0
- 8002e94: 460a mov r2, r1
- 8002e96: 71fb strb r3, [r7, #7]
- 8002e98: 4613 mov r3, r2
- 8002e9a: 71bb strb r3, [r7, #6]
- uint8_t gpioOffset = 0;
- 8002e9c: 2300 movs r3, #0
- 8002e9e: 73fb strb r3, [r7, #15]
- switch (sensor) {
- 8002ea0: 79fb ldrb r3, [r7, #7]
- 8002ea2: 2b02 cmp r3, #2
- 8002ea4: d00c beq.n 8002ec0 <SelectCurrentSensorGain+0x34>
- 8002ea6: 2b02 cmp r3, #2
- 8002ea8: dc0d bgt.n 8002ec6 <SelectCurrentSensorGain+0x3a>
- 8002eaa: 2b00 cmp r3, #0
- 8002eac: d002 beq.n 8002eb4 <SelectCurrentSensorGain+0x28>
- 8002eae: 2b01 cmp r3, #1
- 8002eb0: d003 beq.n 8002eba <SelectCurrentSensorGain+0x2e>
- case CurrentSensorL1: gpioOffset = CURRENT_SENSOR_L1_GPIO_OFFSET; break;
- case CurrentSensorL2: gpioOffset = CURRENT_SENSOR_L2_GPIO_OFFSET; break;
- case CurrentSensorL3: gpioOffset = CURRENT_SENSOR_L3_GPIO_OFFSET; break;
- default: break;
- 8002eb2: e008 b.n 8002ec6 <SelectCurrentSensorGain+0x3a>
- case CurrentSensorL1: gpioOffset = CURRENT_SENSOR_L1_GPIO_OFFSET; break;
- 8002eb4: 2307 movs r3, #7
- 8002eb6: 73fb strb r3, [r7, #15]
- 8002eb8: e006 b.n 8002ec8 <SelectCurrentSensorGain+0x3c>
- case CurrentSensorL2: gpioOffset = CURRENT_SENSOR_L2_GPIO_OFFSET; break;
- 8002eba: 2309 movs r3, #9
- 8002ebc: 73fb strb r3, [r7, #15]
- 8002ebe: e003 b.n 8002ec8 <SelectCurrentSensorGain+0x3c>
- case CurrentSensorL3: gpioOffset = CURRENT_SENSOR_L3_GPIO_OFFSET; break;
- 8002ec0: 230d movs r3, #13
- 8002ec2: 73fb strb r3, [r7, #15]
- 8002ec4: e000 b.n 8002ec8 <SelectCurrentSensorGain+0x3c>
- default: break;
- 8002ec6: bf00 nop
- }
- if (gpioOffset > 0) {
- 8002ec8: 7bfb ldrb r3, [r7, #15]
- 8002eca: 2b00 cmp r3, #0
- 8002ecc: d023 beq.n 8002f16 <SelectCurrentSensorGain+0x8a>
- uint16_t gain0Gpio = 1 << gpioOffset;
- 8002ece: 7bfb ldrb r3, [r7, #15]
- 8002ed0: 2201 movs r2, #1
- 8002ed2: fa02 f303 lsl.w r3, r2, r3
- 8002ed6: 81bb strh r3, [r7, #12]
- uint16_t gain1Gpio = 1 << (gpioOffset + 1);
- 8002ed8: 7bfb ldrb r3, [r7, #15]
- 8002eda: 3301 adds r3, #1
- 8002edc: 2201 movs r2, #1
- 8002ede: fa02 f303 lsl.w r3, r2, r3
- 8002ee2: 817b strh r3, [r7, #10]
- uint16_t gpioState = ((uint16_t)gain) & 0x0001;
- 8002ee4: 79bb ldrb r3, [r7, #6]
- 8002ee6: b29b uxth r3, r3
- 8002ee8: f003 0301 and.w r3, r3, #1
- 8002eec: 813b strh r3, [r7, #8]
- HAL_GPIO_WritePin (GPIOE, gain0Gpio, gpioState);
- 8002eee: 893b ldrh r3, [r7, #8]
- 8002ef0: b2da uxtb r2, r3
- 8002ef2: 89bb ldrh r3, [r7, #12]
- 8002ef4: 4619 mov r1, r3
- 8002ef6: 480a ldr r0, [pc, #40] @ (8002f20 <SelectCurrentSensorGain+0x94>)
- 8002ef8: f007 fed6 bl 800aca8 <HAL_GPIO_WritePin>
- gpioState = (((uint16_t)gain) >> 1) & 0x0001;
- 8002efc: 79bb ldrb r3, [r7, #6]
- 8002efe: 085b lsrs r3, r3, #1
- 8002f00: b2db uxtb r3, r3
- 8002f02: f003 0301 and.w r3, r3, #1
- 8002f06: 813b strh r3, [r7, #8]
- HAL_GPIO_WritePin (GPIOE, gain1Gpio, gpioState);
- 8002f08: 893b ldrh r3, [r7, #8]
- 8002f0a: b2da uxtb r2, r3
- 8002f0c: 897b ldrh r3, [r7, #10]
- 8002f0e: 4619 mov r1, r3
- 8002f10: 4803 ldr r0, [pc, #12] @ (8002f20 <SelectCurrentSensorGain+0x94>)
- 8002f12: f007 fec9 bl 800aca8 <HAL_GPIO_WritePin>
- }
- }
- 8002f16: bf00 nop
- 8002f18: 3710 adds r7, #16
- 8002f1a: 46bd mov sp, r7
- 8002f1c: bd80 pop {r7, pc}
- 8002f1e: bf00 nop
- 8002f20: 58021000 .word 0x58021000
- 08002f24 <motorControl>:
- uint8_t
- motorControl (TIM_HandleTypeDef* htim, TIM_OC_InitTypeDef* motorTimerConfigOC, uint8_t channel1, uint8_t channel2, osTimerId_t motorTimerHandle, int32_t motorPWMPulse, int32_t motorTimerPeriod, uint8_t switchLimiterUpStat, uint8_t switchLimiterDownStat) {
- 8002f24: b580 push {r7, lr}
- 8002f26: b088 sub sp, #32
- 8002f28: af02 add r7, sp, #8
- 8002f2a: 60f8 str r0, [r7, #12]
- 8002f2c: 60b9 str r1, [r7, #8]
- 8002f2e: 4611 mov r1, r2
- 8002f30: 461a mov r2, r3
- 8002f32: 460b mov r3, r1
- 8002f34: 71fb strb r3, [r7, #7]
- 8002f36: 4613 mov r3, r2
- 8002f38: 71bb strb r3, [r7, #6]
- uint32_t motorStatus = 0;
- 8002f3a: 2300 movs r3, #0
- 8002f3c: 617b str r3, [r7, #20]
- MotorDriverState setMotorYState = HiZ;
- 8002f3e: 2300 movs r3, #0
- 8002f40: 74fb strb r3, [r7, #19]
- HAL_TIM_PWM_Stop (htim, channel1);
- 8002f42: 79fb ldrb r3, [r7, #7]
- 8002f44: 4619 mov r1, r3
- 8002f46: 68f8 ldr r0, [r7, #12]
- 8002f48: f00c f8b6 bl 800f0b8 <HAL_TIM_PWM_Stop>
- HAL_TIM_PWM_Stop (htim, channel2);
- 8002f4c: 79bb ldrb r3, [r7, #6]
- 8002f4e: 4619 mov r1, r3
- 8002f50: 68f8 ldr r0, [r7, #12]
- 8002f52: f00c f8b1 bl 800f0b8 <HAL_TIM_PWM_Stop>
- if (motorTimerPeriod > 0) {
- 8002f56: 6abb ldr r3, [r7, #40] @ 0x28
- 8002f58: 2b00 cmp r3, #0
- 8002f5a: f340 808c ble.w 8003076 <motorControl+0x152>
- if (motorPWMPulse > 0) {
- 8002f5e: 6a7b ldr r3, [r7, #36] @ 0x24
- 8002f60: 2b00 cmp r3, #0
- 8002f62: dd2c ble.n 8002fbe <motorControl+0x9a>
- // Forward
- if (switchLimiterUpStat == 0) {
- 8002f64: f897 302c ldrb.w r3, [r7, #44] @ 0x2c
- 8002f68: 2b00 cmp r3, #0
- 8002f6a: d11d bne.n 8002fa8 <motorControl+0x84>
- setMotorYState = Forward;
- 8002f6c: 2301 movs r3, #1
- 8002f6e: 74fb strb r3, [r7, #19]
- motorAction (htim, motorTimerConfigOC, channel1, channel2, setMotorYState, abs (motorPWMPulse) * 10);
- 8002f70: 79f9 ldrb r1, [r7, #7]
- 8002f72: 79b8 ldrb r0, [r7, #6]
- 8002f74: 6a7b ldr r3, [r7, #36] @ 0x24
- 8002f76: ea83 72e3 eor.w r2, r3, r3, asr #31
- 8002f7a: eba2 72e3 sub.w r2, r2, r3, asr #31
- 8002f7e: 4613 mov r3, r2
- 8002f80: 009b lsls r3, r3, #2
- 8002f82: 4413 add r3, r2
- 8002f84: 005b lsls r3, r3, #1
- 8002f86: 9301 str r3, [sp, #4]
- 8002f88: 7cfb ldrb r3, [r7, #19]
- 8002f8a: 9300 str r3, [sp, #0]
- 8002f8c: 4603 mov r3, r0
- 8002f8e: 460a mov r2, r1
- 8002f90: 68b9 ldr r1, [r7, #8]
- 8002f92: 68f8 ldr r0, [r7, #12]
- 8002f94: f000 f8ff bl 8003196 <motorAction>
- HAL_TIM_PWM_Start (htim, channel1);
- 8002f98: 79fb ldrb r3, [r7, #7]
- 8002f9a: 4619 mov r1, r3
- 8002f9c: 68f8 ldr r0, [r7, #12]
- 8002f9e: f00b ff7d bl 800ee9c <HAL_TIM_PWM_Start>
- motorStatus = 1;
- 8002fa2: 2301 movs r3, #1
- 8002fa4: 617b str r3, [r7, #20]
- 8002fa6: e004 b.n 8002fb2 <motorControl+0x8e>
- } else {
- HAL_TIM_PWM_Stop (htim, channel1);
- 8002fa8: 79fb ldrb r3, [r7, #7]
- 8002faa: 4619 mov r1, r3
- 8002fac: 68f8 ldr r0, [r7, #12]
- 8002fae: f00c f883 bl 800f0b8 <HAL_TIM_PWM_Stop>
- }
- HAL_TIM_PWM_Stop (htim, channel2);
- 8002fb2: 79bb ldrb r3, [r7, #6]
- 8002fb4: 4619 mov r1, r3
- 8002fb6: 68f8 ldr r0, [r7, #12]
- 8002fb8: f00c f87e bl 800f0b8 <HAL_TIM_PWM_Stop>
- 8002fbc: e051 b.n 8003062 <motorControl+0x13e>
- } else if (motorPWMPulse < 0) {
- 8002fbe: 6a7b ldr r3, [r7, #36] @ 0x24
- 8002fc0: 2b00 cmp r3, #0
- 8002fc2: da2c bge.n 800301e <motorControl+0xfa>
- // Reverse
- if (switchLimiterDownStat == 0) {
- 8002fc4: f897 3030 ldrb.w r3, [r7, #48] @ 0x30
- 8002fc8: 2b00 cmp r3, #0
- 8002fca: d11d bne.n 8003008 <motorControl+0xe4>
- setMotorYState = Reverse;
- 8002fcc: 2302 movs r3, #2
- 8002fce: 74fb strb r3, [r7, #19]
- motorAction (htim, motorTimerConfigOC, channel1, channel2, setMotorYState, abs (motorPWMPulse) * 10);
- 8002fd0: 79f9 ldrb r1, [r7, #7]
- 8002fd2: 79b8 ldrb r0, [r7, #6]
- 8002fd4: 6a7b ldr r3, [r7, #36] @ 0x24
- 8002fd6: ea83 72e3 eor.w r2, r3, r3, asr #31
- 8002fda: eba2 72e3 sub.w r2, r2, r3, asr #31
- 8002fde: 4613 mov r3, r2
- 8002fe0: 009b lsls r3, r3, #2
- 8002fe2: 4413 add r3, r2
- 8002fe4: 005b lsls r3, r3, #1
- 8002fe6: 9301 str r3, [sp, #4]
- 8002fe8: 7cfb ldrb r3, [r7, #19]
- 8002fea: 9300 str r3, [sp, #0]
- 8002fec: 4603 mov r3, r0
- 8002fee: 460a mov r2, r1
- 8002ff0: 68b9 ldr r1, [r7, #8]
- 8002ff2: 68f8 ldr r0, [r7, #12]
- 8002ff4: f000 f8cf bl 8003196 <motorAction>
- HAL_TIM_PWM_Start (htim, channel2);
- 8002ff8: 79bb ldrb r3, [r7, #6]
- 8002ffa: 4619 mov r1, r3
- 8002ffc: 68f8 ldr r0, [r7, #12]
- 8002ffe: f00b ff4d bl 800ee9c <HAL_TIM_PWM_Start>
- motorStatus = 1;
- 8003002: 2301 movs r3, #1
- 8003004: 617b str r3, [r7, #20]
- 8003006: e004 b.n 8003012 <motorControl+0xee>
- } else {
- HAL_TIM_PWM_Stop (htim, channel2);
- 8003008: 79bb ldrb r3, [r7, #6]
- 800300a: 4619 mov r1, r3
- 800300c: 68f8 ldr r0, [r7, #12]
- 800300e: f00c f853 bl 800f0b8 <HAL_TIM_PWM_Stop>
- }
- HAL_TIM_PWM_Stop (htim, channel1);
- 8003012: 79fb ldrb r3, [r7, #7]
- 8003014: 4619 mov r1, r3
- 8003016: 68f8 ldr r0, [r7, #12]
- 8003018: f00c f84e bl 800f0b8 <HAL_TIM_PWM_Stop>
- 800301c: e021 b.n 8003062 <motorControl+0x13e>
- } else {
- // Brake
- setMotorYState = Brake;
- 800301e: 2303 movs r3, #3
- 8003020: 74fb strb r3, [r7, #19]
- motorAction (htim, motorTimerConfigOC, channel1, channel2, setMotorYState, abs (motorPWMPulse) * 10);
- 8003022: 79f9 ldrb r1, [r7, #7]
- 8003024: 79b8 ldrb r0, [r7, #6]
- 8003026: 6a7b ldr r3, [r7, #36] @ 0x24
- 8003028: ea83 72e3 eor.w r2, r3, r3, asr #31
- 800302c: eba2 72e3 sub.w r2, r2, r3, asr #31
- 8003030: 4613 mov r3, r2
- 8003032: 009b lsls r3, r3, #2
- 8003034: 4413 add r3, r2
- 8003036: 005b lsls r3, r3, #1
- 8003038: 9301 str r3, [sp, #4]
- 800303a: 7cfb ldrb r3, [r7, #19]
- 800303c: 9300 str r3, [sp, #0]
- 800303e: 4603 mov r3, r0
- 8003040: 460a mov r2, r1
- 8003042: 68b9 ldr r1, [r7, #8]
- 8003044: 68f8 ldr r0, [r7, #12]
- 8003046: f000 f8a6 bl 8003196 <motorAction>
- HAL_TIM_PWM_Start (htim, channel1);
- 800304a: 79fb ldrb r3, [r7, #7]
- 800304c: 4619 mov r1, r3
- 800304e: 68f8 ldr r0, [r7, #12]
- 8003050: f00b ff24 bl 800ee9c <HAL_TIM_PWM_Start>
- HAL_TIM_PWM_Start (htim, channel2);
- 8003054: 79bb ldrb r3, [r7, #6]
- 8003056: 4619 mov r1, r3
- 8003058: 68f8 ldr r0, [r7, #12]
- 800305a: f00b ff1f bl 800ee9c <HAL_TIM_PWM_Start>
- motorStatus = 0;
- 800305e: 2300 movs r3, #0
- 8003060: 617b str r3, [r7, #20]
- }
- osTimerStart (motorTimerHandle, motorTimerPeriod * 1000);
- 8003062: 6abb ldr r3, [r7, #40] @ 0x28
- 8003064: f44f 727a mov.w r2, #1000 @ 0x3e8
- 8003068: fb02 f303 mul.w r3, r2, r3
- 800306c: 4619 mov r1, r3
- 800306e: 6a38 ldr r0, [r7, #32]
- 8003070: f010 fd6a bl 8013b48 <osTimerStart>
- 8003074: e089 b.n 800318a <motorControl+0x266>
- } else if ((motorTimerPeriod == 0) && (motorPWMPulse == 0)) {
- 8003076: 6abb ldr r3, [r7, #40] @ 0x28
- 8003078: 2b00 cmp r3, #0
- 800307a: d126 bne.n 80030ca <motorControl+0x1a6>
- 800307c: 6a7b ldr r3, [r7, #36] @ 0x24
- 800307e: 2b00 cmp r3, #0
- 8003080: d123 bne.n 80030ca <motorControl+0x1a6>
- motorAction (htim, motorTimerConfigOC, channel1, channel2, HiZ, abs (motorPWMPulse) * 10);
- 8003082: 79f9 ldrb r1, [r7, #7]
- 8003084: 79b8 ldrb r0, [r7, #6]
- 8003086: 6a7b ldr r3, [r7, #36] @ 0x24
- 8003088: ea83 72e3 eor.w r2, r3, r3, asr #31
- 800308c: eba2 72e3 sub.w r2, r2, r3, asr #31
- 8003090: 4613 mov r3, r2
- 8003092: 009b lsls r3, r3, #2
- 8003094: 4413 add r3, r2
- 8003096: 005b lsls r3, r3, #1
- 8003098: 9301 str r3, [sp, #4]
- 800309a: 2300 movs r3, #0
- 800309c: 9300 str r3, [sp, #0]
- 800309e: 4603 mov r3, r0
- 80030a0: 460a mov r2, r1
- 80030a2: 68b9 ldr r1, [r7, #8]
- 80030a4: 68f8 ldr r0, [r7, #12]
- 80030a6: f000 f876 bl 8003196 <motorAction>
- HAL_TIM_PWM_Stop (htim, channel1);
- 80030aa: 79fb ldrb r3, [r7, #7]
- 80030ac: 4619 mov r1, r3
- 80030ae: 68f8 ldr r0, [r7, #12]
- 80030b0: f00c f802 bl 800f0b8 <HAL_TIM_PWM_Stop>
- HAL_TIM_PWM_Stop (htim, channel2);
- 80030b4: 79bb ldrb r3, [r7, #6]
- 80030b6: 4619 mov r1, r3
- 80030b8: 68f8 ldr r0, [r7, #12]
- 80030ba: f00b fffd bl 800f0b8 <HAL_TIM_PWM_Stop>
- osTimerStop (motorTimerHandle);
- 80030be: 6a38 ldr r0, [r7, #32]
- 80030c0: f010 fd70 bl 8013ba4 <osTimerStop>
- motorStatus = 0;
- 80030c4: 2300 movs r3, #0
- 80030c6: 617b str r3, [r7, #20]
- 80030c8: e05f b.n 800318a <motorControl+0x266>
- } else if (motorTimerPeriod == -1) {
- 80030ca: 6abb ldr r3, [r7, #40] @ 0x28
- 80030cc: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 80030d0: d15b bne.n 800318a <motorControl+0x266>
- if (motorPWMPulse > 0) {
- 80030d2: 6a7b ldr r3, [r7, #36] @ 0x24
- 80030d4: 2b00 cmp r3, #0
- 80030d6: dd2c ble.n 8003132 <motorControl+0x20e>
- // Forward
- if (switchLimiterUpStat == 0) {
- 80030d8: f897 302c ldrb.w r3, [r7, #44] @ 0x2c
- 80030dc: 2b00 cmp r3, #0
- 80030de: d11d bne.n 800311c <motorControl+0x1f8>
- setMotorYState = Forward;
- 80030e0: 2301 movs r3, #1
- 80030e2: 74fb strb r3, [r7, #19]
- motorAction (htim, motorTimerConfigOC, channel1, channel2, setMotorYState, abs (motorPWMPulse) * 10);
- 80030e4: 79f9 ldrb r1, [r7, #7]
- 80030e6: 79b8 ldrb r0, [r7, #6]
- 80030e8: 6a7b ldr r3, [r7, #36] @ 0x24
- 80030ea: ea83 72e3 eor.w r2, r3, r3, asr #31
- 80030ee: eba2 72e3 sub.w r2, r2, r3, asr #31
- 80030f2: 4613 mov r3, r2
- 80030f4: 009b lsls r3, r3, #2
- 80030f6: 4413 add r3, r2
- 80030f8: 005b lsls r3, r3, #1
- 80030fa: 9301 str r3, [sp, #4]
- 80030fc: 7cfb ldrb r3, [r7, #19]
- 80030fe: 9300 str r3, [sp, #0]
- 8003100: 4603 mov r3, r0
- 8003102: 460a mov r2, r1
- 8003104: 68b9 ldr r1, [r7, #8]
- 8003106: 68f8 ldr r0, [r7, #12]
- 8003108: f000 f845 bl 8003196 <motorAction>
- HAL_TIM_PWM_Start (htim, channel1);
- 800310c: 79fb ldrb r3, [r7, #7]
- 800310e: 4619 mov r1, r3
- 8003110: 68f8 ldr r0, [r7, #12]
- 8003112: f00b fec3 bl 800ee9c <HAL_TIM_PWM_Start>
- motorStatus = 1;
- 8003116: 2301 movs r3, #1
- 8003118: 617b str r3, [r7, #20]
- 800311a: e004 b.n 8003126 <motorControl+0x202>
- } else {
- HAL_TIM_PWM_Stop (htim, channel1);
- 800311c: 79fb ldrb r3, [r7, #7]
- 800311e: 4619 mov r1, r3
- 8003120: 68f8 ldr r0, [r7, #12]
- 8003122: f00b ffc9 bl 800f0b8 <HAL_TIM_PWM_Stop>
- }
- HAL_TIM_PWM_Stop (htim, channel2);
- 8003126: 79bb ldrb r3, [r7, #6]
- 8003128: 4619 mov r1, r3
- 800312a: 68f8 ldr r0, [r7, #12]
- 800312c: f00b ffc4 bl 800f0b8 <HAL_TIM_PWM_Stop>
- 8003130: e02b b.n 800318a <motorControl+0x266>
- } else {
- // Reverse
- if (switchLimiterDownStat == 0) {
- 8003132: f897 3030 ldrb.w r3, [r7, #48] @ 0x30
- 8003136: 2b00 cmp r3, #0
- 8003138: d11d bne.n 8003176 <motorControl+0x252>
- setMotorYState = Reverse;
- 800313a: 2302 movs r3, #2
- 800313c: 74fb strb r3, [r7, #19]
- motorAction (htim, motorTimerConfigOC, channel1, channel2, setMotorYState, abs (motorPWMPulse) * 10);
- 800313e: 79f9 ldrb r1, [r7, #7]
- 8003140: 79b8 ldrb r0, [r7, #6]
- 8003142: 6a7b ldr r3, [r7, #36] @ 0x24
- 8003144: ea83 72e3 eor.w r2, r3, r3, asr #31
- 8003148: eba2 72e3 sub.w r2, r2, r3, asr #31
- 800314c: 4613 mov r3, r2
- 800314e: 009b lsls r3, r3, #2
- 8003150: 4413 add r3, r2
- 8003152: 005b lsls r3, r3, #1
- 8003154: 9301 str r3, [sp, #4]
- 8003156: 7cfb ldrb r3, [r7, #19]
- 8003158: 9300 str r3, [sp, #0]
- 800315a: 4603 mov r3, r0
- 800315c: 460a mov r2, r1
- 800315e: 68b9 ldr r1, [r7, #8]
- 8003160: 68f8 ldr r0, [r7, #12]
- 8003162: f000 f818 bl 8003196 <motorAction>
- HAL_TIM_PWM_Start (htim, channel2);
- 8003166: 79bb ldrb r3, [r7, #6]
- 8003168: 4619 mov r1, r3
- 800316a: 68f8 ldr r0, [r7, #12]
- 800316c: f00b fe96 bl 800ee9c <HAL_TIM_PWM_Start>
- motorStatus = 1;
- 8003170: 2301 movs r3, #1
- 8003172: 617b str r3, [r7, #20]
- 8003174: e004 b.n 8003180 <motorControl+0x25c>
- } else {
- HAL_TIM_PWM_Stop (htim, channel2);
- 8003176: 79bb ldrb r3, [r7, #6]
- 8003178: 4619 mov r1, r3
- 800317a: 68f8 ldr r0, [r7, #12]
- 800317c: f00b ff9c bl 800f0b8 <HAL_TIM_PWM_Stop>
- }
- HAL_TIM_PWM_Stop (htim, channel1);
- 8003180: 79fb ldrb r3, [r7, #7]
- 8003182: 4619 mov r1, r3
- 8003184: 68f8 ldr r0, [r7, #12]
- 8003186: f00b ff97 bl 800f0b8 <HAL_TIM_PWM_Stop>
- }
- }
- return motorStatus;
- 800318a: 697b ldr r3, [r7, #20]
- 800318c: b2db uxtb r3, r3
- }
- 800318e: 4618 mov r0, r3
- 8003190: 3718 adds r7, #24
- 8003192: 46bd mov sp, r7
- 8003194: bd80 pop {r7, pc}
- 08003196 <motorAction>:
- void motorAction (TIM_HandleTypeDef* tim, TIM_OC_InitTypeDef* timerConf, uint32_t channel1, uint32_t channel2, MotorDriverState setState, uint32_t pulse) {
- 8003196: b580 push {r7, lr}
- 8003198: b084 sub sp, #16
- 800319a: af00 add r7, sp, #0
- 800319c: 60f8 str r0, [r7, #12]
- 800319e: 60b9 str r1, [r7, #8]
- 80031a0: 607a str r2, [r7, #4]
- 80031a2: 603b str r3, [r7, #0]
- timerConf->Pulse = pulse;
- 80031a4: 68bb ldr r3, [r7, #8]
- 80031a6: 69fa ldr r2, [r7, #28]
- 80031a8: 605a str r2, [r3, #4]
- switch (setState) {
- 80031aa: 7e3b ldrb r3, [r7, #24]
- 80031ac: 2b02 cmp r3, #2
- 80031ae: dc02 bgt.n 80031b6 <motorAction+0x20>
- 80031b0: 2b00 cmp r3, #0
- 80031b2: da03 bge.n 80031bc <motorAction+0x26>
- 80031b4: e038 b.n 8003228 <motorAction+0x92>
- 80031b6: 2b03 cmp r3, #3
- 80031b8: d01b beq.n 80031f2 <motorAction+0x5c>
- 80031ba: e035 b.n 8003228 <motorAction+0x92>
- case Forward:
- case Reverse:
- case HiZ:
- timerConf->OCPolarity = TIM_OCPOLARITY_HIGH;
- 80031bc: 68bb ldr r3, [r7, #8]
- 80031be: 2200 movs r2, #0
- 80031c0: 609a str r2, [r3, #8]
- if (HAL_TIM_PWM_ConfigChannel (tim, timerConf, channel1) != HAL_OK) {
- 80031c2: 687a ldr r2, [r7, #4]
- 80031c4: 68b9 ldr r1, [r7, #8]
- 80031c6: 68f8 ldr r0, [r7, #12]
- 80031c8: f00c fb62 bl 800f890 <HAL_TIM_PWM_ConfigChannel>
- 80031cc: 4603 mov r3, r0
- 80031ce: 2b00 cmp r3, #0
- 80031d0: d001 beq.n 80031d6 <motorAction+0x40>
- Error_Handler ();
- 80031d2: f7fe fed9 bl 8001f88 <Error_Handler>
- }
- timerConf->OCPolarity = TIM_OCPOLARITY_HIGH;
- 80031d6: 68bb ldr r3, [r7, #8]
- 80031d8: 2200 movs r2, #0
- 80031da: 609a str r2, [r3, #8]
- if (HAL_TIM_PWM_ConfigChannel (tim, timerConf, channel2) != HAL_OK) {
- 80031dc: 683a ldr r2, [r7, #0]
- 80031de: 68b9 ldr r1, [r7, #8]
- 80031e0: 68f8 ldr r0, [r7, #12]
- 80031e2: f00c fb55 bl 800f890 <HAL_TIM_PWM_ConfigChannel>
- 80031e6: 4603 mov r3, r0
- 80031e8: 2b00 cmp r3, #0
- 80031ea: d038 beq.n 800325e <motorAction+0xc8>
- Error_Handler ();
- 80031ec: f7fe fecc bl 8001f88 <Error_Handler>
- }
- break;
- 80031f0: e035 b.n 800325e <motorAction+0xc8>
- case Brake:
- timerConf->OCPolarity = TIM_OCPOLARITY_LOW;
- 80031f2: 68bb ldr r3, [r7, #8]
- 80031f4: 2202 movs r2, #2
- 80031f6: 609a str r2, [r3, #8]
- if (HAL_TIM_PWM_ConfigChannel (tim, timerConf, channel1) != HAL_OK) {
- 80031f8: 687a ldr r2, [r7, #4]
- 80031fa: 68b9 ldr r1, [r7, #8]
- 80031fc: 68f8 ldr r0, [r7, #12]
- 80031fe: f00c fb47 bl 800f890 <HAL_TIM_PWM_ConfigChannel>
- 8003202: 4603 mov r3, r0
- 8003204: 2b00 cmp r3, #0
- 8003206: d001 beq.n 800320c <motorAction+0x76>
- Error_Handler ();
- 8003208: f7fe febe bl 8001f88 <Error_Handler>
- }
- timerConf->OCPolarity = TIM_OCPOLARITY_LOW;
- 800320c: 68bb ldr r3, [r7, #8]
- 800320e: 2202 movs r2, #2
- 8003210: 609a str r2, [r3, #8]
- if (HAL_TIM_PWM_ConfigChannel (tim, timerConf, channel2) != HAL_OK) {
- 8003212: 683a ldr r2, [r7, #0]
- 8003214: 68b9 ldr r1, [r7, #8]
- 8003216: 68f8 ldr r0, [r7, #12]
- 8003218: f00c fb3a bl 800f890 <HAL_TIM_PWM_ConfigChannel>
- 800321c: 4603 mov r3, r0
- 800321e: 2b00 cmp r3, #0
- 8003220: d01f beq.n 8003262 <motorAction+0xcc>
- Error_Handler ();
- 8003222: f7fe feb1 bl 8001f88 <Error_Handler>
- }
- break;
- 8003226: e01c b.n 8003262 <motorAction+0xcc>
- default:
- timerConf->OCPolarity = TIM_OCPOLARITY_HIGH;
- 8003228: 68bb ldr r3, [r7, #8]
- 800322a: 2200 movs r2, #0
- 800322c: 609a str r2, [r3, #8]
- if (HAL_TIM_PWM_ConfigChannel (tim, timerConf, channel1) != HAL_OK) {
- 800322e: 687a ldr r2, [r7, #4]
- 8003230: 68b9 ldr r1, [r7, #8]
- 8003232: 68f8 ldr r0, [r7, #12]
- 8003234: f00c fb2c bl 800f890 <HAL_TIM_PWM_ConfigChannel>
- 8003238: 4603 mov r3, r0
- 800323a: 2b00 cmp r3, #0
- 800323c: d001 beq.n 8003242 <motorAction+0xac>
- Error_Handler ();
- 800323e: f7fe fea3 bl 8001f88 <Error_Handler>
- }
- timerConf->OCPolarity = TIM_OCPOLARITY_HIGH;
- 8003242: 68bb ldr r3, [r7, #8]
- 8003244: 2200 movs r2, #0
- 8003246: 609a str r2, [r3, #8]
- if (HAL_TIM_PWM_ConfigChannel (tim, timerConf, channel2) != HAL_OK) {
- 8003248: 683a ldr r2, [r7, #0]
- 800324a: 68b9 ldr r1, [r7, #8]
- 800324c: 68f8 ldr r0, [r7, #12]
- 800324e: f00c fb1f bl 800f890 <HAL_TIM_PWM_ConfigChannel>
- 8003252: 4603 mov r3, r0
- 8003254: 2b00 cmp r3, #0
- 8003256: d006 beq.n 8003266 <motorAction+0xd0>
- Error_Handler ();
- 8003258: f7fe fe96 bl 8001f88 <Error_Handler>
- }
- break;
- 800325c: e003 b.n 8003266 <motorAction+0xd0>
- break;
- 800325e: bf00 nop
- 8003260: e002 b.n 8003268 <motorAction+0xd2>
- break;
- 8003262: bf00 nop
- 8003264: e000 b.n 8003268 <motorAction+0xd2>
- break;
- 8003266: bf00 nop
- }
- }
- 8003268: bf00 nop
- 800326a: 3710 adds r7, #16
- 800326c: 46bd mov sp, r7
- 800326e: bd80 pop {r7, pc}
- 08003270 <WriteDataToBuffer>:
- buff[newBuffPos++] = (uint8_t)((uData >> (i * 8)) & 0xFF);
- }
- *buffPos = newBuffPos;
- }
- void WriteDataToBuffer (uint8_t* buff, uint16_t* buffPos, void* data, uint8_t dataSize) {
- 8003270: b480 push {r7}
- 8003272: b089 sub sp, #36 @ 0x24
- 8003274: af00 add r7, sp, #0
- 8003276: 60f8 str r0, [r7, #12]
- 8003278: 60b9 str r1, [r7, #8]
- 800327a: 607a str r2, [r7, #4]
- 800327c: 70fb strb r3, [r7, #3]
- uint32_t* uDataPtr = data;
- 800327e: 687b ldr r3, [r7, #4]
- 8003280: 61bb str r3, [r7, #24]
- uint32_t uData = *uDataPtr;
- 8003282: 69bb ldr r3, [r7, #24]
- 8003284: 681b ldr r3, [r3, #0]
- 8003286: 617b str r3, [r7, #20]
- uint8_t i = 0;
- 8003288: 2300 movs r3, #0
- 800328a: 77fb strb r3, [r7, #31]
- uint8_t newBuffPos = *buffPos;
- 800328c: 68bb ldr r3, [r7, #8]
- 800328e: 881b ldrh r3, [r3, #0]
- 8003290: 77bb strb r3, [r7, #30]
- for (i = 0; i < dataSize; i++) {
- 8003292: 2300 movs r3, #0
- 8003294: 77fb strb r3, [r7, #31]
- 8003296: e00e b.n 80032b6 <WriteDataToBuffer+0x46>
- buff[newBuffPos++] = (uint8_t)((uData >> (i * 8)) & 0xFF);
- 8003298: 7ffb ldrb r3, [r7, #31]
- 800329a: 00db lsls r3, r3, #3
- 800329c: 697a ldr r2, [r7, #20]
- 800329e: 40da lsrs r2, r3
- 80032a0: 7fbb ldrb r3, [r7, #30]
- 80032a2: 1c59 adds r1, r3, #1
- 80032a4: 77b9 strb r1, [r7, #30]
- 80032a6: 4619 mov r1, r3
- 80032a8: 68fb ldr r3, [r7, #12]
- 80032aa: 440b add r3, r1
- 80032ac: b2d2 uxtb r2, r2
- 80032ae: 701a strb r2, [r3, #0]
- for (i = 0; i < dataSize; i++) {
- 80032b0: 7ffb ldrb r3, [r7, #31]
- 80032b2: 3301 adds r3, #1
- 80032b4: 77fb strb r3, [r7, #31]
- 80032b6: 7ffa ldrb r2, [r7, #31]
- 80032b8: 78fb ldrb r3, [r7, #3]
- 80032ba: 429a cmp r2, r3
- 80032bc: d3ec bcc.n 8003298 <WriteDataToBuffer+0x28>
- }
- *buffPos = newBuffPos;
- 80032be: 7fbb ldrb r3, [r7, #30]
- 80032c0: b29a uxth r2, r3
- 80032c2: 68bb ldr r3, [r7, #8]
- 80032c4: 801a strh r2, [r3, #0]
- }
- 80032c6: bf00 nop
- 80032c8: 3724 adds r7, #36 @ 0x24
- 80032ca: 46bd mov sp, r7
- 80032cc: f85d 7b04 ldr.w r7, [sp], #4
- 80032d0: 4770 bx lr
- 080032d2 <ReadWordFromBufer>:
- *data = CONVERT_BYTES_TO_SHORT_WORD(&buff[*buffPos]);
- *buffPos += sizeof(uint16_t);
- }
- void ReadWordFromBufer(uint8_t* buff, uint16_t* buffPos, uint32_t* data)
- {
- 80032d2: b480 push {r7}
- 80032d4: b085 sub sp, #20
- 80032d6: af00 add r7, sp, #0
- 80032d8: 60f8 str r0, [r7, #12]
- 80032da: 60b9 str r1, [r7, #8]
- 80032dc: 607a str r2, [r7, #4]
- *data = CONVERT_BYTES_TO_WORD(&buff[*buffPos]);
- 80032de: 68bb ldr r3, [r7, #8]
- 80032e0: 881b ldrh r3, [r3, #0]
- 80032e2: 3303 adds r3, #3
- 80032e4: 68fa ldr r2, [r7, #12]
- 80032e6: 4413 add r3, r2
- 80032e8: 781b ldrb r3, [r3, #0]
- 80032ea: 061a lsls r2, r3, #24
- 80032ec: 68bb ldr r3, [r7, #8]
- 80032ee: 881b ldrh r3, [r3, #0]
- 80032f0: 3302 adds r3, #2
- 80032f2: 68f9 ldr r1, [r7, #12]
- 80032f4: 440b add r3, r1
- 80032f6: 781b ldrb r3, [r3, #0]
- 80032f8: 041b lsls r3, r3, #16
- 80032fa: 431a orrs r2, r3
- 80032fc: 68bb ldr r3, [r7, #8]
- 80032fe: 881b ldrh r3, [r3, #0]
- 8003300: 3301 adds r3, #1
- 8003302: 68f9 ldr r1, [r7, #12]
- 8003304: 440b add r3, r1
- 8003306: 781b ldrb r3, [r3, #0]
- 8003308: 021b lsls r3, r3, #8
- 800330a: 4313 orrs r3, r2
- 800330c: 68ba ldr r2, [r7, #8]
- 800330e: 8812 ldrh r2, [r2, #0]
- 8003310: 4611 mov r1, r2
- 8003312: 68fa ldr r2, [r7, #12]
- 8003314: 440a add r2, r1
- 8003316: 7812 ldrb r2, [r2, #0]
- 8003318: 4313 orrs r3, r2
- 800331a: 461a mov r2, r3
- 800331c: 687b ldr r3, [r7, #4]
- 800331e: 601a str r2, [r3, #0]
- *buffPos += sizeof(uint32_t);
- 8003320: 68bb ldr r3, [r7, #8]
- 8003322: 881b ldrh r3, [r3, #0]
- 8003324: 3304 adds r3, #4
- 8003326: b29a uxth r2, r3
- 8003328: 68bb ldr r3, [r7, #8]
- 800332a: 801a strh r2, [r3, #0]
- }
- 800332c: bf00 nop
- 800332e: 3714 adds r7, #20
- 8003330: 46bd mov sp, r7
- 8003332: f85d 7b04 ldr.w r7, [sp], #4
- 8003336: 4770 bx lr
- 08003338 <PrepareRespFrame>:
- txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (crc);
- return txBufferPos;
- }
- uint16_t PrepareRespFrame (uint8_t* txBuffer, uint16_t frameId, SerialProtocolCommands frameCommand, SerialProtocolRespStatus respStatus, uint8_t* dataBuffer, uint16_t dataLength) {
- 8003338: b580 push {r7, lr}
- 800333a: b084 sub sp, #16
- 800333c: af00 add r7, sp, #0
- 800333e: 6078 str r0, [r7, #4]
- 8003340: 4608 mov r0, r1
- 8003342: 4611 mov r1, r2
- 8003344: 461a mov r2, r3
- 8003346: 4603 mov r3, r0
- 8003348: 807b strh r3, [r7, #2]
- 800334a: 460b mov r3, r1
- 800334c: 707b strb r3, [r7, #1]
- 800334e: 4613 mov r3, r2
- 8003350: 703b strb r3, [r7, #0]
- uint16_t crc = 0;
- 8003352: 2300 movs r3, #0
- 8003354: 81bb strh r3, [r7, #12]
- uint16_t txBufferPos = 0;
- 8003356: 2300 movs r3, #0
- 8003358: 81fb strh r3, [r7, #14]
- uint16_t frameCmd = ((uint16_t)frameCommand) | 0x8000; // MSB set means response
- 800335a: 787b ldrb r3, [r7, #1]
- 800335c: b21a sxth r2, r3
- 800335e: 4b43 ldr r3, [pc, #268] @ (800346c <PrepareRespFrame+0x134>)
- 8003360: 4313 orrs r3, r2
- 8003362: b21b sxth r3, r3
- 8003364: 817b strh r3, [r7, #10]
- memset (txBuffer, 0x00, dataLength);
- 8003366: 8bbb ldrh r3, [r7, #28]
- 8003368: 461a mov r2, r3
- 800336a: 2100 movs r1, #0
- 800336c: 6878 ldr r0, [r7, #4]
- 800336e: f014 fd1a bl 8017da6 <memset>
- txBuffer[txBufferPos++] = FRAME_INDICATOR;
- 8003372: 89fb ldrh r3, [r7, #14]
- 8003374: 1c5a adds r2, r3, #1
- 8003376: 81fa strh r2, [r7, #14]
- 8003378: 461a mov r2, r3
- 800337a: 687b ldr r3, [r7, #4]
- 800337c: 4413 add r3, r2
- 800337e: 22aa movs r2, #170 @ 0xaa
- 8003380: 701a strb r2, [r3, #0]
- txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameId);
- 8003382: 89fb ldrh r3, [r7, #14]
- 8003384: 1c5a adds r2, r3, #1
- 8003386: 81fa strh r2, [r7, #14]
- 8003388: 461a mov r2, r3
- 800338a: 687b ldr r3, [r7, #4]
- 800338c: 4413 add r3, r2
- 800338e: 887a ldrh r2, [r7, #2]
- 8003390: b2d2 uxtb r2, r2
- 8003392: 701a strb r2, [r3, #0]
- txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameId);
- 8003394: 887b ldrh r3, [r7, #2]
- 8003396: 0a1b lsrs r3, r3, #8
- 8003398: b29a uxth r2, r3
- 800339a: 89fb ldrh r3, [r7, #14]
- 800339c: 1c59 adds r1, r3, #1
- 800339e: 81f9 strh r1, [r7, #14]
- 80033a0: 4619 mov r1, r3
- 80033a2: 687b ldr r3, [r7, #4]
- 80033a4: 440b add r3, r1
- 80033a6: b2d2 uxtb r2, r2
- 80033a8: 701a strb r2, [r3, #0]
- txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameCmd);
- 80033aa: 89fb ldrh r3, [r7, #14]
- 80033ac: 1c5a adds r2, r3, #1
- 80033ae: 81fa strh r2, [r7, #14]
- 80033b0: 461a mov r2, r3
- 80033b2: 687b ldr r3, [r7, #4]
- 80033b4: 4413 add r3, r2
- 80033b6: 897a ldrh r2, [r7, #10]
- 80033b8: b2d2 uxtb r2, r2
- 80033ba: 701a strb r2, [r3, #0]
- txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameCmd);
- 80033bc: 897b ldrh r3, [r7, #10]
- 80033be: 0a1b lsrs r3, r3, #8
- 80033c0: b29a uxth r2, r3
- 80033c2: 89fb ldrh r3, [r7, #14]
- 80033c4: 1c59 adds r1, r3, #1
- 80033c6: 81f9 strh r1, [r7, #14]
- 80033c8: 4619 mov r1, r3
- 80033ca: 687b ldr r3, [r7, #4]
- 80033cc: 440b add r3, r1
- 80033ce: b2d2 uxtb r2, r2
- 80033d0: 701a strb r2, [r3, #0]
- txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (dataLength);
- 80033d2: 89fb ldrh r3, [r7, #14]
- 80033d4: 1c5a adds r2, r3, #1
- 80033d6: 81fa strh r2, [r7, #14]
- 80033d8: 461a mov r2, r3
- 80033da: 687b ldr r3, [r7, #4]
- 80033dc: 4413 add r3, r2
- 80033de: 8bba ldrh r2, [r7, #28]
- 80033e0: b2d2 uxtb r2, r2
- 80033e2: 701a strb r2, [r3, #0]
- txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (dataLength);
- 80033e4: 8bbb ldrh r3, [r7, #28]
- 80033e6: 0a1b lsrs r3, r3, #8
- 80033e8: b29a uxth r2, r3
- 80033ea: 89fb ldrh r3, [r7, #14]
- 80033ec: 1c59 adds r1, r3, #1
- 80033ee: 81f9 strh r1, [r7, #14]
- 80033f0: 4619 mov r1, r3
- 80033f2: 687b ldr r3, [r7, #4]
- 80033f4: 440b add r3, r1
- 80033f6: b2d2 uxtb r2, r2
- 80033f8: 701a strb r2, [r3, #0]
- txBuffer[txBufferPos++] = (uint8_t)respStatus;
- 80033fa: 89fb ldrh r3, [r7, #14]
- 80033fc: 1c5a adds r2, r3, #1
- 80033fe: 81fa strh r2, [r7, #14]
- 8003400: 461a mov r2, r3
- 8003402: 687b ldr r3, [r7, #4]
- 8003404: 4413 add r3, r2
- 8003406: 783a ldrb r2, [r7, #0]
- 8003408: 701a strb r2, [r3, #0]
- if (dataLength > 0) {
- 800340a: 8bbb ldrh r3, [r7, #28]
- 800340c: 2b00 cmp r3, #0
- 800340e: d00b beq.n 8003428 <PrepareRespFrame+0xf0>
- memcpy (&txBuffer[txBufferPos], dataBuffer, dataLength);
- 8003410: 89fb ldrh r3, [r7, #14]
- 8003412: 687a ldr r2, [r7, #4]
- 8003414: 4413 add r3, r2
- 8003416: 8bba ldrh r2, [r7, #28]
- 8003418: 69b9 ldr r1, [r7, #24]
- 800341a: 4618 mov r0, r3
- 800341c: f014 fd95 bl 8017f4a <memcpy>
- txBufferPos += dataLength;
- 8003420: 89fa ldrh r2, [r7, #14]
- 8003422: 8bbb ldrh r3, [r7, #28]
- 8003424: 4413 add r3, r2
- 8003426: 81fb strh r3, [r7, #14]
- }
- crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)txBuffer, txBufferPos);
- 8003428: 89fb ldrh r3, [r7, #14]
- 800342a: 461a mov r2, r3
- 800342c: 6879 ldr r1, [r7, #4]
- 800342e: 4810 ldr r0, [pc, #64] @ (8003470 <PrepareRespFrame+0x138>)
- 8003430: f004 f844 bl 80074bc <HAL_CRC_Calculate>
- 8003434: 4603 mov r3, r0
- 8003436: 81bb strh r3, [r7, #12]
- txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (crc);
- 8003438: 89fb ldrh r3, [r7, #14]
- 800343a: 1c5a adds r2, r3, #1
- 800343c: 81fa strh r2, [r7, #14]
- 800343e: 461a mov r2, r3
- 8003440: 687b ldr r3, [r7, #4]
- 8003442: 4413 add r3, r2
- 8003444: 89ba ldrh r2, [r7, #12]
- 8003446: b2d2 uxtb r2, r2
- 8003448: 701a strb r2, [r3, #0]
- txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (crc);
- 800344a: 89bb ldrh r3, [r7, #12]
- 800344c: 0a1b lsrs r3, r3, #8
- 800344e: b29a uxth r2, r3
- 8003450: 89fb ldrh r3, [r7, #14]
- 8003452: 1c59 adds r1, r3, #1
- 8003454: 81f9 strh r1, [r7, #14]
- 8003456: 4619 mov r1, r3
- 8003458: 687b ldr r3, [r7, #4]
- 800345a: 440b add r3, r1
- 800345c: b2d2 uxtb r2, r2
- 800345e: 701a strb r2, [r3, #0]
- return txBufferPos;
- 8003460: 89fb ldrh r3, [r7, #14]
- }
- 8003462: 4618 mov r0, r3
- 8003464: 3710 adds r7, #16
- 8003466: 46bd mov sp, r7
- 8003468: bd80 pop {r7, pc}
- 800346a: bf00 nop
- 800346c: ffff8000 .word 0xffff8000
- 8003470: 24000400 .word 0x24000400
- 08003474 <HAL_MspInit>:
- void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
- /**
- * Initializes the Global MSP.
- */
- void HAL_MspInit(void)
- {
- 8003474: b580 push {r7, lr}
- 8003476: b086 sub sp, #24
- 8003478: af00 add r7, sp, #0
- /* USER CODE BEGIN MspInit 0 */
- /* USER CODE END MspInit 0 */
- PWREx_AVDTypeDef sConfigAVD = {0};
- 800347a: f107 0310 add.w r3, r7, #16
- 800347e: 2200 movs r2, #0
- 8003480: 601a str r2, [r3, #0]
- 8003482: 605a str r2, [r3, #4]
- PWR_PVDTypeDef sConfigPVD = {0};
- 8003484: f107 0308 add.w r3, r7, #8
- 8003488: 2200 movs r2, #0
- 800348a: 601a str r2, [r3, #0]
- 800348c: 605a str r2, [r3, #4]
- __HAL_RCC_SYSCFG_CLK_ENABLE();
- 800348e: 4b26 ldr r3, [pc, #152] @ (8003528 <HAL_MspInit+0xb4>)
- 8003490: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4
- 8003494: 4a24 ldr r2, [pc, #144] @ (8003528 <HAL_MspInit+0xb4>)
- 8003496: f043 0302 orr.w r3, r3, #2
- 800349a: f8c2 30f4 str.w r3, [r2, #244] @ 0xf4
- 800349e: 4b22 ldr r3, [pc, #136] @ (8003528 <HAL_MspInit+0xb4>)
- 80034a0: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4
- 80034a4: f003 0302 and.w r3, r3, #2
- 80034a8: 607b str r3, [r7, #4]
- 80034aa: 687b ldr r3, [r7, #4]
- /* System interrupt init*/
- /* PendSV_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
- 80034ac: 2200 movs r2, #0
- 80034ae: 210f movs r1, #15
- 80034b0: f06f 0001 mvn.w r0, #1
- 80034b4: f003 fefe bl 80072b4 <HAL_NVIC_SetPriority>
- /* Peripheral interrupt init */
- /* RCC_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(RCC_IRQn, 5, 0);
- 80034b8: 2200 movs r2, #0
- 80034ba: 2105 movs r1, #5
- 80034bc: 2005 movs r0, #5
- 80034be: f003 fef9 bl 80072b4 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(RCC_IRQn);
- 80034c2: 2005 movs r0, #5
- 80034c4: f003 ff10 bl 80072e8 <HAL_NVIC_EnableIRQ>
- /** AVD Configuration
- */
- sConfigAVD.AVDLevel = PWR_AVDLEVEL_3;
- 80034c8: f44f 23c0 mov.w r3, #393216 @ 0x60000
- 80034cc: 613b str r3, [r7, #16]
- sConfigAVD.Mode = PWR_AVD_MODE_NORMAL;
- 80034ce: 2300 movs r3, #0
- 80034d0: 617b str r3, [r7, #20]
- HAL_PWREx_ConfigAVD(&sConfigAVD);
- 80034d2: f107 0310 add.w r3, r7, #16
- 80034d6: 4618 mov r0, r3
- 80034d8: f007 fd56 bl 800af88 <HAL_PWREx_ConfigAVD>
- /** Enable the AVD Output
- */
- HAL_PWREx_EnableAVD();
- 80034dc: f007 fdca bl 800b074 <HAL_PWREx_EnableAVD>
- /** PVD Configuration
- */
- sConfigPVD.PVDLevel = PWR_PVDLEVEL_6;
- 80034e0: 23c0 movs r3, #192 @ 0xc0
- 80034e2: 60bb str r3, [r7, #8]
- sConfigPVD.Mode = PWR_PVD_MODE_NORMAL;
- 80034e4: 2300 movs r3, #0
- 80034e6: 60fb str r3, [r7, #12]
- HAL_PWR_ConfigPVD(&sConfigPVD);
- 80034e8: f107 0308 add.w r3, r7, #8
- 80034ec: 4618 mov r0, r3
- 80034ee: f007 fc87 bl 800ae00 <HAL_PWR_ConfigPVD>
- /** Enable the PVD Output
- */
- HAL_PWR_EnablePVD();
- 80034f2: f007 fcff bl 800aef4 <HAL_PWR_EnablePVD>
- /** Enable the VREF clock
- */
- __HAL_RCC_VREF_CLK_ENABLE();
- 80034f6: 4b0c ldr r3, [pc, #48] @ (8003528 <HAL_MspInit+0xb4>)
- 80034f8: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4
- 80034fc: 4a0a ldr r2, [pc, #40] @ (8003528 <HAL_MspInit+0xb4>)
- 80034fe: f443 4300 orr.w r3, r3, #32768 @ 0x8000
- 8003502: f8c2 30f4 str.w r3, [r2, #244] @ 0xf4
- 8003506: 4b08 ldr r3, [pc, #32] @ (8003528 <HAL_MspInit+0xb4>)
- 8003508: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4
- 800350c: f403 4300 and.w r3, r3, #32768 @ 0x8000
- 8003510: 603b str r3, [r7, #0]
- 8003512: 683b ldr r3, [r7, #0]
- /** Disable the Internal Voltage Reference buffer
- */
- HAL_SYSCFG_DisableVREFBUF();
- 8003514: f002 f854 bl 80055c0 <HAL_SYSCFG_DisableVREFBUF>
- /** Configure the internal voltage reference buffer high impedance mode
- */
- HAL_SYSCFG_VREFBUF_HighImpedanceConfig(SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE);
- 8003518: 2002 movs r0, #2
- 800351a: f002 f83d bl 8005598 <HAL_SYSCFG_VREFBUF_HighImpedanceConfig>
- /* USER CODE BEGIN MspInit 1 */
- /* USER CODE END MspInit 1 */
- }
- 800351e: bf00 nop
- 8003520: 3718 adds r7, #24
- 8003522: 46bd mov sp, r7
- 8003524: bd80 pop {r7, pc}
- 8003526: bf00 nop
- 8003528: 58024400 .word 0x58024400
- 0800352c <HAL_ADC_MspInit>:
- * This function configures the hardware resources used in this example
- * @param hadc: ADC handle pointer
- * @retval None
- */
- void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
- {
- 800352c: b580 push {r7, lr}
- 800352e: b092 sub sp, #72 @ 0x48
- 8003530: af00 add r7, sp, #0
- 8003532: 6078 str r0, [r7, #4]
- GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8003534: f107 0334 add.w r3, r7, #52 @ 0x34
- 8003538: 2200 movs r2, #0
- 800353a: 601a str r2, [r3, #0]
- 800353c: 605a str r2, [r3, #4]
- 800353e: 609a str r2, [r3, #8]
- 8003540: 60da str r2, [r3, #12]
- 8003542: 611a str r2, [r3, #16]
- if(hadc->Instance==ADC1)
- 8003544: 687b ldr r3, [r7, #4]
- 8003546: 681b ldr r3, [r3, #0]
- 8003548: 4a9d ldr r2, [pc, #628] @ (80037c0 <HAL_ADC_MspInit+0x294>)
- 800354a: 4293 cmp r3, r2
- 800354c: f040 8099 bne.w 8003682 <HAL_ADC_MspInit+0x156>
- {
- /* USER CODE BEGIN ADC1_MspInit 0 */
- /* USER CODE END ADC1_MspInit 0 */
- /* Peripheral clock enable */
- HAL_RCC_ADC12_CLK_ENABLED++;
- 8003550: 4b9c ldr r3, [pc, #624] @ (80037c4 <HAL_ADC_MspInit+0x298>)
- 8003552: 681b ldr r3, [r3, #0]
- 8003554: 3301 adds r3, #1
- 8003556: 4a9b ldr r2, [pc, #620] @ (80037c4 <HAL_ADC_MspInit+0x298>)
- 8003558: 6013 str r3, [r2, #0]
- if(HAL_RCC_ADC12_CLK_ENABLED==1){
- 800355a: 4b9a ldr r3, [pc, #616] @ (80037c4 <HAL_ADC_MspInit+0x298>)
- 800355c: 681b ldr r3, [r3, #0]
- 800355e: 2b01 cmp r3, #1
- 8003560: d10e bne.n 8003580 <HAL_ADC_MspInit+0x54>
- __HAL_RCC_ADC12_CLK_ENABLE();
- 8003562: 4b99 ldr r3, [pc, #612] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 8003564: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8
- 8003568: 4a97 ldr r2, [pc, #604] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 800356a: f043 0320 orr.w r3, r3, #32
- 800356e: f8c2 30d8 str.w r3, [r2, #216] @ 0xd8
- 8003572: 4b95 ldr r3, [pc, #596] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 8003574: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8
- 8003578: f003 0320 and.w r3, r3, #32
- 800357c: 633b str r3, [r7, #48] @ 0x30
- 800357e: 6b3b ldr r3, [r7, #48] @ 0x30
- }
- __HAL_RCC_GPIOA_CLK_ENABLE();
- 8003580: 4b91 ldr r3, [pc, #580] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 8003582: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003586: 4a90 ldr r2, [pc, #576] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 8003588: f043 0301 orr.w r3, r3, #1
- 800358c: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 8003590: 4b8d ldr r3, [pc, #564] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 8003592: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003596: f003 0301 and.w r3, r3, #1
- 800359a: 62fb str r3, [r7, #44] @ 0x2c
- 800359c: 6afb ldr r3, [r7, #44] @ 0x2c
- __HAL_RCC_GPIOC_CLK_ENABLE();
- 800359e: 4b8a ldr r3, [pc, #552] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80035a0: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 80035a4: 4a88 ldr r2, [pc, #544] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80035a6: f043 0304 orr.w r3, r3, #4
- 80035aa: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 80035ae: 4b86 ldr r3, [pc, #536] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80035b0: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 80035b4: f003 0304 and.w r3, r3, #4
- 80035b8: 62bb str r3, [r7, #40] @ 0x28
- 80035ba: 6abb ldr r3, [r7, #40] @ 0x28
- __HAL_RCC_GPIOB_CLK_ENABLE();
- 80035bc: 4b82 ldr r3, [pc, #520] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80035be: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 80035c2: 4a81 ldr r2, [pc, #516] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80035c4: f043 0302 orr.w r3, r3, #2
- 80035c8: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 80035cc: 4b7e ldr r3, [pc, #504] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80035ce: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 80035d2: f003 0302 and.w r3, r3, #2
- 80035d6: 627b str r3, [r7, #36] @ 0x24
- 80035d8: 6a7b ldr r3, [r7, #36] @ 0x24
- PA3 ------> ADC1_INP15
- PA7 ------> ADC1_INP7
- PC5 ------> ADC1_INP8
- PB0 ------> ADC1_INP9
- */
- GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
- 80035da: 238f movs r3, #143 @ 0x8f
- 80035dc: 637b str r3, [r7, #52] @ 0x34
- |GPIO_PIN_7;
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 80035de: 2303 movs r3, #3
- 80035e0: 63bb str r3, [r7, #56] @ 0x38
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 80035e2: 2300 movs r3, #0
- 80035e4: 63fb str r3, [r7, #60] @ 0x3c
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 80035e6: f107 0334 add.w r3, r7, #52 @ 0x34
- 80035ea: 4619 mov r1, r3
- 80035ec: 4877 ldr r0, [pc, #476] @ (80037cc <HAL_ADC_MspInit+0x2a0>)
- 80035ee: f007 f993 bl 800a918 <HAL_GPIO_Init>
- GPIO_InitStruct.Pin = GPIO_PIN_5;
- 80035f2: 2320 movs r3, #32
- 80035f4: 637b str r3, [r7, #52] @ 0x34
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 80035f6: 2303 movs r3, #3
- 80035f8: 63bb str r3, [r7, #56] @ 0x38
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 80035fa: 2300 movs r3, #0
- 80035fc: 63fb str r3, [r7, #60] @ 0x3c
- HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 80035fe: f107 0334 add.w r3, r7, #52 @ 0x34
- 8003602: 4619 mov r1, r3
- 8003604: 4872 ldr r0, [pc, #456] @ (80037d0 <HAL_ADC_MspInit+0x2a4>)
- 8003606: f007 f987 bl 800a918 <HAL_GPIO_Init>
- GPIO_InitStruct.Pin = GPIO_PIN_0;
- 800360a: 2301 movs r3, #1
- 800360c: 637b str r3, [r7, #52] @ 0x34
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 800360e: 2303 movs r3, #3
- 8003610: 63bb str r3, [r7, #56] @ 0x38
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003612: 2300 movs r3, #0
- 8003614: 63fb str r3, [r7, #60] @ 0x3c
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 8003616: f107 0334 add.w r3, r7, #52 @ 0x34
- 800361a: 4619 mov r1, r3
- 800361c: 486d ldr r0, [pc, #436] @ (80037d4 <HAL_ADC_MspInit+0x2a8>)
- 800361e: f007 f97b bl 800a918 <HAL_GPIO_Init>
- /* ADC1 DMA Init */
- /* ADC1 Init */
- hdma_adc1.Instance = DMA1_Stream0;
- 8003622: 4b6d ldr r3, [pc, #436] @ (80037d8 <HAL_ADC_MspInit+0x2ac>)
- 8003624: 4a6d ldr r2, [pc, #436] @ (80037dc <HAL_ADC_MspInit+0x2b0>)
- 8003626: 601a str r2, [r3, #0]
- hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
- 8003628: 4b6b ldr r3, [pc, #428] @ (80037d8 <HAL_ADC_MspInit+0x2ac>)
- 800362a: 2209 movs r2, #9
- 800362c: 605a str r2, [r3, #4]
- hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
- 800362e: 4b6a ldr r3, [pc, #424] @ (80037d8 <HAL_ADC_MspInit+0x2ac>)
- 8003630: 2200 movs r2, #0
- 8003632: 609a str r2, [r3, #8]
- hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
- 8003634: 4b68 ldr r3, [pc, #416] @ (80037d8 <HAL_ADC_MspInit+0x2ac>)
- 8003636: 2200 movs r2, #0
- 8003638: 60da str r2, [r3, #12]
- hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
- 800363a: 4b67 ldr r3, [pc, #412] @ (80037d8 <HAL_ADC_MspInit+0x2ac>)
- 800363c: f44f 6280 mov.w r2, #1024 @ 0x400
- 8003640: 611a str r2, [r3, #16]
- hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
- 8003642: 4b65 ldr r3, [pc, #404] @ (80037d8 <HAL_ADC_MspInit+0x2ac>)
- 8003644: f44f 6200 mov.w r2, #2048 @ 0x800
- 8003648: 615a str r2, [r3, #20]
- hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
- 800364a: 4b63 ldr r3, [pc, #396] @ (80037d8 <HAL_ADC_MspInit+0x2ac>)
- 800364c: f44f 5200 mov.w r2, #8192 @ 0x2000
- 8003650: 619a str r2, [r3, #24]
- hdma_adc1.Init.Mode = DMA_NORMAL;
- 8003652: 4b61 ldr r3, [pc, #388] @ (80037d8 <HAL_ADC_MspInit+0x2ac>)
- 8003654: 2200 movs r2, #0
- 8003656: 61da str r2, [r3, #28]
- hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
- 8003658: 4b5f ldr r3, [pc, #380] @ (80037d8 <HAL_ADC_MspInit+0x2ac>)
- 800365a: 2200 movs r2, #0
- 800365c: 621a str r2, [r3, #32]
- hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
- 800365e: 4b5e ldr r3, [pc, #376] @ (80037d8 <HAL_ADC_MspInit+0x2ac>)
- 8003660: 2200 movs r2, #0
- 8003662: 625a str r2, [r3, #36] @ 0x24
- if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
- 8003664: 485c ldr r0, [pc, #368] @ (80037d8 <HAL_ADC_MspInit+0x2ac>)
- 8003666: f004 fb1b bl 8007ca0 <HAL_DMA_Init>
- 800366a: 4603 mov r3, r0
- 800366c: 2b00 cmp r3, #0
- 800366e: d001 beq.n 8003674 <HAL_ADC_MspInit+0x148>
- {
- Error_Handler();
- 8003670: f7fe fc8a bl 8001f88 <Error_Handler>
- }
- __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
- 8003674: 687b ldr r3, [r7, #4]
- 8003676: 4a58 ldr r2, [pc, #352] @ (80037d8 <HAL_ADC_MspInit+0x2ac>)
- 8003678: 64da str r2, [r3, #76] @ 0x4c
- 800367a: 4a57 ldr r2, [pc, #348] @ (80037d8 <HAL_ADC_MspInit+0x2ac>)
- 800367c: 687b ldr r3, [r7, #4]
- 800367e: 6393 str r3, [r2, #56] @ 0x38
- /* USER CODE BEGIN ADC3_MspInit 1 */
- /* USER CODE END ADC3_MspInit 1 */
- }
- }
- 8003680: e11e b.n 80038c0 <HAL_ADC_MspInit+0x394>
- else if(hadc->Instance==ADC2)
- 8003682: 687b ldr r3, [r7, #4]
- 8003684: 681b ldr r3, [r3, #0]
- 8003686: 4a56 ldr r2, [pc, #344] @ (80037e0 <HAL_ADC_MspInit+0x2b4>)
- 8003688: 4293 cmp r3, r2
- 800368a: f040 80af bne.w 80037ec <HAL_ADC_MspInit+0x2c0>
- HAL_RCC_ADC12_CLK_ENABLED++;
- 800368e: 4b4d ldr r3, [pc, #308] @ (80037c4 <HAL_ADC_MspInit+0x298>)
- 8003690: 681b ldr r3, [r3, #0]
- 8003692: 3301 adds r3, #1
- 8003694: 4a4b ldr r2, [pc, #300] @ (80037c4 <HAL_ADC_MspInit+0x298>)
- 8003696: 6013 str r3, [r2, #0]
- if(HAL_RCC_ADC12_CLK_ENABLED==1){
- 8003698: 4b4a ldr r3, [pc, #296] @ (80037c4 <HAL_ADC_MspInit+0x298>)
- 800369a: 681b ldr r3, [r3, #0]
- 800369c: 2b01 cmp r3, #1
- 800369e: d10e bne.n 80036be <HAL_ADC_MspInit+0x192>
- __HAL_RCC_ADC12_CLK_ENABLE();
- 80036a0: 4b49 ldr r3, [pc, #292] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80036a2: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8
- 80036a6: 4a48 ldr r2, [pc, #288] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80036a8: f043 0320 orr.w r3, r3, #32
- 80036ac: f8c2 30d8 str.w r3, [r2, #216] @ 0xd8
- 80036b0: 4b45 ldr r3, [pc, #276] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80036b2: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8
- 80036b6: f003 0320 and.w r3, r3, #32
- 80036ba: 623b str r3, [r7, #32]
- 80036bc: 6a3b ldr r3, [r7, #32]
- __HAL_RCC_GPIOA_CLK_ENABLE();
- 80036be: 4b42 ldr r3, [pc, #264] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80036c0: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 80036c4: 4a40 ldr r2, [pc, #256] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80036c6: f043 0301 orr.w r3, r3, #1
- 80036ca: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 80036ce: 4b3e ldr r3, [pc, #248] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80036d0: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 80036d4: f003 0301 and.w r3, r3, #1
- 80036d8: 61fb str r3, [r7, #28]
- 80036da: 69fb ldr r3, [r7, #28]
- __HAL_RCC_GPIOC_CLK_ENABLE();
- 80036dc: 4b3a ldr r3, [pc, #232] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80036de: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 80036e2: 4a39 ldr r2, [pc, #228] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80036e4: f043 0304 orr.w r3, r3, #4
- 80036e8: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 80036ec: 4b36 ldr r3, [pc, #216] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80036ee: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 80036f2: f003 0304 and.w r3, r3, #4
- 80036f6: 61bb str r3, [r7, #24]
- 80036f8: 69bb ldr r3, [r7, #24]
- __HAL_RCC_GPIOB_CLK_ENABLE();
- 80036fa: 4b33 ldr r3, [pc, #204] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 80036fc: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003700: 4a31 ldr r2, [pc, #196] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 8003702: f043 0302 orr.w r3, r3, #2
- 8003706: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 800370a: 4b2f ldr r3, [pc, #188] @ (80037c8 <HAL_ADC_MspInit+0x29c>)
- 800370c: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003710: f003 0302 and.w r3, r3, #2
- 8003714: 617b str r3, [r7, #20]
- 8003716: 697b ldr r3, [r7, #20]
- GPIO_InitStruct.Pin = GPIO_PIN_6;
- 8003718: 2340 movs r3, #64 @ 0x40
- 800371a: 637b str r3, [r7, #52] @ 0x34
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 800371c: 2303 movs r3, #3
- 800371e: 63bb str r3, [r7, #56] @ 0x38
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003720: 2300 movs r3, #0
- 8003722: 63fb str r3, [r7, #60] @ 0x3c
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8003724: f107 0334 add.w r3, r7, #52 @ 0x34
- 8003728: 4619 mov r1, r3
- 800372a: 4828 ldr r0, [pc, #160] @ (80037cc <HAL_ADC_MspInit+0x2a0>)
- 800372c: f007 f8f4 bl 800a918 <HAL_GPIO_Init>
- GPIO_InitStruct.Pin = GPIO_PIN_4;
- 8003730: 2310 movs r3, #16
- 8003732: 637b str r3, [r7, #52] @ 0x34
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 8003734: 2303 movs r3, #3
- 8003736: 63bb str r3, [r7, #56] @ 0x38
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003738: 2300 movs r3, #0
- 800373a: 63fb str r3, [r7, #60] @ 0x3c
- HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 800373c: f107 0334 add.w r3, r7, #52 @ 0x34
- 8003740: 4619 mov r1, r3
- 8003742: 4823 ldr r0, [pc, #140] @ (80037d0 <HAL_ADC_MspInit+0x2a4>)
- 8003744: f007 f8e8 bl 800a918 <HAL_GPIO_Init>
- GPIO_InitStruct.Pin = GPIO_PIN_1;
- 8003748: 2302 movs r3, #2
- 800374a: 637b str r3, [r7, #52] @ 0x34
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 800374c: 2303 movs r3, #3
- 800374e: 63bb str r3, [r7, #56] @ 0x38
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003750: 2300 movs r3, #0
- 8003752: 63fb str r3, [r7, #60] @ 0x3c
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 8003754: f107 0334 add.w r3, r7, #52 @ 0x34
- 8003758: 4619 mov r1, r3
- 800375a: 481e ldr r0, [pc, #120] @ (80037d4 <HAL_ADC_MspInit+0x2a8>)
- 800375c: f007 f8dc bl 800a918 <HAL_GPIO_Init>
- hdma_adc2.Instance = DMA1_Stream1;
- 8003760: 4b20 ldr r3, [pc, #128] @ (80037e4 <HAL_ADC_MspInit+0x2b8>)
- 8003762: 4a21 ldr r2, [pc, #132] @ (80037e8 <HAL_ADC_MspInit+0x2bc>)
- 8003764: 601a str r2, [r3, #0]
- hdma_adc2.Init.Request = DMA_REQUEST_ADC2;
- 8003766: 4b1f ldr r3, [pc, #124] @ (80037e4 <HAL_ADC_MspInit+0x2b8>)
- 8003768: 220a movs r2, #10
- 800376a: 605a str r2, [r3, #4]
- hdma_adc2.Init.Direction = DMA_PERIPH_TO_MEMORY;
- 800376c: 4b1d ldr r3, [pc, #116] @ (80037e4 <HAL_ADC_MspInit+0x2b8>)
- 800376e: 2200 movs r2, #0
- 8003770: 609a str r2, [r3, #8]
- hdma_adc2.Init.PeriphInc = DMA_PINC_DISABLE;
- 8003772: 4b1c ldr r3, [pc, #112] @ (80037e4 <HAL_ADC_MspInit+0x2b8>)
- 8003774: 2200 movs r2, #0
- 8003776: 60da str r2, [r3, #12]
- hdma_adc2.Init.MemInc = DMA_MINC_ENABLE;
- 8003778: 4b1a ldr r3, [pc, #104] @ (80037e4 <HAL_ADC_MspInit+0x2b8>)
- 800377a: f44f 6280 mov.w r2, #1024 @ 0x400
- 800377e: 611a str r2, [r3, #16]
- hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
- 8003780: 4b18 ldr r3, [pc, #96] @ (80037e4 <HAL_ADC_MspInit+0x2b8>)
- 8003782: f44f 6200 mov.w r2, #2048 @ 0x800
- 8003786: 615a str r2, [r3, #20]
- hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
- 8003788: 4b16 ldr r3, [pc, #88] @ (80037e4 <HAL_ADC_MspInit+0x2b8>)
- 800378a: f44f 5200 mov.w r2, #8192 @ 0x2000
- 800378e: 619a str r2, [r3, #24]
- hdma_adc2.Init.Mode = DMA_NORMAL;
- 8003790: 4b14 ldr r3, [pc, #80] @ (80037e4 <HAL_ADC_MspInit+0x2b8>)
- 8003792: 2200 movs r2, #0
- 8003794: 61da str r2, [r3, #28]
- hdma_adc2.Init.Priority = DMA_PRIORITY_LOW;
- 8003796: 4b13 ldr r3, [pc, #76] @ (80037e4 <HAL_ADC_MspInit+0x2b8>)
- 8003798: 2200 movs r2, #0
- 800379a: 621a str r2, [r3, #32]
- hdma_adc2.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
- 800379c: 4b11 ldr r3, [pc, #68] @ (80037e4 <HAL_ADC_MspInit+0x2b8>)
- 800379e: 2200 movs r2, #0
- 80037a0: 625a str r2, [r3, #36] @ 0x24
- if (HAL_DMA_Init(&hdma_adc2) != HAL_OK)
- 80037a2: 4810 ldr r0, [pc, #64] @ (80037e4 <HAL_ADC_MspInit+0x2b8>)
- 80037a4: f004 fa7c bl 8007ca0 <HAL_DMA_Init>
- 80037a8: 4603 mov r3, r0
- 80037aa: 2b00 cmp r3, #0
- 80037ac: d001 beq.n 80037b2 <HAL_ADC_MspInit+0x286>
- Error_Handler();
- 80037ae: f7fe fbeb bl 8001f88 <Error_Handler>
- __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc2);
- 80037b2: 687b ldr r3, [r7, #4]
- 80037b4: 4a0b ldr r2, [pc, #44] @ (80037e4 <HAL_ADC_MspInit+0x2b8>)
- 80037b6: 64da str r2, [r3, #76] @ 0x4c
- 80037b8: 4a0a ldr r2, [pc, #40] @ (80037e4 <HAL_ADC_MspInit+0x2b8>)
- 80037ba: 687b ldr r3, [r7, #4]
- 80037bc: 6393 str r3, [r2, #56] @ 0x38
- }
- 80037be: e07f b.n 80038c0 <HAL_ADC_MspInit+0x394>
- 80037c0: 40022000 .word 0x40022000
- 80037c4: 240008b4 .word 0x240008b4
- 80037c8: 58024400 .word 0x58024400
- 80037cc: 58020000 .word 0x58020000
- 80037d0: 58020800 .word 0x58020800
- 80037d4: 58020400 .word 0x58020400
- 80037d8: 2400026c .word 0x2400026c
- 80037dc: 40020010 .word 0x40020010
- 80037e0: 40022100 .word 0x40022100
- 80037e4: 240002e4 .word 0x240002e4
- 80037e8: 40020028 .word 0x40020028
- else if(hadc->Instance==ADC3)
- 80037ec: 687b ldr r3, [r7, #4]
- 80037ee: 681b ldr r3, [r3, #0]
- 80037f0: 4a35 ldr r2, [pc, #212] @ (80038c8 <HAL_ADC_MspInit+0x39c>)
- 80037f2: 4293 cmp r3, r2
- 80037f4: d164 bne.n 80038c0 <HAL_ADC_MspInit+0x394>
- __HAL_RCC_ADC3_CLK_ENABLE();
- 80037f6: 4b35 ldr r3, [pc, #212] @ (80038cc <HAL_ADC_MspInit+0x3a0>)
- 80037f8: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 80037fc: 4a33 ldr r2, [pc, #204] @ (80038cc <HAL_ADC_MspInit+0x3a0>)
- 80037fe: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000
- 8003802: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 8003806: 4b31 ldr r3, [pc, #196] @ (80038cc <HAL_ADC_MspInit+0x3a0>)
- 8003808: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 800380c: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
- 8003810: 613b str r3, [r7, #16]
- 8003812: 693b ldr r3, [r7, #16]
- __HAL_RCC_GPIOC_CLK_ENABLE();
- 8003814: 4b2d ldr r3, [pc, #180] @ (80038cc <HAL_ADC_MspInit+0x3a0>)
- 8003816: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 800381a: 4a2c ldr r2, [pc, #176] @ (80038cc <HAL_ADC_MspInit+0x3a0>)
- 800381c: f043 0304 orr.w r3, r3, #4
- 8003820: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 8003824: 4b29 ldr r3, [pc, #164] @ (80038cc <HAL_ADC_MspInit+0x3a0>)
- 8003826: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 800382a: f003 0304 and.w r3, r3, #4
- 800382e: 60fb str r3, [r7, #12]
- 8003830: 68fb ldr r3, [r7, #12]
- GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
- 8003832: 2303 movs r3, #3
- 8003834: 637b str r3, [r7, #52] @ 0x34
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 8003836: 2303 movs r3, #3
- 8003838: 63bb str r3, [r7, #56] @ 0x38
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 800383a: 2300 movs r3, #0
- 800383c: 63fb str r3, [r7, #60] @ 0x3c
- HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 800383e: f107 0334 add.w r3, r7, #52 @ 0x34
- 8003842: 4619 mov r1, r3
- 8003844: 4822 ldr r0, [pc, #136] @ (80038d0 <HAL_ADC_MspInit+0x3a4>)
- 8003846: f007 f867 bl 800a918 <HAL_GPIO_Init>
- HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC2, SYSCFG_SWITCH_PC2_OPEN);
- 800384a: f04f 6180 mov.w r1, #67108864 @ 0x4000000
- 800384e: f04f 6080 mov.w r0, #67108864 @ 0x4000000
- 8003852: f001 fec5 bl 80055e0 <HAL_SYSCFG_AnalogSwitchConfig>
- HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC3, SYSCFG_SWITCH_PC3_OPEN);
- 8003856: f04f 6100 mov.w r1, #134217728 @ 0x8000000
- 800385a: f04f 6000 mov.w r0, #134217728 @ 0x8000000
- 800385e: f001 febf bl 80055e0 <HAL_SYSCFG_AnalogSwitchConfig>
- hdma_adc3.Instance = DMA1_Stream2;
- 8003862: 4b1c ldr r3, [pc, #112] @ (80038d4 <HAL_ADC_MspInit+0x3a8>)
- 8003864: 4a1c ldr r2, [pc, #112] @ (80038d8 <HAL_ADC_MspInit+0x3ac>)
- 8003866: 601a str r2, [r3, #0]
- hdma_adc3.Init.Request = DMA_REQUEST_ADC3;
- 8003868: 4b1a ldr r3, [pc, #104] @ (80038d4 <HAL_ADC_MspInit+0x3a8>)
- 800386a: 2273 movs r2, #115 @ 0x73
- 800386c: 605a str r2, [r3, #4]
- hdma_adc3.Init.Direction = DMA_PERIPH_TO_MEMORY;
- 800386e: 4b19 ldr r3, [pc, #100] @ (80038d4 <HAL_ADC_MspInit+0x3a8>)
- 8003870: 2200 movs r2, #0
- 8003872: 609a str r2, [r3, #8]
- hdma_adc3.Init.PeriphInc = DMA_PINC_DISABLE;
- 8003874: 4b17 ldr r3, [pc, #92] @ (80038d4 <HAL_ADC_MspInit+0x3a8>)
- 8003876: 2200 movs r2, #0
- 8003878: 60da str r2, [r3, #12]
- hdma_adc3.Init.MemInc = DMA_MINC_ENABLE;
- 800387a: 4b16 ldr r3, [pc, #88] @ (80038d4 <HAL_ADC_MspInit+0x3a8>)
- 800387c: f44f 6280 mov.w r2, #1024 @ 0x400
- 8003880: 611a str r2, [r3, #16]
- hdma_adc3.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
- 8003882: 4b14 ldr r3, [pc, #80] @ (80038d4 <HAL_ADC_MspInit+0x3a8>)
- 8003884: f44f 6200 mov.w r2, #2048 @ 0x800
- 8003888: 615a str r2, [r3, #20]
- hdma_adc3.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
- 800388a: 4b12 ldr r3, [pc, #72] @ (80038d4 <HAL_ADC_MspInit+0x3a8>)
- 800388c: f44f 5200 mov.w r2, #8192 @ 0x2000
- 8003890: 619a str r2, [r3, #24]
- hdma_adc3.Init.Mode = DMA_NORMAL;
- 8003892: 4b10 ldr r3, [pc, #64] @ (80038d4 <HAL_ADC_MspInit+0x3a8>)
- 8003894: 2200 movs r2, #0
- 8003896: 61da str r2, [r3, #28]
- hdma_adc3.Init.Priority = DMA_PRIORITY_LOW;
- 8003898: 4b0e ldr r3, [pc, #56] @ (80038d4 <HAL_ADC_MspInit+0x3a8>)
- 800389a: 2200 movs r2, #0
- 800389c: 621a str r2, [r3, #32]
- hdma_adc3.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
- 800389e: 4b0d ldr r3, [pc, #52] @ (80038d4 <HAL_ADC_MspInit+0x3a8>)
- 80038a0: 2200 movs r2, #0
- 80038a2: 625a str r2, [r3, #36] @ 0x24
- if (HAL_DMA_Init(&hdma_adc3) != HAL_OK)
- 80038a4: 480b ldr r0, [pc, #44] @ (80038d4 <HAL_ADC_MspInit+0x3a8>)
- 80038a6: f004 f9fb bl 8007ca0 <HAL_DMA_Init>
- 80038aa: 4603 mov r3, r0
- 80038ac: 2b00 cmp r3, #0
- 80038ae: d001 beq.n 80038b4 <HAL_ADC_MspInit+0x388>
- Error_Handler();
- 80038b0: f7fe fb6a bl 8001f88 <Error_Handler>
- __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc3);
- 80038b4: 687b ldr r3, [r7, #4]
- 80038b6: 4a07 ldr r2, [pc, #28] @ (80038d4 <HAL_ADC_MspInit+0x3a8>)
- 80038b8: 64da str r2, [r3, #76] @ 0x4c
- 80038ba: 4a06 ldr r2, [pc, #24] @ (80038d4 <HAL_ADC_MspInit+0x3a8>)
- 80038bc: 687b ldr r3, [r7, #4]
- 80038be: 6393 str r3, [r2, #56] @ 0x38
- }
- 80038c0: bf00 nop
- 80038c2: 3748 adds r7, #72 @ 0x48
- 80038c4: 46bd mov sp, r7
- 80038c6: bd80 pop {r7, pc}
- 80038c8: 58026000 .word 0x58026000
- 80038cc: 58024400 .word 0x58024400
- 80038d0: 58020800 .word 0x58020800
- 80038d4: 2400035c .word 0x2400035c
- 80038d8: 40020040 .word 0x40020040
- 080038dc <HAL_COMP_MspInit>:
- * This function configures the hardware resources used in this example
- * @param hcomp: COMP handle pointer
- * @retval None
- */
- void HAL_COMP_MspInit(COMP_HandleTypeDef* hcomp)
- {
- 80038dc: b580 push {r7, lr}
- 80038de: b08a sub sp, #40 @ 0x28
- 80038e0: af00 add r7, sp, #0
- 80038e2: 6078 str r0, [r7, #4]
- GPIO_InitTypeDef GPIO_InitStruct = {0};
- 80038e4: f107 0314 add.w r3, r7, #20
- 80038e8: 2200 movs r2, #0
- 80038ea: 601a str r2, [r3, #0]
- 80038ec: 605a str r2, [r3, #4]
- 80038ee: 609a str r2, [r3, #8]
- 80038f0: 60da str r2, [r3, #12]
- 80038f2: 611a str r2, [r3, #16]
- if(hcomp->Instance==COMP1)
- 80038f4: 687b ldr r3, [r7, #4]
- 80038f6: 681b ldr r3, [r3, #0]
- 80038f8: 4a18 ldr r2, [pc, #96] @ (800395c <HAL_COMP_MspInit+0x80>)
- 80038fa: 4293 cmp r3, r2
- 80038fc: d129 bne.n 8003952 <HAL_COMP_MspInit+0x76>
- {
- /* USER CODE BEGIN COMP1_MspInit 0 */
- /* USER CODE END COMP1_MspInit 0 */
- /* Peripheral clock enable */
- __HAL_RCC_COMP12_CLK_ENABLE();
- 80038fe: 4b18 ldr r3, [pc, #96] @ (8003960 <HAL_COMP_MspInit+0x84>)
- 8003900: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4
- 8003904: 4a16 ldr r2, [pc, #88] @ (8003960 <HAL_COMP_MspInit+0x84>)
- 8003906: f443 4380 orr.w r3, r3, #16384 @ 0x4000
- 800390a: f8c2 30f4 str.w r3, [r2, #244] @ 0xf4
- 800390e: 4b14 ldr r3, [pc, #80] @ (8003960 <HAL_COMP_MspInit+0x84>)
- 8003910: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4
- 8003914: f403 4380 and.w r3, r3, #16384 @ 0x4000
- 8003918: 613b str r3, [r7, #16]
- 800391a: 693b ldr r3, [r7, #16]
- __HAL_RCC_GPIOB_CLK_ENABLE();
- 800391c: 4b10 ldr r3, [pc, #64] @ (8003960 <HAL_COMP_MspInit+0x84>)
- 800391e: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003922: 4a0f ldr r2, [pc, #60] @ (8003960 <HAL_COMP_MspInit+0x84>)
- 8003924: f043 0302 orr.w r3, r3, #2
- 8003928: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 800392c: 4b0c ldr r3, [pc, #48] @ (8003960 <HAL_COMP_MspInit+0x84>)
- 800392e: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003932: f003 0302 and.w r3, r3, #2
- 8003936: 60fb str r3, [r7, #12]
- 8003938: 68fb ldr r3, [r7, #12]
- /**COMP1 GPIO Configuration
- PB2 ------> COMP1_INP
- */
- GPIO_InitStruct.Pin = GPIO_PIN_2;
- 800393a: 2304 movs r3, #4
- 800393c: 617b str r3, [r7, #20]
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 800393e: 2303 movs r3, #3
- 8003940: 61bb str r3, [r7, #24]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003942: 2300 movs r3, #0
- 8003944: 61fb str r3, [r7, #28]
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 8003946: f107 0314 add.w r3, r7, #20
- 800394a: 4619 mov r1, r3
- 800394c: 4805 ldr r0, [pc, #20] @ (8003964 <HAL_COMP_MspInit+0x88>)
- 800394e: f006 ffe3 bl 800a918 <HAL_GPIO_Init>
- /* USER CODE BEGIN COMP1_MspInit 1 */
- /* USER CODE END COMP1_MspInit 1 */
- }
- }
- 8003952: bf00 nop
- 8003954: 3728 adds r7, #40 @ 0x28
- 8003956: 46bd mov sp, r7
- 8003958: bd80 pop {r7, pc}
- 800395a: bf00 nop
- 800395c: 5800380c .word 0x5800380c
- 8003960: 58024400 .word 0x58024400
- 8003964: 58020400 .word 0x58020400
- 08003968 <HAL_CRC_MspInit>:
- * This function configures the hardware resources used in this example
- * @param hcrc: CRC handle pointer
- * @retval None
- */
- void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
- {
- 8003968: b480 push {r7}
- 800396a: b085 sub sp, #20
- 800396c: af00 add r7, sp, #0
- 800396e: 6078 str r0, [r7, #4]
- if(hcrc->Instance==CRC)
- 8003970: 687b ldr r3, [r7, #4]
- 8003972: 681b ldr r3, [r3, #0]
- 8003974: 4a0b ldr r2, [pc, #44] @ (80039a4 <HAL_CRC_MspInit+0x3c>)
- 8003976: 4293 cmp r3, r2
- 8003978: d10e bne.n 8003998 <HAL_CRC_MspInit+0x30>
- {
- /* USER CODE BEGIN CRC_MspInit 0 */
- /* USER CODE END CRC_MspInit 0 */
- /* Peripheral clock enable */
- __HAL_RCC_CRC_CLK_ENABLE();
- 800397a: 4b0b ldr r3, [pc, #44] @ (80039a8 <HAL_CRC_MspInit+0x40>)
- 800397c: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003980: 4a09 ldr r2, [pc, #36] @ (80039a8 <HAL_CRC_MspInit+0x40>)
- 8003982: f443 2300 orr.w r3, r3, #524288 @ 0x80000
- 8003986: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 800398a: 4b07 ldr r3, [pc, #28] @ (80039a8 <HAL_CRC_MspInit+0x40>)
- 800398c: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003990: f403 2300 and.w r3, r3, #524288 @ 0x80000
- 8003994: 60fb str r3, [r7, #12]
- 8003996: 68fb ldr r3, [r7, #12]
- /* USER CODE BEGIN CRC_MspInit 1 */
- /* USER CODE END CRC_MspInit 1 */
- }
- }
- 8003998: bf00 nop
- 800399a: 3714 adds r7, #20
- 800399c: 46bd mov sp, r7
- 800399e: f85d 7b04 ldr.w r7, [sp], #4
- 80039a2: 4770 bx lr
- 80039a4: 58024c00 .word 0x58024c00
- 80039a8: 58024400 .word 0x58024400
- 080039ac <HAL_DAC_MspInit>:
- * This function configures the hardware resources used in this example
- * @param hdac: DAC handle pointer
- * @retval None
- */
- void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
- {
- 80039ac: b580 push {r7, lr}
- 80039ae: b08a sub sp, #40 @ 0x28
- 80039b0: af00 add r7, sp, #0
- 80039b2: 6078 str r0, [r7, #4]
- GPIO_InitTypeDef GPIO_InitStruct = {0};
- 80039b4: f107 0314 add.w r3, r7, #20
- 80039b8: 2200 movs r2, #0
- 80039ba: 601a str r2, [r3, #0]
- 80039bc: 605a str r2, [r3, #4]
- 80039be: 609a str r2, [r3, #8]
- 80039c0: 60da str r2, [r3, #12]
- 80039c2: 611a str r2, [r3, #16]
- if(hdac->Instance==DAC1)
- 80039c4: 687b ldr r3, [r7, #4]
- 80039c6: 681b ldr r3, [r3, #0]
- 80039c8: 4a1c ldr r2, [pc, #112] @ (8003a3c <HAL_DAC_MspInit+0x90>)
- 80039ca: 4293 cmp r3, r2
- 80039cc: d131 bne.n 8003a32 <HAL_DAC_MspInit+0x86>
- {
- /* USER CODE BEGIN DAC1_MspInit 0 */
- /* USER CODE END DAC1_MspInit 0 */
- /* Peripheral clock enable */
- __HAL_RCC_DAC12_CLK_ENABLE();
- 80039ce: 4b1c ldr r3, [pc, #112] @ (8003a40 <HAL_DAC_MspInit+0x94>)
- 80039d0: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
- 80039d4: 4a1a ldr r2, [pc, #104] @ (8003a40 <HAL_DAC_MspInit+0x94>)
- 80039d6: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000
- 80039da: f8c2 30e8 str.w r3, [r2, #232] @ 0xe8
- 80039de: 4b18 ldr r3, [pc, #96] @ (8003a40 <HAL_DAC_MspInit+0x94>)
- 80039e0: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
- 80039e4: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
- 80039e8: 613b str r3, [r7, #16]
- 80039ea: 693b ldr r3, [r7, #16]
- __HAL_RCC_GPIOA_CLK_ENABLE();
- 80039ec: 4b14 ldr r3, [pc, #80] @ (8003a40 <HAL_DAC_MspInit+0x94>)
- 80039ee: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 80039f2: 4a13 ldr r2, [pc, #76] @ (8003a40 <HAL_DAC_MspInit+0x94>)
- 80039f4: f043 0301 orr.w r3, r3, #1
- 80039f8: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 80039fc: 4b10 ldr r3, [pc, #64] @ (8003a40 <HAL_DAC_MspInit+0x94>)
- 80039fe: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003a02: f003 0301 and.w r3, r3, #1
- 8003a06: 60fb str r3, [r7, #12]
- 8003a08: 68fb ldr r3, [r7, #12]
- /**DAC1 GPIO Configuration
- PA4 ------> DAC1_OUT1
- PA5 ------> DAC1_OUT2
- */
- GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5;
- 8003a0a: 2330 movs r3, #48 @ 0x30
- 8003a0c: 617b str r3, [r7, #20]
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 8003a0e: 2303 movs r3, #3
- 8003a10: 61bb str r3, [r7, #24]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003a12: 2300 movs r3, #0
- 8003a14: 61fb str r3, [r7, #28]
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8003a16: f107 0314 add.w r3, r7, #20
- 8003a1a: 4619 mov r1, r3
- 8003a1c: 4809 ldr r0, [pc, #36] @ (8003a44 <HAL_DAC_MspInit+0x98>)
- 8003a1e: f006 ff7b bl 800a918 <HAL_GPIO_Init>
- /* DAC1 interrupt Init */
- HAL_NVIC_SetPriority(TIM6_DAC_IRQn, 5, 0);
- 8003a22: 2200 movs r2, #0
- 8003a24: 2105 movs r1, #5
- 8003a26: 2036 movs r0, #54 @ 0x36
- 8003a28: f003 fc44 bl 80072b4 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
- 8003a2c: 2036 movs r0, #54 @ 0x36
- 8003a2e: f003 fc5b bl 80072e8 <HAL_NVIC_EnableIRQ>
- /* USER CODE BEGIN DAC1_MspInit 1 */
- /* USER CODE END DAC1_MspInit 1 */
- }
- }
- 8003a32: bf00 nop
- 8003a34: 3728 adds r7, #40 @ 0x28
- 8003a36: 46bd mov sp, r7
- 8003a38: bd80 pop {r7, pc}
- 8003a3a: bf00 nop
- 8003a3c: 40007400 .word 0x40007400
- 8003a40: 58024400 .word 0x58024400
- 8003a44: 58020000 .word 0x58020000
- 08003a48 <HAL_RNG_MspInit>:
- * This function configures the hardware resources used in this example
- * @param hrng: RNG handle pointer
- * @retval None
- */
- void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
- {
- 8003a48: b580 push {r7, lr}
- 8003a4a: b0b4 sub sp, #208 @ 0xd0
- 8003a4c: af00 add r7, sp, #0
- 8003a4e: 6078 str r0, [r7, #4]
- RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
- 8003a50: f107 0310 add.w r3, r7, #16
- 8003a54: 22c0 movs r2, #192 @ 0xc0
- 8003a56: 2100 movs r1, #0
- 8003a58: 4618 mov r0, r3
- 8003a5a: f014 f9a4 bl 8017da6 <memset>
- if(hrng->Instance==RNG)
- 8003a5e: 687b ldr r3, [r7, #4]
- 8003a60: 681b ldr r3, [r3, #0]
- 8003a62: 4a14 ldr r2, [pc, #80] @ (8003ab4 <HAL_RNG_MspInit+0x6c>)
- 8003a64: 4293 cmp r3, r2
- 8003a66: d121 bne.n 8003aac <HAL_RNG_MspInit+0x64>
- /* USER CODE END RNG_MspInit 0 */
- /** Initializes the peripherals clock
- */
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
- 8003a68: f44f 3200 mov.w r2, #131072 @ 0x20000
- 8003a6c: f04f 0300 mov.w r3, #0
- 8003a70: e9c7 2304 strd r2, r3, [r7, #16]
- PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
- 8003a74: 2300 movs r3, #0
- 8003a76: f8c7 3090 str.w r3, [r7, #144] @ 0x90
- if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
- 8003a7a: f107 0310 add.w r3, r7, #16
- 8003a7e: 4618 mov r0, r3
- 8003a80: f008 fb30 bl 800c0e4 <HAL_RCCEx_PeriphCLKConfig>
- 8003a84: 4603 mov r3, r0
- 8003a86: 2b00 cmp r3, #0
- 8003a88: d001 beq.n 8003a8e <HAL_RNG_MspInit+0x46>
- {
- Error_Handler();
- 8003a8a: f7fe fa7d bl 8001f88 <Error_Handler>
- }
- /* Peripheral clock enable */
- __HAL_RCC_RNG_CLK_ENABLE();
- 8003a8e: 4b0a ldr r3, [pc, #40] @ (8003ab8 <HAL_RNG_MspInit+0x70>)
- 8003a90: f8d3 30dc ldr.w r3, [r3, #220] @ 0xdc
- 8003a94: 4a08 ldr r2, [pc, #32] @ (8003ab8 <HAL_RNG_MspInit+0x70>)
- 8003a96: f043 0340 orr.w r3, r3, #64 @ 0x40
- 8003a9a: f8c2 30dc str.w r3, [r2, #220] @ 0xdc
- 8003a9e: 4b06 ldr r3, [pc, #24] @ (8003ab8 <HAL_RNG_MspInit+0x70>)
- 8003aa0: f8d3 30dc ldr.w r3, [r3, #220] @ 0xdc
- 8003aa4: f003 0340 and.w r3, r3, #64 @ 0x40
- 8003aa8: 60fb str r3, [r7, #12]
- 8003aaa: 68fb ldr r3, [r7, #12]
- /* USER CODE BEGIN RNG_MspInit 1 */
- /* USER CODE END RNG_MspInit 1 */
- }
- }
- 8003aac: bf00 nop
- 8003aae: 37d0 adds r7, #208 @ 0xd0
- 8003ab0: 46bd mov sp, r7
- 8003ab2: bd80 pop {r7, pc}
- 8003ab4: 48021800 .word 0x48021800
- 8003ab8: 58024400 .word 0x58024400
- 08003abc <HAL_TIM_PWM_MspInit>:
- * This function configures the hardware resources used in this example
- * @param htim_pwm: TIM_PWM handle pointer
- * @retval None
- */
- void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm)
- {
- 8003abc: b480 push {r7}
- 8003abe: b085 sub sp, #20
- 8003ac0: af00 add r7, sp, #0
- 8003ac2: 6078 str r0, [r7, #4]
- if(htim_pwm->Instance==TIM1)
- 8003ac4: 687b ldr r3, [r7, #4]
- 8003ac6: 681b ldr r3, [r3, #0]
- 8003ac8: 4a16 ldr r2, [pc, #88] @ (8003b24 <HAL_TIM_PWM_MspInit+0x68>)
- 8003aca: 4293 cmp r3, r2
- 8003acc: d10f bne.n 8003aee <HAL_TIM_PWM_MspInit+0x32>
- {
- /* USER CODE BEGIN TIM1_MspInit 0 */
- /* USER CODE END TIM1_MspInit 0 */
- /* Peripheral clock enable */
- __HAL_RCC_TIM1_CLK_ENABLE();
- 8003ace: 4b16 ldr r3, [pc, #88] @ (8003b28 <HAL_TIM_PWM_MspInit+0x6c>)
- 8003ad0: f8d3 30f0 ldr.w r3, [r3, #240] @ 0xf0
- 8003ad4: 4a14 ldr r2, [pc, #80] @ (8003b28 <HAL_TIM_PWM_MspInit+0x6c>)
- 8003ad6: f043 0301 orr.w r3, r3, #1
- 8003ada: f8c2 30f0 str.w r3, [r2, #240] @ 0xf0
- 8003ade: 4b12 ldr r3, [pc, #72] @ (8003b28 <HAL_TIM_PWM_MspInit+0x6c>)
- 8003ae0: f8d3 30f0 ldr.w r3, [r3, #240] @ 0xf0
- 8003ae4: f003 0301 and.w r3, r3, #1
- 8003ae8: 60fb str r3, [r7, #12]
- 8003aea: 68fb ldr r3, [r7, #12]
- /* USER CODE BEGIN TIM3_MspInit 1 */
- /* USER CODE END TIM3_MspInit 1 */
- }
- }
- 8003aec: e013 b.n 8003b16 <HAL_TIM_PWM_MspInit+0x5a>
- else if(htim_pwm->Instance==TIM3)
- 8003aee: 687b ldr r3, [r7, #4]
- 8003af0: 681b ldr r3, [r3, #0]
- 8003af2: 4a0e ldr r2, [pc, #56] @ (8003b2c <HAL_TIM_PWM_MspInit+0x70>)
- 8003af4: 4293 cmp r3, r2
- 8003af6: d10e bne.n 8003b16 <HAL_TIM_PWM_MspInit+0x5a>
- __HAL_RCC_TIM3_CLK_ENABLE();
- 8003af8: 4b0b ldr r3, [pc, #44] @ (8003b28 <HAL_TIM_PWM_MspInit+0x6c>)
- 8003afa: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
- 8003afe: 4a0a ldr r2, [pc, #40] @ (8003b28 <HAL_TIM_PWM_MspInit+0x6c>)
- 8003b00: f043 0302 orr.w r3, r3, #2
- 8003b04: f8c2 30e8 str.w r3, [r2, #232] @ 0xe8
- 8003b08: 4b07 ldr r3, [pc, #28] @ (8003b28 <HAL_TIM_PWM_MspInit+0x6c>)
- 8003b0a: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
- 8003b0e: f003 0302 and.w r3, r3, #2
- 8003b12: 60bb str r3, [r7, #8]
- 8003b14: 68bb ldr r3, [r7, #8]
- }
- 8003b16: bf00 nop
- 8003b18: 3714 adds r7, #20
- 8003b1a: 46bd mov sp, r7
- 8003b1c: f85d 7b04 ldr.w r7, [sp], #4
- 8003b20: 4770 bx lr
- 8003b22: bf00 nop
- 8003b24: 40010000 .word 0x40010000
- 8003b28: 58024400 .word 0x58024400
- 8003b2c: 40000400 .word 0x40000400
- 08003b30 <HAL_TIM_Base_MspInit>:
- * This function configures the hardware resources used in this example
- * @param htim_base: TIM_Base handle pointer
- * @retval None
- */
- void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
- {
- 8003b30: b580 push {r7, lr}
- 8003b32: b08c sub sp, #48 @ 0x30
- 8003b34: af00 add r7, sp, #0
- 8003b36: 6078 str r0, [r7, #4]
- GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8003b38: f107 031c add.w r3, r7, #28
- 8003b3c: 2200 movs r2, #0
- 8003b3e: 601a str r2, [r3, #0]
- 8003b40: 605a str r2, [r3, #4]
- 8003b42: 609a str r2, [r3, #8]
- 8003b44: 60da str r2, [r3, #12]
- 8003b46: 611a str r2, [r3, #16]
- if(htim_base->Instance==TIM2)
- 8003b48: 687b ldr r3, [r7, #4]
- 8003b4a: 681b ldr r3, [r3, #0]
- 8003b4c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 8003b50: d137 bne.n 8003bc2 <HAL_TIM_Base_MspInit+0x92>
- {
- /* USER CODE BEGIN TIM2_MspInit 0 */
- /* USER CODE END TIM2_MspInit 0 */
- /* Peripheral clock enable */
- __HAL_RCC_TIM2_CLK_ENABLE();
- 8003b52: 4b46 ldr r3, [pc, #280] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003b54: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
- 8003b58: 4a44 ldr r2, [pc, #272] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003b5a: f043 0301 orr.w r3, r3, #1
- 8003b5e: f8c2 30e8 str.w r3, [r2, #232] @ 0xe8
- 8003b62: 4b42 ldr r3, [pc, #264] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003b64: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
- 8003b68: f003 0301 and.w r3, r3, #1
- 8003b6c: 61bb str r3, [r7, #24]
- 8003b6e: 69bb ldr r3, [r7, #24]
- __HAL_RCC_GPIOB_CLK_ENABLE();
- 8003b70: 4b3e ldr r3, [pc, #248] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003b72: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003b76: 4a3d ldr r2, [pc, #244] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003b78: f043 0302 orr.w r3, r3, #2
- 8003b7c: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 8003b80: 4b3a ldr r3, [pc, #232] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003b82: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003b86: f003 0302 and.w r3, r3, #2
- 8003b8a: 617b str r3, [r7, #20]
- 8003b8c: 697b ldr r3, [r7, #20]
- /**TIM2 GPIO Configuration
- PB10 ------> TIM2_CH3
- PB11 ------> TIM2_CH4
- */
- GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
- 8003b8e: f44f 6340 mov.w r3, #3072 @ 0xc00
- 8003b92: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003b94: 2302 movs r3, #2
- 8003b96: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003b98: 2300 movs r3, #0
- 8003b9a: 627b str r3, [r7, #36] @ 0x24
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003b9c: 2300 movs r3, #0
- 8003b9e: 62bb str r3, [r7, #40] @ 0x28
- GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
- 8003ba0: 2301 movs r3, #1
- 8003ba2: 62fb str r3, [r7, #44] @ 0x2c
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 8003ba4: f107 031c add.w r3, r7, #28
- 8003ba8: 4619 mov r1, r3
- 8003baa: 4831 ldr r0, [pc, #196] @ (8003c70 <HAL_TIM_Base_MspInit+0x140>)
- 8003bac: f006 feb4 bl 800a918 <HAL_GPIO_Init>
- /* TIM2 interrupt Init */
- HAL_NVIC_SetPriority(TIM2_IRQn, 5, 0);
- 8003bb0: 2200 movs r2, #0
- 8003bb2: 2105 movs r1, #5
- 8003bb4: 201c movs r0, #28
- 8003bb6: f003 fb7d bl 80072b4 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(TIM2_IRQn);
- 8003bba: 201c movs r0, #28
- 8003bbc: f003 fb94 bl 80072e8 <HAL_NVIC_EnableIRQ>
- /* USER CODE BEGIN TIM8_MspInit 1 */
- /* USER CODE END TIM8_MspInit 1 */
- }
- }
- 8003bc0: e050 b.n 8003c64 <HAL_TIM_Base_MspInit+0x134>
- else if(htim_base->Instance==TIM4)
- 8003bc2: 687b ldr r3, [r7, #4]
- 8003bc4: 681b ldr r3, [r3, #0]
- 8003bc6: 4a2b ldr r2, [pc, #172] @ (8003c74 <HAL_TIM_Base_MspInit+0x144>)
- 8003bc8: 4293 cmp r3, r2
- 8003bca: d137 bne.n 8003c3c <HAL_TIM_Base_MspInit+0x10c>
- __HAL_RCC_TIM4_CLK_ENABLE();
- 8003bcc: 4b27 ldr r3, [pc, #156] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003bce: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
- 8003bd2: 4a26 ldr r2, [pc, #152] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003bd4: f043 0304 orr.w r3, r3, #4
- 8003bd8: f8c2 30e8 str.w r3, [r2, #232] @ 0xe8
- 8003bdc: 4b23 ldr r3, [pc, #140] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003bde: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
- 8003be2: f003 0304 and.w r3, r3, #4
- 8003be6: 613b str r3, [r7, #16]
- 8003be8: 693b ldr r3, [r7, #16]
- __HAL_RCC_GPIOD_CLK_ENABLE();
- 8003bea: 4b20 ldr r3, [pc, #128] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003bec: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003bf0: 4a1e ldr r2, [pc, #120] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003bf2: f043 0308 orr.w r3, r3, #8
- 8003bf6: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 8003bfa: 4b1c ldr r3, [pc, #112] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003bfc: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003c00: f003 0308 and.w r3, r3, #8
- 8003c04: 60fb str r3, [r7, #12]
- 8003c06: 68fb ldr r3, [r7, #12]
- GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
- 8003c08: f44f 4340 mov.w r3, #49152 @ 0xc000
- 8003c0c: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003c0e: 2302 movs r3, #2
- 8003c10: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003c12: 2300 movs r3, #0
- 8003c14: 627b str r3, [r7, #36] @ 0x24
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003c16: 2300 movs r3, #0
- 8003c18: 62bb str r3, [r7, #40] @ 0x28
- GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
- 8003c1a: 2302 movs r3, #2
- 8003c1c: 62fb str r3, [r7, #44] @ 0x2c
- HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
- 8003c1e: f107 031c add.w r3, r7, #28
- 8003c22: 4619 mov r1, r3
- 8003c24: 4814 ldr r0, [pc, #80] @ (8003c78 <HAL_TIM_Base_MspInit+0x148>)
- 8003c26: f006 fe77 bl 800a918 <HAL_GPIO_Init>
- HAL_NVIC_SetPriority(TIM4_IRQn, 5, 0);
- 8003c2a: 2200 movs r2, #0
- 8003c2c: 2105 movs r1, #5
- 8003c2e: 201e movs r0, #30
- 8003c30: f003 fb40 bl 80072b4 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(TIM4_IRQn);
- 8003c34: 201e movs r0, #30
- 8003c36: f003 fb57 bl 80072e8 <HAL_NVIC_EnableIRQ>
- }
- 8003c3a: e013 b.n 8003c64 <HAL_TIM_Base_MspInit+0x134>
- else if(htim_base->Instance==TIM8)
- 8003c3c: 687b ldr r3, [r7, #4]
- 8003c3e: 681b ldr r3, [r3, #0]
- 8003c40: 4a0e ldr r2, [pc, #56] @ (8003c7c <HAL_TIM_Base_MspInit+0x14c>)
- 8003c42: 4293 cmp r3, r2
- 8003c44: d10e bne.n 8003c64 <HAL_TIM_Base_MspInit+0x134>
- __HAL_RCC_TIM8_CLK_ENABLE();
- 8003c46: 4b09 ldr r3, [pc, #36] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003c48: f8d3 30f0 ldr.w r3, [r3, #240] @ 0xf0
- 8003c4c: 4a07 ldr r2, [pc, #28] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003c4e: f043 0302 orr.w r3, r3, #2
- 8003c52: f8c2 30f0 str.w r3, [r2, #240] @ 0xf0
- 8003c56: 4b05 ldr r3, [pc, #20] @ (8003c6c <HAL_TIM_Base_MspInit+0x13c>)
- 8003c58: f8d3 30f0 ldr.w r3, [r3, #240] @ 0xf0
- 8003c5c: f003 0302 and.w r3, r3, #2
- 8003c60: 60bb str r3, [r7, #8]
- 8003c62: 68bb ldr r3, [r7, #8]
- }
- 8003c64: bf00 nop
- 8003c66: 3730 adds r7, #48 @ 0x30
- 8003c68: 46bd mov sp, r7
- 8003c6a: bd80 pop {r7, pc}
- 8003c6c: 58024400 .word 0x58024400
- 8003c70: 58020400 .word 0x58020400
- 8003c74: 40000800 .word 0x40000800
- 8003c78: 58020c00 .word 0x58020c00
- 8003c7c: 40010400 .word 0x40010400
- 08003c80 <HAL_TIM_MspPostInit>:
- void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
- {
- 8003c80: b580 push {r7, lr}
- 8003c82: b08a sub sp, #40 @ 0x28
- 8003c84: af00 add r7, sp, #0
- 8003c86: 6078 str r0, [r7, #4]
- GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8003c88: f107 0314 add.w r3, r7, #20
- 8003c8c: 2200 movs r2, #0
- 8003c8e: 601a str r2, [r3, #0]
- 8003c90: 605a str r2, [r3, #4]
- 8003c92: 609a str r2, [r3, #8]
- 8003c94: 60da str r2, [r3, #12]
- 8003c96: 611a str r2, [r3, #16]
- if(htim->Instance==TIM1)
- 8003c98: 687b ldr r3, [r7, #4]
- 8003c9a: 681b ldr r3, [r3, #0]
- 8003c9c: 4a26 ldr r2, [pc, #152] @ (8003d38 <HAL_TIM_MspPostInit+0xb8>)
- 8003c9e: 4293 cmp r3, r2
- 8003ca0: d120 bne.n 8003ce4 <HAL_TIM_MspPostInit+0x64>
- {
- /* USER CODE BEGIN TIM1_MspPostInit 0 */
- /* USER CODE END TIM1_MspPostInit 0 */
- __HAL_RCC_GPIOA_CLK_ENABLE();
- 8003ca2: 4b26 ldr r3, [pc, #152] @ (8003d3c <HAL_TIM_MspPostInit+0xbc>)
- 8003ca4: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003ca8: 4a24 ldr r2, [pc, #144] @ (8003d3c <HAL_TIM_MspPostInit+0xbc>)
- 8003caa: f043 0301 orr.w r3, r3, #1
- 8003cae: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 8003cb2: 4b22 ldr r3, [pc, #136] @ (8003d3c <HAL_TIM_MspPostInit+0xbc>)
- 8003cb4: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003cb8: f003 0301 and.w r3, r3, #1
- 8003cbc: 613b str r3, [r7, #16]
- 8003cbe: 693b ldr r3, [r7, #16]
- /**TIM1 GPIO Configuration
- PA9 ------> TIM1_CH2
- */
- GPIO_InitStruct.Pin = GPIO_PIN_9;
- 8003cc0: f44f 7300 mov.w r3, #512 @ 0x200
- 8003cc4: 617b str r3, [r7, #20]
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003cc6: 2302 movs r3, #2
- 8003cc8: 61bb str r3, [r7, #24]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003cca: 2300 movs r3, #0
- 8003ccc: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003cce: 2300 movs r3, #0
- 8003cd0: 623b str r3, [r7, #32]
- GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
- 8003cd2: 2301 movs r3, #1
- 8003cd4: 627b str r3, [r7, #36] @ 0x24
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8003cd6: f107 0314 add.w r3, r7, #20
- 8003cda: 4619 mov r1, r3
- 8003cdc: 4818 ldr r0, [pc, #96] @ (8003d40 <HAL_TIM_MspPostInit+0xc0>)
- 8003cde: f006 fe1b bl 800a918 <HAL_GPIO_Init>
- /* USER CODE BEGIN TIM3_MspPostInit 1 */
- /* USER CODE END TIM3_MspPostInit 1 */
- }
- }
- 8003ce2: e024 b.n 8003d2e <HAL_TIM_MspPostInit+0xae>
- else if(htim->Instance==TIM3)
- 8003ce4: 687b ldr r3, [r7, #4]
- 8003ce6: 681b ldr r3, [r3, #0]
- 8003ce8: 4a16 ldr r2, [pc, #88] @ (8003d44 <HAL_TIM_MspPostInit+0xc4>)
- 8003cea: 4293 cmp r3, r2
- 8003cec: d11f bne.n 8003d2e <HAL_TIM_MspPostInit+0xae>
- __HAL_RCC_GPIOC_CLK_ENABLE();
- 8003cee: 4b13 ldr r3, [pc, #76] @ (8003d3c <HAL_TIM_MspPostInit+0xbc>)
- 8003cf0: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003cf4: 4a11 ldr r2, [pc, #68] @ (8003d3c <HAL_TIM_MspPostInit+0xbc>)
- 8003cf6: f043 0304 orr.w r3, r3, #4
- 8003cfa: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 8003cfe: 4b0f ldr r3, [pc, #60] @ (8003d3c <HAL_TIM_MspPostInit+0xbc>)
- 8003d00: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003d04: f003 0304 and.w r3, r3, #4
- 8003d08: 60fb str r3, [r7, #12]
- 8003d0a: 68fb ldr r3, [r7, #12]
- GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9;
- 8003d0c: f44f 7370 mov.w r3, #960 @ 0x3c0
- 8003d10: 617b str r3, [r7, #20]
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003d12: 2302 movs r3, #2
- 8003d14: 61bb str r3, [r7, #24]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003d16: 2300 movs r3, #0
- 8003d18: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
- 8003d1a: 2301 movs r3, #1
- 8003d1c: 623b str r3, [r7, #32]
- GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
- 8003d1e: 2302 movs r3, #2
- 8003d20: 627b str r3, [r7, #36] @ 0x24
- HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 8003d22: f107 0314 add.w r3, r7, #20
- 8003d26: 4619 mov r1, r3
- 8003d28: 4807 ldr r0, [pc, #28] @ (8003d48 <HAL_TIM_MspPostInit+0xc8>)
- 8003d2a: f006 fdf5 bl 800a918 <HAL_GPIO_Init>
- }
- 8003d2e: bf00 nop
- 8003d30: 3728 adds r7, #40 @ 0x28
- 8003d32: 46bd mov sp, r7
- 8003d34: bd80 pop {r7, pc}
- 8003d36: bf00 nop
- 8003d38: 40010000 .word 0x40010000
- 8003d3c: 58024400 .word 0x58024400
- 8003d40: 58020000 .word 0x58020000
- 8003d44: 40000400 .word 0x40000400
- 8003d48: 58020800 .word 0x58020800
- 08003d4c <HAL_UART_MspInit>:
- * This function configures the hardware resources used in this example
- * @param huart: UART handle pointer
- * @retval None
- */
- void HAL_UART_MspInit(UART_HandleTypeDef* huart)
- {
- 8003d4c: b580 push {r7, lr}
- 8003d4e: b0bc sub sp, #240 @ 0xf0
- 8003d50: af00 add r7, sp, #0
- 8003d52: 6078 str r0, [r7, #4]
- GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8003d54: f107 03dc add.w r3, r7, #220 @ 0xdc
- 8003d58: 2200 movs r2, #0
- 8003d5a: 601a str r2, [r3, #0]
- 8003d5c: 605a str r2, [r3, #4]
- 8003d5e: 609a str r2, [r3, #8]
- 8003d60: 60da str r2, [r3, #12]
- 8003d62: 611a str r2, [r3, #16]
- RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
- 8003d64: f107 0318 add.w r3, r7, #24
- 8003d68: 22c0 movs r2, #192 @ 0xc0
- 8003d6a: 2100 movs r1, #0
- 8003d6c: 4618 mov r0, r3
- 8003d6e: f014 f81a bl 8017da6 <memset>
- if(huart->Instance==UART8)
- 8003d72: 687b ldr r3, [r7, #4]
- 8003d74: 681b ldr r3, [r3, #0]
- 8003d76: 4a55 ldr r2, [pc, #340] @ (8003ecc <HAL_UART_MspInit+0x180>)
- 8003d78: 4293 cmp r3, r2
- 8003d7a: d14e bne.n 8003e1a <HAL_UART_MspInit+0xce>
- /* USER CODE END UART8_MspInit 0 */
- /** Initializes the peripherals clock
- */
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART8;
- 8003d7c: f04f 0202 mov.w r2, #2
- 8003d80: f04f 0300 mov.w r3, #0
- 8003d84: e9c7 2306 strd r2, r3, [r7, #24]
- PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
- 8003d88: 2300 movs r3, #0
- 8003d8a: f8c7 3090 str.w r3, [r7, #144] @ 0x90
- if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
- 8003d8e: f107 0318 add.w r3, r7, #24
- 8003d92: 4618 mov r0, r3
- 8003d94: f008 f9a6 bl 800c0e4 <HAL_RCCEx_PeriphCLKConfig>
- 8003d98: 4603 mov r3, r0
- 8003d9a: 2b00 cmp r3, #0
- 8003d9c: d001 beq.n 8003da2 <HAL_UART_MspInit+0x56>
- {
- Error_Handler();
- 8003d9e: f7fe f8f3 bl 8001f88 <Error_Handler>
- }
- /* Peripheral clock enable */
- __HAL_RCC_UART8_CLK_ENABLE();
- 8003da2: 4b4b ldr r3, [pc, #300] @ (8003ed0 <HAL_UART_MspInit+0x184>)
- 8003da4: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
- 8003da8: 4a49 ldr r2, [pc, #292] @ (8003ed0 <HAL_UART_MspInit+0x184>)
- 8003daa: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000
- 8003dae: f8c2 30e8 str.w r3, [r2, #232] @ 0xe8
- 8003db2: 4b47 ldr r3, [pc, #284] @ (8003ed0 <HAL_UART_MspInit+0x184>)
- 8003db4: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
- 8003db8: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
- 8003dbc: 617b str r3, [r7, #20]
- 8003dbe: 697b ldr r3, [r7, #20]
- __HAL_RCC_GPIOE_CLK_ENABLE();
- 8003dc0: 4b43 ldr r3, [pc, #268] @ (8003ed0 <HAL_UART_MspInit+0x184>)
- 8003dc2: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003dc6: 4a42 ldr r2, [pc, #264] @ (8003ed0 <HAL_UART_MspInit+0x184>)
- 8003dc8: f043 0310 orr.w r3, r3, #16
- 8003dcc: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 8003dd0: 4b3f ldr r3, [pc, #252] @ (8003ed0 <HAL_UART_MspInit+0x184>)
- 8003dd2: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003dd6: f003 0310 and.w r3, r3, #16
- 8003dda: 613b str r3, [r7, #16]
- 8003ddc: 693b ldr r3, [r7, #16]
- /**UART8 GPIO Configuration
- PE0 ------> UART8_RX
- PE1 ------> UART8_TX
- */
- GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
- 8003dde: 2303 movs r3, #3
- 8003de0: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003de4: 2302 movs r3, #2
- 8003de6: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003dea: 2300 movs r3, #0
- 8003dec: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003df0: 2300 movs r3, #0
- 8003df2: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
- GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
- 8003df6: 2308 movs r3, #8
- 8003df8: f8c7 30ec str.w r3, [r7, #236] @ 0xec
- HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 8003dfc: f107 03dc add.w r3, r7, #220 @ 0xdc
- 8003e00: 4619 mov r1, r3
- 8003e02: 4834 ldr r0, [pc, #208] @ (8003ed4 <HAL_UART_MspInit+0x188>)
- 8003e04: f006 fd88 bl 800a918 <HAL_GPIO_Init>
- /* UART8 interrupt Init */
- HAL_NVIC_SetPriority(UART8_IRQn, 5, 0);
- 8003e08: 2200 movs r2, #0
- 8003e0a: 2105 movs r1, #5
- 8003e0c: 2053 movs r0, #83 @ 0x53
- 8003e0e: f003 fa51 bl 80072b4 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(UART8_IRQn);
- 8003e12: 2053 movs r0, #83 @ 0x53
- 8003e14: f003 fa68 bl 80072e8 <HAL_NVIC_EnableIRQ>
- /* USER CODE BEGIN USART1_MspInit 1 */
- /* USER CODE END USART1_MspInit 1 */
- }
- }
- 8003e18: e053 b.n 8003ec2 <HAL_UART_MspInit+0x176>
- else if(huart->Instance==USART1)
- 8003e1a: 687b ldr r3, [r7, #4]
- 8003e1c: 681b ldr r3, [r3, #0]
- 8003e1e: 4a2e ldr r2, [pc, #184] @ (8003ed8 <HAL_UART_MspInit+0x18c>)
- 8003e20: 4293 cmp r3, r2
- 8003e22: d14e bne.n 8003ec2 <HAL_UART_MspInit+0x176>
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
- 8003e24: f04f 0201 mov.w r2, #1
- 8003e28: f04f 0300 mov.w r3, #0
- 8003e2c: e9c7 2306 strd r2, r3, [r7, #24]
- PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
- 8003e30: 2300 movs r3, #0
- 8003e32: f8c7 3094 str.w r3, [r7, #148] @ 0x94
- if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
- 8003e36: f107 0318 add.w r3, r7, #24
- 8003e3a: 4618 mov r0, r3
- 8003e3c: f008 f952 bl 800c0e4 <HAL_RCCEx_PeriphCLKConfig>
- 8003e40: 4603 mov r3, r0
- 8003e42: 2b00 cmp r3, #0
- 8003e44: d001 beq.n 8003e4a <HAL_UART_MspInit+0xfe>
- Error_Handler();
- 8003e46: f7fe f89f bl 8001f88 <Error_Handler>
- __HAL_RCC_USART1_CLK_ENABLE();
- 8003e4a: 4b21 ldr r3, [pc, #132] @ (8003ed0 <HAL_UART_MspInit+0x184>)
- 8003e4c: f8d3 30f0 ldr.w r3, [r3, #240] @ 0xf0
- 8003e50: 4a1f ldr r2, [pc, #124] @ (8003ed0 <HAL_UART_MspInit+0x184>)
- 8003e52: f043 0310 orr.w r3, r3, #16
- 8003e56: f8c2 30f0 str.w r3, [r2, #240] @ 0xf0
- 8003e5a: 4b1d ldr r3, [pc, #116] @ (8003ed0 <HAL_UART_MspInit+0x184>)
- 8003e5c: f8d3 30f0 ldr.w r3, [r3, #240] @ 0xf0
- 8003e60: f003 0310 and.w r3, r3, #16
- 8003e64: 60fb str r3, [r7, #12]
- 8003e66: 68fb ldr r3, [r7, #12]
- __HAL_RCC_GPIOB_CLK_ENABLE();
- 8003e68: 4b19 ldr r3, [pc, #100] @ (8003ed0 <HAL_UART_MspInit+0x184>)
- 8003e6a: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003e6e: 4a18 ldr r2, [pc, #96] @ (8003ed0 <HAL_UART_MspInit+0x184>)
- 8003e70: f043 0302 orr.w r3, r3, #2
- 8003e74: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
- 8003e78: 4b15 ldr r3, [pc, #84] @ (8003ed0 <HAL_UART_MspInit+0x184>)
- 8003e7a: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
- 8003e7e: f003 0302 and.w r3, r3, #2
- 8003e82: 60bb str r3, [r7, #8]
- 8003e84: 68bb ldr r3, [r7, #8]
- GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
- 8003e86: f44f 4340 mov.w r3, #49152 @ 0xc000
- 8003e8a: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003e8e: 2302 movs r3, #2
- 8003e90: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003e94: 2300 movs r3, #0
- 8003e96: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003e9a: 2300 movs r3, #0
- 8003e9c: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
- GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
- 8003ea0: 2304 movs r3, #4
- 8003ea2: f8c7 30ec str.w r3, [r7, #236] @ 0xec
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 8003ea6: f107 03dc add.w r3, r7, #220 @ 0xdc
- 8003eaa: 4619 mov r1, r3
- 8003eac: 480b ldr r0, [pc, #44] @ (8003edc <HAL_UART_MspInit+0x190>)
- 8003eae: f006 fd33 bl 800a918 <HAL_GPIO_Init>
- HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
- 8003eb2: 2200 movs r2, #0
- 8003eb4: 2105 movs r1, #5
- 8003eb6: 2025 movs r0, #37 @ 0x25
- 8003eb8: f003 f9fc bl 80072b4 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(USART1_IRQn);
- 8003ebc: 2025 movs r0, #37 @ 0x25
- 8003ebe: f003 fa13 bl 80072e8 <HAL_NVIC_EnableIRQ>
- }
- 8003ec2: bf00 nop
- 8003ec4: 37f0 adds r7, #240 @ 0xf0
- 8003ec6: 46bd mov sp, r7
- 8003ec8: bd80 pop {r7, pc}
- 8003eca: bf00 nop
- 8003ecc: 40007c00 .word 0x40007c00
- 8003ed0: 58024400 .word 0x58024400
- 8003ed4: 58021000 .word 0x58021000
- 8003ed8: 40011000 .word 0x40011000
- 8003edc: 58020400 .word 0x58020400
- 08003ee0 <HAL_InitTick>:
- * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
- * @param TickPriority: Tick interrupt priority.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
- {
- 8003ee0: b580 push {r7, lr}
- 8003ee2: b090 sub sp, #64 @ 0x40
- 8003ee4: af00 add r7, sp, #0
- 8003ee6: 6078 str r0, [r7, #4]
- uint32_t uwTimclock, uwAPB1Prescaler;
- uint32_t uwPrescalerValue;
- uint32_t pFLatency;
- /*Configure the TIM6 IRQ priority */
- if (TickPriority < (1UL << __NVIC_PRIO_BITS))
- 8003ee8: 687b ldr r3, [r7, #4]
- 8003eea: 2b0f cmp r3, #15
- 8003eec: d827 bhi.n 8003f3e <HAL_InitTick+0x5e>
- {
- HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority ,0U);
- 8003eee: 2200 movs r2, #0
- 8003ef0: 6879 ldr r1, [r7, #4]
- 8003ef2: 2036 movs r0, #54 @ 0x36
- 8003ef4: f003 f9de bl 80072b4 <HAL_NVIC_SetPriority>
- /* Enable the TIM6 global Interrupt */
- HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
- 8003ef8: 2036 movs r0, #54 @ 0x36
- 8003efa: f003 f9f5 bl 80072e8 <HAL_NVIC_EnableIRQ>
- uwTickPrio = TickPriority;
- 8003efe: 4a29 ldr r2, [pc, #164] @ (8003fa4 <HAL_InitTick+0xc4>)
- 8003f00: 687b ldr r3, [r7, #4]
- 8003f02: 6013 str r3, [r2, #0]
- {
- return HAL_ERROR;
- }
- /* Enable TIM6 clock */
- __HAL_RCC_TIM6_CLK_ENABLE();
- 8003f04: 4b28 ldr r3, [pc, #160] @ (8003fa8 <HAL_InitTick+0xc8>)
- 8003f06: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
- 8003f0a: 4a27 ldr r2, [pc, #156] @ (8003fa8 <HAL_InitTick+0xc8>)
- 8003f0c: f043 0310 orr.w r3, r3, #16
- 8003f10: f8c2 30e8 str.w r3, [r2, #232] @ 0xe8
- 8003f14: 4b24 ldr r3, [pc, #144] @ (8003fa8 <HAL_InitTick+0xc8>)
- 8003f16: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
- 8003f1a: f003 0310 and.w r3, r3, #16
- 8003f1e: 60fb str r3, [r7, #12]
- 8003f20: 68fb ldr r3, [r7, #12]
- /* Get clock configuration */
- HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
- 8003f22: f107 0210 add.w r2, r7, #16
- 8003f26: f107 0314 add.w r3, r7, #20
- 8003f2a: 4611 mov r1, r2
- 8003f2c: 4618 mov r0, r3
- 8003f2e: f008 f897 bl 800c060 <HAL_RCC_GetClockConfig>
- /* Get APB1 prescaler */
- uwAPB1Prescaler = clkconfig.APB1CLKDivider;
- 8003f32: 6abb ldr r3, [r7, #40] @ 0x28
- 8003f34: 63bb str r3, [r7, #56] @ 0x38
- /* Compute TIM6 clock */
- if (uwAPB1Prescaler == RCC_HCLK_DIV1)
- 8003f36: 6bbb ldr r3, [r7, #56] @ 0x38
- 8003f38: 2b00 cmp r3, #0
- 8003f3a: d106 bne.n 8003f4a <HAL_InitTick+0x6a>
- 8003f3c: e001 b.n 8003f42 <HAL_InitTick+0x62>
- return HAL_ERROR;
- 8003f3e: 2301 movs r3, #1
- 8003f40: e02b b.n 8003f9a <HAL_InitTick+0xba>
- {
- uwTimclock = HAL_RCC_GetPCLK1Freq();
- 8003f42: f008 f861 bl 800c008 <HAL_RCC_GetPCLK1Freq>
- 8003f46: 63f8 str r0, [r7, #60] @ 0x3c
- 8003f48: e004 b.n 8003f54 <HAL_InitTick+0x74>
- }
- else
- {
- uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
- 8003f4a: f008 f85d bl 800c008 <HAL_RCC_GetPCLK1Freq>
- 8003f4e: 4603 mov r3, r0
- 8003f50: 005b lsls r3, r3, #1
- 8003f52: 63fb str r3, [r7, #60] @ 0x3c
- }
- /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
- uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
- 8003f54: 6bfb ldr r3, [r7, #60] @ 0x3c
- 8003f56: 4a15 ldr r2, [pc, #84] @ (8003fac <HAL_InitTick+0xcc>)
- 8003f58: fba2 2303 umull r2, r3, r2, r3
- 8003f5c: 0c9b lsrs r3, r3, #18
- 8003f5e: 3b01 subs r3, #1
- 8003f60: 637b str r3, [r7, #52] @ 0x34
- /* Initialize TIM6 */
- htim6.Instance = TIM6;
- 8003f62: 4b13 ldr r3, [pc, #76] @ (8003fb0 <HAL_InitTick+0xd0>)
- 8003f64: 4a13 ldr r2, [pc, #76] @ (8003fb4 <HAL_InitTick+0xd4>)
- 8003f66: 601a str r2, [r3, #0]
- + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
- + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
- + ClockDivision = 0
- + Counter direction = Up
- */
- htim6.Init.Period = (1000000U / 1000U) - 1U;
- 8003f68: 4b11 ldr r3, [pc, #68] @ (8003fb0 <HAL_InitTick+0xd0>)
- 8003f6a: f240 32e7 movw r2, #999 @ 0x3e7
- 8003f6e: 60da str r2, [r3, #12]
- htim6.Init.Prescaler = uwPrescalerValue;
- 8003f70: 4a0f ldr r2, [pc, #60] @ (8003fb0 <HAL_InitTick+0xd0>)
- 8003f72: 6b7b ldr r3, [r7, #52] @ 0x34
- 8003f74: 6053 str r3, [r2, #4]
- htim6.Init.ClockDivision = 0;
- 8003f76: 4b0e ldr r3, [pc, #56] @ (8003fb0 <HAL_InitTick+0xd0>)
- 8003f78: 2200 movs r2, #0
- 8003f7a: 611a str r2, [r3, #16]
- htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
- 8003f7c: 4b0c ldr r3, [pc, #48] @ (8003fb0 <HAL_InitTick+0xd0>)
- 8003f7e: 2200 movs r2, #0
- 8003f80: 609a str r2, [r3, #8]
- if(HAL_TIM_Base_Init(&htim6) == HAL_OK)
- 8003f82: 480b ldr r0, [pc, #44] @ (8003fb0 <HAL_InitTick+0xd0>)
- 8003f84: f00a fdf2 bl 800eb6c <HAL_TIM_Base_Init>
- 8003f88: 4603 mov r3, r0
- 8003f8a: 2b00 cmp r3, #0
- 8003f8c: d104 bne.n 8003f98 <HAL_InitTick+0xb8>
- {
- /* Start the TIM time Base generation in interrupt mode */
- return HAL_TIM_Base_Start_IT(&htim6);
- 8003f8e: 4808 ldr r0, [pc, #32] @ (8003fb0 <HAL_InitTick+0xd0>)
- 8003f90: f00a feb4 bl 800ecfc <HAL_TIM_Base_Start_IT>
- 8003f94: 4603 mov r3, r0
- 8003f96: e000 b.n 8003f9a <HAL_InitTick+0xba>
- }
- /* Return function status */
- return HAL_ERROR;
- 8003f98: 2301 movs r3, #1
- }
- 8003f9a: 4618 mov r0, r3
- 8003f9c: 3740 adds r7, #64 @ 0x40
- 8003f9e: 46bd mov sp, r7
- 8003fa0: bd80 pop {r7, pc}
- 8003fa2: bf00 nop
- 8003fa4: 2400003c .word 0x2400003c
- 8003fa8: 58024400 .word 0x58024400
- 8003fac: 431bde83 .word 0x431bde83
- 8003fb0: 240008b8 .word 0x240008b8
- 8003fb4: 40001000 .word 0x40001000
- 08003fb8 <NMI_Handler>:
- /******************************************************************************/
- /**
- * @brief This function handles Non maskable interrupt.
- */
- void NMI_Handler(void)
- {
- 8003fb8: b480 push {r7}
- 8003fba: af00 add r7, sp, #0
- /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
- /* USER CODE END NonMaskableInt_IRQn 0 */
- /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
- while (1)
- 8003fbc: bf00 nop
- 8003fbe: e7fd b.n 8003fbc <NMI_Handler+0x4>
- 08003fc0 <HardFault_Handler>:
- /**
- * @brief This function handles Hard fault interrupt.
- */
- void HardFault_Handler(void)
- {
- 8003fc0: b480 push {r7}
- 8003fc2: af00 add r7, sp, #0
- /* USER CODE BEGIN HardFault_IRQn 0 */
- /* USER CODE END HardFault_IRQn 0 */
- while (1)
- 8003fc4: bf00 nop
- 8003fc6: e7fd b.n 8003fc4 <HardFault_Handler+0x4>
- 08003fc8 <MemManage_Handler>:
- /**
- * @brief This function handles Memory management fault.
- */
- void MemManage_Handler(void)
- {
- 8003fc8: b480 push {r7}
- 8003fca: af00 add r7, sp, #0
- /* USER CODE BEGIN MemoryManagement_IRQn 0 */
- /* USER CODE END MemoryManagement_IRQn 0 */
- while (1)
- 8003fcc: bf00 nop
- 8003fce: e7fd b.n 8003fcc <MemManage_Handler+0x4>
- 08003fd0 <BusFault_Handler>:
- /**
- * @brief This function handles Pre-fetch fault, memory access fault.
- */
- void BusFault_Handler(void)
- {
- 8003fd0: b480 push {r7}
- 8003fd2: af00 add r7, sp, #0
- /* USER CODE BEGIN BusFault_IRQn 0 */
- /* USER CODE END BusFault_IRQn 0 */
- while (1)
- 8003fd4: bf00 nop
- 8003fd6: e7fd b.n 8003fd4 <BusFault_Handler+0x4>
- 08003fd8 <UsageFault_Handler>:
- /**
- * @brief This function handles Undefined instruction or illegal state.
- */
- void UsageFault_Handler(void)
- {
- 8003fd8: b480 push {r7}
- 8003fda: af00 add r7, sp, #0
- /* USER CODE BEGIN UsageFault_IRQn 0 */
- /* USER CODE END UsageFault_IRQn 0 */
- while (1)
- 8003fdc: bf00 nop
- 8003fde: e7fd b.n 8003fdc <UsageFault_Handler+0x4>
- 08003fe0 <DebugMon_Handler>:
- /**
- * @brief This function handles Debug monitor.
- */
- void DebugMon_Handler(void)
- {
- 8003fe0: b480 push {r7}
- 8003fe2: af00 add r7, sp, #0
- /* USER CODE END DebugMonitor_IRQn 0 */
- /* USER CODE BEGIN DebugMonitor_IRQn 1 */
- /* USER CODE END DebugMonitor_IRQn 1 */
- }
- 8003fe4: bf00 nop
- 8003fe6: 46bd mov sp, r7
- 8003fe8: f85d 7b04 ldr.w r7, [sp], #4
- 8003fec: 4770 bx lr
- 08003fee <RCC_IRQHandler>:
- /**
- * @brief This function handles RCC global interrupt.
- */
- void RCC_IRQHandler(void)
- {
- 8003fee: b480 push {r7}
- 8003ff0: af00 add r7, sp, #0
- /* USER CODE END RCC_IRQn 0 */
- /* USER CODE BEGIN RCC_IRQn 1 */
- /* USER CODE END RCC_IRQn 1 */
- }
- 8003ff2: bf00 nop
- 8003ff4: 46bd mov sp, r7
- 8003ff6: f85d 7b04 ldr.w r7, [sp], #4
- 8003ffa: 4770 bx lr
- 08003ffc <DMA1_Stream0_IRQHandler>:
- /**
- * @brief This function handles DMA1 stream0 global interrupt.
- */
- void DMA1_Stream0_IRQHandler(void)
- {
- 8003ffc: b580 push {r7, lr}
- 8003ffe: af00 add r7, sp, #0
- /* USER CODE BEGIN DMA1_Stream0_IRQn 0 */
- /* USER CODE END DMA1_Stream0_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_adc1);
- 8004000: 4802 ldr r0, [pc, #8] @ (800400c <DMA1_Stream0_IRQHandler+0x10>)
- 8004002: f005 f977 bl 80092f4 <HAL_DMA_IRQHandler>
- /* USER CODE BEGIN DMA1_Stream0_IRQn 1 */
- /* USER CODE END DMA1_Stream0_IRQn 1 */
- }
- 8004006: bf00 nop
- 8004008: bd80 pop {r7, pc}
- 800400a: bf00 nop
- 800400c: 2400026c .word 0x2400026c
- 08004010 <DMA1_Stream1_IRQHandler>:
- /**
- * @brief This function handles DMA1 stream1 global interrupt.
- */
- void DMA1_Stream1_IRQHandler(void)
- {
- 8004010: b580 push {r7, lr}
- 8004012: af00 add r7, sp, #0
- /* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
- /* USER CODE END DMA1_Stream1_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_adc2);
- 8004014: 4802 ldr r0, [pc, #8] @ (8004020 <DMA1_Stream1_IRQHandler+0x10>)
- 8004016: f005 f96d bl 80092f4 <HAL_DMA_IRQHandler>
- /* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
- /* USER CODE END DMA1_Stream1_IRQn 1 */
- }
- 800401a: bf00 nop
- 800401c: bd80 pop {r7, pc}
- 800401e: bf00 nop
- 8004020: 240002e4 .word 0x240002e4
- 08004024 <DMA1_Stream2_IRQHandler>:
- /**
- * @brief This function handles DMA1 stream2 global interrupt.
- */
- void DMA1_Stream2_IRQHandler(void)
- {
- 8004024: b580 push {r7, lr}
- 8004026: af00 add r7, sp, #0
- /* USER CODE BEGIN DMA1_Stream2_IRQn 0 */
- /* USER CODE END DMA1_Stream2_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_adc3);
- 8004028: 4802 ldr r0, [pc, #8] @ (8004034 <DMA1_Stream2_IRQHandler+0x10>)
- 800402a: f005 f963 bl 80092f4 <HAL_DMA_IRQHandler>
- /* USER CODE BEGIN DMA1_Stream2_IRQn 1 */
- /* USER CODE END DMA1_Stream2_IRQn 1 */
- }
- 800402e: bf00 nop
- 8004030: bd80 pop {r7, pc}
- 8004032: bf00 nop
- 8004034: 2400035c .word 0x2400035c
- 08004038 <EXTI9_5_IRQHandler>:
- /**
- * @brief This function handles EXTI line[9:5] interrupts.
- */
- void EXTI9_5_IRQHandler(void)
- {
- 8004038: b580 push {r7, lr}
- 800403a: af00 add r7, sp, #0
- /* USER CODE BEGIN EXTI9_5_IRQn 0 */
- /* USER CODE END EXTI9_5_IRQn 0 */
- HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_8);
- 800403c: f44f 7080 mov.w r0, #256 @ 0x100
- 8004040: f006 fe65 bl 800ad0e <HAL_GPIO_EXTI_IRQHandler>
- HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_9);
- 8004044: f44f 7000 mov.w r0, #512 @ 0x200
- 8004048: f006 fe61 bl 800ad0e <HAL_GPIO_EXTI_IRQHandler>
- /* USER CODE BEGIN EXTI9_5_IRQn 1 */
- /* USER CODE END EXTI9_5_IRQn 1 */
- }
- 800404c: bf00 nop
- 800404e: bd80 pop {r7, pc}
- 08004050 <TIM2_IRQHandler>:
- /**
- * @brief This function handles TIM2 global interrupt.
- */
- void TIM2_IRQHandler(void)
- {
- 8004050: b580 push {r7, lr}
- 8004052: af00 add r7, sp, #0
- /* USER CODE BEGIN TIM2_IRQn 0 */
- /* USER CODE END TIM2_IRQn 0 */
- HAL_TIM_IRQHandler(&htim2);
- 8004054: 4802 ldr r0, [pc, #8] @ (8004060 <TIM2_IRQHandler+0x10>)
- 8004056: f00b fa77 bl 800f548 <HAL_TIM_IRQHandler>
- /* USER CODE BEGIN TIM2_IRQn 1 */
- /* USER CODE END TIM2_IRQn 1 */
- }
- 800405a: bf00 nop
- 800405c: bd80 pop {r7, pc}
- 800405e: bf00 nop
- 8004060: 240004a8 .word 0x240004a8
- 08004064 <TIM4_IRQHandler>:
- /**
- * @brief This function handles TIM4 global interrupt.
- */
- void TIM4_IRQHandler(void)
- {
- 8004064: b580 push {r7, lr}
- 8004066: af00 add r7, sp, #0
- /* USER CODE BEGIN TIM4_IRQn 0 */
- /* USER CODE END TIM4_IRQn 0 */
- HAL_TIM_IRQHandler(&htim4);
- 8004068: 4802 ldr r0, [pc, #8] @ (8004074 <TIM4_IRQHandler+0x10>)
- 800406a: f00b fa6d bl 800f548 <HAL_TIM_IRQHandler>
- /* USER CODE BEGIN TIM4_IRQn 1 */
- /* USER CODE END TIM4_IRQn 1 */
- }
- 800406e: bf00 nop
- 8004070: bd80 pop {r7, pc}
- 8004072: bf00 nop
- 8004074: 24000540 .word 0x24000540
- 08004078 <USART1_IRQHandler>:
- /**
- * @brief This function handles USART1 global interrupt.
- */
- void USART1_IRQHandler(void)
- {
- 8004078: b580 push {r7, lr}
- 800407a: af00 add r7, sp, #0
- /* USER CODE BEGIN USART1_IRQn 0 */
- /* USER CODE END USART1_IRQn 0 */
- HAL_UART_IRQHandler(&huart1);
- 800407c: 4802 ldr r0, [pc, #8] @ (8004088 <USART1_IRQHandler+0x10>)
- 800407e: f00c feb5 bl 8010dec <HAL_UART_IRQHandler>
- /* USER CODE BEGIN USART1_IRQn 1 */
- /* USER CODE END USART1_IRQn 1 */
- }
- 8004082: bf00 nop
- 8004084: bd80 pop {r7, pc}
- 8004086: bf00 nop
- 8004088: 2400066c .word 0x2400066c
- 0800408c <EXTI15_10_IRQHandler>:
- /**
- * @brief This function handles EXTI line[15:10] interrupts.
- */
- void EXTI15_10_IRQHandler(void)
- {
- 800408c: b580 push {r7, lr}
- 800408e: af00 add r7, sp, #0
- /* USER CODE BEGIN EXTI15_10_IRQn 0 */
- /* USER CODE END EXTI15_10_IRQn 0 */
- HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_10);
- 8004090: f44f 6080 mov.w r0, #1024 @ 0x400
- 8004094: f006 fe3b bl 800ad0e <HAL_GPIO_EXTI_IRQHandler>
- HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_11);
- 8004098: f44f 6000 mov.w r0, #2048 @ 0x800
- 800409c: f006 fe37 bl 800ad0e <HAL_GPIO_EXTI_IRQHandler>
- HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_12);
- 80040a0: f44f 5080 mov.w r0, #4096 @ 0x1000
- 80040a4: f006 fe33 bl 800ad0e <HAL_GPIO_EXTI_IRQHandler>
- HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13);
- 80040a8: f44f 5000 mov.w r0, #8192 @ 0x2000
- 80040ac: f006 fe2f bl 800ad0e <HAL_GPIO_EXTI_IRQHandler>
- /* USER CODE BEGIN EXTI15_10_IRQn 1 */
- /* USER CODE END EXTI15_10_IRQn 1 */
- }
- 80040b0: bf00 nop
- 80040b2: bd80 pop {r7, pc}
- 080040b4 <TIM6_DAC_IRQHandler>:
- /**
- * @brief This function handles TIM6 global interrupt, DAC1_CH1 and DAC1_CH2 underrun error interrupts.
- */
- void TIM6_DAC_IRQHandler(void)
- {
- 80040b4: b580 push {r7, lr}
- 80040b6: af00 add r7, sp, #0
- /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
- /* USER CODE END TIM6_DAC_IRQn 0 */
- if (hdac1.State != HAL_DAC_STATE_RESET) {
- 80040b8: 4b06 ldr r3, [pc, #24] @ (80040d4 <TIM6_DAC_IRQHandler+0x20>)
- 80040ba: 791b ldrb r3, [r3, #4]
- 80040bc: b2db uxtb r3, r3
- 80040be: 2b00 cmp r3, #0
- 80040c0: d002 beq.n 80040c8 <TIM6_DAC_IRQHandler+0x14>
- HAL_DAC_IRQHandler(&hdac1);
- 80040c2: 4804 ldr r0, [pc, #16] @ (80040d4 <TIM6_DAC_IRQHandler+0x20>)
- 80040c4: f003 fc15 bl 80078f2 <HAL_DAC_IRQHandler>
- }
- HAL_TIM_IRQHandler(&htim6);
- 80040c8: 4803 ldr r0, [pc, #12] @ (80040d8 <TIM6_DAC_IRQHandler+0x24>)
- 80040ca: f00b fa3d bl 800f548 <HAL_TIM_IRQHandler>
- /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
- /* USER CODE END TIM6_DAC_IRQn 1 */
- }
- 80040ce: bf00 nop
- 80040d0: bd80 pop {r7, pc}
- 80040d2: bf00 nop
- 80040d4: 24000424 .word 0x24000424
- 80040d8: 240008b8 .word 0x240008b8
- 080040dc <UART8_IRQHandler>:
- /**
- * @brief This function handles UART8 global interrupt.
- */
- void UART8_IRQHandler(void)
- {
- 80040dc: b580 push {r7, lr}
- 80040de: af00 add r7, sp, #0
- /* USER CODE BEGIN UART8_IRQn 0 */
- /* USER CODE END UART8_IRQn 0 */
- HAL_UART_IRQHandler(&huart8);
- 80040e0: 4802 ldr r0, [pc, #8] @ (80040ec <UART8_IRQHandler+0x10>)
- 80040e2: f00c fe83 bl 8010dec <HAL_UART_IRQHandler>
- /* USER CODE BEGIN UART8_IRQn 1 */
- /* USER CODE END UART8_IRQn 1 */
- }
- 80040e6: bf00 nop
- 80040e8: bd80 pop {r7, pc}
- 80040ea: bf00 nop
- 80040ec: 240005d8 .word 0x240005d8
- 080040f0 <_read>:
- _kill(status, -1);
- while (1) {} /* Make sure we hang here */
- }
- __attribute__((weak)) int _read(int file, char *ptr, int len)
- {
- 80040f0: b580 push {r7, lr}
- 80040f2: b086 sub sp, #24
- 80040f4: af00 add r7, sp, #0
- 80040f6: 60f8 str r0, [r7, #12]
- 80040f8: 60b9 str r1, [r7, #8]
- 80040fa: 607a str r2, [r7, #4]
- (void)file;
- int DataIdx;
- for (DataIdx = 0; DataIdx < len; DataIdx++)
- 80040fc: 2300 movs r3, #0
- 80040fe: 617b str r3, [r7, #20]
- 8004100: e00a b.n 8004118 <_read+0x28>
- {
- *ptr++ = __io_getchar();
- 8004102: f3af 8000 nop.w
- 8004106: 4601 mov r1, r0
- 8004108: 68bb ldr r3, [r7, #8]
- 800410a: 1c5a adds r2, r3, #1
- 800410c: 60ba str r2, [r7, #8]
- 800410e: b2ca uxtb r2, r1
- 8004110: 701a strb r2, [r3, #0]
- for (DataIdx = 0; DataIdx < len; DataIdx++)
- 8004112: 697b ldr r3, [r7, #20]
- 8004114: 3301 adds r3, #1
- 8004116: 617b str r3, [r7, #20]
- 8004118: 697a ldr r2, [r7, #20]
- 800411a: 687b ldr r3, [r7, #4]
- 800411c: 429a cmp r2, r3
- 800411e: dbf0 blt.n 8004102 <_read+0x12>
- }
- return len;
- 8004120: 687b ldr r3, [r7, #4]
- }
- 8004122: 4618 mov r0, r3
- 8004124: 3718 adds r7, #24
- 8004126: 46bd mov sp, r7
- 8004128: bd80 pop {r7, pc}
- 0800412a <_write>:
- __attribute__((weak)) int _write(int file, char *ptr, int len)
- {
- 800412a: b580 push {r7, lr}
- 800412c: b086 sub sp, #24
- 800412e: af00 add r7, sp, #0
- 8004130: 60f8 str r0, [r7, #12]
- 8004132: 60b9 str r1, [r7, #8]
- 8004134: 607a str r2, [r7, #4]
- (void)file;
- int DataIdx;
- for (DataIdx = 0; DataIdx < len; DataIdx++)
- 8004136: 2300 movs r3, #0
- 8004138: 617b str r3, [r7, #20]
- 800413a: e009 b.n 8004150 <_write+0x26>
- {
- __io_putchar(*ptr++);
- 800413c: 68bb ldr r3, [r7, #8]
- 800413e: 1c5a adds r2, r3, #1
- 8004140: 60ba str r2, [r7, #8]
- 8004142: 781b ldrb r3, [r3, #0]
- 8004144: 4618 mov r0, r3
- 8004146: f7fc fab5 bl 80006b4 <__io_putchar>
- for (DataIdx = 0; DataIdx < len; DataIdx++)
- 800414a: 697b ldr r3, [r7, #20]
- 800414c: 3301 adds r3, #1
- 800414e: 617b str r3, [r7, #20]
- 8004150: 697a ldr r2, [r7, #20]
- 8004152: 687b ldr r3, [r7, #4]
- 8004154: 429a cmp r2, r3
- 8004156: dbf1 blt.n 800413c <_write+0x12>
- }
- return len;
- 8004158: 687b ldr r3, [r7, #4]
- }
- 800415a: 4618 mov r0, r3
- 800415c: 3718 adds r7, #24
- 800415e: 46bd mov sp, r7
- 8004160: bd80 pop {r7, pc}
- 08004162 <_close>:
- int _close(int file)
- {
- 8004162: b480 push {r7}
- 8004164: b083 sub sp, #12
- 8004166: af00 add r7, sp, #0
- 8004168: 6078 str r0, [r7, #4]
- (void)file;
- return -1;
- 800416a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- }
- 800416e: 4618 mov r0, r3
- 8004170: 370c adds r7, #12
- 8004172: 46bd mov sp, r7
- 8004174: f85d 7b04 ldr.w r7, [sp], #4
- 8004178: 4770 bx lr
- 0800417a <_fstat>:
- int _fstat(int file, struct stat *st)
- {
- 800417a: b480 push {r7}
- 800417c: b083 sub sp, #12
- 800417e: af00 add r7, sp, #0
- 8004180: 6078 str r0, [r7, #4]
- 8004182: 6039 str r1, [r7, #0]
- (void)file;
- st->st_mode = S_IFCHR;
- 8004184: 683b ldr r3, [r7, #0]
- 8004186: f44f 5200 mov.w r2, #8192 @ 0x2000
- 800418a: 605a str r2, [r3, #4]
- return 0;
- 800418c: 2300 movs r3, #0
- }
- 800418e: 4618 mov r0, r3
- 8004190: 370c adds r7, #12
- 8004192: 46bd mov sp, r7
- 8004194: f85d 7b04 ldr.w r7, [sp], #4
- 8004198: 4770 bx lr
- 0800419a <_isatty>:
- int _isatty(int file)
- {
- 800419a: b480 push {r7}
- 800419c: b083 sub sp, #12
- 800419e: af00 add r7, sp, #0
- 80041a0: 6078 str r0, [r7, #4]
- (void)file;
- return 1;
- 80041a2: 2301 movs r3, #1
- }
- 80041a4: 4618 mov r0, r3
- 80041a6: 370c adds r7, #12
- 80041a8: 46bd mov sp, r7
- 80041aa: f85d 7b04 ldr.w r7, [sp], #4
- 80041ae: 4770 bx lr
- 080041b0 <_lseek>:
- int _lseek(int file, int ptr, int dir)
- {
- 80041b0: b480 push {r7}
- 80041b2: b085 sub sp, #20
- 80041b4: af00 add r7, sp, #0
- 80041b6: 60f8 str r0, [r7, #12]
- 80041b8: 60b9 str r1, [r7, #8]
- 80041ba: 607a str r2, [r7, #4]
- (void)file;
- (void)ptr;
- (void)dir;
- return 0;
- 80041bc: 2300 movs r3, #0
- }
- 80041be: 4618 mov r0, r3
- 80041c0: 3714 adds r7, #20
- 80041c2: 46bd mov sp, r7
- 80041c4: f85d 7b04 ldr.w r7, [sp], #4
- 80041c8: 4770 bx lr
- ...
- 080041cc <_sbrk>:
- *
- * @param incr Memory size
- * @return Pointer to allocated memory
- */
- void *_sbrk(ptrdiff_t incr)
- {
- 80041cc: b580 push {r7, lr}
- 80041ce: b086 sub sp, #24
- 80041d0: af00 add r7, sp, #0
- 80041d2: 6078 str r0, [r7, #4]
- extern uint8_t _end; /* Symbol defined in the linker script */
- extern uint8_t _estack; /* Symbol defined in the linker script */
- extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
- const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
- 80041d4: 4a14 ldr r2, [pc, #80] @ (8004228 <_sbrk+0x5c>)
- 80041d6: 4b15 ldr r3, [pc, #84] @ (800422c <_sbrk+0x60>)
- 80041d8: 1ad3 subs r3, r2, r3
- 80041da: 617b str r3, [r7, #20]
- const uint8_t *max_heap = (uint8_t *)stack_limit;
- 80041dc: 697b ldr r3, [r7, #20]
- 80041de: 613b str r3, [r7, #16]
- uint8_t *prev_heap_end;
- /* Initialize heap end at first call */
- if (NULL == __sbrk_heap_end)
- 80041e0: 4b13 ldr r3, [pc, #76] @ (8004230 <_sbrk+0x64>)
- 80041e2: 681b ldr r3, [r3, #0]
- 80041e4: 2b00 cmp r3, #0
- 80041e6: d102 bne.n 80041ee <_sbrk+0x22>
- {
- __sbrk_heap_end = &_end;
- 80041e8: 4b11 ldr r3, [pc, #68] @ (8004230 <_sbrk+0x64>)
- 80041ea: 4a12 ldr r2, [pc, #72] @ (8004234 <_sbrk+0x68>)
- 80041ec: 601a str r2, [r3, #0]
- }
- /* Protect heap from growing into the reserved MSP stack */
- if (__sbrk_heap_end + incr > max_heap)
- 80041ee: 4b10 ldr r3, [pc, #64] @ (8004230 <_sbrk+0x64>)
- 80041f0: 681a ldr r2, [r3, #0]
- 80041f2: 687b ldr r3, [r7, #4]
- 80041f4: 4413 add r3, r2
- 80041f6: 693a ldr r2, [r7, #16]
- 80041f8: 429a cmp r2, r3
- 80041fa: d207 bcs.n 800420c <_sbrk+0x40>
- {
- errno = ENOMEM;
- 80041fc: f013 fe78 bl 8017ef0 <__errno>
- 8004200: 4603 mov r3, r0
- 8004202: 220c movs r2, #12
- 8004204: 601a str r2, [r3, #0]
- return (void *)-1;
- 8004206: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 800420a: e009 b.n 8004220 <_sbrk+0x54>
- }
- prev_heap_end = __sbrk_heap_end;
- 800420c: 4b08 ldr r3, [pc, #32] @ (8004230 <_sbrk+0x64>)
- 800420e: 681b ldr r3, [r3, #0]
- 8004210: 60fb str r3, [r7, #12]
- __sbrk_heap_end += incr;
- 8004212: 4b07 ldr r3, [pc, #28] @ (8004230 <_sbrk+0x64>)
- 8004214: 681a ldr r2, [r3, #0]
- 8004216: 687b ldr r3, [r7, #4]
- 8004218: 4413 add r3, r2
- 800421a: 4a05 ldr r2, [pc, #20] @ (8004230 <_sbrk+0x64>)
- 800421c: 6013 str r3, [r2, #0]
- return (void *)prev_heap_end;
- 800421e: 68fb ldr r3, [r7, #12]
- }
- 8004220: 4618 mov r0, r3
- 8004222: 3718 adds r7, #24
- 8004224: 46bd mov sp, r7
- 8004226: bd80 pop {r7, pc}
- 8004228: 24060000 .word 0x24060000
- 800422c: 00000400 .word 0x00000400
- 8004230: 24000904 .word 0x24000904
- 8004234: 24012e38 .word 0x24012e38
- 08004238 <SystemInit>:
- * configuration.
- * @param None
- * @retval None
- */
- void SystemInit (void)
- {
- 8004238: b480 push {r7}
- 800423a: af00 add r7, sp, #0
- __IO uint32_t tmpreg;
- #endif /* DATA_IN_D2_SRAM */
- /* FPU settings ------------------------------------------------------------*/
- #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
- 800423c: 4b37 ldr r3, [pc, #220] @ (800431c <SystemInit+0xe4>)
- 800423e: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
- 8004242: 4a36 ldr r2, [pc, #216] @ (800431c <SystemInit+0xe4>)
- 8004244: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000
- 8004248: f8c2 3088 str.w r3, [r2, #136] @ 0x88
- #endif
- /* Reset the RCC clock configuration to the default reset state ------------*/
- /* Increasing the CPU frequency */
- if(FLASH_LATENCY_DEFAULT > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
- 800424c: 4b34 ldr r3, [pc, #208] @ (8004320 <SystemInit+0xe8>)
- 800424e: 681b ldr r3, [r3, #0]
- 8004250: f003 030f and.w r3, r3, #15
- 8004254: 2b06 cmp r3, #6
- 8004256: d807 bhi.n 8004268 <SystemInit+0x30>
- {
- /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
- MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
- 8004258: 4b31 ldr r3, [pc, #196] @ (8004320 <SystemInit+0xe8>)
- 800425a: 681b ldr r3, [r3, #0]
- 800425c: f023 030f bic.w r3, r3, #15
- 8004260: 4a2f ldr r2, [pc, #188] @ (8004320 <SystemInit+0xe8>)
- 8004262: f043 0307 orr.w r3, r3, #7
- 8004266: 6013 str r3, [r2, #0]
- }
- /* Set HSION bit */
- RCC->CR |= RCC_CR_HSION;
- 8004268: 4b2e ldr r3, [pc, #184] @ (8004324 <SystemInit+0xec>)
- 800426a: 681b ldr r3, [r3, #0]
- 800426c: 4a2d ldr r2, [pc, #180] @ (8004324 <SystemInit+0xec>)
- 800426e: f043 0301 orr.w r3, r3, #1
- 8004272: 6013 str r3, [r2, #0]
- /* Reset CFGR register */
- RCC->CFGR = 0x00000000;
- 8004274: 4b2b ldr r3, [pc, #172] @ (8004324 <SystemInit+0xec>)
- 8004276: 2200 movs r2, #0
- 8004278: 611a str r2, [r3, #16]
- /* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */
- RCC->CR &= 0xEAF6ED7FU;
- 800427a: 4b2a ldr r3, [pc, #168] @ (8004324 <SystemInit+0xec>)
- 800427c: 681a ldr r2, [r3, #0]
- 800427e: 4929 ldr r1, [pc, #164] @ (8004324 <SystemInit+0xec>)
- 8004280: 4b29 ldr r3, [pc, #164] @ (8004328 <SystemInit+0xf0>)
- 8004282: 4013 ands r3, r2
- 8004284: 600b str r3, [r1, #0]
- /* Decreasing the number of wait states because of lower CPU frequency */
- if(FLASH_LATENCY_DEFAULT < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
- 8004286: 4b26 ldr r3, [pc, #152] @ (8004320 <SystemInit+0xe8>)
- 8004288: 681b ldr r3, [r3, #0]
- 800428a: f003 0308 and.w r3, r3, #8
- 800428e: 2b00 cmp r3, #0
- 8004290: d007 beq.n 80042a2 <SystemInit+0x6a>
- {
- /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
- MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
- 8004292: 4b23 ldr r3, [pc, #140] @ (8004320 <SystemInit+0xe8>)
- 8004294: 681b ldr r3, [r3, #0]
- 8004296: f023 030f bic.w r3, r3, #15
- 800429a: 4a21 ldr r2, [pc, #132] @ (8004320 <SystemInit+0xe8>)
- 800429c: f043 0307 orr.w r3, r3, #7
- 80042a0: 6013 str r3, [r2, #0]
- }
- #if defined(D3_SRAM_BASE)
- /* Reset D1CFGR register */
- RCC->D1CFGR = 0x00000000;
- 80042a2: 4b20 ldr r3, [pc, #128] @ (8004324 <SystemInit+0xec>)
- 80042a4: 2200 movs r2, #0
- 80042a6: 619a str r2, [r3, #24]
- /* Reset D2CFGR register */
- RCC->D2CFGR = 0x00000000;
- 80042a8: 4b1e ldr r3, [pc, #120] @ (8004324 <SystemInit+0xec>)
- 80042aa: 2200 movs r2, #0
- 80042ac: 61da str r2, [r3, #28]
- /* Reset D3CFGR register */
- RCC->D3CFGR = 0x00000000;
- 80042ae: 4b1d ldr r3, [pc, #116] @ (8004324 <SystemInit+0xec>)
- 80042b0: 2200 movs r2, #0
- 80042b2: 621a str r2, [r3, #32]
- /* Reset SRDCFGR register */
- RCC->SRDCFGR = 0x00000000;
- #endif
- /* Reset PLLCKSELR register */
- RCC->PLLCKSELR = 0x02020200;
- 80042b4: 4b1b ldr r3, [pc, #108] @ (8004324 <SystemInit+0xec>)
- 80042b6: 4a1d ldr r2, [pc, #116] @ (800432c <SystemInit+0xf4>)
- 80042b8: 629a str r2, [r3, #40] @ 0x28
- /* Reset PLLCFGR register */
- RCC->PLLCFGR = 0x01FF0000;
- 80042ba: 4b1a ldr r3, [pc, #104] @ (8004324 <SystemInit+0xec>)
- 80042bc: 4a1c ldr r2, [pc, #112] @ (8004330 <SystemInit+0xf8>)
- 80042be: 62da str r2, [r3, #44] @ 0x2c
- /* Reset PLL1DIVR register */
- RCC->PLL1DIVR = 0x01010280;
- 80042c0: 4b18 ldr r3, [pc, #96] @ (8004324 <SystemInit+0xec>)
- 80042c2: 4a1c ldr r2, [pc, #112] @ (8004334 <SystemInit+0xfc>)
- 80042c4: 631a str r2, [r3, #48] @ 0x30
- /* Reset PLL1FRACR register */
- RCC->PLL1FRACR = 0x00000000;
- 80042c6: 4b17 ldr r3, [pc, #92] @ (8004324 <SystemInit+0xec>)
- 80042c8: 2200 movs r2, #0
- 80042ca: 635a str r2, [r3, #52] @ 0x34
- /* Reset PLL2DIVR register */
- RCC->PLL2DIVR = 0x01010280;
- 80042cc: 4b15 ldr r3, [pc, #84] @ (8004324 <SystemInit+0xec>)
- 80042ce: 4a19 ldr r2, [pc, #100] @ (8004334 <SystemInit+0xfc>)
- 80042d0: 639a str r2, [r3, #56] @ 0x38
- /* Reset PLL2FRACR register */
- RCC->PLL2FRACR = 0x00000000;
- 80042d2: 4b14 ldr r3, [pc, #80] @ (8004324 <SystemInit+0xec>)
- 80042d4: 2200 movs r2, #0
- 80042d6: 63da str r2, [r3, #60] @ 0x3c
- /* Reset PLL3DIVR register */
- RCC->PLL3DIVR = 0x01010280;
- 80042d8: 4b12 ldr r3, [pc, #72] @ (8004324 <SystemInit+0xec>)
- 80042da: 4a16 ldr r2, [pc, #88] @ (8004334 <SystemInit+0xfc>)
- 80042dc: 641a str r2, [r3, #64] @ 0x40
- /* Reset PLL3FRACR register */
- RCC->PLL3FRACR = 0x00000000;
- 80042de: 4b11 ldr r3, [pc, #68] @ (8004324 <SystemInit+0xec>)
- 80042e0: 2200 movs r2, #0
- 80042e2: 645a str r2, [r3, #68] @ 0x44
- /* Reset HSEBYP bit */
- RCC->CR &= 0xFFFBFFFFU;
- 80042e4: 4b0f ldr r3, [pc, #60] @ (8004324 <SystemInit+0xec>)
- 80042e6: 681b ldr r3, [r3, #0]
- 80042e8: 4a0e ldr r2, [pc, #56] @ (8004324 <SystemInit+0xec>)
- 80042ea: f423 2380 bic.w r3, r3, #262144 @ 0x40000
- 80042ee: 6013 str r3, [r2, #0]
- /* Disable all interrupts */
- RCC->CIER = 0x00000000;
- 80042f0: 4b0c ldr r3, [pc, #48] @ (8004324 <SystemInit+0xec>)
- 80042f2: 2200 movs r2, #0
- 80042f4: 661a str r2, [r3, #96] @ 0x60
- #if (STM32H7_DEV_ID == 0x450UL)
- /* dual core CM7 or single core line */
- if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U)
- 80042f6: 4b10 ldr r3, [pc, #64] @ (8004338 <SystemInit+0x100>)
- 80042f8: 681a ldr r2, [r3, #0]
- 80042fa: 4b10 ldr r3, [pc, #64] @ (800433c <SystemInit+0x104>)
- 80042fc: 4013 ands r3, r2
- 80042fe: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 8004302: d202 bcs.n 800430a <SystemInit+0xd2>
- {
- /* if stm32h7 revY*/
- /* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
- *((__IO uint32_t*)0x51008108) = 0x000000001U;
- 8004304: 4b0e ldr r3, [pc, #56] @ (8004340 <SystemInit+0x108>)
- 8004306: 2201 movs r2, #1
- 8004308: 601a str r2, [r3, #0]
- /*
- * Disable the FMC bank1 (enabled after reset).
- * This, prevents CPU speculation access on this bank which blocks the use of FMC during
- * 24us. During this time the others FMC master (such as LTDC) cannot use it!
- */
- FMC_Bank1_R->BTCR[0] = 0x000030D2;
- 800430a: 4b0e ldr r3, [pc, #56] @ (8004344 <SystemInit+0x10c>)
- 800430c: f243 02d2 movw r2, #12498 @ 0x30d2
- 8004310: 601a str r2, [r3, #0]
- #if defined(USER_VECT_TAB_ADDRESS)
- SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */
- #endif /* USER_VECT_TAB_ADDRESS */
- #endif /*DUAL_CORE && CORE_CM4*/
- }
- 8004312: bf00 nop
- 8004314: 46bd mov sp, r7
- 8004316: f85d 7b04 ldr.w r7, [sp], #4
- 800431a: 4770 bx lr
- 800431c: e000ed00 .word 0xe000ed00
- 8004320: 52002000 .word 0x52002000
- 8004324: 58024400 .word 0x58024400
- 8004328: eaf6ed7f .word 0xeaf6ed7f
- 800432c: 02020200 .word 0x02020200
- 8004330: 01ff0000 .word 0x01ff0000
- 8004334: 01010280 .word 0x01010280
- 8004338: 5c001000 .word 0x5c001000
- 800433c: ffff0000 .word 0xffff0000
- 8004340: 51008108 .word 0x51008108
- 8004344: 52004000 .word 0x52004000
- 08004348 <__NVIC_SystemReset>:
- {
- 8004348: b480 push {r7}
- 800434a: af00 add r7, sp, #0
- __ASM volatile ("dsb 0xF":::"memory");
- 800434c: f3bf 8f4f dsb sy
- }
- 8004350: bf00 nop
- (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
- 8004352: 4b06 ldr r3, [pc, #24] @ (800436c <__NVIC_SystemReset+0x24>)
- 8004354: 68db ldr r3, [r3, #12]
- 8004356: f403 62e0 and.w r2, r3, #1792 @ 0x700
- SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- 800435a: 4904 ldr r1, [pc, #16] @ (800436c <__NVIC_SystemReset+0x24>)
- 800435c: 4b04 ldr r3, [pc, #16] @ (8004370 <__NVIC_SystemReset+0x28>)
- 800435e: 4313 orrs r3, r2
- 8004360: 60cb str r3, [r1, #12]
- __ASM volatile ("dsb 0xF":::"memory");
- 8004362: f3bf 8f4f dsb sy
- }
- 8004366: bf00 nop
- __NOP();
- 8004368: bf00 nop
- 800436a: e7fd b.n 8004368 <__NVIC_SystemReset+0x20>
- 800436c: e000ed00 .word 0xe000ed00
- 8004370: 05fa0004 .word 0x05fa0004
- 08004374 <UartTasksInit>:
- uint32_t slaveLastSeen[SLAVES_COUNT] = { 0 };
- extern RNG_HandleTypeDef hrng;
- void UartTasksInit (void) {
- 8004374: b580 push {r7, lr}
- 8004376: af00 add r7, sp, #0
- uart1TaskData.uartRxBuffer = uart1RxBuffer;
- 8004378: 4b13 ldr r3, [pc, #76] @ (80043c8 <UartTasksInit+0x54>)
- 800437a: 4a14 ldr r2, [pc, #80] @ (80043cc <UartTasksInit+0x58>)
- 800437c: 601a str r2, [r3, #0]
- uart1TaskData.uartRxBufferLen = UART1_RX_BUFF_SIZE;
- 800437e: 4b12 ldr r3, [pc, #72] @ (80043c8 <UartTasksInit+0x54>)
- 8004380: f44f 7280 mov.w r2, #256 @ 0x100
- 8004384: 809a strh r2, [r3, #4]
- uart1TaskData.uartTxBuffer = uart1TxBuffer;
- 8004386: 4b10 ldr r3, [pc, #64] @ (80043c8 <UartTasksInit+0x54>)
- 8004388: 4a11 ldr r2, [pc, #68] @ (80043d0 <UartTasksInit+0x5c>)
- 800438a: 609a str r2, [r3, #8]
- uart1TaskData.uartRxBufferLen = UART1_TX_BUFF_SIZE;
- 800438c: 4b0e ldr r3, [pc, #56] @ (80043c8 <UartTasksInit+0x54>)
- 800438e: f44f 7280 mov.w r2, #256 @ 0x100
- 8004392: 809a strh r2, [r3, #4]
- uart1TaskData.frameData = uart1TaskFrameData;
- 8004394: 4b0c ldr r3, [pc, #48] @ (80043c8 <UartTasksInit+0x54>)
- 8004396: 4a0f ldr r2, [pc, #60] @ (80043d4 <UartTasksInit+0x60>)
- 8004398: 611a str r2, [r3, #16]
- uart1TaskData.frameDataLen = UART1_RX_BUFF_SIZE;
- 800439a: 4b0b ldr r3, [pc, #44] @ (80043c8 <UartTasksInit+0x54>)
- 800439c: f44f 7280 mov.w r2, #256 @ 0x100
- 80043a0: 829a strh r2, [r3, #20]
- uart1TaskData.huart = &huart1;
- 80043a2: 4b09 ldr r3, [pc, #36] @ (80043c8 <UartTasksInit+0x54>)
- 80043a4: 4a0c ldr r2, [pc, #48] @ (80043d8 <UartTasksInit+0x64>)
- 80043a6: 631a str r2, [r3, #48] @ 0x30
- uart1TaskData.uartNumber = 1;
- 80043a8: 4b07 ldr r3, [pc, #28] @ (80043c8 <UartTasksInit+0x54>)
- 80043aa: 2201 movs r2, #1
- 80043ac: f883 2034 strb.w r2, [r3, #52] @ 0x34
- uart1TaskData.processDataCb = Uart1ReceivedDataProcessCallback;
- 80043b0: 4b05 ldr r3, [pc, #20] @ (80043c8 <UartTasksInit+0x54>)
- 80043b2: 4a0a ldr r2, [pc, #40] @ (80043dc <UartTasksInit+0x68>)
- 80043b4: 629a str r2, [r3, #40] @ 0x28
- uart1TaskData.processRxDataMsgBuffer = NULL;
- 80043b6: 4b04 ldr r3, [pc, #16] @ (80043c8 <UartTasksInit+0x54>)
- 80043b8: 2200 movs r2, #0
- 80043ba: 625a str r2, [r3, #36] @ 0x24
- UartTaskCreate (&uart1TaskData);
- 80043bc: 4802 ldr r0, [pc, #8] @ (80043c8 <UartTasksInit+0x54>)
- 80043be: f000 f80f bl 80043e0 <UartTaskCreate>
- }
- 80043c2: bf00 nop
- 80043c4: bd80 pop {r7, pc}
- 80043c6: bf00 nop
- 80043c8: 24000c08 .word 0x24000c08
- 80043cc: 24000908 .word 0x24000908
- 80043d0: 24000a08 .word 0x24000a08
- 80043d4: 24000b08 .word 0x24000b08
- 80043d8: 2400066c .word 0x2400066c
- 80043dc: 08004ae5 .word 0x08004ae5
- 080043e0 <UartTaskCreate>:
- void UartTaskCreate (UartTaskData* uartTaskData) {
- 80043e0: b580 push {r7, lr}
- 80043e2: b08c sub sp, #48 @ 0x30
- 80043e4: af00 add r7, sp, #0
- 80043e6: 6078 str r0, [r7, #4]
- osThreadAttr_t osThreadAttrRxUart = { 0 };
- 80043e8: f107 030c add.w r3, r7, #12
- 80043ec: 2224 movs r2, #36 @ 0x24
- 80043ee: 2100 movs r1, #0
- 80043f0: 4618 mov r0, r3
- 80043f2: f013 fcd8 bl 8017da6 <memset>
- osThreadAttrRxUart.stack_size = configMINIMAL_STACK_SIZE * 2;
- 80043f6: f44f 6380 mov.w r3, #1024 @ 0x400
- 80043fa: 623b str r3, [r7, #32]
- osThreadAttrRxUart.priority = (osPriority_t)osPriorityHigh;
- 80043fc: 2328 movs r3, #40 @ 0x28
- 80043fe: 627b str r3, [r7, #36] @ 0x24
- uartTaskData->uartRecieveTaskHandle = osThreadNew (UartRxTask, uartTaskData, &osThreadAttrRxUart);
- 8004400: f107 030c add.w r3, r7, #12
- 8004404: 461a mov r2, r3
- 8004406: 6879 ldr r1, [r7, #4]
- 8004408: 4804 ldr r0, [pc, #16] @ (800441c <UartTaskCreate+0x3c>)
- 800440a: f00f fa5d bl 80138c8 <osThreadNew>
- 800440e: 4602 mov r2, r0
- 8004410: 687b ldr r3, [r7, #4]
- 8004412: 619a str r2, [r3, #24]
- }
- 8004414: bf00 nop
- 8004416: 3730 adds r7, #48 @ 0x30
- 8004418: 46bd mov sp, r7
- 800441a: bd80 pop {r7, pc}
- 800441c: 08004535 .word 0x08004535
- 08004420 <HAL_UART_RxCpltCallback>:
- uart8TaskData.huart = &huart8;
- uart8TaskData.uartNumber = 8;
- uart8TaskData.uartRecieveTaskHandle = osThreadNew (UartRxTask, &uart8TaskData, &osThreadAttrRxUart);
- }
- void HAL_UART_RxCpltCallback (UART_HandleTypeDef* huart) {
- 8004420: b480 push {r7}
- 8004422: b083 sub sp, #12
- 8004424: af00 add r7, sp, #0
- 8004426: 6078 str r0, [r7, #4]
- }
- 8004428: bf00 nop
- 800442a: 370c adds r7, #12
- 800442c: 46bd mov sp, r7
- 800442e: f85d 7b04 ldr.w r7, [sp], #4
- 8004432: 4770 bx lr
- 08004434 <HAL_UARTEx_RxEventCallback>:
- void HAL_UARTEx_RxEventCallback (UART_HandleTypeDef* huart, uint16_t Size) {
- 8004434: b580 push {r7, lr}
- 8004436: b082 sub sp, #8
- 8004438: af00 add r7, sp, #0
- 800443a: 6078 str r0, [r7, #4]
- 800443c: 460b mov r3, r1
- 800443e: 807b strh r3, [r7, #2]
- if (huart->Instance == USART1) {
- 8004440: 687b ldr r3, [r7, #4]
- 8004442: 681b ldr r3, [r3, #0]
- 8004444: 4a0c ldr r2, [pc, #48] @ (8004478 <HAL_UARTEx_RxEventCallback+0x44>)
- 8004446: 4293 cmp r3, r2
- 8004448: d106 bne.n 8004458 <HAL_UARTEx_RxEventCallback+0x24>
- HandleUartRxCallback (&uart1TaskData, huart, Size);
- 800444a: 887b ldrh r3, [r7, #2]
- 800444c: 461a mov r2, r3
- 800444e: 6879 ldr r1, [r7, #4]
- 8004450: 480a ldr r0, [pc, #40] @ (800447c <HAL_UARTEx_RxEventCallback+0x48>)
- 8004452: f000 f823 bl 800449c <HandleUartRxCallback>
- } else if (huart->Instance == UART8) {
- HandleUartRxCallback (&uart8TaskData, huart, Size);
- }
- }
- 8004456: e00a b.n 800446e <HAL_UARTEx_RxEventCallback+0x3a>
- } else if (huart->Instance == UART8) {
- 8004458: 687b ldr r3, [r7, #4]
- 800445a: 681b ldr r3, [r3, #0]
- 800445c: 4a08 ldr r2, [pc, #32] @ (8004480 <HAL_UARTEx_RxEventCallback+0x4c>)
- 800445e: 4293 cmp r3, r2
- 8004460: d105 bne.n 800446e <HAL_UARTEx_RxEventCallback+0x3a>
- HandleUartRxCallback (&uart8TaskData, huart, Size);
- 8004462: 887b ldrh r3, [r7, #2]
- 8004464: 461a mov r2, r3
- 8004466: 6879 ldr r1, [r7, #4]
- 8004468: 4806 ldr r0, [pc, #24] @ (8004484 <HAL_UARTEx_RxEventCallback+0x50>)
- 800446a: f000 f817 bl 800449c <HandleUartRxCallback>
- }
- 800446e: bf00 nop
- 8004470: 3708 adds r7, #8
- 8004472: 46bd mov sp, r7
- 8004474: bd80 pop {r7, pc}
- 8004476: bf00 nop
- 8004478: 40011000 .word 0x40011000
- 800447c: 24000c08 .word 0x24000c08
- 8004480: 40007c00 .word 0x40007c00
- 8004484: 24000c40 .word 0x24000c40
- 08004488 <HAL_UART_TxCpltCallback>:
- void HAL_UART_TxCpltCallback (UART_HandleTypeDef* huart) {
- 8004488: b480 push {r7}
- 800448a: b083 sub sp, #12
- 800448c: af00 add r7, sp, #0
- 800448e: 6078 str r0, [r7, #4]
- if (huart->Instance == UART8) {
- }
- }
- 8004490: bf00 nop
- 8004492: 370c adds r7, #12
- 8004494: 46bd mov sp, r7
- 8004496: f85d 7b04 ldr.w r7, [sp], #4
- 800449a: 4770 bx lr
- 0800449c <HandleUartRxCallback>:
- void HandleUartRxCallback (UartTaskData* uartTaskData, UART_HandleTypeDef* huart, uint16_t Size) {
- 800449c: b580 push {r7, lr}
- 800449e: b088 sub sp, #32
- 80044a0: af02 add r7, sp, #8
- 80044a2: 60f8 str r0, [r7, #12]
- 80044a4: 60b9 str r1, [r7, #8]
- 80044a6: 4613 mov r3, r2
- 80044a8: 80fb strh r3, [r7, #6]
- BaseType_t pxHigherPriorityTaskWoken = pdFALSE;
- 80044aa: 2300 movs r3, #0
- 80044ac: 617b str r3, [r7, #20]
- osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
- 80044ae: 68fb ldr r3, [r7, #12]
- 80044b0: 6a1b ldr r3, [r3, #32]
- 80044b2: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 80044b6: 4618 mov r0, r3
- 80044b8: f00f fc31 bl 8013d1e <osMutexAcquire>
- memcpy (&(uartTaskData->frameData[uartTaskData->frameBytesCount]), uartTaskData->uartRxBuffer, Size);
- 80044bc: 68fb ldr r3, [r7, #12]
- 80044be: 691b ldr r3, [r3, #16]
- 80044c0: 68fa ldr r2, [r7, #12]
- 80044c2: 8ad2 ldrh r2, [r2, #22]
- 80044c4: 1898 adds r0, r3, r2
- 80044c6: 68fb ldr r3, [r7, #12]
- 80044c8: 681b ldr r3, [r3, #0]
- 80044ca: 88fa ldrh r2, [r7, #6]
- 80044cc: 4619 mov r1, r3
- 80044ce: f013 fd3c bl 8017f4a <memcpy>
- uartTaskData->frameBytesCount += Size;
- 80044d2: 68fb ldr r3, [r7, #12]
- 80044d4: 8ada ldrh r2, [r3, #22]
- 80044d6: 88fb ldrh r3, [r7, #6]
- 80044d8: 4413 add r3, r2
- 80044da: b29a uxth r2, r3
- 80044dc: 68fb ldr r3, [r7, #12]
- 80044de: 82da strh r2, [r3, #22]
- osMutexRelease (uartTaskData->rxDataBufferMutex);
- 80044e0: 68fb ldr r3, [r7, #12]
- 80044e2: 6a1b ldr r3, [r3, #32]
- 80044e4: 4618 mov r0, r3
- 80044e6: f00f fc65 bl 8013db4 <osMutexRelease>
- xTaskNotifyFromISR (uartTaskData->uartRecieveTaskHandle, Size, eSetValueWithOverwrite, &pxHigherPriorityTaskWoken);
- 80044ea: 68fb ldr r3, [r7, #12]
- 80044ec: 6998 ldr r0, [r3, #24]
- 80044ee: 88f9 ldrh r1, [r7, #6]
- 80044f0: f107 0314 add.w r3, r7, #20
- 80044f4: 9300 str r3, [sp, #0]
- 80044f6: 2300 movs r3, #0
- 80044f8: 2203 movs r2, #3
- 80044fa: f012 f955 bl 80167a8 <xTaskGenericNotifyFromISR>
- HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
- 80044fe: 68fb ldr r3, [r7, #12]
- 8004500: 6b18 ldr r0, [r3, #48] @ 0x30
- 8004502: 68fb ldr r3, [r7, #12]
- 8004504: 6819 ldr r1, [r3, #0]
- 8004506: 68fb ldr r3, [r7, #12]
- 8004508: 889b ldrh r3, [r3, #4]
- 800450a: 461a mov r2, r3
- 800450c: f00f f8af bl 801366e <HAL_UARTEx_ReceiveToIdle_IT>
- portEND_SWITCHING_ISR (pxHigherPriorityTaskWoken);
- 8004510: 697b ldr r3, [r7, #20]
- 8004512: 2b00 cmp r3, #0
- 8004514: d007 beq.n 8004526 <HandleUartRxCallback+0x8a>
- 8004516: 4b06 ldr r3, [pc, #24] @ (8004530 <HandleUartRxCallback+0x94>)
- 8004518: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 800451c: 601a str r2, [r3, #0]
- 800451e: f3bf 8f4f dsb sy
- 8004522: f3bf 8f6f isb sy
- }
- 8004526: bf00 nop
- 8004528: 3718 adds r7, #24
- 800452a: 46bd mov sp, r7
- 800452c: bd80 pop {r7, pc}
- 800452e: bf00 nop
- 8004530: e000ed04 .word 0xe000ed04
- 08004534 <UartRxTask>:
- void UartRxTask (void* argument) {
- 8004534: b580 push {r7, lr}
- 8004536: b0d2 sub sp, #328 @ 0x148
- 8004538: af02 add r7, sp, #8
- 800453a: f507 73a0 add.w r3, r7, #320 @ 0x140
- 800453e: f5a3 739e sub.w r3, r3, #316 @ 0x13c
- 8004542: 6018 str r0, [r3, #0]
- UartTaskData* uartTaskData = (UartTaskData*)argument;
- 8004544: f507 73a0 add.w r3, r7, #320 @ 0x140
- 8004548: f5a3 739e sub.w r3, r3, #316 @ 0x13c
- 800454c: 681b ldr r3, [r3, #0]
- 800454e: f8c7 312c str.w r3, [r7, #300] @ 0x12c
- SerialProtocolFrameData spFrameData = { 0 };
- 8004552: f507 73a0 add.w r3, r7, #320 @ 0x140
- 8004556: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 800455a: 4618 mov r0, r3
- 800455c: f44f 7386 mov.w r3, #268 @ 0x10c
- 8004560: 461a mov r2, r3
- 8004562: 2100 movs r1, #0
- 8004564: f013 fc1f bl 8017da6 <memset>
- uint32_t bytesRec = 0;
- 8004568: f507 73a0 add.w r3, r7, #320 @ 0x140
- 800456c: f5a3 739a sub.w r3, r3, #308 @ 0x134
- 8004570: 2200 movs r2, #0
- 8004572: 601a str r2, [r3, #0]
- uint32_t crc = 0;
- 8004574: 2300 movs r3, #0
- 8004576: f8c7 3128 str.w r3, [r7, #296] @ 0x128
- uint16_t frameCommandRaw = 0x0000;
- 800457a: 2300 movs r3, #0
- 800457c: f8a7 3126 strh.w r3, [r7, #294] @ 0x126
- uint16_t frameBytesCount = 0;
- 8004580: 2300 movs r3, #0
- 8004582: f8a7 3124 strh.w r3, [r7, #292] @ 0x124
- uint16_t frameCrc = 0;
- 8004586: 2300 movs r3, #0
- 8004588: f8a7 3122 strh.w r3, [r7, #290] @ 0x122
- uint16_t frameTotalLength = 0;
- 800458c: 2300 movs r3, #0
- 800458e: f8a7 313e strh.w r3, [r7, #318] @ 0x13e
- uint16_t dataToSend = 0;
- 8004592: 2300 movs r3, #0
- 8004594: f8a7 313c strh.w r3, [r7, #316] @ 0x13c
- portBASE_TYPE crcPass = pdFAIL;
- 8004598: 2300 movs r3, #0
- 800459a: f8c7 3138 str.w r3, [r7, #312] @ 0x138
- portBASE_TYPE proceed = pdFALSE;
- 800459e: 2300 movs r3, #0
- 80045a0: f8c7 3134 str.w r3, [r7, #308] @ 0x134
- portBASE_TYPE frameTimeout = pdFAIL;
- 80045a4: 2300 movs r3, #0
- 80045a6: f8c7 311c str.w r3, [r7, #284] @ 0x11c
- enum SerialReceiverStates receverState = srWaitForHeader;
- 80045aa: 2300 movs r3, #0
- 80045ac: f887 3133 strb.w r3, [r7, #307] @ 0x133
- uartTaskData->rxDataBufferMutex = osMutexNew (NULL);
- 80045b0: 2000 movs r0, #0
- 80045b2: f00f fb2e bl 8013c12 <osMutexNew>
- 80045b6: 4602 mov r2, r0
- 80045b8: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80045bc: 621a str r2, [r3, #32]
- HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
- 80045be: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80045c2: 6b18 ldr r0, [r3, #48] @ 0x30
- 80045c4: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80045c8: 6819 ldr r1, [r3, #0]
- 80045ca: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80045ce: 889b ldrh r3, [r3, #4]
- 80045d0: 461a mov r2, r3
- 80045d2: f00f f84c bl 801366e <HAL_UARTEx_ReceiveToIdle_IT>
- while (pdTRUE) {
- frameTimeout = !(xTaskNotifyWait (0, 0, &bytesRec, pdMS_TO_TICKS (FRAME_TIMEOUT_MS)));
- 80045d6: f107 020c add.w r2, r7, #12
- 80045da: f44f 63fa mov.w r3, #2000 @ 0x7d0
- 80045de: 2100 movs r1, #0
- 80045e0: 2000 movs r0, #0
- 80045e2: f011 ffbf bl 8016564 <xTaskNotifyWait>
- 80045e6: 4603 mov r3, r0
- 80045e8: 2b00 cmp r3, #0
- 80045ea: bf0c ite eq
- 80045ec: 2301 moveq r3, #1
- 80045ee: 2300 movne r3, #0
- 80045f0: b2db uxtb r3, r3
- 80045f2: f8c7 311c str.w r3, [r7, #284] @ 0x11c
- osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
- 80045f6: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80045fa: 6a1b ldr r3, [r3, #32]
- 80045fc: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8004600: 4618 mov r0, r3
- 8004602: f00f fb8c bl 8013d1e <osMutexAcquire>
- frameBytesCount = uartTaskData->frameBytesCount;
- 8004606: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 800460a: 8adb ldrh r3, [r3, #22]
- 800460c: f8a7 3124 strh.w r3, [r7, #292] @ 0x124
- osMutexRelease (uartTaskData->rxDataBufferMutex);
- 8004610: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004614: 6a1b ldr r3, [r3, #32]
- 8004616: 4618 mov r0, r3
- 8004618: f00f fbcc bl 8013db4 <osMutexRelease>
- if ((frameTimeout == pdTRUE) && (frameBytesCount > 0)) {
- 800461c: f8d7 311c ldr.w r3, [r7, #284] @ 0x11c
- 8004620: 2b01 cmp r3, #1
- 8004622: d10a bne.n 800463a <UartRxTask+0x106>
- 8004624: f8b7 3124 ldrh.w r3, [r7, #292] @ 0x124
- 8004628: 2b00 cmp r3, #0
- 800462a: d006 beq.n 800463a <UartRxTask+0x106>
- receverState = srFail;
- 800462c: 2304 movs r3, #4
- 800462e: f887 3133 strb.w r3, [r7, #307] @ 0x133
- proceed = pdTRUE;
- 8004632: 2301 movs r3, #1
- 8004634: f8c7 3134 str.w r3, [r7, #308] @ 0x134
- 8004638: e029 b.n 800468e <UartRxTask+0x15a>
- } else {
- if (frameTimeout == pdFALSE) {
- 800463a: f8d7 311c ldr.w r3, [r7, #284] @ 0x11c
- 800463e: 2b00 cmp r3, #0
- 8004640: d111 bne.n 8004666 <UartRxTask+0x132>
- proceed = pdTRUE;
- 8004642: 2301 movs r3, #1
- 8004644: f8c7 3134 str.w r3, [r7, #308] @ 0x134
- printf ("Uart%d: RX bytes received: %ld\n", uartTaskData->uartNumber, bytesRec);
- 8004648: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 800464c: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
- 8004650: 4619 mov r1, r3
- 8004652: f507 73a0 add.w r3, r7, #320 @ 0x140
- 8004656: f5a3 739a sub.w r3, r3, #308 @ 0x134
- 800465a: 681b ldr r3, [r3, #0]
- 800465c: 461a mov r2, r3
- 800465e: 48c1 ldr r0, [pc, #772] @ (8004964 <UartRxTask+0x430>)
- 8004660: f013 fb4c bl 8017cfc <iprintf>
- 8004664: e22f b.n 8004ac6 <UartRxTask+0x592>
- } else {
- if (uartTaskData->huart->RxState == HAL_UART_STATE_READY) {
- 8004666: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 800466a: 6b1b ldr r3, [r3, #48] @ 0x30
- 800466c: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
- 8004670: 2b20 cmp r3, #32
- 8004672: f040 8228 bne.w 8004ac6 <UartRxTask+0x592>
- HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
- 8004676: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 800467a: 6b18 ldr r0, [r3, #48] @ 0x30
- 800467c: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004680: 6819 ldr r1, [r3, #0]
- 8004682: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004686: 889b ldrh r3, [r3, #4]
- 8004688: 461a mov r2, r3
- 800468a: f00e fff0 bl 801366e <HAL_UARTEx_ReceiveToIdle_IT>
- }
- }
- }
- while (proceed) {
- 800468e: e21a b.n 8004ac6 <UartRxTask+0x592>
- switch (receverState) {
- 8004690: f897 3133 ldrb.w r3, [r7, #307] @ 0x133
- 8004694: 2b04 cmp r3, #4
- 8004696: f200 81f1 bhi.w 8004a7c <UartRxTask+0x548>
- 800469a: a201 add r2, pc, #4 @ (adr r2, 80046a0 <UartRxTask+0x16c>)
- 800469c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 80046a0: 080046b5 .word 0x080046b5
- 80046a4: 08004817 .word 0x08004817
- 80046a8: 080047fb .word 0x080047fb
- 80046ac: 080048b7 .word 0x080048b7
- 80046b0: 08004971 .word 0x08004971
- case srWaitForHeader:
- osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
- 80046b4: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80046b8: 6a1b ldr r3, [r3, #32]
- 80046ba: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 80046be: 4618 mov r0, r3
- 80046c0: f00f fb2d bl 8013d1e <osMutexAcquire>
- if (uartTaskData->frameData[0] == FRAME_INDICATOR) {
- 80046c4: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80046c8: 691b ldr r3, [r3, #16]
- 80046ca: 781b ldrb r3, [r3, #0]
- 80046cc: 2baa cmp r3, #170 @ 0xaa
- 80046ce: f040 8082 bne.w 80047d6 <UartRxTask+0x2a2>
- if (frameBytesCount > FRAME_ID_LENGTH) {
- 80046d2: f8b7 3124 ldrh.w r3, [r7, #292] @ 0x124
- 80046d6: 2b02 cmp r3, #2
- 80046d8: d914 bls.n 8004704 <UartRxTask+0x1d0>
- spFrameData.frameHeader.frameId =
- CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH - FRAME_ID_LENGTH - FRAME_COMMAND_LENGTH]));
- 80046da: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80046de: 691b ldr r3, [r3, #16]
- 80046e0: 3302 adds r3, #2
- 80046e2: 781b ldrb r3, [r3, #0]
- 80046e4: 021b lsls r3, r3, #8
- 80046e6: b21a sxth r2, r3
- 80046e8: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80046ec: 691b ldr r3, [r3, #16]
- 80046ee: 3301 adds r3, #1
- 80046f0: 781b ldrb r3, [r3, #0]
- 80046f2: b21b sxth r3, r3
- 80046f4: 4313 orrs r3, r2
- 80046f6: b21b sxth r3, r3
- 80046f8: b29a uxth r2, r3
- spFrameData.frameHeader.frameId =
- 80046fa: f507 73a0 add.w r3, r7, #320 @ 0x140
- 80046fe: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 8004702: 801a strh r2, [r3, #0]
- }
- if (frameBytesCount > FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH) {
- 8004704: f8b7 3124 ldrh.w r3, [r7, #292] @ 0x124
- 8004708: 2b04 cmp r3, #4
- 800470a: d923 bls.n 8004754 <UartRxTask+0x220>
- frameCommandRaw = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH - FRAME_COMMAND_LENGTH]));
- 800470c: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004710: 691b ldr r3, [r3, #16]
- 8004712: 3304 adds r3, #4
- 8004714: 781b ldrb r3, [r3, #0]
- 8004716: 021b lsls r3, r3, #8
- 8004718: b21a sxth r2, r3
- 800471a: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 800471e: 691b ldr r3, [r3, #16]
- 8004720: 3303 adds r3, #3
- 8004722: 781b ldrb r3, [r3, #0]
- 8004724: b21b sxth r3, r3
- 8004726: 4313 orrs r3, r2
- 8004728: b21b sxth r3, r3
- 800472a: f8a7 3126 strh.w r3, [r7, #294] @ 0x126
- spFrameData.frameHeader.frameCommand = (SerialProtocolCommands)(frameCommandRaw & 0x7FFF);
- 800472e: f8b7 3126 ldrh.w r3, [r7, #294] @ 0x126
- 8004732: b2da uxtb r2, r3
- 8004734: f507 73a0 add.w r3, r7, #320 @ 0x140
- 8004738: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 800473c: 709a strb r2, [r3, #2]
- spFrameData.frameHeader.isResponseFrame = (frameCommandRaw & 0x8000) != 0 ? pdTRUE : pdFALSE;
- 800473e: f9b7 3126 ldrsh.w r3, [r7, #294] @ 0x126
- 8004742: 13db asrs r3, r3, #15
- 8004744: b21b sxth r3, r3
- 8004746: f003 0201 and.w r2, r3, #1
- 800474a: f507 73a0 add.w r3, r7, #320 @ 0x140
- 800474e: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 8004752: 609a str r2, [r3, #8]
- }
- if ((frameBytesCount > FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH + FRAME_RESP_STAT_LENGTH) && ((spFrameData.frameHeader.frameCommand & 0x8000) != 0)) {
- 8004754: f8b7 3124 ldrh.w r3, [r7, #292] @ 0x124
- 8004758: 2b05 cmp r3, #5
- 800475a: d913 bls.n 8004784 <UartRxTask+0x250>
- 800475c: f507 73a0 add.w r3, r7, #320 @ 0x140
- 8004760: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 8004764: 789b ldrb r3, [r3, #2]
- 8004766: f403 4300 and.w r3, r3, #32768 @ 0x8000
- 800476a: 2b00 cmp r3, #0
- 800476c: d00a beq.n 8004784 <UartRxTask+0x250>
- spFrameData.frameHeader.respStatus = (SerialProtocolRespStatus)(uartTaskData->frameData[FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH + FRAME_RESP_STAT_LENGTH]);
- 800476e: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004772: 691b ldr r3, [r3, #16]
- 8004774: 3305 adds r3, #5
- 8004776: 781b ldrb r3, [r3, #0]
- 8004778: b25a sxtb r2, r3
- 800477a: f507 73a0 add.w r3, r7, #320 @ 0x140
- 800477e: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 8004782: 70da strb r2, [r3, #3]
- }
- if (frameBytesCount >= FRAME_HEADER_LENGTH) {
- 8004784: f8b7 3124 ldrh.w r3, [r7, #292] @ 0x124
- 8004788: 2b07 cmp r3, #7
- 800478a: d920 bls.n 80047ce <UartRxTask+0x29a>
- spFrameData.frameHeader.frameDataLength = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH]));
- 800478c: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004790: 691b ldr r3, [r3, #16]
- 8004792: 3306 adds r3, #6
- 8004794: 781b ldrb r3, [r3, #0]
- 8004796: 021b lsls r3, r3, #8
- 8004798: b21a sxth r2, r3
- 800479a: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 800479e: 691b ldr r3, [r3, #16]
- 80047a0: 3305 adds r3, #5
- 80047a2: 781b ldrb r3, [r3, #0]
- 80047a4: b21b sxth r3, r3
- 80047a6: 4313 orrs r3, r2
- 80047a8: b21b sxth r3, r3
- 80047aa: b29a uxth r2, r3
- 80047ac: f507 73a0 add.w r3, r7, #320 @ 0x140
- 80047b0: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 80047b4: 809a strh r2, [r3, #4]
- frameTotalLength = FRAME_HEADER_LENGTH + spFrameData.frameHeader.frameDataLength + FRAME_CRC_LENGTH;
- 80047b6: f507 73a0 add.w r3, r7, #320 @ 0x140
- 80047ba: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 80047be: 889b ldrh r3, [r3, #4]
- 80047c0: 330a adds r3, #10
- 80047c2: f8a7 313e strh.w r3, [r7, #318] @ 0x13e
- receverState = srRecieveData;
- 80047c6: 2302 movs r3, #2
- 80047c8: f887 3133 strb.w r3, [r7, #307] @ 0x133
- 80047cc: e00e b.n 80047ec <UartRxTask+0x2b8>
- } else {
- proceed = pdFALSE;
- 80047ce: 2300 movs r3, #0
- 80047d0: f8c7 3134 str.w r3, [r7, #308] @ 0x134
- 80047d4: e00a b.n 80047ec <UartRxTask+0x2b8>
- }
- } else {
- if (frameBytesCount > 0) {
- 80047d6: f8b7 3124 ldrh.w r3, [r7, #292] @ 0x124
- 80047da: 2b00 cmp r3, #0
- 80047dc: d003 beq.n 80047e6 <UartRxTask+0x2b2>
- receverState = srFail;
- 80047de: 2304 movs r3, #4
- 80047e0: f887 3133 strb.w r3, [r7, #307] @ 0x133
- 80047e4: e002 b.n 80047ec <UartRxTask+0x2b8>
- } else {
- proceed = pdFALSE;
- 80047e6: 2300 movs r3, #0
- 80047e8: f8c7 3134 str.w r3, [r7, #308] @ 0x134
- }
- }
- osMutexRelease (uartTaskData->rxDataBufferMutex);
- 80047ec: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80047f0: 6a1b ldr r3, [r3, #32]
- 80047f2: 4618 mov r0, r3
- 80047f4: f00f fade bl 8013db4 <osMutexRelease>
- break;
- 80047f8: e165 b.n 8004ac6 <UartRxTask+0x592>
- case srRecieveData:
- if (frameBytesCount >= frameTotalLength) {
- 80047fa: f8b7 2124 ldrh.w r2, [r7, #292] @ 0x124
- 80047fe: f8b7 313e ldrh.w r3, [r7, #318] @ 0x13e
- 8004802: 429a cmp r2, r3
- 8004804: d303 bcc.n 800480e <UartRxTask+0x2da>
- receverState = srCheckCrc;
- 8004806: 2301 movs r3, #1
- 8004808: f887 3133 strb.w r3, [r7, #307] @ 0x133
- } else {
- proceed = pdFALSE;
- }
- break;
- 800480c: e15b b.n 8004ac6 <UartRxTask+0x592>
- proceed = pdFALSE;
- 800480e: 2300 movs r3, #0
- 8004810: f8c7 3134 str.w r3, [r7, #308] @ 0x134
- break;
- 8004814: e157 b.n 8004ac6 <UartRxTask+0x592>
- case srCheckCrc:
- osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
- 8004816: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 800481a: 6a1b ldr r3, [r3, #32]
- 800481c: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8004820: 4618 mov r0, r3
- 8004822: f00f fa7c bl 8013d1e <osMutexAcquire>
- frameCrc = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[frameTotalLength - FRAME_CRC_LENGTH]));
- 8004826: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 800482a: 691a ldr r2, [r3, #16]
- 800482c: f8b7 313e ldrh.w r3, [r7, #318] @ 0x13e
- 8004830: 3b01 subs r3, #1
- 8004832: 4413 add r3, r2
- 8004834: 781b ldrb r3, [r3, #0]
- 8004836: 021b lsls r3, r3, #8
- 8004838: b21a sxth r2, r3
- 800483a: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 800483e: 6919 ldr r1, [r3, #16]
- 8004840: f8b7 313e ldrh.w r3, [r7, #318] @ 0x13e
- 8004844: 3b02 subs r3, #2
- 8004846: 440b add r3, r1
- 8004848: 781b ldrb r3, [r3, #0]
- 800484a: b21b sxth r3, r3
- 800484c: 4313 orrs r3, r2
- 800484e: b21b sxth r3, r3
- 8004850: f8a7 3122 strh.w r3, [r7, #290] @ 0x122
- crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)(uartTaskData->frameData), frameTotalLength - FRAME_CRC_LENGTH);
- 8004854: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004858: 6919 ldr r1, [r3, #16]
- 800485a: f8b7 313e ldrh.w r3, [r7, #318] @ 0x13e
- 800485e: 3b02 subs r3, #2
- 8004860: 461a mov r2, r3
- 8004862: 4841 ldr r0, [pc, #260] @ (8004968 <UartRxTask+0x434>)
- 8004864: f002 fe2a bl 80074bc <HAL_CRC_Calculate>
- 8004868: f8c7 0128 str.w r0, [r7, #296] @ 0x128
- osMutexRelease (uartTaskData->rxDataBufferMutex);
- 800486c: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004870: 6a1b ldr r3, [r3, #32]
- 8004872: 4618 mov r0, r3
- 8004874: f00f fa9e bl 8013db4 <osMutexRelease>
- crcPass = frameCrc == crc;
- 8004878: f8b7 3122 ldrh.w r3, [r7, #290] @ 0x122
- 800487c: f8d7 2128 ldr.w r2, [r7, #296] @ 0x128
- 8004880: 429a cmp r2, r3
- 8004882: bf0c ite eq
- 8004884: 2301 moveq r3, #1
- 8004886: 2300 movne r3, #0
- 8004888: b2db uxtb r3, r3
- 800488a: f8c7 3138 str.w r3, [r7, #312] @ 0x138
- if (crcPass) {
- 800488e: f8d7 3138 ldr.w r3, [r7, #312] @ 0x138
- 8004892: 2b00 cmp r3, #0
- 8004894: d00b beq.n 80048ae <UartRxTask+0x37a>
- printf ("Uart%d: Frame CRC PASS\n", uartTaskData->uartNumber);
- 8004896: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 800489a: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
- 800489e: 4619 mov r1, r3
- 80048a0: 4832 ldr r0, [pc, #200] @ (800496c <UartRxTask+0x438>)
- 80048a2: f013 fa2b bl 8017cfc <iprintf>
- receverState = srExecuteCmd;
- 80048a6: 2303 movs r3, #3
- 80048a8: f887 3133 strb.w r3, [r7, #307] @ 0x133
- } else {
- receverState = srFail;
- }
- break;
- 80048ac: e10b b.n 8004ac6 <UartRxTask+0x592>
- receverState = srFail;
- 80048ae: 2304 movs r3, #4
- 80048b0: f887 3133 strb.w r3, [r7, #307] @ 0x133
- break;
- 80048b4: e107 b.n 8004ac6 <UartRxTask+0x592>
- case srExecuteCmd:
- if ((uartTaskData->processDataCb != NULL) || (uartTaskData->processRxDataMsgBuffer != NULL)) {
- 80048b6: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80048ba: 6a9b ldr r3, [r3, #40] @ 0x28
- 80048bc: 2b00 cmp r3, #0
- 80048be: d104 bne.n 80048ca <UartRxTask+0x396>
- 80048c0: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80048c4: 6a5b ldr r3, [r3, #36] @ 0x24
- 80048c6: 2b00 cmp r3, #0
- 80048c8: d01e beq.n 8004908 <UartRxTask+0x3d4>
- osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
- 80048ca: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80048ce: 6a1b ldr r3, [r3, #32]
- 80048d0: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 80048d4: 4618 mov r0, r3
- 80048d6: f00f fa22 bl 8013d1e <osMutexAcquire>
- memcpy (spFrameData.dataBuffer, &(uartTaskData->frameData[FRAME_HEADER_LENGTH]), spFrameData.frameHeader.frameDataLength);
- 80048da: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80048de: 691b ldr r3, [r3, #16]
- 80048e0: f103 0108 add.w r1, r3, #8
- 80048e4: f507 73a0 add.w r3, r7, #320 @ 0x140
- 80048e8: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 80048ec: 889b ldrh r3, [r3, #4]
- 80048ee: 461a mov r2, r3
- 80048f0: f107 0310 add.w r3, r7, #16
- 80048f4: 330c adds r3, #12
- 80048f6: 4618 mov r0, r3
- 80048f8: f013 fb27 bl 8017f4a <memcpy>
- osMutexRelease (uartTaskData->rxDataBufferMutex);
- 80048fc: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004900: 6a1b ldr r3, [r3, #32]
- 8004902: 4618 mov r0, r3
- 8004904: f00f fa56 bl 8013db4 <osMutexRelease>
- }
- if (uartTaskData->processRxDataMsgBuffer != NULL) {
- 8004908: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 800490c: 6a5b ldr r3, [r3, #36] @ 0x24
- 800490e: 2b00 cmp r3, #0
- 8004910: d015 beq.n 800493e <UartRxTask+0x40a>
- if (xMessageBufferSend (uartTaskData->processRxDataMsgBuffer, &spFrameData, sizeof (SerialProtocolFrameHeader) + spFrameData.frameHeader.frameDataLength, pdMS_TO_TICKS (200)) == pdFALSE) {
- 8004912: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004916: 6a58 ldr r0, [r3, #36] @ 0x24
- 8004918: f507 73a0 add.w r3, r7, #320 @ 0x140
- 800491c: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 8004920: 889b ldrh r3, [r3, #4]
- 8004922: f103 020c add.w r2, r3, #12
- 8004926: f107 0110 add.w r1, r7, #16
- 800492a: 23c8 movs r3, #200 @ 0xc8
- 800492c: f010 fc64 bl 80151f8 <xStreamBufferSend>
- 8004930: 4603 mov r3, r0
- 8004932: 2b00 cmp r3, #0
- 8004934: d103 bne.n 800493e <UartRxTask+0x40a>
- receverState = srFail;
- 8004936: 2304 movs r3, #4
- 8004938: f887 3133 strb.w r3, [r7, #307] @ 0x133
- break;
- 800493c: e0c3 b.n 8004ac6 <UartRxTask+0x592>
- }
- }
- if (uartTaskData->processDataCb != NULL) {
- 800493e: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004942: 6a9b ldr r3, [r3, #40] @ 0x28
- 8004944: 2b00 cmp r3, #0
- 8004946: d008 beq.n 800495a <UartRxTask+0x426>
- uartTaskData->processDataCb (uartTaskData, &spFrameData);
- 8004948: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 800494c: 6a9b ldr r3, [r3, #40] @ 0x28
- 800494e: f107 0210 add.w r2, r7, #16
- 8004952: 4611 mov r1, r2
- 8004954: f8d7 012c ldr.w r0, [r7, #300] @ 0x12c
- 8004958: 4798 blx r3
- }
- receverState = srFinish;
- 800495a: 2305 movs r3, #5
- 800495c: f887 3133 strb.w r3, [r7, #307] @ 0x133
- break;
- 8004960: e0b1 b.n 8004ac6 <UartRxTask+0x592>
- 8004962: bf00 nop
- 8004964: 08018b0c .word 0x08018b0c
- 8004968: 24000400 .word 0x24000400
- 800496c: 08018b2c .word 0x08018b2c
- case srFail:
- dataToSend = 0;
- 8004970: 2300 movs r3, #0
- 8004972: f8a7 313c strh.w r3, [r7, #316] @ 0x13c
- if ((frameTimeout == pdTRUE) && (frameBytesCount > 2)) {
- 8004976: f8d7 311c ldr.w r3, [r7, #284] @ 0x11c
- 800497a: 2b01 cmp r3, #1
- 800497c: d124 bne.n 80049c8 <UartRxTask+0x494>
- 800497e: f8b7 3124 ldrh.w r3, [r7, #292] @ 0x124
- 8004982: 2b02 cmp r3, #2
- 8004984: d920 bls.n 80049c8 <UartRxTask+0x494>
- dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spTimeout, NULL, 0);
- 8004986: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 800498a: 6898 ldr r0, [r3, #8]
- 800498c: f507 73a0 add.w r3, r7, #320 @ 0x140
- 8004990: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 8004994: 8819 ldrh r1, [r3, #0]
- 8004996: f507 73a0 add.w r3, r7, #320 @ 0x140
- 800499a: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 800499e: 789a ldrb r2, [r3, #2]
- 80049a0: 2300 movs r3, #0
- 80049a2: 9301 str r3, [sp, #4]
- 80049a4: 2300 movs r3, #0
- 80049a6: 9300 str r3, [sp, #0]
- 80049a8: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 80049ac: f7fe fcc4 bl 8003338 <PrepareRespFrame>
- 80049b0: 4603 mov r3, r0
- 80049b2: f8a7 313c strh.w r3, [r7, #316] @ 0x13c
- printf ("Uart%d: RX data receiver timeout!\n", uartTaskData->uartNumber);
- 80049b6: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80049ba: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
- 80049be: 4619 mov r1, r3
- 80049c0: 4844 ldr r0, [pc, #272] @ (8004ad4 <UartRxTask+0x5a0>)
- 80049c2: f013 f99b bl 8017cfc <iprintf>
- 80049c6: e03c b.n 8004a42 <UartRxTask+0x50e>
- } else if (!crcPass) {
- 80049c8: f8d7 3138 ldr.w r3, [r7, #312] @ 0x138
- 80049cc: 2b00 cmp r3, #0
- 80049ce: d120 bne.n 8004a12 <UartRxTask+0x4de>
- dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spCrcFail, NULL, 0);
- 80049d0: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 80049d4: 6898 ldr r0, [r3, #8]
- 80049d6: f507 73a0 add.w r3, r7, #320 @ 0x140
- 80049da: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 80049de: 8819 ldrh r1, [r3, #0]
- 80049e0: f507 73a0 add.w r3, r7, #320 @ 0x140
- 80049e4: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 80049e8: 789a ldrb r2, [r3, #2]
- 80049ea: 2300 movs r3, #0
- 80049ec: 9301 str r3, [sp, #4]
- 80049ee: 2300 movs r3, #0
- 80049f0: 9300 str r3, [sp, #0]
- 80049f2: f06f 0301 mvn.w r3, #1
- 80049f6: f7fe fc9f bl 8003338 <PrepareRespFrame>
- 80049fa: 4603 mov r3, r0
- 80049fc: f8a7 313c strh.w r3, [r7, #316] @ 0x13c
- printf ("Uart%d: Frame CRC FAIL\n", uartTaskData->uartNumber);
- 8004a00: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004a04: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
- 8004a08: 4619 mov r1, r3
- 8004a0a: 4833 ldr r0, [pc, #204] @ (8004ad8 <UartRxTask+0x5a4>)
- 8004a0c: f013 f976 bl 8017cfc <iprintf>
- 8004a10: e017 b.n 8004a42 <UartRxTask+0x50e>
- } else {
- dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spInternalError, NULL, 0);
- 8004a12: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004a16: 6898 ldr r0, [r3, #8]
- 8004a18: f507 73a0 add.w r3, r7, #320 @ 0x140
- 8004a1c: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 8004a20: 8819 ldrh r1, [r3, #0]
- 8004a22: f507 73a0 add.w r3, r7, #320 @ 0x140
- 8004a26: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 8004a2a: 789a ldrb r2, [r3, #2]
- 8004a2c: 2300 movs r3, #0
- 8004a2e: 9301 str r3, [sp, #4]
- 8004a30: 2300 movs r3, #0
- 8004a32: 9300 str r3, [sp, #0]
- 8004a34: f06f 0303 mvn.w r3, #3
- 8004a38: f7fe fc7e bl 8003338 <PrepareRespFrame>
- 8004a3c: 4603 mov r3, r0
- 8004a3e: f8a7 313c strh.w r3, [r7, #316] @ 0x13c
- }
- if (dataToSend > 0) {
- 8004a42: f8b7 313c ldrh.w r3, [r7, #316] @ 0x13c
- 8004a46: 2b00 cmp r3, #0
- 8004a48: d00a beq.n 8004a60 <UartRxTask+0x52c>
- HAL_UART_Transmit_IT (uartTaskData->huart, uartTaskData->uartTxBuffer, dataToSend);
- 8004a4a: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004a4e: 6b18 ldr r0, [r3, #48] @ 0x30
- 8004a50: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004a54: 689b ldr r3, [r3, #8]
- 8004a56: f8b7 213c ldrh.w r2, [r7, #316] @ 0x13c
- 8004a5a: 4619 mov r1, r3
- 8004a5c: f00c f932 bl 8010cc4 <HAL_UART_Transmit_IT>
- }
- printf ("Uart%d: TX bytes sent: %d\n", dataToSend, uartTaskData->uartNumber);
- 8004a60: f8b7 113c ldrh.w r1, [r7, #316] @ 0x13c
- 8004a64: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004a68: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
- 8004a6c: 461a mov r2, r3
- 8004a6e: 481b ldr r0, [pc, #108] @ (8004adc <UartRxTask+0x5a8>)
- 8004a70: f013 f944 bl 8017cfc <iprintf>
- receverState = srFinish;
- 8004a74: 2305 movs r3, #5
- 8004a76: f887 3133 strb.w r3, [r7, #307] @ 0x133
- break;
- 8004a7a: e024 b.n 8004ac6 <UartRxTask+0x592>
- case srFinish:
- default:
- osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
- 8004a7c: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004a80: 6a1b ldr r3, [r3, #32]
- 8004a82: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8004a86: 4618 mov r0, r3
- 8004a88: f00f f949 bl 8013d1e <osMutexAcquire>
- uartTaskData->frameBytesCount = 0;
- 8004a8c: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004a90: 2200 movs r2, #0
- 8004a92: 82da strh r2, [r3, #22]
- osMutexRelease (uartTaskData->rxDataBufferMutex);
- 8004a94: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
- 8004a98: 6a1b ldr r3, [r3, #32]
- 8004a9a: 4618 mov r0, r3
- 8004a9c: f00f f98a bl 8013db4 <osMutexRelease>
- spFrameData.frameHeader.frameCommand = spUnknown;
- 8004aa0: f507 73a0 add.w r3, r7, #320 @ 0x140
- 8004aa4: f5a3 7398 sub.w r3, r3, #304 @ 0x130
- 8004aa8: 2210 movs r2, #16
- 8004aaa: 709a strb r2, [r3, #2]
- frameTotalLength = 0;
- 8004aac: 2300 movs r3, #0
- 8004aae: f8a7 313e strh.w r3, [r7, #318] @ 0x13e
- outputDataBufferPos = 0;
- 8004ab2: 4b0b ldr r3, [pc, #44] @ (8004ae0 <UartRxTask+0x5ac>)
- 8004ab4: 2200 movs r2, #0
- 8004ab6: 801a strh r2, [r3, #0]
- receverState = srWaitForHeader;
- 8004ab8: 2300 movs r3, #0
- 8004aba: f887 3133 strb.w r3, [r7, #307] @ 0x133
- proceed = pdFALSE;
- 8004abe: 2300 movs r3, #0
- 8004ac0: f8c7 3134 str.w r3, [r7, #308] @ 0x134
- break;
- 8004ac4: bf00 nop
- while (proceed) {
- 8004ac6: f8d7 3134 ldr.w r3, [r7, #308] @ 0x134
- 8004aca: 2b00 cmp r3, #0
- 8004acc: f47f ade0 bne.w 8004690 <UartRxTask+0x15c>
- frameTimeout = !(xTaskNotifyWait (0, 0, &bytesRec, pdMS_TO_TICKS (FRAME_TIMEOUT_MS)));
- 8004ad0: e581 b.n 80045d6 <UartRxTask+0xa2>
- 8004ad2: bf00 nop
- 8004ad4: 08018b44 .word 0x08018b44
- 8004ad8: 08018b68 .word 0x08018b68
- 8004adc: 08018b80 .word 0x08018b80
- 8004ae0: 24000cf8 .word 0x24000cf8
- 08004ae4 <Uart1ReceivedDataProcessCallback>:
- void Uart8ReceivedDataProcessCallback (void* arg, SerialProtocolFrameData* spFrameData) {
- Uart1ReceivedDataProcessCallback (arg, spFrameData);
- }
- void Uart1ReceivedDataProcessCallback (void* arg, SerialProtocolFrameData* spFrameData) {
- 8004ae4: b590 push {r4, r7, lr}
- 8004ae6: b0a3 sub sp, #140 @ 0x8c
- 8004ae8: af06 add r7, sp, #24
- 8004aea: 6078 str r0, [r7, #4]
- 8004aec: 6039 str r1, [r7, #0]
- UartTaskData* uartTaskData = (UartTaskData*)arg;
- 8004aee: 687b ldr r3, [r7, #4]
- 8004af0: 64fb str r3, [r7, #76] @ 0x4c
- uint16_t dataToSend = 0;
- 8004af2: 2300 movs r3, #0
- 8004af4: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
- outputDataBufferPos = 0;
- 8004af8: 4ba4 ldr r3, [pc, #656] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004afa: 2200 movs r2, #0
- 8004afc: 801a strh r2, [r3, #0]
- uint16_t inputDataBufferPos = 0;
- 8004afe: 2300 movs r3, #0
- 8004b00: 86bb strh r3, [r7, #52] @ 0x34
- SerialProtocolRespStatus respStatus = spUnknownCommand;
- 8004b02: 23fd movs r3, #253 @ 0xfd
- 8004b04: f887 306f strb.w r3, [r7, #111] @ 0x6f
- switch (spFrameData->frameHeader.frameCommand) {
- 8004b08: 683b ldr r3, [r7, #0]
- 8004b0a: 789b ldrb r3, [r3, #2]
- 8004b0c: 2b0f cmp r3, #15
- 8004b0e: f200 8479 bhi.w 8005404 <Uart1ReceivedDataProcessCallback+0x920>
- 8004b12: a201 add r2, pc, #4 @ (adr r2, 8004b18 <Uart1ReceivedDataProcessCallback+0x34>)
- 8004b14: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8004b18: 08004b59 .word 0x08004b59
- 8004b1c: 08004c47 .word 0x08004c47
- 8004b20: 08004df1 .word 0x08004df1
- 8004b24: 08004ead .word 0x08004ead
- 8004b28: 08004f4f .word 0x08004f4f
- 8004b2c: 0800506d .word 0x0800506d
- 8004b30: 080050f5 .word 0x080050f5
- 8004b34: 08004ff1 .word 0x08004ff1
- 8004b38: 0800514b .word 0x0800514b
- 8004b3c: 080051bd .word 0x080051bd
- 8004b40: 08005209 .word 0x08005209
- 8004b44: 08005255 .word 0x08005255
- 8004b48: 080052b7 .word 0x080052b7
- 8004b4c: 0800531b .word 0x0800531b
- 8004b50: 0800537d .word 0x0800537d
- 8004b54: 080053e1 .word 0x080053e1
- case spGetElectricalMeasurments:
- if (osMutexAcquire (resMeasurementsMutex, osWaitForever) == osOK) {
- 8004b58: 4b8d ldr r3, [pc, #564] @ (8004d90 <Uart1ReceivedDataProcessCallback+0x2ac>)
- 8004b5a: 681b ldr r3, [r3, #0]
- 8004b5c: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8004b60: 4618 mov r0, r3
- 8004b62: f00f f8dc bl 8013d1e <osMutexAcquire>
- 8004b66: 4603 mov r3, r0
- 8004b68: 2b00 cmp r3, #0
- 8004b6a: d168 bne.n 8004c3e <Uart1ReceivedDataProcessCallback+0x15a>
- for (int i = 0; i < 3; i++) {
- 8004b6c: 2300 movs r3, #0
- 8004b6e: 66bb str r3, [r7, #104] @ 0x68
- 8004b70: e00b b.n 8004b8a <Uart1ReceivedDataProcessCallback+0xa6>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &resMeasurements.voltageRMS[i], sizeof (float));
- 8004b72: 6ebb ldr r3, [r7, #104] @ 0x68
- 8004b74: 009b lsls r3, r3, #2
- 8004b76: 4a87 ldr r2, [pc, #540] @ (8004d94 <Uart1ReceivedDataProcessCallback+0x2b0>)
- 8004b78: 441a add r2, r3
- 8004b7a: 2304 movs r3, #4
- 8004b7c: 4983 ldr r1, [pc, #524] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004b7e: 4886 ldr r0, [pc, #536] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004b80: f7fe fb76 bl 8003270 <WriteDataToBuffer>
- for (int i = 0; i < 3; i++) {
- 8004b84: 6ebb ldr r3, [r7, #104] @ 0x68
- 8004b86: 3301 adds r3, #1
- 8004b88: 66bb str r3, [r7, #104] @ 0x68
- 8004b8a: 6ebb ldr r3, [r7, #104] @ 0x68
- 8004b8c: 2b02 cmp r3, #2
- 8004b8e: ddf0 ble.n 8004b72 <Uart1ReceivedDataProcessCallback+0x8e>
- }
- for (int i = 0; i < 3; i++) {
- 8004b90: 2300 movs r3, #0
- 8004b92: 667b str r3, [r7, #100] @ 0x64
- 8004b94: e00d b.n 8004bb2 <Uart1ReceivedDataProcessCallback+0xce>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &resMeasurements.voltagePeak[i], sizeof (float));
- 8004b96: 6e7b ldr r3, [r7, #100] @ 0x64
- 8004b98: 3302 adds r3, #2
- 8004b9a: 009b lsls r3, r3, #2
- 8004b9c: 4a7d ldr r2, [pc, #500] @ (8004d94 <Uart1ReceivedDataProcessCallback+0x2b0>)
- 8004b9e: 4413 add r3, r2
- 8004ba0: 1d1a adds r2, r3, #4
- 8004ba2: 2304 movs r3, #4
- 8004ba4: 4979 ldr r1, [pc, #484] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004ba6: 487c ldr r0, [pc, #496] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004ba8: f7fe fb62 bl 8003270 <WriteDataToBuffer>
- for (int i = 0; i < 3; i++) {
- 8004bac: 6e7b ldr r3, [r7, #100] @ 0x64
- 8004bae: 3301 adds r3, #1
- 8004bb0: 667b str r3, [r7, #100] @ 0x64
- 8004bb2: 6e7b ldr r3, [r7, #100] @ 0x64
- 8004bb4: 2b02 cmp r3, #2
- 8004bb6: ddee ble.n 8004b96 <Uart1ReceivedDataProcessCallback+0xb2>
- }
- for (int i = 0; i < 3; i++) {
- 8004bb8: 2300 movs r3, #0
- 8004bba: 663b str r3, [r7, #96] @ 0x60
- 8004bbc: e00c b.n 8004bd8 <Uart1ReceivedDataProcessCallback+0xf4>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &resMeasurements.currentRMS[i], sizeof (float));
- 8004bbe: 6e3b ldr r3, [r7, #96] @ 0x60
- 8004bc0: 3306 adds r3, #6
- 8004bc2: 009b lsls r3, r3, #2
- 8004bc4: 4a73 ldr r2, [pc, #460] @ (8004d94 <Uart1ReceivedDataProcessCallback+0x2b0>)
- 8004bc6: 441a add r2, r3
- 8004bc8: 2304 movs r3, #4
- 8004bca: 4970 ldr r1, [pc, #448] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004bcc: 4872 ldr r0, [pc, #456] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004bce: f7fe fb4f bl 8003270 <WriteDataToBuffer>
- for (int i = 0; i < 3; i++) {
- 8004bd2: 6e3b ldr r3, [r7, #96] @ 0x60
- 8004bd4: 3301 adds r3, #1
- 8004bd6: 663b str r3, [r7, #96] @ 0x60
- 8004bd8: 6e3b ldr r3, [r7, #96] @ 0x60
- 8004bda: 2b02 cmp r3, #2
- 8004bdc: ddef ble.n 8004bbe <Uart1ReceivedDataProcessCallback+0xda>
- }
- for (int i = 0; i < 3; i++) {
- 8004bde: 2300 movs r3, #0
- 8004be0: 65fb str r3, [r7, #92] @ 0x5c
- 8004be2: e00d b.n 8004c00 <Uart1ReceivedDataProcessCallback+0x11c>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &resMeasurements.currentPeak[i], sizeof (float));
- 8004be4: 6dfb ldr r3, [r7, #92] @ 0x5c
- 8004be6: 3308 adds r3, #8
- 8004be8: 009b lsls r3, r3, #2
- 8004bea: 4a6a ldr r2, [pc, #424] @ (8004d94 <Uart1ReceivedDataProcessCallback+0x2b0>)
- 8004bec: 4413 add r3, r2
- 8004bee: 1d1a adds r2, r3, #4
- 8004bf0: 2304 movs r3, #4
- 8004bf2: 4966 ldr r1, [pc, #408] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004bf4: 4868 ldr r0, [pc, #416] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004bf6: f7fe fb3b bl 8003270 <WriteDataToBuffer>
- for (int i = 0; i < 3; i++) {
- 8004bfa: 6dfb ldr r3, [r7, #92] @ 0x5c
- 8004bfc: 3301 adds r3, #1
- 8004bfe: 65fb str r3, [r7, #92] @ 0x5c
- 8004c00: 6dfb ldr r3, [r7, #92] @ 0x5c
- 8004c02: 2b02 cmp r3, #2
- 8004c04: ddee ble.n 8004be4 <Uart1ReceivedDataProcessCallback+0x100>
- }
- for (int i = 0; i < 3; i++) {
- 8004c06: 2300 movs r3, #0
- 8004c08: 65bb str r3, [r7, #88] @ 0x58
- 8004c0a: e00c b.n 8004c26 <Uart1ReceivedDataProcessCallback+0x142>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &resMeasurements.power[i], sizeof (float));
- 8004c0c: 6dbb ldr r3, [r7, #88] @ 0x58
- 8004c0e: 330c adds r3, #12
- 8004c10: 009b lsls r3, r3, #2
- 8004c12: 4a60 ldr r2, [pc, #384] @ (8004d94 <Uart1ReceivedDataProcessCallback+0x2b0>)
- 8004c14: 441a add r2, r3
- 8004c16: 2304 movs r3, #4
- 8004c18: 495c ldr r1, [pc, #368] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004c1a: 485f ldr r0, [pc, #380] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004c1c: f7fe fb28 bl 8003270 <WriteDataToBuffer>
- for (int i = 0; i < 3; i++) {
- 8004c20: 6dbb ldr r3, [r7, #88] @ 0x58
- 8004c22: 3301 adds r3, #1
- 8004c24: 65bb str r3, [r7, #88] @ 0x58
- 8004c26: 6dbb ldr r3, [r7, #88] @ 0x58
- 8004c28: 2b02 cmp r3, #2
- 8004c2a: ddef ble.n 8004c0c <Uart1ReceivedDataProcessCallback+0x128>
- }
- osMutexRelease (resMeasurementsMutex);
- 8004c2c: 4b58 ldr r3, [pc, #352] @ (8004d90 <Uart1ReceivedDataProcessCallback+0x2ac>)
- 8004c2e: 681b ldr r3, [r3, #0]
- 8004c30: 4618 mov r0, r3
- 8004c32: f00f f8bf bl 8013db4 <osMutexRelease>
- respStatus = spOK;
- 8004c36: 2300 movs r3, #0
- 8004c38: f887 306f strb.w r3, [r7, #111] @ 0x6f
- } else {
- respStatus = spInternalError;
- }
- break;
- 8004c3c: e3e6 b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- respStatus = spInternalError;
- 8004c3e: 23fc movs r3, #252 @ 0xfc
- 8004c40: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 8004c44: e3e2 b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- case spGetSensorMeasurments:
- if (osMutexAcquire (sensorsInfoMutex, osWaitForever) == osOK) {
- 8004c46: 4b55 ldr r3, [pc, #340] @ (8004d9c <Uart1ReceivedDataProcessCallback+0x2b8>)
- 8004c48: 681b ldr r3, [r3, #0]
- 8004c4a: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8004c4e: 4618 mov r0, r3
- 8004c50: f00f f865 bl 8013d1e <osMutexAcquire>
- 8004c54: 4603 mov r3, r0
- 8004c56: 2b00 cmp r3, #0
- 8004c58: f040 8094 bne.w 8004d84 <Uart1ReceivedDataProcessCallback+0x2a0>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.pvTemperature[0], sizeof (float));
- 8004c5c: 2304 movs r3, #4
- 8004c5e: 4a50 ldr r2, [pc, #320] @ (8004da0 <Uart1ReceivedDataProcessCallback+0x2bc>)
- 8004c60: 494a ldr r1, [pc, #296] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004c62: 484d ldr r0, [pc, #308] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004c64: f7fe fb04 bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.pvTemperature[1], sizeof (float));
- 8004c68: 2304 movs r3, #4
- 8004c6a: 4a4e ldr r2, [pc, #312] @ (8004da4 <Uart1ReceivedDataProcessCallback+0x2c0>)
- 8004c6c: 4947 ldr r1, [pc, #284] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004c6e: 484a ldr r0, [pc, #296] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004c70: f7fe fafe bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.fanVoltage, sizeof (float));
- 8004c74: 2304 movs r3, #4
- 8004c76: 4a4c ldr r2, [pc, #304] @ (8004da8 <Uart1ReceivedDataProcessCallback+0x2c4>)
- 8004c78: 4944 ldr r1, [pc, #272] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004c7a: 4847 ldr r0, [pc, #284] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004c7c: f7fe faf8 bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.pvEncoderX, sizeof (float));
- 8004c80: 2304 movs r3, #4
- 8004c82: 4a4a ldr r2, [pc, #296] @ (8004dac <Uart1ReceivedDataProcessCallback+0x2c8>)
- 8004c84: 4941 ldr r1, [pc, #260] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004c86: 4844 ldr r0, [pc, #272] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004c88: f7fe faf2 bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.pvEncoderY, sizeof (float));
- 8004c8c: 2304 movs r3, #4
- 8004c8e: 4a48 ldr r2, [pc, #288] @ (8004db0 <Uart1ReceivedDataProcessCallback+0x2cc>)
- 8004c90: 493e ldr r1, [pc, #248] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004c92: 4841 ldr r0, [pc, #260] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004c94: f7fe faec bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.motorXStatus, sizeof (uint8_t));
- 8004c98: 2301 movs r3, #1
- 8004c9a: 4a46 ldr r2, [pc, #280] @ (8004db4 <Uart1ReceivedDataProcessCallback+0x2d0>)
- 8004c9c: 493b ldr r1, [pc, #236] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004c9e: 483e ldr r0, [pc, #248] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004ca0: f7fe fae6 bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.motorYStatus, sizeof (uint8_t));
- 8004ca4: 2301 movs r3, #1
- 8004ca6: 4a44 ldr r2, [pc, #272] @ (8004db8 <Uart1ReceivedDataProcessCallback+0x2d4>)
- 8004ca8: 4938 ldr r1, [pc, #224] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004caa: 483b ldr r0, [pc, #236] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004cac: f7fe fae0 bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.motorXAveCurrent, sizeof (float));
- 8004cb0: 2304 movs r3, #4
- 8004cb2: 4a42 ldr r2, [pc, #264] @ (8004dbc <Uart1ReceivedDataProcessCallback+0x2d8>)
- 8004cb4: 4935 ldr r1, [pc, #212] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004cb6: 4838 ldr r0, [pc, #224] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004cb8: f7fe fada bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.motorYAveCurrent, sizeof (float));
- 8004cbc: 2304 movs r3, #4
- 8004cbe: 4a40 ldr r2, [pc, #256] @ (8004dc0 <Uart1ReceivedDataProcessCallback+0x2dc>)
- 8004cc0: 4932 ldr r1, [pc, #200] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004cc2: 4835 ldr r0, [pc, #212] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004cc4: f7fe fad4 bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.motorXPeakCurrent, sizeof (float));
- 8004cc8: 2304 movs r3, #4
- 8004cca: 4a3e ldr r2, [pc, #248] @ (8004dc4 <Uart1ReceivedDataProcessCallback+0x2e0>)
- 8004ccc: 492f ldr r1, [pc, #188] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004cce: 4832 ldr r0, [pc, #200] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004cd0: f7fe face bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.motorYPeakCurrent, sizeof (float));
- 8004cd4: 2304 movs r3, #4
- 8004cd6: 4a3c ldr r2, [pc, #240] @ (8004dc8 <Uart1ReceivedDataProcessCallback+0x2e4>)
- 8004cd8: 492c ldr r1, [pc, #176] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004cda: 482f ldr r0, [pc, #188] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004cdc: f7fe fac8 bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.limitXSwitchUp, sizeof (uint8_t));
- 8004ce0: 2301 movs r3, #1
- 8004ce2: 4a3a ldr r2, [pc, #232] @ (8004dcc <Uart1ReceivedDataProcessCallback+0x2e8>)
- 8004ce4: 4929 ldr r1, [pc, #164] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004ce6: 482c ldr r0, [pc, #176] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004ce8: f7fe fac2 bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.limitXSwitchDown, sizeof (uint8_t));
- 8004cec: 2301 movs r3, #1
- 8004cee: 4a38 ldr r2, [pc, #224] @ (8004dd0 <Uart1ReceivedDataProcessCallback+0x2ec>)
- 8004cf0: 4926 ldr r1, [pc, #152] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004cf2: 4829 ldr r0, [pc, #164] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004cf4: f7fe fabc bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.limitXSwitchCenter, sizeof (uint8_t));
- 8004cf8: 2301 movs r3, #1
- 8004cfa: 4a36 ldr r2, [pc, #216] @ (8004dd4 <Uart1ReceivedDataProcessCallback+0x2f0>)
- 8004cfc: 4923 ldr r1, [pc, #140] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004cfe: 4826 ldr r0, [pc, #152] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004d00: f7fe fab6 bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.limitYSwitchUp, sizeof (uint8_t));
- 8004d04: 2301 movs r3, #1
- 8004d06: 4a34 ldr r2, [pc, #208] @ (8004dd8 <Uart1ReceivedDataProcessCallback+0x2f4>)
- 8004d08: 4920 ldr r1, [pc, #128] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004d0a: 4823 ldr r0, [pc, #140] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004d0c: f7fe fab0 bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.limitYSwitchDown, sizeof (uint8_t));
- 8004d10: 2301 movs r3, #1
- 8004d12: 4a32 ldr r2, [pc, #200] @ (8004ddc <Uart1ReceivedDataProcessCallback+0x2f8>)
- 8004d14: 491d ldr r1, [pc, #116] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004d16: 4820 ldr r0, [pc, #128] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004d18: f7fe faaa bl 8003270 <WriteDataToBuffer>
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.limitYSwitchCenter, sizeof (uint8_t));
- 8004d1c: 2301 movs r3, #1
- 8004d1e: 4a30 ldr r2, [pc, #192] @ (8004de0 <Uart1ReceivedDataProcessCallback+0x2fc>)
- 8004d20: 491a ldr r1, [pc, #104] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004d22: 481d ldr r0, [pc, #116] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004d24: f7fe faa4 bl 8003270 <WriteDataToBuffer>
- uint8_t comparatorOutput = HAL_COMP_GetOutputLevel (&hcomp1) == COMP_OUTPUT_LEVEL_HIGH ? 1 : 0;
- 8004d28: 482e ldr r0, [pc, #184] @ (8004de4 <Uart1ReceivedDataProcessCallback+0x300>)
- 8004d2a: f002 f9ed bl 8007108 <HAL_COMP_GetOutputLevel>
- 8004d2e: 4603 mov r3, r0
- 8004d30: 2b01 cmp r3, #1
- 8004d32: bf0c ite eq
- 8004d34: 2301 moveq r3, #1
- 8004d36: 2300 movne r3, #0
- 8004d38: b2db uxtb r3, r3
- 8004d3a: f887 3037 strb.w r3, [r7, #55] @ 0x37
- sensorsInfo.powerSupplyFailMask = ~((comparatorOutput << 1) | HAL_GPIO_ReadPin (GPIOD, GPIO_PIN_3)) & 0x01;
- 8004d3e: f897 3037 ldrb.w r3, [r7, #55] @ 0x37
- 8004d42: 005c lsls r4, r3, #1
- 8004d44: 2108 movs r1, #8
- 8004d46: 4828 ldr r0, [pc, #160] @ (8004de8 <Uart1ReceivedDataProcessCallback+0x304>)
- 8004d48: f005 ff96 bl 800ac78 <HAL_GPIO_ReadPin>
- 8004d4c: 4603 mov r3, r0
- 8004d4e: 4323 orrs r3, r4
- 8004d50: f003 0301 and.w r3, r3, #1
- 8004d54: 2b00 cmp r3, #0
- 8004d56: bf0c ite eq
- 8004d58: 2301 moveq r3, #1
- 8004d5a: 2300 movne r3, #0
- 8004d5c: b2db uxtb r3, r3
- 8004d5e: 461a mov r2, r3
- 8004d60: 4b0f ldr r3, [pc, #60] @ (8004da0 <Uart1ReceivedDataProcessCallback+0x2bc>)
- 8004d62: f883 202e strb.w r2, [r3, #46] @ 0x2e
- WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &sensorsInfo.powerSupplyFailMask, sizeof (uint8_t));
- 8004d66: 2301 movs r3, #1
- 8004d68: 4a20 ldr r2, [pc, #128] @ (8004dec <Uart1ReceivedDataProcessCallback+0x308>)
- 8004d6a: 4908 ldr r1, [pc, #32] @ (8004d8c <Uart1ReceivedDataProcessCallback+0x2a8>)
- 8004d6c: 480a ldr r0, [pc, #40] @ (8004d98 <Uart1ReceivedDataProcessCallback+0x2b4>)
- 8004d6e: f7fe fa7f bl 8003270 <WriteDataToBuffer>
- osMutexRelease (sensorsInfoMutex);
- 8004d72: 4b0a ldr r3, [pc, #40] @ (8004d9c <Uart1ReceivedDataProcessCallback+0x2b8>)
- 8004d74: 681b ldr r3, [r3, #0]
- 8004d76: 4618 mov r0, r3
- 8004d78: f00f f81c bl 8013db4 <osMutexRelease>
- respStatus = spOK;
- 8004d7c: 2300 movs r3, #0
- 8004d7e: f887 306f strb.w r3, [r7, #111] @ 0x6f
- } else {
- respStatus = spInternalError;
- }
- break;
- 8004d82: e343 b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- respStatus = spInternalError;
- 8004d84: 23fc movs r3, #252 @ 0xfc
- 8004d86: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 8004d8a: e33f b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- 8004d8c: 24000cf8 .word 0x24000cf8
- 8004d90: 24000838 .word 0x24000838
- 8004d94: 24000844 .word 0x24000844
- 8004d98: 24000c78 .word 0x24000c78
- 8004d9c: 2400083c .word 0x2400083c
- 8004da0: 24000880 .word 0x24000880
- 8004da4: 24000884 .word 0x24000884
- 8004da8: 24000888 .word 0x24000888
- 8004dac: 2400088c .word 0x2400088c
- 8004db0: 24000890 .word 0x24000890
- 8004db4: 24000894 .word 0x24000894
- 8004db8: 24000895 .word 0x24000895
- 8004dbc: 24000898 .word 0x24000898
- 8004dc0: 2400089c .word 0x2400089c
- 8004dc4: 240008a0 .word 0x240008a0
- 8004dc8: 240008a4 .word 0x240008a4
- 8004dcc: 240008a8 .word 0x240008a8
- 8004dd0: 240008a9 .word 0x240008a9
- 8004dd4: 240008aa .word 0x240008aa
- 8004dd8: 240008ab .word 0x240008ab
- 8004ddc: 240008ac .word 0x240008ac
- 8004de0: 240008ad .word 0x240008ad
- 8004de4: 240003d4 .word 0x240003d4
- 8004de8: 58020c00 .word 0x58020c00
- 8004dec: 240008ae .word 0x240008ae
- case spSetFanSpeed:
- osTimerStop (fanTimerHandle);
- 8004df0: 4bb4 ldr r3, [pc, #720] @ (80050c4 <Uart1ReceivedDataProcessCallback+0x5e0>)
- 8004df2: 681b ldr r3, [r3, #0]
- 8004df4: 4618 mov r0, r3
- 8004df6: f00e fed5 bl 8013ba4 <osTimerStop>
- int32_t fanTimerPeriod = 0;
- 8004dfa: 2300 movs r3, #0
- 8004dfc: 633b str r3, [r7, #48] @ 0x30
- uint32_t pulse = 0;
- 8004dfe: 2300 movs r3, #0
- 8004e00: 62fb str r3, [r7, #44] @ 0x2c
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, &pulse);
- 8004e02: 683b ldr r3, [r7, #0]
- 8004e04: 330c adds r3, #12
- 8004e06: f107 022c add.w r2, r7, #44 @ 0x2c
- 8004e0a: f107 0134 add.w r1, r7, #52 @ 0x34
- 8004e0e: 4618 mov r0, r3
- 8004e10: f7fe fa5f bl 80032d2 <ReadWordFromBufer>
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, (uint32_t*)&fanTimerPeriod);
- 8004e14: 683b ldr r3, [r7, #0]
- 8004e16: 330c adds r3, #12
- 8004e18: f107 0230 add.w r2, r7, #48 @ 0x30
- 8004e1c: f107 0134 add.w r1, r7, #52 @ 0x34
- 8004e20: 4618 mov r0, r3
- 8004e22: f7fe fa56 bl 80032d2 <ReadWordFromBufer>
- fanTimerConfigOC.Pulse = pulse * 10;
- 8004e26: 6afa ldr r2, [r7, #44] @ 0x2c
- 8004e28: 4613 mov r3, r2
- 8004e2a: 009b lsls r3, r3, #2
- 8004e2c: 4413 add r3, r2
- 8004e2e: 005b lsls r3, r3, #1
- 8004e30: 461a mov r2, r3
- 8004e32: 4ba5 ldr r3, [pc, #660] @ (80050c8 <Uart1ReceivedDataProcessCallback+0x5e4>)
- 8004e34: 605a str r2, [r3, #4]
- if (HAL_TIM_PWM_ConfigChannel (&htim1, &fanTimerConfigOC, TIM_CHANNEL_2) != HAL_OK) {
- 8004e36: 2204 movs r2, #4
- 8004e38: 49a3 ldr r1, [pc, #652] @ (80050c8 <Uart1ReceivedDataProcessCallback+0x5e4>)
- 8004e3a: 48a4 ldr r0, [pc, #656] @ (80050cc <Uart1ReceivedDataProcessCallback+0x5e8>)
- 8004e3c: f00a fd28 bl 800f890 <HAL_TIM_PWM_ConfigChannel>
- 8004e40: 4603 mov r3, r0
- 8004e42: 2b00 cmp r3, #0
- 8004e44: d001 beq.n 8004e4a <Uart1ReceivedDataProcessCallback+0x366>
- Error_Handler ();
- 8004e46: f7fd f89f bl 8001f88 <Error_Handler>
- }
- if (fanTimerPeriod > 0) {
- 8004e4a: 6b3b ldr r3, [r7, #48] @ 0x30
- 8004e4c: 2b00 cmp r3, #0
- 8004e4e: dd0f ble.n 8004e70 <Uart1ReceivedDataProcessCallback+0x38c>
- osTimerStart (fanTimerHandle, fanTimerPeriod * 1000);
- 8004e50: 4b9c ldr r3, [pc, #624] @ (80050c4 <Uart1ReceivedDataProcessCallback+0x5e0>)
- 8004e52: 681a ldr r2, [r3, #0]
- 8004e54: 6b3b ldr r3, [r7, #48] @ 0x30
- 8004e56: f44f 717a mov.w r1, #1000 @ 0x3e8
- 8004e5a: fb01 f303 mul.w r3, r1, r3
- 8004e5e: 4619 mov r1, r3
- 8004e60: 4610 mov r0, r2
- 8004e62: f00e fe71 bl 8013b48 <osTimerStart>
- HAL_TIM_PWM_Start (&htim1, TIM_CHANNEL_2);
- 8004e66: 2104 movs r1, #4
- 8004e68: 4898 ldr r0, [pc, #608] @ (80050cc <Uart1ReceivedDataProcessCallback+0x5e8>)
- 8004e6a: f00a f817 bl 800ee9c <HAL_TIM_PWM_Start>
- 8004e6e: e019 b.n 8004ea4 <Uart1ReceivedDataProcessCallback+0x3c0>
- } else if (fanTimerPeriod == 0) {
- 8004e70: 6b3b ldr r3, [r7, #48] @ 0x30
- 8004e72: 2b00 cmp r3, #0
- 8004e74: d109 bne.n 8004e8a <Uart1ReceivedDataProcessCallback+0x3a6>
- osTimerStop (fanTimerHandle);
- 8004e76: 4b93 ldr r3, [pc, #588] @ (80050c4 <Uart1ReceivedDataProcessCallback+0x5e0>)
- 8004e78: 681b ldr r3, [r3, #0]
- 8004e7a: 4618 mov r0, r3
- 8004e7c: f00e fe92 bl 8013ba4 <osTimerStop>
- HAL_TIM_PWM_Stop (&htim1, TIM_CHANNEL_2);
- 8004e80: 2104 movs r1, #4
- 8004e82: 4892 ldr r0, [pc, #584] @ (80050cc <Uart1ReceivedDataProcessCallback+0x5e8>)
- 8004e84: f00a f918 bl 800f0b8 <HAL_TIM_PWM_Stop>
- 8004e88: e00c b.n 8004ea4 <Uart1ReceivedDataProcessCallback+0x3c0>
- } else if (fanTimerPeriod == -1) {
- 8004e8a: 6b3b ldr r3, [r7, #48] @ 0x30
- 8004e8c: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 8004e90: d108 bne.n 8004ea4 <Uart1ReceivedDataProcessCallback+0x3c0>
- osTimerStop (fanTimerHandle);
- 8004e92: 4b8c ldr r3, [pc, #560] @ (80050c4 <Uart1ReceivedDataProcessCallback+0x5e0>)
- 8004e94: 681b ldr r3, [r3, #0]
- 8004e96: 4618 mov r0, r3
- 8004e98: f00e fe84 bl 8013ba4 <osTimerStop>
- HAL_TIM_PWM_Start (&htim1, TIM_CHANNEL_2);
- 8004e9c: 2104 movs r1, #4
- 8004e9e: 488b ldr r0, [pc, #556] @ (80050cc <Uart1ReceivedDataProcessCallback+0x5e8>)
- 8004ea0: f009 fffc bl 800ee9c <HAL_TIM_PWM_Start>
- }
- respStatus = spOK;
- 8004ea4: 2300 movs r3, #0
- 8004ea6: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 8004eaa: e2af b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- case spSetMotorXOn:
- int32_t motorXPWMPulse = 0;
- 8004eac: 2300 movs r3, #0
- 8004eae: 62bb str r3, [r7, #40] @ 0x28
- int32_t motorXTimerPeriod = 0;
- 8004eb0: 2300 movs r3, #0
- 8004eb2: 627b str r3, [r7, #36] @ 0x24
- uint32_t motorXStatus = 0;
- 8004eb4: 2300 movs r3, #0
- 8004eb6: 63bb str r3, [r7, #56] @ 0x38
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, (uint32_t*)&motorXPWMPulse);
- 8004eb8: 683b ldr r3, [r7, #0]
- 8004eba: 330c adds r3, #12
- 8004ebc: f107 0228 add.w r2, r7, #40 @ 0x28
- 8004ec0: f107 0134 add.w r1, r7, #52 @ 0x34
- 8004ec4: 4618 mov r0, r3
- 8004ec6: f7fe fa04 bl 80032d2 <ReadWordFromBufer>
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, (uint32_t*)&motorXTimerPeriod);
- 8004eca: 683b ldr r3, [r7, #0]
- 8004ecc: 330c adds r3, #12
- 8004ece: f107 0224 add.w r2, r7, #36 @ 0x24
- 8004ed2: f107 0134 add.w r1, r7, #52 @ 0x34
- 8004ed6: 4618 mov r0, r3
- 8004ed8: f7fe f9fb bl 80032d2 <ReadWordFromBufer>
- if (osMutexAcquire (sensorsInfoMutex, osWaitForever) == osOK) {
- 8004edc: 4b7c ldr r3, [pc, #496] @ (80050d0 <Uart1ReceivedDataProcessCallback+0x5ec>)
- 8004ede: 681b ldr r3, [r3, #0]
- 8004ee0: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8004ee4: 4618 mov r0, r3
- 8004ee6: f00e ff1a bl 8013d1e <osMutexAcquire>
- 8004eea: 4603 mov r3, r0
- 8004eec: 2b00 cmp r3, #0
- 8004eee: d12a bne.n 8004f46 <Uart1ReceivedDataProcessCallback+0x462>
- motorXStatus =
- motorControl (&htim3, &motorXYTimerConfigOC, TIM_CHANNEL_1, TIM_CHANNEL_2, motorXTimerHandle, motorXPWMPulse, motorXTimerPeriod, sensorsInfo.limitXSwitchUp, sensorsInfo.limitXSwitchDown);
- 8004ef0: 4b78 ldr r3, [pc, #480] @ (80050d4 <Uart1ReceivedDataProcessCallback+0x5f0>)
- 8004ef2: 681b ldr r3, [r3, #0]
- 8004ef4: 6aba ldr r2, [r7, #40] @ 0x28
- 8004ef6: 6a79 ldr r1, [r7, #36] @ 0x24
- 8004ef8: 4877 ldr r0, [pc, #476] @ (80050d8 <Uart1ReceivedDataProcessCallback+0x5f4>)
- 8004efa: f890 0028 ldrb.w r0, [r0, #40] @ 0x28
- 8004efe: 4c76 ldr r4, [pc, #472] @ (80050d8 <Uart1ReceivedDataProcessCallback+0x5f4>)
- 8004f00: f894 4029 ldrb.w r4, [r4, #41] @ 0x29
- 8004f04: 9404 str r4, [sp, #16]
- 8004f06: 9003 str r0, [sp, #12]
- 8004f08: 9102 str r1, [sp, #8]
- 8004f0a: 9201 str r2, [sp, #4]
- 8004f0c: 9300 str r3, [sp, #0]
- 8004f0e: 2304 movs r3, #4
- 8004f10: 2200 movs r2, #0
- 8004f12: 4972 ldr r1, [pc, #456] @ (80050dc <Uart1ReceivedDataProcessCallback+0x5f8>)
- 8004f14: 4872 ldr r0, [pc, #456] @ (80050e0 <Uart1ReceivedDataProcessCallback+0x5fc>)
- 8004f16: f7fe f805 bl 8002f24 <motorControl>
- 8004f1a: 4603 mov r3, r0
- motorXStatus =
- 8004f1c: 63bb str r3, [r7, #56] @ 0x38
- sensorsInfo.motorXStatus = motorXStatus;
- 8004f1e: 6bbb ldr r3, [r7, #56] @ 0x38
- 8004f20: b2da uxtb r2, r3
- 8004f22: 4b6d ldr r3, [pc, #436] @ (80050d8 <Uart1ReceivedDataProcessCallback+0x5f4>)
- 8004f24: 751a strb r2, [r3, #20]
- if (motorXStatus == 1) {
- 8004f26: 6bbb ldr r3, [r7, #56] @ 0x38
- 8004f28: 2b01 cmp r3, #1
- 8004f2a: d103 bne.n 8004f34 <Uart1ReceivedDataProcessCallback+0x450>
- sensorsInfo.motorXPeakCurrent = 0.0;
- 8004f2c: 4b6a ldr r3, [pc, #424] @ (80050d8 <Uart1ReceivedDataProcessCallback+0x5f4>)
- 8004f2e: f04f 0200 mov.w r2, #0
- 8004f32: 621a str r2, [r3, #32]
- }
- osMutexRelease (sensorsInfoMutex);
- 8004f34: 4b66 ldr r3, [pc, #408] @ (80050d0 <Uart1ReceivedDataProcessCallback+0x5ec>)
- 8004f36: 681b ldr r3, [r3, #0]
- 8004f38: 4618 mov r0, r3
- 8004f3a: f00e ff3b bl 8013db4 <osMutexRelease>
- respStatus = spOK;
- 8004f3e: 2300 movs r3, #0
- 8004f40: f887 306f strb.w r3, [r7, #111] @ 0x6f
- } else {
- respStatus = spInternalError;
- }
- break;
- 8004f44: e262 b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- respStatus = spInternalError;
- 8004f46: 23fc movs r3, #252 @ 0xfc
- 8004f48: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 8004f4c: e25e b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- case spSetMotorYOn:
- int32_t motorYPWMPulse = 0;
- 8004f4e: 2300 movs r3, #0
- 8004f50: 623b str r3, [r7, #32]
- int32_t motorYTimerPeriod = 0;
- 8004f52: 2300 movs r3, #0
- 8004f54: 61fb str r3, [r7, #28]
- uint32_t motorYStatus = 0;
- 8004f56: 2300 movs r3, #0
- 8004f58: 63fb str r3, [r7, #60] @ 0x3c
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, (uint32_t*)&motorYPWMPulse);
- 8004f5a: 683b ldr r3, [r7, #0]
- 8004f5c: 330c adds r3, #12
- 8004f5e: f107 0220 add.w r2, r7, #32
- 8004f62: f107 0134 add.w r1, r7, #52 @ 0x34
- 8004f66: 4618 mov r0, r3
- 8004f68: f7fe f9b3 bl 80032d2 <ReadWordFromBufer>
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, (uint32_t*)&motorYTimerPeriod);
- 8004f6c: 683b ldr r3, [r7, #0]
- 8004f6e: 330c adds r3, #12
- 8004f70: f107 021c add.w r2, r7, #28
- 8004f74: f107 0134 add.w r1, r7, #52 @ 0x34
- 8004f78: 4618 mov r0, r3
- 8004f7a: f7fe f9aa bl 80032d2 <ReadWordFromBufer>
- if (osMutexAcquire (sensorsInfoMutex, osWaitForever) == osOK) {
- 8004f7e: 4b54 ldr r3, [pc, #336] @ (80050d0 <Uart1ReceivedDataProcessCallback+0x5ec>)
- 8004f80: 681b ldr r3, [r3, #0]
- 8004f82: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8004f86: 4618 mov r0, r3
- 8004f88: f00e fec9 bl 8013d1e <osMutexAcquire>
- 8004f8c: 4603 mov r3, r0
- 8004f8e: 2b00 cmp r3, #0
- 8004f90: d12a bne.n 8004fe8 <Uart1ReceivedDataProcessCallback+0x504>
- motorYStatus =
- motorControl (&htim3, &motorXYTimerConfigOC, TIM_CHANNEL_3, TIM_CHANNEL_4, motorYTimerHandle, motorYPWMPulse, motorYTimerPeriod, sensorsInfo.limitYSwitchUp, sensorsInfo.limitYSwitchDown);
- 8004f92: 4b54 ldr r3, [pc, #336] @ (80050e4 <Uart1ReceivedDataProcessCallback+0x600>)
- 8004f94: 681b ldr r3, [r3, #0]
- 8004f96: 6a3a ldr r2, [r7, #32]
- 8004f98: 69f9 ldr r1, [r7, #28]
- 8004f9a: 484f ldr r0, [pc, #316] @ (80050d8 <Uart1ReceivedDataProcessCallback+0x5f4>)
- 8004f9c: f890 002b ldrb.w r0, [r0, #43] @ 0x2b
- 8004fa0: 4c4d ldr r4, [pc, #308] @ (80050d8 <Uart1ReceivedDataProcessCallback+0x5f4>)
- 8004fa2: f894 402c ldrb.w r4, [r4, #44] @ 0x2c
- 8004fa6: 9404 str r4, [sp, #16]
- 8004fa8: 9003 str r0, [sp, #12]
- 8004faa: 9102 str r1, [sp, #8]
- 8004fac: 9201 str r2, [sp, #4]
- 8004fae: 9300 str r3, [sp, #0]
- 8004fb0: 230c movs r3, #12
- 8004fb2: 2208 movs r2, #8
- 8004fb4: 4949 ldr r1, [pc, #292] @ (80050dc <Uart1ReceivedDataProcessCallback+0x5f8>)
- 8004fb6: 484a ldr r0, [pc, #296] @ (80050e0 <Uart1ReceivedDataProcessCallback+0x5fc>)
- 8004fb8: f7fd ffb4 bl 8002f24 <motorControl>
- 8004fbc: 4603 mov r3, r0
- motorYStatus =
- 8004fbe: 63fb str r3, [r7, #60] @ 0x3c
- sensorsInfo.motorYStatus = motorYStatus;
- 8004fc0: 6bfb ldr r3, [r7, #60] @ 0x3c
- 8004fc2: b2da uxtb r2, r3
- 8004fc4: 4b44 ldr r3, [pc, #272] @ (80050d8 <Uart1ReceivedDataProcessCallback+0x5f4>)
- 8004fc6: 755a strb r2, [r3, #21]
- if (motorYStatus == 1) {
- 8004fc8: 6bfb ldr r3, [r7, #60] @ 0x3c
- 8004fca: 2b01 cmp r3, #1
- 8004fcc: d103 bne.n 8004fd6 <Uart1ReceivedDataProcessCallback+0x4f2>
- sensorsInfo.motorYPeakCurrent = 0.0;
- 8004fce: 4b42 ldr r3, [pc, #264] @ (80050d8 <Uart1ReceivedDataProcessCallback+0x5f4>)
- 8004fd0: f04f 0200 mov.w r2, #0
- 8004fd4: 625a str r2, [r3, #36] @ 0x24
- }
- osMutexRelease (sensorsInfoMutex);
- 8004fd6: 4b3e ldr r3, [pc, #248] @ (80050d0 <Uart1ReceivedDataProcessCallback+0x5ec>)
- 8004fd8: 681b ldr r3, [r3, #0]
- 8004fda: 4618 mov r0, r3
- 8004fdc: f00e feea bl 8013db4 <osMutexRelease>
- respStatus = spOK;
- 8004fe0: 2300 movs r3, #0
- 8004fe2: f887 306f strb.w r3, [r7, #111] @ 0x6f
- } else {
- respStatus = spInternalError;
- }
- break;
- 8004fe6: e211 b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- respStatus = spInternalError;
- 8004fe8: 23fc movs r3, #252 @ 0xfc
- 8004fea: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 8004fee: e20d b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- case spSetDiodeOn:
- osTimerStop (debugLedTimerHandle);
- 8004ff0: 4b3d ldr r3, [pc, #244] @ (80050e8 <Uart1ReceivedDataProcessCallback+0x604>)
- 8004ff2: 681b ldr r3, [r3, #0]
- 8004ff4: 4618 mov r0, r3
- 8004ff6: f00e fdd5 bl 8013ba4 <osTimerStop>
- int32_t dbgLedTimerPeriod = 0;
- 8004ffa: 2300 movs r3, #0
- 8004ffc: 61bb str r3, [r7, #24]
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, (uint32_t*)&dbgLedTimerPeriod);
- 8004ffe: 683b ldr r3, [r7, #0]
- 8005000: 330c adds r3, #12
- 8005002: f107 0218 add.w r2, r7, #24
- 8005006: f107 0134 add.w r1, r7, #52 @ 0x34
- 800500a: 4618 mov r0, r3
- 800500c: f7fe f961 bl 80032d2 <ReadWordFromBufer>
- if (dbgLedTimerPeriod > 0) {
- 8005010: 69bb ldr r3, [r7, #24]
- 8005012: 2b00 cmp r3, #0
- 8005014: dd0e ble.n 8005034 <Uart1ReceivedDataProcessCallback+0x550>
- osTimerStart (debugLedTimerHandle, dbgLedTimerPeriod * 1000);
- 8005016: 4b34 ldr r3, [pc, #208] @ (80050e8 <Uart1ReceivedDataProcessCallback+0x604>)
- 8005018: 681a ldr r2, [r3, #0]
- 800501a: 69bb ldr r3, [r7, #24]
- 800501c: f44f 717a mov.w r1, #1000 @ 0x3e8
- 8005020: fb01 f303 mul.w r3, r1, r3
- 8005024: 4619 mov r1, r3
- 8005026: 4610 mov r0, r2
- 8005028: f00e fd8e bl 8013b48 <osTimerStart>
- DbgLEDOn (DBG_LED1);
- 800502c: 2010 movs r0, #16
- 800502e: f7fd feeb bl 8002e08 <DbgLEDOn>
- 8005032: e017 b.n 8005064 <Uart1ReceivedDataProcessCallback+0x580>
- } else if (dbgLedTimerPeriod == 0) {
- 8005034: 69bb ldr r3, [r7, #24]
- 8005036: 2b00 cmp r3, #0
- 8005038: d108 bne.n 800504c <Uart1ReceivedDataProcessCallback+0x568>
- osTimerStop (debugLedTimerHandle);
- 800503a: 4b2b ldr r3, [pc, #172] @ (80050e8 <Uart1ReceivedDataProcessCallback+0x604>)
- 800503c: 681b ldr r3, [r3, #0]
- 800503e: 4618 mov r0, r3
- 8005040: f00e fdb0 bl 8013ba4 <osTimerStop>
- DbgLEDOff (DBG_LED1);
- 8005044: 2010 movs r0, #16
- 8005046: f7fd fef1 bl 8002e2c <DbgLEDOff>
- 800504a: e00b b.n 8005064 <Uart1ReceivedDataProcessCallback+0x580>
- } else if (dbgLedTimerPeriod == -1) {
- 800504c: 69bb ldr r3, [r7, #24]
- 800504e: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 8005052: d107 bne.n 8005064 <Uart1ReceivedDataProcessCallback+0x580>
- osTimerStop (debugLedTimerHandle);
- 8005054: 4b24 ldr r3, [pc, #144] @ (80050e8 <Uart1ReceivedDataProcessCallback+0x604>)
- 8005056: 681b ldr r3, [r3, #0]
- 8005058: 4618 mov r0, r3
- 800505a: f00e fda3 bl 8013ba4 <osTimerStop>
- DbgLEDOn (DBG_LED1);
- 800505e: 2010 movs r0, #16
- 8005060: f7fd fed2 bl 8002e08 <DbgLEDOn>
- }
- respStatus = spOK;
- 8005064: 2300 movs r3, #0
- 8005066: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 800506a: e1cf b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- case spSetmotorXMaxCurrent:
- float motorXMaxCurrent = 0;
- 800506c: f04f 0300 mov.w r3, #0
- 8005070: 617b str r3, [r7, #20]
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, (uint32_t*)&motorXMaxCurrent);
- 8005072: 683b ldr r3, [r7, #0]
- 8005074: 330c adds r3, #12
- 8005076: f107 0214 add.w r2, r7, #20
- 800507a: f107 0134 add.w r1, r7, #52 @ 0x34
- 800507e: 4618 mov r0, r3
- 8005080: f7fe f927 bl 80032d2 <ReadWordFromBufer>
- uint32_t dacDataCh1 = (uint32_t)(4095 * motorXMaxCurrent / (EXT_VREF_mV * 0.001));
- 8005084: edd7 7a05 vldr s15, [r7, #20]
- 8005088: ed9f 7a19 vldr s14, [pc, #100] @ 80050f0 <Uart1ReceivedDataProcessCallback+0x60c>
- 800508c: ee67 7a87 vmul.f32 s15, s15, s14
- 8005090: eeb7 6ae7 vcvt.f64.f32 d6, s15
- 8005094: eeb0 5b08 vmov.f64 d5, #8 @ 0x40400000 3.0
- 8005098: ee86 7b05 vdiv.f64 d7, d6, d5
- 800509c: eefc 7bc7 vcvt.u32.f64 s15, d7
- 80050a0: ee17 3a90 vmov r3, s15
- 80050a4: 643b str r3, [r7, #64] @ 0x40
- HAL_DAC_SetValue (&hdac1, DAC_CHANNEL_1, DAC_ALIGN_12B_R, dacDataCh1);
- 80050a6: 6c3b ldr r3, [r7, #64] @ 0x40
- 80050a8: 2200 movs r2, #0
- 80050aa: 2100 movs r1, #0
- 80050ac: 480f ldr r0, [pc, #60] @ (80050ec <Uart1ReceivedDataProcessCallback+0x608>)
- 80050ae: f002 fc76 bl 800799e <HAL_DAC_SetValue>
- HAL_DAC_Start (&hdac1, DAC_CHANNEL_1);
- 80050b2: 2100 movs r1, #0
- 80050b4: 480d ldr r0, [pc, #52] @ (80050ec <Uart1ReceivedDataProcessCallback+0x608>)
- 80050b6: f002 fbc5 bl 8007844 <HAL_DAC_Start>
- respStatus = spOK;
- 80050ba: 2300 movs r3, #0
- 80050bc: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 80050c0: e1a4 b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- 80050c2: bf00 nop
- 80050c4: 24000734 .word 0x24000734
- 80050c8: 240007c4 .word 0x240007c4
- 80050cc: 2400045c .word 0x2400045c
- 80050d0: 2400083c .word 0x2400083c
- 80050d4: 24000764 .word 0x24000764
- 80050d8: 24000880 .word 0x24000880
- 80050dc: 240007e0 .word 0x240007e0
- 80050e0: 240004f4 .word 0x240004f4
- 80050e4: 24000794 .word 0x24000794
- 80050e8: 24000704 .word 0x24000704
- 80050ec: 24000424 .word 0x24000424
- 80050f0: 457ff000 .word 0x457ff000
- case spSetmotorYMaxCurrent:
- float motorYMaxCurrent = 0;
- 80050f4: f04f 0300 mov.w r3, #0
- 80050f8: 613b str r3, [r7, #16]
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, (uint32_t*)&motorYMaxCurrent);
- 80050fa: 683b ldr r3, [r7, #0]
- 80050fc: 330c adds r3, #12
- 80050fe: f107 0210 add.w r2, r7, #16
- 8005102: f107 0134 add.w r1, r7, #52 @ 0x34
- 8005106: 4618 mov r0, r3
- 8005108: f7fe f8e3 bl 80032d2 <ReadWordFromBufer>
- uint32_t dacDataCh2 = (uint32_t)(4095 * motorYMaxCurrent / (EXT_VREF_mV * 0.001));
- 800510c: edd7 7a04 vldr s15, [r7, #16]
- 8005110: ed1f 7a09 vldr s14, [pc, #-36] @ 80050f0 <Uart1ReceivedDataProcessCallback+0x60c>
- 8005114: ee67 7a87 vmul.f32 s15, s15, s14
- 8005118: eeb7 6ae7 vcvt.f64.f32 d6, s15
- 800511c: eeb0 5b08 vmov.f64 d5, #8 @ 0x40400000 3.0
- 8005120: ee86 7b05 vdiv.f64 d7, d6, d5
- 8005124: eefc 7bc7 vcvt.u32.f64 s15, d7
- 8005128: ee17 3a90 vmov r3, s15
- 800512c: 647b str r3, [r7, #68] @ 0x44
- HAL_DAC_SetValue (&hdac1, DAC_CHANNEL_2, DAC_ALIGN_12B_R, dacDataCh2);
- 800512e: 6c7b ldr r3, [r7, #68] @ 0x44
- 8005130: 2200 movs r2, #0
- 8005132: 2110 movs r1, #16
- 8005134: 48ac ldr r0, [pc, #688] @ (80053e8 <Uart1ReceivedDataProcessCallback+0x904>)
- 8005136: f002 fc32 bl 800799e <HAL_DAC_SetValue>
- HAL_DAC_Start (&hdac1, DAC_CHANNEL_2);
- 800513a: 2110 movs r1, #16
- 800513c: 48aa ldr r0, [pc, #680] @ (80053e8 <Uart1ReceivedDataProcessCallback+0x904>)
- 800513e: f002 fb81 bl 8007844 <HAL_DAC_Start>
- respStatus = spOK;
- 8005142: 2300 movs r3, #0
- 8005144: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 8005148: e160 b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- case spClearPeakMeasurments:
- if (osMutexAcquire (resMeasurementsMutex, osWaitForever) == osOK) {
- 800514a: 4ba8 ldr r3, [pc, #672] @ (80053ec <Uart1ReceivedDataProcessCallback+0x908>)
- 800514c: 681b ldr r3, [r3, #0]
- 800514e: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8005152: 4618 mov r0, r3
- 8005154: f00e fde3 bl 8013d1e <osMutexAcquire>
- 8005158: 4603 mov r3, r0
- 800515a: 2b00 cmp r3, #0
- 800515c: d12a bne.n 80051b4 <Uart1ReceivedDataProcessCallback+0x6d0>
- for (int i = 0; i < 3; i++) {
- 800515e: 2300 movs r3, #0
- 8005160: 657b str r3, [r7, #84] @ 0x54
- 8005162: e01b b.n 800519c <Uart1ReceivedDataProcessCallback+0x6b8>
- resMeasurements.voltagePeak[i] = resMeasurements.voltageRMS[i];
- 8005164: 4aa2 ldr r2, [pc, #648] @ (80053f0 <Uart1ReceivedDataProcessCallback+0x90c>)
- 8005166: 6d7b ldr r3, [r7, #84] @ 0x54
- 8005168: 009b lsls r3, r3, #2
- 800516a: 4413 add r3, r2
- 800516c: 681a ldr r2, [r3, #0]
- 800516e: 49a0 ldr r1, [pc, #640] @ (80053f0 <Uart1ReceivedDataProcessCallback+0x90c>)
- 8005170: 6d7b ldr r3, [r7, #84] @ 0x54
- 8005172: 3302 adds r3, #2
- 8005174: 009b lsls r3, r3, #2
- 8005176: 440b add r3, r1
- 8005178: 3304 adds r3, #4
- 800517a: 601a str r2, [r3, #0]
- resMeasurements.currentPeak[i] = resMeasurements.currentRMS[i];
- 800517c: 4a9c ldr r2, [pc, #624] @ (80053f0 <Uart1ReceivedDataProcessCallback+0x90c>)
- 800517e: 6d7b ldr r3, [r7, #84] @ 0x54
- 8005180: 3306 adds r3, #6
- 8005182: 009b lsls r3, r3, #2
- 8005184: 4413 add r3, r2
- 8005186: 681a ldr r2, [r3, #0]
- 8005188: 4999 ldr r1, [pc, #612] @ (80053f0 <Uart1ReceivedDataProcessCallback+0x90c>)
- 800518a: 6d7b ldr r3, [r7, #84] @ 0x54
- 800518c: 3308 adds r3, #8
- 800518e: 009b lsls r3, r3, #2
- 8005190: 440b add r3, r1
- 8005192: 3304 adds r3, #4
- 8005194: 601a str r2, [r3, #0]
- for (int i = 0; i < 3; i++) {
- 8005196: 6d7b ldr r3, [r7, #84] @ 0x54
- 8005198: 3301 adds r3, #1
- 800519a: 657b str r3, [r7, #84] @ 0x54
- 800519c: 6d7b ldr r3, [r7, #84] @ 0x54
- 800519e: 2b02 cmp r3, #2
- 80051a0: dde0 ble.n 8005164 <Uart1ReceivedDataProcessCallback+0x680>
- }
- osMutexRelease (resMeasurementsMutex);
- 80051a2: 4b92 ldr r3, [pc, #584] @ (80053ec <Uart1ReceivedDataProcessCallback+0x908>)
- 80051a4: 681b ldr r3, [r3, #0]
- 80051a6: 4618 mov r0, r3
- 80051a8: f00e fe04 bl 8013db4 <osMutexRelease>
- respStatus = spOK;
- 80051ac: 2300 movs r3, #0
- 80051ae: f887 306f strb.w r3, [r7, #111] @ 0x6f
- } else {
- respStatus = spInternalError;
- }
- break;
- 80051b2: e12b b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- respStatus = spInternalError;
- 80051b4: 23fc movs r3, #252 @ 0xfc
- 80051b6: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 80051ba: e127 b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- case spSetEncoderXValue:
- float enocoderXValue = 0;
- 80051bc: f04f 0300 mov.w r3, #0
- 80051c0: 60fb str r3, [r7, #12]
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, (uint32_t*)&enocoderXValue);
- 80051c2: 683b ldr r3, [r7, #0]
- 80051c4: 330c adds r3, #12
- 80051c6: f107 020c add.w r2, r7, #12
- 80051ca: f107 0134 add.w r1, r7, #52 @ 0x34
- 80051ce: 4618 mov r0, r3
- 80051d0: f7fe f87f bl 80032d2 <ReadWordFromBufer>
- if (osMutexAcquire (sensorsInfoMutex, osWaitForever) == osOK) {
- 80051d4: 4b87 ldr r3, [pc, #540] @ (80053f4 <Uart1ReceivedDataProcessCallback+0x910>)
- 80051d6: 681b ldr r3, [r3, #0]
- 80051d8: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 80051dc: 4618 mov r0, r3
- 80051de: f00e fd9e bl 8013d1e <osMutexAcquire>
- 80051e2: 4603 mov r3, r0
- 80051e4: 2b00 cmp r3, #0
- 80051e6: d10b bne.n 8005200 <Uart1ReceivedDataProcessCallback+0x71c>
- sensorsInfo.pvEncoderX = enocoderXValue;
- 80051e8: 68fb ldr r3, [r7, #12]
- 80051ea: 4a83 ldr r2, [pc, #524] @ (80053f8 <Uart1ReceivedDataProcessCallback+0x914>)
- 80051ec: 60d3 str r3, [r2, #12]
- osMutexRelease (sensorsInfoMutex);
- 80051ee: 4b81 ldr r3, [pc, #516] @ (80053f4 <Uart1ReceivedDataProcessCallback+0x910>)
- 80051f0: 681b ldr r3, [r3, #0]
- 80051f2: 4618 mov r0, r3
- 80051f4: f00e fdde bl 8013db4 <osMutexRelease>
- respStatus = spOK;
- 80051f8: 2300 movs r3, #0
- 80051fa: f887 306f strb.w r3, [r7, #111] @ 0x6f
- } else {
- respStatus = spInternalError;
- }
- break;
- 80051fe: e105 b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- respStatus = spInternalError;
- 8005200: 23fc movs r3, #252 @ 0xfc
- 8005202: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 8005206: e101 b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- case spSetEncoderYValue:
- float enocoderYValue = 0;
- 8005208: f04f 0300 mov.w r3, #0
- 800520c: 60bb str r3, [r7, #8]
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, (uint32_t*)&enocoderYValue);
- 800520e: 683b ldr r3, [r7, #0]
- 8005210: 330c adds r3, #12
- 8005212: f107 0208 add.w r2, r7, #8
- 8005216: f107 0134 add.w r1, r7, #52 @ 0x34
- 800521a: 4618 mov r0, r3
- 800521c: f7fe f859 bl 80032d2 <ReadWordFromBufer>
- if (osMutexAcquire (sensorsInfoMutex, osWaitForever) == osOK) {
- 8005220: 4b74 ldr r3, [pc, #464] @ (80053f4 <Uart1ReceivedDataProcessCallback+0x910>)
- 8005222: 681b ldr r3, [r3, #0]
- 8005224: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8005228: 4618 mov r0, r3
- 800522a: f00e fd78 bl 8013d1e <osMutexAcquire>
- 800522e: 4603 mov r3, r0
- 8005230: 2b00 cmp r3, #0
- 8005232: d10b bne.n 800524c <Uart1ReceivedDataProcessCallback+0x768>
- sensorsInfo.pvEncoderY = enocoderYValue;
- 8005234: 68bb ldr r3, [r7, #8]
- 8005236: 4a70 ldr r2, [pc, #448] @ (80053f8 <Uart1ReceivedDataProcessCallback+0x914>)
- 8005238: 6113 str r3, [r2, #16]
- osMutexRelease (sensorsInfoMutex);
- 800523a: 4b6e ldr r3, [pc, #440] @ (80053f4 <Uart1ReceivedDataProcessCallback+0x910>)
- 800523c: 681b ldr r3, [r3, #0]
- 800523e: 4618 mov r0, r3
- 8005240: f00e fdb8 bl 8013db4 <osMutexRelease>
- respStatus = spOK;
- 8005244: 2300 movs r3, #0
- 8005246: f887 306f strb.w r3, [r7, #111] @ 0x6f
- } else {
- respStatus = spInternalError;
- }
- break;
- 800524a: e0df b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- respStatus = spInternalError;
- 800524c: 23fc movs r3, #252 @ 0xfc
- 800524e: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 8005252: e0db b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- case spSetVoltageMeasGains:
- if (osMutexAcquire (resMeasurementsMutex, osWaitForever) == osOK) {
- 8005254: 4b65 ldr r3, [pc, #404] @ (80053ec <Uart1ReceivedDataProcessCallback+0x908>)
- 8005256: 681b ldr r3, [r3, #0]
- 8005258: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 800525c: 4618 mov r0, r3
- 800525e: f00e fd5e bl 8013d1e <osMutexAcquire>
- 8005262: 4603 mov r3, r0
- 8005264: 2b00 cmp r3, #0
- 8005266: d122 bne.n 80052ae <Uart1ReceivedDataProcessCallback+0x7ca>
- for (uint8_t i = 0; i < 3; i++) {
- 8005268: 2300 movs r3, #0
- 800526a: f887 3053 strb.w r3, [r7, #83] @ 0x53
- 800526e: e011 b.n 8005294 <Uart1ReceivedDataProcessCallback+0x7b0>
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, (uint32_t*)&U_MeasCorrectionData[i].gain);
- 8005270: 683b ldr r3, [r7, #0]
- 8005272: f103 000c add.w r0, r3, #12
- 8005276: f897 3053 ldrb.w r3, [r7, #83] @ 0x53
- 800527a: 00db lsls r3, r3, #3
- 800527c: 4a5f ldr r2, [pc, #380] @ (80053fc <Uart1ReceivedDataProcessCallback+0x918>)
- 800527e: 441a add r2, r3
- 8005280: f107 0334 add.w r3, r7, #52 @ 0x34
- 8005284: 4619 mov r1, r3
- 8005286: f7fe f824 bl 80032d2 <ReadWordFromBufer>
- for (uint8_t i = 0; i < 3; i++) {
- 800528a: f897 3053 ldrb.w r3, [r7, #83] @ 0x53
- 800528e: 3301 adds r3, #1
- 8005290: f887 3053 strb.w r3, [r7, #83] @ 0x53
- 8005294: f897 3053 ldrb.w r3, [r7, #83] @ 0x53
- 8005298: 2b02 cmp r3, #2
- 800529a: d9e9 bls.n 8005270 <Uart1ReceivedDataProcessCallback+0x78c>
- }
- osMutexRelease (resMeasurementsMutex);
- 800529c: 4b53 ldr r3, [pc, #332] @ (80053ec <Uart1ReceivedDataProcessCallback+0x908>)
- 800529e: 681b ldr r3, [r3, #0]
- 80052a0: 4618 mov r0, r3
- 80052a2: f00e fd87 bl 8013db4 <osMutexRelease>
- respStatus = spOK;
- 80052a6: 2300 movs r3, #0
- 80052a8: f887 306f strb.w r3, [r7, #111] @ 0x6f
- } else {
- respStatus = spInternalError;
- }
- break;
- 80052ac: e0ae b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- respStatus = spInternalError;
- 80052ae: 23fc movs r3, #252 @ 0xfc
- 80052b0: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 80052b4: e0aa b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- case spSetVoltageMeasOffsets:
- if (osMutexAcquire (resMeasurementsMutex, osWaitForever) == osOK) {
- 80052b6: 4b4d ldr r3, [pc, #308] @ (80053ec <Uart1ReceivedDataProcessCallback+0x908>)
- 80052b8: 681b ldr r3, [r3, #0]
- 80052ba: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 80052be: 4618 mov r0, r3
- 80052c0: f00e fd2d bl 8013d1e <osMutexAcquire>
- 80052c4: 4603 mov r3, r0
- 80052c6: 2b00 cmp r3, #0
- 80052c8: d123 bne.n 8005312 <Uart1ReceivedDataProcessCallback+0x82e>
- for (uint8_t i = 0; i < 3; i++) {
- 80052ca: 2300 movs r3, #0
- 80052cc: f887 3052 strb.w r3, [r7, #82] @ 0x52
- 80052d0: e012 b.n 80052f8 <Uart1ReceivedDataProcessCallback+0x814>
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, (uint32_t*)&U_MeasCorrectionData[i].offset);
- 80052d2: 683b ldr r3, [r7, #0]
- 80052d4: f103 000c add.w r0, r3, #12
- 80052d8: f897 3052 ldrb.w r3, [r7, #82] @ 0x52
- 80052dc: 00db lsls r3, r3, #3
- 80052de: 4a47 ldr r2, [pc, #284] @ (80053fc <Uart1ReceivedDataProcessCallback+0x918>)
- 80052e0: 4413 add r3, r2
- 80052e2: 1d1a adds r2, r3, #4
- 80052e4: f107 0334 add.w r3, r7, #52 @ 0x34
- 80052e8: 4619 mov r1, r3
- 80052ea: f7fd fff2 bl 80032d2 <ReadWordFromBufer>
- for (uint8_t i = 0; i < 3; i++) {
- 80052ee: f897 3052 ldrb.w r3, [r7, #82] @ 0x52
- 80052f2: 3301 adds r3, #1
- 80052f4: f887 3052 strb.w r3, [r7, #82] @ 0x52
- 80052f8: f897 3052 ldrb.w r3, [r7, #82] @ 0x52
- 80052fc: 2b02 cmp r3, #2
- 80052fe: d9e8 bls.n 80052d2 <Uart1ReceivedDataProcessCallback+0x7ee>
- }
- osMutexRelease (resMeasurementsMutex);
- 8005300: 4b3a ldr r3, [pc, #232] @ (80053ec <Uart1ReceivedDataProcessCallback+0x908>)
- 8005302: 681b ldr r3, [r3, #0]
- 8005304: 4618 mov r0, r3
- 8005306: f00e fd55 bl 8013db4 <osMutexRelease>
- respStatus = spOK;
- 800530a: 2300 movs r3, #0
- 800530c: f887 306f strb.w r3, [r7, #111] @ 0x6f
- } else {
- respStatus = spInternalError;
- }
- break;
- 8005310: e07c b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- respStatus = spInternalError;
- 8005312: 23fc movs r3, #252 @ 0xfc
- 8005314: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 8005318: e078 b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- case spSetCurrentMeasGains:
- if (osMutexAcquire (resMeasurementsMutex, osWaitForever) == osOK) {
- 800531a: 4b34 ldr r3, [pc, #208] @ (80053ec <Uart1ReceivedDataProcessCallback+0x908>)
- 800531c: 681b ldr r3, [r3, #0]
- 800531e: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8005322: 4618 mov r0, r3
- 8005324: f00e fcfb bl 8013d1e <osMutexAcquire>
- 8005328: 4603 mov r3, r0
- 800532a: 2b00 cmp r3, #0
- 800532c: d122 bne.n 8005374 <Uart1ReceivedDataProcessCallback+0x890>
- for (uint8_t i = 0; i < 3; i++) {
- 800532e: 2300 movs r3, #0
- 8005330: f887 3051 strb.w r3, [r7, #81] @ 0x51
- 8005334: e011 b.n 800535a <Uart1ReceivedDataProcessCallback+0x876>
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, (uint32_t*)&I_MeasCorrectionData[i].gain);
- 8005336: 683b ldr r3, [r7, #0]
- 8005338: f103 000c add.w r0, r3, #12
- 800533c: f897 3051 ldrb.w r3, [r7, #81] @ 0x51
- 8005340: 00db lsls r3, r3, #3
- 8005342: 4a2f ldr r2, [pc, #188] @ (8005400 <Uart1ReceivedDataProcessCallback+0x91c>)
- 8005344: 441a add r2, r3
- 8005346: f107 0334 add.w r3, r7, #52 @ 0x34
- 800534a: 4619 mov r1, r3
- 800534c: f7fd ffc1 bl 80032d2 <ReadWordFromBufer>
- for (uint8_t i = 0; i < 3; i++) {
- 8005350: f897 3051 ldrb.w r3, [r7, #81] @ 0x51
- 8005354: 3301 adds r3, #1
- 8005356: f887 3051 strb.w r3, [r7, #81] @ 0x51
- 800535a: f897 3051 ldrb.w r3, [r7, #81] @ 0x51
- 800535e: 2b02 cmp r3, #2
- 8005360: d9e9 bls.n 8005336 <Uart1ReceivedDataProcessCallback+0x852>
- }
- osMutexRelease (resMeasurementsMutex);
- 8005362: 4b22 ldr r3, [pc, #136] @ (80053ec <Uart1ReceivedDataProcessCallback+0x908>)
- 8005364: 681b ldr r3, [r3, #0]
- 8005366: 4618 mov r0, r3
- 8005368: f00e fd24 bl 8013db4 <osMutexRelease>
- respStatus = spOK;
- 800536c: 2300 movs r3, #0
- 800536e: f887 306f strb.w r3, [r7, #111] @ 0x6f
- } else {
- respStatus = spInternalError;
- }
- break;
- 8005372: e04b b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- respStatus = spInternalError;
- 8005374: 23fc movs r3, #252 @ 0xfc
- 8005376: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 800537a: e047 b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- case spSetCurrentMeasOffsets:
- if (osMutexAcquire (resMeasurementsMutex, osWaitForever) == osOK) {
- 800537c: 4b1b ldr r3, [pc, #108] @ (80053ec <Uart1ReceivedDataProcessCallback+0x908>)
- 800537e: 681b ldr r3, [r3, #0]
- 8005380: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8005384: 4618 mov r0, r3
- 8005386: f00e fcca bl 8013d1e <osMutexAcquire>
- 800538a: 4603 mov r3, r0
- 800538c: 2b00 cmp r3, #0
- 800538e: d123 bne.n 80053d8 <Uart1ReceivedDataProcessCallback+0x8f4>
- for (uint8_t i = 0; i < 3; i++) {
- 8005390: 2300 movs r3, #0
- 8005392: f887 3050 strb.w r3, [r7, #80] @ 0x50
- 8005396: e012 b.n 80053be <Uart1ReceivedDataProcessCallback+0x8da>
- ReadWordFromBufer (spFrameData->dataBuffer, &inputDataBufferPos, (uint32_t*)&I_MeasCorrectionData[i].offset);
- 8005398: 683b ldr r3, [r7, #0]
- 800539a: f103 000c add.w r0, r3, #12
- 800539e: f897 3050 ldrb.w r3, [r7, #80] @ 0x50
- 80053a2: 00db lsls r3, r3, #3
- 80053a4: 4a16 ldr r2, [pc, #88] @ (8005400 <Uart1ReceivedDataProcessCallback+0x91c>)
- 80053a6: 4413 add r3, r2
- 80053a8: 1d1a adds r2, r3, #4
- 80053aa: f107 0334 add.w r3, r7, #52 @ 0x34
- 80053ae: 4619 mov r1, r3
- 80053b0: f7fd ff8f bl 80032d2 <ReadWordFromBufer>
- for (uint8_t i = 0; i < 3; i++) {
- 80053b4: f897 3050 ldrb.w r3, [r7, #80] @ 0x50
- 80053b8: 3301 adds r3, #1
- 80053ba: f887 3050 strb.w r3, [r7, #80] @ 0x50
- 80053be: f897 3050 ldrb.w r3, [r7, #80] @ 0x50
- 80053c2: 2b02 cmp r3, #2
- 80053c4: d9e8 bls.n 8005398 <Uart1ReceivedDataProcessCallback+0x8b4>
- }
- osMutexRelease (resMeasurementsMutex);
- 80053c6: 4b09 ldr r3, [pc, #36] @ (80053ec <Uart1ReceivedDataProcessCallback+0x908>)
- 80053c8: 681b ldr r3, [r3, #0]
- 80053ca: 4618 mov r0, r3
- 80053cc: f00e fcf2 bl 8013db4 <osMutexRelease>
- respStatus = spOK;
- 80053d0: 2300 movs r3, #0
- 80053d2: f887 306f strb.w r3, [r7, #111] @ 0x6f
- } else {
- respStatus = spInternalError;
- }
- break;
- 80053d6: e019 b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- respStatus = spInternalError;
- 80053d8: 23fc movs r3, #252 @ 0xfc
- 80053da: f887 306f strb.w r3, [r7, #111] @ 0x6f
- break;
- 80053de: e015 b.n 800540c <Uart1ReceivedDataProcessCallback+0x928>
- __ASM volatile ("cpsid i" : : : "memory");
- 80053e0: b672 cpsid i
- }
- 80053e2: bf00 nop
- case spResetSystem:
- __disable_irq();
- NVIC_SystemReset();
- 80053e4: f7fe ffb0 bl 8004348 <__NVIC_SystemReset>
- 80053e8: 24000424 .word 0x24000424
- 80053ec: 24000838 .word 0x24000838
- 80053f0: 24000844 .word 0x24000844
- 80053f4: 2400083c .word 0x2400083c
- 80053f8: 24000880 .word 0x24000880
- 80053fc: 24000000 .word 0x24000000
- 8005400: 24000018 .word 0x24000018
- break;
- default: respStatus = spUnknownCommand; break;
- 8005404: 23fd movs r3, #253 @ 0xfd
- 8005406: f887 306f strb.w r3, [r7, #111] @ 0x6f
- 800540a: bf00 nop
- }
- dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData->frameHeader.frameId, spFrameData->frameHeader.frameCommand, respStatus, outputDataBuffer, outputDataBufferPos);
- 800540c: 6cfb ldr r3, [r7, #76] @ 0x4c
- 800540e: 6898 ldr r0, [r3, #8]
- 8005410: 683b ldr r3, [r7, #0]
- 8005412: 8819 ldrh r1, [r3, #0]
- 8005414: 683b ldr r3, [r7, #0]
- 8005416: 789a ldrb r2, [r3, #2]
- 8005418: 4b13 ldr r3, [pc, #76] @ (8005468 <Uart1ReceivedDataProcessCallback+0x984>)
- 800541a: 881b ldrh r3, [r3, #0]
- 800541c: f997 406f ldrsb.w r4, [r7, #111] @ 0x6f
- 8005420: 9301 str r3, [sp, #4]
- 8005422: 4b12 ldr r3, [pc, #72] @ (800546c <Uart1ReceivedDataProcessCallback+0x988>)
- 8005424: 9300 str r3, [sp, #0]
- 8005426: 4623 mov r3, r4
- 8005428: f7fd ff86 bl 8003338 <PrepareRespFrame>
- 800542c: 4603 mov r3, r0
- 800542e: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
- if (dataToSend > 0) {
- 8005432: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
- 8005436: 2b00 cmp r3, #0
- 8005438: d008 beq.n 800544c <Uart1ReceivedDataProcessCallback+0x968>
- HAL_UART_Transmit_IT (uartTaskData->huart, uartTaskData->uartTxBuffer, dataToSend);
- 800543a: 6cfb ldr r3, [r7, #76] @ 0x4c
- 800543c: 6b18 ldr r0, [r3, #48] @ 0x30
- 800543e: 6cfb ldr r3, [r7, #76] @ 0x4c
- 8005440: 689b ldr r3, [r3, #8]
- 8005442: f8b7 204a ldrh.w r2, [r7, #74] @ 0x4a
- 8005446: 4619 mov r1, r3
- 8005448: f00b fc3c bl 8010cc4 <HAL_UART_Transmit_IT>
- }
- printf ("Uart%d: TX bytes sent: %d\n", uartTaskData->uartNumber, dataToSend);
- 800544c: 6cfb ldr r3, [r7, #76] @ 0x4c
- 800544e: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
- 8005452: 4619 mov r1, r3
- 8005454: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
- 8005458: 461a mov r2, r3
- 800545a: 4805 ldr r0, [pc, #20] @ (8005470 <Uart1ReceivedDataProcessCallback+0x98c>)
- 800545c: f012 fc4e bl 8017cfc <iprintf>
- }
- 8005460: bf00 nop
- 8005462: 3774 adds r7, #116 @ 0x74
- 8005464: 46bd mov sp, r7
- 8005466: bd90 pop {r4, r7, pc}
- 8005468: 24000cf8 .word 0x24000cf8
- 800546c: 24000c78 .word 0x24000c78
- 8005470: 08018b80 .word 0x08018b80
- 08005474 <Reset_Handler>:
- .section .text.Reset_Handler
- .weak Reset_Handler
- .type Reset_Handler, %function
- Reset_Handler:
- ldr sp, =_estack /* set stack pointer */
- 8005474: f8df d034 ldr.w sp, [pc, #52] @ 80054ac <LoopFillZerobss+0xe>
- /* Call the clock system initialization function.*/
- bl SystemInit
- 8005478: f7fe fede bl 8004238 <SystemInit>
- /* Copy the data segment initializers from flash to SRAM */
- ldr r0, =_sdata
- 800547c: 480c ldr r0, [pc, #48] @ (80054b0 <LoopFillZerobss+0x12>)
- ldr r1, =_edata
- 800547e: 490d ldr r1, [pc, #52] @ (80054b4 <LoopFillZerobss+0x16>)
- ldr r2, =_sidata
- 8005480: 4a0d ldr r2, [pc, #52] @ (80054b8 <LoopFillZerobss+0x1a>)
- movs r3, #0
- 8005482: 2300 movs r3, #0
- b LoopCopyDataInit
- 8005484: e002 b.n 800548c <LoopCopyDataInit>
- 08005486 <CopyDataInit>:
- CopyDataInit:
- ldr r4, [r2, r3]
- 8005486: 58d4 ldr r4, [r2, r3]
- str r4, [r0, r3]
- 8005488: 50c4 str r4, [r0, r3]
- adds r3, r3, #4
- 800548a: 3304 adds r3, #4
- 0800548c <LoopCopyDataInit>:
- LoopCopyDataInit:
- adds r4, r0, r3
- 800548c: 18c4 adds r4, r0, r3
- cmp r4, r1
- 800548e: 428c cmp r4, r1
- bcc CopyDataInit
- 8005490: d3f9 bcc.n 8005486 <CopyDataInit>
- /* Zero fill the bss segment. */
- ldr r2, =_sbss
- 8005492: 4a0a ldr r2, [pc, #40] @ (80054bc <LoopFillZerobss+0x1e>)
- ldr r4, =_ebss
- 8005494: 4c0a ldr r4, [pc, #40] @ (80054c0 <LoopFillZerobss+0x22>)
- movs r3, #0
- 8005496: 2300 movs r3, #0
- b LoopFillZerobss
- 8005498: e001 b.n 800549e <LoopFillZerobss>
- 0800549a <FillZerobss>:
- FillZerobss:
- str r3, [r2]
- 800549a: 6013 str r3, [r2, #0]
- adds r2, r2, #4
- 800549c: 3204 adds r2, #4
- 0800549e <LoopFillZerobss>:
- LoopFillZerobss:
- cmp r2, r4
- 800549e: 42a2 cmp r2, r4
- bcc FillZerobss
- 80054a0: d3fb bcc.n 800549a <FillZerobss>
- /* Call static constructors */
- bl __libc_init_array
- 80054a2: f012 fd2b bl 8017efc <__libc_init_array>
- /* Call the application's entry point.*/
- bl main
- 80054a6: f7fb f937 bl 8000718 <main>
- bx lr
- 80054aa: 4770 bx lr
- ldr sp, =_estack /* set stack pointer */
- 80054ac: 24060000 .word 0x24060000
- ldr r0, =_sdata
- 80054b0: 24000000 .word 0x24000000
- ldr r1, =_edata
- 80054b4: 240000a4 .word 0x240000a4
- ldr r2, =_sidata
- 80054b8: 08018c9c .word 0x08018c9c
- ldr r2, =_sbss
- 80054bc: 240000c0 .word 0x240000c0
- ldr r4, =_ebss
- 80054c0: 24012e34 .word 0x24012e34
- 080054c4 <ADC3_IRQHandler>:
- * @retval None
- */
- .section .text.Default_Handler,"ax",%progbits
- Default_Handler:
- Infinite_Loop:
- b Infinite_Loop
- 80054c4: e7fe b.n 80054c4 <ADC3_IRQHandler>
- ...
- 080054c8 <HAL_Init>:
- * need to ensure that the SysTick time base is always set to 1 millisecond
- * to have correct HAL operation.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_Init(void)
- {
- 80054c8: b580 push {r7, lr}
- 80054ca: b082 sub sp, #8
- 80054cc: af00 add r7, sp, #0
- __HAL_ART_CONFIG_BASE_ADDRESS(0x08100000UL); /* Configure the Cortex-M4 ART Base address to the Flash Bank 2 : */
- __HAL_ART_ENABLE(); /* Enable the Cortex-M4 ART */
- #endif /* DUAL_CORE && CORE_CM4 */
- /* Set Interrupt Group Priority */
- HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
- 80054ce: 2003 movs r0, #3
- 80054d0: f001 fee5 bl 800729e <HAL_NVIC_SetPriorityGrouping>
- /* Update the SystemCoreClock global variable */
- #if defined(RCC_D1CFGR_D1CPRE)
- common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU);
- 80054d4: f006 fbee bl 800bcb4 <HAL_RCC_GetSysClockFreq>
- 80054d8: 4602 mov r2, r0
- 80054da: 4b15 ldr r3, [pc, #84] @ (8005530 <HAL_Init+0x68>)
- 80054dc: 699b ldr r3, [r3, #24]
- 80054de: 0a1b lsrs r3, r3, #8
- 80054e0: f003 030f and.w r3, r3, #15
- 80054e4: 4913 ldr r1, [pc, #76] @ (8005534 <HAL_Init+0x6c>)
- 80054e6: 5ccb ldrb r3, [r1, r3]
- 80054e8: f003 031f and.w r3, r3, #31
- 80054ec: fa22 f303 lsr.w r3, r2, r3
- 80054f0: 607b str r3, [r7, #4]
- common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU);
- #endif
- /* Update the SystemD2Clock global variable */
- #if defined(RCC_D1CFGR_HPRE)
- SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
- 80054f2: 4b0f ldr r3, [pc, #60] @ (8005530 <HAL_Init+0x68>)
- 80054f4: 699b ldr r3, [r3, #24]
- 80054f6: f003 030f and.w r3, r3, #15
- 80054fa: 4a0e ldr r2, [pc, #56] @ (8005534 <HAL_Init+0x6c>)
- 80054fc: 5cd3 ldrb r3, [r2, r3]
- 80054fe: f003 031f and.w r3, r3, #31
- 8005502: 687a ldr r2, [r7, #4]
- 8005504: fa22 f303 lsr.w r3, r2, r3
- 8005508: 4a0b ldr r2, [pc, #44] @ (8005538 <HAL_Init+0x70>)
- 800550a: 6013 str r3, [r2, #0]
- #endif
- #if defined(DUAL_CORE) && defined(CORE_CM4)
- SystemCoreClock = SystemD2Clock;
- #else
- SystemCoreClock = common_system_clock;
- 800550c: 4a0b ldr r2, [pc, #44] @ (800553c <HAL_Init+0x74>)
- 800550e: 687b ldr r3, [r7, #4]
- 8005510: 6013 str r3, [r2, #0]
- #endif /* DUAL_CORE && CORE_CM4 */
- /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
- if(HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
- 8005512: 2005 movs r0, #5
- 8005514: f7fe fce4 bl 8003ee0 <HAL_InitTick>
- 8005518: 4603 mov r3, r0
- 800551a: 2b00 cmp r3, #0
- 800551c: d001 beq.n 8005522 <HAL_Init+0x5a>
- {
- return HAL_ERROR;
- 800551e: 2301 movs r3, #1
- 8005520: e002 b.n 8005528 <HAL_Init+0x60>
- }
- /* Init the low level hardware */
- HAL_MspInit();
- 8005522: f7fd ffa7 bl 8003474 <HAL_MspInit>
- /* Return function status */
- return HAL_OK;
- 8005526: 2300 movs r3, #0
- }
- 8005528: 4618 mov r0, r3
- 800552a: 3708 adds r7, #8
- 800552c: 46bd mov sp, r7
- 800552e: bd80 pop {r7, pc}
- 8005530: 58024400 .word 0x58024400
- 8005534: 08018c18 .word 0x08018c18
- 8005538: 24000038 .word 0x24000038
- 800553c: 24000034 .word 0x24000034
- 08005540 <HAL_IncTick>:
- * @note This function is declared as __weak to be overwritten in case of other
- * implementations in user file.
- * @retval None
- */
- __weak void HAL_IncTick(void)
- {
- 8005540: b480 push {r7}
- 8005542: af00 add r7, sp, #0
- uwTick += (uint32_t)uwTickFreq;
- 8005544: 4b06 ldr r3, [pc, #24] @ (8005560 <HAL_IncTick+0x20>)
- 8005546: 781b ldrb r3, [r3, #0]
- 8005548: 461a mov r2, r3
- 800554a: 4b06 ldr r3, [pc, #24] @ (8005564 <HAL_IncTick+0x24>)
- 800554c: 681b ldr r3, [r3, #0]
- 800554e: 4413 add r3, r2
- 8005550: 4a04 ldr r2, [pc, #16] @ (8005564 <HAL_IncTick+0x24>)
- 8005552: 6013 str r3, [r2, #0]
- }
- 8005554: bf00 nop
- 8005556: 46bd mov sp, r7
- 8005558: f85d 7b04 ldr.w r7, [sp], #4
- 800555c: 4770 bx lr
- 800555e: bf00 nop
- 8005560: 24000040 .word 0x24000040
- 8005564: 24000cfc .word 0x24000cfc
- 08005568 <HAL_GetTick>:
- * @note This function is declared as __weak to be overwritten in case of other
- * implementations in user file.
- * @retval tick value
- */
- __weak uint32_t HAL_GetTick(void)
- {
- 8005568: b480 push {r7}
- 800556a: af00 add r7, sp, #0
- return uwTick;
- 800556c: 4b03 ldr r3, [pc, #12] @ (800557c <HAL_GetTick+0x14>)
- 800556e: 681b ldr r3, [r3, #0]
- }
- 8005570: 4618 mov r0, r3
- 8005572: 46bd mov sp, r7
- 8005574: f85d 7b04 ldr.w r7, [sp], #4
- 8005578: 4770 bx lr
- 800557a: bf00 nop
- 800557c: 24000cfc .word 0x24000cfc
- 08005580 <HAL_GetREVID>:
- /**
- * @brief Returns the device revision identifier.
- * @retval Device revision identifier
- */
- uint32_t HAL_GetREVID(void)
- {
- 8005580: b480 push {r7}
- 8005582: af00 add r7, sp, #0
- return((DBGMCU->IDCODE) >> 16);
- 8005584: 4b03 ldr r3, [pc, #12] @ (8005594 <HAL_GetREVID+0x14>)
- 8005586: 681b ldr r3, [r3, #0]
- 8005588: 0c1b lsrs r3, r3, #16
- }
- 800558a: 4618 mov r0, r3
- 800558c: 46bd mov sp, r7
- 800558e: f85d 7b04 ldr.w r7, [sp], #4
- 8005592: 4770 bx lr
- 8005594: 5c001000 .word 0x5c001000
- 08005598 <HAL_SYSCFG_VREFBUF_HighImpedanceConfig>:
- * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE: VREF+ pin is internally connect to VREFINT output.
- * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE: VREF+ pin is high impedance.
- * @retval None
- */
- void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode)
- {
- 8005598: b480 push {r7}
- 800559a: b083 sub sp, #12
- 800559c: af00 add r7, sp, #0
- 800559e: 6078 str r0, [r7, #4]
- /* Check the parameters */
- assert_param(IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(Mode));
- MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_HIZ, Mode);
- 80055a0: 4b06 ldr r3, [pc, #24] @ (80055bc <HAL_SYSCFG_VREFBUF_HighImpedanceConfig+0x24>)
- 80055a2: 681b ldr r3, [r3, #0]
- 80055a4: f023 0202 bic.w r2, r3, #2
- 80055a8: 4904 ldr r1, [pc, #16] @ (80055bc <HAL_SYSCFG_VREFBUF_HighImpedanceConfig+0x24>)
- 80055aa: 687b ldr r3, [r7, #4]
- 80055ac: 4313 orrs r3, r2
- 80055ae: 600b str r3, [r1, #0]
- }
- 80055b0: bf00 nop
- 80055b2: 370c adds r7, #12
- 80055b4: 46bd mov sp, r7
- 80055b6: f85d 7b04 ldr.w r7, [sp], #4
- 80055ba: 4770 bx lr
- 80055bc: 58003c00 .word 0x58003c00
- 080055c0 <HAL_SYSCFG_DisableVREFBUF>:
- * @brief Disable the Internal Voltage Reference buffer (VREFBUF).
- *
- * @retval None
- */
- void HAL_SYSCFG_DisableVREFBUF(void)
- {
- 80055c0: b480 push {r7}
- 80055c2: af00 add r7, sp, #0
- CLEAR_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
- 80055c4: 4b05 ldr r3, [pc, #20] @ (80055dc <HAL_SYSCFG_DisableVREFBUF+0x1c>)
- 80055c6: 681b ldr r3, [r3, #0]
- 80055c8: 4a04 ldr r2, [pc, #16] @ (80055dc <HAL_SYSCFG_DisableVREFBUF+0x1c>)
- 80055ca: f023 0301 bic.w r3, r3, #1
- 80055ce: 6013 str r3, [r2, #0]
- }
- 80055d0: bf00 nop
- 80055d2: 46bd mov sp, r7
- 80055d4: f85d 7b04 ldr.w r7, [sp], #4
- 80055d8: 4770 bx lr
- 80055da: bf00 nop
- 80055dc: 58003c00 .word 0x58003c00
- 080055e0 <HAL_SYSCFG_AnalogSwitchConfig>:
- * @arg SYSCFG_SWITCH_PC3_CLOSE
- * @retval None
- */
- void HAL_SYSCFG_AnalogSwitchConfig(uint32_t SYSCFG_AnalogSwitch , uint32_t SYSCFG_SwitchState )
- {
- 80055e0: b480 push {r7}
- 80055e2: b083 sub sp, #12
- 80055e4: af00 add r7, sp, #0
- 80055e6: 6078 str r0, [r7, #4]
- 80055e8: 6039 str r1, [r7, #0]
- /* Check the parameter */
- assert_param(IS_SYSCFG_ANALOG_SWITCH(SYSCFG_AnalogSwitch));
- assert_param(IS_SYSCFG_SWITCH_STATE(SYSCFG_SwitchState));
- MODIFY_REG(SYSCFG->PMCR, (uint32_t) SYSCFG_AnalogSwitch, (uint32_t)(SYSCFG_SwitchState));
- 80055ea: 4b07 ldr r3, [pc, #28] @ (8005608 <HAL_SYSCFG_AnalogSwitchConfig+0x28>)
- 80055ec: 685a ldr r2, [r3, #4]
- 80055ee: 687b ldr r3, [r7, #4]
- 80055f0: 43db mvns r3, r3
- 80055f2: 401a ands r2, r3
- 80055f4: 4904 ldr r1, [pc, #16] @ (8005608 <HAL_SYSCFG_AnalogSwitchConfig+0x28>)
- 80055f6: 683b ldr r3, [r7, #0]
- 80055f8: 4313 orrs r3, r2
- 80055fa: 604b str r3, [r1, #4]
- }
- 80055fc: bf00 nop
- 80055fe: 370c adds r7, #12
- 8005600: 46bd mov sp, r7
- 8005602: f85d 7b04 ldr.w r7, [sp], #4
- 8005606: 4770 bx lr
- 8005608: 58000400 .word 0x58000400
- 0800560c <LL_ADC_SetCommonClock>:
- * @arg @ref LL_ADC_CLOCK_ASYNC_DIV128
- * @arg @ref LL_ADC_CLOCK_ASYNC_DIV256
- * @retval None
- */
- __STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock)
- {
- 800560c: b480 push {r7}
- 800560e: b083 sub sp, #12
- 8005610: af00 add r7, sp, #0
- 8005612: 6078 str r0, [r7, #4]
- 8005614: 6039 str r1, [r7, #0]
- MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_CKMODE | ADC_CCR_PRESC, CommonClock);
- 8005616: 687b ldr r3, [r7, #4]
- 8005618: 689b ldr r3, [r3, #8]
- 800561a: f423 127c bic.w r2, r3, #4128768 @ 0x3f0000
- 800561e: 683b ldr r3, [r7, #0]
- 8005620: 431a orrs r2, r3
- 8005622: 687b ldr r3, [r7, #4]
- 8005624: 609a str r2, [r3, #8]
- }
- 8005626: bf00 nop
- 8005628: 370c adds r7, #12
- 800562a: 46bd mov sp, r7
- 800562c: f85d 7b04 ldr.w r7, [sp], #4
- 8005630: 4770 bx lr
- 08005632 <LL_ADC_SetCommonPathInternalCh>:
- * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
- * @arg @ref LL_ADC_PATH_INTERNAL_VBAT
- * @retval None
- */
- __STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal)
- {
- 8005632: b480 push {r7}
- 8005634: b083 sub sp, #12
- 8005636: af00 add r7, sp, #0
- 8005638: 6078 str r0, [r7, #4]
- 800563a: 6039 str r1, [r7, #0]
- MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VBATEN, PathInternal);
- 800563c: 687b ldr r3, [r7, #4]
- 800563e: 689b ldr r3, [r3, #8]
- 8005640: f023 72e0 bic.w r2, r3, #29360128 @ 0x1c00000
- 8005644: 683b ldr r3, [r7, #0]
- 8005646: 431a orrs r2, r3
- 8005648: 687b ldr r3, [r7, #4]
- 800564a: 609a str r2, [r3, #8]
- }
- 800564c: bf00 nop
- 800564e: 370c adds r7, #12
- 8005650: 46bd mov sp, r7
- 8005652: f85d 7b04 ldr.w r7, [sp], #4
- 8005656: 4770 bx lr
- 08005658 <LL_ADC_GetCommonPathInternalCh>:
- * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
- * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
- * @arg @ref LL_ADC_PATH_INTERNAL_VBAT
- */
- __STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON)
- {
- 8005658: b480 push {r7}
- 800565a: b083 sub sp, #12
- 800565c: af00 add r7, sp, #0
- 800565e: 6078 str r0, [r7, #4]
- return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VBATEN));
- 8005660: 687b ldr r3, [r7, #4]
- 8005662: 689b ldr r3, [r3, #8]
- 8005664: f003 73e0 and.w r3, r3, #29360128 @ 0x1c00000
- }
- 8005668: 4618 mov r0, r3
- 800566a: 370c adds r7, #12
- 800566c: 46bd mov sp, r7
- 800566e: f85d 7b04 ldr.w r7, [sp], #4
- 8005672: 4770 bx lr
- 08005674 <LL_ADC_SetOffset>:
- * Other channels are slow channels (conversion rate: refer to reference manual).
- * @param OffsetLevel Value between Min_Data=0x000 and Max_Data=0x3FFFFFF
- * @retval None
- */
- __STATIC_INLINE void LL_ADC_SetOffset(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Channel, uint32_t OffsetLevel)
- {
- 8005674: b480 push {r7}
- 8005676: b087 sub sp, #28
- 8005678: af00 add r7, sp, #0
- 800567a: 60f8 str r0, [r7, #12]
- 800567c: 60b9 str r1, [r7, #8]
- 800567e: 607a str r2, [r7, #4]
- 8005680: 603b str r3, [r7, #0]
- __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
- 8005682: 68fb ldr r3, [r7, #12]
- 8005684: 3360 adds r3, #96 @ 0x60
- 8005686: 461a mov r2, r3
- 8005688: 68bb ldr r3, [r7, #8]
- 800568a: 009b lsls r3, r3, #2
- 800568c: 4413 add r3, r2
- 800568e: 617b str r3, [r7, #20]
- ADC3_OFR1_OFFSET1_EN | (Channel & ADC_CHANNEL_ID_NUMBER_MASK) | OffsetLevel);
- }
- else
- #endif /* ADC_VER_V5_V90 */
- {
- MODIFY_REG(*preg,
- 8005690: 697b ldr r3, [r7, #20]
- 8005692: 681b ldr r3, [r3, #0]
- 8005694: f003 4200 and.w r2, r3, #2147483648 @ 0x80000000
- 8005698: 687b ldr r3, [r7, #4]
- 800569a: f003 41f8 and.w r1, r3, #2080374784 @ 0x7c000000
- 800569e: 683b ldr r3, [r7, #0]
- 80056a0: 430b orrs r3, r1
- 80056a2: 431a orrs r2, r3
- 80056a4: 697b ldr r3, [r7, #20]
- 80056a6: 601a str r2, [r3, #0]
- ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
- (Channel & ADC_CHANNEL_ID_NUMBER_MASK) | OffsetLevel);
- }
- }
- 80056a8: bf00 nop
- 80056aa: 371c adds r7, #28
- 80056ac: 46bd mov sp, r7
- 80056ae: f85d 7b04 ldr.w r7, [sp], #4
- 80056b2: 4770 bx lr
- 080056b4 <LL_ADC_SetDataRightShift>:
- * @arg @ref LL_ADC_OFFSET_RSHIFT_ENABLE
- * @arg @ref LL_ADC_OFFSET_RSHIFT_DISABLE
- * @retval Returned None
- */
- __STATIC_INLINE void LL_ADC_SetDataRightShift(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t RigthShift)
- {
- 80056b4: b480 push {r7}
- 80056b6: b085 sub sp, #20
- 80056b8: af00 add r7, sp, #0
- 80056ba: 60f8 str r0, [r7, #12]
- 80056bc: 60b9 str r1, [r7, #8]
- 80056be: 607a str r2, [r7, #4]
- MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_RSHIFT1 | ADC_CFGR2_RSHIFT2 | ADC_CFGR2_RSHIFT3 | ADC_CFGR2_RSHIFT4), RigthShift << (Offsety & 0x1FUL));
- 80056c0: 68fb ldr r3, [r7, #12]
- 80056c2: 691b ldr r3, [r3, #16]
- 80056c4: f423 42f0 bic.w r2, r3, #30720 @ 0x7800
- 80056c8: 68bb ldr r3, [r7, #8]
- 80056ca: f003 031f and.w r3, r3, #31
- 80056ce: 6879 ldr r1, [r7, #4]
- 80056d0: fa01 f303 lsl.w r3, r1, r3
- 80056d4: 431a orrs r2, r3
- 80056d6: 68fb ldr r3, [r7, #12]
- 80056d8: 611a str r2, [r3, #16]
- }
- 80056da: bf00 nop
- 80056dc: 3714 adds r7, #20
- 80056de: 46bd mov sp, r7
- 80056e0: f85d 7b04 ldr.w r7, [sp], #4
- 80056e4: 4770 bx lr
- 080056e6 <LL_ADC_SetOffsetSignedSaturation>:
- * @arg @ref LL_ADC_OFFSET_SIGNED_SATURATION_ENABLE
- * @arg @ref LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE
- * @retval Returned None
- */
- __STATIC_INLINE void LL_ADC_SetOffsetSignedSaturation(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetSignedSaturation)
- {
- 80056e6: b480 push {r7}
- 80056e8: b087 sub sp, #28
- 80056ea: af00 add r7, sp, #0
- 80056ec: 60f8 str r0, [r7, #12]
- 80056ee: 60b9 str r1, [r7, #8]
- 80056f0: 607a str r2, [r7, #4]
- /* Function not available on this instance */
- }
- else
- #endif /* ADC_VER_V5_V90 */
- {
- __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
- 80056f2: 68fb ldr r3, [r7, #12]
- 80056f4: 3360 adds r3, #96 @ 0x60
- 80056f6: 461a mov r2, r3
- 80056f8: 68bb ldr r3, [r7, #8]
- 80056fa: 009b lsls r3, r3, #2
- 80056fc: 4413 add r3, r2
- 80056fe: 617b str r3, [r7, #20]
- MODIFY_REG(*preg, ADC_OFR1_SSATE, OffsetSignedSaturation);
- 8005700: 697b ldr r3, [r7, #20]
- 8005702: 681b ldr r3, [r3, #0]
- 8005704: f023 4200 bic.w r2, r3, #2147483648 @ 0x80000000
- 8005708: 687b ldr r3, [r7, #4]
- 800570a: 431a orrs r2, r3
- 800570c: 697b ldr r3, [r7, #20]
- 800570e: 601a str r2, [r3, #0]
- }
- }
- 8005710: bf00 nop
- 8005712: 371c adds r7, #28
- 8005714: 46bd mov sp, r7
- 8005716: f85d 7b04 ldr.w r7, [sp], #4
- 800571a: 4770 bx lr
- 0800571c <LL_ADC_REG_IsTriggerSourceSWStart>:
- * @param ADCx ADC instance
- * @retval Value "0" if trigger source external trigger
- * Value "1" if trigger source SW start.
- */
- __STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx)
- {
- 800571c: b480 push {r7}
- 800571e: b083 sub sp, #12
- 8005720: af00 add r7, sp, #0
- 8005722: 6078 str r0, [r7, #4]
- return ((READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)) ? 1UL : 0UL);
- 8005724: 687b ldr r3, [r7, #4]
- 8005726: 68db ldr r3, [r3, #12]
- 8005728: f403 6340 and.w r3, r3, #3072 @ 0xc00
- 800572c: 2b00 cmp r3, #0
- 800572e: d101 bne.n 8005734 <LL_ADC_REG_IsTriggerSourceSWStart+0x18>
- 8005730: 2301 movs r3, #1
- 8005732: e000 b.n 8005736 <LL_ADC_REG_IsTriggerSourceSWStart+0x1a>
- 8005734: 2300 movs r3, #0
- }
- 8005736: 4618 mov r0, r3
- 8005738: 370c adds r7, #12
- 800573a: 46bd mov sp, r7
- 800573c: f85d 7b04 ldr.w r7, [sp], #4
- 8005740: 4770 bx lr
- 08005742 <LL_ADC_REG_SetSequencerRanks>:
- * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to 8 Ms/s)).
- * Other channels are slow channels (conversion rate: refer to reference manual).
- * @retval None
- */
- __STATIC_INLINE void LL_ADC_REG_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channel)
- {
- 8005742: b480 push {r7}
- 8005744: b087 sub sp, #28
- 8005746: af00 add r7, sp, #0
- 8005748: 60f8 str r0, [r7, #12]
- 800574a: 60b9 str r1, [r7, #8]
- 800574c: 607a str r2, [r7, #4]
- /* Set bits with content of parameter "Channel" with bits position */
- /* in register and register position depending on parameter "Rank". */
- /* Parameters "Rank" and "Channel" are used with masks because containing */
- /* other bits reserved for other purpose. */
- __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK) >> ADC_SQRX_REGOFFSET_POS));
- 800574e: 68fb ldr r3, [r7, #12]
- 8005750: 3330 adds r3, #48 @ 0x30
- 8005752: 461a mov r2, r3
- 8005754: 68bb ldr r3, [r7, #8]
- 8005756: 0a1b lsrs r3, r3, #8
- 8005758: 009b lsls r3, r3, #2
- 800575a: f003 030c and.w r3, r3, #12
- 800575e: 4413 add r3, r2
- 8005760: 617b str r3, [r7, #20]
- MODIFY_REG(*preg,
- 8005762: 697b ldr r3, [r7, #20]
- 8005764: 681a ldr r2, [r3, #0]
- 8005766: 68bb ldr r3, [r7, #8]
- 8005768: f003 031f and.w r3, r3, #31
- 800576c: 211f movs r1, #31
- 800576e: fa01 f303 lsl.w r3, r1, r3
- 8005772: 43db mvns r3, r3
- 8005774: 401a ands r2, r3
- 8005776: 687b ldr r3, [r7, #4]
- 8005778: 0e9b lsrs r3, r3, #26
- 800577a: f003 011f and.w r1, r3, #31
- 800577e: 68bb ldr r3, [r7, #8]
- 8005780: f003 031f and.w r3, r3, #31
- 8005784: fa01 f303 lsl.w r3, r1, r3
- 8005788: 431a orrs r2, r3
- 800578a: 697b ldr r3, [r7, #20]
- 800578c: 601a str r2, [r3, #0]
- ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MASK),
- ((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_REG_RANK_ID_SQRX_MASK));
- }
- 800578e: bf00 nop
- 8005790: 371c adds r7, #28
- 8005792: 46bd mov sp, r7
- 8005794: f85d 7b04 ldr.w r7, [sp], #4
- 8005798: 4770 bx lr
- 0800579a <LL_ADC_REG_SetDataTransferMode>:
- * @param ADCx ADC instance
- * @param DataTransferMode Select Data Management configuration
- * @retval None
- */
- __STATIC_INLINE void LL_ADC_REG_SetDataTransferMode(ADC_TypeDef *ADCx, uint32_t DataTransferMode)
- {
- 800579a: b480 push {r7}
- 800579c: b083 sub sp, #12
- 800579e: af00 add r7, sp, #0
- 80057a0: 6078 str r0, [r7, #4]
- 80057a2: 6039 str r1, [r7, #0]
- MODIFY_REG(ADCx->CFGR, ADC_CFGR_DMNGT, DataTransferMode);
- 80057a4: 687b ldr r3, [r7, #4]
- 80057a6: 68db ldr r3, [r3, #12]
- 80057a8: f023 0203 bic.w r2, r3, #3
- 80057ac: 683b ldr r3, [r7, #0]
- 80057ae: 431a orrs r2, r3
- 80057b0: 687b ldr r3, [r7, #4]
- 80057b2: 60da str r2, [r3, #12]
- }
- 80057b4: bf00 nop
- 80057b6: 370c adds r7, #12
- 80057b8: 46bd mov sp, r7
- 80057ba: f85d 7b04 ldr.w r7, [sp], #4
- 80057be: 4770 bx lr
- 080057c0 <LL_ADC_SetChannelSamplingTime>:
- * @arg @ref LL_ADC_SAMPLINGTIME_387CYCLES_5
- * @arg @ref LL_ADC_SAMPLINGTIME_810CYCLES_5
- * @retval None
- */
- __STATIC_INLINE void LL_ADC_SetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t SamplingTime)
- {
- 80057c0: b480 push {r7}
- 80057c2: b087 sub sp, #28
- 80057c4: af00 add r7, sp, #0
- 80057c6: 60f8 str r0, [r7, #12]
- 80057c8: 60b9 str r1, [r7, #8]
- 80057ca: 607a str r2, [r7, #4]
- /* Set bits with content of parameter "SamplingTime" with bits position */
- /* in register and register position depending on parameter "Channel". */
- /* Parameter "Channel" is used with masks because containing */
- /* other bits reserved for other purpose. */
- __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFFSET_MASK) >> ADC_SMPRX_REGOFFSET_POS));
- 80057cc: 68fb ldr r3, [r7, #12]
- 80057ce: 3314 adds r3, #20
- 80057d0: 461a mov r2, r3
- 80057d2: 68bb ldr r3, [r7, #8]
- 80057d4: 0e5b lsrs r3, r3, #25
- 80057d6: 009b lsls r3, r3, #2
- 80057d8: f003 0304 and.w r3, r3, #4
- 80057dc: 4413 add r3, r2
- 80057de: 617b str r3, [r7, #20]
- MODIFY_REG(*preg,
- 80057e0: 697b ldr r3, [r7, #20]
- 80057e2: 681a ldr r2, [r3, #0]
- 80057e4: 68bb ldr r3, [r7, #8]
- 80057e6: 0d1b lsrs r3, r3, #20
- 80057e8: f003 031f and.w r3, r3, #31
- 80057ec: 2107 movs r1, #7
- 80057ee: fa01 f303 lsl.w r3, r1, r3
- 80057f2: 43db mvns r3, r3
- 80057f4: 401a ands r2, r3
- 80057f6: 68bb ldr r3, [r7, #8]
- 80057f8: 0d1b lsrs r3, r3, #20
- 80057fa: f003 031f and.w r3, r3, #31
- 80057fe: 6879 ldr r1, [r7, #4]
- 8005800: fa01 f303 lsl.w r3, r1, r3
- 8005804: 431a orrs r2, r3
- 8005806: 697b ldr r3, [r7, #20]
- 8005808: 601a str r2, [r3, #0]
- ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_POS),
- SamplingTime << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_POS));
- }
- 800580a: bf00 nop
- 800580c: 371c adds r7, #28
- 800580e: 46bd mov sp, r7
- 8005810: f85d 7b04 ldr.w r7, [sp], #4
- 8005814: 4770 bx lr
- ...
- 08005818 <LL_ADC_SetChannelSingleDiff>:
- * @arg @ref LL_ADC_SINGLE_ENDED
- * @arg @ref LL_ADC_DIFFERENTIAL_ENDED
- * @retval None
- */
- __STATIC_INLINE void LL_ADC_SetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t SingleDiff)
- {
- 8005818: b480 push {r7}
- 800581a: b085 sub sp, #20
- 800581c: af00 add r7, sp, #0
- 800581e: 60f8 str r0, [r7, #12]
- 8005820: 60b9 str r1, [r7, #8]
- 8005822: 607a str r2, [r7, #4]
- }
- #else /* ADC_VER_V5_V90 */
- /* Bits of channels in single or differential mode are set only for */
- /* differential mode (for single mode, mask of bits allowed to be set is */
- /* shifted out of range of bits of channels in single or differential mode. */
- MODIFY_REG(ADCx->DIFSEL,
- 8005824: 68fb ldr r3, [r7, #12]
- 8005826: f8d3 20c0 ldr.w r2, [r3, #192] @ 0xc0
- 800582a: 68bb ldr r3, [r7, #8]
- 800582c: f3c3 0313 ubfx r3, r3, #0, #20
- 8005830: 43db mvns r3, r3
- 8005832: 401a ands r2, r3
- 8005834: 687b ldr r3, [r7, #4]
- 8005836: f003 0318 and.w r3, r3, #24
- 800583a: 4908 ldr r1, [pc, #32] @ (800585c <LL_ADC_SetChannelSingleDiff+0x44>)
- 800583c: 40d9 lsrs r1, r3
- 800583e: 68bb ldr r3, [r7, #8]
- 8005840: 400b ands r3, r1
- 8005842: f3c3 0313 ubfx r3, r3, #0, #20
- 8005846: 431a orrs r2, r3
- 8005848: 68fb ldr r3, [r7, #12]
- 800584a: f8c3 20c0 str.w r2, [r3, #192] @ 0xc0
- Channel & ADC_SINGLEDIFF_CHANNEL_MASK,
- (Channel & ADC_SINGLEDIFF_CHANNEL_MASK) & (ADC_DIFSEL_DIFSEL >> (SingleDiff & ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK)));
- #endif /* ADC_VER_V5_V90 */
- }
- 800584e: bf00 nop
- 8005850: 3714 adds r7, #20
- 8005852: 46bd mov sp, r7
- 8005854: f85d 7b04 ldr.w r7, [sp], #4
- 8005858: 4770 bx lr
- 800585a: bf00 nop
- 800585c: 000fffff .word 0x000fffff
- 08005860 <LL_ADC_GetMultimode>:
- * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM
- * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT
- * @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM
- */
- __STATIC_INLINE uint32_t LL_ADC_GetMultimode(ADC_Common_TypeDef *ADCxy_COMMON)
- {
- 8005860: b480 push {r7}
- 8005862: b083 sub sp, #12
- 8005864: af00 add r7, sp, #0
- 8005866: 6078 str r0, [r7, #4]
- return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DUAL));
- 8005868: 687b ldr r3, [r7, #4]
- 800586a: 689b ldr r3, [r3, #8]
- 800586c: f003 031f and.w r3, r3, #31
- }
- 8005870: 4618 mov r0, r3
- 8005872: 370c adds r7, #12
- 8005874: 46bd mov sp, r7
- 8005876: f85d 7b04 ldr.w r7, [sp], #4
- 800587a: 4770 bx lr
- 0800587c <LL_ADC_DisableDeepPowerDown>:
- * @rmtoll CR DEEPPWD LL_ADC_DisableDeepPowerDown
- * @param ADCx ADC instance
- * @retval None
- */
- __STATIC_INLINE void LL_ADC_DisableDeepPowerDown(ADC_TypeDef *ADCx)
- {
- 800587c: b480 push {r7}
- 800587e: b083 sub sp, #12
- 8005880: af00 add r7, sp, #0
- 8005882: 6078 str r0, [r7, #4]
- /* Note: Write register with some additional bits forced to state reset */
- /* instead of modifying only the selected bit for this function, */
- /* to not interfere with bits with HW property "rs". */
- CLEAR_BIT(ADCx->CR, (ADC_CR_DEEPPWD | ADC_CR_BITS_PROPERTY_RS));
- 8005884: 687b ldr r3, [r7, #4]
- 8005886: 689a ldr r2, [r3, #8]
- 8005888: 4b04 ldr r3, [pc, #16] @ (800589c <LL_ADC_DisableDeepPowerDown+0x20>)
- 800588a: 4013 ands r3, r2
- 800588c: 687a ldr r2, [r7, #4]
- 800588e: 6093 str r3, [r2, #8]
- }
- 8005890: bf00 nop
- 8005892: 370c adds r7, #12
- 8005894: 46bd mov sp, r7
- 8005896: f85d 7b04 ldr.w r7, [sp], #4
- 800589a: 4770 bx lr
- 800589c: 5fffffc0 .word 0x5fffffc0
- 080058a0 <LL_ADC_IsDeepPowerDownEnabled>:
- * @rmtoll CR DEEPPWD LL_ADC_IsDeepPowerDownEnabled
- * @param ADCx ADC instance
- * @retval 0: deep power down is disabled, 1: deep power down is enabled.
- */
- __STATIC_INLINE uint32_t LL_ADC_IsDeepPowerDownEnabled(ADC_TypeDef *ADCx)
- {
- 80058a0: b480 push {r7}
- 80058a2: b083 sub sp, #12
- 80058a4: af00 add r7, sp, #0
- 80058a6: 6078 str r0, [r7, #4]
- return ((READ_BIT(ADCx->CR, ADC_CR_DEEPPWD) == (ADC_CR_DEEPPWD)) ? 1UL : 0UL);
- 80058a8: 687b ldr r3, [r7, #4]
- 80058aa: 689b ldr r3, [r3, #8]
- 80058ac: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
- 80058b0: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 80058b4: d101 bne.n 80058ba <LL_ADC_IsDeepPowerDownEnabled+0x1a>
- 80058b6: 2301 movs r3, #1
- 80058b8: e000 b.n 80058bc <LL_ADC_IsDeepPowerDownEnabled+0x1c>
- 80058ba: 2300 movs r3, #0
- }
- 80058bc: 4618 mov r0, r3
- 80058be: 370c adds r7, #12
- 80058c0: 46bd mov sp, r7
- 80058c2: f85d 7b04 ldr.w r7, [sp], #4
- 80058c6: 4770 bx lr
- 080058c8 <LL_ADC_EnableInternalRegulator>:
- * @rmtoll CR ADVREGEN LL_ADC_EnableInternalRegulator
- * @param ADCx ADC instance
- * @retval None
- */
- __STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx)
- {
- 80058c8: b480 push {r7}
- 80058ca: b083 sub sp, #12
- 80058cc: af00 add r7, sp, #0
- 80058ce: 6078 str r0, [r7, #4]
- /* Note: Write register with some additional bits forced to state reset */
- /* instead of modifying only the selected bit for this function, */
- /* to not interfere with bits with HW property "rs". */
- MODIFY_REG(ADCx->CR,
- 80058d0: 687b ldr r3, [r7, #4]
- 80058d2: 689a ldr r2, [r3, #8]
- 80058d4: 4b05 ldr r3, [pc, #20] @ (80058ec <LL_ADC_EnableInternalRegulator+0x24>)
- 80058d6: 4013 ands r3, r2
- 80058d8: f043 5280 orr.w r2, r3, #268435456 @ 0x10000000
- 80058dc: 687b ldr r3, [r7, #4]
- 80058de: 609a str r2, [r3, #8]
- ADC_CR_BITS_PROPERTY_RS,
- ADC_CR_ADVREGEN);
- }
- 80058e0: bf00 nop
- 80058e2: 370c adds r7, #12
- 80058e4: 46bd mov sp, r7
- 80058e6: f85d 7b04 ldr.w r7, [sp], #4
- 80058ea: 4770 bx lr
- 80058ec: 6fffffc0 .word 0x6fffffc0
- 080058f0 <LL_ADC_IsInternalRegulatorEnabled>:
- * @rmtoll CR ADVREGEN LL_ADC_IsInternalRegulatorEnabled
- * @param ADCx ADC instance
- * @retval 0: internal regulator is disabled, 1: internal regulator is enabled.
- */
- __STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(ADC_TypeDef *ADCx)
- {
- 80058f0: b480 push {r7}
- 80058f2: b083 sub sp, #12
- 80058f4: af00 add r7, sp, #0
- 80058f6: 6078 str r0, [r7, #4]
- return ((READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN)) ? 1UL : 0UL);
- 80058f8: 687b ldr r3, [r7, #4]
- 80058fa: 689b ldr r3, [r3, #8]
- 80058fc: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
- 8005900: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
- 8005904: d101 bne.n 800590a <LL_ADC_IsInternalRegulatorEnabled+0x1a>
- 8005906: 2301 movs r3, #1
- 8005908: e000 b.n 800590c <LL_ADC_IsInternalRegulatorEnabled+0x1c>
- 800590a: 2300 movs r3, #0
- }
- 800590c: 4618 mov r0, r3
- 800590e: 370c adds r7, #12
- 8005910: 46bd mov sp, r7
- 8005912: f85d 7b04 ldr.w r7, [sp], #4
- 8005916: 4770 bx lr
- 08005918 <LL_ADC_Enable>:
- * @rmtoll CR ADEN LL_ADC_Enable
- * @param ADCx ADC instance
- * @retval None
- */
- __STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx)
- {
- 8005918: b480 push {r7}
- 800591a: b083 sub sp, #12
- 800591c: af00 add r7, sp, #0
- 800591e: 6078 str r0, [r7, #4]
- /* Note: Write register with some additional bits forced to state reset */
- /* instead of modifying only the selected bit for this function, */
- /* to not interfere with bits with HW property "rs". */
- MODIFY_REG(ADCx->CR,
- 8005920: 687b ldr r3, [r7, #4]
- 8005922: 689a ldr r2, [r3, #8]
- 8005924: 4b05 ldr r3, [pc, #20] @ (800593c <LL_ADC_Enable+0x24>)
- 8005926: 4013 ands r3, r2
- 8005928: f043 0201 orr.w r2, r3, #1
- 800592c: 687b ldr r3, [r7, #4]
- 800592e: 609a str r2, [r3, #8]
- ADC_CR_BITS_PROPERTY_RS,
- ADC_CR_ADEN);
- }
- 8005930: bf00 nop
- 8005932: 370c adds r7, #12
- 8005934: 46bd mov sp, r7
- 8005936: f85d 7b04 ldr.w r7, [sp], #4
- 800593a: 4770 bx lr
- 800593c: 7fffffc0 .word 0x7fffffc0
- 08005940 <LL_ADC_Disable>:
- * @rmtoll CR ADDIS LL_ADC_Disable
- * @param ADCx ADC instance
- * @retval None
- */
- __STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx)
- {
- 8005940: b480 push {r7}
- 8005942: b083 sub sp, #12
- 8005944: af00 add r7, sp, #0
- 8005946: 6078 str r0, [r7, #4]
- /* Note: Write register with some additional bits forced to state reset */
- /* instead of modifying only the selected bit for this function, */
- /* to not interfere with bits with HW property "rs". */
- MODIFY_REG(ADCx->CR,
- 8005948: 687b ldr r3, [r7, #4]
- 800594a: 689a ldr r2, [r3, #8]
- 800594c: 4b05 ldr r3, [pc, #20] @ (8005964 <LL_ADC_Disable+0x24>)
- 800594e: 4013 ands r3, r2
- 8005950: f043 0202 orr.w r2, r3, #2
- 8005954: 687b ldr r3, [r7, #4]
- 8005956: 609a str r2, [r3, #8]
- ADC_CR_BITS_PROPERTY_RS,
- ADC_CR_ADDIS);
- }
- 8005958: bf00 nop
- 800595a: 370c adds r7, #12
- 800595c: 46bd mov sp, r7
- 800595e: f85d 7b04 ldr.w r7, [sp], #4
- 8005962: 4770 bx lr
- 8005964: 7fffffc0 .word 0x7fffffc0
- 08005968 <LL_ADC_IsEnabled>:
- * @rmtoll CR ADEN LL_ADC_IsEnabled
- * @param ADCx ADC instance
- * @retval 0: ADC is disabled, 1: ADC is enabled.
- */
- __STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx)
- {
- 8005968: b480 push {r7}
- 800596a: b083 sub sp, #12
- 800596c: af00 add r7, sp, #0
- 800596e: 6078 str r0, [r7, #4]
- return ((READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN)) ? 1UL : 0UL);
- 8005970: 687b ldr r3, [r7, #4]
- 8005972: 689b ldr r3, [r3, #8]
- 8005974: f003 0301 and.w r3, r3, #1
- 8005978: 2b01 cmp r3, #1
- 800597a: d101 bne.n 8005980 <LL_ADC_IsEnabled+0x18>
- 800597c: 2301 movs r3, #1
- 800597e: e000 b.n 8005982 <LL_ADC_IsEnabled+0x1a>
- 8005980: 2300 movs r3, #0
- }
- 8005982: 4618 mov r0, r3
- 8005984: 370c adds r7, #12
- 8005986: 46bd mov sp, r7
- 8005988: f85d 7b04 ldr.w r7, [sp], #4
- 800598c: 4770 bx lr
- 0800598e <LL_ADC_IsDisableOngoing>:
- * @rmtoll CR ADDIS LL_ADC_IsDisableOngoing
- * @param ADCx ADC instance
- * @retval 0: no ADC disable command on going.
- */
- __STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx)
- {
- 800598e: b480 push {r7}
- 8005990: b083 sub sp, #12
- 8005992: af00 add r7, sp, #0
- 8005994: 6078 str r0, [r7, #4]
- return ((READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS)) ? 1UL : 0UL);
- 8005996: 687b ldr r3, [r7, #4]
- 8005998: 689b ldr r3, [r3, #8]
- 800599a: f003 0302 and.w r3, r3, #2
- 800599e: 2b02 cmp r3, #2
- 80059a0: d101 bne.n 80059a6 <LL_ADC_IsDisableOngoing+0x18>
- 80059a2: 2301 movs r3, #1
- 80059a4: e000 b.n 80059a8 <LL_ADC_IsDisableOngoing+0x1a>
- 80059a6: 2300 movs r3, #0
- }
- 80059a8: 4618 mov r0, r3
- 80059aa: 370c adds r7, #12
- 80059ac: 46bd mov sp, r7
- 80059ae: f85d 7b04 ldr.w r7, [sp], #4
- 80059b2: 4770 bx lr
- 080059b4 <LL_ADC_REG_StartConversion>:
- * @rmtoll CR ADSTART LL_ADC_REG_StartConversion
- * @param ADCx ADC instance
- * @retval None
- */
- __STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx)
- {
- 80059b4: b480 push {r7}
- 80059b6: b083 sub sp, #12
- 80059b8: af00 add r7, sp, #0
- 80059ba: 6078 str r0, [r7, #4]
- /* Note: Write register with some additional bits forced to state reset */
- /* instead of modifying only the selected bit for this function, */
- /* to not interfere with bits with HW property "rs". */
- MODIFY_REG(ADCx->CR,
- 80059bc: 687b ldr r3, [r7, #4]
- 80059be: 689a ldr r2, [r3, #8]
- 80059c0: 4b05 ldr r3, [pc, #20] @ (80059d8 <LL_ADC_REG_StartConversion+0x24>)
- 80059c2: 4013 ands r3, r2
- 80059c4: f043 0204 orr.w r2, r3, #4
- 80059c8: 687b ldr r3, [r7, #4]
- 80059ca: 609a str r2, [r3, #8]
- ADC_CR_BITS_PROPERTY_RS,
- ADC_CR_ADSTART);
- }
- 80059cc: bf00 nop
- 80059ce: 370c adds r7, #12
- 80059d0: 46bd mov sp, r7
- 80059d2: f85d 7b04 ldr.w r7, [sp], #4
- 80059d6: 4770 bx lr
- 80059d8: 7fffffc0 .word 0x7fffffc0
- 080059dc <LL_ADC_REG_IsConversionOngoing>:
- * @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing
- * @param ADCx ADC instance
- * @retval 0: no conversion is on going on ADC group regular.
- */
- __STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx)
- {
- 80059dc: b480 push {r7}
- 80059de: b083 sub sp, #12
- 80059e0: af00 add r7, sp, #0
- 80059e2: 6078 str r0, [r7, #4]
- return ((READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART)) ? 1UL : 0UL);
- 80059e4: 687b ldr r3, [r7, #4]
- 80059e6: 689b ldr r3, [r3, #8]
- 80059e8: f003 0304 and.w r3, r3, #4
- 80059ec: 2b04 cmp r3, #4
- 80059ee: d101 bne.n 80059f4 <LL_ADC_REG_IsConversionOngoing+0x18>
- 80059f0: 2301 movs r3, #1
- 80059f2: e000 b.n 80059f6 <LL_ADC_REG_IsConversionOngoing+0x1a>
- 80059f4: 2300 movs r3, #0
- }
- 80059f6: 4618 mov r0, r3
- 80059f8: 370c adds r7, #12
- 80059fa: 46bd mov sp, r7
- 80059fc: f85d 7b04 ldr.w r7, [sp], #4
- 8005a00: 4770 bx lr
- 08005a02 <LL_ADC_INJ_IsConversionOngoing>:
- * @rmtoll CR JADSTART LL_ADC_INJ_IsConversionOngoing
- * @param ADCx ADC instance
- * @retval 0: no conversion is on going on ADC group injected.
- */
- __STATIC_INLINE uint32_t LL_ADC_INJ_IsConversionOngoing(ADC_TypeDef *ADCx)
- {
- 8005a02: b480 push {r7}
- 8005a04: b083 sub sp, #12
- 8005a06: af00 add r7, sp, #0
- 8005a08: 6078 str r0, [r7, #4]
- return ((READ_BIT(ADCx->CR, ADC_CR_JADSTART) == (ADC_CR_JADSTART)) ? 1UL : 0UL);
- 8005a0a: 687b ldr r3, [r7, #4]
- 8005a0c: 689b ldr r3, [r3, #8]
- 8005a0e: f003 0308 and.w r3, r3, #8
- 8005a12: 2b08 cmp r3, #8
- 8005a14: d101 bne.n 8005a1a <LL_ADC_INJ_IsConversionOngoing+0x18>
- 8005a16: 2301 movs r3, #1
- 8005a18: e000 b.n 8005a1c <LL_ADC_INJ_IsConversionOngoing+0x1a>
- 8005a1a: 2300 movs r3, #0
- }
- 8005a1c: 4618 mov r0, r3
- 8005a1e: 370c adds r7, #12
- 8005a20: 46bd mov sp, r7
- 8005a22: f85d 7b04 ldr.w r7, [sp], #4
- 8005a26: 4770 bx lr
- 08005a28 <HAL_ADC_Init>:
- * without disabling the other ADCs.
- * @param hadc ADC handle
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef *hadc)
- {
- 8005a28: b590 push {r4, r7, lr}
- 8005a2a: b089 sub sp, #36 @ 0x24
- 8005a2c: af00 add r7, sp, #0
- 8005a2e: 6078 str r0, [r7, #4]
- HAL_StatusTypeDef tmp_hal_status = HAL_OK;
- 8005a30: 2300 movs r3, #0
- 8005a32: 77fb strb r3, [r7, #31]
- uint32_t tmpCFGR;
- uint32_t tmp_adc_reg_is_conversion_on_going;
- __IO uint32_t wait_loop_index = 0UL;
- 8005a34: 2300 movs r3, #0
- 8005a36: 60bb str r3, [r7, #8]
- uint32_t tmp_adc_is_conversion_on_going_regular;
- uint32_t tmp_adc_is_conversion_on_going_injected;
- /* Check ADC handle */
- if (hadc == NULL)
- 8005a38: 687b ldr r3, [r7, #4]
- 8005a3a: 2b00 cmp r3, #0
- 8005a3c: d101 bne.n 8005a42 <HAL_ADC_Init+0x1a>
- {
- return HAL_ERROR;
- 8005a3e: 2301 movs r3, #1
- 8005a40: e18f b.n 8005d62 <HAL_ADC_Init+0x33a>
- assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
- assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
- assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait));
- assert_param(IS_FUNCTIONAL_STATE(hadc->Init.OversamplingMode));
- if (hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
- 8005a42: 687b ldr r3, [r7, #4]
- 8005a44: 68db ldr r3, [r3, #12]
- 8005a46: 2b00 cmp r3, #0
- /* DISCEN and CONT bits cannot be set at the same time */
- assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (hadc->Init.ContinuousConvMode == ENABLE)));
- /* Actions performed only if ADC is coming from state reset: */
- /* - Initialization of ADC MSP */
- if (hadc->State == HAL_ADC_STATE_RESET)
- 8005a48: 687b ldr r3, [r7, #4]
- 8005a4a: 6d5b ldr r3, [r3, #84] @ 0x54
- 8005a4c: 2b00 cmp r3, #0
- 8005a4e: d109 bne.n 8005a64 <HAL_ADC_Init+0x3c>
- /* Init the low level hardware */
- hadc->MspInitCallback(hadc);
- #else
- /* Init the low level hardware */
- HAL_ADC_MspInit(hadc);
- 8005a50: 6878 ldr r0, [r7, #4]
- 8005a52: f7fd fd6b bl 800352c <HAL_ADC_MspInit>
- #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
- /* Set ADC error code to none */
- ADC_CLEAR_ERRORCODE(hadc);
- 8005a56: 687b ldr r3, [r7, #4]
- 8005a58: 2200 movs r2, #0
- 8005a5a: 659a str r2, [r3, #88] @ 0x58
- /* Initialize Lock */
- hadc->Lock = HAL_UNLOCKED;
- 8005a5c: 687b ldr r3, [r7, #4]
- 8005a5e: 2200 movs r2, #0
- 8005a60: f883 2050 strb.w r2, [r3, #80] @ 0x50
- }
- /* - Exit from deep-power-down mode and ADC voltage regulator enable */
- if (LL_ADC_IsDeepPowerDownEnabled(hadc->Instance) != 0UL)
- 8005a64: 687b ldr r3, [r7, #4]
- 8005a66: 681b ldr r3, [r3, #0]
- 8005a68: 4618 mov r0, r3
- 8005a6a: f7ff ff19 bl 80058a0 <LL_ADC_IsDeepPowerDownEnabled>
- 8005a6e: 4603 mov r3, r0
- 8005a70: 2b00 cmp r3, #0
- 8005a72: d004 beq.n 8005a7e <HAL_ADC_Init+0x56>
- {
- /* Disable ADC deep power down mode */
- LL_ADC_DisableDeepPowerDown(hadc->Instance);
- 8005a74: 687b ldr r3, [r7, #4]
- 8005a76: 681b ldr r3, [r3, #0]
- 8005a78: 4618 mov r0, r3
- 8005a7a: f7ff feff bl 800587c <LL_ADC_DisableDeepPowerDown>
- /* System was in deep power down mode, calibration must
- be relaunched or a previously saved calibration factor
- re-applied once the ADC voltage regulator is enabled */
- }
- if (LL_ADC_IsInternalRegulatorEnabled(hadc->Instance) == 0UL)
- 8005a7e: 687b ldr r3, [r7, #4]
- 8005a80: 681b ldr r3, [r3, #0]
- 8005a82: 4618 mov r0, r3
- 8005a84: f7ff ff34 bl 80058f0 <LL_ADC_IsInternalRegulatorEnabled>
- 8005a88: 4603 mov r3, r0
- 8005a8a: 2b00 cmp r3, #0
- 8005a8c: d114 bne.n 8005ab8 <HAL_ADC_Init+0x90>
- {
- /* Enable ADC internal voltage regulator */
- LL_ADC_EnableInternalRegulator(hadc->Instance);
- 8005a8e: 687b ldr r3, [r7, #4]
- 8005a90: 681b ldr r3, [r3, #0]
- 8005a92: 4618 mov r0, r3
- 8005a94: f7ff ff18 bl 80058c8 <LL_ADC_EnableInternalRegulator>
- /* Note: Variable divided by 2 to compensate partially */
- /* CPU processing cycles, scaling in us split to not */
- /* exceed 32 bits register capacity and handle low frequency. */
- wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL));
- 8005a98: 4b87 ldr r3, [pc, #540] @ (8005cb8 <HAL_ADC_Init+0x290>)
- 8005a9a: 681b ldr r3, [r3, #0]
- 8005a9c: 099b lsrs r3, r3, #6
- 8005a9e: 4a87 ldr r2, [pc, #540] @ (8005cbc <HAL_ADC_Init+0x294>)
- 8005aa0: fba2 2303 umull r2, r3, r2, r3
- 8005aa4: 099b lsrs r3, r3, #6
- 8005aa6: 3301 adds r3, #1
- 8005aa8: 60bb str r3, [r7, #8]
- while (wait_loop_index != 0UL)
- 8005aaa: e002 b.n 8005ab2 <HAL_ADC_Init+0x8a>
- {
- wait_loop_index--;
- 8005aac: 68bb ldr r3, [r7, #8]
- 8005aae: 3b01 subs r3, #1
- 8005ab0: 60bb str r3, [r7, #8]
- while (wait_loop_index != 0UL)
- 8005ab2: 68bb ldr r3, [r7, #8]
- 8005ab4: 2b00 cmp r3, #0
- 8005ab6: d1f9 bne.n 8005aac <HAL_ADC_Init+0x84>
- }
- /* Verification that ADC voltage regulator is correctly enabled, whether */
- /* or not ADC is coming from state reset (if any potential problem of */
- /* clocking, voltage regulator would not be enabled). */
- if (LL_ADC_IsInternalRegulatorEnabled(hadc->Instance) == 0UL)
- 8005ab8: 687b ldr r3, [r7, #4]
- 8005aba: 681b ldr r3, [r3, #0]
- 8005abc: 4618 mov r0, r3
- 8005abe: f7ff ff17 bl 80058f0 <LL_ADC_IsInternalRegulatorEnabled>
- 8005ac2: 4603 mov r3, r0
- 8005ac4: 2b00 cmp r3, #0
- 8005ac6: d10d bne.n 8005ae4 <HAL_ADC_Init+0xbc>
- {
- /* Update ADC state machine to error */
- SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
- 8005ac8: 687b ldr r3, [r7, #4]
- 8005aca: 6d5b ldr r3, [r3, #84] @ 0x54
- 8005acc: f043 0210 orr.w r2, r3, #16
- 8005ad0: 687b ldr r3, [r7, #4]
- 8005ad2: 655a str r2, [r3, #84] @ 0x54
- /* Set ADC error code to ADC peripheral internal error */
- SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
- 8005ad4: 687b ldr r3, [r7, #4]
- 8005ad6: 6d9b ldr r3, [r3, #88] @ 0x58
- 8005ad8: f043 0201 orr.w r2, r3, #1
- 8005adc: 687b ldr r3, [r7, #4]
- 8005ade: 659a str r2, [r3, #88] @ 0x58
- tmp_hal_status = HAL_ERROR;
- 8005ae0: 2301 movs r3, #1
- 8005ae2: 77fb strb r3, [r7, #31]
- /* Configuration of ADC parameters if previous preliminary actions are */
- /* correctly completed and if there is no conversion on going on regular */
- /* group (ADC may already be enabled at this point if HAL_ADC_Init() is */
- /* called to update a parameter on the fly). */
- tmp_adc_reg_is_conversion_on_going = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
- 8005ae4: 687b ldr r3, [r7, #4]
- 8005ae6: 681b ldr r3, [r3, #0]
- 8005ae8: 4618 mov r0, r3
- 8005aea: f7ff ff77 bl 80059dc <LL_ADC_REG_IsConversionOngoing>
- 8005aee: 6178 str r0, [r7, #20]
- if (((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) == 0UL)
- 8005af0: 687b ldr r3, [r7, #4]
- 8005af2: 6d5b ldr r3, [r3, #84] @ 0x54
- 8005af4: f003 0310 and.w r3, r3, #16
- 8005af8: 2b00 cmp r3, #0
- 8005afa: f040 8129 bne.w 8005d50 <HAL_ADC_Init+0x328>
- && (tmp_adc_reg_is_conversion_on_going == 0UL)
- 8005afe: 697b ldr r3, [r7, #20]
- 8005b00: 2b00 cmp r3, #0
- 8005b02: f040 8125 bne.w 8005d50 <HAL_ADC_Init+0x328>
- )
- {
- /* Set ADC state */
- ADC_STATE_CLR_SET(hadc->State,
- 8005b06: 687b ldr r3, [r7, #4]
- 8005b08: 6d5b ldr r3, [r3, #84] @ 0x54
- 8005b0a: f423 7381 bic.w r3, r3, #258 @ 0x102
- 8005b0e: f043 0202 orr.w r2, r3, #2
- 8005b12: 687b ldr r3, [r7, #4]
- 8005b14: 655a str r2, [r3, #84] @ 0x54
- /* Configuration of common ADC parameters */
- /* Parameters update conditioned to ADC state: */
- /* Parameters that can be updated only when ADC is disabled: */
- /* - clock configuration */
- if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
- 8005b16: 687b ldr r3, [r7, #4]
- 8005b18: 681b ldr r3, [r3, #0]
- 8005b1a: 4618 mov r0, r3
- 8005b1c: f7ff ff24 bl 8005968 <LL_ADC_IsEnabled>
- 8005b20: 4603 mov r3, r0
- 8005b22: 2b00 cmp r3, #0
- 8005b24: d136 bne.n 8005b94 <HAL_ADC_Init+0x16c>
- {
- if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
- 8005b26: 687b ldr r3, [r7, #4]
- 8005b28: 681b ldr r3, [r3, #0]
- 8005b2a: 4a65 ldr r2, [pc, #404] @ (8005cc0 <HAL_ADC_Init+0x298>)
- 8005b2c: 4293 cmp r3, r2
- 8005b2e: d004 beq.n 8005b3a <HAL_ADC_Init+0x112>
- 8005b30: 687b ldr r3, [r7, #4]
- 8005b32: 681b ldr r3, [r3, #0]
- 8005b34: 4a63 ldr r2, [pc, #396] @ (8005cc4 <HAL_ADC_Init+0x29c>)
- 8005b36: 4293 cmp r3, r2
- 8005b38: d10e bne.n 8005b58 <HAL_ADC_Init+0x130>
- 8005b3a: 4861 ldr r0, [pc, #388] @ (8005cc0 <HAL_ADC_Init+0x298>)
- 8005b3c: f7ff ff14 bl 8005968 <LL_ADC_IsEnabled>
- 8005b40: 4604 mov r4, r0
- 8005b42: 4860 ldr r0, [pc, #384] @ (8005cc4 <HAL_ADC_Init+0x29c>)
- 8005b44: f7ff ff10 bl 8005968 <LL_ADC_IsEnabled>
- 8005b48: 4603 mov r3, r0
- 8005b4a: 4323 orrs r3, r4
- 8005b4c: 2b00 cmp r3, #0
- 8005b4e: bf0c ite eq
- 8005b50: 2301 moveq r3, #1
- 8005b52: 2300 movne r3, #0
- 8005b54: b2db uxtb r3, r3
- 8005b56: e008 b.n 8005b6a <HAL_ADC_Init+0x142>
- 8005b58: 485b ldr r0, [pc, #364] @ (8005cc8 <HAL_ADC_Init+0x2a0>)
- 8005b5a: f7ff ff05 bl 8005968 <LL_ADC_IsEnabled>
- 8005b5e: 4603 mov r3, r0
- 8005b60: 2b00 cmp r3, #0
- 8005b62: bf0c ite eq
- 8005b64: 2301 moveq r3, #1
- 8005b66: 2300 movne r3, #0
- 8005b68: b2db uxtb r3, r3
- 8005b6a: 2b00 cmp r3, #0
- 8005b6c: d012 beq.n 8005b94 <HAL_ADC_Init+0x16c>
- /* parameters: MDMA, DMACFG, DELAY, DUAL (set by API */
- /* HAL_ADCEx_MultiModeConfigChannel() ) */
- /* - internal measurement paths: Vbat, temperature sensor, Vref */
- /* (set into HAL_ADC_ConfigChannel() or */
- /* HAL_ADCEx_InjectedConfigChannel() ) */
- LL_ADC_SetCommonClock(__LL_ADC_COMMON_INSTANCE(hadc->Instance), hadc->Init.ClockPrescaler);
- 8005b6e: 687b ldr r3, [r7, #4]
- 8005b70: 681b ldr r3, [r3, #0]
- 8005b72: 4a53 ldr r2, [pc, #332] @ (8005cc0 <HAL_ADC_Init+0x298>)
- 8005b74: 4293 cmp r3, r2
- 8005b76: d004 beq.n 8005b82 <HAL_ADC_Init+0x15a>
- 8005b78: 687b ldr r3, [r7, #4]
- 8005b7a: 681b ldr r3, [r3, #0]
- 8005b7c: 4a51 ldr r2, [pc, #324] @ (8005cc4 <HAL_ADC_Init+0x29c>)
- 8005b7e: 4293 cmp r3, r2
- 8005b80: d101 bne.n 8005b86 <HAL_ADC_Init+0x15e>
- 8005b82: 4a52 ldr r2, [pc, #328] @ (8005ccc <HAL_ADC_Init+0x2a4>)
- 8005b84: e000 b.n 8005b88 <HAL_ADC_Init+0x160>
- 8005b86: 4a52 ldr r2, [pc, #328] @ (8005cd0 <HAL_ADC_Init+0x2a8>)
- 8005b88: 687b ldr r3, [r7, #4]
- 8005b8a: 685b ldr r3, [r3, #4]
- 8005b8c: 4619 mov r1, r3
- 8005b8e: 4610 mov r0, r2
- 8005b90: f7ff fd3c bl 800560c <LL_ADC_SetCommonClock>
- ADC_CFGR_REG_DISCONTINUOUS((uint32_t)hadc->Init.DiscontinuousConvMode));
- }
- #else
- if ((HAL_GetREVID() > REV_ID_Y) && (ADC_RESOLUTION_8B == hadc->Init.Resolution))
- 8005b94: f7ff fcf4 bl 8005580 <HAL_GetREVID>
- 8005b98: 4603 mov r3, r0
- 8005b9a: f241 0203 movw r2, #4099 @ 0x1003
- 8005b9e: 4293 cmp r3, r2
- 8005ba0: d914 bls.n 8005bcc <HAL_ADC_Init+0x1a4>
- 8005ba2: 687b ldr r3, [r7, #4]
- 8005ba4: 689b ldr r3, [r3, #8]
- 8005ba6: 2b10 cmp r3, #16
- 8005ba8: d110 bne.n 8005bcc <HAL_ADC_Init+0x1a4>
- {
- /* for STM32H7 silicon rev.B and above , ADC_CFGR_RES value for 8bits resolution is : b111 */
- tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) |
- 8005baa: 687b ldr r3, [r7, #4]
- 8005bac: 7d5b ldrb r3, [r3, #21]
- 8005bae: 035a lsls r2, r3, #13
- hadc->Init.Overrun |
- 8005bb0: 687b ldr r3, [r7, #4]
- 8005bb2: 6b1b ldr r3, [r3, #48] @ 0x30
- tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) |
- 8005bb4: 431a orrs r2, r3
- hadc->Init.Resolution | (ADC_CFGR_RES_1 | ADC_CFGR_RES_0) |
- 8005bb6: 687b ldr r3, [r7, #4]
- 8005bb8: 689b ldr r3, [r3, #8]
- hadc->Init.Overrun |
- 8005bba: 431a orrs r2, r3
- ADC_CFGR_REG_DISCONTINUOUS((uint32_t)hadc->Init.DiscontinuousConvMode));
- 8005bbc: 687b ldr r3, [r7, #4]
- 8005bbe: 7f1b ldrb r3, [r3, #28]
- 8005bc0: 041b lsls r3, r3, #16
- hadc->Init.Resolution | (ADC_CFGR_RES_1 | ADC_CFGR_RES_0) |
- 8005bc2: 4313 orrs r3, r2
- tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) |
- 8005bc4: f043 030c orr.w r3, r3, #12
- 8005bc8: 61bb str r3, [r7, #24]
- 8005bca: e00d b.n 8005be8 <HAL_ADC_Init+0x1c0>
- }
- else
- {
- tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) |
- 8005bcc: 687b ldr r3, [r7, #4]
- 8005bce: 7d5b ldrb r3, [r3, #21]
- 8005bd0: 035a lsls r2, r3, #13
- hadc->Init.Overrun |
- 8005bd2: 687b ldr r3, [r7, #4]
- 8005bd4: 6b1b ldr r3, [r3, #48] @ 0x30
- tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) |
- 8005bd6: 431a orrs r2, r3
- hadc->Init.Resolution |
- 8005bd8: 687b ldr r3, [r7, #4]
- 8005bda: 689b ldr r3, [r3, #8]
- hadc->Init.Overrun |
- 8005bdc: 431a orrs r2, r3
- ADC_CFGR_REG_DISCONTINUOUS((uint32_t)hadc->Init.DiscontinuousConvMode));
- 8005bde: 687b ldr r3, [r7, #4]
- 8005be0: 7f1b ldrb r3, [r3, #28]
- 8005be2: 041b lsls r3, r3, #16
- tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) |
- 8005be4: 4313 orrs r3, r2
- 8005be6: 61bb str r3, [r7, #24]
- }
- #endif /* ADC_VER_V5_3 */
- if (hadc->Init.DiscontinuousConvMode == ENABLE)
- 8005be8: 687b ldr r3, [r7, #4]
- 8005bea: 7f1b ldrb r3, [r3, #28]
- 8005bec: 2b01 cmp r3, #1
- 8005bee: d106 bne.n 8005bfe <HAL_ADC_Init+0x1d6>
- {
- tmpCFGR |= ADC_CFGR_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion);
- 8005bf0: 687b ldr r3, [r7, #4]
- 8005bf2: 6a1b ldr r3, [r3, #32]
- 8005bf4: 3b01 subs r3, #1
- 8005bf6: 045b lsls r3, r3, #17
- 8005bf8: 69ba ldr r2, [r7, #24]
- 8005bfa: 4313 orrs r3, r2
- 8005bfc: 61bb str r3, [r7, #24]
- /* Enable external trigger if trigger selection is different of software */
- /* start. */
- /* Note: This configuration keeps the hardware feature of parameter */
- /* ExternalTrigConvEdge "trigger edge none" equivalent to */
- /* software start. */
- if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
- 8005bfe: 687b ldr r3, [r7, #4]
- 8005c00: 6a5b ldr r3, [r3, #36] @ 0x24
- 8005c02: 2b00 cmp r3, #0
- 8005c04: d009 beq.n 8005c1a <HAL_ADC_Init+0x1f2>
- {
- tmpCFGR |= ((hadc->Init.ExternalTrigConv & ADC_CFGR_EXTSEL)
- 8005c06: 687b ldr r3, [r7, #4]
- 8005c08: 6a5b ldr r3, [r3, #36] @ 0x24
- 8005c0a: f403 7278 and.w r2, r3, #992 @ 0x3e0
- | hadc->Init.ExternalTrigConvEdge
- 8005c0e: 687b ldr r3, [r7, #4]
- 8005c10: 6a9b ldr r3, [r3, #40] @ 0x28
- 8005c12: 4313 orrs r3, r2
- tmpCFGR |= ((hadc->Init.ExternalTrigConv & ADC_CFGR_EXTSEL)
- 8005c14: 69ba ldr r2, [r7, #24]
- 8005c16: 4313 orrs r3, r2
- 8005c18: 61bb str r3, [r7, #24]
- /* Update Configuration Register CFGR */
- MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_1, tmpCFGR);
- }
- #else
- /* Update Configuration Register CFGR */
- MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_1, tmpCFGR);
- 8005c1a: 687b ldr r3, [r7, #4]
- 8005c1c: 681b ldr r3, [r3, #0]
- 8005c1e: 68da ldr r2, [r3, #12]
- 8005c20: 4b2c ldr r3, [pc, #176] @ (8005cd4 <HAL_ADC_Init+0x2ac>)
- 8005c22: 4013 ands r3, r2
- 8005c24: 687a ldr r2, [r7, #4]
- 8005c26: 6812 ldr r2, [r2, #0]
- 8005c28: 69b9 ldr r1, [r7, #24]
- 8005c2a: 430b orrs r3, r1
- 8005c2c: 60d3 str r3, [r2, #12]
- /* Parameters that can be updated when ADC is disabled or enabled without */
- /* conversion on going on regular and injected groups: */
- /* - Conversion data management Init.ConversionDataManagement */
- /* - LowPowerAutoWait feature Init.LowPowerAutoWait */
- /* - Oversampling parameters Init.Oversampling */
- tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
- 8005c2e: 687b ldr r3, [r7, #4]
- 8005c30: 681b ldr r3, [r3, #0]
- 8005c32: 4618 mov r0, r3
- 8005c34: f7ff fed2 bl 80059dc <LL_ADC_REG_IsConversionOngoing>
- 8005c38: 6138 str r0, [r7, #16]
- tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
- 8005c3a: 687b ldr r3, [r7, #4]
- 8005c3c: 681b ldr r3, [r3, #0]
- 8005c3e: 4618 mov r0, r3
- 8005c40: f7ff fedf bl 8005a02 <LL_ADC_INJ_IsConversionOngoing>
- 8005c44: 60f8 str r0, [r7, #12]
- if ((tmp_adc_is_conversion_on_going_regular == 0UL)
- 8005c46: 693b ldr r3, [r7, #16]
- 8005c48: 2b00 cmp r3, #0
- 8005c4a: d15f bne.n 8005d0c <HAL_ADC_Init+0x2e4>
- && (tmp_adc_is_conversion_on_going_injected == 0UL)
- 8005c4c: 68fb ldr r3, [r7, #12]
- 8005c4e: 2b00 cmp r3, #0
- 8005c50: d15c bne.n 8005d0c <HAL_ADC_Init+0x2e4>
- ADC_CFGR_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) |
- ADC_CFGR_DMACONTREQ((uint32_t)hadc->Init.ConversionDataManagement));
- }
- #else
- tmpCFGR = (
- ADC_CFGR_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) |
- 8005c52: 687b ldr r3, [r7, #4]
- 8005c54: 7d1b ldrb r3, [r3, #20]
- 8005c56: 039a lsls r2, r3, #14
- ADC_CFGR_DMACONTREQ((uint32_t)hadc->Init.ConversionDataManagement));
- 8005c58: 687b ldr r3, [r7, #4]
- 8005c5a: 6adb ldr r3, [r3, #44] @ 0x2c
- tmpCFGR = (
- 8005c5c: 4313 orrs r3, r2
- 8005c5e: 61bb str r3, [r7, #24]
- #endif
- MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_2, tmpCFGR);
- 8005c60: 687b ldr r3, [r7, #4]
- 8005c62: 681b ldr r3, [r3, #0]
- 8005c64: 68da ldr r2, [r3, #12]
- 8005c66: 4b1c ldr r3, [pc, #112] @ (8005cd8 <HAL_ADC_Init+0x2b0>)
- 8005c68: 4013 ands r3, r2
- 8005c6a: 687a ldr r2, [r7, #4]
- 8005c6c: 6812 ldr r2, [r2, #0]
- 8005c6e: 69b9 ldr r1, [r7, #24]
- 8005c70: 430b orrs r3, r1
- 8005c72: 60d3 str r3, [r2, #12]
- if (hadc->Init.OversamplingMode == ENABLE)
- 8005c74: 687b ldr r3, [r7, #4]
- 8005c76: f893 3038 ldrb.w r3, [r3, #56] @ 0x38
- 8005c7a: 2b01 cmp r3, #1
- 8005c7c: d130 bne.n 8005ce0 <HAL_ADC_Init+0x2b8>
- #endif
- assert_param(IS_ADC_RIGHT_BIT_SHIFT(hadc->Init.Oversampling.RightBitShift));
- assert_param(IS_ADC_TRIGGERED_OVERSAMPLING_MODE(hadc->Init.Oversampling.TriggeredMode));
- assert_param(IS_ADC_REGOVERSAMPLING_MODE(hadc->Init.Oversampling.OversamplingStopReset));
- if ((hadc->Init.ExternalTrigConv == ADC_SOFTWARE_START)
- 8005c7e: 687b ldr r3, [r7, #4]
- 8005c80: 6a5b ldr r3, [r3, #36] @ 0x24
- 8005c82: 2b00 cmp r3, #0
- /* - Oversampling Ratio */
- /* - Right bit shift */
- /* - Left bit shift */
- /* - Triggered mode */
- /* - Oversampling mode (continued/resumed) */
- MODIFY_REG(hadc->Instance->CFGR2, ADC_CFGR2_FIELDS,
- 8005c84: 687b ldr r3, [r7, #4]
- 8005c86: 681b ldr r3, [r3, #0]
- 8005c88: 691a ldr r2, [r3, #16]
- 8005c8a: 4b14 ldr r3, [pc, #80] @ (8005cdc <HAL_ADC_Init+0x2b4>)
- 8005c8c: 4013 ands r3, r2
- 8005c8e: 687a ldr r2, [r7, #4]
- 8005c90: 6bd2 ldr r2, [r2, #60] @ 0x3c
- 8005c92: 3a01 subs r2, #1
- 8005c94: 0411 lsls r1, r2, #16
- 8005c96: 687a ldr r2, [r7, #4]
- 8005c98: 6c12 ldr r2, [r2, #64] @ 0x40
- 8005c9a: 4311 orrs r1, r2
- 8005c9c: 687a ldr r2, [r7, #4]
- 8005c9e: 6c52 ldr r2, [r2, #68] @ 0x44
- 8005ca0: 4311 orrs r1, r2
- 8005ca2: 687a ldr r2, [r7, #4]
- 8005ca4: 6c92 ldr r2, [r2, #72] @ 0x48
- 8005ca6: 430a orrs r2, r1
- 8005ca8: 431a orrs r2, r3
- 8005caa: 687b ldr r3, [r7, #4]
- 8005cac: 681b ldr r3, [r3, #0]
- 8005cae: f042 0201 orr.w r2, r2, #1
- 8005cb2: 611a str r2, [r3, #16]
- 8005cb4: e01c b.n 8005cf0 <HAL_ADC_Init+0x2c8>
- 8005cb6: bf00 nop
- 8005cb8: 24000034 .word 0x24000034
- 8005cbc: 053e2d63 .word 0x053e2d63
- 8005cc0: 40022000 .word 0x40022000
- 8005cc4: 40022100 .word 0x40022100
- 8005cc8: 58026000 .word 0x58026000
- 8005ccc: 40022300 .word 0x40022300
- 8005cd0: 58026300 .word 0x58026300
- 8005cd4: fff0c003 .word 0xfff0c003
- 8005cd8: ffffbffc .word 0xffffbffc
- 8005cdc: fc00f81e .word 0xfc00f81e
- }
- else
- {
- /* Disable ADC oversampling scope on ADC group regular */
- CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE);
- 8005ce0: 687b ldr r3, [r7, #4]
- 8005ce2: 681b ldr r3, [r3, #0]
- 8005ce4: 691a ldr r2, [r3, #16]
- 8005ce6: 687b ldr r3, [r7, #4]
- 8005ce8: 681b ldr r3, [r3, #0]
- 8005cea: f022 0201 bic.w r2, r2, #1
- 8005cee: 611a str r2, [r3, #16]
- }
- /* Set the LeftShift parameter: it is applied to the final result with or without oversampling */
- MODIFY_REG(hadc->Instance->CFGR2, ADC_CFGR2_LSHIFT, hadc->Init.LeftBitShift);
- 8005cf0: 687b ldr r3, [r7, #4]
- 8005cf2: 681b ldr r3, [r3, #0]
- 8005cf4: 691b ldr r3, [r3, #16]
- 8005cf6: f023 4170 bic.w r1, r3, #4026531840 @ 0xf0000000
- 8005cfa: 687b ldr r3, [r7, #4]
- 8005cfc: 6b5a ldr r2, [r3, #52] @ 0x34
- 8005cfe: 687b ldr r3, [r7, #4]
- 8005d00: 681b ldr r3, [r3, #0]
- 8005d02: 430a orrs r2, r1
- 8005d04: 611a str r2, [r3, #16]
- /* Configure the BOOST Mode */
- ADC_ConfigureBoostMode(hadc);
- }
- #else
- /* Configure the BOOST Mode */
- ADC_ConfigureBoostMode(hadc);
- 8005d06: 6878 ldr r0, [r7, #4]
- 8005d08: f000 fde2 bl 80068d0 <ADC_ConfigureBoostMode>
- /* Note: Scan mode is not present by hardware on this device, but */
- /* emulated by software for alignment over all STM32 devices. */
- /* - if scan mode is enabled, regular channels sequence length is set to */
- /* parameter "NbrOfConversion". */
- if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE)
- 8005d0c: 687b ldr r3, [r7, #4]
- 8005d0e: 68db ldr r3, [r3, #12]
- 8005d10: 2b01 cmp r3, #1
- 8005d12: d10c bne.n 8005d2e <HAL_ADC_Init+0x306>
- {
- /* Set number of ranks in regular group sequencer */
- MODIFY_REG(hadc->Instance->SQR1, ADC_SQR1_L, (hadc->Init.NbrOfConversion - (uint8_t)1));
- 8005d14: 687b ldr r3, [r7, #4]
- 8005d16: 681b ldr r3, [r3, #0]
- 8005d18: 6b1b ldr r3, [r3, #48] @ 0x30
- 8005d1a: f023 010f bic.w r1, r3, #15
- 8005d1e: 687b ldr r3, [r7, #4]
- 8005d20: 699b ldr r3, [r3, #24]
- 8005d22: 1e5a subs r2, r3, #1
- 8005d24: 687b ldr r3, [r7, #4]
- 8005d26: 681b ldr r3, [r3, #0]
- 8005d28: 430a orrs r2, r1
- 8005d2a: 631a str r2, [r3, #48] @ 0x30
- 8005d2c: e007 b.n 8005d3e <HAL_ADC_Init+0x316>
- }
- else
- {
- CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_L);
- 8005d2e: 687b ldr r3, [r7, #4]
- 8005d30: 681b ldr r3, [r3, #0]
- 8005d32: 6b1a ldr r2, [r3, #48] @ 0x30
- 8005d34: 687b ldr r3, [r7, #4]
- 8005d36: 681b ldr r3, [r3, #0]
- 8005d38: f022 020f bic.w r2, r2, #15
- 8005d3c: 631a str r2, [r3, #48] @ 0x30
- }
- /* Initialize the ADC state */
- /* Clear HAL_ADC_STATE_BUSY_INTERNAL bit, set HAL_ADC_STATE_READY bit */
- ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY);
- 8005d3e: 687b ldr r3, [r7, #4]
- 8005d40: 6d5b ldr r3, [r3, #84] @ 0x54
- 8005d42: f023 0303 bic.w r3, r3, #3
- 8005d46: f043 0201 orr.w r2, r3, #1
- 8005d4a: 687b ldr r3, [r7, #4]
- 8005d4c: 655a str r2, [r3, #84] @ 0x54
- 8005d4e: e007 b.n 8005d60 <HAL_ADC_Init+0x338>
- }
- else
- {
- /* Update ADC state machine to error */
- SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
- 8005d50: 687b ldr r3, [r7, #4]
- 8005d52: 6d5b ldr r3, [r3, #84] @ 0x54
- 8005d54: f043 0210 orr.w r2, r3, #16
- 8005d58: 687b ldr r3, [r7, #4]
- 8005d5a: 655a str r2, [r3, #84] @ 0x54
- tmp_hal_status = HAL_ERROR;
- 8005d5c: 2301 movs r3, #1
- 8005d5e: 77fb strb r3, [r7, #31]
- }
- /* Return function status */
- return tmp_hal_status;
- 8005d60: 7ffb ldrb r3, [r7, #31]
- }
- 8005d62: 4618 mov r0, r3
- 8005d64: 3724 adds r7, #36 @ 0x24
- 8005d66: 46bd mov sp, r7
- 8005d68: bd90 pop {r4, r7, pc}
- 8005d6a: bf00 nop
- 08005d6c <HAL_ADC_Start_DMA>:
- * @param pData Destination Buffer address.
- * @param Length Number of data to be transferred from ADC peripheral to memory
- * @retval HAL status.
- */
- HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length)
- {
- 8005d6c: b580 push {r7, lr}
- 8005d6e: b086 sub sp, #24
- 8005d70: af00 add r7, sp, #0
- 8005d72: 60f8 str r0, [r7, #12]
- 8005d74: 60b9 str r1, [r7, #8]
- 8005d76: 607a str r2, [r7, #4]
- HAL_StatusTypeDef tmp_hal_status;
- uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
- 8005d78: 68fb ldr r3, [r7, #12]
- 8005d7a: 681b ldr r3, [r3, #0]
- 8005d7c: 4a55 ldr r2, [pc, #340] @ (8005ed4 <HAL_ADC_Start_DMA+0x168>)
- 8005d7e: 4293 cmp r3, r2
- 8005d80: d004 beq.n 8005d8c <HAL_ADC_Start_DMA+0x20>
- 8005d82: 68fb ldr r3, [r7, #12]
- 8005d84: 681b ldr r3, [r3, #0]
- 8005d86: 4a54 ldr r2, [pc, #336] @ (8005ed8 <HAL_ADC_Start_DMA+0x16c>)
- 8005d88: 4293 cmp r3, r2
- 8005d8a: d101 bne.n 8005d90 <HAL_ADC_Start_DMA+0x24>
- 8005d8c: 4b53 ldr r3, [pc, #332] @ (8005edc <HAL_ADC_Start_DMA+0x170>)
- 8005d8e: e000 b.n 8005d92 <HAL_ADC_Start_DMA+0x26>
- 8005d90: 4b53 ldr r3, [pc, #332] @ (8005ee0 <HAL_ADC_Start_DMA+0x174>)
- 8005d92: 4618 mov r0, r3
- 8005d94: f7ff fd64 bl 8005860 <LL_ADC_GetMultimode>
- 8005d98: 6138 str r0, [r7, #16]
- /* Check the parameters */
- assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
- /* Perform ADC enable and conversion start if no conversion is on going */
- if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
- 8005d9a: 68fb ldr r3, [r7, #12]
- 8005d9c: 681b ldr r3, [r3, #0]
- 8005d9e: 4618 mov r0, r3
- 8005da0: f7ff fe1c bl 80059dc <LL_ADC_REG_IsConversionOngoing>
- 8005da4: 4603 mov r3, r0
- 8005da6: 2b00 cmp r3, #0
- 8005da8: f040 808c bne.w 8005ec4 <HAL_ADC_Start_DMA+0x158>
- {
- /* Process locked */
- __HAL_LOCK(hadc);
- 8005dac: 68fb ldr r3, [r7, #12]
- 8005dae: f893 3050 ldrb.w r3, [r3, #80] @ 0x50
- 8005db2: 2b01 cmp r3, #1
- 8005db4: d101 bne.n 8005dba <HAL_ADC_Start_DMA+0x4e>
- 8005db6: 2302 movs r3, #2
- 8005db8: e087 b.n 8005eca <HAL_ADC_Start_DMA+0x15e>
- 8005dba: 68fb ldr r3, [r7, #12]
- 8005dbc: 2201 movs r2, #1
- 8005dbe: f883 2050 strb.w r2, [r3, #80] @ 0x50
- /* Ensure that multimode regular conversions are not enabled. */
- /* Otherwise, dedicated API HAL_ADCEx_MultiModeStart_DMA() must be used. */
- if ((tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
- 8005dc2: 693b ldr r3, [r7, #16]
- 8005dc4: 2b00 cmp r3, #0
- 8005dc6: d005 beq.n 8005dd4 <HAL_ADC_Start_DMA+0x68>
- || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT)
- 8005dc8: 693b ldr r3, [r7, #16]
- 8005dca: 2b05 cmp r3, #5
- 8005dcc: d002 beq.n 8005dd4 <HAL_ADC_Start_DMA+0x68>
- || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN)
- 8005dce: 693b ldr r3, [r7, #16]
- 8005dd0: 2b09 cmp r3, #9
- 8005dd2: d170 bne.n 8005eb6 <HAL_ADC_Start_DMA+0x14a>
- )
- {
- /* Enable the ADC peripheral */
- tmp_hal_status = ADC_Enable(hadc);
- 8005dd4: 68f8 ldr r0, [r7, #12]
- 8005dd6: f000 fbfd bl 80065d4 <ADC_Enable>
- 8005dda: 4603 mov r3, r0
- 8005ddc: 75fb strb r3, [r7, #23]
- /* Start conversion if ADC is effectively enabled */
- if (tmp_hal_status == HAL_OK)
- 8005dde: 7dfb ldrb r3, [r7, #23]
- 8005de0: 2b00 cmp r3, #0
- 8005de2: d163 bne.n 8005eac <HAL_ADC_Start_DMA+0x140>
- {
- /* Set ADC state */
- /* - Clear state bitfield related to regular group conversion results */
- /* - Set state bitfield related to regular operation */
- ADC_STATE_CLR_SET(hadc->State,
- 8005de4: 68fb ldr r3, [r7, #12]
- 8005de6: 6d5a ldr r2, [r3, #84] @ 0x54
- 8005de8: 4b3e ldr r3, [pc, #248] @ (8005ee4 <HAL_ADC_Start_DMA+0x178>)
- 8005dea: 4013 ands r3, r2
- 8005dec: f443 7280 orr.w r2, r3, #256 @ 0x100
- 8005df0: 68fb ldr r3, [r7, #12]
- 8005df2: 655a str r2, [r3, #84] @ 0x54
- HAL_ADC_STATE_REG_BUSY);
- /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
- - if ADC instance is master or if multimode feature is not available
- - if multimode setting is disabled (ADC instance slave in independent mode) */
- if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
- 8005df4: 68fb ldr r3, [r7, #12]
- 8005df6: 681b ldr r3, [r3, #0]
- 8005df8: 4a37 ldr r2, [pc, #220] @ (8005ed8 <HAL_ADC_Start_DMA+0x16c>)
- 8005dfa: 4293 cmp r3, r2
- 8005dfc: d002 beq.n 8005e04 <HAL_ADC_Start_DMA+0x98>
- 8005dfe: 68fb ldr r3, [r7, #12]
- 8005e00: 681b ldr r3, [r3, #0]
- 8005e02: e000 b.n 8005e06 <HAL_ADC_Start_DMA+0x9a>
- 8005e04: 4b33 ldr r3, [pc, #204] @ (8005ed4 <HAL_ADC_Start_DMA+0x168>)
- 8005e06: 68fa ldr r2, [r7, #12]
- 8005e08: 6812 ldr r2, [r2, #0]
- 8005e0a: 4293 cmp r3, r2
- 8005e0c: d002 beq.n 8005e14 <HAL_ADC_Start_DMA+0xa8>
- || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
- 8005e0e: 693b ldr r3, [r7, #16]
- 8005e10: 2b00 cmp r3, #0
- 8005e12: d105 bne.n 8005e20 <HAL_ADC_Start_DMA+0xb4>
- )
- {
- CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
- 8005e14: 68fb ldr r3, [r7, #12]
- 8005e16: 6d5b ldr r3, [r3, #84] @ 0x54
- 8005e18: f423 1280 bic.w r2, r3, #1048576 @ 0x100000
- 8005e1c: 68fb ldr r3, [r7, #12]
- 8005e1e: 655a str r2, [r3, #84] @ 0x54
- }
- /* Check if a conversion is on going on ADC group injected */
- if ((hadc->State & HAL_ADC_STATE_INJ_BUSY) != 0UL)
- 8005e20: 68fb ldr r3, [r7, #12]
- 8005e22: 6d5b ldr r3, [r3, #84] @ 0x54
- 8005e24: f403 5380 and.w r3, r3, #4096 @ 0x1000
- 8005e28: 2b00 cmp r3, #0
- 8005e2a: d006 beq.n 8005e3a <HAL_ADC_Start_DMA+0xce>
- {
- /* Reset ADC error code fields related to regular conversions only */
- CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
- 8005e2c: 68fb ldr r3, [r7, #12]
- 8005e2e: 6d9b ldr r3, [r3, #88] @ 0x58
- 8005e30: f023 0206 bic.w r2, r3, #6
- 8005e34: 68fb ldr r3, [r7, #12]
- 8005e36: 659a str r2, [r3, #88] @ 0x58
- 8005e38: e002 b.n 8005e40 <HAL_ADC_Start_DMA+0xd4>
- }
- else
- {
- /* Reset all ADC error code fields */
- ADC_CLEAR_ERRORCODE(hadc);
- 8005e3a: 68fb ldr r3, [r7, #12]
- 8005e3c: 2200 movs r2, #0
- 8005e3e: 659a str r2, [r3, #88] @ 0x58
- }
- /* Set the DMA transfer complete callback */
- hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
- 8005e40: 68fb ldr r3, [r7, #12]
- 8005e42: 6cdb ldr r3, [r3, #76] @ 0x4c
- 8005e44: 4a28 ldr r2, [pc, #160] @ (8005ee8 <HAL_ADC_Start_DMA+0x17c>)
- 8005e46: 63da str r2, [r3, #60] @ 0x3c
- /* Set the DMA half transfer complete callback */
- hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
- 8005e48: 68fb ldr r3, [r7, #12]
- 8005e4a: 6cdb ldr r3, [r3, #76] @ 0x4c
- 8005e4c: 4a27 ldr r2, [pc, #156] @ (8005eec <HAL_ADC_Start_DMA+0x180>)
- 8005e4e: 641a str r2, [r3, #64] @ 0x40
- /* Set the DMA error callback */
- hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
- 8005e50: 68fb ldr r3, [r7, #12]
- 8005e52: 6cdb ldr r3, [r3, #76] @ 0x4c
- 8005e54: 4a26 ldr r2, [pc, #152] @ (8005ef0 <HAL_ADC_Start_DMA+0x184>)
- 8005e56: 64da str r2, [r3, #76] @ 0x4c
- /* ADC start (in case of SW start): */
- /* Clear regular group conversion flag and overrun flag */
- /* (To ensure of no unknown state from potential previous ADC */
- /* operations) */
- __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
- 8005e58: 68fb ldr r3, [r7, #12]
- 8005e5a: 681b ldr r3, [r3, #0]
- 8005e5c: 221c movs r2, #28
- 8005e5e: 601a str r2, [r3, #0]
- /* Process unlocked */
- /* Unlock before starting ADC conversions: in case of potential */
- /* interruption, to let the process to ADC IRQ Handler. */
- __HAL_UNLOCK(hadc);
- 8005e60: 68fb ldr r3, [r7, #12]
- 8005e62: 2200 movs r2, #0
- 8005e64: f883 2050 strb.w r2, [r3, #80] @ 0x50
- /* With DMA, overrun event is always considered as an error even if
- hadc->Init.Overrun is set to ADC_OVR_DATA_OVERWRITTEN. Therefore,
- ADC_IT_OVR is enabled. */
- __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
- 8005e68: 68fb ldr r3, [r7, #12]
- 8005e6a: 681b ldr r3, [r3, #0]
- 8005e6c: 685a ldr r2, [r3, #4]
- 8005e6e: 68fb ldr r3, [r7, #12]
- 8005e70: 681b ldr r3, [r3, #0]
- 8005e72: f042 0210 orr.w r2, r2, #16
- 8005e76: 605a str r2, [r3, #4]
- {
- LL_ADC_REG_SetDataTransferMode(hadc->Instance, ADC_CFGR_DMACONTREQ((uint32_t)hadc->Init.ConversionDataManagement));
- }
- #else
- LL_ADC_REG_SetDataTransferMode(hadc->Instance, (uint32_t)hadc->Init.ConversionDataManagement);
- 8005e78: 68fb ldr r3, [r7, #12]
- 8005e7a: 681a ldr r2, [r3, #0]
- 8005e7c: 68fb ldr r3, [r7, #12]
- 8005e7e: 6adb ldr r3, [r3, #44] @ 0x2c
- 8005e80: 4619 mov r1, r3
- 8005e82: 4610 mov r0, r2
- 8005e84: f7ff fc89 bl 800579a <LL_ADC_REG_SetDataTransferMode>
- #endif
- /* Start the DMA channel */
- tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
- 8005e88: 68fb ldr r3, [r7, #12]
- 8005e8a: 6cd8 ldr r0, [r3, #76] @ 0x4c
- 8005e8c: 68fb ldr r3, [r7, #12]
- 8005e8e: 681b ldr r3, [r3, #0]
- 8005e90: 3340 adds r3, #64 @ 0x40
- 8005e92: 4619 mov r1, r3
- 8005e94: 68ba ldr r2, [r7, #8]
- 8005e96: 687b ldr r3, [r7, #4]
- 8005e98: f002 fa5e bl 8008358 <HAL_DMA_Start_IT>
- 8005e9c: 4603 mov r3, r0
- 8005e9e: 75fb strb r3, [r7, #23]
- /* Enable conversion of regular group. */
- /* If software start has been selected, conversion starts immediately. */
- /* If external trigger has been selected, conversion will start at next */
- /* trigger event. */
- /* Start ADC group regular conversion */
- LL_ADC_REG_StartConversion(hadc->Instance);
- 8005ea0: 68fb ldr r3, [r7, #12]
- 8005ea2: 681b ldr r3, [r3, #0]
- 8005ea4: 4618 mov r0, r3
- 8005ea6: f7ff fd85 bl 80059b4 <LL_ADC_REG_StartConversion>
- if (tmp_hal_status == HAL_OK)
- 8005eaa: e00d b.n 8005ec8 <HAL_ADC_Start_DMA+0x15c>
- }
- else
- {
- /* Process unlocked */
- __HAL_UNLOCK(hadc);
- 8005eac: 68fb ldr r3, [r7, #12]
- 8005eae: 2200 movs r2, #0
- 8005eb0: f883 2050 strb.w r2, [r3, #80] @ 0x50
- if (tmp_hal_status == HAL_OK)
- 8005eb4: e008 b.n 8005ec8 <HAL_ADC_Start_DMA+0x15c>
- }
- }
- else
- {
- tmp_hal_status = HAL_ERROR;
- 8005eb6: 2301 movs r3, #1
- 8005eb8: 75fb strb r3, [r7, #23]
- /* Process unlocked */
- __HAL_UNLOCK(hadc);
- 8005eba: 68fb ldr r3, [r7, #12]
- 8005ebc: 2200 movs r2, #0
- 8005ebe: f883 2050 strb.w r2, [r3, #80] @ 0x50
- 8005ec2: e001 b.n 8005ec8 <HAL_ADC_Start_DMA+0x15c>
- }
- }
- else
- {
- tmp_hal_status = HAL_BUSY;
- 8005ec4: 2302 movs r3, #2
- 8005ec6: 75fb strb r3, [r7, #23]
- }
- /* Return function status */
- return tmp_hal_status;
- 8005ec8: 7dfb ldrb r3, [r7, #23]
- }
- 8005eca: 4618 mov r0, r3
- 8005ecc: 3718 adds r7, #24
- 8005ece: 46bd mov sp, r7
- 8005ed0: bd80 pop {r7, pc}
- 8005ed2: bf00 nop
- 8005ed4: 40022000 .word 0x40022000
- 8005ed8: 40022100 .word 0x40022100
- 8005edc: 40022300 .word 0x40022300
- 8005ee0: 58026300 .word 0x58026300
- 8005ee4: fffff0fe .word 0xfffff0fe
- 8005ee8: 080067a7 .word 0x080067a7
- 8005eec: 0800687f .word 0x0800687f
- 8005ef0: 0800689b .word 0x0800689b
- 08005ef4 <HAL_ADC_ConvHalfCpltCallback>:
- * @brief Conversion DMA half-transfer callback in non-blocking mode.
- * @param hadc ADC handle
- * @retval None
- */
- __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef *hadc)
- {
- 8005ef4: b480 push {r7}
- 8005ef6: b083 sub sp, #12
- 8005ef8: af00 add r7, sp, #0
- 8005efa: 6078 str r0, [r7, #4]
- UNUSED(hadc);
- /* NOTE : This function should not be modified. When the callback is needed,
- function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
- */
- }
- 8005efc: bf00 nop
- 8005efe: 370c adds r7, #12
- 8005f00: 46bd mov sp, r7
- 8005f02: f85d 7b04 ldr.w r7, [sp], #4
- 8005f06: 4770 bx lr
- 08005f08 <HAL_ADC_ErrorCallback>:
- * (this function is also clearing overrun flag)
- * @param hadc ADC handle
- * @retval None
- */
- __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
- {
- 8005f08: b480 push {r7}
- 8005f0a: b083 sub sp, #12
- 8005f0c: af00 add r7, sp, #0
- 8005f0e: 6078 str r0, [r7, #4]
- UNUSED(hadc);
- /* NOTE : This function should not be modified. When the callback is needed,
- function HAL_ADC_ErrorCallback must be implemented in the user file.
- */
- }
- 8005f10: bf00 nop
- 8005f12: 370c adds r7, #12
- 8005f14: 46bd mov sp, r7
- 8005f16: f85d 7b04 ldr.w r7, [sp], #4
- 8005f1a: 4770 bx lr
- 08005f1c <HAL_ADC_ConfigChannel>:
- * @param hadc ADC handle
- * @param sConfig Structure of ADC channel assigned to ADC group regular.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, ADC_ChannelConfTypeDef *sConfig)
- {
- 8005f1c: b590 push {r4, r7, lr}
- 8005f1e: b0a1 sub sp, #132 @ 0x84
- 8005f20: af00 add r7, sp, #0
- 8005f22: 6078 str r0, [r7, #4]
- 8005f24: 6039 str r1, [r7, #0]
- HAL_StatusTypeDef tmp_hal_status = HAL_OK;
- 8005f26: 2300 movs r3, #0
- 8005f28: f887 307f strb.w r3, [r7, #127] @ 0x7f
- uint32_t tmpOffsetShifted;
- uint32_t tmp_config_internal_channel;
- __IO uint32_t wait_loop_index = 0;
- 8005f2c: 2300 movs r3, #0
- 8005f2e: 60bb str r3, [r7, #8]
- /* if ROVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is
- ignored (considered as reset) */
- assert_param(!((sConfig->OffsetNumber != ADC_OFFSET_NONE) && (hadc->Init.OversamplingMode == ENABLE)));
- /* Verification of channel number */
- if (sConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED)
- 8005f30: 683b ldr r3, [r7, #0]
- 8005f32: 68db ldr r3, [r3, #12]
- 8005f34: 4a65 ldr r2, [pc, #404] @ (80060cc <HAL_ADC_ConfigChannel+0x1b0>)
- 8005f36: 4293 cmp r3, r2
- }
- #endif
- }
- /* Process locked */
- __HAL_LOCK(hadc);
- 8005f38: 687b ldr r3, [r7, #4]
- 8005f3a: f893 3050 ldrb.w r3, [r3, #80] @ 0x50
- 8005f3e: 2b01 cmp r3, #1
- 8005f40: d101 bne.n 8005f46 <HAL_ADC_ConfigChannel+0x2a>
- 8005f42: 2302 movs r3, #2
- 8005f44: e32e b.n 80065a4 <HAL_ADC_ConfigChannel+0x688>
- 8005f46: 687b ldr r3, [r7, #4]
- 8005f48: 2201 movs r2, #1
- 8005f4a: f883 2050 strb.w r2, [r3, #80] @ 0x50
- /* Parameters update conditioned to ADC state: */
- /* Parameters that can be updated when ADC is disabled or enabled without */
- /* conversion on going on regular group: */
- /* - Channel number */
- /* - Channel rank */
- if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
- 8005f4e: 687b ldr r3, [r7, #4]
- 8005f50: 681b ldr r3, [r3, #0]
- 8005f52: 4618 mov r0, r3
- 8005f54: f7ff fd42 bl 80059dc <LL_ADC_REG_IsConversionOngoing>
- 8005f58: 4603 mov r3, r0
- 8005f5a: 2b00 cmp r3, #0
- 8005f5c: f040 8313 bne.w 8006586 <HAL_ADC_ConfigChannel+0x66a>
- {
- if (!(__LL_ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)))
- 8005f60: 683b ldr r3, [r7, #0]
- 8005f62: 681b ldr r3, [r3, #0]
- 8005f64: 2b00 cmp r3, #0
- 8005f66: db2c blt.n 8005fc2 <HAL_ADC_ConfigChannel+0xa6>
- /* ADC channels preselection */
- hadc->Instance->PCSEL_RES0 |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) & 0x1FUL));
- }
- #else
- /* ADC channels preselection */
- hadc->Instance->PCSEL |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) & 0x1FUL));
- 8005f68: 683b ldr r3, [r7, #0]
- 8005f6a: 681b ldr r3, [r3, #0]
- 8005f6c: f3c3 0313 ubfx r3, r3, #0, #20
- 8005f70: 2b00 cmp r3, #0
- 8005f72: d108 bne.n 8005f86 <HAL_ADC_ConfigChannel+0x6a>
- 8005f74: 683b ldr r3, [r7, #0]
- 8005f76: 681b ldr r3, [r3, #0]
- 8005f78: 0e9b lsrs r3, r3, #26
- 8005f7a: f003 031f and.w r3, r3, #31
- 8005f7e: 2201 movs r2, #1
- 8005f80: fa02 f303 lsl.w r3, r2, r3
- 8005f84: e016 b.n 8005fb4 <HAL_ADC_ConfigChannel+0x98>
- 8005f86: 683b ldr r3, [r7, #0]
- 8005f88: 681b ldr r3, [r3, #0]
- 8005f8a: 667b str r3, [r7, #100] @ 0x64
- uint32_t result;
- #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8005f8c: 6e7b ldr r3, [r7, #100] @ 0x64
- 8005f8e: fa93 f3a3 rbit r3, r3
- 8005f92: 663b str r3, [r7, #96] @ 0x60
- result |= value & 1U;
- s--;
- }
- result <<= s; /* shift when v's highest bits are zero */
- #endif
- return result;
- 8005f94: 6e3b ldr r3, [r7, #96] @ 0x60
- 8005f96: 66bb str r3, [r7, #104] @ 0x68
- optimisations using the logic "value was passed to __builtin_clz, so it
- is non-zero".
- ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
- single CLZ instruction.
- */
- if (value == 0U)
- 8005f98: 6ebb ldr r3, [r7, #104] @ 0x68
- 8005f9a: 2b00 cmp r3, #0
- 8005f9c: d101 bne.n 8005fa2 <HAL_ADC_ConfigChannel+0x86>
- {
- return 32U;
- 8005f9e: 2320 movs r3, #32
- 8005fa0: e003 b.n 8005faa <HAL_ADC_ConfigChannel+0x8e>
- }
- return __builtin_clz(value);
- 8005fa2: 6ebb ldr r3, [r7, #104] @ 0x68
- 8005fa4: fab3 f383 clz r3, r3
- 8005fa8: b2db uxtb r3, r3
- 8005faa: f003 031f and.w r3, r3, #31
- 8005fae: 2201 movs r2, #1
- 8005fb0: fa02 f303 lsl.w r3, r2, r3
- 8005fb4: 687a ldr r2, [r7, #4]
- 8005fb6: 6812 ldr r2, [r2, #0]
- 8005fb8: 69d1 ldr r1, [r2, #28]
- 8005fba: 687a ldr r2, [r7, #4]
- 8005fbc: 6812 ldr r2, [r2, #0]
- 8005fbe: 430b orrs r3, r1
- 8005fc0: 61d3 str r3, [r2, #28]
- #endif /* ADC_VER_V5_V90 */
- }
- /* Set ADC group regular sequence: channel on the selected scan sequence rank */
- LL_ADC_REG_SetSequencerRanks(hadc->Instance, sConfig->Rank, sConfig->Channel);
- 8005fc2: 687b ldr r3, [r7, #4]
- 8005fc4: 6818 ldr r0, [r3, #0]
- 8005fc6: 683b ldr r3, [r7, #0]
- 8005fc8: 6859 ldr r1, [r3, #4]
- 8005fca: 683b ldr r3, [r7, #0]
- 8005fcc: 681b ldr r3, [r3, #0]
- 8005fce: 461a mov r2, r3
- 8005fd0: f7ff fbb7 bl 8005742 <LL_ADC_REG_SetSequencerRanks>
- /* Parameters update conditioned to ADC state: */
- /* Parameters that can be updated when ADC is disabled or enabled without */
- /* conversion on going on regular group: */
- /* - Channel sampling time */
- /* - Channel offset */
- tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
- 8005fd4: 687b ldr r3, [r7, #4]
- 8005fd6: 681b ldr r3, [r3, #0]
- 8005fd8: 4618 mov r0, r3
- 8005fda: f7ff fcff bl 80059dc <LL_ADC_REG_IsConversionOngoing>
- 8005fde: 67b8 str r0, [r7, #120] @ 0x78
- tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
- 8005fe0: 687b ldr r3, [r7, #4]
- 8005fe2: 681b ldr r3, [r3, #0]
- 8005fe4: 4618 mov r0, r3
- 8005fe6: f7ff fd0c bl 8005a02 <LL_ADC_INJ_IsConversionOngoing>
- 8005fea: 6778 str r0, [r7, #116] @ 0x74
- if ((tmp_adc_is_conversion_on_going_regular == 0UL)
- 8005fec: 6fbb ldr r3, [r7, #120] @ 0x78
- 8005fee: 2b00 cmp r3, #0
- 8005ff0: f040 80b8 bne.w 8006164 <HAL_ADC_ConfigChannel+0x248>
- && (tmp_adc_is_conversion_on_going_injected == 0UL)
- 8005ff4: 6f7b ldr r3, [r7, #116] @ 0x74
- 8005ff6: 2b00 cmp r3, #0
- 8005ff8: f040 80b4 bne.w 8006164 <HAL_ADC_ConfigChannel+0x248>
- )
- {
- /* Set sampling time of the selected ADC channel */
- LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfig->Channel, sConfig->SamplingTime);
- 8005ffc: 687b ldr r3, [r7, #4]
- 8005ffe: 6818 ldr r0, [r3, #0]
- 8006000: 683b ldr r3, [r7, #0]
- 8006002: 6819 ldr r1, [r3, #0]
- 8006004: 683b ldr r3, [r7, #0]
- 8006006: 689b ldr r3, [r3, #8]
- 8006008: 461a mov r2, r3
- 800600a: f7ff fbd9 bl 80057c0 <LL_ADC_SetChannelSamplingTime>
- tmpOffsetShifted = ADC3_OFFSET_SHIFT_RESOLUTION(hadc, (uint32_t)sConfig->Offset);
- }
- else
- #endif /* ADC_VER_V5_V90 */
- {
- tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, (uint32_t)sConfig->Offset);
- 800600e: 4b30 ldr r3, [pc, #192] @ (80060d0 <HAL_ADC_ConfigChannel+0x1b4>)
- 8006010: 681b ldr r3, [r3, #0]
- 8006012: f003 4370 and.w r3, r3, #4026531840 @ 0xf0000000
- 8006016: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
- 800601a: d10b bne.n 8006034 <HAL_ADC_ConfigChannel+0x118>
- 800601c: 683b ldr r3, [r7, #0]
- 800601e: 695a ldr r2, [r3, #20]
- 8006020: 687b ldr r3, [r7, #4]
- 8006022: 681b ldr r3, [r3, #0]
- 8006024: 68db ldr r3, [r3, #12]
- 8006026: 089b lsrs r3, r3, #2
- 8006028: f003 0307 and.w r3, r3, #7
- 800602c: 005b lsls r3, r3, #1
- 800602e: fa02 f303 lsl.w r3, r2, r3
- 8006032: e01d b.n 8006070 <HAL_ADC_ConfigChannel+0x154>
- 8006034: 687b ldr r3, [r7, #4]
- 8006036: 681b ldr r3, [r3, #0]
- 8006038: 68db ldr r3, [r3, #12]
- 800603a: f003 0310 and.w r3, r3, #16
- 800603e: 2b00 cmp r3, #0
- 8006040: d10b bne.n 800605a <HAL_ADC_ConfigChannel+0x13e>
- 8006042: 683b ldr r3, [r7, #0]
- 8006044: 695a ldr r2, [r3, #20]
- 8006046: 687b ldr r3, [r7, #4]
- 8006048: 681b ldr r3, [r3, #0]
- 800604a: 68db ldr r3, [r3, #12]
- 800604c: 089b lsrs r3, r3, #2
- 800604e: f003 0307 and.w r3, r3, #7
- 8006052: 005b lsls r3, r3, #1
- 8006054: fa02 f303 lsl.w r3, r2, r3
- 8006058: e00a b.n 8006070 <HAL_ADC_ConfigChannel+0x154>
- 800605a: 683b ldr r3, [r7, #0]
- 800605c: 695a ldr r2, [r3, #20]
- 800605e: 687b ldr r3, [r7, #4]
- 8006060: 681b ldr r3, [r3, #0]
- 8006062: 68db ldr r3, [r3, #12]
- 8006064: 089b lsrs r3, r3, #2
- 8006066: f003 0304 and.w r3, r3, #4
- 800606a: 005b lsls r3, r3, #1
- 800606c: fa02 f303 lsl.w r3, r2, r3
- 8006070: 673b str r3, [r7, #112] @ 0x70
- }
-
- if (sConfig->OffsetNumber != ADC_OFFSET_NONE)
- 8006072: 683b ldr r3, [r7, #0]
- 8006074: 691b ldr r3, [r3, #16]
- 8006076: 2b04 cmp r3, #4
- 8006078: d02c beq.n 80060d4 <HAL_ADC_ConfigChannel+0x1b8>
- {
- /* Set ADC selected offset number */
- LL_ADC_SetOffset(hadc->Instance, sConfig->OffsetNumber, sConfig->Channel, tmpOffsetShifted);
- 800607a: 687b ldr r3, [r7, #4]
- 800607c: 6818 ldr r0, [r3, #0]
- 800607e: 683b ldr r3, [r7, #0]
- 8006080: 6919 ldr r1, [r3, #16]
- 8006082: 683b ldr r3, [r7, #0]
- 8006084: 681a ldr r2, [r3, #0]
- 8006086: 6f3b ldr r3, [r7, #112] @ 0x70
- 8006088: f7ff faf4 bl 8005674 <LL_ADC_SetOffset>
- else
- #endif /* ADC_VER_V5_V90 */
- {
- assert_param(IS_FUNCTIONAL_STATE(sConfig->OffsetSignedSaturation));
- /* Set ADC selected offset signed saturation */
- LL_ADC_SetOffsetSignedSaturation(hadc->Instance, sConfig->OffsetNumber, (sConfig->OffsetSignedSaturation == ENABLE) ? LL_ADC_OFFSET_SIGNED_SATURATION_ENABLE : LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE);
- 800608c: 687b ldr r3, [r7, #4]
- 800608e: 6818 ldr r0, [r3, #0]
- 8006090: 683b ldr r3, [r7, #0]
- 8006092: 6919 ldr r1, [r3, #16]
- 8006094: 683b ldr r3, [r7, #0]
- 8006096: 7e5b ldrb r3, [r3, #25]
- 8006098: 2b01 cmp r3, #1
- 800609a: d102 bne.n 80060a2 <HAL_ADC_ConfigChannel+0x186>
- 800609c: f04f 4300 mov.w r3, #2147483648 @ 0x80000000
- 80060a0: e000 b.n 80060a4 <HAL_ADC_ConfigChannel+0x188>
- 80060a2: 2300 movs r3, #0
- 80060a4: 461a mov r2, r3
- 80060a6: f7ff fb1e bl 80056e6 <LL_ADC_SetOffsetSignedSaturation>
- assert_param(IS_FUNCTIONAL_STATE(sConfig->OffsetRightShift));
- /* Set ADC selected offset right shift */
- LL_ADC_SetDataRightShift(hadc->Instance, sConfig->OffsetNumber, (sConfig->OffsetRightShift == ENABLE) ? LL_ADC_OFFSET_RSHIFT_ENABLE : LL_ADC_OFFSET_RSHIFT_DISABLE);
- 80060aa: 687b ldr r3, [r7, #4]
- 80060ac: 6818 ldr r0, [r3, #0]
- 80060ae: 683b ldr r3, [r7, #0]
- 80060b0: 6919 ldr r1, [r3, #16]
- 80060b2: 683b ldr r3, [r7, #0]
- 80060b4: 7e1b ldrb r3, [r3, #24]
- 80060b6: 2b01 cmp r3, #1
- 80060b8: d102 bne.n 80060c0 <HAL_ADC_ConfigChannel+0x1a4>
- 80060ba: f44f 6300 mov.w r3, #2048 @ 0x800
- 80060be: e000 b.n 80060c2 <HAL_ADC_ConfigChannel+0x1a6>
- 80060c0: 2300 movs r3, #0
- 80060c2: 461a mov r2, r3
- 80060c4: f7ff faf6 bl 80056b4 <LL_ADC_SetDataRightShift>
- 80060c8: e04c b.n 8006164 <HAL_ADC_ConfigChannel+0x248>
- 80060ca: bf00 nop
- 80060cc: 47ff0000 .word 0x47ff0000
- 80060d0: 5c001000 .word 0x5c001000
- }
- }
- else
- #endif /* ADC_VER_V5_V90 */
- {
- if (((hadc->Instance->OFR1) & ADC_OFR1_OFFSET1_CH) == ADC_OFR_CHANNEL(sConfig->Channel))
- 80060d4: 687b ldr r3, [r7, #4]
- 80060d6: 681b ldr r3, [r3, #0]
- 80060d8: 6e1b ldr r3, [r3, #96] @ 0x60
- 80060da: f003 42f8 and.w r2, r3, #2080374784 @ 0x7c000000
- 80060de: 683b ldr r3, [r7, #0]
- 80060e0: 681b ldr r3, [r3, #0]
- 80060e2: 069b lsls r3, r3, #26
- 80060e4: 429a cmp r2, r3
- 80060e6: d107 bne.n 80060f8 <HAL_ADC_ConfigChannel+0x1dc>
- {
- CLEAR_BIT(hadc->Instance->OFR1, ADC_OFR1_SSATE);
- 80060e8: 687b ldr r3, [r7, #4]
- 80060ea: 681b ldr r3, [r3, #0]
- 80060ec: 6e1a ldr r2, [r3, #96] @ 0x60
- 80060ee: 687b ldr r3, [r7, #4]
- 80060f0: 681b ldr r3, [r3, #0]
- 80060f2: f022 4200 bic.w r2, r2, #2147483648 @ 0x80000000
- 80060f6: 661a str r2, [r3, #96] @ 0x60
- }
- if (((hadc->Instance->OFR2) & ADC_OFR2_OFFSET2_CH) == ADC_OFR_CHANNEL(sConfig->Channel))
- 80060f8: 687b ldr r3, [r7, #4]
- 80060fa: 681b ldr r3, [r3, #0]
- 80060fc: 6e5b ldr r3, [r3, #100] @ 0x64
- 80060fe: f003 42f8 and.w r2, r3, #2080374784 @ 0x7c000000
- 8006102: 683b ldr r3, [r7, #0]
- 8006104: 681b ldr r3, [r3, #0]
- 8006106: 069b lsls r3, r3, #26
- 8006108: 429a cmp r2, r3
- 800610a: d107 bne.n 800611c <HAL_ADC_ConfigChannel+0x200>
- {
- CLEAR_BIT(hadc->Instance->OFR2, ADC_OFR2_SSATE);
- 800610c: 687b ldr r3, [r7, #4]
- 800610e: 681b ldr r3, [r3, #0]
- 8006110: 6e5a ldr r2, [r3, #100] @ 0x64
- 8006112: 687b ldr r3, [r7, #4]
- 8006114: 681b ldr r3, [r3, #0]
- 8006116: f022 4200 bic.w r2, r2, #2147483648 @ 0x80000000
- 800611a: 665a str r2, [r3, #100] @ 0x64
- }
- if (((hadc->Instance->OFR3) & ADC_OFR3_OFFSET3_CH) == ADC_OFR_CHANNEL(sConfig->Channel))
- 800611c: 687b ldr r3, [r7, #4]
- 800611e: 681b ldr r3, [r3, #0]
- 8006120: 6e9b ldr r3, [r3, #104] @ 0x68
- 8006122: f003 42f8 and.w r2, r3, #2080374784 @ 0x7c000000
- 8006126: 683b ldr r3, [r7, #0]
- 8006128: 681b ldr r3, [r3, #0]
- 800612a: 069b lsls r3, r3, #26
- 800612c: 429a cmp r2, r3
- 800612e: d107 bne.n 8006140 <HAL_ADC_ConfigChannel+0x224>
- {
- CLEAR_BIT(hadc->Instance->OFR3, ADC_OFR3_SSATE);
- 8006130: 687b ldr r3, [r7, #4]
- 8006132: 681b ldr r3, [r3, #0]
- 8006134: 6e9a ldr r2, [r3, #104] @ 0x68
- 8006136: 687b ldr r3, [r7, #4]
- 8006138: 681b ldr r3, [r3, #0]
- 800613a: f022 4200 bic.w r2, r2, #2147483648 @ 0x80000000
- 800613e: 669a str r2, [r3, #104] @ 0x68
- }
- if (((hadc->Instance->OFR4) & ADC_OFR4_OFFSET4_CH) == ADC_OFR_CHANNEL(sConfig->Channel))
- 8006140: 687b ldr r3, [r7, #4]
- 8006142: 681b ldr r3, [r3, #0]
- 8006144: 6edb ldr r3, [r3, #108] @ 0x6c
- 8006146: f003 42f8 and.w r2, r3, #2080374784 @ 0x7c000000
- 800614a: 683b ldr r3, [r7, #0]
- 800614c: 681b ldr r3, [r3, #0]
- 800614e: 069b lsls r3, r3, #26
- 8006150: 429a cmp r2, r3
- 8006152: d107 bne.n 8006164 <HAL_ADC_ConfigChannel+0x248>
- {
- CLEAR_BIT(hadc->Instance->OFR4, ADC_OFR4_SSATE);
- 8006154: 687b ldr r3, [r7, #4]
- 8006156: 681b ldr r3, [r3, #0]
- 8006158: 6eda ldr r2, [r3, #108] @ 0x6c
- 800615a: 687b ldr r3, [r7, #4]
- 800615c: 681b ldr r3, [r3, #0]
- 800615e: f022 4200 bic.w r2, r2, #2147483648 @ 0x80000000
- 8006162: 66da str r2, [r3, #108] @ 0x6c
- /* Parameters update conditioned to ADC state: */
- /* Parameters that can be updated only when ADC is disabled: */
- /* - Single or differential mode */
- /* - Internal measurement channels: Vbat/VrefInt/TempSensor */
- if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
- 8006164: 687b ldr r3, [r7, #4]
- 8006166: 681b ldr r3, [r3, #0]
- 8006168: 4618 mov r0, r3
- 800616a: f7ff fbfd bl 8005968 <LL_ADC_IsEnabled>
- 800616e: 4603 mov r3, r0
- 8006170: 2b00 cmp r3, #0
- 8006172: f040 8211 bne.w 8006598 <HAL_ADC_ConfigChannel+0x67c>
- {
- /* Set mode single-ended or differential input of the selected ADC channel */
- LL_ADC_SetChannelSingleDiff(hadc->Instance, sConfig->Channel, sConfig->SingleDiff);
- 8006176: 687b ldr r3, [r7, #4]
- 8006178: 6818 ldr r0, [r3, #0]
- 800617a: 683b ldr r3, [r7, #0]
- 800617c: 6819 ldr r1, [r3, #0]
- 800617e: 683b ldr r3, [r7, #0]
- 8006180: 68db ldr r3, [r3, #12]
- 8006182: 461a mov r2, r3
- 8006184: f7ff fb48 bl 8005818 <LL_ADC_SetChannelSingleDiff>
- /* Configuration of differential mode */
- if (sConfig->SingleDiff == ADC_DIFFERENTIAL_ENDED)
- 8006188: 683b ldr r3, [r7, #0]
- 800618a: 68db ldr r3, [r3, #12]
- 800618c: 4aa1 ldr r2, [pc, #644] @ (8006414 <HAL_ADC_ConfigChannel+0x4f8>)
- 800618e: 4293 cmp r3, r2
- 8006190: f040 812e bne.w 80063f0 <HAL_ADC_ConfigChannel+0x4d4>
- {
- /* Set sampling time of the selected ADC channel */
- /* Note: ADC channel number masked with value "0x1F" to ensure shift value within 32 bits range */
- LL_ADC_SetChannelSamplingTime(hadc->Instance,
- 8006194: 687b ldr r3, [r7, #4]
- 8006196: 6818 ldr r0, [r3, #0]
- (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) + 1UL) & 0x1FUL)),
- 8006198: 683b ldr r3, [r7, #0]
- 800619a: 681b ldr r3, [r3, #0]
- 800619c: f3c3 0313 ubfx r3, r3, #0, #20
- 80061a0: 2b00 cmp r3, #0
- 80061a2: d10b bne.n 80061bc <HAL_ADC_ConfigChannel+0x2a0>
- 80061a4: 683b ldr r3, [r7, #0]
- 80061a6: 681b ldr r3, [r3, #0]
- 80061a8: 0e9b lsrs r3, r3, #26
- 80061aa: 3301 adds r3, #1
- 80061ac: f003 031f and.w r3, r3, #31
- 80061b0: 2b09 cmp r3, #9
- 80061b2: bf94 ite ls
- 80061b4: 2301 movls r3, #1
- 80061b6: 2300 movhi r3, #0
- 80061b8: b2db uxtb r3, r3
- 80061ba: e019 b.n 80061f0 <HAL_ADC_ConfigChannel+0x2d4>
- 80061bc: 683b ldr r3, [r7, #0]
- 80061be: 681b ldr r3, [r3, #0]
- 80061c0: 65bb str r3, [r7, #88] @ 0x58
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80061c2: 6dbb ldr r3, [r7, #88] @ 0x58
- 80061c4: fa93 f3a3 rbit r3, r3
- 80061c8: 657b str r3, [r7, #84] @ 0x54
- return result;
- 80061ca: 6d7b ldr r3, [r7, #84] @ 0x54
- 80061cc: 65fb str r3, [r7, #92] @ 0x5c
- if (value == 0U)
- 80061ce: 6dfb ldr r3, [r7, #92] @ 0x5c
- 80061d0: 2b00 cmp r3, #0
- 80061d2: d101 bne.n 80061d8 <HAL_ADC_ConfigChannel+0x2bc>
- return 32U;
- 80061d4: 2320 movs r3, #32
- 80061d6: e003 b.n 80061e0 <HAL_ADC_ConfigChannel+0x2c4>
- return __builtin_clz(value);
- 80061d8: 6dfb ldr r3, [r7, #92] @ 0x5c
- 80061da: fab3 f383 clz r3, r3
- 80061de: b2db uxtb r3, r3
- 80061e0: 3301 adds r3, #1
- 80061e2: f003 031f and.w r3, r3, #31
- 80061e6: 2b09 cmp r3, #9
- 80061e8: bf94 ite ls
- 80061ea: 2301 movls r3, #1
- 80061ec: 2300 movhi r3, #0
- 80061ee: b2db uxtb r3, r3
- LL_ADC_SetChannelSamplingTime(hadc->Instance,
- 80061f0: 2b00 cmp r3, #0
- 80061f2: d079 beq.n 80062e8 <HAL_ADC_ConfigChannel+0x3cc>
- (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) + 1UL) & 0x1FUL)),
- 80061f4: 683b ldr r3, [r7, #0]
- 80061f6: 681b ldr r3, [r3, #0]
- 80061f8: f3c3 0313 ubfx r3, r3, #0, #20
- 80061fc: 2b00 cmp r3, #0
- 80061fe: d107 bne.n 8006210 <HAL_ADC_ConfigChannel+0x2f4>
- 8006200: 683b ldr r3, [r7, #0]
- 8006202: 681b ldr r3, [r3, #0]
- 8006204: 0e9b lsrs r3, r3, #26
- 8006206: 3301 adds r3, #1
- 8006208: 069b lsls r3, r3, #26
- 800620a: f003 42f8 and.w r2, r3, #2080374784 @ 0x7c000000
- 800620e: e015 b.n 800623c <HAL_ADC_ConfigChannel+0x320>
- 8006210: 683b ldr r3, [r7, #0]
- 8006212: 681b ldr r3, [r3, #0]
- 8006214: 64fb str r3, [r7, #76] @ 0x4c
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8006216: 6cfb ldr r3, [r7, #76] @ 0x4c
- 8006218: fa93 f3a3 rbit r3, r3
- 800621c: 64bb str r3, [r7, #72] @ 0x48
- return result;
- 800621e: 6cbb ldr r3, [r7, #72] @ 0x48
- 8006220: 653b str r3, [r7, #80] @ 0x50
- if (value == 0U)
- 8006222: 6d3b ldr r3, [r7, #80] @ 0x50
- 8006224: 2b00 cmp r3, #0
- 8006226: d101 bne.n 800622c <HAL_ADC_ConfigChannel+0x310>
- return 32U;
- 8006228: 2320 movs r3, #32
- 800622a: e003 b.n 8006234 <HAL_ADC_ConfigChannel+0x318>
- return __builtin_clz(value);
- 800622c: 6d3b ldr r3, [r7, #80] @ 0x50
- 800622e: fab3 f383 clz r3, r3
- 8006232: b2db uxtb r3, r3
- 8006234: 3301 adds r3, #1
- 8006236: 069b lsls r3, r3, #26
- 8006238: f003 42f8 and.w r2, r3, #2080374784 @ 0x7c000000
- 800623c: 683b ldr r3, [r7, #0]
- 800623e: 681b ldr r3, [r3, #0]
- 8006240: f3c3 0313 ubfx r3, r3, #0, #20
- 8006244: 2b00 cmp r3, #0
- 8006246: d109 bne.n 800625c <HAL_ADC_ConfigChannel+0x340>
- 8006248: 683b ldr r3, [r7, #0]
- 800624a: 681b ldr r3, [r3, #0]
- 800624c: 0e9b lsrs r3, r3, #26
- 800624e: 3301 adds r3, #1
- 8006250: f003 031f and.w r3, r3, #31
- 8006254: 2101 movs r1, #1
- 8006256: fa01 f303 lsl.w r3, r1, r3
- 800625a: e017 b.n 800628c <HAL_ADC_ConfigChannel+0x370>
- 800625c: 683b ldr r3, [r7, #0]
- 800625e: 681b ldr r3, [r3, #0]
- 8006260: 643b str r3, [r7, #64] @ 0x40
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8006262: 6c3b ldr r3, [r7, #64] @ 0x40
- 8006264: fa93 f3a3 rbit r3, r3
- 8006268: 63fb str r3, [r7, #60] @ 0x3c
- return result;
- 800626a: 6bfb ldr r3, [r7, #60] @ 0x3c
- 800626c: 647b str r3, [r7, #68] @ 0x44
- if (value == 0U)
- 800626e: 6c7b ldr r3, [r7, #68] @ 0x44
- 8006270: 2b00 cmp r3, #0
- 8006272: d101 bne.n 8006278 <HAL_ADC_ConfigChannel+0x35c>
- return 32U;
- 8006274: 2320 movs r3, #32
- 8006276: e003 b.n 8006280 <HAL_ADC_ConfigChannel+0x364>
- return __builtin_clz(value);
- 8006278: 6c7b ldr r3, [r7, #68] @ 0x44
- 800627a: fab3 f383 clz r3, r3
- 800627e: b2db uxtb r3, r3
- 8006280: 3301 adds r3, #1
- 8006282: f003 031f and.w r3, r3, #31
- 8006286: 2101 movs r1, #1
- 8006288: fa01 f303 lsl.w r3, r1, r3
- 800628c: ea42 0103 orr.w r1, r2, r3
- 8006290: 683b ldr r3, [r7, #0]
- 8006292: 681b ldr r3, [r3, #0]
- 8006294: f3c3 0313 ubfx r3, r3, #0, #20
- 8006298: 2b00 cmp r3, #0
- 800629a: d10a bne.n 80062b2 <HAL_ADC_ConfigChannel+0x396>
- 800629c: 683b ldr r3, [r7, #0]
- 800629e: 681b ldr r3, [r3, #0]
- 80062a0: 0e9b lsrs r3, r3, #26
- 80062a2: 3301 adds r3, #1
- 80062a4: f003 021f and.w r2, r3, #31
- 80062a8: 4613 mov r3, r2
- 80062aa: 005b lsls r3, r3, #1
- 80062ac: 4413 add r3, r2
- 80062ae: 051b lsls r3, r3, #20
- 80062b0: e018 b.n 80062e4 <HAL_ADC_ConfigChannel+0x3c8>
- 80062b2: 683b ldr r3, [r7, #0]
- 80062b4: 681b ldr r3, [r3, #0]
- 80062b6: 637b str r3, [r7, #52] @ 0x34
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80062b8: 6b7b ldr r3, [r7, #52] @ 0x34
- 80062ba: fa93 f3a3 rbit r3, r3
- 80062be: 633b str r3, [r7, #48] @ 0x30
- return result;
- 80062c0: 6b3b ldr r3, [r7, #48] @ 0x30
- 80062c2: 63bb str r3, [r7, #56] @ 0x38
- if (value == 0U)
- 80062c4: 6bbb ldr r3, [r7, #56] @ 0x38
- 80062c6: 2b00 cmp r3, #0
- 80062c8: d101 bne.n 80062ce <HAL_ADC_ConfigChannel+0x3b2>
- return 32U;
- 80062ca: 2320 movs r3, #32
- 80062cc: e003 b.n 80062d6 <HAL_ADC_ConfigChannel+0x3ba>
- return __builtin_clz(value);
- 80062ce: 6bbb ldr r3, [r7, #56] @ 0x38
- 80062d0: fab3 f383 clz r3, r3
- 80062d4: b2db uxtb r3, r3
- 80062d6: 3301 adds r3, #1
- 80062d8: f003 021f and.w r2, r3, #31
- 80062dc: 4613 mov r3, r2
- 80062de: 005b lsls r3, r3, #1
- 80062e0: 4413 add r3, r2
- 80062e2: 051b lsls r3, r3, #20
- LL_ADC_SetChannelSamplingTime(hadc->Instance,
- 80062e4: 430b orrs r3, r1
- 80062e6: e07e b.n 80063e6 <HAL_ADC_ConfigChannel+0x4ca>
- (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) + 1UL) & 0x1FUL)),
- 80062e8: 683b ldr r3, [r7, #0]
- 80062ea: 681b ldr r3, [r3, #0]
- 80062ec: f3c3 0313 ubfx r3, r3, #0, #20
- 80062f0: 2b00 cmp r3, #0
- 80062f2: d107 bne.n 8006304 <HAL_ADC_ConfigChannel+0x3e8>
- 80062f4: 683b ldr r3, [r7, #0]
- 80062f6: 681b ldr r3, [r3, #0]
- 80062f8: 0e9b lsrs r3, r3, #26
- 80062fa: 3301 adds r3, #1
- 80062fc: 069b lsls r3, r3, #26
- 80062fe: f003 42f8 and.w r2, r3, #2080374784 @ 0x7c000000
- 8006302: e015 b.n 8006330 <HAL_ADC_ConfigChannel+0x414>
- 8006304: 683b ldr r3, [r7, #0]
- 8006306: 681b ldr r3, [r3, #0]
- 8006308: 62bb str r3, [r7, #40] @ 0x28
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 800630a: 6abb ldr r3, [r7, #40] @ 0x28
- 800630c: fa93 f3a3 rbit r3, r3
- 8006310: 627b str r3, [r7, #36] @ 0x24
- return result;
- 8006312: 6a7b ldr r3, [r7, #36] @ 0x24
- 8006314: 62fb str r3, [r7, #44] @ 0x2c
- if (value == 0U)
- 8006316: 6afb ldr r3, [r7, #44] @ 0x2c
- 8006318: 2b00 cmp r3, #0
- 800631a: d101 bne.n 8006320 <HAL_ADC_ConfigChannel+0x404>
- return 32U;
- 800631c: 2320 movs r3, #32
- 800631e: e003 b.n 8006328 <HAL_ADC_ConfigChannel+0x40c>
- return __builtin_clz(value);
- 8006320: 6afb ldr r3, [r7, #44] @ 0x2c
- 8006322: fab3 f383 clz r3, r3
- 8006326: b2db uxtb r3, r3
- 8006328: 3301 adds r3, #1
- 800632a: 069b lsls r3, r3, #26
- 800632c: f003 42f8 and.w r2, r3, #2080374784 @ 0x7c000000
- 8006330: 683b ldr r3, [r7, #0]
- 8006332: 681b ldr r3, [r3, #0]
- 8006334: f3c3 0313 ubfx r3, r3, #0, #20
- 8006338: 2b00 cmp r3, #0
- 800633a: d109 bne.n 8006350 <HAL_ADC_ConfigChannel+0x434>
- 800633c: 683b ldr r3, [r7, #0]
- 800633e: 681b ldr r3, [r3, #0]
- 8006340: 0e9b lsrs r3, r3, #26
- 8006342: 3301 adds r3, #1
- 8006344: f003 031f and.w r3, r3, #31
- 8006348: 2101 movs r1, #1
- 800634a: fa01 f303 lsl.w r3, r1, r3
- 800634e: e017 b.n 8006380 <HAL_ADC_ConfigChannel+0x464>
- 8006350: 683b ldr r3, [r7, #0]
- 8006352: 681b ldr r3, [r3, #0]
- 8006354: 61fb str r3, [r7, #28]
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8006356: 69fb ldr r3, [r7, #28]
- 8006358: fa93 f3a3 rbit r3, r3
- 800635c: 61bb str r3, [r7, #24]
- return result;
- 800635e: 69bb ldr r3, [r7, #24]
- 8006360: 623b str r3, [r7, #32]
- if (value == 0U)
- 8006362: 6a3b ldr r3, [r7, #32]
- 8006364: 2b00 cmp r3, #0
- 8006366: d101 bne.n 800636c <HAL_ADC_ConfigChannel+0x450>
- return 32U;
- 8006368: 2320 movs r3, #32
- 800636a: e003 b.n 8006374 <HAL_ADC_ConfigChannel+0x458>
- return __builtin_clz(value);
- 800636c: 6a3b ldr r3, [r7, #32]
- 800636e: fab3 f383 clz r3, r3
- 8006372: b2db uxtb r3, r3
- 8006374: 3301 adds r3, #1
- 8006376: f003 031f and.w r3, r3, #31
- 800637a: 2101 movs r1, #1
- 800637c: fa01 f303 lsl.w r3, r1, r3
- 8006380: ea42 0103 orr.w r1, r2, r3
- 8006384: 683b ldr r3, [r7, #0]
- 8006386: 681b ldr r3, [r3, #0]
- 8006388: f3c3 0313 ubfx r3, r3, #0, #20
- 800638c: 2b00 cmp r3, #0
- 800638e: d10d bne.n 80063ac <HAL_ADC_ConfigChannel+0x490>
- 8006390: 683b ldr r3, [r7, #0]
- 8006392: 681b ldr r3, [r3, #0]
- 8006394: 0e9b lsrs r3, r3, #26
- 8006396: 3301 adds r3, #1
- 8006398: f003 021f and.w r2, r3, #31
- 800639c: 4613 mov r3, r2
- 800639e: 005b lsls r3, r3, #1
- 80063a0: 4413 add r3, r2
- 80063a2: 3b1e subs r3, #30
- 80063a4: 051b lsls r3, r3, #20
- 80063a6: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000
- 80063aa: e01b b.n 80063e4 <HAL_ADC_ConfigChannel+0x4c8>
- 80063ac: 683b ldr r3, [r7, #0]
- 80063ae: 681b ldr r3, [r3, #0]
- 80063b0: 613b str r3, [r7, #16]
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80063b2: 693b ldr r3, [r7, #16]
- 80063b4: fa93 f3a3 rbit r3, r3
- 80063b8: 60fb str r3, [r7, #12]
- return result;
- 80063ba: 68fb ldr r3, [r7, #12]
- 80063bc: 617b str r3, [r7, #20]
- if (value == 0U)
- 80063be: 697b ldr r3, [r7, #20]
- 80063c0: 2b00 cmp r3, #0
- 80063c2: d101 bne.n 80063c8 <HAL_ADC_ConfigChannel+0x4ac>
- return 32U;
- 80063c4: 2320 movs r3, #32
- 80063c6: e003 b.n 80063d0 <HAL_ADC_ConfigChannel+0x4b4>
- return __builtin_clz(value);
- 80063c8: 697b ldr r3, [r7, #20]
- 80063ca: fab3 f383 clz r3, r3
- 80063ce: b2db uxtb r3, r3
- 80063d0: 3301 adds r3, #1
- 80063d2: f003 021f and.w r2, r3, #31
- 80063d6: 4613 mov r3, r2
- 80063d8: 005b lsls r3, r3, #1
- 80063da: 4413 add r3, r2
- 80063dc: 3b1e subs r3, #30
- 80063de: 051b lsls r3, r3, #20
- 80063e0: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000
- LL_ADC_SetChannelSamplingTime(hadc->Instance,
- 80063e4: 430b orrs r3, r1
- 80063e6: 683a ldr r2, [r7, #0]
- 80063e8: 6892 ldr r2, [r2, #8]
- 80063ea: 4619 mov r1, r3
- 80063ec: f7ff f9e8 bl 80057c0 <LL_ADC_SetChannelSamplingTime>
- /* If internal channel selected, enable dedicated internal buffers and */
- /* paths. */
- /* Note: these internal measurement paths can be disabled using */
- /* HAL_ADC_DeInit(). */
- if (__LL_ADC_IS_CHANNEL_INTERNAL(sConfig->Channel))
- 80063f0: 683b ldr r3, [r7, #0]
- 80063f2: 681b ldr r3, [r3, #0]
- 80063f4: 2b00 cmp r3, #0
- 80063f6: f280 80cf bge.w 8006598 <HAL_ADC_ConfigChannel+0x67c>
- {
- /* Configuration of common ADC parameters */
- tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
- 80063fa: 687b ldr r3, [r7, #4]
- 80063fc: 681b ldr r3, [r3, #0]
- 80063fe: 4a06 ldr r2, [pc, #24] @ (8006418 <HAL_ADC_ConfigChannel+0x4fc>)
- 8006400: 4293 cmp r3, r2
- 8006402: d004 beq.n 800640e <HAL_ADC_ConfigChannel+0x4f2>
- 8006404: 687b ldr r3, [r7, #4]
- 8006406: 681b ldr r3, [r3, #0]
- 8006408: 4a04 ldr r2, [pc, #16] @ (800641c <HAL_ADC_ConfigChannel+0x500>)
- 800640a: 4293 cmp r3, r2
- 800640c: d10a bne.n 8006424 <HAL_ADC_ConfigChannel+0x508>
- 800640e: 4b04 ldr r3, [pc, #16] @ (8006420 <HAL_ADC_ConfigChannel+0x504>)
- 8006410: e009 b.n 8006426 <HAL_ADC_ConfigChannel+0x50a>
- 8006412: bf00 nop
- 8006414: 47ff0000 .word 0x47ff0000
- 8006418: 40022000 .word 0x40022000
- 800641c: 40022100 .word 0x40022100
- 8006420: 40022300 .word 0x40022300
- 8006424: 4b61 ldr r3, [pc, #388] @ (80065ac <HAL_ADC_ConfigChannel+0x690>)
- 8006426: 4618 mov r0, r3
- 8006428: f7ff f916 bl 8005658 <LL_ADC_GetCommonPathInternalCh>
- 800642c: 66f8 str r0, [r7, #108] @ 0x6c
- /* Software is allowed to change common parameters only when all ADCs */
- /* of the common group are disabled. */
- if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
- 800642e: 687b ldr r3, [r7, #4]
- 8006430: 681b ldr r3, [r3, #0]
- 8006432: 4a5f ldr r2, [pc, #380] @ (80065b0 <HAL_ADC_ConfigChannel+0x694>)
- 8006434: 4293 cmp r3, r2
- 8006436: d004 beq.n 8006442 <HAL_ADC_ConfigChannel+0x526>
- 8006438: 687b ldr r3, [r7, #4]
- 800643a: 681b ldr r3, [r3, #0]
- 800643c: 4a5d ldr r2, [pc, #372] @ (80065b4 <HAL_ADC_ConfigChannel+0x698>)
- 800643e: 4293 cmp r3, r2
- 8006440: d10e bne.n 8006460 <HAL_ADC_ConfigChannel+0x544>
- 8006442: 485b ldr r0, [pc, #364] @ (80065b0 <HAL_ADC_ConfigChannel+0x694>)
- 8006444: f7ff fa90 bl 8005968 <LL_ADC_IsEnabled>
- 8006448: 4604 mov r4, r0
- 800644a: 485a ldr r0, [pc, #360] @ (80065b4 <HAL_ADC_ConfigChannel+0x698>)
- 800644c: f7ff fa8c bl 8005968 <LL_ADC_IsEnabled>
- 8006450: 4603 mov r3, r0
- 8006452: 4323 orrs r3, r4
- 8006454: 2b00 cmp r3, #0
- 8006456: bf0c ite eq
- 8006458: 2301 moveq r3, #1
- 800645a: 2300 movne r3, #0
- 800645c: b2db uxtb r3, r3
- 800645e: e008 b.n 8006472 <HAL_ADC_ConfigChannel+0x556>
- 8006460: 4855 ldr r0, [pc, #340] @ (80065b8 <HAL_ADC_ConfigChannel+0x69c>)
- 8006462: f7ff fa81 bl 8005968 <LL_ADC_IsEnabled>
- 8006466: 4603 mov r3, r0
- 8006468: 2b00 cmp r3, #0
- 800646a: bf0c ite eq
- 800646c: 2301 moveq r3, #1
- 800646e: 2300 movne r3, #0
- 8006470: b2db uxtb r3, r3
- 8006472: 2b00 cmp r3, #0
- 8006474: d07d beq.n 8006572 <HAL_ADC_ConfigChannel+0x656>
- {
- /* If the requested internal measurement path has already been enabled, */
- /* bypass the configuration processing. */
- if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL))
- 8006476: 683b ldr r3, [r7, #0]
- 8006478: 681b ldr r3, [r3, #0]
- 800647a: 4a50 ldr r2, [pc, #320] @ (80065bc <HAL_ADC_ConfigChannel+0x6a0>)
- 800647c: 4293 cmp r3, r2
- 800647e: d130 bne.n 80064e2 <HAL_ADC_ConfigChannel+0x5c6>
- 8006480: 6efb ldr r3, [r7, #108] @ 0x6c
- 8006482: f403 0300 and.w r3, r3, #8388608 @ 0x800000
- 8006486: 2b00 cmp r3, #0
- 8006488: d12b bne.n 80064e2 <HAL_ADC_ConfigChannel+0x5c6>
- {
- if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc))
- 800648a: 687b ldr r3, [r7, #4]
- 800648c: 681b ldr r3, [r3, #0]
- 800648e: 4a4a ldr r2, [pc, #296] @ (80065b8 <HAL_ADC_ConfigChannel+0x69c>)
- 8006490: 4293 cmp r3, r2
- 8006492: f040 8081 bne.w 8006598 <HAL_ADC_ConfigChannel+0x67c>
- {
- LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_channel);
- 8006496: 687b ldr r3, [r7, #4]
- 8006498: 681b ldr r3, [r3, #0]
- 800649a: 4a45 ldr r2, [pc, #276] @ (80065b0 <HAL_ADC_ConfigChannel+0x694>)
- 800649c: 4293 cmp r3, r2
- 800649e: d004 beq.n 80064aa <HAL_ADC_ConfigChannel+0x58e>
- 80064a0: 687b ldr r3, [r7, #4]
- 80064a2: 681b ldr r3, [r3, #0]
- 80064a4: 4a43 ldr r2, [pc, #268] @ (80065b4 <HAL_ADC_ConfigChannel+0x698>)
- 80064a6: 4293 cmp r3, r2
- 80064a8: d101 bne.n 80064ae <HAL_ADC_ConfigChannel+0x592>
- 80064aa: 4a45 ldr r2, [pc, #276] @ (80065c0 <HAL_ADC_ConfigChannel+0x6a4>)
- 80064ac: e000 b.n 80064b0 <HAL_ADC_ConfigChannel+0x594>
- 80064ae: 4a3f ldr r2, [pc, #252] @ (80065ac <HAL_ADC_ConfigChannel+0x690>)
- 80064b0: 6efb ldr r3, [r7, #108] @ 0x6c
- 80064b2: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
- 80064b6: 4619 mov r1, r3
- 80064b8: 4610 mov r0, r2
- 80064ba: f7ff f8ba bl 8005632 <LL_ADC_SetCommonPathInternalCh>
- /* Delay for temperature sensor stabilization time */
- /* Wait loop initialization and execution */
- /* Note: Variable divided by 2 to compensate partially */
- /* CPU processing cycles, scaling in us split to not */
- /* exceed 32 bits register capacity and handle low frequency. */
- wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL));
- 80064be: 4b41 ldr r3, [pc, #260] @ (80065c4 <HAL_ADC_ConfigChannel+0x6a8>)
- 80064c0: 681b ldr r3, [r3, #0]
- 80064c2: 099b lsrs r3, r3, #6
- 80064c4: 4a40 ldr r2, [pc, #256] @ (80065c8 <HAL_ADC_ConfigChannel+0x6ac>)
- 80064c6: fba2 2303 umull r2, r3, r2, r3
- 80064ca: 099b lsrs r3, r3, #6
- 80064cc: 3301 adds r3, #1
- 80064ce: 005b lsls r3, r3, #1
- 80064d0: 60bb str r3, [r7, #8]
- while (wait_loop_index != 0UL)
- 80064d2: e002 b.n 80064da <HAL_ADC_ConfigChannel+0x5be>
- {
- wait_loop_index--;
- 80064d4: 68bb ldr r3, [r7, #8]
- 80064d6: 3b01 subs r3, #1
- 80064d8: 60bb str r3, [r7, #8]
- while (wait_loop_index != 0UL)
- 80064da: 68bb ldr r3, [r7, #8]
- 80064dc: 2b00 cmp r3, #0
- 80064de: d1f9 bne.n 80064d4 <HAL_ADC_ConfigChannel+0x5b8>
- if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc))
- 80064e0: e05a b.n 8006598 <HAL_ADC_ConfigChannel+0x67c>
- }
- }
- }
- else if ((sConfig->Channel == ADC_CHANNEL_VBAT) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VBAT) == 0UL))
- 80064e2: 683b ldr r3, [r7, #0]
- 80064e4: 681b ldr r3, [r3, #0]
- 80064e6: 4a39 ldr r2, [pc, #228] @ (80065cc <HAL_ADC_ConfigChannel+0x6b0>)
- 80064e8: 4293 cmp r3, r2
- 80064ea: d11e bne.n 800652a <HAL_ADC_ConfigChannel+0x60e>
- 80064ec: 6efb ldr r3, [r7, #108] @ 0x6c
- 80064ee: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
- 80064f2: 2b00 cmp r3, #0
- 80064f4: d119 bne.n 800652a <HAL_ADC_ConfigChannel+0x60e>
- {
- if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc))
- 80064f6: 687b ldr r3, [r7, #4]
- 80064f8: 681b ldr r3, [r3, #0]
- 80064fa: 4a2f ldr r2, [pc, #188] @ (80065b8 <HAL_ADC_ConfigChannel+0x69c>)
- 80064fc: 4293 cmp r3, r2
- 80064fe: d14b bne.n 8006598 <HAL_ADC_ConfigChannel+0x67c>
- {
- LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel);
- 8006500: 687b ldr r3, [r7, #4]
- 8006502: 681b ldr r3, [r3, #0]
- 8006504: 4a2a ldr r2, [pc, #168] @ (80065b0 <HAL_ADC_ConfigChannel+0x694>)
- 8006506: 4293 cmp r3, r2
- 8006508: d004 beq.n 8006514 <HAL_ADC_ConfigChannel+0x5f8>
- 800650a: 687b ldr r3, [r7, #4]
- 800650c: 681b ldr r3, [r3, #0]
- 800650e: 4a29 ldr r2, [pc, #164] @ (80065b4 <HAL_ADC_ConfigChannel+0x698>)
- 8006510: 4293 cmp r3, r2
- 8006512: d101 bne.n 8006518 <HAL_ADC_ConfigChannel+0x5fc>
- 8006514: 4a2a ldr r2, [pc, #168] @ (80065c0 <HAL_ADC_ConfigChannel+0x6a4>)
- 8006516: e000 b.n 800651a <HAL_ADC_ConfigChannel+0x5fe>
- 8006518: 4a24 ldr r2, [pc, #144] @ (80065ac <HAL_ADC_ConfigChannel+0x690>)
- 800651a: 6efb ldr r3, [r7, #108] @ 0x6c
- 800651c: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000
- 8006520: 4619 mov r1, r3
- 8006522: 4610 mov r0, r2
- 8006524: f7ff f885 bl 8005632 <LL_ADC_SetCommonPathInternalCh>
- if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc))
- 8006528: e036 b.n 8006598 <HAL_ADC_ConfigChannel+0x67c>
- }
- }
- else if ((sConfig->Channel == ADC_CHANNEL_VREFINT) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL))
- 800652a: 683b ldr r3, [r7, #0]
- 800652c: 681b ldr r3, [r3, #0]
- 800652e: 4a28 ldr r2, [pc, #160] @ (80065d0 <HAL_ADC_ConfigChannel+0x6b4>)
- 8006530: 4293 cmp r3, r2
- 8006532: d131 bne.n 8006598 <HAL_ADC_ConfigChannel+0x67c>
- 8006534: 6efb ldr r3, [r7, #108] @ 0x6c
- 8006536: f403 0380 and.w r3, r3, #4194304 @ 0x400000
- 800653a: 2b00 cmp r3, #0
- 800653c: d12c bne.n 8006598 <HAL_ADC_ConfigChannel+0x67c>
- {
- if (ADC_VREFINT_INSTANCE(hadc))
- 800653e: 687b ldr r3, [r7, #4]
- 8006540: 681b ldr r3, [r3, #0]
- 8006542: 4a1d ldr r2, [pc, #116] @ (80065b8 <HAL_ADC_ConfigChannel+0x69c>)
- 8006544: 4293 cmp r3, r2
- 8006546: d127 bne.n 8006598 <HAL_ADC_ConfigChannel+0x67c>
- {
- LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel);
- 8006548: 687b ldr r3, [r7, #4]
- 800654a: 681b ldr r3, [r3, #0]
- 800654c: 4a18 ldr r2, [pc, #96] @ (80065b0 <HAL_ADC_ConfigChannel+0x694>)
- 800654e: 4293 cmp r3, r2
- 8006550: d004 beq.n 800655c <HAL_ADC_ConfigChannel+0x640>
- 8006552: 687b ldr r3, [r7, #4]
- 8006554: 681b ldr r3, [r3, #0]
- 8006556: 4a17 ldr r2, [pc, #92] @ (80065b4 <HAL_ADC_ConfigChannel+0x698>)
- 8006558: 4293 cmp r3, r2
- 800655a: d101 bne.n 8006560 <HAL_ADC_ConfigChannel+0x644>
- 800655c: 4a18 ldr r2, [pc, #96] @ (80065c0 <HAL_ADC_ConfigChannel+0x6a4>)
- 800655e: e000 b.n 8006562 <HAL_ADC_ConfigChannel+0x646>
- 8006560: 4a12 ldr r2, [pc, #72] @ (80065ac <HAL_ADC_ConfigChannel+0x690>)
- 8006562: 6efb ldr r3, [r7, #108] @ 0x6c
- 8006564: f443 0380 orr.w r3, r3, #4194304 @ 0x400000
- 8006568: 4619 mov r1, r3
- 800656a: 4610 mov r0, r2
- 800656c: f7ff f861 bl 8005632 <LL_ADC_SetCommonPathInternalCh>
- 8006570: e012 b.n 8006598 <HAL_ADC_ConfigChannel+0x67c>
- /* enabled and other ADC of the common group are enabled, internal */
- /* measurement paths cannot be enabled. */
- else
- {
- /* Update ADC state machine to error */
- SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
- 8006572: 687b ldr r3, [r7, #4]
- 8006574: 6d5b ldr r3, [r3, #84] @ 0x54
- 8006576: f043 0220 orr.w r2, r3, #32
- 800657a: 687b ldr r3, [r7, #4]
- 800657c: 655a str r2, [r3, #84] @ 0x54
- tmp_hal_status = HAL_ERROR;
- 800657e: 2301 movs r3, #1
- 8006580: f887 307f strb.w r3, [r7, #127] @ 0x7f
- 8006584: e008 b.n 8006598 <HAL_ADC_ConfigChannel+0x67c>
- /* channel could be done on neither of the channel configuration structure */
- /* parameters. */
- else
- {
- /* Update ADC state machine to error */
- SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
- 8006586: 687b ldr r3, [r7, #4]
- 8006588: 6d5b ldr r3, [r3, #84] @ 0x54
- 800658a: f043 0220 orr.w r2, r3, #32
- 800658e: 687b ldr r3, [r7, #4]
- 8006590: 655a str r2, [r3, #84] @ 0x54
- tmp_hal_status = HAL_ERROR;
- 8006592: 2301 movs r3, #1
- 8006594: f887 307f strb.w r3, [r7, #127] @ 0x7f
- }
- /* Process unlocked */
- __HAL_UNLOCK(hadc);
- 8006598: 687b ldr r3, [r7, #4]
- 800659a: 2200 movs r2, #0
- 800659c: f883 2050 strb.w r2, [r3, #80] @ 0x50
- /* Return function status */
- return tmp_hal_status;
- 80065a0: f897 307f ldrb.w r3, [r7, #127] @ 0x7f
- }
- 80065a4: 4618 mov r0, r3
- 80065a6: 3784 adds r7, #132 @ 0x84
- 80065a8: 46bd mov sp, r7
- 80065aa: bd90 pop {r4, r7, pc}
- 80065ac: 58026300 .word 0x58026300
- 80065b0: 40022000 .word 0x40022000
- 80065b4: 40022100 .word 0x40022100
- 80065b8: 58026000 .word 0x58026000
- 80065bc: cb840000 .word 0xcb840000
- 80065c0: 40022300 .word 0x40022300
- 80065c4: 24000034 .word 0x24000034
- 80065c8: 053e2d63 .word 0x053e2d63
- 80065cc: c7520000 .word 0xc7520000
- 80065d0: cfb80000 .word 0xcfb80000
- 080065d4 <ADC_Enable>:
- * and voltage regulator must be enabled (done into HAL_ADC_Init()).
- * @param hadc ADC handle
- * @retval HAL status.
- */
- HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef *hadc)
- {
- 80065d4: b580 push {r7, lr}
- 80065d6: b084 sub sp, #16
- 80065d8: af00 add r7, sp, #0
- 80065da: 6078 str r0, [r7, #4]
- /* ADC enable and wait for ADC ready (in case of ADC is disabled or */
- /* enabling phase not yet completed: flag ADC ready not yet set). */
- /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
- /* causes: ADC clock not running, ...). */
- if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
- 80065dc: 687b ldr r3, [r7, #4]
- 80065de: 681b ldr r3, [r3, #0]
- 80065e0: 4618 mov r0, r3
- 80065e2: f7ff f9c1 bl 8005968 <LL_ADC_IsEnabled>
- 80065e6: 4603 mov r3, r0
- 80065e8: 2b00 cmp r3, #0
- 80065ea: d16e bne.n 80066ca <ADC_Enable+0xf6>
- {
- /* Check if conditions to enable the ADC are fulfilled */
- if ((hadc->Instance->CR & (ADC_CR_ADCAL | ADC_CR_JADSTP | ADC_CR_ADSTP | ADC_CR_JADSTART | ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN)) != 0UL)
- 80065ec: 687b ldr r3, [r7, #4]
- 80065ee: 681b ldr r3, [r3, #0]
- 80065f0: 689a ldr r2, [r3, #8]
- 80065f2: 4b38 ldr r3, [pc, #224] @ (80066d4 <ADC_Enable+0x100>)
- 80065f4: 4013 ands r3, r2
- 80065f6: 2b00 cmp r3, #0
- 80065f8: d00d beq.n 8006616 <ADC_Enable+0x42>
- {
- /* Update ADC state machine to error */
- SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
- 80065fa: 687b ldr r3, [r7, #4]
- 80065fc: 6d5b ldr r3, [r3, #84] @ 0x54
- 80065fe: f043 0210 orr.w r2, r3, #16
- 8006602: 687b ldr r3, [r7, #4]
- 8006604: 655a str r2, [r3, #84] @ 0x54
- /* Set ADC error code to ADC peripheral internal error */
- SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
- 8006606: 687b ldr r3, [r7, #4]
- 8006608: 6d9b ldr r3, [r3, #88] @ 0x58
- 800660a: f043 0201 orr.w r2, r3, #1
- 800660e: 687b ldr r3, [r7, #4]
- 8006610: 659a str r2, [r3, #88] @ 0x58
- return HAL_ERROR;
- 8006612: 2301 movs r3, #1
- 8006614: e05a b.n 80066cc <ADC_Enable+0xf8>
- }
- /* Enable the ADC peripheral */
- LL_ADC_Enable(hadc->Instance);
- 8006616: 687b ldr r3, [r7, #4]
- 8006618: 681b ldr r3, [r3, #0]
- 800661a: 4618 mov r0, r3
- 800661c: f7ff f97c bl 8005918 <LL_ADC_Enable>
- /* Wait for ADC effectively enabled */
- tickstart = HAL_GetTick();
- 8006620: f7fe ffa2 bl 8005568 <HAL_GetTick>
- 8006624: 60f8 str r0, [r7, #12]
- /* Poll for ADC ready flag raised except case of multimode enabled
- and ADC slave selected. */
- uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
- 8006626: 687b ldr r3, [r7, #4]
- 8006628: 681b ldr r3, [r3, #0]
- 800662a: 4a2b ldr r2, [pc, #172] @ (80066d8 <ADC_Enable+0x104>)
- 800662c: 4293 cmp r3, r2
- 800662e: d004 beq.n 800663a <ADC_Enable+0x66>
- 8006630: 687b ldr r3, [r7, #4]
- 8006632: 681b ldr r3, [r3, #0]
- 8006634: 4a29 ldr r2, [pc, #164] @ (80066dc <ADC_Enable+0x108>)
- 8006636: 4293 cmp r3, r2
- 8006638: d101 bne.n 800663e <ADC_Enable+0x6a>
- 800663a: 4b29 ldr r3, [pc, #164] @ (80066e0 <ADC_Enable+0x10c>)
- 800663c: e000 b.n 8006640 <ADC_Enable+0x6c>
- 800663e: 4b29 ldr r3, [pc, #164] @ (80066e4 <ADC_Enable+0x110>)
- 8006640: 4618 mov r0, r3
- 8006642: f7ff f90d bl 8005860 <LL_ADC_GetMultimode>
- 8006646: 60b8 str r0, [r7, #8]
- if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
- 8006648: 687b ldr r3, [r7, #4]
- 800664a: 681b ldr r3, [r3, #0]
- 800664c: 4a23 ldr r2, [pc, #140] @ (80066dc <ADC_Enable+0x108>)
- 800664e: 4293 cmp r3, r2
- 8006650: d002 beq.n 8006658 <ADC_Enable+0x84>
- 8006652: 687b ldr r3, [r7, #4]
- 8006654: 681b ldr r3, [r3, #0]
- 8006656: e000 b.n 800665a <ADC_Enable+0x86>
- 8006658: 4b1f ldr r3, [pc, #124] @ (80066d8 <ADC_Enable+0x104>)
- 800665a: 687a ldr r2, [r7, #4]
- 800665c: 6812 ldr r2, [r2, #0]
- 800665e: 4293 cmp r3, r2
- 8006660: d02c beq.n 80066bc <ADC_Enable+0xe8>
- || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
- 8006662: 68bb ldr r3, [r7, #8]
- 8006664: 2b00 cmp r3, #0
- 8006666: d130 bne.n 80066ca <ADC_Enable+0xf6>
- )
- {
- while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == 0UL)
- 8006668: e028 b.n 80066bc <ADC_Enable+0xe8>
- The workaround is to continue setting ADEN until ADRDY is becomes 1.
- Additionally, ADC_ENABLE_TIMEOUT is defined to encompass this
- 4 ADC clock cycle duration */
- /* Note: Test of ADC enabled required due to hardware constraint to */
- /* not enable ADC if already enabled. */
- if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
- 800666a: 687b ldr r3, [r7, #4]
- 800666c: 681b ldr r3, [r3, #0]
- 800666e: 4618 mov r0, r3
- 8006670: f7ff f97a bl 8005968 <LL_ADC_IsEnabled>
- 8006674: 4603 mov r3, r0
- 8006676: 2b00 cmp r3, #0
- 8006678: d104 bne.n 8006684 <ADC_Enable+0xb0>
- {
- LL_ADC_Enable(hadc->Instance);
- 800667a: 687b ldr r3, [r7, #4]
- 800667c: 681b ldr r3, [r3, #0]
- 800667e: 4618 mov r0, r3
- 8006680: f7ff f94a bl 8005918 <LL_ADC_Enable>
- }
- if ((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
- 8006684: f7fe ff70 bl 8005568 <HAL_GetTick>
- 8006688: 4602 mov r2, r0
- 800668a: 68fb ldr r3, [r7, #12]
- 800668c: 1ad3 subs r3, r2, r3
- 800668e: 2b02 cmp r3, #2
- 8006690: d914 bls.n 80066bc <ADC_Enable+0xe8>
- {
- /* New check to avoid false timeout detection in case of preemption */
- if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == 0UL)
- 8006692: 687b ldr r3, [r7, #4]
- 8006694: 681b ldr r3, [r3, #0]
- 8006696: 681b ldr r3, [r3, #0]
- 8006698: f003 0301 and.w r3, r3, #1
- 800669c: 2b01 cmp r3, #1
- 800669e: d00d beq.n 80066bc <ADC_Enable+0xe8>
- {
- /* Update ADC state machine to error */
- SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
- 80066a0: 687b ldr r3, [r7, #4]
- 80066a2: 6d5b ldr r3, [r3, #84] @ 0x54
- 80066a4: f043 0210 orr.w r2, r3, #16
- 80066a8: 687b ldr r3, [r7, #4]
- 80066aa: 655a str r2, [r3, #84] @ 0x54
- /* Set ADC error code to ADC peripheral internal error */
- SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
- 80066ac: 687b ldr r3, [r7, #4]
- 80066ae: 6d9b ldr r3, [r3, #88] @ 0x58
- 80066b0: f043 0201 orr.w r2, r3, #1
- 80066b4: 687b ldr r3, [r7, #4]
- 80066b6: 659a str r2, [r3, #88] @ 0x58
- return HAL_ERROR;
- 80066b8: 2301 movs r3, #1
- 80066ba: e007 b.n 80066cc <ADC_Enable+0xf8>
- while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == 0UL)
- 80066bc: 687b ldr r3, [r7, #4]
- 80066be: 681b ldr r3, [r3, #0]
- 80066c0: 681b ldr r3, [r3, #0]
- 80066c2: f003 0301 and.w r3, r3, #1
- 80066c6: 2b01 cmp r3, #1
- 80066c8: d1cf bne.n 800666a <ADC_Enable+0x96>
- }
- }
- }
- /* Return HAL status */
- return HAL_OK;
- 80066ca: 2300 movs r3, #0
- }
- 80066cc: 4618 mov r0, r3
- 80066ce: 3710 adds r7, #16
- 80066d0: 46bd mov sp, r7
- 80066d2: bd80 pop {r7, pc}
- 80066d4: 8000003f .word 0x8000003f
- 80066d8: 40022000 .word 0x40022000
- 80066dc: 40022100 .word 0x40022100
- 80066e0: 40022300 .word 0x40022300
- 80066e4: 58026300 .word 0x58026300
- 080066e8 <ADC_Disable>:
- * stopped.
- * @param hadc ADC handle
- * @retval HAL status.
- */
- HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef *hadc)
- {
- 80066e8: b580 push {r7, lr}
- 80066ea: b084 sub sp, #16
- 80066ec: af00 add r7, sp, #0
- 80066ee: 6078 str r0, [r7, #4]
- uint32_t tickstart;
- const uint32_t tmp_adc_is_disable_on_going = LL_ADC_IsDisableOngoing(hadc->Instance);
- 80066f0: 687b ldr r3, [r7, #4]
- 80066f2: 681b ldr r3, [r3, #0]
- 80066f4: 4618 mov r0, r3
- 80066f6: f7ff f94a bl 800598e <LL_ADC_IsDisableOngoing>
- 80066fa: 60f8 str r0, [r7, #12]
- /* Verification if ADC is not already disabled: */
- /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */
- /* disabled. */
- if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL)
- 80066fc: 687b ldr r3, [r7, #4]
- 80066fe: 681b ldr r3, [r3, #0]
- 8006700: 4618 mov r0, r3
- 8006702: f7ff f931 bl 8005968 <LL_ADC_IsEnabled>
- 8006706: 4603 mov r3, r0
- 8006708: 2b00 cmp r3, #0
- 800670a: d047 beq.n 800679c <ADC_Disable+0xb4>
- && (tmp_adc_is_disable_on_going == 0UL)
- 800670c: 68fb ldr r3, [r7, #12]
- 800670e: 2b00 cmp r3, #0
- 8006710: d144 bne.n 800679c <ADC_Disable+0xb4>
- )
- {
- /* Check if conditions to disable the ADC are fulfilled */
- if ((hadc->Instance->CR & (ADC_CR_JADSTART | ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN)
- 8006712: 687b ldr r3, [r7, #4]
- 8006714: 681b ldr r3, [r3, #0]
- 8006716: 689b ldr r3, [r3, #8]
- 8006718: f003 030d and.w r3, r3, #13
- 800671c: 2b01 cmp r3, #1
- 800671e: d10c bne.n 800673a <ADC_Disable+0x52>
- {
- /* Disable the ADC peripheral */
- LL_ADC_Disable(hadc->Instance);
- 8006720: 687b ldr r3, [r7, #4]
- 8006722: 681b ldr r3, [r3, #0]
- 8006724: 4618 mov r0, r3
- 8006726: f7ff f90b bl 8005940 <LL_ADC_Disable>
- __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOSMP | ADC_FLAG_RDY));
- 800672a: 687b ldr r3, [r7, #4]
- 800672c: 681b ldr r3, [r3, #0]
- 800672e: 2203 movs r2, #3
- 8006730: 601a str r2, [r3, #0]
- return HAL_ERROR;
- }
- /* Wait for ADC effectively disabled */
- /* Get tick count */
- tickstart = HAL_GetTick();
- 8006732: f7fe ff19 bl 8005568 <HAL_GetTick>
- 8006736: 60b8 str r0, [r7, #8]
- while ((hadc->Instance->CR & ADC_CR_ADEN) != 0UL)
- 8006738: e029 b.n 800678e <ADC_Disable+0xa6>
- SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
- 800673a: 687b ldr r3, [r7, #4]
- 800673c: 6d5b ldr r3, [r3, #84] @ 0x54
- 800673e: f043 0210 orr.w r2, r3, #16
- 8006742: 687b ldr r3, [r7, #4]
- 8006744: 655a str r2, [r3, #84] @ 0x54
- SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
- 8006746: 687b ldr r3, [r7, #4]
- 8006748: 6d9b ldr r3, [r3, #88] @ 0x58
- 800674a: f043 0201 orr.w r2, r3, #1
- 800674e: 687b ldr r3, [r7, #4]
- 8006750: 659a str r2, [r3, #88] @ 0x58
- return HAL_ERROR;
- 8006752: 2301 movs r3, #1
- 8006754: e023 b.n 800679e <ADC_Disable+0xb6>
- {
- if ((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
- 8006756: f7fe ff07 bl 8005568 <HAL_GetTick>
- 800675a: 4602 mov r2, r0
- 800675c: 68bb ldr r3, [r7, #8]
- 800675e: 1ad3 subs r3, r2, r3
- 8006760: 2b02 cmp r3, #2
- 8006762: d914 bls.n 800678e <ADC_Disable+0xa6>
- {
- /* New check to avoid false timeout detection in case of preemption */
- if ((hadc->Instance->CR & ADC_CR_ADEN) != 0UL)
- 8006764: 687b ldr r3, [r7, #4]
- 8006766: 681b ldr r3, [r3, #0]
- 8006768: 689b ldr r3, [r3, #8]
- 800676a: f003 0301 and.w r3, r3, #1
- 800676e: 2b00 cmp r3, #0
- 8006770: d00d beq.n 800678e <ADC_Disable+0xa6>
- {
- /* Update ADC state machine to error */
- SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
- 8006772: 687b ldr r3, [r7, #4]
- 8006774: 6d5b ldr r3, [r3, #84] @ 0x54
- 8006776: f043 0210 orr.w r2, r3, #16
- 800677a: 687b ldr r3, [r7, #4]
- 800677c: 655a str r2, [r3, #84] @ 0x54
- /* Set ADC error code to ADC peripheral internal error */
- SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
- 800677e: 687b ldr r3, [r7, #4]
- 8006780: 6d9b ldr r3, [r3, #88] @ 0x58
- 8006782: f043 0201 orr.w r2, r3, #1
- 8006786: 687b ldr r3, [r7, #4]
- 8006788: 659a str r2, [r3, #88] @ 0x58
- return HAL_ERROR;
- 800678a: 2301 movs r3, #1
- 800678c: e007 b.n 800679e <ADC_Disable+0xb6>
- while ((hadc->Instance->CR & ADC_CR_ADEN) != 0UL)
- 800678e: 687b ldr r3, [r7, #4]
- 8006790: 681b ldr r3, [r3, #0]
- 8006792: 689b ldr r3, [r3, #8]
- 8006794: f003 0301 and.w r3, r3, #1
- 8006798: 2b00 cmp r3, #0
- 800679a: d1dc bne.n 8006756 <ADC_Disable+0x6e>
- }
- }
- }
- /* Return HAL status */
- return HAL_OK;
- 800679c: 2300 movs r3, #0
- }
- 800679e: 4618 mov r0, r3
- 80067a0: 3710 adds r7, #16
- 80067a2: 46bd mov sp, r7
- 80067a4: bd80 pop {r7, pc}
- 080067a6 <ADC_DMAConvCplt>:
- * @brief DMA transfer complete callback.
- * @param hdma pointer to DMA handle.
- * @retval None
- */
- void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
- {
- 80067a6: b580 push {r7, lr}
- 80067a8: b084 sub sp, #16
- 80067aa: af00 add r7, sp, #0
- 80067ac: 6078 str r0, [r7, #4]
- /* Retrieve ADC handle corresponding to current DMA handle */
- ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
- 80067ae: 687b ldr r3, [r7, #4]
- 80067b0: 6b9b ldr r3, [r3, #56] @ 0x38
- 80067b2: 60fb str r3, [r7, #12]
- /* Update state machine on conversion status if not in error state */
- if ((hadc->State & (HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) == 0UL)
- 80067b4: 68fb ldr r3, [r7, #12]
- 80067b6: 6d5b ldr r3, [r3, #84] @ 0x54
- 80067b8: f003 0350 and.w r3, r3, #80 @ 0x50
- 80067bc: 2b00 cmp r3, #0
- 80067be: d14b bne.n 8006858 <ADC_DMAConvCplt+0xb2>
- {
- /* Set ADC state */
- SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
- 80067c0: 68fb ldr r3, [r7, #12]
- 80067c2: 6d5b ldr r3, [r3, #84] @ 0x54
- 80067c4: f443 7200 orr.w r2, r3, #512 @ 0x200
- 80067c8: 68fb ldr r3, [r7, #12]
- 80067ca: 655a str r2, [r3, #84] @ 0x54
- /* Determine whether any further conversion upcoming on group regular */
- /* by external trigger, continuous mode or scan sequence on going */
- /* to disable interruption. */
- /* Is it the end of the regular sequence ? */
- if ((hadc->Instance->ISR & ADC_FLAG_EOS) != 0UL)
- 80067cc: 68fb ldr r3, [r7, #12]
- 80067ce: 681b ldr r3, [r3, #0]
- 80067d0: 681b ldr r3, [r3, #0]
- 80067d2: f003 0308 and.w r3, r3, #8
- 80067d6: 2b00 cmp r3, #0
- 80067d8: d021 beq.n 800681e <ADC_DMAConvCplt+0x78>
- {
- /* Are conversions software-triggered ? */
- if (LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance) != 0UL)
- 80067da: 68fb ldr r3, [r7, #12]
- 80067dc: 681b ldr r3, [r3, #0]
- 80067de: 4618 mov r0, r3
- 80067e0: f7fe ff9c bl 800571c <LL_ADC_REG_IsTriggerSourceSWStart>
- 80067e4: 4603 mov r3, r0
- 80067e6: 2b00 cmp r3, #0
- 80067e8: d032 beq.n 8006850 <ADC_DMAConvCplt+0xaa>
- {
- /* Is CONT bit set ? */
- if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_CONT) == 0UL)
- 80067ea: 68fb ldr r3, [r7, #12]
- 80067ec: 681b ldr r3, [r3, #0]
- 80067ee: 68db ldr r3, [r3, #12]
- 80067f0: f403 5300 and.w r3, r3, #8192 @ 0x2000
- 80067f4: 2b00 cmp r3, #0
- 80067f6: d12b bne.n 8006850 <ADC_DMAConvCplt+0xaa>
- {
- /* CONT bit is not set, no more conversions expected */
- CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
- 80067f8: 68fb ldr r3, [r7, #12]
- 80067fa: 6d5b ldr r3, [r3, #84] @ 0x54
- 80067fc: f423 7280 bic.w r2, r3, #256 @ 0x100
- 8006800: 68fb ldr r3, [r7, #12]
- 8006802: 655a str r2, [r3, #84] @ 0x54
- if ((hadc->State & HAL_ADC_STATE_INJ_BUSY) == 0UL)
- 8006804: 68fb ldr r3, [r7, #12]
- 8006806: 6d5b ldr r3, [r3, #84] @ 0x54
- 8006808: f403 5380 and.w r3, r3, #4096 @ 0x1000
- 800680c: 2b00 cmp r3, #0
- 800680e: d11f bne.n 8006850 <ADC_DMAConvCplt+0xaa>
- {
- SET_BIT(hadc->State, HAL_ADC_STATE_READY);
- 8006810: 68fb ldr r3, [r7, #12]
- 8006812: 6d5b ldr r3, [r3, #84] @ 0x54
- 8006814: f043 0201 orr.w r2, r3, #1
- 8006818: 68fb ldr r3, [r7, #12]
- 800681a: 655a str r2, [r3, #84] @ 0x54
- 800681c: e018 b.n 8006850 <ADC_DMAConvCplt+0xaa>
- }
- else
- {
- /* DMA End of Transfer interrupt was triggered but conversions sequence
- is not over. If DMACFG is set to 0, conversions are stopped. */
- if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_DMNGT) == 0UL)
- 800681e: 68fb ldr r3, [r7, #12]
- 8006820: 681b ldr r3, [r3, #0]
- 8006822: 68db ldr r3, [r3, #12]
- 8006824: f003 0303 and.w r3, r3, #3
- 8006828: 2b00 cmp r3, #0
- 800682a: d111 bne.n 8006850 <ADC_DMAConvCplt+0xaa>
- {
- /* DMACFG bit is not set, conversions are stopped. */
- CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
- 800682c: 68fb ldr r3, [r7, #12]
- 800682e: 6d5b ldr r3, [r3, #84] @ 0x54
- 8006830: f423 7280 bic.w r2, r3, #256 @ 0x100
- 8006834: 68fb ldr r3, [r7, #12]
- 8006836: 655a str r2, [r3, #84] @ 0x54
- if ((hadc->State & HAL_ADC_STATE_INJ_BUSY) == 0UL)
- 8006838: 68fb ldr r3, [r7, #12]
- 800683a: 6d5b ldr r3, [r3, #84] @ 0x54
- 800683c: f403 5380 and.w r3, r3, #4096 @ 0x1000
- 8006840: 2b00 cmp r3, #0
- 8006842: d105 bne.n 8006850 <ADC_DMAConvCplt+0xaa>
- {
- SET_BIT(hadc->State, HAL_ADC_STATE_READY);
- 8006844: 68fb ldr r3, [r7, #12]
- 8006846: 6d5b ldr r3, [r3, #84] @ 0x54
- 8006848: f043 0201 orr.w r2, r3, #1
- 800684c: 68fb ldr r3, [r7, #12]
- 800684e: 655a str r2, [r3, #84] @ 0x54
- /* Conversion complete callback */
- #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
- hadc->ConvCpltCallback(hadc);
- #else
- HAL_ADC_ConvCpltCallback(hadc);
- 8006850: 68f8 ldr r0, [r7, #12]
- 8006852: f7fb f817 bl 8001884 <HAL_ADC_ConvCpltCallback>
- {
- /* Call ADC DMA error callback */
- hadc->DMA_Handle->XferErrorCallback(hdma);
- }
- }
- }
- 8006856: e00e b.n 8006876 <ADC_DMAConvCplt+0xd0>
- if ((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) != 0UL)
- 8006858: 68fb ldr r3, [r7, #12]
- 800685a: 6d5b ldr r3, [r3, #84] @ 0x54
- 800685c: f003 0310 and.w r3, r3, #16
- 8006860: 2b00 cmp r3, #0
- 8006862: d003 beq.n 800686c <ADC_DMAConvCplt+0xc6>
- HAL_ADC_ErrorCallback(hadc);
- 8006864: 68f8 ldr r0, [r7, #12]
- 8006866: f7ff fb4f bl 8005f08 <HAL_ADC_ErrorCallback>
- }
- 800686a: e004 b.n 8006876 <ADC_DMAConvCplt+0xd0>
- hadc->DMA_Handle->XferErrorCallback(hdma);
- 800686c: 68fb ldr r3, [r7, #12]
- 800686e: 6cdb ldr r3, [r3, #76] @ 0x4c
- 8006870: 6cdb ldr r3, [r3, #76] @ 0x4c
- 8006872: 6878 ldr r0, [r7, #4]
- 8006874: 4798 blx r3
- }
- 8006876: bf00 nop
- 8006878: 3710 adds r7, #16
- 800687a: 46bd mov sp, r7
- 800687c: bd80 pop {r7, pc}
- 0800687e <ADC_DMAHalfConvCplt>:
- * @brief DMA half transfer complete callback.
- * @param hdma pointer to DMA handle.
- * @retval None
- */
- void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
- {
- 800687e: b580 push {r7, lr}
- 8006880: b084 sub sp, #16
- 8006882: af00 add r7, sp, #0
- 8006884: 6078 str r0, [r7, #4]
- /* Retrieve ADC handle corresponding to current DMA handle */
- ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
- 8006886: 687b ldr r3, [r7, #4]
- 8006888: 6b9b ldr r3, [r3, #56] @ 0x38
- 800688a: 60fb str r3, [r7, #12]
- /* Half conversion callback */
- #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
- hadc->ConvHalfCpltCallback(hadc);
- #else
- HAL_ADC_ConvHalfCpltCallback(hadc);
- 800688c: 68f8 ldr r0, [r7, #12]
- 800688e: f7ff fb31 bl 8005ef4 <HAL_ADC_ConvHalfCpltCallback>
- #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
- }
- 8006892: bf00 nop
- 8006894: 3710 adds r7, #16
- 8006896: 46bd mov sp, r7
- 8006898: bd80 pop {r7, pc}
- 0800689a <ADC_DMAError>:
- * @brief DMA error callback.
- * @param hdma pointer to DMA handle.
- * @retval None
- */
- void ADC_DMAError(DMA_HandleTypeDef *hdma)
- {
- 800689a: b580 push {r7, lr}
- 800689c: b084 sub sp, #16
- 800689e: af00 add r7, sp, #0
- 80068a0: 6078 str r0, [r7, #4]
- /* Retrieve ADC handle corresponding to current DMA handle */
- ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
- 80068a2: 687b ldr r3, [r7, #4]
- 80068a4: 6b9b ldr r3, [r3, #56] @ 0x38
- 80068a6: 60fb str r3, [r7, #12]
- /* Set ADC state */
- SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
- 80068a8: 68fb ldr r3, [r7, #12]
- 80068aa: 6d5b ldr r3, [r3, #84] @ 0x54
- 80068ac: f043 0240 orr.w r2, r3, #64 @ 0x40
- 80068b0: 68fb ldr r3, [r7, #12]
- 80068b2: 655a str r2, [r3, #84] @ 0x54
- /* Set ADC error code to DMA error */
- SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
- 80068b4: 68fb ldr r3, [r7, #12]
- 80068b6: 6d9b ldr r3, [r3, #88] @ 0x58
- 80068b8: f043 0204 orr.w r2, r3, #4
- 80068bc: 68fb ldr r3, [r7, #12]
- 80068be: 659a str r2, [r3, #88] @ 0x58
- /* Error callback */
- #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
- hadc->ErrorCallback(hadc);
- #else
- HAL_ADC_ErrorCallback(hadc);
- 80068c0: 68f8 ldr r0, [r7, #12]
- 80068c2: f7ff fb21 bl 8005f08 <HAL_ADC_ErrorCallback>
- #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
- }
- 80068c6: bf00 nop
- 80068c8: 3710 adds r7, #16
- 80068ca: 46bd mov sp, r7
- 80068cc: bd80 pop {r7, pc}
- ...
- 080068d0 <ADC_ConfigureBoostMode>:
- * stopped.
- * @param hadc ADC handle
- * @retval None.
- */
- void ADC_ConfigureBoostMode(ADC_HandleTypeDef *hadc)
- {
- 80068d0: b580 push {r7, lr}
- 80068d2: b084 sub sp, #16
- 80068d4: af00 add r7, sp, #0
- 80068d6: 6078 str r0, [r7, #4]
- uint32_t freq;
- if (ADC_IS_SYNCHRONOUS_CLOCK_MODE(hadc))
- 80068d8: 687b ldr r3, [r7, #4]
- 80068da: 681b ldr r3, [r3, #0]
- 80068dc: 4a7a ldr r2, [pc, #488] @ (8006ac8 <ADC_ConfigureBoostMode+0x1f8>)
- 80068de: 4293 cmp r3, r2
- 80068e0: d004 beq.n 80068ec <ADC_ConfigureBoostMode+0x1c>
- 80068e2: 687b ldr r3, [r7, #4]
- 80068e4: 681b ldr r3, [r3, #0]
- 80068e6: 4a79 ldr r2, [pc, #484] @ (8006acc <ADC_ConfigureBoostMode+0x1fc>)
- 80068e8: 4293 cmp r3, r2
- 80068ea: d109 bne.n 8006900 <ADC_ConfigureBoostMode+0x30>
- 80068ec: 4b78 ldr r3, [pc, #480] @ (8006ad0 <ADC_ConfigureBoostMode+0x200>)
- 80068ee: 689b ldr r3, [r3, #8]
- 80068f0: f403 3340 and.w r3, r3, #196608 @ 0x30000
- 80068f4: 2b00 cmp r3, #0
- 80068f6: bf14 ite ne
- 80068f8: 2301 movne r3, #1
- 80068fa: 2300 moveq r3, #0
- 80068fc: b2db uxtb r3, r3
- 80068fe: e008 b.n 8006912 <ADC_ConfigureBoostMode+0x42>
- 8006900: 4b74 ldr r3, [pc, #464] @ (8006ad4 <ADC_ConfigureBoostMode+0x204>)
- 8006902: 689b ldr r3, [r3, #8]
- 8006904: f403 3340 and.w r3, r3, #196608 @ 0x30000
- 8006908: 2b00 cmp r3, #0
- 800690a: bf14 ite ne
- 800690c: 2301 movne r3, #1
- 800690e: 2300 moveq r3, #0
- 8006910: b2db uxtb r3, r3
- 8006912: 2b00 cmp r3, #0
- 8006914: d01c beq.n 8006950 <ADC_ConfigureBoostMode+0x80>
- {
- freq = HAL_RCC_GetHCLKFreq();
- 8006916: f005 fb47 bl 800bfa8 <HAL_RCC_GetHCLKFreq>
- 800691a: 60f8 str r0, [r7, #12]
- switch (hadc->Init.ClockPrescaler)
- 800691c: 687b ldr r3, [r7, #4]
- 800691e: 685b ldr r3, [r3, #4]
- 8006920: f5b3 3f40 cmp.w r3, #196608 @ 0x30000
- 8006924: d010 beq.n 8006948 <ADC_ConfigureBoostMode+0x78>
- 8006926: f5b3 3f40 cmp.w r3, #196608 @ 0x30000
- 800692a: d873 bhi.n 8006a14 <ADC_ConfigureBoostMode+0x144>
- 800692c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
- 8006930: d002 beq.n 8006938 <ADC_ConfigureBoostMode+0x68>
- 8006932: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 8006936: d16d bne.n 8006a14 <ADC_ConfigureBoostMode+0x144>
- {
- case ADC_CLOCK_SYNC_PCLK_DIV1:
- case ADC_CLOCK_SYNC_PCLK_DIV2:
- freq /= (hadc->Init.ClockPrescaler >> ADC_CCR_CKMODE_Pos);
- 8006938: 687b ldr r3, [r7, #4]
- 800693a: 685b ldr r3, [r3, #4]
- 800693c: 0c1b lsrs r3, r3, #16
- 800693e: 68fa ldr r2, [r7, #12]
- 8006940: fbb2 f3f3 udiv r3, r2, r3
- 8006944: 60fb str r3, [r7, #12]
- break;
- 8006946: e068 b.n 8006a1a <ADC_ConfigureBoostMode+0x14a>
- case ADC_CLOCK_SYNC_PCLK_DIV4:
- freq /= 4UL;
- 8006948: 68fb ldr r3, [r7, #12]
- 800694a: 089b lsrs r3, r3, #2
- 800694c: 60fb str r3, [r7, #12]
- break;
- 800694e: e064 b.n 8006a1a <ADC_ConfigureBoostMode+0x14a>
- break;
- }
- }
- else
- {
- freq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC);
- 8006950: f44f 2000 mov.w r0, #524288 @ 0x80000
- 8006954: f04f 0100 mov.w r1, #0
- 8006958: f006 fdb2 bl 800d4c0 <HAL_RCCEx_GetPeriphCLKFreq>
- 800695c: 60f8 str r0, [r7, #12]
- switch (hadc->Init.ClockPrescaler)
- 800695e: 687b ldr r3, [r7, #4]
- 8006960: 685b ldr r3, [r3, #4]
- 8006962: f5b3 1f30 cmp.w r3, #2883584 @ 0x2c0000
- 8006966: d051 beq.n 8006a0c <ADC_ConfigureBoostMode+0x13c>
- 8006968: f5b3 1f30 cmp.w r3, #2883584 @ 0x2c0000
- 800696c: d854 bhi.n 8006a18 <ADC_ConfigureBoostMode+0x148>
- 800696e: f5b3 1f20 cmp.w r3, #2621440 @ 0x280000
- 8006972: d047 beq.n 8006a04 <ADC_ConfigureBoostMode+0x134>
- 8006974: f5b3 1f20 cmp.w r3, #2621440 @ 0x280000
- 8006978: d84e bhi.n 8006a18 <ADC_ConfigureBoostMode+0x148>
- 800697a: f5b3 1f10 cmp.w r3, #2359296 @ 0x240000
- 800697e: d03d beq.n 80069fc <ADC_ConfigureBoostMode+0x12c>
- 8006980: f5b3 1f10 cmp.w r3, #2359296 @ 0x240000
- 8006984: d848 bhi.n 8006a18 <ADC_ConfigureBoostMode+0x148>
- 8006986: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
- 800698a: d033 beq.n 80069f4 <ADC_ConfigureBoostMode+0x124>
- 800698c: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
- 8006990: d842 bhi.n 8006a18 <ADC_ConfigureBoostMode+0x148>
- 8006992: f5b3 1fe0 cmp.w r3, #1835008 @ 0x1c0000
- 8006996: d029 beq.n 80069ec <ADC_ConfigureBoostMode+0x11c>
- 8006998: f5b3 1fe0 cmp.w r3, #1835008 @ 0x1c0000
- 800699c: d83c bhi.n 8006a18 <ADC_ConfigureBoostMode+0x148>
- 800699e: f5b3 1fc0 cmp.w r3, #1572864 @ 0x180000
- 80069a2: d01a beq.n 80069da <ADC_ConfigureBoostMode+0x10a>
- 80069a4: f5b3 1fc0 cmp.w r3, #1572864 @ 0x180000
- 80069a8: d836 bhi.n 8006a18 <ADC_ConfigureBoostMode+0x148>
- 80069aa: f5b3 1fa0 cmp.w r3, #1310720 @ 0x140000
- 80069ae: d014 beq.n 80069da <ADC_ConfigureBoostMode+0x10a>
- 80069b0: f5b3 1fa0 cmp.w r3, #1310720 @ 0x140000
- 80069b4: d830 bhi.n 8006a18 <ADC_ConfigureBoostMode+0x148>
- 80069b6: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
- 80069ba: d00e beq.n 80069da <ADC_ConfigureBoostMode+0x10a>
- 80069bc: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
- 80069c0: d82a bhi.n 8006a18 <ADC_ConfigureBoostMode+0x148>
- 80069c2: f5b3 2f40 cmp.w r3, #786432 @ 0xc0000
- 80069c6: d008 beq.n 80069da <ADC_ConfigureBoostMode+0x10a>
- 80069c8: f5b3 2f40 cmp.w r3, #786432 @ 0xc0000
- 80069cc: d824 bhi.n 8006a18 <ADC_ConfigureBoostMode+0x148>
- 80069ce: f5b3 2f80 cmp.w r3, #262144 @ 0x40000
- 80069d2: d002 beq.n 80069da <ADC_ConfigureBoostMode+0x10a>
- 80069d4: f5b3 2f00 cmp.w r3, #524288 @ 0x80000
- 80069d8: d11e bne.n 8006a18 <ADC_ConfigureBoostMode+0x148>
- case ADC_CLOCK_ASYNC_DIV4:
- case ADC_CLOCK_ASYNC_DIV6:
- case ADC_CLOCK_ASYNC_DIV8:
- case ADC_CLOCK_ASYNC_DIV10:
- case ADC_CLOCK_ASYNC_DIV12:
- freq /= ((hadc->Init.ClockPrescaler >> ADC_CCR_PRESC_Pos) << 1UL);
- 80069da: 687b ldr r3, [r7, #4]
- 80069dc: 685b ldr r3, [r3, #4]
- 80069de: 0c9b lsrs r3, r3, #18
- 80069e0: 005b lsls r3, r3, #1
- 80069e2: 68fa ldr r2, [r7, #12]
- 80069e4: fbb2 f3f3 udiv r3, r2, r3
- 80069e8: 60fb str r3, [r7, #12]
- break;
- 80069ea: e016 b.n 8006a1a <ADC_ConfigureBoostMode+0x14a>
- case ADC_CLOCK_ASYNC_DIV16:
- freq /= 16UL;
- 80069ec: 68fb ldr r3, [r7, #12]
- 80069ee: 091b lsrs r3, r3, #4
- 80069f0: 60fb str r3, [r7, #12]
- break;
- 80069f2: e012 b.n 8006a1a <ADC_ConfigureBoostMode+0x14a>
- case ADC_CLOCK_ASYNC_DIV32:
- freq /= 32UL;
- 80069f4: 68fb ldr r3, [r7, #12]
- 80069f6: 095b lsrs r3, r3, #5
- 80069f8: 60fb str r3, [r7, #12]
- break;
- 80069fa: e00e b.n 8006a1a <ADC_ConfigureBoostMode+0x14a>
- case ADC_CLOCK_ASYNC_DIV64:
- freq /= 64UL;
- 80069fc: 68fb ldr r3, [r7, #12]
- 80069fe: 099b lsrs r3, r3, #6
- 8006a00: 60fb str r3, [r7, #12]
- break;
- 8006a02: e00a b.n 8006a1a <ADC_ConfigureBoostMode+0x14a>
- case ADC_CLOCK_ASYNC_DIV128:
- freq /= 128UL;
- 8006a04: 68fb ldr r3, [r7, #12]
- 8006a06: 09db lsrs r3, r3, #7
- 8006a08: 60fb str r3, [r7, #12]
- break;
- 8006a0a: e006 b.n 8006a1a <ADC_ConfigureBoostMode+0x14a>
- case ADC_CLOCK_ASYNC_DIV256:
- freq /= 256UL;
- 8006a0c: 68fb ldr r3, [r7, #12]
- 8006a0e: 0a1b lsrs r3, r3, #8
- 8006a10: 60fb str r3, [r7, #12]
- break;
- 8006a12: e002 b.n 8006a1a <ADC_ConfigureBoostMode+0x14a>
- break;
- 8006a14: bf00 nop
- 8006a16: e000 b.n 8006a1a <ADC_ConfigureBoostMode+0x14a>
- default:
- break;
- 8006a18: bf00 nop
- else /* if(freq > 25000000UL) */
- {
- MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_1 | ADC_CR_BOOST_0);
- }
- #else
- if (HAL_GetREVID() <= REV_ID_Y) /* STM32H7 silicon Rev.Y */
- 8006a1a: f7fe fdb1 bl 8005580 <HAL_GetREVID>
- 8006a1e: 4603 mov r3, r0
- 8006a20: f241 0203 movw r2, #4099 @ 0x1003
- 8006a24: 4293 cmp r3, r2
- 8006a26: d815 bhi.n 8006a54 <ADC_ConfigureBoostMode+0x184>
- {
- if (freq > 20000000UL)
- 8006a28: 68fb ldr r3, [r7, #12]
- 8006a2a: 4a2b ldr r2, [pc, #172] @ (8006ad8 <ADC_ConfigureBoostMode+0x208>)
- 8006a2c: 4293 cmp r3, r2
- 8006a2e: d908 bls.n 8006a42 <ADC_ConfigureBoostMode+0x172>
- {
- SET_BIT(hadc->Instance->CR, ADC_CR_BOOST_0);
- 8006a30: 687b ldr r3, [r7, #4]
- 8006a32: 681b ldr r3, [r3, #0]
- 8006a34: 689a ldr r2, [r3, #8]
- 8006a36: 687b ldr r3, [r7, #4]
- 8006a38: 681b ldr r3, [r3, #0]
- 8006a3a: f442 7280 orr.w r2, r2, #256 @ 0x100
- 8006a3e: 609a str r2, [r3, #8]
- {
- MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_1 | ADC_CR_BOOST_0);
- }
- }
- #endif /* ADC_VER_V5_3 */
- }
- 8006a40: e03e b.n 8006ac0 <ADC_ConfigureBoostMode+0x1f0>
- CLEAR_BIT(hadc->Instance->CR, ADC_CR_BOOST_0);
- 8006a42: 687b ldr r3, [r7, #4]
- 8006a44: 681b ldr r3, [r3, #0]
- 8006a46: 689a ldr r2, [r3, #8]
- 8006a48: 687b ldr r3, [r7, #4]
- 8006a4a: 681b ldr r3, [r3, #0]
- 8006a4c: f422 7280 bic.w r2, r2, #256 @ 0x100
- 8006a50: 609a str r2, [r3, #8]
- }
- 8006a52: e035 b.n 8006ac0 <ADC_ConfigureBoostMode+0x1f0>
- freq /= 2U; /* divider by 2 for Rev.V */
- 8006a54: 68fb ldr r3, [r7, #12]
- 8006a56: 085b lsrs r3, r3, #1
- 8006a58: 60fb str r3, [r7, #12]
- if (freq <= 6250000UL)
- 8006a5a: 68fb ldr r3, [r7, #12]
- 8006a5c: 4a1f ldr r2, [pc, #124] @ (8006adc <ADC_ConfigureBoostMode+0x20c>)
- 8006a5e: 4293 cmp r3, r2
- 8006a60: d808 bhi.n 8006a74 <ADC_ConfigureBoostMode+0x1a4>
- MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, 0UL);
- 8006a62: 687b ldr r3, [r7, #4]
- 8006a64: 681b ldr r3, [r3, #0]
- 8006a66: 689a ldr r2, [r3, #8]
- 8006a68: 687b ldr r3, [r7, #4]
- 8006a6a: 681b ldr r3, [r3, #0]
- 8006a6c: f422 7240 bic.w r2, r2, #768 @ 0x300
- 8006a70: 609a str r2, [r3, #8]
- }
- 8006a72: e025 b.n 8006ac0 <ADC_ConfigureBoostMode+0x1f0>
- else if (freq <= 12500000UL)
- 8006a74: 68fb ldr r3, [r7, #12]
- 8006a76: 4a1a ldr r2, [pc, #104] @ (8006ae0 <ADC_ConfigureBoostMode+0x210>)
- 8006a78: 4293 cmp r3, r2
- 8006a7a: d80a bhi.n 8006a92 <ADC_ConfigureBoostMode+0x1c2>
- MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_0);
- 8006a7c: 687b ldr r3, [r7, #4]
- 8006a7e: 681b ldr r3, [r3, #0]
- 8006a80: 689b ldr r3, [r3, #8]
- 8006a82: f423 7240 bic.w r2, r3, #768 @ 0x300
- 8006a86: 687b ldr r3, [r7, #4]
- 8006a88: 681b ldr r3, [r3, #0]
- 8006a8a: f442 7280 orr.w r2, r2, #256 @ 0x100
- 8006a8e: 609a str r2, [r3, #8]
- }
- 8006a90: e016 b.n 8006ac0 <ADC_ConfigureBoostMode+0x1f0>
- else if (freq <= 25000000UL)
- 8006a92: 68fb ldr r3, [r7, #12]
- 8006a94: 4a13 ldr r2, [pc, #76] @ (8006ae4 <ADC_ConfigureBoostMode+0x214>)
- 8006a96: 4293 cmp r3, r2
- 8006a98: d80a bhi.n 8006ab0 <ADC_ConfigureBoostMode+0x1e0>
- MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_1);
- 8006a9a: 687b ldr r3, [r7, #4]
- 8006a9c: 681b ldr r3, [r3, #0]
- 8006a9e: 689b ldr r3, [r3, #8]
- 8006aa0: f423 7240 bic.w r2, r3, #768 @ 0x300
- 8006aa4: 687b ldr r3, [r7, #4]
- 8006aa6: 681b ldr r3, [r3, #0]
- 8006aa8: f442 7200 orr.w r2, r2, #512 @ 0x200
- 8006aac: 609a str r2, [r3, #8]
- }
- 8006aae: e007 b.n 8006ac0 <ADC_ConfigureBoostMode+0x1f0>
- MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_1 | ADC_CR_BOOST_0);
- 8006ab0: 687b ldr r3, [r7, #4]
- 8006ab2: 681b ldr r3, [r3, #0]
- 8006ab4: 689a ldr r2, [r3, #8]
- 8006ab6: 687b ldr r3, [r7, #4]
- 8006ab8: 681b ldr r3, [r3, #0]
- 8006aba: f442 7240 orr.w r2, r2, #768 @ 0x300
- 8006abe: 609a str r2, [r3, #8]
- }
- 8006ac0: bf00 nop
- 8006ac2: 3710 adds r7, #16
- 8006ac4: 46bd mov sp, r7
- 8006ac6: bd80 pop {r7, pc}
- 8006ac8: 40022000 .word 0x40022000
- 8006acc: 40022100 .word 0x40022100
- 8006ad0: 40022300 .word 0x40022300
- 8006ad4: 58026300 .word 0x58026300
- 8006ad8: 01312d00 .word 0x01312d00
- 8006adc: 005f5e10 .word 0x005f5e10
- 8006ae0: 00bebc20 .word 0x00bebc20
- 8006ae4: 017d7840 .word 0x017d7840
- 08006ae8 <LL_ADC_IsEnabled>:
- {
- 8006ae8: b480 push {r7}
- 8006aea: b083 sub sp, #12
- 8006aec: af00 add r7, sp, #0
- 8006aee: 6078 str r0, [r7, #4]
- return ((READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN)) ? 1UL : 0UL);
- 8006af0: 687b ldr r3, [r7, #4]
- 8006af2: 689b ldr r3, [r3, #8]
- 8006af4: f003 0301 and.w r3, r3, #1
- 8006af8: 2b01 cmp r3, #1
- 8006afa: d101 bne.n 8006b00 <LL_ADC_IsEnabled+0x18>
- 8006afc: 2301 movs r3, #1
- 8006afe: e000 b.n 8006b02 <LL_ADC_IsEnabled+0x1a>
- 8006b00: 2300 movs r3, #0
- }
- 8006b02: 4618 mov r0, r3
- 8006b04: 370c adds r7, #12
- 8006b06: 46bd mov sp, r7
- 8006b08: f85d 7b04 ldr.w r7, [sp], #4
- 8006b0c: 4770 bx lr
- ...
- 08006b10 <LL_ADC_StartCalibration>:
- {
- 8006b10: b480 push {r7}
- 8006b12: b085 sub sp, #20
- 8006b14: af00 add r7, sp, #0
- 8006b16: 60f8 str r0, [r7, #12]
- 8006b18: 60b9 str r1, [r7, #8]
- 8006b1a: 607a str r2, [r7, #4]
- MODIFY_REG(ADCx->CR,
- 8006b1c: 68fb ldr r3, [r7, #12]
- 8006b1e: 689a ldr r2, [r3, #8]
- 8006b20: 4b09 ldr r3, [pc, #36] @ (8006b48 <LL_ADC_StartCalibration+0x38>)
- 8006b22: 4013 ands r3, r2
- 8006b24: 68ba ldr r2, [r7, #8]
- 8006b26: f402 3180 and.w r1, r2, #65536 @ 0x10000
- 8006b2a: 687a ldr r2, [r7, #4]
- 8006b2c: f002 4280 and.w r2, r2, #1073741824 @ 0x40000000
- 8006b30: 430a orrs r2, r1
- 8006b32: 4313 orrs r3, r2
- 8006b34: f043 4200 orr.w r2, r3, #2147483648 @ 0x80000000
- 8006b38: 68fb ldr r3, [r7, #12]
- 8006b3a: 609a str r2, [r3, #8]
- }
- 8006b3c: bf00 nop
- 8006b3e: 3714 adds r7, #20
- 8006b40: 46bd mov sp, r7
- 8006b42: f85d 7b04 ldr.w r7, [sp], #4
- 8006b46: 4770 bx lr
- 8006b48: 3ffeffc0 .word 0x3ffeffc0
- 08006b4c <LL_ADC_IsCalibrationOnGoing>:
- {
- 8006b4c: b480 push {r7}
- 8006b4e: b083 sub sp, #12
- 8006b50: af00 add r7, sp, #0
- 8006b52: 6078 str r0, [r7, #4]
- return ((READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL)) ? 1UL : 0UL);
- 8006b54: 687b ldr r3, [r7, #4]
- 8006b56: 689b ldr r3, [r3, #8]
- 8006b58: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
- 8006b5c: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
- 8006b60: d101 bne.n 8006b66 <LL_ADC_IsCalibrationOnGoing+0x1a>
- 8006b62: 2301 movs r3, #1
- 8006b64: e000 b.n 8006b68 <LL_ADC_IsCalibrationOnGoing+0x1c>
- 8006b66: 2300 movs r3, #0
- }
- 8006b68: 4618 mov r0, r3
- 8006b6a: 370c adds r7, #12
- 8006b6c: 46bd mov sp, r7
- 8006b6e: f85d 7b04 ldr.w r7, [sp], #4
- 8006b72: 4770 bx lr
- 08006b74 <LL_ADC_REG_IsConversionOngoing>:
- {
- 8006b74: b480 push {r7}
- 8006b76: b083 sub sp, #12
- 8006b78: af00 add r7, sp, #0
- 8006b7a: 6078 str r0, [r7, #4]
- return ((READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART)) ? 1UL : 0UL);
- 8006b7c: 687b ldr r3, [r7, #4]
- 8006b7e: 689b ldr r3, [r3, #8]
- 8006b80: f003 0304 and.w r3, r3, #4
- 8006b84: 2b04 cmp r3, #4
- 8006b86: d101 bne.n 8006b8c <LL_ADC_REG_IsConversionOngoing+0x18>
- 8006b88: 2301 movs r3, #1
- 8006b8a: e000 b.n 8006b8e <LL_ADC_REG_IsConversionOngoing+0x1a>
- 8006b8c: 2300 movs r3, #0
- }
- 8006b8e: 4618 mov r0, r3
- 8006b90: 370c adds r7, #12
- 8006b92: 46bd mov sp, r7
- 8006b94: f85d 7b04 ldr.w r7, [sp], #4
- 8006b98: 4770 bx lr
- ...
- 08006b9c <HAL_ADCEx_Calibration_Start>:
- * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
- * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc, uint32_t CalibrationMode, uint32_t SingleDiff)
- {
- 8006b9c: b580 push {r7, lr}
- 8006b9e: b086 sub sp, #24
- 8006ba0: af00 add r7, sp, #0
- 8006ba2: 60f8 str r0, [r7, #12]
- 8006ba4: 60b9 str r1, [r7, #8]
- 8006ba6: 607a str r2, [r7, #4]
- HAL_StatusTypeDef tmp_hal_status;
- __IO uint32_t wait_loop_index = 0UL;
- 8006ba8: 2300 movs r3, #0
- 8006baa: 613b str r3, [r7, #16]
- /* Check the parameters */
- assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
- assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
- /* Process locked */
- __HAL_LOCK(hadc);
- 8006bac: 68fb ldr r3, [r7, #12]
- 8006bae: f893 3050 ldrb.w r3, [r3, #80] @ 0x50
- 8006bb2: 2b01 cmp r3, #1
- 8006bb4: d101 bne.n 8006bba <HAL_ADCEx_Calibration_Start+0x1e>
- 8006bb6: 2302 movs r3, #2
- 8006bb8: e04c b.n 8006c54 <HAL_ADCEx_Calibration_Start+0xb8>
- 8006bba: 68fb ldr r3, [r7, #12]
- 8006bbc: 2201 movs r2, #1
- 8006bbe: f883 2050 strb.w r2, [r3, #80] @ 0x50
- /* Calibration prerequisite: ADC must be disabled. */
- /* Disable the ADC (if not already disabled) */
- tmp_hal_status = ADC_Disable(hadc);
- 8006bc2: 68f8 ldr r0, [r7, #12]
- 8006bc4: f7ff fd90 bl 80066e8 <ADC_Disable>
- 8006bc8: 4603 mov r3, r0
- 8006bca: 75fb strb r3, [r7, #23]
- /* Check if ADC is effectively disabled */
- if (tmp_hal_status == HAL_OK)
- 8006bcc: 7dfb ldrb r3, [r7, #23]
- 8006bce: 2b00 cmp r3, #0
- 8006bd0: d135 bne.n 8006c3e <HAL_ADCEx_Calibration_Start+0xa2>
- {
- /* Set ADC state */
- ADC_STATE_CLR_SET(hadc->State,
- 8006bd2: 68fb ldr r3, [r7, #12]
- 8006bd4: 6d5a ldr r2, [r3, #84] @ 0x54
- 8006bd6: 4b21 ldr r3, [pc, #132] @ (8006c5c <HAL_ADCEx_Calibration_Start+0xc0>)
- 8006bd8: 4013 ands r3, r2
- 8006bda: f043 0202 orr.w r2, r3, #2
- 8006bde: 68fb ldr r3, [r7, #12]
- 8006be0: 655a str r2, [r3, #84] @ 0x54
- HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
- HAL_ADC_STATE_BUSY_INTERNAL);
- /* Start ADC calibration in mode single-ended or differential */
- LL_ADC_StartCalibration(hadc->Instance, CalibrationMode, SingleDiff);
- 8006be2: 68fb ldr r3, [r7, #12]
- 8006be4: 681b ldr r3, [r3, #0]
- 8006be6: 687a ldr r2, [r7, #4]
- 8006be8: 68b9 ldr r1, [r7, #8]
- 8006bea: 4618 mov r0, r3
- 8006bec: f7ff ff90 bl 8006b10 <LL_ADC_StartCalibration>
- /* Wait for calibration completion */
- while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL)
- 8006bf0: e014 b.n 8006c1c <HAL_ADCEx_Calibration_Start+0x80>
- {
- wait_loop_index++;
- 8006bf2: 693b ldr r3, [r7, #16]
- 8006bf4: 3301 adds r3, #1
- 8006bf6: 613b str r3, [r7, #16]
- if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT)
- 8006bf8: 693b ldr r3, [r7, #16]
- 8006bfa: 4a19 ldr r2, [pc, #100] @ (8006c60 <HAL_ADCEx_Calibration_Start+0xc4>)
- 8006bfc: 4293 cmp r3, r2
- 8006bfe: d30d bcc.n 8006c1c <HAL_ADCEx_Calibration_Start+0x80>
- {
- /* Update ADC state machine to error */
- ADC_STATE_CLR_SET(hadc->State,
- 8006c00: 68fb ldr r3, [r7, #12]
- 8006c02: 6d5b ldr r3, [r3, #84] @ 0x54
- 8006c04: f023 0312 bic.w r3, r3, #18
- 8006c08: f043 0210 orr.w r2, r3, #16
- 8006c0c: 68fb ldr r3, [r7, #12]
- 8006c0e: 655a str r2, [r3, #84] @ 0x54
- HAL_ADC_STATE_BUSY_INTERNAL,
- HAL_ADC_STATE_ERROR_INTERNAL);
- /* Process unlocked */
- __HAL_UNLOCK(hadc);
- 8006c10: 68fb ldr r3, [r7, #12]
- 8006c12: 2200 movs r2, #0
- 8006c14: f883 2050 strb.w r2, [r3, #80] @ 0x50
- return HAL_ERROR;
- 8006c18: 2301 movs r3, #1
- 8006c1a: e01b b.n 8006c54 <HAL_ADCEx_Calibration_Start+0xb8>
- while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL)
- 8006c1c: 68fb ldr r3, [r7, #12]
- 8006c1e: 681b ldr r3, [r3, #0]
- 8006c20: 4618 mov r0, r3
- 8006c22: f7ff ff93 bl 8006b4c <LL_ADC_IsCalibrationOnGoing>
- 8006c26: 4603 mov r3, r0
- 8006c28: 2b00 cmp r3, #0
- 8006c2a: d1e2 bne.n 8006bf2 <HAL_ADCEx_Calibration_Start+0x56>
- }
- }
- /* Set ADC state */
- ADC_STATE_CLR_SET(hadc->State,
- 8006c2c: 68fb ldr r3, [r7, #12]
- 8006c2e: 6d5b ldr r3, [r3, #84] @ 0x54
- 8006c30: f023 0303 bic.w r3, r3, #3
- 8006c34: f043 0201 orr.w r2, r3, #1
- 8006c38: 68fb ldr r3, [r7, #12]
- 8006c3a: 655a str r2, [r3, #84] @ 0x54
- 8006c3c: e005 b.n 8006c4a <HAL_ADCEx_Calibration_Start+0xae>
- HAL_ADC_STATE_BUSY_INTERNAL,
- HAL_ADC_STATE_READY);
- }
- else
- {
- SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
- 8006c3e: 68fb ldr r3, [r7, #12]
- 8006c40: 6d5b ldr r3, [r3, #84] @ 0x54
- 8006c42: f043 0210 orr.w r2, r3, #16
- 8006c46: 68fb ldr r3, [r7, #12]
- 8006c48: 655a str r2, [r3, #84] @ 0x54
- /* Note: No need to update variable "tmp_hal_status" here: already set */
- /* to state "HAL_ERROR" by function disabling the ADC. */
- }
- /* Process unlocked */
- __HAL_UNLOCK(hadc);
- 8006c4a: 68fb ldr r3, [r7, #12]
- 8006c4c: 2200 movs r2, #0
- 8006c4e: f883 2050 strb.w r2, [r3, #80] @ 0x50
- /* Return function status */
- return tmp_hal_status;
- 8006c52: 7dfb ldrb r3, [r7, #23]
- }
- 8006c54: 4618 mov r0, r3
- 8006c56: 3718 adds r7, #24
- 8006c58: 46bd mov sp, r7
- 8006c5a: bd80 pop {r7, pc}
- 8006c5c: ffffeefd .word 0xffffeefd
- 8006c60: 25c3f800 .word 0x25c3f800
- 08006c64 <HAL_ADCEx_MultiModeConfigChannel>:
- * @param hadc Master ADC handle
- * @param multimode Structure of ADC multimode configuration
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode)
- {
- 8006c64: b590 push {r4, r7, lr}
- 8006c66: b09f sub sp, #124 @ 0x7c
- 8006c68: af00 add r7, sp, #0
- 8006c6a: 6078 str r0, [r7, #4]
- 8006c6c: 6039 str r1, [r7, #0]
- HAL_StatusTypeDef tmp_hal_status = HAL_OK;
- 8006c6e: 2300 movs r3, #0
- 8006c70: f887 3077 strb.w r3, [r7, #119] @ 0x77
- assert_param(IS_ADC_DUAL_DATA_MODE(multimode->DualModeData));
- assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
- }
- /* Process locked */
- __HAL_LOCK(hadc);
- 8006c74: 687b ldr r3, [r7, #4]
- 8006c76: f893 3050 ldrb.w r3, [r3, #80] @ 0x50
- 8006c7a: 2b01 cmp r3, #1
- 8006c7c: d101 bne.n 8006c82 <HAL_ADCEx_MultiModeConfigChannel+0x1e>
- 8006c7e: 2302 movs r3, #2
- 8006c80: e0be b.n 8006e00 <HAL_ADCEx_MultiModeConfigChannel+0x19c>
- 8006c82: 687b ldr r3, [r7, #4]
- 8006c84: 2201 movs r2, #1
- 8006c86: f883 2050 strb.w r2, [r3, #80] @ 0x50
- tmphadcSlave.State = HAL_ADC_STATE_RESET;
- 8006c8a: 2300 movs r3, #0
- 8006c8c: 65fb str r3, [r7, #92] @ 0x5c
- tmphadcSlave.ErrorCode = HAL_ADC_ERROR_NONE;
- 8006c8e: 2300 movs r3, #0
- 8006c90: 663b str r3, [r7, #96] @ 0x60
- ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
- 8006c92: 687b ldr r3, [r7, #4]
- 8006c94: 681b ldr r3, [r3, #0]
- 8006c96: 4a5c ldr r2, [pc, #368] @ (8006e08 <HAL_ADCEx_MultiModeConfigChannel+0x1a4>)
- 8006c98: 4293 cmp r3, r2
- 8006c9a: d102 bne.n 8006ca2 <HAL_ADCEx_MultiModeConfigChannel+0x3e>
- 8006c9c: 4b5b ldr r3, [pc, #364] @ (8006e0c <HAL_ADCEx_MultiModeConfigChannel+0x1a8>)
- 8006c9e: 60bb str r3, [r7, #8]
- 8006ca0: e001 b.n 8006ca6 <HAL_ADCEx_MultiModeConfigChannel+0x42>
- 8006ca2: 2300 movs r3, #0
- 8006ca4: 60bb str r3, [r7, #8]
- if (tmphadcSlave.Instance == NULL)
- 8006ca6: 68bb ldr r3, [r7, #8]
- 8006ca8: 2b00 cmp r3, #0
- 8006caa: d10b bne.n 8006cc4 <HAL_ADCEx_MultiModeConfigChannel+0x60>
- {
- /* Update ADC state machine to error */
- SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
- 8006cac: 687b ldr r3, [r7, #4]
- 8006cae: 6d5b ldr r3, [r3, #84] @ 0x54
- 8006cb0: f043 0220 orr.w r2, r3, #32
- 8006cb4: 687b ldr r3, [r7, #4]
- 8006cb6: 655a str r2, [r3, #84] @ 0x54
- /* Process unlocked */
- __HAL_UNLOCK(hadc);
- 8006cb8: 687b ldr r3, [r7, #4]
- 8006cba: 2200 movs r2, #0
- 8006cbc: f883 2050 strb.w r2, [r3, #80] @ 0x50
- return HAL_ERROR;
- 8006cc0: 2301 movs r3, #1
- 8006cc2: e09d b.n 8006e00 <HAL_ADCEx_MultiModeConfigChannel+0x19c>
- /* Parameters update conditioned to ADC state: */
- /* Parameters that can be updated when ADC is disabled or enabled without */
- /* conversion on going on regular group: */
- /* - Multimode DATA Format configuration */
- tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
- 8006cc4: 68bb ldr r3, [r7, #8]
- 8006cc6: 4618 mov r0, r3
- 8006cc8: f7ff ff54 bl 8006b74 <LL_ADC_REG_IsConversionOngoing>
- 8006ccc: 6738 str r0, [r7, #112] @ 0x70
- if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
- 8006cce: 687b ldr r3, [r7, #4]
- 8006cd0: 681b ldr r3, [r3, #0]
- 8006cd2: 4618 mov r0, r3
- 8006cd4: f7ff ff4e bl 8006b74 <LL_ADC_REG_IsConversionOngoing>
- 8006cd8: 4603 mov r3, r0
- 8006cda: 2b00 cmp r3, #0
- 8006cdc: d17f bne.n 8006dde <HAL_ADCEx_MultiModeConfigChannel+0x17a>
- && (tmphadcSlave_conversion_on_going == 0UL))
- 8006cde: 6f3b ldr r3, [r7, #112] @ 0x70
- 8006ce0: 2b00 cmp r3, #0
- 8006ce2: d17c bne.n 8006dde <HAL_ADCEx_MultiModeConfigChannel+0x17a>
- {
- /* Pointer to the common control register */
- tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
- 8006ce4: 687b ldr r3, [r7, #4]
- 8006ce6: 681b ldr r3, [r3, #0]
- 8006ce8: 4a47 ldr r2, [pc, #284] @ (8006e08 <HAL_ADCEx_MultiModeConfigChannel+0x1a4>)
- 8006cea: 4293 cmp r3, r2
- 8006cec: d004 beq.n 8006cf8 <HAL_ADCEx_MultiModeConfigChannel+0x94>
- 8006cee: 687b ldr r3, [r7, #4]
- 8006cf0: 681b ldr r3, [r3, #0]
- 8006cf2: 4a46 ldr r2, [pc, #280] @ (8006e0c <HAL_ADCEx_MultiModeConfigChannel+0x1a8>)
- 8006cf4: 4293 cmp r3, r2
- 8006cf6: d101 bne.n 8006cfc <HAL_ADCEx_MultiModeConfigChannel+0x98>
- 8006cf8: 4b45 ldr r3, [pc, #276] @ (8006e10 <HAL_ADCEx_MultiModeConfigChannel+0x1ac>)
- 8006cfa: e000 b.n 8006cfe <HAL_ADCEx_MultiModeConfigChannel+0x9a>
- 8006cfc: 4b45 ldr r3, [pc, #276] @ (8006e14 <HAL_ADCEx_MultiModeConfigChannel+0x1b0>)
- 8006cfe: 66fb str r3, [r7, #108] @ 0x6c
- /* If multimode is selected, configure all multimode parameters. */
- /* Otherwise, reset multimode parameters (can be used in case of */
- /* transition from multimode to independent mode). */
- if (multimode->Mode != ADC_MODE_INDEPENDENT)
- 8006d00: 683b ldr r3, [r7, #0]
- 8006d02: 681b ldr r3, [r3, #0]
- 8006d04: 2b00 cmp r3, #0
- 8006d06: d039 beq.n 8006d7c <HAL_ADCEx_MultiModeConfigChannel+0x118>
- {
- MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_DAMDF, multimode->DualModeData);
- 8006d08: 6efb ldr r3, [r7, #108] @ 0x6c
- 8006d0a: 689b ldr r3, [r3, #8]
- 8006d0c: f423 4240 bic.w r2, r3, #49152 @ 0xc000
- 8006d10: 683b ldr r3, [r7, #0]
- 8006d12: 685b ldr r3, [r3, #4]
- 8006d14: 431a orrs r2, r3
- 8006d16: 6efb ldr r3, [r7, #108] @ 0x6c
- 8006d18: 609a str r2, [r3, #8]
- /* from 1 to 8 clock cycles for 12 bits */
- /* from 1 to 6 clock cycles for 10 and 8 bits */
- /* If a higher delay is selected, it will be clipped to maximum delay */
- /* range */
- if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
- 8006d1a: 687b ldr r3, [r7, #4]
- 8006d1c: 681b ldr r3, [r3, #0]
- 8006d1e: 4a3a ldr r2, [pc, #232] @ (8006e08 <HAL_ADCEx_MultiModeConfigChannel+0x1a4>)
- 8006d20: 4293 cmp r3, r2
- 8006d22: d004 beq.n 8006d2e <HAL_ADCEx_MultiModeConfigChannel+0xca>
- 8006d24: 687b ldr r3, [r7, #4]
- 8006d26: 681b ldr r3, [r3, #0]
- 8006d28: 4a38 ldr r2, [pc, #224] @ (8006e0c <HAL_ADCEx_MultiModeConfigChannel+0x1a8>)
- 8006d2a: 4293 cmp r3, r2
- 8006d2c: d10e bne.n 8006d4c <HAL_ADCEx_MultiModeConfigChannel+0xe8>
- 8006d2e: 4836 ldr r0, [pc, #216] @ (8006e08 <HAL_ADCEx_MultiModeConfigChannel+0x1a4>)
- 8006d30: f7ff feda bl 8006ae8 <LL_ADC_IsEnabled>
- 8006d34: 4604 mov r4, r0
- 8006d36: 4835 ldr r0, [pc, #212] @ (8006e0c <HAL_ADCEx_MultiModeConfigChannel+0x1a8>)
- 8006d38: f7ff fed6 bl 8006ae8 <LL_ADC_IsEnabled>
- 8006d3c: 4603 mov r3, r0
- 8006d3e: 4323 orrs r3, r4
- 8006d40: 2b00 cmp r3, #0
- 8006d42: bf0c ite eq
- 8006d44: 2301 moveq r3, #1
- 8006d46: 2300 movne r3, #0
- 8006d48: b2db uxtb r3, r3
- 8006d4a: e008 b.n 8006d5e <HAL_ADCEx_MultiModeConfigChannel+0xfa>
- 8006d4c: 4832 ldr r0, [pc, #200] @ (8006e18 <HAL_ADCEx_MultiModeConfigChannel+0x1b4>)
- 8006d4e: f7ff fecb bl 8006ae8 <LL_ADC_IsEnabled>
- 8006d52: 4603 mov r3, r0
- 8006d54: 2b00 cmp r3, #0
- 8006d56: bf0c ite eq
- 8006d58: 2301 moveq r3, #1
- 8006d5a: 2300 movne r3, #0
- 8006d5c: b2db uxtb r3, r3
- 8006d5e: 2b00 cmp r3, #0
- 8006d60: d047 beq.n 8006df2 <HAL_ADCEx_MultiModeConfigChannel+0x18e>
- {
- MODIFY_REG(tmpADC_Common->CCR,
- 8006d62: 6efb ldr r3, [r7, #108] @ 0x6c
- 8006d64: 689a ldr r2, [r3, #8]
- 8006d66: 4b2d ldr r3, [pc, #180] @ (8006e1c <HAL_ADCEx_MultiModeConfigChannel+0x1b8>)
- 8006d68: 4013 ands r3, r2
- 8006d6a: 683a ldr r2, [r7, #0]
- 8006d6c: 6811 ldr r1, [r2, #0]
- 8006d6e: 683a ldr r2, [r7, #0]
- 8006d70: 6892 ldr r2, [r2, #8]
- 8006d72: 430a orrs r2, r1
- 8006d74: 431a orrs r2, r3
- 8006d76: 6efb ldr r3, [r7, #108] @ 0x6c
- 8006d78: 609a str r2, [r3, #8]
- if (multimode->Mode != ADC_MODE_INDEPENDENT)
- 8006d7a: e03a b.n 8006df2 <HAL_ADCEx_MultiModeConfigChannel+0x18e>
- );
- }
- }
- else /* ADC_MODE_INDEPENDENT */
- {
- CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_DAMDF);
- 8006d7c: 6efb ldr r3, [r7, #108] @ 0x6c
- 8006d7e: 689b ldr r3, [r3, #8]
- 8006d80: f423 4240 bic.w r2, r3, #49152 @ 0xc000
- 8006d84: 6efb ldr r3, [r7, #108] @ 0x6c
- 8006d86: 609a str r2, [r3, #8]
- /* Parameters that can be updated only when ADC is disabled: */
- /* - Multimode mode selection */
- /* - Multimode delay */
- if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
- 8006d88: 687b ldr r3, [r7, #4]
- 8006d8a: 681b ldr r3, [r3, #0]
- 8006d8c: 4a1e ldr r2, [pc, #120] @ (8006e08 <HAL_ADCEx_MultiModeConfigChannel+0x1a4>)
- 8006d8e: 4293 cmp r3, r2
- 8006d90: d004 beq.n 8006d9c <HAL_ADCEx_MultiModeConfigChannel+0x138>
- 8006d92: 687b ldr r3, [r7, #4]
- 8006d94: 681b ldr r3, [r3, #0]
- 8006d96: 4a1d ldr r2, [pc, #116] @ (8006e0c <HAL_ADCEx_MultiModeConfigChannel+0x1a8>)
- 8006d98: 4293 cmp r3, r2
- 8006d9a: d10e bne.n 8006dba <HAL_ADCEx_MultiModeConfigChannel+0x156>
- 8006d9c: 481a ldr r0, [pc, #104] @ (8006e08 <HAL_ADCEx_MultiModeConfigChannel+0x1a4>)
- 8006d9e: f7ff fea3 bl 8006ae8 <LL_ADC_IsEnabled>
- 8006da2: 4604 mov r4, r0
- 8006da4: 4819 ldr r0, [pc, #100] @ (8006e0c <HAL_ADCEx_MultiModeConfigChannel+0x1a8>)
- 8006da6: f7ff fe9f bl 8006ae8 <LL_ADC_IsEnabled>
- 8006daa: 4603 mov r3, r0
- 8006dac: 4323 orrs r3, r4
- 8006dae: 2b00 cmp r3, #0
- 8006db0: bf0c ite eq
- 8006db2: 2301 moveq r3, #1
- 8006db4: 2300 movne r3, #0
- 8006db6: b2db uxtb r3, r3
- 8006db8: e008 b.n 8006dcc <HAL_ADCEx_MultiModeConfigChannel+0x168>
- 8006dba: 4817 ldr r0, [pc, #92] @ (8006e18 <HAL_ADCEx_MultiModeConfigChannel+0x1b4>)
- 8006dbc: f7ff fe94 bl 8006ae8 <LL_ADC_IsEnabled>
- 8006dc0: 4603 mov r3, r0
- 8006dc2: 2b00 cmp r3, #0
- 8006dc4: bf0c ite eq
- 8006dc6: 2301 moveq r3, #1
- 8006dc8: 2300 movne r3, #0
- 8006dca: b2db uxtb r3, r3
- 8006dcc: 2b00 cmp r3, #0
- 8006dce: d010 beq.n 8006df2 <HAL_ADCEx_MultiModeConfigChannel+0x18e>
- {
- CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_DUAL | ADC_CCR_DELAY);
- 8006dd0: 6efb ldr r3, [r7, #108] @ 0x6c
- 8006dd2: 689a ldr r2, [r3, #8]
- 8006dd4: 4b11 ldr r3, [pc, #68] @ (8006e1c <HAL_ADCEx_MultiModeConfigChannel+0x1b8>)
- 8006dd6: 4013 ands r3, r2
- 8006dd8: 6efa ldr r2, [r7, #108] @ 0x6c
- 8006dda: 6093 str r3, [r2, #8]
- if (multimode->Mode != ADC_MODE_INDEPENDENT)
- 8006ddc: e009 b.n 8006df2 <HAL_ADCEx_MultiModeConfigChannel+0x18e>
- /* If one of the ADC sharing the same common group is enabled, no update */
- /* could be done on neither of the multimode structure parameters. */
- else
- {
- /* Update ADC state machine to error */
- SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
- 8006dde: 687b ldr r3, [r7, #4]
- 8006de0: 6d5b ldr r3, [r3, #84] @ 0x54
- 8006de2: f043 0220 orr.w r2, r3, #32
- 8006de6: 687b ldr r3, [r7, #4]
- 8006de8: 655a str r2, [r3, #84] @ 0x54
- tmp_hal_status = HAL_ERROR;
- 8006dea: 2301 movs r3, #1
- 8006dec: f887 3077 strb.w r3, [r7, #119] @ 0x77
- 8006df0: e000 b.n 8006df4 <HAL_ADCEx_MultiModeConfigChannel+0x190>
- if (multimode->Mode != ADC_MODE_INDEPENDENT)
- 8006df2: bf00 nop
- }
- /* Process unlocked */
- __HAL_UNLOCK(hadc);
- 8006df4: 687b ldr r3, [r7, #4]
- 8006df6: 2200 movs r2, #0
- 8006df8: f883 2050 strb.w r2, [r3, #80] @ 0x50
- /* Return function status */
- return tmp_hal_status;
- 8006dfc: f897 3077 ldrb.w r3, [r7, #119] @ 0x77
- }
- 8006e00: 4618 mov r0, r3
- 8006e02: 377c adds r7, #124 @ 0x7c
- 8006e04: 46bd mov sp, r7
- 8006e06: bd90 pop {r4, r7, pc}
- 8006e08: 40022000 .word 0x40022000
- 8006e0c: 40022100 .word 0x40022100
- 8006e10: 40022300 .word 0x40022300
- 8006e14: 58026300 .word 0x58026300
- 8006e18: 58026000 .word 0x58026000
- 8006e1c: fffff0e0 .word 0xfffff0e0
- 08006e20 <HAL_COMP_Init>:
- * To unlock the configuration, perform a system reset.
- * @param hcomp COMP handle
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
- {
- 8006e20: b580 push {r7, lr}
- 8006e22: b088 sub sp, #32
- 8006e24: af00 add r7, sp, #0
- 8006e26: 6078 str r0, [r7, #4]
- uint32_t tmp_csr ;
- uint32_t exti_line ;
- uint32_t comp_voltage_scaler_initialized; /* Value "0" is comparator voltage scaler is not initialized */
- __IO uint32_t wait_loop_index = 0UL;
- 8006e28: 2300 movs r3, #0
- 8006e2a: 60fb str r3, [r7, #12]
- HAL_StatusTypeDef status = HAL_OK;
- 8006e2c: 2300 movs r3, #0
- 8006e2e: 77fb strb r3, [r7, #31]
-
- /* Check the COMP handle allocation and lock status */
- if(hcomp == NULL)
- 8006e30: 687b ldr r3, [r7, #4]
- 8006e32: 2b00 cmp r3, #0
- 8006e34: d102 bne.n 8006e3c <HAL_COMP_Init+0x1c>
- {
- status = HAL_ERROR;
- 8006e36: 2301 movs r3, #1
- 8006e38: 77fb strb r3, [r7, #31]
- 8006e3a: e10e b.n 800705a <HAL_COMP_Init+0x23a>
- }
- else if(__HAL_COMP_IS_LOCKED(hcomp))
- 8006e3c: 687b ldr r3, [r7, #4]
- 8006e3e: 681b ldr r3, [r3, #0]
- 8006e40: 681b ldr r3, [r3, #0]
- 8006e42: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
- 8006e46: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
- 8006e4a: d102 bne.n 8006e52 <HAL_COMP_Init+0x32>
- {
- status = HAL_ERROR;
- 8006e4c: 2301 movs r3, #1
- 8006e4e: 77fb strb r3, [r7, #31]
- 8006e50: e103 b.n 800705a <HAL_COMP_Init+0x23a>
- assert_param(IS_COMP_HYSTERESIS(hcomp->Init.Hysteresis));
- assert_param(IS_COMP_BLANKINGSRCE(hcomp->Init.BlankingSrce));
- assert_param(IS_COMP_TRIGGERMODE(hcomp->Init.TriggerMode));
- assert_param(IS_COMP_WINDOWMODE(hcomp->Init.WindowMode));
- if(hcomp->State == HAL_COMP_STATE_RESET)
- 8006e52: 687b ldr r3, [r7, #4]
- 8006e54: f893 3025 ldrb.w r3, [r3, #37] @ 0x25
- 8006e58: b2db uxtb r3, r3
- 8006e5a: 2b00 cmp r3, #0
- 8006e5c: d109 bne.n 8006e72 <HAL_COMP_Init+0x52>
- {
- /* Allocate lock resource and initialize it */
- hcomp->Lock = HAL_UNLOCKED;
- 8006e5e: 687b ldr r3, [r7, #4]
- 8006e60: 2200 movs r2, #0
- 8006e62: f883 2024 strb.w r2, [r3, #36] @ 0x24
-
- /* Set COMP error code to none */
- COMP_CLEAR_ERRORCODE(hcomp);
- 8006e66: 687b ldr r3, [r7, #4]
- 8006e68: 2200 movs r2, #0
- 8006e6a: 629a str r2, [r3, #40] @ 0x28
-
- /* Init the low level hardware */
- hcomp->MspInitCallback(hcomp);
- #else
- /* Init the low level hardware */
- HAL_COMP_MspInit(hcomp);
- 8006e6c: 6878 ldr r0, [r7, #4]
- 8006e6e: f7fc fd35 bl 80038dc <HAL_COMP_MspInit>
- #endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
- }
- /* Memorize voltage scaler state before initialization */
- comp_voltage_scaler_initialized = READ_BIT(hcomp->Instance->CFGR, COMP_CFGRx_SCALEN);
- 8006e72: 687b ldr r3, [r7, #4]
- 8006e74: 681b ldr r3, [r3, #0]
- 8006e76: 681b ldr r3, [r3, #0]
- 8006e78: f003 0304 and.w r3, r3, #4
- 8006e7c: 61bb str r3, [r7, #24]
- /* Set BLANKING bits according to hcomp->Init.BlankingSrce value */
- /* Set HYST bits according to hcomp->Init.Hysteresis value */
- /* Set POLARITY bit according to hcomp->Init.OutputPol value */
- /* Set POWERMODE bits according to hcomp->Init.Mode value */
-
- tmp_csr = (hcomp->Init.InvertingInput | \
- 8006e7e: 687b ldr r3, [r7, #4]
- 8006e80: 691a ldr r2, [r3, #16]
- hcomp->Init.NonInvertingInput | \
- 8006e82: 687b ldr r3, [r7, #4]
- 8006e84: 68db ldr r3, [r3, #12]
- tmp_csr = (hcomp->Init.InvertingInput | \
- 8006e86: 431a orrs r2, r3
- hcomp->Init.BlankingSrce | \
- 8006e88: 687b ldr r3, [r7, #4]
- 8006e8a: 69db ldr r3, [r3, #28]
- hcomp->Init.NonInvertingInput | \
- 8006e8c: 431a orrs r2, r3
- hcomp->Init.Hysteresis | \
- 8006e8e: 687b ldr r3, [r7, #4]
- 8006e90: 695b ldr r3, [r3, #20]
- hcomp->Init.BlankingSrce | \
- 8006e92: 431a orrs r2, r3
- hcomp->Init.OutputPol | \
- 8006e94: 687b ldr r3, [r7, #4]
- 8006e96: 699b ldr r3, [r3, #24]
- hcomp->Init.Hysteresis | \
- 8006e98: 431a orrs r2, r3
- hcomp->Init.Mode );
- 8006e9a: 687b ldr r3, [r7, #4]
- 8006e9c: 689b ldr r3, [r3, #8]
- tmp_csr = (hcomp->Init.InvertingInput | \
- 8006e9e: 4313 orrs r3, r2
- 8006ea0: 617b str r3, [r7, #20]
- COMP_CFGRx_INP2SEL | COMP_CFGRx_WINMODE | COMP_CFGRx_POLARITY | COMP_CFGRx_HYST |
- COMP_CFGRx_BLANKING | COMP_CFGRx_BRGEN | COMP_CFGRx_SCALEN,
- tmp_csr
- );
- #else
- MODIFY_REG(hcomp->Instance->CFGR,
- 8006ea2: 687b ldr r3, [r7, #4]
- 8006ea4: 681b ldr r3, [r3, #0]
- 8006ea6: 681a ldr r2, [r3, #0]
- 8006ea8: 4b6e ldr r3, [pc, #440] @ (8007064 <HAL_COMP_Init+0x244>)
- 8006eaa: 4013 ands r3, r2
- 8006eac: 687a ldr r2, [r7, #4]
- 8006eae: 6812 ldr r2, [r2, #0]
- 8006eb0: 6979 ldr r1, [r7, #20]
- 8006eb2: 430b orrs r3, r1
- 8006eb4: 6013 str r3, [r2, #0]
- #endif
- /* Set window mode */
- /* Note: Window mode bit is located into 1 out of the 2 pairs of COMP */
- /* instances. Therefore, this function can update another COMP */
- /* instance that the one currently selected. */
- if(hcomp->Init.WindowMode == COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON)
- 8006eb6: 687b ldr r3, [r7, #4]
- 8006eb8: 685b ldr r3, [r3, #4]
- 8006eba: 2b10 cmp r3, #16
- 8006ebc: d108 bne.n 8006ed0 <HAL_COMP_Init+0xb0>
- {
- SET_BIT(hcomp->Instance->CFGR, COMP_CFGRx_WINMODE);
- 8006ebe: 687b ldr r3, [r7, #4]
- 8006ec0: 681b ldr r3, [r3, #0]
- 8006ec2: 681a ldr r2, [r3, #0]
- 8006ec4: 687b ldr r3, [r7, #4]
- 8006ec6: 681b ldr r3, [r3, #0]
- 8006ec8: f042 0210 orr.w r2, r2, #16
- 8006ecc: 601a str r2, [r3, #0]
- 8006ece: e007 b.n 8006ee0 <HAL_COMP_Init+0xc0>
- }
- else
- {
- CLEAR_BIT(hcomp->Instance->CFGR, COMP_CFGRx_WINMODE);
- 8006ed0: 687b ldr r3, [r7, #4]
- 8006ed2: 681b ldr r3, [r3, #0]
- 8006ed4: 681a ldr r2, [r3, #0]
- 8006ed6: 687b ldr r3, [r7, #4]
- 8006ed8: 681b ldr r3, [r3, #0]
- 8006eda: f022 0210 bic.w r2, r2, #16
- 8006ede: 601a str r2, [r3, #0]
- }
- /* Delay for COMP scaler bridge voltage stabilization */
- /* Apply the delay if voltage scaler bridge is enabled for the first time */
- if ((READ_BIT(hcomp->Instance->CFGR, COMP_CFGRx_SCALEN) != 0UL) &&
- 8006ee0: 687b ldr r3, [r7, #4]
- 8006ee2: 681b ldr r3, [r3, #0]
- 8006ee4: 681b ldr r3, [r3, #0]
- 8006ee6: f003 0304 and.w r3, r3, #4
- 8006eea: 2b00 cmp r3, #0
- 8006eec: d016 beq.n 8006f1c <HAL_COMP_Init+0xfc>
- 8006eee: 69bb ldr r3, [r7, #24]
- 8006ef0: 2b00 cmp r3, #0
- 8006ef2: d013 beq.n 8006f1c <HAL_COMP_Init+0xfc>
- {
- /* Wait loop initialization and execution */
- /* Note: Variable divided by 2 to compensate partially */
- /* CPU processing cycles.*/
- wait_loop_index = ((COMP_DELAY_VOLTAGE_SCALER_STAB_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL));
- 8006ef4: 4b5c ldr r3, [pc, #368] @ (8007068 <HAL_COMP_Init+0x248>)
- 8006ef6: 681b ldr r3, [r3, #0]
- 8006ef8: 099b lsrs r3, r3, #6
- 8006efa: 4a5c ldr r2, [pc, #368] @ (800706c <HAL_COMP_Init+0x24c>)
- 8006efc: fba2 2303 umull r2, r3, r2, r3
- 8006f00: 099b lsrs r3, r3, #6
- 8006f02: 1c5a adds r2, r3, #1
- 8006f04: 4613 mov r3, r2
- 8006f06: 009b lsls r3, r3, #2
- 8006f08: 4413 add r3, r2
- 8006f0a: 009b lsls r3, r3, #2
- 8006f0c: 60fb str r3, [r7, #12]
- while(wait_loop_index != 0UL)
- 8006f0e: e002 b.n 8006f16 <HAL_COMP_Init+0xf6>
- {
- wait_loop_index --;
- 8006f10: 68fb ldr r3, [r7, #12]
- 8006f12: 3b01 subs r3, #1
- 8006f14: 60fb str r3, [r7, #12]
- while(wait_loop_index != 0UL)
- 8006f16: 68fb ldr r3, [r7, #12]
- 8006f18: 2b00 cmp r3, #0
- 8006f1a: d1f9 bne.n 8006f10 <HAL_COMP_Init+0xf0>
- }
- }
- /* Get the EXTI line corresponding to the selected COMP instance */
- exti_line = COMP_GET_EXTI_LINE(hcomp->Instance);
- 8006f1c: 687b ldr r3, [r7, #4]
- 8006f1e: 681b ldr r3, [r3, #0]
- 8006f20: 4a53 ldr r2, [pc, #332] @ (8007070 <HAL_COMP_Init+0x250>)
- 8006f22: 4293 cmp r3, r2
- 8006f24: d102 bne.n 8006f2c <HAL_COMP_Init+0x10c>
- 8006f26: f44f 1380 mov.w r3, #1048576 @ 0x100000
- 8006f2a: e001 b.n 8006f30 <HAL_COMP_Init+0x110>
- 8006f2c: f44f 1300 mov.w r3, #2097152 @ 0x200000
- 8006f30: 613b str r3, [r7, #16]
-
- /* Manage EXTI settings */
- if((hcomp->Init.TriggerMode & (COMP_EXTI_IT | COMP_EXTI_EVENT)) != 0UL)
- 8006f32: 687b ldr r3, [r7, #4]
- 8006f34: 6a1b ldr r3, [r3, #32]
- 8006f36: f003 0303 and.w r3, r3, #3
- 8006f3a: 2b00 cmp r3, #0
- 8006f3c: d06d beq.n 800701a <HAL_COMP_Init+0x1fa>
- {
- /* Configure EXTI rising edge */
- if((hcomp->Init.TriggerMode & COMP_EXTI_RISING) != 0UL)
- 8006f3e: 687b ldr r3, [r7, #4]
- 8006f40: 6a1b ldr r3, [r3, #32]
- 8006f42: f003 0310 and.w r3, r3, #16
- 8006f46: 2b00 cmp r3, #0
- 8006f48: d008 beq.n 8006f5c <HAL_COMP_Init+0x13c>
- {
- SET_BIT(EXTI->RTSR1, exti_line);
- 8006f4a: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 8006f4e: 681a ldr r2, [r3, #0]
- 8006f50: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000
- 8006f54: 693b ldr r3, [r7, #16]
- 8006f56: 4313 orrs r3, r2
- 8006f58: 600b str r3, [r1, #0]
- 8006f5a: e008 b.n 8006f6e <HAL_COMP_Init+0x14e>
- }
- else
- {
- CLEAR_BIT(EXTI->RTSR1, exti_line);
- 8006f5c: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 8006f60: 681a ldr r2, [r3, #0]
- 8006f62: 693b ldr r3, [r7, #16]
- 8006f64: 43db mvns r3, r3
- 8006f66: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000
- 8006f6a: 4013 ands r3, r2
- 8006f6c: 600b str r3, [r1, #0]
- }
-
- /* Configure EXTI falling edge */
- if((hcomp->Init.TriggerMode & COMP_EXTI_FALLING) != 0UL)
- 8006f6e: 687b ldr r3, [r7, #4]
- 8006f70: 6a1b ldr r3, [r3, #32]
- 8006f72: f003 0320 and.w r3, r3, #32
- 8006f76: 2b00 cmp r3, #0
- 8006f78: d008 beq.n 8006f8c <HAL_COMP_Init+0x16c>
- {
- SET_BIT(EXTI->FTSR1, exti_line);
- 8006f7a: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 8006f7e: 685a ldr r2, [r3, #4]
- 8006f80: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000
- 8006f84: 693b ldr r3, [r7, #16]
- 8006f86: 4313 orrs r3, r2
- 8006f88: 604b str r3, [r1, #4]
- 8006f8a: e008 b.n 8006f9e <HAL_COMP_Init+0x17e>
- }
- else
- {
- CLEAR_BIT(EXTI->FTSR1, exti_line);
- 8006f8c: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 8006f90: 685a ldr r2, [r3, #4]
- 8006f92: 693b ldr r3, [r7, #16]
- 8006f94: 43db mvns r3, r3
- 8006f96: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000
- 8006f9a: 4013 ands r3, r2
- 8006f9c: 604b str r3, [r1, #4]
- }
-
- #if !defined (CORE_CM4)
- /* Clear COMP EXTI pending bit (if any) */
- WRITE_REG(EXTI->PR1, exti_line);
- 8006f9e: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 8006fa2: 693b ldr r3, [r7, #16]
- 8006fa4: f8c2 3088 str.w r3, [r2, #136] @ 0x88
- /* Configure EXTI event mode */
- if((hcomp->Init.TriggerMode & COMP_EXTI_EVENT) != 0UL)
- 8006fa8: 687b ldr r3, [r7, #4]
- 8006faa: 6a1b ldr r3, [r3, #32]
- 8006fac: f003 0302 and.w r3, r3, #2
- 8006fb0: 2b00 cmp r3, #0
- 8006fb2: d00a beq.n 8006fca <HAL_COMP_Init+0x1aa>
- {
- SET_BIT(EXTI->EMR1, exti_line);
- 8006fb4: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 8006fb8: f8d3 2084 ldr.w r2, [r3, #132] @ 0x84
- 8006fbc: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000
- 8006fc0: 693b ldr r3, [r7, #16]
- 8006fc2: 4313 orrs r3, r2
- 8006fc4: f8c1 3084 str.w r3, [r1, #132] @ 0x84
- 8006fc8: e00a b.n 8006fe0 <HAL_COMP_Init+0x1c0>
- }
- else
- {
- CLEAR_BIT(EXTI->EMR1, exti_line);
- 8006fca: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 8006fce: f8d3 2084 ldr.w r2, [r3, #132] @ 0x84
- 8006fd2: 693b ldr r3, [r7, #16]
- 8006fd4: 43db mvns r3, r3
- 8006fd6: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000
- 8006fda: 4013 ands r3, r2
- 8006fdc: f8c1 3084 str.w r3, [r1, #132] @ 0x84
- }
-
- /* Configure EXTI interrupt mode */
- if((hcomp->Init.TriggerMode & COMP_EXTI_IT) != 0UL)
- 8006fe0: 687b ldr r3, [r7, #4]
- 8006fe2: 6a1b ldr r3, [r3, #32]
- 8006fe4: f003 0301 and.w r3, r3, #1
- 8006fe8: 2b00 cmp r3, #0
- 8006fea: d00a beq.n 8007002 <HAL_COMP_Init+0x1e2>
- {
- SET_BIT(EXTI->IMR1, exti_line);
- 8006fec: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 8006ff0: f8d3 2080 ldr.w r2, [r3, #128] @ 0x80
- 8006ff4: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000
- 8006ff8: 693b ldr r3, [r7, #16]
- 8006ffa: 4313 orrs r3, r2
- 8006ffc: f8c1 3080 str.w r3, [r1, #128] @ 0x80
- 8007000: e021 b.n 8007046 <HAL_COMP_Init+0x226>
- }
- else
- {
- CLEAR_BIT(EXTI->IMR1, exti_line);
- 8007002: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 8007006: f8d3 2080 ldr.w r2, [r3, #128] @ 0x80
- 800700a: 693b ldr r3, [r7, #16]
- 800700c: 43db mvns r3, r3
- 800700e: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000
- 8007012: 4013 ands r3, r2
- 8007014: f8c1 3080 str.w r3, [r1, #128] @ 0x80
- 8007018: e015 b.n 8007046 <HAL_COMP_Init+0x226>
- }
- }
- else
- {
- /* Disable EXTI event mode */
- CLEAR_BIT(EXTI->EMR1, exti_line);
- 800701a: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800701e: f8d3 2084 ldr.w r2, [r3, #132] @ 0x84
- 8007022: 693b ldr r3, [r7, #16]
- 8007024: 43db mvns r3, r3
- 8007026: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000
- 800702a: 4013 ands r3, r2
- 800702c: f8c1 3084 str.w r3, [r1, #132] @ 0x84
-
- /* Disable EXTI interrupt mode */
- CLEAR_BIT(EXTI->IMR1, exti_line);
- 8007030: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 8007034: f8d3 2080 ldr.w r2, [r3, #128] @ 0x80
- 8007038: 693b ldr r3, [r7, #16]
- 800703a: 43db mvns r3, r3
- 800703c: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000
- 8007040: 4013 ands r3, r2
- 8007042: f8c1 3080 str.w r3, [r1, #128] @ 0x80
- }
- #endif
- /* Set HAL COMP handle state */
- /* Note: Transition from state reset to state ready, */
- /* otherwise (coming from state ready or busy) no state update. */
- if (hcomp->State == HAL_COMP_STATE_RESET)
- 8007046: 687b ldr r3, [r7, #4]
- 8007048: f893 3025 ldrb.w r3, [r3, #37] @ 0x25
- 800704c: b2db uxtb r3, r3
- 800704e: 2b00 cmp r3, #0
- 8007050: d103 bne.n 800705a <HAL_COMP_Init+0x23a>
- {
-
- hcomp->State = HAL_COMP_STATE_READY;
- 8007052: 687b ldr r3, [r7, #4]
- 8007054: 2201 movs r2, #1
- 8007056: f883 2025 strb.w r2, [r3, #37] @ 0x25
- }
-
- }
-
- return status;
- 800705a: 7ffb ldrb r3, [r7, #31]
- }
- 800705c: 4618 mov r0, r3
- 800705e: 3720 adds r7, #32
- 8007060: 46bd mov sp, r7
- 8007062: bd80 pop {r7, pc}
- 8007064: f0e8cce1 .word 0xf0e8cce1
- 8007068: 24000034 .word 0x24000034
- 800706c: 053e2d63 .word 0x053e2d63
- 8007070: 5800380c .word 0x5800380c
- 08007074 <HAL_COMP_Start>:
- * @brief Start the comparator.
- * @param hcomp COMP handle
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp)
- {
- 8007074: b480 push {r7}
- 8007076: b085 sub sp, #20
- 8007078: af00 add r7, sp, #0
- 800707a: 6078 str r0, [r7, #4]
- __IO uint32_t wait_loop_index = 0UL;
- 800707c: 2300 movs r3, #0
- 800707e: 60bb str r3, [r7, #8]
- HAL_StatusTypeDef status = HAL_OK;
- 8007080: 2300 movs r3, #0
- 8007082: 73fb strb r3, [r7, #15]
-
- /* Check the COMP handle allocation and lock status */
- if(hcomp == NULL)
- 8007084: 687b ldr r3, [r7, #4]
- 8007086: 2b00 cmp r3, #0
- 8007088: d102 bne.n 8007090 <HAL_COMP_Start+0x1c>
- {
- status = HAL_ERROR;
- 800708a: 2301 movs r3, #1
- 800708c: 73fb strb r3, [r7, #15]
- 800708e: e030 b.n 80070f2 <HAL_COMP_Start+0x7e>
- }
- else if(__HAL_COMP_IS_LOCKED(hcomp))
- 8007090: 687b ldr r3, [r7, #4]
- 8007092: 681b ldr r3, [r3, #0]
- 8007094: 681b ldr r3, [r3, #0]
- 8007096: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
- 800709a: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
- 800709e: d102 bne.n 80070a6 <HAL_COMP_Start+0x32>
- {
- status = HAL_ERROR;
- 80070a0: 2301 movs r3, #1
- 80070a2: 73fb strb r3, [r7, #15]
- 80070a4: e025 b.n 80070f2 <HAL_COMP_Start+0x7e>
- else
- {
- /* Check the parameter */
- assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
- if(hcomp->State == HAL_COMP_STATE_READY)
- 80070a6: 687b ldr r3, [r7, #4]
- 80070a8: f893 3025 ldrb.w r3, [r3, #37] @ 0x25
- 80070ac: b2db uxtb r3, r3
- 80070ae: 2b01 cmp r3, #1
- 80070b0: d11d bne.n 80070ee <HAL_COMP_Start+0x7a>
- {
- /* Enable the selected comparator */
- SET_BIT(hcomp->Instance->CFGR, COMP_CFGRx_EN);
- 80070b2: 687b ldr r3, [r7, #4]
- 80070b4: 681b ldr r3, [r3, #0]
- 80070b6: 681a ldr r2, [r3, #0]
- 80070b8: 687b ldr r3, [r7, #4]
- 80070ba: 681b ldr r3, [r3, #0]
- 80070bc: f042 0201 orr.w r2, r2, #1
- 80070c0: 601a str r2, [r3, #0]
- /* Set HAL COMP handle state */
- hcomp->State = HAL_COMP_STATE_BUSY;
- 80070c2: 687b ldr r3, [r7, #4]
- 80070c4: 2202 movs r2, #2
- 80070c6: f883 2025 strb.w r2, [r3, #37] @ 0x25
- /* Delay for COMP startup time */
- /* Wait loop initialization and execution */
- /* Note: Variable divided by 2 to compensate partially */
- /* CPU processing cycles. */
-
- wait_loop_index = ((COMP_DELAY_STARTUP_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL));
- 80070ca: 4b0d ldr r3, [pc, #52] @ (8007100 <HAL_COMP_Start+0x8c>)
- 80070cc: 681b ldr r3, [r3, #0]
- 80070ce: 099b lsrs r3, r3, #6
- 80070d0: 4a0c ldr r2, [pc, #48] @ (8007104 <HAL_COMP_Start+0x90>)
- 80070d2: fba2 2303 umull r2, r3, r2, r3
- 80070d6: 099b lsrs r3, r3, #6
- 80070d8: 3301 adds r3, #1
- 80070da: 00db lsls r3, r3, #3
- 80070dc: 60bb str r3, [r7, #8]
- while(wait_loop_index != 0UL)
- 80070de: e002 b.n 80070e6 <HAL_COMP_Start+0x72>
- {
- wait_loop_index--;
- 80070e0: 68bb ldr r3, [r7, #8]
- 80070e2: 3b01 subs r3, #1
- 80070e4: 60bb str r3, [r7, #8]
- while(wait_loop_index != 0UL)
- 80070e6: 68bb ldr r3, [r7, #8]
- 80070e8: 2b00 cmp r3, #0
- 80070ea: d1f9 bne.n 80070e0 <HAL_COMP_Start+0x6c>
- 80070ec: e001 b.n 80070f2 <HAL_COMP_Start+0x7e>
- }
- }
- else
- {
- status = HAL_ERROR;
- 80070ee: 2301 movs r3, #1
- 80070f0: 73fb strb r3, [r7, #15]
- }
- }
- return status;
- 80070f2: 7bfb ldrb r3, [r7, #15]
- }
- 80070f4: 4618 mov r0, r3
- 80070f6: 3714 adds r7, #20
- 80070f8: 46bd mov sp, r7
- 80070fa: f85d 7b04 ldr.w r7, [sp], #4
- 80070fe: 4770 bx lr
- 8007100: 24000034 .word 0x24000034
- 8007104: 053e2d63 .word 0x053e2d63
- 08007108 <HAL_COMP_GetOutputLevel>:
- * @arg @ref COMP_OUTPUT_LEVEL_LOW
- * @arg @ref COMP_OUTPUT_LEVEL_HIGH
- *
- */
- uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp)
- {
- 8007108: b480 push {r7}
- 800710a: b083 sub sp, #12
- 800710c: af00 add r7, sp, #0
- 800710e: 6078 str r0, [r7, #4]
- /* Check the parameter */
- assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-
- if (hcomp->Instance == COMP1)
- 8007110: 687b ldr r3, [r7, #4]
- 8007112: 681b ldr r3, [r3, #0]
- 8007114: 4a09 ldr r2, [pc, #36] @ (800713c <HAL_COMP_GetOutputLevel+0x34>)
- 8007116: 4293 cmp r3, r2
- 8007118: d104 bne.n 8007124 <HAL_COMP_GetOutputLevel+0x1c>
- {
- return (uint32_t)(READ_BIT(COMP12->SR, COMP_SR_C1VAL));
- 800711a: 4b09 ldr r3, [pc, #36] @ (8007140 <HAL_COMP_GetOutputLevel+0x38>)
- 800711c: 681b ldr r3, [r3, #0]
- 800711e: f003 0301 and.w r3, r3, #1
- 8007122: e004 b.n 800712e <HAL_COMP_GetOutputLevel+0x26>
- }
- else
- {
- return (uint32_t)((READ_BIT(COMP12->SR, COMP_SR_C2VAL))>> 1UL);
- 8007124: 4b06 ldr r3, [pc, #24] @ (8007140 <HAL_COMP_GetOutputLevel+0x38>)
- 8007126: 681b ldr r3, [r3, #0]
- 8007128: 085b lsrs r3, r3, #1
- 800712a: f003 0301 and.w r3, r3, #1
- }
- }
- 800712e: 4618 mov r0, r3
- 8007130: 370c adds r7, #12
- 8007132: 46bd mov sp, r7
- 8007134: f85d 7b04 ldr.w r7, [sp], #4
- 8007138: 4770 bx lr
- 800713a: bf00 nop
- 800713c: 5800380c .word 0x5800380c
- 8007140: 58003800 .word 0x58003800
- 08007144 <__NVIC_SetPriorityGrouping>:
- {
- 8007144: b480 push {r7}
- 8007146: b085 sub sp, #20
- 8007148: af00 add r7, sp, #0
- 800714a: 6078 str r0, [r7, #4]
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- 800714c: 687b ldr r3, [r7, #4]
- 800714e: f003 0307 and.w r3, r3, #7
- 8007152: 60fb str r3, [r7, #12]
- reg_value = SCB->AIRCR; /* read old register configuration */
- 8007154: 4b0b ldr r3, [pc, #44] @ (8007184 <__NVIC_SetPriorityGrouping+0x40>)
- 8007156: 68db ldr r3, [r3, #12]
- 8007158: 60bb str r3, [r7, #8]
- reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
- 800715a: 68ba ldr r2, [r7, #8]
- 800715c: f64f 03ff movw r3, #63743 @ 0xf8ff
- 8007160: 4013 ands r3, r2
- 8007162: 60bb str r3, [r7, #8]
- (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
- 8007164: 68fb ldr r3, [r7, #12]
- 8007166: 021a lsls r2, r3, #8
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- 8007168: 68bb ldr r3, [r7, #8]
- 800716a: 431a orrs r2, r3
- reg_value = (reg_value |
- 800716c: 4b06 ldr r3, [pc, #24] @ (8007188 <__NVIC_SetPriorityGrouping+0x44>)
- 800716e: 4313 orrs r3, r2
- 8007170: 60bb str r3, [r7, #8]
- SCB->AIRCR = reg_value;
- 8007172: 4a04 ldr r2, [pc, #16] @ (8007184 <__NVIC_SetPriorityGrouping+0x40>)
- 8007174: 68bb ldr r3, [r7, #8]
- 8007176: 60d3 str r3, [r2, #12]
- }
- 8007178: bf00 nop
- 800717a: 3714 adds r7, #20
- 800717c: 46bd mov sp, r7
- 800717e: f85d 7b04 ldr.w r7, [sp], #4
- 8007182: 4770 bx lr
- 8007184: e000ed00 .word 0xe000ed00
- 8007188: 05fa0000 .word 0x05fa0000
- 0800718c <__NVIC_GetPriorityGrouping>:
- {
- 800718c: b480 push {r7}
- 800718e: af00 add r7, sp, #0
- return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
- 8007190: 4b04 ldr r3, [pc, #16] @ (80071a4 <__NVIC_GetPriorityGrouping+0x18>)
- 8007192: 68db ldr r3, [r3, #12]
- 8007194: 0a1b lsrs r3, r3, #8
- 8007196: f003 0307 and.w r3, r3, #7
- }
- 800719a: 4618 mov r0, r3
- 800719c: 46bd mov sp, r7
- 800719e: f85d 7b04 ldr.w r7, [sp], #4
- 80071a2: 4770 bx lr
- 80071a4: e000ed00 .word 0xe000ed00
- 080071a8 <__NVIC_EnableIRQ>:
- {
- 80071a8: b480 push {r7}
- 80071aa: b083 sub sp, #12
- 80071ac: af00 add r7, sp, #0
- 80071ae: 4603 mov r3, r0
- 80071b0: 80fb strh r3, [r7, #6]
- if ((int32_t)(IRQn) >= 0)
- 80071b2: f9b7 3006 ldrsh.w r3, [r7, #6]
- 80071b6: 2b00 cmp r3, #0
- 80071b8: db0b blt.n 80071d2 <__NVIC_EnableIRQ+0x2a>
- NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- 80071ba: 88fb ldrh r3, [r7, #6]
- 80071bc: f003 021f and.w r2, r3, #31
- 80071c0: 4907 ldr r1, [pc, #28] @ (80071e0 <__NVIC_EnableIRQ+0x38>)
- 80071c2: f9b7 3006 ldrsh.w r3, [r7, #6]
- 80071c6: 095b lsrs r3, r3, #5
- 80071c8: 2001 movs r0, #1
- 80071ca: fa00 f202 lsl.w r2, r0, r2
- 80071ce: f841 2023 str.w r2, [r1, r3, lsl #2]
- }
- 80071d2: bf00 nop
- 80071d4: 370c adds r7, #12
- 80071d6: 46bd mov sp, r7
- 80071d8: f85d 7b04 ldr.w r7, [sp], #4
- 80071dc: 4770 bx lr
- 80071de: bf00 nop
- 80071e0: e000e100 .word 0xe000e100
- 080071e4 <__NVIC_SetPriority>:
- {
- 80071e4: b480 push {r7}
- 80071e6: b083 sub sp, #12
- 80071e8: af00 add r7, sp, #0
- 80071ea: 4603 mov r3, r0
- 80071ec: 6039 str r1, [r7, #0]
- 80071ee: 80fb strh r3, [r7, #6]
- if ((int32_t)(IRQn) >= 0)
- 80071f0: f9b7 3006 ldrsh.w r3, [r7, #6]
- 80071f4: 2b00 cmp r3, #0
- 80071f6: db0a blt.n 800720e <__NVIC_SetPriority+0x2a>
- NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 80071f8: 683b ldr r3, [r7, #0]
- 80071fa: b2da uxtb r2, r3
- 80071fc: 490c ldr r1, [pc, #48] @ (8007230 <__NVIC_SetPriority+0x4c>)
- 80071fe: f9b7 3006 ldrsh.w r3, [r7, #6]
- 8007202: 0112 lsls r2, r2, #4
- 8007204: b2d2 uxtb r2, r2
- 8007206: 440b add r3, r1
- 8007208: f883 2300 strb.w r2, [r3, #768] @ 0x300
- }
- 800720c: e00a b.n 8007224 <__NVIC_SetPriority+0x40>
- SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 800720e: 683b ldr r3, [r7, #0]
- 8007210: b2da uxtb r2, r3
- 8007212: 4908 ldr r1, [pc, #32] @ (8007234 <__NVIC_SetPriority+0x50>)
- 8007214: 88fb ldrh r3, [r7, #6]
- 8007216: f003 030f and.w r3, r3, #15
- 800721a: 3b04 subs r3, #4
- 800721c: 0112 lsls r2, r2, #4
- 800721e: b2d2 uxtb r2, r2
- 8007220: 440b add r3, r1
- 8007222: 761a strb r2, [r3, #24]
- }
- 8007224: bf00 nop
- 8007226: 370c adds r7, #12
- 8007228: 46bd mov sp, r7
- 800722a: f85d 7b04 ldr.w r7, [sp], #4
- 800722e: 4770 bx lr
- 8007230: e000e100 .word 0xe000e100
- 8007234: e000ed00 .word 0xe000ed00
- 08007238 <NVIC_EncodePriority>:
- {
- 8007238: b480 push {r7}
- 800723a: b089 sub sp, #36 @ 0x24
- 800723c: af00 add r7, sp, #0
- 800723e: 60f8 str r0, [r7, #12]
- 8007240: 60b9 str r1, [r7, #8]
- 8007242: 607a str r2, [r7, #4]
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- 8007244: 68fb ldr r3, [r7, #12]
- 8007246: f003 0307 and.w r3, r3, #7
- 800724a: 61fb str r3, [r7, #28]
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- 800724c: 69fb ldr r3, [r7, #28]
- 800724e: f1c3 0307 rsb r3, r3, #7
- 8007252: 2b04 cmp r3, #4
- 8007254: bf28 it cs
- 8007256: 2304 movcs r3, #4
- 8007258: 61bb str r3, [r7, #24]
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
- 800725a: 69fb ldr r3, [r7, #28]
- 800725c: 3304 adds r3, #4
- 800725e: 2b06 cmp r3, #6
- 8007260: d902 bls.n 8007268 <NVIC_EncodePriority+0x30>
- 8007262: 69fb ldr r3, [r7, #28]
- 8007264: 3b03 subs r3, #3
- 8007266: e000 b.n 800726a <NVIC_EncodePriority+0x32>
- 8007268: 2300 movs r3, #0
- 800726a: 617b str r3, [r7, #20]
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- 800726c: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
- 8007270: 69bb ldr r3, [r7, #24]
- 8007272: fa02 f303 lsl.w r3, r2, r3
- 8007276: 43da mvns r2, r3
- 8007278: 68bb ldr r3, [r7, #8]
- 800727a: 401a ands r2, r3
- 800727c: 697b ldr r3, [r7, #20]
- 800727e: 409a lsls r2, r3
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- 8007280: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
- 8007284: 697b ldr r3, [r7, #20]
- 8007286: fa01 f303 lsl.w r3, r1, r3
- 800728a: 43d9 mvns r1, r3
- 800728c: 687b ldr r3, [r7, #4]
- 800728e: 400b ands r3, r1
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- 8007290: 4313 orrs r3, r2
- }
- 8007292: 4618 mov r0, r3
- 8007294: 3724 adds r7, #36 @ 0x24
- 8007296: 46bd mov sp, r7
- 8007298: f85d 7b04 ldr.w r7, [sp], #4
- 800729c: 4770 bx lr
- 0800729e <HAL_NVIC_SetPriorityGrouping>:
- * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
- * The pending IRQ priority will be managed only by the subpriority.
- * @retval None
- */
- void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
- {
- 800729e: b580 push {r7, lr}
- 80072a0: b082 sub sp, #8
- 80072a2: af00 add r7, sp, #0
- 80072a4: 6078 str r0, [r7, #4]
- /* Check the parameters */
- assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
- /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
- NVIC_SetPriorityGrouping(PriorityGroup);
- 80072a6: 6878 ldr r0, [r7, #4]
- 80072a8: f7ff ff4c bl 8007144 <__NVIC_SetPriorityGrouping>
- }
- 80072ac: bf00 nop
- 80072ae: 3708 adds r7, #8
- 80072b0: 46bd mov sp, r7
- 80072b2: bd80 pop {r7, pc}
- 080072b4 <HAL_NVIC_SetPriority>:
- * This parameter can be a value between 0 and 15
- * A lower priority value indicates a higher priority.
- * @retval None
- */
- void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
- {
- 80072b4: b580 push {r7, lr}
- 80072b6: b086 sub sp, #24
- 80072b8: af00 add r7, sp, #0
- 80072ba: 4603 mov r3, r0
- 80072bc: 60b9 str r1, [r7, #8]
- 80072be: 607a str r2, [r7, #4]
- 80072c0: 81fb strh r3, [r7, #14]
- /* Check the parameters */
- assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
- assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
- prioritygroup = NVIC_GetPriorityGrouping();
- 80072c2: f7ff ff63 bl 800718c <__NVIC_GetPriorityGrouping>
- 80072c6: 6178 str r0, [r7, #20]
- NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
- 80072c8: 687a ldr r2, [r7, #4]
- 80072ca: 68b9 ldr r1, [r7, #8]
- 80072cc: 6978 ldr r0, [r7, #20]
- 80072ce: f7ff ffb3 bl 8007238 <NVIC_EncodePriority>
- 80072d2: 4602 mov r2, r0
- 80072d4: f9b7 300e ldrsh.w r3, [r7, #14]
- 80072d8: 4611 mov r1, r2
- 80072da: 4618 mov r0, r3
- 80072dc: f7ff ff82 bl 80071e4 <__NVIC_SetPriority>
- }
- 80072e0: bf00 nop
- 80072e2: 3718 adds r7, #24
- 80072e4: 46bd mov sp, r7
- 80072e6: bd80 pop {r7, pc}
- 080072e8 <HAL_NVIC_EnableIRQ>:
- * This parameter can be an enumerator of IRQn_Type enumeration
- * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32h7xxxx.h))
- * @retval None
- */
- void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
- {
- 80072e8: b580 push {r7, lr}
- 80072ea: b082 sub sp, #8
- 80072ec: af00 add r7, sp, #0
- 80072ee: 4603 mov r3, r0
- 80072f0: 80fb strh r3, [r7, #6]
- /* Check the parameters */
- assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
- /* Enable interrupt */
- NVIC_EnableIRQ(IRQn);
- 80072f2: f9b7 3006 ldrsh.w r3, [r7, #6]
- 80072f6: 4618 mov r0, r3
- 80072f8: f7ff ff56 bl 80071a8 <__NVIC_EnableIRQ>
- }
- 80072fc: bf00 nop
- 80072fe: 3708 adds r7, #8
- 8007300: 46bd mov sp, r7
- 8007302: bd80 pop {r7, pc}
- 08007304 <HAL_MPU_Disable>:
- /**
- * @brief Disables the MPU
- * @retval None
- */
- void HAL_MPU_Disable(void)
- {
- 8007304: b480 push {r7}
- 8007306: af00 add r7, sp, #0
- __ASM volatile ("dmb 0xF":::"memory");
- 8007308: f3bf 8f5f dmb sy
- }
- 800730c: bf00 nop
- /* Make sure outstanding transfers are done */
- __DMB();
- /* Disable fault exceptions */
- SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
- 800730e: 4b07 ldr r3, [pc, #28] @ (800732c <HAL_MPU_Disable+0x28>)
- 8007310: 6a5b ldr r3, [r3, #36] @ 0x24
- 8007312: 4a06 ldr r2, [pc, #24] @ (800732c <HAL_MPU_Disable+0x28>)
- 8007314: f423 3380 bic.w r3, r3, #65536 @ 0x10000
- 8007318: 6253 str r3, [r2, #36] @ 0x24
- /* Disable the MPU and clear the control register*/
- MPU->CTRL = 0;
- 800731a: 4b05 ldr r3, [pc, #20] @ (8007330 <HAL_MPU_Disable+0x2c>)
- 800731c: 2200 movs r2, #0
- 800731e: 605a str r2, [r3, #4]
- }
- 8007320: bf00 nop
- 8007322: 46bd mov sp, r7
- 8007324: f85d 7b04 ldr.w r7, [sp], #4
- 8007328: 4770 bx lr
- 800732a: bf00 nop
- 800732c: e000ed00 .word 0xe000ed00
- 8007330: e000ed90 .word 0xe000ed90
- 08007334 <HAL_MPU_Enable>:
- * @arg MPU_PRIVILEGED_DEFAULT
- * @arg MPU_HFNMI_PRIVDEF
- * @retval None
- */
- void HAL_MPU_Enable(uint32_t MPU_Control)
- {
- 8007334: b480 push {r7}
- 8007336: b083 sub sp, #12
- 8007338: af00 add r7, sp, #0
- 800733a: 6078 str r0, [r7, #4]
- /* Enable the MPU */
- MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
- 800733c: 4a0b ldr r2, [pc, #44] @ (800736c <HAL_MPU_Enable+0x38>)
- 800733e: 687b ldr r3, [r7, #4]
- 8007340: f043 0301 orr.w r3, r3, #1
- 8007344: 6053 str r3, [r2, #4]
- /* Enable fault exceptions */
- SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
- 8007346: 4b0a ldr r3, [pc, #40] @ (8007370 <HAL_MPU_Enable+0x3c>)
- 8007348: 6a5b ldr r3, [r3, #36] @ 0x24
- 800734a: 4a09 ldr r2, [pc, #36] @ (8007370 <HAL_MPU_Enable+0x3c>)
- 800734c: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 8007350: 6253 str r3, [r2, #36] @ 0x24
- __ASM volatile ("dsb 0xF":::"memory");
- 8007352: f3bf 8f4f dsb sy
- }
- 8007356: bf00 nop
- __ASM volatile ("isb 0xF":::"memory");
- 8007358: f3bf 8f6f isb sy
- }
- 800735c: bf00 nop
- /* Ensure MPU setting take effects */
- __DSB();
- __ISB();
- }
- 800735e: bf00 nop
- 8007360: 370c adds r7, #12
- 8007362: 46bd mov sp, r7
- 8007364: f85d 7b04 ldr.w r7, [sp], #4
- 8007368: 4770 bx lr
- 800736a: bf00 nop
- 800736c: e000ed90 .word 0xe000ed90
- 8007370: e000ed00 .word 0xe000ed00
- 08007374 <HAL_MPU_ConfigRegion>:
- * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains
- * the initialization and configuration information.
- * @retval None
- */
- void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
- {
- 8007374: b480 push {r7}
- 8007376: b083 sub sp, #12
- 8007378: af00 add r7, sp, #0
- 800737a: 6078 str r0, [r7, #4]
- assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
- assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
- assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
- /* Set the Region number */
- MPU->RNR = MPU_Init->Number;
- 800737c: 687b ldr r3, [r7, #4]
- 800737e: 785a ldrb r2, [r3, #1]
- 8007380: 4b1b ldr r3, [pc, #108] @ (80073f0 <HAL_MPU_ConfigRegion+0x7c>)
- 8007382: 609a str r2, [r3, #8]
- /* Disable the Region */
- CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
- 8007384: 4b1a ldr r3, [pc, #104] @ (80073f0 <HAL_MPU_ConfigRegion+0x7c>)
- 8007386: 691b ldr r3, [r3, #16]
- 8007388: 4a19 ldr r2, [pc, #100] @ (80073f0 <HAL_MPU_ConfigRegion+0x7c>)
- 800738a: f023 0301 bic.w r3, r3, #1
- 800738e: 6113 str r3, [r2, #16]
- /* Apply configuration */
- MPU->RBAR = MPU_Init->BaseAddress;
- 8007390: 4a17 ldr r2, [pc, #92] @ (80073f0 <HAL_MPU_ConfigRegion+0x7c>)
- 8007392: 687b ldr r3, [r7, #4]
- 8007394: 685b ldr r3, [r3, #4]
- 8007396: 60d3 str r3, [r2, #12]
- MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
- 8007398: 687b ldr r3, [r7, #4]
- 800739a: 7b1b ldrb r3, [r3, #12]
- 800739c: 071a lsls r2, r3, #28
- ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) |
- 800739e: 687b ldr r3, [r7, #4]
- 80073a0: 7adb ldrb r3, [r3, #11]
- 80073a2: 061b lsls r3, r3, #24
- MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
- 80073a4: 431a orrs r2, r3
- ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) |
- 80073a6: 687b ldr r3, [r7, #4]
- 80073a8: 7a9b ldrb r3, [r3, #10]
- 80073aa: 04db lsls r3, r3, #19
- ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) |
- 80073ac: 431a orrs r2, r3
- ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) |
- 80073ae: 687b ldr r3, [r7, #4]
- 80073b0: 7b5b ldrb r3, [r3, #13]
- 80073b2: 049b lsls r3, r3, #18
- ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) |
- 80073b4: 431a orrs r2, r3
- ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) |
- 80073b6: 687b ldr r3, [r7, #4]
- 80073b8: 7b9b ldrb r3, [r3, #14]
- 80073ba: 045b lsls r3, r3, #17
- ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) |
- 80073bc: 431a orrs r2, r3
- ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) |
- 80073be: 687b ldr r3, [r7, #4]
- 80073c0: 7bdb ldrb r3, [r3, #15]
- 80073c2: 041b lsls r3, r3, #16
- ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) |
- 80073c4: 431a orrs r2, r3
- ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
- 80073c6: 687b ldr r3, [r7, #4]
- 80073c8: 7a5b ldrb r3, [r3, #9]
- 80073ca: 021b lsls r3, r3, #8
- ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) |
- 80073cc: 431a orrs r2, r3
- ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) |
- 80073ce: 687b ldr r3, [r7, #4]
- 80073d0: 7a1b ldrb r3, [r3, #8]
- 80073d2: 005b lsls r3, r3, #1
- ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
- 80073d4: 4313 orrs r3, r2
- ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos);
- 80073d6: 687a ldr r2, [r7, #4]
- 80073d8: 7812 ldrb r2, [r2, #0]
- 80073da: 4611 mov r1, r2
- MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
- 80073dc: 4a04 ldr r2, [pc, #16] @ (80073f0 <HAL_MPU_ConfigRegion+0x7c>)
- ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) |
- 80073de: 430b orrs r3, r1
- MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
- 80073e0: 6113 str r3, [r2, #16]
- }
- 80073e2: bf00 nop
- 80073e4: 370c adds r7, #12
- 80073e6: 46bd mov sp, r7
- 80073e8: f85d 7b04 ldr.w r7, [sp], #4
- 80073ec: 4770 bx lr
- 80073ee: bf00 nop
- 80073f0: e000ed90 .word 0xe000ed90
- 080073f4 <HAL_CRC_Init>:
- * parameters in the CRC_InitTypeDef and create the associated handle.
- * @param hcrc CRC handle
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
- {
- 80073f4: b580 push {r7, lr}
- 80073f6: b082 sub sp, #8
- 80073f8: af00 add r7, sp, #0
- 80073fa: 6078 str r0, [r7, #4]
- /* Check the CRC handle allocation */
- if (hcrc == NULL)
- 80073fc: 687b ldr r3, [r7, #4]
- 80073fe: 2b00 cmp r3, #0
- 8007400: d101 bne.n 8007406 <HAL_CRC_Init+0x12>
- {
- return HAL_ERROR;
- 8007402: 2301 movs r3, #1
- 8007404: e054 b.n 80074b0 <HAL_CRC_Init+0xbc>
- }
- /* Check the parameters */
- assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
- if (hcrc->State == HAL_CRC_STATE_RESET)
- 8007406: 687b ldr r3, [r7, #4]
- 8007408: 7f5b ldrb r3, [r3, #29]
- 800740a: b2db uxtb r3, r3
- 800740c: 2b00 cmp r3, #0
- 800740e: d105 bne.n 800741c <HAL_CRC_Init+0x28>
- {
- /* Allocate lock resource and initialize it */
- hcrc->Lock = HAL_UNLOCKED;
- 8007410: 687b ldr r3, [r7, #4]
- 8007412: 2200 movs r2, #0
- 8007414: 771a strb r2, [r3, #28]
- /* Init the low level hardware */
- HAL_CRC_MspInit(hcrc);
- 8007416: 6878 ldr r0, [r7, #4]
- 8007418: f7fc faa6 bl 8003968 <HAL_CRC_MspInit>
- }
- hcrc->State = HAL_CRC_STATE_BUSY;
- 800741c: 687b ldr r3, [r7, #4]
- 800741e: 2202 movs r2, #2
- 8007420: 775a strb r2, [r3, #29]
- /* check whether or not non-default generating polynomial has been
- * picked up by user */
- assert_param(IS_DEFAULT_POLYNOMIAL(hcrc->Init.DefaultPolynomialUse));
- if (hcrc->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_ENABLE)
- 8007422: 687b ldr r3, [r7, #4]
- 8007424: 791b ldrb r3, [r3, #4]
- 8007426: 2b00 cmp r3, #0
- 8007428: d10c bne.n 8007444 <HAL_CRC_Init+0x50>
- {
- /* initialize peripheral with default generating polynomial */
- WRITE_REG(hcrc->Instance->POL, DEFAULT_CRC32_POLY);
- 800742a: 687b ldr r3, [r7, #4]
- 800742c: 681b ldr r3, [r3, #0]
- 800742e: 4a22 ldr r2, [pc, #136] @ (80074b8 <HAL_CRC_Init+0xc4>)
- 8007430: 615a str r2, [r3, #20]
- MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, CRC_POLYLENGTH_32B);
- 8007432: 687b ldr r3, [r7, #4]
- 8007434: 681b ldr r3, [r3, #0]
- 8007436: 689a ldr r2, [r3, #8]
- 8007438: 687b ldr r3, [r7, #4]
- 800743a: 681b ldr r3, [r3, #0]
- 800743c: f022 0218 bic.w r2, r2, #24
- 8007440: 609a str r2, [r3, #8]
- 8007442: e00c b.n 800745e <HAL_CRC_Init+0x6a>
- }
- else
- {
- /* initialize CRC peripheral with generating polynomial defined by user */
- if (HAL_CRCEx_Polynomial_Set(hcrc, hcrc->Init.GeneratingPolynomial, hcrc->Init.CRCLength) != HAL_OK)
- 8007444: 687b ldr r3, [r7, #4]
- 8007446: 6899 ldr r1, [r3, #8]
- 8007448: 687b ldr r3, [r7, #4]
- 800744a: 68db ldr r3, [r3, #12]
- 800744c: 461a mov r2, r3
- 800744e: 6878 ldr r0, [r7, #4]
- 8007450: f000 f948 bl 80076e4 <HAL_CRCEx_Polynomial_Set>
- 8007454: 4603 mov r3, r0
- 8007456: 2b00 cmp r3, #0
- 8007458: d001 beq.n 800745e <HAL_CRC_Init+0x6a>
- {
- return HAL_ERROR;
- 800745a: 2301 movs r3, #1
- 800745c: e028 b.n 80074b0 <HAL_CRC_Init+0xbc>
- }
- /* check whether or not non-default CRC initial value has been
- * picked up by user */
- assert_param(IS_DEFAULT_INIT_VALUE(hcrc->Init.DefaultInitValueUse));
- if (hcrc->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_ENABLE)
- 800745e: 687b ldr r3, [r7, #4]
- 8007460: 795b ldrb r3, [r3, #5]
- 8007462: 2b00 cmp r3, #0
- 8007464: d105 bne.n 8007472 <HAL_CRC_Init+0x7e>
- {
- WRITE_REG(hcrc->Instance->INIT, DEFAULT_CRC_INITVALUE);
- 8007466: 687b ldr r3, [r7, #4]
- 8007468: 681b ldr r3, [r3, #0]
- 800746a: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
- 800746e: 611a str r2, [r3, #16]
- 8007470: e004 b.n 800747c <HAL_CRC_Init+0x88>
- }
- else
- {
- WRITE_REG(hcrc->Instance->INIT, hcrc->Init.InitValue);
- 8007472: 687b ldr r3, [r7, #4]
- 8007474: 681b ldr r3, [r3, #0]
- 8007476: 687a ldr r2, [r7, #4]
- 8007478: 6912 ldr r2, [r2, #16]
- 800747a: 611a str r2, [r3, #16]
- }
- /* set input data inversion mode */
- assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(hcrc->Init.InputDataInversionMode));
- MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, hcrc->Init.InputDataInversionMode);
- 800747c: 687b ldr r3, [r7, #4]
- 800747e: 681b ldr r3, [r3, #0]
- 8007480: 689b ldr r3, [r3, #8]
- 8007482: f023 0160 bic.w r1, r3, #96 @ 0x60
- 8007486: 687b ldr r3, [r7, #4]
- 8007488: 695a ldr r2, [r3, #20]
- 800748a: 687b ldr r3, [r7, #4]
- 800748c: 681b ldr r3, [r3, #0]
- 800748e: 430a orrs r2, r1
- 8007490: 609a str r2, [r3, #8]
- /* set output data inversion mode */
- assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(hcrc->Init.OutputDataInversionMode));
- MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, hcrc->Init.OutputDataInversionMode);
- 8007492: 687b ldr r3, [r7, #4]
- 8007494: 681b ldr r3, [r3, #0]
- 8007496: 689b ldr r3, [r3, #8]
- 8007498: f023 0180 bic.w r1, r3, #128 @ 0x80
- 800749c: 687b ldr r3, [r7, #4]
- 800749e: 699a ldr r2, [r3, #24]
- 80074a0: 687b ldr r3, [r7, #4]
- 80074a2: 681b ldr r3, [r3, #0]
- 80074a4: 430a orrs r2, r1
- 80074a6: 609a str r2, [r3, #8]
- /* makes sure the input data format (bytes, halfwords or words stream)
- * is properly specified by user */
- assert_param(IS_CRC_INPUTDATA_FORMAT(hcrc->InputDataFormat));
- /* Change CRC peripheral state */
- hcrc->State = HAL_CRC_STATE_READY;
- 80074a8: 687b ldr r3, [r7, #4]
- 80074aa: 2201 movs r2, #1
- 80074ac: 775a strb r2, [r3, #29]
- /* Return function status */
- return HAL_OK;
- 80074ae: 2300 movs r3, #0
- }
- 80074b0: 4618 mov r0, r3
- 80074b2: 3708 adds r7, #8
- 80074b4: 46bd mov sp, r7
- 80074b6: bd80 pop {r7, pc}
- 80074b8: 04c11db7 .word 0x04c11db7
- 080074bc <HAL_CRC_Calculate>:
- * and the API will internally adjust its input data processing based on the
- * handle field hcrc->InputDataFormat.
- * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
- */
- uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
- {
- 80074bc: b580 push {r7, lr}
- 80074be: b086 sub sp, #24
- 80074c0: af00 add r7, sp, #0
- 80074c2: 60f8 str r0, [r7, #12]
- 80074c4: 60b9 str r1, [r7, #8]
- 80074c6: 607a str r2, [r7, #4]
- uint32_t index; /* CRC input data buffer index */
- uint32_t temp = 0U; /* CRC output (read from hcrc->Instance->DR register) */
- 80074c8: 2300 movs r3, #0
- 80074ca: 613b str r3, [r7, #16]
- /* Change CRC peripheral state */
- hcrc->State = HAL_CRC_STATE_BUSY;
- 80074cc: 68fb ldr r3, [r7, #12]
- 80074ce: 2202 movs r2, #2
- 80074d0: 775a strb r2, [r3, #29]
- /* Reset CRC Calculation Unit (hcrc->Instance->INIT is
- * written in hcrc->Instance->DR) */
- __HAL_CRC_DR_RESET(hcrc);
- 80074d2: 68fb ldr r3, [r7, #12]
- 80074d4: 681b ldr r3, [r3, #0]
- 80074d6: 689a ldr r2, [r3, #8]
- 80074d8: 68fb ldr r3, [r7, #12]
- 80074da: 681b ldr r3, [r3, #0]
- 80074dc: f042 0201 orr.w r2, r2, #1
- 80074e0: 609a str r2, [r3, #8]
- switch (hcrc->InputDataFormat)
- 80074e2: 68fb ldr r3, [r7, #12]
- 80074e4: 6a1b ldr r3, [r3, #32]
- 80074e6: 2b03 cmp r3, #3
- 80074e8: d006 beq.n 80074f8 <HAL_CRC_Calculate+0x3c>
- 80074ea: 2b03 cmp r3, #3
- 80074ec: d829 bhi.n 8007542 <HAL_CRC_Calculate+0x86>
- 80074ee: 2b01 cmp r3, #1
- 80074f0: d019 beq.n 8007526 <HAL_CRC_Calculate+0x6a>
- 80074f2: 2b02 cmp r3, #2
- 80074f4: d01e beq.n 8007534 <HAL_CRC_Calculate+0x78>
- /* Specific 16-bit input data handling */
- temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength); /* Derogation MisraC2012 R.11.5 */
- break;
- default:
- break;
- 80074f6: e024 b.n 8007542 <HAL_CRC_Calculate+0x86>
- for (index = 0U; index < BufferLength; index++)
- 80074f8: 2300 movs r3, #0
- 80074fa: 617b str r3, [r7, #20]
- 80074fc: e00a b.n 8007514 <HAL_CRC_Calculate+0x58>
- hcrc->Instance->DR = pBuffer[index];
- 80074fe: 697b ldr r3, [r7, #20]
- 8007500: 009b lsls r3, r3, #2
- 8007502: 68ba ldr r2, [r7, #8]
- 8007504: 441a add r2, r3
- 8007506: 68fb ldr r3, [r7, #12]
- 8007508: 681b ldr r3, [r3, #0]
- 800750a: 6812 ldr r2, [r2, #0]
- 800750c: 601a str r2, [r3, #0]
- for (index = 0U; index < BufferLength; index++)
- 800750e: 697b ldr r3, [r7, #20]
- 8007510: 3301 adds r3, #1
- 8007512: 617b str r3, [r7, #20]
- 8007514: 697a ldr r2, [r7, #20]
- 8007516: 687b ldr r3, [r7, #4]
- 8007518: 429a cmp r2, r3
- 800751a: d3f0 bcc.n 80074fe <HAL_CRC_Calculate+0x42>
- temp = hcrc->Instance->DR;
- 800751c: 68fb ldr r3, [r7, #12]
- 800751e: 681b ldr r3, [r3, #0]
- 8007520: 681b ldr r3, [r3, #0]
- 8007522: 613b str r3, [r7, #16]
- break;
- 8007524: e00e b.n 8007544 <HAL_CRC_Calculate+0x88>
- temp = CRC_Handle_8(hcrc, (uint8_t *)pBuffer, BufferLength);
- 8007526: 687a ldr r2, [r7, #4]
- 8007528: 68b9 ldr r1, [r7, #8]
- 800752a: 68f8 ldr r0, [r7, #12]
- 800752c: f000 f812 bl 8007554 <CRC_Handle_8>
- 8007530: 6138 str r0, [r7, #16]
- break;
- 8007532: e007 b.n 8007544 <HAL_CRC_Calculate+0x88>
- temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength); /* Derogation MisraC2012 R.11.5 */
- 8007534: 687a ldr r2, [r7, #4]
- 8007536: 68b9 ldr r1, [r7, #8]
- 8007538: 68f8 ldr r0, [r7, #12]
- 800753a: f000 f899 bl 8007670 <CRC_Handle_16>
- 800753e: 6138 str r0, [r7, #16]
- break;
- 8007540: e000 b.n 8007544 <HAL_CRC_Calculate+0x88>
- break;
- 8007542: bf00 nop
- }
- /* Change CRC peripheral state */
- hcrc->State = HAL_CRC_STATE_READY;
- 8007544: 68fb ldr r3, [r7, #12]
- 8007546: 2201 movs r2, #1
- 8007548: 775a strb r2, [r3, #29]
- /* Return the CRC computed value */
- return temp;
- 800754a: 693b ldr r3, [r7, #16]
- }
- 800754c: 4618 mov r0, r3
- 800754e: 3718 adds r7, #24
- 8007550: 46bd mov sp, r7
- 8007552: bd80 pop {r7, pc}
- 08007554 <CRC_Handle_8>:
- * @param pBuffer pointer to the input data buffer
- * @param BufferLength input data buffer length
- * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
- */
- static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength)
- {
- 8007554: b480 push {r7}
- 8007556: b089 sub sp, #36 @ 0x24
- 8007558: af00 add r7, sp, #0
- 800755a: 60f8 str r0, [r7, #12]
- 800755c: 60b9 str r1, [r7, #8]
- 800755e: 607a str r2, [r7, #4]
- __IO uint16_t *pReg;
- /* Processing time optimization: 4 bytes are entered in a row with a single word write,
- * last bytes must be carefully fed to the CRC calculator to ensure a correct type
- * handling by the peripheral */
- for (i = 0U; i < (BufferLength / 4U); i++)
- 8007560: 2300 movs r3, #0
- 8007562: 61fb str r3, [r7, #28]
- 8007564: e023 b.n 80075ae <CRC_Handle_8+0x5a>
- {
- hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
- 8007566: 69fb ldr r3, [r7, #28]
- 8007568: 009b lsls r3, r3, #2
- 800756a: 68ba ldr r2, [r7, #8]
- 800756c: 4413 add r3, r2
- 800756e: 781b ldrb r3, [r3, #0]
- 8007570: 061a lsls r2, r3, #24
- ((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
- 8007572: 69fb ldr r3, [r7, #28]
- 8007574: 009b lsls r3, r3, #2
- 8007576: 3301 adds r3, #1
- 8007578: 68b9 ldr r1, [r7, #8]
- 800757a: 440b add r3, r1
- 800757c: 781b ldrb r3, [r3, #0]
- 800757e: 041b lsls r3, r3, #16
- hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
- 8007580: 431a orrs r2, r3
- ((uint32_t)pBuffer[(4U * i) + 2U] << 8U) | \
- 8007582: 69fb ldr r3, [r7, #28]
- 8007584: 009b lsls r3, r3, #2
- 8007586: 3302 adds r3, #2
- 8007588: 68b9 ldr r1, [r7, #8]
- 800758a: 440b add r3, r1
- 800758c: 781b ldrb r3, [r3, #0]
- 800758e: 021b lsls r3, r3, #8
- ((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
- 8007590: 431a orrs r2, r3
- (uint32_t)pBuffer[(4U * i) + 3U];
- 8007592: 69fb ldr r3, [r7, #28]
- 8007594: 009b lsls r3, r3, #2
- 8007596: 3303 adds r3, #3
- 8007598: 68b9 ldr r1, [r7, #8]
- 800759a: 440b add r3, r1
- 800759c: 781b ldrb r3, [r3, #0]
- 800759e: 4619 mov r1, r3
- hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
- 80075a0: 68fb ldr r3, [r7, #12]
- 80075a2: 681b ldr r3, [r3, #0]
- ((uint32_t)pBuffer[(4U * i) + 2U] << 8U) | \
- 80075a4: 430a orrs r2, r1
- hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
- 80075a6: 601a str r2, [r3, #0]
- for (i = 0U; i < (BufferLength / 4U); i++)
- 80075a8: 69fb ldr r3, [r7, #28]
- 80075aa: 3301 adds r3, #1
- 80075ac: 61fb str r3, [r7, #28]
- 80075ae: 687b ldr r3, [r7, #4]
- 80075b0: 089b lsrs r3, r3, #2
- 80075b2: 69fa ldr r2, [r7, #28]
- 80075b4: 429a cmp r2, r3
- 80075b6: d3d6 bcc.n 8007566 <CRC_Handle_8+0x12>
- }
- /* last bytes specific handling */
- if ((BufferLength % 4U) != 0U)
- 80075b8: 687b ldr r3, [r7, #4]
- 80075ba: f003 0303 and.w r3, r3, #3
- 80075be: 2b00 cmp r3, #0
- 80075c0: d04d beq.n 800765e <CRC_Handle_8+0x10a>
- {
- if ((BufferLength % 4U) == 1U)
- 80075c2: 687b ldr r3, [r7, #4]
- 80075c4: f003 0303 and.w r3, r3, #3
- 80075c8: 2b01 cmp r3, #1
- 80075ca: d107 bne.n 80075dc <CRC_Handle_8+0x88>
- {
- *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[4U * i]; /* Derogation MisraC2012 R.11.5 */
- 80075cc: 69fb ldr r3, [r7, #28]
- 80075ce: 009b lsls r3, r3, #2
- 80075d0: 68ba ldr r2, [r7, #8]
- 80075d2: 4413 add r3, r2
- 80075d4: 68fa ldr r2, [r7, #12]
- 80075d6: 6812 ldr r2, [r2, #0]
- 80075d8: 781b ldrb r3, [r3, #0]
- 80075da: 7013 strb r3, [r2, #0]
- }
- if ((BufferLength % 4U) == 2U)
- 80075dc: 687b ldr r3, [r7, #4]
- 80075de: f003 0303 and.w r3, r3, #3
- 80075e2: 2b02 cmp r3, #2
- 80075e4: d116 bne.n 8007614 <CRC_Handle_8+0xc0>
- {
- data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
- 80075e6: 69fb ldr r3, [r7, #28]
- 80075e8: 009b lsls r3, r3, #2
- 80075ea: 68ba ldr r2, [r7, #8]
- 80075ec: 4413 add r3, r2
- 80075ee: 781b ldrb r3, [r3, #0]
- 80075f0: 021b lsls r3, r3, #8
- 80075f2: b21a sxth r2, r3
- 80075f4: 69fb ldr r3, [r7, #28]
- 80075f6: 009b lsls r3, r3, #2
- 80075f8: 3301 adds r3, #1
- 80075fa: 68b9 ldr r1, [r7, #8]
- 80075fc: 440b add r3, r1
- 80075fe: 781b ldrb r3, [r3, #0]
- 8007600: b21b sxth r3, r3
- 8007602: 4313 orrs r3, r2
- 8007604: b21b sxth r3, r3
- 8007606: 837b strh r3, [r7, #26]
- pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR); /* Derogation MisraC2012 R.11.5 */
- 8007608: 68fb ldr r3, [r7, #12]
- 800760a: 681b ldr r3, [r3, #0]
- 800760c: 617b str r3, [r7, #20]
- *pReg = data;
- 800760e: 697b ldr r3, [r7, #20]
- 8007610: 8b7a ldrh r2, [r7, #26]
- 8007612: 801a strh r2, [r3, #0]
- }
- if ((BufferLength % 4U) == 3U)
- 8007614: 687b ldr r3, [r7, #4]
- 8007616: f003 0303 and.w r3, r3, #3
- 800761a: 2b03 cmp r3, #3
- 800761c: d11f bne.n 800765e <CRC_Handle_8+0x10a>
- {
- data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
- 800761e: 69fb ldr r3, [r7, #28]
- 8007620: 009b lsls r3, r3, #2
- 8007622: 68ba ldr r2, [r7, #8]
- 8007624: 4413 add r3, r2
- 8007626: 781b ldrb r3, [r3, #0]
- 8007628: 021b lsls r3, r3, #8
- 800762a: b21a sxth r2, r3
- 800762c: 69fb ldr r3, [r7, #28]
- 800762e: 009b lsls r3, r3, #2
- 8007630: 3301 adds r3, #1
- 8007632: 68b9 ldr r1, [r7, #8]
- 8007634: 440b add r3, r1
- 8007636: 781b ldrb r3, [r3, #0]
- 8007638: b21b sxth r3, r3
- 800763a: 4313 orrs r3, r2
- 800763c: b21b sxth r3, r3
- 800763e: 837b strh r3, [r7, #26]
- pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR); /* Derogation MisraC2012 R.11.5 */
- 8007640: 68fb ldr r3, [r7, #12]
- 8007642: 681b ldr r3, [r3, #0]
- 8007644: 617b str r3, [r7, #20]
- *pReg = data;
- 8007646: 697b ldr r3, [r7, #20]
- 8007648: 8b7a ldrh r2, [r7, #26]
- 800764a: 801a strh r2, [r3, #0]
- *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[(4U * i) + 2U]; /* Derogation MisraC2012 R.11.5 */
- 800764c: 69fb ldr r3, [r7, #28]
- 800764e: 009b lsls r3, r3, #2
- 8007650: 3302 adds r3, #2
- 8007652: 68ba ldr r2, [r7, #8]
- 8007654: 4413 add r3, r2
- 8007656: 68fa ldr r2, [r7, #12]
- 8007658: 6812 ldr r2, [r2, #0]
- 800765a: 781b ldrb r3, [r3, #0]
- 800765c: 7013 strb r3, [r2, #0]
- }
- }
- /* Return the CRC computed value */
- return hcrc->Instance->DR;
- 800765e: 68fb ldr r3, [r7, #12]
- 8007660: 681b ldr r3, [r3, #0]
- 8007662: 681b ldr r3, [r3, #0]
- }
- 8007664: 4618 mov r0, r3
- 8007666: 3724 adds r7, #36 @ 0x24
- 8007668: 46bd mov sp, r7
- 800766a: f85d 7b04 ldr.w r7, [sp], #4
- 800766e: 4770 bx lr
- 08007670 <CRC_Handle_16>:
- * @param pBuffer pointer to the input data buffer
- * @param BufferLength input data buffer length
- * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
- */
- static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength)
- {
- 8007670: b480 push {r7}
- 8007672: b087 sub sp, #28
- 8007674: af00 add r7, sp, #0
- 8007676: 60f8 str r0, [r7, #12]
- 8007678: 60b9 str r1, [r7, #8]
- 800767a: 607a str r2, [r7, #4]
- __IO uint16_t *pReg;
- /* Processing time optimization: 2 HalfWords are entered in a row with a single word write,
- * in case of odd length, last HalfWord must be carefully fed to the CRC calculator to ensure
- * a correct type handling by the peripheral */
- for (i = 0U; i < (BufferLength / 2U); i++)
- 800767c: 2300 movs r3, #0
- 800767e: 617b str r3, [r7, #20]
- 8007680: e013 b.n 80076aa <CRC_Handle_16+0x3a>
- {
- hcrc->Instance->DR = ((uint32_t)pBuffer[2U * i] << 16U) | (uint32_t)pBuffer[(2U * i) + 1U];
- 8007682: 697b ldr r3, [r7, #20]
- 8007684: 009b lsls r3, r3, #2
- 8007686: 68ba ldr r2, [r7, #8]
- 8007688: 4413 add r3, r2
- 800768a: 881b ldrh r3, [r3, #0]
- 800768c: 041a lsls r2, r3, #16
- 800768e: 697b ldr r3, [r7, #20]
- 8007690: 009b lsls r3, r3, #2
- 8007692: 3302 adds r3, #2
- 8007694: 68b9 ldr r1, [r7, #8]
- 8007696: 440b add r3, r1
- 8007698: 881b ldrh r3, [r3, #0]
- 800769a: 4619 mov r1, r3
- 800769c: 68fb ldr r3, [r7, #12]
- 800769e: 681b ldr r3, [r3, #0]
- 80076a0: 430a orrs r2, r1
- 80076a2: 601a str r2, [r3, #0]
- for (i = 0U; i < (BufferLength / 2U); i++)
- 80076a4: 697b ldr r3, [r7, #20]
- 80076a6: 3301 adds r3, #1
- 80076a8: 617b str r3, [r7, #20]
- 80076aa: 687b ldr r3, [r7, #4]
- 80076ac: 085b lsrs r3, r3, #1
- 80076ae: 697a ldr r2, [r7, #20]
- 80076b0: 429a cmp r2, r3
- 80076b2: d3e6 bcc.n 8007682 <CRC_Handle_16+0x12>
- }
- if ((BufferLength % 2U) != 0U)
- 80076b4: 687b ldr r3, [r7, #4]
- 80076b6: f003 0301 and.w r3, r3, #1
- 80076ba: 2b00 cmp r3, #0
- 80076bc: d009 beq.n 80076d2 <CRC_Handle_16+0x62>
- {
- pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR); /* Derogation MisraC2012 R.11.5 */
- 80076be: 68fb ldr r3, [r7, #12]
- 80076c0: 681b ldr r3, [r3, #0]
- 80076c2: 613b str r3, [r7, #16]
- *pReg = pBuffer[2U * i];
- 80076c4: 697b ldr r3, [r7, #20]
- 80076c6: 009b lsls r3, r3, #2
- 80076c8: 68ba ldr r2, [r7, #8]
- 80076ca: 4413 add r3, r2
- 80076cc: 881a ldrh r2, [r3, #0]
- 80076ce: 693b ldr r3, [r7, #16]
- 80076d0: 801a strh r2, [r3, #0]
- }
- /* Return the CRC computed value */
- return hcrc->Instance->DR;
- 80076d2: 68fb ldr r3, [r7, #12]
- 80076d4: 681b ldr r3, [r3, #0]
- 80076d6: 681b ldr r3, [r3, #0]
- }
- 80076d8: 4618 mov r0, r3
- 80076da: 371c adds r7, #28
- 80076dc: 46bd mov sp, r7
- 80076de: f85d 7b04 ldr.w r7, [sp], #4
- 80076e2: 4770 bx lr
- 080076e4 <HAL_CRCEx_Polynomial_Set>:
- * @arg @ref CRC_POLYLENGTH_16B 16-bit long CRC (generating polynomial of degree 16)
- * @arg @ref CRC_POLYLENGTH_32B 32-bit long CRC (generating polynomial of degree 32)
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength)
- {
- 80076e4: b480 push {r7}
- 80076e6: b087 sub sp, #28
- 80076e8: af00 add r7, sp, #0
- 80076ea: 60f8 str r0, [r7, #12]
- 80076ec: 60b9 str r1, [r7, #8]
- 80076ee: 607a str r2, [r7, #4]
- HAL_StatusTypeDef status = HAL_OK;
- 80076f0: 2300 movs r3, #0
- 80076f2: 75fb strb r3, [r7, #23]
- uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */
- 80076f4: 231f movs r3, #31
- 80076f6: 613b str r3, [r7, #16]
- /* Check the parameters */
- assert_param(IS_CRC_POL_LENGTH(PolyLength));
- /* Ensure that the generating polynomial is odd */
- if ((Pol & (uint32_t)(0x1U)) == 0U)
- 80076f8: 68bb ldr r3, [r7, #8]
- 80076fa: f003 0301 and.w r3, r3, #1
- 80076fe: 2b00 cmp r3, #0
- 8007700: d102 bne.n 8007708 <HAL_CRCEx_Polynomial_Set+0x24>
- {
- status = HAL_ERROR;
- 8007702: 2301 movs r3, #1
- 8007704: 75fb strb r3, [r7, #23]
- 8007706: e063 b.n 80077d0 <HAL_CRCEx_Polynomial_Set+0xec>
- * definition. HAL_ERROR is reported if Pol degree is
- * larger than that indicated by PolyLength.
- * Look for MSB position: msb will contain the degree of
- * the second to the largest polynomial member. E.g., for
- * X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */
- while ((msb-- > 0U) && ((Pol & ((uint32_t)(0x1U) << (msb & 0x1FU))) == 0U))
- 8007708: bf00 nop
- 800770a: 693b ldr r3, [r7, #16]
- 800770c: 1e5a subs r2, r3, #1
- 800770e: 613a str r2, [r7, #16]
- 8007710: 2b00 cmp r3, #0
- 8007712: d009 beq.n 8007728 <HAL_CRCEx_Polynomial_Set+0x44>
- 8007714: 693b ldr r3, [r7, #16]
- 8007716: f003 031f and.w r3, r3, #31
- 800771a: 68ba ldr r2, [r7, #8]
- 800771c: fa22 f303 lsr.w r3, r2, r3
- 8007720: f003 0301 and.w r3, r3, #1
- 8007724: 2b00 cmp r3, #0
- 8007726: d0f0 beq.n 800770a <HAL_CRCEx_Polynomial_Set+0x26>
- {
- }
- switch (PolyLength)
- 8007728: 687b ldr r3, [r7, #4]
- 800772a: 2b18 cmp r3, #24
- 800772c: d846 bhi.n 80077bc <HAL_CRCEx_Polynomial_Set+0xd8>
- 800772e: a201 add r2, pc, #4 @ (adr r2, 8007734 <HAL_CRCEx_Polynomial_Set+0x50>)
- 8007730: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8007734: 080077c3 .word 0x080077c3
- 8007738: 080077bd .word 0x080077bd
- 800773c: 080077bd .word 0x080077bd
- 8007740: 080077bd .word 0x080077bd
- 8007744: 080077bd .word 0x080077bd
- 8007748: 080077bd .word 0x080077bd
- 800774c: 080077bd .word 0x080077bd
- 8007750: 080077bd .word 0x080077bd
- 8007754: 080077b1 .word 0x080077b1
- 8007758: 080077bd .word 0x080077bd
- 800775c: 080077bd .word 0x080077bd
- 8007760: 080077bd .word 0x080077bd
- 8007764: 080077bd .word 0x080077bd
- 8007768: 080077bd .word 0x080077bd
- 800776c: 080077bd .word 0x080077bd
- 8007770: 080077bd .word 0x080077bd
- 8007774: 080077a5 .word 0x080077a5
- 8007778: 080077bd .word 0x080077bd
- 800777c: 080077bd .word 0x080077bd
- 8007780: 080077bd .word 0x080077bd
- 8007784: 080077bd .word 0x080077bd
- 8007788: 080077bd .word 0x080077bd
- 800778c: 080077bd .word 0x080077bd
- 8007790: 080077bd .word 0x080077bd
- 8007794: 08007799 .word 0x08007799
- {
- case CRC_POLYLENGTH_7B:
- if (msb >= HAL_CRC_LENGTH_7B)
- 8007798: 693b ldr r3, [r7, #16]
- 800779a: 2b06 cmp r3, #6
- 800779c: d913 bls.n 80077c6 <HAL_CRCEx_Polynomial_Set+0xe2>
- {
- status = HAL_ERROR;
- 800779e: 2301 movs r3, #1
- 80077a0: 75fb strb r3, [r7, #23]
- }
- break;
- 80077a2: e010 b.n 80077c6 <HAL_CRCEx_Polynomial_Set+0xe2>
- case CRC_POLYLENGTH_8B:
- if (msb >= HAL_CRC_LENGTH_8B)
- 80077a4: 693b ldr r3, [r7, #16]
- 80077a6: 2b07 cmp r3, #7
- 80077a8: d90f bls.n 80077ca <HAL_CRCEx_Polynomial_Set+0xe6>
- {
- status = HAL_ERROR;
- 80077aa: 2301 movs r3, #1
- 80077ac: 75fb strb r3, [r7, #23]
- }
- break;
- 80077ae: e00c b.n 80077ca <HAL_CRCEx_Polynomial_Set+0xe6>
- case CRC_POLYLENGTH_16B:
- if (msb >= HAL_CRC_LENGTH_16B)
- 80077b0: 693b ldr r3, [r7, #16]
- 80077b2: 2b0f cmp r3, #15
- 80077b4: d90b bls.n 80077ce <HAL_CRCEx_Polynomial_Set+0xea>
- {
- status = HAL_ERROR;
- 80077b6: 2301 movs r3, #1
- 80077b8: 75fb strb r3, [r7, #23]
- }
- break;
- 80077ba: e008 b.n 80077ce <HAL_CRCEx_Polynomial_Set+0xea>
- case CRC_POLYLENGTH_32B:
- /* no polynomial definition vs. polynomial length issue possible */
- break;
- default:
- status = HAL_ERROR;
- 80077bc: 2301 movs r3, #1
- 80077be: 75fb strb r3, [r7, #23]
- break;
- 80077c0: e006 b.n 80077d0 <HAL_CRCEx_Polynomial_Set+0xec>
- break;
- 80077c2: bf00 nop
- 80077c4: e004 b.n 80077d0 <HAL_CRCEx_Polynomial_Set+0xec>
- break;
- 80077c6: bf00 nop
- 80077c8: e002 b.n 80077d0 <HAL_CRCEx_Polynomial_Set+0xec>
- break;
- 80077ca: bf00 nop
- 80077cc: e000 b.n 80077d0 <HAL_CRCEx_Polynomial_Set+0xec>
- break;
- 80077ce: bf00 nop
- }
- }
- if (status == HAL_OK)
- 80077d0: 7dfb ldrb r3, [r7, #23]
- 80077d2: 2b00 cmp r3, #0
- 80077d4: d10d bne.n 80077f2 <HAL_CRCEx_Polynomial_Set+0x10e>
- {
- /* set generating polynomial */
- WRITE_REG(hcrc->Instance->POL, Pol);
- 80077d6: 68fb ldr r3, [r7, #12]
- 80077d8: 681b ldr r3, [r3, #0]
- 80077da: 68ba ldr r2, [r7, #8]
- 80077dc: 615a str r2, [r3, #20]
- /* set generating polynomial size */
- MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength);
- 80077de: 68fb ldr r3, [r7, #12]
- 80077e0: 681b ldr r3, [r3, #0]
- 80077e2: 689b ldr r3, [r3, #8]
- 80077e4: f023 0118 bic.w r1, r3, #24
- 80077e8: 68fb ldr r3, [r7, #12]
- 80077ea: 681b ldr r3, [r3, #0]
- 80077ec: 687a ldr r2, [r7, #4]
- 80077ee: 430a orrs r2, r1
- 80077f0: 609a str r2, [r3, #8]
- }
- /* Return function status */
- return status;
- 80077f2: 7dfb ldrb r3, [r7, #23]
- }
- 80077f4: 4618 mov r0, r3
- 80077f6: 371c adds r7, #28
- 80077f8: 46bd mov sp, r7
- 80077fa: f85d 7b04 ldr.w r7, [sp], #4
- 80077fe: 4770 bx lr
- 08007800 <HAL_DAC_Init>:
- * @param hdac pointer to a DAC_HandleTypeDef structure that contains
- * the configuration information for the specified DAC.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
- {
- 8007800: b580 push {r7, lr}
- 8007802: b082 sub sp, #8
- 8007804: af00 add r7, sp, #0
- 8007806: 6078 str r0, [r7, #4]
- /* Check the DAC peripheral handle */
- if (hdac == NULL)
- 8007808: 687b ldr r3, [r7, #4]
- 800780a: 2b00 cmp r3, #0
- 800780c: d101 bne.n 8007812 <HAL_DAC_Init+0x12>
- {
- return HAL_ERROR;
- 800780e: 2301 movs r3, #1
- 8007810: e014 b.n 800783c <HAL_DAC_Init+0x3c>
- }
- /* Check the parameters */
- assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
- if (hdac->State == HAL_DAC_STATE_RESET)
- 8007812: 687b ldr r3, [r7, #4]
- 8007814: 791b ldrb r3, [r3, #4]
- 8007816: b2db uxtb r3, r3
- 8007818: 2b00 cmp r3, #0
- 800781a: d105 bne.n 8007828 <HAL_DAC_Init+0x28>
- hdac->MspInitCallback = HAL_DAC_MspInit;
- }
- #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
- /* Allocate lock resource and initialize it */
- hdac->Lock = HAL_UNLOCKED;
- 800781c: 687b ldr r3, [r7, #4]
- 800781e: 2200 movs r2, #0
- 8007820: 715a strb r2, [r3, #5]
- #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
- /* Init the low level hardware */
- hdac->MspInitCallback(hdac);
- #else
- /* Init the low level hardware */
- HAL_DAC_MspInit(hdac);
- 8007822: 6878 ldr r0, [r7, #4]
- 8007824: f7fc f8c2 bl 80039ac <HAL_DAC_MspInit>
- #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
- }
- /* Initialize the DAC state*/
- hdac->State = HAL_DAC_STATE_BUSY;
- 8007828: 687b ldr r3, [r7, #4]
- 800782a: 2202 movs r2, #2
- 800782c: 711a strb r2, [r3, #4]
- /* Set DAC error code to none */
- hdac->ErrorCode = HAL_DAC_ERROR_NONE;
- 800782e: 687b ldr r3, [r7, #4]
- 8007830: 2200 movs r2, #0
- 8007832: 611a str r2, [r3, #16]
- /* Initialize the DAC state*/
- hdac->State = HAL_DAC_STATE_READY;
- 8007834: 687b ldr r3, [r7, #4]
- 8007836: 2201 movs r2, #1
- 8007838: 711a strb r2, [r3, #4]
- /* Return function status */
- return HAL_OK;
- 800783a: 2300 movs r3, #0
- }
- 800783c: 4618 mov r0, r3
- 800783e: 3708 adds r7, #8
- 8007840: 46bd mov sp, r7
- 8007842: bd80 pop {r7, pc}
- 08007844 <HAL_DAC_Start>:
- * @arg DAC_CHANNEL_1: DAC Channel1 selected
- * @arg DAC_CHANNEL_2: DAC Channel2 selected
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
- {
- 8007844: b480 push {r7}
- 8007846: b083 sub sp, #12
- 8007848: af00 add r7, sp, #0
- 800784a: 6078 str r0, [r7, #4]
- 800784c: 6039 str r1, [r7, #0]
- /* Check the DAC peripheral handle */
- if (hdac == NULL)
- 800784e: 687b ldr r3, [r7, #4]
- 8007850: 2b00 cmp r3, #0
- 8007852: d101 bne.n 8007858 <HAL_DAC_Start+0x14>
- {
- return HAL_ERROR;
- 8007854: 2301 movs r3, #1
- 8007856: e046 b.n 80078e6 <HAL_DAC_Start+0xa2>
- /* Check the parameters */
- assert_param(IS_DAC_CHANNEL(Channel));
- /* Process locked */
- __HAL_LOCK(hdac);
- 8007858: 687b ldr r3, [r7, #4]
- 800785a: 795b ldrb r3, [r3, #5]
- 800785c: 2b01 cmp r3, #1
- 800785e: d101 bne.n 8007864 <HAL_DAC_Start+0x20>
- 8007860: 2302 movs r3, #2
- 8007862: e040 b.n 80078e6 <HAL_DAC_Start+0xa2>
- 8007864: 687b ldr r3, [r7, #4]
- 8007866: 2201 movs r2, #1
- 8007868: 715a strb r2, [r3, #5]
- /* Change DAC state */
- hdac->State = HAL_DAC_STATE_BUSY;
- 800786a: 687b ldr r3, [r7, #4]
- 800786c: 2202 movs r2, #2
- 800786e: 711a strb r2, [r3, #4]
- /* Enable the Peripheral */
- __HAL_DAC_ENABLE(hdac, Channel);
- 8007870: 687b ldr r3, [r7, #4]
- 8007872: 681b ldr r3, [r3, #0]
- 8007874: 6819 ldr r1, [r3, #0]
- 8007876: 683b ldr r3, [r7, #0]
- 8007878: f003 0310 and.w r3, r3, #16
- 800787c: 2201 movs r2, #1
- 800787e: 409a lsls r2, r3
- 8007880: 687b ldr r3, [r7, #4]
- 8007882: 681b ldr r3, [r3, #0]
- 8007884: 430a orrs r2, r1
- 8007886: 601a str r2, [r3, #0]
- if (Channel == DAC_CHANNEL_1)
- 8007888: 683b ldr r3, [r7, #0]
- 800788a: 2b00 cmp r3, #0
- 800788c: d10f bne.n 80078ae <HAL_DAC_Start+0x6a>
- {
- /* Check if software trigger enabled */
- if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
- 800788e: 687b ldr r3, [r7, #4]
- 8007890: 681b ldr r3, [r3, #0]
- 8007892: 681b ldr r3, [r3, #0]
- 8007894: f003 033e and.w r3, r3, #62 @ 0x3e
- 8007898: 2b02 cmp r3, #2
- 800789a: d11d bne.n 80078d8 <HAL_DAC_Start+0x94>
- {
- /* Enable the selected DAC software conversion */
- SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
- 800789c: 687b ldr r3, [r7, #4]
- 800789e: 681b ldr r3, [r3, #0]
- 80078a0: 685a ldr r2, [r3, #4]
- 80078a2: 687b ldr r3, [r7, #4]
- 80078a4: 681b ldr r3, [r3, #0]
- 80078a6: f042 0201 orr.w r2, r2, #1
- 80078aa: 605a str r2, [r3, #4]
- 80078ac: e014 b.n 80078d8 <HAL_DAC_Start+0x94>
- }
- else
- {
- /* Check if software trigger enabled */
- if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL)))
- 80078ae: 687b ldr r3, [r7, #4]
- 80078b0: 681b ldr r3, [r3, #0]
- 80078b2: 681b ldr r3, [r3, #0]
- 80078b4: f403 1278 and.w r2, r3, #4063232 @ 0x3e0000
- 80078b8: 683b ldr r3, [r7, #0]
- 80078ba: f003 0310 and.w r3, r3, #16
- 80078be: 2102 movs r1, #2
- 80078c0: fa01 f303 lsl.w r3, r1, r3
- 80078c4: 429a cmp r2, r3
- 80078c6: d107 bne.n 80078d8 <HAL_DAC_Start+0x94>
- {
- /* Enable the selected DAC software conversion*/
- SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
- 80078c8: 687b ldr r3, [r7, #4]
- 80078ca: 681b ldr r3, [r3, #0]
- 80078cc: 685a ldr r2, [r3, #4]
- 80078ce: 687b ldr r3, [r7, #4]
- 80078d0: 681b ldr r3, [r3, #0]
- 80078d2: f042 0202 orr.w r2, r2, #2
- 80078d6: 605a str r2, [r3, #4]
- }
- }
- /* Change DAC state */
- hdac->State = HAL_DAC_STATE_READY;
- 80078d8: 687b ldr r3, [r7, #4]
- 80078da: 2201 movs r2, #1
- 80078dc: 711a strb r2, [r3, #4]
- /* Process unlocked */
- __HAL_UNLOCK(hdac);
- 80078de: 687b ldr r3, [r7, #4]
- 80078e0: 2200 movs r2, #0
- 80078e2: 715a strb r2, [r3, #5]
- /* Return function status */
- return HAL_OK;
- 80078e4: 2300 movs r3, #0
- }
- 80078e6: 4618 mov r0, r3
- 80078e8: 370c adds r7, #12
- 80078ea: 46bd mov sp, r7
- 80078ec: f85d 7b04 ldr.w r7, [sp], #4
- 80078f0: 4770 bx lr
- 080078f2 <HAL_DAC_IRQHandler>:
- * @param hdac pointer to a DAC_HandleTypeDef structure that contains
- * the configuration information for the specified DAC.
- * @retval None
- */
- void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
- {
- 80078f2: b580 push {r7, lr}
- 80078f4: b084 sub sp, #16
- 80078f6: af00 add r7, sp, #0
- 80078f8: 6078 str r0, [r7, #4]
- uint32_t itsource = hdac->Instance->CR;
- 80078fa: 687b ldr r3, [r7, #4]
- 80078fc: 681b ldr r3, [r3, #0]
- 80078fe: 681b ldr r3, [r3, #0]
- 8007900: 60fb str r3, [r7, #12]
- uint32_t itflag = hdac->Instance->SR;
- 8007902: 687b ldr r3, [r7, #4]
- 8007904: 681b ldr r3, [r3, #0]
- 8007906: 6b5b ldr r3, [r3, #52] @ 0x34
- 8007908: 60bb str r3, [r7, #8]
- if ((itsource & DAC_IT_DMAUDR1) == DAC_IT_DMAUDR1)
- 800790a: 68fb ldr r3, [r7, #12]
- 800790c: f403 5300 and.w r3, r3, #8192 @ 0x2000
- 8007910: 2b00 cmp r3, #0
- 8007912: d01d beq.n 8007950 <HAL_DAC_IRQHandler+0x5e>
- {
- /* Check underrun flag of DAC channel 1 */
- if ((itflag & DAC_FLAG_DMAUDR1) == DAC_FLAG_DMAUDR1)
- 8007914: 68bb ldr r3, [r7, #8]
- 8007916: f403 5300 and.w r3, r3, #8192 @ 0x2000
- 800791a: 2b00 cmp r3, #0
- 800791c: d018 beq.n 8007950 <HAL_DAC_IRQHandler+0x5e>
- {
- /* Change DAC state to error state */
- hdac->State = HAL_DAC_STATE_ERROR;
- 800791e: 687b ldr r3, [r7, #4]
- 8007920: 2204 movs r2, #4
- 8007922: 711a strb r2, [r3, #4]
- /* Set DAC error code to channel1 DMA underrun error */
- SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
- 8007924: 687b ldr r3, [r7, #4]
- 8007926: 691b ldr r3, [r3, #16]
- 8007928: f043 0201 orr.w r2, r3, #1
- 800792c: 687b ldr r3, [r7, #4]
- 800792e: 611a str r2, [r3, #16]
- /* Clear the underrun flag */
- __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1);
- 8007930: 687b ldr r3, [r7, #4]
- 8007932: 681b ldr r3, [r3, #0]
- 8007934: f44f 5200 mov.w r2, #8192 @ 0x2000
- 8007938: 635a str r2, [r3, #52] @ 0x34
- /* Disable the selected DAC channel1 DMA request */
- __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN1);
- 800793a: 687b ldr r3, [r7, #4]
- 800793c: 681b ldr r3, [r3, #0]
- 800793e: 681a ldr r2, [r3, #0]
- 8007940: 687b ldr r3, [r7, #4]
- 8007942: 681b ldr r3, [r3, #0]
- 8007944: f422 5280 bic.w r2, r2, #4096 @ 0x1000
- 8007948: 601a str r2, [r3, #0]
- /* Error callback */
- #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
- hdac->DMAUnderrunCallbackCh1(hdac);
- #else
- HAL_DAC_DMAUnderrunCallbackCh1(hdac);
- 800794a: 6878 ldr r0, [r7, #4]
- 800794c: f000 f851 bl 80079f2 <HAL_DAC_DMAUnderrunCallbackCh1>
- #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
- }
- }
- if ((itsource & DAC_IT_DMAUDR2) == DAC_IT_DMAUDR2)
- 8007950: 68fb ldr r3, [r7, #12]
- 8007952: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
- 8007956: 2b00 cmp r3, #0
- 8007958: d01d beq.n 8007996 <HAL_DAC_IRQHandler+0xa4>
- {
- /* Check underrun flag of DAC channel 2 */
- if ((itflag & DAC_FLAG_DMAUDR2) == DAC_FLAG_DMAUDR2)
- 800795a: 68bb ldr r3, [r7, #8]
- 800795c: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
- 8007960: 2b00 cmp r3, #0
- 8007962: d018 beq.n 8007996 <HAL_DAC_IRQHandler+0xa4>
- {
- /* Change DAC state to error state */
- hdac->State = HAL_DAC_STATE_ERROR;
- 8007964: 687b ldr r3, [r7, #4]
- 8007966: 2204 movs r2, #4
- 8007968: 711a strb r2, [r3, #4]
- /* Set DAC error code to channel2 DMA underrun error */
- SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
- 800796a: 687b ldr r3, [r7, #4]
- 800796c: 691b ldr r3, [r3, #16]
- 800796e: f043 0202 orr.w r2, r3, #2
- 8007972: 687b ldr r3, [r7, #4]
- 8007974: 611a str r2, [r3, #16]
- /* Clear the underrun flag */
- __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2);
- 8007976: 687b ldr r3, [r7, #4]
- 8007978: 681b ldr r3, [r3, #0]
- 800797a: f04f 5200 mov.w r2, #536870912 @ 0x20000000
- 800797e: 635a str r2, [r3, #52] @ 0x34
- /* Disable the selected DAC channel2 DMA request */
- __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN2);
- 8007980: 687b ldr r3, [r7, #4]
- 8007982: 681b ldr r3, [r3, #0]
- 8007984: 681a ldr r2, [r3, #0]
- 8007986: 687b ldr r3, [r7, #4]
- 8007988: 681b ldr r3, [r3, #0]
- 800798a: f022 5280 bic.w r2, r2, #268435456 @ 0x10000000
- 800798e: 601a str r2, [r3, #0]
- /* Error callback */
- #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
- hdac->DMAUnderrunCallbackCh2(hdac);
- #else
- HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
- 8007990: 6878 ldr r0, [r7, #4]
- 8007992: f000 f97b bl 8007c8c <HAL_DACEx_DMAUnderrunCallbackCh2>
- #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
- }
- }
- }
- 8007996: bf00 nop
- 8007998: 3710 adds r7, #16
- 800799a: 46bd mov sp, r7
- 800799c: bd80 pop {r7, pc}
- 0800799e <HAL_DAC_SetValue>:
- * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
- * @param Data Data to be loaded in the selected data holding register.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
- {
- 800799e: b480 push {r7}
- 80079a0: b087 sub sp, #28
- 80079a2: af00 add r7, sp, #0
- 80079a4: 60f8 str r0, [r7, #12]
- 80079a6: 60b9 str r1, [r7, #8]
- 80079a8: 607a str r2, [r7, #4]
- 80079aa: 603b str r3, [r7, #0]
- __IO uint32_t tmp = 0UL;
- 80079ac: 2300 movs r3, #0
- 80079ae: 617b str r3, [r7, #20]
- /* Check the DAC peripheral handle */
- if (hdac == NULL)
- 80079b0: 68fb ldr r3, [r7, #12]
- 80079b2: 2b00 cmp r3, #0
- 80079b4: d101 bne.n 80079ba <HAL_DAC_SetValue+0x1c>
- {
- return HAL_ERROR;
- 80079b6: 2301 movs r3, #1
- 80079b8: e015 b.n 80079e6 <HAL_DAC_SetValue+0x48>
- /* Check the parameters */
- assert_param(IS_DAC_CHANNEL(Channel));
- assert_param(IS_DAC_ALIGN(Alignment));
- assert_param(IS_DAC_DATA(Data));
- tmp = (uint32_t)hdac->Instance;
- 80079ba: 68fb ldr r3, [r7, #12]
- 80079bc: 681b ldr r3, [r3, #0]
- 80079be: 617b str r3, [r7, #20]
- if (Channel == DAC_CHANNEL_1)
- 80079c0: 68bb ldr r3, [r7, #8]
- 80079c2: 2b00 cmp r3, #0
- 80079c4: d105 bne.n 80079d2 <HAL_DAC_SetValue+0x34>
- {
- tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
- 80079c6: 697a ldr r2, [r7, #20]
- 80079c8: 687b ldr r3, [r7, #4]
- 80079ca: 4413 add r3, r2
- 80079cc: 3308 adds r3, #8
- 80079ce: 617b str r3, [r7, #20]
- 80079d0: e004 b.n 80079dc <HAL_DAC_SetValue+0x3e>
- }
- else
- {
- tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
- 80079d2: 697a ldr r2, [r7, #20]
- 80079d4: 687b ldr r3, [r7, #4]
- 80079d6: 4413 add r3, r2
- 80079d8: 3314 adds r3, #20
- 80079da: 617b str r3, [r7, #20]
- }
- /* Set the DAC channel selected data holding register */
- *(__IO uint32_t *) tmp = Data;
- 80079dc: 697b ldr r3, [r7, #20]
- 80079de: 461a mov r2, r3
- 80079e0: 683b ldr r3, [r7, #0]
- 80079e2: 6013 str r3, [r2, #0]
- /* Return function status */
- return HAL_OK;
- 80079e4: 2300 movs r3, #0
- }
- 80079e6: 4618 mov r0, r3
- 80079e8: 371c adds r7, #28
- 80079ea: 46bd mov sp, r7
- 80079ec: f85d 7b04 ldr.w r7, [sp], #4
- 80079f0: 4770 bx lr
- 080079f2 <HAL_DAC_DMAUnderrunCallbackCh1>:
- * @param hdac pointer to a DAC_HandleTypeDef structure that contains
- * the configuration information for the specified DAC.
- * @retval None
- */
- __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
- {
- 80079f2: b480 push {r7}
- 80079f4: b083 sub sp, #12
- 80079f6: af00 add r7, sp, #0
- 80079f8: 6078 str r0, [r7, #4]
- UNUSED(hdac);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
- */
- }
- 80079fa: bf00 nop
- 80079fc: 370c adds r7, #12
- 80079fe: 46bd mov sp, r7
- 8007a00: f85d 7b04 ldr.w r7, [sp], #4
- 8007a04: 4770 bx lr
- ...
- 08007a08 <HAL_DAC_ConfigChannel>:
- * @arg DAC_CHANNEL_2: DAC Channel2 selected
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac,
- const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
- {
- 8007a08: b580 push {r7, lr}
- 8007a0a: b08a sub sp, #40 @ 0x28
- 8007a0c: af00 add r7, sp, #0
- 8007a0e: 60f8 str r0, [r7, #12]
- 8007a10: 60b9 str r1, [r7, #8]
- 8007a12: 607a str r2, [r7, #4]
- HAL_StatusTypeDef status = HAL_OK;
- 8007a14: 2300 movs r3, #0
- 8007a16: f887 3023 strb.w r3, [r7, #35] @ 0x23
- uint32_t tmpreg2;
- uint32_t tickstart;
- uint32_t connectOnChip;
- /* Check the DAC peripheral handle and channel configuration struct */
- if ((hdac == NULL) || (sConfig == NULL))
- 8007a1a: 68fb ldr r3, [r7, #12]
- 8007a1c: 2b00 cmp r3, #0
- 8007a1e: d002 beq.n 8007a26 <HAL_DAC_ConfigChannel+0x1e>
- 8007a20: 68bb ldr r3, [r7, #8]
- 8007a22: 2b00 cmp r3, #0
- 8007a24: d101 bne.n 8007a2a <HAL_DAC_ConfigChannel+0x22>
- {
- return HAL_ERROR;
- 8007a26: 2301 movs r3, #1
- 8007a28: e12a b.n 8007c80 <HAL_DAC_ConfigChannel+0x278>
- assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
- }
- assert_param(IS_DAC_CHANNEL(Channel));
- /* Process locked */
- __HAL_LOCK(hdac);
- 8007a2a: 68fb ldr r3, [r7, #12]
- 8007a2c: 795b ldrb r3, [r3, #5]
- 8007a2e: 2b01 cmp r3, #1
- 8007a30: d101 bne.n 8007a36 <HAL_DAC_ConfigChannel+0x2e>
- 8007a32: 2302 movs r3, #2
- 8007a34: e124 b.n 8007c80 <HAL_DAC_ConfigChannel+0x278>
- 8007a36: 68fb ldr r3, [r7, #12]
- 8007a38: 2201 movs r2, #1
- 8007a3a: 715a strb r2, [r3, #5]
- /* Change DAC state */
- hdac->State = HAL_DAC_STATE_BUSY;
- 8007a3c: 68fb ldr r3, [r7, #12]
- 8007a3e: 2202 movs r2, #2
- 8007a40: 711a strb r2, [r3, #4]
- /* Sample and hold configuration */
- if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
- 8007a42: 68bb ldr r3, [r7, #8]
- 8007a44: 681b ldr r3, [r3, #0]
- 8007a46: 2b04 cmp r3, #4
- 8007a48: d17a bne.n 8007b40 <HAL_DAC_ConfigChannel+0x138>
- {
- /* Get timeout */
- tickstart = HAL_GetTick();
- 8007a4a: f7fd fd8d bl 8005568 <HAL_GetTick>
- 8007a4e: 61f8 str r0, [r7, #28]
- if (Channel == DAC_CHANNEL_1)
- 8007a50: 687b ldr r3, [r7, #4]
- 8007a52: 2b00 cmp r3, #0
- 8007a54: d13d bne.n 8007ad2 <HAL_DAC_ConfigChannel+0xca>
- {
- /* SHSR1 can be written when BWST1 is cleared */
- while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
- 8007a56: e018 b.n 8007a8a <HAL_DAC_ConfigChannel+0x82>
- {
- /* Check for the Timeout */
- if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
- 8007a58: f7fd fd86 bl 8005568 <HAL_GetTick>
- 8007a5c: 4602 mov r2, r0
- 8007a5e: 69fb ldr r3, [r7, #28]
- 8007a60: 1ad3 subs r3, r2, r3
- 8007a62: 2b01 cmp r3, #1
- 8007a64: d911 bls.n 8007a8a <HAL_DAC_ConfigChannel+0x82>
- {
- /* New check to avoid false timeout detection in case of preemption */
- if (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
- 8007a66: 68fb ldr r3, [r7, #12]
- 8007a68: 681b ldr r3, [r3, #0]
- 8007a6a: 6b5a ldr r2, [r3, #52] @ 0x34
- 8007a6c: 4b86 ldr r3, [pc, #536] @ (8007c88 <HAL_DAC_ConfigChannel+0x280>)
- 8007a6e: 4013 ands r3, r2
- 8007a70: 2b00 cmp r3, #0
- 8007a72: d00a beq.n 8007a8a <HAL_DAC_ConfigChannel+0x82>
- {
- /* Update error code */
- SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
- 8007a74: 68fb ldr r3, [r7, #12]
- 8007a76: 691b ldr r3, [r3, #16]
- 8007a78: f043 0208 orr.w r2, r3, #8
- 8007a7c: 68fb ldr r3, [r7, #12]
- 8007a7e: 611a str r2, [r3, #16]
- /* Change the DMA state */
- hdac->State = HAL_DAC_STATE_TIMEOUT;
- 8007a80: 68fb ldr r3, [r7, #12]
- 8007a82: 2203 movs r2, #3
- 8007a84: 711a strb r2, [r3, #4]
- return HAL_TIMEOUT;
- 8007a86: 2303 movs r3, #3
- 8007a88: e0fa b.n 8007c80 <HAL_DAC_ConfigChannel+0x278>
- while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
- 8007a8a: 68fb ldr r3, [r7, #12]
- 8007a8c: 681b ldr r3, [r3, #0]
- 8007a8e: 6b5a ldr r2, [r3, #52] @ 0x34
- 8007a90: 4b7d ldr r3, [pc, #500] @ (8007c88 <HAL_DAC_ConfigChannel+0x280>)
- 8007a92: 4013 ands r3, r2
- 8007a94: 2b00 cmp r3, #0
- 8007a96: d1df bne.n 8007a58 <HAL_DAC_ConfigChannel+0x50>
- }
- }
- }
- hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
- 8007a98: 68fb ldr r3, [r7, #12]
- 8007a9a: 681b ldr r3, [r3, #0]
- 8007a9c: 68ba ldr r2, [r7, #8]
- 8007a9e: 6992 ldr r2, [r2, #24]
- 8007aa0: 641a str r2, [r3, #64] @ 0x40
- 8007aa2: e020 b.n 8007ae6 <HAL_DAC_ConfigChannel+0xde>
- {
- /* SHSR2 can be written when BWST2 is cleared */
- while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
- {
- /* Check for the Timeout */
- if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
- 8007aa4: f7fd fd60 bl 8005568 <HAL_GetTick>
- 8007aa8: 4602 mov r2, r0
- 8007aaa: 69fb ldr r3, [r7, #28]
- 8007aac: 1ad3 subs r3, r2, r3
- 8007aae: 2b01 cmp r3, #1
- 8007ab0: d90f bls.n 8007ad2 <HAL_DAC_ConfigChannel+0xca>
- {
- /* New check to avoid false timeout detection in case of preemption */
- if (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
- 8007ab2: 68fb ldr r3, [r7, #12]
- 8007ab4: 681b ldr r3, [r3, #0]
- 8007ab6: 6b5b ldr r3, [r3, #52] @ 0x34
- 8007ab8: 2b00 cmp r3, #0
- 8007aba: da0a bge.n 8007ad2 <HAL_DAC_ConfigChannel+0xca>
- {
- /* Update error code */
- SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
- 8007abc: 68fb ldr r3, [r7, #12]
- 8007abe: 691b ldr r3, [r3, #16]
- 8007ac0: f043 0208 orr.w r2, r3, #8
- 8007ac4: 68fb ldr r3, [r7, #12]
- 8007ac6: 611a str r2, [r3, #16]
- /* Change the DMA state */
- hdac->State = HAL_DAC_STATE_TIMEOUT;
- 8007ac8: 68fb ldr r3, [r7, #12]
- 8007aca: 2203 movs r2, #3
- 8007acc: 711a strb r2, [r3, #4]
- return HAL_TIMEOUT;
- 8007ace: 2303 movs r3, #3
- 8007ad0: e0d6 b.n 8007c80 <HAL_DAC_ConfigChannel+0x278>
- while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
- 8007ad2: 68fb ldr r3, [r7, #12]
- 8007ad4: 681b ldr r3, [r3, #0]
- 8007ad6: 6b5b ldr r3, [r3, #52] @ 0x34
- 8007ad8: 2b00 cmp r3, #0
- 8007ada: dbe3 blt.n 8007aa4 <HAL_DAC_ConfigChannel+0x9c>
- }
- }
- }
- hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
- 8007adc: 68fb ldr r3, [r7, #12]
- 8007ade: 681b ldr r3, [r3, #0]
- 8007ae0: 68ba ldr r2, [r7, #8]
- 8007ae2: 6992 ldr r2, [r2, #24]
- 8007ae4: 645a str r2, [r3, #68] @ 0x44
- }
- /* HoldTime */
- MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL),
- 8007ae6: 68fb ldr r3, [r7, #12]
- 8007ae8: 681b ldr r3, [r3, #0]
- 8007aea: 6c9a ldr r2, [r3, #72] @ 0x48
- 8007aec: 687b ldr r3, [r7, #4]
- 8007aee: f003 0310 and.w r3, r3, #16
- 8007af2: f240 31ff movw r1, #1023 @ 0x3ff
- 8007af6: fa01 f303 lsl.w r3, r1, r3
- 8007afa: 43db mvns r3, r3
- 8007afc: ea02 0103 and.w r1, r2, r3
- 8007b00: 68bb ldr r3, [r7, #8]
- 8007b02: 69da ldr r2, [r3, #28]
- 8007b04: 687b ldr r3, [r7, #4]
- 8007b06: f003 0310 and.w r3, r3, #16
- 8007b0a: 409a lsls r2, r3
- 8007b0c: 68fb ldr r3, [r7, #12]
- 8007b0e: 681b ldr r3, [r3, #0]
- 8007b10: 430a orrs r2, r1
- 8007b12: 649a str r2, [r3, #72] @ 0x48
- (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL));
- /* RefreshTime */
- MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL),
- 8007b14: 68fb ldr r3, [r7, #12]
- 8007b16: 681b ldr r3, [r3, #0]
- 8007b18: 6cda ldr r2, [r3, #76] @ 0x4c
- 8007b1a: 687b ldr r3, [r7, #4]
- 8007b1c: f003 0310 and.w r3, r3, #16
- 8007b20: 21ff movs r1, #255 @ 0xff
- 8007b22: fa01 f303 lsl.w r3, r1, r3
- 8007b26: 43db mvns r3, r3
- 8007b28: ea02 0103 and.w r1, r2, r3
- 8007b2c: 68bb ldr r3, [r7, #8]
- 8007b2e: 6a1a ldr r2, [r3, #32]
- 8007b30: 687b ldr r3, [r7, #4]
- 8007b32: f003 0310 and.w r3, r3, #16
- 8007b36: 409a lsls r2, r3
- 8007b38: 68fb ldr r3, [r7, #12]
- 8007b3a: 681b ldr r3, [r3, #0]
- 8007b3c: 430a orrs r2, r1
- 8007b3e: 64da str r2, [r3, #76] @ 0x4c
- (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL));
- }
- if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
- 8007b40: 68bb ldr r3, [r7, #8]
- 8007b42: 691b ldr r3, [r3, #16]
- 8007b44: 2b01 cmp r3, #1
- 8007b46: d11d bne.n 8007b84 <HAL_DAC_ConfigChannel+0x17c>
- /* USER TRIMMING */
- {
- /* Get the DAC CCR value */
- tmpreg1 = hdac->Instance->CCR;
- 8007b48: 68fb ldr r3, [r7, #12]
- 8007b4a: 681b ldr r3, [r3, #0]
- 8007b4c: 6b9b ldr r3, [r3, #56] @ 0x38
- 8007b4e: 61bb str r3, [r7, #24]
- /* Clear trimming value */
- tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL));
- 8007b50: 687b ldr r3, [r7, #4]
- 8007b52: f003 0310 and.w r3, r3, #16
- 8007b56: 221f movs r2, #31
- 8007b58: fa02 f303 lsl.w r3, r2, r3
- 8007b5c: 43db mvns r3, r3
- 8007b5e: 69ba ldr r2, [r7, #24]
- 8007b60: 4013 ands r3, r2
- 8007b62: 61bb str r3, [r7, #24]
- /* Configure for the selected trimming offset */
- tmpreg2 = sConfig->DAC_TrimmingValue;
- 8007b64: 68bb ldr r3, [r7, #8]
- 8007b66: 695b ldr r3, [r3, #20]
- 8007b68: 617b str r3, [r7, #20]
- /* Calculate CCR register value depending on DAC_Channel */
- tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
- 8007b6a: 687b ldr r3, [r7, #4]
- 8007b6c: f003 0310 and.w r3, r3, #16
- 8007b70: 697a ldr r2, [r7, #20]
- 8007b72: fa02 f303 lsl.w r3, r2, r3
- 8007b76: 69ba ldr r2, [r7, #24]
- 8007b78: 4313 orrs r3, r2
- 8007b7a: 61bb str r3, [r7, #24]
- /* Write to DAC CCR */
- hdac->Instance->CCR = tmpreg1;
- 8007b7c: 68fb ldr r3, [r7, #12]
- 8007b7e: 681b ldr r3, [r3, #0]
- 8007b80: 69ba ldr r2, [r7, #24]
- 8007b82: 639a str r2, [r3, #56] @ 0x38
- }
- /* else factory trimming is used (factory setting are available at reset)*/
- /* SW Nothing has nothing to do */
- /* Get the DAC MCR value */
- tmpreg1 = hdac->Instance->MCR;
- 8007b84: 68fb ldr r3, [r7, #12]
- 8007b86: 681b ldr r3, [r3, #0]
- 8007b88: 6bdb ldr r3, [r3, #60] @ 0x3c
- 8007b8a: 61bb str r3, [r7, #24]
- /* Clear DAC_MCR_MODEx bits */
- tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL));
- 8007b8c: 687b ldr r3, [r7, #4]
- 8007b8e: f003 0310 and.w r3, r3, #16
- 8007b92: 2207 movs r2, #7
- 8007b94: fa02 f303 lsl.w r3, r2, r3
- 8007b98: 43db mvns r3, r3
- 8007b9a: 69ba ldr r2, [r7, #24]
- 8007b9c: 4013 ands r3, r2
- 8007b9e: 61bb str r3, [r7, #24]
- /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
- if (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_EXTERNAL)
- 8007ba0: 68bb ldr r3, [r7, #8]
- 8007ba2: 68db ldr r3, [r3, #12]
- 8007ba4: 2b01 cmp r3, #1
- 8007ba6: d102 bne.n 8007bae <HAL_DAC_ConfigChannel+0x1a6>
- {
- connectOnChip = 0x00000000UL;
- 8007ba8: 2300 movs r3, #0
- 8007baa: 627b str r3, [r7, #36] @ 0x24
- 8007bac: e00f b.n 8007bce <HAL_DAC_ConfigChannel+0x1c6>
- }
- else if (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_INTERNAL)
- 8007bae: 68bb ldr r3, [r7, #8]
- 8007bb0: 68db ldr r3, [r3, #12]
- 8007bb2: 2b02 cmp r3, #2
- 8007bb4: d102 bne.n 8007bbc <HAL_DAC_ConfigChannel+0x1b4>
- {
- connectOnChip = DAC_MCR_MODE1_0;
- 8007bb6: 2301 movs r3, #1
- 8007bb8: 627b str r3, [r7, #36] @ 0x24
- 8007bba: e008 b.n 8007bce <HAL_DAC_ConfigChannel+0x1c6>
- }
- else /* (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_BOTH) */
- {
- if (sConfig->DAC_OutputBuffer == DAC_OUTPUTBUFFER_ENABLE)
- 8007bbc: 68bb ldr r3, [r7, #8]
- 8007bbe: 689b ldr r3, [r3, #8]
- 8007bc0: 2b00 cmp r3, #0
- 8007bc2: d102 bne.n 8007bca <HAL_DAC_ConfigChannel+0x1c2>
- {
- connectOnChip = DAC_MCR_MODE1_0;
- 8007bc4: 2301 movs r3, #1
- 8007bc6: 627b str r3, [r7, #36] @ 0x24
- 8007bc8: e001 b.n 8007bce <HAL_DAC_ConfigChannel+0x1c6>
- }
- else
- {
- connectOnChip = 0x00000000UL;
- 8007bca: 2300 movs r3, #0
- 8007bcc: 627b str r3, [r7, #36] @ 0x24
- }
- }
- tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | connectOnChip);
- 8007bce: 68bb ldr r3, [r7, #8]
- 8007bd0: 681a ldr r2, [r3, #0]
- 8007bd2: 68bb ldr r3, [r7, #8]
- 8007bd4: 689b ldr r3, [r3, #8]
- 8007bd6: 4313 orrs r3, r2
- 8007bd8: 6a7a ldr r2, [r7, #36] @ 0x24
- 8007bda: 4313 orrs r3, r2
- 8007bdc: 617b str r3, [r7, #20]
- /* Calculate MCR register value depending on DAC_Channel */
- tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
- 8007bde: 687b ldr r3, [r7, #4]
- 8007be0: f003 0310 and.w r3, r3, #16
- 8007be4: 697a ldr r2, [r7, #20]
- 8007be6: fa02 f303 lsl.w r3, r2, r3
- 8007bea: 69ba ldr r2, [r7, #24]
- 8007bec: 4313 orrs r3, r2
- 8007bee: 61bb str r3, [r7, #24]
- /* Write to DAC MCR */
- hdac->Instance->MCR = tmpreg1;
- 8007bf0: 68fb ldr r3, [r7, #12]
- 8007bf2: 681b ldr r3, [r3, #0]
- 8007bf4: 69ba ldr r2, [r7, #24]
- 8007bf6: 63da str r2, [r3, #60] @ 0x3c
- /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
- CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL));
- 8007bf8: 68fb ldr r3, [r7, #12]
- 8007bfa: 681b ldr r3, [r3, #0]
- 8007bfc: 6819 ldr r1, [r3, #0]
- 8007bfe: 687b ldr r3, [r7, #4]
- 8007c00: f003 0310 and.w r3, r3, #16
- 8007c04: f44f 4280 mov.w r2, #16384 @ 0x4000
- 8007c08: fa02 f303 lsl.w r3, r2, r3
- 8007c0c: 43da mvns r2, r3
- 8007c0e: 68fb ldr r3, [r7, #12]
- 8007c10: 681b ldr r3, [r3, #0]
- 8007c12: 400a ands r2, r1
- 8007c14: 601a str r2, [r3, #0]
- /* Get the DAC CR value */
- tmpreg1 = hdac->Instance->CR;
- 8007c16: 68fb ldr r3, [r7, #12]
- 8007c18: 681b ldr r3, [r3, #0]
- 8007c1a: 681b ldr r3, [r3, #0]
- 8007c1c: 61bb str r3, [r7, #24]
- /* Clear TENx, TSELx, WAVEx and MAMPx bits */
- tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL));
- 8007c1e: 687b ldr r3, [r7, #4]
- 8007c20: f003 0310 and.w r3, r3, #16
- 8007c24: f640 72fe movw r2, #4094 @ 0xffe
- 8007c28: fa02 f303 lsl.w r3, r2, r3
- 8007c2c: 43db mvns r3, r3
- 8007c2e: 69ba ldr r2, [r7, #24]
- 8007c30: 4013 ands r3, r2
- 8007c32: 61bb str r3, [r7, #24]
- /* Configure for the selected DAC channel: trigger */
- /* Set TSELx and TENx bits according to DAC_Trigger value */
- tmpreg2 = sConfig->DAC_Trigger;
- 8007c34: 68bb ldr r3, [r7, #8]
- 8007c36: 685b ldr r3, [r3, #4]
- 8007c38: 617b str r3, [r7, #20]
- /* Calculate CR register value depending on DAC_Channel */
- tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
- 8007c3a: 687b ldr r3, [r7, #4]
- 8007c3c: f003 0310 and.w r3, r3, #16
- 8007c40: 697a ldr r2, [r7, #20]
- 8007c42: fa02 f303 lsl.w r3, r2, r3
- 8007c46: 69ba ldr r2, [r7, #24]
- 8007c48: 4313 orrs r3, r2
- 8007c4a: 61bb str r3, [r7, #24]
- /* Write to DAC CR */
- hdac->Instance->CR = tmpreg1;
- 8007c4c: 68fb ldr r3, [r7, #12]
- 8007c4e: 681b ldr r3, [r3, #0]
- 8007c50: 69ba ldr r2, [r7, #24]
- 8007c52: 601a str r2, [r3, #0]
- /* Disable wave generation */
- CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL)));
- 8007c54: 68fb ldr r3, [r7, #12]
- 8007c56: 681b ldr r3, [r3, #0]
- 8007c58: 6819 ldr r1, [r3, #0]
- 8007c5a: 687b ldr r3, [r7, #4]
- 8007c5c: f003 0310 and.w r3, r3, #16
- 8007c60: 22c0 movs r2, #192 @ 0xc0
- 8007c62: fa02 f303 lsl.w r3, r2, r3
- 8007c66: 43da mvns r2, r3
- 8007c68: 68fb ldr r3, [r7, #12]
- 8007c6a: 681b ldr r3, [r3, #0]
- 8007c6c: 400a ands r2, r1
- 8007c6e: 601a str r2, [r3, #0]
- /* Change DAC state */
- hdac->State = HAL_DAC_STATE_READY;
- 8007c70: 68fb ldr r3, [r7, #12]
- 8007c72: 2201 movs r2, #1
- 8007c74: 711a strb r2, [r3, #4]
- /* Process unlocked */
- __HAL_UNLOCK(hdac);
- 8007c76: 68fb ldr r3, [r7, #12]
- 8007c78: 2200 movs r2, #0
- 8007c7a: 715a strb r2, [r3, #5]
- /* Return function status */
- return status;
- 8007c7c: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
- }
- 8007c80: 4618 mov r0, r3
- 8007c82: 3728 adds r7, #40 @ 0x28
- 8007c84: 46bd mov sp, r7
- 8007c86: bd80 pop {r7, pc}
- 8007c88: 20008000 .word 0x20008000
- 08007c8c <HAL_DACEx_DMAUnderrunCallbackCh2>:
- * @param hdac pointer to a DAC_HandleTypeDef structure that contains
- * the configuration information for the specified DAC.
- * @retval None
- */
- __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
- {
- 8007c8c: b480 push {r7}
- 8007c8e: b083 sub sp, #12
- 8007c90: af00 add r7, sp, #0
- 8007c92: 6078 str r0, [r7, #4]
- UNUSED(hdac);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file
- */
- }
- 8007c94: bf00 nop
- 8007c96: 370c adds r7, #12
- 8007c98: 46bd mov sp, r7
- 8007c9a: f85d 7b04 ldr.w r7, [sp], #4
- 8007c9e: 4770 bx lr
- 08007ca0 <HAL_DMA_Init>:
- * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
- {
- 8007ca0: b580 push {r7, lr}
- 8007ca2: b086 sub sp, #24
- 8007ca4: af00 add r7, sp, #0
- 8007ca6: 6078 str r0, [r7, #4]
- uint32_t registerValue;
- uint32_t tickstart = HAL_GetTick();
- 8007ca8: f7fd fc5e bl 8005568 <HAL_GetTick>
- 8007cac: 6138 str r0, [r7, #16]
- DMA_Base_Registers *regs_dma;
- BDMA_Base_Registers *regs_bdma;
- /* Check the DMA peripheral handle */
- if(hdma == NULL)
- 8007cae: 687b ldr r3, [r7, #4]
- 8007cb0: 2b00 cmp r3, #0
- 8007cb2: d101 bne.n 8007cb8 <HAL_DMA_Init+0x18>
- {
- return HAL_ERROR;
- 8007cb4: 2301 movs r3, #1
- 8007cb6: e316 b.n 80082e6 <HAL_DMA_Init+0x646>
- assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
- assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
- assert_param(IS_DMA_MODE(hdma->Init.Mode));
- assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
- if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
- 8007cb8: 687b ldr r3, [r7, #4]
- 8007cba: 681b ldr r3, [r3, #0]
- 8007cbc: 4a66 ldr r2, [pc, #408] @ (8007e58 <HAL_DMA_Init+0x1b8>)
- 8007cbe: 4293 cmp r3, r2
- 8007cc0: d04a beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007cc2: 687b ldr r3, [r7, #4]
- 8007cc4: 681b ldr r3, [r3, #0]
- 8007cc6: 4a65 ldr r2, [pc, #404] @ (8007e5c <HAL_DMA_Init+0x1bc>)
- 8007cc8: 4293 cmp r3, r2
- 8007cca: d045 beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007ccc: 687b ldr r3, [r7, #4]
- 8007cce: 681b ldr r3, [r3, #0]
- 8007cd0: 4a63 ldr r2, [pc, #396] @ (8007e60 <HAL_DMA_Init+0x1c0>)
- 8007cd2: 4293 cmp r3, r2
- 8007cd4: d040 beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007cd6: 687b ldr r3, [r7, #4]
- 8007cd8: 681b ldr r3, [r3, #0]
- 8007cda: 4a62 ldr r2, [pc, #392] @ (8007e64 <HAL_DMA_Init+0x1c4>)
- 8007cdc: 4293 cmp r3, r2
- 8007cde: d03b beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007ce0: 687b ldr r3, [r7, #4]
- 8007ce2: 681b ldr r3, [r3, #0]
- 8007ce4: 4a60 ldr r2, [pc, #384] @ (8007e68 <HAL_DMA_Init+0x1c8>)
- 8007ce6: 4293 cmp r3, r2
- 8007ce8: d036 beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007cea: 687b ldr r3, [r7, #4]
- 8007cec: 681b ldr r3, [r3, #0]
- 8007cee: 4a5f ldr r2, [pc, #380] @ (8007e6c <HAL_DMA_Init+0x1cc>)
- 8007cf0: 4293 cmp r3, r2
- 8007cf2: d031 beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007cf4: 687b ldr r3, [r7, #4]
- 8007cf6: 681b ldr r3, [r3, #0]
- 8007cf8: 4a5d ldr r2, [pc, #372] @ (8007e70 <HAL_DMA_Init+0x1d0>)
- 8007cfa: 4293 cmp r3, r2
- 8007cfc: d02c beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007cfe: 687b ldr r3, [r7, #4]
- 8007d00: 681b ldr r3, [r3, #0]
- 8007d02: 4a5c ldr r2, [pc, #368] @ (8007e74 <HAL_DMA_Init+0x1d4>)
- 8007d04: 4293 cmp r3, r2
- 8007d06: d027 beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007d08: 687b ldr r3, [r7, #4]
- 8007d0a: 681b ldr r3, [r3, #0]
- 8007d0c: 4a5a ldr r2, [pc, #360] @ (8007e78 <HAL_DMA_Init+0x1d8>)
- 8007d0e: 4293 cmp r3, r2
- 8007d10: d022 beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007d12: 687b ldr r3, [r7, #4]
- 8007d14: 681b ldr r3, [r3, #0]
- 8007d16: 4a59 ldr r2, [pc, #356] @ (8007e7c <HAL_DMA_Init+0x1dc>)
- 8007d18: 4293 cmp r3, r2
- 8007d1a: d01d beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007d1c: 687b ldr r3, [r7, #4]
- 8007d1e: 681b ldr r3, [r3, #0]
- 8007d20: 4a57 ldr r2, [pc, #348] @ (8007e80 <HAL_DMA_Init+0x1e0>)
- 8007d22: 4293 cmp r3, r2
- 8007d24: d018 beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007d26: 687b ldr r3, [r7, #4]
- 8007d28: 681b ldr r3, [r3, #0]
- 8007d2a: 4a56 ldr r2, [pc, #344] @ (8007e84 <HAL_DMA_Init+0x1e4>)
- 8007d2c: 4293 cmp r3, r2
- 8007d2e: d013 beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007d30: 687b ldr r3, [r7, #4]
- 8007d32: 681b ldr r3, [r3, #0]
- 8007d34: 4a54 ldr r2, [pc, #336] @ (8007e88 <HAL_DMA_Init+0x1e8>)
- 8007d36: 4293 cmp r3, r2
- 8007d38: d00e beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007d3a: 687b ldr r3, [r7, #4]
- 8007d3c: 681b ldr r3, [r3, #0]
- 8007d3e: 4a53 ldr r2, [pc, #332] @ (8007e8c <HAL_DMA_Init+0x1ec>)
- 8007d40: 4293 cmp r3, r2
- 8007d42: d009 beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007d44: 687b ldr r3, [r7, #4]
- 8007d46: 681b ldr r3, [r3, #0]
- 8007d48: 4a51 ldr r2, [pc, #324] @ (8007e90 <HAL_DMA_Init+0x1f0>)
- 8007d4a: 4293 cmp r3, r2
- 8007d4c: d004 beq.n 8007d58 <HAL_DMA_Init+0xb8>
- 8007d4e: 687b ldr r3, [r7, #4]
- 8007d50: 681b ldr r3, [r3, #0]
- 8007d52: 4a50 ldr r2, [pc, #320] @ (8007e94 <HAL_DMA_Init+0x1f4>)
- 8007d54: 4293 cmp r3, r2
- 8007d56: d101 bne.n 8007d5c <HAL_DMA_Init+0xbc>
- 8007d58: 2301 movs r3, #1
- 8007d5a: e000 b.n 8007d5e <HAL_DMA_Init+0xbe>
- 8007d5c: 2300 movs r3, #0
- 8007d5e: 2b00 cmp r3, #0
- 8007d60: f000 813b beq.w 8007fda <HAL_DMA_Init+0x33a>
- assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
- assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
- }
- /* Change DMA peripheral state */
- hdma->State = HAL_DMA_STATE_BUSY;
- 8007d64: 687b ldr r3, [r7, #4]
- 8007d66: 2202 movs r2, #2
- 8007d68: f883 2035 strb.w r2, [r3, #53] @ 0x35
- /* Allocate lock resource */
- __HAL_UNLOCK(hdma);
- 8007d6c: 687b ldr r3, [r7, #4]
- 8007d6e: 2200 movs r2, #0
- 8007d70: f883 2034 strb.w r2, [r3, #52] @ 0x34
- /* Disable the peripheral */
- __HAL_DMA_DISABLE(hdma);
- 8007d74: 687b ldr r3, [r7, #4]
- 8007d76: 681b ldr r3, [r3, #0]
- 8007d78: 4a37 ldr r2, [pc, #220] @ (8007e58 <HAL_DMA_Init+0x1b8>)
- 8007d7a: 4293 cmp r3, r2
- 8007d7c: d04a beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007d7e: 687b ldr r3, [r7, #4]
- 8007d80: 681b ldr r3, [r3, #0]
- 8007d82: 4a36 ldr r2, [pc, #216] @ (8007e5c <HAL_DMA_Init+0x1bc>)
- 8007d84: 4293 cmp r3, r2
- 8007d86: d045 beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007d88: 687b ldr r3, [r7, #4]
- 8007d8a: 681b ldr r3, [r3, #0]
- 8007d8c: 4a34 ldr r2, [pc, #208] @ (8007e60 <HAL_DMA_Init+0x1c0>)
- 8007d8e: 4293 cmp r3, r2
- 8007d90: d040 beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007d92: 687b ldr r3, [r7, #4]
- 8007d94: 681b ldr r3, [r3, #0]
- 8007d96: 4a33 ldr r2, [pc, #204] @ (8007e64 <HAL_DMA_Init+0x1c4>)
- 8007d98: 4293 cmp r3, r2
- 8007d9a: d03b beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007d9c: 687b ldr r3, [r7, #4]
- 8007d9e: 681b ldr r3, [r3, #0]
- 8007da0: 4a31 ldr r2, [pc, #196] @ (8007e68 <HAL_DMA_Init+0x1c8>)
- 8007da2: 4293 cmp r3, r2
- 8007da4: d036 beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007da6: 687b ldr r3, [r7, #4]
- 8007da8: 681b ldr r3, [r3, #0]
- 8007daa: 4a30 ldr r2, [pc, #192] @ (8007e6c <HAL_DMA_Init+0x1cc>)
- 8007dac: 4293 cmp r3, r2
- 8007dae: d031 beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007db0: 687b ldr r3, [r7, #4]
- 8007db2: 681b ldr r3, [r3, #0]
- 8007db4: 4a2e ldr r2, [pc, #184] @ (8007e70 <HAL_DMA_Init+0x1d0>)
- 8007db6: 4293 cmp r3, r2
- 8007db8: d02c beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007dba: 687b ldr r3, [r7, #4]
- 8007dbc: 681b ldr r3, [r3, #0]
- 8007dbe: 4a2d ldr r2, [pc, #180] @ (8007e74 <HAL_DMA_Init+0x1d4>)
- 8007dc0: 4293 cmp r3, r2
- 8007dc2: d027 beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007dc4: 687b ldr r3, [r7, #4]
- 8007dc6: 681b ldr r3, [r3, #0]
- 8007dc8: 4a2b ldr r2, [pc, #172] @ (8007e78 <HAL_DMA_Init+0x1d8>)
- 8007dca: 4293 cmp r3, r2
- 8007dcc: d022 beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007dce: 687b ldr r3, [r7, #4]
- 8007dd0: 681b ldr r3, [r3, #0]
- 8007dd2: 4a2a ldr r2, [pc, #168] @ (8007e7c <HAL_DMA_Init+0x1dc>)
- 8007dd4: 4293 cmp r3, r2
- 8007dd6: d01d beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007dd8: 687b ldr r3, [r7, #4]
- 8007dda: 681b ldr r3, [r3, #0]
- 8007ddc: 4a28 ldr r2, [pc, #160] @ (8007e80 <HAL_DMA_Init+0x1e0>)
- 8007dde: 4293 cmp r3, r2
- 8007de0: d018 beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007de2: 687b ldr r3, [r7, #4]
- 8007de4: 681b ldr r3, [r3, #0]
- 8007de6: 4a27 ldr r2, [pc, #156] @ (8007e84 <HAL_DMA_Init+0x1e4>)
- 8007de8: 4293 cmp r3, r2
- 8007dea: d013 beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007dec: 687b ldr r3, [r7, #4]
- 8007dee: 681b ldr r3, [r3, #0]
- 8007df0: 4a25 ldr r2, [pc, #148] @ (8007e88 <HAL_DMA_Init+0x1e8>)
- 8007df2: 4293 cmp r3, r2
- 8007df4: d00e beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007df6: 687b ldr r3, [r7, #4]
- 8007df8: 681b ldr r3, [r3, #0]
- 8007dfa: 4a24 ldr r2, [pc, #144] @ (8007e8c <HAL_DMA_Init+0x1ec>)
- 8007dfc: 4293 cmp r3, r2
- 8007dfe: d009 beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007e00: 687b ldr r3, [r7, #4]
- 8007e02: 681b ldr r3, [r3, #0]
- 8007e04: 4a22 ldr r2, [pc, #136] @ (8007e90 <HAL_DMA_Init+0x1f0>)
- 8007e06: 4293 cmp r3, r2
- 8007e08: d004 beq.n 8007e14 <HAL_DMA_Init+0x174>
- 8007e0a: 687b ldr r3, [r7, #4]
- 8007e0c: 681b ldr r3, [r3, #0]
- 8007e0e: 4a21 ldr r2, [pc, #132] @ (8007e94 <HAL_DMA_Init+0x1f4>)
- 8007e10: 4293 cmp r3, r2
- 8007e12: d108 bne.n 8007e26 <HAL_DMA_Init+0x186>
- 8007e14: 687b ldr r3, [r7, #4]
- 8007e16: 681b ldr r3, [r3, #0]
- 8007e18: 681a ldr r2, [r3, #0]
- 8007e1a: 687b ldr r3, [r7, #4]
- 8007e1c: 681b ldr r3, [r3, #0]
- 8007e1e: f022 0201 bic.w r2, r2, #1
- 8007e22: 601a str r2, [r3, #0]
- 8007e24: e007 b.n 8007e36 <HAL_DMA_Init+0x196>
- 8007e26: 687b ldr r3, [r7, #4]
- 8007e28: 681b ldr r3, [r3, #0]
- 8007e2a: 681a ldr r2, [r3, #0]
- 8007e2c: 687b ldr r3, [r7, #4]
- 8007e2e: 681b ldr r3, [r3, #0]
- 8007e30: f022 0201 bic.w r2, r2, #1
- 8007e34: 601a str r2, [r3, #0]
- /* Check if the DMA Stream is effectively disabled */
- while((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
- 8007e36: e02f b.n 8007e98 <HAL_DMA_Init+0x1f8>
- {
- /* Check for the Timeout */
- if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
- 8007e38: f7fd fb96 bl 8005568 <HAL_GetTick>
- 8007e3c: 4602 mov r2, r0
- 8007e3e: 693b ldr r3, [r7, #16]
- 8007e40: 1ad3 subs r3, r2, r3
- 8007e42: 2b05 cmp r3, #5
- 8007e44: d928 bls.n 8007e98 <HAL_DMA_Init+0x1f8>
- {
- /* Update error code */
- hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
- 8007e46: 687b ldr r3, [r7, #4]
- 8007e48: 2220 movs r2, #32
- 8007e4a: 655a str r2, [r3, #84] @ 0x54
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_ERROR;
- 8007e4c: 687b ldr r3, [r7, #4]
- 8007e4e: 2203 movs r2, #3
- 8007e50: f883 2035 strb.w r2, [r3, #53] @ 0x35
- return HAL_ERROR;
- 8007e54: 2301 movs r3, #1
- 8007e56: e246 b.n 80082e6 <HAL_DMA_Init+0x646>
- 8007e58: 40020010 .word 0x40020010
- 8007e5c: 40020028 .word 0x40020028
- 8007e60: 40020040 .word 0x40020040
- 8007e64: 40020058 .word 0x40020058
- 8007e68: 40020070 .word 0x40020070
- 8007e6c: 40020088 .word 0x40020088
- 8007e70: 400200a0 .word 0x400200a0
- 8007e74: 400200b8 .word 0x400200b8
- 8007e78: 40020410 .word 0x40020410
- 8007e7c: 40020428 .word 0x40020428
- 8007e80: 40020440 .word 0x40020440
- 8007e84: 40020458 .word 0x40020458
- 8007e88: 40020470 .word 0x40020470
- 8007e8c: 40020488 .word 0x40020488
- 8007e90: 400204a0 .word 0x400204a0
- 8007e94: 400204b8 .word 0x400204b8
- while((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
- 8007e98: 687b ldr r3, [r7, #4]
- 8007e9a: 681b ldr r3, [r3, #0]
- 8007e9c: 681b ldr r3, [r3, #0]
- 8007e9e: f003 0301 and.w r3, r3, #1
- 8007ea2: 2b00 cmp r3, #0
- 8007ea4: d1c8 bne.n 8007e38 <HAL_DMA_Init+0x198>
- }
- }
- /* Get the CR register value */
- registerValue = ((DMA_Stream_TypeDef *)hdma->Instance)->CR;
- 8007ea6: 687b ldr r3, [r7, #4]
- 8007ea8: 681b ldr r3, [r3, #0]
- 8007eaa: 681b ldr r3, [r3, #0]
- 8007eac: 617b str r3, [r7, #20]
- /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */
- registerValue &= ((uint32_t)~(DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
- 8007eae: 697a ldr r2, [r7, #20]
- 8007eb0: 4b83 ldr r3, [pc, #524] @ (80080c0 <HAL_DMA_Init+0x420>)
- 8007eb2: 4013 ands r3, r2
- 8007eb4: 617b str r3, [r7, #20]
- DMA_SxCR_PL | DMA_SxCR_MSIZE | DMA_SxCR_PSIZE | \
- DMA_SxCR_MINC | DMA_SxCR_PINC | DMA_SxCR_CIRC | \
- DMA_SxCR_DIR | DMA_SxCR_CT | DMA_SxCR_DBM));
- /* Prepare the DMA Stream configuration */
- registerValue |= hdma->Init.Direction |
- 8007eb6: 687b ldr r3, [r7, #4]
- 8007eb8: 689a ldr r2, [r3, #8]
- hdma->Init.PeriphInc | hdma->Init.MemInc |
- 8007eba: 687b ldr r3, [r7, #4]
- 8007ebc: 68db ldr r3, [r3, #12]
- registerValue |= hdma->Init.Direction |
- 8007ebe: 431a orrs r2, r3
- hdma->Init.PeriphInc | hdma->Init.MemInc |
- 8007ec0: 687b ldr r3, [r7, #4]
- 8007ec2: 691b ldr r3, [r3, #16]
- 8007ec4: 431a orrs r2, r3
- hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
- 8007ec6: 687b ldr r3, [r7, #4]
- 8007ec8: 695b ldr r3, [r3, #20]
- hdma->Init.PeriphInc | hdma->Init.MemInc |
- 8007eca: 431a orrs r2, r3
- hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
- 8007ecc: 687b ldr r3, [r7, #4]
- 8007ece: 699b ldr r3, [r3, #24]
- 8007ed0: 431a orrs r2, r3
- hdma->Init.Mode | hdma->Init.Priority;
- 8007ed2: 687b ldr r3, [r7, #4]
- 8007ed4: 69db ldr r3, [r3, #28]
- hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
- 8007ed6: 431a orrs r2, r3
- hdma->Init.Mode | hdma->Init.Priority;
- 8007ed8: 687b ldr r3, [r7, #4]
- 8007eda: 6a1b ldr r3, [r3, #32]
- 8007edc: 4313 orrs r3, r2
- registerValue |= hdma->Init.Direction |
- 8007ede: 697a ldr r2, [r7, #20]
- 8007ee0: 4313 orrs r3, r2
- 8007ee2: 617b str r3, [r7, #20]
- /* the Memory burst and peripheral burst are not used when the FIFO is disabled */
- if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
- 8007ee4: 687b ldr r3, [r7, #4]
- 8007ee6: 6a5b ldr r3, [r3, #36] @ 0x24
- 8007ee8: 2b04 cmp r3, #4
- 8007eea: d107 bne.n 8007efc <HAL_DMA_Init+0x25c>
- {
- /* Get memory burst and peripheral burst */
- registerValue |= hdma->Init.MemBurst | hdma->Init.PeriphBurst;
- 8007eec: 687b ldr r3, [r7, #4]
- 8007eee: 6ada ldr r2, [r3, #44] @ 0x2c
- 8007ef0: 687b ldr r3, [r7, #4]
- 8007ef2: 6b1b ldr r3, [r3, #48] @ 0x30
- 8007ef4: 4313 orrs r3, r2
- 8007ef6: 697a ldr r2, [r7, #20]
- 8007ef8: 4313 orrs r3, r2
- 8007efa: 617b str r3, [r7, #20]
- }
- /* Work around for Errata 2.22: UART/USART- DMA transfer lock: DMA stream could be
- lock when transferring data to/from USART/UART */
- #if (STM32H7_DEV_ID == 0x450UL)
- if((DBGMCU->IDCODE & 0xFFFF0000U) >= 0x20000000U)
- 8007efc: 4b71 ldr r3, [pc, #452] @ (80080c4 <HAL_DMA_Init+0x424>)
- 8007efe: 681a ldr r2, [r3, #0]
- 8007f00: 4b71 ldr r3, [pc, #452] @ (80080c8 <HAL_DMA_Init+0x428>)
- 8007f02: 4013 ands r3, r2
- 8007f04: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 8007f08: d328 bcc.n 8007f5c <HAL_DMA_Init+0x2bc>
- {
- #endif /* STM32H7_DEV_ID == 0x450UL */
- if(IS_DMA_UART_USART_REQUEST(hdma->Init.Request) != 0U)
- 8007f0a: 687b ldr r3, [r7, #4]
- 8007f0c: 685b ldr r3, [r3, #4]
- 8007f0e: 2b28 cmp r3, #40 @ 0x28
- 8007f10: d903 bls.n 8007f1a <HAL_DMA_Init+0x27a>
- 8007f12: 687b ldr r3, [r7, #4]
- 8007f14: 685b ldr r3, [r3, #4]
- 8007f16: 2b2e cmp r3, #46 @ 0x2e
- 8007f18: d917 bls.n 8007f4a <HAL_DMA_Init+0x2aa>
- 8007f1a: 687b ldr r3, [r7, #4]
- 8007f1c: 685b ldr r3, [r3, #4]
- 8007f1e: 2b3e cmp r3, #62 @ 0x3e
- 8007f20: d903 bls.n 8007f2a <HAL_DMA_Init+0x28a>
- 8007f22: 687b ldr r3, [r7, #4]
- 8007f24: 685b ldr r3, [r3, #4]
- 8007f26: 2b42 cmp r3, #66 @ 0x42
- 8007f28: d90f bls.n 8007f4a <HAL_DMA_Init+0x2aa>
- 8007f2a: 687b ldr r3, [r7, #4]
- 8007f2c: 685b ldr r3, [r3, #4]
- 8007f2e: 2b46 cmp r3, #70 @ 0x46
- 8007f30: d903 bls.n 8007f3a <HAL_DMA_Init+0x29a>
- 8007f32: 687b ldr r3, [r7, #4]
- 8007f34: 685b ldr r3, [r3, #4]
- 8007f36: 2b48 cmp r3, #72 @ 0x48
- 8007f38: d907 bls.n 8007f4a <HAL_DMA_Init+0x2aa>
- 8007f3a: 687b ldr r3, [r7, #4]
- 8007f3c: 685b ldr r3, [r3, #4]
- 8007f3e: 2b4e cmp r3, #78 @ 0x4e
- 8007f40: d905 bls.n 8007f4e <HAL_DMA_Init+0x2ae>
- 8007f42: 687b ldr r3, [r7, #4]
- 8007f44: 685b ldr r3, [r3, #4]
- 8007f46: 2b52 cmp r3, #82 @ 0x52
- 8007f48: d801 bhi.n 8007f4e <HAL_DMA_Init+0x2ae>
- 8007f4a: 2301 movs r3, #1
- 8007f4c: e000 b.n 8007f50 <HAL_DMA_Init+0x2b0>
- 8007f4e: 2300 movs r3, #0
- 8007f50: 2b00 cmp r3, #0
- 8007f52: d003 beq.n 8007f5c <HAL_DMA_Init+0x2bc>
- {
- registerValue |= DMA_SxCR_TRBUFF;
- 8007f54: 697b ldr r3, [r7, #20]
- 8007f56: f443 1380 orr.w r3, r3, #1048576 @ 0x100000
- 8007f5a: 617b str r3, [r7, #20]
- #if (STM32H7_DEV_ID == 0x450UL)
- }
- #endif /* STM32H7_DEV_ID == 0x450UL */
- /* Write to DMA Stream CR register */
- ((DMA_Stream_TypeDef *)hdma->Instance)->CR = registerValue;
- 8007f5c: 687b ldr r3, [r7, #4]
- 8007f5e: 681b ldr r3, [r3, #0]
- 8007f60: 697a ldr r2, [r7, #20]
- 8007f62: 601a str r2, [r3, #0]
- /* Get the FCR register value */
- registerValue = ((DMA_Stream_TypeDef *)hdma->Instance)->FCR;
- 8007f64: 687b ldr r3, [r7, #4]
- 8007f66: 681b ldr r3, [r3, #0]
- 8007f68: 695b ldr r3, [r3, #20]
- 8007f6a: 617b str r3, [r7, #20]
- /* Clear Direct mode and FIFO threshold bits */
- registerValue &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
- 8007f6c: 697b ldr r3, [r7, #20]
- 8007f6e: f023 0307 bic.w r3, r3, #7
- 8007f72: 617b str r3, [r7, #20]
- /* Prepare the DMA Stream FIFO configuration */
- registerValue |= hdma->Init.FIFOMode;
- 8007f74: 687b ldr r3, [r7, #4]
- 8007f76: 6a5b ldr r3, [r3, #36] @ 0x24
- 8007f78: 697a ldr r2, [r7, #20]
- 8007f7a: 4313 orrs r3, r2
- 8007f7c: 617b str r3, [r7, #20]
- /* the FIFO threshold is not used when the FIFO mode is disabled */
- if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
- 8007f7e: 687b ldr r3, [r7, #4]
- 8007f80: 6a5b ldr r3, [r3, #36] @ 0x24
- 8007f82: 2b04 cmp r3, #4
- 8007f84: d117 bne.n 8007fb6 <HAL_DMA_Init+0x316>
- {
- /* Get the FIFO threshold */
- registerValue |= hdma->Init.FIFOThreshold;
- 8007f86: 687b ldr r3, [r7, #4]
- 8007f88: 6a9b ldr r3, [r3, #40] @ 0x28
- 8007f8a: 697a ldr r2, [r7, #20]
- 8007f8c: 4313 orrs r3, r2
- 8007f8e: 617b str r3, [r7, #20]
- /* Check compatibility between FIFO threshold level and size of the memory burst */
- /* for INCR4, INCR8, INCR16 */
- if(hdma->Init.MemBurst != DMA_MBURST_SINGLE)
- 8007f90: 687b ldr r3, [r7, #4]
- 8007f92: 6adb ldr r3, [r3, #44] @ 0x2c
- 8007f94: 2b00 cmp r3, #0
- 8007f96: d00e beq.n 8007fb6 <HAL_DMA_Init+0x316>
- {
- if (DMA_CheckFifoParam(hdma) != HAL_OK)
- 8007f98: 6878 ldr r0, [r7, #4]
- 8007f9a: f002 fb33 bl 800a604 <DMA_CheckFifoParam>
- 8007f9e: 4603 mov r3, r0
- 8007fa0: 2b00 cmp r3, #0
- 8007fa2: d008 beq.n 8007fb6 <HAL_DMA_Init+0x316>
- {
- /* Update error code */
- hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
- 8007fa4: 687b ldr r3, [r7, #4]
- 8007fa6: 2240 movs r2, #64 @ 0x40
- 8007fa8: 655a str r2, [r3, #84] @ 0x54
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
- 8007faa: 687b ldr r3, [r7, #4]
- 8007fac: 2201 movs r2, #1
- 8007fae: f883 2035 strb.w r2, [r3, #53] @ 0x35
- return HAL_ERROR;
- 8007fb2: 2301 movs r3, #1
- 8007fb4: e197 b.n 80082e6 <HAL_DMA_Init+0x646>
- }
- }
- }
- /* Write to DMA Stream FCR */
- ((DMA_Stream_TypeDef *)hdma->Instance)->FCR = registerValue;
- 8007fb6: 687b ldr r3, [r7, #4]
- 8007fb8: 681b ldr r3, [r3, #0]
- 8007fba: 697a ldr r2, [r7, #20]
- 8007fbc: 615a str r2, [r3, #20]
- /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
- DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
- regs_dma = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
- 8007fbe: 6878 ldr r0, [r7, #4]
- 8007fc0: f002 fa6e bl 800a4a0 <DMA_CalcBaseAndBitshift>
- 8007fc4: 4603 mov r3, r0
- 8007fc6: 60bb str r3, [r7, #8]
- /* Clear all interrupt flags */
- regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
- 8007fc8: 687b ldr r3, [r7, #4]
- 8007fca: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8007fcc: f003 031f and.w r3, r3, #31
- 8007fd0: 223f movs r2, #63 @ 0x3f
- 8007fd2: 409a lsls r2, r3
- 8007fd4: 68bb ldr r3, [r7, #8]
- 8007fd6: 609a str r2, [r3, #8]
- 8007fd8: e0cd b.n 8008176 <HAL_DMA_Init+0x4d6>
- }
- else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */
- 8007fda: 687b ldr r3, [r7, #4]
- 8007fdc: 681b ldr r3, [r3, #0]
- 8007fde: 4a3b ldr r2, [pc, #236] @ (80080cc <HAL_DMA_Init+0x42c>)
- 8007fe0: 4293 cmp r3, r2
- 8007fe2: d022 beq.n 800802a <HAL_DMA_Init+0x38a>
- 8007fe4: 687b ldr r3, [r7, #4]
- 8007fe6: 681b ldr r3, [r3, #0]
- 8007fe8: 4a39 ldr r2, [pc, #228] @ (80080d0 <HAL_DMA_Init+0x430>)
- 8007fea: 4293 cmp r3, r2
- 8007fec: d01d beq.n 800802a <HAL_DMA_Init+0x38a>
- 8007fee: 687b ldr r3, [r7, #4]
- 8007ff0: 681b ldr r3, [r3, #0]
- 8007ff2: 4a38 ldr r2, [pc, #224] @ (80080d4 <HAL_DMA_Init+0x434>)
- 8007ff4: 4293 cmp r3, r2
- 8007ff6: d018 beq.n 800802a <HAL_DMA_Init+0x38a>
- 8007ff8: 687b ldr r3, [r7, #4]
- 8007ffa: 681b ldr r3, [r3, #0]
- 8007ffc: 4a36 ldr r2, [pc, #216] @ (80080d8 <HAL_DMA_Init+0x438>)
- 8007ffe: 4293 cmp r3, r2
- 8008000: d013 beq.n 800802a <HAL_DMA_Init+0x38a>
- 8008002: 687b ldr r3, [r7, #4]
- 8008004: 681b ldr r3, [r3, #0]
- 8008006: 4a35 ldr r2, [pc, #212] @ (80080dc <HAL_DMA_Init+0x43c>)
- 8008008: 4293 cmp r3, r2
- 800800a: d00e beq.n 800802a <HAL_DMA_Init+0x38a>
- 800800c: 687b ldr r3, [r7, #4]
- 800800e: 681b ldr r3, [r3, #0]
- 8008010: 4a33 ldr r2, [pc, #204] @ (80080e0 <HAL_DMA_Init+0x440>)
- 8008012: 4293 cmp r3, r2
- 8008014: d009 beq.n 800802a <HAL_DMA_Init+0x38a>
- 8008016: 687b ldr r3, [r7, #4]
- 8008018: 681b ldr r3, [r3, #0]
- 800801a: 4a32 ldr r2, [pc, #200] @ (80080e4 <HAL_DMA_Init+0x444>)
- 800801c: 4293 cmp r3, r2
- 800801e: d004 beq.n 800802a <HAL_DMA_Init+0x38a>
- 8008020: 687b ldr r3, [r7, #4]
- 8008022: 681b ldr r3, [r3, #0]
- 8008024: 4a30 ldr r2, [pc, #192] @ (80080e8 <HAL_DMA_Init+0x448>)
- 8008026: 4293 cmp r3, r2
- 8008028: d101 bne.n 800802e <HAL_DMA_Init+0x38e>
- 800802a: 2301 movs r3, #1
- 800802c: e000 b.n 8008030 <HAL_DMA_Init+0x390>
- 800802e: 2300 movs r3, #0
- 8008030: 2b00 cmp r3, #0
- 8008032: f000 8097 beq.w 8008164 <HAL_DMA_Init+0x4c4>
- {
- if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
- 8008036: 687b ldr r3, [r7, #4]
- 8008038: 681b ldr r3, [r3, #0]
- 800803a: 4a24 ldr r2, [pc, #144] @ (80080cc <HAL_DMA_Init+0x42c>)
- 800803c: 4293 cmp r3, r2
- 800803e: d021 beq.n 8008084 <HAL_DMA_Init+0x3e4>
- 8008040: 687b ldr r3, [r7, #4]
- 8008042: 681b ldr r3, [r3, #0]
- 8008044: 4a22 ldr r2, [pc, #136] @ (80080d0 <HAL_DMA_Init+0x430>)
- 8008046: 4293 cmp r3, r2
- 8008048: d01c beq.n 8008084 <HAL_DMA_Init+0x3e4>
- 800804a: 687b ldr r3, [r7, #4]
- 800804c: 681b ldr r3, [r3, #0]
- 800804e: 4a21 ldr r2, [pc, #132] @ (80080d4 <HAL_DMA_Init+0x434>)
- 8008050: 4293 cmp r3, r2
- 8008052: d017 beq.n 8008084 <HAL_DMA_Init+0x3e4>
- 8008054: 687b ldr r3, [r7, #4]
- 8008056: 681b ldr r3, [r3, #0]
- 8008058: 4a1f ldr r2, [pc, #124] @ (80080d8 <HAL_DMA_Init+0x438>)
- 800805a: 4293 cmp r3, r2
- 800805c: d012 beq.n 8008084 <HAL_DMA_Init+0x3e4>
- 800805e: 687b ldr r3, [r7, #4]
- 8008060: 681b ldr r3, [r3, #0]
- 8008062: 4a1e ldr r2, [pc, #120] @ (80080dc <HAL_DMA_Init+0x43c>)
- 8008064: 4293 cmp r3, r2
- 8008066: d00d beq.n 8008084 <HAL_DMA_Init+0x3e4>
- 8008068: 687b ldr r3, [r7, #4]
- 800806a: 681b ldr r3, [r3, #0]
- 800806c: 4a1c ldr r2, [pc, #112] @ (80080e0 <HAL_DMA_Init+0x440>)
- 800806e: 4293 cmp r3, r2
- 8008070: d008 beq.n 8008084 <HAL_DMA_Init+0x3e4>
- 8008072: 687b ldr r3, [r7, #4]
- 8008074: 681b ldr r3, [r3, #0]
- 8008076: 4a1b ldr r2, [pc, #108] @ (80080e4 <HAL_DMA_Init+0x444>)
- 8008078: 4293 cmp r3, r2
- 800807a: d003 beq.n 8008084 <HAL_DMA_Init+0x3e4>
- 800807c: 687b ldr r3, [r7, #4]
- 800807e: 681b ldr r3, [r3, #0]
- 8008080: 4a19 ldr r2, [pc, #100] @ (80080e8 <HAL_DMA_Init+0x448>)
- 8008082: 4293 cmp r3, r2
- /* Check the request parameter */
- assert_param(IS_BDMA_REQUEST(hdma->Init.Request));
- }
- /* Change DMA peripheral state */
- hdma->State = HAL_DMA_STATE_BUSY;
- 8008084: 687b ldr r3, [r7, #4]
- 8008086: 2202 movs r2, #2
- 8008088: f883 2035 strb.w r2, [r3, #53] @ 0x35
- /* Allocate lock resource */
- __HAL_UNLOCK(hdma);
- 800808c: 687b ldr r3, [r7, #4]
- 800808e: 2200 movs r2, #0
- 8008090: f883 2034 strb.w r2, [r3, #52] @ 0x34
- /* Get the CR register value */
- registerValue = ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR;
- 8008094: 687b ldr r3, [r7, #4]
- 8008096: 681b ldr r3, [r3, #0]
- 8008098: 681b ldr r3, [r3, #0]
- 800809a: 617b str r3, [r7, #20]
- /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, MEM2MEM, DBM and CT bits */
- registerValue &= ((uint32_t)~(BDMA_CCR_PL | BDMA_CCR_MSIZE | BDMA_CCR_PSIZE | \
- 800809c: 697a ldr r2, [r7, #20]
- 800809e: 4b13 ldr r3, [pc, #76] @ (80080ec <HAL_DMA_Init+0x44c>)
- 80080a0: 4013 ands r3, r2
- 80080a2: 617b str r3, [r7, #20]
- BDMA_CCR_MINC | BDMA_CCR_PINC | BDMA_CCR_CIRC | \
- BDMA_CCR_DIR | BDMA_CCR_MEM2MEM | BDMA_CCR_DBM | \
- BDMA_CCR_CT));
- /* Prepare the DMA Channel configuration */
- registerValue |= DMA_TO_BDMA_DIRECTION(hdma->Init.Direction) |
- 80080a4: 687b ldr r3, [r7, #4]
- 80080a6: 689b ldr r3, [r3, #8]
- 80080a8: 2b40 cmp r3, #64 @ 0x40
- 80080aa: d021 beq.n 80080f0 <HAL_DMA_Init+0x450>
- 80080ac: 687b ldr r3, [r7, #4]
- 80080ae: 689b ldr r3, [r3, #8]
- 80080b0: 2b80 cmp r3, #128 @ 0x80
- 80080b2: d102 bne.n 80080ba <HAL_DMA_Init+0x41a>
- 80080b4: f44f 4380 mov.w r3, #16384 @ 0x4000
- 80080b8: e01b b.n 80080f2 <HAL_DMA_Init+0x452>
- 80080ba: 2300 movs r3, #0
- 80080bc: e019 b.n 80080f2 <HAL_DMA_Init+0x452>
- 80080be: bf00 nop
- 80080c0: fe10803f .word 0xfe10803f
- 80080c4: 5c001000 .word 0x5c001000
- 80080c8: ffff0000 .word 0xffff0000
- 80080cc: 58025408 .word 0x58025408
- 80080d0: 5802541c .word 0x5802541c
- 80080d4: 58025430 .word 0x58025430
- 80080d8: 58025444 .word 0x58025444
- 80080dc: 58025458 .word 0x58025458
- 80080e0: 5802546c .word 0x5802546c
- 80080e4: 58025480 .word 0x58025480
- 80080e8: 58025494 .word 0x58025494
- 80080ec: fffe000f .word 0xfffe000f
- 80080f0: 2310 movs r3, #16
- DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc) |
- 80080f2: 687a ldr r2, [r7, #4]
- 80080f4: 68d2 ldr r2, [r2, #12]
- 80080f6: 08d2 lsrs r2, r2, #3
- registerValue |= DMA_TO_BDMA_DIRECTION(hdma->Init.Direction) |
- 80080f8: 431a orrs r2, r3
- DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc) |
- 80080fa: 687b ldr r3, [r7, #4]
- 80080fc: 691b ldr r3, [r3, #16]
- 80080fe: 08db lsrs r3, r3, #3
- DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc) |
- 8008100: 431a orrs r2, r3
- DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) |
- 8008102: 687b ldr r3, [r7, #4]
- 8008104: 695b ldr r3, [r3, #20]
- 8008106: 08db lsrs r3, r3, #3
- DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc) |
- 8008108: 431a orrs r2, r3
- DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment) |
- 800810a: 687b ldr r3, [r7, #4]
- 800810c: 699b ldr r3, [r3, #24]
- 800810e: 08db lsrs r3, r3, #3
- DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) |
- 8008110: 431a orrs r2, r3
- DMA_TO_BDMA_MODE(hdma->Init.Mode) |
- 8008112: 687b ldr r3, [r7, #4]
- 8008114: 69db ldr r3, [r3, #28]
- 8008116: 08db lsrs r3, r3, #3
- DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment) |
- 8008118: 431a orrs r2, r3
- DMA_TO_BDMA_PRIORITY(hdma->Init.Priority);
- 800811a: 687b ldr r3, [r7, #4]
- 800811c: 6a1b ldr r3, [r3, #32]
- 800811e: 091b lsrs r3, r3, #4
- DMA_TO_BDMA_MODE(hdma->Init.Mode) |
- 8008120: 4313 orrs r3, r2
- registerValue |= DMA_TO_BDMA_DIRECTION(hdma->Init.Direction) |
- 8008122: 697a ldr r2, [r7, #20]
- 8008124: 4313 orrs r3, r2
- 8008126: 617b str r3, [r7, #20]
- /* Write to DMA Channel CR register */
- ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR = registerValue;
- 8008128: 687b ldr r3, [r7, #4]
- 800812a: 681b ldr r3, [r3, #0]
- 800812c: 697a ldr r2, [r7, #20]
- 800812e: 601a str r2, [r3, #0]
- /* calculation of the channel index */
- hdma->StreamIndex = (((uint32_t)((uint32_t*)hdma->Instance) - (uint32_t)BDMA_Channel0) / ((uint32_t)BDMA_Channel1 - (uint32_t)BDMA_Channel0)) << 2U;
- 8008130: 687b ldr r3, [r7, #4]
- 8008132: 681b ldr r3, [r3, #0]
- 8008134: 461a mov r2, r3
- 8008136: 4b6e ldr r3, [pc, #440] @ (80082f0 <HAL_DMA_Init+0x650>)
- 8008138: 4413 add r3, r2
- 800813a: 4a6e ldr r2, [pc, #440] @ (80082f4 <HAL_DMA_Init+0x654>)
- 800813c: fba2 2303 umull r2, r3, r2, r3
- 8008140: 091b lsrs r3, r3, #4
- 8008142: 009a lsls r2, r3, #2
- 8008144: 687b ldr r3, [r7, #4]
- 8008146: 65da str r2, [r3, #92] @ 0x5c
- /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
- DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
- regs_bdma = (BDMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
- 8008148: 6878 ldr r0, [r7, #4]
- 800814a: f002 f9a9 bl 800a4a0 <DMA_CalcBaseAndBitshift>
- 800814e: 4603 mov r3, r0
- 8008150: 60fb str r3, [r7, #12]
- /* Clear all interrupt flags */
- regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
- 8008152: 687b ldr r3, [r7, #4]
- 8008154: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8008156: f003 031f and.w r3, r3, #31
- 800815a: 2201 movs r2, #1
- 800815c: 409a lsls r2, r3
- 800815e: 68fb ldr r3, [r7, #12]
- 8008160: 605a str r2, [r3, #4]
- 8008162: e008 b.n 8008176 <HAL_DMA_Init+0x4d6>
- }
- else
- {
- hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
- 8008164: 687b ldr r3, [r7, #4]
- 8008166: 2240 movs r2, #64 @ 0x40
- 8008168: 655a str r2, [r3, #84] @ 0x54
- hdma->State = HAL_DMA_STATE_ERROR;
- 800816a: 687b ldr r3, [r7, #4]
- 800816c: 2203 movs r2, #3
- 800816e: f883 2035 strb.w r2, [r3, #53] @ 0x35
- return HAL_ERROR;
- 8008172: 2301 movs r3, #1
- 8008174: e0b7 b.n 80082e6 <HAL_DMA_Init+0x646>
- }
- if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
- 8008176: 687b ldr r3, [r7, #4]
- 8008178: 681b ldr r3, [r3, #0]
- 800817a: 4a5f ldr r2, [pc, #380] @ (80082f8 <HAL_DMA_Init+0x658>)
- 800817c: 4293 cmp r3, r2
- 800817e: d072 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 8008180: 687b ldr r3, [r7, #4]
- 8008182: 681b ldr r3, [r3, #0]
- 8008184: 4a5d ldr r2, [pc, #372] @ (80082fc <HAL_DMA_Init+0x65c>)
- 8008186: 4293 cmp r3, r2
- 8008188: d06d beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 800818a: 687b ldr r3, [r7, #4]
- 800818c: 681b ldr r3, [r3, #0]
- 800818e: 4a5c ldr r2, [pc, #368] @ (8008300 <HAL_DMA_Init+0x660>)
- 8008190: 4293 cmp r3, r2
- 8008192: d068 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 8008194: 687b ldr r3, [r7, #4]
- 8008196: 681b ldr r3, [r3, #0]
- 8008198: 4a5a ldr r2, [pc, #360] @ (8008304 <HAL_DMA_Init+0x664>)
- 800819a: 4293 cmp r3, r2
- 800819c: d063 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 800819e: 687b ldr r3, [r7, #4]
- 80081a0: 681b ldr r3, [r3, #0]
- 80081a2: 4a59 ldr r2, [pc, #356] @ (8008308 <HAL_DMA_Init+0x668>)
- 80081a4: 4293 cmp r3, r2
- 80081a6: d05e beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 80081a8: 687b ldr r3, [r7, #4]
- 80081aa: 681b ldr r3, [r3, #0]
- 80081ac: 4a57 ldr r2, [pc, #348] @ (800830c <HAL_DMA_Init+0x66c>)
- 80081ae: 4293 cmp r3, r2
- 80081b0: d059 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 80081b2: 687b ldr r3, [r7, #4]
- 80081b4: 681b ldr r3, [r3, #0]
- 80081b6: 4a56 ldr r2, [pc, #344] @ (8008310 <HAL_DMA_Init+0x670>)
- 80081b8: 4293 cmp r3, r2
- 80081ba: d054 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 80081bc: 687b ldr r3, [r7, #4]
- 80081be: 681b ldr r3, [r3, #0]
- 80081c0: 4a54 ldr r2, [pc, #336] @ (8008314 <HAL_DMA_Init+0x674>)
- 80081c2: 4293 cmp r3, r2
- 80081c4: d04f beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 80081c6: 687b ldr r3, [r7, #4]
- 80081c8: 681b ldr r3, [r3, #0]
- 80081ca: 4a53 ldr r2, [pc, #332] @ (8008318 <HAL_DMA_Init+0x678>)
- 80081cc: 4293 cmp r3, r2
- 80081ce: d04a beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 80081d0: 687b ldr r3, [r7, #4]
- 80081d2: 681b ldr r3, [r3, #0]
- 80081d4: 4a51 ldr r2, [pc, #324] @ (800831c <HAL_DMA_Init+0x67c>)
- 80081d6: 4293 cmp r3, r2
- 80081d8: d045 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 80081da: 687b ldr r3, [r7, #4]
- 80081dc: 681b ldr r3, [r3, #0]
- 80081de: 4a50 ldr r2, [pc, #320] @ (8008320 <HAL_DMA_Init+0x680>)
- 80081e0: 4293 cmp r3, r2
- 80081e2: d040 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 80081e4: 687b ldr r3, [r7, #4]
- 80081e6: 681b ldr r3, [r3, #0]
- 80081e8: 4a4e ldr r2, [pc, #312] @ (8008324 <HAL_DMA_Init+0x684>)
- 80081ea: 4293 cmp r3, r2
- 80081ec: d03b beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 80081ee: 687b ldr r3, [r7, #4]
- 80081f0: 681b ldr r3, [r3, #0]
- 80081f2: 4a4d ldr r2, [pc, #308] @ (8008328 <HAL_DMA_Init+0x688>)
- 80081f4: 4293 cmp r3, r2
- 80081f6: d036 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 80081f8: 687b ldr r3, [r7, #4]
- 80081fa: 681b ldr r3, [r3, #0]
- 80081fc: 4a4b ldr r2, [pc, #300] @ (800832c <HAL_DMA_Init+0x68c>)
- 80081fe: 4293 cmp r3, r2
- 8008200: d031 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 8008202: 687b ldr r3, [r7, #4]
- 8008204: 681b ldr r3, [r3, #0]
- 8008206: 4a4a ldr r2, [pc, #296] @ (8008330 <HAL_DMA_Init+0x690>)
- 8008208: 4293 cmp r3, r2
- 800820a: d02c beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 800820c: 687b ldr r3, [r7, #4]
- 800820e: 681b ldr r3, [r3, #0]
- 8008210: 4a48 ldr r2, [pc, #288] @ (8008334 <HAL_DMA_Init+0x694>)
- 8008212: 4293 cmp r3, r2
- 8008214: d027 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 8008216: 687b ldr r3, [r7, #4]
- 8008218: 681b ldr r3, [r3, #0]
- 800821a: 4a47 ldr r2, [pc, #284] @ (8008338 <HAL_DMA_Init+0x698>)
- 800821c: 4293 cmp r3, r2
- 800821e: d022 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 8008220: 687b ldr r3, [r7, #4]
- 8008222: 681b ldr r3, [r3, #0]
- 8008224: 4a45 ldr r2, [pc, #276] @ (800833c <HAL_DMA_Init+0x69c>)
- 8008226: 4293 cmp r3, r2
- 8008228: d01d beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 800822a: 687b ldr r3, [r7, #4]
- 800822c: 681b ldr r3, [r3, #0]
- 800822e: 4a44 ldr r2, [pc, #272] @ (8008340 <HAL_DMA_Init+0x6a0>)
- 8008230: 4293 cmp r3, r2
- 8008232: d018 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 8008234: 687b ldr r3, [r7, #4]
- 8008236: 681b ldr r3, [r3, #0]
- 8008238: 4a42 ldr r2, [pc, #264] @ (8008344 <HAL_DMA_Init+0x6a4>)
- 800823a: 4293 cmp r3, r2
- 800823c: d013 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 800823e: 687b ldr r3, [r7, #4]
- 8008240: 681b ldr r3, [r3, #0]
- 8008242: 4a41 ldr r2, [pc, #260] @ (8008348 <HAL_DMA_Init+0x6a8>)
- 8008244: 4293 cmp r3, r2
- 8008246: d00e beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 8008248: 687b ldr r3, [r7, #4]
- 800824a: 681b ldr r3, [r3, #0]
- 800824c: 4a3f ldr r2, [pc, #252] @ (800834c <HAL_DMA_Init+0x6ac>)
- 800824e: 4293 cmp r3, r2
- 8008250: d009 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 8008252: 687b ldr r3, [r7, #4]
- 8008254: 681b ldr r3, [r3, #0]
- 8008256: 4a3e ldr r2, [pc, #248] @ (8008350 <HAL_DMA_Init+0x6b0>)
- 8008258: 4293 cmp r3, r2
- 800825a: d004 beq.n 8008266 <HAL_DMA_Init+0x5c6>
- 800825c: 687b ldr r3, [r7, #4]
- 800825e: 681b ldr r3, [r3, #0]
- 8008260: 4a3c ldr r2, [pc, #240] @ (8008354 <HAL_DMA_Init+0x6b4>)
- 8008262: 4293 cmp r3, r2
- 8008264: d101 bne.n 800826a <HAL_DMA_Init+0x5ca>
- 8008266: 2301 movs r3, #1
- 8008268: e000 b.n 800826c <HAL_DMA_Init+0x5cc>
- 800826a: 2300 movs r3, #0
- 800826c: 2b00 cmp r3, #0
- 800826e: d032 beq.n 80082d6 <HAL_DMA_Init+0x636>
- {
- /* Initialize parameters for DMAMUX channel :
- DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask
- */
- DMA_CalcDMAMUXChannelBaseAndMask(hdma);
- 8008270: 6878 ldr r0, [r7, #4]
- 8008272: f002 fa43 bl 800a6fc <DMA_CalcDMAMUXChannelBaseAndMask>
- if(hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
- 8008276: 687b ldr r3, [r7, #4]
- 8008278: 689b ldr r3, [r3, #8]
- 800827a: 2b80 cmp r3, #128 @ 0x80
- 800827c: d102 bne.n 8008284 <HAL_DMA_Init+0x5e4>
- {
- /* if memory to memory force the request to 0*/
- hdma->Init.Request = DMA_REQUEST_MEM2MEM;
- 800827e: 687b ldr r3, [r7, #4]
- 8008280: 2200 movs r2, #0
- 8008282: 605a str r2, [r3, #4]
- }
- /* Set peripheral request to DMAMUX channel */
- hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID);
- 8008284: 687b ldr r3, [r7, #4]
- 8008286: 685a ldr r2, [r3, #4]
- 8008288: 687b ldr r3, [r7, #4]
- 800828a: 6e1b ldr r3, [r3, #96] @ 0x60
- 800828c: b2d2 uxtb r2, r2
- 800828e: 601a str r2, [r3, #0]
- /* Clear the DMAMUX synchro overrun flag */
- hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
- 8008290: 687b ldr r3, [r7, #4]
- 8008292: 6e5b ldr r3, [r3, #100] @ 0x64
- 8008294: 687a ldr r2, [r7, #4]
- 8008296: 6e92 ldr r2, [r2, #104] @ 0x68
- 8008298: 605a str r2, [r3, #4]
- /* Initialize parameters for DMAMUX request generator :
- if the DMA request is DMA_REQUEST_GENERATOR0 to DMA_REQUEST_GENERATOR7
- */
- if((hdma->Init.Request >= DMA_REQUEST_GENERATOR0) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR7))
- 800829a: 687b ldr r3, [r7, #4]
- 800829c: 685b ldr r3, [r3, #4]
- 800829e: 2b00 cmp r3, #0
- 80082a0: d010 beq.n 80082c4 <HAL_DMA_Init+0x624>
- 80082a2: 687b ldr r3, [r7, #4]
- 80082a4: 685b ldr r3, [r3, #4]
- 80082a6: 2b08 cmp r3, #8
- 80082a8: d80c bhi.n 80082c4 <HAL_DMA_Init+0x624>
- {
- /* Initialize parameters for DMAMUX request generator :
- DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask */
- DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);
- 80082aa: 6878 ldr r0, [r7, #4]
- 80082ac: f002 fac0 bl 800a830 <DMA_CalcDMAMUXRequestGenBaseAndMask>
- /* Reset the DMAMUX request generator register */
- hdma->DMAmuxRequestGen->RGCR = 0U;
- 80082b0: 687b ldr r3, [r7, #4]
- 80082b2: 6edb ldr r3, [r3, #108] @ 0x6c
- 80082b4: 2200 movs r2, #0
- 80082b6: 601a str r2, [r3, #0]
- /* Clear the DMAMUX request generator overrun flag */
- hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
- 80082b8: 687b ldr r3, [r7, #4]
- 80082ba: 6f1b ldr r3, [r3, #112] @ 0x70
- 80082bc: 687a ldr r2, [r7, #4]
- 80082be: 6f52 ldr r2, [r2, #116] @ 0x74
- 80082c0: 605a str r2, [r3, #4]
- 80082c2: e008 b.n 80082d6 <HAL_DMA_Init+0x636>
- }
- else
- {
- hdma->DMAmuxRequestGen = 0U;
- 80082c4: 687b ldr r3, [r7, #4]
- 80082c6: 2200 movs r2, #0
- 80082c8: 66da str r2, [r3, #108] @ 0x6c
- hdma->DMAmuxRequestGenStatus = 0U;
- 80082ca: 687b ldr r3, [r7, #4]
- 80082cc: 2200 movs r2, #0
- 80082ce: 671a str r2, [r3, #112] @ 0x70
- hdma->DMAmuxRequestGenStatusMask = 0U;
- 80082d0: 687b ldr r3, [r7, #4]
- 80082d2: 2200 movs r2, #0
- 80082d4: 675a str r2, [r3, #116] @ 0x74
- }
- }
- /* Initialize the error code */
- hdma->ErrorCode = HAL_DMA_ERROR_NONE;
- 80082d6: 687b ldr r3, [r7, #4]
- 80082d8: 2200 movs r2, #0
- 80082da: 655a str r2, [r3, #84] @ 0x54
- /* Initialize the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
- 80082dc: 687b ldr r3, [r7, #4]
- 80082de: 2201 movs r2, #1
- 80082e0: f883 2035 strb.w r2, [r3, #53] @ 0x35
- return HAL_OK;
- 80082e4: 2300 movs r3, #0
- }
- 80082e6: 4618 mov r0, r3
- 80082e8: 3718 adds r7, #24
- 80082ea: 46bd mov sp, r7
- 80082ec: bd80 pop {r7, pc}
- 80082ee: bf00 nop
- 80082f0: a7fdabf8 .word 0xa7fdabf8
- 80082f4: cccccccd .word 0xcccccccd
- 80082f8: 40020010 .word 0x40020010
- 80082fc: 40020028 .word 0x40020028
- 8008300: 40020040 .word 0x40020040
- 8008304: 40020058 .word 0x40020058
- 8008308: 40020070 .word 0x40020070
- 800830c: 40020088 .word 0x40020088
- 8008310: 400200a0 .word 0x400200a0
- 8008314: 400200b8 .word 0x400200b8
- 8008318: 40020410 .word 0x40020410
- 800831c: 40020428 .word 0x40020428
- 8008320: 40020440 .word 0x40020440
- 8008324: 40020458 .word 0x40020458
- 8008328: 40020470 .word 0x40020470
- 800832c: 40020488 .word 0x40020488
- 8008330: 400204a0 .word 0x400204a0
- 8008334: 400204b8 .word 0x400204b8
- 8008338: 58025408 .word 0x58025408
- 800833c: 5802541c .word 0x5802541c
- 8008340: 58025430 .word 0x58025430
- 8008344: 58025444 .word 0x58025444
- 8008348: 58025458 .word 0x58025458
- 800834c: 5802546c .word 0x5802546c
- 8008350: 58025480 .word 0x58025480
- 8008354: 58025494 .word 0x58025494
- 08008358 <HAL_DMA_Start_IT>:
- * @param DstAddress: The destination memory Buffer address
- * @param DataLength: The length of data to be transferred from source to destination
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
- {
- 8008358: b580 push {r7, lr}
- 800835a: b086 sub sp, #24
- 800835c: af00 add r7, sp, #0
- 800835e: 60f8 str r0, [r7, #12]
- 8008360: 60b9 str r1, [r7, #8]
- 8008362: 607a str r2, [r7, #4]
- 8008364: 603b str r3, [r7, #0]
- HAL_StatusTypeDef status = HAL_OK;
- 8008366: 2300 movs r3, #0
- 8008368: 75fb strb r3, [r7, #23]
- /* Check the parameters */
- assert_param(IS_DMA_BUFFER_SIZE(DataLength));
- /* Check the DMA peripheral handle */
- if(hdma == NULL)
- 800836a: 68fb ldr r3, [r7, #12]
- 800836c: 2b00 cmp r3, #0
- 800836e: d101 bne.n 8008374 <HAL_DMA_Start_IT+0x1c>
- {
- return HAL_ERROR;
- 8008370: 2301 movs r3, #1
- 8008372: e226 b.n 80087c2 <HAL_DMA_Start_IT+0x46a>
- }
- /* Process locked */
- __HAL_LOCK(hdma);
- 8008374: 68fb ldr r3, [r7, #12]
- 8008376: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
- 800837a: 2b01 cmp r3, #1
- 800837c: d101 bne.n 8008382 <HAL_DMA_Start_IT+0x2a>
- 800837e: 2302 movs r3, #2
- 8008380: e21f b.n 80087c2 <HAL_DMA_Start_IT+0x46a>
- 8008382: 68fb ldr r3, [r7, #12]
- 8008384: 2201 movs r2, #1
- 8008386: f883 2034 strb.w r2, [r3, #52] @ 0x34
- if(HAL_DMA_STATE_READY == hdma->State)
- 800838a: 68fb ldr r3, [r7, #12]
- 800838c: f893 3035 ldrb.w r3, [r3, #53] @ 0x35
- 8008390: b2db uxtb r3, r3
- 8008392: 2b01 cmp r3, #1
- 8008394: f040 820a bne.w 80087ac <HAL_DMA_Start_IT+0x454>
- {
- /* Change DMA peripheral state */
- hdma->State = HAL_DMA_STATE_BUSY;
- 8008398: 68fb ldr r3, [r7, #12]
- 800839a: 2202 movs r2, #2
- 800839c: f883 2035 strb.w r2, [r3, #53] @ 0x35
- /* Initialize the error code */
- hdma->ErrorCode = HAL_DMA_ERROR_NONE;
- 80083a0: 68fb ldr r3, [r7, #12]
- 80083a2: 2200 movs r2, #0
- 80083a4: 655a str r2, [r3, #84] @ 0x54
- /* Disable the peripheral */
- __HAL_DMA_DISABLE(hdma);
- 80083a6: 68fb ldr r3, [r7, #12]
- 80083a8: 681b ldr r3, [r3, #0]
- 80083aa: 4a68 ldr r2, [pc, #416] @ (800854c <HAL_DMA_Start_IT+0x1f4>)
- 80083ac: 4293 cmp r3, r2
- 80083ae: d04a beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 80083b0: 68fb ldr r3, [r7, #12]
- 80083b2: 681b ldr r3, [r3, #0]
- 80083b4: 4a66 ldr r2, [pc, #408] @ (8008550 <HAL_DMA_Start_IT+0x1f8>)
- 80083b6: 4293 cmp r3, r2
- 80083b8: d045 beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 80083ba: 68fb ldr r3, [r7, #12]
- 80083bc: 681b ldr r3, [r3, #0]
- 80083be: 4a65 ldr r2, [pc, #404] @ (8008554 <HAL_DMA_Start_IT+0x1fc>)
- 80083c0: 4293 cmp r3, r2
- 80083c2: d040 beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 80083c4: 68fb ldr r3, [r7, #12]
- 80083c6: 681b ldr r3, [r3, #0]
- 80083c8: 4a63 ldr r2, [pc, #396] @ (8008558 <HAL_DMA_Start_IT+0x200>)
- 80083ca: 4293 cmp r3, r2
- 80083cc: d03b beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 80083ce: 68fb ldr r3, [r7, #12]
- 80083d0: 681b ldr r3, [r3, #0]
- 80083d2: 4a62 ldr r2, [pc, #392] @ (800855c <HAL_DMA_Start_IT+0x204>)
- 80083d4: 4293 cmp r3, r2
- 80083d6: d036 beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 80083d8: 68fb ldr r3, [r7, #12]
- 80083da: 681b ldr r3, [r3, #0]
- 80083dc: 4a60 ldr r2, [pc, #384] @ (8008560 <HAL_DMA_Start_IT+0x208>)
- 80083de: 4293 cmp r3, r2
- 80083e0: d031 beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 80083e2: 68fb ldr r3, [r7, #12]
- 80083e4: 681b ldr r3, [r3, #0]
- 80083e6: 4a5f ldr r2, [pc, #380] @ (8008564 <HAL_DMA_Start_IT+0x20c>)
- 80083e8: 4293 cmp r3, r2
- 80083ea: d02c beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 80083ec: 68fb ldr r3, [r7, #12]
- 80083ee: 681b ldr r3, [r3, #0]
- 80083f0: 4a5d ldr r2, [pc, #372] @ (8008568 <HAL_DMA_Start_IT+0x210>)
- 80083f2: 4293 cmp r3, r2
- 80083f4: d027 beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 80083f6: 68fb ldr r3, [r7, #12]
- 80083f8: 681b ldr r3, [r3, #0]
- 80083fa: 4a5c ldr r2, [pc, #368] @ (800856c <HAL_DMA_Start_IT+0x214>)
- 80083fc: 4293 cmp r3, r2
- 80083fe: d022 beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 8008400: 68fb ldr r3, [r7, #12]
- 8008402: 681b ldr r3, [r3, #0]
- 8008404: 4a5a ldr r2, [pc, #360] @ (8008570 <HAL_DMA_Start_IT+0x218>)
- 8008406: 4293 cmp r3, r2
- 8008408: d01d beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 800840a: 68fb ldr r3, [r7, #12]
- 800840c: 681b ldr r3, [r3, #0]
- 800840e: 4a59 ldr r2, [pc, #356] @ (8008574 <HAL_DMA_Start_IT+0x21c>)
- 8008410: 4293 cmp r3, r2
- 8008412: d018 beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 8008414: 68fb ldr r3, [r7, #12]
- 8008416: 681b ldr r3, [r3, #0]
- 8008418: 4a57 ldr r2, [pc, #348] @ (8008578 <HAL_DMA_Start_IT+0x220>)
- 800841a: 4293 cmp r3, r2
- 800841c: d013 beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 800841e: 68fb ldr r3, [r7, #12]
- 8008420: 681b ldr r3, [r3, #0]
- 8008422: 4a56 ldr r2, [pc, #344] @ (800857c <HAL_DMA_Start_IT+0x224>)
- 8008424: 4293 cmp r3, r2
- 8008426: d00e beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 8008428: 68fb ldr r3, [r7, #12]
- 800842a: 681b ldr r3, [r3, #0]
- 800842c: 4a54 ldr r2, [pc, #336] @ (8008580 <HAL_DMA_Start_IT+0x228>)
- 800842e: 4293 cmp r3, r2
- 8008430: d009 beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 8008432: 68fb ldr r3, [r7, #12]
- 8008434: 681b ldr r3, [r3, #0]
- 8008436: 4a53 ldr r2, [pc, #332] @ (8008584 <HAL_DMA_Start_IT+0x22c>)
- 8008438: 4293 cmp r3, r2
- 800843a: d004 beq.n 8008446 <HAL_DMA_Start_IT+0xee>
- 800843c: 68fb ldr r3, [r7, #12]
- 800843e: 681b ldr r3, [r3, #0]
- 8008440: 4a51 ldr r2, [pc, #324] @ (8008588 <HAL_DMA_Start_IT+0x230>)
- 8008442: 4293 cmp r3, r2
- 8008444: d108 bne.n 8008458 <HAL_DMA_Start_IT+0x100>
- 8008446: 68fb ldr r3, [r7, #12]
- 8008448: 681b ldr r3, [r3, #0]
- 800844a: 681a ldr r2, [r3, #0]
- 800844c: 68fb ldr r3, [r7, #12]
- 800844e: 681b ldr r3, [r3, #0]
- 8008450: f022 0201 bic.w r2, r2, #1
- 8008454: 601a str r2, [r3, #0]
- 8008456: e007 b.n 8008468 <HAL_DMA_Start_IT+0x110>
- 8008458: 68fb ldr r3, [r7, #12]
- 800845a: 681b ldr r3, [r3, #0]
- 800845c: 681a ldr r2, [r3, #0]
- 800845e: 68fb ldr r3, [r7, #12]
- 8008460: 681b ldr r3, [r3, #0]
- 8008462: f022 0201 bic.w r2, r2, #1
- 8008466: 601a str r2, [r3, #0]
- /* Configure the source, destination address and the data length */
- DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
- 8008468: 683b ldr r3, [r7, #0]
- 800846a: 687a ldr r2, [r7, #4]
- 800846c: 68b9 ldr r1, [r7, #8]
- 800846e: 68f8 ldr r0, [r7, #12]
- 8008470: f001 fe6a bl 800a148 <DMA_SetConfig>
- if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
- 8008474: 68fb ldr r3, [r7, #12]
- 8008476: 681b ldr r3, [r3, #0]
- 8008478: 4a34 ldr r2, [pc, #208] @ (800854c <HAL_DMA_Start_IT+0x1f4>)
- 800847a: 4293 cmp r3, r2
- 800847c: d04a beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 800847e: 68fb ldr r3, [r7, #12]
- 8008480: 681b ldr r3, [r3, #0]
- 8008482: 4a33 ldr r2, [pc, #204] @ (8008550 <HAL_DMA_Start_IT+0x1f8>)
- 8008484: 4293 cmp r3, r2
- 8008486: d045 beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 8008488: 68fb ldr r3, [r7, #12]
- 800848a: 681b ldr r3, [r3, #0]
- 800848c: 4a31 ldr r2, [pc, #196] @ (8008554 <HAL_DMA_Start_IT+0x1fc>)
- 800848e: 4293 cmp r3, r2
- 8008490: d040 beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 8008492: 68fb ldr r3, [r7, #12]
- 8008494: 681b ldr r3, [r3, #0]
- 8008496: 4a30 ldr r2, [pc, #192] @ (8008558 <HAL_DMA_Start_IT+0x200>)
- 8008498: 4293 cmp r3, r2
- 800849a: d03b beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 800849c: 68fb ldr r3, [r7, #12]
- 800849e: 681b ldr r3, [r3, #0]
- 80084a0: 4a2e ldr r2, [pc, #184] @ (800855c <HAL_DMA_Start_IT+0x204>)
- 80084a2: 4293 cmp r3, r2
- 80084a4: d036 beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 80084a6: 68fb ldr r3, [r7, #12]
- 80084a8: 681b ldr r3, [r3, #0]
- 80084aa: 4a2d ldr r2, [pc, #180] @ (8008560 <HAL_DMA_Start_IT+0x208>)
- 80084ac: 4293 cmp r3, r2
- 80084ae: d031 beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 80084b0: 68fb ldr r3, [r7, #12]
- 80084b2: 681b ldr r3, [r3, #0]
- 80084b4: 4a2b ldr r2, [pc, #172] @ (8008564 <HAL_DMA_Start_IT+0x20c>)
- 80084b6: 4293 cmp r3, r2
- 80084b8: d02c beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 80084ba: 68fb ldr r3, [r7, #12]
- 80084bc: 681b ldr r3, [r3, #0]
- 80084be: 4a2a ldr r2, [pc, #168] @ (8008568 <HAL_DMA_Start_IT+0x210>)
- 80084c0: 4293 cmp r3, r2
- 80084c2: d027 beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 80084c4: 68fb ldr r3, [r7, #12]
- 80084c6: 681b ldr r3, [r3, #0]
- 80084c8: 4a28 ldr r2, [pc, #160] @ (800856c <HAL_DMA_Start_IT+0x214>)
- 80084ca: 4293 cmp r3, r2
- 80084cc: d022 beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 80084ce: 68fb ldr r3, [r7, #12]
- 80084d0: 681b ldr r3, [r3, #0]
- 80084d2: 4a27 ldr r2, [pc, #156] @ (8008570 <HAL_DMA_Start_IT+0x218>)
- 80084d4: 4293 cmp r3, r2
- 80084d6: d01d beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 80084d8: 68fb ldr r3, [r7, #12]
- 80084da: 681b ldr r3, [r3, #0]
- 80084dc: 4a25 ldr r2, [pc, #148] @ (8008574 <HAL_DMA_Start_IT+0x21c>)
- 80084de: 4293 cmp r3, r2
- 80084e0: d018 beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 80084e2: 68fb ldr r3, [r7, #12]
- 80084e4: 681b ldr r3, [r3, #0]
- 80084e6: 4a24 ldr r2, [pc, #144] @ (8008578 <HAL_DMA_Start_IT+0x220>)
- 80084e8: 4293 cmp r3, r2
- 80084ea: d013 beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 80084ec: 68fb ldr r3, [r7, #12]
- 80084ee: 681b ldr r3, [r3, #0]
- 80084f0: 4a22 ldr r2, [pc, #136] @ (800857c <HAL_DMA_Start_IT+0x224>)
- 80084f2: 4293 cmp r3, r2
- 80084f4: d00e beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 80084f6: 68fb ldr r3, [r7, #12]
- 80084f8: 681b ldr r3, [r3, #0]
- 80084fa: 4a21 ldr r2, [pc, #132] @ (8008580 <HAL_DMA_Start_IT+0x228>)
- 80084fc: 4293 cmp r3, r2
- 80084fe: d009 beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 8008500: 68fb ldr r3, [r7, #12]
- 8008502: 681b ldr r3, [r3, #0]
- 8008504: 4a1f ldr r2, [pc, #124] @ (8008584 <HAL_DMA_Start_IT+0x22c>)
- 8008506: 4293 cmp r3, r2
- 8008508: d004 beq.n 8008514 <HAL_DMA_Start_IT+0x1bc>
- 800850a: 68fb ldr r3, [r7, #12]
- 800850c: 681b ldr r3, [r3, #0]
- 800850e: 4a1e ldr r2, [pc, #120] @ (8008588 <HAL_DMA_Start_IT+0x230>)
- 8008510: 4293 cmp r3, r2
- 8008512: d101 bne.n 8008518 <HAL_DMA_Start_IT+0x1c0>
- 8008514: 2301 movs r3, #1
- 8008516: e000 b.n 800851a <HAL_DMA_Start_IT+0x1c2>
- 8008518: 2300 movs r3, #0
- 800851a: 2b00 cmp r3, #0
- 800851c: d036 beq.n 800858c <HAL_DMA_Start_IT+0x234>
- {
- /* Enable Common interrupts*/
- MODIFY_REG(((DMA_Stream_TypeDef *)hdma->Instance)->CR, (DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_HT), (DMA_IT_TC | DMA_IT_TE | DMA_IT_DME));
- 800851e: 68fb ldr r3, [r7, #12]
- 8008520: 681b ldr r3, [r3, #0]
- 8008522: 681b ldr r3, [r3, #0]
- 8008524: f023 021e bic.w r2, r3, #30
- 8008528: 68fb ldr r3, [r7, #12]
- 800852a: 681b ldr r3, [r3, #0]
- 800852c: f042 0216 orr.w r2, r2, #22
- 8008530: 601a str r2, [r3, #0]
- if(hdma->XferHalfCpltCallback != NULL)
- 8008532: 68fb ldr r3, [r7, #12]
- 8008534: 6c1b ldr r3, [r3, #64] @ 0x40
- 8008536: 2b00 cmp r3, #0
- 8008538: d03e beq.n 80085b8 <HAL_DMA_Start_IT+0x260>
- {
- /* Enable Half Transfer IT if corresponding Callback is set */
- ((DMA_Stream_TypeDef *)hdma->Instance)->CR |= DMA_IT_HT;
- 800853a: 68fb ldr r3, [r7, #12]
- 800853c: 681b ldr r3, [r3, #0]
- 800853e: 681a ldr r2, [r3, #0]
- 8008540: 68fb ldr r3, [r7, #12]
- 8008542: 681b ldr r3, [r3, #0]
- 8008544: f042 0208 orr.w r2, r2, #8
- 8008548: 601a str r2, [r3, #0]
- 800854a: e035 b.n 80085b8 <HAL_DMA_Start_IT+0x260>
- 800854c: 40020010 .word 0x40020010
- 8008550: 40020028 .word 0x40020028
- 8008554: 40020040 .word 0x40020040
- 8008558: 40020058 .word 0x40020058
- 800855c: 40020070 .word 0x40020070
- 8008560: 40020088 .word 0x40020088
- 8008564: 400200a0 .word 0x400200a0
- 8008568: 400200b8 .word 0x400200b8
- 800856c: 40020410 .word 0x40020410
- 8008570: 40020428 .word 0x40020428
- 8008574: 40020440 .word 0x40020440
- 8008578: 40020458 .word 0x40020458
- 800857c: 40020470 .word 0x40020470
- 8008580: 40020488 .word 0x40020488
- 8008584: 400204a0 .word 0x400204a0
- 8008588: 400204b8 .word 0x400204b8
- }
- }
- else /* BDMA channel */
- {
- /* Enable Common interrupts */
- MODIFY_REG(((BDMA_Channel_TypeDef *)hdma->Instance)->CCR, (BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE), (BDMA_CCR_TCIE | BDMA_CCR_TEIE));
- 800858c: 68fb ldr r3, [r7, #12]
- 800858e: 681b ldr r3, [r3, #0]
- 8008590: 681b ldr r3, [r3, #0]
- 8008592: f023 020e bic.w r2, r3, #14
- 8008596: 68fb ldr r3, [r7, #12]
- 8008598: 681b ldr r3, [r3, #0]
- 800859a: f042 020a orr.w r2, r2, #10
- 800859e: 601a str r2, [r3, #0]
- if(hdma->XferHalfCpltCallback != NULL)
- 80085a0: 68fb ldr r3, [r7, #12]
- 80085a2: 6c1b ldr r3, [r3, #64] @ 0x40
- 80085a4: 2b00 cmp r3, #0
- 80085a6: d007 beq.n 80085b8 <HAL_DMA_Start_IT+0x260>
- {
- /*Enable Half Transfer IT if corresponding Callback is set */
- ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR |= BDMA_CCR_HTIE;
- 80085a8: 68fb ldr r3, [r7, #12]
- 80085aa: 681b ldr r3, [r3, #0]
- 80085ac: 681a ldr r2, [r3, #0]
- 80085ae: 68fb ldr r3, [r7, #12]
- 80085b0: 681b ldr r3, [r3, #0]
- 80085b2: f042 0204 orr.w r2, r2, #4
- 80085b6: 601a str r2, [r3, #0]
- }
- }
- if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
- 80085b8: 68fb ldr r3, [r7, #12]
- 80085ba: 681b ldr r3, [r3, #0]
- 80085bc: 4a83 ldr r2, [pc, #524] @ (80087cc <HAL_DMA_Start_IT+0x474>)
- 80085be: 4293 cmp r3, r2
- 80085c0: d072 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 80085c2: 68fb ldr r3, [r7, #12]
- 80085c4: 681b ldr r3, [r3, #0]
- 80085c6: 4a82 ldr r2, [pc, #520] @ (80087d0 <HAL_DMA_Start_IT+0x478>)
- 80085c8: 4293 cmp r3, r2
- 80085ca: d06d beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 80085cc: 68fb ldr r3, [r7, #12]
- 80085ce: 681b ldr r3, [r3, #0]
- 80085d0: 4a80 ldr r2, [pc, #512] @ (80087d4 <HAL_DMA_Start_IT+0x47c>)
- 80085d2: 4293 cmp r3, r2
- 80085d4: d068 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 80085d6: 68fb ldr r3, [r7, #12]
- 80085d8: 681b ldr r3, [r3, #0]
- 80085da: 4a7f ldr r2, [pc, #508] @ (80087d8 <HAL_DMA_Start_IT+0x480>)
- 80085dc: 4293 cmp r3, r2
- 80085de: d063 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 80085e0: 68fb ldr r3, [r7, #12]
- 80085e2: 681b ldr r3, [r3, #0]
- 80085e4: 4a7d ldr r2, [pc, #500] @ (80087dc <HAL_DMA_Start_IT+0x484>)
- 80085e6: 4293 cmp r3, r2
- 80085e8: d05e beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 80085ea: 68fb ldr r3, [r7, #12]
- 80085ec: 681b ldr r3, [r3, #0]
- 80085ee: 4a7c ldr r2, [pc, #496] @ (80087e0 <HAL_DMA_Start_IT+0x488>)
- 80085f0: 4293 cmp r3, r2
- 80085f2: d059 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 80085f4: 68fb ldr r3, [r7, #12]
- 80085f6: 681b ldr r3, [r3, #0]
- 80085f8: 4a7a ldr r2, [pc, #488] @ (80087e4 <HAL_DMA_Start_IT+0x48c>)
- 80085fa: 4293 cmp r3, r2
- 80085fc: d054 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 80085fe: 68fb ldr r3, [r7, #12]
- 8008600: 681b ldr r3, [r3, #0]
- 8008602: 4a79 ldr r2, [pc, #484] @ (80087e8 <HAL_DMA_Start_IT+0x490>)
- 8008604: 4293 cmp r3, r2
- 8008606: d04f beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 8008608: 68fb ldr r3, [r7, #12]
- 800860a: 681b ldr r3, [r3, #0]
- 800860c: 4a77 ldr r2, [pc, #476] @ (80087ec <HAL_DMA_Start_IT+0x494>)
- 800860e: 4293 cmp r3, r2
- 8008610: d04a beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 8008612: 68fb ldr r3, [r7, #12]
- 8008614: 681b ldr r3, [r3, #0]
- 8008616: 4a76 ldr r2, [pc, #472] @ (80087f0 <HAL_DMA_Start_IT+0x498>)
- 8008618: 4293 cmp r3, r2
- 800861a: d045 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 800861c: 68fb ldr r3, [r7, #12]
- 800861e: 681b ldr r3, [r3, #0]
- 8008620: 4a74 ldr r2, [pc, #464] @ (80087f4 <HAL_DMA_Start_IT+0x49c>)
- 8008622: 4293 cmp r3, r2
- 8008624: d040 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 8008626: 68fb ldr r3, [r7, #12]
- 8008628: 681b ldr r3, [r3, #0]
- 800862a: 4a73 ldr r2, [pc, #460] @ (80087f8 <HAL_DMA_Start_IT+0x4a0>)
- 800862c: 4293 cmp r3, r2
- 800862e: d03b beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 8008630: 68fb ldr r3, [r7, #12]
- 8008632: 681b ldr r3, [r3, #0]
- 8008634: 4a71 ldr r2, [pc, #452] @ (80087fc <HAL_DMA_Start_IT+0x4a4>)
- 8008636: 4293 cmp r3, r2
- 8008638: d036 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 800863a: 68fb ldr r3, [r7, #12]
- 800863c: 681b ldr r3, [r3, #0]
- 800863e: 4a70 ldr r2, [pc, #448] @ (8008800 <HAL_DMA_Start_IT+0x4a8>)
- 8008640: 4293 cmp r3, r2
- 8008642: d031 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 8008644: 68fb ldr r3, [r7, #12]
- 8008646: 681b ldr r3, [r3, #0]
- 8008648: 4a6e ldr r2, [pc, #440] @ (8008804 <HAL_DMA_Start_IT+0x4ac>)
- 800864a: 4293 cmp r3, r2
- 800864c: d02c beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 800864e: 68fb ldr r3, [r7, #12]
- 8008650: 681b ldr r3, [r3, #0]
- 8008652: 4a6d ldr r2, [pc, #436] @ (8008808 <HAL_DMA_Start_IT+0x4b0>)
- 8008654: 4293 cmp r3, r2
- 8008656: d027 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 8008658: 68fb ldr r3, [r7, #12]
- 800865a: 681b ldr r3, [r3, #0]
- 800865c: 4a6b ldr r2, [pc, #428] @ (800880c <HAL_DMA_Start_IT+0x4b4>)
- 800865e: 4293 cmp r3, r2
- 8008660: d022 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 8008662: 68fb ldr r3, [r7, #12]
- 8008664: 681b ldr r3, [r3, #0]
- 8008666: 4a6a ldr r2, [pc, #424] @ (8008810 <HAL_DMA_Start_IT+0x4b8>)
- 8008668: 4293 cmp r3, r2
- 800866a: d01d beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 800866c: 68fb ldr r3, [r7, #12]
- 800866e: 681b ldr r3, [r3, #0]
- 8008670: 4a68 ldr r2, [pc, #416] @ (8008814 <HAL_DMA_Start_IT+0x4bc>)
- 8008672: 4293 cmp r3, r2
- 8008674: d018 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 8008676: 68fb ldr r3, [r7, #12]
- 8008678: 681b ldr r3, [r3, #0]
- 800867a: 4a67 ldr r2, [pc, #412] @ (8008818 <HAL_DMA_Start_IT+0x4c0>)
- 800867c: 4293 cmp r3, r2
- 800867e: d013 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 8008680: 68fb ldr r3, [r7, #12]
- 8008682: 681b ldr r3, [r3, #0]
- 8008684: 4a65 ldr r2, [pc, #404] @ (800881c <HAL_DMA_Start_IT+0x4c4>)
- 8008686: 4293 cmp r3, r2
- 8008688: d00e beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 800868a: 68fb ldr r3, [r7, #12]
- 800868c: 681b ldr r3, [r3, #0]
- 800868e: 4a64 ldr r2, [pc, #400] @ (8008820 <HAL_DMA_Start_IT+0x4c8>)
- 8008690: 4293 cmp r3, r2
- 8008692: d009 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 8008694: 68fb ldr r3, [r7, #12]
- 8008696: 681b ldr r3, [r3, #0]
- 8008698: 4a62 ldr r2, [pc, #392] @ (8008824 <HAL_DMA_Start_IT+0x4cc>)
- 800869a: 4293 cmp r3, r2
- 800869c: d004 beq.n 80086a8 <HAL_DMA_Start_IT+0x350>
- 800869e: 68fb ldr r3, [r7, #12]
- 80086a0: 681b ldr r3, [r3, #0]
- 80086a2: 4a61 ldr r2, [pc, #388] @ (8008828 <HAL_DMA_Start_IT+0x4d0>)
- 80086a4: 4293 cmp r3, r2
- 80086a6: d101 bne.n 80086ac <HAL_DMA_Start_IT+0x354>
- 80086a8: 2301 movs r3, #1
- 80086aa: e000 b.n 80086ae <HAL_DMA_Start_IT+0x356>
- 80086ac: 2300 movs r3, #0
- 80086ae: 2b00 cmp r3, #0
- 80086b0: d01a beq.n 80086e8 <HAL_DMA_Start_IT+0x390>
- {
- /* Check if DMAMUX Synchronization is enabled */
- if((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U)
- 80086b2: 68fb ldr r3, [r7, #12]
- 80086b4: 6e1b ldr r3, [r3, #96] @ 0x60
- 80086b6: 681b ldr r3, [r3, #0]
- 80086b8: f403 3380 and.w r3, r3, #65536 @ 0x10000
- 80086bc: 2b00 cmp r3, #0
- 80086be: d007 beq.n 80086d0 <HAL_DMA_Start_IT+0x378>
- {
- /* Enable DMAMUX sync overrun IT*/
- hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE;
- 80086c0: 68fb ldr r3, [r7, #12]
- 80086c2: 6e1b ldr r3, [r3, #96] @ 0x60
- 80086c4: 681a ldr r2, [r3, #0]
- 80086c6: 68fb ldr r3, [r7, #12]
- 80086c8: 6e1b ldr r3, [r3, #96] @ 0x60
- 80086ca: f442 7280 orr.w r2, r2, #256 @ 0x100
- 80086ce: 601a str r2, [r3, #0]
- }
- if(hdma->DMAmuxRequestGen != 0U)
- 80086d0: 68fb ldr r3, [r7, #12]
- 80086d2: 6edb ldr r3, [r3, #108] @ 0x6c
- 80086d4: 2b00 cmp r3, #0
- 80086d6: d007 beq.n 80086e8 <HAL_DMA_Start_IT+0x390>
- {
- /* if using DMAMUX request generator, enable the DMAMUX request generator overrun IT*/
- /* enable the request gen overrun IT */
- hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE;
- 80086d8: 68fb ldr r3, [r7, #12]
- 80086da: 6edb ldr r3, [r3, #108] @ 0x6c
- 80086dc: 681a ldr r2, [r3, #0]
- 80086de: 68fb ldr r3, [r7, #12]
- 80086e0: 6edb ldr r3, [r3, #108] @ 0x6c
- 80086e2: f442 7280 orr.w r2, r2, #256 @ 0x100
- 80086e6: 601a str r2, [r3, #0]
- }
- }
- /* Enable the Peripheral */
- __HAL_DMA_ENABLE(hdma);
- 80086e8: 68fb ldr r3, [r7, #12]
- 80086ea: 681b ldr r3, [r3, #0]
- 80086ec: 4a37 ldr r2, [pc, #220] @ (80087cc <HAL_DMA_Start_IT+0x474>)
- 80086ee: 4293 cmp r3, r2
- 80086f0: d04a beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 80086f2: 68fb ldr r3, [r7, #12]
- 80086f4: 681b ldr r3, [r3, #0]
- 80086f6: 4a36 ldr r2, [pc, #216] @ (80087d0 <HAL_DMA_Start_IT+0x478>)
- 80086f8: 4293 cmp r3, r2
- 80086fa: d045 beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 80086fc: 68fb ldr r3, [r7, #12]
- 80086fe: 681b ldr r3, [r3, #0]
- 8008700: 4a34 ldr r2, [pc, #208] @ (80087d4 <HAL_DMA_Start_IT+0x47c>)
- 8008702: 4293 cmp r3, r2
- 8008704: d040 beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 8008706: 68fb ldr r3, [r7, #12]
- 8008708: 681b ldr r3, [r3, #0]
- 800870a: 4a33 ldr r2, [pc, #204] @ (80087d8 <HAL_DMA_Start_IT+0x480>)
- 800870c: 4293 cmp r3, r2
- 800870e: d03b beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 8008710: 68fb ldr r3, [r7, #12]
- 8008712: 681b ldr r3, [r3, #0]
- 8008714: 4a31 ldr r2, [pc, #196] @ (80087dc <HAL_DMA_Start_IT+0x484>)
- 8008716: 4293 cmp r3, r2
- 8008718: d036 beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 800871a: 68fb ldr r3, [r7, #12]
- 800871c: 681b ldr r3, [r3, #0]
- 800871e: 4a30 ldr r2, [pc, #192] @ (80087e0 <HAL_DMA_Start_IT+0x488>)
- 8008720: 4293 cmp r3, r2
- 8008722: d031 beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 8008724: 68fb ldr r3, [r7, #12]
- 8008726: 681b ldr r3, [r3, #0]
- 8008728: 4a2e ldr r2, [pc, #184] @ (80087e4 <HAL_DMA_Start_IT+0x48c>)
- 800872a: 4293 cmp r3, r2
- 800872c: d02c beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 800872e: 68fb ldr r3, [r7, #12]
- 8008730: 681b ldr r3, [r3, #0]
- 8008732: 4a2d ldr r2, [pc, #180] @ (80087e8 <HAL_DMA_Start_IT+0x490>)
- 8008734: 4293 cmp r3, r2
- 8008736: d027 beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 8008738: 68fb ldr r3, [r7, #12]
- 800873a: 681b ldr r3, [r3, #0]
- 800873c: 4a2b ldr r2, [pc, #172] @ (80087ec <HAL_DMA_Start_IT+0x494>)
- 800873e: 4293 cmp r3, r2
- 8008740: d022 beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 8008742: 68fb ldr r3, [r7, #12]
- 8008744: 681b ldr r3, [r3, #0]
- 8008746: 4a2a ldr r2, [pc, #168] @ (80087f0 <HAL_DMA_Start_IT+0x498>)
- 8008748: 4293 cmp r3, r2
- 800874a: d01d beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 800874c: 68fb ldr r3, [r7, #12]
- 800874e: 681b ldr r3, [r3, #0]
- 8008750: 4a28 ldr r2, [pc, #160] @ (80087f4 <HAL_DMA_Start_IT+0x49c>)
- 8008752: 4293 cmp r3, r2
- 8008754: d018 beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 8008756: 68fb ldr r3, [r7, #12]
- 8008758: 681b ldr r3, [r3, #0]
- 800875a: 4a27 ldr r2, [pc, #156] @ (80087f8 <HAL_DMA_Start_IT+0x4a0>)
- 800875c: 4293 cmp r3, r2
- 800875e: d013 beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 8008760: 68fb ldr r3, [r7, #12]
- 8008762: 681b ldr r3, [r3, #0]
- 8008764: 4a25 ldr r2, [pc, #148] @ (80087fc <HAL_DMA_Start_IT+0x4a4>)
- 8008766: 4293 cmp r3, r2
- 8008768: d00e beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 800876a: 68fb ldr r3, [r7, #12]
- 800876c: 681b ldr r3, [r3, #0]
- 800876e: 4a24 ldr r2, [pc, #144] @ (8008800 <HAL_DMA_Start_IT+0x4a8>)
- 8008770: 4293 cmp r3, r2
- 8008772: d009 beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 8008774: 68fb ldr r3, [r7, #12]
- 8008776: 681b ldr r3, [r3, #0]
- 8008778: 4a22 ldr r2, [pc, #136] @ (8008804 <HAL_DMA_Start_IT+0x4ac>)
- 800877a: 4293 cmp r3, r2
- 800877c: d004 beq.n 8008788 <HAL_DMA_Start_IT+0x430>
- 800877e: 68fb ldr r3, [r7, #12]
- 8008780: 681b ldr r3, [r3, #0]
- 8008782: 4a21 ldr r2, [pc, #132] @ (8008808 <HAL_DMA_Start_IT+0x4b0>)
- 8008784: 4293 cmp r3, r2
- 8008786: d108 bne.n 800879a <HAL_DMA_Start_IT+0x442>
- 8008788: 68fb ldr r3, [r7, #12]
- 800878a: 681b ldr r3, [r3, #0]
- 800878c: 681a ldr r2, [r3, #0]
- 800878e: 68fb ldr r3, [r7, #12]
- 8008790: 681b ldr r3, [r3, #0]
- 8008792: f042 0201 orr.w r2, r2, #1
- 8008796: 601a str r2, [r3, #0]
- 8008798: e012 b.n 80087c0 <HAL_DMA_Start_IT+0x468>
- 800879a: 68fb ldr r3, [r7, #12]
- 800879c: 681b ldr r3, [r3, #0]
- 800879e: 681a ldr r2, [r3, #0]
- 80087a0: 68fb ldr r3, [r7, #12]
- 80087a2: 681b ldr r3, [r3, #0]
- 80087a4: f042 0201 orr.w r2, r2, #1
- 80087a8: 601a str r2, [r3, #0]
- 80087aa: e009 b.n 80087c0 <HAL_DMA_Start_IT+0x468>
- }
- else
- {
- /* Set the error code to busy */
- hdma->ErrorCode = HAL_DMA_ERROR_BUSY;
- 80087ac: 68fb ldr r3, [r7, #12]
- 80087ae: f44f 6200 mov.w r2, #2048 @ 0x800
- 80087b2: 655a str r2, [r3, #84] @ 0x54
- /* Process unlocked */
- __HAL_UNLOCK(hdma);
- 80087b4: 68fb ldr r3, [r7, #12]
- 80087b6: 2200 movs r2, #0
- 80087b8: f883 2034 strb.w r2, [r3, #52] @ 0x34
- /* Return error status */
- status = HAL_ERROR;
- 80087bc: 2301 movs r3, #1
- 80087be: 75fb strb r3, [r7, #23]
- }
- return status;
- 80087c0: 7dfb ldrb r3, [r7, #23]
- }
- 80087c2: 4618 mov r0, r3
- 80087c4: 3718 adds r7, #24
- 80087c6: 46bd mov sp, r7
- 80087c8: bd80 pop {r7, pc}
- 80087ca: bf00 nop
- 80087cc: 40020010 .word 0x40020010
- 80087d0: 40020028 .word 0x40020028
- 80087d4: 40020040 .word 0x40020040
- 80087d8: 40020058 .word 0x40020058
- 80087dc: 40020070 .word 0x40020070
- 80087e0: 40020088 .word 0x40020088
- 80087e4: 400200a0 .word 0x400200a0
- 80087e8: 400200b8 .word 0x400200b8
- 80087ec: 40020410 .word 0x40020410
- 80087f0: 40020428 .word 0x40020428
- 80087f4: 40020440 .word 0x40020440
- 80087f8: 40020458 .word 0x40020458
- 80087fc: 40020470 .word 0x40020470
- 8008800: 40020488 .word 0x40020488
- 8008804: 400204a0 .word 0x400204a0
- 8008808: 400204b8 .word 0x400204b8
- 800880c: 58025408 .word 0x58025408
- 8008810: 5802541c .word 0x5802541c
- 8008814: 58025430 .word 0x58025430
- 8008818: 58025444 .word 0x58025444
- 800881c: 58025458 .word 0x58025458
- 8008820: 5802546c .word 0x5802546c
- 8008824: 58025480 .word 0x58025480
- 8008828: 58025494 .word 0x58025494
- 0800882c <HAL_DMA_Abort>:
- * and the Stream will be effectively disabled only after the transfer of
- * this single data is finished.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
- {
- 800882c: b580 push {r7, lr}
- 800882e: b086 sub sp, #24
- 8008830: af00 add r7, sp, #0
- 8008832: 6078 str r0, [r7, #4]
- /* calculate DMA base and stream number */
- DMA_Base_Registers *regs_dma;
- BDMA_Base_Registers *regs_bdma;
- const __IO uint32_t *enableRegister;
- uint32_t tickstart = HAL_GetTick();
- 8008834: f7fc fe98 bl 8005568 <HAL_GetTick>
- 8008838: 6138 str r0, [r7, #16]
- /* Check the DMA peripheral handle */
- if(hdma == NULL)
- 800883a: 687b ldr r3, [r7, #4]
- 800883c: 2b00 cmp r3, #0
- 800883e: d101 bne.n 8008844 <HAL_DMA_Abort+0x18>
- {
- return HAL_ERROR;
- 8008840: 2301 movs r3, #1
- 8008842: e2dc b.n 8008dfe <HAL_DMA_Abort+0x5d2>
- }
- /* Check the DMA peripheral state */
- if(hdma->State != HAL_DMA_STATE_BUSY)
- 8008844: 687b ldr r3, [r7, #4]
- 8008846: f893 3035 ldrb.w r3, [r3, #53] @ 0x35
- 800884a: b2db uxtb r3, r3
- 800884c: 2b02 cmp r3, #2
- 800884e: d008 beq.n 8008862 <HAL_DMA_Abort+0x36>
- {
- hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
- 8008850: 687b ldr r3, [r7, #4]
- 8008852: 2280 movs r2, #128 @ 0x80
- 8008854: 655a str r2, [r3, #84] @ 0x54
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- 8008856: 687b ldr r3, [r7, #4]
- 8008858: 2200 movs r2, #0
- 800885a: f883 2034 strb.w r2, [r3, #52] @ 0x34
- return HAL_ERROR;
- 800885e: 2301 movs r3, #1
- 8008860: e2cd b.n 8008dfe <HAL_DMA_Abort+0x5d2>
- }
- else
- {
- /* Disable all the transfer interrupts */
- if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
- 8008862: 687b ldr r3, [r7, #4]
- 8008864: 681b ldr r3, [r3, #0]
- 8008866: 4a76 ldr r2, [pc, #472] @ (8008a40 <HAL_DMA_Abort+0x214>)
- 8008868: 4293 cmp r3, r2
- 800886a: d04a beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 800886c: 687b ldr r3, [r7, #4]
- 800886e: 681b ldr r3, [r3, #0]
- 8008870: 4a74 ldr r2, [pc, #464] @ (8008a44 <HAL_DMA_Abort+0x218>)
- 8008872: 4293 cmp r3, r2
- 8008874: d045 beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 8008876: 687b ldr r3, [r7, #4]
- 8008878: 681b ldr r3, [r3, #0]
- 800887a: 4a73 ldr r2, [pc, #460] @ (8008a48 <HAL_DMA_Abort+0x21c>)
- 800887c: 4293 cmp r3, r2
- 800887e: d040 beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 8008880: 687b ldr r3, [r7, #4]
- 8008882: 681b ldr r3, [r3, #0]
- 8008884: 4a71 ldr r2, [pc, #452] @ (8008a4c <HAL_DMA_Abort+0x220>)
- 8008886: 4293 cmp r3, r2
- 8008888: d03b beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 800888a: 687b ldr r3, [r7, #4]
- 800888c: 681b ldr r3, [r3, #0]
- 800888e: 4a70 ldr r2, [pc, #448] @ (8008a50 <HAL_DMA_Abort+0x224>)
- 8008890: 4293 cmp r3, r2
- 8008892: d036 beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 8008894: 687b ldr r3, [r7, #4]
- 8008896: 681b ldr r3, [r3, #0]
- 8008898: 4a6e ldr r2, [pc, #440] @ (8008a54 <HAL_DMA_Abort+0x228>)
- 800889a: 4293 cmp r3, r2
- 800889c: d031 beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 800889e: 687b ldr r3, [r7, #4]
- 80088a0: 681b ldr r3, [r3, #0]
- 80088a2: 4a6d ldr r2, [pc, #436] @ (8008a58 <HAL_DMA_Abort+0x22c>)
- 80088a4: 4293 cmp r3, r2
- 80088a6: d02c beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 80088a8: 687b ldr r3, [r7, #4]
- 80088aa: 681b ldr r3, [r3, #0]
- 80088ac: 4a6b ldr r2, [pc, #428] @ (8008a5c <HAL_DMA_Abort+0x230>)
- 80088ae: 4293 cmp r3, r2
- 80088b0: d027 beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 80088b2: 687b ldr r3, [r7, #4]
- 80088b4: 681b ldr r3, [r3, #0]
- 80088b6: 4a6a ldr r2, [pc, #424] @ (8008a60 <HAL_DMA_Abort+0x234>)
- 80088b8: 4293 cmp r3, r2
- 80088ba: d022 beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 80088bc: 687b ldr r3, [r7, #4]
- 80088be: 681b ldr r3, [r3, #0]
- 80088c0: 4a68 ldr r2, [pc, #416] @ (8008a64 <HAL_DMA_Abort+0x238>)
- 80088c2: 4293 cmp r3, r2
- 80088c4: d01d beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 80088c6: 687b ldr r3, [r7, #4]
- 80088c8: 681b ldr r3, [r3, #0]
- 80088ca: 4a67 ldr r2, [pc, #412] @ (8008a68 <HAL_DMA_Abort+0x23c>)
- 80088cc: 4293 cmp r3, r2
- 80088ce: d018 beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 80088d0: 687b ldr r3, [r7, #4]
- 80088d2: 681b ldr r3, [r3, #0]
- 80088d4: 4a65 ldr r2, [pc, #404] @ (8008a6c <HAL_DMA_Abort+0x240>)
- 80088d6: 4293 cmp r3, r2
- 80088d8: d013 beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 80088da: 687b ldr r3, [r7, #4]
- 80088dc: 681b ldr r3, [r3, #0]
- 80088de: 4a64 ldr r2, [pc, #400] @ (8008a70 <HAL_DMA_Abort+0x244>)
- 80088e0: 4293 cmp r3, r2
- 80088e2: d00e beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 80088e4: 687b ldr r3, [r7, #4]
- 80088e6: 681b ldr r3, [r3, #0]
- 80088e8: 4a62 ldr r2, [pc, #392] @ (8008a74 <HAL_DMA_Abort+0x248>)
- 80088ea: 4293 cmp r3, r2
- 80088ec: d009 beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 80088ee: 687b ldr r3, [r7, #4]
- 80088f0: 681b ldr r3, [r3, #0]
- 80088f2: 4a61 ldr r2, [pc, #388] @ (8008a78 <HAL_DMA_Abort+0x24c>)
- 80088f4: 4293 cmp r3, r2
- 80088f6: d004 beq.n 8008902 <HAL_DMA_Abort+0xd6>
- 80088f8: 687b ldr r3, [r7, #4]
- 80088fa: 681b ldr r3, [r3, #0]
- 80088fc: 4a5f ldr r2, [pc, #380] @ (8008a7c <HAL_DMA_Abort+0x250>)
- 80088fe: 4293 cmp r3, r2
- 8008900: d101 bne.n 8008906 <HAL_DMA_Abort+0xda>
- 8008902: 2301 movs r3, #1
- 8008904: e000 b.n 8008908 <HAL_DMA_Abort+0xdc>
- 8008906: 2300 movs r3, #0
- 8008908: 2b00 cmp r3, #0
- 800890a: d013 beq.n 8008934 <HAL_DMA_Abort+0x108>
- {
- /* Disable DMA All Interrupts */
- ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_HT);
- 800890c: 687b ldr r3, [r7, #4]
- 800890e: 681b ldr r3, [r3, #0]
- 8008910: 681a ldr r2, [r3, #0]
- 8008912: 687b ldr r3, [r7, #4]
- 8008914: 681b ldr r3, [r3, #0]
- 8008916: f022 021e bic.w r2, r2, #30
- 800891a: 601a str r2, [r3, #0]
- ((DMA_Stream_TypeDef *)hdma->Instance)->FCR &= ~(DMA_IT_FE);
- 800891c: 687b ldr r3, [r7, #4]
- 800891e: 681b ldr r3, [r3, #0]
- 8008920: 695a ldr r2, [r3, #20]
- 8008922: 687b ldr r3, [r7, #4]
- 8008924: 681b ldr r3, [r3, #0]
- 8008926: f022 0280 bic.w r2, r2, #128 @ 0x80
- 800892a: 615a str r2, [r3, #20]
- enableRegister = (__IO uint32_t *)(&(((DMA_Stream_TypeDef *)hdma->Instance)->CR));
- 800892c: 687b ldr r3, [r7, #4]
- 800892e: 681b ldr r3, [r3, #0]
- 8008930: 617b str r3, [r7, #20]
- 8008932: e00a b.n 800894a <HAL_DMA_Abort+0x11e>
- }
- else /* BDMA channel */
- {
- /* Disable DMA All Interrupts */
- ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE);
- 8008934: 687b ldr r3, [r7, #4]
- 8008936: 681b ldr r3, [r3, #0]
- 8008938: 681a ldr r2, [r3, #0]
- 800893a: 687b ldr r3, [r7, #4]
- 800893c: 681b ldr r3, [r3, #0]
- 800893e: f022 020e bic.w r2, r2, #14
- 8008942: 601a str r2, [r3, #0]
- enableRegister = (__IO uint32_t *)(&(((BDMA_Channel_TypeDef *)hdma->Instance)->CCR));
- 8008944: 687b ldr r3, [r7, #4]
- 8008946: 681b ldr r3, [r3, #0]
- 8008948: 617b str r3, [r7, #20]
- }
- if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
- 800894a: 687b ldr r3, [r7, #4]
- 800894c: 681b ldr r3, [r3, #0]
- 800894e: 4a3c ldr r2, [pc, #240] @ (8008a40 <HAL_DMA_Abort+0x214>)
- 8008950: 4293 cmp r3, r2
- 8008952: d072 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 8008954: 687b ldr r3, [r7, #4]
- 8008956: 681b ldr r3, [r3, #0]
- 8008958: 4a3a ldr r2, [pc, #232] @ (8008a44 <HAL_DMA_Abort+0x218>)
- 800895a: 4293 cmp r3, r2
- 800895c: d06d beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 800895e: 687b ldr r3, [r7, #4]
- 8008960: 681b ldr r3, [r3, #0]
- 8008962: 4a39 ldr r2, [pc, #228] @ (8008a48 <HAL_DMA_Abort+0x21c>)
- 8008964: 4293 cmp r3, r2
- 8008966: d068 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 8008968: 687b ldr r3, [r7, #4]
- 800896a: 681b ldr r3, [r3, #0]
- 800896c: 4a37 ldr r2, [pc, #220] @ (8008a4c <HAL_DMA_Abort+0x220>)
- 800896e: 4293 cmp r3, r2
- 8008970: d063 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 8008972: 687b ldr r3, [r7, #4]
- 8008974: 681b ldr r3, [r3, #0]
- 8008976: 4a36 ldr r2, [pc, #216] @ (8008a50 <HAL_DMA_Abort+0x224>)
- 8008978: 4293 cmp r3, r2
- 800897a: d05e beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 800897c: 687b ldr r3, [r7, #4]
- 800897e: 681b ldr r3, [r3, #0]
- 8008980: 4a34 ldr r2, [pc, #208] @ (8008a54 <HAL_DMA_Abort+0x228>)
- 8008982: 4293 cmp r3, r2
- 8008984: d059 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 8008986: 687b ldr r3, [r7, #4]
- 8008988: 681b ldr r3, [r3, #0]
- 800898a: 4a33 ldr r2, [pc, #204] @ (8008a58 <HAL_DMA_Abort+0x22c>)
- 800898c: 4293 cmp r3, r2
- 800898e: d054 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 8008990: 687b ldr r3, [r7, #4]
- 8008992: 681b ldr r3, [r3, #0]
- 8008994: 4a31 ldr r2, [pc, #196] @ (8008a5c <HAL_DMA_Abort+0x230>)
- 8008996: 4293 cmp r3, r2
- 8008998: d04f beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 800899a: 687b ldr r3, [r7, #4]
- 800899c: 681b ldr r3, [r3, #0]
- 800899e: 4a30 ldr r2, [pc, #192] @ (8008a60 <HAL_DMA_Abort+0x234>)
- 80089a0: 4293 cmp r3, r2
- 80089a2: d04a beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 80089a4: 687b ldr r3, [r7, #4]
- 80089a6: 681b ldr r3, [r3, #0]
- 80089a8: 4a2e ldr r2, [pc, #184] @ (8008a64 <HAL_DMA_Abort+0x238>)
- 80089aa: 4293 cmp r3, r2
- 80089ac: d045 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 80089ae: 687b ldr r3, [r7, #4]
- 80089b0: 681b ldr r3, [r3, #0]
- 80089b2: 4a2d ldr r2, [pc, #180] @ (8008a68 <HAL_DMA_Abort+0x23c>)
- 80089b4: 4293 cmp r3, r2
- 80089b6: d040 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 80089b8: 687b ldr r3, [r7, #4]
- 80089ba: 681b ldr r3, [r3, #0]
- 80089bc: 4a2b ldr r2, [pc, #172] @ (8008a6c <HAL_DMA_Abort+0x240>)
- 80089be: 4293 cmp r3, r2
- 80089c0: d03b beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 80089c2: 687b ldr r3, [r7, #4]
- 80089c4: 681b ldr r3, [r3, #0]
- 80089c6: 4a2a ldr r2, [pc, #168] @ (8008a70 <HAL_DMA_Abort+0x244>)
- 80089c8: 4293 cmp r3, r2
- 80089ca: d036 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 80089cc: 687b ldr r3, [r7, #4]
- 80089ce: 681b ldr r3, [r3, #0]
- 80089d0: 4a28 ldr r2, [pc, #160] @ (8008a74 <HAL_DMA_Abort+0x248>)
- 80089d2: 4293 cmp r3, r2
- 80089d4: d031 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 80089d6: 687b ldr r3, [r7, #4]
- 80089d8: 681b ldr r3, [r3, #0]
- 80089da: 4a27 ldr r2, [pc, #156] @ (8008a78 <HAL_DMA_Abort+0x24c>)
- 80089dc: 4293 cmp r3, r2
- 80089de: d02c beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 80089e0: 687b ldr r3, [r7, #4]
- 80089e2: 681b ldr r3, [r3, #0]
- 80089e4: 4a25 ldr r2, [pc, #148] @ (8008a7c <HAL_DMA_Abort+0x250>)
- 80089e6: 4293 cmp r3, r2
- 80089e8: d027 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 80089ea: 687b ldr r3, [r7, #4]
- 80089ec: 681b ldr r3, [r3, #0]
- 80089ee: 4a24 ldr r2, [pc, #144] @ (8008a80 <HAL_DMA_Abort+0x254>)
- 80089f0: 4293 cmp r3, r2
- 80089f2: d022 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 80089f4: 687b ldr r3, [r7, #4]
- 80089f6: 681b ldr r3, [r3, #0]
- 80089f8: 4a22 ldr r2, [pc, #136] @ (8008a84 <HAL_DMA_Abort+0x258>)
- 80089fa: 4293 cmp r3, r2
- 80089fc: d01d beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 80089fe: 687b ldr r3, [r7, #4]
- 8008a00: 681b ldr r3, [r3, #0]
- 8008a02: 4a21 ldr r2, [pc, #132] @ (8008a88 <HAL_DMA_Abort+0x25c>)
- 8008a04: 4293 cmp r3, r2
- 8008a06: d018 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 8008a08: 687b ldr r3, [r7, #4]
- 8008a0a: 681b ldr r3, [r3, #0]
- 8008a0c: 4a1f ldr r2, [pc, #124] @ (8008a8c <HAL_DMA_Abort+0x260>)
- 8008a0e: 4293 cmp r3, r2
- 8008a10: d013 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 8008a12: 687b ldr r3, [r7, #4]
- 8008a14: 681b ldr r3, [r3, #0]
- 8008a16: 4a1e ldr r2, [pc, #120] @ (8008a90 <HAL_DMA_Abort+0x264>)
- 8008a18: 4293 cmp r3, r2
- 8008a1a: d00e beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 8008a1c: 687b ldr r3, [r7, #4]
- 8008a1e: 681b ldr r3, [r3, #0]
- 8008a20: 4a1c ldr r2, [pc, #112] @ (8008a94 <HAL_DMA_Abort+0x268>)
- 8008a22: 4293 cmp r3, r2
- 8008a24: d009 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 8008a26: 687b ldr r3, [r7, #4]
- 8008a28: 681b ldr r3, [r3, #0]
- 8008a2a: 4a1b ldr r2, [pc, #108] @ (8008a98 <HAL_DMA_Abort+0x26c>)
- 8008a2c: 4293 cmp r3, r2
- 8008a2e: d004 beq.n 8008a3a <HAL_DMA_Abort+0x20e>
- 8008a30: 687b ldr r3, [r7, #4]
- 8008a32: 681b ldr r3, [r3, #0]
- 8008a34: 4a19 ldr r2, [pc, #100] @ (8008a9c <HAL_DMA_Abort+0x270>)
- 8008a36: 4293 cmp r3, r2
- 8008a38: d132 bne.n 8008aa0 <HAL_DMA_Abort+0x274>
- 8008a3a: 2301 movs r3, #1
- 8008a3c: e031 b.n 8008aa2 <HAL_DMA_Abort+0x276>
- 8008a3e: bf00 nop
- 8008a40: 40020010 .word 0x40020010
- 8008a44: 40020028 .word 0x40020028
- 8008a48: 40020040 .word 0x40020040
- 8008a4c: 40020058 .word 0x40020058
- 8008a50: 40020070 .word 0x40020070
- 8008a54: 40020088 .word 0x40020088
- 8008a58: 400200a0 .word 0x400200a0
- 8008a5c: 400200b8 .word 0x400200b8
- 8008a60: 40020410 .word 0x40020410
- 8008a64: 40020428 .word 0x40020428
- 8008a68: 40020440 .word 0x40020440
- 8008a6c: 40020458 .word 0x40020458
- 8008a70: 40020470 .word 0x40020470
- 8008a74: 40020488 .word 0x40020488
- 8008a78: 400204a0 .word 0x400204a0
- 8008a7c: 400204b8 .word 0x400204b8
- 8008a80: 58025408 .word 0x58025408
- 8008a84: 5802541c .word 0x5802541c
- 8008a88: 58025430 .word 0x58025430
- 8008a8c: 58025444 .word 0x58025444
- 8008a90: 58025458 .word 0x58025458
- 8008a94: 5802546c .word 0x5802546c
- 8008a98: 58025480 .word 0x58025480
- 8008a9c: 58025494 .word 0x58025494
- 8008aa0: 2300 movs r3, #0
- 8008aa2: 2b00 cmp r3, #0
- 8008aa4: d007 beq.n 8008ab6 <HAL_DMA_Abort+0x28a>
- {
- /* disable the DMAMUX sync overrun IT */
- hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
- 8008aa6: 687b ldr r3, [r7, #4]
- 8008aa8: 6e1b ldr r3, [r3, #96] @ 0x60
- 8008aaa: 681a ldr r2, [r3, #0]
- 8008aac: 687b ldr r3, [r7, #4]
- 8008aae: 6e1b ldr r3, [r3, #96] @ 0x60
- 8008ab0: f422 7280 bic.w r2, r2, #256 @ 0x100
- 8008ab4: 601a str r2, [r3, #0]
- }
- /* Disable the stream */
- __HAL_DMA_DISABLE(hdma);
- 8008ab6: 687b ldr r3, [r7, #4]
- 8008ab8: 681b ldr r3, [r3, #0]
- 8008aba: 4a6d ldr r2, [pc, #436] @ (8008c70 <HAL_DMA_Abort+0x444>)
- 8008abc: 4293 cmp r3, r2
- 8008abe: d04a beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008ac0: 687b ldr r3, [r7, #4]
- 8008ac2: 681b ldr r3, [r3, #0]
- 8008ac4: 4a6b ldr r2, [pc, #428] @ (8008c74 <HAL_DMA_Abort+0x448>)
- 8008ac6: 4293 cmp r3, r2
- 8008ac8: d045 beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008aca: 687b ldr r3, [r7, #4]
- 8008acc: 681b ldr r3, [r3, #0]
- 8008ace: 4a6a ldr r2, [pc, #424] @ (8008c78 <HAL_DMA_Abort+0x44c>)
- 8008ad0: 4293 cmp r3, r2
- 8008ad2: d040 beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008ad4: 687b ldr r3, [r7, #4]
- 8008ad6: 681b ldr r3, [r3, #0]
- 8008ad8: 4a68 ldr r2, [pc, #416] @ (8008c7c <HAL_DMA_Abort+0x450>)
- 8008ada: 4293 cmp r3, r2
- 8008adc: d03b beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008ade: 687b ldr r3, [r7, #4]
- 8008ae0: 681b ldr r3, [r3, #0]
- 8008ae2: 4a67 ldr r2, [pc, #412] @ (8008c80 <HAL_DMA_Abort+0x454>)
- 8008ae4: 4293 cmp r3, r2
- 8008ae6: d036 beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008ae8: 687b ldr r3, [r7, #4]
- 8008aea: 681b ldr r3, [r3, #0]
- 8008aec: 4a65 ldr r2, [pc, #404] @ (8008c84 <HAL_DMA_Abort+0x458>)
- 8008aee: 4293 cmp r3, r2
- 8008af0: d031 beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008af2: 687b ldr r3, [r7, #4]
- 8008af4: 681b ldr r3, [r3, #0]
- 8008af6: 4a64 ldr r2, [pc, #400] @ (8008c88 <HAL_DMA_Abort+0x45c>)
- 8008af8: 4293 cmp r3, r2
- 8008afa: d02c beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008afc: 687b ldr r3, [r7, #4]
- 8008afe: 681b ldr r3, [r3, #0]
- 8008b00: 4a62 ldr r2, [pc, #392] @ (8008c8c <HAL_DMA_Abort+0x460>)
- 8008b02: 4293 cmp r3, r2
- 8008b04: d027 beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008b06: 687b ldr r3, [r7, #4]
- 8008b08: 681b ldr r3, [r3, #0]
- 8008b0a: 4a61 ldr r2, [pc, #388] @ (8008c90 <HAL_DMA_Abort+0x464>)
- 8008b0c: 4293 cmp r3, r2
- 8008b0e: d022 beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008b10: 687b ldr r3, [r7, #4]
- 8008b12: 681b ldr r3, [r3, #0]
- 8008b14: 4a5f ldr r2, [pc, #380] @ (8008c94 <HAL_DMA_Abort+0x468>)
- 8008b16: 4293 cmp r3, r2
- 8008b18: d01d beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008b1a: 687b ldr r3, [r7, #4]
- 8008b1c: 681b ldr r3, [r3, #0]
- 8008b1e: 4a5e ldr r2, [pc, #376] @ (8008c98 <HAL_DMA_Abort+0x46c>)
- 8008b20: 4293 cmp r3, r2
- 8008b22: d018 beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008b24: 687b ldr r3, [r7, #4]
- 8008b26: 681b ldr r3, [r3, #0]
- 8008b28: 4a5c ldr r2, [pc, #368] @ (8008c9c <HAL_DMA_Abort+0x470>)
- 8008b2a: 4293 cmp r3, r2
- 8008b2c: d013 beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008b2e: 687b ldr r3, [r7, #4]
- 8008b30: 681b ldr r3, [r3, #0]
- 8008b32: 4a5b ldr r2, [pc, #364] @ (8008ca0 <HAL_DMA_Abort+0x474>)
- 8008b34: 4293 cmp r3, r2
- 8008b36: d00e beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008b38: 687b ldr r3, [r7, #4]
- 8008b3a: 681b ldr r3, [r3, #0]
- 8008b3c: 4a59 ldr r2, [pc, #356] @ (8008ca4 <HAL_DMA_Abort+0x478>)
- 8008b3e: 4293 cmp r3, r2
- 8008b40: d009 beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008b42: 687b ldr r3, [r7, #4]
- 8008b44: 681b ldr r3, [r3, #0]
- 8008b46: 4a58 ldr r2, [pc, #352] @ (8008ca8 <HAL_DMA_Abort+0x47c>)
- 8008b48: 4293 cmp r3, r2
- 8008b4a: d004 beq.n 8008b56 <HAL_DMA_Abort+0x32a>
- 8008b4c: 687b ldr r3, [r7, #4]
- 8008b4e: 681b ldr r3, [r3, #0]
- 8008b50: 4a56 ldr r2, [pc, #344] @ (8008cac <HAL_DMA_Abort+0x480>)
- 8008b52: 4293 cmp r3, r2
- 8008b54: d108 bne.n 8008b68 <HAL_DMA_Abort+0x33c>
- 8008b56: 687b ldr r3, [r7, #4]
- 8008b58: 681b ldr r3, [r3, #0]
- 8008b5a: 681a ldr r2, [r3, #0]
- 8008b5c: 687b ldr r3, [r7, #4]
- 8008b5e: 681b ldr r3, [r3, #0]
- 8008b60: f022 0201 bic.w r2, r2, #1
- 8008b64: 601a str r2, [r3, #0]
- 8008b66: e007 b.n 8008b78 <HAL_DMA_Abort+0x34c>
- 8008b68: 687b ldr r3, [r7, #4]
- 8008b6a: 681b ldr r3, [r3, #0]
- 8008b6c: 681a ldr r2, [r3, #0]
- 8008b6e: 687b ldr r3, [r7, #4]
- 8008b70: 681b ldr r3, [r3, #0]
- 8008b72: f022 0201 bic.w r2, r2, #1
- 8008b76: 601a str r2, [r3, #0]
- /* Check if the DMA Stream is effectively disabled */
- while(((*enableRegister) & DMA_SxCR_EN) != 0U)
- 8008b78: e013 b.n 8008ba2 <HAL_DMA_Abort+0x376>
- {
- /* Check for the Timeout */
- if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
- 8008b7a: f7fc fcf5 bl 8005568 <HAL_GetTick>
- 8008b7e: 4602 mov r2, r0
- 8008b80: 693b ldr r3, [r7, #16]
- 8008b82: 1ad3 subs r3, r2, r3
- 8008b84: 2b05 cmp r3, #5
- 8008b86: d90c bls.n 8008ba2 <HAL_DMA_Abort+0x376>
- {
- /* Update error code */
- hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
- 8008b88: 687b ldr r3, [r7, #4]
- 8008b8a: 2220 movs r2, #32
- 8008b8c: 655a str r2, [r3, #84] @ 0x54
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_ERROR;
- 8008b8e: 687b ldr r3, [r7, #4]
- 8008b90: 2203 movs r2, #3
- 8008b92: f883 2035 strb.w r2, [r3, #53] @ 0x35
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- 8008b96: 687b ldr r3, [r7, #4]
- 8008b98: 2200 movs r2, #0
- 8008b9a: f883 2034 strb.w r2, [r3, #52] @ 0x34
- return HAL_ERROR;
- 8008b9e: 2301 movs r3, #1
- 8008ba0: e12d b.n 8008dfe <HAL_DMA_Abort+0x5d2>
- while(((*enableRegister) & DMA_SxCR_EN) != 0U)
- 8008ba2: 697b ldr r3, [r7, #20]
- 8008ba4: 681b ldr r3, [r3, #0]
- 8008ba6: f003 0301 and.w r3, r3, #1
- 8008baa: 2b00 cmp r3, #0
- 8008bac: d1e5 bne.n 8008b7a <HAL_DMA_Abort+0x34e>
- }
- }
- /* Clear all interrupt flags at correct offset within the register */
- if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
- 8008bae: 687b ldr r3, [r7, #4]
- 8008bb0: 681b ldr r3, [r3, #0]
- 8008bb2: 4a2f ldr r2, [pc, #188] @ (8008c70 <HAL_DMA_Abort+0x444>)
- 8008bb4: 4293 cmp r3, r2
- 8008bb6: d04a beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008bb8: 687b ldr r3, [r7, #4]
- 8008bba: 681b ldr r3, [r3, #0]
- 8008bbc: 4a2d ldr r2, [pc, #180] @ (8008c74 <HAL_DMA_Abort+0x448>)
- 8008bbe: 4293 cmp r3, r2
- 8008bc0: d045 beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008bc2: 687b ldr r3, [r7, #4]
- 8008bc4: 681b ldr r3, [r3, #0]
- 8008bc6: 4a2c ldr r2, [pc, #176] @ (8008c78 <HAL_DMA_Abort+0x44c>)
- 8008bc8: 4293 cmp r3, r2
- 8008bca: d040 beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008bcc: 687b ldr r3, [r7, #4]
- 8008bce: 681b ldr r3, [r3, #0]
- 8008bd0: 4a2a ldr r2, [pc, #168] @ (8008c7c <HAL_DMA_Abort+0x450>)
- 8008bd2: 4293 cmp r3, r2
- 8008bd4: d03b beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008bd6: 687b ldr r3, [r7, #4]
- 8008bd8: 681b ldr r3, [r3, #0]
- 8008bda: 4a29 ldr r2, [pc, #164] @ (8008c80 <HAL_DMA_Abort+0x454>)
- 8008bdc: 4293 cmp r3, r2
- 8008bde: d036 beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008be0: 687b ldr r3, [r7, #4]
- 8008be2: 681b ldr r3, [r3, #0]
- 8008be4: 4a27 ldr r2, [pc, #156] @ (8008c84 <HAL_DMA_Abort+0x458>)
- 8008be6: 4293 cmp r3, r2
- 8008be8: d031 beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008bea: 687b ldr r3, [r7, #4]
- 8008bec: 681b ldr r3, [r3, #0]
- 8008bee: 4a26 ldr r2, [pc, #152] @ (8008c88 <HAL_DMA_Abort+0x45c>)
- 8008bf0: 4293 cmp r3, r2
- 8008bf2: d02c beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008bf4: 687b ldr r3, [r7, #4]
- 8008bf6: 681b ldr r3, [r3, #0]
- 8008bf8: 4a24 ldr r2, [pc, #144] @ (8008c8c <HAL_DMA_Abort+0x460>)
- 8008bfa: 4293 cmp r3, r2
- 8008bfc: d027 beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008bfe: 687b ldr r3, [r7, #4]
- 8008c00: 681b ldr r3, [r3, #0]
- 8008c02: 4a23 ldr r2, [pc, #140] @ (8008c90 <HAL_DMA_Abort+0x464>)
- 8008c04: 4293 cmp r3, r2
- 8008c06: d022 beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008c08: 687b ldr r3, [r7, #4]
- 8008c0a: 681b ldr r3, [r3, #0]
- 8008c0c: 4a21 ldr r2, [pc, #132] @ (8008c94 <HAL_DMA_Abort+0x468>)
- 8008c0e: 4293 cmp r3, r2
- 8008c10: d01d beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008c12: 687b ldr r3, [r7, #4]
- 8008c14: 681b ldr r3, [r3, #0]
- 8008c16: 4a20 ldr r2, [pc, #128] @ (8008c98 <HAL_DMA_Abort+0x46c>)
- 8008c18: 4293 cmp r3, r2
- 8008c1a: d018 beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008c1c: 687b ldr r3, [r7, #4]
- 8008c1e: 681b ldr r3, [r3, #0]
- 8008c20: 4a1e ldr r2, [pc, #120] @ (8008c9c <HAL_DMA_Abort+0x470>)
- 8008c22: 4293 cmp r3, r2
- 8008c24: d013 beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008c26: 687b ldr r3, [r7, #4]
- 8008c28: 681b ldr r3, [r3, #0]
- 8008c2a: 4a1d ldr r2, [pc, #116] @ (8008ca0 <HAL_DMA_Abort+0x474>)
- 8008c2c: 4293 cmp r3, r2
- 8008c2e: d00e beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008c30: 687b ldr r3, [r7, #4]
- 8008c32: 681b ldr r3, [r3, #0]
- 8008c34: 4a1b ldr r2, [pc, #108] @ (8008ca4 <HAL_DMA_Abort+0x478>)
- 8008c36: 4293 cmp r3, r2
- 8008c38: d009 beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008c3a: 687b ldr r3, [r7, #4]
- 8008c3c: 681b ldr r3, [r3, #0]
- 8008c3e: 4a1a ldr r2, [pc, #104] @ (8008ca8 <HAL_DMA_Abort+0x47c>)
- 8008c40: 4293 cmp r3, r2
- 8008c42: d004 beq.n 8008c4e <HAL_DMA_Abort+0x422>
- 8008c44: 687b ldr r3, [r7, #4]
- 8008c46: 681b ldr r3, [r3, #0]
- 8008c48: 4a18 ldr r2, [pc, #96] @ (8008cac <HAL_DMA_Abort+0x480>)
- 8008c4a: 4293 cmp r3, r2
- 8008c4c: d101 bne.n 8008c52 <HAL_DMA_Abort+0x426>
- 8008c4e: 2301 movs r3, #1
- 8008c50: e000 b.n 8008c54 <HAL_DMA_Abort+0x428>
- 8008c52: 2300 movs r3, #0
- 8008c54: 2b00 cmp r3, #0
- 8008c56: d02b beq.n 8008cb0 <HAL_DMA_Abort+0x484>
- {
- regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress;
- 8008c58: 687b ldr r3, [r7, #4]
- 8008c5a: 6d9b ldr r3, [r3, #88] @ 0x58
- 8008c5c: 60bb str r3, [r7, #8]
- regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
- 8008c5e: 687b ldr r3, [r7, #4]
- 8008c60: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8008c62: f003 031f and.w r3, r3, #31
- 8008c66: 223f movs r2, #63 @ 0x3f
- 8008c68: 409a lsls r2, r3
- 8008c6a: 68bb ldr r3, [r7, #8]
- 8008c6c: 609a str r2, [r3, #8]
- 8008c6e: e02a b.n 8008cc6 <HAL_DMA_Abort+0x49a>
- 8008c70: 40020010 .word 0x40020010
- 8008c74: 40020028 .word 0x40020028
- 8008c78: 40020040 .word 0x40020040
- 8008c7c: 40020058 .word 0x40020058
- 8008c80: 40020070 .word 0x40020070
- 8008c84: 40020088 .word 0x40020088
- 8008c88: 400200a0 .word 0x400200a0
- 8008c8c: 400200b8 .word 0x400200b8
- 8008c90: 40020410 .word 0x40020410
- 8008c94: 40020428 .word 0x40020428
- 8008c98: 40020440 .word 0x40020440
- 8008c9c: 40020458 .word 0x40020458
- 8008ca0: 40020470 .word 0x40020470
- 8008ca4: 40020488 .word 0x40020488
- 8008ca8: 400204a0 .word 0x400204a0
- 8008cac: 400204b8 .word 0x400204b8
- }
- else /* BDMA channel */
- {
- regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
- 8008cb0: 687b ldr r3, [r7, #4]
- 8008cb2: 6d9b ldr r3, [r3, #88] @ 0x58
- 8008cb4: 60fb str r3, [r7, #12]
- regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
- 8008cb6: 687b ldr r3, [r7, #4]
- 8008cb8: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8008cba: f003 031f and.w r3, r3, #31
- 8008cbe: 2201 movs r2, #1
- 8008cc0: 409a lsls r2, r3
- 8008cc2: 68fb ldr r3, [r7, #12]
- 8008cc4: 605a str r2, [r3, #4]
- }
- if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
- 8008cc6: 687b ldr r3, [r7, #4]
- 8008cc8: 681b ldr r3, [r3, #0]
- 8008cca: 4a4f ldr r2, [pc, #316] @ (8008e08 <HAL_DMA_Abort+0x5dc>)
- 8008ccc: 4293 cmp r3, r2
- 8008cce: d072 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008cd0: 687b ldr r3, [r7, #4]
- 8008cd2: 681b ldr r3, [r3, #0]
- 8008cd4: 4a4d ldr r2, [pc, #308] @ (8008e0c <HAL_DMA_Abort+0x5e0>)
- 8008cd6: 4293 cmp r3, r2
- 8008cd8: d06d beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008cda: 687b ldr r3, [r7, #4]
- 8008cdc: 681b ldr r3, [r3, #0]
- 8008cde: 4a4c ldr r2, [pc, #304] @ (8008e10 <HAL_DMA_Abort+0x5e4>)
- 8008ce0: 4293 cmp r3, r2
- 8008ce2: d068 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008ce4: 687b ldr r3, [r7, #4]
- 8008ce6: 681b ldr r3, [r3, #0]
- 8008ce8: 4a4a ldr r2, [pc, #296] @ (8008e14 <HAL_DMA_Abort+0x5e8>)
- 8008cea: 4293 cmp r3, r2
- 8008cec: d063 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008cee: 687b ldr r3, [r7, #4]
- 8008cf0: 681b ldr r3, [r3, #0]
- 8008cf2: 4a49 ldr r2, [pc, #292] @ (8008e18 <HAL_DMA_Abort+0x5ec>)
- 8008cf4: 4293 cmp r3, r2
- 8008cf6: d05e beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008cf8: 687b ldr r3, [r7, #4]
- 8008cfa: 681b ldr r3, [r3, #0]
- 8008cfc: 4a47 ldr r2, [pc, #284] @ (8008e1c <HAL_DMA_Abort+0x5f0>)
- 8008cfe: 4293 cmp r3, r2
- 8008d00: d059 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d02: 687b ldr r3, [r7, #4]
- 8008d04: 681b ldr r3, [r3, #0]
- 8008d06: 4a46 ldr r2, [pc, #280] @ (8008e20 <HAL_DMA_Abort+0x5f4>)
- 8008d08: 4293 cmp r3, r2
- 8008d0a: d054 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d0c: 687b ldr r3, [r7, #4]
- 8008d0e: 681b ldr r3, [r3, #0]
- 8008d10: 4a44 ldr r2, [pc, #272] @ (8008e24 <HAL_DMA_Abort+0x5f8>)
- 8008d12: 4293 cmp r3, r2
- 8008d14: d04f beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d16: 687b ldr r3, [r7, #4]
- 8008d18: 681b ldr r3, [r3, #0]
- 8008d1a: 4a43 ldr r2, [pc, #268] @ (8008e28 <HAL_DMA_Abort+0x5fc>)
- 8008d1c: 4293 cmp r3, r2
- 8008d1e: d04a beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d20: 687b ldr r3, [r7, #4]
- 8008d22: 681b ldr r3, [r3, #0]
- 8008d24: 4a41 ldr r2, [pc, #260] @ (8008e2c <HAL_DMA_Abort+0x600>)
- 8008d26: 4293 cmp r3, r2
- 8008d28: d045 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d2a: 687b ldr r3, [r7, #4]
- 8008d2c: 681b ldr r3, [r3, #0]
- 8008d2e: 4a40 ldr r2, [pc, #256] @ (8008e30 <HAL_DMA_Abort+0x604>)
- 8008d30: 4293 cmp r3, r2
- 8008d32: d040 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d34: 687b ldr r3, [r7, #4]
- 8008d36: 681b ldr r3, [r3, #0]
- 8008d38: 4a3e ldr r2, [pc, #248] @ (8008e34 <HAL_DMA_Abort+0x608>)
- 8008d3a: 4293 cmp r3, r2
- 8008d3c: d03b beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d3e: 687b ldr r3, [r7, #4]
- 8008d40: 681b ldr r3, [r3, #0]
- 8008d42: 4a3d ldr r2, [pc, #244] @ (8008e38 <HAL_DMA_Abort+0x60c>)
- 8008d44: 4293 cmp r3, r2
- 8008d46: d036 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d48: 687b ldr r3, [r7, #4]
- 8008d4a: 681b ldr r3, [r3, #0]
- 8008d4c: 4a3b ldr r2, [pc, #236] @ (8008e3c <HAL_DMA_Abort+0x610>)
- 8008d4e: 4293 cmp r3, r2
- 8008d50: d031 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d52: 687b ldr r3, [r7, #4]
- 8008d54: 681b ldr r3, [r3, #0]
- 8008d56: 4a3a ldr r2, [pc, #232] @ (8008e40 <HAL_DMA_Abort+0x614>)
- 8008d58: 4293 cmp r3, r2
- 8008d5a: d02c beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d5c: 687b ldr r3, [r7, #4]
- 8008d5e: 681b ldr r3, [r3, #0]
- 8008d60: 4a38 ldr r2, [pc, #224] @ (8008e44 <HAL_DMA_Abort+0x618>)
- 8008d62: 4293 cmp r3, r2
- 8008d64: d027 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d66: 687b ldr r3, [r7, #4]
- 8008d68: 681b ldr r3, [r3, #0]
- 8008d6a: 4a37 ldr r2, [pc, #220] @ (8008e48 <HAL_DMA_Abort+0x61c>)
- 8008d6c: 4293 cmp r3, r2
- 8008d6e: d022 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d70: 687b ldr r3, [r7, #4]
- 8008d72: 681b ldr r3, [r3, #0]
- 8008d74: 4a35 ldr r2, [pc, #212] @ (8008e4c <HAL_DMA_Abort+0x620>)
- 8008d76: 4293 cmp r3, r2
- 8008d78: d01d beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d7a: 687b ldr r3, [r7, #4]
- 8008d7c: 681b ldr r3, [r3, #0]
- 8008d7e: 4a34 ldr r2, [pc, #208] @ (8008e50 <HAL_DMA_Abort+0x624>)
- 8008d80: 4293 cmp r3, r2
- 8008d82: d018 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d84: 687b ldr r3, [r7, #4]
- 8008d86: 681b ldr r3, [r3, #0]
- 8008d88: 4a32 ldr r2, [pc, #200] @ (8008e54 <HAL_DMA_Abort+0x628>)
- 8008d8a: 4293 cmp r3, r2
- 8008d8c: d013 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d8e: 687b ldr r3, [r7, #4]
- 8008d90: 681b ldr r3, [r3, #0]
- 8008d92: 4a31 ldr r2, [pc, #196] @ (8008e58 <HAL_DMA_Abort+0x62c>)
- 8008d94: 4293 cmp r3, r2
- 8008d96: d00e beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008d98: 687b ldr r3, [r7, #4]
- 8008d9a: 681b ldr r3, [r3, #0]
- 8008d9c: 4a2f ldr r2, [pc, #188] @ (8008e5c <HAL_DMA_Abort+0x630>)
- 8008d9e: 4293 cmp r3, r2
- 8008da0: d009 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008da2: 687b ldr r3, [r7, #4]
- 8008da4: 681b ldr r3, [r3, #0]
- 8008da6: 4a2e ldr r2, [pc, #184] @ (8008e60 <HAL_DMA_Abort+0x634>)
- 8008da8: 4293 cmp r3, r2
- 8008daa: d004 beq.n 8008db6 <HAL_DMA_Abort+0x58a>
- 8008dac: 687b ldr r3, [r7, #4]
- 8008dae: 681b ldr r3, [r3, #0]
- 8008db0: 4a2c ldr r2, [pc, #176] @ (8008e64 <HAL_DMA_Abort+0x638>)
- 8008db2: 4293 cmp r3, r2
- 8008db4: d101 bne.n 8008dba <HAL_DMA_Abort+0x58e>
- 8008db6: 2301 movs r3, #1
- 8008db8: e000 b.n 8008dbc <HAL_DMA_Abort+0x590>
- 8008dba: 2300 movs r3, #0
- 8008dbc: 2b00 cmp r3, #0
- 8008dbe: d015 beq.n 8008dec <HAL_DMA_Abort+0x5c0>
- {
- /* Clear the DMAMUX synchro overrun flag */
- hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
- 8008dc0: 687b ldr r3, [r7, #4]
- 8008dc2: 6e5b ldr r3, [r3, #100] @ 0x64
- 8008dc4: 687a ldr r2, [r7, #4]
- 8008dc6: 6e92 ldr r2, [r2, #104] @ 0x68
- 8008dc8: 605a str r2, [r3, #4]
- if(hdma->DMAmuxRequestGen != 0U)
- 8008dca: 687b ldr r3, [r7, #4]
- 8008dcc: 6edb ldr r3, [r3, #108] @ 0x6c
- 8008dce: 2b00 cmp r3, #0
- 8008dd0: d00c beq.n 8008dec <HAL_DMA_Abort+0x5c0>
- {
- /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT */
- /* disable the request gen overrun IT */
- hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
- 8008dd2: 687b ldr r3, [r7, #4]
- 8008dd4: 6edb ldr r3, [r3, #108] @ 0x6c
- 8008dd6: 681a ldr r2, [r3, #0]
- 8008dd8: 687b ldr r3, [r7, #4]
- 8008dda: 6edb ldr r3, [r3, #108] @ 0x6c
- 8008ddc: f422 7280 bic.w r2, r2, #256 @ 0x100
- 8008de0: 601a str r2, [r3, #0]
- /* Clear the DMAMUX request generator overrun flag */
- hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
- 8008de2: 687b ldr r3, [r7, #4]
- 8008de4: 6f1b ldr r3, [r3, #112] @ 0x70
- 8008de6: 687a ldr r2, [r7, #4]
- 8008de8: 6f52 ldr r2, [r2, #116] @ 0x74
- 8008dea: 605a str r2, [r3, #4]
- }
- }
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
- 8008dec: 687b ldr r3, [r7, #4]
- 8008dee: 2201 movs r2, #1
- 8008df0: f883 2035 strb.w r2, [r3, #53] @ 0x35
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- 8008df4: 687b ldr r3, [r7, #4]
- 8008df6: 2200 movs r2, #0
- 8008df8: f883 2034 strb.w r2, [r3, #52] @ 0x34
- }
- return HAL_OK;
- 8008dfc: 2300 movs r3, #0
- }
- 8008dfe: 4618 mov r0, r3
- 8008e00: 3718 adds r7, #24
- 8008e02: 46bd mov sp, r7
- 8008e04: bd80 pop {r7, pc}
- 8008e06: bf00 nop
- 8008e08: 40020010 .word 0x40020010
- 8008e0c: 40020028 .word 0x40020028
- 8008e10: 40020040 .word 0x40020040
- 8008e14: 40020058 .word 0x40020058
- 8008e18: 40020070 .word 0x40020070
- 8008e1c: 40020088 .word 0x40020088
- 8008e20: 400200a0 .word 0x400200a0
- 8008e24: 400200b8 .word 0x400200b8
- 8008e28: 40020410 .word 0x40020410
- 8008e2c: 40020428 .word 0x40020428
- 8008e30: 40020440 .word 0x40020440
- 8008e34: 40020458 .word 0x40020458
- 8008e38: 40020470 .word 0x40020470
- 8008e3c: 40020488 .word 0x40020488
- 8008e40: 400204a0 .word 0x400204a0
- 8008e44: 400204b8 .word 0x400204b8
- 8008e48: 58025408 .word 0x58025408
- 8008e4c: 5802541c .word 0x5802541c
- 8008e50: 58025430 .word 0x58025430
- 8008e54: 58025444 .word 0x58025444
- 8008e58: 58025458 .word 0x58025458
- 8008e5c: 5802546c .word 0x5802546c
- 8008e60: 58025480 .word 0x58025480
- 8008e64: 58025494 .word 0x58025494
- 08008e68 <HAL_DMA_Abort_IT>:
- * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
- {
- 8008e68: b580 push {r7, lr}
- 8008e6a: b084 sub sp, #16
- 8008e6c: af00 add r7, sp, #0
- 8008e6e: 6078 str r0, [r7, #4]
- BDMA_Base_Registers *regs_bdma;
- /* Check the DMA peripheral handle */
- if(hdma == NULL)
- 8008e70: 687b ldr r3, [r7, #4]
- 8008e72: 2b00 cmp r3, #0
- 8008e74: d101 bne.n 8008e7a <HAL_DMA_Abort_IT+0x12>
- {
- return HAL_ERROR;
- 8008e76: 2301 movs r3, #1
- 8008e78: e237 b.n 80092ea <HAL_DMA_Abort_IT+0x482>
- }
- if(hdma->State != HAL_DMA_STATE_BUSY)
- 8008e7a: 687b ldr r3, [r7, #4]
- 8008e7c: f893 3035 ldrb.w r3, [r3, #53] @ 0x35
- 8008e80: b2db uxtb r3, r3
- 8008e82: 2b02 cmp r3, #2
- 8008e84: d004 beq.n 8008e90 <HAL_DMA_Abort_IT+0x28>
- {
- hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
- 8008e86: 687b ldr r3, [r7, #4]
- 8008e88: 2280 movs r2, #128 @ 0x80
- 8008e8a: 655a str r2, [r3, #84] @ 0x54
- return HAL_ERROR;
- 8008e8c: 2301 movs r3, #1
- 8008e8e: e22c b.n 80092ea <HAL_DMA_Abort_IT+0x482>
- }
- else
- {
- if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
- 8008e90: 687b ldr r3, [r7, #4]
- 8008e92: 681b ldr r3, [r3, #0]
- 8008e94: 4a5c ldr r2, [pc, #368] @ (8009008 <HAL_DMA_Abort_IT+0x1a0>)
- 8008e96: 4293 cmp r3, r2
- 8008e98: d04a beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008e9a: 687b ldr r3, [r7, #4]
- 8008e9c: 681b ldr r3, [r3, #0]
- 8008e9e: 4a5b ldr r2, [pc, #364] @ (800900c <HAL_DMA_Abort_IT+0x1a4>)
- 8008ea0: 4293 cmp r3, r2
- 8008ea2: d045 beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008ea4: 687b ldr r3, [r7, #4]
- 8008ea6: 681b ldr r3, [r3, #0]
- 8008ea8: 4a59 ldr r2, [pc, #356] @ (8009010 <HAL_DMA_Abort_IT+0x1a8>)
- 8008eaa: 4293 cmp r3, r2
- 8008eac: d040 beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008eae: 687b ldr r3, [r7, #4]
- 8008eb0: 681b ldr r3, [r3, #0]
- 8008eb2: 4a58 ldr r2, [pc, #352] @ (8009014 <HAL_DMA_Abort_IT+0x1ac>)
- 8008eb4: 4293 cmp r3, r2
- 8008eb6: d03b beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008eb8: 687b ldr r3, [r7, #4]
- 8008eba: 681b ldr r3, [r3, #0]
- 8008ebc: 4a56 ldr r2, [pc, #344] @ (8009018 <HAL_DMA_Abort_IT+0x1b0>)
- 8008ebe: 4293 cmp r3, r2
- 8008ec0: d036 beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008ec2: 687b ldr r3, [r7, #4]
- 8008ec4: 681b ldr r3, [r3, #0]
- 8008ec6: 4a55 ldr r2, [pc, #340] @ (800901c <HAL_DMA_Abort_IT+0x1b4>)
- 8008ec8: 4293 cmp r3, r2
- 8008eca: d031 beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008ecc: 687b ldr r3, [r7, #4]
- 8008ece: 681b ldr r3, [r3, #0]
- 8008ed0: 4a53 ldr r2, [pc, #332] @ (8009020 <HAL_DMA_Abort_IT+0x1b8>)
- 8008ed2: 4293 cmp r3, r2
- 8008ed4: d02c beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008ed6: 687b ldr r3, [r7, #4]
- 8008ed8: 681b ldr r3, [r3, #0]
- 8008eda: 4a52 ldr r2, [pc, #328] @ (8009024 <HAL_DMA_Abort_IT+0x1bc>)
- 8008edc: 4293 cmp r3, r2
- 8008ede: d027 beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008ee0: 687b ldr r3, [r7, #4]
- 8008ee2: 681b ldr r3, [r3, #0]
- 8008ee4: 4a50 ldr r2, [pc, #320] @ (8009028 <HAL_DMA_Abort_IT+0x1c0>)
- 8008ee6: 4293 cmp r3, r2
- 8008ee8: d022 beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008eea: 687b ldr r3, [r7, #4]
- 8008eec: 681b ldr r3, [r3, #0]
- 8008eee: 4a4f ldr r2, [pc, #316] @ (800902c <HAL_DMA_Abort_IT+0x1c4>)
- 8008ef0: 4293 cmp r3, r2
- 8008ef2: d01d beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008ef4: 687b ldr r3, [r7, #4]
- 8008ef6: 681b ldr r3, [r3, #0]
- 8008ef8: 4a4d ldr r2, [pc, #308] @ (8009030 <HAL_DMA_Abort_IT+0x1c8>)
- 8008efa: 4293 cmp r3, r2
- 8008efc: d018 beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008efe: 687b ldr r3, [r7, #4]
- 8008f00: 681b ldr r3, [r3, #0]
- 8008f02: 4a4c ldr r2, [pc, #304] @ (8009034 <HAL_DMA_Abort_IT+0x1cc>)
- 8008f04: 4293 cmp r3, r2
- 8008f06: d013 beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008f08: 687b ldr r3, [r7, #4]
- 8008f0a: 681b ldr r3, [r3, #0]
- 8008f0c: 4a4a ldr r2, [pc, #296] @ (8009038 <HAL_DMA_Abort_IT+0x1d0>)
- 8008f0e: 4293 cmp r3, r2
- 8008f10: d00e beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008f12: 687b ldr r3, [r7, #4]
- 8008f14: 681b ldr r3, [r3, #0]
- 8008f16: 4a49 ldr r2, [pc, #292] @ (800903c <HAL_DMA_Abort_IT+0x1d4>)
- 8008f18: 4293 cmp r3, r2
- 8008f1a: d009 beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008f1c: 687b ldr r3, [r7, #4]
- 8008f1e: 681b ldr r3, [r3, #0]
- 8008f20: 4a47 ldr r2, [pc, #284] @ (8009040 <HAL_DMA_Abort_IT+0x1d8>)
- 8008f22: 4293 cmp r3, r2
- 8008f24: d004 beq.n 8008f30 <HAL_DMA_Abort_IT+0xc8>
- 8008f26: 687b ldr r3, [r7, #4]
- 8008f28: 681b ldr r3, [r3, #0]
- 8008f2a: 4a46 ldr r2, [pc, #280] @ (8009044 <HAL_DMA_Abort_IT+0x1dc>)
- 8008f2c: 4293 cmp r3, r2
- 8008f2e: d101 bne.n 8008f34 <HAL_DMA_Abort_IT+0xcc>
- 8008f30: 2301 movs r3, #1
- 8008f32: e000 b.n 8008f36 <HAL_DMA_Abort_IT+0xce>
- 8008f34: 2300 movs r3, #0
- 8008f36: 2b00 cmp r3, #0
- 8008f38: f000 8086 beq.w 8009048 <HAL_DMA_Abort_IT+0x1e0>
- {
- /* Set Abort State */
- hdma->State = HAL_DMA_STATE_ABORT;
- 8008f3c: 687b ldr r3, [r7, #4]
- 8008f3e: 2204 movs r2, #4
- 8008f40: f883 2035 strb.w r2, [r3, #53] @ 0x35
- /* Disable the stream */
- __HAL_DMA_DISABLE(hdma);
- 8008f44: 687b ldr r3, [r7, #4]
- 8008f46: 681b ldr r3, [r3, #0]
- 8008f48: 4a2f ldr r2, [pc, #188] @ (8009008 <HAL_DMA_Abort_IT+0x1a0>)
- 8008f4a: 4293 cmp r3, r2
- 8008f4c: d04a beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008f4e: 687b ldr r3, [r7, #4]
- 8008f50: 681b ldr r3, [r3, #0]
- 8008f52: 4a2e ldr r2, [pc, #184] @ (800900c <HAL_DMA_Abort_IT+0x1a4>)
- 8008f54: 4293 cmp r3, r2
- 8008f56: d045 beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008f58: 687b ldr r3, [r7, #4]
- 8008f5a: 681b ldr r3, [r3, #0]
- 8008f5c: 4a2c ldr r2, [pc, #176] @ (8009010 <HAL_DMA_Abort_IT+0x1a8>)
- 8008f5e: 4293 cmp r3, r2
- 8008f60: d040 beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008f62: 687b ldr r3, [r7, #4]
- 8008f64: 681b ldr r3, [r3, #0]
- 8008f66: 4a2b ldr r2, [pc, #172] @ (8009014 <HAL_DMA_Abort_IT+0x1ac>)
- 8008f68: 4293 cmp r3, r2
- 8008f6a: d03b beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008f6c: 687b ldr r3, [r7, #4]
- 8008f6e: 681b ldr r3, [r3, #0]
- 8008f70: 4a29 ldr r2, [pc, #164] @ (8009018 <HAL_DMA_Abort_IT+0x1b0>)
- 8008f72: 4293 cmp r3, r2
- 8008f74: d036 beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008f76: 687b ldr r3, [r7, #4]
- 8008f78: 681b ldr r3, [r3, #0]
- 8008f7a: 4a28 ldr r2, [pc, #160] @ (800901c <HAL_DMA_Abort_IT+0x1b4>)
- 8008f7c: 4293 cmp r3, r2
- 8008f7e: d031 beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008f80: 687b ldr r3, [r7, #4]
- 8008f82: 681b ldr r3, [r3, #0]
- 8008f84: 4a26 ldr r2, [pc, #152] @ (8009020 <HAL_DMA_Abort_IT+0x1b8>)
- 8008f86: 4293 cmp r3, r2
- 8008f88: d02c beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008f8a: 687b ldr r3, [r7, #4]
- 8008f8c: 681b ldr r3, [r3, #0]
- 8008f8e: 4a25 ldr r2, [pc, #148] @ (8009024 <HAL_DMA_Abort_IT+0x1bc>)
- 8008f90: 4293 cmp r3, r2
- 8008f92: d027 beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008f94: 687b ldr r3, [r7, #4]
- 8008f96: 681b ldr r3, [r3, #0]
- 8008f98: 4a23 ldr r2, [pc, #140] @ (8009028 <HAL_DMA_Abort_IT+0x1c0>)
- 8008f9a: 4293 cmp r3, r2
- 8008f9c: d022 beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008f9e: 687b ldr r3, [r7, #4]
- 8008fa0: 681b ldr r3, [r3, #0]
- 8008fa2: 4a22 ldr r2, [pc, #136] @ (800902c <HAL_DMA_Abort_IT+0x1c4>)
- 8008fa4: 4293 cmp r3, r2
- 8008fa6: d01d beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008fa8: 687b ldr r3, [r7, #4]
- 8008faa: 681b ldr r3, [r3, #0]
- 8008fac: 4a20 ldr r2, [pc, #128] @ (8009030 <HAL_DMA_Abort_IT+0x1c8>)
- 8008fae: 4293 cmp r3, r2
- 8008fb0: d018 beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008fb2: 687b ldr r3, [r7, #4]
- 8008fb4: 681b ldr r3, [r3, #0]
- 8008fb6: 4a1f ldr r2, [pc, #124] @ (8009034 <HAL_DMA_Abort_IT+0x1cc>)
- 8008fb8: 4293 cmp r3, r2
- 8008fba: d013 beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008fbc: 687b ldr r3, [r7, #4]
- 8008fbe: 681b ldr r3, [r3, #0]
- 8008fc0: 4a1d ldr r2, [pc, #116] @ (8009038 <HAL_DMA_Abort_IT+0x1d0>)
- 8008fc2: 4293 cmp r3, r2
- 8008fc4: d00e beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008fc6: 687b ldr r3, [r7, #4]
- 8008fc8: 681b ldr r3, [r3, #0]
- 8008fca: 4a1c ldr r2, [pc, #112] @ (800903c <HAL_DMA_Abort_IT+0x1d4>)
- 8008fcc: 4293 cmp r3, r2
- 8008fce: d009 beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008fd0: 687b ldr r3, [r7, #4]
- 8008fd2: 681b ldr r3, [r3, #0]
- 8008fd4: 4a1a ldr r2, [pc, #104] @ (8009040 <HAL_DMA_Abort_IT+0x1d8>)
- 8008fd6: 4293 cmp r3, r2
- 8008fd8: d004 beq.n 8008fe4 <HAL_DMA_Abort_IT+0x17c>
- 8008fda: 687b ldr r3, [r7, #4]
- 8008fdc: 681b ldr r3, [r3, #0]
- 8008fde: 4a19 ldr r2, [pc, #100] @ (8009044 <HAL_DMA_Abort_IT+0x1dc>)
- 8008fe0: 4293 cmp r3, r2
- 8008fe2: d108 bne.n 8008ff6 <HAL_DMA_Abort_IT+0x18e>
- 8008fe4: 687b ldr r3, [r7, #4]
- 8008fe6: 681b ldr r3, [r3, #0]
- 8008fe8: 681a ldr r2, [r3, #0]
- 8008fea: 687b ldr r3, [r7, #4]
- 8008fec: 681b ldr r3, [r3, #0]
- 8008fee: f022 0201 bic.w r2, r2, #1
- 8008ff2: 601a str r2, [r3, #0]
- 8008ff4: e178 b.n 80092e8 <HAL_DMA_Abort_IT+0x480>
- 8008ff6: 687b ldr r3, [r7, #4]
- 8008ff8: 681b ldr r3, [r3, #0]
- 8008ffa: 681a ldr r2, [r3, #0]
- 8008ffc: 687b ldr r3, [r7, #4]
- 8008ffe: 681b ldr r3, [r3, #0]
- 8009000: f022 0201 bic.w r2, r2, #1
- 8009004: 601a str r2, [r3, #0]
- 8009006: e16f b.n 80092e8 <HAL_DMA_Abort_IT+0x480>
- 8009008: 40020010 .word 0x40020010
- 800900c: 40020028 .word 0x40020028
- 8009010: 40020040 .word 0x40020040
- 8009014: 40020058 .word 0x40020058
- 8009018: 40020070 .word 0x40020070
- 800901c: 40020088 .word 0x40020088
- 8009020: 400200a0 .word 0x400200a0
- 8009024: 400200b8 .word 0x400200b8
- 8009028: 40020410 .word 0x40020410
- 800902c: 40020428 .word 0x40020428
- 8009030: 40020440 .word 0x40020440
- 8009034: 40020458 .word 0x40020458
- 8009038: 40020470 .word 0x40020470
- 800903c: 40020488 .word 0x40020488
- 8009040: 400204a0 .word 0x400204a0
- 8009044: 400204b8 .word 0x400204b8
- }
- else /* BDMA channel */
- {
- /* Disable DMA All Interrupts */
- ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE);
- 8009048: 687b ldr r3, [r7, #4]
- 800904a: 681b ldr r3, [r3, #0]
- 800904c: 681a ldr r2, [r3, #0]
- 800904e: 687b ldr r3, [r7, #4]
- 8009050: 681b ldr r3, [r3, #0]
- 8009052: f022 020e bic.w r2, r2, #14
- 8009056: 601a str r2, [r3, #0]
- /* Disable the channel */
- __HAL_DMA_DISABLE(hdma);
- 8009058: 687b ldr r3, [r7, #4]
- 800905a: 681b ldr r3, [r3, #0]
- 800905c: 4a6c ldr r2, [pc, #432] @ (8009210 <HAL_DMA_Abort_IT+0x3a8>)
- 800905e: 4293 cmp r3, r2
- 8009060: d04a beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 8009062: 687b ldr r3, [r7, #4]
- 8009064: 681b ldr r3, [r3, #0]
- 8009066: 4a6b ldr r2, [pc, #428] @ (8009214 <HAL_DMA_Abort_IT+0x3ac>)
- 8009068: 4293 cmp r3, r2
- 800906a: d045 beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 800906c: 687b ldr r3, [r7, #4]
- 800906e: 681b ldr r3, [r3, #0]
- 8009070: 4a69 ldr r2, [pc, #420] @ (8009218 <HAL_DMA_Abort_IT+0x3b0>)
- 8009072: 4293 cmp r3, r2
- 8009074: d040 beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 8009076: 687b ldr r3, [r7, #4]
- 8009078: 681b ldr r3, [r3, #0]
- 800907a: 4a68 ldr r2, [pc, #416] @ (800921c <HAL_DMA_Abort_IT+0x3b4>)
- 800907c: 4293 cmp r3, r2
- 800907e: d03b beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 8009080: 687b ldr r3, [r7, #4]
- 8009082: 681b ldr r3, [r3, #0]
- 8009084: 4a66 ldr r2, [pc, #408] @ (8009220 <HAL_DMA_Abort_IT+0x3b8>)
- 8009086: 4293 cmp r3, r2
- 8009088: d036 beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 800908a: 687b ldr r3, [r7, #4]
- 800908c: 681b ldr r3, [r3, #0]
- 800908e: 4a65 ldr r2, [pc, #404] @ (8009224 <HAL_DMA_Abort_IT+0x3bc>)
- 8009090: 4293 cmp r3, r2
- 8009092: d031 beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 8009094: 687b ldr r3, [r7, #4]
- 8009096: 681b ldr r3, [r3, #0]
- 8009098: 4a63 ldr r2, [pc, #396] @ (8009228 <HAL_DMA_Abort_IT+0x3c0>)
- 800909a: 4293 cmp r3, r2
- 800909c: d02c beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 800909e: 687b ldr r3, [r7, #4]
- 80090a0: 681b ldr r3, [r3, #0]
- 80090a2: 4a62 ldr r2, [pc, #392] @ (800922c <HAL_DMA_Abort_IT+0x3c4>)
- 80090a4: 4293 cmp r3, r2
- 80090a6: d027 beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 80090a8: 687b ldr r3, [r7, #4]
- 80090aa: 681b ldr r3, [r3, #0]
- 80090ac: 4a60 ldr r2, [pc, #384] @ (8009230 <HAL_DMA_Abort_IT+0x3c8>)
- 80090ae: 4293 cmp r3, r2
- 80090b0: d022 beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 80090b2: 687b ldr r3, [r7, #4]
- 80090b4: 681b ldr r3, [r3, #0]
- 80090b6: 4a5f ldr r2, [pc, #380] @ (8009234 <HAL_DMA_Abort_IT+0x3cc>)
- 80090b8: 4293 cmp r3, r2
- 80090ba: d01d beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 80090bc: 687b ldr r3, [r7, #4]
- 80090be: 681b ldr r3, [r3, #0]
- 80090c0: 4a5d ldr r2, [pc, #372] @ (8009238 <HAL_DMA_Abort_IT+0x3d0>)
- 80090c2: 4293 cmp r3, r2
- 80090c4: d018 beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 80090c6: 687b ldr r3, [r7, #4]
- 80090c8: 681b ldr r3, [r3, #0]
- 80090ca: 4a5c ldr r2, [pc, #368] @ (800923c <HAL_DMA_Abort_IT+0x3d4>)
- 80090cc: 4293 cmp r3, r2
- 80090ce: d013 beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 80090d0: 687b ldr r3, [r7, #4]
- 80090d2: 681b ldr r3, [r3, #0]
- 80090d4: 4a5a ldr r2, [pc, #360] @ (8009240 <HAL_DMA_Abort_IT+0x3d8>)
- 80090d6: 4293 cmp r3, r2
- 80090d8: d00e beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 80090da: 687b ldr r3, [r7, #4]
- 80090dc: 681b ldr r3, [r3, #0]
- 80090de: 4a59 ldr r2, [pc, #356] @ (8009244 <HAL_DMA_Abort_IT+0x3dc>)
- 80090e0: 4293 cmp r3, r2
- 80090e2: d009 beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 80090e4: 687b ldr r3, [r7, #4]
- 80090e6: 681b ldr r3, [r3, #0]
- 80090e8: 4a57 ldr r2, [pc, #348] @ (8009248 <HAL_DMA_Abort_IT+0x3e0>)
- 80090ea: 4293 cmp r3, r2
- 80090ec: d004 beq.n 80090f8 <HAL_DMA_Abort_IT+0x290>
- 80090ee: 687b ldr r3, [r7, #4]
- 80090f0: 681b ldr r3, [r3, #0]
- 80090f2: 4a56 ldr r2, [pc, #344] @ (800924c <HAL_DMA_Abort_IT+0x3e4>)
- 80090f4: 4293 cmp r3, r2
- 80090f6: d108 bne.n 800910a <HAL_DMA_Abort_IT+0x2a2>
- 80090f8: 687b ldr r3, [r7, #4]
- 80090fa: 681b ldr r3, [r3, #0]
- 80090fc: 681a ldr r2, [r3, #0]
- 80090fe: 687b ldr r3, [r7, #4]
- 8009100: 681b ldr r3, [r3, #0]
- 8009102: f022 0201 bic.w r2, r2, #1
- 8009106: 601a str r2, [r3, #0]
- 8009108: e007 b.n 800911a <HAL_DMA_Abort_IT+0x2b2>
- 800910a: 687b ldr r3, [r7, #4]
- 800910c: 681b ldr r3, [r3, #0]
- 800910e: 681a ldr r2, [r3, #0]
- 8009110: 687b ldr r3, [r7, #4]
- 8009112: 681b ldr r3, [r3, #0]
- 8009114: f022 0201 bic.w r2, r2, #1
- 8009118: 601a str r2, [r3, #0]
- if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
- 800911a: 687b ldr r3, [r7, #4]
- 800911c: 681b ldr r3, [r3, #0]
- 800911e: 4a3c ldr r2, [pc, #240] @ (8009210 <HAL_DMA_Abort_IT+0x3a8>)
- 8009120: 4293 cmp r3, r2
- 8009122: d072 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 8009124: 687b ldr r3, [r7, #4]
- 8009126: 681b ldr r3, [r3, #0]
- 8009128: 4a3a ldr r2, [pc, #232] @ (8009214 <HAL_DMA_Abort_IT+0x3ac>)
- 800912a: 4293 cmp r3, r2
- 800912c: d06d beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 800912e: 687b ldr r3, [r7, #4]
- 8009130: 681b ldr r3, [r3, #0]
- 8009132: 4a39 ldr r2, [pc, #228] @ (8009218 <HAL_DMA_Abort_IT+0x3b0>)
- 8009134: 4293 cmp r3, r2
- 8009136: d068 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 8009138: 687b ldr r3, [r7, #4]
- 800913a: 681b ldr r3, [r3, #0]
- 800913c: 4a37 ldr r2, [pc, #220] @ (800921c <HAL_DMA_Abort_IT+0x3b4>)
- 800913e: 4293 cmp r3, r2
- 8009140: d063 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 8009142: 687b ldr r3, [r7, #4]
- 8009144: 681b ldr r3, [r3, #0]
- 8009146: 4a36 ldr r2, [pc, #216] @ (8009220 <HAL_DMA_Abort_IT+0x3b8>)
- 8009148: 4293 cmp r3, r2
- 800914a: d05e beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 800914c: 687b ldr r3, [r7, #4]
- 800914e: 681b ldr r3, [r3, #0]
- 8009150: 4a34 ldr r2, [pc, #208] @ (8009224 <HAL_DMA_Abort_IT+0x3bc>)
- 8009152: 4293 cmp r3, r2
- 8009154: d059 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 8009156: 687b ldr r3, [r7, #4]
- 8009158: 681b ldr r3, [r3, #0]
- 800915a: 4a33 ldr r2, [pc, #204] @ (8009228 <HAL_DMA_Abort_IT+0x3c0>)
- 800915c: 4293 cmp r3, r2
- 800915e: d054 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 8009160: 687b ldr r3, [r7, #4]
- 8009162: 681b ldr r3, [r3, #0]
- 8009164: 4a31 ldr r2, [pc, #196] @ (800922c <HAL_DMA_Abort_IT+0x3c4>)
- 8009166: 4293 cmp r3, r2
- 8009168: d04f beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 800916a: 687b ldr r3, [r7, #4]
- 800916c: 681b ldr r3, [r3, #0]
- 800916e: 4a30 ldr r2, [pc, #192] @ (8009230 <HAL_DMA_Abort_IT+0x3c8>)
- 8009170: 4293 cmp r3, r2
- 8009172: d04a beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 8009174: 687b ldr r3, [r7, #4]
- 8009176: 681b ldr r3, [r3, #0]
- 8009178: 4a2e ldr r2, [pc, #184] @ (8009234 <HAL_DMA_Abort_IT+0x3cc>)
- 800917a: 4293 cmp r3, r2
- 800917c: d045 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 800917e: 687b ldr r3, [r7, #4]
- 8009180: 681b ldr r3, [r3, #0]
- 8009182: 4a2d ldr r2, [pc, #180] @ (8009238 <HAL_DMA_Abort_IT+0x3d0>)
- 8009184: 4293 cmp r3, r2
- 8009186: d040 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 8009188: 687b ldr r3, [r7, #4]
- 800918a: 681b ldr r3, [r3, #0]
- 800918c: 4a2b ldr r2, [pc, #172] @ (800923c <HAL_DMA_Abort_IT+0x3d4>)
- 800918e: 4293 cmp r3, r2
- 8009190: d03b beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 8009192: 687b ldr r3, [r7, #4]
- 8009194: 681b ldr r3, [r3, #0]
- 8009196: 4a2a ldr r2, [pc, #168] @ (8009240 <HAL_DMA_Abort_IT+0x3d8>)
- 8009198: 4293 cmp r3, r2
- 800919a: d036 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 800919c: 687b ldr r3, [r7, #4]
- 800919e: 681b ldr r3, [r3, #0]
- 80091a0: 4a28 ldr r2, [pc, #160] @ (8009244 <HAL_DMA_Abort_IT+0x3dc>)
- 80091a2: 4293 cmp r3, r2
- 80091a4: d031 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 80091a6: 687b ldr r3, [r7, #4]
- 80091a8: 681b ldr r3, [r3, #0]
- 80091aa: 4a27 ldr r2, [pc, #156] @ (8009248 <HAL_DMA_Abort_IT+0x3e0>)
- 80091ac: 4293 cmp r3, r2
- 80091ae: d02c beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 80091b0: 687b ldr r3, [r7, #4]
- 80091b2: 681b ldr r3, [r3, #0]
- 80091b4: 4a25 ldr r2, [pc, #148] @ (800924c <HAL_DMA_Abort_IT+0x3e4>)
- 80091b6: 4293 cmp r3, r2
- 80091b8: d027 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 80091ba: 687b ldr r3, [r7, #4]
- 80091bc: 681b ldr r3, [r3, #0]
- 80091be: 4a24 ldr r2, [pc, #144] @ (8009250 <HAL_DMA_Abort_IT+0x3e8>)
- 80091c0: 4293 cmp r3, r2
- 80091c2: d022 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 80091c4: 687b ldr r3, [r7, #4]
- 80091c6: 681b ldr r3, [r3, #0]
- 80091c8: 4a22 ldr r2, [pc, #136] @ (8009254 <HAL_DMA_Abort_IT+0x3ec>)
- 80091ca: 4293 cmp r3, r2
- 80091cc: d01d beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 80091ce: 687b ldr r3, [r7, #4]
- 80091d0: 681b ldr r3, [r3, #0]
- 80091d2: 4a21 ldr r2, [pc, #132] @ (8009258 <HAL_DMA_Abort_IT+0x3f0>)
- 80091d4: 4293 cmp r3, r2
- 80091d6: d018 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 80091d8: 687b ldr r3, [r7, #4]
- 80091da: 681b ldr r3, [r3, #0]
- 80091dc: 4a1f ldr r2, [pc, #124] @ (800925c <HAL_DMA_Abort_IT+0x3f4>)
- 80091de: 4293 cmp r3, r2
- 80091e0: d013 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 80091e2: 687b ldr r3, [r7, #4]
- 80091e4: 681b ldr r3, [r3, #0]
- 80091e6: 4a1e ldr r2, [pc, #120] @ (8009260 <HAL_DMA_Abort_IT+0x3f8>)
- 80091e8: 4293 cmp r3, r2
- 80091ea: d00e beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 80091ec: 687b ldr r3, [r7, #4]
- 80091ee: 681b ldr r3, [r3, #0]
- 80091f0: 4a1c ldr r2, [pc, #112] @ (8009264 <HAL_DMA_Abort_IT+0x3fc>)
- 80091f2: 4293 cmp r3, r2
- 80091f4: d009 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 80091f6: 687b ldr r3, [r7, #4]
- 80091f8: 681b ldr r3, [r3, #0]
- 80091fa: 4a1b ldr r2, [pc, #108] @ (8009268 <HAL_DMA_Abort_IT+0x400>)
- 80091fc: 4293 cmp r3, r2
- 80091fe: d004 beq.n 800920a <HAL_DMA_Abort_IT+0x3a2>
- 8009200: 687b ldr r3, [r7, #4]
- 8009202: 681b ldr r3, [r3, #0]
- 8009204: 4a19 ldr r2, [pc, #100] @ (800926c <HAL_DMA_Abort_IT+0x404>)
- 8009206: 4293 cmp r3, r2
- 8009208: d132 bne.n 8009270 <HAL_DMA_Abort_IT+0x408>
- 800920a: 2301 movs r3, #1
- 800920c: e031 b.n 8009272 <HAL_DMA_Abort_IT+0x40a>
- 800920e: bf00 nop
- 8009210: 40020010 .word 0x40020010
- 8009214: 40020028 .word 0x40020028
- 8009218: 40020040 .word 0x40020040
- 800921c: 40020058 .word 0x40020058
- 8009220: 40020070 .word 0x40020070
- 8009224: 40020088 .word 0x40020088
- 8009228: 400200a0 .word 0x400200a0
- 800922c: 400200b8 .word 0x400200b8
- 8009230: 40020410 .word 0x40020410
- 8009234: 40020428 .word 0x40020428
- 8009238: 40020440 .word 0x40020440
- 800923c: 40020458 .word 0x40020458
- 8009240: 40020470 .word 0x40020470
- 8009244: 40020488 .word 0x40020488
- 8009248: 400204a0 .word 0x400204a0
- 800924c: 400204b8 .word 0x400204b8
- 8009250: 58025408 .word 0x58025408
- 8009254: 5802541c .word 0x5802541c
- 8009258: 58025430 .word 0x58025430
- 800925c: 58025444 .word 0x58025444
- 8009260: 58025458 .word 0x58025458
- 8009264: 5802546c .word 0x5802546c
- 8009268: 58025480 .word 0x58025480
- 800926c: 58025494 .word 0x58025494
- 8009270: 2300 movs r3, #0
- 8009272: 2b00 cmp r3, #0
- 8009274: d028 beq.n 80092c8 <HAL_DMA_Abort_IT+0x460>
- {
- /* disable the DMAMUX sync overrun IT */
- hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
- 8009276: 687b ldr r3, [r7, #4]
- 8009278: 6e1b ldr r3, [r3, #96] @ 0x60
- 800927a: 681a ldr r2, [r3, #0]
- 800927c: 687b ldr r3, [r7, #4]
- 800927e: 6e1b ldr r3, [r3, #96] @ 0x60
- 8009280: f422 7280 bic.w r2, r2, #256 @ 0x100
- 8009284: 601a str r2, [r3, #0]
- /* Clear all flags */
- regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
- 8009286: 687b ldr r3, [r7, #4]
- 8009288: 6d9b ldr r3, [r3, #88] @ 0x58
- 800928a: 60fb str r3, [r7, #12]
- regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
- 800928c: 687b ldr r3, [r7, #4]
- 800928e: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8009290: f003 031f and.w r3, r3, #31
- 8009294: 2201 movs r2, #1
- 8009296: 409a lsls r2, r3
- 8009298: 68fb ldr r3, [r7, #12]
- 800929a: 605a str r2, [r3, #4]
- /* Clear the DMAMUX synchro overrun flag */
- hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
- 800929c: 687b ldr r3, [r7, #4]
- 800929e: 6e5b ldr r3, [r3, #100] @ 0x64
- 80092a0: 687a ldr r2, [r7, #4]
- 80092a2: 6e92 ldr r2, [r2, #104] @ 0x68
- 80092a4: 605a str r2, [r3, #4]
- if(hdma->DMAmuxRequestGen != 0U)
- 80092a6: 687b ldr r3, [r7, #4]
- 80092a8: 6edb ldr r3, [r3, #108] @ 0x6c
- 80092aa: 2b00 cmp r3, #0
- 80092ac: d00c beq.n 80092c8 <HAL_DMA_Abort_IT+0x460>
- {
- /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
- /* disable the request gen overrun IT */
- hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
- 80092ae: 687b ldr r3, [r7, #4]
- 80092b0: 6edb ldr r3, [r3, #108] @ 0x6c
- 80092b2: 681a ldr r2, [r3, #0]
- 80092b4: 687b ldr r3, [r7, #4]
- 80092b6: 6edb ldr r3, [r3, #108] @ 0x6c
- 80092b8: f422 7280 bic.w r2, r2, #256 @ 0x100
- 80092bc: 601a str r2, [r3, #0]
- /* Clear the DMAMUX request generator overrun flag */
- hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
- 80092be: 687b ldr r3, [r7, #4]
- 80092c0: 6f1b ldr r3, [r3, #112] @ 0x70
- 80092c2: 687a ldr r2, [r7, #4]
- 80092c4: 6f52 ldr r2, [r2, #116] @ 0x74
- 80092c6: 605a str r2, [r3, #4]
- }
- }
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
- 80092c8: 687b ldr r3, [r7, #4]
- 80092ca: 2201 movs r2, #1
- 80092cc: f883 2035 strb.w r2, [r3, #53] @ 0x35
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- 80092d0: 687b ldr r3, [r7, #4]
- 80092d2: 2200 movs r2, #0
- 80092d4: f883 2034 strb.w r2, [r3, #52] @ 0x34
- /* Call User Abort callback */
- if(hdma->XferAbortCallback != NULL)
- 80092d8: 687b ldr r3, [r7, #4]
- 80092da: 6d1b ldr r3, [r3, #80] @ 0x50
- 80092dc: 2b00 cmp r3, #0
- 80092de: d003 beq.n 80092e8 <HAL_DMA_Abort_IT+0x480>
- {
- hdma->XferAbortCallback(hdma);
- 80092e0: 687b ldr r3, [r7, #4]
- 80092e2: 6d1b ldr r3, [r3, #80] @ 0x50
- 80092e4: 6878 ldr r0, [r7, #4]
- 80092e6: 4798 blx r3
- }
- }
- }
- return HAL_OK;
- 80092e8: 2300 movs r3, #0
- }
- 80092ea: 4618 mov r0, r3
- 80092ec: 3710 adds r7, #16
- 80092ee: 46bd mov sp, r7
- 80092f0: bd80 pop {r7, pc}
- 80092f2: bf00 nop
- 080092f4 <HAL_DMA_IRQHandler>:
- * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval None
- */
- void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
- {
- 80092f4: b580 push {r7, lr}
- 80092f6: b08a sub sp, #40 @ 0x28
- 80092f8: af00 add r7, sp, #0
- 80092fa: 6078 str r0, [r7, #4]
- uint32_t tmpisr_dma, tmpisr_bdma;
- uint32_t ccr_reg;
- __IO uint32_t count = 0U;
- 80092fc: 2300 movs r3, #0
- 80092fe: 60fb str r3, [r7, #12]
- uint32_t timeout = SystemCoreClock / 9600U;
- 8009300: 4b67 ldr r3, [pc, #412] @ (80094a0 <HAL_DMA_IRQHandler+0x1ac>)
- 8009302: 681b ldr r3, [r3, #0]
- 8009304: 4a67 ldr r2, [pc, #412] @ (80094a4 <HAL_DMA_IRQHandler+0x1b0>)
- 8009306: fba2 2303 umull r2, r3, r2, r3
- 800930a: 0a9b lsrs r3, r3, #10
- 800930c: 627b str r3, [r7, #36] @ 0x24
- /* calculate DMA base and stream number */
- DMA_Base_Registers *regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress;
- 800930e: 687b ldr r3, [r7, #4]
- 8009310: 6d9b ldr r3, [r3, #88] @ 0x58
- 8009312: 623b str r3, [r7, #32]
- BDMA_Base_Registers *regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
- 8009314: 687b ldr r3, [r7, #4]
- 8009316: 6d9b ldr r3, [r3, #88] @ 0x58
- 8009318: 61fb str r3, [r7, #28]
- tmpisr_dma = regs_dma->ISR;
- 800931a: 6a3b ldr r3, [r7, #32]
- 800931c: 681b ldr r3, [r3, #0]
- 800931e: 61bb str r3, [r7, #24]
- tmpisr_bdma = regs_bdma->ISR;
- 8009320: 69fb ldr r3, [r7, #28]
- 8009322: 681b ldr r3, [r3, #0]
- 8009324: 617b str r3, [r7, #20]
- if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
- 8009326: 687b ldr r3, [r7, #4]
- 8009328: 681b ldr r3, [r3, #0]
- 800932a: 4a5f ldr r2, [pc, #380] @ (80094a8 <HAL_DMA_IRQHandler+0x1b4>)
- 800932c: 4293 cmp r3, r2
- 800932e: d04a beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 8009330: 687b ldr r3, [r7, #4]
- 8009332: 681b ldr r3, [r3, #0]
- 8009334: 4a5d ldr r2, [pc, #372] @ (80094ac <HAL_DMA_IRQHandler+0x1b8>)
- 8009336: 4293 cmp r3, r2
- 8009338: d045 beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 800933a: 687b ldr r3, [r7, #4]
- 800933c: 681b ldr r3, [r3, #0]
- 800933e: 4a5c ldr r2, [pc, #368] @ (80094b0 <HAL_DMA_IRQHandler+0x1bc>)
- 8009340: 4293 cmp r3, r2
- 8009342: d040 beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 8009344: 687b ldr r3, [r7, #4]
- 8009346: 681b ldr r3, [r3, #0]
- 8009348: 4a5a ldr r2, [pc, #360] @ (80094b4 <HAL_DMA_IRQHandler+0x1c0>)
- 800934a: 4293 cmp r3, r2
- 800934c: d03b beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 800934e: 687b ldr r3, [r7, #4]
- 8009350: 681b ldr r3, [r3, #0]
- 8009352: 4a59 ldr r2, [pc, #356] @ (80094b8 <HAL_DMA_IRQHandler+0x1c4>)
- 8009354: 4293 cmp r3, r2
- 8009356: d036 beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 8009358: 687b ldr r3, [r7, #4]
- 800935a: 681b ldr r3, [r3, #0]
- 800935c: 4a57 ldr r2, [pc, #348] @ (80094bc <HAL_DMA_IRQHandler+0x1c8>)
- 800935e: 4293 cmp r3, r2
- 8009360: d031 beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 8009362: 687b ldr r3, [r7, #4]
- 8009364: 681b ldr r3, [r3, #0]
- 8009366: 4a56 ldr r2, [pc, #344] @ (80094c0 <HAL_DMA_IRQHandler+0x1cc>)
- 8009368: 4293 cmp r3, r2
- 800936a: d02c beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 800936c: 687b ldr r3, [r7, #4]
- 800936e: 681b ldr r3, [r3, #0]
- 8009370: 4a54 ldr r2, [pc, #336] @ (80094c4 <HAL_DMA_IRQHandler+0x1d0>)
- 8009372: 4293 cmp r3, r2
- 8009374: d027 beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 8009376: 687b ldr r3, [r7, #4]
- 8009378: 681b ldr r3, [r3, #0]
- 800937a: 4a53 ldr r2, [pc, #332] @ (80094c8 <HAL_DMA_IRQHandler+0x1d4>)
- 800937c: 4293 cmp r3, r2
- 800937e: d022 beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 8009380: 687b ldr r3, [r7, #4]
- 8009382: 681b ldr r3, [r3, #0]
- 8009384: 4a51 ldr r2, [pc, #324] @ (80094cc <HAL_DMA_IRQHandler+0x1d8>)
- 8009386: 4293 cmp r3, r2
- 8009388: d01d beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 800938a: 687b ldr r3, [r7, #4]
- 800938c: 681b ldr r3, [r3, #0]
- 800938e: 4a50 ldr r2, [pc, #320] @ (80094d0 <HAL_DMA_IRQHandler+0x1dc>)
- 8009390: 4293 cmp r3, r2
- 8009392: d018 beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 8009394: 687b ldr r3, [r7, #4]
- 8009396: 681b ldr r3, [r3, #0]
- 8009398: 4a4e ldr r2, [pc, #312] @ (80094d4 <HAL_DMA_IRQHandler+0x1e0>)
- 800939a: 4293 cmp r3, r2
- 800939c: d013 beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 800939e: 687b ldr r3, [r7, #4]
- 80093a0: 681b ldr r3, [r3, #0]
- 80093a2: 4a4d ldr r2, [pc, #308] @ (80094d8 <HAL_DMA_IRQHandler+0x1e4>)
- 80093a4: 4293 cmp r3, r2
- 80093a6: d00e beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 80093a8: 687b ldr r3, [r7, #4]
- 80093aa: 681b ldr r3, [r3, #0]
- 80093ac: 4a4b ldr r2, [pc, #300] @ (80094dc <HAL_DMA_IRQHandler+0x1e8>)
- 80093ae: 4293 cmp r3, r2
- 80093b0: d009 beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 80093b2: 687b ldr r3, [r7, #4]
- 80093b4: 681b ldr r3, [r3, #0]
- 80093b6: 4a4a ldr r2, [pc, #296] @ (80094e0 <HAL_DMA_IRQHandler+0x1ec>)
- 80093b8: 4293 cmp r3, r2
- 80093ba: d004 beq.n 80093c6 <HAL_DMA_IRQHandler+0xd2>
- 80093bc: 687b ldr r3, [r7, #4]
- 80093be: 681b ldr r3, [r3, #0]
- 80093c0: 4a48 ldr r2, [pc, #288] @ (80094e4 <HAL_DMA_IRQHandler+0x1f0>)
- 80093c2: 4293 cmp r3, r2
- 80093c4: d101 bne.n 80093ca <HAL_DMA_IRQHandler+0xd6>
- 80093c6: 2301 movs r3, #1
- 80093c8: e000 b.n 80093cc <HAL_DMA_IRQHandler+0xd8>
- 80093ca: 2300 movs r3, #0
- 80093cc: 2b00 cmp r3, #0
- 80093ce: f000 842b beq.w 8009c28 <HAL_DMA_IRQHandler+0x934>
- {
- /* Transfer Error Interrupt management ***************************************/
- if ((tmpisr_dma & (DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
- 80093d2: 687b ldr r3, [r7, #4]
- 80093d4: 6ddb ldr r3, [r3, #92] @ 0x5c
- 80093d6: f003 031f and.w r3, r3, #31
- 80093da: 2208 movs r2, #8
- 80093dc: 409a lsls r2, r3
- 80093de: 69bb ldr r3, [r7, #24]
- 80093e0: 4013 ands r3, r2
- 80093e2: 2b00 cmp r3, #0
- 80093e4: f000 80a2 beq.w 800952c <HAL_DMA_IRQHandler+0x238>
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != 0U)
- 80093e8: 687b ldr r3, [r7, #4]
- 80093ea: 681b ldr r3, [r3, #0]
- 80093ec: 4a2e ldr r2, [pc, #184] @ (80094a8 <HAL_DMA_IRQHandler+0x1b4>)
- 80093ee: 4293 cmp r3, r2
- 80093f0: d04a beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 80093f2: 687b ldr r3, [r7, #4]
- 80093f4: 681b ldr r3, [r3, #0]
- 80093f6: 4a2d ldr r2, [pc, #180] @ (80094ac <HAL_DMA_IRQHandler+0x1b8>)
- 80093f8: 4293 cmp r3, r2
- 80093fa: d045 beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 80093fc: 687b ldr r3, [r7, #4]
- 80093fe: 681b ldr r3, [r3, #0]
- 8009400: 4a2b ldr r2, [pc, #172] @ (80094b0 <HAL_DMA_IRQHandler+0x1bc>)
- 8009402: 4293 cmp r3, r2
- 8009404: d040 beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 8009406: 687b ldr r3, [r7, #4]
- 8009408: 681b ldr r3, [r3, #0]
- 800940a: 4a2a ldr r2, [pc, #168] @ (80094b4 <HAL_DMA_IRQHandler+0x1c0>)
- 800940c: 4293 cmp r3, r2
- 800940e: d03b beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 8009410: 687b ldr r3, [r7, #4]
- 8009412: 681b ldr r3, [r3, #0]
- 8009414: 4a28 ldr r2, [pc, #160] @ (80094b8 <HAL_DMA_IRQHandler+0x1c4>)
- 8009416: 4293 cmp r3, r2
- 8009418: d036 beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 800941a: 687b ldr r3, [r7, #4]
- 800941c: 681b ldr r3, [r3, #0]
- 800941e: 4a27 ldr r2, [pc, #156] @ (80094bc <HAL_DMA_IRQHandler+0x1c8>)
- 8009420: 4293 cmp r3, r2
- 8009422: d031 beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 8009424: 687b ldr r3, [r7, #4]
- 8009426: 681b ldr r3, [r3, #0]
- 8009428: 4a25 ldr r2, [pc, #148] @ (80094c0 <HAL_DMA_IRQHandler+0x1cc>)
- 800942a: 4293 cmp r3, r2
- 800942c: d02c beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 800942e: 687b ldr r3, [r7, #4]
- 8009430: 681b ldr r3, [r3, #0]
- 8009432: 4a24 ldr r2, [pc, #144] @ (80094c4 <HAL_DMA_IRQHandler+0x1d0>)
- 8009434: 4293 cmp r3, r2
- 8009436: d027 beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 8009438: 687b ldr r3, [r7, #4]
- 800943a: 681b ldr r3, [r3, #0]
- 800943c: 4a22 ldr r2, [pc, #136] @ (80094c8 <HAL_DMA_IRQHandler+0x1d4>)
- 800943e: 4293 cmp r3, r2
- 8009440: d022 beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 8009442: 687b ldr r3, [r7, #4]
- 8009444: 681b ldr r3, [r3, #0]
- 8009446: 4a21 ldr r2, [pc, #132] @ (80094cc <HAL_DMA_IRQHandler+0x1d8>)
- 8009448: 4293 cmp r3, r2
- 800944a: d01d beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 800944c: 687b ldr r3, [r7, #4]
- 800944e: 681b ldr r3, [r3, #0]
- 8009450: 4a1f ldr r2, [pc, #124] @ (80094d0 <HAL_DMA_IRQHandler+0x1dc>)
- 8009452: 4293 cmp r3, r2
- 8009454: d018 beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 8009456: 687b ldr r3, [r7, #4]
- 8009458: 681b ldr r3, [r3, #0]
- 800945a: 4a1e ldr r2, [pc, #120] @ (80094d4 <HAL_DMA_IRQHandler+0x1e0>)
- 800945c: 4293 cmp r3, r2
- 800945e: d013 beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 8009460: 687b ldr r3, [r7, #4]
- 8009462: 681b ldr r3, [r3, #0]
- 8009464: 4a1c ldr r2, [pc, #112] @ (80094d8 <HAL_DMA_IRQHandler+0x1e4>)
- 8009466: 4293 cmp r3, r2
- 8009468: d00e beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 800946a: 687b ldr r3, [r7, #4]
- 800946c: 681b ldr r3, [r3, #0]
- 800946e: 4a1b ldr r2, [pc, #108] @ (80094dc <HAL_DMA_IRQHandler+0x1e8>)
- 8009470: 4293 cmp r3, r2
- 8009472: d009 beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 8009474: 687b ldr r3, [r7, #4]
- 8009476: 681b ldr r3, [r3, #0]
- 8009478: 4a19 ldr r2, [pc, #100] @ (80094e0 <HAL_DMA_IRQHandler+0x1ec>)
- 800947a: 4293 cmp r3, r2
- 800947c: d004 beq.n 8009488 <HAL_DMA_IRQHandler+0x194>
- 800947e: 687b ldr r3, [r7, #4]
- 8009480: 681b ldr r3, [r3, #0]
- 8009482: 4a18 ldr r2, [pc, #96] @ (80094e4 <HAL_DMA_IRQHandler+0x1f0>)
- 8009484: 4293 cmp r3, r2
- 8009486: d12f bne.n 80094e8 <HAL_DMA_IRQHandler+0x1f4>
- 8009488: 687b ldr r3, [r7, #4]
- 800948a: 681b ldr r3, [r3, #0]
- 800948c: 681b ldr r3, [r3, #0]
- 800948e: f003 0304 and.w r3, r3, #4
- 8009492: 2b00 cmp r3, #0
- 8009494: bf14 ite ne
- 8009496: 2301 movne r3, #1
- 8009498: 2300 moveq r3, #0
- 800949a: b2db uxtb r3, r3
- 800949c: e02e b.n 80094fc <HAL_DMA_IRQHandler+0x208>
- 800949e: bf00 nop
- 80094a0: 24000034 .word 0x24000034
- 80094a4: 1b4e81b5 .word 0x1b4e81b5
- 80094a8: 40020010 .word 0x40020010
- 80094ac: 40020028 .word 0x40020028
- 80094b0: 40020040 .word 0x40020040
- 80094b4: 40020058 .word 0x40020058
- 80094b8: 40020070 .word 0x40020070
- 80094bc: 40020088 .word 0x40020088
- 80094c0: 400200a0 .word 0x400200a0
- 80094c4: 400200b8 .word 0x400200b8
- 80094c8: 40020410 .word 0x40020410
- 80094cc: 40020428 .word 0x40020428
- 80094d0: 40020440 .word 0x40020440
- 80094d4: 40020458 .word 0x40020458
- 80094d8: 40020470 .word 0x40020470
- 80094dc: 40020488 .word 0x40020488
- 80094e0: 400204a0 .word 0x400204a0
- 80094e4: 400204b8 .word 0x400204b8
- 80094e8: 687b ldr r3, [r7, #4]
- 80094ea: 681b ldr r3, [r3, #0]
- 80094ec: 681b ldr r3, [r3, #0]
- 80094ee: f003 0308 and.w r3, r3, #8
- 80094f2: 2b00 cmp r3, #0
- 80094f4: bf14 ite ne
- 80094f6: 2301 movne r3, #1
- 80094f8: 2300 moveq r3, #0
- 80094fa: b2db uxtb r3, r3
- 80094fc: 2b00 cmp r3, #0
- 80094fe: d015 beq.n 800952c <HAL_DMA_IRQHandler+0x238>
- {
- /* Disable the transfer error interrupt */
- ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TE);
- 8009500: 687b ldr r3, [r7, #4]
- 8009502: 681b ldr r3, [r3, #0]
- 8009504: 681a ldr r2, [r3, #0]
- 8009506: 687b ldr r3, [r7, #4]
- 8009508: 681b ldr r3, [r3, #0]
- 800950a: f022 0204 bic.w r2, r2, #4
- 800950e: 601a str r2, [r3, #0]
- /* Clear the transfer error flag */
- regs_dma->IFCR = DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU);
- 8009510: 687b ldr r3, [r7, #4]
- 8009512: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8009514: f003 031f and.w r3, r3, #31
- 8009518: 2208 movs r2, #8
- 800951a: 409a lsls r2, r3
- 800951c: 6a3b ldr r3, [r7, #32]
- 800951e: 609a str r2, [r3, #8]
- /* Update error code */
- hdma->ErrorCode |= HAL_DMA_ERROR_TE;
- 8009520: 687b ldr r3, [r7, #4]
- 8009522: 6d5b ldr r3, [r3, #84] @ 0x54
- 8009524: f043 0201 orr.w r2, r3, #1
- 8009528: 687b ldr r3, [r7, #4]
- 800952a: 655a str r2, [r3, #84] @ 0x54
- }
- }
- /* FIFO Error Interrupt management ******************************************/
- if ((tmpisr_dma & (DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
- 800952c: 687b ldr r3, [r7, #4]
- 800952e: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8009530: f003 031f and.w r3, r3, #31
- 8009534: 69ba ldr r2, [r7, #24]
- 8009536: fa22 f303 lsr.w r3, r2, r3
- 800953a: f003 0301 and.w r3, r3, #1
- 800953e: 2b00 cmp r3, #0
- 8009540: d06e beq.n 8009620 <HAL_DMA_IRQHandler+0x32c>
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != 0U)
- 8009542: 687b ldr r3, [r7, #4]
- 8009544: 681b ldr r3, [r3, #0]
- 8009546: 4a69 ldr r2, [pc, #420] @ (80096ec <HAL_DMA_IRQHandler+0x3f8>)
- 8009548: 4293 cmp r3, r2
- 800954a: d04a beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 800954c: 687b ldr r3, [r7, #4]
- 800954e: 681b ldr r3, [r3, #0]
- 8009550: 4a67 ldr r2, [pc, #412] @ (80096f0 <HAL_DMA_IRQHandler+0x3fc>)
- 8009552: 4293 cmp r3, r2
- 8009554: d045 beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 8009556: 687b ldr r3, [r7, #4]
- 8009558: 681b ldr r3, [r3, #0]
- 800955a: 4a66 ldr r2, [pc, #408] @ (80096f4 <HAL_DMA_IRQHandler+0x400>)
- 800955c: 4293 cmp r3, r2
- 800955e: d040 beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 8009560: 687b ldr r3, [r7, #4]
- 8009562: 681b ldr r3, [r3, #0]
- 8009564: 4a64 ldr r2, [pc, #400] @ (80096f8 <HAL_DMA_IRQHandler+0x404>)
- 8009566: 4293 cmp r3, r2
- 8009568: d03b beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 800956a: 687b ldr r3, [r7, #4]
- 800956c: 681b ldr r3, [r3, #0]
- 800956e: 4a63 ldr r2, [pc, #396] @ (80096fc <HAL_DMA_IRQHandler+0x408>)
- 8009570: 4293 cmp r3, r2
- 8009572: d036 beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 8009574: 687b ldr r3, [r7, #4]
- 8009576: 681b ldr r3, [r3, #0]
- 8009578: 4a61 ldr r2, [pc, #388] @ (8009700 <HAL_DMA_IRQHandler+0x40c>)
- 800957a: 4293 cmp r3, r2
- 800957c: d031 beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 800957e: 687b ldr r3, [r7, #4]
- 8009580: 681b ldr r3, [r3, #0]
- 8009582: 4a60 ldr r2, [pc, #384] @ (8009704 <HAL_DMA_IRQHandler+0x410>)
- 8009584: 4293 cmp r3, r2
- 8009586: d02c beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 8009588: 687b ldr r3, [r7, #4]
- 800958a: 681b ldr r3, [r3, #0]
- 800958c: 4a5e ldr r2, [pc, #376] @ (8009708 <HAL_DMA_IRQHandler+0x414>)
- 800958e: 4293 cmp r3, r2
- 8009590: d027 beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 8009592: 687b ldr r3, [r7, #4]
- 8009594: 681b ldr r3, [r3, #0]
- 8009596: 4a5d ldr r2, [pc, #372] @ (800970c <HAL_DMA_IRQHandler+0x418>)
- 8009598: 4293 cmp r3, r2
- 800959a: d022 beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 800959c: 687b ldr r3, [r7, #4]
- 800959e: 681b ldr r3, [r3, #0]
- 80095a0: 4a5b ldr r2, [pc, #364] @ (8009710 <HAL_DMA_IRQHandler+0x41c>)
- 80095a2: 4293 cmp r3, r2
- 80095a4: d01d beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 80095a6: 687b ldr r3, [r7, #4]
- 80095a8: 681b ldr r3, [r3, #0]
- 80095aa: 4a5a ldr r2, [pc, #360] @ (8009714 <HAL_DMA_IRQHandler+0x420>)
- 80095ac: 4293 cmp r3, r2
- 80095ae: d018 beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 80095b0: 687b ldr r3, [r7, #4]
- 80095b2: 681b ldr r3, [r3, #0]
- 80095b4: 4a58 ldr r2, [pc, #352] @ (8009718 <HAL_DMA_IRQHandler+0x424>)
- 80095b6: 4293 cmp r3, r2
- 80095b8: d013 beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 80095ba: 687b ldr r3, [r7, #4]
- 80095bc: 681b ldr r3, [r3, #0]
- 80095be: 4a57 ldr r2, [pc, #348] @ (800971c <HAL_DMA_IRQHandler+0x428>)
- 80095c0: 4293 cmp r3, r2
- 80095c2: d00e beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 80095c4: 687b ldr r3, [r7, #4]
- 80095c6: 681b ldr r3, [r3, #0]
- 80095c8: 4a55 ldr r2, [pc, #340] @ (8009720 <HAL_DMA_IRQHandler+0x42c>)
- 80095ca: 4293 cmp r3, r2
- 80095cc: d009 beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 80095ce: 687b ldr r3, [r7, #4]
- 80095d0: 681b ldr r3, [r3, #0]
- 80095d2: 4a54 ldr r2, [pc, #336] @ (8009724 <HAL_DMA_IRQHandler+0x430>)
- 80095d4: 4293 cmp r3, r2
- 80095d6: d004 beq.n 80095e2 <HAL_DMA_IRQHandler+0x2ee>
- 80095d8: 687b ldr r3, [r7, #4]
- 80095da: 681b ldr r3, [r3, #0]
- 80095dc: 4a52 ldr r2, [pc, #328] @ (8009728 <HAL_DMA_IRQHandler+0x434>)
- 80095de: 4293 cmp r3, r2
- 80095e0: d10a bne.n 80095f8 <HAL_DMA_IRQHandler+0x304>
- 80095e2: 687b ldr r3, [r7, #4]
- 80095e4: 681b ldr r3, [r3, #0]
- 80095e6: 695b ldr r3, [r3, #20]
- 80095e8: f003 0380 and.w r3, r3, #128 @ 0x80
- 80095ec: 2b00 cmp r3, #0
- 80095ee: bf14 ite ne
- 80095f0: 2301 movne r3, #1
- 80095f2: 2300 moveq r3, #0
- 80095f4: b2db uxtb r3, r3
- 80095f6: e003 b.n 8009600 <HAL_DMA_IRQHandler+0x30c>
- 80095f8: 687b ldr r3, [r7, #4]
- 80095fa: 681b ldr r3, [r3, #0]
- 80095fc: 681b ldr r3, [r3, #0]
- 80095fe: 2300 movs r3, #0
- 8009600: 2b00 cmp r3, #0
- 8009602: d00d beq.n 8009620 <HAL_DMA_IRQHandler+0x32c>
- {
- /* Clear the FIFO error flag */
- regs_dma->IFCR = DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU);
- 8009604: 687b ldr r3, [r7, #4]
- 8009606: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8009608: f003 031f and.w r3, r3, #31
- 800960c: 2201 movs r2, #1
- 800960e: 409a lsls r2, r3
- 8009610: 6a3b ldr r3, [r7, #32]
- 8009612: 609a str r2, [r3, #8]
- /* Update error code */
- hdma->ErrorCode |= HAL_DMA_ERROR_FE;
- 8009614: 687b ldr r3, [r7, #4]
- 8009616: 6d5b ldr r3, [r3, #84] @ 0x54
- 8009618: f043 0202 orr.w r2, r3, #2
- 800961c: 687b ldr r3, [r7, #4]
- 800961e: 655a str r2, [r3, #84] @ 0x54
- }
- }
- /* Direct Mode Error Interrupt management ***********************************/
- if ((tmpisr_dma & (DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
- 8009620: 687b ldr r3, [r7, #4]
- 8009622: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8009624: f003 031f and.w r3, r3, #31
- 8009628: 2204 movs r2, #4
- 800962a: 409a lsls r2, r3
- 800962c: 69bb ldr r3, [r7, #24]
- 800962e: 4013 ands r3, r2
- 8009630: 2b00 cmp r3, #0
- 8009632: f000 808f beq.w 8009754 <HAL_DMA_IRQHandler+0x460>
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != 0U)
- 8009636: 687b ldr r3, [r7, #4]
- 8009638: 681b ldr r3, [r3, #0]
- 800963a: 4a2c ldr r2, [pc, #176] @ (80096ec <HAL_DMA_IRQHandler+0x3f8>)
- 800963c: 4293 cmp r3, r2
- 800963e: d04a beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 8009640: 687b ldr r3, [r7, #4]
- 8009642: 681b ldr r3, [r3, #0]
- 8009644: 4a2a ldr r2, [pc, #168] @ (80096f0 <HAL_DMA_IRQHandler+0x3fc>)
- 8009646: 4293 cmp r3, r2
- 8009648: d045 beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 800964a: 687b ldr r3, [r7, #4]
- 800964c: 681b ldr r3, [r3, #0]
- 800964e: 4a29 ldr r2, [pc, #164] @ (80096f4 <HAL_DMA_IRQHandler+0x400>)
- 8009650: 4293 cmp r3, r2
- 8009652: d040 beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 8009654: 687b ldr r3, [r7, #4]
- 8009656: 681b ldr r3, [r3, #0]
- 8009658: 4a27 ldr r2, [pc, #156] @ (80096f8 <HAL_DMA_IRQHandler+0x404>)
- 800965a: 4293 cmp r3, r2
- 800965c: d03b beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 800965e: 687b ldr r3, [r7, #4]
- 8009660: 681b ldr r3, [r3, #0]
- 8009662: 4a26 ldr r2, [pc, #152] @ (80096fc <HAL_DMA_IRQHandler+0x408>)
- 8009664: 4293 cmp r3, r2
- 8009666: d036 beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 8009668: 687b ldr r3, [r7, #4]
- 800966a: 681b ldr r3, [r3, #0]
- 800966c: 4a24 ldr r2, [pc, #144] @ (8009700 <HAL_DMA_IRQHandler+0x40c>)
- 800966e: 4293 cmp r3, r2
- 8009670: d031 beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 8009672: 687b ldr r3, [r7, #4]
- 8009674: 681b ldr r3, [r3, #0]
- 8009676: 4a23 ldr r2, [pc, #140] @ (8009704 <HAL_DMA_IRQHandler+0x410>)
- 8009678: 4293 cmp r3, r2
- 800967a: d02c beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 800967c: 687b ldr r3, [r7, #4]
- 800967e: 681b ldr r3, [r3, #0]
- 8009680: 4a21 ldr r2, [pc, #132] @ (8009708 <HAL_DMA_IRQHandler+0x414>)
- 8009682: 4293 cmp r3, r2
- 8009684: d027 beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 8009686: 687b ldr r3, [r7, #4]
- 8009688: 681b ldr r3, [r3, #0]
- 800968a: 4a20 ldr r2, [pc, #128] @ (800970c <HAL_DMA_IRQHandler+0x418>)
- 800968c: 4293 cmp r3, r2
- 800968e: d022 beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 8009690: 687b ldr r3, [r7, #4]
- 8009692: 681b ldr r3, [r3, #0]
- 8009694: 4a1e ldr r2, [pc, #120] @ (8009710 <HAL_DMA_IRQHandler+0x41c>)
- 8009696: 4293 cmp r3, r2
- 8009698: d01d beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 800969a: 687b ldr r3, [r7, #4]
- 800969c: 681b ldr r3, [r3, #0]
- 800969e: 4a1d ldr r2, [pc, #116] @ (8009714 <HAL_DMA_IRQHandler+0x420>)
- 80096a0: 4293 cmp r3, r2
- 80096a2: d018 beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 80096a4: 687b ldr r3, [r7, #4]
- 80096a6: 681b ldr r3, [r3, #0]
- 80096a8: 4a1b ldr r2, [pc, #108] @ (8009718 <HAL_DMA_IRQHandler+0x424>)
- 80096aa: 4293 cmp r3, r2
- 80096ac: d013 beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 80096ae: 687b ldr r3, [r7, #4]
- 80096b0: 681b ldr r3, [r3, #0]
- 80096b2: 4a1a ldr r2, [pc, #104] @ (800971c <HAL_DMA_IRQHandler+0x428>)
- 80096b4: 4293 cmp r3, r2
- 80096b6: d00e beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 80096b8: 687b ldr r3, [r7, #4]
- 80096ba: 681b ldr r3, [r3, #0]
- 80096bc: 4a18 ldr r2, [pc, #96] @ (8009720 <HAL_DMA_IRQHandler+0x42c>)
- 80096be: 4293 cmp r3, r2
- 80096c0: d009 beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 80096c2: 687b ldr r3, [r7, #4]
- 80096c4: 681b ldr r3, [r3, #0]
- 80096c6: 4a17 ldr r2, [pc, #92] @ (8009724 <HAL_DMA_IRQHandler+0x430>)
- 80096c8: 4293 cmp r3, r2
- 80096ca: d004 beq.n 80096d6 <HAL_DMA_IRQHandler+0x3e2>
- 80096cc: 687b ldr r3, [r7, #4]
- 80096ce: 681b ldr r3, [r3, #0]
- 80096d0: 4a15 ldr r2, [pc, #84] @ (8009728 <HAL_DMA_IRQHandler+0x434>)
- 80096d2: 4293 cmp r3, r2
- 80096d4: d12a bne.n 800972c <HAL_DMA_IRQHandler+0x438>
- 80096d6: 687b ldr r3, [r7, #4]
- 80096d8: 681b ldr r3, [r3, #0]
- 80096da: 681b ldr r3, [r3, #0]
- 80096dc: f003 0302 and.w r3, r3, #2
- 80096e0: 2b00 cmp r3, #0
- 80096e2: bf14 ite ne
- 80096e4: 2301 movne r3, #1
- 80096e6: 2300 moveq r3, #0
- 80096e8: b2db uxtb r3, r3
- 80096ea: e023 b.n 8009734 <HAL_DMA_IRQHandler+0x440>
- 80096ec: 40020010 .word 0x40020010
- 80096f0: 40020028 .word 0x40020028
- 80096f4: 40020040 .word 0x40020040
- 80096f8: 40020058 .word 0x40020058
- 80096fc: 40020070 .word 0x40020070
- 8009700: 40020088 .word 0x40020088
- 8009704: 400200a0 .word 0x400200a0
- 8009708: 400200b8 .word 0x400200b8
- 800970c: 40020410 .word 0x40020410
- 8009710: 40020428 .word 0x40020428
- 8009714: 40020440 .word 0x40020440
- 8009718: 40020458 .word 0x40020458
- 800971c: 40020470 .word 0x40020470
- 8009720: 40020488 .word 0x40020488
- 8009724: 400204a0 .word 0x400204a0
- 8009728: 400204b8 .word 0x400204b8
- 800972c: 687b ldr r3, [r7, #4]
- 800972e: 681b ldr r3, [r3, #0]
- 8009730: 681b ldr r3, [r3, #0]
- 8009732: 2300 movs r3, #0
- 8009734: 2b00 cmp r3, #0
- 8009736: d00d beq.n 8009754 <HAL_DMA_IRQHandler+0x460>
- {
- /* Clear the direct mode error flag */
- regs_dma->IFCR = DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU);
- 8009738: 687b ldr r3, [r7, #4]
- 800973a: 6ddb ldr r3, [r3, #92] @ 0x5c
- 800973c: f003 031f and.w r3, r3, #31
- 8009740: 2204 movs r2, #4
- 8009742: 409a lsls r2, r3
- 8009744: 6a3b ldr r3, [r7, #32]
- 8009746: 609a str r2, [r3, #8]
- /* Update error code */
- hdma->ErrorCode |= HAL_DMA_ERROR_DME;
- 8009748: 687b ldr r3, [r7, #4]
- 800974a: 6d5b ldr r3, [r3, #84] @ 0x54
- 800974c: f043 0204 orr.w r2, r3, #4
- 8009750: 687b ldr r3, [r7, #4]
- 8009752: 655a str r2, [r3, #84] @ 0x54
- }
- }
- /* Half Transfer Complete Interrupt management ******************************/
- if ((tmpisr_dma & (DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
- 8009754: 687b ldr r3, [r7, #4]
- 8009756: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8009758: f003 031f and.w r3, r3, #31
- 800975c: 2210 movs r2, #16
- 800975e: 409a lsls r2, r3
- 8009760: 69bb ldr r3, [r7, #24]
- 8009762: 4013 ands r3, r2
- 8009764: 2b00 cmp r3, #0
- 8009766: f000 80a6 beq.w 80098b6 <HAL_DMA_IRQHandler+0x5c2>
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != 0U)
- 800976a: 687b ldr r3, [r7, #4]
- 800976c: 681b ldr r3, [r3, #0]
- 800976e: 4a85 ldr r2, [pc, #532] @ (8009984 <HAL_DMA_IRQHandler+0x690>)
- 8009770: 4293 cmp r3, r2
- 8009772: d04a beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 8009774: 687b ldr r3, [r7, #4]
- 8009776: 681b ldr r3, [r3, #0]
- 8009778: 4a83 ldr r2, [pc, #524] @ (8009988 <HAL_DMA_IRQHandler+0x694>)
- 800977a: 4293 cmp r3, r2
- 800977c: d045 beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 800977e: 687b ldr r3, [r7, #4]
- 8009780: 681b ldr r3, [r3, #0]
- 8009782: 4a82 ldr r2, [pc, #520] @ (800998c <HAL_DMA_IRQHandler+0x698>)
- 8009784: 4293 cmp r3, r2
- 8009786: d040 beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 8009788: 687b ldr r3, [r7, #4]
- 800978a: 681b ldr r3, [r3, #0]
- 800978c: 4a80 ldr r2, [pc, #512] @ (8009990 <HAL_DMA_IRQHandler+0x69c>)
- 800978e: 4293 cmp r3, r2
- 8009790: d03b beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 8009792: 687b ldr r3, [r7, #4]
- 8009794: 681b ldr r3, [r3, #0]
- 8009796: 4a7f ldr r2, [pc, #508] @ (8009994 <HAL_DMA_IRQHandler+0x6a0>)
- 8009798: 4293 cmp r3, r2
- 800979a: d036 beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 800979c: 687b ldr r3, [r7, #4]
- 800979e: 681b ldr r3, [r3, #0]
- 80097a0: 4a7d ldr r2, [pc, #500] @ (8009998 <HAL_DMA_IRQHandler+0x6a4>)
- 80097a2: 4293 cmp r3, r2
- 80097a4: d031 beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 80097a6: 687b ldr r3, [r7, #4]
- 80097a8: 681b ldr r3, [r3, #0]
- 80097aa: 4a7c ldr r2, [pc, #496] @ (800999c <HAL_DMA_IRQHandler+0x6a8>)
- 80097ac: 4293 cmp r3, r2
- 80097ae: d02c beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 80097b0: 687b ldr r3, [r7, #4]
- 80097b2: 681b ldr r3, [r3, #0]
- 80097b4: 4a7a ldr r2, [pc, #488] @ (80099a0 <HAL_DMA_IRQHandler+0x6ac>)
- 80097b6: 4293 cmp r3, r2
- 80097b8: d027 beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 80097ba: 687b ldr r3, [r7, #4]
- 80097bc: 681b ldr r3, [r3, #0]
- 80097be: 4a79 ldr r2, [pc, #484] @ (80099a4 <HAL_DMA_IRQHandler+0x6b0>)
- 80097c0: 4293 cmp r3, r2
- 80097c2: d022 beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 80097c4: 687b ldr r3, [r7, #4]
- 80097c6: 681b ldr r3, [r3, #0]
- 80097c8: 4a77 ldr r2, [pc, #476] @ (80099a8 <HAL_DMA_IRQHandler+0x6b4>)
- 80097ca: 4293 cmp r3, r2
- 80097cc: d01d beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 80097ce: 687b ldr r3, [r7, #4]
- 80097d0: 681b ldr r3, [r3, #0]
- 80097d2: 4a76 ldr r2, [pc, #472] @ (80099ac <HAL_DMA_IRQHandler+0x6b8>)
- 80097d4: 4293 cmp r3, r2
- 80097d6: d018 beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 80097d8: 687b ldr r3, [r7, #4]
- 80097da: 681b ldr r3, [r3, #0]
- 80097dc: 4a74 ldr r2, [pc, #464] @ (80099b0 <HAL_DMA_IRQHandler+0x6bc>)
- 80097de: 4293 cmp r3, r2
- 80097e0: d013 beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 80097e2: 687b ldr r3, [r7, #4]
- 80097e4: 681b ldr r3, [r3, #0]
- 80097e6: 4a73 ldr r2, [pc, #460] @ (80099b4 <HAL_DMA_IRQHandler+0x6c0>)
- 80097e8: 4293 cmp r3, r2
- 80097ea: d00e beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 80097ec: 687b ldr r3, [r7, #4]
- 80097ee: 681b ldr r3, [r3, #0]
- 80097f0: 4a71 ldr r2, [pc, #452] @ (80099b8 <HAL_DMA_IRQHandler+0x6c4>)
- 80097f2: 4293 cmp r3, r2
- 80097f4: d009 beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 80097f6: 687b ldr r3, [r7, #4]
- 80097f8: 681b ldr r3, [r3, #0]
- 80097fa: 4a70 ldr r2, [pc, #448] @ (80099bc <HAL_DMA_IRQHandler+0x6c8>)
- 80097fc: 4293 cmp r3, r2
- 80097fe: d004 beq.n 800980a <HAL_DMA_IRQHandler+0x516>
- 8009800: 687b ldr r3, [r7, #4]
- 8009802: 681b ldr r3, [r3, #0]
- 8009804: 4a6e ldr r2, [pc, #440] @ (80099c0 <HAL_DMA_IRQHandler+0x6cc>)
- 8009806: 4293 cmp r3, r2
- 8009808: d10a bne.n 8009820 <HAL_DMA_IRQHandler+0x52c>
- 800980a: 687b ldr r3, [r7, #4]
- 800980c: 681b ldr r3, [r3, #0]
- 800980e: 681b ldr r3, [r3, #0]
- 8009810: f003 0308 and.w r3, r3, #8
- 8009814: 2b00 cmp r3, #0
- 8009816: bf14 ite ne
- 8009818: 2301 movne r3, #1
- 800981a: 2300 moveq r3, #0
- 800981c: b2db uxtb r3, r3
- 800981e: e009 b.n 8009834 <HAL_DMA_IRQHandler+0x540>
- 8009820: 687b ldr r3, [r7, #4]
- 8009822: 681b ldr r3, [r3, #0]
- 8009824: 681b ldr r3, [r3, #0]
- 8009826: f003 0304 and.w r3, r3, #4
- 800982a: 2b00 cmp r3, #0
- 800982c: bf14 ite ne
- 800982e: 2301 movne r3, #1
- 8009830: 2300 moveq r3, #0
- 8009832: b2db uxtb r3, r3
- 8009834: 2b00 cmp r3, #0
- 8009836: d03e beq.n 80098b6 <HAL_DMA_IRQHandler+0x5c2>
- {
- /* Clear the half transfer complete flag */
- regs_dma->IFCR = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU);
- 8009838: 687b ldr r3, [r7, #4]
- 800983a: 6ddb ldr r3, [r3, #92] @ 0x5c
- 800983c: f003 031f and.w r3, r3, #31
- 8009840: 2210 movs r2, #16
- 8009842: 409a lsls r2, r3
- 8009844: 6a3b ldr r3, [r7, #32]
- 8009846: 609a str r2, [r3, #8]
- /* Multi_Buffering mode enabled */
- if(((((DMA_Stream_TypeDef *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U)
- 8009848: 687b ldr r3, [r7, #4]
- 800984a: 681b ldr r3, [r3, #0]
- 800984c: 681b ldr r3, [r3, #0]
- 800984e: f403 2380 and.w r3, r3, #262144 @ 0x40000
- 8009852: 2b00 cmp r3, #0
- 8009854: d018 beq.n 8009888 <HAL_DMA_IRQHandler+0x594>
- {
- /* Current memory buffer used is Memory 0 */
- if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U)
- 8009856: 687b ldr r3, [r7, #4]
- 8009858: 681b ldr r3, [r3, #0]
- 800985a: 681b ldr r3, [r3, #0]
- 800985c: f403 2300 and.w r3, r3, #524288 @ 0x80000
- 8009860: 2b00 cmp r3, #0
- 8009862: d108 bne.n 8009876 <HAL_DMA_IRQHandler+0x582>
- {
- if(hdma->XferHalfCpltCallback != NULL)
- 8009864: 687b ldr r3, [r7, #4]
- 8009866: 6c1b ldr r3, [r3, #64] @ 0x40
- 8009868: 2b00 cmp r3, #0
- 800986a: d024 beq.n 80098b6 <HAL_DMA_IRQHandler+0x5c2>
- {
- /* Half transfer callback */
- hdma->XferHalfCpltCallback(hdma);
- 800986c: 687b ldr r3, [r7, #4]
- 800986e: 6c1b ldr r3, [r3, #64] @ 0x40
- 8009870: 6878 ldr r0, [r7, #4]
- 8009872: 4798 blx r3
- 8009874: e01f b.n 80098b6 <HAL_DMA_IRQHandler+0x5c2>
- }
- }
- /* Current memory buffer used is Memory 1 */
- else
- {
- if(hdma->XferM1HalfCpltCallback != NULL)
- 8009876: 687b ldr r3, [r7, #4]
- 8009878: 6c9b ldr r3, [r3, #72] @ 0x48
- 800987a: 2b00 cmp r3, #0
- 800987c: d01b beq.n 80098b6 <HAL_DMA_IRQHandler+0x5c2>
- {
- /* Half transfer callback */
- hdma->XferM1HalfCpltCallback(hdma);
- 800987e: 687b ldr r3, [r7, #4]
- 8009880: 6c9b ldr r3, [r3, #72] @ 0x48
- 8009882: 6878 ldr r0, [r7, #4]
- 8009884: 4798 blx r3
- 8009886: e016 b.n 80098b6 <HAL_DMA_IRQHandler+0x5c2>
- }
- }
- else
- {
- /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
- if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U)
- 8009888: 687b ldr r3, [r7, #4]
- 800988a: 681b ldr r3, [r3, #0]
- 800988c: 681b ldr r3, [r3, #0]
- 800988e: f403 7380 and.w r3, r3, #256 @ 0x100
- 8009892: 2b00 cmp r3, #0
- 8009894: d107 bne.n 80098a6 <HAL_DMA_IRQHandler+0x5b2>
- {
- /* Disable the half transfer interrupt */
- ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_HT);
- 8009896: 687b ldr r3, [r7, #4]
- 8009898: 681b ldr r3, [r3, #0]
- 800989a: 681a ldr r2, [r3, #0]
- 800989c: 687b ldr r3, [r7, #4]
- 800989e: 681b ldr r3, [r3, #0]
- 80098a0: f022 0208 bic.w r2, r2, #8
- 80098a4: 601a str r2, [r3, #0]
- }
- if(hdma->XferHalfCpltCallback != NULL)
- 80098a6: 687b ldr r3, [r7, #4]
- 80098a8: 6c1b ldr r3, [r3, #64] @ 0x40
- 80098aa: 2b00 cmp r3, #0
- 80098ac: d003 beq.n 80098b6 <HAL_DMA_IRQHandler+0x5c2>
- {
- /* Half transfer callback */
- hdma->XferHalfCpltCallback(hdma);
- 80098ae: 687b ldr r3, [r7, #4]
- 80098b0: 6c1b ldr r3, [r3, #64] @ 0x40
- 80098b2: 6878 ldr r0, [r7, #4]
- 80098b4: 4798 blx r3
- }
- }
- }
- }
- /* Transfer Complete Interrupt management ***********************************/
- if ((tmpisr_dma & (DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
- 80098b6: 687b ldr r3, [r7, #4]
- 80098b8: 6ddb ldr r3, [r3, #92] @ 0x5c
- 80098ba: f003 031f and.w r3, r3, #31
- 80098be: 2220 movs r2, #32
- 80098c0: 409a lsls r2, r3
- 80098c2: 69bb ldr r3, [r7, #24]
- 80098c4: 4013 ands r3, r2
- 80098c6: 2b00 cmp r3, #0
- 80098c8: f000 8110 beq.w 8009aec <HAL_DMA_IRQHandler+0x7f8>
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != 0U)
- 80098cc: 687b ldr r3, [r7, #4]
- 80098ce: 681b ldr r3, [r3, #0]
- 80098d0: 4a2c ldr r2, [pc, #176] @ (8009984 <HAL_DMA_IRQHandler+0x690>)
- 80098d2: 4293 cmp r3, r2
- 80098d4: d04a beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 80098d6: 687b ldr r3, [r7, #4]
- 80098d8: 681b ldr r3, [r3, #0]
- 80098da: 4a2b ldr r2, [pc, #172] @ (8009988 <HAL_DMA_IRQHandler+0x694>)
- 80098dc: 4293 cmp r3, r2
- 80098de: d045 beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 80098e0: 687b ldr r3, [r7, #4]
- 80098e2: 681b ldr r3, [r3, #0]
- 80098e4: 4a29 ldr r2, [pc, #164] @ (800998c <HAL_DMA_IRQHandler+0x698>)
- 80098e6: 4293 cmp r3, r2
- 80098e8: d040 beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 80098ea: 687b ldr r3, [r7, #4]
- 80098ec: 681b ldr r3, [r3, #0]
- 80098ee: 4a28 ldr r2, [pc, #160] @ (8009990 <HAL_DMA_IRQHandler+0x69c>)
- 80098f0: 4293 cmp r3, r2
- 80098f2: d03b beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 80098f4: 687b ldr r3, [r7, #4]
- 80098f6: 681b ldr r3, [r3, #0]
- 80098f8: 4a26 ldr r2, [pc, #152] @ (8009994 <HAL_DMA_IRQHandler+0x6a0>)
- 80098fa: 4293 cmp r3, r2
- 80098fc: d036 beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 80098fe: 687b ldr r3, [r7, #4]
- 8009900: 681b ldr r3, [r3, #0]
- 8009902: 4a25 ldr r2, [pc, #148] @ (8009998 <HAL_DMA_IRQHandler+0x6a4>)
- 8009904: 4293 cmp r3, r2
- 8009906: d031 beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 8009908: 687b ldr r3, [r7, #4]
- 800990a: 681b ldr r3, [r3, #0]
- 800990c: 4a23 ldr r2, [pc, #140] @ (800999c <HAL_DMA_IRQHandler+0x6a8>)
- 800990e: 4293 cmp r3, r2
- 8009910: d02c beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 8009912: 687b ldr r3, [r7, #4]
- 8009914: 681b ldr r3, [r3, #0]
- 8009916: 4a22 ldr r2, [pc, #136] @ (80099a0 <HAL_DMA_IRQHandler+0x6ac>)
- 8009918: 4293 cmp r3, r2
- 800991a: d027 beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 800991c: 687b ldr r3, [r7, #4]
- 800991e: 681b ldr r3, [r3, #0]
- 8009920: 4a20 ldr r2, [pc, #128] @ (80099a4 <HAL_DMA_IRQHandler+0x6b0>)
- 8009922: 4293 cmp r3, r2
- 8009924: d022 beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 8009926: 687b ldr r3, [r7, #4]
- 8009928: 681b ldr r3, [r3, #0]
- 800992a: 4a1f ldr r2, [pc, #124] @ (80099a8 <HAL_DMA_IRQHandler+0x6b4>)
- 800992c: 4293 cmp r3, r2
- 800992e: d01d beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 8009930: 687b ldr r3, [r7, #4]
- 8009932: 681b ldr r3, [r3, #0]
- 8009934: 4a1d ldr r2, [pc, #116] @ (80099ac <HAL_DMA_IRQHandler+0x6b8>)
- 8009936: 4293 cmp r3, r2
- 8009938: d018 beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 800993a: 687b ldr r3, [r7, #4]
- 800993c: 681b ldr r3, [r3, #0]
- 800993e: 4a1c ldr r2, [pc, #112] @ (80099b0 <HAL_DMA_IRQHandler+0x6bc>)
- 8009940: 4293 cmp r3, r2
- 8009942: d013 beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 8009944: 687b ldr r3, [r7, #4]
- 8009946: 681b ldr r3, [r3, #0]
- 8009948: 4a1a ldr r2, [pc, #104] @ (80099b4 <HAL_DMA_IRQHandler+0x6c0>)
- 800994a: 4293 cmp r3, r2
- 800994c: d00e beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 800994e: 687b ldr r3, [r7, #4]
- 8009950: 681b ldr r3, [r3, #0]
- 8009952: 4a19 ldr r2, [pc, #100] @ (80099b8 <HAL_DMA_IRQHandler+0x6c4>)
- 8009954: 4293 cmp r3, r2
- 8009956: d009 beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 8009958: 687b ldr r3, [r7, #4]
- 800995a: 681b ldr r3, [r3, #0]
- 800995c: 4a17 ldr r2, [pc, #92] @ (80099bc <HAL_DMA_IRQHandler+0x6c8>)
- 800995e: 4293 cmp r3, r2
- 8009960: d004 beq.n 800996c <HAL_DMA_IRQHandler+0x678>
- 8009962: 687b ldr r3, [r7, #4]
- 8009964: 681b ldr r3, [r3, #0]
- 8009966: 4a16 ldr r2, [pc, #88] @ (80099c0 <HAL_DMA_IRQHandler+0x6cc>)
- 8009968: 4293 cmp r3, r2
- 800996a: d12b bne.n 80099c4 <HAL_DMA_IRQHandler+0x6d0>
- 800996c: 687b ldr r3, [r7, #4]
- 800996e: 681b ldr r3, [r3, #0]
- 8009970: 681b ldr r3, [r3, #0]
- 8009972: f003 0310 and.w r3, r3, #16
- 8009976: 2b00 cmp r3, #0
- 8009978: bf14 ite ne
- 800997a: 2301 movne r3, #1
- 800997c: 2300 moveq r3, #0
- 800997e: b2db uxtb r3, r3
- 8009980: e02a b.n 80099d8 <HAL_DMA_IRQHandler+0x6e4>
- 8009982: bf00 nop
- 8009984: 40020010 .word 0x40020010
- 8009988: 40020028 .word 0x40020028
- 800998c: 40020040 .word 0x40020040
- 8009990: 40020058 .word 0x40020058
- 8009994: 40020070 .word 0x40020070
- 8009998: 40020088 .word 0x40020088
- 800999c: 400200a0 .word 0x400200a0
- 80099a0: 400200b8 .word 0x400200b8
- 80099a4: 40020410 .word 0x40020410
- 80099a8: 40020428 .word 0x40020428
- 80099ac: 40020440 .word 0x40020440
- 80099b0: 40020458 .word 0x40020458
- 80099b4: 40020470 .word 0x40020470
- 80099b8: 40020488 .word 0x40020488
- 80099bc: 400204a0 .word 0x400204a0
- 80099c0: 400204b8 .word 0x400204b8
- 80099c4: 687b ldr r3, [r7, #4]
- 80099c6: 681b ldr r3, [r3, #0]
- 80099c8: 681b ldr r3, [r3, #0]
- 80099ca: f003 0302 and.w r3, r3, #2
- 80099ce: 2b00 cmp r3, #0
- 80099d0: bf14 ite ne
- 80099d2: 2301 movne r3, #1
- 80099d4: 2300 moveq r3, #0
- 80099d6: b2db uxtb r3, r3
- 80099d8: 2b00 cmp r3, #0
- 80099da: f000 8087 beq.w 8009aec <HAL_DMA_IRQHandler+0x7f8>
- {
- /* Clear the transfer complete flag */
- regs_dma->IFCR = DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU);
- 80099de: 687b ldr r3, [r7, #4]
- 80099e0: 6ddb ldr r3, [r3, #92] @ 0x5c
- 80099e2: f003 031f and.w r3, r3, #31
- 80099e6: 2220 movs r2, #32
- 80099e8: 409a lsls r2, r3
- 80099ea: 6a3b ldr r3, [r7, #32]
- 80099ec: 609a str r2, [r3, #8]
- if(HAL_DMA_STATE_ABORT == hdma->State)
- 80099ee: 687b ldr r3, [r7, #4]
- 80099f0: f893 3035 ldrb.w r3, [r3, #53] @ 0x35
- 80099f4: b2db uxtb r3, r3
- 80099f6: 2b04 cmp r3, #4
- 80099f8: d139 bne.n 8009a6e <HAL_DMA_IRQHandler+0x77a>
- {
- /* Disable all the transfer interrupts */
- ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME);
- 80099fa: 687b ldr r3, [r7, #4]
- 80099fc: 681b ldr r3, [r3, #0]
- 80099fe: 681a ldr r2, [r3, #0]
- 8009a00: 687b ldr r3, [r7, #4]
- 8009a02: 681b ldr r3, [r3, #0]
- 8009a04: f022 0216 bic.w r2, r2, #22
- 8009a08: 601a str r2, [r3, #0]
- ((DMA_Stream_TypeDef *)hdma->Instance)->FCR &= ~(DMA_IT_FE);
- 8009a0a: 687b ldr r3, [r7, #4]
- 8009a0c: 681b ldr r3, [r3, #0]
- 8009a0e: 695a ldr r2, [r3, #20]
- 8009a10: 687b ldr r3, [r7, #4]
- 8009a12: 681b ldr r3, [r3, #0]
- 8009a14: f022 0280 bic.w r2, r2, #128 @ 0x80
- 8009a18: 615a str r2, [r3, #20]
- if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
- 8009a1a: 687b ldr r3, [r7, #4]
- 8009a1c: 6c1b ldr r3, [r3, #64] @ 0x40
- 8009a1e: 2b00 cmp r3, #0
- 8009a20: d103 bne.n 8009a2a <HAL_DMA_IRQHandler+0x736>
- 8009a22: 687b ldr r3, [r7, #4]
- 8009a24: 6c9b ldr r3, [r3, #72] @ 0x48
- 8009a26: 2b00 cmp r3, #0
- 8009a28: d007 beq.n 8009a3a <HAL_DMA_IRQHandler+0x746>
- {
- ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_HT);
- 8009a2a: 687b ldr r3, [r7, #4]
- 8009a2c: 681b ldr r3, [r3, #0]
- 8009a2e: 681a ldr r2, [r3, #0]
- 8009a30: 687b ldr r3, [r7, #4]
- 8009a32: 681b ldr r3, [r3, #0]
- 8009a34: f022 0208 bic.w r2, r2, #8
- 8009a38: 601a str r2, [r3, #0]
- }
- /* Clear all interrupt flags at correct offset within the register */
- regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
- 8009a3a: 687b ldr r3, [r7, #4]
- 8009a3c: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8009a3e: f003 031f and.w r3, r3, #31
- 8009a42: 223f movs r2, #63 @ 0x3f
- 8009a44: 409a lsls r2, r3
- 8009a46: 6a3b ldr r3, [r7, #32]
- 8009a48: 609a str r2, [r3, #8]
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
- 8009a4a: 687b ldr r3, [r7, #4]
- 8009a4c: 2201 movs r2, #1
- 8009a4e: f883 2035 strb.w r2, [r3, #53] @ 0x35
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- 8009a52: 687b ldr r3, [r7, #4]
- 8009a54: 2200 movs r2, #0
- 8009a56: f883 2034 strb.w r2, [r3, #52] @ 0x34
- if(hdma->XferAbortCallback != NULL)
- 8009a5a: 687b ldr r3, [r7, #4]
- 8009a5c: 6d1b ldr r3, [r3, #80] @ 0x50
- 8009a5e: 2b00 cmp r3, #0
- 8009a60: f000 834a beq.w 800a0f8 <HAL_DMA_IRQHandler+0xe04>
- {
- hdma->XferAbortCallback(hdma);
- 8009a64: 687b ldr r3, [r7, #4]
- 8009a66: 6d1b ldr r3, [r3, #80] @ 0x50
- 8009a68: 6878 ldr r0, [r7, #4]
- 8009a6a: 4798 blx r3
- }
- return;
- 8009a6c: e344 b.n 800a0f8 <HAL_DMA_IRQHandler+0xe04>
- }
- if(((((DMA_Stream_TypeDef *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U)
- 8009a6e: 687b ldr r3, [r7, #4]
- 8009a70: 681b ldr r3, [r3, #0]
- 8009a72: 681b ldr r3, [r3, #0]
- 8009a74: f403 2380 and.w r3, r3, #262144 @ 0x40000
- 8009a78: 2b00 cmp r3, #0
- 8009a7a: d018 beq.n 8009aae <HAL_DMA_IRQHandler+0x7ba>
- {
- /* Current memory buffer used is Memory 0 */
- if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U)
- 8009a7c: 687b ldr r3, [r7, #4]
- 8009a7e: 681b ldr r3, [r3, #0]
- 8009a80: 681b ldr r3, [r3, #0]
- 8009a82: f403 2300 and.w r3, r3, #524288 @ 0x80000
- 8009a86: 2b00 cmp r3, #0
- 8009a88: d108 bne.n 8009a9c <HAL_DMA_IRQHandler+0x7a8>
- {
- if(hdma->XferM1CpltCallback != NULL)
- 8009a8a: 687b ldr r3, [r7, #4]
- 8009a8c: 6c5b ldr r3, [r3, #68] @ 0x44
- 8009a8e: 2b00 cmp r3, #0
- 8009a90: d02c beq.n 8009aec <HAL_DMA_IRQHandler+0x7f8>
- {
- /* Transfer complete Callback for memory1 */
- hdma->XferM1CpltCallback(hdma);
- 8009a92: 687b ldr r3, [r7, #4]
- 8009a94: 6c5b ldr r3, [r3, #68] @ 0x44
- 8009a96: 6878 ldr r0, [r7, #4]
- 8009a98: 4798 blx r3
- 8009a9a: e027 b.n 8009aec <HAL_DMA_IRQHandler+0x7f8>
- }
- }
- /* Current memory buffer used is Memory 1 */
- else
- {
- if(hdma->XferCpltCallback != NULL)
- 8009a9c: 687b ldr r3, [r7, #4]
- 8009a9e: 6bdb ldr r3, [r3, #60] @ 0x3c
- 8009aa0: 2b00 cmp r3, #0
- 8009aa2: d023 beq.n 8009aec <HAL_DMA_IRQHandler+0x7f8>
- {
- /* Transfer complete Callback for memory0 */
- hdma->XferCpltCallback(hdma);
- 8009aa4: 687b ldr r3, [r7, #4]
- 8009aa6: 6bdb ldr r3, [r3, #60] @ 0x3c
- 8009aa8: 6878 ldr r0, [r7, #4]
- 8009aaa: 4798 blx r3
- 8009aac: e01e b.n 8009aec <HAL_DMA_IRQHandler+0x7f8>
- }
- }
- /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
- else
- {
- if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U)
- 8009aae: 687b ldr r3, [r7, #4]
- 8009ab0: 681b ldr r3, [r3, #0]
- 8009ab2: 681b ldr r3, [r3, #0]
- 8009ab4: f403 7380 and.w r3, r3, #256 @ 0x100
- 8009ab8: 2b00 cmp r3, #0
- 8009aba: d10f bne.n 8009adc <HAL_DMA_IRQHandler+0x7e8>
- {
- /* Disable the transfer complete interrupt */
- ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TC);
- 8009abc: 687b ldr r3, [r7, #4]
- 8009abe: 681b ldr r3, [r3, #0]
- 8009ac0: 681a ldr r2, [r3, #0]
- 8009ac2: 687b ldr r3, [r7, #4]
- 8009ac4: 681b ldr r3, [r3, #0]
- 8009ac6: f022 0210 bic.w r2, r2, #16
- 8009aca: 601a str r2, [r3, #0]
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
- 8009acc: 687b ldr r3, [r7, #4]
- 8009ace: 2201 movs r2, #1
- 8009ad0: f883 2035 strb.w r2, [r3, #53] @ 0x35
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- 8009ad4: 687b ldr r3, [r7, #4]
- 8009ad6: 2200 movs r2, #0
- 8009ad8: f883 2034 strb.w r2, [r3, #52] @ 0x34
- }
- if(hdma->XferCpltCallback != NULL)
- 8009adc: 687b ldr r3, [r7, #4]
- 8009ade: 6bdb ldr r3, [r3, #60] @ 0x3c
- 8009ae0: 2b00 cmp r3, #0
- 8009ae2: d003 beq.n 8009aec <HAL_DMA_IRQHandler+0x7f8>
- {
- /* Transfer complete callback */
- hdma->XferCpltCallback(hdma);
- 8009ae4: 687b ldr r3, [r7, #4]
- 8009ae6: 6bdb ldr r3, [r3, #60] @ 0x3c
- 8009ae8: 6878 ldr r0, [r7, #4]
- 8009aea: 4798 blx r3
- }
- }
- }
- /* manage error case */
- if(hdma->ErrorCode != HAL_DMA_ERROR_NONE)
- 8009aec: 687b ldr r3, [r7, #4]
- 8009aee: 6d5b ldr r3, [r3, #84] @ 0x54
- 8009af0: 2b00 cmp r3, #0
- 8009af2: f000 8306 beq.w 800a102 <HAL_DMA_IRQHandler+0xe0e>
- {
- if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != 0U)
- 8009af6: 687b ldr r3, [r7, #4]
- 8009af8: 6d5b ldr r3, [r3, #84] @ 0x54
- 8009afa: f003 0301 and.w r3, r3, #1
- 8009afe: 2b00 cmp r3, #0
- 8009b00: f000 8088 beq.w 8009c14 <HAL_DMA_IRQHandler+0x920>
- {
- hdma->State = HAL_DMA_STATE_ABORT;
- 8009b04: 687b ldr r3, [r7, #4]
- 8009b06: 2204 movs r2, #4
- 8009b08: f883 2035 strb.w r2, [r3, #53] @ 0x35
- /* Disable the stream */
- __HAL_DMA_DISABLE(hdma);
- 8009b0c: 687b ldr r3, [r7, #4]
- 8009b0e: 681b ldr r3, [r3, #0]
- 8009b10: 4a7a ldr r2, [pc, #488] @ (8009cfc <HAL_DMA_IRQHandler+0xa08>)
- 8009b12: 4293 cmp r3, r2
- 8009b14: d04a beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009b16: 687b ldr r3, [r7, #4]
- 8009b18: 681b ldr r3, [r3, #0]
- 8009b1a: 4a79 ldr r2, [pc, #484] @ (8009d00 <HAL_DMA_IRQHandler+0xa0c>)
- 8009b1c: 4293 cmp r3, r2
- 8009b1e: d045 beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009b20: 687b ldr r3, [r7, #4]
- 8009b22: 681b ldr r3, [r3, #0]
- 8009b24: 4a77 ldr r2, [pc, #476] @ (8009d04 <HAL_DMA_IRQHandler+0xa10>)
- 8009b26: 4293 cmp r3, r2
- 8009b28: d040 beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009b2a: 687b ldr r3, [r7, #4]
- 8009b2c: 681b ldr r3, [r3, #0]
- 8009b2e: 4a76 ldr r2, [pc, #472] @ (8009d08 <HAL_DMA_IRQHandler+0xa14>)
- 8009b30: 4293 cmp r3, r2
- 8009b32: d03b beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009b34: 687b ldr r3, [r7, #4]
- 8009b36: 681b ldr r3, [r3, #0]
- 8009b38: 4a74 ldr r2, [pc, #464] @ (8009d0c <HAL_DMA_IRQHandler+0xa18>)
- 8009b3a: 4293 cmp r3, r2
- 8009b3c: d036 beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009b3e: 687b ldr r3, [r7, #4]
- 8009b40: 681b ldr r3, [r3, #0]
- 8009b42: 4a73 ldr r2, [pc, #460] @ (8009d10 <HAL_DMA_IRQHandler+0xa1c>)
- 8009b44: 4293 cmp r3, r2
- 8009b46: d031 beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009b48: 687b ldr r3, [r7, #4]
- 8009b4a: 681b ldr r3, [r3, #0]
- 8009b4c: 4a71 ldr r2, [pc, #452] @ (8009d14 <HAL_DMA_IRQHandler+0xa20>)
- 8009b4e: 4293 cmp r3, r2
- 8009b50: d02c beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009b52: 687b ldr r3, [r7, #4]
- 8009b54: 681b ldr r3, [r3, #0]
- 8009b56: 4a70 ldr r2, [pc, #448] @ (8009d18 <HAL_DMA_IRQHandler+0xa24>)
- 8009b58: 4293 cmp r3, r2
- 8009b5a: d027 beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009b5c: 687b ldr r3, [r7, #4]
- 8009b5e: 681b ldr r3, [r3, #0]
- 8009b60: 4a6e ldr r2, [pc, #440] @ (8009d1c <HAL_DMA_IRQHandler+0xa28>)
- 8009b62: 4293 cmp r3, r2
- 8009b64: d022 beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009b66: 687b ldr r3, [r7, #4]
- 8009b68: 681b ldr r3, [r3, #0]
- 8009b6a: 4a6d ldr r2, [pc, #436] @ (8009d20 <HAL_DMA_IRQHandler+0xa2c>)
- 8009b6c: 4293 cmp r3, r2
- 8009b6e: d01d beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009b70: 687b ldr r3, [r7, #4]
- 8009b72: 681b ldr r3, [r3, #0]
- 8009b74: 4a6b ldr r2, [pc, #428] @ (8009d24 <HAL_DMA_IRQHandler+0xa30>)
- 8009b76: 4293 cmp r3, r2
- 8009b78: d018 beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009b7a: 687b ldr r3, [r7, #4]
- 8009b7c: 681b ldr r3, [r3, #0]
- 8009b7e: 4a6a ldr r2, [pc, #424] @ (8009d28 <HAL_DMA_IRQHandler+0xa34>)
- 8009b80: 4293 cmp r3, r2
- 8009b82: d013 beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009b84: 687b ldr r3, [r7, #4]
- 8009b86: 681b ldr r3, [r3, #0]
- 8009b88: 4a68 ldr r2, [pc, #416] @ (8009d2c <HAL_DMA_IRQHandler+0xa38>)
- 8009b8a: 4293 cmp r3, r2
- 8009b8c: d00e beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009b8e: 687b ldr r3, [r7, #4]
- 8009b90: 681b ldr r3, [r3, #0]
- 8009b92: 4a67 ldr r2, [pc, #412] @ (8009d30 <HAL_DMA_IRQHandler+0xa3c>)
- 8009b94: 4293 cmp r3, r2
- 8009b96: d009 beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009b98: 687b ldr r3, [r7, #4]
- 8009b9a: 681b ldr r3, [r3, #0]
- 8009b9c: 4a65 ldr r2, [pc, #404] @ (8009d34 <HAL_DMA_IRQHandler+0xa40>)
- 8009b9e: 4293 cmp r3, r2
- 8009ba0: d004 beq.n 8009bac <HAL_DMA_IRQHandler+0x8b8>
- 8009ba2: 687b ldr r3, [r7, #4]
- 8009ba4: 681b ldr r3, [r3, #0]
- 8009ba6: 4a64 ldr r2, [pc, #400] @ (8009d38 <HAL_DMA_IRQHandler+0xa44>)
- 8009ba8: 4293 cmp r3, r2
- 8009baa: d108 bne.n 8009bbe <HAL_DMA_IRQHandler+0x8ca>
- 8009bac: 687b ldr r3, [r7, #4]
- 8009bae: 681b ldr r3, [r3, #0]
- 8009bb0: 681a ldr r2, [r3, #0]
- 8009bb2: 687b ldr r3, [r7, #4]
- 8009bb4: 681b ldr r3, [r3, #0]
- 8009bb6: f022 0201 bic.w r2, r2, #1
- 8009bba: 601a str r2, [r3, #0]
- 8009bbc: e007 b.n 8009bce <HAL_DMA_IRQHandler+0x8da>
- 8009bbe: 687b ldr r3, [r7, #4]
- 8009bc0: 681b ldr r3, [r3, #0]
- 8009bc2: 681a ldr r2, [r3, #0]
- 8009bc4: 687b ldr r3, [r7, #4]
- 8009bc6: 681b ldr r3, [r3, #0]
- 8009bc8: f022 0201 bic.w r2, r2, #1
- 8009bcc: 601a str r2, [r3, #0]
- do
- {
- if (++count > timeout)
- 8009bce: 68fb ldr r3, [r7, #12]
- 8009bd0: 3301 adds r3, #1
- 8009bd2: 60fb str r3, [r7, #12]
- 8009bd4: 6a7a ldr r2, [r7, #36] @ 0x24
- 8009bd6: 429a cmp r2, r3
- 8009bd8: d307 bcc.n 8009bea <HAL_DMA_IRQHandler+0x8f6>
- {
- break;
- }
- }
- while((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U);
- 8009bda: 687b ldr r3, [r7, #4]
- 8009bdc: 681b ldr r3, [r3, #0]
- 8009bde: 681b ldr r3, [r3, #0]
- 8009be0: f003 0301 and.w r3, r3, #1
- 8009be4: 2b00 cmp r3, #0
- 8009be6: d1f2 bne.n 8009bce <HAL_DMA_IRQHandler+0x8da>
- 8009be8: e000 b.n 8009bec <HAL_DMA_IRQHandler+0x8f8>
- break;
- 8009bea: bf00 nop
- if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
- 8009bec: 687b ldr r3, [r7, #4]
- 8009bee: 681b ldr r3, [r3, #0]
- 8009bf0: 681b ldr r3, [r3, #0]
- 8009bf2: f003 0301 and.w r3, r3, #1
- 8009bf6: 2b00 cmp r3, #0
- 8009bf8: d004 beq.n 8009c04 <HAL_DMA_IRQHandler+0x910>
- {
- /* Change the DMA state to error if DMA disable fails */
- hdma->State = HAL_DMA_STATE_ERROR;
- 8009bfa: 687b ldr r3, [r7, #4]
- 8009bfc: 2203 movs r2, #3
- 8009bfe: f883 2035 strb.w r2, [r3, #53] @ 0x35
- 8009c02: e003 b.n 8009c0c <HAL_DMA_IRQHandler+0x918>
- }
- else
- {
- /* Change the DMA state to Ready if DMA disable success */
- hdma->State = HAL_DMA_STATE_READY;
- 8009c04: 687b ldr r3, [r7, #4]
- 8009c06: 2201 movs r2, #1
- 8009c08: f883 2035 strb.w r2, [r3, #53] @ 0x35
- }
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- 8009c0c: 687b ldr r3, [r7, #4]
- 8009c0e: 2200 movs r2, #0
- 8009c10: f883 2034 strb.w r2, [r3, #52] @ 0x34
- }
- if(hdma->XferErrorCallback != NULL)
- 8009c14: 687b ldr r3, [r7, #4]
- 8009c16: 6cdb ldr r3, [r3, #76] @ 0x4c
- 8009c18: 2b00 cmp r3, #0
- 8009c1a: f000 8272 beq.w 800a102 <HAL_DMA_IRQHandler+0xe0e>
- {
- /* Transfer error callback */
- hdma->XferErrorCallback(hdma);
- 8009c1e: 687b ldr r3, [r7, #4]
- 8009c20: 6cdb ldr r3, [r3, #76] @ 0x4c
- 8009c22: 6878 ldr r0, [r7, #4]
- 8009c24: 4798 blx r3
- 8009c26: e26c b.n 800a102 <HAL_DMA_IRQHandler+0xe0e>
- }
- }
- }
- else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */
- 8009c28: 687b ldr r3, [r7, #4]
- 8009c2a: 681b ldr r3, [r3, #0]
- 8009c2c: 4a43 ldr r2, [pc, #268] @ (8009d3c <HAL_DMA_IRQHandler+0xa48>)
- 8009c2e: 4293 cmp r3, r2
- 8009c30: d022 beq.n 8009c78 <HAL_DMA_IRQHandler+0x984>
- 8009c32: 687b ldr r3, [r7, #4]
- 8009c34: 681b ldr r3, [r3, #0]
- 8009c36: 4a42 ldr r2, [pc, #264] @ (8009d40 <HAL_DMA_IRQHandler+0xa4c>)
- 8009c38: 4293 cmp r3, r2
- 8009c3a: d01d beq.n 8009c78 <HAL_DMA_IRQHandler+0x984>
- 8009c3c: 687b ldr r3, [r7, #4]
- 8009c3e: 681b ldr r3, [r3, #0]
- 8009c40: 4a40 ldr r2, [pc, #256] @ (8009d44 <HAL_DMA_IRQHandler+0xa50>)
- 8009c42: 4293 cmp r3, r2
- 8009c44: d018 beq.n 8009c78 <HAL_DMA_IRQHandler+0x984>
- 8009c46: 687b ldr r3, [r7, #4]
- 8009c48: 681b ldr r3, [r3, #0]
- 8009c4a: 4a3f ldr r2, [pc, #252] @ (8009d48 <HAL_DMA_IRQHandler+0xa54>)
- 8009c4c: 4293 cmp r3, r2
- 8009c4e: d013 beq.n 8009c78 <HAL_DMA_IRQHandler+0x984>
- 8009c50: 687b ldr r3, [r7, #4]
- 8009c52: 681b ldr r3, [r3, #0]
- 8009c54: 4a3d ldr r2, [pc, #244] @ (8009d4c <HAL_DMA_IRQHandler+0xa58>)
- 8009c56: 4293 cmp r3, r2
- 8009c58: d00e beq.n 8009c78 <HAL_DMA_IRQHandler+0x984>
- 8009c5a: 687b ldr r3, [r7, #4]
- 8009c5c: 681b ldr r3, [r3, #0]
- 8009c5e: 4a3c ldr r2, [pc, #240] @ (8009d50 <HAL_DMA_IRQHandler+0xa5c>)
- 8009c60: 4293 cmp r3, r2
- 8009c62: d009 beq.n 8009c78 <HAL_DMA_IRQHandler+0x984>
- 8009c64: 687b ldr r3, [r7, #4]
- 8009c66: 681b ldr r3, [r3, #0]
- 8009c68: 4a3a ldr r2, [pc, #232] @ (8009d54 <HAL_DMA_IRQHandler+0xa60>)
- 8009c6a: 4293 cmp r3, r2
- 8009c6c: d004 beq.n 8009c78 <HAL_DMA_IRQHandler+0x984>
- 8009c6e: 687b ldr r3, [r7, #4]
- 8009c70: 681b ldr r3, [r3, #0]
- 8009c72: 4a39 ldr r2, [pc, #228] @ (8009d58 <HAL_DMA_IRQHandler+0xa64>)
- 8009c74: 4293 cmp r3, r2
- 8009c76: d101 bne.n 8009c7c <HAL_DMA_IRQHandler+0x988>
- 8009c78: 2301 movs r3, #1
- 8009c7a: e000 b.n 8009c7e <HAL_DMA_IRQHandler+0x98a>
- 8009c7c: 2300 movs r3, #0
- 8009c7e: 2b00 cmp r3, #0
- 8009c80: f000 823f beq.w 800a102 <HAL_DMA_IRQHandler+0xe0e>
- {
- ccr_reg = (((BDMA_Channel_TypeDef *)hdma->Instance)->CCR);
- 8009c84: 687b ldr r3, [r7, #4]
- 8009c86: 681b ldr r3, [r3, #0]
- 8009c88: 681b ldr r3, [r3, #0]
- 8009c8a: 613b str r3, [r7, #16]
- /* Half Transfer Complete Interrupt management ******************************/
- if (((tmpisr_bdma & (BDMA_FLAG_HT0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_HTIE) != 0U))
- 8009c8c: 687b ldr r3, [r7, #4]
- 8009c8e: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8009c90: f003 031f and.w r3, r3, #31
- 8009c94: 2204 movs r2, #4
- 8009c96: 409a lsls r2, r3
- 8009c98: 697b ldr r3, [r7, #20]
- 8009c9a: 4013 ands r3, r2
- 8009c9c: 2b00 cmp r3, #0
- 8009c9e: f000 80cd beq.w 8009e3c <HAL_DMA_IRQHandler+0xb48>
- 8009ca2: 693b ldr r3, [r7, #16]
- 8009ca4: f003 0304 and.w r3, r3, #4
- 8009ca8: 2b00 cmp r3, #0
- 8009caa: f000 80c7 beq.w 8009e3c <HAL_DMA_IRQHandler+0xb48>
- {
- /* Clear the half transfer complete flag */
- regs_bdma->IFCR = (BDMA_ISR_HTIF0 << (hdma->StreamIndex & 0x1FU));
- 8009cae: 687b ldr r3, [r7, #4]
- 8009cb0: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8009cb2: f003 031f and.w r3, r3, #31
- 8009cb6: 2204 movs r2, #4
- 8009cb8: 409a lsls r2, r3
- 8009cba: 69fb ldr r3, [r7, #28]
- 8009cbc: 605a str r2, [r3, #4]
- /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */
- if((ccr_reg & BDMA_CCR_DBM) != 0U)
- 8009cbe: 693b ldr r3, [r7, #16]
- 8009cc0: f403 4300 and.w r3, r3, #32768 @ 0x8000
- 8009cc4: 2b00 cmp r3, #0
- 8009cc6: d049 beq.n 8009d5c <HAL_DMA_IRQHandler+0xa68>
- {
- /* Current memory buffer used is Memory 0 */
- if((ccr_reg & BDMA_CCR_CT) == 0U)
- 8009cc8: 693b ldr r3, [r7, #16]
- 8009cca: f403 3380 and.w r3, r3, #65536 @ 0x10000
- 8009cce: 2b00 cmp r3, #0
- 8009cd0: d109 bne.n 8009ce6 <HAL_DMA_IRQHandler+0x9f2>
- {
- if(hdma->XferM1HalfCpltCallback != NULL)
- 8009cd2: 687b ldr r3, [r7, #4]
- 8009cd4: 6c9b ldr r3, [r3, #72] @ 0x48
- 8009cd6: 2b00 cmp r3, #0
- 8009cd8: f000 8210 beq.w 800a0fc <HAL_DMA_IRQHandler+0xe08>
- {
- /* Half transfer Callback for Memory 1 */
- hdma->XferM1HalfCpltCallback(hdma);
- 8009cdc: 687b ldr r3, [r7, #4]
- 8009cde: 6c9b ldr r3, [r3, #72] @ 0x48
- 8009ce0: 6878 ldr r0, [r7, #4]
- 8009ce2: 4798 blx r3
- if((ccr_reg & BDMA_CCR_DBM) != 0U)
- 8009ce4: e20a b.n 800a0fc <HAL_DMA_IRQHandler+0xe08>
- }
- }
- /* Current memory buffer used is Memory 1 */
- else
- {
- if(hdma->XferHalfCpltCallback != NULL)
- 8009ce6: 687b ldr r3, [r7, #4]
- 8009ce8: 6c1b ldr r3, [r3, #64] @ 0x40
- 8009cea: 2b00 cmp r3, #0
- 8009cec: f000 8206 beq.w 800a0fc <HAL_DMA_IRQHandler+0xe08>
- {
- /* Half transfer Callback for Memory 0 */
- hdma->XferHalfCpltCallback(hdma);
- 8009cf0: 687b ldr r3, [r7, #4]
- 8009cf2: 6c1b ldr r3, [r3, #64] @ 0x40
- 8009cf4: 6878 ldr r0, [r7, #4]
- 8009cf6: 4798 blx r3
- if((ccr_reg & BDMA_CCR_DBM) != 0U)
- 8009cf8: e200 b.n 800a0fc <HAL_DMA_IRQHandler+0xe08>
- 8009cfa: bf00 nop
- 8009cfc: 40020010 .word 0x40020010
- 8009d00: 40020028 .word 0x40020028
- 8009d04: 40020040 .word 0x40020040
- 8009d08: 40020058 .word 0x40020058
- 8009d0c: 40020070 .word 0x40020070
- 8009d10: 40020088 .word 0x40020088
- 8009d14: 400200a0 .word 0x400200a0
- 8009d18: 400200b8 .word 0x400200b8
- 8009d1c: 40020410 .word 0x40020410
- 8009d20: 40020428 .word 0x40020428
- 8009d24: 40020440 .word 0x40020440
- 8009d28: 40020458 .word 0x40020458
- 8009d2c: 40020470 .word 0x40020470
- 8009d30: 40020488 .word 0x40020488
- 8009d34: 400204a0 .word 0x400204a0
- 8009d38: 400204b8 .word 0x400204b8
- 8009d3c: 58025408 .word 0x58025408
- 8009d40: 5802541c .word 0x5802541c
- 8009d44: 58025430 .word 0x58025430
- 8009d48: 58025444 .word 0x58025444
- 8009d4c: 58025458 .word 0x58025458
- 8009d50: 5802546c .word 0x5802546c
- 8009d54: 58025480 .word 0x58025480
- 8009d58: 58025494 .word 0x58025494
- }
- }
- }
- else
- {
- if((ccr_reg & BDMA_CCR_CIRC) == 0U)
- 8009d5c: 693b ldr r3, [r7, #16]
- 8009d5e: f003 0320 and.w r3, r3, #32
- 8009d62: 2b00 cmp r3, #0
- 8009d64: d160 bne.n 8009e28 <HAL_DMA_IRQHandler+0xb34>
- {
- /* Disable the half transfer interrupt */
- __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
- 8009d66: 687b ldr r3, [r7, #4]
- 8009d68: 681b ldr r3, [r3, #0]
- 8009d6a: 4a7f ldr r2, [pc, #508] @ (8009f68 <HAL_DMA_IRQHandler+0xc74>)
- 8009d6c: 4293 cmp r3, r2
- 8009d6e: d04a beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009d70: 687b ldr r3, [r7, #4]
- 8009d72: 681b ldr r3, [r3, #0]
- 8009d74: 4a7d ldr r2, [pc, #500] @ (8009f6c <HAL_DMA_IRQHandler+0xc78>)
- 8009d76: 4293 cmp r3, r2
- 8009d78: d045 beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009d7a: 687b ldr r3, [r7, #4]
- 8009d7c: 681b ldr r3, [r3, #0]
- 8009d7e: 4a7c ldr r2, [pc, #496] @ (8009f70 <HAL_DMA_IRQHandler+0xc7c>)
- 8009d80: 4293 cmp r3, r2
- 8009d82: d040 beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009d84: 687b ldr r3, [r7, #4]
- 8009d86: 681b ldr r3, [r3, #0]
- 8009d88: 4a7a ldr r2, [pc, #488] @ (8009f74 <HAL_DMA_IRQHandler+0xc80>)
- 8009d8a: 4293 cmp r3, r2
- 8009d8c: d03b beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009d8e: 687b ldr r3, [r7, #4]
- 8009d90: 681b ldr r3, [r3, #0]
- 8009d92: 4a79 ldr r2, [pc, #484] @ (8009f78 <HAL_DMA_IRQHandler+0xc84>)
- 8009d94: 4293 cmp r3, r2
- 8009d96: d036 beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009d98: 687b ldr r3, [r7, #4]
- 8009d9a: 681b ldr r3, [r3, #0]
- 8009d9c: 4a77 ldr r2, [pc, #476] @ (8009f7c <HAL_DMA_IRQHandler+0xc88>)
- 8009d9e: 4293 cmp r3, r2
- 8009da0: d031 beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009da2: 687b ldr r3, [r7, #4]
- 8009da4: 681b ldr r3, [r3, #0]
- 8009da6: 4a76 ldr r2, [pc, #472] @ (8009f80 <HAL_DMA_IRQHandler+0xc8c>)
- 8009da8: 4293 cmp r3, r2
- 8009daa: d02c beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009dac: 687b ldr r3, [r7, #4]
- 8009dae: 681b ldr r3, [r3, #0]
- 8009db0: 4a74 ldr r2, [pc, #464] @ (8009f84 <HAL_DMA_IRQHandler+0xc90>)
- 8009db2: 4293 cmp r3, r2
- 8009db4: d027 beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009db6: 687b ldr r3, [r7, #4]
- 8009db8: 681b ldr r3, [r3, #0]
- 8009dba: 4a73 ldr r2, [pc, #460] @ (8009f88 <HAL_DMA_IRQHandler+0xc94>)
- 8009dbc: 4293 cmp r3, r2
- 8009dbe: d022 beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009dc0: 687b ldr r3, [r7, #4]
- 8009dc2: 681b ldr r3, [r3, #0]
- 8009dc4: 4a71 ldr r2, [pc, #452] @ (8009f8c <HAL_DMA_IRQHandler+0xc98>)
- 8009dc6: 4293 cmp r3, r2
- 8009dc8: d01d beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009dca: 687b ldr r3, [r7, #4]
- 8009dcc: 681b ldr r3, [r3, #0]
- 8009dce: 4a70 ldr r2, [pc, #448] @ (8009f90 <HAL_DMA_IRQHandler+0xc9c>)
- 8009dd0: 4293 cmp r3, r2
- 8009dd2: d018 beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009dd4: 687b ldr r3, [r7, #4]
- 8009dd6: 681b ldr r3, [r3, #0]
- 8009dd8: 4a6e ldr r2, [pc, #440] @ (8009f94 <HAL_DMA_IRQHandler+0xca0>)
- 8009dda: 4293 cmp r3, r2
- 8009ddc: d013 beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009dde: 687b ldr r3, [r7, #4]
- 8009de0: 681b ldr r3, [r3, #0]
- 8009de2: 4a6d ldr r2, [pc, #436] @ (8009f98 <HAL_DMA_IRQHandler+0xca4>)
- 8009de4: 4293 cmp r3, r2
- 8009de6: d00e beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009de8: 687b ldr r3, [r7, #4]
- 8009dea: 681b ldr r3, [r3, #0]
- 8009dec: 4a6b ldr r2, [pc, #428] @ (8009f9c <HAL_DMA_IRQHandler+0xca8>)
- 8009dee: 4293 cmp r3, r2
- 8009df0: d009 beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009df2: 687b ldr r3, [r7, #4]
- 8009df4: 681b ldr r3, [r3, #0]
- 8009df6: 4a6a ldr r2, [pc, #424] @ (8009fa0 <HAL_DMA_IRQHandler+0xcac>)
- 8009df8: 4293 cmp r3, r2
- 8009dfa: d004 beq.n 8009e06 <HAL_DMA_IRQHandler+0xb12>
- 8009dfc: 687b ldr r3, [r7, #4]
- 8009dfe: 681b ldr r3, [r3, #0]
- 8009e00: 4a68 ldr r2, [pc, #416] @ (8009fa4 <HAL_DMA_IRQHandler+0xcb0>)
- 8009e02: 4293 cmp r3, r2
- 8009e04: d108 bne.n 8009e18 <HAL_DMA_IRQHandler+0xb24>
- 8009e06: 687b ldr r3, [r7, #4]
- 8009e08: 681b ldr r3, [r3, #0]
- 8009e0a: 681a ldr r2, [r3, #0]
- 8009e0c: 687b ldr r3, [r7, #4]
- 8009e0e: 681b ldr r3, [r3, #0]
- 8009e10: f022 0208 bic.w r2, r2, #8
- 8009e14: 601a str r2, [r3, #0]
- 8009e16: e007 b.n 8009e28 <HAL_DMA_IRQHandler+0xb34>
- 8009e18: 687b ldr r3, [r7, #4]
- 8009e1a: 681b ldr r3, [r3, #0]
- 8009e1c: 681a ldr r2, [r3, #0]
- 8009e1e: 687b ldr r3, [r7, #4]
- 8009e20: 681b ldr r3, [r3, #0]
- 8009e22: f022 0204 bic.w r2, r2, #4
- 8009e26: 601a str r2, [r3, #0]
- }
- /* DMA peripheral state is not updated in Half Transfer */
- /* but in Transfer Complete case */
- if(hdma->XferHalfCpltCallback != NULL)
- 8009e28: 687b ldr r3, [r7, #4]
- 8009e2a: 6c1b ldr r3, [r3, #64] @ 0x40
- 8009e2c: 2b00 cmp r3, #0
- 8009e2e: f000 8165 beq.w 800a0fc <HAL_DMA_IRQHandler+0xe08>
- {
- /* Half transfer callback */
- hdma->XferHalfCpltCallback(hdma);
- 8009e32: 687b ldr r3, [r7, #4]
- 8009e34: 6c1b ldr r3, [r3, #64] @ 0x40
- 8009e36: 6878 ldr r0, [r7, #4]
- 8009e38: 4798 blx r3
- if((ccr_reg & BDMA_CCR_DBM) != 0U)
- 8009e3a: e15f b.n 800a0fc <HAL_DMA_IRQHandler+0xe08>
- }
- }
- }
- /* Transfer Complete Interrupt management ***********************************/
- else if (((tmpisr_bdma & (BDMA_FLAG_TC0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TCIE) != 0U))
- 8009e3c: 687b ldr r3, [r7, #4]
- 8009e3e: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8009e40: f003 031f and.w r3, r3, #31
- 8009e44: 2202 movs r2, #2
- 8009e46: 409a lsls r2, r3
- 8009e48: 697b ldr r3, [r7, #20]
- 8009e4a: 4013 ands r3, r2
- 8009e4c: 2b00 cmp r3, #0
- 8009e4e: f000 80c5 beq.w 8009fdc <HAL_DMA_IRQHandler+0xce8>
- 8009e52: 693b ldr r3, [r7, #16]
- 8009e54: f003 0302 and.w r3, r3, #2
- 8009e58: 2b00 cmp r3, #0
- 8009e5a: f000 80bf beq.w 8009fdc <HAL_DMA_IRQHandler+0xce8>
- {
- /* Clear the transfer complete flag */
- regs_bdma->IFCR = (BDMA_ISR_TCIF0) << (hdma->StreamIndex & 0x1FU);
- 8009e5e: 687b ldr r3, [r7, #4]
- 8009e60: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8009e62: f003 031f and.w r3, r3, #31
- 8009e66: 2202 movs r2, #2
- 8009e68: 409a lsls r2, r3
- 8009e6a: 69fb ldr r3, [r7, #28]
- 8009e6c: 605a str r2, [r3, #4]
- /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */
- if((ccr_reg & BDMA_CCR_DBM) != 0U)
- 8009e6e: 693b ldr r3, [r7, #16]
- 8009e70: f403 4300 and.w r3, r3, #32768 @ 0x8000
- 8009e74: 2b00 cmp r3, #0
- 8009e76: d018 beq.n 8009eaa <HAL_DMA_IRQHandler+0xbb6>
- {
- /* Current memory buffer used is Memory 0 */
- if((ccr_reg & BDMA_CCR_CT) == 0U)
- 8009e78: 693b ldr r3, [r7, #16]
- 8009e7a: f403 3380 and.w r3, r3, #65536 @ 0x10000
- 8009e7e: 2b00 cmp r3, #0
- 8009e80: d109 bne.n 8009e96 <HAL_DMA_IRQHandler+0xba2>
- {
- if(hdma->XferM1CpltCallback != NULL)
- 8009e82: 687b ldr r3, [r7, #4]
- 8009e84: 6c5b ldr r3, [r3, #68] @ 0x44
- 8009e86: 2b00 cmp r3, #0
- 8009e88: f000 813a beq.w 800a100 <HAL_DMA_IRQHandler+0xe0c>
- {
- /* Transfer complete Callback for Memory 1 */
- hdma->XferM1CpltCallback(hdma);
- 8009e8c: 687b ldr r3, [r7, #4]
- 8009e8e: 6c5b ldr r3, [r3, #68] @ 0x44
- 8009e90: 6878 ldr r0, [r7, #4]
- 8009e92: 4798 blx r3
- if((ccr_reg & BDMA_CCR_DBM) != 0U)
- 8009e94: e134 b.n 800a100 <HAL_DMA_IRQHandler+0xe0c>
- }
- }
- /* Current memory buffer used is Memory 1 */
- else
- {
- if(hdma->XferCpltCallback != NULL)
- 8009e96: 687b ldr r3, [r7, #4]
- 8009e98: 6bdb ldr r3, [r3, #60] @ 0x3c
- 8009e9a: 2b00 cmp r3, #0
- 8009e9c: f000 8130 beq.w 800a100 <HAL_DMA_IRQHandler+0xe0c>
- {
- /* Transfer complete Callback for Memory 0 */
- hdma->XferCpltCallback(hdma);
- 8009ea0: 687b ldr r3, [r7, #4]
- 8009ea2: 6bdb ldr r3, [r3, #60] @ 0x3c
- 8009ea4: 6878 ldr r0, [r7, #4]
- 8009ea6: 4798 blx r3
- if((ccr_reg & BDMA_CCR_DBM) != 0U)
- 8009ea8: e12a b.n 800a100 <HAL_DMA_IRQHandler+0xe0c>
- }
- }
- }
- else
- {
- if((ccr_reg & BDMA_CCR_CIRC) == 0U)
- 8009eaa: 693b ldr r3, [r7, #16]
- 8009eac: f003 0320 and.w r3, r3, #32
- 8009eb0: 2b00 cmp r3, #0
- 8009eb2: f040 8089 bne.w 8009fc8 <HAL_DMA_IRQHandler+0xcd4>
- {
- /* Disable the transfer complete and error interrupt, if the DMA mode is not CIRCULAR */
- __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
- 8009eb6: 687b ldr r3, [r7, #4]
- 8009eb8: 681b ldr r3, [r3, #0]
- 8009eba: 4a2b ldr r2, [pc, #172] @ (8009f68 <HAL_DMA_IRQHandler+0xc74>)
- 8009ebc: 4293 cmp r3, r2
- 8009ebe: d04a beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009ec0: 687b ldr r3, [r7, #4]
- 8009ec2: 681b ldr r3, [r3, #0]
- 8009ec4: 4a29 ldr r2, [pc, #164] @ (8009f6c <HAL_DMA_IRQHandler+0xc78>)
- 8009ec6: 4293 cmp r3, r2
- 8009ec8: d045 beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009eca: 687b ldr r3, [r7, #4]
- 8009ecc: 681b ldr r3, [r3, #0]
- 8009ece: 4a28 ldr r2, [pc, #160] @ (8009f70 <HAL_DMA_IRQHandler+0xc7c>)
- 8009ed0: 4293 cmp r3, r2
- 8009ed2: d040 beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009ed4: 687b ldr r3, [r7, #4]
- 8009ed6: 681b ldr r3, [r3, #0]
- 8009ed8: 4a26 ldr r2, [pc, #152] @ (8009f74 <HAL_DMA_IRQHandler+0xc80>)
- 8009eda: 4293 cmp r3, r2
- 8009edc: d03b beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009ede: 687b ldr r3, [r7, #4]
- 8009ee0: 681b ldr r3, [r3, #0]
- 8009ee2: 4a25 ldr r2, [pc, #148] @ (8009f78 <HAL_DMA_IRQHandler+0xc84>)
- 8009ee4: 4293 cmp r3, r2
- 8009ee6: d036 beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009ee8: 687b ldr r3, [r7, #4]
- 8009eea: 681b ldr r3, [r3, #0]
- 8009eec: 4a23 ldr r2, [pc, #140] @ (8009f7c <HAL_DMA_IRQHandler+0xc88>)
- 8009eee: 4293 cmp r3, r2
- 8009ef0: d031 beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009ef2: 687b ldr r3, [r7, #4]
- 8009ef4: 681b ldr r3, [r3, #0]
- 8009ef6: 4a22 ldr r2, [pc, #136] @ (8009f80 <HAL_DMA_IRQHandler+0xc8c>)
- 8009ef8: 4293 cmp r3, r2
- 8009efa: d02c beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009efc: 687b ldr r3, [r7, #4]
- 8009efe: 681b ldr r3, [r3, #0]
- 8009f00: 4a20 ldr r2, [pc, #128] @ (8009f84 <HAL_DMA_IRQHandler+0xc90>)
- 8009f02: 4293 cmp r3, r2
- 8009f04: d027 beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009f06: 687b ldr r3, [r7, #4]
- 8009f08: 681b ldr r3, [r3, #0]
- 8009f0a: 4a1f ldr r2, [pc, #124] @ (8009f88 <HAL_DMA_IRQHandler+0xc94>)
- 8009f0c: 4293 cmp r3, r2
- 8009f0e: d022 beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009f10: 687b ldr r3, [r7, #4]
- 8009f12: 681b ldr r3, [r3, #0]
- 8009f14: 4a1d ldr r2, [pc, #116] @ (8009f8c <HAL_DMA_IRQHandler+0xc98>)
- 8009f16: 4293 cmp r3, r2
- 8009f18: d01d beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009f1a: 687b ldr r3, [r7, #4]
- 8009f1c: 681b ldr r3, [r3, #0]
- 8009f1e: 4a1c ldr r2, [pc, #112] @ (8009f90 <HAL_DMA_IRQHandler+0xc9c>)
- 8009f20: 4293 cmp r3, r2
- 8009f22: d018 beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009f24: 687b ldr r3, [r7, #4]
- 8009f26: 681b ldr r3, [r3, #0]
- 8009f28: 4a1a ldr r2, [pc, #104] @ (8009f94 <HAL_DMA_IRQHandler+0xca0>)
- 8009f2a: 4293 cmp r3, r2
- 8009f2c: d013 beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009f2e: 687b ldr r3, [r7, #4]
- 8009f30: 681b ldr r3, [r3, #0]
- 8009f32: 4a19 ldr r2, [pc, #100] @ (8009f98 <HAL_DMA_IRQHandler+0xca4>)
- 8009f34: 4293 cmp r3, r2
- 8009f36: d00e beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009f38: 687b ldr r3, [r7, #4]
- 8009f3a: 681b ldr r3, [r3, #0]
- 8009f3c: 4a17 ldr r2, [pc, #92] @ (8009f9c <HAL_DMA_IRQHandler+0xca8>)
- 8009f3e: 4293 cmp r3, r2
- 8009f40: d009 beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009f42: 687b ldr r3, [r7, #4]
- 8009f44: 681b ldr r3, [r3, #0]
- 8009f46: 4a16 ldr r2, [pc, #88] @ (8009fa0 <HAL_DMA_IRQHandler+0xcac>)
- 8009f48: 4293 cmp r3, r2
- 8009f4a: d004 beq.n 8009f56 <HAL_DMA_IRQHandler+0xc62>
- 8009f4c: 687b ldr r3, [r7, #4]
- 8009f4e: 681b ldr r3, [r3, #0]
- 8009f50: 4a14 ldr r2, [pc, #80] @ (8009fa4 <HAL_DMA_IRQHandler+0xcb0>)
- 8009f52: 4293 cmp r3, r2
- 8009f54: d128 bne.n 8009fa8 <HAL_DMA_IRQHandler+0xcb4>
- 8009f56: 687b ldr r3, [r7, #4]
- 8009f58: 681b ldr r3, [r3, #0]
- 8009f5a: 681a ldr r2, [r3, #0]
- 8009f5c: 687b ldr r3, [r7, #4]
- 8009f5e: 681b ldr r3, [r3, #0]
- 8009f60: f022 0214 bic.w r2, r2, #20
- 8009f64: 601a str r2, [r3, #0]
- 8009f66: e027 b.n 8009fb8 <HAL_DMA_IRQHandler+0xcc4>
- 8009f68: 40020010 .word 0x40020010
- 8009f6c: 40020028 .word 0x40020028
- 8009f70: 40020040 .word 0x40020040
- 8009f74: 40020058 .word 0x40020058
- 8009f78: 40020070 .word 0x40020070
- 8009f7c: 40020088 .word 0x40020088
- 8009f80: 400200a0 .word 0x400200a0
- 8009f84: 400200b8 .word 0x400200b8
- 8009f88: 40020410 .word 0x40020410
- 8009f8c: 40020428 .word 0x40020428
- 8009f90: 40020440 .word 0x40020440
- 8009f94: 40020458 .word 0x40020458
- 8009f98: 40020470 .word 0x40020470
- 8009f9c: 40020488 .word 0x40020488
- 8009fa0: 400204a0 .word 0x400204a0
- 8009fa4: 400204b8 .word 0x400204b8
- 8009fa8: 687b ldr r3, [r7, #4]
- 8009faa: 681b ldr r3, [r3, #0]
- 8009fac: 681a ldr r2, [r3, #0]
- 8009fae: 687b ldr r3, [r7, #4]
- 8009fb0: 681b ldr r3, [r3, #0]
- 8009fb2: f022 020a bic.w r2, r2, #10
- 8009fb6: 601a str r2, [r3, #0]
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
- 8009fb8: 687b ldr r3, [r7, #4]
- 8009fba: 2201 movs r2, #1
- 8009fbc: f883 2035 strb.w r2, [r3, #53] @ 0x35
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- 8009fc0: 687b ldr r3, [r7, #4]
- 8009fc2: 2200 movs r2, #0
- 8009fc4: f883 2034 strb.w r2, [r3, #52] @ 0x34
- }
- if(hdma->XferCpltCallback != NULL)
- 8009fc8: 687b ldr r3, [r7, #4]
- 8009fca: 6bdb ldr r3, [r3, #60] @ 0x3c
- 8009fcc: 2b00 cmp r3, #0
- 8009fce: f000 8097 beq.w 800a100 <HAL_DMA_IRQHandler+0xe0c>
- {
- /* Transfer complete callback */
- hdma->XferCpltCallback(hdma);
- 8009fd2: 687b ldr r3, [r7, #4]
- 8009fd4: 6bdb ldr r3, [r3, #60] @ 0x3c
- 8009fd6: 6878 ldr r0, [r7, #4]
- 8009fd8: 4798 blx r3
- if((ccr_reg & BDMA_CCR_DBM) != 0U)
- 8009fda: e091 b.n 800a100 <HAL_DMA_IRQHandler+0xe0c>
- }
- }
- }
- /* Transfer Error Interrupt management **************************************/
- else if (((tmpisr_bdma & (BDMA_FLAG_TE0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TEIE) != 0U))
- 8009fdc: 687b ldr r3, [r7, #4]
- 8009fde: 6ddb ldr r3, [r3, #92] @ 0x5c
- 8009fe0: f003 031f and.w r3, r3, #31
- 8009fe4: 2208 movs r2, #8
- 8009fe6: 409a lsls r2, r3
- 8009fe8: 697b ldr r3, [r7, #20]
- 8009fea: 4013 ands r3, r2
- 8009fec: 2b00 cmp r3, #0
- 8009fee: f000 8088 beq.w 800a102 <HAL_DMA_IRQHandler+0xe0e>
- 8009ff2: 693b ldr r3, [r7, #16]
- 8009ff4: f003 0308 and.w r3, r3, #8
- 8009ff8: 2b00 cmp r3, #0
- 8009ffa: f000 8082 beq.w 800a102 <HAL_DMA_IRQHandler+0xe0e>
- {
- /* When a DMA transfer error occurs */
- /* A hardware clear of its EN bits is performed */
- /* Disable ALL DMA IT */
- __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
- 8009ffe: 687b ldr r3, [r7, #4]
- 800a000: 681b ldr r3, [r3, #0]
- 800a002: 4a41 ldr r2, [pc, #260] @ (800a108 <HAL_DMA_IRQHandler+0xe14>)
- 800a004: 4293 cmp r3, r2
- 800a006: d04a beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a008: 687b ldr r3, [r7, #4]
- 800a00a: 681b ldr r3, [r3, #0]
- 800a00c: 4a3f ldr r2, [pc, #252] @ (800a10c <HAL_DMA_IRQHandler+0xe18>)
- 800a00e: 4293 cmp r3, r2
- 800a010: d045 beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a012: 687b ldr r3, [r7, #4]
- 800a014: 681b ldr r3, [r3, #0]
- 800a016: 4a3e ldr r2, [pc, #248] @ (800a110 <HAL_DMA_IRQHandler+0xe1c>)
- 800a018: 4293 cmp r3, r2
- 800a01a: d040 beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a01c: 687b ldr r3, [r7, #4]
- 800a01e: 681b ldr r3, [r3, #0]
- 800a020: 4a3c ldr r2, [pc, #240] @ (800a114 <HAL_DMA_IRQHandler+0xe20>)
- 800a022: 4293 cmp r3, r2
- 800a024: d03b beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a026: 687b ldr r3, [r7, #4]
- 800a028: 681b ldr r3, [r3, #0]
- 800a02a: 4a3b ldr r2, [pc, #236] @ (800a118 <HAL_DMA_IRQHandler+0xe24>)
- 800a02c: 4293 cmp r3, r2
- 800a02e: d036 beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a030: 687b ldr r3, [r7, #4]
- 800a032: 681b ldr r3, [r3, #0]
- 800a034: 4a39 ldr r2, [pc, #228] @ (800a11c <HAL_DMA_IRQHandler+0xe28>)
- 800a036: 4293 cmp r3, r2
- 800a038: d031 beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a03a: 687b ldr r3, [r7, #4]
- 800a03c: 681b ldr r3, [r3, #0]
- 800a03e: 4a38 ldr r2, [pc, #224] @ (800a120 <HAL_DMA_IRQHandler+0xe2c>)
- 800a040: 4293 cmp r3, r2
- 800a042: d02c beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a044: 687b ldr r3, [r7, #4]
- 800a046: 681b ldr r3, [r3, #0]
- 800a048: 4a36 ldr r2, [pc, #216] @ (800a124 <HAL_DMA_IRQHandler+0xe30>)
- 800a04a: 4293 cmp r3, r2
- 800a04c: d027 beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a04e: 687b ldr r3, [r7, #4]
- 800a050: 681b ldr r3, [r3, #0]
- 800a052: 4a35 ldr r2, [pc, #212] @ (800a128 <HAL_DMA_IRQHandler+0xe34>)
- 800a054: 4293 cmp r3, r2
- 800a056: d022 beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a058: 687b ldr r3, [r7, #4]
- 800a05a: 681b ldr r3, [r3, #0]
- 800a05c: 4a33 ldr r2, [pc, #204] @ (800a12c <HAL_DMA_IRQHandler+0xe38>)
- 800a05e: 4293 cmp r3, r2
- 800a060: d01d beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a062: 687b ldr r3, [r7, #4]
- 800a064: 681b ldr r3, [r3, #0]
- 800a066: 4a32 ldr r2, [pc, #200] @ (800a130 <HAL_DMA_IRQHandler+0xe3c>)
- 800a068: 4293 cmp r3, r2
- 800a06a: d018 beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a06c: 687b ldr r3, [r7, #4]
- 800a06e: 681b ldr r3, [r3, #0]
- 800a070: 4a30 ldr r2, [pc, #192] @ (800a134 <HAL_DMA_IRQHandler+0xe40>)
- 800a072: 4293 cmp r3, r2
- 800a074: d013 beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a076: 687b ldr r3, [r7, #4]
- 800a078: 681b ldr r3, [r3, #0]
- 800a07a: 4a2f ldr r2, [pc, #188] @ (800a138 <HAL_DMA_IRQHandler+0xe44>)
- 800a07c: 4293 cmp r3, r2
- 800a07e: d00e beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a080: 687b ldr r3, [r7, #4]
- 800a082: 681b ldr r3, [r3, #0]
- 800a084: 4a2d ldr r2, [pc, #180] @ (800a13c <HAL_DMA_IRQHandler+0xe48>)
- 800a086: 4293 cmp r3, r2
- 800a088: d009 beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a08a: 687b ldr r3, [r7, #4]
- 800a08c: 681b ldr r3, [r3, #0]
- 800a08e: 4a2c ldr r2, [pc, #176] @ (800a140 <HAL_DMA_IRQHandler+0xe4c>)
- 800a090: 4293 cmp r3, r2
- 800a092: d004 beq.n 800a09e <HAL_DMA_IRQHandler+0xdaa>
- 800a094: 687b ldr r3, [r7, #4]
- 800a096: 681b ldr r3, [r3, #0]
- 800a098: 4a2a ldr r2, [pc, #168] @ (800a144 <HAL_DMA_IRQHandler+0xe50>)
- 800a09a: 4293 cmp r3, r2
- 800a09c: d108 bne.n 800a0b0 <HAL_DMA_IRQHandler+0xdbc>
- 800a09e: 687b ldr r3, [r7, #4]
- 800a0a0: 681b ldr r3, [r3, #0]
- 800a0a2: 681a ldr r2, [r3, #0]
- 800a0a4: 687b ldr r3, [r7, #4]
- 800a0a6: 681b ldr r3, [r3, #0]
- 800a0a8: f022 021c bic.w r2, r2, #28
- 800a0ac: 601a str r2, [r3, #0]
- 800a0ae: e007 b.n 800a0c0 <HAL_DMA_IRQHandler+0xdcc>
- 800a0b0: 687b ldr r3, [r7, #4]
- 800a0b2: 681b ldr r3, [r3, #0]
- 800a0b4: 681a ldr r2, [r3, #0]
- 800a0b6: 687b ldr r3, [r7, #4]
- 800a0b8: 681b ldr r3, [r3, #0]
- 800a0ba: f022 020e bic.w r2, r2, #14
- 800a0be: 601a str r2, [r3, #0]
- /* Clear all flags */
- regs_bdma->IFCR = (BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU);
- 800a0c0: 687b ldr r3, [r7, #4]
- 800a0c2: 6ddb ldr r3, [r3, #92] @ 0x5c
- 800a0c4: f003 031f and.w r3, r3, #31
- 800a0c8: 2201 movs r2, #1
- 800a0ca: 409a lsls r2, r3
- 800a0cc: 69fb ldr r3, [r7, #28]
- 800a0ce: 605a str r2, [r3, #4]
- /* Update error code */
- hdma->ErrorCode = HAL_DMA_ERROR_TE;
- 800a0d0: 687b ldr r3, [r7, #4]
- 800a0d2: 2201 movs r2, #1
- 800a0d4: 655a str r2, [r3, #84] @ 0x54
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
- 800a0d6: 687b ldr r3, [r7, #4]
- 800a0d8: 2201 movs r2, #1
- 800a0da: f883 2035 strb.w r2, [r3, #53] @ 0x35
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- 800a0de: 687b ldr r3, [r7, #4]
- 800a0e0: 2200 movs r2, #0
- 800a0e2: f883 2034 strb.w r2, [r3, #52] @ 0x34
- if (hdma->XferErrorCallback != NULL)
- 800a0e6: 687b ldr r3, [r7, #4]
- 800a0e8: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800a0ea: 2b00 cmp r3, #0
- 800a0ec: d009 beq.n 800a102 <HAL_DMA_IRQHandler+0xe0e>
- {
- /* Transfer error callback */
- hdma->XferErrorCallback(hdma);
- 800a0ee: 687b ldr r3, [r7, #4]
- 800a0f0: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800a0f2: 6878 ldr r0, [r7, #4]
- 800a0f4: 4798 blx r3
- 800a0f6: e004 b.n 800a102 <HAL_DMA_IRQHandler+0xe0e>
- return;
- 800a0f8: bf00 nop
- 800a0fa: e002 b.n 800a102 <HAL_DMA_IRQHandler+0xe0e>
- if((ccr_reg & BDMA_CCR_DBM) != 0U)
- 800a0fc: bf00 nop
- 800a0fe: e000 b.n 800a102 <HAL_DMA_IRQHandler+0xe0e>
- if((ccr_reg & BDMA_CCR_DBM) != 0U)
- 800a100: bf00 nop
- }
- else
- {
- /* Nothing To Do */
- }
- }
- 800a102: 3728 adds r7, #40 @ 0x28
- 800a104: 46bd mov sp, r7
- 800a106: bd80 pop {r7, pc}
- 800a108: 40020010 .word 0x40020010
- 800a10c: 40020028 .word 0x40020028
- 800a110: 40020040 .word 0x40020040
- 800a114: 40020058 .word 0x40020058
- 800a118: 40020070 .word 0x40020070
- 800a11c: 40020088 .word 0x40020088
- 800a120: 400200a0 .word 0x400200a0
- 800a124: 400200b8 .word 0x400200b8
- 800a128: 40020410 .word 0x40020410
- 800a12c: 40020428 .word 0x40020428
- 800a130: 40020440 .word 0x40020440
- 800a134: 40020458 .word 0x40020458
- 800a138: 40020470 .word 0x40020470
- 800a13c: 40020488 .word 0x40020488
- 800a140: 400204a0 .word 0x400204a0
- 800a144: 400204b8 .word 0x400204b8
- 0800a148 <DMA_SetConfig>:
- * @param DstAddress: The destination memory Buffer address
- * @param DataLength: The length of data to be transferred from source to destination
- * @retval None
- */
- static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
- {
- 800a148: b480 push {r7}
- 800a14a: b087 sub sp, #28
- 800a14c: af00 add r7, sp, #0
- 800a14e: 60f8 str r0, [r7, #12]
- 800a150: 60b9 str r1, [r7, #8]
- 800a152: 607a str r2, [r7, #4]
- 800a154: 603b str r3, [r7, #0]
- /* calculate DMA base and stream number */
- DMA_Base_Registers *regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress;
- 800a156: 68fb ldr r3, [r7, #12]
- 800a158: 6d9b ldr r3, [r3, #88] @ 0x58
- 800a15a: 617b str r3, [r7, #20]
- BDMA_Base_Registers *regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
- 800a15c: 68fb ldr r3, [r7, #12]
- 800a15e: 6d9b ldr r3, [r3, #88] @ 0x58
- 800a160: 613b str r3, [r7, #16]
- if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
- 800a162: 68fb ldr r3, [r7, #12]
- 800a164: 681b ldr r3, [r3, #0]
- 800a166: 4a7f ldr r2, [pc, #508] @ (800a364 <DMA_SetConfig+0x21c>)
- 800a168: 4293 cmp r3, r2
- 800a16a: d072 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a16c: 68fb ldr r3, [r7, #12]
- 800a16e: 681b ldr r3, [r3, #0]
- 800a170: 4a7d ldr r2, [pc, #500] @ (800a368 <DMA_SetConfig+0x220>)
- 800a172: 4293 cmp r3, r2
- 800a174: d06d beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a176: 68fb ldr r3, [r7, #12]
- 800a178: 681b ldr r3, [r3, #0]
- 800a17a: 4a7c ldr r2, [pc, #496] @ (800a36c <DMA_SetConfig+0x224>)
- 800a17c: 4293 cmp r3, r2
- 800a17e: d068 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a180: 68fb ldr r3, [r7, #12]
- 800a182: 681b ldr r3, [r3, #0]
- 800a184: 4a7a ldr r2, [pc, #488] @ (800a370 <DMA_SetConfig+0x228>)
- 800a186: 4293 cmp r3, r2
- 800a188: d063 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a18a: 68fb ldr r3, [r7, #12]
- 800a18c: 681b ldr r3, [r3, #0]
- 800a18e: 4a79 ldr r2, [pc, #484] @ (800a374 <DMA_SetConfig+0x22c>)
- 800a190: 4293 cmp r3, r2
- 800a192: d05e beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a194: 68fb ldr r3, [r7, #12]
- 800a196: 681b ldr r3, [r3, #0]
- 800a198: 4a77 ldr r2, [pc, #476] @ (800a378 <DMA_SetConfig+0x230>)
- 800a19a: 4293 cmp r3, r2
- 800a19c: d059 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a19e: 68fb ldr r3, [r7, #12]
- 800a1a0: 681b ldr r3, [r3, #0]
- 800a1a2: 4a76 ldr r2, [pc, #472] @ (800a37c <DMA_SetConfig+0x234>)
- 800a1a4: 4293 cmp r3, r2
- 800a1a6: d054 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a1a8: 68fb ldr r3, [r7, #12]
- 800a1aa: 681b ldr r3, [r3, #0]
- 800a1ac: 4a74 ldr r2, [pc, #464] @ (800a380 <DMA_SetConfig+0x238>)
- 800a1ae: 4293 cmp r3, r2
- 800a1b0: d04f beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a1b2: 68fb ldr r3, [r7, #12]
- 800a1b4: 681b ldr r3, [r3, #0]
- 800a1b6: 4a73 ldr r2, [pc, #460] @ (800a384 <DMA_SetConfig+0x23c>)
- 800a1b8: 4293 cmp r3, r2
- 800a1ba: d04a beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a1bc: 68fb ldr r3, [r7, #12]
- 800a1be: 681b ldr r3, [r3, #0]
- 800a1c0: 4a71 ldr r2, [pc, #452] @ (800a388 <DMA_SetConfig+0x240>)
- 800a1c2: 4293 cmp r3, r2
- 800a1c4: d045 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a1c6: 68fb ldr r3, [r7, #12]
- 800a1c8: 681b ldr r3, [r3, #0]
- 800a1ca: 4a70 ldr r2, [pc, #448] @ (800a38c <DMA_SetConfig+0x244>)
- 800a1cc: 4293 cmp r3, r2
- 800a1ce: d040 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a1d0: 68fb ldr r3, [r7, #12]
- 800a1d2: 681b ldr r3, [r3, #0]
- 800a1d4: 4a6e ldr r2, [pc, #440] @ (800a390 <DMA_SetConfig+0x248>)
- 800a1d6: 4293 cmp r3, r2
- 800a1d8: d03b beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a1da: 68fb ldr r3, [r7, #12]
- 800a1dc: 681b ldr r3, [r3, #0]
- 800a1de: 4a6d ldr r2, [pc, #436] @ (800a394 <DMA_SetConfig+0x24c>)
- 800a1e0: 4293 cmp r3, r2
- 800a1e2: d036 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a1e4: 68fb ldr r3, [r7, #12]
- 800a1e6: 681b ldr r3, [r3, #0]
- 800a1e8: 4a6b ldr r2, [pc, #428] @ (800a398 <DMA_SetConfig+0x250>)
- 800a1ea: 4293 cmp r3, r2
- 800a1ec: d031 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a1ee: 68fb ldr r3, [r7, #12]
- 800a1f0: 681b ldr r3, [r3, #0]
- 800a1f2: 4a6a ldr r2, [pc, #424] @ (800a39c <DMA_SetConfig+0x254>)
- 800a1f4: 4293 cmp r3, r2
- 800a1f6: d02c beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a1f8: 68fb ldr r3, [r7, #12]
- 800a1fa: 681b ldr r3, [r3, #0]
- 800a1fc: 4a68 ldr r2, [pc, #416] @ (800a3a0 <DMA_SetConfig+0x258>)
- 800a1fe: 4293 cmp r3, r2
- 800a200: d027 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a202: 68fb ldr r3, [r7, #12]
- 800a204: 681b ldr r3, [r3, #0]
- 800a206: 4a67 ldr r2, [pc, #412] @ (800a3a4 <DMA_SetConfig+0x25c>)
- 800a208: 4293 cmp r3, r2
- 800a20a: d022 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a20c: 68fb ldr r3, [r7, #12]
- 800a20e: 681b ldr r3, [r3, #0]
- 800a210: 4a65 ldr r2, [pc, #404] @ (800a3a8 <DMA_SetConfig+0x260>)
- 800a212: 4293 cmp r3, r2
- 800a214: d01d beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a216: 68fb ldr r3, [r7, #12]
- 800a218: 681b ldr r3, [r3, #0]
- 800a21a: 4a64 ldr r2, [pc, #400] @ (800a3ac <DMA_SetConfig+0x264>)
- 800a21c: 4293 cmp r3, r2
- 800a21e: d018 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a220: 68fb ldr r3, [r7, #12]
- 800a222: 681b ldr r3, [r3, #0]
- 800a224: 4a62 ldr r2, [pc, #392] @ (800a3b0 <DMA_SetConfig+0x268>)
- 800a226: 4293 cmp r3, r2
- 800a228: d013 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a22a: 68fb ldr r3, [r7, #12]
- 800a22c: 681b ldr r3, [r3, #0]
- 800a22e: 4a61 ldr r2, [pc, #388] @ (800a3b4 <DMA_SetConfig+0x26c>)
- 800a230: 4293 cmp r3, r2
- 800a232: d00e beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a234: 68fb ldr r3, [r7, #12]
- 800a236: 681b ldr r3, [r3, #0]
- 800a238: 4a5f ldr r2, [pc, #380] @ (800a3b8 <DMA_SetConfig+0x270>)
- 800a23a: 4293 cmp r3, r2
- 800a23c: d009 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a23e: 68fb ldr r3, [r7, #12]
- 800a240: 681b ldr r3, [r3, #0]
- 800a242: 4a5e ldr r2, [pc, #376] @ (800a3bc <DMA_SetConfig+0x274>)
- 800a244: 4293 cmp r3, r2
- 800a246: d004 beq.n 800a252 <DMA_SetConfig+0x10a>
- 800a248: 68fb ldr r3, [r7, #12]
- 800a24a: 681b ldr r3, [r3, #0]
- 800a24c: 4a5c ldr r2, [pc, #368] @ (800a3c0 <DMA_SetConfig+0x278>)
- 800a24e: 4293 cmp r3, r2
- 800a250: d101 bne.n 800a256 <DMA_SetConfig+0x10e>
- 800a252: 2301 movs r3, #1
- 800a254: e000 b.n 800a258 <DMA_SetConfig+0x110>
- 800a256: 2300 movs r3, #0
- 800a258: 2b00 cmp r3, #0
- 800a25a: d00d beq.n 800a278 <DMA_SetConfig+0x130>
- {
- /* Clear the DMAMUX synchro overrun flag */
- hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
- 800a25c: 68fb ldr r3, [r7, #12]
- 800a25e: 6e5b ldr r3, [r3, #100] @ 0x64
- 800a260: 68fa ldr r2, [r7, #12]
- 800a262: 6e92 ldr r2, [r2, #104] @ 0x68
- 800a264: 605a str r2, [r3, #4]
- if(hdma->DMAmuxRequestGen != 0U)
- 800a266: 68fb ldr r3, [r7, #12]
- 800a268: 6edb ldr r3, [r3, #108] @ 0x6c
- 800a26a: 2b00 cmp r3, #0
- 800a26c: d004 beq.n 800a278 <DMA_SetConfig+0x130>
- {
- /* Clear the DMAMUX request generator overrun flag */
- hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
- 800a26e: 68fb ldr r3, [r7, #12]
- 800a270: 6f1b ldr r3, [r3, #112] @ 0x70
- 800a272: 68fa ldr r2, [r7, #12]
- 800a274: 6f52 ldr r2, [r2, #116] @ 0x74
- 800a276: 605a str r2, [r3, #4]
- }
- }
- if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
- 800a278: 68fb ldr r3, [r7, #12]
- 800a27a: 681b ldr r3, [r3, #0]
- 800a27c: 4a39 ldr r2, [pc, #228] @ (800a364 <DMA_SetConfig+0x21c>)
- 800a27e: 4293 cmp r3, r2
- 800a280: d04a beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a282: 68fb ldr r3, [r7, #12]
- 800a284: 681b ldr r3, [r3, #0]
- 800a286: 4a38 ldr r2, [pc, #224] @ (800a368 <DMA_SetConfig+0x220>)
- 800a288: 4293 cmp r3, r2
- 800a28a: d045 beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a28c: 68fb ldr r3, [r7, #12]
- 800a28e: 681b ldr r3, [r3, #0]
- 800a290: 4a36 ldr r2, [pc, #216] @ (800a36c <DMA_SetConfig+0x224>)
- 800a292: 4293 cmp r3, r2
- 800a294: d040 beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a296: 68fb ldr r3, [r7, #12]
- 800a298: 681b ldr r3, [r3, #0]
- 800a29a: 4a35 ldr r2, [pc, #212] @ (800a370 <DMA_SetConfig+0x228>)
- 800a29c: 4293 cmp r3, r2
- 800a29e: d03b beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a2a0: 68fb ldr r3, [r7, #12]
- 800a2a2: 681b ldr r3, [r3, #0]
- 800a2a4: 4a33 ldr r2, [pc, #204] @ (800a374 <DMA_SetConfig+0x22c>)
- 800a2a6: 4293 cmp r3, r2
- 800a2a8: d036 beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a2aa: 68fb ldr r3, [r7, #12]
- 800a2ac: 681b ldr r3, [r3, #0]
- 800a2ae: 4a32 ldr r2, [pc, #200] @ (800a378 <DMA_SetConfig+0x230>)
- 800a2b0: 4293 cmp r3, r2
- 800a2b2: d031 beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a2b4: 68fb ldr r3, [r7, #12]
- 800a2b6: 681b ldr r3, [r3, #0]
- 800a2b8: 4a30 ldr r2, [pc, #192] @ (800a37c <DMA_SetConfig+0x234>)
- 800a2ba: 4293 cmp r3, r2
- 800a2bc: d02c beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a2be: 68fb ldr r3, [r7, #12]
- 800a2c0: 681b ldr r3, [r3, #0]
- 800a2c2: 4a2f ldr r2, [pc, #188] @ (800a380 <DMA_SetConfig+0x238>)
- 800a2c4: 4293 cmp r3, r2
- 800a2c6: d027 beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a2c8: 68fb ldr r3, [r7, #12]
- 800a2ca: 681b ldr r3, [r3, #0]
- 800a2cc: 4a2d ldr r2, [pc, #180] @ (800a384 <DMA_SetConfig+0x23c>)
- 800a2ce: 4293 cmp r3, r2
- 800a2d0: d022 beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a2d2: 68fb ldr r3, [r7, #12]
- 800a2d4: 681b ldr r3, [r3, #0]
- 800a2d6: 4a2c ldr r2, [pc, #176] @ (800a388 <DMA_SetConfig+0x240>)
- 800a2d8: 4293 cmp r3, r2
- 800a2da: d01d beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a2dc: 68fb ldr r3, [r7, #12]
- 800a2de: 681b ldr r3, [r3, #0]
- 800a2e0: 4a2a ldr r2, [pc, #168] @ (800a38c <DMA_SetConfig+0x244>)
- 800a2e2: 4293 cmp r3, r2
- 800a2e4: d018 beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a2e6: 68fb ldr r3, [r7, #12]
- 800a2e8: 681b ldr r3, [r3, #0]
- 800a2ea: 4a29 ldr r2, [pc, #164] @ (800a390 <DMA_SetConfig+0x248>)
- 800a2ec: 4293 cmp r3, r2
- 800a2ee: d013 beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a2f0: 68fb ldr r3, [r7, #12]
- 800a2f2: 681b ldr r3, [r3, #0]
- 800a2f4: 4a27 ldr r2, [pc, #156] @ (800a394 <DMA_SetConfig+0x24c>)
- 800a2f6: 4293 cmp r3, r2
- 800a2f8: d00e beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a2fa: 68fb ldr r3, [r7, #12]
- 800a2fc: 681b ldr r3, [r3, #0]
- 800a2fe: 4a26 ldr r2, [pc, #152] @ (800a398 <DMA_SetConfig+0x250>)
- 800a300: 4293 cmp r3, r2
- 800a302: d009 beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a304: 68fb ldr r3, [r7, #12]
- 800a306: 681b ldr r3, [r3, #0]
- 800a308: 4a24 ldr r2, [pc, #144] @ (800a39c <DMA_SetConfig+0x254>)
- 800a30a: 4293 cmp r3, r2
- 800a30c: d004 beq.n 800a318 <DMA_SetConfig+0x1d0>
- 800a30e: 68fb ldr r3, [r7, #12]
- 800a310: 681b ldr r3, [r3, #0]
- 800a312: 4a23 ldr r2, [pc, #140] @ (800a3a0 <DMA_SetConfig+0x258>)
- 800a314: 4293 cmp r3, r2
- 800a316: d101 bne.n 800a31c <DMA_SetConfig+0x1d4>
- 800a318: 2301 movs r3, #1
- 800a31a: e000 b.n 800a31e <DMA_SetConfig+0x1d6>
- 800a31c: 2300 movs r3, #0
- 800a31e: 2b00 cmp r3, #0
- 800a320: d059 beq.n 800a3d6 <DMA_SetConfig+0x28e>
- {
- /* Clear all interrupt flags at correct offset within the register */
- regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
- 800a322: 68fb ldr r3, [r7, #12]
- 800a324: 6ddb ldr r3, [r3, #92] @ 0x5c
- 800a326: f003 031f and.w r3, r3, #31
- 800a32a: 223f movs r2, #63 @ 0x3f
- 800a32c: 409a lsls r2, r3
- 800a32e: 697b ldr r3, [r7, #20]
- 800a330: 609a str r2, [r3, #8]
- /* Clear DBM bit */
- ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= (uint32_t)(~DMA_SxCR_DBM);
- 800a332: 68fb ldr r3, [r7, #12]
- 800a334: 681b ldr r3, [r3, #0]
- 800a336: 681a ldr r2, [r3, #0]
- 800a338: 68fb ldr r3, [r7, #12]
- 800a33a: 681b ldr r3, [r3, #0]
- 800a33c: f422 2280 bic.w r2, r2, #262144 @ 0x40000
- 800a340: 601a str r2, [r3, #0]
- /* Configure DMA Stream data length */
- ((DMA_Stream_TypeDef *)hdma->Instance)->NDTR = DataLength;
- 800a342: 68fb ldr r3, [r7, #12]
- 800a344: 681b ldr r3, [r3, #0]
- 800a346: 683a ldr r2, [r7, #0]
- 800a348: 605a str r2, [r3, #4]
- /* Peripheral to Memory */
- if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
- 800a34a: 68fb ldr r3, [r7, #12]
- 800a34c: 689b ldr r3, [r3, #8]
- 800a34e: 2b40 cmp r3, #64 @ 0x40
- 800a350: d138 bne.n 800a3c4 <DMA_SetConfig+0x27c>
- {
- /* Configure DMA Stream destination address */
- ((DMA_Stream_TypeDef *)hdma->Instance)->PAR = DstAddress;
- 800a352: 68fb ldr r3, [r7, #12]
- 800a354: 681b ldr r3, [r3, #0]
- 800a356: 687a ldr r2, [r7, #4]
- 800a358: 609a str r2, [r3, #8]
- /* Configure DMA Stream source address */
- ((DMA_Stream_TypeDef *)hdma->Instance)->M0AR = SrcAddress;
- 800a35a: 68fb ldr r3, [r7, #12]
- 800a35c: 681b ldr r3, [r3, #0]
- 800a35e: 68ba ldr r2, [r7, #8]
- 800a360: 60da str r2, [r3, #12]
- }
- else
- {
- /* Nothing To Do */
- }
- }
- 800a362: e086 b.n 800a472 <DMA_SetConfig+0x32a>
- 800a364: 40020010 .word 0x40020010
- 800a368: 40020028 .word 0x40020028
- 800a36c: 40020040 .word 0x40020040
- 800a370: 40020058 .word 0x40020058
- 800a374: 40020070 .word 0x40020070
- 800a378: 40020088 .word 0x40020088
- 800a37c: 400200a0 .word 0x400200a0
- 800a380: 400200b8 .word 0x400200b8
- 800a384: 40020410 .word 0x40020410
- 800a388: 40020428 .word 0x40020428
- 800a38c: 40020440 .word 0x40020440
- 800a390: 40020458 .word 0x40020458
- 800a394: 40020470 .word 0x40020470
- 800a398: 40020488 .word 0x40020488
- 800a39c: 400204a0 .word 0x400204a0
- 800a3a0: 400204b8 .word 0x400204b8
- 800a3a4: 58025408 .word 0x58025408
- 800a3a8: 5802541c .word 0x5802541c
- 800a3ac: 58025430 .word 0x58025430
- 800a3b0: 58025444 .word 0x58025444
- 800a3b4: 58025458 .word 0x58025458
- 800a3b8: 5802546c .word 0x5802546c
- 800a3bc: 58025480 .word 0x58025480
- 800a3c0: 58025494 .word 0x58025494
- ((DMA_Stream_TypeDef *)hdma->Instance)->PAR = SrcAddress;
- 800a3c4: 68fb ldr r3, [r7, #12]
- 800a3c6: 681b ldr r3, [r3, #0]
- 800a3c8: 68ba ldr r2, [r7, #8]
- 800a3ca: 609a str r2, [r3, #8]
- ((DMA_Stream_TypeDef *)hdma->Instance)->M0AR = DstAddress;
- 800a3cc: 68fb ldr r3, [r7, #12]
- 800a3ce: 681b ldr r3, [r3, #0]
- 800a3d0: 687a ldr r2, [r7, #4]
- 800a3d2: 60da str r2, [r3, #12]
- }
- 800a3d4: e04d b.n 800a472 <DMA_SetConfig+0x32a>
- else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */
- 800a3d6: 68fb ldr r3, [r7, #12]
- 800a3d8: 681b ldr r3, [r3, #0]
- 800a3da: 4a29 ldr r2, [pc, #164] @ (800a480 <DMA_SetConfig+0x338>)
- 800a3dc: 4293 cmp r3, r2
- 800a3de: d022 beq.n 800a426 <DMA_SetConfig+0x2de>
- 800a3e0: 68fb ldr r3, [r7, #12]
- 800a3e2: 681b ldr r3, [r3, #0]
- 800a3e4: 4a27 ldr r2, [pc, #156] @ (800a484 <DMA_SetConfig+0x33c>)
- 800a3e6: 4293 cmp r3, r2
- 800a3e8: d01d beq.n 800a426 <DMA_SetConfig+0x2de>
- 800a3ea: 68fb ldr r3, [r7, #12]
- 800a3ec: 681b ldr r3, [r3, #0]
- 800a3ee: 4a26 ldr r2, [pc, #152] @ (800a488 <DMA_SetConfig+0x340>)
- 800a3f0: 4293 cmp r3, r2
- 800a3f2: d018 beq.n 800a426 <DMA_SetConfig+0x2de>
- 800a3f4: 68fb ldr r3, [r7, #12]
- 800a3f6: 681b ldr r3, [r3, #0]
- 800a3f8: 4a24 ldr r2, [pc, #144] @ (800a48c <DMA_SetConfig+0x344>)
- 800a3fa: 4293 cmp r3, r2
- 800a3fc: d013 beq.n 800a426 <DMA_SetConfig+0x2de>
- 800a3fe: 68fb ldr r3, [r7, #12]
- 800a400: 681b ldr r3, [r3, #0]
- 800a402: 4a23 ldr r2, [pc, #140] @ (800a490 <DMA_SetConfig+0x348>)
- 800a404: 4293 cmp r3, r2
- 800a406: d00e beq.n 800a426 <DMA_SetConfig+0x2de>
- 800a408: 68fb ldr r3, [r7, #12]
- 800a40a: 681b ldr r3, [r3, #0]
- 800a40c: 4a21 ldr r2, [pc, #132] @ (800a494 <DMA_SetConfig+0x34c>)
- 800a40e: 4293 cmp r3, r2
- 800a410: d009 beq.n 800a426 <DMA_SetConfig+0x2de>
- 800a412: 68fb ldr r3, [r7, #12]
- 800a414: 681b ldr r3, [r3, #0]
- 800a416: 4a20 ldr r2, [pc, #128] @ (800a498 <DMA_SetConfig+0x350>)
- 800a418: 4293 cmp r3, r2
- 800a41a: d004 beq.n 800a426 <DMA_SetConfig+0x2de>
- 800a41c: 68fb ldr r3, [r7, #12]
- 800a41e: 681b ldr r3, [r3, #0]
- 800a420: 4a1e ldr r2, [pc, #120] @ (800a49c <DMA_SetConfig+0x354>)
- 800a422: 4293 cmp r3, r2
- 800a424: d101 bne.n 800a42a <DMA_SetConfig+0x2e2>
- 800a426: 2301 movs r3, #1
- 800a428: e000 b.n 800a42c <DMA_SetConfig+0x2e4>
- 800a42a: 2300 movs r3, #0
- 800a42c: 2b00 cmp r3, #0
- 800a42e: d020 beq.n 800a472 <DMA_SetConfig+0x32a>
- regs_bdma->IFCR = (BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU);
- 800a430: 68fb ldr r3, [r7, #12]
- 800a432: 6ddb ldr r3, [r3, #92] @ 0x5c
- 800a434: f003 031f and.w r3, r3, #31
- 800a438: 2201 movs r2, #1
- 800a43a: 409a lsls r2, r3
- 800a43c: 693b ldr r3, [r7, #16]
- 800a43e: 605a str r2, [r3, #4]
- ((BDMA_Channel_TypeDef *)hdma->Instance)->CNDTR = DataLength;
- 800a440: 68fb ldr r3, [r7, #12]
- 800a442: 681b ldr r3, [r3, #0]
- 800a444: 683a ldr r2, [r7, #0]
- 800a446: 605a str r2, [r3, #4]
- if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
- 800a448: 68fb ldr r3, [r7, #12]
- 800a44a: 689b ldr r3, [r3, #8]
- 800a44c: 2b40 cmp r3, #64 @ 0x40
- 800a44e: d108 bne.n 800a462 <DMA_SetConfig+0x31a>
- ((BDMA_Channel_TypeDef *)hdma->Instance)->CPAR = DstAddress;
- 800a450: 68fb ldr r3, [r7, #12]
- 800a452: 681b ldr r3, [r3, #0]
- 800a454: 687a ldr r2, [r7, #4]
- 800a456: 609a str r2, [r3, #8]
- ((BDMA_Channel_TypeDef *)hdma->Instance)->CM0AR = SrcAddress;
- 800a458: 68fb ldr r3, [r7, #12]
- 800a45a: 681b ldr r3, [r3, #0]
- 800a45c: 68ba ldr r2, [r7, #8]
- 800a45e: 60da str r2, [r3, #12]
- }
- 800a460: e007 b.n 800a472 <DMA_SetConfig+0x32a>
- ((BDMA_Channel_TypeDef *)hdma->Instance)->CPAR = SrcAddress;
- 800a462: 68fb ldr r3, [r7, #12]
- 800a464: 681b ldr r3, [r3, #0]
- 800a466: 68ba ldr r2, [r7, #8]
- 800a468: 609a str r2, [r3, #8]
- ((BDMA_Channel_TypeDef *)hdma->Instance)->CM0AR = DstAddress;
- 800a46a: 68fb ldr r3, [r7, #12]
- 800a46c: 681b ldr r3, [r3, #0]
- 800a46e: 687a ldr r2, [r7, #4]
- 800a470: 60da str r2, [r3, #12]
- }
- 800a472: bf00 nop
- 800a474: 371c adds r7, #28
- 800a476: 46bd mov sp, r7
- 800a478: f85d 7b04 ldr.w r7, [sp], #4
- 800a47c: 4770 bx lr
- 800a47e: bf00 nop
- 800a480: 58025408 .word 0x58025408
- 800a484: 5802541c .word 0x5802541c
- 800a488: 58025430 .word 0x58025430
- 800a48c: 58025444 .word 0x58025444
- 800a490: 58025458 .word 0x58025458
- 800a494: 5802546c .word 0x5802546c
- 800a498: 58025480 .word 0x58025480
- 800a49c: 58025494 .word 0x58025494
- 0800a4a0 <DMA_CalcBaseAndBitshift>:
- * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval Stream base address
- */
- static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
- {
- 800a4a0: b480 push {r7}
- 800a4a2: b085 sub sp, #20
- 800a4a4: af00 add r7, sp, #0
- 800a4a6: 6078 str r0, [r7, #4]
- if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
- 800a4a8: 687b ldr r3, [r7, #4]
- 800a4aa: 681b ldr r3, [r3, #0]
- 800a4ac: 4a42 ldr r2, [pc, #264] @ (800a5b8 <DMA_CalcBaseAndBitshift+0x118>)
- 800a4ae: 4293 cmp r3, r2
- 800a4b0: d04a beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a4b2: 687b ldr r3, [r7, #4]
- 800a4b4: 681b ldr r3, [r3, #0]
- 800a4b6: 4a41 ldr r2, [pc, #260] @ (800a5bc <DMA_CalcBaseAndBitshift+0x11c>)
- 800a4b8: 4293 cmp r3, r2
- 800a4ba: d045 beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a4bc: 687b ldr r3, [r7, #4]
- 800a4be: 681b ldr r3, [r3, #0]
- 800a4c0: 4a3f ldr r2, [pc, #252] @ (800a5c0 <DMA_CalcBaseAndBitshift+0x120>)
- 800a4c2: 4293 cmp r3, r2
- 800a4c4: d040 beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a4c6: 687b ldr r3, [r7, #4]
- 800a4c8: 681b ldr r3, [r3, #0]
- 800a4ca: 4a3e ldr r2, [pc, #248] @ (800a5c4 <DMA_CalcBaseAndBitshift+0x124>)
- 800a4cc: 4293 cmp r3, r2
- 800a4ce: d03b beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a4d0: 687b ldr r3, [r7, #4]
- 800a4d2: 681b ldr r3, [r3, #0]
- 800a4d4: 4a3c ldr r2, [pc, #240] @ (800a5c8 <DMA_CalcBaseAndBitshift+0x128>)
- 800a4d6: 4293 cmp r3, r2
- 800a4d8: d036 beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a4da: 687b ldr r3, [r7, #4]
- 800a4dc: 681b ldr r3, [r3, #0]
- 800a4de: 4a3b ldr r2, [pc, #236] @ (800a5cc <DMA_CalcBaseAndBitshift+0x12c>)
- 800a4e0: 4293 cmp r3, r2
- 800a4e2: d031 beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a4e4: 687b ldr r3, [r7, #4]
- 800a4e6: 681b ldr r3, [r3, #0]
- 800a4e8: 4a39 ldr r2, [pc, #228] @ (800a5d0 <DMA_CalcBaseAndBitshift+0x130>)
- 800a4ea: 4293 cmp r3, r2
- 800a4ec: d02c beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a4ee: 687b ldr r3, [r7, #4]
- 800a4f0: 681b ldr r3, [r3, #0]
- 800a4f2: 4a38 ldr r2, [pc, #224] @ (800a5d4 <DMA_CalcBaseAndBitshift+0x134>)
- 800a4f4: 4293 cmp r3, r2
- 800a4f6: d027 beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a4f8: 687b ldr r3, [r7, #4]
- 800a4fa: 681b ldr r3, [r3, #0]
- 800a4fc: 4a36 ldr r2, [pc, #216] @ (800a5d8 <DMA_CalcBaseAndBitshift+0x138>)
- 800a4fe: 4293 cmp r3, r2
- 800a500: d022 beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a502: 687b ldr r3, [r7, #4]
- 800a504: 681b ldr r3, [r3, #0]
- 800a506: 4a35 ldr r2, [pc, #212] @ (800a5dc <DMA_CalcBaseAndBitshift+0x13c>)
- 800a508: 4293 cmp r3, r2
- 800a50a: d01d beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a50c: 687b ldr r3, [r7, #4]
- 800a50e: 681b ldr r3, [r3, #0]
- 800a510: 4a33 ldr r2, [pc, #204] @ (800a5e0 <DMA_CalcBaseAndBitshift+0x140>)
- 800a512: 4293 cmp r3, r2
- 800a514: d018 beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a516: 687b ldr r3, [r7, #4]
- 800a518: 681b ldr r3, [r3, #0]
- 800a51a: 4a32 ldr r2, [pc, #200] @ (800a5e4 <DMA_CalcBaseAndBitshift+0x144>)
- 800a51c: 4293 cmp r3, r2
- 800a51e: d013 beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a520: 687b ldr r3, [r7, #4]
- 800a522: 681b ldr r3, [r3, #0]
- 800a524: 4a30 ldr r2, [pc, #192] @ (800a5e8 <DMA_CalcBaseAndBitshift+0x148>)
- 800a526: 4293 cmp r3, r2
- 800a528: d00e beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a52a: 687b ldr r3, [r7, #4]
- 800a52c: 681b ldr r3, [r3, #0]
- 800a52e: 4a2f ldr r2, [pc, #188] @ (800a5ec <DMA_CalcBaseAndBitshift+0x14c>)
- 800a530: 4293 cmp r3, r2
- 800a532: d009 beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a534: 687b ldr r3, [r7, #4]
- 800a536: 681b ldr r3, [r3, #0]
- 800a538: 4a2d ldr r2, [pc, #180] @ (800a5f0 <DMA_CalcBaseAndBitshift+0x150>)
- 800a53a: 4293 cmp r3, r2
- 800a53c: d004 beq.n 800a548 <DMA_CalcBaseAndBitshift+0xa8>
- 800a53e: 687b ldr r3, [r7, #4]
- 800a540: 681b ldr r3, [r3, #0]
- 800a542: 4a2c ldr r2, [pc, #176] @ (800a5f4 <DMA_CalcBaseAndBitshift+0x154>)
- 800a544: 4293 cmp r3, r2
- 800a546: d101 bne.n 800a54c <DMA_CalcBaseAndBitshift+0xac>
- 800a548: 2301 movs r3, #1
- 800a54a: e000 b.n 800a54e <DMA_CalcBaseAndBitshift+0xae>
- 800a54c: 2300 movs r3, #0
- 800a54e: 2b00 cmp r3, #0
- 800a550: d024 beq.n 800a59c <DMA_CalcBaseAndBitshift+0xfc>
- {
- uint32_t stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U;
- 800a552: 687b ldr r3, [r7, #4]
- 800a554: 681b ldr r3, [r3, #0]
- 800a556: b2db uxtb r3, r3
- 800a558: 3b10 subs r3, #16
- 800a55a: 4a27 ldr r2, [pc, #156] @ (800a5f8 <DMA_CalcBaseAndBitshift+0x158>)
- 800a55c: fba2 2303 umull r2, r3, r2, r3
- 800a560: 091b lsrs r3, r3, #4
- 800a562: 60fb str r3, [r7, #12]
- /* lookup table for necessary bitshift of flags within status registers */
- static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U};
- hdma->StreamIndex = flagBitshiftOffset[stream_number & 0x7U];
- 800a564: 68fb ldr r3, [r7, #12]
- 800a566: f003 0307 and.w r3, r3, #7
- 800a56a: 4a24 ldr r2, [pc, #144] @ (800a5fc <DMA_CalcBaseAndBitshift+0x15c>)
- 800a56c: 5cd3 ldrb r3, [r2, r3]
- 800a56e: 461a mov r2, r3
- 800a570: 687b ldr r3, [r7, #4]
- 800a572: 65da str r2, [r3, #92] @ 0x5c
- if (stream_number > 3U)
- 800a574: 68fb ldr r3, [r7, #12]
- 800a576: 2b03 cmp r3, #3
- 800a578: d908 bls.n 800a58c <DMA_CalcBaseAndBitshift+0xec>
- {
- /* return pointer to HISR and HIFCR */
- hdma->StreamBaseAddress = (((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU)) + 4U);
- 800a57a: 687b ldr r3, [r7, #4]
- 800a57c: 681b ldr r3, [r3, #0]
- 800a57e: 461a mov r2, r3
- 800a580: 4b1f ldr r3, [pc, #124] @ (800a600 <DMA_CalcBaseAndBitshift+0x160>)
- 800a582: 4013 ands r3, r2
- 800a584: 1d1a adds r2, r3, #4
- 800a586: 687b ldr r3, [r7, #4]
- 800a588: 659a str r2, [r3, #88] @ 0x58
- 800a58a: e00d b.n 800a5a8 <DMA_CalcBaseAndBitshift+0x108>
- }
- else
- {
- /* return pointer to LISR and LIFCR */
- hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU));
- 800a58c: 687b ldr r3, [r7, #4]
- 800a58e: 681b ldr r3, [r3, #0]
- 800a590: 461a mov r2, r3
- 800a592: 4b1b ldr r3, [pc, #108] @ (800a600 <DMA_CalcBaseAndBitshift+0x160>)
- 800a594: 4013 ands r3, r2
- 800a596: 687a ldr r2, [r7, #4]
- 800a598: 6593 str r3, [r2, #88] @ 0x58
- 800a59a: e005 b.n 800a5a8 <DMA_CalcBaseAndBitshift+0x108>
- }
- }
- else /* BDMA instance(s) */
- {
- /* return pointer to ISR and IFCR */
- hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0xFFU));
- 800a59c: 687b ldr r3, [r7, #4]
- 800a59e: 681b ldr r3, [r3, #0]
- 800a5a0: f023 02ff bic.w r2, r3, #255 @ 0xff
- 800a5a4: 687b ldr r3, [r7, #4]
- 800a5a6: 659a str r2, [r3, #88] @ 0x58
- }
- return hdma->StreamBaseAddress;
- 800a5a8: 687b ldr r3, [r7, #4]
- 800a5aa: 6d9b ldr r3, [r3, #88] @ 0x58
- }
- 800a5ac: 4618 mov r0, r3
- 800a5ae: 3714 adds r7, #20
- 800a5b0: 46bd mov sp, r7
- 800a5b2: f85d 7b04 ldr.w r7, [sp], #4
- 800a5b6: 4770 bx lr
- 800a5b8: 40020010 .word 0x40020010
- 800a5bc: 40020028 .word 0x40020028
- 800a5c0: 40020040 .word 0x40020040
- 800a5c4: 40020058 .word 0x40020058
- 800a5c8: 40020070 .word 0x40020070
- 800a5cc: 40020088 .word 0x40020088
- 800a5d0: 400200a0 .word 0x400200a0
- 800a5d4: 400200b8 .word 0x400200b8
- 800a5d8: 40020410 .word 0x40020410
- 800a5dc: 40020428 .word 0x40020428
- 800a5e0: 40020440 .word 0x40020440
- 800a5e4: 40020458 .word 0x40020458
- 800a5e8: 40020470 .word 0x40020470
- 800a5ec: 40020488 .word 0x40020488
- 800a5f0: 400204a0 .word 0x400204a0
- 800a5f4: 400204b8 .word 0x400204b8
- 800a5f8: aaaaaaab .word 0xaaaaaaab
- 800a5fc: 08018c28 .word 0x08018c28
- 800a600: fffffc00 .word 0xfffffc00
- 0800a604 <DMA_CheckFifoParam>:
- * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval HAL status
- */
- static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma)
- {
- 800a604: b480 push {r7}
- 800a606: b085 sub sp, #20
- 800a608: af00 add r7, sp, #0
- 800a60a: 6078 str r0, [r7, #4]
- HAL_StatusTypeDef status = HAL_OK;
- 800a60c: 2300 movs r3, #0
- 800a60e: 73fb strb r3, [r7, #15]
- /* Memory Data size equal to Byte */
- if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE)
- 800a610: 687b ldr r3, [r7, #4]
- 800a612: 699b ldr r3, [r3, #24]
- 800a614: 2b00 cmp r3, #0
- 800a616: d120 bne.n 800a65a <DMA_CheckFifoParam+0x56>
- {
- switch (hdma->Init.FIFOThreshold)
- 800a618: 687b ldr r3, [r7, #4]
- 800a61a: 6a9b ldr r3, [r3, #40] @ 0x28
- 800a61c: 2b03 cmp r3, #3
- 800a61e: d858 bhi.n 800a6d2 <DMA_CheckFifoParam+0xce>
- 800a620: a201 add r2, pc, #4 @ (adr r2, 800a628 <DMA_CheckFifoParam+0x24>)
- 800a622: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800a626: bf00 nop
- 800a628: 0800a639 .word 0x0800a639
- 800a62c: 0800a64b .word 0x0800a64b
- 800a630: 0800a639 .word 0x0800a639
- 800a634: 0800a6d3 .word 0x0800a6d3
- {
- case DMA_FIFO_THRESHOLD_1QUARTERFULL:
- case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
- if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
- 800a638: 687b ldr r3, [r7, #4]
- 800a63a: 6adb ldr r3, [r3, #44] @ 0x2c
- 800a63c: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
- 800a640: 2b00 cmp r3, #0
- 800a642: d048 beq.n 800a6d6 <DMA_CheckFifoParam+0xd2>
- {
- status = HAL_ERROR;
- 800a644: 2301 movs r3, #1
- 800a646: 73fb strb r3, [r7, #15]
- }
- break;
- 800a648: e045 b.n 800a6d6 <DMA_CheckFifoParam+0xd2>
- case DMA_FIFO_THRESHOLD_HALFFULL:
- if (hdma->Init.MemBurst == DMA_MBURST_INC16)
- 800a64a: 687b ldr r3, [r7, #4]
- 800a64c: 6adb ldr r3, [r3, #44] @ 0x2c
- 800a64e: f1b3 7fc0 cmp.w r3, #25165824 @ 0x1800000
- 800a652: d142 bne.n 800a6da <DMA_CheckFifoParam+0xd6>
- {
- status = HAL_ERROR;
- 800a654: 2301 movs r3, #1
- 800a656: 73fb strb r3, [r7, #15]
- }
- break;
- 800a658: e03f b.n 800a6da <DMA_CheckFifoParam+0xd6>
- break;
- }
- }
- /* Memory Data size equal to Half-Word */
- else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
- 800a65a: 687b ldr r3, [r7, #4]
- 800a65c: 699b ldr r3, [r3, #24]
- 800a65e: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
- 800a662: d123 bne.n 800a6ac <DMA_CheckFifoParam+0xa8>
- {
- switch (hdma->Init.FIFOThreshold)
- 800a664: 687b ldr r3, [r7, #4]
- 800a666: 6a9b ldr r3, [r3, #40] @ 0x28
- 800a668: 2b03 cmp r3, #3
- 800a66a: d838 bhi.n 800a6de <DMA_CheckFifoParam+0xda>
- 800a66c: a201 add r2, pc, #4 @ (adr r2, 800a674 <DMA_CheckFifoParam+0x70>)
- 800a66e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800a672: bf00 nop
- 800a674: 0800a685 .word 0x0800a685
- 800a678: 0800a68b .word 0x0800a68b
- 800a67c: 0800a685 .word 0x0800a685
- 800a680: 0800a69d .word 0x0800a69d
- {
- case DMA_FIFO_THRESHOLD_1QUARTERFULL:
- case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
- status = HAL_ERROR;
- 800a684: 2301 movs r3, #1
- 800a686: 73fb strb r3, [r7, #15]
- break;
- 800a688: e030 b.n 800a6ec <DMA_CheckFifoParam+0xe8>
- case DMA_FIFO_THRESHOLD_HALFFULL:
- if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
- 800a68a: 687b ldr r3, [r7, #4]
- 800a68c: 6adb ldr r3, [r3, #44] @ 0x2c
- 800a68e: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
- 800a692: 2b00 cmp r3, #0
- 800a694: d025 beq.n 800a6e2 <DMA_CheckFifoParam+0xde>
- {
- status = HAL_ERROR;
- 800a696: 2301 movs r3, #1
- 800a698: 73fb strb r3, [r7, #15]
- }
- break;
- 800a69a: e022 b.n 800a6e2 <DMA_CheckFifoParam+0xde>
- case DMA_FIFO_THRESHOLD_FULL:
- if (hdma->Init.MemBurst == DMA_MBURST_INC16)
- 800a69c: 687b ldr r3, [r7, #4]
- 800a69e: 6adb ldr r3, [r3, #44] @ 0x2c
- 800a6a0: f1b3 7fc0 cmp.w r3, #25165824 @ 0x1800000
- 800a6a4: d11f bne.n 800a6e6 <DMA_CheckFifoParam+0xe2>
- {
- status = HAL_ERROR;
- 800a6a6: 2301 movs r3, #1
- 800a6a8: 73fb strb r3, [r7, #15]
- }
- break;
- 800a6aa: e01c b.n 800a6e6 <DMA_CheckFifoParam+0xe2>
- }
- /* Memory Data size equal to Word */
- else
- {
- switch (hdma->Init.FIFOThreshold)
- 800a6ac: 687b ldr r3, [r7, #4]
- 800a6ae: 6a9b ldr r3, [r3, #40] @ 0x28
- 800a6b0: 2b02 cmp r3, #2
- 800a6b2: d902 bls.n 800a6ba <DMA_CheckFifoParam+0xb6>
- 800a6b4: 2b03 cmp r3, #3
- 800a6b6: d003 beq.n 800a6c0 <DMA_CheckFifoParam+0xbc>
- status = HAL_ERROR;
- }
- break;
- default:
- break;
- 800a6b8: e018 b.n 800a6ec <DMA_CheckFifoParam+0xe8>
- status = HAL_ERROR;
- 800a6ba: 2301 movs r3, #1
- 800a6bc: 73fb strb r3, [r7, #15]
- break;
- 800a6be: e015 b.n 800a6ec <DMA_CheckFifoParam+0xe8>
- if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
- 800a6c0: 687b ldr r3, [r7, #4]
- 800a6c2: 6adb ldr r3, [r3, #44] @ 0x2c
- 800a6c4: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
- 800a6c8: 2b00 cmp r3, #0
- 800a6ca: d00e beq.n 800a6ea <DMA_CheckFifoParam+0xe6>
- status = HAL_ERROR;
- 800a6cc: 2301 movs r3, #1
- 800a6ce: 73fb strb r3, [r7, #15]
- break;
- 800a6d0: e00b b.n 800a6ea <DMA_CheckFifoParam+0xe6>
- break;
- 800a6d2: bf00 nop
- 800a6d4: e00a b.n 800a6ec <DMA_CheckFifoParam+0xe8>
- break;
- 800a6d6: bf00 nop
- 800a6d8: e008 b.n 800a6ec <DMA_CheckFifoParam+0xe8>
- break;
- 800a6da: bf00 nop
- 800a6dc: e006 b.n 800a6ec <DMA_CheckFifoParam+0xe8>
- break;
- 800a6de: bf00 nop
- 800a6e0: e004 b.n 800a6ec <DMA_CheckFifoParam+0xe8>
- break;
- 800a6e2: bf00 nop
- 800a6e4: e002 b.n 800a6ec <DMA_CheckFifoParam+0xe8>
- break;
- 800a6e6: bf00 nop
- 800a6e8: e000 b.n 800a6ec <DMA_CheckFifoParam+0xe8>
- break;
- 800a6ea: bf00 nop
- }
- }
- return status;
- 800a6ec: 7bfb ldrb r3, [r7, #15]
- }
- 800a6ee: 4618 mov r0, r3
- 800a6f0: 3714 adds r7, #20
- 800a6f2: 46bd mov sp, r7
- 800a6f4: f85d 7b04 ldr.w r7, [sp], #4
- 800a6f8: 4770 bx lr
- 800a6fa: bf00 nop
- 0800a6fc <DMA_CalcDMAMUXChannelBaseAndMask>:
- * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval HAL status
- */
- static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma)
- {
- 800a6fc: b480 push {r7}
- 800a6fe: b085 sub sp, #20
- 800a700: af00 add r7, sp, #0
- 800a702: 6078 str r0, [r7, #4]
- uint32_t stream_number;
- uint32_t stream_baseaddress = (uint32_t)((uint32_t*)hdma->Instance);
- 800a704: 687b ldr r3, [r7, #4]
- 800a706: 681b ldr r3, [r3, #0]
- 800a708: 60bb str r3, [r7, #8]
- if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
- 800a70a: 687b ldr r3, [r7, #4]
- 800a70c: 681b ldr r3, [r3, #0]
- 800a70e: 4a38 ldr r2, [pc, #224] @ (800a7f0 <DMA_CalcDMAMUXChannelBaseAndMask+0xf4>)
- 800a710: 4293 cmp r3, r2
- 800a712: d022 beq.n 800a75a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
- 800a714: 687b ldr r3, [r7, #4]
- 800a716: 681b ldr r3, [r3, #0]
- 800a718: 4a36 ldr r2, [pc, #216] @ (800a7f4 <DMA_CalcDMAMUXChannelBaseAndMask+0xf8>)
- 800a71a: 4293 cmp r3, r2
- 800a71c: d01d beq.n 800a75a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
- 800a71e: 687b ldr r3, [r7, #4]
- 800a720: 681b ldr r3, [r3, #0]
- 800a722: 4a35 ldr r2, [pc, #212] @ (800a7f8 <DMA_CalcDMAMUXChannelBaseAndMask+0xfc>)
- 800a724: 4293 cmp r3, r2
- 800a726: d018 beq.n 800a75a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
- 800a728: 687b ldr r3, [r7, #4]
- 800a72a: 681b ldr r3, [r3, #0]
- 800a72c: 4a33 ldr r2, [pc, #204] @ (800a7fc <DMA_CalcDMAMUXChannelBaseAndMask+0x100>)
- 800a72e: 4293 cmp r3, r2
- 800a730: d013 beq.n 800a75a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
- 800a732: 687b ldr r3, [r7, #4]
- 800a734: 681b ldr r3, [r3, #0]
- 800a736: 4a32 ldr r2, [pc, #200] @ (800a800 <DMA_CalcDMAMUXChannelBaseAndMask+0x104>)
- 800a738: 4293 cmp r3, r2
- 800a73a: d00e beq.n 800a75a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
- 800a73c: 687b ldr r3, [r7, #4]
- 800a73e: 681b ldr r3, [r3, #0]
- 800a740: 4a30 ldr r2, [pc, #192] @ (800a804 <DMA_CalcDMAMUXChannelBaseAndMask+0x108>)
- 800a742: 4293 cmp r3, r2
- 800a744: d009 beq.n 800a75a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
- 800a746: 687b ldr r3, [r7, #4]
- 800a748: 681b ldr r3, [r3, #0]
- 800a74a: 4a2f ldr r2, [pc, #188] @ (800a808 <DMA_CalcDMAMUXChannelBaseAndMask+0x10c>)
- 800a74c: 4293 cmp r3, r2
- 800a74e: d004 beq.n 800a75a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
- 800a750: 687b ldr r3, [r7, #4]
- 800a752: 681b ldr r3, [r3, #0]
- 800a754: 4a2d ldr r2, [pc, #180] @ (800a80c <DMA_CalcDMAMUXChannelBaseAndMask+0x110>)
- 800a756: 4293 cmp r3, r2
- 800a758: d101 bne.n 800a75e <DMA_CalcDMAMUXChannelBaseAndMask+0x62>
- 800a75a: 2301 movs r3, #1
- 800a75c: e000 b.n 800a760 <DMA_CalcDMAMUXChannelBaseAndMask+0x64>
- 800a75e: 2300 movs r3, #0
- 800a760: 2b00 cmp r3, #0
- 800a762: d01a beq.n 800a79a <DMA_CalcDMAMUXChannelBaseAndMask+0x9e>
- {
- /* BDMA Channels are connected to DMAMUX2 channels */
- stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 8U) / 20U;
- 800a764: 687b ldr r3, [r7, #4]
- 800a766: 681b ldr r3, [r3, #0]
- 800a768: b2db uxtb r3, r3
- 800a76a: 3b08 subs r3, #8
- 800a76c: 4a28 ldr r2, [pc, #160] @ (800a810 <DMA_CalcDMAMUXChannelBaseAndMask+0x114>)
- 800a76e: fba2 2303 umull r2, r3, r2, r3
- 800a772: 091b lsrs r3, r3, #4
- 800a774: 60fb str r3, [r7, #12]
- hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_Channel0) + (stream_number * 4U)));
- 800a776: 68fa ldr r2, [r7, #12]
- 800a778: 4b26 ldr r3, [pc, #152] @ (800a814 <DMA_CalcDMAMUXChannelBaseAndMask+0x118>)
- 800a77a: 4413 add r3, r2
- 800a77c: 009b lsls r3, r3, #2
- 800a77e: 461a mov r2, r3
- 800a780: 687b ldr r3, [r7, #4]
- 800a782: 661a str r2, [r3, #96] @ 0x60
- hdma->DMAmuxChannelStatus = DMAMUX2_ChannelStatus;
- 800a784: 687b ldr r3, [r7, #4]
- 800a786: 4a24 ldr r2, [pc, #144] @ (800a818 <DMA_CalcDMAMUXChannelBaseAndMask+0x11c>)
- 800a788: 665a str r2, [r3, #100] @ 0x64
- hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
- 800a78a: 68fb ldr r3, [r7, #12]
- 800a78c: f003 031f and.w r3, r3, #31
- 800a790: 2201 movs r2, #1
- 800a792: 409a lsls r2, r3
- 800a794: 687b ldr r3, [r7, #4]
- 800a796: 669a str r2, [r3, #104] @ 0x68
- }
- hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U)));
- hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
- hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
- }
- }
- 800a798: e024 b.n 800a7e4 <DMA_CalcDMAMUXChannelBaseAndMask+0xe8>
- stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U;
- 800a79a: 687b ldr r3, [r7, #4]
- 800a79c: 681b ldr r3, [r3, #0]
- 800a79e: b2db uxtb r3, r3
- 800a7a0: 3b10 subs r3, #16
- 800a7a2: 4a1e ldr r2, [pc, #120] @ (800a81c <DMA_CalcDMAMUXChannelBaseAndMask+0x120>)
- 800a7a4: fba2 2303 umull r2, r3, r2, r3
- 800a7a8: 091b lsrs r3, r3, #4
- 800a7aa: 60fb str r3, [r7, #12]
- if((stream_baseaddress <= ((uint32_t)DMA2_Stream7) ) && \
- 800a7ac: 68bb ldr r3, [r7, #8]
- 800a7ae: 4a1c ldr r2, [pc, #112] @ (800a820 <DMA_CalcDMAMUXChannelBaseAndMask+0x124>)
- 800a7b0: 4293 cmp r3, r2
- 800a7b2: d806 bhi.n 800a7c2 <DMA_CalcDMAMUXChannelBaseAndMask+0xc6>
- 800a7b4: 68bb ldr r3, [r7, #8]
- 800a7b6: 4a1b ldr r2, [pc, #108] @ (800a824 <DMA_CalcDMAMUXChannelBaseAndMask+0x128>)
- 800a7b8: 4293 cmp r3, r2
- 800a7ba: d902 bls.n 800a7c2 <DMA_CalcDMAMUXChannelBaseAndMask+0xc6>
- stream_number += 8U;
- 800a7bc: 68fb ldr r3, [r7, #12]
- 800a7be: 3308 adds r3, #8
- 800a7c0: 60fb str r3, [r7, #12]
- hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U)));
- 800a7c2: 68fa ldr r2, [r7, #12]
- 800a7c4: 4b18 ldr r3, [pc, #96] @ (800a828 <DMA_CalcDMAMUXChannelBaseAndMask+0x12c>)
- 800a7c6: 4413 add r3, r2
- 800a7c8: 009b lsls r3, r3, #2
- 800a7ca: 461a mov r2, r3
- 800a7cc: 687b ldr r3, [r7, #4]
- 800a7ce: 661a str r2, [r3, #96] @ 0x60
- hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
- 800a7d0: 687b ldr r3, [r7, #4]
- 800a7d2: 4a16 ldr r2, [pc, #88] @ (800a82c <DMA_CalcDMAMUXChannelBaseAndMask+0x130>)
- 800a7d4: 665a str r2, [r3, #100] @ 0x64
- hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
- 800a7d6: 68fb ldr r3, [r7, #12]
- 800a7d8: f003 031f and.w r3, r3, #31
- 800a7dc: 2201 movs r2, #1
- 800a7de: 409a lsls r2, r3
- 800a7e0: 687b ldr r3, [r7, #4]
- 800a7e2: 669a str r2, [r3, #104] @ 0x68
- }
- 800a7e4: bf00 nop
- 800a7e6: 3714 adds r7, #20
- 800a7e8: 46bd mov sp, r7
- 800a7ea: f85d 7b04 ldr.w r7, [sp], #4
- 800a7ee: 4770 bx lr
- 800a7f0: 58025408 .word 0x58025408
- 800a7f4: 5802541c .word 0x5802541c
- 800a7f8: 58025430 .word 0x58025430
- 800a7fc: 58025444 .word 0x58025444
- 800a800: 58025458 .word 0x58025458
- 800a804: 5802546c .word 0x5802546c
- 800a808: 58025480 .word 0x58025480
- 800a80c: 58025494 .word 0x58025494
- 800a810: cccccccd .word 0xcccccccd
- 800a814: 16009600 .word 0x16009600
- 800a818: 58025880 .word 0x58025880
- 800a81c: aaaaaaab .word 0xaaaaaaab
- 800a820: 400204b8 .word 0x400204b8
- 800a824: 4002040f .word 0x4002040f
- 800a828: 10008200 .word 0x10008200
- 800a82c: 40020880 .word 0x40020880
- 0800a830 <DMA_CalcDMAMUXRequestGenBaseAndMask>:
- * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval HAL status
- */
- static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma)
- {
- 800a830: b480 push {r7}
- 800a832: b085 sub sp, #20
- 800a834: af00 add r7, sp, #0
- 800a836: 6078 str r0, [r7, #4]
- uint32_t request = hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID;
- 800a838: 687b ldr r3, [r7, #4]
- 800a83a: 685b ldr r3, [r3, #4]
- 800a83c: b2db uxtb r3, r3
- 800a83e: 60fb str r3, [r7, #12]
- if((request >= DMA_REQUEST_GENERATOR0) && (request <= DMA_REQUEST_GENERATOR7))
- 800a840: 68fb ldr r3, [r7, #12]
- 800a842: 2b00 cmp r3, #0
- 800a844: d04a beq.n 800a8dc <DMA_CalcDMAMUXRequestGenBaseAndMask+0xac>
- 800a846: 68fb ldr r3, [r7, #12]
- 800a848: 2b08 cmp r3, #8
- 800a84a: d847 bhi.n 800a8dc <DMA_CalcDMAMUXRequestGenBaseAndMask+0xac>
- {
- if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
- 800a84c: 687b ldr r3, [r7, #4]
- 800a84e: 681b ldr r3, [r3, #0]
- 800a850: 4a25 ldr r2, [pc, #148] @ (800a8e8 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xb8>)
- 800a852: 4293 cmp r3, r2
- 800a854: d022 beq.n 800a89c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
- 800a856: 687b ldr r3, [r7, #4]
- 800a858: 681b ldr r3, [r3, #0]
- 800a85a: 4a24 ldr r2, [pc, #144] @ (800a8ec <DMA_CalcDMAMUXRequestGenBaseAndMask+0xbc>)
- 800a85c: 4293 cmp r3, r2
- 800a85e: d01d beq.n 800a89c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
- 800a860: 687b ldr r3, [r7, #4]
- 800a862: 681b ldr r3, [r3, #0]
- 800a864: 4a22 ldr r2, [pc, #136] @ (800a8f0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc0>)
- 800a866: 4293 cmp r3, r2
- 800a868: d018 beq.n 800a89c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
- 800a86a: 687b ldr r3, [r7, #4]
- 800a86c: 681b ldr r3, [r3, #0]
- 800a86e: 4a21 ldr r2, [pc, #132] @ (800a8f4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc4>)
- 800a870: 4293 cmp r3, r2
- 800a872: d013 beq.n 800a89c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
- 800a874: 687b ldr r3, [r7, #4]
- 800a876: 681b ldr r3, [r3, #0]
- 800a878: 4a1f ldr r2, [pc, #124] @ (800a8f8 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc8>)
- 800a87a: 4293 cmp r3, r2
- 800a87c: d00e beq.n 800a89c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
- 800a87e: 687b ldr r3, [r7, #4]
- 800a880: 681b ldr r3, [r3, #0]
- 800a882: 4a1e ldr r2, [pc, #120] @ (800a8fc <DMA_CalcDMAMUXRequestGenBaseAndMask+0xcc>)
- 800a884: 4293 cmp r3, r2
- 800a886: d009 beq.n 800a89c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
- 800a888: 687b ldr r3, [r7, #4]
- 800a88a: 681b ldr r3, [r3, #0]
- 800a88c: 4a1c ldr r2, [pc, #112] @ (800a900 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd0>)
- 800a88e: 4293 cmp r3, r2
- 800a890: d004 beq.n 800a89c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
- 800a892: 687b ldr r3, [r7, #4]
- 800a894: 681b ldr r3, [r3, #0]
- 800a896: 4a1b ldr r2, [pc, #108] @ (800a904 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd4>)
- 800a898: 4293 cmp r3, r2
- 800a89a: d101 bne.n 800a8a0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x70>
- 800a89c: 2301 movs r3, #1
- 800a89e: e000 b.n 800a8a2 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x72>
- 800a8a0: 2300 movs r3, #0
- 800a8a2: 2b00 cmp r3, #0
- 800a8a4: d00a beq.n 800a8bc <DMA_CalcDMAMUXRequestGenBaseAndMask+0x8c>
- {
- /* BDMA Channels are connected to DMAMUX2 request generator blocks */
- hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_RequestGenerator0) + ((request - 1U) * 4U)));
- 800a8a6: 68fa ldr r2, [r7, #12]
- 800a8a8: 4b17 ldr r3, [pc, #92] @ (800a908 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd8>)
- 800a8aa: 4413 add r3, r2
- 800a8ac: 009b lsls r3, r3, #2
- 800a8ae: 461a mov r2, r3
- 800a8b0: 687b ldr r3, [r7, #4]
- 800a8b2: 66da str r2, [r3, #108] @ 0x6c
- hdma->DMAmuxRequestGenStatus = DMAMUX2_RequestGenStatus;
- 800a8b4: 687b ldr r3, [r7, #4]
- 800a8b6: 4a15 ldr r2, [pc, #84] @ (800a90c <DMA_CalcDMAMUXRequestGenBaseAndMask+0xdc>)
- 800a8b8: 671a str r2, [r3, #112] @ 0x70
- 800a8ba: e009 b.n 800a8d0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xa0>
- }
- else
- {
- /* DMA1 and DMA2 Streams use DMAMUX1 request generator blocks */
- hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenerator0) + ((request - 1U) * 4U)));
- 800a8bc: 68fa ldr r2, [r7, #12]
- 800a8be: 4b14 ldr r3, [pc, #80] @ (800a910 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xe0>)
- 800a8c0: 4413 add r3, r2
- 800a8c2: 009b lsls r3, r3, #2
- 800a8c4: 461a mov r2, r3
- 800a8c6: 687b ldr r3, [r7, #4]
- 800a8c8: 66da str r2, [r3, #108] @ 0x6c
- hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus;
- 800a8ca: 687b ldr r3, [r7, #4]
- 800a8cc: 4a11 ldr r2, [pc, #68] @ (800a914 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xe4>)
- 800a8ce: 671a str r2, [r3, #112] @ 0x70
- }
- hdma->DMAmuxRequestGenStatusMask = 1UL << (request - 1U);
- 800a8d0: 68fb ldr r3, [r7, #12]
- 800a8d2: 3b01 subs r3, #1
- 800a8d4: 2201 movs r2, #1
- 800a8d6: 409a lsls r2, r3
- 800a8d8: 687b ldr r3, [r7, #4]
- 800a8da: 675a str r2, [r3, #116] @ 0x74
- }
- }
- 800a8dc: bf00 nop
- 800a8de: 3714 adds r7, #20
- 800a8e0: 46bd mov sp, r7
- 800a8e2: f85d 7b04 ldr.w r7, [sp], #4
- 800a8e6: 4770 bx lr
- 800a8e8: 58025408 .word 0x58025408
- 800a8ec: 5802541c .word 0x5802541c
- 800a8f0: 58025430 .word 0x58025430
- 800a8f4: 58025444 .word 0x58025444
- 800a8f8: 58025458 .word 0x58025458
- 800a8fc: 5802546c .word 0x5802546c
- 800a900: 58025480 .word 0x58025480
- 800a904: 58025494 .word 0x58025494
- 800a908: 1600963f .word 0x1600963f
- 800a90c: 58025940 .word 0x58025940
- 800a910: 1000823f .word 0x1000823f
- 800a914: 40020940 .word 0x40020940
- 0800a918 <HAL_GPIO_Init>:
- * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
- * the configuration information for the specified GPIO peripheral.
- * @retval None
- */
- void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
- {
- 800a918: b480 push {r7}
- 800a91a: b089 sub sp, #36 @ 0x24
- 800a91c: af00 add r7, sp, #0
- 800a91e: 6078 str r0, [r7, #4]
- 800a920: 6039 str r1, [r7, #0]
- uint32_t position = 0x00U;
- 800a922: 2300 movs r3, #0
- 800a924: 61fb str r3, [r7, #28]
- EXTI_Core_TypeDef *EXTI_CurrentCPU;
- #if defined(DUAL_CORE) && defined(CORE_CM4)
- EXTI_CurrentCPU = EXTI_D2; /* EXTI for CM4 CPU */
- #else
- EXTI_CurrentCPU = EXTI_D1; /* EXTI for CM7 CPU */
- 800a926: 4b89 ldr r3, [pc, #548] @ (800ab4c <HAL_GPIO_Init+0x234>)
- 800a928: 617b str r3, [r7, #20]
- assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
- assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
- assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
- /* Configure the port pins */
- while (((GPIO_Init->Pin) >> position) != 0x00U)
- 800a92a: e194 b.n 800ac56 <HAL_GPIO_Init+0x33e>
- {
- /* Get current io position */
- iocurrent = (GPIO_Init->Pin) & (1UL << position);
- 800a92c: 683b ldr r3, [r7, #0]
- 800a92e: 681a ldr r2, [r3, #0]
- 800a930: 2101 movs r1, #1
- 800a932: 69fb ldr r3, [r7, #28]
- 800a934: fa01 f303 lsl.w r3, r1, r3
- 800a938: 4013 ands r3, r2
- 800a93a: 613b str r3, [r7, #16]
- if (iocurrent != 0x00U)
- 800a93c: 693b ldr r3, [r7, #16]
- 800a93e: 2b00 cmp r3, #0
- 800a940: f000 8186 beq.w 800ac50 <HAL_GPIO_Init+0x338>
- {
- /*--------------------- GPIO Mode Configuration ------------------------*/
- /* In case of Output or Alternate function mode selection */
- if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
- 800a944: 683b ldr r3, [r7, #0]
- 800a946: 685b ldr r3, [r3, #4]
- 800a948: f003 0303 and.w r3, r3, #3
- 800a94c: 2b01 cmp r3, #1
- 800a94e: d005 beq.n 800a95c <HAL_GPIO_Init+0x44>
- 800a950: 683b ldr r3, [r7, #0]
- 800a952: 685b ldr r3, [r3, #4]
- 800a954: f003 0303 and.w r3, r3, #3
- 800a958: 2b02 cmp r3, #2
- 800a95a: d130 bne.n 800a9be <HAL_GPIO_Init+0xa6>
- {
- /* Check the Speed parameter */
- assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
- /* Configure the IO Speed */
- temp = GPIOx->OSPEEDR;
- 800a95c: 687b ldr r3, [r7, #4]
- 800a95e: 689b ldr r3, [r3, #8]
- 800a960: 61bb str r3, [r7, #24]
- temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2U));
- 800a962: 69fb ldr r3, [r7, #28]
- 800a964: 005b lsls r3, r3, #1
- 800a966: 2203 movs r2, #3
- 800a968: fa02 f303 lsl.w r3, r2, r3
- 800a96c: 43db mvns r3, r3
- 800a96e: 69ba ldr r2, [r7, #24]
- 800a970: 4013 ands r3, r2
- 800a972: 61bb str r3, [r7, #24]
- temp |= (GPIO_Init->Speed << (position * 2U));
- 800a974: 683b ldr r3, [r7, #0]
- 800a976: 68da ldr r2, [r3, #12]
- 800a978: 69fb ldr r3, [r7, #28]
- 800a97a: 005b lsls r3, r3, #1
- 800a97c: fa02 f303 lsl.w r3, r2, r3
- 800a980: 69ba ldr r2, [r7, #24]
- 800a982: 4313 orrs r3, r2
- 800a984: 61bb str r3, [r7, #24]
- GPIOx->OSPEEDR = temp;
- 800a986: 687b ldr r3, [r7, #4]
- 800a988: 69ba ldr r2, [r7, #24]
- 800a98a: 609a str r2, [r3, #8]
- /* Configure the IO Output Type */
- temp = GPIOx->OTYPER;
- 800a98c: 687b ldr r3, [r7, #4]
- 800a98e: 685b ldr r3, [r3, #4]
- 800a990: 61bb str r3, [r7, #24]
- temp &= ~(GPIO_OTYPER_OT0 << position) ;
- 800a992: 2201 movs r2, #1
- 800a994: 69fb ldr r3, [r7, #28]
- 800a996: fa02 f303 lsl.w r3, r2, r3
- 800a99a: 43db mvns r3, r3
- 800a99c: 69ba ldr r2, [r7, #24]
- 800a99e: 4013 ands r3, r2
- 800a9a0: 61bb str r3, [r7, #24]
- temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
- 800a9a2: 683b ldr r3, [r7, #0]
- 800a9a4: 685b ldr r3, [r3, #4]
- 800a9a6: 091b lsrs r3, r3, #4
- 800a9a8: f003 0201 and.w r2, r3, #1
- 800a9ac: 69fb ldr r3, [r7, #28]
- 800a9ae: fa02 f303 lsl.w r3, r2, r3
- 800a9b2: 69ba ldr r2, [r7, #24]
- 800a9b4: 4313 orrs r3, r2
- 800a9b6: 61bb str r3, [r7, #24]
- GPIOx->OTYPER = temp;
- 800a9b8: 687b ldr r3, [r7, #4]
- 800a9ba: 69ba ldr r2, [r7, #24]
- 800a9bc: 605a str r2, [r3, #4]
- }
- if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
- 800a9be: 683b ldr r3, [r7, #0]
- 800a9c0: 685b ldr r3, [r3, #4]
- 800a9c2: f003 0303 and.w r3, r3, #3
- 800a9c6: 2b03 cmp r3, #3
- 800a9c8: d017 beq.n 800a9fa <HAL_GPIO_Init+0xe2>
- {
- /* Check the Pull parameter */
- assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
- /* Activate the Pull-up or Pull down resistor for the current IO */
- temp = GPIOx->PUPDR;
- 800a9ca: 687b ldr r3, [r7, #4]
- 800a9cc: 68db ldr r3, [r3, #12]
- 800a9ce: 61bb str r3, [r7, #24]
- temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
- 800a9d0: 69fb ldr r3, [r7, #28]
- 800a9d2: 005b lsls r3, r3, #1
- 800a9d4: 2203 movs r2, #3
- 800a9d6: fa02 f303 lsl.w r3, r2, r3
- 800a9da: 43db mvns r3, r3
- 800a9dc: 69ba ldr r2, [r7, #24]
- 800a9de: 4013 ands r3, r2
- 800a9e0: 61bb str r3, [r7, #24]
- temp |= ((GPIO_Init->Pull) << (position * 2U));
- 800a9e2: 683b ldr r3, [r7, #0]
- 800a9e4: 689a ldr r2, [r3, #8]
- 800a9e6: 69fb ldr r3, [r7, #28]
- 800a9e8: 005b lsls r3, r3, #1
- 800a9ea: fa02 f303 lsl.w r3, r2, r3
- 800a9ee: 69ba ldr r2, [r7, #24]
- 800a9f0: 4313 orrs r3, r2
- 800a9f2: 61bb str r3, [r7, #24]
- GPIOx->PUPDR = temp;
- 800a9f4: 687b ldr r3, [r7, #4]
- 800a9f6: 69ba ldr r2, [r7, #24]
- 800a9f8: 60da str r2, [r3, #12]
- }
- /* In case of Alternate function mode selection */
- if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
- 800a9fa: 683b ldr r3, [r7, #0]
- 800a9fc: 685b ldr r3, [r3, #4]
- 800a9fe: f003 0303 and.w r3, r3, #3
- 800aa02: 2b02 cmp r3, #2
- 800aa04: d123 bne.n 800aa4e <HAL_GPIO_Init+0x136>
- /* Check the Alternate function parameters */
- assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
- assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
- /* Configure Alternate function mapped with the current IO */
- temp = GPIOx->AFR[position >> 3U];
- 800aa06: 69fb ldr r3, [r7, #28]
- 800aa08: 08da lsrs r2, r3, #3
- 800aa0a: 687b ldr r3, [r7, #4]
- 800aa0c: 3208 adds r2, #8
- 800aa0e: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 800aa12: 61bb str r3, [r7, #24]
- temp &= ~(0xFU << ((position & 0x07U) * 4U));
- 800aa14: 69fb ldr r3, [r7, #28]
- 800aa16: f003 0307 and.w r3, r3, #7
- 800aa1a: 009b lsls r3, r3, #2
- 800aa1c: 220f movs r2, #15
- 800aa1e: fa02 f303 lsl.w r3, r2, r3
- 800aa22: 43db mvns r3, r3
- 800aa24: 69ba ldr r2, [r7, #24]
- 800aa26: 4013 ands r3, r2
- 800aa28: 61bb str r3, [r7, #24]
- temp |= ((GPIO_Init->Alternate) << ((position & 0x07U) * 4U));
- 800aa2a: 683b ldr r3, [r7, #0]
- 800aa2c: 691a ldr r2, [r3, #16]
- 800aa2e: 69fb ldr r3, [r7, #28]
- 800aa30: f003 0307 and.w r3, r3, #7
- 800aa34: 009b lsls r3, r3, #2
- 800aa36: fa02 f303 lsl.w r3, r2, r3
- 800aa3a: 69ba ldr r2, [r7, #24]
- 800aa3c: 4313 orrs r3, r2
- 800aa3e: 61bb str r3, [r7, #24]
- GPIOx->AFR[position >> 3U] = temp;
- 800aa40: 69fb ldr r3, [r7, #28]
- 800aa42: 08da lsrs r2, r3, #3
- 800aa44: 687b ldr r3, [r7, #4]
- 800aa46: 3208 adds r2, #8
- 800aa48: 69b9 ldr r1, [r7, #24]
- 800aa4a: f843 1022 str.w r1, [r3, r2, lsl #2]
- }
- /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
- temp = GPIOx->MODER;
- 800aa4e: 687b ldr r3, [r7, #4]
- 800aa50: 681b ldr r3, [r3, #0]
- 800aa52: 61bb str r3, [r7, #24]
- temp &= ~(GPIO_MODER_MODE0 << (position * 2U));
- 800aa54: 69fb ldr r3, [r7, #28]
- 800aa56: 005b lsls r3, r3, #1
- 800aa58: 2203 movs r2, #3
- 800aa5a: fa02 f303 lsl.w r3, r2, r3
- 800aa5e: 43db mvns r3, r3
- 800aa60: 69ba ldr r2, [r7, #24]
- 800aa62: 4013 ands r3, r2
- 800aa64: 61bb str r3, [r7, #24]
- temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
- 800aa66: 683b ldr r3, [r7, #0]
- 800aa68: 685b ldr r3, [r3, #4]
- 800aa6a: f003 0203 and.w r2, r3, #3
- 800aa6e: 69fb ldr r3, [r7, #28]
- 800aa70: 005b lsls r3, r3, #1
- 800aa72: fa02 f303 lsl.w r3, r2, r3
- 800aa76: 69ba ldr r2, [r7, #24]
- 800aa78: 4313 orrs r3, r2
- 800aa7a: 61bb str r3, [r7, #24]
- GPIOx->MODER = temp;
- 800aa7c: 687b ldr r3, [r7, #4]
- 800aa7e: 69ba ldr r2, [r7, #24]
- 800aa80: 601a str r2, [r3, #0]
- /*--------------------- EXTI Mode Configuration ------------------------*/
- /* Configure the External Interrupt or event for the current IO */
- if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
- 800aa82: 683b ldr r3, [r7, #0]
- 800aa84: 685b ldr r3, [r3, #4]
- 800aa86: f403 3340 and.w r3, r3, #196608 @ 0x30000
- 800aa8a: 2b00 cmp r3, #0
- 800aa8c: f000 80e0 beq.w 800ac50 <HAL_GPIO_Init+0x338>
- {
- /* Enable SYSCFG Clock */
- __HAL_RCC_SYSCFG_CLK_ENABLE();
- 800aa90: 4b2f ldr r3, [pc, #188] @ (800ab50 <HAL_GPIO_Init+0x238>)
- 800aa92: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4
- 800aa96: 4a2e ldr r2, [pc, #184] @ (800ab50 <HAL_GPIO_Init+0x238>)
- 800aa98: f043 0302 orr.w r3, r3, #2
- 800aa9c: f8c2 30f4 str.w r3, [r2, #244] @ 0xf4
- 800aaa0: 4b2b ldr r3, [pc, #172] @ (800ab50 <HAL_GPIO_Init+0x238>)
- 800aaa2: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4
- 800aaa6: f003 0302 and.w r3, r3, #2
- 800aaaa: 60fb str r3, [r7, #12]
- 800aaac: 68fb ldr r3, [r7, #12]
- temp = SYSCFG->EXTICR[position >> 2U];
- 800aaae: 4a29 ldr r2, [pc, #164] @ (800ab54 <HAL_GPIO_Init+0x23c>)
- 800aab0: 69fb ldr r3, [r7, #28]
- 800aab2: 089b lsrs r3, r3, #2
- 800aab4: 3302 adds r3, #2
- 800aab6: f852 3023 ldr.w r3, [r2, r3, lsl #2]
- 800aaba: 61bb str r3, [r7, #24]
- temp &= ~(0x0FUL << (4U * (position & 0x03U)));
- 800aabc: 69fb ldr r3, [r7, #28]
- 800aabe: f003 0303 and.w r3, r3, #3
- 800aac2: 009b lsls r3, r3, #2
- 800aac4: 220f movs r2, #15
- 800aac6: fa02 f303 lsl.w r3, r2, r3
- 800aaca: 43db mvns r3, r3
- 800aacc: 69ba ldr r2, [r7, #24]
- 800aace: 4013 ands r3, r2
- 800aad0: 61bb str r3, [r7, #24]
- temp |= (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U)));
- 800aad2: 687b ldr r3, [r7, #4]
- 800aad4: 4a20 ldr r2, [pc, #128] @ (800ab58 <HAL_GPIO_Init+0x240>)
- 800aad6: 4293 cmp r3, r2
- 800aad8: d052 beq.n 800ab80 <HAL_GPIO_Init+0x268>
- 800aada: 687b ldr r3, [r7, #4]
- 800aadc: 4a1f ldr r2, [pc, #124] @ (800ab5c <HAL_GPIO_Init+0x244>)
- 800aade: 4293 cmp r3, r2
- 800aae0: d031 beq.n 800ab46 <HAL_GPIO_Init+0x22e>
- 800aae2: 687b ldr r3, [r7, #4]
- 800aae4: 4a1e ldr r2, [pc, #120] @ (800ab60 <HAL_GPIO_Init+0x248>)
- 800aae6: 4293 cmp r3, r2
- 800aae8: d02b beq.n 800ab42 <HAL_GPIO_Init+0x22a>
- 800aaea: 687b ldr r3, [r7, #4]
- 800aaec: 4a1d ldr r2, [pc, #116] @ (800ab64 <HAL_GPIO_Init+0x24c>)
- 800aaee: 4293 cmp r3, r2
- 800aaf0: d025 beq.n 800ab3e <HAL_GPIO_Init+0x226>
- 800aaf2: 687b ldr r3, [r7, #4]
- 800aaf4: 4a1c ldr r2, [pc, #112] @ (800ab68 <HAL_GPIO_Init+0x250>)
- 800aaf6: 4293 cmp r3, r2
- 800aaf8: d01f beq.n 800ab3a <HAL_GPIO_Init+0x222>
- 800aafa: 687b ldr r3, [r7, #4]
- 800aafc: 4a1b ldr r2, [pc, #108] @ (800ab6c <HAL_GPIO_Init+0x254>)
- 800aafe: 4293 cmp r3, r2
- 800ab00: d019 beq.n 800ab36 <HAL_GPIO_Init+0x21e>
- 800ab02: 687b ldr r3, [r7, #4]
- 800ab04: 4a1a ldr r2, [pc, #104] @ (800ab70 <HAL_GPIO_Init+0x258>)
- 800ab06: 4293 cmp r3, r2
- 800ab08: d013 beq.n 800ab32 <HAL_GPIO_Init+0x21a>
- 800ab0a: 687b ldr r3, [r7, #4]
- 800ab0c: 4a19 ldr r2, [pc, #100] @ (800ab74 <HAL_GPIO_Init+0x25c>)
- 800ab0e: 4293 cmp r3, r2
- 800ab10: d00d beq.n 800ab2e <HAL_GPIO_Init+0x216>
- 800ab12: 687b ldr r3, [r7, #4]
- 800ab14: 4a18 ldr r2, [pc, #96] @ (800ab78 <HAL_GPIO_Init+0x260>)
- 800ab16: 4293 cmp r3, r2
- 800ab18: d007 beq.n 800ab2a <HAL_GPIO_Init+0x212>
- 800ab1a: 687b ldr r3, [r7, #4]
- 800ab1c: 4a17 ldr r2, [pc, #92] @ (800ab7c <HAL_GPIO_Init+0x264>)
- 800ab1e: 4293 cmp r3, r2
- 800ab20: d101 bne.n 800ab26 <HAL_GPIO_Init+0x20e>
- 800ab22: 2309 movs r3, #9
- 800ab24: e02d b.n 800ab82 <HAL_GPIO_Init+0x26a>
- 800ab26: 230a movs r3, #10
- 800ab28: e02b b.n 800ab82 <HAL_GPIO_Init+0x26a>
- 800ab2a: 2308 movs r3, #8
- 800ab2c: e029 b.n 800ab82 <HAL_GPIO_Init+0x26a>
- 800ab2e: 2307 movs r3, #7
- 800ab30: e027 b.n 800ab82 <HAL_GPIO_Init+0x26a>
- 800ab32: 2306 movs r3, #6
- 800ab34: e025 b.n 800ab82 <HAL_GPIO_Init+0x26a>
- 800ab36: 2305 movs r3, #5
- 800ab38: e023 b.n 800ab82 <HAL_GPIO_Init+0x26a>
- 800ab3a: 2304 movs r3, #4
- 800ab3c: e021 b.n 800ab82 <HAL_GPIO_Init+0x26a>
- 800ab3e: 2303 movs r3, #3
- 800ab40: e01f b.n 800ab82 <HAL_GPIO_Init+0x26a>
- 800ab42: 2302 movs r3, #2
- 800ab44: e01d b.n 800ab82 <HAL_GPIO_Init+0x26a>
- 800ab46: 2301 movs r3, #1
- 800ab48: e01b b.n 800ab82 <HAL_GPIO_Init+0x26a>
- 800ab4a: bf00 nop
- 800ab4c: 58000080 .word 0x58000080
- 800ab50: 58024400 .word 0x58024400
- 800ab54: 58000400 .word 0x58000400
- 800ab58: 58020000 .word 0x58020000
- 800ab5c: 58020400 .word 0x58020400
- 800ab60: 58020800 .word 0x58020800
- 800ab64: 58020c00 .word 0x58020c00
- 800ab68: 58021000 .word 0x58021000
- 800ab6c: 58021400 .word 0x58021400
- 800ab70: 58021800 .word 0x58021800
- 800ab74: 58021c00 .word 0x58021c00
- 800ab78: 58022000 .word 0x58022000
- 800ab7c: 58022400 .word 0x58022400
- 800ab80: 2300 movs r3, #0
- 800ab82: 69fa ldr r2, [r7, #28]
- 800ab84: f002 0203 and.w r2, r2, #3
- 800ab88: 0092 lsls r2, r2, #2
- 800ab8a: 4093 lsls r3, r2
- 800ab8c: 69ba ldr r2, [r7, #24]
- 800ab8e: 4313 orrs r3, r2
- 800ab90: 61bb str r3, [r7, #24]
- SYSCFG->EXTICR[position >> 2U] = temp;
- 800ab92: 4938 ldr r1, [pc, #224] @ (800ac74 <HAL_GPIO_Init+0x35c>)
- 800ab94: 69fb ldr r3, [r7, #28]
- 800ab96: 089b lsrs r3, r3, #2
- 800ab98: 3302 adds r3, #2
- 800ab9a: 69ba ldr r2, [r7, #24]
- 800ab9c: f841 2023 str.w r2, [r1, r3, lsl #2]
- /* Clear Rising Falling edge configuration */
- temp = EXTI->RTSR1;
- 800aba0: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800aba4: 681b ldr r3, [r3, #0]
- 800aba6: 61bb str r3, [r7, #24]
- temp &= ~(iocurrent);
- 800aba8: 693b ldr r3, [r7, #16]
- 800abaa: 43db mvns r3, r3
- 800abac: 69ba ldr r2, [r7, #24]
- 800abae: 4013 ands r3, r2
- 800abb0: 61bb str r3, [r7, #24]
- if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
- 800abb2: 683b ldr r3, [r7, #0]
- 800abb4: 685b ldr r3, [r3, #4]
- 800abb6: f403 1380 and.w r3, r3, #1048576 @ 0x100000
- 800abba: 2b00 cmp r3, #0
- 800abbc: d003 beq.n 800abc6 <HAL_GPIO_Init+0x2ae>
- {
- temp |= iocurrent;
- 800abbe: 69ba ldr r2, [r7, #24]
- 800abc0: 693b ldr r3, [r7, #16]
- 800abc2: 4313 orrs r3, r2
- 800abc4: 61bb str r3, [r7, #24]
- }
- EXTI->RTSR1 = temp;
- 800abc6: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800abca: 69bb ldr r3, [r7, #24]
- 800abcc: 6013 str r3, [r2, #0]
- temp = EXTI->FTSR1;
- 800abce: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800abd2: 685b ldr r3, [r3, #4]
- 800abd4: 61bb str r3, [r7, #24]
- temp &= ~(iocurrent);
- 800abd6: 693b ldr r3, [r7, #16]
- 800abd8: 43db mvns r3, r3
- 800abda: 69ba ldr r2, [r7, #24]
- 800abdc: 4013 ands r3, r2
- 800abde: 61bb str r3, [r7, #24]
- if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
- 800abe0: 683b ldr r3, [r7, #0]
- 800abe2: 685b ldr r3, [r3, #4]
- 800abe4: f403 1300 and.w r3, r3, #2097152 @ 0x200000
- 800abe8: 2b00 cmp r3, #0
- 800abea: d003 beq.n 800abf4 <HAL_GPIO_Init+0x2dc>
- {
- temp |= iocurrent;
- 800abec: 69ba ldr r2, [r7, #24]
- 800abee: 693b ldr r3, [r7, #16]
- 800abf0: 4313 orrs r3, r2
- 800abf2: 61bb str r3, [r7, #24]
- }
- EXTI->FTSR1 = temp;
- 800abf4: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800abf8: 69bb ldr r3, [r7, #24]
- 800abfa: 6053 str r3, [r2, #4]
- temp = EXTI_CurrentCPU->EMR1;
- 800abfc: 697b ldr r3, [r7, #20]
- 800abfe: 685b ldr r3, [r3, #4]
- 800ac00: 61bb str r3, [r7, #24]
- temp &= ~(iocurrent);
- 800ac02: 693b ldr r3, [r7, #16]
- 800ac04: 43db mvns r3, r3
- 800ac06: 69ba ldr r2, [r7, #24]
- 800ac08: 4013 ands r3, r2
- 800ac0a: 61bb str r3, [r7, #24]
- if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
- 800ac0c: 683b ldr r3, [r7, #0]
- 800ac0e: 685b ldr r3, [r3, #4]
- 800ac10: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800ac14: 2b00 cmp r3, #0
- 800ac16: d003 beq.n 800ac20 <HAL_GPIO_Init+0x308>
- {
- temp |= iocurrent;
- 800ac18: 69ba ldr r2, [r7, #24]
- 800ac1a: 693b ldr r3, [r7, #16]
- 800ac1c: 4313 orrs r3, r2
- 800ac1e: 61bb str r3, [r7, #24]
- }
- EXTI_CurrentCPU->EMR1 = temp;
- 800ac20: 697b ldr r3, [r7, #20]
- 800ac22: 69ba ldr r2, [r7, #24]
- 800ac24: 605a str r2, [r3, #4]
- /* Clear EXTI line configuration */
- temp = EXTI_CurrentCPU->IMR1;
- 800ac26: 697b ldr r3, [r7, #20]
- 800ac28: 681b ldr r3, [r3, #0]
- 800ac2a: 61bb str r3, [r7, #24]
- temp &= ~(iocurrent);
- 800ac2c: 693b ldr r3, [r7, #16]
- 800ac2e: 43db mvns r3, r3
- 800ac30: 69ba ldr r2, [r7, #24]
- 800ac32: 4013 ands r3, r2
- 800ac34: 61bb str r3, [r7, #24]
- if ((GPIO_Init->Mode & EXTI_IT) != 0x00U)
- 800ac36: 683b ldr r3, [r7, #0]
- 800ac38: 685b ldr r3, [r3, #4]
- 800ac3a: f403 3380 and.w r3, r3, #65536 @ 0x10000
- 800ac3e: 2b00 cmp r3, #0
- 800ac40: d003 beq.n 800ac4a <HAL_GPIO_Init+0x332>
- {
- temp |= iocurrent;
- 800ac42: 69ba ldr r2, [r7, #24]
- 800ac44: 693b ldr r3, [r7, #16]
- 800ac46: 4313 orrs r3, r2
- 800ac48: 61bb str r3, [r7, #24]
- }
- EXTI_CurrentCPU->IMR1 = temp;
- 800ac4a: 697b ldr r3, [r7, #20]
- 800ac4c: 69ba ldr r2, [r7, #24]
- 800ac4e: 601a str r2, [r3, #0]
- }
- }
- position++;
- 800ac50: 69fb ldr r3, [r7, #28]
- 800ac52: 3301 adds r3, #1
- 800ac54: 61fb str r3, [r7, #28]
- while (((GPIO_Init->Pin) >> position) != 0x00U)
- 800ac56: 683b ldr r3, [r7, #0]
- 800ac58: 681a ldr r2, [r3, #0]
- 800ac5a: 69fb ldr r3, [r7, #28]
- 800ac5c: fa22 f303 lsr.w r3, r2, r3
- 800ac60: 2b00 cmp r3, #0
- 800ac62: f47f ae63 bne.w 800a92c <HAL_GPIO_Init+0x14>
- }
- }
- 800ac66: bf00 nop
- 800ac68: bf00 nop
- 800ac6a: 3724 adds r7, #36 @ 0x24
- 800ac6c: 46bd mov sp, r7
- 800ac6e: f85d 7b04 ldr.w r7, [sp], #4
- 800ac72: 4770 bx lr
- 800ac74: 58000400 .word 0x58000400
- 0800ac78 <HAL_GPIO_ReadPin>:
- * @param GPIO_Pin: specifies the port bit to read.
- * This parameter can be GPIO_PIN_x where x can be (0..15).
- * @retval The input port pin value.
- */
- GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
- {
- 800ac78: b480 push {r7}
- 800ac7a: b085 sub sp, #20
- 800ac7c: af00 add r7, sp, #0
- 800ac7e: 6078 str r0, [r7, #4]
- 800ac80: 460b mov r3, r1
- 800ac82: 807b strh r3, [r7, #2]
- GPIO_PinState bitstatus;
- /* Check the parameters */
- assert_param(IS_GPIO_PIN(GPIO_Pin));
- if ((GPIOx->IDR & GPIO_Pin) != 0x00U)
- 800ac84: 687b ldr r3, [r7, #4]
- 800ac86: 691a ldr r2, [r3, #16]
- 800ac88: 887b ldrh r3, [r7, #2]
- 800ac8a: 4013 ands r3, r2
- 800ac8c: 2b00 cmp r3, #0
- 800ac8e: d002 beq.n 800ac96 <HAL_GPIO_ReadPin+0x1e>
- {
- bitstatus = GPIO_PIN_SET;
- 800ac90: 2301 movs r3, #1
- 800ac92: 73fb strb r3, [r7, #15]
- 800ac94: e001 b.n 800ac9a <HAL_GPIO_ReadPin+0x22>
- }
- else
- {
- bitstatus = GPIO_PIN_RESET;
- 800ac96: 2300 movs r3, #0
- 800ac98: 73fb strb r3, [r7, #15]
- }
- return bitstatus;
- 800ac9a: 7bfb ldrb r3, [r7, #15]
- }
- 800ac9c: 4618 mov r0, r3
- 800ac9e: 3714 adds r7, #20
- 800aca0: 46bd mov sp, r7
- 800aca2: f85d 7b04 ldr.w r7, [sp], #4
- 800aca6: 4770 bx lr
- 0800aca8 <HAL_GPIO_WritePin>:
- * @arg GPIO_PIN_RESET: to clear the port pin
- * @arg GPIO_PIN_SET: to set the port pin
- * @retval None
- */
- void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
- {
- 800aca8: b480 push {r7}
- 800acaa: b083 sub sp, #12
- 800acac: af00 add r7, sp, #0
- 800acae: 6078 str r0, [r7, #4]
- 800acb0: 460b mov r3, r1
- 800acb2: 807b strh r3, [r7, #2]
- 800acb4: 4613 mov r3, r2
- 800acb6: 707b strb r3, [r7, #1]
- /* Check the parameters */
- assert_param(IS_GPIO_PIN(GPIO_Pin));
- assert_param(IS_GPIO_PIN_ACTION(PinState));
- if (PinState != GPIO_PIN_RESET)
- 800acb8: 787b ldrb r3, [r7, #1]
- 800acba: 2b00 cmp r3, #0
- 800acbc: d003 beq.n 800acc6 <HAL_GPIO_WritePin+0x1e>
- {
- GPIOx->BSRR = GPIO_Pin;
- 800acbe: 887a ldrh r2, [r7, #2]
- 800acc0: 687b ldr r3, [r7, #4]
- 800acc2: 619a str r2, [r3, #24]
- }
- else
- {
- GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
- }
- }
- 800acc4: e003 b.n 800acce <HAL_GPIO_WritePin+0x26>
- GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
- 800acc6: 887b ldrh r3, [r7, #2]
- 800acc8: 041a lsls r2, r3, #16
- 800acca: 687b ldr r3, [r7, #4]
- 800accc: 619a str r2, [r3, #24]
- }
- 800acce: bf00 nop
- 800acd0: 370c adds r7, #12
- 800acd2: 46bd mov sp, r7
- 800acd4: f85d 7b04 ldr.w r7, [sp], #4
- 800acd8: 4770 bx lr
- 0800acda <HAL_GPIO_TogglePin>:
- * @param GPIOx: Where x can be (A..K) to select the GPIO peripheral.
- * @param GPIO_Pin: Specifies the pins to be toggled.
- * @retval None
- */
- void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
- {
- 800acda: b480 push {r7}
- 800acdc: b085 sub sp, #20
- 800acde: af00 add r7, sp, #0
- 800ace0: 6078 str r0, [r7, #4]
- 800ace2: 460b mov r3, r1
- 800ace4: 807b strh r3, [r7, #2]
- /* Check the parameters */
- assert_param(IS_GPIO_PIN(GPIO_Pin));
- /* get current Output Data Register value */
- odr = GPIOx->ODR;
- 800ace6: 687b ldr r3, [r7, #4]
- 800ace8: 695b ldr r3, [r3, #20]
- 800acea: 60fb str r3, [r7, #12]
- /* Set selected pins that were at low level, and reset ones that were high */
- GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
- 800acec: 887a ldrh r2, [r7, #2]
- 800acee: 68fb ldr r3, [r7, #12]
- 800acf0: 4013 ands r3, r2
- 800acf2: 041a lsls r2, r3, #16
- 800acf4: 68fb ldr r3, [r7, #12]
- 800acf6: 43d9 mvns r1, r3
- 800acf8: 887b ldrh r3, [r7, #2]
- 800acfa: 400b ands r3, r1
- 800acfc: 431a orrs r2, r3
- 800acfe: 687b ldr r3, [r7, #4]
- 800ad00: 619a str r2, [r3, #24]
- }
- 800ad02: bf00 nop
- 800ad04: 3714 adds r7, #20
- 800ad06: 46bd mov sp, r7
- 800ad08: f85d 7b04 ldr.w r7, [sp], #4
- 800ad0c: 4770 bx lr
- 0800ad0e <HAL_GPIO_EXTI_IRQHandler>:
- * @brief Handle EXTI interrupt request.
- * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line.
- * @retval None
- */
- void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
- {
- 800ad0e: b580 push {r7, lr}
- 800ad10: b082 sub sp, #8
- 800ad12: af00 add r7, sp, #0
- 800ad14: 4603 mov r3, r0
- 800ad16: 80fb strh r3, [r7, #6]
- __HAL_GPIO_EXTID2_CLEAR_IT(GPIO_Pin);
- HAL_GPIO_EXTI_Callback(GPIO_Pin);
- }
- #else
- /* EXTI line interrupt detected */
- if (__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != 0x00U)
- 800ad18: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800ad1c: f8d3 2088 ldr.w r2, [r3, #136] @ 0x88
- 800ad20: 88fb ldrh r3, [r7, #6]
- 800ad22: 4013 ands r3, r2
- 800ad24: 2b00 cmp r3, #0
- 800ad26: d008 beq.n 800ad3a <HAL_GPIO_EXTI_IRQHandler+0x2c>
- {
- __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
- 800ad28: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800ad2c: 88fb ldrh r3, [r7, #6]
- 800ad2e: f8c2 3088 str.w r3, [r2, #136] @ 0x88
- HAL_GPIO_EXTI_Callback(GPIO_Pin);
- 800ad32: 88fb ldrh r3, [r7, #6]
- 800ad34: 4618 mov r0, r3
- 800ad36: f7f5 fccf bl 80006d8 <HAL_GPIO_EXTI_Callback>
- }
- #endif
- }
- 800ad3a: bf00 nop
- 800ad3c: 3708 adds r7, #8
- 800ad3e: 46bd mov sp, r7
- 800ad40: bd80 pop {r7, pc}
- 0800ad42 <HAL_IWDG_Init>:
- * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
- * the configuration information for the specified IWDG module.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
- {
- 800ad42: b580 push {r7, lr}
- 800ad44: b084 sub sp, #16
- 800ad46: af00 add r7, sp, #0
- 800ad48: 6078 str r0, [r7, #4]
- uint32_t tickstart;
- /* Check the IWDG handle allocation */
- if (hiwdg == NULL)
- 800ad4a: 687b ldr r3, [r7, #4]
- 800ad4c: 2b00 cmp r3, #0
- 800ad4e: d101 bne.n 800ad54 <HAL_IWDG_Init+0x12>
- {
- return HAL_ERROR;
- 800ad50: 2301 movs r3, #1
- 800ad52: e041 b.n 800add8 <HAL_IWDG_Init+0x96>
- assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
- assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
- assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
- /* Enable IWDG. LSI is turned on automatically */
- __HAL_IWDG_START(hiwdg);
- 800ad54: 687b ldr r3, [r7, #4]
- 800ad56: 681b ldr r3, [r3, #0]
- 800ad58: f64c 42cc movw r2, #52428 @ 0xcccc
- 800ad5c: 601a str r2, [r3, #0]
- /* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
- 0x5555 in KR */
- IWDG_ENABLE_WRITE_ACCESS(hiwdg);
- 800ad5e: 687b ldr r3, [r7, #4]
- 800ad60: 681b ldr r3, [r3, #0]
- 800ad62: f245 5255 movw r2, #21845 @ 0x5555
- 800ad66: 601a str r2, [r3, #0]
- /* Write to IWDG registers the Prescaler & Reload values to work with */
- hiwdg->Instance->PR = hiwdg->Init.Prescaler;
- 800ad68: 687b ldr r3, [r7, #4]
- 800ad6a: 681b ldr r3, [r3, #0]
- 800ad6c: 687a ldr r2, [r7, #4]
- 800ad6e: 6852 ldr r2, [r2, #4]
- 800ad70: 605a str r2, [r3, #4]
- hiwdg->Instance->RLR = hiwdg->Init.Reload;
- 800ad72: 687b ldr r3, [r7, #4]
- 800ad74: 681b ldr r3, [r3, #0]
- 800ad76: 687a ldr r2, [r7, #4]
- 800ad78: 6892 ldr r2, [r2, #8]
- 800ad7a: 609a str r2, [r3, #8]
- /* Check pending flag, if previous update not done, return timeout */
- tickstart = HAL_GetTick();
- 800ad7c: f7fa fbf4 bl 8005568 <HAL_GetTick>
- 800ad80: 60f8 str r0, [r7, #12]
- /* Wait for register to be updated */
- while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
- 800ad82: e00f b.n 800ada4 <HAL_IWDG_Init+0x62>
- {
- if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
- 800ad84: f7fa fbf0 bl 8005568 <HAL_GetTick>
- 800ad88: 4602 mov r2, r0
- 800ad8a: 68fb ldr r3, [r7, #12]
- 800ad8c: 1ad3 subs r3, r2, r3
- 800ad8e: 2b31 cmp r3, #49 @ 0x31
- 800ad90: d908 bls.n 800ada4 <HAL_IWDG_Init+0x62>
- {
- if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
- 800ad92: 687b ldr r3, [r7, #4]
- 800ad94: 681b ldr r3, [r3, #0]
- 800ad96: 68db ldr r3, [r3, #12]
- 800ad98: f003 0307 and.w r3, r3, #7
- 800ad9c: 2b00 cmp r3, #0
- 800ad9e: d001 beq.n 800ada4 <HAL_IWDG_Init+0x62>
- {
- return HAL_TIMEOUT;
- 800ada0: 2303 movs r3, #3
- 800ada2: e019 b.n 800add8 <HAL_IWDG_Init+0x96>
- while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
- 800ada4: 687b ldr r3, [r7, #4]
- 800ada6: 681b ldr r3, [r3, #0]
- 800ada8: 68db ldr r3, [r3, #12]
- 800adaa: f003 0307 and.w r3, r3, #7
- 800adae: 2b00 cmp r3, #0
- 800adb0: d1e8 bne.n 800ad84 <HAL_IWDG_Init+0x42>
- }
- }
- /* If window parameter is different than current value, modify window
- register */
- if (hiwdg->Instance->WINR != hiwdg->Init.Window)
- 800adb2: 687b ldr r3, [r7, #4]
- 800adb4: 681b ldr r3, [r3, #0]
- 800adb6: 691a ldr r2, [r3, #16]
- 800adb8: 687b ldr r3, [r7, #4]
- 800adba: 68db ldr r3, [r3, #12]
- 800adbc: 429a cmp r2, r3
- 800adbe: d005 beq.n 800adcc <HAL_IWDG_Init+0x8a>
- {
- /* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
- even if window feature is disabled, Watchdog will be reloaded by writing
- windows register */
- hiwdg->Instance->WINR = hiwdg->Init.Window;
- 800adc0: 687b ldr r3, [r7, #4]
- 800adc2: 681b ldr r3, [r3, #0]
- 800adc4: 687a ldr r2, [r7, #4]
- 800adc6: 68d2 ldr r2, [r2, #12]
- 800adc8: 611a str r2, [r3, #16]
- 800adca: e004 b.n 800add6 <HAL_IWDG_Init+0x94>
- }
- else
- {
- /* Reload IWDG counter with value defined in the reload register */
- __HAL_IWDG_RELOAD_COUNTER(hiwdg);
- 800adcc: 687b ldr r3, [r7, #4]
- 800adce: 681b ldr r3, [r3, #0]
- 800add0: f64a 22aa movw r2, #43690 @ 0xaaaa
- 800add4: 601a str r2, [r3, #0]
- }
- /* Return function status */
- return HAL_OK;
- 800add6: 2300 movs r3, #0
- }
- 800add8: 4618 mov r0, r3
- 800adda: 3710 adds r7, #16
- 800addc: 46bd mov sp, r7
- 800adde: bd80 pop {r7, pc}
- 0800ade0 <HAL_IWDG_Refresh>:
- * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
- * the configuration information for the specified IWDG module.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
- {
- 800ade0: b480 push {r7}
- 800ade2: b083 sub sp, #12
- 800ade4: af00 add r7, sp, #0
- 800ade6: 6078 str r0, [r7, #4]
- /* Reload IWDG counter with value defined in the reload register */
- __HAL_IWDG_RELOAD_COUNTER(hiwdg);
- 800ade8: 687b ldr r3, [r7, #4]
- 800adea: 681b ldr r3, [r3, #0]
- 800adec: f64a 22aa movw r2, #43690 @ 0xaaaa
- 800adf0: 601a str r2, [r3, #0]
- /* Return function status */
- return HAL_OK;
- 800adf2: 2300 movs r3, #0
- }
- 800adf4: 4618 mov r0, r3
- 800adf6: 370c adds r7, #12
- 800adf8: 46bd mov sp, r7
- 800adfa: f85d 7b04 ldr.w r7, [sp], #4
- 800adfe: 4770 bx lr
- 0800ae00 <HAL_PWR_ConfigPVD>:
- * driver. All combination are allowed: wake up only Cortex-M7, wake up
- * only Cortex-M4 or wake up Cortex-M7 and Cortex-M4.
- * @retval None.
- */
- void HAL_PWR_ConfigPVD (PWR_PVDTypeDef *sConfigPVD)
- {
- 800ae00: b480 push {r7}
- 800ae02: b083 sub sp, #12
- 800ae04: af00 add r7, sp, #0
- 800ae06: 6078 str r0, [r7, #4]
- /* Check the PVD configuration parameter */
- if (sConfigPVD == NULL)
- 800ae08: 687b ldr r3, [r7, #4]
- 800ae0a: 2b00 cmp r3, #0
- 800ae0c: d069 beq.n 800aee2 <HAL_PWR_ConfigPVD+0xe2>
- /* Check the parameters */
- assert_param (IS_PWR_PVD_LEVEL (sConfigPVD->PVDLevel));
- assert_param (IS_PWR_PVD_MODE (sConfigPVD->Mode));
- /* Set PLS[7:5] bits according to PVDLevel value */
- MODIFY_REG (PWR->CR1, PWR_CR1_PLS, sConfigPVD->PVDLevel);
- 800ae0e: 4b38 ldr r3, [pc, #224] @ (800aef0 <HAL_PWR_ConfigPVD+0xf0>)
- 800ae10: 681b ldr r3, [r3, #0]
- 800ae12: f023 02e0 bic.w r2, r3, #224 @ 0xe0
- 800ae16: 687b ldr r3, [r7, #4]
- 800ae18: 681b ldr r3, [r3, #0]
- 800ae1a: 4935 ldr r1, [pc, #212] @ (800aef0 <HAL_PWR_ConfigPVD+0xf0>)
- 800ae1c: 4313 orrs r3, r2
- 800ae1e: 600b str r3, [r1, #0]
- /* Clear previous config */
- #if !defined (DUAL_CORE)
- __HAL_PWR_PVD_EXTI_DISABLE_EVENT ();
- 800ae20: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800ae24: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
- 800ae28: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800ae2c: f423 3380 bic.w r3, r3, #65536 @ 0x10000
- 800ae30: f8c2 3084 str.w r3, [r2, #132] @ 0x84
- __HAL_PWR_PVD_EXTI_DISABLE_IT ();
- 800ae34: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800ae38: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 800ae3c: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800ae40: f423 3380 bic.w r3, r3, #65536 @ 0x10000
- 800ae44: f8c2 3080 str.w r3, [r2, #128] @ 0x80
- #endif /* !defined (DUAL_CORE) */
- __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE ();
- 800ae48: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800ae4c: 681b ldr r3, [r3, #0]
- 800ae4e: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800ae52: f423 3380 bic.w r3, r3, #65536 @ 0x10000
- 800ae56: 6013 str r3, [r2, #0]
- __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE ();
- 800ae58: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800ae5c: 685b ldr r3, [r3, #4]
- 800ae5e: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800ae62: f423 3380 bic.w r3, r3, #65536 @ 0x10000
- 800ae66: 6053 str r3, [r2, #4]
- #if !defined (DUAL_CORE)
- /* Interrupt mode configuration */
- if ((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
- 800ae68: 687b ldr r3, [r7, #4]
- 800ae6a: 685b ldr r3, [r3, #4]
- 800ae6c: f403 3380 and.w r3, r3, #65536 @ 0x10000
- 800ae70: 2b00 cmp r3, #0
- 800ae72: d009 beq.n 800ae88 <HAL_PWR_ConfigPVD+0x88>
- {
- __HAL_PWR_PVD_EXTI_ENABLE_IT ();
- 800ae74: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800ae78: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 800ae7c: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800ae80: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 800ae84: f8c2 3080 str.w r3, [r2, #128] @ 0x80
- }
- /* Event mode configuration */
- if ((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
- 800ae88: 687b ldr r3, [r7, #4]
- 800ae8a: 685b ldr r3, [r3, #4]
- 800ae8c: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800ae90: 2b00 cmp r3, #0
- 800ae92: d009 beq.n 800aea8 <HAL_PWR_ConfigPVD+0xa8>
- {
- __HAL_PWR_PVD_EXTI_ENABLE_EVENT ();
- 800ae94: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800ae98: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
- 800ae9c: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800aea0: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 800aea4: f8c2 3084 str.w r3, [r2, #132] @ 0x84
- }
- #endif /* !defined (DUAL_CORE) */
- /* Rising edge configuration */
- if ((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
- 800aea8: 687b ldr r3, [r7, #4]
- 800aeaa: 685b ldr r3, [r3, #4]
- 800aeac: f003 0301 and.w r3, r3, #1
- 800aeb0: 2b00 cmp r3, #0
- 800aeb2: d007 beq.n 800aec4 <HAL_PWR_ConfigPVD+0xc4>
- {
- __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE ();
- 800aeb4: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800aeb8: 681b ldr r3, [r3, #0]
- 800aeba: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800aebe: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 800aec2: 6013 str r3, [r2, #0]
- }
- /* Falling edge configuration */
- if ((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
- 800aec4: 687b ldr r3, [r7, #4]
- 800aec6: 685b ldr r3, [r3, #4]
- 800aec8: f003 0302 and.w r3, r3, #2
- 800aecc: 2b00 cmp r3, #0
- 800aece: d009 beq.n 800aee4 <HAL_PWR_ConfigPVD+0xe4>
- {
- __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE ();
- 800aed0: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800aed4: 685b ldr r3, [r3, #4]
- 800aed6: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800aeda: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 800aede: 6053 str r3, [r2, #4]
- 800aee0: e000 b.n 800aee4 <HAL_PWR_ConfigPVD+0xe4>
- return;
- 800aee2: bf00 nop
- }
- }
- 800aee4: 370c adds r7, #12
- 800aee6: 46bd mov sp, r7
- 800aee8: f85d 7b04 ldr.w r7, [sp], #4
- 800aeec: 4770 bx lr
- 800aeee: bf00 nop
- 800aef0: 58024800 .word 0x58024800
- 0800aef4 <HAL_PWR_EnablePVD>:
- /**
- * @brief Enable the Programmable Voltage Detector (PVD).
- * @retval None.
- */
- void HAL_PWR_EnablePVD (void)
- {
- 800aef4: b480 push {r7}
- 800aef6: af00 add r7, sp, #0
- /* Enable the power voltage detector */
- SET_BIT (PWR->CR1, PWR_CR1_PVDEN);
- 800aef8: 4b05 ldr r3, [pc, #20] @ (800af10 <HAL_PWR_EnablePVD+0x1c>)
- 800aefa: 681b ldr r3, [r3, #0]
- 800aefc: 4a04 ldr r2, [pc, #16] @ (800af10 <HAL_PWR_EnablePVD+0x1c>)
- 800aefe: f043 0310 orr.w r3, r3, #16
- 800af02: 6013 str r3, [r2, #0]
- }
- 800af04: bf00 nop
- 800af06: 46bd mov sp, r7
- 800af08: f85d 7b04 ldr.w r7, [sp], #4
- 800af0c: 4770 bx lr
- 800af0e: bf00 nop
- 800af10: 58024800 .word 0x58024800
- 0800af14 <HAL_PWREx_ConfigSupply>:
- * PWR_SMPS_2V5_SUPPLIES_EXT are used only for lines that supports SMPS
- * regulator.
- * @retval HAL status.
- */
- HAL_StatusTypeDef HAL_PWREx_ConfigSupply (uint32_t SupplySource)
- {
- 800af14: b580 push {r7, lr}
- 800af16: b084 sub sp, #16
- 800af18: af00 add r7, sp, #0
- 800af1a: 6078 str r0, [r7, #4]
- /* Check the parameters */
- assert_param (IS_PWR_SUPPLY (SupplySource));
- /* Check if supply source was configured */
- #if defined (PWR_FLAG_SCUEN)
- if (__HAL_PWR_GET_FLAG (PWR_FLAG_SCUEN) == 0U)
- 800af1c: 4b19 ldr r3, [pc, #100] @ (800af84 <HAL_PWREx_ConfigSupply+0x70>)
- 800af1e: 68db ldr r3, [r3, #12]
- 800af20: f003 0304 and.w r3, r3, #4
- 800af24: 2b04 cmp r3, #4
- 800af26: d00a beq.n 800af3e <HAL_PWREx_ConfigSupply+0x2a>
- #else
- if ((PWR->CR3 & (PWR_CR3_SMPSEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS)) != (PWR_CR3_SMPSEN | PWR_CR3_LDOEN))
- #endif /* defined (PWR_FLAG_SCUEN) */
- {
- /* Check supply configuration */
- if ((PWR->CR3 & PWR_SUPPLY_CONFIG_MASK) != SupplySource)
- 800af28: 4b16 ldr r3, [pc, #88] @ (800af84 <HAL_PWREx_ConfigSupply+0x70>)
- 800af2a: 68db ldr r3, [r3, #12]
- 800af2c: f003 0307 and.w r3, r3, #7
- 800af30: 687a ldr r2, [r7, #4]
- 800af32: 429a cmp r2, r3
- 800af34: d001 beq.n 800af3a <HAL_PWREx_ConfigSupply+0x26>
- {
- /* Supply configuration update locked, can't apply a new supply config */
- return HAL_ERROR;
- 800af36: 2301 movs r3, #1
- 800af38: e01f b.n 800af7a <HAL_PWREx_ConfigSupply+0x66>
- else
- {
- /* Supply configuration update locked, but new supply configuration
- matches with old supply configuration : nothing to do
- */
- return HAL_OK;
- 800af3a: 2300 movs r3, #0
- 800af3c: e01d b.n 800af7a <HAL_PWREx_ConfigSupply+0x66>
- }
- }
- /* Set the power supply configuration */
- MODIFY_REG (PWR->CR3, PWR_SUPPLY_CONFIG_MASK, SupplySource);
- 800af3e: 4b11 ldr r3, [pc, #68] @ (800af84 <HAL_PWREx_ConfigSupply+0x70>)
- 800af40: 68db ldr r3, [r3, #12]
- 800af42: f023 0207 bic.w r2, r3, #7
- 800af46: 490f ldr r1, [pc, #60] @ (800af84 <HAL_PWREx_ConfigSupply+0x70>)
- 800af48: 687b ldr r3, [r7, #4]
- 800af4a: 4313 orrs r3, r2
- 800af4c: 60cb str r3, [r1, #12]
- /* Get tick */
- tickstart = HAL_GetTick ();
- 800af4e: f7fa fb0b bl 8005568 <HAL_GetTick>
- 800af52: 60f8 str r0, [r7, #12]
- /* Wait till voltage level flag is set */
- while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U)
- 800af54: e009 b.n 800af6a <HAL_PWREx_ConfigSupply+0x56>
- {
- if ((HAL_GetTick () - tickstart) > PWR_FLAG_SETTING_DELAY)
- 800af56: f7fa fb07 bl 8005568 <HAL_GetTick>
- 800af5a: 4602 mov r2, r0
- 800af5c: 68fb ldr r3, [r7, #12]
- 800af5e: 1ad3 subs r3, r2, r3
- 800af60: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8
- 800af64: d901 bls.n 800af6a <HAL_PWREx_ConfigSupply+0x56>
- {
- return HAL_ERROR;
- 800af66: 2301 movs r3, #1
- 800af68: e007 b.n 800af7a <HAL_PWREx_ConfigSupply+0x66>
- while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U)
- 800af6a: 4b06 ldr r3, [pc, #24] @ (800af84 <HAL_PWREx_ConfigSupply+0x70>)
- 800af6c: 685b ldr r3, [r3, #4]
- 800af6e: f403 5300 and.w r3, r3, #8192 @ 0x2000
- 800af72: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
- 800af76: d1ee bne.n 800af56 <HAL_PWREx_ConfigSupply+0x42>
- }
- }
- }
- #endif /* defined (SMPS) */
- return HAL_OK;
- 800af78: 2300 movs r3, #0
- }
- 800af7a: 4618 mov r0, r3
- 800af7c: 3710 adds r7, #16
- 800af7e: 46bd mov sp, r7
- 800af80: bd80 pop {r7, pc}
- 800af82: bf00 nop
- 800af84: 58024800 .word 0x58024800
- 0800af88 <HAL_PWREx_ConfigAVD>:
- * driver. All combination are allowed: wake up only Cortex-M7, wake up
- * only Cortex-M4 and wake up Cortex-M7 and Cortex-M4.
- * @retval None.
- */
- void HAL_PWREx_ConfigAVD (PWREx_AVDTypeDef *sConfigAVD)
- {
- 800af88: b480 push {r7}
- 800af8a: b083 sub sp, #12
- 800af8c: af00 add r7, sp, #0
- 800af8e: 6078 str r0, [r7, #4]
- /* Check the parameters */
- assert_param (IS_PWR_AVD_LEVEL (sConfigAVD->AVDLevel));
- assert_param (IS_PWR_AVD_MODE (sConfigAVD->Mode));
- /* Set the ALS[18:17] bits according to AVDLevel value */
- MODIFY_REG (PWR->CR1, PWR_CR1_ALS, sConfigAVD->AVDLevel);
- 800af90: 4b37 ldr r3, [pc, #220] @ (800b070 <HAL_PWREx_ConfigAVD+0xe8>)
- 800af92: 681b ldr r3, [r3, #0]
- 800af94: f423 22c0 bic.w r2, r3, #393216 @ 0x60000
- 800af98: 687b ldr r3, [r7, #4]
- 800af9a: 681b ldr r3, [r3, #0]
- 800af9c: 4934 ldr r1, [pc, #208] @ (800b070 <HAL_PWREx_ConfigAVD+0xe8>)
- 800af9e: 4313 orrs r3, r2
- 800afa0: 600b str r3, [r1, #0]
- /* Clear any previous config */
- #if !defined (DUAL_CORE)
- __HAL_PWR_AVD_EXTI_DISABLE_EVENT ();
- 800afa2: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800afa6: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
- 800afaa: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800afae: f423 3380 bic.w r3, r3, #65536 @ 0x10000
- 800afb2: f8c2 3084 str.w r3, [r2, #132] @ 0x84
- __HAL_PWR_AVD_EXTI_DISABLE_IT ();
- 800afb6: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800afba: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 800afbe: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800afc2: f423 3380 bic.w r3, r3, #65536 @ 0x10000
- 800afc6: f8c2 3080 str.w r3, [r2, #128] @ 0x80
- #endif /* !defined (DUAL_CORE) */
- __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE ();
- 800afca: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800afce: 681b ldr r3, [r3, #0]
- 800afd0: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800afd4: f423 3380 bic.w r3, r3, #65536 @ 0x10000
- 800afd8: 6013 str r3, [r2, #0]
- __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE ();
- 800afda: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800afde: 685b ldr r3, [r3, #4]
- 800afe0: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800afe4: f423 3380 bic.w r3, r3, #65536 @ 0x10000
- 800afe8: 6053 str r3, [r2, #4]
- #if !defined (DUAL_CORE)
- /* Configure the interrupt mode */
- if ((sConfigAVD->Mode & AVD_MODE_IT) == AVD_MODE_IT)
- 800afea: 687b ldr r3, [r7, #4]
- 800afec: 685b ldr r3, [r3, #4]
- 800afee: f403 3380 and.w r3, r3, #65536 @ 0x10000
- 800aff2: 2b00 cmp r3, #0
- 800aff4: d009 beq.n 800b00a <HAL_PWREx_ConfigAVD+0x82>
- {
- __HAL_PWR_AVD_EXTI_ENABLE_IT ();
- 800aff6: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800affa: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 800affe: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800b002: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 800b006: f8c2 3080 str.w r3, [r2, #128] @ 0x80
- }
- /* Configure the event mode */
- if ((sConfigAVD->Mode & AVD_MODE_EVT) == AVD_MODE_EVT)
- 800b00a: 687b ldr r3, [r7, #4]
- 800b00c: 685b ldr r3, [r3, #4]
- 800b00e: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800b012: 2b00 cmp r3, #0
- 800b014: d009 beq.n 800b02a <HAL_PWREx_ConfigAVD+0xa2>
- {
- __HAL_PWR_AVD_EXTI_ENABLE_EVENT ();
- 800b016: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800b01a: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
- 800b01e: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800b022: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 800b026: f8c2 3084 str.w r3, [r2, #132] @ 0x84
- }
- #endif /* !defined (DUAL_CORE) */
- /* Rising edge configuration */
- if ((sConfigAVD->Mode & AVD_RISING_EDGE) == AVD_RISING_EDGE)
- 800b02a: 687b ldr r3, [r7, #4]
- 800b02c: 685b ldr r3, [r3, #4]
- 800b02e: f003 0301 and.w r3, r3, #1
- 800b032: 2b00 cmp r3, #0
- 800b034: d007 beq.n 800b046 <HAL_PWREx_ConfigAVD+0xbe>
- {
- __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE ();
- 800b036: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800b03a: 681b ldr r3, [r3, #0]
- 800b03c: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800b040: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 800b044: 6013 str r3, [r2, #0]
- }
- /* Falling edge configuration */
- if ((sConfigAVD->Mode & AVD_FALLING_EDGE) == AVD_FALLING_EDGE)
- 800b046: 687b ldr r3, [r7, #4]
- 800b048: 685b ldr r3, [r3, #4]
- 800b04a: f003 0302 and.w r3, r3, #2
- 800b04e: 2b00 cmp r3, #0
- 800b050: d007 beq.n 800b062 <HAL_PWREx_ConfigAVD+0xda>
- {
- __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE ();
- 800b052: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
- 800b056: 685b ldr r3, [r3, #4]
- 800b058: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
- 800b05c: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 800b060: 6053 str r3, [r2, #4]
- }
- }
- 800b062: bf00 nop
- 800b064: 370c adds r7, #12
- 800b066: 46bd mov sp, r7
- 800b068: f85d 7b04 ldr.w r7, [sp], #4
- 800b06c: 4770 bx lr
- 800b06e: bf00 nop
- 800b070: 58024800 .word 0x58024800
- 0800b074 <HAL_PWREx_EnableAVD>:
- /**
- * @brief Enable the Analog Voltage Detector (AVD).
- * @retval None.
- */
- void HAL_PWREx_EnableAVD (void)
- {
- 800b074: b480 push {r7}
- 800b076: af00 add r7, sp, #0
- /* Enable the Analog Voltage Detector */
- SET_BIT (PWR->CR1, PWR_CR1_AVDEN);
- 800b078: 4b05 ldr r3, [pc, #20] @ (800b090 <HAL_PWREx_EnableAVD+0x1c>)
- 800b07a: 681b ldr r3, [r3, #0]
- 800b07c: 4a04 ldr r2, [pc, #16] @ (800b090 <HAL_PWREx_EnableAVD+0x1c>)
- 800b07e: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 800b082: 6013 str r3, [r2, #0]
- }
- 800b084: bf00 nop
- 800b086: 46bd mov sp, r7
- 800b088: f85d 7b04 ldr.w r7, [sp], #4
- 800b08c: 4770 bx lr
- 800b08e: bf00 nop
- 800b090: 58024800 .word 0x58024800
- 0800b094 <HAL_RCC_OscConfig>:
- * supported by this function. User should request a transition to HSE Off
- * first and then HSE On or HSE Bypass.
- * @retval HAL status
- */
- __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
- {
- 800b094: b580 push {r7, lr}
- 800b096: b08c sub sp, #48 @ 0x30
- 800b098: af00 add r7, sp, #0
- 800b09a: 6078 str r0, [r7, #4]
- uint32_t tickstart;
- uint32_t temp1_pllckcfg, temp2_pllckcfg;
- /* Check Null pointer */
- if (RCC_OscInitStruct == NULL)
- 800b09c: 687b ldr r3, [r7, #4]
- 800b09e: 2b00 cmp r3, #0
- 800b0a0: d102 bne.n 800b0a8 <HAL_RCC_OscConfig+0x14>
- {
- return HAL_ERROR;
- 800b0a2: 2301 movs r3, #1
- 800b0a4: f000 bc48 b.w 800b938 <HAL_RCC_OscConfig+0x8a4>
- }
- /* Check the parameters */
- assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
- /*------------------------------- HSE Configuration ------------------------*/
- if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
- 800b0a8: 687b ldr r3, [r7, #4]
- 800b0aa: 681b ldr r3, [r3, #0]
- 800b0ac: f003 0301 and.w r3, r3, #1
- 800b0b0: 2b00 cmp r3, #0
- 800b0b2: f000 8088 beq.w 800b1c6 <HAL_RCC_OscConfig+0x132>
- {
- /* Check the parameters */
- assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
- const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
- 800b0b6: 4b99 ldr r3, [pc, #612] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b0b8: 691b ldr r3, [r3, #16]
- 800b0ba: f003 0338 and.w r3, r3, #56 @ 0x38
- 800b0be: 62fb str r3, [r7, #44] @ 0x2c
- const uint32_t temp_pllckselr = RCC->PLLCKSELR;
- 800b0c0: 4b96 ldr r3, [pc, #600] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b0c2: 6a9b ldr r3, [r3, #40] @ 0x28
- 800b0c4: 62bb str r3, [r7, #40] @ 0x28
- /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
- if ((temp_sysclksrc == RCC_CFGR_SWS_HSE) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSE)))
- 800b0c6: 6afb ldr r3, [r7, #44] @ 0x2c
- 800b0c8: 2b10 cmp r3, #16
- 800b0ca: d007 beq.n 800b0dc <HAL_RCC_OscConfig+0x48>
- 800b0cc: 6afb ldr r3, [r7, #44] @ 0x2c
- 800b0ce: 2b18 cmp r3, #24
- 800b0d0: d111 bne.n 800b0f6 <HAL_RCC_OscConfig+0x62>
- 800b0d2: 6abb ldr r3, [r7, #40] @ 0x28
- 800b0d4: f003 0303 and.w r3, r3, #3
- 800b0d8: 2b02 cmp r3, #2
- 800b0da: d10c bne.n 800b0f6 <HAL_RCC_OscConfig+0x62>
- {
- if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 800b0dc: 4b8f ldr r3, [pc, #572] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b0de: 681b ldr r3, [r3, #0]
- 800b0e0: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800b0e4: 2b00 cmp r3, #0
- 800b0e6: d06d beq.n 800b1c4 <HAL_RCC_OscConfig+0x130>
- 800b0e8: 687b ldr r3, [r7, #4]
- 800b0ea: 685b ldr r3, [r3, #4]
- 800b0ec: 2b00 cmp r3, #0
- 800b0ee: d169 bne.n 800b1c4 <HAL_RCC_OscConfig+0x130>
- {
- return HAL_ERROR;
- 800b0f0: 2301 movs r3, #1
- 800b0f2: f000 bc21 b.w 800b938 <HAL_RCC_OscConfig+0x8a4>
- }
- }
- else
- {
- /* Set the new HSE configuration ---------------------------------------*/
- __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
- 800b0f6: 687b ldr r3, [r7, #4]
- 800b0f8: 685b ldr r3, [r3, #4]
- 800b0fa: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
- 800b0fe: d106 bne.n 800b10e <HAL_RCC_OscConfig+0x7a>
- 800b100: 4b86 ldr r3, [pc, #536] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b102: 681b ldr r3, [r3, #0]
- 800b104: 4a85 ldr r2, [pc, #532] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b106: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 800b10a: 6013 str r3, [r2, #0]
- 800b10c: e02e b.n 800b16c <HAL_RCC_OscConfig+0xd8>
- 800b10e: 687b ldr r3, [r7, #4]
- 800b110: 685b ldr r3, [r3, #4]
- 800b112: 2b00 cmp r3, #0
- 800b114: d10c bne.n 800b130 <HAL_RCC_OscConfig+0x9c>
- 800b116: 4b81 ldr r3, [pc, #516] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b118: 681b ldr r3, [r3, #0]
- 800b11a: 4a80 ldr r2, [pc, #512] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b11c: f423 3380 bic.w r3, r3, #65536 @ 0x10000
- 800b120: 6013 str r3, [r2, #0]
- 800b122: 4b7e ldr r3, [pc, #504] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b124: 681b ldr r3, [r3, #0]
- 800b126: 4a7d ldr r2, [pc, #500] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b128: f423 2380 bic.w r3, r3, #262144 @ 0x40000
- 800b12c: 6013 str r3, [r2, #0]
- 800b12e: e01d b.n 800b16c <HAL_RCC_OscConfig+0xd8>
- 800b130: 687b ldr r3, [r7, #4]
- 800b132: 685b ldr r3, [r3, #4]
- 800b134: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
- 800b138: d10c bne.n 800b154 <HAL_RCC_OscConfig+0xc0>
- 800b13a: 4b78 ldr r3, [pc, #480] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b13c: 681b ldr r3, [r3, #0]
- 800b13e: 4a77 ldr r2, [pc, #476] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b140: f443 2380 orr.w r3, r3, #262144 @ 0x40000
- 800b144: 6013 str r3, [r2, #0]
- 800b146: 4b75 ldr r3, [pc, #468] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b148: 681b ldr r3, [r3, #0]
- 800b14a: 4a74 ldr r2, [pc, #464] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b14c: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 800b150: 6013 str r3, [r2, #0]
- 800b152: e00b b.n 800b16c <HAL_RCC_OscConfig+0xd8>
- 800b154: 4b71 ldr r3, [pc, #452] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b156: 681b ldr r3, [r3, #0]
- 800b158: 4a70 ldr r2, [pc, #448] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b15a: f423 3380 bic.w r3, r3, #65536 @ 0x10000
- 800b15e: 6013 str r3, [r2, #0]
- 800b160: 4b6e ldr r3, [pc, #440] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b162: 681b ldr r3, [r3, #0]
- 800b164: 4a6d ldr r2, [pc, #436] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b166: f423 2380 bic.w r3, r3, #262144 @ 0x40000
- 800b16a: 6013 str r3, [r2, #0]
- /* Check the HSE State */
- if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
- 800b16c: 687b ldr r3, [r7, #4]
- 800b16e: 685b ldr r3, [r3, #4]
- 800b170: 2b00 cmp r3, #0
- 800b172: d013 beq.n 800b19c <HAL_RCC_OscConfig+0x108>
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b174: f7fa f9f8 bl 8005568 <HAL_GetTick>
- 800b178: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till HSE is ready */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
- 800b17a: e008 b.n 800b18e <HAL_RCC_OscConfig+0xfa>
- {
- if ((uint32_t)(HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
- 800b17c: f7fa f9f4 bl 8005568 <HAL_GetTick>
- 800b180: 4602 mov r2, r0
- 800b182: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b184: 1ad3 subs r3, r2, r3
- 800b186: 2b64 cmp r3, #100 @ 0x64
- 800b188: d901 bls.n 800b18e <HAL_RCC_OscConfig+0xfa>
- {
- return HAL_TIMEOUT;
- 800b18a: 2303 movs r3, #3
- 800b18c: e3d4 b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
- 800b18e: 4b63 ldr r3, [pc, #396] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b190: 681b ldr r3, [r3, #0]
- 800b192: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800b196: 2b00 cmp r3, #0
- 800b198: d0f0 beq.n 800b17c <HAL_RCC_OscConfig+0xe8>
- 800b19a: e014 b.n 800b1c6 <HAL_RCC_OscConfig+0x132>
- }
- }
- else
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b19c: f7fa f9e4 bl 8005568 <HAL_GetTick>
- 800b1a0: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till HSE is disabled */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
- 800b1a2: e008 b.n 800b1b6 <HAL_RCC_OscConfig+0x122>
- {
- if ((uint32_t)(HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
- 800b1a4: f7fa f9e0 bl 8005568 <HAL_GetTick>
- 800b1a8: 4602 mov r2, r0
- 800b1aa: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b1ac: 1ad3 subs r3, r2, r3
- 800b1ae: 2b64 cmp r3, #100 @ 0x64
- 800b1b0: d901 bls.n 800b1b6 <HAL_RCC_OscConfig+0x122>
- {
- return HAL_TIMEOUT;
- 800b1b2: 2303 movs r3, #3
- 800b1b4: e3c0 b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
- 800b1b6: 4b59 ldr r3, [pc, #356] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b1b8: 681b ldr r3, [r3, #0]
- 800b1ba: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800b1be: 2b00 cmp r3, #0
- 800b1c0: d1f0 bne.n 800b1a4 <HAL_RCC_OscConfig+0x110>
- 800b1c2: e000 b.n 800b1c6 <HAL_RCC_OscConfig+0x132>
- if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 800b1c4: bf00 nop
- }
- }
- }
- }
- /*----------------------------- HSI Configuration --------------------------*/
- if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
- 800b1c6: 687b ldr r3, [r7, #4]
- 800b1c8: 681b ldr r3, [r3, #0]
- 800b1ca: f003 0302 and.w r3, r3, #2
- 800b1ce: 2b00 cmp r3, #0
- 800b1d0: f000 80ca beq.w 800b368 <HAL_RCC_OscConfig+0x2d4>
- /* Check the parameters */
- assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
- assert_param(IS_RCC_HSICALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
- /* When the HSI is used as system clock it will not be disabled */
- const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
- 800b1d4: 4b51 ldr r3, [pc, #324] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b1d6: 691b ldr r3, [r3, #16]
- 800b1d8: f003 0338 and.w r3, r3, #56 @ 0x38
- 800b1dc: 623b str r3, [r7, #32]
- const uint32_t temp_pllckselr = RCC->PLLCKSELR;
- 800b1de: 4b4f ldr r3, [pc, #316] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b1e0: 6a9b ldr r3, [r3, #40] @ 0x28
- 800b1e2: 61fb str r3, [r7, #28]
- if ((temp_sysclksrc == RCC_CFGR_SWS_HSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSI)))
- 800b1e4: 6a3b ldr r3, [r7, #32]
- 800b1e6: 2b00 cmp r3, #0
- 800b1e8: d007 beq.n 800b1fa <HAL_RCC_OscConfig+0x166>
- 800b1ea: 6a3b ldr r3, [r7, #32]
- 800b1ec: 2b18 cmp r3, #24
- 800b1ee: d156 bne.n 800b29e <HAL_RCC_OscConfig+0x20a>
- 800b1f0: 69fb ldr r3, [r7, #28]
- 800b1f2: f003 0303 and.w r3, r3, #3
- 800b1f6: 2b00 cmp r3, #0
- 800b1f8: d151 bne.n 800b29e <HAL_RCC_OscConfig+0x20a>
- {
- /* When HSI is used as system clock it will not be disabled */
- if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
- 800b1fa: 4b48 ldr r3, [pc, #288] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b1fc: 681b ldr r3, [r3, #0]
- 800b1fe: f003 0304 and.w r3, r3, #4
- 800b202: 2b00 cmp r3, #0
- 800b204: d005 beq.n 800b212 <HAL_RCC_OscConfig+0x17e>
- 800b206: 687b ldr r3, [r7, #4]
- 800b208: 68db ldr r3, [r3, #12]
- 800b20a: 2b00 cmp r3, #0
- 800b20c: d101 bne.n 800b212 <HAL_RCC_OscConfig+0x17e>
- {
- return HAL_ERROR;
- 800b20e: 2301 movs r3, #1
- 800b210: e392 b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- }
- /* Otherwise, only HSI division and calibration are allowed */
- else
- {
- /* Enable the Internal High Speed oscillator (HSI, HSIDIV2, HSIDIV4, or HSIDIV8) */
- __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
- 800b212: 4b42 ldr r3, [pc, #264] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b214: 681b ldr r3, [r3, #0]
- 800b216: f023 0219 bic.w r2, r3, #25
- 800b21a: 687b ldr r3, [r7, #4]
- 800b21c: 68db ldr r3, [r3, #12]
- 800b21e: 493f ldr r1, [pc, #252] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b220: 4313 orrs r3, r2
- 800b222: 600b str r3, [r1, #0]
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b224: f7fa f9a0 bl 8005568 <HAL_GetTick>
- 800b228: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till HSI is ready */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
- 800b22a: e008 b.n 800b23e <HAL_RCC_OscConfig+0x1aa>
- {
- if ((uint32_t)(HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
- 800b22c: f7fa f99c bl 8005568 <HAL_GetTick>
- 800b230: 4602 mov r2, r0
- 800b232: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b234: 1ad3 subs r3, r2, r3
- 800b236: 2b02 cmp r3, #2
- 800b238: d901 bls.n 800b23e <HAL_RCC_OscConfig+0x1aa>
- {
- return HAL_TIMEOUT;
- 800b23a: 2303 movs r3, #3
- 800b23c: e37c b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
- 800b23e: 4b37 ldr r3, [pc, #220] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b240: 681b ldr r3, [r3, #0]
- 800b242: f003 0304 and.w r3, r3, #4
- 800b246: 2b00 cmp r3, #0
- 800b248: d0f0 beq.n 800b22c <HAL_RCC_OscConfig+0x198>
- }
- }
- /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
- __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 800b24a: f7fa f999 bl 8005580 <HAL_GetREVID>
- 800b24e: 4603 mov r3, r0
- 800b250: f241 0203 movw r2, #4099 @ 0x1003
- 800b254: 4293 cmp r3, r2
- 800b256: d817 bhi.n 800b288 <HAL_RCC_OscConfig+0x1f4>
- 800b258: 687b ldr r3, [r7, #4]
- 800b25a: 691b ldr r3, [r3, #16]
- 800b25c: 2b40 cmp r3, #64 @ 0x40
- 800b25e: d108 bne.n 800b272 <HAL_RCC_OscConfig+0x1de>
- 800b260: 4b2e ldr r3, [pc, #184] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b262: 685b ldr r3, [r3, #4]
- 800b264: f423 337c bic.w r3, r3, #258048 @ 0x3f000
- 800b268: 4a2c ldr r2, [pc, #176] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b26a: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800b26e: 6053 str r3, [r2, #4]
- if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
- 800b270: e07a b.n 800b368 <HAL_RCC_OscConfig+0x2d4>
- __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 800b272: 4b2a ldr r3, [pc, #168] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b274: 685b ldr r3, [r3, #4]
- 800b276: f423 327c bic.w r2, r3, #258048 @ 0x3f000
- 800b27a: 687b ldr r3, [r7, #4]
- 800b27c: 691b ldr r3, [r3, #16]
- 800b27e: 031b lsls r3, r3, #12
- 800b280: 4926 ldr r1, [pc, #152] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b282: 4313 orrs r3, r2
- 800b284: 604b str r3, [r1, #4]
- if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
- 800b286: e06f b.n 800b368 <HAL_RCC_OscConfig+0x2d4>
- __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 800b288: 4b24 ldr r3, [pc, #144] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b28a: 685b ldr r3, [r3, #4]
- 800b28c: f023 42fe bic.w r2, r3, #2130706432 @ 0x7f000000
- 800b290: 687b ldr r3, [r7, #4]
- 800b292: 691b ldr r3, [r3, #16]
- 800b294: 061b lsls r3, r3, #24
- 800b296: 4921 ldr r1, [pc, #132] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b298: 4313 orrs r3, r2
- 800b29a: 604b str r3, [r1, #4]
- if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
- 800b29c: e064 b.n 800b368 <HAL_RCC_OscConfig+0x2d4>
- }
- else
- {
- /* Check the HSI State */
- if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
- 800b29e: 687b ldr r3, [r7, #4]
- 800b2a0: 68db ldr r3, [r3, #12]
- 800b2a2: 2b00 cmp r3, #0
- 800b2a4: d047 beq.n 800b336 <HAL_RCC_OscConfig+0x2a2>
- {
- /* Enable the Internal High Speed oscillator (HSI, HSIDIV2,HSIDIV4, or HSIDIV8) */
- __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
- 800b2a6: 4b1d ldr r3, [pc, #116] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b2a8: 681b ldr r3, [r3, #0]
- 800b2aa: f023 0219 bic.w r2, r3, #25
- 800b2ae: 687b ldr r3, [r7, #4]
- 800b2b0: 68db ldr r3, [r3, #12]
- 800b2b2: 491a ldr r1, [pc, #104] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b2b4: 4313 orrs r3, r2
- 800b2b6: 600b str r3, [r1, #0]
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b2b8: f7fa f956 bl 8005568 <HAL_GetTick>
- 800b2bc: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till HSI is ready */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
- 800b2be: e008 b.n 800b2d2 <HAL_RCC_OscConfig+0x23e>
- {
- if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
- 800b2c0: f7fa f952 bl 8005568 <HAL_GetTick>
- 800b2c4: 4602 mov r2, r0
- 800b2c6: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b2c8: 1ad3 subs r3, r2, r3
- 800b2ca: 2b02 cmp r3, #2
- 800b2cc: d901 bls.n 800b2d2 <HAL_RCC_OscConfig+0x23e>
- {
- return HAL_TIMEOUT;
- 800b2ce: 2303 movs r3, #3
- 800b2d0: e332 b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
- 800b2d2: 4b12 ldr r3, [pc, #72] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b2d4: 681b ldr r3, [r3, #0]
- 800b2d6: f003 0304 and.w r3, r3, #4
- 800b2da: 2b00 cmp r3, #0
- 800b2dc: d0f0 beq.n 800b2c0 <HAL_RCC_OscConfig+0x22c>
- }
- }
- /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
- __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 800b2de: f7fa f94f bl 8005580 <HAL_GetREVID>
- 800b2e2: 4603 mov r3, r0
- 800b2e4: f241 0203 movw r2, #4099 @ 0x1003
- 800b2e8: 4293 cmp r3, r2
- 800b2ea: d819 bhi.n 800b320 <HAL_RCC_OscConfig+0x28c>
- 800b2ec: 687b ldr r3, [r7, #4]
- 800b2ee: 691b ldr r3, [r3, #16]
- 800b2f0: 2b40 cmp r3, #64 @ 0x40
- 800b2f2: d108 bne.n 800b306 <HAL_RCC_OscConfig+0x272>
- 800b2f4: 4b09 ldr r3, [pc, #36] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b2f6: 685b ldr r3, [r3, #4]
- 800b2f8: f423 337c bic.w r3, r3, #258048 @ 0x3f000
- 800b2fc: 4a07 ldr r2, [pc, #28] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b2fe: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800b302: 6053 str r3, [r2, #4]
- 800b304: e030 b.n 800b368 <HAL_RCC_OscConfig+0x2d4>
- 800b306: 4b05 ldr r3, [pc, #20] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b308: 685b ldr r3, [r3, #4]
- 800b30a: f423 327c bic.w r2, r3, #258048 @ 0x3f000
- 800b30e: 687b ldr r3, [r7, #4]
- 800b310: 691b ldr r3, [r3, #16]
- 800b312: 031b lsls r3, r3, #12
- 800b314: 4901 ldr r1, [pc, #4] @ (800b31c <HAL_RCC_OscConfig+0x288>)
- 800b316: 4313 orrs r3, r2
- 800b318: 604b str r3, [r1, #4]
- 800b31a: e025 b.n 800b368 <HAL_RCC_OscConfig+0x2d4>
- 800b31c: 58024400 .word 0x58024400
- 800b320: 4b9a ldr r3, [pc, #616] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b322: 685b ldr r3, [r3, #4]
- 800b324: f023 42fe bic.w r2, r3, #2130706432 @ 0x7f000000
- 800b328: 687b ldr r3, [r7, #4]
- 800b32a: 691b ldr r3, [r3, #16]
- 800b32c: 061b lsls r3, r3, #24
- 800b32e: 4997 ldr r1, [pc, #604] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b330: 4313 orrs r3, r2
- 800b332: 604b str r3, [r1, #4]
- 800b334: e018 b.n 800b368 <HAL_RCC_OscConfig+0x2d4>
- }
- else
- {
- /* Disable the Internal High Speed oscillator (HSI). */
- __HAL_RCC_HSI_DISABLE();
- 800b336: 4b95 ldr r3, [pc, #596] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b338: 681b ldr r3, [r3, #0]
- 800b33a: 4a94 ldr r2, [pc, #592] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b33c: f023 0301 bic.w r3, r3, #1
- 800b340: 6013 str r3, [r2, #0]
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b342: f7fa f911 bl 8005568 <HAL_GetTick>
- 800b346: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till HSI is disabled */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
- 800b348: e008 b.n 800b35c <HAL_RCC_OscConfig+0x2c8>
- {
- if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
- 800b34a: f7fa f90d bl 8005568 <HAL_GetTick>
- 800b34e: 4602 mov r2, r0
- 800b350: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b352: 1ad3 subs r3, r2, r3
- 800b354: 2b02 cmp r3, #2
- 800b356: d901 bls.n 800b35c <HAL_RCC_OscConfig+0x2c8>
- {
- return HAL_TIMEOUT;
- 800b358: 2303 movs r3, #3
- 800b35a: e2ed b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
- 800b35c: 4b8b ldr r3, [pc, #556] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b35e: 681b ldr r3, [r3, #0]
- 800b360: f003 0304 and.w r3, r3, #4
- 800b364: 2b00 cmp r3, #0
- 800b366: d1f0 bne.n 800b34a <HAL_RCC_OscConfig+0x2b6>
- }
- }
- }
- }
- /*----------------------------- CSI Configuration --------------------------*/
- if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_CSI) == RCC_OSCILLATORTYPE_CSI)
- 800b368: 687b ldr r3, [r7, #4]
- 800b36a: 681b ldr r3, [r3, #0]
- 800b36c: f003 0310 and.w r3, r3, #16
- 800b370: 2b00 cmp r3, #0
- 800b372: f000 80a9 beq.w 800b4c8 <HAL_RCC_OscConfig+0x434>
- /* Check the parameters */
- assert_param(IS_RCC_CSI(RCC_OscInitStruct->CSIState));
- assert_param(IS_RCC_CSICALIBRATION_VALUE(RCC_OscInitStruct->CSICalibrationValue));
- /* When the CSI is used as system clock it will not disabled */
- const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
- 800b376: 4b85 ldr r3, [pc, #532] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b378: 691b ldr r3, [r3, #16]
- 800b37a: f003 0338 and.w r3, r3, #56 @ 0x38
- 800b37e: 61bb str r3, [r7, #24]
- const uint32_t temp_pllckselr = RCC->PLLCKSELR;
- 800b380: 4b82 ldr r3, [pc, #520] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b382: 6a9b ldr r3, [r3, #40] @ 0x28
- 800b384: 617b str r3, [r7, #20]
- if ((temp_sysclksrc == RCC_CFGR_SWS_CSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_CSI)))
- 800b386: 69bb ldr r3, [r7, #24]
- 800b388: 2b08 cmp r3, #8
- 800b38a: d007 beq.n 800b39c <HAL_RCC_OscConfig+0x308>
- 800b38c: 69bb ldr r3, [r7, #24]
- 800b38e: 2b18 cmp r3, #24
- 800b390: d13a bne.n 800b408 <HAL_RCC_OscConfig+0x374>
- 800b392: 697b ldr r3, [r7, #20]
- 800b394: f003 0303 and.w r3, r3, #3
- 800b398: 2b01 cmp r3, #1
- 800b39a: d135 bne.n 800b408 <HAL_RCC_OscConfig+0x374>
- {
- /* When CSI is used as system clock it will not disabled */
- if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
- 800b39c: 4b7b ldr r3, [pc, #492] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b39e: 681b ldr r3, [r3, #0]
- 800b3a0: f403 7380 and.w r3, r3, #256 @ 0x100
- 800b3a4: 2b00 cmp r3, #0
- 800b3a6: d005 beq.n 800b3b4 <HAL_RCC_OscConfig+0x320>
- 800b3a8: 687b ldr r3, [r7, #4]
- 800b3aa: 69db ldr r3, [r3, #28]
- 800b3ac: 2b80 cmp r3, #128 @ 0x80
- 800b3ae: d001 beq.n 800b3b4 <HAL_RCC_OscConfig+0x320>
- {
- return HAL_ERROR;
- 800b3b0: 2301 movs r3, #1
- 800b3b2: e2c1 b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- }
- /* Otherwise, just the calibration is allowed */
- else
- {
- /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/
- __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
- 800b3b4: f7fa f8e4 bl 8005580 <HAL_GetREVID>
- 800b3b8: 4603 mov r3, r0
- 800b3ba: f241 0203 movw r2, #4099 @ 0x1003
- 800b3be: 4293 cmp r3, r2
- 800b3c0: d817 bhi.n 800b3f2 <HAL_RCC_OscConfig+0x35e>
- 800b3c2: 687b ldr r3, [r7, #4]
- 800b3c4: 6a1b ldr r3, [r3, #32]
- 800b3c6: 2b20 cmp r3, #32
- 800b3c8: d108 bne.n 800b3dc <HAL_RCC_OscConfig+0x348>
- 800b3ca: 4b70 ldr r3, [pc, #448] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b3cc: 685b ldr r3, [r3, #4]
- 800b3ce: f023 43f8 bic.w r3, r3, #2080374784 @ 0x7c000000
- 800b3d2: 4a6e ldr r2, [pc, #440] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b3d4: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000
- 800b3d8: 6053 str r3, [r2, #4]
- if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
- 800b3da: e075 b.n 800b4c8 <HAL_RCC_OscConfig+0x434>
- __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
- 800b3dc: 4b6b ldr r3, [pc, #428] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b3de: 685b ldr r3, [r3, #4]
- 800b3e0: f023 42f8 bic.w r2, r3, #2080374784 @ 0x7c000000
- 800b3e4: 687b ldr r3, [r7, #4]
- 800b3e6: 6a1b ldr r3, [r3, #32]
- 800b3e8: 069b lsls r3, r3, #26
- 800b3ea: 4968 ldr r1, [pc, #416] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b3ec: 4313 orrs r3, r2
- 800b3ee: 604b str r3, [r1, #4]
- if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
- 800b3f0: e06a b.n 800b4c8 <HAL_RCC_OscConfig+0x434>
- __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
- 800b3f2: 4b66 ldr r3, [pc, #408] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b3f4: 68db ldr r3, [r3, #12]
- 800b3f6: f023 527c bic.w r2, r3, #1056964608 @ 0x3f000000
- 800b3fa: 687b ldr r3, [r7, #4]
- 800b3fc: 6a1b ldr r3, [r3, #32]
- 800b3fe: 061b lsls r3, r3, #24
- 800b400: 4962 ldr r1, [pc, #392] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b402: 4313 orrs r3, r2
- 800b404: 60cb str r3, [r1, #12]
- if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
- 800b406: e05f b.n 800b4c8 <HAL_RCC_OscConfig+0x434>
- }
- }
- else
- {
- /* Check the CSI State */
- if ((RCC_OscInitStruct->CSIState) != RCC_CSI_OFF)
- 800b408: 687b ldr r3, [r7, #4]
- 800b40a: 69db ldr r3, [r3, #28]
- 800b40c: 2b00 cmp r3, #0
- 800b40e: d042 beq.n 800b496 <HAL_RCC_OscConfig+0x402>
- {
- /* Enable the Internal High Speed oscillator (CSI). */
- __HAL_RCC_CSI_ENABLE();
- 800b410: 4b5e ldr r3, [pc, #376] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b412: 681b ldr r3, [r3, #0]
- 800b414: 4a5d ldr r2, [pc, #372] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b416: f043 0380 orr.w r3, r3, #128 @ 0x80
- 800b41a: 6013 str r3, [r2, #0]
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b41c: f7fa f8a4 bl 8005568 <HAL_GetTick>
- 800b420: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till CSI is ready */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
- 800b422: e008 b.n 800b436 <HAL_RCC_OscConfig+0x3a2>
- {
- if ((HAL_GetTick() - tickstart) > CSI_TIMEOUT_VALUE)
- 800b424: f7fa f8a0 bl 8005568 <HAL_GetTick>
- 800b428: 4602 mov r2, r0
- 800b42a: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b42c: 1ad3 subs r3, r2, r3
- 800b42e: 2b02 cmp r3, #2
- 800b430: d901 bls.n 800b436 <HAL_RCC_OscConfig+0x3a2>
- {
- return HAL_TIMEOUT;
- 800b432: 2303 movs r3, #3
- 800b434: e280 b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
- 800b436: 4b55 ldr r3, [pc, #340] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b438: 681b ldr r3, [r3, #0]
- 800b43a: f403 7380 and.w r3, r3, #256 @ 0x100
- 800b43e: 2b00 cmp r3, #0
- 800b440: d0f0 beq.n 800b424 <HAL_RCC_OscConfig+0x390>
- }
- }
- /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/
- __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
- 800b442: f7fa f89d bl 8005580 <HAL_GetREVID>
- 800b446: 4603 mov r3, r0
- 800b448: f241 0203 movw r2, #4099 @ 0x1003
- 800b44c: 4293 cmp r3, r2
- 800b44e: d817 bhi.n 800b480 <HAL_RCC_OscConfig+0x3ec>
- 800b450: 687b ldr r3, [r7, #4]
- 800b452: 6a1b ldr r3, [r3, #32]
- 800b454: 2b20 cmp r3, #32
- 800b456: d108 bne.n 800b46a <HAL_RCC_OscConfig+0x3d6>
- 800b458: 4b4c ldr r3, [pc, #304] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b45a: 685b ldr r3, [r3, #4]
- 800b45c: f023 43f8 bic.w r3, r3, #2080374784 @ 0x7c000000
- 800b460: 4a4a ldr r2, [pc, #296] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b462: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000
- 800b466: 6053 str r3, [r2, #4]
- 800b468: e02e b.n 800b4c8 <HAL_RCC_OscConfig+0x434>
- 800b46a: 4b48 ldr r3, [pc, #288] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b46c: 685b ldr r3, [r3, #4]
- 800b46e: f023 42f8 bic.w r2, r3, #2080374784 @ 0x7c000000
- 800b472: 687b ldr r3, [r7, #4]
- 800b474: 6a1b ldr r3, [r3, #32]
- 800b476: 069b lsls r3, r3, #26
- 800b478: 4944 ldr r1, [pc, #272] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b47a: 4313 orrs r3, r2
- 800b47c: 604b str r3, [r1, #4]
- 800b47e: e023 b.n 800b4c8 <HAL_RCC_OscConfig+0x434>
- 800b480: 4b42 ldr r3, [pc, #264] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b482: 68db ldr r3, [r3, #12]
- 800b484: f023 527c bic.w r2, r3, #1056964608 @ 0x3f000000
- 800b488: 687b ldr r3, [r7, #4]
- 800b48a: 6a1b ldr r3, [r3, #32]
- 800b48c: 061b lsls r3, r3, #24
- 800b48e: 493f ldr r1, [pc, #252] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b490: 4313 orrs r3, r2
- 800b492: 60cb str r3, [r1, #12]
- 800b494: e018 b.n 800b4c8 <HAL_RCC_OscConfig+0x434>
- }
- else
- {
- /* Disable the Internal High Speed oscillator (CSI). */
- __HAL_RCC_CSI_DISABLE();
- 800b496: 4b3d ldr r3, [pc, #244] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b498: 681b ldr r3, [r3, #0]
- 800b49a: 4a3c ldr r2, [pc, #240] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b49c: f023 0380 bic.w r3, r3, #128 @ 0x80
- 800b4a0: 6013 str r3, [r2, #0]
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b4a2: f7fa f861 bl 8005568 <HAL_GetTick>
- 800b4a6: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till CSI is disabled */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U)
- 800b4a8: e008 b.n 800b4bc <HAL_RCC_OscConfig+0x428>
- {
- if ((HAL_GetTick() - tickstart) > CSI_TIMEOUT_VALUE)
- 800b4aa: f7fa f85d bl 8005568 <HAL_GetTick>
- 800b4ae: 4602 mov r2, r0
- 800b4b0: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b4b2: 1ad3 subs r3, r2, r3
- 800b4b4: 2b02 cmp r3, #2
- 800b4b6: d901 bls.n 800b4bc <HAL_RCC_OscConfig+0x428>
- {
- return HAL_TIMEOUT;
- 800b4b8: 2303 movs r3, #3
- 800b4ba: e23d b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U)
- 800b4bc: 4b33 ldr r3, [pc, #204] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b4be: 681b ldr r3, [r3, #0]
- 800b4c0: f403 7380 and.w r3, r3, #256 @ 0x100
- 800b4c4: 2b00 cmp r3, #0
- 800b4c6: d1f0 bne.n 800b4aa <HAL_RCC_OscConfig+0x416>
- }
- }
- }
- }
- /*------------------------------ LSI Configuration -------------------------*/
- if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
- 800b4c8: 687b ldr r3, [r7, #4]
- 800b4ca: 681b ldr r3, [r3, #0]
- 800b4cc: f003 0308 and.w r3, r3, #8
- 800b4d0: 2b00 cmp r3, #0
- 800b4d2: d036 beq.n 800b542 <HAL_RCC_OscConfig+0x4ae>
- {
- /* Check the parameters */
- assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
- /* Check the LSI State */
- if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
- 800b4d4: 687b ldr r3, [r7, #4]
- 800b4d6: 695b ldr r3, [r3, #20]
- 800b4d8: 2b00 cmp r3, #0
- 800b4da: d019 beq.n 800b510 <HAL_RCC_OscConfig+0x47c>
- {
- /* Enable the Internal Low Speed oscillator (LSI). */
- __HAL_RCC_LSI_ENABLE();
- 800b4dc: 4b2b ldr r3, [pc, #172] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b4de: 6f5b ldr r3, [r3, #116] @ 0x74
- 800b4e0: 4a2a ldr r2, [pc, #168] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b4e2: f043 0301 orr.w r3, r3, #1
- 800b4e6: 6753 str r3, [r2, #116] @ 0x74
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b4e8: f7fa f83e bl 8005568 <HAL_GetTick>
- 800b4ec: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till LSI is ready */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
- 800b4ee: e008 b.n 800b502 <HAL_RCC_OscConfig+0x46e>
- {
- if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
- 800b4f0: f7fa f83a bl 8005568 <HAL_GetTick>
- 800b4f4: 4602 mov r2, r0
- 800b4f6: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b4f8: 1ad3 subs r3, r2, r3
- 800b4fa: 2b02 cmp r3, #2
- 800b4fc: d901 bls.n 800b502 <HAL_RCC_OscConfig+0x46e>
- {
- return HAL_TIMEOUT;
- 800b4fe: 2303 movs r3, #3
- 800b500: e21a b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
- 800b502: 4b22 ldr r3, [pc, #136] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b504: 6f5b ldr r3, [r3, #116] @ 0x74
- 800b506: f003 0302 and.w r3, r3, #2
- 800b50a: 2b00 cmp r3, #0
- 800b50c: d0f0 beq.n 800b4f0 <HAL_RCC_OscConfig+0x45c>
- 800b50e: e018 b.n 800b542 <HAL_RCC_OscConfig+0x4ae>
- }
- }
- else
- {
- /* Disable the Internal Low Speed oscillator (LSI). */
- __HAL_RCC_LSI_DISABLE();
- 800b510: 4b1e ldr r3, [pc, #120] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b512: 6f5b ldr r3, [r3, #116] @ 0x74
- 800b514: 4a1d ldr r2, [pc, #116] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b516: f023 0301 bic.w r3, r3, #1
- 800b51a: 6753 str r3, [r2, #116] @ 0x74
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b51c: f7fa f824 bl 8005568 <HAL_GetTick>
- 800b520: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till LSI is ready */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
- 800b522: e008 b.n 800b536 <HAL_RCC_OscConfig+0x4a2>
- {
- if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
- 800b524: f7fa f820 bl 8005568 <HAL_GetTick>
- 800b528: 4602 mov r2, r0
- 800b52a: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b52c: 1ad3 subs r3, r2, r3
- 800b52e: 2b02 cmp r3, #2
- 800b530: d901 bls.n 800b536 <HAL_RCC_OscConfig+0x4a2>
- {
- return HAL_TIMEOUT;
- 800b532: 2303 movs r3, #3
- 800b534: e200 b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
- 800b536: 4b15 ldr r3, [pc, #84] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b538: 6f5b ldr r3, [r3, #116] @ 0x74
- 800b53a: f003 0302 and.w r3, r3, #2
- 800b53e: 2b00 cmp r3, #0
- 800b540: d1f0 bne.n 800b524 <HAL_RCC_OscConfig+0x490>
- }
- }
- }
- /*------------------------------ HSI48 Configuration -------------------------*/
- if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
- 800b542: 687b ldr r3, [r7, #4]
- 800b544: 681b ldr r3, [r3, #0]
- 800b546: f003 0320 and.w r3, r3, #32
- 800b54a: 2b00 cmp r3, #0
- 800b54c: d039 beq.n 800b5c2 <HAL_RCC_OscConfig+0x52e>
- {
- /* Check the parameters */
- assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));
- /* Check the HSI48 State */
- if ((RCC_OscInitStruct->HSI48State) != RCC_HSI48_OFF)
- 800b54e: 687b ldr r3, [r7, #4]
- 800b550: 699b ldr r3, [r3, #24]
- 800b552: 2b00 cmp r3, #0
- 800b554: d01c beq.n 800b590 <HAL_RCC_OscConfig+0x4fc>
- {
- /* Enable the Internal Low Speed oscillator (HSI48). */
- __HAL_RCC_HSI48_ENABLE();
- 800b556: 4b0d ldr r3, [pc, #52] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b558: 681b ldr r3, [r3, #0]
- 800b55a: 4a0c ldr r2, [pc, #48] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b55c: f443 5380 orr.w r3, r3, #4096 @ 0x1000
- 800b560: 6013 str r3, [r2, #0]
- /* Get time-out */
- tickstart = HAL_GetTick();
- 800b562: f7fa f801 bl 8005568 <HAL_GetTick>
- 800b566: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till HSI48 is ready */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
- 800b568: e008 b.n 800b57c <HAL_RCC_OscConfig+0x4e8>
- {
- if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
- 800b56a: f7f9 fffd bl 8005568 <HAL_GetTick>
- 800b56e: 4602 mov r2, r0
- 800b570: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b572: 1ad3 subs r3, r2, r3
- 800b574: 2b02 cmp r3, #2
- 800b576: d901 bls.n 800b57c <HAL_RCC_OscConfig+0x4e8>
- {
- return HAL_TIMEOUT;
- 800b578: 2303 movs r3, #3
- 800b57a: e1dd b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
- 800b57c: 4b03 ldr r3, [pc, #12] @ (800b58c <HAL_RCC_OscConfig+0x4f8>)
- 800b57e: 681b ldr r3, [r3, #0]
- 800b580: f403 5300 and.w r3, r3, #8192 @ 0x2000
- 800b584: 2b00 cmp r3, #0
- 800b586: d0f0 beq.n 800b56a <HAL_RCC_OscConfig+0x4d6>
- 800b588: e01b b.n 800b5c2 <HAL_RCC_OscConfig+0x52e>
- 800b58a: bf00 nop
- 800b58c: 58024400 .word 0x58024400
- }
- }
- else
- {
- /* Disable the Internal Low Speed oscillator (HSI48). */
- __HAL_RCC_HSI48_DISABLE();
- 800b590: 4b9b ldr r3, [pc, #620] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b592: 681b ldr r3, [r3, #0]
- 800b594: 4a9a ldr r2, [pc, #616] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b596: f423 5380 bic.w r3, r3, #4096 @ 0x1000
- 800b59a: 6013 str r3, [r2, #0]
- /* Get time-out */
- tickstart = HAL_GetTick();
- 800b59c: f7f9 ffe4 bl 8005568 <HAL_GetTick>
- 800b5a0: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till HSI48 is ready */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
- 800b5a2: e008 b.n 800b5b6 <HAL_RCC_OscConfig+0x522>
- {
- if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
- 800b5a4: f7f9 ffe0 bl 8005568 <HAL_GetTick>
- 800b5a8: 4602 mov r2, r0
- 800b5aa: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b5ac: 1ad3 subs r3, r2, r3
- 800b5ae: 2b02 cmp r3, #2
- 800b5b0: d901 bls.n 800b5b6 <HAL_RCC_OscConfig+0x522>
- {
- return HAL_TIMEOUT;
- 800b5b2: 2303 movs r3, #3
- 800b5b4: e1c0 b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
- 800b5b6: 4b92 ldr r3, [pc, #584] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b5b8: 681b ldr r3, [r3, #0]
- 800b5ba: f403 5300 and.w r3, r3, #8192 @ 0x2000
- 800b5be: 2b00 cmp r3, #0
- 800b5c0: d1f0 bne.n 800b5a4 <HAL_RCC_OscConfig+0x510>
- }
- }
- }
- }
- /*------------------------------ LSE Configuration -------------------------*/
- if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
- 800b5c2: 687b ldr r3, [r7, #4]
- 800b5c4: 681b ldr r3, [r3, #0]
- 800b5c6: f003 0304 and.w r3, r3, #4
- 800b5ca: 2b00 cmp r3, #0
- 800b5cc: f000 8081 beq.w 800b6d2 <HAL_RCC_OscConfig+0x63e>
- {
- /* Check the parameters */
- assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
- /* Enable write access to Backup domain */
- PWR->CR1 |= PWR_CR1_DBP;
- 800b5d0: 4b8c ldr r3, [pc, #560] @ (800b804 <HAL_RCC_OscConfig+0x770>)
- 800b5d2: 681b ldr r3, [r3, #0]
- 800b5d4: 4a8b ldr r2, [pc, #556] @ (800b804 <HAL_RCC_OscConfig+0x770>)
- 800b5d6: f443 7380 orr.w r3, r3, #256 @ 0x100
- 800b5da: 6013 str r3, [r2, #0]
- /* Wait for Backup domain Write protection disable */
- tickstart = HAL_GetTick();
- 800b5dc: f7f9 ffc4 bl 8005568 <HAL_GetTick>
- 800b5e0: 6278 str r0, [r7, #36] @ 0x24
- while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
- 800b5e2: e008 b.n 800b5f6 <HAL_RCC_OscConfig+0x562>
- {
- if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
- 800b5e4: f7f9 ffc0 bl 8005568 <HAL_GetTick>
- 800b5e8: 4602 mov r2, r0
- 800b5ea: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b5ec: 1ad3 subs r3, r2, r3
- 800b5ee: 2b64 cmp r3, #100 @ 0x64
- 800b5f0: d901 bls.n 800b5f6 <HAL_RCC_OscConfig+0x562>
- {
- return HAL_TIMEOUT;
- 800b5f2: 2303 movs r3, #3
- 800b5f4: e1a0 b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
- 800b5f6: 4b83 ldr r3, [pc, #524] @ (800b804 <HAL_RCC_OscConfig+0x770>)
- 800b5f8: 681b ldr r3, [r3, #0]
- 800b5fa: f403 7380 and.w r3, r3, #256 @ 0x100
- 800b5fe: 2b00 cmp r3, #0
- 800b600: d0f0 beq.n 800b5e4 <HAL_RCC_OscConfig+0x550>
- }
- }
- /* Set the new LSE configuration -----------------------------------------*/
- __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
- 800b602: 687b ldr r3, [r7, #4]
- 800b604: 689b ldr r3, [r3, #8]
- 800b606: 2b01 cmp r3, #1
- 800b608: d106 bne.n 800b618 <HAL_RCC_OscConfig+0x584>
- 800b60a: 4b7d ldr r3, [pc, #500] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b60c: 6f1b ldr r3, [r3, #112] @ 0x70
- 800b60e: 4a7c ldr r2, [pc, #496] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b610: f043 0301 orr.w r3, r3, #1
- 800b614: 6713 str r3, [r2, #112] @ 0x70
- 800b616: e02d b.n 800b674 <HAL_RCC_OscConfig+0x5e0>
- 800b618: 687b ldr r3, [r7, #4]
- 800b61a: 689b ldr r3, [r3, #8]
- 800b61c: 2b00 cmp r3, #0
- 800b61e: d10c bne.n 800b63a <HAL_RCC_OscConfig+0x5a6>
- 800b620: 4b77 ldr r3, [pc, #476] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b622: 6f1b ldr r3, [r3, #112] @ 0x70
- 800b624: 4a76 ldr r2, [pc, #472] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b626: f023 0301 bic.w r3, r3, #1
- 800b62a: 6713 str r3, [r2, #112] @ 0x70
- 800b62c: 4b74 ldr r3, [pc, #464] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b62e: 6f1b ldr r3, [r3, #112] @ 0x70
- 800b630: 4a73 ldr r2, [pc, #460] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b632: f023 0304 bic.w r3, r3, #4
- 800b636: 6713 str r3, [r2, #112] @ 0x70
- 800b638: e01c b.n 800b674 <HAL_RCC_OscConfig+0x5e0>
- 800b63a: 687b ldr r3, [r7, #4]
- 800b63c: 689b ldr r3, [r3, #8]
- 800b63e: 2b05 cmp r3, #5
- 800b640: d10c bne.n 800b65c <HAL_RCC_OscConfig+0x5c8>
- 800b642: 4b6f ldr r3, [pc, #444] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b644: 6f1b ldr r3, [r3, #112] @ 0x70
- 800b646: 4a6e ldr r2, [pc, #440] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b648: f043 0304 orr.w r3, r3, #4
- 800b64c: 6713 str r3, [r2, #112] @ 0x70
- 800b64e: 4b6c ldr r3, [pc, #432] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b650: 6f1b ldr r3, [r3, #112] @ 0x70
- 800b652: 4a6b ldr r2, [pc, #428] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b654: f043 0301 orr.w r3, r3, #1
- 800b658: 6713 str r3, [r2, #112] @ 0x70
- 800b65a: e00b b.n 800b674 <HAL_RCC_OscConfig+0x5e0>
- 800b65c: 4b68 ldr r3, [pc, #416] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b65e: 6f1b ldr r3, [r3, #112] @ 0x70
- 800b660: 4a67 ldr r2, [pc, #412] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b662: f023 0301 bic.w r3, r3, #1
- 800b666: 6713 str r3, [r2, #112] @ 0x70
- 800b668: 4b65 ldr r3, [pc, #404] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b66a: 6f1b ldr r3, [r3, #112] @ 0x70
- 800b66c: 4a64 ldr r2, [pc, #400] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b66e: f023 0304 bic.w r3, r3, #4
- 800b672: 6713 str r3, [r2, #112] @ 0x70
- /* Check the LSE State */
- if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
- 800b674: 687b ldr r3, [r7, #4]
- 800b676: 689b ldr r3, [r3, #8]
- 800b678: 2b00 cmp r3, #0
- 800b67a: d015 beq.n 800b6a8 <HAL_RCC_OscConfig+0x614>
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b67c: f7f9 ff74 bl 8005568 <HAL_GetTick>
- 800b680: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till LSE is ready */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
- 800b682: e00a b.n 800b69a <HAL_RCC_OscConfig+0x606>
- {
- if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
- 800b684: f7f9 ff70 bl 8005568 <HAL_GetTick>
- 800b688: 4602 mov r2, r0
- 800b68a: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b68c: 1ad3 subs r3, r2, r3
- 800b68e: f241 3288 movw r2, #5000 @ 0x1388
- 800b692: 4293 cmp r3, r2
- 800b694: d901 bls.n 800b69a <HAL_RCC_OscConfig+0x606>
- {
- return HAL_TIMEOUT;
- 800b696: 2303 movs r3, #3
- 800b698: e14e b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
- 800b69a: 4b59 ldr r3, [pc, #356] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b69c: 6f1b ldr r3, [r3, #112] @ 0x70
- 800b69e: f003 0302 and.w r3, r3, #2
- 800b6a2: 2b00 cmp r3, #0
- 800b6a4: d0ee beq.n 800b684 <HAL_RCC_OscConfig+0x5f0>
- 800b6a6: e014 b.n 800b6d2 <HAL_RCC_OscConfig+0x63e>
- }
- }
- else
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b6a8: f7f9 ff5e bl 8005568 <HAL_GetTick>
- 800b6ac: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till LSE is disabled */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
- 800b6ae: e00a b.n 800b6c6 <HAL_RCC_OscConfig+0x632>
- {
- if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
- 800b6b0: f7f9 ff5a bl 8005568 <HAL_GetTick>
- 800b6b4: 4602 mov r2, r0
- 800b6b6: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b6b8: 1ad3 subs r3, r2, r3
- 800b6ba: f241 3288 movw r2, #5000 @ 0x1388
- 800b6be: 4293 cmp r3, r2
- 800b6c0: d901 bls.n 800b6c6 <HAL_RCC_OscConfig+0x632>
- {
- return HAL_TIMEOUT;
- 800b6c2: 2303 movs r3, #3
- 800b6c4: e138 b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
- 800b6c6: 4b4e ldr r3, [pc, #312] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b6c8: 6f1b ldr r3, [r3, #112] @ 0x70
- 800b6ca: f003 0302 and.w r3, r3, #2
- 800b6ce: 2b00 cmp r3, #0
- 800b6d0: d1ee bne.n 800b6b0 <HAL_RCC_OscConfig+0x61c>
- }
- }
- /*-------------------------------- PLL Configuration -----------------------*/
- /* Check the parameters */
- assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
- if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
- 800b6d2: 687b ldr r3, [r7, #4]
- 800b6d4: 6a5b ldr r3, [r3, #36] @ 0x24
- 800b6d6: 2b00 cmp r3, #0
- 800b6d8: f000 812d beq.w 800b936 <HAL_RCC_OscConfig+0x8a2>
- {
- /* Check if the PLL is used as system clock or not */
- if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL1)
- 800b6dc: 4b48 ldr r3, [pc, #288] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b6de: 691b ldr r3, [r3, #16]
- 800b6e0: f003 0338 and.w r3, r3, #56 @ 0x38
- 800b6e4: 2b18 cmp r3, #24
- 800b6e6: f000 80bd beq.w 800b864 <HAL_RCC_OscConfig+0x7d0>
- {
- if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
- 800b6ea: 687b ldr r3, [r7, #4]
- 800b6ec: 6a5b ldr r3, [r3, #36] @ 0x24
- 800b6ee: 2b02 cmp r3, #2
- 800b6f0: f040 809e bne.w 800b830 <HAL_RCC_OscConfig+0x79c>
- assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
- assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
- assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN));
- /* Disable the main PLL. */
- __HAL_RCC_PLL_DISABLE();
- 800b6f4: 4b42 ldr r3, [pc, #264] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b6f6: 681b ldr r3, [r3, #0]
- 800b6f8: 4a41 ldr r2, [pc, #260] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b6fa: f023 7380 bic.w r3, r3, #16777216 @ 0x1000000
- 800b6fe: 6013 str r3, [r2, #0]
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b700: f7f9 ff32 bl 8005568 <HAL_GetTick>
- 800b704: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till PLL is disabled */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
- 800b706: e008 b.n 800b71a <HAL_RCC_OscConfig+0x686>
- {
- if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
- 800b708: f7f9 ff2e bl 8005568 <HAL_GetTick>
- 800b70c: 4602 mov r2, r0
- 800b70e: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b710: 1ad3 subs r3, r2, r3
- 800b712: 2b02 cmp r3, #2
- 800b714: d901 bls.n 800b71a <HAL_RCC_OscConfig+0x686>
- {
- return HAL_TIMEOUT;
- 800b716: 2303 movs r3, #3
- 800b718: e10e b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
- 800b71a: 4b39 ldr r3, [pc, #228] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b71c: 681b ldr r3, [r3, #0]
- 800b71e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
- 800b722: 2b00 cmp r3, #0
- 800b724: d1f0 bne.n 800b708 <HAL_RCC_OscConfig+0x674>
- }
- }
- /* Configure the main PLL clock source, multiplication and division factors. */
- __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
- 800b726: 4b36 ldr r3, [pc, #216] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b728: 6a9a ldr r2, [r3, #40] @ 0x28
- 800b72a: 4b37 ldr r3, [pc, #220] @ (800b808 <HAL_RCC_OscConfig+0x774>)
- 800b72c: 4013 ands r3, r2
- 800b72e: 687a ldr r2, [r7, #4]
- 800b730: 6a91 ldr r1, [r2, #40] @ 0x28
- 800b732: 687a ldr r2, [r7, #4]
- 800b734: 6ad2 ldr r2, [r2, #44] @ 0x2c
- 800b736: 0112 lsls r2, r2, #4
- 800b738: 430a orrs r2, r1
- 800b73a: 4931 ldr r1, [pc, #196] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b73c: 4313 orrs r3, r2
- 800b73e: 628b str r3, [r1, #40] @ 0x28
- 800b740: 687b ldr r3, [r7, #4]
- 800b742: 6b1b ldr r3, [r3, #48] @ 0x30
- 800b744: 3b01 subs r3, #1
- 800b746: f3c3 0208 ubfx r2, r3, #0, #9
- 800b74a: 687b ldr r3, [r7, #4]
- 800b74c: 6b5b ldr r3, [r3, #52] @ 0x34
- 800b74e: 3b01 subs r3, #1
- 800b750: 025b lsls r3, r3, #9
- 800b752: b29b uxth r3, r3
- 800b754: 431a orrs r2, r3
- 800b756: 687b ldr r3, [r7, #4]
- 800b758: 6b9b ldr r3, [r3, #56] @ 0x38
- 800b75a: 3b01 subs r3, #1
- 800b75c: 041b lsls r3, r3, #16
- 800b75e: f403 03fe and.w r3, r3, #8323072 @ 0x7f0000
- 800b762: 431a orrs r2, r3
- 800b764: 687b ldr r3, [r7, #4]
- 800b766: 6bdb ldr r3, [r3, #60] @ 0x3c
- 800b768: 3b01 subs r3, #1
- 800b76a: 061b lsls r3, r3, #24
- 800b76c: f003 43fe and.w r3, r3, #2130706432 @ 0x7f000000
- 800b770: 4923 ldr r1, [pc, #140] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b772: 4313 orrs r3, r2
- 800b774: 630b str r3, [r1, #48] @ 0x30
- RCC_OscInitStruct->PLL.PLLP,
- RCC_OscInitStruct->PLL.PLLQ,
- RCC_OscInitStruct->PLL.PLLR);
- /* Disable PLLFRACN . */
- __HAL_RCC_PLLFRACN_DISABLE();
- 800b776: 4b22 ldr r3, [pc, #136] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b778: 6adb ldr r3, [r3, #44] @ 0x2c
- 800b77a: 4a21 ldr r2, [pc, #132] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b77c: f023 0301 bic.w r3, r3, #1
- 800b780: 62d3 str r3, [r2, #44] @ 0x2c
- /* Configure PLL PLL1FRACN */
- __HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN);
- 800b782: 4b1f ldr r3, [pc, #124] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b784: 6b5a ldr r2, [r3, #52] @ 0x34
- 800b786: 4b21 ldr r3, [pc, #132] @ (800b80c <HAL_RCC_OscConfig+0x778>)
- 800b788: 4013 ands r3, r2
- 800b78a: 687a ldr r2, [r7, #4]
- 800b78c: 6c92 ldr r2, [r2, #72] @ 0x48
- 800b78e: 00d2 lsls r2, r2, #3
- 800b790: 491b ldr r1, [pc, #108] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b792: 4313 orrs r3, r2
- 800b794: 634b str r3, [r1, #52] @ 0x34
- /* Select PLL1 input reference frequency range: VCI */
- __HAL_RCC_PLL_VCIRANGE(RCC_OscInitStruct->PLL.PLLRGE) ;
- 800b796: 4b1a ldr r3, [pc, #104] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b798: 6adb ldr r3, [r3, #44] @ 0x2c
- 800b79a: f023 020c bic.w r2, r3, #12
- 800b79e: 687b ldr r3, [r7, #4]
- 800b7a0: 6c1b ldr r3, [r3, #64] @ 0x40
- 800b7a2: 4917 ldr r1, [pc, #92] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b7a4: 4313 orrs r3, r2
- 800b7a6: 62cb str r3, [r1, #44] @ 0x2c
- /* Select PLL1 output frequency range : VCO */
- __HAL_RCC_PLL_VCORANGE(RCC_OscInitStruct->PLL.PLLVCOSEL) ;
- 800b7a8: 4b15 ldr r3, [pc, #84] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b7aa: 6adb ldr r3, [r3, #44] @ 0x2c
- 800b7ac: f023 0202 bic.w r2, r3, #2
- 800b7b0: 687b ldr r3, [r7, #4]
- 800b7b2: 6c5b ldr r3, [r3, #68] @ 0x44
- 800b7b4: 4912 ldr r1, [pc, #72] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b7b6: 4313 orrs r3, r2
- 800b7b8: 62cb str r3, [r1, #44] @ 0x2c
- /* Enable PLL System Clock output. */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP);
- 800b7ba: 4b11 ldr r3, [pc, #68] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b7bc: 6adb ldr r3, [r3, #44] @ 0x2c
- 800b7be: 4a10 ldr r2, [pc, #64] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b7c0: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 800b7c4: 62d3 str r3, [r2, #44] @ 0x2c
- /* Enable PLL1Q Clock output. */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
- 800b7c6: 4b0e ldr r3, [pc, #56] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b7c8: 6adb ldr r3, [r3, #44] @ 0x2c
- 800b7ca: 4a0d ldr r2, [pc, #52] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b7cc: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800b7d0: 62d3 str r3, [r2, #44] @ 0x2c
- /* Enable PLL1R Clock output. */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVR);
- 800b7d2: 4b0b ldr r3, [pc, #44] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b7d4: 6adb ldr r3, [r3, #44] @ 0x2c
- 800b7d6: 4a0a ldr r2, [pc, #40] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b7d8: f443 2380 orr.w r3, r3, #262144 @ 0x40000
- 800b7dc: 62d3 str r3, [r2, #44] @ 0x2c
- /* Enable PLL1FRACN . */
- __HAL_RCC_PLLFRACN_ENABLE();
- 800b7de: 4b08 ldr r3, [pc, #32] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b7e0: 6adb ldr r3, [r3, #44] @ 0x2c
- 800b7e2: 4a07 ldr r2, [pc, #28] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b7e4: f043 0301 orr.w r3, r3, #1
- 800b7e8: 62d3 str r3, [r2, #44] @ 0x2c
- /* Enable the main PLL. */
- __HAL_RCC_PLL_ENABLE();
- 800b7ea: 4b05 ldr r3, [pc, #20] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b7ec: 681b ldr r3, [r3, #0]
- 800b7ee: 4a04 ldr r2, [pc, #16] @ (800b800 <HAL_RCC_OscConfig+0x76c>)
- 800b7f0: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000
- 800b7f4: 6013 str r3, [r2, #0]
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b7f6: f7f9 feb7 bl 8005568 <HAL_GetTick>
- 800b7fa: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till PLL is ready */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
- 800b7fc: e011 b.n 800b822 <HAL_RCC_OscConfig+0x78e>
- 800b7fe: bf00 nop
- 800b800: 58024400 .word 0x58024400
- 800b804: 58024800 .word 0x58024800
- 800b808: fffffc0c .word 0xfffffc0c
- 800b80c: ffff0007 .word 0xffff0007
- {
- if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
- 800b810: f7f9 feaa bl 8005568 <HAL_GetTick>
- 800b814: 4602 mov r2, r0
- 800b816: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b818: 1ad3 subs r3, r2, r3
- 800b81a: 2b02 cmp r3, #2
- 800b81c: d901 bls.n 800b822 <HAL_RCC_OscConfig+0x78e>
- {
- return HAL_TIMEOUT;
- 800b81e: 2303 movs r3, #3
- 800b820: e08a b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
- 800b822: 4b47 ldr r3, [pc, #284] @ (800b940 <HAL_RCC_OscConfig+0x8ac>)
- 800b824: 681b ldr r3, [r3, #0]
- 800b826: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
- 800b82a: 2b00 cmp r3, #0
- 800b82c: d0f0 beq.n 800b810 <HAL_RCC_OscConfig+0x77c>
- 800b82e: e082 b.n 800b936 <HAL_RCC_OscConfig+0x8a2>
- }
- }
- else
- {
- /* Disable the main PLL. */
- __HAL_RCC_PLL_DISABLE();
- 800b830: 4b43 ldr r3, [pc, #268] @ (800b940 <HAL_RCC_OscConfig+0x8ac>)
- 800b832: 681b ldr r3, [r3, #0]
- 800b834: 4a42 ldr r2, [pc, #264] @ (800b940 <HAL_RCC_OscConfig+0x8ac>)
- 800b836: f023 7380 bic.w r3, r3, #16777216 @ 0x1000000
- 800b83a: 6013 str r3, [r2, #0]
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b83c: f7f9 fe94 bl 8005568 <HAL_GetTick>
- 800b840: 6278 str r0, [r7, #36] @ 0x24
- /* Wait till PLL is disabled */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
- 800b842: e008 b.n 800b856 <HAL_RCC_OscConfig+0x7c2>
- {
- if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
- 800b844: f7f9 fe90 bl 8005568 <HAL_GetTick>
- 800b848: 4602 mov r2, r0
- 800b84a: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b84c: 1ad3 subs r3, r2, r3
- 800b84e: 2b02 cmp r3, #2
- 800b850: d901 bls.n 800b856 <HAL_RCC_OscConfig+0x7c2>
- {
- return HAL_TIMEOUT;
- 800b852: 2303 movs r3, #3
- 800b854: e070 b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
- 800b856: 4b3a ldr r3, [pc, #232] @ (800b940 <HAL_RCC_OscConfig+0x8ac>)
- 800b858: 681b ldr r3, [r3, #0]
- 800b85a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
- 800b85e: 2b00 cmp r3, #0
- 800b860: d1f0 bne.n 800b844 <HAL_RCC_OscConfig+0x7b0>
- 800b862: e068 b.n 800b936 <HAL_RCC_OscConfig+0x8a2>
- }
- }
- else
- {
- /* Do not return HAL_ERROR if request repeats the current configuration */
- temp1_pllckcfg = RCC->PLLCKSELR;
- 800b864: 4b36 ldr r3, [pc, #216] @ (800b940 <HAL_RCC_OscConfig+0x8ac>)
- 800b866: 6a9b ldr r3, [r3, #40] @ 0x28
- 800b868: 613b str r3, [r7, #16]
- temp2_pllckcfg = RCC->PLL1DIVR;
- 800b86a: 4b35 ldr r3, [pc, #212] @ (800b940 <HAL_RCC_OscConfig+0x8ac>)
- 800b86c: 6b1b ldr r3, [r3, #48] @ 0x30
- 800b86e: 60fb str r3, [r7, #12]
- if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
- 800b870: 687b ldr r3, [r7, #4]
- 800b872: 6a5b ldr r3, [r3, #36] @ 0x24
- 800b874: 2b01 cmp r3, #1
- 800b876: d031 beq.n 800b8dc <HAL_RCC_OscConfig+0x848>
- (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
- 800b878: 693b ldr r3, [r7, #16]
- 800b87a: f003 0203 and.w r2, r3, #3
- 800b87e: 687b ldr r3, [r7, #4]
- 800b880: 6a9b ldr r3, [r3, #40] @ 0x28
- if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
- 800b882: 429a cmp r2, r3
- 800b884: d12a bne.n 800b8dc <HAL_RCC_OscConfig+0x848>
- ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) ||
- 800b886: 693b ldr r3, [r7, #16]
- 800b888: 091b lsrs r3, r3, #4
- 800b88a: f003 023f and.w r2, r3, #63 @ 0x3f
- 800b88e: 687b ldr r3, [r7, #4]
- 800b890: 6adb ldr r3, [r3, #44] @ 0x2c
- (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
- 800b892: 429a cmp r2, r3
- 800b894: d122 bne.n 800b8dc <HAL_RCC_OscConfig+0x848>
- (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) ||
- 800b896: 68fb ldr r3, [r7, #12]
- 800b898: f3c3 0208 ubfx r2, r3, #0, #9
- 800b89c: 687b ldr r3, [r7, #4]
- 800b89e: 6b1b ldr r3, [r3, #48] @ 0x30
- 800b8a0: 3b01 subs r3, #1
- ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) ||
- 800b8a2: 429a cmp r2, r3
- 800b8a4: d11a bne.n 800b8dc <HAL_RCC_OscConfig+0x848>
- ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) ||
- 800b8a6: 68fb ldr r3, [r7, #12]
- 800b8a8: 0a5b lsrs r3, r3, #9
- 800b8aa: f003 027f and.w r2, r3, #127 @ 0x7f
- 800b8ae: 687b ldr r3, [r7, #4]
- 800b8b0: 6b5b ldr r3, [r3, #52] @ 0x34
- 800b8b2: 3b01 subs r3, #1
- (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) ||
- 800b8b4: 429a cmp r2, r3
- 800b8b6: d111 bne.n 800b8dc <HAL_RCC_OscConfig+0x848>
- ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) ||
- 800b8b8: 68fb ldr r3, [r7, #12]
- 800b8ba: 0c1b lsrs r3, r3, #16
- 800b8bc: f003 027f and.w r2, r3, #127 @ 0x7f
- 800b8c0: 687b ldr r3, [r7, #4]
- 800b8c2: 6b9b ldr r3, [r3, #56] @ 0x38
- 800b8c4: 3b01 subs r3, #1
- ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) ||
- 800b8c6: 429a cmp r2, r3
- 800b8c8: d108 bne.n 800b8dc <HAL_RCC_OscConfig+0x848>
- ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_R1) >> RCC_PLL1DIVR_R1_Pos) != (RCC_OscInitStruct->PLL.PLLR - 1U)))
- 800b8ca: 68fb ldr r3, [r7, #12]
- 800b8cc: 0e1b lsrs r3, r3, #24
- 800b8ce: f003 027f and.w r2, r3, #127 @ 0x7f
- 800b8d2: 687b ldr r3, [r7, #4]
- 800b8d4: 6bdb ldr r3, [r3, #60] @ 0x3c
- 800b8d6: 3b01 subs r3, #1
- ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) ||
- 800b8d8: 429a cmp r2, r3
- 800b8da: d001 beq.n 800b8e0 <HAL_RCC_OscConfig+0x84c>
- {
- return HAL_ERROR;
- 800b8dc: 2301 movs r3, #1
- 800b8de: e02b b.n 800b938 <HAL_RCC_OscConfig+0x8a4>
- }
- else
- {
- /* Check if only fractional part needs to be updated */
- temp1_pllckcfg = ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> RCC_PLL1FRACR_FRACN1_Pos);
- 800b8e0: 4b17 ldr r3, [pc, #92] @ (800b940 <HAL_RCC_OscConfig+0x8ac>)
- 800b8e2: 6b5b ldr r3, [r3, #52] @ 0x34
- 800b8e4: 08db lsrs r3, r3, #3
- 800b8e6: f3c3 030c ubfx r3, r3, #0, #13
- 800b8ea: 613b str r3, [r7, #16]
- if (RCC_OscInitStruct->PLL.PLLFRACN != temp1_pllckcfg)
- 800b8ec: 687b ldr r3, [r7, #4]
- 800b8ee: 6c9b ldr r3, [r3, #72] @ 0x48
- 800b8f0: 693a ldr r2, [r7, #16]
- 800b8f2: 429a cmp r2, r3
- 800b8f4: d01f beq.n 800b936 <HAL_RCC_OscConfig+0x8a2>
- {
- assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN));
- /* Disable PLL1FRACEN */
- __HAL_RCC_PLLFRACN_DISABLE();
- 800b8f6: 4b12 ldr r3, [pc, #72] @ (800b940 <HAL_RCC_OscConfig+0x8ac>)
- 800b8f8: 6adb ldr r3, [r3, #44] @ 0x2c
- 800b8fa: 4a11 ldr r2, [pc, #68] @ (800b940 <HAL_RCC_OscConfig+0x8ac>)
- 800b8fc: f023 0301 bic.w r3, r3, #1
- 800b900: 62d3 str r3, [r2, #44] @ 0x2c
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800b902: f7f9 fe31 bl 8005568 <HAL_GetTick>
- 800b906: 6278 str r0, [r7, #36] @ 0x24
- /* Wait at least 2 CK_REF (PLL input source divided by M) period to make sure next latched value will be taken into account. */
- while ((HAL_GetTick() - tickstart) < PLL_FRAC_TIMEOUT_VALUE)
- 800b908: bf00 nop
- 800b90a: f7f9 fe2d bl 8005568 <HAL_GetTick>
- 800b90e: 4602 mov r2, r0
- 800b910: 6a7b ldr r3, [r7, #36] @ 0x24
- 800b912: 4293 cmp r3, r2
- 800b914: d0f9 beq.n 800b90a <HAL_RCC_OscConfig+0x876>
- {
- }
- /* Configure PLL1 PLL1FRACN */
- __HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN);
- 800b916: 4b0a ldr r3, [pc, #40] @ (800b940 <HAL_RCC_OscConfig+0x8ac>)
- 800b918: 6b5a ldr r2, [r3, #52] @ 0x34
- 800b91a: 4b0a ldr r3, [pc, #40] @ (800b944 <HAL_RCC_OscConfig+0x8b0>)
- 800b91c: 4013 ands r3, r2
- 800b91e: 687a ldr r2, [r7, #4]
- 800b920: 6c92 ldr r2, [r2, #72] @ 0x48
- 800b922: 00d2 lsls r2, r2, #3
- 800b924: 4906 ldr r1, [pc, #24] @ (800b940 <HAL_RCC_OscConfig+0x8ac>)
- 800b926: 4313 orrs r3, r2
- 800b928: 634b str r3, [r1, #52] @ 0x34
- /* Enable PLL1FRACEN to latch new value. */
- __HAL_RCC_PLLFRACN_ENABLE();
- 800b92a: 4b05 ldr r3, [pc, #20] @ (800b940 <HAL_RCC_OscConfig+0x8ac>)
- 800b92c: 6adb ldr r3, [r3, #44] @ 0x2c
- 800b92e: 4a04 ldr r2, [pc, #16] @ (800b940 <HAL_RCC_OscConfig+0x8ac>)
- 800b930: f043 0301 orr.w r3, r3, #1
- 800b934: 62d3 str r3, [r2, #44] @ 0x2c
- }
- }
- }
- }
- return HAL_OK;
- 800b936: 2300 movs r3, #0
- }
- 800b938: 4618 mov r0, r3
- 800b93a: 3730 adds r7, #48 @ 0x30
- 800b93c: 46bd mov sp, r7
- 800b93e: bd80 pop {r7, pc}
- 800b940: 58024400 .word 0x58024400
- 800b944: ffff0007 .word 0xffff0007
- 0800b948 <HAL_RCC_ClockConfig>:
- * D1CPRE[3:0] bits to ensure that Domain1 core clock not exceed the maximum allowed frequency
- * (for more details refer to section above "Initialization/de-initialization functions")
- * @retval None
- */
- HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
- {
- 800b948: b580 push {r7, lr}
- 800b94a: b086 sub sp, #24
- 800b94c: af00 add r7, sp, #0
- 800b94e: 6078 str r0, [r7, #4]
- 800b950: 6039 str r1, [r7, #0]
- HAL_StatusTypeDef halstatus;
- uint32_t tickstart;
- uint32_t common_system_clock;
- /* Check Null pointer */
- if (RCC_ClkInitStruct == NULL)
- 800b952: 687b ldr r3, [r7, #4]
- 800b954: 2b00 cmp r3, #0
- 800b956: d101 bne.n 800b95c <HAL_RCC_ClockConfig+0x14>
- {
- return HAL_ERROR;
- 800b958: 2301 movs r3, #1
- 800b95a: e19c b.n 800bc96 <HAL_RCC_ClockConfig+0x34e>
- /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
- must be correctly programmed according to the frequency of the CPU clock
- (HCLK) and the supply voltage of the device. */
- /* Increasing the CPU frequency */
- if (FLatency > __HAL_FLASH_GET_LATENCY())
- 800b95c: 4b8a ldr r3, [pc, #552] @ (800bb88 <HAL_RCC_ClockConfig+0x240>)
- 800b95e: 681b ldr r3, [r3, #0]
- 800b960: f003 030f and.w r3, r3, #15
- 800b964: 683a ldr r2, [r7, #0]
- 800b966: 429a cmp r2, r3
- 800b968: d910 bls.n 800b98c <HAL_RCC_ClockConfig+0x44>
- {
- /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
- __HAL_FLASH_SET_LATENCY(FLatency);
- 800b96a: 4b87 ldr r3, [pc, #540] @ (800bb88 <HAL_RCC_ClockConfig+0x240>)
- 800b96c: 681b ldr r3, [r3, #0]
- 800b96e: f023 020f bic.w r2, r3, #15
- 800b972: 4985 ldr r1, [pc, #532] @ (800bb88 <HAL_RCC_ClockConfig+0x240>)
- 800b974: 683b ldr r3, [r7, #0]
- 800b976: 4313 orrs r3, r2
- 800b978: 600b str r3, [r1, #0]
- /* Check that the new number of wait states is taken into account to access the Flash
- memory by reading the FLASH_ACR register */
- if (__HAL_FLASH_GET_LATENCY() != FLatency)
- 800b97a: 4b83 ldr r3, [pc, #524] @ (800bb88 <HAL_RCC_ClockConfig+0x240>)
- 800b97c: 681b ldr r3, [r3, #0]
- 800b97e: f003 030f and.w r3, r3, #15
- 800b982: 683a ldr r2, [r7, #0]
- 800b984: 429a cmp r2, r3
- 800b986: d001 beq.n 800b98c <HAL_RCC_ClockConfig+0x44>
- {
- return HAL_ERROR;
- 800b988: 2301 movs r3, #1
- 800b98a: e184 b.n 800bc96 <HAL_RCC_ClockConfig+0x34e>
- }
- /* Increasing the BUS frequency divider */
- /*-------------------------- D1PCLK1/CDPCLK1 Configuration ---------------------------*/
- if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1)
- 800b98c: 687b ldr r3, [r7, #4]
- 800b98e: 681b ldr r3, [r3, #0]
- 800b990: f003 0304 and.w r3, r3, #4
- 800b994: 2b00 cmp r3, #0
- 800b996: d010 beq.n 800b9ba <HAL_RCC_ClockConfig+0x72>
- {
- #if defined (RCC_D1CFGR_D1PPRE)
- if ((RCC_ClkInitStruct->APB3CLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_D1PPRE))
- 800b998: 687b ldr r3, [r7, #4]
- 800b99a: 691a ldr r2, [r3, #16]
- 800b99c: 4b7b ldr r3, [pc, #492] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800b99e: 699b ldr r3, [r3, #24]
- 800b9a0: f003 0370 and.w r3, r3, #112 @ 0x70
- 800b9a4: 429a cmp r2, r3
- 800b9a6: d908 bls.n 800b9ba <HAL_RCC_ClockConfig+0x72>
- {
- assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider));
- MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider);
- 800b9a8: 4b78 ldr r3, [pc, #480] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800b9aa: 699b ldr r3, [r3, #24]
- 800b9ac: f023 0270 bic.w r2, r3, #112 @ 0x70
- 800b9b0: 687b ldr r3, [r7, #4]
- 800b9b2: 691b ldr r3, [r3, #16]
- 800b9b4: 4975 ldr r1, [pc, #468] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800b9b6: 4313 orrs r3, r2
- 800b9b8: 618b str r3, [r1, #24]
- }
- #endif
- }
- /*-------------------------- PCLK1 Configuration ---------------------------*/
- if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 800b9ba: 687b ldr r3, [r7, #4]
- 800b9bc: 681b ldr r3, [r3, #0]
- 800b9be: f003 0308 and.w r3, r3, #8
- 800b9c2: 2b00 cmp r3, #0
- 800b9c4: d010 beq.n 800b9e8 <HAL_RCC_ClockConfig+0xa0>
- {
- #if defined (RCC_D2CFGR_D2PPRE1)
- if ((RCC_ClkInitStruct->APB1CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1))
- 800b9c6: 687b ldr r3, [r7, #4]
- 800b9c8: 695a ldr r2, [r3, #20]
- 800b9ca: 4b70 ldr r3, [pc, #448] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800b9cc: 69db ldr r3, [r3, #28]
- 800b9ce: f003 0370 and.w r3, r3, #112 @ 0x70
- 800b9d2: 429a cmp r2, r3
- 800b9d4: d908 bls.n 800b9e8 <HAL_RCC_ClockConfig+0xa0>
- {
- assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider));
- MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
- 800b9d6: 4b6d ldr r3, [pc, #436] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800b9d8: 69db ldr r3, [r3, #28]
- 800b9da: f023 0270 bic.w r2, r3, #112 @ 0x70
- 800b9de: 687b ldr r3, [r7, #4]
- 800b9e0: 695b ldr r3, [r3, #20]
- 800b9e2: 496a ldr r1, [pc, #424] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800b9e4: 4313 orrs r3, r2
- 800b9e6: 61cb str r3, [r1, #28]
- MODIFY_REG(RCC->CDCFGR2, RCC_CDCFGR2_CDPPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
- }
- #endif
- }
- /*-------------------------- PCLK2 Configuration ---------------------------*/
- if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 800b9e8: 687b ldr r3, [r7, #4]
- 800b9ea: 681b ldr r3, [r3, #0]
- 800b9ec: f003 0310 and.w r3, r3, #16
- 800b9f0: 2b00 cmp r3, #0
- 800b9f2: d010 beq.n 800ba16 <HAL_RCC_ClockConfig+0xce>
- {
- #if defined(RCC_D2CFGR_D2PPRE2)
- if ((RCC_ClkInitStruct->APB2CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2))
- 800b9f4: 687b ldr r3, [r7, #4]
- 800b9f6: 699a ldr r2, [r3, #24]
- 800b9f8: 4b64 ldr r3, [pc, #400] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800b9fa: 69db ldr r3, [r3, #28]
- 800b9fc: f403 63e0 and.w r3, r3, #1792 @ 0x700
- 800ba00: 429a cmp r2, r3
- 800ba02: d908 bls.n 800ba16 <HAL_RCC_ClockConfig+0xce>
- {
- assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider));
- MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider));
- 800ba04: 4b61 ldr r3, [pc, #388] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800ba06: 69db ldr r3, [r3, #28]
- 800ba08: f423 62e0 bic.w r2, r3, #1792 @ 0x700
- 800ba0c: 687b ldr r3, [r7, #4]
- 800ba0e: 699b ldr r3, [r3, #24]
- 800ba10: 495e ldr r1, [pc, #376] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800ba12: 4313 orrs r3, r2
- 800ba14: 61cb str r3, [r1, #28]
- }
- #endif
- }
- /*-------------------------- D3PCLK1 Configuration ---------------------------*/
- if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1)
- 800ba16: 687b ldr r3, [r7, #4]
- 800ba18: 681b ldr r3, [r3, #0]
- 800ba1a: f003 0320 and.w r3, r3, #32
- 800ba1e: 2b00 cmp r3, #0
- 800ba20: d010 beq.n 800ba44 <HAL_RCC_ClockConfig+0xfc>
- {
- #if defined(RCC_D3CFGR_D3PPRE)
- if ((RCC_ClkInitStruct->APB4CLKDivider) > (RCC->D3CFGR & RCC_D3CFGR_D3PPRE))
- 800ba22: 687b ldr r3, [r7, #4]
- 800ba24: 69da ldr r2, [r3, #28]
- 800ba26: 4b59 ldr r3, [pc, #356] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800ba28: 6a1b ldr r3, [r3, #32]
- 800ba2a: f003 0370 and.w r3, r3, #112 @ 0x70
- 800ba2e: 429a cmp r2, r3
- 800ba30: d908 bls.n 800ba44 <HAL_RCC_ClockConfig+0xfc>
- {
- assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider));
- MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider));
- 800ba32: 4b56 ldr r3, [pc, #344] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800ba34: 6a1b ldr r3, [r3, #32]
- 800ba36: f023 0270 bic.w r2, r3, #112 @ 0x70
- 800ba3a: 687b ldr r3, [r7, #4]
- 800ba3c: 69db ldr r3, [r3, #28]
- 800ba3e: 4953 ldr r1, [pc, #332] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800ba40: 4313 orrs r3, r2
- 800ba42: 620b str r3, [r1, #32]
- }
- #endif
- }
- /*-------------------------- HCLK Configuration --------------------------*/
- if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
- 800ba44: 687b ldr r3, [r7, #4]
- 800ba46: 681b ldr r3, [r3, #0]
- 800ba48: f003 0302 and.w r3, r3, #2
- 800ba4c: 2b00 cmp r3, #0
- 800ba4e: d010 beq.n 800ba72 <HAL_RCC_ClockConfig+0x12a>
- {
- #if defined (RCC_D1CFGR_HPRE)
- if ((RCC_ClkInitStruct->AHBCLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_HPRE))
- 800ba50: 687b ldr r3, [r7, #4]
- 800ba52: 68da ldr r2, [r3, #12]
- 800ba54: 4b4d ldr r3, [pc, #308] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800ba56: 699b ldr r3, [r3, #24]
- 800ba58: f003 030f and.w r3, r3, #15
- 800ba5c: 429a cmp r2, r3
- 800ba5e: d908 bls.n 800ba72 <HAL_RCC_ClockConfig+0x12a>
- {
- /* Set the new HCLK clock divider */
- assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
- MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
- 800ba60: 4b4a ldr r3, [pc, #296] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800ba62: 699b ldr r3, [r3, #24]
- 800ba64: f023 020f bic.w r2, r3, #15
- 800ba68: 687b ldr r3, [r7, #4]
- 800ba6a: 68db ldr r3, [r3, #12]
- 800ba6c: 4947 ldr r1, [pc, #284] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800ba6e: 4313 orrs r3, r2
- 800ba70: 618b str r3, [r1, #24]
- }
- #endif
- }
- /*------------------------- SYSCLK Configuration -------------------------*/
- if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
- 800ba72: 687b ldr r3, [r7, #4]
- 800ba74: 681b ldr r3, [r3, #0]
- 800ba76: f003 0301 and.w r3, r3, #1
- 800ba7a: 2b00 cmp r3, #0
- 800ba7c: d055 beq.n 800bb2a <HAL_RCC_ClockConfig+0x1e2>
- {
- assert_param(IS_RCC_SYSCLK(RCC_ClkInitStruct->SYSCLKDivider));
- assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
- #if defined(RCC_D1CFGR_D1CPRE)
- MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1CPRE, RCC_ClkInitStruct->SYSCLKDivider);
- 800ba7e: 4b43 ldr r3, [pc, #268] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800ba80: 699b ldr r3, [r3, #24]
- 800ba82: f423 6270 bic.w r2, r3, #3840 @ 0xf00
- 800ba86: 687b ldr r3, [r7, #4]
- 800ba88: 689b ldr r3, [r3, #8]
- 800ba8a: 4940 ldr r1, [pc, #256] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800ba8c: 4313 orrs r3, r2
- 800ba8e: 618b str r3, [r1, #24]
- #else
- MODIFY_REG(RCC->CDCFGR1, RCC_CDCFGR1_CDCPRE, RCC_ClkInitStruct->SYSCLKDivider);
- #endif
- /* HSE is selected as System Clock Source */
- if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
- 800ba90: 687b ldr r3, [r7, #4]
- 800ba92: 685b ldr r3, [r3, #4]
- 800ba94: 2b02 cmp r3, #2
- 800ba96: d107 bne.n 800baa8 <HAL_RCC_ClockConfig+0x160>
- {
- /* Check the HSE ready flag */
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
- 800ba98: 4b3c ldr r3, [pc, #240] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800ba9a: 681b ldr r3, [r3, #0]
- 800ba9c: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800baa0: 2b00 cmp r3, #0
- 800baa2: d121 bne.n 800bae8 <HAL_RCC_ClockConfig+0x1a0>
- {
- return HAL_ERROR;
- 800baa4: 2301 movs r3, #1
- 800baa6: e0f6 b.n 800bc96 <HAL_RCC_ClockConfig+0x34e>
- }
- }
- /* PLL is selected as System Clock Source */
- else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
- 800baa8: 687b ldr r3, [r7, #4]
- 800baaa: 685b ldr r3, [r3, #4]
- 800baac: 2b03 cmp r3, #3
- 800baae: d107 bne.n 800bac0 <HAL_RCC_ClockConfig+0x178>
- {
- /* Check the PLL ready flag */
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
- 800bab0: 4b36 ldr r3, [pc, #216] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800bab2: 681b ldr r3, [r3, #0]
- 800bab4: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
- 800bab8: 2b00 cmp r3, #0
- 800baba: d115 bne.n 800bae8 <HAL_RCC_ClockConfig+0x1a0>
- {
- return HAL_ERROR;
- 800babc: 2301 movs r3, #1
- 800babe: e0ea b.n 800bc96 <HAL_RCC_ClockConfig+0x34e>
- }
- }
- /* CSI is selected as System Clock Source */
- else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_CSI)
- 800bac0: 687b ldr r3, [r7, #4]
- 800bac2: 685b ldr r3, [r3, #4]
- 800bac4: 2b01 cmp r3, #1
- 800bac6: d107 bne.n 800bad8 <HAL_RCC_ClockConfig+0x190>
- {
- /* Check the PLL ready flag */
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
- 800bac8: 4b30 ldr r3, [pc, #192] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800baca: 681b ldr r3, [r3, #0]
- 800bacc: f403 7380 and.w r3, r3, #256 @ 0x100
- 800bad0: 2b00 cmp r3, #0
- 800bad2: d109 bne.n 800bae8 <HAL_RCC_ClockConfig+0x1a0>
- {
- return HAL_ERROR;
- 800bad4: 2301 movs r3, #1
- 800bad6: e0de b.n 800bc96 <HAL_RCC_ClockConfig+0x34e>
- }
- /* HSI is selected as System Clock Source */
- else
- {
- /* Check the HSI ready flag */
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
- 800bad8: 4b2c ldr r3, [pc, #176] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800bada: 681b ldr r3, [r3, #0]
- 800badc: f003 0304 and.w r3, r3, #4
- 800bae0: 2b00 cmp r3, #0
- 800bae2: d101 bne.n 800bae8 <HAL_RCC_ClockConfig+0x1a0>
- {
- return HAL_ERROR;
- 800bae4: 2301 movs r3, #1
- 800bae6: e0d6 b.n 800bc96 <HAL_RCC_ClockConfig+0x34e>
- }
- }
- MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
- 800bae8: 4b28 ldr r3, [pc, #160] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800baea: 691b ldr r3, [r3, #16]
- 800baec: f023 0207 bic.w r2, r3, #7
- 800baf0: 687b ldr r3, [r7, #4]
- 800baf2: 685b ldr r3, [r3, #4]
- 800baf4: 4925 ldr r1, [pc, #148] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800baf6: 4313 orrs r3, r2
- 800baf8: 610b str r3, [r1, #16]
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800bafa: f7f9 fd35 bl 8005568 <HAL_GetTick>
- 800bafe: 6178 str r0, [r7, #20]
- while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- 800bb00: e00a b.n 800bb18 <HAL_RCC_ClockConfig+0x1d0>
- {
- if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
- 800bb02: f7f9 fd31 bl 8005568 <HAL_GetTick>
- 800bb06: 4602 mov r2, r0
- 800bb08: 697b ldr r3, [r7, #20]
- 800bb0a: 1ad3 subs r3, r2, r3
- 800bb0c: f241 3288 movw r2, #5000 @ 0x1388
- 800bb10: 4293 cmp r3, r2
- 800bb12: d901 bls.n 800bb18 <HAL_RCC_ClockConfig+0x1d0>
- {
- return HAL_TIMEOUT;
- 800bb14: 2303 movs r3, #3
- 800bb16: e0be b.n 800bc96 <HAL_RCC_ClockConfig+0x34e>
- while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- 800bb18: 4b1c ldr r3, [pc, #112] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800bb1a: 691b ldr r3, [r3, #16]
- 800bb1c: f003 0238 and.w r2, r3, #56 @ 0x38
- 800bb20: 687b ldr r3, [r7, #4]
- 800bb22: 685b ldr r3, [r3, #4]
- 800bb24: 00db lsls r3, r3, #3
- 800bb26: 429a cmp r2, r3
- 800bb28: d1eb bne.n 800bb02 <HAL_RCC_ClockConfig+0x1ba>
- }
- /* Decreasing the BUS frequency divider */
- /*-------------------------- HCLK Configuration --------------------------*/
- if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
- 800bb2a: 687b ldr r3, [r7, #4]
- 800bb2c: 681b ldr r3, [r3, #0]
- 800bb2e: f003 0302 and.w r3, r3, #2
- 800bb32: 2b00 cmp r3, #0
- 800bb34: d010 beq.n 800bb58 <HAL_RCC_ClockConfig+0x210>
- {
- #if defined(RCC_D1CFGR_HPRE)
- if ((RCC_ClkInitStruct->AHBCLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_HPRE))
- 800bb36: 687b ldr r3, [r7, #4]
- 800bb38: 68da ldr r2, [r3, #12]
- 800bb3a: 4b14 ldr r3, [pc, #80] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800bb3c: 699b ldr r3, [r3, #24]
- 800bb3e: f003 030f and.w r3, r3, #15
- 800bb42: 429a cmp r2, r3
- 800bb44: d208 bcs.n 800bb58 <HAL_RCC_ClockConfig+0x210>
- {
- /* Set the new HCLK clock divider */
- assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
- MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
- 800bb46: 4b11 ldr r3, [pc, #68] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800bb48: 699b ldr r3, [r3, #24]
- 800bb4a: f023 020f bic.w r2, r3, #15
- 800bb4e: 687b ldr r3, [r7, #4]
- 800bb50: 68db ldr r3, [r3, #12]
- 800bb52: 490e ldr r1, [pc, #56] @ (800bb8c <HAL_RCC_ClockConfig+0x244>)
- 800bb54: 4313 orrs r3, r2
- 800bb56: 618b str r3, [r1, #24]
- }
- #endif
- }
- /* Decreasing the number of wait states because of lower CPU frequency */
- if (FLatency < __HAL_FLASH_GET_LATENCY())
- 800bb58: 4b0b ldr r3, [pc, #44] @ (800bb88 <HAL_RCC_ClockConfig+0x240>)
- 800bb5a: 681b ldr r3, [r3, #0]
- 800bb5c: f003 030f and.w r3, r3, #15
- 800bb60: 683a ldr r2, [r7, #0]
- 800bb62: 429a cmp r2, r3
- 800bb64: d214 bcs.n 800bb90 <HAL_RCC_ClockConfig+0x248>
- {
- /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
- __HAL_FLASH_SET_LATENCY(FLatency);
- 800bb66: 4b08 ldr r3, [pc, #32] @ (800bb88 <HAL_RCC_ClockConfig+0x240>)
- 800bb68: 681b ldr r3, [r3, #0]
- 800bb6a: f023 020f bic.w r2, r3, #15
- 800bb6e: 4906 ldr r1, [pc, #24] @ (800bb88 <HAL_RCC_ClockConfig+0x240>)
- 800bb70: 683b ldr r3, [r7, #0]
- 800bb72: 4313 orrs r3, r2
- 800bb74: 600b str r3, [r1, #0]
- /* Check that the new number of wait states is taken into account to access the Flash
- memory by reading the FLASH_ACR register */
- if (__HAL_FLASH_GET_LATENCY() != FLatency)
- 800bb76: 4b04 ldr r3, [pc, #16] @ (800bb88 <HAL_RCC_ClockConfig+0x240>)
- 800bb78: 681b ldr r3, [r3, #0]
- 800bb7a: f003 030f and.w r3, r3, #15
- 800bb7e: 683a ldr r2, [r7, #0]
- 800bb80: 429a cmp r2, r3
- 800bb82: d005 beq.n 800bb90 <HAL_RCC_ClockConfig+0x248>
- {
- return HAL_ERROR;
- 800bb84: 2301 movs r3, #1
- 800bb86: e086 b.n 800bc96 <HAL_RCC_ClockConfig+0x34e>
- 800bb88: 52002000 .word 0x52002000
- 800bb8c: 58024400 .word 0x58024400
- }
- }
- /*-------------------------- D1PCLK1/CDPCLK Configuration ---------------------------*/
- if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1)
- 800bb90: 687b ldr r3, [r7, #4]
- 800bb92: 681b ldr r3, [r3, #0]
- 800bb94: f003 0304 and.w r3, r3, #4
- 800bb98: 2b00 cmp r3, #0
- 800bb9a: d010 beq.n 800bbbe <HAL_RCC_ClockConfig+0x276>
- {
- #if defined(RCC_D1CFGR_D1PPRE)
- if ((RCC_ClkInitStruct->APB3CLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_D1PPRE))
- 800bb9c: 687b ldr r3, [r7, #4]
- 800bb9e: 691a ldr r2, [r3, #16]
- 800bba0: 4b3f ldr r3, [pc, #252] @ (800bca0 <HAL_RCC_ClockConfig+0x358>)
- 800bba2: 699b ldr r3, [r3, #24]
- 800bba4: f003 0370 and.w r3, r3, #112 @ 0x70
- 800bba8: 429a cmp r2, r3
- 800bbaa: d208 bcs.n 800bbbe <HAL_RCC_ClockConfig+0x276>
- {
- assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider));
- MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider);
- 800bbac: 4b3c ldr r3, [pc, #240] @ (800bca0 <HAL_RCC_ClockConfig+0x358>)
- 800bbae: 699b ldr r3, [r3, #24]
- 800bbb0: f023 0270 bic.w r2, r3, #112 @ 0x70
- 800bbb4: 687b ldr r3, [r7, #4]
- 800bbb6: 691b ldr r3, [r3, #16]
- 800bbb8: 4939 ldr r1, [pc, #228] @ (800bca0 <HAL_RCC_ClockConfig+0x358>)
- 800bbba: 4313 orrs r3, r2
- 800bbbc: 618b str r3, [r1, #24]
- }
- #endif
- }
- /*-------------------------- PCLK1 Configuration ---------------------------*/
- if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 800bbbe: 687b ldr r3, [r7, #4]
- 800bbc0: 681b ldr r3, [r3, #0]
- 800bbc2: f003 0308 and.w r3, r3, #8
- 800bbc6: 2b00 cmp r3, #0
- 800bbc8: d010 beq.n 800bbec <HAL_RCC_ClockConfig+0x2a4>
- {
- #if defined(RCC_D2CFGR_D2PPRE1)
- if ((RCC_ClkInitStruct->APB1CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1))
- 800bbca: 687b ldr r3, [r7, #4]
- 800bbcc: 695a ldr r2, [r3, #20]
- 800bbce: 4b34 ldr r3, [pc, #208] @ (800bca0 <HAL_RCC_ClockConfig+0x358>)
- 800bbd0: 69db ldr r3, [r3, #28]
- 800bbd2: f003 0370 and.w r3, r3, #112 @ 0x70
- 800bbd6: 429a cmp r2, r3
- 800bbd8: d208 bcs.n 800bbec <HAL_RCC_ClockConfig+0x2a4>
- {
- assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider));
- MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
- 800bbda: 4b31 ldr r3, [pc, #196] @ (800bca0 <HAL_RCC_ClockConfig+0x358>)
- 800bbdc: 69db ldr r3, [r3, #28]
- 800bbde: f023 0270 bic.w r2, r3, #112 @ 0x70
- 800bbe2: 687b ldr r3, [r7, #4]
- 800bbe4: 695b ldr r3, [r3, #20]
- 800bbe6: 492e ldr r1, [pc, #184] @ (800bca0 <HAL_RCC_ClockConfig+0x358>)
- 800bbe8: 4313 orrs r3, r2
- 800bbea: 61cb str r3, [r1, #28]
- }
- #endif
- }
- /*-------------------------- PCLK2 Configuration ---------------------------*/
- if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 800bbec: 687b ldr r3, [r7, #4]
- 800bbee: 681b ldr r3, [r3, #0]
- 800bbf0: f003 0310 and.w r3, r3, #16
- 800bbf4: 2b00 cmp r3, #0
- 800bbf6: d010 beq.n 800bc1a <HAL_RCC_ClockConfig+0x2d2>
- {
- #if defined (RCC_D2CFGR_D2PPRE2)
- if ((RCC_ClkInitStruct->APB2CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2))
- 800bbf8: 687b ldr r3, [r7, #4]
- 800bbfa: 699a ldr r2, [r3, #24]
- 800bbfc: 4b28 ldr r3, [pc, #160] @ (800bca0 <HAL_RCC_ClockConfig+0x358>)
- 800bbfe: 69db ldr r3, [r3, #28]
- 800bc00: f403 63e0 and.w r3, r3, #1792 @ 0x700
- 800bc04: 429a cmp r2, r3
- 800bc06: d208 bcs.n 800bc1a <HAL_RCC_ClockConfig+0x2d2>
- {
- assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider));
- MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider));
- 800bc08: 4b25 ldr r3, [pc, #148] @ (800bca0 <HAL_RCC_ClockConfig+0x358>)
- 800bc0a: 69db ldr r3, [r3, #28]
- 800bc0c: f423 62e0 bic.w r2, r3, #1792 @ 0x700
- 800bc10: 687b ldr r3, [r7, #4]
- 800bc12: 699b ldr r3, [r3, #24]
- 800bc14: 4922 ldr r1, [pc, #136] @ (800bca0 <HAL_RCC_ClockConfig+0x358>)
- 800bc16: 4313 orrs r3, r2
- 800bc18: 61cb str r3, [r1, #28]
- }
- #endif
- }
- /*-------------------------- D3PCLK1/SRDPCLK1 Configuration ---------------------------*/
- if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1)
- 800bc1a: 687b ldr r3, [r7, #4]
- 800bc1c: 681b ldr r3, [r3, #0]
- 800bc1e: f003 0320 and.w r3, r3, #32
- 800bc22: 2b00 cmp r3, #0
- 800bc24: d010 beq.n 800bc48 <HAL_RCC_ClockConfig+0x300>
- {
- #if defined(RCC_D3CFGR_D3PPRE)
- if ((RCC_ClkInitStruct->APB4CLKDivider) < (RCC->D3CFGR & RCC_D3CFGR_D3PPRE))
- 800bc26: 687b ldr r3, [r7, #4]
- 800bc28: 69da ldr r2, [r3, #28]
- 800bc2a: 4b1d ldr r3, [pc, #116] @ (800bca0 <HAL_RCC_ClockConfig+0x358>)
- 800bc2c: 6a1b ldr r3, [r3, #32]
- 800bc2e: f003 0370 and.w r3, r3, #112 @ 0x70
- 800bc32: 429a cmp r2, r3
- 800bc34: d208 bcs.n 800bc48 <HAL_RCC_ClockConfig+0x300>
- {
- assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider));
- MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider));
- 800bc36: 4b1a ldr r3, [pc, #104] @ (800bca0 <HAL_RCC_ClockConfig+0x358>)
- 800bc38: 6a1b ldr r3, [r3, #32]
- 800bc3a: f023 0270 bic.w r2, r3, #112 @ 0x70
- 800bc3e: 687b ldr r3, [r7, #4]
- 800bc40: 69db ldr r3, [r3, #28]
- 800bc42: 4917 ldr r1, [pc, #92] @ (800bca0 <HAL_RCC_ClockConfig+0x358>)
- 800bc44: 4313 orrs r3, r2
- 800bc46: 620b str r3, [r1, #32]
- #endif
- }
- /* Update the SystemCoreClock global variable */
- #if defined(RCC_D1CFGR_D1CPRE)
- common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU);
- 800bc48: f000 f834 bl 800bcb4 <HAL_RCC_GetSysClockFreq>
- 800bc4c: 4602 mov r2, r0
- 800bc4e: 4b14 ldr r3, [pc, #80] @ (800bca0 <HAL_RCC_ClockConfig+0x358>)
- 800bc50: 699b ldr r3, [r3, #24]
- 800bc52: 0a1b lsrs r3, r3, #8
- 800bc54: f003 030f and.w r3, r3, #15
- 800bc58: 4912 ldr r1, [pc, #72] @ (800bca4 <HAL_RCC_ClockConfig+0x35c>)
- 800bc5a: 5ccb ldrb r3, [r1, r3]
- 800bc5c: f003 031f and.w r3, r3, #31
- 800bc60: fa22 f303 lsr.w r3, r2, r3
- 800bc64: 613b str r3, [r7, #16]
- #else
- common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU);
- #endif
- #if defined(RCC_D1CFGR_HPRE)
- SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
- 800bc66: 4b0e ldr r3, [pc, #56] @ (800bca0 <HAL_RCC_ClockConfig+0x358>)
- 800bc68: 699b ldr r3, [r3, #24]
- 800bc6a: f003 030f and.w r3, r3, #15
- 800bc6e: 4a0d ldr r2, [pc, #52] @ (800bca4 <HAL_RCC_ClockConfig+0x35c>)
- 800bc70: 5cd3 ldrb r3, [r2, r3]
- 800bc72: f003 031f and.w r3, r3, #31
- 800bc76: 693a ldr r2, [r7, #16]
- 800bc78: fa22 f303 lsr.w r3, r2, r3
- 800bc7c: 4a0a ldr r2, [pc, #40] @ (800bca8 <HAL_RCC_ClockConfig+0x360>)
- 800bc7e: 6013 str r3, [r2, #0]
- #endif
- #if defined(DUAL_CORE) && defined(CORE_CM4)
- SystemCoreClock = SystemD2Clock;
- #else
- SystemCoreClock = common_system_clock;
- 800bc80: 4a0a ldr r2, [pc, #40] @ (800bcac <HAL_RCC_ClockConfig+0x364>)
- 800bc82: 693b ldr r3, [r7, #16]
- 800bc84: 6013 str r3, [r2, #0]
- #endif /* DUAL_CORE && CORE_CM4 */
- /* Configure the source of time base considering new system clocks settings*/
- halstatus = HAL_InitTick(uwTickPrio);
- 800bc86: 4b0a ldr r3, [pc, #40] @ (800bcb0 <HAL_RCC_ClockConfig+0x368>)
- 800bc88: 681b ldr r3, [r3, #0]
- 800bc8a: 4618 mov r0, r3
- 800bc8c: f7f8 f928 bl 8003ee0 <HAL_InitTick>
- 800bc90: 4603 mov r3, r0
- 800bc92: 73fb strb r3, [r7, #15]
- return halstatus;
- 800bc94: 7bfb ldrb r3, [r7, #15]
- }
- 800bc96: 4618 mov r0, r3
- 800bc98: 3718 adds r7, #24
- 800bc9a: 46bd mov sp, r7
- 800bc9c: bd80 pop {r7, pc}
- 800bc9e: bf00 nop
- 800bca0: 58024400 .word 0x58024400
- 800bca4: 08018c18 .word 0x08018c18
- 800bca8: 24000038 .word 0x24000038
- 800bcac: 24000034 .word 0x24000034
- 800bcb0: 2400003c .word 0x2400003c
- 0800bcb4 <HAL_RCC_GetSysClockFreq>:
- *
- *
- * @retval SYSCLK frequency
- */
- uint32_t HAL_RCC_GetSysClockFreq(void)
- {
- 800bcb4: b480 push {r7}
- 800bcb6: b089 sub sp, #36 @ 0x24
- 800bcb8: af00 add r7, sp, #0
- float_t fracn1, pllvco;
- uint32_t sysclockfreq;
- /* Get SYSCLK source -------------------------------------------------------*/
- switch (RCC->CFGR & RCC_CFGR_SWS)
- 800bcba: 4bb3 ldr r3, [pc, #716] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800bcbc: 691b ldr r3, [r3, #16]
- 800bcbe: f003 0338 and.w r3, r3, #56 @ 0x38
- 800bcc2: 2b18 cmp r3, #24
- 800bcc4: f200 8155 bhi.w 800bf72 <HAL_RCC_GetSysClockFreq+0x2be>
- 800bcc8: a201 add r2, pc, #4 @ (adr r2, 800bcd0 <HAL_RCC_GetSysClockFreq+0x1c>)
- 800bcca: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800bcce: bf00 nop
- 800bcd0: 0800bd35 .word 0x0800bd35
- 800bcd4: 0800bf73 .word 0x0800bf73
- 800bcd8: 0800bf73 .word 0x0800bf73
- 800bcdc: 0800bf73 .word 0x0800bf73
- 800bce0: 0800bf73 .word 0x0800bf73
- 800bce4: 0800bf73 .word 0x0800bf73
- 800bce8: 0800bf73 .word 0x0800bf73
- 800bcec: 0800bf73 .word 0x0800bf73
- 800bcf0: 0800bd5b .word 0x0800bd5b
- 800bcf4: 0800bf73 .word 0x0800bf73
- 800bcf8: 0800bf73 .word 0x0800bf73
- 800bcfc: 0800bf73 .word 0x0800bf73
- 800bd00: 0800bf73 .word 0x0800bf73
- 800bd04: 0800bf73 .word 0x0800bf73
- 800bd08: 0800bf73 .word 0x0800bf73
- 800bd0c: 0800bf73 .word 0x0800bf73
- 800bd10: 0800bd61 .word 0x0800bd61
- 800bd14: 0800bf73 .word 0x0800bf73
- 800bd18: 0800bf73 .word 0x0800bf73
- 800bd1c: 0800bf73 .word 0x0800bf73
- 800bd20: 0800bf73 .word 0x0800bf73
- 800bd24: 0800bf73 .word 0x0800bf73
- 800bd28: 0800bf73 .word 0x0800bf73
- 800bd2c: 0800bf73 .word 0x0800bf73
- 800bd30: 0800bd67 .word 0x0800bd67
- {
- case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
- 800bd34: 4b94 ldr r3, [pc, #592] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800bd36: 681b ldr r3, [r3, #0]
- 800bd38: f003 0320 and.w r3, r3, #32
- 800bd3c: 2b00 cmp r3, #0
- 800bd3e: d009 beq.n 800bd54 <HAL_RCC_GetSysClockFreq+0xa0>
- {
- sysclockfreq = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
- 800bd40: 4b91 ldr r3, [pc, #580] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800bd42: 681b ldr r3, [r3, #0]
- 800bd44: 08db lsrs r3, r3, #3
- 800bd46: f003 0303 and.w r3, r3, #3
- 800bd4a: 4a90 ldr r2, [pc, #576] @ (800bf8c <HAL_RCC_GetSysClockFreq+0x2d8>)
- 800bd4c: fa22 f303 lsr.w r3, r2, r3
- 800bd50: 61bb str r3, [r7, #24]
- else
- {
- sysclockfreq = (uint32_t) HSI_VALUE;
- }
- break;
- 800bd52: e111 b.n 800bf78 <HAL_RCC_GetSysClockFreq+0x2c4>
- sysclockfreq = (uint32_t) HSI_VALUE;
- 800bd54: 4b8d ldr r3, [pc, #564] @ (800bf8c <HAL_RCC_GetSysClockFreq+0x2d8>)
- 800bd56: 61bb str r3, [r7, #24]
- break;
- 800bd58: e10e b.n 800bf78 <HAL_RCC_GetSysClockFreq+0x2c4>
- case RCC_CFGR_SWS_CSI: /* CSI used as system clock source */
- sysclockfreq = CSI_VALUE;
- 800bd5a: 4b8d ldr r3, [pc, #564] @ (800bf90 <HAL_RCC_GetSysClockFreq+0x2dc>)
- 800bd5c: 61bb str r3, [r7, #24]
- break;
- 800bd5e: e10b b.n 800bf78 <HAL_RCC_GetSysClockFreq+0x2c4>
- case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
- sysclockfreq = HSE_VALUE;
- 800bd60: 4b8c ldr r3, [pc, #560] @ (800bf94 <HAL_RCC_GetSysClockFreq+0x2e0>)
- 800bd62: 61bb str r3, [r7, #24]
- break;
- 800bd64: e108 b.n 800bf78 <HAL_RCC_GetSysClockFreq+0x2c4>
- case RCC_CFGR_SWS_PLL1: /* PLL1 used as system clock source */
- /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
- SYSCLK = PLL_VCO / PLLR
- */
- pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
- 800bd66: 4b88 ldr r3, [pc, #544] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800bd68: 6a9b ldr r3, [r3, #40] @ 0x28
- 800bd6a: f003 0303 and.w r3, r3, #3
- 800bd6e: 617b str r3, [r7, #20]
- pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> 4) ;
- 800bd70: 4b85 ldr r3, [pc, #532] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800bd72: 6a9b ldr r3, [r3, #40] @ 0x28
- 800bd74: 091b lsrs r3, r3, #4
- 800bd76: f003 033f and.w r3, r3, #63 @ 0x3f
- 800bd7a: 613b str r3, [r7, #16]
- pllfracen = ((RCC-> PLLCFGR & RCC_PLLCFGR_PLL1FRACEN) >> RCC_PLLCFGR_PLL1FRACEN_Pos);
- 800bd7c: 4b82 ldr r3, [pc, #520] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800bd7e: 6adb ldr r3, [r3, #44] @ 0x2c
- 800bd80: f003 0301 and.w r3, r3, #1
- 800bd84: 60fb str r3, [r7, #12]
- fracn1 = (float_t)(uint32_t)(pllfracen * ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> 3));
- 800bd86: 4b80 ldr r3, [pc, #512] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800bd88: 6b5b ldr r3, [r3, #52] @ 0x34
- 800bd8a: 08db lsrs r3, r3, #3
- 800bd8c: f3c3 030c ubfx r3, r3, #0, #13
- 800bd90: 68fa ldr r2, [r7, #12]
- 800bd92: fb02 f303 mul.w r3, r2, r3
- 800bd96: ee07 3a90 vmov s15, r3
- 800bd9a: eef8 7a67 vcvt.f32.u32 s15, s15
- 800bd9e: edc7 7a02 vstr s15, [r7, #8]
- if (pllm != 0U)
- 800bda2: 693b ldr r3, [r7, #16]
- 800bda4: 2b00 cmp r3, #0
- 800bda6: f000 80e1 beq.w 800bf6c <HAL_RCC_GetSysClockFreq+0x2b8>
- 800bdaa: 697b ldr r3, [r7, #20]
- 800bdac: 2b02 cmp r3, #2
- 800bdae: f000 8083 beq.w 800beb8 <HAL_RCC_GetSysClockFreq+0x204>
- 800bdb2: 697b ldr r3, [r7, #20]
- 800bdb4: 2b02 cmp r3, #2
- 800bdb6: f200 80a1 bhi.w 800befc <HAL_RCC_GetSysClockFreq+0x248>
- 800bdba: 697b ldr r3, [r7, #20]
- 800bdbc: 2b00 cmp r3, #0
- 800bdbe: d003 beq.n 800bdc8 <HAL_RCC_GetSysClockFreq+0x114>
- 800bdc0: 697b ldr r3, [r7, #20]
- 800bdc2: 2b01 cmp r3, #1
- 800bdc4: d056 beq.n 800be74 <HAL_RCC_GetSysClockFreq+0x1c0>
- 800bdc6: e099 b.n 800befc <HAL_RCC_GetSysClockFreq+0x248>
- {
- switch (pllsource)
- {
- case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
- 800bdc8: 4b6f ldr r3, [pc, #444] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800bdca: 681b ldr r3, [r3, #0]
- 800bdcc: f003 0320 and.w r3, r3, #32
- 800bdd0: 2b00 cmp r3, #0
- 800bdd2: d02d beq.n 800be30 <HAL_RCC_GetSysClockFreq+0x17c>
- {
- hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
- 800bdd4: 4b6c ldr r3, [pc, #432] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800bdd6: 681b ldr r3, [r3, #0]
- 800bdd8: 08db lsrs r3, r3, #3
- 800bdda: f003 0303 and.w r3, r3, #3
- 800bdde: 4a6b ldr r2, [pc, #428] @ (800bf8c <HAL_RCC_GetSysClockFreq+0x2d8>)
- 800bde0: fa22 f303 lsr.w r3, r2, r3
- 800bde4: 607b str r3, [r7, #4]
- pllvco = ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
- 800bde6: 687b ldr r3, [r7, #4]
- 800bde8: ee07 3a90 vmov s15, r3
- 800bdec: eef8 6a67 vcvt.f32.u32 s13, s15
- 800bdf0: 693b ldr r3, [r7, #16]
- 800bdf2: ee07 3a90 vmov s15, r3
- 800bdf6: eef8 7a67 vcvt.f32.u32 s15, s15
- 800bdfa: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800bdfe: 4b62 ldr r3, [pc, #392] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800be00: 6b1b ldr r3, [r3, #48] @ 0x30
- 800be02: f3c3 0308 ubfx r3, r3, #0, #9
- 800be06: ee07 3a90 vmov s15, r3
- 800be0a: eef8 6a67 vcvt.f32.u32 s13, s15
- 800be0e: ed97 6a02 vldr s12, [r7, #8]
- 800be12: eddf 5a61 vldr s11, [pc, #388] @ 800bf98 <HAL_RCC_GetSysClockFreq+0x2e4>
- 800be16: eec6 7a25 vdiv.f32 s15, s12, s11
- 800be1a: ee76 7aa7 vadd.f32 s15, s13, s15
- 800be1e: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800be22: ee77 7aa6 vadd.f32 s15, s15, s13
- 800be26: ee67 7a27 vmul.f32 s15, s14, s15
- 800be2a: edc7 7a07 vstr s15, [r7, #28]
- }
- else
- {
- pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
- }
- break;
- 800be2e: e087 b.n 800bf40 <HAL_RCC_GetSysClockFreq+0x28c>
- pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
- 800be30: 693b ldr r3, [r7, #16]
- 800be32: ee07 3a90 vmov s15, r3
- 800be36: eef8 7a67 vcvt.f32.u32 s15, s15
- 800be3a: eddf 6a58 vldr s13, [pc, #352] @ 800bf9c <HAL_RCC_GetSysClockFreq+0x2e8>
- 800be3e: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800be42: 4b51 ldr r3, [pc, #324] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800be44: 6b1b ldr r3, [r3, #48] @ 0x30
- 800be46: f3c3 0308 ubfx r3, r3, #0, #9
- 800be4a: ee07 3a90 vmov s15, r3
- 800be4e: eef8 6a67 vcvt.f32.u32 s13, s15
- 800be52: ed97 6a02 vldr s12, [r7, #8]
- 800be56: eddf 5a50 vldr s11, [pc, #320] @ 800bf98 <HAL_RCC_GetSysClockFreq+0x2e4>
- 800be5a: eec6 7a25 vdiv.f32 s15, s12, s11
- 800be5e: ee76 7aa7 vadd.f32 s15, s13, s15
- 800be62: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800be66: ee77 7aa6 vadd.f32 s15, s15, s13
- 800be6a: ee67 7a27 vmul.f32 s15, s14, s15
- 800be6e: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800be72: e065 b.n 800bf40 <HAL_RCC_GetSysClockFreq+0x28c>
- case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */
- pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
- 800be74: 693b ldr r3, [r7, #16]
- 800be76: ee07 3a90 vmov s15, r3
- 800be7a: eef8 7a67 vcvt.f32.u32 s15, s15
- 800be7e: eddf 6a48 vldr s13, [pc, #288] @ 800bfa0 <HAL_RCC_GetSysClockFreq+0x2ec>
- 800be82: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800be86: 4b40 ldr r3, [pc, #256] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800be88: 6b1b ldr r3, [r3, #48] @ 0x30
- 800be8a: f3c3 0308 ubfx r3, r3, #0, #9
- 800be8e: ee07 3a90 vmov s15, r3
- 800be92: eef8 6a67 vcvt.f32.u32 s13, s15
- 800be96: ed97 6a02 vldr s12, [r7, #8]
- 800be9a: eddf 5a3f vldr s11, [pc, #252] @ 800bf98 <HAL_RCC_GetSysClockFreq+0x2e4>
- 800be9e: eec6 7a25 vdiv.f32 s15, s12, s11
- 800bea2: ee76 7aa7 vadd.f32 s15, s13, s15
- 800bea6: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800beaa: ee77 7aa6 vadd.f32 s15, s15, s13
- 800beae: ee67 7a27 vmul.f32 s15, s14, s15
- 800beb2: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800beb6: e043 b.n 800bf40 <HAL_RCC_GetSysClockFreq+0x28c>
- case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
- pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
- 800beb8: 693b ldr r3, [r7, #16]
- 800beba: ee07 3a90 vmov s15, r3
- 800bebe: eef8 7a67 vcvt.f32.u32 s15, s15
- 800bec2: eddf 6a38 vldr s13, [pc, #224] @ 800bfa4 <HAL_RCC_GetSysClockFreq+0x2f0>
- 800bec6: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800beca: 4b2f ldr r3, [pc, #188] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800becc: 6b1b ldr r3, [r3, #48] @ 0x30
- 800bece: f3c3 0308 ubfx r3, r3, #0, #9
- 800bed2: ee07 3a90 vmov s15, r3
- 800bed6: eef8 6a67 vcvt.f32.u32 s13, s15
- 800beda: ed97 6a02 vldr s12, [r7, #8]
- 800bede: eddf 5a2e vldr s11, [pc, #184] @ 800bf98 <HAL_RCC_GetSysClockFreq+0x2e4>
- 800bee2: eec6 7a25 vdiv.f32 s15, s12, s11
- 800bee6: ee76 7aa7 vadd.f32 s15, s13, s15
- 800beea: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800beee: ee77 7aa6 vadd.f32 s15, s15, s13
- 800bef2: ee67 7a27 vmul.f32 s15, s14, s15
- 800bef6: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800befa: e021 b.n 800bf40 <HAL_RCC_GetSysClockFreq+0x28c>
- default:
- pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
- 800befc: 693b ldr r3, [r7, #16]
- 800befe: ee07 3a90 vmov s15, r3
- 800bf02: eef8 7a67 vcvt.f32.u32 s15, s15
- 800bf06: eddf 6a26 vldr s13, [pc, #152] @ 800bfa0 <HAL_RCC_GetSysClockFreq+0x2ec>
- 800bf0a: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800bf0e: 4b1e ldr r3, [pc, #120] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800bf10: 6b1b ldr r3, [r3, #48] @ 0x30
- 800bf12: f3c3 0308 ubfx r3, r3, #0, #9
- 800bf16: ee07 3a90 vmov s15, r3
- 800bf1a: eef8 6a67 vcvt.f32.u32 s13, s15
- 800bf1e: ed97 6a02 vldr s12, [r7, #8]
- 800bf22: eddf 5a1d vldr s11, [pc, #116] @ 800bf98 <HAL_RCC_GetSysClockFreq+0x2e4>
- 800bf26: eec6 7a25 vdiv.f32 s15, s12, s11
- 800bf2a: ee76 7aa7 vadd.f32 s15, s13, s15
- 800bf2e: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800bf32: ee77 7aa6 vadd.f32 s15, s15, s13
- 800bf36: ee67 7a27 vmul.f32 s15, s14, s15
- 800bf3a: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800bf3e: bf00 nop
- }
- pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >> 9) + 1U) ;
- 800bf40: 4b11 ldr r3, [pc, #68] @ (800bf88 <HAL_RCC_GetSysClockFreq+0x2d4>)
- 800bf42: 6b1b ldr r3, [r3, #48] @ 0x30
- 800bf44: 0a5b lsrs r3, r3, #9
- 800bf46: f003 037f and.w r3, r3, #127 @ 0x7f
- 800bf4a: 3301 adds r3, #1
- 800bf4c: 603b str r3, [r7, #0]
- sysclockfreq = (uint32_t)(float_t)(pllvco / (float_t)pllp);
- 800bf4e: 683b ldr r3, [r7, #0]
- 800bf50: ee07 3a90 vmov s15, r3
- 800bf54: eeb8 7a67 vcvt.f32.u32 s14, s15
- 800bf58: edd7 6a07 vldr s13, [r7, #28]
- 800bf5c: eec6 7a87 vdiv.f32 s15, s13, s14
- 800bf60: eefc 7ae7 vcvt.u32.f32 s15, s15
- 800bf64: ee17 3a90 vmov r3, s15
- 800bf68: 61bb str r3, [r7, #24]
- }
- else
- {
- sysclockfreq = 0U;
- }
- break;
- 800bf6a: e005 b.n 800bf78 <HAL_RCC_GetSysClockFreq+0x2c4>
- sysclockfreq = 0U;
- 800bf6c: 2300 movs r3, #0
- 800bf6e: 61bb str r3, [r7, #24]
- break;
- 800bf70: e002 b.n 800bf78 <HAL_RCC_GetSysClockFreq+0x2c4>
- default:
- sysclockfreq = CSI_VALUE;
- 800bf72: 4b07 ldr r3, [pc, #28] @ (800bf90 <HAL_RCC_GetSysClockFreq+0x2dc>)
- 800bf74: 61bb str r3, [r7, #24]
- break;
- 800bf76: bf00 nop
- }
- return sysclockfreq;
- 800bf78: 69bb ldr r3, [r7, #24]
- }
- 800bf7a: 4618 mov r0, r3
- 800bf7c: 3724 adds r7, #36 @ 0x24
- 800bf7e: 46bd mov sp, r7
- 800bf80: f85d 7b04 ldr.w r7, [sp], #4
- 800bf84: 4770 bx lr
- 800bf86: bf00 nop
- 800bf88: 58024400 .word 0x58024400
- 800bf8c: 03d09000 .word 0x03d09000
- 800bf90: 003d0900 .word 0x003d0900
- 800bf94: 017d7840 .word 0x017d7840
- 800bf98: 46000000 .word 0x46000000
- 800bf9c: 4c742400 .word 0x4c742400
- 800bfa0: 4a742400 .word 0x4a742400
- 800bfa4: 4bbebc20 .word 0x4bbebc20
- 0800bfa8 <HAL_RCC_GetHCLKFreq>:
- * @note The SystemD2Clock CMSIS variable is used to store System domain2 Clock Frequency
- * and updated within this function
- * @retval HCLK frequency
- */
- uint32_t HAL_RCC_GetHCLKFreq(void)
- {
- 800bfa8: b580 push {r7, lr}
- 800bfaa: b082 sub sp, #8
- 800bfac: af00 add r7, sp, #0
- uint32_t common_system_clock;
- #if defined(RCC_D1CFGR_D1CPRE)
- common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos] & 0x1FU);
- 800bfae: f7ff fe81 bl 800bcb4 <HAL_RCC_GetSysClockFreq>
- 800bfb2: 4602 mov r2, r0
- 800bfb4: 4b10 ldr r3, [pc, #64] @ (800bff8 <HAL_RCC_GetHCLKFreq+0x50>)
- 800bfb6: 699b ldr r3, [r3, #24]
- 800bfb8: 0a1b lsrs r3, r3, #8
- 800bfba: f003 030f and.w r3, r3, #15
- 800bfbe: 490f ldr r1, [pc, #60] @ (800bffc <HAL_RCC_GetHCLKFreq+0x54>)
- 800bfc0: 5ccb ldrb r3, [r1, r3]
- 800bfc2: f003 031f and.w r3, r3, #31
- 800bfc6: fa22 f303 lsr.w r3, r2, r3
- 800bfca: 607b str r3, [r7, #4]
- #else
- common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos] & 0x1FU);
- #endif
- #if defined(RCC_D1CFGR_HPRE)
- SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
- 800bfcc: 4b0a ldr r3, [pc, #40] @ (800bff8 <HAL_RCC_GetHCLKFreq+0x50>)
- 800bfce: 699b ldr r3, [r3, #24]
- 800bfd0: f003 030f and.w r3, r3, #15
- 800bfd4: 4a09 ldr r2, [pc, #36] @ (800bffc <HAL_RCC_GetHCLKFreq+0x54>)
- 800bfd6: 5cd3 ldrb r3, [r2, r3]
- 800bfd8: f003 031f and.w r3, r3, #31
- 800bfdc: 687a ldr r2, [r7, #4]
- 800bfde: fa22 f303 lsr.w r3, r2, r3
- 800bfe2: 4a07 ldr r2, [pc, #28] @ (800c000 <HAL_RCC_GetHCLKFreq+0x58>)
- 800bfe4: 6013 str r3, [r2, #0]
- #endif
- #if defined(DUAL_CORE) && defined(CORE_CM4)
- SystemCoreClock = SystemD2Clock;
- #else
- SystemCoreClock = common_system_clock;
- 800bfe6: 4a07 ldr r2, [pc, #28] @ (800c004 <HAL_RCC_GetHCLKFreq+0x5c>)
- 800bfe8: 687b ldr r3, [r7, #4]
- 800bfea: 6013 str r3, [r2, #0]
- #endif /* DUAL_CORE && CORE_CM4 */
- return SystemD2Clock;
- 800bfec: 4b04 ldr r3, [pc, #16] @ (800c000 <HAL_RCC_GetHCLKFreq+0x58>)
- 800bfee: 681b ldr r3, [r3, #0]
- }
- 800bff0: 4618 mov r0, r3
- 800bff2: 3708 adds r7, #8
- 800bff4: 46bd mov sp, r7
- 800bff6: bd80 pop {r7, pc}
- 800bff8: 58024400 .word 0x58024400
- 800bffc: 08018c18 .word 0x08018c18
- 800c000: 24000038 .word 0x24000038
- 800c004: 24000034 .word 0x24000034
- 0800c008 <HAL_RCC_GetPCLK1Freq>:
- * @note Each time PCLK1 changes, this function must be called to update the
- * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
- * @retval PCLK1 frequency
- */
- uint32_t HAL_RCC_GetPCLK1Freq(void)
- {
- 800c008: b580 push {r7, lr}
- 800c00a: af00 add r7, sp, #0
- #if defined (RCC_D2CFGR_D2PPRE1)
- /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
- return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1) >> RCC_D2CFGR_D2PPRE1_Pos]) & 0x1FU));
- 800c00c: f7ff ffcc bl 800bfa8 <HAL_RCC_GetHCLKFreq>
- 800c010: 4602 mov r2, r0
- 800c012: 4b06 ldr r3, [pc, #24] @ (800c02c <HAL_RCC_GetPCLK1Freq+0x24>)
- 800c014: 69db ldr r3, [r3, #28]
- 800c016: 091b lsrs r3, r3, #4
- 800c018: f003 0307 and.w r3, r3, #7
- 800c01c: 4904 ldr r1, [pc, #16] @ (800c030 <HAL_RCC_GetPCLK1Freq+0x28>)
- 800c01e: 5ccb ldrb r3, [r1, r3]
- 800c020: f003 031f and.w r3, r3, #31
- 800c024: fa22 f303 lsr.w r3, r2, r3
- #else
- /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
- return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE1) >> RCC_CDCFGR2_CDPPRE1_Pos]) & 0x1FU));
- #endif
- }
- 800c028: 4618 mov r0, r3
- 800c02a: bd80 pop {r7, pc}
- 800c02c: 58024400 .word 0x58024400
- 800c030: 08018c18 .word 0x08018c18
- 0800c034 <HAL_RCC_GetPCLK2Freq>:
- * @note Each time PCLK2 changes, this function must be called to update the
- * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
- * @retval PCLK1 frequency
- */
- uint32_t HAL_RCC_GetPCLK2Freq(void)
- {
- 800c034: b580 push {r7, lr}
- 800c036: af00 add r7, sp, #0
- /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
- #if defined(RCC_D2CFGR_D2PPRE2)
- return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2) >> RCC_D2CFGR_D2PPRE2_Pos]) & 0x1FU));
- 800c038: f7ff ffb6 bl 800bfa8 <HAL_RCC_GetHCLKFreq>
- 800c03c: 4602 mov r2, r0
- 800c03e: 4b06 ldr r3, [pc, #24] @ (800c058 <HAL_RCC_GetPCLK2Freq+0x24>)
- 800c040: 69db ldr r3, [r3, #28]
- 800c042: 0a1b lsrs r3, r3, #8
- 800c044: f003 0307 and.w r3, r3, #7
- 800c048: 4904 ldr r1, [pc, #16] @ (800c05c <HAL_RCC_GetPCLK2Freq+0x28>)
- 800c04a: 5ccb ldrb r3, [r1, r3]
- 800c04c: f003 031f and.w r3, r3, #31
- 800c050: fa22 f303 lsr.w r3, r2, r3
- #else
- return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE2) >> RCC_CDCFGR2_CDPPRE2_Pos]) & 0x1FU));
- #endif
- }
- 800c054: 4618 mov r0, r3
- 800c056: bd80 pop {r7, pc}
- 800c058: 58024400 .word 0x58024400
- 800c05c: 08018c18 .word 0x08018c18
- 0800c060 <HAL_RCC_GetClockConfig>:
- * will be configured.
- * @param pFLatency: Pointer on the Flash Latency.
- * @retval None
- */
- void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
- {
- 800c060: b480 push {r7}
- 800c062: b083 sub sp, #12
- 800c064: af00 add r7, sp, #0
- 800c066: 6078 str r0, [r7, #4]
- 800c068: 6039 str r1, [r7, #0]
- /* Set all possible values for the Clock type parameter --------------------*/
- RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 |
- 800c06a: 687b ldr r3, [r7, #4]
- 800c06c: 223f movs r2, #63 @ 0x3f
- 800c06e: 601a str r2, [r3, #0]
- RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1 ;
- /* Get the SYSCLK configuration --------------------------------------------*/
- RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
- 800c070: 4b1a ldr r3, [pc, #104] @ (800c0dc <HAL_RCC_GetClockConfig+0x7c>)
- 800c072: 691b ldr r3, [r3, #16]
- 800c074: f003 0207 and.w r2, r3, #7
- 800c078: 687b ldr r3, [r7, #4]
- 800c07a: 605a str r2, [r3, #4]
- #if defined(RCC_D1CFGR_D1CPRE)
- /* Get the SYSCLK configuration ----------------------------------------------*/
- RCC_ClkInitStruct->SYSCLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_D1CPRE);
- 800c07c: 4b17 ldr r3, [pc, #92] @ (800c0dc <HAL_RCC_GetClockConfig+0x7c>)
- 800c07e: 699b ldr r3, [r3, #24]
- 800c080: f403 6270 and.w r2, r3, #3840 @ 0xf00
- 800c084: 687b ldr r3, [r7, #4]
- 800c086: 609a str r2, [r3, #8]
- /* Get the D1HCLK configuration ----------------------------------------------*/
- RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_HPRE);
- 800c088: 4b14 ldr r3, [pc, #80] @ (800c0dc <HAL_RCC_GetClockConfig+0x7c>)
- 800c08a: 699b ldr r3, [r3, #24]
- 800c08c: f003 020f and.w r2, r3, #15
- 800c090: 687b ldr r3, [r7, #4]
- 800c092: 60da str r2, [r3, #12]
- /* Get the APB3 configuration ----------------------------------------------*/
- RCC_ClkInitStruct->APB3CLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_D1PPRE);
- 800c094: 4b11 ldr r3, [pc, #68] @ (800c0dc <HAL_RCC_GetClockConfig+0x7c>)
- 800c096: 699b ldr r3, [r3, #24]
- 800c098: f003 0270 and.w r2, r3, #112 @ 0x70
- 800c09c: 687b ldr r3, [r7, #4]
- 800c09e: 611a str r2, [r3, #16]
- /* Get the APB1 configuration ----------------------------------------------*/
- RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1);
- 800c0a0: 4b0e ldr r3, [pc, #56] @ (800c0dc <HAL_RCC_GetClockConfig+0x7c>)
- 800c0a2: 69db ldr r3, [r3, #28]
- 800c0a4: f003 0270 and.w r2, r3, #112 @ 0x70
- 800c0a8: 687b ldr r3, [r7, #4]
- 800c0aa: 615a str r2, [r3, #20]
- /* Get the APB2 configuration ----------------------------------------------*/
- RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2);
- 800c0ac: 4b0b ldr r3, [pc, #44] @ (800c0dc <HAL_RCC_GetClockConfig+0x7c>)
- 800c0ae: 69db ldr r3, [r3, #28]
- 800c0b0: f403 62e0 and.w r2, r3, #1792 @ 0x700
- 800c0b4: 687b ldr r3, [r7, #4]
- 800c0b6: 619a str r2, [r3, #24]
- /* Get the APB4 configuration ----------------------------------------------*/
- RCC_ClkInitStruct->APB4CLKDivider = (uint32_t)(RCC->D3CFGR & RCC_D3CFGR_D3PPRE);
- 800c0b8: 4b08 ldr r3, [pc, #32] @ (800c0dc <HAL_RCC_GetClockConfig+0x7c>)
- 800c0ba: 6a1b ldr r3, [r3, #32]
- 800c0bc: f003 0270 and.w r2, r3, #112 @ 0x70
- 800c0c0: 687b ldr r3, [r7, #4]
- 800c0c2: 61da str r2, [r3, #28]
- /* Get the APB4 configuration ----------------------------------------------*/
- RCC_ClkInitStruct->APB4CLKDivider = (uint32_t)(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE);
- #endif
- /* Get the Flash Wait State (Latency) configuration ------------------------*/
- *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
- 800c0c4: 4b06 ldr r3, [pc, #24] @ (800c0e0 <HAL_RCC_GetClockConfig+0x80>)
- 800c0c6: 681b ldr r3, [r3, #0]
- 800c0c8: f003 020f and.w r2, r3, #15
- 800c0cc: 683b ldr r3, [r7, #0]
- 800c0ce: 601a str r2, [r3, #0]
- }
- 800c0d0: bf00 nop
- 800c0d2: 370c adds r7, #12
- 800c0d4: 46bd mov sp, r7
- 800c0d6: f85d 7b04 ldr.w r7, [sp], #4
- 800c0da: 4770 bx lr
- 800c0dc: 58024400 .word 0x58024400
- 800c0e0: 52002000 .word 0x52002000
- 0800c0e4 <HAL_RCCEx_PeriphCLKConfig>:
- * (*) : Available on some STM32H7 lines only.
- *
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
- {
- 800c0e4: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
- 800c0e8: b0c8 sub sp, #288 @ 0x120
- 800c0ea: af00 add r7, sp, #0
- 800c0ec: f8c7 010c str.w r0, [r7, #268] @ 0x10c
- uint32_t tmpreg;
- uint32_t tickstart;
- HAL_StatusTypeDef ret = HAL_OK; /* Intermediate status */
- 800c0f0: 2300 movs r3, #0
- 800c0f2: f887 311f strb.w r3, [r7, #287] @ 0x11f
- HAL_StatusTypeDef status = HAL_OK; /* Final status */
- 800c0f6: 2300 movs r3, #0
- 800c0f8: f887 311e strb.w r3, [r7, #286] @ 0x11e
- /*---------------------------- SPDIFRX configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
- 800c0fc: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c100: e9d3 2300 ldrd r2, r3, [r3]
- 800c104: f002 6400 and.w r4, r2, #134217728 @ 0x8000000
- 800c108: 2500 movs r5, #0
- 800c10a: ea54 0305 orrs.w r3, r4, r5
- 800c10e: d049 beq.n 800c1a4 <HAL_RCCEx_PeriphCLKConfig+0xc0>
- {
- switch (PeriphClkInit->SpdifrxClockSelection)
- 800c110: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c114: 6e9b ldr r3, [r3, #104] @ 0x68
- 800c116: f5b3 1f40 cmp.w r3, #3145728 @ 0x300000
- 800c11a: d02f beq.n 800c17c <HAL_RCCEx_PeriphCLKConfig+0x98>
- 800c11c: f5b3 1f40 cmp.w r3, #3145728 @ 0x300000
- 800c120: d828 bhi.n 800c174 <HAL_RCCEx_PeriphCLKConfig+0x90>
- 800c122: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
- 800c126: d01a beq.n 800c15e <HAL_RCCEx_PeriphCLKConfig+0x7a>
- 800c128: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
- 800c12c: d822 bhi.n 800c174 <HAL_RCCEx_PeriphCLKConfig+0x90>
- 800c12e: 2b00 cmp r3, #0
- 800c130: d003 beq.n 800c13a <HAL_RCCEx_PeriphCLKConfig+0x56>
- 800c132: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
- 800c136: d007 beq.n 800c148 <HAL_RCCEx_PeriphCLKConfig+0x64>
- 800c138: e01c b.n 800c174 <HAL_RCCEx_PeriphCLKConfig+0x90>
- {
- case RCC_SPDIFRXCLKSOURCE_PLL: /* PLL is used as clock source for SPDIFRX*/
- /* Enable PLL1Q Clock output generated form System PLL . */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
- 800c13a: 4bb8 ldr r3, [pc, #736] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c13c: 6adb ldr r3, [r3, #44] @ 0x2c
- 800c13e: 4ab7 ldr r2, [pc, #732] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c140: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800c144: 62d3 str r3, [r2, #44] @ 0x2c
- /* SPDIFRX clock source configuration done later after clock selection check */
- break;
- 800c146: e01a b.n 800c17e <HAL_RCCEx_PeriphCLKConfig+0x9a>
- case RCC_SPDIFRXCLKSOURCE_PLL2: /* PLL2 is used as clock source for SPDIFRX*/
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
- 800c148: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c14c: 3308 adds r3, #8
- 800c14e: 2102 movs r1, #2
- 800c150: 4618 mov r0, r3
- 800c152: f002 fb45 bl 800e7e0 <RCCEx_PLL2_Config>
- 800c156: 4603 mov r3, r0
- 800c158: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SPDIFRX clock source configuration done later after clock selection check */
- break;
- 800c15c: e00f b.n 800c17e <HAL_RCCEx_PeriphCLKConfig+0x9a>
- case RCC_SPDIFRXCLKSOURCE_PLL3: /* PLL3 is used as clock source for SPDIFRX*/
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
- 800c15e: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c162: 3328 adds r3, #40 @ 0x28
- 800c164: 2102 movs r1, #2
- 800c166: 4618 mov r0, r3
- 800c168: f002 fbec bl 800e944 <RCCEx_PLL3_Config>
- 800c16c: 4603 mov r3, r0
- 800c16e: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SPDIFRX clock source configuration done later after clock selection check */
- break;
- 800c172: e004 b.n 800c17e <HAL_RCCEx_PeriphCLKConfig+0x9a>
- /* Internal OSC clock is used as source of SPDIFRX clock*/
- /* SPDIFRX clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800c174: 2301 movs r3, #1
- 800c176: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800c17a: e000 b.n 800c17e <HAL_RCCEx_PeriphCLKConfig+0x9a>
- break;
- 800c17c: bf00 nop
- }
- if (ret == HAL_OK)
- 800c17e: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c182: 2b00 cmp r3, #0
- 800c184: d10a bne.n 800c19c <HAL_RCCEx_PeriphCLKConfig+0xb8>
- {
- /* Set the source of SPDIFRX clock*/
- __HAL_RCC_SPDIFRX_CONFIG(PeriphClkInit->SpdifrxClockSelection);
- 800c186: 4ba5 ldr r3, [pc, #660] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c188: 6d1b ldr r3, [r3, #80] @ 0x50
- 800c18a: f423 1140 bic.w r1, r3, #3145728 @ 0x300000
- 800c18e: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c192: 6e9b ldr r3, [r3, #104] @ 0x68
- 800c194: 4aa1 ldr r2, [pc, #644] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c196: 430b orrs r3, r1
- 800c198: 6513 str r3, [r2, #80] @ 0x50
- 800c19a: e003 b.n 800c1a4 <HAL_RCCEx_PeriphCLKConfig+0xc0>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800c19c: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c1a0: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- /*---------------------------- SAI1 configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1)
- 800c1a4: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c1a8: e9d3 2300 ldrd r2, r3, [r3]
- 800c1ac: f402 7880 and.w r8, r2, #256 @ 0x100
- 800c1b0: f04f 0900 mov.w r9, #0
- 800c1b4: ea58 0309 orrs.w r3, r8, r9
- 800c1b8: d047 beq.n 800c24a <HAL_RCCEx_PeriphCLKConfig+0x166>
- {
- switch (PeriphClkInit->Sai1ClockSelection)
- 800c1ba: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c1be: 6d9b ldr r3, [r3, #88] @ 0x58
- 800c1c0: 2b04 cmp r3, #4
- 800c1c2: d82a bhi.n 800c21a <HAL_RCCEx_PeriphCLKConfig+0x136>
- 800c1c4: a201 add r2, pc, #4 @ (adr r2, 800c1cc <HAL_RCCEx_PeriphCLKConfig+0xe8>)
- 800c1c6: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800c1ca: bf00 nop
- 800c1cc: 0800c1e1 .word 0x0800c1e1
- 800c1d0: 0800c1ef .word 0x0800c1ef
- 800c1d4: 0800c205 .word 0x0800c205
- 800c1d8: 0800c223 .word 0x0800c223
- 800c1dc: 0800c223 .word 0x0800c223
- {
- case RCC_SAI1CLKSOURCE_PLL: /* PLL is used as clock source for SAI1*/
- /* Enable SAI Clock output generated form System PLL . */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
- 800c1e0: 4b8e ldr r3, [pc, #568] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c1e2: 6adb ldr r3, [r3, #44] @ 0x2c
- 800c1e4: 4a8d ldr r2, [pc, #564] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c1e6: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800c1ea: 62d3 str r3, [r2, #44] @ 0x2c
- /* SAI1 clock source configuration done later after clock selection check */
- break;
- 800c1ec: e01a b.n 800c224 <HAL_RCCEx_PeriphCLKConfig+0x140>
- case RCC_SAI1CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI1*/
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
- 800c1ee: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c1f2: 3308 adds r3, #8
- 800c1f4: 2100 movs r1, #0
- 800c1f6: 4618 mov r0, r3
- 800c1f8: f002 faf2 bl 800e7e0 <RCCEx_PLL2_Config>
- 800c1fc: 4603 mov r3, r0
- 800c1fe: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SAI1 clock source configuration done later after clock selection check */
- break;
- 800c202: e00f b.n 800c224 <HAL_RCCEx_PeriphCLKConfig+0x140>
- case RCC_SAI1CLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI1*/
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
- 800c204: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c208: 3328 adds r3, #40 @ 0x28
- 800c20a: 2100 movs r1, #0
- 800c20c: 4618 mov r0, r3
- 800c20e: f002 fb99 bl 800e944 <RCCEx_PLL3_Config>
- 800c212: 4603 mov r3, r0
- 800c214: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SAI1 clock source configuration done later after clock selection check */
- break;
- 800c218: e004 b.n 800c224 <HAL_RCCEx_PeriphCLKConfig+0x140>
- /* HSI, HSE, or CSI oscillator is used as source of SAI1 clock */
- /* SAI1 clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800c21a: 2301 movs r3, #1
- 800c21c: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800c220: e000 b.n 800c224 <HAL_RCCEx_PeriphCLKConfig+0x140>
- break;
- 800c222: bf00 nop
- }
- if (ret == HAL_OK)
- 800c224: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c228: 2b00 cmp r3, #0
- 800c22a: d10a bne.n 800c242 <HAL_RCCEx_PeriphCLKConfig+0x15e>
- {
- /* Set the source of SAI1 clock*/
- __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
- 800c22c: 4b7b ldr r3, [pc, #492] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c22e: 6d1b ldr r3, [r3, #80] @ 0x50
- 800c230: f023 0107 bic.w r1, r3, #7
- 800c234: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c238: 6d9b ldr r3, [r3, #88] @ 0x58
- 800c23a: 4a78 ldr r2, [pc, #480] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c23c: 430b orrs r3, r1
- 800c23e: 6513 str r3, [r2, #80] @ 0x50
- 800c240: e003 b.n 800c24a <HAL_RCCEx_PeriphCLKConfig+0x166>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800c242: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c246: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- #if defined(SAI3)
- /*---------------------------- SAI2/3 configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI23) == RCC_PERIPHCLK_SAI23)
- 800c24a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c24e: e9d3 2300 ldrd r2, r3, [r3]
- 800c252: f402 7a00 and.w sl, r2, #512 @ 0x200
- 800c256: f04f 0b00 mov.w fp, #0
- 800c25a: ea5a 030b orrs.w r3, sl, fp
- 800c25e: d04c beq.n 800c2fa <HAL_RCCEx_PeriphCLKConfig+0x216>
- {
- switch (PeriphClkInit->Sai23ClockSelection)
- 800c260: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c264: 6ddb ldr r3, [r3, #92] @ 0x5c
- 800c266: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800c26a: d030 beq.n 800c2ce <HAL_RCCEx_PeriphCLKConfig+0x1ea>
- 800c26c: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800c270: d829 bhi.n 800c2c6 <HAL_RCCEx_PeriphCLKConfig+0x1e2>
- 800c272: 2bc0 cmp r3, #192 @ 0xc0
- 800c274: d02d beq.n 800c2d2 <HAL_RCCEx_PeriphCLKConfig+0x1ee>
- 800c276: 2bc0 cmp r3, #192 @ 0xc0
- 800c278: d825 bhi.n 800c2c6 <HAL_RCCEx_PeriphCLKConfig+0x1e2>
- 800c27a: 2b80 cmp r3, #128 @ 0x80
- 800c27c: d018 beq.n 800c2b0 <HAL_RCCEx_PeriphCLKConfig+0x1cc>
- 800c27e: 2b80 cmp r3, #128 @ 0x80
- 800c280: d821 bhi.n 800c2c6 <HAL_RCCEx_PeriphCLKConfig+0x1e2>
- 800c282: 2b00 cmp r3, #0
- 800c284: d002 beq.n 800c28c <HAL_RCCEx_PeriphCLKConfig+0x1a8>
- 800c286: 2b40 cmp r3, #64 @ 0x40
- 800c288: d007 beq.n 800c29a <HAL_RCCEx_PeriphCLKConfig+0x1b6>
- 800c28a: e01c b.n 800c2c6 <HAL_RCCEx_PeriphCLKConfig+0x1e2>
- {
- case RCC_SAI23CLKSOURCE_PLL: /* PLL is used as clock source for SAI2/3 */
- /* Enable SAI Clock output generated form System PLL . */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
- 800c28c: 4b63 ldr r3, [pc, #396] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c28e: 6adb ldr r3, [r3, #44] @ 0x2c
- 800c290: 4a62 ldr r2, [pc, #392] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c292: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800c296: 62d3 str r3, [r2, #44] @ 0x2c
- /* SAI2/3 clock source configuration done later after clock selection check */
- break;
- 800c298: e01c b.n 800c2d4 <HAL_RCCEx_PeriphCLKConfig+0x1f0>
- case RCC_SAI23CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2/3 */
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
- 800c29a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c29e: 3308 adds r3, #8
- 800c2a0: 2100 movs r1, #0
- 800c2a2: 4618 mov r0, r3
- 800c2a4: f002 fa9c bl 800e7e0 <RCCEx_PLL2_Config>
- 800c2a8: 4603 mov r3, r0
- 800c2aa: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SAI2/3 clock source configuration done later after clock selection check */
- break;
- 800c2ae: e011 b.n 800c2d4 <HAL_RCCEx_PeriphCLKConfig+0x1f0>
- case RCC_SAI23CLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI2/3 */
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
- 800c2b0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c2b4: 3328 adds r3, #40 @ 0x28
- 800c2b6: 2100 movs r1, #0
- 800c2b8: 4618 mov r0, r3
- 800c2ba: f002 fb43 bl 800e944 <RCCEx_PLL3_Config>
- 800c2be: 4603 mov r3, r0
- 800c2c0: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SAI2/3 clock source configuration done later after clock selection check */
- break;
- 800c2c4: e006 b.n 800c2d4 <HAL_RCCEx_PeriphCLKConfig+0x1f0>
- /* HSI, HSE, or CSI oscillator is used as source of SAI2/3 clock */
- /* SAI2/3 clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800c2c6: 2301 movs r3, #1
- 800c2c8: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800c2cc: e002 b.n 800c2d4 <HAL_RCCEx_PeriphCLKConfig+0x1f0>
- break;
- 800c2ce: bf00 nop
- 800c2d0: e000 b.n 800c2d4 <HAL_RCCEx_PeriphCLKConfig+0x1f0>
- break;
- 800c2d2: bf00 nop
- }
- if (ret == HAL_OK)
- 800c2d4: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c2d8: 2b00 cmp r3, #0
- 800c2da: d10a bne.n 800c2f2 <HAL_RCCEx_PeriphCLKConfig+0x20e>
- {
- /* Set the source of SAI2/3 clock*/
- __HAL_RCC_SAI23_CONFIG(PeriphClkInit->Sai23ClockSelection);
- 800c2dc: 4b4f ldr r3, [pc, #316] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c2de: 6d1b ldr r3, [r3, #80] @ 0x50
- 800c2e0: f423 71e0 bic.w r1, r3, #448 @ 0x1c0
- 800c2e4: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c2e8: 6ddb ldr r3, [r3, #92] @ 0x5c
- 800c2ea: 4a4c ldr r2, [pc, #304] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c2ec: 430b orrs r3, r1
- 800c2ee: 6513 str r3, [r2, #80] @ 0x50
- 800c2f0: e003 b.n 800c2fa <HAL_RCCEx_PeriphCLKConfig+0x216>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800c2f2: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c2f6: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- #endif /*SAI2B*/
- #if defined(SAI4)
- /*---------------------------- SAI4A configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4A) == RCC_PERIPHCLK_SAI4A)
- 800c2fa: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c2fe: e9d3 2300 ldrd r2, r3, [r3]
- 800c302: f402 6380 and.w r3, r2, #1024 @ 0x400
- 800c306: f8c7 3100 str.w r3, [r7, #256] @ 0x100
- 800c30a: 2300 movs r3, #0
- 800c30c: f8c7 3104 str.w r3, [r7, #260] @ 0x104
- 800c310: e9d7 1240 ldrd r1, r2, [r7, #256] @ 0x100
- 800c314: 460b mov r3, r1
- 800c316: 4313 orrs r3, r2
- 800c318: d053 beq.n 800c3c2 <HAL_RCCEx_PeriphCLKConfig+0x2de>
- {
- switch (PeriphClkInit->Sai4AClockSelection)
- 800c31a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c31e: f8d3 30a8 ldr.w r3, [r3, #168] @ 0xa8
- 800c322: f5b3 0f00 cmp.w r3, #8388608 @ 0x800000
- 800c326: d035 beq.n 800c394 <HAL_RCCEx_PeriphCLKConfig+0x2b0>
- 800c328: f5b3 0f00 cmp.w r3, #8388608 @ 0x800000
- 800c32c: d82e bhi.n 800c38c <HAL_RCCEx_PeriphCLKConfig+0x2a8>
- 800c32e: f5b3 0fc0 cmp.w r3, #6291456 @ 0x600000
- 800c332: d031 beq.n 800c398 <HAL_RCCEx_PeriphCLKConfig+0x2b4>
- 800c334: f5b3 0fc0 cmp.w r3, #6291456 @ 0x600000
- 800c338: d828 bhi.n 800c38c <HAL_RCCEx_PeriphCLKConfig+0x2a8>
- 800c33a: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000
- 800c33e: d01a beq.n 800c376 <HAL_RCCEx_PeriphCLKConfig+0x292>
- 800c340: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000
- 800c344: d822 bhi.n 800c38c <HAL_RCCEx_PeriphCLKConfig+0x2a8>
- 800c346: 2b00 cmp r3, #0
- 800c348: d003 beq.n 800c352 <HAL_RCCEx_PeriphCLKConfig+0x26e>
- 800c34a: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
- 800c34e: d007 beq.n 800c360 <HAL_RCCEx_PeriphCLKConfig+0x27c>
- 800c350: e01c b.n 800c38c <HAL_RCCEx_PeriphCLKConfig+0x2a8>
- {
- case RCC_SAI4ACLKSOURCE_PLL: /* PLL is used as clock source for SAI2*/
- /* Enable SAI Clock output generated form System PLL . */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
- 800c352: 4b32 ldr r3, [pc, #200] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c354: 6adb ldr r3, [r3, #44] @ 0x2c
- 800c356: 4a31 ldr r2, [pc, #196] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c358: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800c35c: 62d3 str r3, [r2, #44] @ 0x2c
- /* SAI1 clock source configuration done later after clock selection check */
- break;
- 800c35e: e01c b.n 800c39a <HAL_RCCEx_PeriphCLKConfig+0x2b6>
- case RCC_SAI4ACLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
- 800c360: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c364: 3308 adds r3, #8
- 800c366: 2100 movs r1, #0
- 800c368: 4618 mov r0, r3
- 800c36a: f002 fa39 bl 800e7e0 <RCCEx_PLL2_Config>
- 800c36e: 4603 mov r3, r0
- 800c370: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SAI2 clock source configuration done later after clock selection check */
- break;
- 800c374: e011 b.n 800c39a <HAL_RCCEx_PeriphCLKConfig+0x2b6>
- case RCC_SAI4ACLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI2*/
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
- 800c376: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c37a: 3328 adds r3, #40 @ 0x28
- 800c37c: 2100 movs r1, #0
- 800c37e: 4618 mov r0, r3
- 800c380: f002 fae0 bl 800e944 <RCCEx_PLL3_Config>
- 800c384: 4603 mov r3, r0
- 800c386: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SAI1 clock source configuration done later after clock selection check */
- break;
- 800c38a: e006 b.n 800c39a <HAL_RCCEx_PeriphCLKConfig+0x2b6>
- /* SAI4A clock source configuration done later after clock selection check */
- break;
- #endif /* RCC_VER_3_0 */
- default:
- ret = HAL_ERROR;
- 800c38c: 2301 movs r3, #1
- 800c38e: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800c392: e002 b.n 800c39a <HAL_RCCEx_PeriphCLKConfig+0x2b6>
- break;
- 800c394: bf00 nop
- 800c396: e000 b.n 800c39a <HAL_RCCEx_PeriphCLKConfig+0x2b6>
- break;
- 800c398: bf00 nop
- }
- if (ret == HAL_OK)
- 800c39a: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c39e: 2b00 cmp r3, #0
- 800c3a0: d10b bne.n 800c3ba <HAL_RCCEx_PeriphCLKConfig+0x2d6>
- {
- /* Set the source of SAI4A clock*/
- __HAL_RCC_SAI4A_CONFIG(PeriphClkInit->Sai4AClockSelection);
- 800c3a2: 4b1e ldr r3, [pc, #120] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c3a4: 6d9b ldr r3, [r3, #88] @ 0x58
- 800c3a6: f423 0160 bic.w r1, r3, #14680064 @ 0xe00000
- 800c3aa: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c3ae: f8d3 30a8 ldr.w r3, [r3, #168] @ 0xa8
- 800c3b2: 4a1a ldr r2, [pc, #104] @ (800c41c <HAL_RCCEx_PeriphCLKConfig+0x338>)
- 800c3b4: 430b orrs r3, r1
- 800c3b6: 6593 str r3, [r2, #88] @ 0x58
- 800c3b8: e003 b.n 800c3c2 <HAL_RCCEx_PeriphCLKConfig+0x2de>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800c3ba: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c3be: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- /*---------------------------- SAI4B configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4B) == RCC_PERIPHCLK_SAI4B)
- 800c3c2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c3c6: e9d3 2300 ldrd r2, r3, [r3]
- 800c3ca: f402 6300 and.w r3, r2, #2048 @ 0x800
- 800c3ce: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
- 800c3d2: 2300 movs r3, #0
- 800c3d4: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
- 800c3d8: e9d7 123e ldrd r1, r2, [r7, #248] @ 0xf8
- 800c3dc: 460b mov r3, r1
- 800c3de: 4313 orrs r3, r2
- 800c3e0: d056 beq.n 800c490 <HAL_RCCEx_PeriphCLKConfig+0x3ac>
- {
- switch (PeriphClkInit->Sai4BClockSelection)
- 800c3e2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c3e6: f8d3 30ac ldr.w r3, [r3, #172] @ 0xac
- 800c3ea: f1b3 6f80 cmp.w r3, #67108864 @ 0x4000000
- 800c3ee: d038 beq.n 800c462 <HAL_RCCEx_PeriphCLKConfig+0x37e>
- 800c3f0: f1b3 6f80 cmp.w r3, #67108864 @ 0x4000000
- 800c3f4: d831 bhi.n 800c45a <HAL_RCCEx_PeriphCLKConfig+0x376>
- 800c3f6: f1b3 7f40 cmp.w r3, #50331648 @ 0x3000000
- 800c3fa: d034 beq.n 800c466 <HAL_RCCEx_PeriphCLKConfig+0x382>
- 800c3fc: f1b3 7f40 cmp.w r3, #50331648 @ 0x3000000
- 800c400: d82b bhi.n 800c45a <HAL_RCCEx_PeriphCLKConfig+0x376>
- 800c402: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000
- 800c406: d01d beq.n 800c444 <HAL_RCCEx_PeriphCLKConfig+0x360>
- 800c408: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000
- 800c40c: d825 bhi.n 800c45a <HAL_RCCEx_PeriphCLKConfig+0x376>
- 800c40e: 2b00 cmp r3, #0
- 800c410: d006 beq.n 800c420 <HAL_RCCEx_PeriphCLKConfig+0x33c>
- 800c412: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
- 800c416: d00a beq.n 800c42e <HAL_RCCEx_PeriphCLKConfig+0x34a>
- 800c418: e01f b.n 800c45a <HAL_RCCEx_PeriphCLKConfig+0x376>
- 800c41a: bf00 nop
- 800c41c: 58024400 .word 0x58024400
- {
- case RCC_SAI4BCLKSOURCE_PLL: /* PLL is used as clock source for SAI2*/
- /* Enable SAI Clock output generated form System PLL . */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
- 800c420: 4ba2 ldr r3, [pc, #648] @ (800c6ac <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
- 800c422: 6adb ldr r3, [r3, #44] @ 0x2c
- 800c424: 4aa1 ldr r2, [pc, #644] @ (800c6ac <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
- 800c426: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800c42a: 62d3 str r3, [r2, #44] @ 0x2c
- /* SAI1 clock source configuration done later after clock selection check */
- break;
- 800c42c: e01c b.n 800c468 <HAL_RCCEx_PeriphCLKConfig+0x384>
- case RCC_SAI4BCLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
- 800c42e: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c432: 3308 adds r3, #8
- 800c434: 2100 movs r1, #0
- 800c436: 4618 mov r0, r3
- 800c438: f002 f9d2 bl 800e7e0 <RCCEx_PLL2_Config>
- 800c43c: 4603 mov r3, r0
- 800c43e: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SAI2 clock source configuration done later after clock selection check */
- break;
- 800c442: e011 b.n 800c468 <HAL_RCCEx_PeriphCLKConfig+0x384>
- case RCC_SAI4BCLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI2*/
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
- 800c444: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c448: 3328 adds r3, #40 @ 0x28
- 800c44a: 2100 movs r1, #0
- 800c44c: 4618 mov r0, r3
- 800c44e: f002 fa79 bl 800e944 <RCCEx_PLL3_Config>
- 800c452: 4603 mov r3, r0
- 800c454: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SAI1 clock source configuration done later after clock selection check */
- break;
- 800c458: e006 b.n 800c468 <HAL_RCCEx_PeriphCLKConfig+0x384>
- /* SAI4B clock source configuration done later after clock selection check */
- break;
- #endif /* RCC_VER_3_0 */
- default:
- ret = HAL_ERROR;
- 800c45a: 2301 movs r3, #1
- 800c45c: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800c460: e002 b.n 800c468 <HAL_RCCEx_PeriphCLKConfig+0x384>
- break;
- 800c462: bf00 nop
- 800c464: e000 b.n 800c468 <HAL_RCCEx_PeriphCLKConfig+0x384>
- break;
- 800c466: bf00 nop
- }
- if (ret == HAL_OK)
- 800c468: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c46c: 2b00 cmp r3, #0
- 800c46e: d10b bne.n 800c488 <HAL_RCCEx_PeriphCLKConfig+0x3a4>
- {
- /* Set the source of SAI4B clock*/
- __HAL_RCC_SAI4B_CONFIG(PeriphClkInit->Sai4BClockSelection);
- 800c470: 4b8e ldr r3, [pc, #568] @ (800c6ac <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
- 800c472: 6d9b ldr r3, [r3, #88] @ 0x58
- 800c474: f023 61e0 bic.w r1, r3, #117440512 @ 0x7000000
- 800c478: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c47c: f8d3 30ac ldr.w r3, [r3, #172] @ 0xac
- 800c480: 4a8a ldr r2, [pc, #552] @ (800c6ac <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
- 800c482: 430b orrs r3, r1
- 800c484: 6593 str r3, [r2, #88] @ 0x58
- 800c486: e003 b.n 800c490 <HAL_RCCEx_PeriphCLKConfig+0x3ac>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800c488: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c48c: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- #endif /*SAI4*/
- #if defined(QUADSPI)
- /*---------------------------- QSPI configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_QSPI) == RCC_PERIPHCLK_QSPI)
- 800c490: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c494: e9d3 2300 ldrd r2, r3, [r3]
- 800c498: f002 7300 and.w r3, r2, #33554432 @ 0x2000000
- 800c49c: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
- 800c4a0: 2300 movs r3, #0
- 800c4a2: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
- 800c4a6: e9d7 123c ldrd r1, r2, [r7, #240] @ 0xf0
- 800c4aa: 460b mov r3, r1
- 800c4ac: 4313 orrs r3, r2
- 800c4ae: d03a beq.n 800c526 <HAL_RCCEx_PeriphCLKConfig+0x442>
- {
- switch (PeriphClkInit->QspiClockSelection)
- 800c4b0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c4b4: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800c4b6: 2b30 cmp r3, #48 @ 0x30
- 800c4b8: d01f beq.n 800c4fa <HAL_RCCEx_PeriphCLKConfig+0x416>
- 800c4ba: 2b30 cmp r3, #48 @ 0x30
- 800c4bc: d819 bhi.n 800c4f2 <HAL_RCCEx_PeriphCLKConfig+0x40e>
- 800c4be: 2b20 cmp r3, #32
- 800c4c0: d00c beq.n 800c4dc <HAL_RCCEx_PeriphCLKConfig+0x3f8>
- 800c4c2: 2b20 cmp r3, #32
- 800c4c4: d815 bhi.n 800c4f2 <HAL_RCCEx_PeriphCLKConfig+0x40e>
- 800c4c6: 2b00 cmp r3, #0
- 800c4c8: d019 beq.n 800c4fe <HAL_RCCEx_PeriphCLKConfig+0x41a>
- 800c4ca: 2b10 cmp r3, #16
- 800c4cc: d111 bne.n 800c4f2 <HAL_RCCEx_PeriphCLKConfig+0x40e>
- {
- case RCC_QSPICLKSOURCE_PLL: /* PLL is used as clock source for QSPI*/
- /* Enable QSPI Clock output generated form System PLL . */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
- 800c4ce: 4b77 ldr r3, [pc, #476] @ (800c6ac <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
- 800c4d0: 6adb ldr r3, [r3, #44] @ 0x2c
- 800c4d2: 4a76 ldr r2, [pc, #472] @ (800c6ac <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
- 800c4d4: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800c4d8: 62d3 str r3, [r2, #44] @ 0x2c
- /* QSPI clock source configuration done later after clock selection check */
- break;
- 800c4da: e011 b.n 800c500 <HAL_RCCEx_PeriphCLKConfig+0x41c>
- case RCC_QSPICLKSOURCE_PLL2: /* PLL2 is used as clock source for QSPI*/
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
- 800c4dc: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c4e0: 3308 adds r3, #8
- 800c4e2: 2102 movs r1, #2
- 800c4e4: 4618 mov r0, r3
- 800c4e6: f002 f97b bl 800e7e0 <RCCEx_PLL2_Config>
- 800c4ea: 4603 mov r3, r0
- 800c4ec: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* QSPI clock source configuration done later after clock selection check */
- break;
- 800c4f0: e006 b.n 800c500 <HAL_RCCEx_PeriphCLKConfig+0x41c>
- case RCC_QSPICLKSOURCE_D1HCLK:
- /* Domain1 HCLK clock selected as QSPI kernel peripheral clock */
- break;
- default:
- ret = HAL_ERROR;
- 800c4f2: 2301 movs r3, #1
- 800c4f4: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800c4f8: e002 b.n 800c500 <HAL_RCCEx_PeriphCLKConfig+0x41c>
- break;
- 800c4fa: bf00 nop
- 800c4fc: e000 b.n 800c500 <HAL_RCCEx_PeriphCLKConfig+0x41c>
- break;
- 800c4fe: bf00 nop
- }
- if (ret == HAL_OK)
- 800c500: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c504: 2b00 cmp r3, #0
- 800c506: d10a bne.n 800c51e <HAL_RCCEx_PeriphCLKConfig+0x43a>
- {
- /* Set the source of QSPI clock*/
- __HAL_RCC_QSPI_CONFIG(PeriphClkInit->QspiClockSelection);
- 800c508: 4b68 ldr r3, [pc, #416] @ (800c6ac <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
- 800c50a: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800c50c: f023 0130 bic.w r1, r3, #48 @ 0x30
- 800c510: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c514: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800c516: 4a65 ldr r2, [pc, #404] @ (800c6ac <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
- 800c518: 430b orrs r3, r1
- 800c51a: 64d3 str r3, [r2, #76] @ 0x4c
- 800c51c: e003 b.n 800c526 <HAL_RCCEx_PeriphCLKConfig+0x442>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800c51e: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c522: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- #endif /*OCTOSPI*/
- /*---------------------------- SPI1/2/3 configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI123) == RCC_PERIPHCLK_SPI123)
- 800c526: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c52a: e9d3 2300 ldrd r2, r3, [r3]
- 800c52e: f402 5380 and.w r3, r2, #4096 @ 0x1000
- 800c532: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
- 800c536: 2300 movs r3, #0
- 800c538: f8c7 30ec str.w r3, [r7, #236] @ 0xec
- 800c53c: e9d7 123a ldrd r1, r2, [r7, #232] @ 0xe8
- 800c540: 460b mov r3, r1
- 800c542: 4313 orrs r3, r2
- 800c544: d051 beq.n 800c5ea <HAL_RCCEx_PeriphCLKConfig+0x506>
- {
- switch (PeriphClkInit->Spi123ClockSelection)
- 800c546: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c54a: 6e1b ldr r3, [r3, #96] @ 0x60
- 800c54c: f5b3 4f80 cmp.w r3, #16384 @ 0x4000
- 800c550: d035 beq.n 800c5be <HAL_RCCEx_PeriphCLKConfig+0x4da>
- 800c552: f5b3 4f80 cmp.w r3, #16384 @ 0x4000
- 800c556: d82e bhi.n 800c5b6 <HAL_RCCEx_PeriphCLKConfig+0x4d2>
- 800c558: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
- 800c55c: d031 beq.n 800c5c2 <HAL_RCCEx_PeriphCLKConfig+0x4de>
- 800c55e: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
- 800c562: d828 bhi.n 800c5b6 <HAL_RCCEx_PeriphCLKConfig+0x4d2>
- 800c564: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
- 800c568: d01a beq.n 800c5a0 <HAL_RCCEx_PeriphCLKConfig+0x4bc>
- 800c56a: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
- 800c56e: d822 bhi.n 800c5b6 <HAL_RCCEx_PeriphCLKConfig+0x4d2>
- 800c570: 2b00 cmp r3, #0
- 800c572: d003 beq.n 800c57c <HAL_RCCEx_PeriphCLKConfig+0x498>
- 800c574: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 800c578: d007 beq.n 800c58a <HAL_RCCEx_PeriphCLKConfig+0x4a6>
- 800c57a: e01c b.n 800c5b6 <HAL_RCCEx_PeriphCLKConfig+0x4d2>
- {
- case RCC_SPI123CLKSOURCE_PLL: /* PLL is used as clock source for SPI1/2/3 */
- /* Enable SPI Clock output generated form System PLL . */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
- 800c57c: 4b4b ldr r3, [pc, #300] @ (800c6ac <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
- 800c57e: 6adb ldr r3, [r3, #44] @ 0x2c
- 800c580: 4a4a ldr r2, [pc, #296] @ (800c6ac <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
- 800c582: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800c586: 62d3 str r3, [r2, #44] @ 0x2c
- /* SPI1/2/3 clock source configuration done later after clock selection check */
- break;
- 800c588: e01c b.n 800c5c4 <HAL_RCCEx_PeriphCLKConfig+0x4e0>
- case RCC_SPI123CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI1/2/3 */
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
- 800c58a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c58e: 3308 adds r3, #8
- 800c590: 2100 movs r1, #0
- 800c592: 4618 mov r0, r3
- 800c594: f002 f924 bl 800e7e0 <RCCEx_PLL2_Config>
- 800c598: 4603 mov r3, r0
- 800c59a: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SPI1/2/3 clock source configuration done later after clock selection check */
- break;
- 800c59e: e011 b.n 800c5c4 <HAL_RCCEx_PeriphCLKConfig+0x4e0>
- case RCC_SPI123CLKSOURCE_PLL3: /* PLL3 is used as clock source for SPI1/2/3 */
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
- 800c5a0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c5a4: 3328 adds r3, #40 @ 0x28
- 800c5a6: 2100 movs r1, #0
- 800c5a8: 4618 mov r0, r3
- 800c5aa: f002 f9cb bl 800e944 <RCCEx_PLL3_Config>
- 800c5ae: 4603 mov r3, r0
- 800c5b0: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SPI1/2/3 clock source configuration done later after clock selection check */
- break;
- 800c5b4: e006 b.n 800c5c4 <HAL_RCCEx_PeriphCLKConfig+0x4e0>
- /* HSI, HSE, or CSI oscillator is used as source of SPI1/2/3 clock */
- /* SPI1/2/3 clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800c5b6: 2301 movs r3, #1
- 800c5b8: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800c5bc: e002 b.n 800c5c4 <HAL_RCCEx_PeriphCLKConfig+0x4e0>
- break;
- 800c5be: bf00 nop
- 800c5c0: e000 b.n 800c5c4 <HAL_RCCEx_PeriphCLKConfig+0x4e0>
- break;
- 800c5c2: bf00 nop
- }
- if (ret == HAL_OK)
- 800c5c4: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c5c8: 2b00 cmp r3, #0
- 800c5ca: d10a bne.n 800c5e2 <HAL_RCCEx_PeriphCLKConfig+0x4fe>
- {
- /* Set the source of SPI1/2/3 clock*/
- __HAL_RCC_SPI123_CONFIG(PeriphClkInit->Spi123ClockSelection);
- 800c5cc: 4b37 ldr r3, [pc, #220] @ (800c6ac <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
- 800c5ce: 6d1b ldr r3, [r3, #80] @ 0x50
- 800c5d0: f423 41e0 bic.w r1, r3, #28672 @ 0x7000
- 800c5d4: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c5d8: 6e1b ldr r3, [r3, #96] @ 0x60
- 800c5da: 4a34 ldr r2, [pc, #208] @ (800c6ac <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
- 800c5dc: 430b orrs r3, r1
- 800c5de: 6513 str r3, [r2, #80] @ 0x50
- 800c5e0: e003 b.n 800c5ea <HAL_RCCEx_PeriphCLKConfig+0x506>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800c5e2: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c5e6: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- /*---------------------------- SPI4/5 configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI45) == RCC_PERIPHCLK_SPI45)
- 800c5ea: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c5ee: e9d3 2300 ldrd r2, r3, [r3]
- 800c5f2: f402 5300 and.w r3, r2, #8192 @ 0x2000
- 800c5f6: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
- 800c5fa: 2300 movs r3, #0
- 800c5fc: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
- 800c600: e9d7 1238 ldrd r1, r2, [r7, #224] @ 0xe0
- 800c604: 460b mov r3, r1
- 800c606: 4313 orrs r3, r2
- 800c608: d056 beq.n 800c6b8 <HAL_RCCEx_PeriphCLKConfig+0x5d4>
- {
- switch (PeriphClkInit->Spi45ClockSelection)
- 800c60a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c60e: 6e5b ldr r3, [r3, #100] @ 0x64
- 800c610: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
- 800c614: d033 beq.n 800c67e <HAL_RCCEx_PeriphCLKConfig+0x59a>
- 800c616: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
- 800c61a: d82c bhi.n 800c676 <HAL_RCCEx_PeriphCLKConfig+0x592>
- 800c61c: f5b3 2f80 cmp.w r3, #262144 @ 0x40000
- 800c620: d02f beq.n 800c682 <HAL_RCCEx_PeriphCLKConfig+0x59e>
- 800c622: f5b3 2f80 cmp.w r3, #262144 @ 0x40000
- 800c626: d826 bhi.n 800c676 <HAL_RCCEx_PeriphCLKConfig+0x592>
- 800c628: f5b3 3f40 cmp.w r3, #196608 @ 0x30000
- 800c62c: d02b beq.n 800c686 <HAL_RCCEx_PeriphCLKConfig+0x5a2>
- 800c62e: f5b3 3f40 cmp.w r3, #196608 @ 0x30000
- 800c632: d820 bhi.n 800c676 <HAL_RCCEx_PeriphCLKConfig+0x592>
- 800c634: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800c638: d012 beq.n 800c660 <HAL_RCCEx_PeriphCLKConfig+0x57c>
- 800c63a: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800c63e: d81a bhi.n 800c676 <HAL_RCCEx_PeriphCLKConfig+0x592>
- 800c640: 2b00 cmp r3, #0
- 800c642: d022 beq.n 800c68a <HAL_RCCEx_PeriphCLKConfig+0x5a6>
- 800c644: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
- 800c648: d115 bne.n 800c676 <HAL_RCCEx_PeriphCLKConfig+0x592>
- /* SPI4/5 clock source configuration done later after clock selection check */
- break;
- case RCC_SPI45CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI4/5 */
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
- 800c64a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c64e: 3308 adds r3, #8
- 800c650: 2101 movs r1, #1
- 800c652: 4618 mov r0, r3
- 800c654: f002 f8c4 bl 800e7e0 <RCCEx_PLL2_Config>
- 800c658: 4603 mov r3, r0
- 800c65a: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SPI4/5 clock source configuration done later after clock selection check */
- break;
- 800c65e: e015 b.n 800c68c <HAL_RCCEx_PeriphCLKConfig+0x5a8>
- case RCC_SPI45CLKSOURCE_PLL3: /* PLL3 is used as clock source for SPI4/5 */
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
- 800c660: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c664: 3328 adds r3, #40 @ 0x28
- 800c666: 2101 movs r1, #1
- 800c668: 4618 mov r0, r3
- 800c66a: f002 f96b bl 800e944 <RCCEx_PLL3_Config>
- 800c66e: 4603 mov r3, r0
- 800c670: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SPI4/5 clock source configuration done later after clock selection check */
- break;
- 800c674: e00a b.n 800c68c <HAL_RCCEx_PeriphCLKConfig+0x5a8>
- /* HSE, oscillator is used as source of SPI4/5 clock */
- /* SPI4/5 clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800c676: 2301 movs r3, #1
- 800c678: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800c67c: e006 b.n 800c68c <HAL_RCCEx_PeriphCLKConfig+0x5a8>
- break;
- 800c67e: bf00 nop
- 800c680: e004 b.n 800c68c <HAL_RCCEx_PeriphCLKConfig+0x5a8>
- break;
- 800c682: bf00 nop
- 800c684: e002 b.n 800c68c <HAL_RCCEx_PeriphCLKConfig+0x5a8>
- break;
- 800c686: bf00 nop
- 800c688: e000 b.n 800c68c <HAL_RCCEx_PeriphCLKConfig+0x5a8>
- break;
- 800c68a: bf00 nop
- }
- if (ret == HAL_OK)
- 800c68c: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c690: 2b00 cmp r3, #0
- 800c692: d10d bne.n 800c6b0 <HAL_RCCEx_PeriphCLKConfig+0x5cc>
- {
- /* Set the source of SPI4/5 clock*/
- __HAL_RCC_SPI45_CONFIG(PeriphClkInit->Spi45ClockSelection);
- 800c694: 4b05 ldr r3, [pc, #20] @ (800c6ac <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
- 800c696: 6d1b ldr r3, [r3, #80] @ 0x50
- 800c698: f423 21e0 bic.w r1, r3, #458752 @ 0x70000
- 800c69c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c6a0: 6e5b ldr r3, [r3, #100] @ 0x64
- 800c6a2: 4a02 ldr r2, [pc, #8] @ (800c6ac <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
- 800c6a4: 430b orrs r3, r1
- 800c6a6: 6513 str r3, [r2, #80] @ 0x50
- 800c6a8: e006 b.n 800c6b8 <HAL_RCCEx_PeriphCLKConfig+0x5d4>
- 800c6aa: bf00 nop
- 800c6ac: 58024400 .word 0x58024400
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800c6b0: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c6b4: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- /*---------------------------- SPI6 configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI6) == RCC_PERIPHCLK_SPI6)
- 800c6b8: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c6bc: e9d3 2300 ldrd r2, r3, [r3]
- 800c6c0: f402 4380 and.w r3, r2, #16384 @ 0x4000
- 800c6c4: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
- 800c6c8: 2300 movs r3, #0
- 800c6ca: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
- 800c6ce: e9d7 1236 ldrd r1, r2, [r7, #216] @ 0xd8
- 800c6d2: 460b mov r3, r1
- 800c6d4: 4313 orrs r3, r2
- 800c6d6: d055 beq.n 800c784 <HAL_RCCEx_PeriphCLKConfig+0x6a0>
- {
- switch (PeriphClkInit->Spi6ClockSelection)
- 800c6d8: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c6dc: f8d3 30b0 ldr.w r3, [r3, #176] @ 0xb0
- 800c6e0: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
- 800c6e4: d033 beq.n 800c74e <HAL_RCCEx_PeriphCLKConfig+0x66a>
- 800c6e6: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
- 800c6ea: d82c bhi.n 800c746 <HAL_RCCEx_PeriphCLKConfig+0x662>
- 800c6ec: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 800c6f0: d02f beq.n 800c752 <HAL_RCCEx_PeriphCLKConfig+0x66e>
- 800c6f2: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 800c6f6: d826 bhi.n 800c746 <HAL_RCCEx_PeriphCLKConfig+0x662>
- 800c6f8: f1b3 5f40 cmp.w r3, #805306368 @ 0x30000000
- 800c6fc: d02b beq.n 800c756 <HAL_RCCEx_PeriphCLKConfig+0x672>
- 800c6fe: f1b3 5f40 cmp.w r3, #805306368 @ 0x30000000
- 800c702: d820 bhi.n 800c746 <HAL_RCCEx_PeriphCLKConfig+0x662>
- 800c704: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800c708: d012 beq.n 800c730 <HAL_RCCEx_PeriphCLKConfig+0x64c>
- 800c70a: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800c70e: d81a bhi.n 800c746 <HAL_RCCEx_PeriphCLKConfig+0x662>
- 800c710: 2b00 cmp r3, #0
- 800c712: d022 beq.n 800c75a <HAL_RCCEx_PeriphCLKConfig+0x676>
- 800c714: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
- 800c718: d115 bne.n 800c746 <HAL_RCCEx_PeriphCLKConfig+0x662>
- /* SPI6 clock source configuration done later after clock selection check */
- break;
- case RCC_SPI6CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI6*/
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
- 800c71a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c71e: 3308 adds r3, #8
- 800c720: 2101 movs r1, #1
- 800c722: 4618 mov r0, r3
- 800c724: f002 f85c bl 800e7e0 <RCCEx_PLL2_Config>
- 800c728: 4603 mov r3, r0
- 800c72a: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SPI6 clock source configuration done later after clock selection check */
- break;
- 800c72e: e015 b.n 800c75c <HAL_RCCEx_PeriphCLKConfig+0x678>
- case RCC_SPI6CLKSOURCE_PLL3: /* PLL3 is used as clock source for SPI6*/
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
- 800c730: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c734: 3328 adds r3, #40 @ 0x28
- 800c736: 2101 movs r1, #1
- 800c738: 4618 mov r0, r3
- 800c73a: f002 f903 bl 800e944 <RCCEx_PLL3_Config>
- 800c73e: 4603 mov r3, r0
- 800c740: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SPI6 clock source configuration done later after clock selection check */
- break;
- 800c744: e00a b.n 800c75c <HAL_RCCEx_PeriphCLKConfig+0x678>
- /* SPI6 clock source configuration done later after clock selection check */
- break;
- #endif
- default:
- ret = HAL_ERROR;
- 800c746: 2301 movs r3, #1
- 800c748: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800c74c: e006 b.n 800c75c <HAL_RCCEx_PeriphCLKConfig+0x678>
- break;
- 800c74e: bf00 nop
- 800c750: e004 b.n 800c75c <HAL_RCCEx_PeriphCLKConfig+0x678>
- break;
- 800c752: bf00 nop
- 800c754: e002 b.n 800c75c <HAL_RCCEx_PeriphCLKConfig+0x678>
- break;
- 800c756: bf00 nop
- 800c758: e000 b.n 800c75c <HAL_RCCEx_PeriphCLKConfig+0x678>
- break;
- 800c75a: bf00 nop
- }
- if (ret == HAL_OK)
- 800c75c: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c760: 2b00 cmp r3, #0
- 800c762: d10b bne.n 800c77c <HAL_RCCEx_PeriphCLKConfig+0x698>
- {
- /* Set the source of SPI6 clock*/
- __HAL_RCC_SPI6_CONFIG(PeriphClkInit->Spi6ClockSelection);
- 800c764: 4ba3 ldr r3, [pc, #652] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c766: 6d9b ldr r3, [r3, #88] @ 0x58
- 800c768: f023 41e0 bic.w r1, r3, #1879048192 @ 0x70000000
- 800c76c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c770: f8d3 30b0 ldr.w r3, [r3, #176] @ 0xb0
- 800c774: 4a9f ldr r2, [pc, #636] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c776: 430b orrs r3, r1
- 800c778: 6593 str r3, [r2, #88] @ 0x58
- 800c77a: e003 b.n 800c784 <HAL_RCCEx_PeriphCLKConfig+0x6a0>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800c77c: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c780: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- #endif /*DSI*/
- #if defined(FDCAN1) || defined(FDCAN2)
- /*---------------------------- FDCAN configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FDCAN) == RCC_PERIPHCLK_FDCAN)
- 800c784: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c788: e9d3 2300 ldrd r2, r3, [r3]
- 800c78c: f402 4300 and.w r3, r2, #32768 @ 0x8000
- 800c790: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
- 800c794: 2300 movs r3, #0
- 800c796: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
- 800c79a: e9d7 1234 ldrd r1, r2, [r7, #208] @ 0xd0
- 800c79e: 460b mov r3, r1
- 800c7a0: 4313 orrs r3, r2
- 800c7a2: d037 beq.n 800c814 <HAL_RCCEx_PeriphCLKConfig+0x730>
- {
- switch (PeriphClkInit->FdcanClockSelection)
- 800c7a4: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c7a8: 6f1b ldr r3, [r3, #112] @ 0x70
- 800c7aa: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800c7ae: d00e beq.n 800c7ce <HAL_RCCEx_PeriphCLKConfig+0x6ea>
- 800c7b0: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800c7b4: d816 bhi.n 800c7e4 <HAL_RCCEx_PeriphCLKConfig+0x700>
- 800c7b6: 2b00 cmp r3, #0
- 800c7b8: d018 beq.n 800c7ec <HAL_RCCEx_PeriphCLKConfig+0x708>
- 800c7ba: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
- 800c7be: d111 bne.n 800c7e4 <HAL_RCCEx_PeriphCLKConfig+0x700>
- {
- case RCC_FDCANCLKSOURCE_PLL: /* PLL is used as clock source for FDCAN*/
- /* Enable FDCAN Clock output generated form System PLL . */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
- 800c7c0: 4b8c ldr r3, [pc, #560] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c7c2: 6adb ldr r3, [r3, #44] @ 0x2c
- 800c7c4: 4a8b ldr r2, [pc, #556] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c7c6: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800c7ca: 62d3 str r3, [r2, #44] @ 0x2c
- /* FDCAN clock source configuration done later after clock selection check */
- break;
- 800c7cc: e00f b.n 800c7ee <HAL_RCCEx_PeriphCLKConfig+0x70a>
- case RCC_FDCANCLKSOURCE_PLL2: /* PLL2 is used as clock source for FDCAN*/
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
- 800c7ce: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c7d2: 3308 adds r3, #8
- 800c7d4: 2101 movs r1, #1
- 800c7d6: 4618 mov r0, r3
- 800c7d8: f002 f802 bl 800e7e0 <RCCEx_PLL2_Config>
- 800c7dc: 4603 mov r3, r0
- 800c7de: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* FDCAN clock source configuration done later after clock selection check */
- break;
- 800c7e2: e004 b.n 800c7ee <HAL_RCCEx_PeriphCLKConfig+0x70a>
- /* HSE is used as clock source for FDCAN*/
- /* FDCAN clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800c7e4: 2301 movs r3, #1
- 800c7e6: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800c7ea: e000 b.n 800c7ee <HAL_RCCEx_PeriphCLKConfig+0x70a>
- break;
- 800c7ec: bf00 nop
- }
- if (ret == HAL_OK)
- 800c7ee: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c7f2: 2b00 cmp r3, #0
- 800c7f4: d10a bne.n 800c80c <HAL_RCCEx_PeriphCLKConfig+0x728>
- {
- /* Set the source of FDCAN clock*/
- __HAL_RCC_FDCAN_CONFIG(PeriphClkInit->FdcanClockSelection);
- 800c7f6: 4b7f ldr r3, [pc, #508] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c7f8: 6d1b ldr r3, [r3, #80] @ 0x50
- 800c7fa: f023 5140 bic.w r1, r3, #805306368 @ 0x30000000
- 800c7fe: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c802: 6f1b ldr r3, [r3, #112] @ 0x70
- 800c804: 4a7b ldr r2, [pc, #492] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c806: 430b orrs r3, r1
- 800c808: 6513 str r3, [r2, #80] @ 0x50
- 800c80a: e003 b.n 800c814 <HAL_RCCEx_PeriphCLKConfig+0x730>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800c80c: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c810: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- #endif /*FDCAN1 || FDCAN2*/
- /*---------------------------- FMC configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMC) == RCC_PERIPHCLK_FMC)
- 800c814: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c818: e9d3 2300 ldrd r2, r3, [r3]
- 800c81c: f002 7380 and.w r3, r2, #16777216 @ 0x1000000
- 800c820: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
- 800c824: 2300 movs r3, #0
- 800c826: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
- 800c82a: e9d7 1232 ldrd r1, r2, [r7, #200] @ 0xc8
- 800c82e: 460b mov r3, r1
- 800c830: 4313 orrs r3, r2
- 800c832: d039 beq.n 800c8a8 <HAL_RCCEx_PeriphCLKConfig+0x7c4>
- {
- switch (PeriphClkInit->FmcClockSelection)
- 800c834: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c838: 6c9b ldr r3, [r3, #72] @ 0x48
- 800c83a: 2b03 cmp r3, #3
- 800c83c: d81c bhi.n 800c878 <HAL_RCCEx_PeriphCLKConfig+0x794>
- 800c83e: a201 add r2, pc, #4 @ (adr r2, 800c844 <HAL_RCCEx_PeriphCLKConfig+0x760>)
- 800c840: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800c844: 0800c881 .word 0x0800c881
- 800c848: 0800c855 .word 0x0800c855
- 800c84c: 0800c863 .word 0x0800c863
- 800c850: 0800c881 .word 0x0800c881
- {
- case RCC_FMCCLKSOURCE_PLL: /* PLL is used as clock source for FMC*/
- /* Enable FMC Clock output generated form System PLL . */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
- 800c854: 4b67 ldr r3, [pc, #412] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c856: 6adb ldr r3, [r3, #44] @ 0x2c
- 800c858: 4a66 ldr r2, [pc, #408] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c85a: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800c85e: 62d3 str r3, [r2, #44] @ 0x2c
- /* FMC clock source configuration done later after clock selection check */
- break;
- 800c860: e00f b.n 800c882 <HAL_RCCEx_PeriphCLKConfig+0x79e>
- case RCC_FMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for FMC*/
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
- 800c862: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c866: 3308 adds r3, #8
- 800c868: 2102 movs r1, #2
- 800c86a: 4618 mov r0, r3
- 800c86c: f001 ffb8 bl 800e7e0 <RCCEx_PLL2_Config>
- 800c870: 4603 mov r3, r0
- 800c872: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* FMC clock source configuration done later after clock selection check */
- break;
- 800c876: e004 b.n 800c882 <HAL_RCCEx_PeriphCLKConfig+0x79e>
- case RCC_FMCCLKSOURCE_HCLK:
- /* D1/CD HCLK clock selected as FMC kernel peripheral clock */
- break;
- default:
- ret = HAL_ERROR;
- 800c878: 2301 movs r3, #1
- 800c87a: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800c87e: e000 b.n 800c882 <HAL_RCCEx_PeriphCLKConfig+0x79e>
- break;
- 800c880: bf00 nop
- }
- if (ret == HAL_OK)
- 800c882: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c886: 2b00 cmp r3, #0
- 800c888: d10a bne.n 800c8a0 <HAL_RCCEx_PeriphCLKConfig+0x7bc>
- {
- /* Set the source of FMC clock*/
- __HAL_RCC_FMC_CONFIG(PeriphClkInit->FmcClockSelection);
- 800c88a: 4b5a ldr r3, [pc, #360] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c88c: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800c88e: f023 0103 bic.w r1, r3, #3
- 800c892: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c896: 6c9b ldr r3, [r3, #72] @ 0x48
- 800c898: 4a56 ldr r2, [pc, #344] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c89a: 430b orrs r3, r1
- 800c89c: 64d3 str r3, [r2, #76] @ 0x4c
- 800c89e: e003 b.n 800c8a8 <HAL_RCCEx_PeriphCLKConfig+0x7c4>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800c8a0: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c8a4: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- /*---------------------------- RTC configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
- 800c8a8: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c8ac: e9d3 2300 ldrd r2, r3, [r3]
- 800c8b0: f402 0380 and.w r3, r2, #4194304 @ 0x400000
- 800c8b4: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
- 800c8b8: 2300 movs r3, #0
- 800c8ba: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
- 800c8be: e9d7 1230 ldrd r1, r2, [r7, #192] @ 0xc0
- 800c8c2: 460b mov r3, r1
- 800c8c4: 4313 orrs r3, r2
- 800c8c6: f000 809f beq.w 800ca08 <HAL_RCCEx_PeriphCLKConfig+0x924>
- {
- /* check for RTC Parameters used to output RTCCLK */
- assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
- /* Enable write access to Backup domain */
- SET_BIT(PWR->CR1, PWR_CR1_DBP);
- 800c8ca: 4b4b ldr r3, [pc, #300] @ (800c9f8 <HAL_RCCEx_PeriphCLKConfig+0x914>)
- 800c8cc: 681b ldr r3, [r3, #0]
- 800c8ce: 4a4a ldr r2, [pc, #296] @ (800c9f8 <HAL_RCCEx_PeriphCLKConfig+0x914>)
- 800c8d0: f443 7380 orr.w r3, r3, #256 @ 0x100
- 800c8d4: 6013 str r3, [r2, #0]
- /* Wait for Backup domain Write protection disable */
- tickstart = HAL_GetTick();
- 800c8d6: f7f8 fe47 bl 8005568 <HAL_GetTick>
- 800c8da: f8c7 0118 str.w r0, [r7, #280] @ 0x118
- while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
- 800c8de: e00b b.n 800c8f8 <HAL_RCCEx_PeriphCLKConfig+0x814>
- {
- if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
- 800c8e0: f7f8 fe42 bl 8005568 <HAL_GetTick>
- 800c8e4: 4602 mov r2, r0
- 800c8e6: f8d7 3118 ldr.w r3, [r7, #280] @ 0x118
- 800c8ea: 1ad3 subs r3, r2, r3
- 800c8ec: 2b64 cmp r3, #100 @ 0x64
- 800c8ee: d903 bls.n 800c8f8 <HAL_RCCEx_PeriphCLKConfig+0x814>
- {
- ret = HAL_TIMEOUT;
- 800c8f0: 2303 movs r3, #3
- 800c8f2: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800c8f6: e005 b.n 800c904 <HAL_RCCEx_PeriphCLKConfig+0x820>
- while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
- 800c8f8: 4b3f ldr r3, [pc, #252] @ (800c9f8 <HAL_RCCEx_PeriphCLKConfig+0x914>)
- 800c8fa: 681b ldr r3, [r3, #0]
- 800c8fc: f403 7380 and.w r3, r3, #256 @ 0x100
- 800c900: 2b00 cmp r3, #0
- 800c902: d0ed beq.n 800c8e0 <HAL_RCCEx_PeriphCLKConfig+0x7fc>
- }
- }
- if (ret == HAL_OK)
- 800c904: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c908: 2b00 cmp r3, #0
- 800c90a: d179 bne.n 800ca00 <HAL_RCCEx_PeriphCLKConfig+0x91c>
- {
- /* Reset the Backup domain only if the RTC Clock source selection is modified */
- if ((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))
- 800c90c: 4b39 ldr r3, [pc, #228] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c90e: 6f1a ldr r2, [r3, #112] @ 0x70
- 800c910: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c914: f8d3 30b4 ldr.w r3, [r3, #180] @ 0xb4
- 800c918: 4053 eors r3, r2
- 800c91a: f403 7340 and.w r3, r3, #768 @ 0x300
- 800c91e: 2b00 cmp r3, #0
- 800c920: d015 beq.n 800c94e <HAL_RCCEx_PeriphCLKConfig+0x86a>
- {
- /* Store the content of BDCR register before the reset of Backup Domain */
- tmpreg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
- 800c922: 4b34 ldr r3, [pc, #208] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c924: 6f1b ldr r3, [r3, #112] @ 0x70
- 800c926: f423 7340 bic.w r3, r3, #768 @ 0x300
- 800c92a: f8c7 3114 str.w r3, [r7, #276] @ 0x114
- /* RTC Clock selection can be changed only if the Backup Domain is reset */
- __HAL_RCC_BACKUPRESET_FORCE();
- 800c92e: 4b31 ldr r3, [pc, #196] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c930: 6f1b ldr r3, [r3, #112] @ 0x70
- 800c932: 4a30 ldr r2, [pc, #192] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c934: f443 3380 orr.w r3, r3, #65536 @ 0x10000
- 800c938: 6713 str r3, [r2, #112] @ 0x70
- __HAL_RCC_BACKUPRESET_RELEASE();
- 800c93a: 4b2e ldr r3, [pc, #184] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c93c: 6f1b ldr r3, [r3, #112] @ 0x70
- 800c93e: 4a2d ldr r2, [pc, #180] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c940: f423 3380 bic.w r3, r3, #65536 @ 0x10000
- 800c944: 6713 str r3, [r2, #112] @ 0x70
- /* Restore the Content of BDCR register */
- RCC->BDCR = tmpreg;
- 800c946: 4a2b ldr r2, [pc, #172] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c948: f8d7 3114 ldr.w r3, [r7, #276] @ 0x114
- 800c94c: 6713 str r3, [r2, #112] @ 0x70
- }
- /* If LSE is selected as RTC clock source (and enabled prior to Backup Domain reset), wait for LSE reactivation */
- if (PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE)
- 800c94e: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c952: f8d3 30b4 ldr.w r3, [r3, #180] @ 0xb4
- 800c956: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800c95a: d118 bne.n 800c98e <HAL_RCCEx_PeriphCLKConfig+0x8aa>
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800c95c: f7f8 fe04 bl 8005568 <HAL_GetTick>
- 800c960: f8c7 0118 str.w r0, [r7, #280] @ 0x118
- /* Wait till LSE is ready */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
- 800c964: e00d b.n 800c982 <HAL_RCCEx_PeriphCLKConfig+0x89e>
- {
- if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
- 800c966: f7f8 fdff bl 8005568 <HAL_GetTick>
- 800c96a: 4602 mov r2, r0
- 800c96c: f8d7 3118 ldr.w r3, [r7, #280] @ 0x118
- 800c970: 1ad2 subs r2, r2, r3
- 800c972: f241 3388 movw r3, #5000 @ 0x1388
- 800c976: 429a cmp r2, r3
- 800c978: d903 bls.n 800c982 <HAL_RCCEx_PeriphCLKConfig+0x89e>
- {
- ret = HAL_TIMEOUT;
- 800c97a: 2303 movs r3, #3
- 800c97c: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800c980: e005 b.n 800c98e <HAL_RCCEx_PeriphCLKConfig+0x8aa>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
- 800c982: 4b1c ldr r3, [pc, #112] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c984: 6f1b ldr r3, [r3, #112] @ 0x70
- 800c986: f003 0302 and.w r3, r3, #2
- 800c98a: 2b00 cmp r3, #0
- 800c98c: d0eb beq.n 800c966 <HAL_RCCEx_PeriphCLKConfig+0x882>
- }
- }
- }
- if (ret == HAL_OK)
- 800c98e: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c992: 2b00 cmp r3, #0
- 800c994: d129 bne.n 800c9ea <HAL_RCCEx_PeriphCLKConfig+0x906>
- {
- __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
- 800c996: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c99a: f8d3 30b4 ldr.w r3, [r3, #180] @ 0xb4
- 800c99e: f403 7340 and.w r3, r3, #768 @ 0x300
- 800c9a2: f5b3 7f40 cmp.w r3, #768 @ 0x300
- 800c9a6: d10e bne.n 800c9c6 <HAL_RCCEx_PeriphCLKConfig+0x8e2>
- 800c9a8: 4b12 ldr r3, [pc, #72] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c9aa: 691b ldr r3, [r3, #16]
- 800c9ac: f423 517c bic.w r1, r3, #16128 @ 0x3f00
- 800c9b0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c9b4: f8d3 30b4 ldr.w r3, [r3, #180] @ 0xb4
- 800c9b8: 091a lsrs r2, r3, #4
- 800c9ba: 4b10 ldr r3, [pc, #64] @ (800c9fc <HAL_RCCEx_PeriphCLKConfig+0x918>)
- 800c9bc: 4013 ands r3, r2
- 800c9be: 4a0d ldr r2, [pc, #52] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c9c0: 430b orrs r3, r1
- 800c9c2: 6113 str r3, [r2, #16]
- 800c9c4: e005 b.n 800c9d2 <HAL_RCCEx_PeriphCLKConfig+0x8ee>
- 800c9c6: 4b0b ldr r3, [pc, #44] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c9c8: 691b ldr r3, [r3, #16]
- 800c9ca: 4a0a ldr r2, [pc, #40] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c9cc: f423 537c bic.w r3, r3, #16128 @ 0x3f00
- 800c9d0: 6113 str r3, [r2, #16]
- 800c9d2: 4b08 ldr r3, [pc, #32] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c9d4: 6f19 ldr r1, [r3, #112] @ 0x70
- 800c9d6: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800c9da: f8d3 30b4 ldr.w r3, [r3, #180] @ 0xb4
- 800c9de: f3c3 030b ubfx r3, r3, #0, #12
- 800c9e2: 4a04 ldr r2, [pc, #16] @ (800c9f4 <HAL_RCCEx_PeriphCLKConfig+0x910>)
- 800c9e4: 430b orrs r3, r1
- 800c9e6: 6713 str r3, [r2, #112] @ 0x70
- 800c9e8: e00e b.n 800ca08 <HAL_RCCEx_PeriphCLKConfig+0x924>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800c9ea: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800c9ee: f887 311e strb.w r3, [r7, #286] @ 0x11e
- 800c9f2: e009 b.n 800ca08 <HAL_RCCEx_PeriphCLKConfig+0x924>
- 800c9f4: 58024400 .word 0x58024400
- 800c9f8: 58024800 .word 0x58024800
- 800c9fc: 00ffffcf .word 0x00ffffcf
- }
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800ca00: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800ca04: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- /*-------------------------- USART1/6 configuration --------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART16) == RCC_PERIPHCLK_USART16)
- 800ca08: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800ca0c: e9d3 2300 ldrd r2, r3, [r3]
- 800ca10: f002 0301 and.w r3, r2, #1
- 800ca14: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
- 800ca18: 2300 movs r3, #0
- 800ca1a: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
- 800ca1e: e9d7 122e ldrd r1, r2, [r7, #184] @ 0xb8
- 800ca22: 460b mov r3, r1
- 800ca24: 4313 orrs r3, r2
- 800ca26: f000 8089 beq.w 800cb3c <HAL_RCCEx_PeriphCLKConfig+0xa58>
- {
- switch (PeriphClkInit->Usart16ClockSelection)
- 800ca2a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800ca2e: 6fdb ldr r3, [r3, #124] @ 0x7c
- 800ca30: 2b28 cmp r3, #40 @ 0x28
- 800ca32: d86b bhi.n 800cb0c <HAL_RCCEx_PeriphCLKConfig+0xa28>
- 800ca34: a201 add r2, pc, #4 @ (adr r2, 800ca3c <HAL_RCCEx_PeriphCLKConfig+0x958>)
- 800ca36: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800ca3a: bf00 nop
- 800ca3c: 0800cb15 .word 0x0800cb15
- 800ca40: 0800cb0d .word 0x0800cb0d
- 800ca44: 0800cb0d .word 0x0800cb0d
- 800ca48: 0800cb0d .word 0x0800cb0d
- 800ca4c: 0800cb0d .word 0x0800cb0d
- 800ca50: 0800cb0d .word 0x0800cb0d
- 800ca54: 0800cb0d .word 0x0800cb0d
- 800ca58: 0800cb0d .word 0x0800cb0d
- 800ca5c: 0800cae1 .word 0x0800cae1
- 800ca60: 0800cb0d .word 0x0800cb0d
- 800ca64: 0800cb0d .word 0x0800cb0d
- 800ca68: 0800cb0d .word 0x0800cb0d
- 800ca6c: 0800cb0d .word 0x0800cb0d
- 800ca70: 0800cb0d .word 0x0800cb0d
- 800ca74: 0800cb0d .word 0x0800cb0d
- 800ca78: 0800cb0d .word 0x0800cb0d
- 800ca7c: 0800caf7 .word 0x0800caf7
- 800ca80: 0800cb0d .word 0x0800cb0d
- 800ca84: 0800cb0d .word 0x0800cb0d
- 800ca88: 0800cb0d .word 0x0800cb0d
- 800ca8c: 0800cb0d .word 0x0800cb0d
- 800ca90: 0800cb0d .word 0x0800cb0d
- 800ca94: 0800cb0d .word 0x0800cb0d
- 800ca98: 0800cb0d .word 0x0800cb0d
- 800ca9c: 0800cb15 .word 0x0800cb15
- 800caa0: 0800cb0d .word 0x0800cb0d
- 800caa4: 0800cb0d .word 0x0800cb0d
- 800caa8: 0800cb0d .word 0x0800cb0d
- 800caac: 0800cb0d .word 0x0800cb0d
- 800cab0: 0800cb0d .word 0x0800cb0d
- 800cab4: 0800cb0d .word 0x0800cb0d
- 800cab8: 0800cb0d .word 0x0800cb0d
- 800cabc: 0800cb15 .word 0x0800cb15
- 800cac0: 0800cb0d .word 0x0800cb0d
- 800cac4: 0800cb0d .word 0x0800cb0d
- 800cac8: 0800cb0d .word 0x0800cb0d
- 800cacc: 0800cb0d .word 0x0800cb0d
- 800cad0: 0800cb0d .word 0x0800cb0d
- 800cad4: 0800cb0d .word 0x0800cb0d
- 800cad8: 0800cb0d .word 0x0800cb0d
- 800cadc: 0800cb15 .word 0x0800cb15
- case RCC_USART16CLKSOURCE_PCLK2: /* CD/D2 PCLK2 as clock source for USART1/6 */
- /* USART1/6 clock source configuration done later after clock selection check */
- break;
- case RCC_USART16CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART1/6 */
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
- 800cae0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cae4: 3308 adds r3, #8
- 800cae6: 2101 movs r1, #1
- 800cae8: 4618 mov r0, r3
- 800caea: f001 fe79 bl 800e7e0 <RCCEx_PLL2_Config>
- 800caee: 4603 mov r3, r0
- 800caf0: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* USART1/6 clock source configuration done later after clock selection check */
- break;
- 800caf4: e00f b.n 800cb16 <HAL_RCCEx_PeriphCLKConfig+0xa32>
- case RCC_USART16CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART1/6 */
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
- 800caf6: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cafa: 3328 adds r3, #40 @ 0x28
- 800cafc: 2101 movs r1, #1
- 800cafe: 4618 mov r0, r3
- 800cb00: f001 ff20 bl 800e944 <RCCEx_PLL3_Config>
- 800cb04: 4603 mov r3, r0
- 800cb06: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* USART1/6 clock source configuration done later after clock selection check */
- break;
- 800cb0a: e004 b.n 800cb16 <HAL_RCCEx_PeriphCLKConfig+0xa32>
- /* LSE, oscillator is used as source of USART1/6 clock */
- /* USART1/6 clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800cb0c: 2301 movs r3, #1
- 800cb0e: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800cb12: e000 b.n 800cb16 <HAL_RCCEx_PeriphCLKConfig+0xa32>
- break;
- 800cb14: bf00 nop
- }
- if (ret == HAL_OK)
- 800cb16: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800cb1a: 2b00 cmp r3, #0
- 800cb1c: d10a bne.n 800cb34 <HAL_RCCEx_PeriphCLKConfig+0xa50>
- {
- /* Set the source of USART1/6 clock */
- __HAL_RCC_USART16_CONFIG(PeriphClkInit->Usart16ClockSelection);
- 800cb1e: 4bbf ldr r3, [pc, #764] @ (800ce1c <HAL_RCCEx_PeriphCLKConfig+0xd38>)
- 800cb20: 6d5b ldr r3, [r3, #84] @ 0x54
- 800cb22: f023 0138 bic.w r1, r3, #56 @ 0x38
- 800cb26: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cb2a: 6fdb ldr r3, [r3, #124] @ 0x7c
- 800cb2c: 4abb ldr r2, [pc, #748] @ (800ce1c <HAL_RCCEx_PeriphCLKConfig+0xd38>)
- 800cb2e: 430b orrs r3, r1
- 800cb30: 6553 str r3, [r2, #84] @ 0x54
- 800cb32: e003 b.n 800cb3c <HAL_RCCEx_PeriphCLKConfig+0xa58>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800cb34: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800cb38: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- /*-------------------------- USART2/3/4/5/7/8 Configuration --------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART234578) == RCC_PERIPHCLK_USART234578)
- 800cb3c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cb40: e9d3 2300 ldrd r2, r3, [r3]
- 800cb44: f002 0302 and.w r3, r2, #2
- 800cb48: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
- 800cb4c: 2300 movs r3, #0
- 800cb4e: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
- 800cb52: e9d7 122c ldrd r1, r2, [r7, #176] @ 0xb0
- 800cb56: 460b mov r3, r1
- 800cb58: 4313 orrs r3, r2
- 800cb5a: d041 beq.n 800cbe0 <HAL_RCCEx_PeriphCLKConfig+0xafc>
- {
- switch (PeriphClkInit->Usart234578ClockSelection)
- 800cb5c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cb60: 6f9b ldr r3, [r3, #120] @ 0x78
- 800cb62: 2b05 cmp r3, #5
- 800cb64: d824 bhi.n 800cbb0 <HAL_RCCEx_PeriphCLKConfig+0xacc>
- 800cb66: a201 add r2, pc, #4 @ (adr r2, 800cb6c <HAL_RCCEx_PeriphCLKConfig+0xa88>)
- 800cb68: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800cb6c: 0800cbb9 .word 0x0800cbb9
- 800cb70: 0800cb85 .word 0x0800cb85
- 800cb74: 0800cb9b .word 0x0800cb9b
- 800cb78: 0800cbb9 .word 0x0800cbb9
- 800cb7c: 0800cbb9 .word 0x0800cbb9
- 800cb80: 0800cbb9 .word 0x0800cbb9
- case RCC_USART234578CLKSOURCE_PCLK1: /* CD/D2 PCLK1 as clock source for USART2/3/4/5/7/8 */
- /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
- break;
- case RCC_USART234578CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART2/3/4/5/7/8 */
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
- 800cb84: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cb88: 3308 adds r3, #8
- 800cb8a: 2101 movs r1, #1
- 800cb8c: 4618 mov r0, r3
- 800cb8e: f001 fe27 bl 800e7e0 <RCCEx_PLL2_Config>
- 800cb92: 4603 mov r3, r0
- 800cb94: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
- break;
- 800cb98: e00f b.n 800cbba <HAL_RCCEx_PeriphCLKConfig+0xad6>
- case RCC_USART234578CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART2/3/4/5/7/8 */
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
- 800cb9a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cb9e: 3328 adds r3, #40 @ 0x28
- 800cba0: 2101 movs r1, #1
- 800cba2: 4618 mov r0, r3
- 800cba4: f001 fece bl 800e944 <RCCEx_PLL3_Config>
- 800cba8: 4603 mov r3, r0
- 800cbaa: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
- break;
- 800cbae: e004 b.n 800cbba <HAL_RCCEx_PeriphCLKConfig+0xad6>
- /* LSE, oscillator is used as source of USART2/3/4/5/7/8 clock */
- /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800cbb0: 2301 movs r3, #1
- 800cbb2: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800cbb6: e000 b.n 800cbba <HAL_RCCEx_PeriphCLKConfig+0xad6>
- break;
- 800cbb8: bf00 nop
- }
- if (ret == HAL_OK)
- 800cbba: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800cbbe: 2b00 cmp r3, #0
- 800cbc0: d10a bne.n 800cbd8 <HAL_RCCEx_PeriphCLKConfig+0xaf4>
- {
- /* Set the source of USART2/3/4/5/7/8 clock */
- __HAL_RCC_USART234578_CONFIG(PeriphClkInit->Usart234578ClockSelection);
- 800cbc2: 4b96 ldr r3, [pc, #600] @ (800ce1c <HAL_RCCEx_PeriphCLKConfig+0xd38>)
- 800cbc4: 6d5b ldr r3, [r3, #84] @ 0x54
- 800cbc6: f023 0107 bic.w r1, r3, #7
- 800cbca: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cbce: 6f9b ldr r3, [r3, #120] @ 0x78
- 800cbd0: 4a92 ldr r2, [pc, #584] @ (800ce1c <HAL_RCCEx_PeriphCLKConfig+0xd38>)
- 800cbd2: 430b orrs r3, r1
- 800cbd4: 6553 str r3, [r2, #84] @ 0x54
- 800cbd6: e003 b.n 800cbe0 <HAL_RCCEx_PeriphCLKConfig+0xafc>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800cbd8: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800cbdc: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- /*-------------------------- LPUART1 Configuration -------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1)
- 800cbe0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cbe4: e9d3 2300 ldrd r2, r3, [r3]
- 800cbe8: f002 0304 and.w r3, r2, #4
- 800cbec: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
- 800cbf0: 2300 movs r3, #0
- 800cbf2: f8c7 30ac str.w r3, [r7, #172] @ 0xac
- 800cbf6: e9d7 122a ldrd r1, r2, [r7, #168] @ 0xa8
- 800cbfa: 460b mov r3, r1
- 800cbfc: 4313 orrs r3, r2
- 800cbfe: d044 beq.n 800cc8a <HAL_RCCEx_PeriphCLKConfig+0xba6>
- {
- switch (PeriphClkInit->Lpuart1ClockSelection)
- 800cc00: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cc04: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94
- 800cc08: 2b05 cmp r3, #5
- 800cc0a: d825 bhi.n 800cc58 <HAL_RCCEx_PeriphCLKConfig+0xb74>
- 800cc0c: a201 add r2, pc, #4 @ (adr r2, 800cc14 <HAL_RCCEx_PeriphCLKConfig+0xb30>)
- 800cc0e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800cc12: bf00 nop
- 800cc14: 0800cc61 .word 0x0800cc61
- 800cc18: 0800cc2d .word 0x0800cc2d
- 800cc1c: 0800cc43 .word 0x0800cc43
- 800cc20: 0800cc61 .word 0x0800cc61
- 800cc24: 0800cc61 .word 0x0800cc61
- 800cc28: 0800cc61 .word 0x0800cc61
- case RCC_LPUART1CLKSOURCE_PCLK4: /* SRD/D3 PCLK1 (PCLK4) as clock source for LPUART1 */
- /* LPUART1 clock source configuration done later after clock selection check */
- break;
- case RCC_LPUART1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPUART1 */
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
- 800cc2c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cc30: 3308 adds r3, #8
- 800cc32: 2101 movs r1, #1
- 800cc34: 4618 mov r0, r3
- 800cc36: f001 fdd3 bl 800e7e0 <RCCEx_PLL2_Config>
- 800cc3a: 4603 mov r3, r0
- 800cc3c: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* LPUART1 clock source configuration done later after clock selection check */
- break;
- 800cc40: e00f b.n 800cc62 <HAL_RCCEx_PeriphCLKConfig+0xb7e>
- case RCC_LPUART1CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPUART1 */
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
- 800cc42: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cc46: 3328 adds r3, #40 @ 0x28
- 800cc48: 2101 movs r1, #1
- 800cc4a: 4618 mov r0, r3
- 800cc4c: f001 fe7a bl 800e944 <RCCEx_PLL3_Config>
- 800cc50: 4603 mov r3, r0
- 800cc52: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* LPUART1 clock source configuration done later after clock selection check */
- break;
- 800cc56: e004 b.n 800cc62 <HAL_RCCEx_PeriphCLKConfig+0xb7e>
- /* LSE, oscillator is used as source of LPUART1 clock */
- /* LPUART1 clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800cc58: 2301 movs r3, #1
- 800cc5a: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800cc5e: e000 b.n 800cc62 <HAL_RCCEx_PeriphCLKConfig+0xb7e>
- break;
- 800cc60: bf00 nop
- }
- if (ret == HAL_OK)
- 800cc62: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800cc66: 2b00 cmp r3, #0
- 800cc68: d10b bne.n 800cc82 <HAL_RCCEx_PeriphCLKConfig+0xb9e>
- {
- /* Set the source of LPUART1 clock */
- __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection);
- 800cc6a: 4b6c ldr r3, [pc, #432] @ (800ce1c <HAL_RCCEx_PeriphCLKConfig+0xd38>)
- 800cc6c: 6d9b ldr r3, [r3, #88] @ 0x58
- 800cc6e: f023 0107 bic.w r1, r3, #7
- 800cc72: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cc76: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94
- 800cc7a: 4a68 ldr r2, [pc, #416] @ (800ce1c <HAL_RCCEx_PeriphCLKConfig+0xd38>)
- 800cc7c: 430b orrs r3, r1
- 800cc7e: 6593 str r3, [r2, #88] @ 0x58
- 800cc80: e003 b.n 800cc8a <HAL_RCCEx_PeriphCLKConfig+0xba6>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800cc82: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800cc86: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- /*---------------------------- LPTIM1 configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
- 800cc8a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cc8e: e9d3 2300 ldrd r2, r3, [r3]
- 800cc92: f002 0320 and.w r3, r2, #32
- 800cc96: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
- 800cc9a: 2300 movs r3, #0
- 800cc9c: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
- 800cca0: e9d7 1228 ldrd r1, r2, [r7, #160] @ 0xa0
- 800cca4: 460b mov r3, r1
- 800cca6: 4313 orrs r3, r2
- 800cca8: d055 beq.n 800cd56 <HAL_RCCEx_PeriphCLKConfig+0xc72>
- {
- switch (PeriphClkInit->Lptim1ClockSelection)
- 800ccaa: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800ccae: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 800ccb2: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
- 800ccb6: d033 beq.n 800cd20 <HAL_RCCEx_PeriphCLKConfig+0xc3c>
- 800ccb8: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
- 800ccbc: d82c bhi.n 800cd18 <HAL_RCCEx_PeriphCLKConfig+0xc34>
- 800ccbe: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 800ccc2: d02f beq.n 800cd24 <HAL_RCCEx_PeriphCLKConfig+0xc40>
- 800ccc4: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 800ccc8: d826 bhi.n 800cd18 <HAL_RCCEx_PeriphCLKConfig+0xc34>
- 800ccca: f1b3 5f40 cmp.w r3, #805306368 @ 0x30000000
- 800ccce: d02b beq.n 800cd28 <HAL_RCCEx_PeriphCLKConfig+0xc44>
- 800ccd0: f1b3 5f40 cmp.w r3, #805306368 @ 0x30000000
- 800ccd4: d820 bhi.n 800cd18 <HAL_RCCEx_PeriphCLKConfig+0xc34>
- 800ccd6: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800ccda: d012 beq.n 800cd02 <HAL_RCCEx_PeriphCLKConfig+0xc1e>
- 800ccdc: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800cce0: d81a bhi.n 800cd18 <HAL_RCCEx_PeriphCLKConfig+0xc34>
- 800cce2: 2b00 cmp r3, #0
- 800cce4: d022 beq.n 800cd2c <HAL_RCCEx_PeriphCLKConfig+0xc48>
- 800cce6: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
- 800ccea: d115 bne.n 800cd18 <HAL_RCCEx_PeriphCLKConfig+0xc34>
- /* LPTIM1 clock source configuration done later after clock selection check */
- break;
- case RCC_LPTIM1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM1*/
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
- 800ccec: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800ccf0: 3308 adds r3, #8
- 800ccf2: 2100 movs r1, #0
- 800ccf4: 4618 mov r0, r3
- 800ccf6: f001 fd73 bl 800e7e0 <RCCEx_PLL2_Config>
- 800ccfa: 4603 mov r3, r0
- 800ccfc: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* LPTIM1 clock source configuration done later after clock selection check */
- break;
- 800cd00: e015 b.n 800cd2e <HAL_RCCEx_PeriphCLKConfig+0xc4a>
- case RCC_LPTIM1CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPTIM1*/
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
- 800cd02: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cd06: 3328 adds r3, #40 @ 0x28
- 800cd08: 2102 movs r1, #2
- 800cd0a: 4618 mov r0, r3
- 800cd0c: f001 fe1a bl 800e944 <RCCEx_PLL3_Config>
- 800cd10: 4603 mov r3, r0
- 800cd12: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* LPTIM1 clock source configuration done later after clock selection check */
- break;
- 800cd16: e00a b.n 800cd2e <HAL_RCCEx_PeriphCLKConfig+0xc4a>
- /* HSI, HSE, or CSI oscillator is used as source of LPTIM1 clock */
- /* LPTIM1 clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800cd18: 2301 movs r3, #1
- 800cd1a: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800cd1e: e006 b.n 800cd2e <HAL_RCCEx_PeriphCLKConfig+0xc4a>
- break;
- 800cd20: bf00 nop
- 800cd22: e004 b.n 800cd2e <HAL_RCCEx_PeriphCLKConfig+0xc4a>
- break;
- 800cd24: bf00 nop
- 800cd26: e002 b.n 800cd2e <HAL_RCCEx_PeriphCLKConfig+0xc4a>
- break;
- 800cd28: bf00 nop
- 800cd2a: e000 b.n 800cd2e <HAL_RCCEx_PeriphCLKConfig+0xc4a>
- break;
- 800cd2c: bf00 nop
- }
- if (ret == HAL_OK)
- 800cd2e: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800cd32: 2b00 cmp r3, #0
- 800cd34: d10b bne.n 800cd4e <HAL_RCCEx_PeriphCLKConfig+0xc6a>
- {
- /* Set the source of LPTIM1 clock*/
- __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
- 800cd36: 4b39 ldr r3, [pc, #228] @ (800ce1c <HAL_RCCEx_PeriphCLKConfig+0xd38>)
- 800cd38: 6d5b ldr r3, [r3, #84] @ 0x54
- 800cd3a: f023 41e0 bic.w r1, r3, #1879048192 @ 0x70000000
- 800cd3e: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cd42: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 800cd46: 4a35 ldr r2, [pc, #212] @ (800ce1c <HAL_RCCEx_PeriphCLKConfig+0xd38>)
- 800cd48: 430b orrs r3, r1
- 800cd4a: 6553 str r3, [r2, #84] @ 0x54
- 800cd4c: e003 b.n 800cd56 <HAL_RCCEx_PeriphCLKConfig+0xc72>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800cd4e: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800cd52: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- /*---------------------------- LPTIM2 configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2)
- 800cd56: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cd5a: e9d3 2300 ldrd r2, r3, [r3]
- 800cd5e: f002 0340 and.w r3, r2, #64 @ 0x40
- 800cd62: f8c7 3098 str.w r3, [r7, #152] @ 0x98
- 800cd66: 2300 movs r3, #0
- 800cd68: f8c7 309c str.w r3, [r7, #156] @ 0x9c
- 800cd6c: e9d7 1226 ldrd r1, r2, [r7, #152] @ 0x98
- 800cd70: 460b mov r3, r1
- 800cd72: 4313 orrs r3, r2
- 800cd74: d058 beq.n 800ce28 <HAL_RCCEx_PeriphCLKConfig+0xd44>
- {
- switch (PeriphClkInit->Lptim2ClockSelection)
- 800cd76: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cd7a: f8d3 309c ldr.w r3, [r3, #156] @ 0x9c
- 800cd7e: f5b3 5fa0 cmp.w r3, #5120 @ 0x1400
- 800cd82: d033 beq.n 800cdec <HAL_RCCEx_PeriphCLKConfig+0xd08>
- 800cd84: f5b3 5fa0 cmp.w r3, #5120 @ 0x1400
- 800cd88: d82c bhi.n 800cde4 <HAL_RCCEx_PeriphCLKConfig+0xd00>
- 800cd8a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 800cd8e: d02f beq.n 800cdf0 <HAL_RCCEx_PeriphCLKConfig+0xd0c>
- 800cd90: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 800cd94: d826 bhi.n 800cde4 <HAL_RCCEx_PeriphCLKConfig+0xd00>
- 800cd96: f5b3 6f40 cmp.w r3, #3072 @ 0xc00
- 800cd9a: d02b beq.n 800cdf4 <HAL_RCCEx_PeriphCLKConfig+0xd10>
- 800cd9c: f5b3 6f40 cmp.w r3, #3072 @ 0xc00
- 800cda0: d820 bhi.n 800cde4 <HAL_RCCEx_PeriphCLKConfig+0xd00>
- 800cda2: f5b3 6f00 cmp.w r3, #2048 @ 0x800
- 800cda6: d012 beq.n 800cdce <HAL_RCCEx_PeriphCLKConfig+0xcea>
- 800cda8: f5b3 6f00 cmp.w r3, #2048 @ 0x800
- 800cdac: d81a bhi.n 800cde4 <HAL_RCCEx_PeriphCLKConfig+0xd00>
- 800cdae: 2b00 cmp r3, #0
- 800cdb0: d022 beq.n 800cdf8 <HAL_RCCEx_PeriphCLKConfig+0xd14>
- 800cdb2: f5b3 6f80 cmp.w r3, #1024 @ 0x400
- 800cdb6: d115 bne.n 800cde4 <HAL_RCCEx_PeriphCLKConfig+0xd00>
- /* LPTIM2 clock source configuration done later after clock selection check */
- break;
- case RCC_LPTIM2CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM2*/
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
- 800cdb8: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cdbc: 3308 adds r3, #8
- 800cdbe: 2100 movs r1, #0
- 800cdc0: 4618 mov r0, r3
- 800cdc2: f001 fd0d bl 800e7e0 <RCCEx_PLL2_Config>
- 800cdc6: 4603 mov r3, r0
- 800cdc8: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* LPTIM2 clock source configuration done later after clock selection check */
- break;
- 800cdcc: e015 b.n 800cdfa <HAL_RCCEx_PeriphCLKConfig+0xd16>
- case RCC_LPTIM2CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPTIM2*/
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
- 800cdce: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cdd2: 3328 adds r3, #40 @ 0x28
- 800cdd4: 2102 movs r1, #2
- 800cdd6: 4618 mov r0, r3
- 800cdd8: f001 fdb4 bl 800e944 <RCCEx_PLL3_Config>
- 800cddc: 4603 mov r3, r0
- 800cdde: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* LPTIM2 clock source configuration done later after clock selection check */
- break;
- 800cde2: e00a b.n 800cdfa <HAL_RCCEx_PeriphCLKConfig+0xd16>
- /* HSI, HSE, or CSI oscillator is used as source of LPTIM2 clock */
- /* LPTIM2 clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800cde4: 2301 movs r3, #1
- 800cde6: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800cdea: e006 b.n 800cdfa <HAL_RCCEx_PeriphCLKConfig+0xd16>
- break;
- 800cdec: bf00 nop
- 800cdee: e004 b.n 800cdfa <HAL_RCCEx_PeriphCLKConfig+0xd16>
- break;
- 800cdf0: bf00 nop
- 800cdf2: e002 b.n 800cdfa <HAL_RCCEx_PeriphCLKConfig+0xd16>
- break;
- 800cdf4: bf00 nop
- 800cdf6: e000 b.n 800cdfa <HAL_RCCEx_PeriphCLKConfig+0xd16>
- break;
- 800cdf8: bf00 nop
- }
- if (ret == HAL_OK)
- 800cdfa: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800cdfe: 2b00 cmp r3, #0
- 800ce00: d10e bne.n 800ce20 <HAL_RCCEx_PeriphCLKConfig+0xd3c>
- {
- /* Set the source of LPTIM2 clock*/
- __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection);
- 800ce02: 4b06 ldr r3, [pc, #24] @ (800ce1c <HAL_RCCEx_PeriphCLKConfig+0xd38>)
- 800ce04: 6d9b ldr r3, [r3, #88] @ 0x58
- 800ce06: f423 51e0 bic.w r1, r3, #7168 @ 0x1c00
- 800ce0a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800ce0e: f8d3 309c ldr.w r3, [r3, #156] @ 0x9c
- 800ce12: 4a02 ldr r2, [pc, #8] @ (800ce1c <HAL_RCCEx_PeriphCLKConfig+0xd38>)
- 800ce14: 430b orrs r3, r1
- 800ce16: 6593 str r3, [r2, #88] @ 0x58
- 800ce18: e006 b.n 800ce28 <HAL_RCCEx_PeriphCLKConfig+0xd44>
- 800ce1a: bf00 nop
- 800ce1c: 58024400 .word 0x58024400
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800ce20: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800ce24: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- /*---------------------------- LPTIM345 configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM345) == RCC_PERIPHCLK_LPTIM345)
- 800ce28: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800ce2c: e9d3 2300 ldrd r2, r3, [r3]
- 800ce30: f002 0380 and.w r3, r2, #128 @ 0x80
- 800ce34: f8c7 3090 str.w r3, [r7, #144] @ 0x90
- 800ce38: 2300 movs r3, #0
- 800ce3a: f8c7 3094 str.w r3, [r7, #148] @ 0x94
- 800ce3e: e9d7 1224 ldrd r1, r2, [r7, #144] @ 0x90
- 800ce42: 460b mov r3, r1
- 800ce44: 4313 orrs r3, r2
- 800ce46: d055 beq.n 800cef4 <HAL_RCCEx_PeriphCLKConfig+0xe10>
- {
- switch (PeriphClkInit->Lptim345ClockSelection)
- 800ce48: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800ce4c: f8d3 30a0 ldr.w r3, [r3, #160] @ 0xa0
- 800ce50: f5b3 4f20 cmp.w r3, #40960 @ 0xa000
- 800ce54: d033 beq.n 800cebe <HAL_RCCEx_PeriphCLKConfig+0xdda>
- 800ce56: f5b3 4f20 cmp.w r3, #40960 @ 0xa000
- 800ce5a: d82c bhi.n 800ceb6 <HAL_RCCEx_PeriphCLKConfig+0xdd2>
- 800ce5c: f5b3 4f00 cmp.w r3, #32768 @ 0x8000
- 800ce60: d02f beq.n 800cec2 <HAL_RCCEx_PeriphCLKConfig+0xdde>
- 800ce62: f5b3 4f00 cmp.w r3, #32768 @ 0x8000
- 800ce66: d826 bhi.n 800ceb6 <HAL_RCCEx_PeriphCLKConfig+0xdd2>
- 800ce68: f5b3 4fc0 cmp.w r3, #24576 @ 0x6000
- 800ce6c: d02b beq.n 800cec6 <HAL_RCCEx_PeriphCLKConfig+0xde2>
- 800ce6e: f5b3 4fc0 cmp.w r3, #24576 @ 0x6000
- 800ce72: d820 bhi.n 800ceb6 <HAL_RCCEx_PeriphCLKConfig+0xdd2>
- 800ce74: f5b3 4f80 cmp.w r3, #16384 @ 0x4000
- 800ce78: d012 beq.n 800cea0 <HAL_RCCEx_PeriphCLKConfig+0xdbc>
- 800ce7a: f5b3 4f80 cmp.w r3, #16384 @ 0x4000
- 800ce7e: d81a bhi.n 800ceb6 <HAL_RCCEx_PeriphCLKConfig+0xdd2>
- 800ce80: 2b00 cmp r3, #0
- 800ce82: d022 beq.n 800ceca <HAL_RCCEx_PeriphCLKConfig+0xde6>
- 800ce84: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
- 800ce88: d115 bne.n 800ceb6 <HAL_RCCEx_PeriphCLKConfig+0xdd2>
- case RCC_LPTIM345CLKSOURCE_PCLK4: /* SRD/D3 PCLK1 (PCLK4) as clock source for LPTIM3/4/5 */
- /* LPTIM3/4/5 clock source configuration done later after clock selection check */
- break;
- case RCC_LPTIM345CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM3/4/5 */
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
- 800ce8a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800ce8e: 3308 adds r3, #8
- 800ce90: 2100 movs r1, #0
- 800ce92: 4618 mov r0, r3
- 800ce94: f001 fca4 bl 800e7e0 <RCCEx_PLL2_Config>
- 800ce98: 4603 mov r3, r0
- 800ce9a: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* LPTIM3/4/5 clock source configuration done later after clock selection check */
- break;
- 800ce9e: e015 b.n 800cecc <HAL_RCCEx_PeriphCLKConfig+0xde8>
- case RCC_LPTIM345CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPTIM3/4/5 */
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
- 800cea0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cea4: 3328 adds r3, #40 @ 0x28
- 800cea6: 2102 movs r1, #2
- 800cea8: 4618 mov r0, r3
- 800ceaa: f001 fd4b bl 800e944 <RCCEx_PLL3_Config>
- 800ceae: 4603 mov r3, r0
- 800ceb0: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* LPTIM3/4/5 clock source configuration done later after clock selection check */
- break;
- 800ceb4: e00a b.n 800cecc <HAL_RCCEx_PeriphCLKConfig+0xde8>
- /* HSI, HSE, or CSI oscillator is used as source of LPTIM3/4/5 clock */
- /* LPTIM3/4/5 clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800ceb6: 2301 movs r3, #1
- 800ceb8: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800cebc: e006 b.n 800cecc <HAL_RCCEx_PeriphCLKConfig+0xde8>
- break;
- 800cebe: bf00 nop
- 800cec0: e004 b.n 800cecc <HAL_RCCEx_PeriphCLKConfig+0xde8>
- break;
- 800cec2: bf00 nop
- 800cec4: e002 b.n 800cecc <HAL_RCCEx_PeriphCLKConfig+0xde8>
- break;
- 800cec6: bf00 nop
- 800cec8: e000 b.n 800cecc <HAL_RCCEx_PeriphCLKConfig+0xde8>
- break;
- 800ceca: bf00 nop
- }
- if (ret == HAL_OK)
- 800cecc: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800ced0: 2b00 cmp r3, #0
- 800ced2: d10b bne.n 800ceec <HAL_RCCEx_PeriphCLKConfig+0xe08>
- {
- /* Set the source of LPTIM3/4/5 clock */
- __HAL_RCC_LPTIM345_CONFIG(PeriphClkInit->Lptim345ClockSelection);
- 800ced4: 4bbb ldr r3, [pc, #748] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800ced6: 6d9b ldr r3, [r3, #88] @ 0x58
- 800ced8: f423 4160 bic.w r1, r3, #57344 @ 0xe000
- 800cedc: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cee0: f8d3 30a0 ldr.w r3, [r3, #160] @ 0xa0
- 800cee4: 4ab7 ldr r2, [pc, #732] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800cee6: 430b orrs r3, r1
- 800cee8: 6593 str r3, [r2, #88] @ 0x58
- 800ceea: e003 b.n 800cef4 <HAL_RCCEx_PeriphCLKConfig+0xe10>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800ceec: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800cef0: f887 311e strb.w r3, [r7, #286] @ 0x11e
- __HAL_RCC_I2C1235_CONFIG(PeriphClkInit->I2c1235ClockSelection);
- }
- #else
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C123) == RCC_PERIPHCLK_I2C123)
- 800cef4: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cef8: e9d3 2300 ldrd r2, r3, [r3]
- 800cefc: f002 0308 and.w r3, r2, #8
- 800cf00: f8c7 3088 str.w r3, [r7, #136] @ 0x88
- 800cf04: 2300 movs r3, #0
- 800cf06: f8c7 308c str.w r3, [r7, #140] @ 0x8c
- 800cf0a: e9d7 1222 ldrd r1, r2, [r7, #136] @ 0x88
- 800cf0e: 460b mov r3, r1
- 800cf10: 4313 orrs r3, r2
- 800cf12: d01e beq.n 800cf52 <HAL_RCCEx_PeriphCLKConfig+0xe6e>
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2C123CLKSOURCE(PeriphClkInit->I2c123ClockSelection));
- if ((PeriphClkInit->I2c123ClockSelection) == RCC_I2C123CLKSOURCE_PLL3)
- 800cf14: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cf18: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
- 800cf1c: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 800cf20: d10c bne.n 800cf3c <HAL_RCCEx_PeriphCLKConfig+0xe58>
- {
- if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK)
- 800cf22: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cf26: 3328 adds r3, #40 @ 0x28
- 800cf28: 2102 movs r1, #2
- 800cf2a: 4618 mov r0, r3
- 800cf2c: f001 fd0a bl 800e944 <RCCEx_PLL3_Config>
- 800cf30: 4603 mov r3, r0
- 800cf32: 2b00 cmp r3, #0
- 800cf34: d002 beq.n 800cf3c <HAL_RCCEx_PeriphCLKConfig+0xe58>
- {
- status = HAL_ERROR;
- 800cf36: 2301 movs r3, #1
- 800cf38: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- __HAL_RCC_I2C123_CONFIG(PeriphClkInit->I2c123ClockSelection);
- 800cf3c: 4ba1 ldr r3, [pc, #644] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800cf3e: 6d5b ldr r3, [r3, #84] @ 0x54
- 800cf40: f423 5140 bic.w r1, r3, #12288 @ 0x3000
- 800cf44: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cf48: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
- 800cf4c: 4a9d ldr r2, [pc, #628] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800cf4e: 430b orrs r3, r1
- 800cf50: 6553 str r3, [r2, #84] @ 0x54
- }
- #endif /* I2C5 */
- /*------------------------------ I2C4 Configuration ------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
- 800cf52: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cf56: e9d3 2300 ldrd r2, r3, [r3]
- 800cf5a: f002 0310 and.w r3, r2, #16
- 800cf5e: f8c7 3080 str.w r3, [r7, #128] @ 0x80
- 800cf62: 2300 movs r3, #0
- 800cf64: f8c7 3084 str.w r3, [r7, #132] @ 0x84
- 800cf68: e9d7 1220 ldrd r1, r2, [r7, #128] @ 0x80
- 800cf6c: 460b mov r3, r1
- 800cf6e: 4313 orrs r3, r2
- 800cf70: d01e beq.n 800cfb0 <HAL_RCCEx_PeriphCLKConfig+0xecc>
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));
- if ((PeriphClkInit->I2c4ClockSelection) == RCC_I2C4CLKSOURCE_PLL3)
- 800cf72: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cf76: f8d3 3098 ldr.w r3, [r3, #152] @ 0x98
- 800cf7a: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800cf7e: d10c bne.n 800cf9a <HAL_RCCEx_PeriphCLKConfig+0xeb6>
- {
- if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK)
- 800cf80: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cf84: 3328 adds r3, #40 @ 0x28
- 800cf86: 2102 movs r1, #2
- 800cf88: 4618 mov r0, r3
- 800cf8a: f001 fcdb bl 800e944 <RCCEx_PLL3_Config>
- 800cf8e: 4603 mov r3, r0
- 800cf90: 2b00 cmp r3, #0
- 800cf92: d002 beq.n 800cf9a <HAL_RCCEx_PeriphCLKConfig+0xeb6>
- {
- status = HAL_ERROR;
- 800cf94: 2301 movs r3, #1
- 800cf96: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
- 800cf9a: 4b8a ldr r3, [pc, #552] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800cf9c: 6d9b ldr r3, [r3, #88] @ 0x58
- 800cf9e: f423 7140 bic.w r1, r3, #768 @ 0x300
- 800cfa2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cfa6: f8d3 3098 ldr.w r3, [r3, #152] @ 0x98
- 800cfaa: 4a86 ldr r2, [pc, #536] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800cfac: 430b orrs r3, r1
- 800cfae: 6593 str r3, [r2, #88] @ 0x58
- }
- /*---------------------------- ADC configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
- 800cfb0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cfb4: e9d3 2300 ldrd r2, r3, [r3]
- 800cfb8: f402 2300 and.w r3, r2, #524288 @ 0x80000
- 800cfbc: 67bb str r3, [r7, #120] @ 0x78
- 800cfbe: 2300 movs r3, #0
- 800cfc0: 67fb str r3, [r7, #124] @ 0x7c
- 800cfc2: e9d7 121e ldrd r1, r2, [r7, #120] @ 0x78
- 800cfc6: 460b mov r3, r1
- 800cfc8: 4313 orrs r3, r2
- 800cfca: d03e beq.n 800d04a <HAL_RCCEx_PeriphCLKConfig+0xf66>
- {
- switch (PeriphClkInit->AdcClockSelection)
- 800cfcc: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cfd0: f8d3 30a4 ldr.w r3, [r3, #164] @ 0xa4
- 800cfd4: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800cfd8: d022 beq.n 800d020 <HAL_RCCEx_PeriphCLKConfig+0xf3c>
- 800cfda: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800cfde: d81b bhi.n 800d018 <HAL_RCCEx_PeriphCLKConfig+0xf34>
- 800cfe0: 2b00 cmp r3, #0
- 800cfe2: d003 beq.n 800cfec <HAL_RCCEx_PeriphCLKConfig+0xf08>
- 800cfe4: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
- 800cfe8: d00b beq.n 800d002 <HAL_RCCEx_PeriphCLKConfig+0xf1e>
- 800cfea: e015 b.n 800d018 <HAL_RCCEx_PeriphCLKConfig+0xf34>
- {
- case RCC_ADCCLKSOURCE_PLL2: /* PLL2 is used as clock source for ADC*/
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
- 800cfec: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800cff0: 3308 adds r3, #8
- 800cff2: 2100 movs r1, #0
- 800cff4: 4618 mov r0, r3
- 800cff6: f001 fbf3 bl 800e7e0 <RCCEx_PLL2_Config>
- 800cffa: 4603 mov r3, r0
- 800cffc: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* ADC clock source configuration done later after clock selection check */
- break;
- 800d000: e00f b.n 800d022 <HAL_RCCEx_PeriphCLKConfig+0xf3e>
- case RCC_ADCCLKSOURCE_PLL3: /* PLL3 is used as clock source for ADC*/
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
- 800d002: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d006: 3328 adds r3, #40 @ 0x28
- 800d008: 2102 movs r1, #2
- 800d00a: 4618 mov r0, r3
- 800d00c: f001 fc9a bl 800e944 <RCCEx_PLL3_Config>
- 800d010: 4603 mov r3, r0
- 800d012: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* ADC clock source configuration done later after clock selection check */
- break;
- 800d016: e004 b.n 800d022 <HAL_RCCEx_PeriphCLKConfig+0xf3e>
- /* HSI, HSE, or CSI oscillator is used as source of ADC clock */
- /* ADC clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800d018: 2301 movs r3, #1
- 800d01a: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800d01e: e000 b.n 800d022 <HAL_RCCEx_PeriphCLKConfig+0xf3e>
- break;
- 800d020: bf00 nop
- }
- if (ret == HAL_OK)
- 800d022: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d026: 2b00 cmp r3, #0
- 800d028: d10b bne.n 800d042 <HAL_RCCEx_PeriphCLKConfig+0xf5e>
- {
- /* Set the source of ADC clock*/
- __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
- 800d02a: 4b66 ldr r3, [pc, #408] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800d02c: 6d9b ldr r3, [r3, #88] @ 0x58
- 800d02e: f423 3140 bic.w r1, r3, #196608 @ 0x30000
- 800d032: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d036: f8d3 30a4 ldr.w r3, [r3, #164] @ 0xa4
- 800d03a: 4a62 ldr r2, [pc, #392] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800d03c: 430b orrs r3, r1
- 800d03e: 6593 str r3, [r2, #88] @ 0x58
- 800d040: e003 b.n 800d04a <HAL_RCCEx_PeriphCLKConfig+0xf66>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800d042: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d046: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- /*------------------------------ USB Configuration -------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
- 800d04a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d04e: e9d3 2300 ldrd r2, r3, [r3]
- 800d052: f402 2380 and.w r3, r2, #262144 @ 0x40000
- 800d056: 673b str r3, [r7, #112] @ 0x70
- 800d058: 2300 movs r3, #0
- 800d05a: 677b str r3, [r7, #116] @ 0x74
- 800d05c: e9d7 121c ldrd r1, r2, [r7, #112] @ 0x70
- 800d060: 460b mov r3, r1
- 800d062: 4313 orrs r3, r2
- 800d064: d03b beq.n 800d0de <HAL_RCCEx_PeriphCLKConfig+0xffa>
- {
- switch (PeriphClkInit->UsbClockSelection)
- 800d066: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d06a: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
- 800d06e: f5b3 1f40 cmp.w r3, #3145728 @ 0x300000
- 800d072: d01f beq.n 800d0b4 <HAL_RCCEx_PeriphCLKConfig+0xfd0>
- 800d074: f5b3 1f40 cmp.w r3, #3145728 @ 0x300000
- 800d078: d818 bhi.n 800d0ac <HAL_RCCEx_PeriphCLKConfig+0xfc8>
- 800d07a: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
- 800d07e: d003 beq.n 800d088 <HAL_RCCEx_PeriphCLKConfig+0xfa4>
- 800d080: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
- 800d084: d007 beq.n 800d096 <HAL_RCCEx_PeriphCLKConfig+0xfb2>
- 800d086: e011 b.n 800d0ac <HAL_RCCEx_PeriphCLKConfig+0xfc8>
- {
- case RCC_USBCLKSOURCE_PLL: /* PLL is used as clock source for USB*/
- /* Enable USB Clock output generated form System USB . */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
- 800d088: 4b4e ldr r3, [pc, #312] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800d08a: 6adb ldr r3, [r3, #44] @ 0x2c
- 800d08c: 4a4d ldr r2, [pc, #308] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800d08e: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800d092: 62d3 str r3, [r2, #44] @ 0x2c
- /* USB clock source configuration done later after clock selection check */
- break;
- 800d094: e00f b.n 800d0b6 <HAL_RCCEx_PeriphCLKConfig+0xfd2>
- case RCC_USBCLKSOURCE_PLL3: /* PLL3 is used as clock source for USB*/
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
- 800d096: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d09a: 3328 adds r3, #40 @ 0x28
- 800d09c: 2101 movs r1, #1
- 800d09e: 4618 mov r0, r3
- 800d0a0: f001 fc50 bl 800e944 <RCCEx_PLL3_Config>
- 800d0a4: 4603 mov r3, r0
- 800d0a6: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* USB clock source configuration done later after clock selection check */
- break;
- 800d0aa: e004 b.n 800d0b6 <HAL_RCCEx_PeriphCLKConfig+0xfd2>
- /* HSI48 oscillator is used as source of USB clock */
- /* USB clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800d0ac: 2301 movs r3, #1
- 800d0ae: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800d0b2: e000 b.n 800d0b6 <HAL_RCCEx_PeriphCLKConfig+0xfd2>
- break;
- 800d0b4: bf00 nop
- }
- if (ret == HAL_OK)
- 800d0b6: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d0ba: 2b00 cmp r3, #0
- 800d0bc: d10b bne.n 800d0d6 <HAL_RCCEx_PeriphCLKConfig+0xff2>
- {
- /* Set the source of USB clock*/
- __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
- 800d0be: 4b41 ldr r3, [pc, #260] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800d0c0: 6d5b ldr r3, [r3, #84] @ 0x54
- 800d0c2: f423 1140 bic.w r1, r3, #3145728 @ 0x300000
- 800d0c6: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d0ca: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
- 800d0ce: 4a3d ldr r2, [pc, #244] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800d0d0: 430b orrs r3, r1
- 800d0d2: 6553 str r3, [r2, #84] @ 0x54
- 800d0d4: e003 b.n 800d0de <HAL_RCCEx_PeriphCLKConfig+0xffa>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800d0d6: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d0da: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- /*------------------------------------- SDMMC Configuration ------------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC) == RCC_PERIPHCLK_SDMMC)
- 800d0de: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d0e2: e9d3 2300 ldrd r2, r3, [r3]
- 800d0e6: f402 3380 and.w r3, r2, #65536 @ 0x10000
- 800d0ea: 66bb str r3, [r7, #104] @ 0x68
- 800d0ec: 2300 movs r3, #0
- 800d0ee: 66fb str r3, [r7, #108] @ 0x6c
- 800d0f0: e9d7 121a ldrd r1, r2, [r7, #104] @ 0x68
- 800d0f4: 460b mov r3, r1
- 800d0f6: 4313 orrs r3, r2
- 800d0f8: d031 beq.n 800d15e <HAL_RCCEx_PeriphCLKConfig+0x107a>
- {
- /* Check the parameters */
- assert_param(IS_RCC_SDMMC(PeriphClkInit->SdmmcClockSelection));
- switch (PeriphClkInit->SdmmcClockSelection)
- 800d0fa: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d0fe: 6d1b ldr r3, [r3, #80] @ 0x50
- 800d100: 2b00 cmp r3, #0
- 800d102: d003 beq.n 800d10c <HAL_RCCEx_PeriphCLKConfig+0x1028>
- 800d104: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
- 800d108: d007 beq.n 800d11a <HAL_RCCEx_PeriphCLKConfig+0x1036>
- 800d10a: e011 b.n 800d130 <HAL_RCCEx_PeriphCLKConfig+0x104c>
- {
- case RCC_SDMMCCLKSOURCE_PLL: /* PLL is used as clock source for SDMMC*/
- /* Enable SDMMC Clock output generated form System PLL . */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
- 800d10c: 4b2d ldr r3, [pc, #180] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800d10e: 6adb ldr r3, [r3, #44] @ 0x2c
- 800d110: 4a2c ldr r2, [pc, #176] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800d112: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800d116: 62d3 str r3, [r2, #44] @ 0x2c
- /* SDMMC clock source configuration done later after clock selection check */
- break;
- 800d118: e00e b.n 800d138 <HAL_RCCEx_PeriphCLKConfig+0x1054>
- case RCC_SDMMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for SDMMC*/
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
- 800d11a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d11e: 3308 adds r3, #8
- 800d120: 2102 movs r1, #2
- 800d122: 4618 mov r0, r3
- 800d124: f001 fb5c bl 800e7e0 <RCCEx_PLL2_Config>
- 800d128: 4603 mov r3, r0
- 800d12a: f887 311f strb.w r3, [r7, #287] @ 0x11f
- /* SDMMC clock source configuration done later after clock selection check */
- break;
- 800d12e: e003 b.n 800d138 <HAL_RCCEx_PeriphCLKConfig+0x1054>
- default:
- ret = HAL_ERROR;
- 800d130: 2301 movs r3, #1
- 800d132: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800d136: bf00 nop
- }
- if (ret == HAL_OK)
- 800d138: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d13c: 2b00 cmp r3, #0
- 800d13e: d10a bne.n 800d156 <HAL_RCCEx_PeriphCLKConfig+0x1072>
- {
- /* Set the source of SDMMC clock*/
- __HAL_RCC_SDMMC_CONFIG(PeriphClkInit->SdmmcClockSelection);
- 800d140: 4b20 ldr r3, [pc, #128] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800d142: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800d144: f423 3180 bic.w r1, r3, #65536 @ 0x10000
- 800d148: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d14c: 6d1b ldr r3, [r3, #80] @ 0x50
- 800d14e: 4a1d ldr r2, [pc, #116] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800d150: 430b orrs r3, r1
- 800d152: 64d3 str r3, [r2, #76] @ 0x4c
- 800d154: e003 b.n 800d15e <HAL_RCCEx_PeriphCLKConfig+0x107a>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800d156: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d15a: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- #endif /* LTDC */
- /*------------------------------ RNG Configuration -------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG)
- 800d15e: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d162: e9d3 2300 ldrd r2, r3, [r3]
- 800d166: f402 3300 and.w r3, r2, #131072 @ 0x20000
- 800d16a: 663b str r3, [r7, #96] @ 0x60
- 800d16c: 2300 movs r3, #0
- 800d16e: 667b str r3, [r7, #100] @ 0x64
- 800d170: e9d7 1218 ldrd r1, r2, [r7, #96] @ 0x60
- 800d174: 460b mov r3, r1
- 800d176: 4313 orrs r3, r2
- 800d178: d03b beq.n 800d1f2 <HAL_RCCEx_PeriphCLKConfig+0x110e>
- {
- switch (PeriphClkInit->RngClockSelection)
- 800d17a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d17e: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 800d182: f5b3 7f40 cmp.w r3, #768 @ 0x300
- 800d186: d018 beq.n 800d1ba <HAL_RCCEx_PeriphCLKConfig+0x10d6>
- 800d188: f5b3 7f40 cmp.w r3, #768 @ 0x300
- 800d18c: d811 bhi.n 800d1b2 <HAL_RCCEx_PeriphCLKConfig+0x10ce>
- 800d18e: f5b3 7f00 cmp.w r3, #512 @ 0x200
- 800d192: d014 beq.n 800d1be <HAL_RCCEx_PeriphCLKConfig+0x10da>
- 800d194: f5b3 7f00 cmp.w r3, #512 @ 0x200
- 800d198: d80b bhi.n 800d1b2 <HAL_RCCEx_PeriphCLKConfig+0x10ce>
- 800d19a: 2b00 cmp r3, #0
- 800d19c: d014 beq.n 800d1c8 <HAL_RCCEx_PeriphCLKConfig+0x10e4>
- 800d19e: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800d1a2: d106 bne.n 800d1b2 <HAL_RCCEx_PeriphCLKConfig+0x10ce>
- {
- case RCC_RNGCLKSOURCE_PLL: /* PLL is used as clock source for RNG*/
- /* Enable RNG Clock output generated form System RNG . */
- __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
- 800d1a4: 4b07 ldr r3, [pc, #28] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800d1a6: 6adb ldr r3, [r3, #44] @ 0x2c
- 800d1a8: 4a06 ldr r2, [pc, #24] @ (800d1c4 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
- 800d1aa: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 800d1ae: 62d3 str r3, [r2, #44] @ 0x2c
- /* RNG clock source configuration done later after clock selection check */
- break;
- 800d1b0: e00b b.n 800d1ca <HAL_RCCEx_PeriphCLKConfig+0x10e6>
- /* HSI48 oscillator is used as source of RNG clock */
- /* RNG clock source configuration done later after clock selection check */
- break;
- default:
- ret = HAL_ERROR;
- 800d1b2: 2301 movs r3, #1
- 800d1b4: f887 311f strb.w r3, [r7, #287] @ 0x11f
- break;
- 800d1b8: e007 b.n 800d1ca <HAL_RCCEx_PeriphCLKConfig+0x10e6>
- break;
- 800d1ba: bf00 nop
- 800d1bc: e005 b.n 800d1ca <HAL_RCCEx_PeriphCLKConfig+0x10e6>
- break;
- 800d1be: bf00 nop
- 800d1c0: e003 b.n 800d1ca <HAL_RCCEx_PeriphCLKConfig+0x10e6>
- 800d1c2: bf00 nop
- 800d1c4: 58024400 .word 0x58024400
- break;
- 800d1c8: bf00 nop
- }
- if (ret == HAL_OK)
- 800d1ca: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d1ce: 2b00 cmp r3, #0
- 800d1d0: d10b bne.n 800d1ea <HAL_RCCEx_PeriphCLKConfig+0x1106>
- {
- /* Set the source of RNG clock*/
- __HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection);
- 800d1d2: 4bba ldr r3, [pc, #744] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d1d4: 6d5b ldr r3, [r3, #84] @ 0x54
- 800d1d6: f423 7140 bic.w r1, r3, #768 @ 0x300
- 800d1da: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d1de: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 800d1e2: 4ab6 ldr r2, [pc, #728] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d1e4: 430b orrs r3, r1
- 800d1e6: 6553 str r3, [r2, #84] @ 0x54
- 800d1e8: e003 b.n 800d1f2 <HAL_RCCEx_PeriphCLKConfig+0x110e>
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800d1ea: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d1ee: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- /*------------------------------ SWPMI1 Configuration ------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1)
- 800d1f2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d1f6: e9d3 2300 ldrd r2, r3, [r3]
- 800d1fa: f402 1380 and.w r3, r2, #1048576 @ 0x100000
- 800d1fe: 65bb str r3, [r7, #88] @ 0x58
- 800d200: 2300 movs r3, #0
- 800d202: 65fb str r3, [r7, #92] @ 0x5c
- 800d204: e9d7 1216 ldrd r1, r2, [r7, #88] @ 0x58
- 800d208: 460b mov r3, r1
- 800d20a: 4313 orrs r3, r2
- 800d20c: d009 beq.n 800d222 <HAL_RCCEx_PeriphCLKConfig+0x113e>
- {
- /* Check the parameters */
- assert_param(IS_RCC_SWPMI1CLKSOURCE(PeriphClkInit->Swpmi1ClockSelection));
- /* Configure the SWPMI1 interface clock source */
- __HAL_RCC_SWPMI1_CONFIG(PeriphClkInit->Swpmi1ClockSelection);
- 800d20e: 4bab ldr r3, [pc, #684] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d210: 6d1b ldr r3, [r3, #80] @ 0x50
- 800d212: f023 4100 bic.w r1, r3, #2147483648 @ 0x80000000
- 800d216: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d21a: 6f5b ldr r3, [r3, #116] @ 0x74
- 800d21c: 4aa7 ldr r2, [pc, #668] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d21e: 430b orrs r3, r1
- 800d220: 6513 str r3, [r2, #80] @ 0x50
- }
- #if defined(HRTIM1)
- /*------------------------------ HRTIM1 clock Configuration ----------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_HRTIM1) == RCC_PERIPHCLK_HRTIM1)
- 800d222: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d226: e9d3 2300 ldrd r2, r3, [r3]
- 800d22a: f002 5380 and.w r3, r2, #268435456 @ 0x10000000
- 800d22e: 653b str r3, [r7, #80] @ 0x50
- 800d230: 2300 movs r3, #0
- 800d232: 657b str r3, [r7, #84] @ 0x54
- 800d234: e9d7 1214 ldrd r1, r2, [r7, #80] @ 0x50
- 800d238: 460b mov r3, r1
- 800d23a: 4313 orrs r3, r2
- 800d23c: d00a beq.n 800d254 <HAL_RCCEx_PeriphCLKConfig+0x1170>
- {
- /* Check the parameters */
- assert_param(IS_RCC_HRTIM1CLKSOURCE(PeriphClkInit->Hrtim1ClockSelection));
- /* Configure the HRTIM1 clock source */
- __HAL_RCC_HRTIM1_CONFIG(PeriphClkInit->Hrtim1ClockSelection);
- 800d23e: 4b9f ldr r3, [pc, #636] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d240: 691b ldr r3, [r3, #16]
- 800d242: f423 4180 bic.w r1, r3, #16384 @ 0x4000
- 800d246: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d24a: f8d3 30b8 ldr.w r3, [r3, #184] @ 0xb8
- 800d24e: 4a9b ldr r2, [pc, #620] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d250: 430b orrs r3, r1
- 800d252: 6113 str r3, [r2, #16]
- }
- #endif /*HRTIM1*/
- /*------------------------------ DFSDM1 Configuration ------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1)
- 800d254: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d258: e9d3 2300 ldrd r2, r3, [r3]
- 800d25c: f402 1300 and.w r3, r2, #2097152 @ 0x200000
- 800d260: 64bb str r3, [r7, #72] @ 0x48
- 800d262: 2300 movs r3, #0
- 800d264: 64fb str r3, [r7, #76] @ 0x4c
- 800d266: e9d7 1212 ldrd r1, r2, [r7, #72] @ 0x48
- 800d26a: 460b mov r3, r1
- 800d26c: 4313 orrs r3, r2
- 800d26e: d009 beq.n 800d284 <HAL_RCCEx_PeriphCLKConfig+0x11a0>
- {
- /* Check the parameters */
- assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection));
- /* Configure the DFSDM1 interface clock source */
- __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection);
- 800d270: 4b92 ldr r3, [pc, #584] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d272: 6d1b ldr r3, [r3, #80] @ 0x50
- 800d274: f023 7180 bic.w r1, r3, #16777216 @ 0x1000000
- 800d278: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d27c: 6edb ldr r3, [r3, #108] @ 0x6c
- 800d27e: 4a8f ldr r2, [pc, #572] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d280: 430b orrs r3, r1
- 800d282: 6513 str r3, [r2, #80] @ 0x50
- __HAL_RCC_DFSDM2_CONFIG(PeriphClkInit->Dfsdm2ClockSelection);
- }
- #endif /* DFSDM2 */
- /*------------------------------------ TIM configuration --------------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == RCC_PERIPHCLK_TIM)
- 800d284: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d288: e9d3 2300 ldrd r2, r3, [r3]
- 800d28c: f002 4380 and.w r3, r2, #1073741824 @ 0x40000000
- 800d290: 643b str r3, [r7, #64] @ 0x40
- 800d292: 2300 movs r3, #0
- 800d294: 647b str r3, [r7, #68] @ 0x44
- 800d296: e9d7 1210 ldrd r1, r2, [r7, #64] @ 0x40
- 800d29a: 460b mov r3, r1
- 800d29c: 4313 orrs r3, r2
- 800d29e: d00e beq.n 800d2be <HAL_RCCEx_PeriphCLKConfig+0x11da>
- {
- /* Check the parameters */
- assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection));
- /* Configure Timer Prescaler */
- __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
- 800d2a0: 4b86 ldr r3, [pc, #536] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d2a2: 691b ldr r3, [r3, #16]
- 800d2a4: 4a85 ldr r2, [pc, #532] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d2a6: f423 4300 bic.w r3, r3, #32768 @ 0x8000
- 800d2aa: 6113 str r3, [r2, #16]
- 800d2ac: 4b83 ldr r3, [pc, #524] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d2ae: 6919 ldr r1, [r3, #16]
- 800d2b0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d2b4: f8d3 30bc ldr.w r3, [r3, #188] @ 0xbc
- 800d2b8: 4a80 ldr r2, [pc, #512] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d2ba: 430b orrs r3, r1
- 800d2bc: 6113 str r3, [r2, #16]
- }
- /*------------------------------------ CKPER configuration --------------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CKPER) == RCC_PERIPHCLK_CKPER)
- 800d2be: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d2c2: e9d3 2300 ldrd r2, r3, [r3]
- 800d2c6: f002 4300 and.w r3, r2, #2147483648 @ 0x80000000
- 800d2ca: 63bb str r3, [r7, #56] @ 0x38
- 800d2cc: 2300 movs r3, #0
- 800d2ce: 63fb str r3, [r7, #60] @ 0x3c
- 800d2d0: e9d7 120e ldrd r1, r2, [r7, #56] @ 0x38
- 800d2d4: 460b mov r3, r1
- 800d2d6: 4313 orrs r3, r2
- 800d2d8: d009 beq.n 800d2ee <HAL_RCCEx_PeriphCLKConfig+0x120a>
- {
- /* Check the parameters */
- assert_param(IS_RCC_CLKPSOURCE(PeriphClkInit->CkperClockSelection));
- /* Configure the CKPER clock source */
- __HAL_RCC_CLKP_CONFIG(PeriphClkInit->CkperClockSelection);
- 800d2da: 4b78 ldr r3, [pc, #480] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d2dc: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800d2de: f023 5140 bic.w r1, r3, #805306368 @ 0x30000000
- 800d2e2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d2e6: 6d5b ldr r3, [r3, #84] @ 0x54
- 800d2e8: 4a74 ldr r2, [pc, #464] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d2ea: 430b orrs r3, r1
- 800d2ec: 64d3 str r3, [r2, #76] @ 0x4c
- }
- /*------------------------------ CEC Configuration ------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
- 800d2ee: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d2f2: e9d3 2300 ldrd r2, r3, [r3]
- 800d2f6: f402 0300 and.w r3, r2, #8388608 @ 0x800000
- 800d2fa: 633b str r3, [r7, #48] @ 0x30
- 800d2fc: 2300 movs r3, #0
- 800d2fe: 637b str r3, [r7, #52] @ 0x34
- 800d300: e9d7 120c ldrd r1, r2, [r7, #48] @ 0x30
- 800d304: 460b mov r3, r1
- 800d306: 4313 orrs r3, r2
- 800d308: d00a beq.n 800d320 <HAL_RCCEx_PeriphCLKConfig+0x123c>
- {
- /* Check the parameters */
- assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
- /* Configure the CEC interface clock source */
- __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
- 800d30a: 4b6c ldr r3, [pc, #432] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d30c: 6d5b ldr r3, [r3, #84] @ 0x54
- 800d30e: f423 0140 bic.w r1, r3, #12582912 @ 0xc00000
- 800d312: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d316: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
- 800d31a: 4a68 ldr r2, [pc, #416] @ (800d4bc <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
- 800d31c: 430b orrs r3, r1
- 800d31e: 6553 str r3, [r2, #84] @ 0x54
- }
- /*---------------------------- PLL2 configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVP) == RCC_PERIPHCLK_PLL2_DIVP)
- 800d320: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d324: e9d3 2300 ldrd r2, r3, [r3]
- 800d328: 2100 movs r1, #0
- 800d32a: 62b9 str r1, [r7, #40] @ 0x28
- 800d32c: f003 0301 and.w r3, r3, #1
- 800d330: 62fb str r3, [r7, #44] @ 0x2c
- 800d332: e9d7 120a ldrd r1, r2, [r7, #40] @ 0x28
- 800d336: 460b mov r3, r1
- 800d338: 4313 orrs r3, r2
- 800d33a: d011 beq.n 800d360 <HAL_RCCEx_PeriphCLKConfig+0x127c>
- {
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
- 800d33c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d340: 3308 adds r3, #8
- 800d342: 2100 movs r1, #0
- 800d344: 4618 mov r0, r3
- 800d346: f001 fa4b bl 800e7e0 <RCCEx_PLL2_Config>
- 800d34a: 4603 mov r3, r0
- 800d34c: f887 311f strb.w r3, [r7, #287] @ 0x11f
-
- if (ret == HAL_OK)
- 800d350: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d354: 2b00 cmp r3, #0
- 800d356: d003 beq.n 800d360 <HAL_RCCEx_PeriphCLKConfig+0x127c>
- /*Nothing to do*/
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800d358: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d35c: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
-
-
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVQ) == RCC_PERIPHCLK_PLL2_DIVQ)
- 800d360: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d364: e9d3 2300 ldrd r2, r3, [r3]
- 800d368: 2100 movs r1, #0
- 800d36a: 6239 str r1, [r7, #32]
- 800d36c: f003 0302 and.w r3, r3, #2
- 800d370: 627b str r3, [r7, #36] @ 0x24
- 800d372: e9d7 1208 ldrd r1, r2, [r7, #32]
- 800d376: 460b mov r3, r1
- 800d378: 4313 orrs r3, r2
- 800d37a: d011 beq.n 800d3a0 <HAL_RCCEx_PeriphCLKConfig+0x12bc>
- {
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
- 800d37c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d380: 3308 adds r3, #8
- 800d382: 2101 movs r1, #1
- 800d384: 4618 mov r0, r3
- 800d386: f001 fa2b bl 800e7e0 <RCCEx_PLL2_Config>
- 800d38a: 4603 mov r3, r0
- 800d38c: f887 311f strb.w r3, [r7, #287] @ 0x11f
-
- if (ret == HAL_OK)
- 800d390: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d394: 2b00 cmp r3, #0
- 800d396: d003 beq.n 800d3a0 <HAL_RCCEx_PeriphCLKConfig+0x12bc>
- /*Nothing to do*/
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800d398: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d39c: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
-
-
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVR) == RCC_PERIPHCLK_PLL2_DIVR)
- 800d3a0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d3a4: e9d3 2300 ldrd r2, r3, [r3]
- 800d3a8: 2100 movs r1, #0
- 800d3aa: 61b9 str r1, [r7, #24]
- 800d3ac: f003 0304 and.w r3, r3, #4
- 800d3b0: 61fb str r3, [r7, #28]
- 800d3b2: e9d7 1206 ldrd r1, r2, [r7, #24]
- 800d3b6: 460b mov r3, r1
- 800d3b8: 4313 orrs r3, r2
- 800d3ba: d011 beq.n 800d3e0 <HAL_RCCEx_PeriphCLKConfig+0x12fc>
- {
- ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
- 800d3bc: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d3c0: 3308 adds r3, #8
- 800d3c2: 2102 movs r1, #2
- 800d3c4: 4618 mov r0, r3
- 800d3c6: f001 fa0b bl 800e7e0 <RCCEx_PLL2_Config>
- 800d3ca: 4603 mov r3, r0
- 800d3cc: f887 311f strb.w r3, [r7, #287] @ 0x11f
-
- if (ret == HAL_OK)
- 800d3d0: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d3d4: 2b00 cmp r3, #0
- 800d3d6: d003 beq.n 800d3e0 <HAL_RCCEx_PeriphCLKConfig+0x12fc>
- /*Nothing to do*/
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800d3d8: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d3dc: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
-
- /*---------------------------- PLL3 configuration -------------------------------*/
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVP) == RCC_PERIPHCLK_PLL3_DIVP)
- 800d3e0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d3e4: e9d3 2300 ldrd r2, r3, [r3]
- 800d3e8: 2100 movs r1, #0
- 800d3ea: 6139 str r1, [r7, #16]
- 800d3ec: f003 0308 and.w r3, r3, #8
- 800d3f0: 617b str r3, [r7, #20]
- 800d3f2: e9d7 1204 ldrd r1, r2, [r7, #16]
- 800d3f6: 460b mov r3, r1
- 800d3f8: 4313 orrs r3, r2
- 800d3fa: d011 beq.n 800d420 <HAL_RCCEx_PeriphCLKConfig+0x133c>
- {
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
- 800d3fc: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d400: 3328 adds r3, #40 @ 0x28
- 800d402: 2100 movs r1, #0
- 800d404: 4618 mov r0, r3
- 800d406: f001 fa9d bl 800e944 <RCCEx_PLL3_Config>
- 800d40a: 4603 mov r3, r0
- 800d40c: f887 311f strb.w r3, [r7, #287] @ 0x11f
-
- if (ret == HAL_OK)
- 800d410: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d414: 2b00 cmp r3, #0
- 800d416: d003 beq.n 800d420 <HAL_RCCEx_PeriphCLKConfig+0x133c>
- /*Nothing to do*/
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800d418: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d41c: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
-
-
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVQ) == RCC_PERIPHCLK_PLL3_DIVQ)
- 800d420: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d424: e9d3 2300 ldrd r2, r3, [r3]
- 800d428: 2100 movs r1, #0
- 800d42a: 60b9 str r1, [r7, #8]
- 800d42c: f003 0310 and.w r3, r3, #16
- 800d430: 60fb str r3, [r7, #12]
- 800d432: e9d7 1202 ldrd r1, r2, [r7, #8]
- 800d436: 460b mov r3, r1
- 800d438: 4313 orrs r3, r2
- 800d43a: d011 beq.n 800d460 <HAL_RCCEx_PeriphCLKConfig+0x137c>
- {
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
- 800d43c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d440: 3328 adds r3, #40 @ 0x28
- 800d442: 2101 movs r1, #1
- 800d444: 4618 mov r0, r3
- 800d446: f001 fa7d bl 800e944 <RCCEx_PLL3_Config>
- 800d44a: 4603 mov r3, r0
- 800d44c: f887 311f strb.w r3, [r7, #287] @ 0x11f
-
- if (ret == HAL_OK)
- 800d450: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d454: 2b00 cmp r3, #0
- 800d456: d003 beq.n 800d460 <HAL_RCCEx_PeriphCLKConfig+0x137c>
- /*Nothing to do*/
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800d458: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d45c: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
-
-
- if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVR) == RCC_PERIPHCLK_PLL3_DIVR)
- 800d460: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d464: e9d3 2300 ldrd r2, r3, [r3]
- 800d468: 2100 movs r1, #0
- 800d46a: 6039 str r1, [r7, #0]
- 800d46c: f003 0320 and.w r3, r3, #32
- 800d470: 607b str r3, [r7, #4]
- 800d472: e9d7 1200 ldrd r1, r2, [r7]
- 800d476: 460b mov r3, r1
- 800d478: 4313 orrs r3, r2
- 800d47a: d011 beq.n 800d4a0 <HAL_RCCEx_PeriphCLKConfig+0x13bc>
- {
- ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
- 800d47c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
- 800d480: 3328 adds r3, #40 @ 0x28
- 800d482: 2102 movs r1, #2
- 800d484: 4618 mov r0, r3
- 800d486: f001 fa5d bl 800e944 <RCCEx_PLL3_Config>
- 800d48a: 4603 mov r3, r0
- 800d48c: f887 311f strb.w r3, [r7, #287] @ 0x11f
-
- if (ret == HAL_OK)
- 800d490: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d494: 2b00 cmp r3, #0
- 800d496: d003 beq.n 800d4a0 <HAL_RCCEx_PeriphCLKConfig+0x13bc>
- /*Nothing to do*/
- }
- else
- {
- /* set overall return value */
- status = ret;
- 800d498: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
- 800d49c: f887 311e strb.w r3, [r7, #286] @ 0x11e
- }
- }
- if (status == HAL_OK)
- 800d4a0: f897 311e ldrb.w r3, [r7, #286] @ 0x11e
- 800d4a4: 2b00 cmp r3, #0
- 800d4a6: d101 bne.n 800d4ac <HAL_RCCEx_PeriphCLKConfig+0x13c8>
- {
- return HAL_OK;
- 800d4a8: 2300 movs r3, #0
- 800d4aa: e000 b.n 800d4ae <HAL_RCCEx_PeriphCLKConfig+0x13ca>
- }
- return HAL_ERROR;
- 800d4ac: 2301 movs r3, #1
- }
- 800d4ae: 4618 mov r0, r3
- 800d4b0: f507 7790 add.w r7, r7, #288 @ 0x120
- 800d4b4: 46bd mov sp, r7
- 800d4b6: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
- 800d4ba: bf00 nop
- 800d4bc: 58024400 .word 0x58024400
- 0800d4c0 <HAL_RCCEx_GetPeriphCLKFreq>:
- * @retval Frequency in KHz
- *
- * (*) : Available on some STM32H7 lines only.
- */
- uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint64_t PeriphClk)
- {
- 800d4c0: b580 push {r7, lr}
- 800d4c2: b090 sub sp, #64 @ 0x40
- 800d4c4: af00 add r7, sp, #0
- 800d4c6: e9c7 0100 strd r0, r1, [r7]
- /* This variable is used to store the SAI and CKP clock source */
- uint32_t saiclocksource;
- uint32_t ckpclocksource;
- uint32_t srcclk;
- if (PeriphClk == RCC_PERIPHCLK_SAI1)
- 800d4ca: e9d7 2300 ldrd r2, r3, [r7]
- 800d4ce: f5a2 7180 sub.w r1, r2, #256 @ 0x100
- 800d4d2: 430b orrs r3, r1
- 800d4d4: f040 8094 bne.w 800d600 <HAL_RCCEx_GetPeriphCLKFreq+0x140>
- {
- saiclocksource = __HAL_RCC_GET_SAI1_SOURCE();
- 800d4d8: 4b9e ldr r3, [pc, #632] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d4da: 6d1b ldr r3, [r3, #80] @ 0x50
- 800d4dc: f003 0307 and.w r3, r3, #7
- 800d4e0: 633b str r3, [r7, #48] @ 0x30
- switch (saiclocksource)
- 800d4e2: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d4e4: 2b04 cmp r3, #4
- 800d4e6: f200 8087 bhi.w 800d5f8 <HAL_RCCEx_GetPeriphCLKFreq+0x138>
- 800d4ea: a201 add r2, pc, #4 @ (adr r2, 800d4f0 <HAL_RCCEx_GetPeriphCLKFreq+0x30>)
- 800d4ec: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800d4f0: 0800d505 .word 0x0800d505
- 800d4f4: 0800d52d .word 0x0800d52d
- 800d4f8: 0800d555 .word 0x0800d555
- 800d4fc: 0800d5f1 .word 0x0800d5f1
- 800d500: 0800d57d .word 0x0800d57d
- {
- case RCC_SAI1CLKSOURCE_PLL: /* PLL1 is the clock source for SAI1 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY))
- 800d504: 4b93 ldr r3, [pc, #588] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d506: 681b ldr r3, [r3, #0]
- 800d508: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
- 800d50c: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000
- 800d510: d108 bne.n 800d524 <HAL_RCCEx_GetPeriphCLKFreq+0x64>
- {
- HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
- 800d512: f107 0324 add.w r3, r7, #36 @ 0x24
- 800d516: 4618 mov r0, r3
- 800d518: f001 f810 bl 800e53c <HAL_RCCEx_GetPLL1ClockFreq>
- frequency = pll1_clocks.PLL1_Q_Frequency;
- 800d51c: 6abb ldr r3, [r7, #40] @ 0x28
- 800d51e: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800d520: f000 bd45 b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800d524: 2300 movs r3, #0
- 800d526: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d528: f000 bd41 b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SAI1CLKSOURCE_PLL2: /* PLL2 is the clock source for SAI1 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY))
- 800d52c: 4b89 ldr r3, [pc, #548] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d52e: 681b ldr r3, [r3, #0]
- 800d530: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
- 800d534: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
- 800d538: d108 bne.n 800d54c <HAL_RCCEx_GetPeriphCLKFreq+0x8c>
- {
- HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
- 800d53a: f107 0318 add.w r3, r7, #24
- 800d53e: 4618 mov r0, r3
- 800d540: f000 fd54 bl 800dfec <HAL_RCCEx_GetPLL2ClockFreq>
- frequency = pll2_clocks.PLL2_P_Frequency;
- 800d544: 69bb ldr r3, [r7, #24]
- 800d546: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800d548: f000 bd31 b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800d54c: 2300 movs r3, #0
- 800d54e: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d550: f000 bd2d b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SAI1CLKSOURCE_PLL3: /* PLL3 is the clock source for SAI1 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY))
- 800d554: 4b7f ldr r3, [pc, #508] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d556: 681b ldr r3, [r3, #0]
- 800d558: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
- 800d55c: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800d560: d108 bne.n 800d574 <HAL_RCCEx_GetPeriphCLKFreq+0xb4>
- {
- HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
- 800d562: f107 030c add.w r3, r7, #12
- 800d566: 4618 mov r0, r3
- 800d568: f000 fe94 bl 800e294 <HAL_RCCEx_GetPLL3ClockFreq>
- frequency = pll3_clocks.PLL3_P_Frequency;
- 800d56c: 68fb ldr r3, [r7, #12]
- 800d56e: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800d570: f000 bd1d b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800d574: 2300 movs r3, #0
- 800d576: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d578: f000 bd19 b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SAI1CLKSOURCE_CLKP: /* CKPER is the clock source for SAI1*/
- {
- ckpclocksource = __HAL_RCC_GET_CLKP_SOURCE();
- 800d57c: 4b75 ldr r3, [pc, #468] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d57e: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800d580: f003 5340 and.w r3, r3, #805306368 @ 0x30000000
- 800d584: 637b str r3, [r7, #52] @ 0x34
- if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI))
- 800d586: 4b73 ldr r3, [pc, #460] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d588: 681b ldr r3, [r3, #0]
- 800d58a: f003 0304 and.w r3, r3, #4
- 800d58e: 2b04 cmp r3, #4
- 800d590: d10c bne.n 800d5ac <HAL_RCCEx_GetPeriphCLKFreq+0xec>
- 800d592: 6b7b ldr r3, [r7, #52] @ 0x34
- 800d594: 2b00 cmp r3, #0
- 800d596: d109 bne.n 800d5ac <HAL_RCCEx_GetPeriphCLKFreq+0xec>
- {
- /* In Case the CKPER Source is HSI */
- frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
- 800d598: 4b6e ldr r3, [pc, #440] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d59a: 681b ldr r3, [r3, #0]
- 800d59c: 08db lsrs r3, r3, #3
- 800d59e: f003 0303 and.w r3, r3, #3
- 800d5a2: 4a6d ldr r2, [pc, #436] @ (800d758 <HAL_RCCEx_GetPeriphCLKFreq+0x298>)
- 800d5a4: fa22 f303 lsr.w r3, r2, r3
- 800d5a8: 63fb str r3, [r7, #60] @ 0x3c
- 800d5aa: e01f b.n 800d5ec <HAL_RCCEx_GetPeriphCLKFreq+0x12c>
- }
- else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI))
- 800d5ac: 4b69 ldr r3, [pc, #420] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d5ae: 681b ldr r3, [r3, #0]
- 800d5b0: f403 7380 and.w r3, r3, #256 @ 0x100
- 800d5b4: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800d5b8: d106 bne.n 800d5c8 <HAL_RCCEx_GetPeriphCLKFreq+0x108>
- 800d5ba: 6b7b ldr r3, [r7, #52] @ 0x34
- 800d5bc: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
- 800d5c0: d102 bne.n 800d5c8 <HAL_RCCEx_GetPeriphCLKFreq+0x108>
- {
- /* In Case the CKPER Source is CSI */
- frequency = CSI_VALUE;
- 800d5c2: 4b66 ldr r3, [pc, #408] @ (800d75c <HAL_RCCEx_GetPeriphCLKFreq+0x29c>)
- 800d5c4: 63fb str r3, [r7, #60] @ 0x3c
- 800d5c6: e011 b.n 800d5ec <HAL_RCCEx_GetPeriphCLKFreq+0x12c>
- }
- else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE))
- 800d5c8: 4b62 ldr r3, [pc, #392] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d5ca: 681b ldr r3, [r3, #0]
- 800d5cc: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800d5d0: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800d5d4: d106 bne.n 800d5e4 <HAL_RCCEx_GetPeriphCLKFreq+0x124>
- 800d5d6: 6b7b ldr r3, [r7, #52] @ 0x34
- 800d5d8: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800d5dc: d102 bne.n 800d5e4 <HAL_RCCEx_GetPeriphCLKFreq+0x124>
- {
- /* In Case the CKPER Source is HSE */
- frequency = HSE_VALUE;
- 800d5de: 4b60 ldr r3, [pc, #384] @ (800d760 <HAL_RCCEx_GetPeriphCLKFreq+0x2a0>)
- 800d5e0: 63fb str r3, [r7, #60] @ 0x3c
- 800d5e2: e003 b.n 800d5ec <HAL_RCCEx_GetPeriphCLKFreq+0x12c>
- }
- else
- {
- /* In Case the CKPER is disabled*/
- frequency = 0;
- 800d5e4: 2300 movs r3, #0
- 800d5e6: 63fb str r3, [r7, #60] @ 0x3c
- }
- break;
- 800d5e8: f000 bce1 b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- 800d5ec: f000 bcdf b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case (RCC_SAI1CLKSOURCE_PIN): /* External clock is the clock source for SAI1 */
- {
- frequency = EXTERNAL_CLOCK_VALUE;
- 800d5f0: 4b5c ldr r3, [pc, #368] @ (800d764 <HAL_RCCEx_GetPeriphCLKFreq+0x2a4>)
- 800d5f2: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d5f4: f000 bcdb b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- default :
- {
- frequency = 0;
- 800d5f8: 2300 movs r3, #0
- 800d5fa: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d5fc: f000 bcd7 b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- }
- }
- #if defined(SAI3)
- else if (PeriphClk == RCC_PERIPHCLK_SAI23)
- 800d600: e9d7 2300 ldrd r2, r3, [r7]
- 800d604: f5a2 7100 sub.w r1, r2, #512 @ 0x200
- 800d608: 430b orrs r3, r1
- 800d60a: f040 80ad bne.w 800d768 <HAL_RCCEx_GetPeriphCLKFreq+0x2a8>
- {
- saiclocksource = __HAL_RCC_GET_SAI23_SOURCE();
- 800d60e: 4b51 ldr r3, [pc, #324] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d610: 6d1b ldr r3, [r3, #80] @ 0x50
- 800d612: f403 73e0 and.w r3, r3, #448 @ 0x1c0
- 800d616: 633b str r3, [r7, #48] @ 0x30
- switch (saiclocksource)
- 800d618: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d61a: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800d61e: d056 beq.n 800d6ce <HAL_RCCEx_GetPeriphCLKFreq+0x20e>
- 800d620: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d622: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800d626: f200 8090 bhi.w 800d74a <HAL_RCCEx_GetPeriphCLKFreq+0x28a>
- 800d62a: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d62c: 2bc0 cmp r3, #192 @ 0xc0
- 800d62e: f000 8088 beq.w 800d742 <HAL_RCCEx_GetPeriphCLKFreq+0x282>
- 800d632: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d634: 2bc0 cmp r3, #192 @ 0xc0
- 800d636: f200 8088 bhi.w 800d74a <HAL_RCCEx_GetPeriphCLKFreq+0x28a>
- 800d63a: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d63c: 2b80 cmp r3, #128 @ 0x80
- 800d63e: d032 beq.n 800d6a6 <HAL_RCCEx_GetPeriphCLKFreq+0x1e6>
- 800d640: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d642: 2b80 cmp r3, #128 @ 0x80
- 800d644: f200 8081 bhi.w 800d74a <HAL_RCCEx_GetPeriphCLKFreq+0x28a>
- 800d648: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d64a: 2b00 cmp r3, #0
- 800d64c: d003 beq.n 800d656 <HAL_RCCEx_GetPeriphCLKFreq+0x196>
- 800d64e: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d650: 2b40 cmp r3, #64 @ 0x40
- 800d652: d014 beq.n 800d67e <HAL_RCCEx_GetPeriphCLKFreq+0x1be>
- 800d654: e079 b.n 800d74a <HAL_RCCEx_GetPeriphCLKFreq+0x28a>
- {
- case RCC_SAI23CLKSOURCE_PLL: /* PLL1 is the clock source for SAI2/3 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY))
- 800d656: 4b3f ldr r3, [pc, #252] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d658: 681b ldr r3, [r3, #0]
- 800d65a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
- 800d65e: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000
- 800d662: d108 bne.n 800d676 <HAL_RCCEx_GetPeriphCLKFreq+0x1b6>
- {
- HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
- 800d664: f107 0324 add.w r3, r7, #36 @ 0x24
- 800d668: 4618 mov r0, r3
- 800d66a: f000 ff67 bl 800e53c <HAL_RCCEx_GetPLL1ClockFreq>
- frequency = pll1_clocks.PLL1_Q_Frequency;
- 800d66e: 6abb ldr r3, [r7, #40] @ 0x28
- 800d670: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800d672: f000 bc9c b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800d676: 2300 movs r3, #0
- 800d678: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d67a: f000 bc98 b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SAI23CLKSOURCE_PLL2: /* PLL2 is the clock source for SAI2/3 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY))
- 800d67e: 4b35 ldr r3, [pc, #212] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d680: 681b ldr r3, [r3, #0]
- 800d682: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
- 800d686: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
- 800d68a: d108 bne.n 800d69e <HAL_RCCEx_GetPeriphCLKFreq+0x1de>
- {
- HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
- 800d68c: f107 0318 add.w r3, r7, #24
- 800d690: 4618 mov r0, r3
- 800d692: f000 fcab bl 800dfec <HAL_RCCEx_GetPLL2ClockFreq>
- frequency = pll2_clocks.PLL2_P_Frequency;
- 800d696: 69bb ldr r3, [r7, #24]
- 800d698: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800d69a: f000 bc88 b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800d69e: 2300 movs r3, #0
- 800d6a0: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d6a2: f000 bc84 b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SAI23CLKSOURCE_PLL3: /* PLL3 is the clock source for SAI2/3 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY))
- 800d6a6: 4b2b ldr r3, [pc, #172] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d6a8: 681b ldr r3, [r3, #0]
- 800d6aa: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
- 800d6ae: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800d6b2: d108 bne.n 800d6c6 <HAL_RCCEx_GetPeriphCLKFreq+0x206>
- {
- HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
- 800d6b4: f107 030c add.w r3, r7, #12
- 800d6b8: 4618 mov r0, r3
- 800d6ba: f000 fdeb bl 800e294 <HAL_RCCEx_GetPLL3ClockFreq>
- frequency = pll3_clocks.PLL3_P_Frequency;
- 800d6be: 68fb ldr r3, [r7, #12]
- 800d6c0: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800d6c2: f000 bc74 b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800d6c6: 2300 movs r3, #0
- 800d6c8: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d6ca: f000 bc70 b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SAI23CLKSOURCE_CLKP: /* CKPER is the clock source for SAI2/3 */
- {
- ckpclocksource = __HAL_RCC_GET_CLKP_SOURCE();
- 800d6ce: 4b21 ldr r3, [pc, #132] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d6d0: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800d6d2: f003 5340 and.w r3, r3, #805306368 @ 0x30000000
- 800d6d6: 637b str r3, [r7, #52] @ 0x34
- if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI))
- 800d6d8: 4b1e ldr r3, [pc, #120] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d6da: 681b ldr r3, [r3, #0]
- 800d6dc: f003 0304 and.w r3, r3, #4
- 800d6e0: 2b04 cmp r3, #4
- 800d6e2: d10c bne.n 800d6fe <HAL_RCCEx_GetPeriphCLKFreq+0x23e>
- 800d6e4: 6b7b ldr r3, [r7, #52] @ 0x34
- 800d6e6: 2b00 cmp r3, #0
- 800d6e8: d109 bne.n 800d6fe <HAL_RCCEx_GetPeriphCLKFreq+0x23e>
- {
- /* In Case the CKPER Source is HSI */
- frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
- 800d6ea: 4b1a ldr r3, [pc, #104] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d6ec: 681b ldr r3, [r3, #0]
- 800d6ee: 08db lsrs r3, r3, #3
- 800d6f0: f003 0303 and.w r3, r3, #3
- 800d6f4: 4a18 ldr r2, [pc, #96] @ (800d758 <HAL_RCCEx_GetPeriphCLKFreq+0x298>)
- 800d6f6: fa22 f303 lsr.w r3, r2, r3
- 800d6fa: 63fb str r3, [r7, #60] @ 0x3c
- 800d6fc: e01f b.n 800d73e <HAL_RCCEx_GetPeriphCLKFreq+0x27e>
- }
- else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI))
- 800d6fe: 4b15 ldr r3, [pc, #84] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d700: 681b ldr r3, [r3, #0]
- 800d702: f403 7380 and.w r3, r3, #256 @ 0x100
- 800d706: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800d70a: d106 bne.n 800d71a <HAL_RCCEx_GetPeriphCLKFreq+0x25a>
- 800d70c: 6b7b ldr r3, [r7, #52] @ 0x34
- 800d70e: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
- 800d712: d102 bne.n 800d71a <HAL_RCCEx_GetPeriphCLKFreq+0x25a>
- {
- /* In Case the CKPER Source is CSI */
- frequency = CSI_VALUE;
- 800d714: 4b11 ldr r3, [pc, #68] @ (800d75c <HAL_RCCEx_GetPeriphCLKFreq+0x29c>)
- 800d716: 63fb str r3, [r7, #60] @ 0x3c
- 800d718: e011 b.n 800d73e <HAL_RCCEx_GetPeriphCLKFreq+0x27e>
- }
- else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE))
- 800d71a: 4b0e ldr r3, [pc, #56] @ (800d754 <HAL_RCCEx_GetPeriphCLKFreq+0x294>)
- 800d71c: 681b ldr r3, [r3, #0]
- 800d71e: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800d722: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800d726: d106 bne.n 800d736 <HAL_RCCEx_GetPeriphCLKFreq+0x276>
- 800d728: 6b7b ldr r3, [r7, #52] @ 0x34
- 800d72a: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800d72e: d102 bne.n 800d736 <HAL_RCCEx_GetPeriphCLKFreq+0x276>
- {
- /* In Case the CKPER Source is HSE */
- frequency = HSE_VALUE;
- 800d730: 4b0b ldr r3, [pc, #44] @ (800d760 <HAL_RCCEx_GetPeriphCLKFreq+0x2a0>)
- 800d732: 63fb str r3, [r7, #60] @ 0x3c
- 800d734: e003 b.n 800d73e <HAL_RCCEx_GetPeriphCLKFreq+0x27e>
- }
- else
- {
- /* In Case the CKPER is disabled*/
- frequency = 0;
- 800d736: 2300 movs r3, #0
- 800d738: 63fb str r3, [r7, #60] @ 0x3c
- }
- break;
- 800d73a: f000 bc38 b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- 800d73e: f000 bc36 b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case (RCC_SAI23CLKSOURCE_PIN): /* External clock is the clock source for SAI2/3 */
- {
- frequency = EXTERNAL_CLOCK_VALUE;
- 800d742: 4b08 ldr r3, [pc, #32] @ (800d764 <HAL_RCCEx_GetPeriphCLKFreq+0x2a4>)
- 800d744: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d746: f000 bc32 b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- default :
- {
- frequency = 0;
- 800d74a: 2300 movs r3, #0
- 800d74c: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d74e: f000 bc2e b.w 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- 800d752: bf00 nop
- 800d754: 58024400 .word 0x58024400
- 800d758: 03d09000 .word 0x03d09000
- 800d75c: 003d0900 .word 0x003d0900
- 800d760: 017d7840 .word 0x017d7840
- 800d764: 00bb8000 .word 0x00bb8000
- }
- }
- #endif
- #if defined(SAI4)
- else if (PeriphClk == RCC_PERIPHCLK_SAI4A)
- 800d768: e9d7 2300 ldrd r2, r3, [r7]
- 800d76c: f5a2 6180 sub.w r1, r2, #1024 @ 0x400
- 800d770: 430b orrs r3, r1
- 800d772: f040 809c bne.w 800d8ae <HAL_RCCEx_GetPeriphCLKFreq+0x3ee>
- {
- saiclocksource = __HAL_RCC_GET_SAI4A_SOURCE();
- 800d776: 4b9e ldr r3, [pc, #632] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d778: 6d9b ldr r3, [r3, #88] @ 0x58
- 800d77a: f403 0360 and.w r3, r3, #14680064 @ 0xe00000
- 800d77e: 633b str r3, [r7, #48] @ 0x30
- switch (saiclocksource)
- 800d780: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d782: f5b3 0f00 cmp.w r3, #8388608 @ 0x800000
- 800d786: d054 beq.n 800d832 <HAL_RCCEx_GetPeriphCLKFreq+0x372>
- 800d788: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d78a: f5b3 0f00 cmp.w r3, #8388608 @ 0x800000
- 800d78e: f200 808b bhi.w 800d8a8 <HAL_RCCEx_GetPeriphCLKFreq+0x3e8>
- 800d792: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d794: f5b3 0fc0 cmp.w r3, #6291456 @ 0x600000
- 800d798: f000 8083 beq.w 800d8a2 <HAL_RCCEx_GetPeriphCLKFreq+0x3e2>
- 800d79c: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d79e: f5b3 0fc0 cmp.w r3, #6291456 @ 0x600000
- 800d7a2: f200 8081 bhi.w 800d8a8 <HAL_RCCEx_GetPeriphCLKFreq+0x3e8>
- 800d7a6: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d7a8: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000
- 800d7ac: d02f beq.n 800d80e <HAL_RCCEx_GetPeriphCLKFreq+0x34e>
- 800d7ae: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d7b0: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000
- 800d7b4: d878 bhi.n 800d8a8 <HAL_RCCEx_GetPeriphCLKFreq+0x3e8>
- 800d7b6: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d7b8: 2b00 cmp r3, #0
- 800d7ba: d004 beq.n 800d7c6 <HAL_RCCEx_GetPeriphCLKFreq+0x306>
- 800d7bc: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d7be: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
- 800d7c2: d012 beq.n 800d7ea <HAL_RCCEx_GetPeriphCLKFreq+0x32a>
- 800d7c4: e070 b.n 800d8a8 <HAL_RCCEx_GetPeriphCLKFreq+0x3e8>
- {
- case RCC_SAI4ACLKSOURCE_PLL: /* PLL1 is the clock source for SAI4A */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY))
- 800d7c6: 4b8a ldr r3, [pc, #552] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d7c8: 681b ldr r3, [r3, #0]
- 800d7ca: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
- 800d7ce: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000
- 800d7d2: d107 bne.n 800d7e4 <HAL_RCCEx_GetPeriphCLKFreq+0x324>
- {
- HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
- 800d7d4: f107 0324 add.w r3, r7, #36 @ 0x24
- 800d7d8: 4618 mov r0, r3
- 800d7da: f000 feaf bl 800e53c <HAL_RCCEx_GetPLL1ClockFreq>
- frequency = pll1_clocks.PLL1_Q_Frequency;
- 800d7de: 6abb ldr r3, [r7, #40] @ 0x28
- 800d7e0: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800d7e2: e3e4 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800d7e4: 2300 movs r3, #0
- 800d7e6: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d7e8: e3e1 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SAI4ACLKSOURCE_PLL2: /* PLLI2 is the clock source for SAI4A */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY))
- 800d7ea: 4b81 ldr r3, [pc, #516] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d7ec: 681b ldr r3, [r3, #0]
- 800d7ee: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
- 800d7f2: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
- 800d7f6: d107 bne.n 800d808 <HAL_RCCEx_GetPeriphCLKFreq+0x348>
- {
- HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
- 800d7f8: f107 0318 add.w r3, r7, #24
- 800d7fc: 4618 mov r0, r3
- 800d7fe: f000 fbf5 bl 800dfec <HAL_RCCEx_GetPLL2ClockFreq>
- frequency = pll2_clocks.PLL2_P_Frequency;
- 800d802: 69bb ldr r3, [r7, #24]
- 800d804: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800d806: e3d2 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800d808: 2300 movs r3, #0
- 800d80a: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d80c: e3cf b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SAI4ACLKSOURCE_PLL3: /* PLLI3 is the clock source for SAI4A */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY))
- 800d80e: 4b78 ldr r3, [pc, #480] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d810: 681b ldr r3, [r3, #0]
- 800d812: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
- 800d816: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800d81a: d107 bne.n 800d82c <HAL_RCCEx_GetPeriphCLKFreq+0x36c>
- {
- HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
- 800d81c: f107 030c add.w r3, r7, #12
- 800d820: 4618 mov r0, r3
- 800d822: f000 fd37 bl 800e294 <HAL_RCCEx_GetPLL3ClockFreq>
- frequency = pll3_clocks.PLL3_P_Frequency;
- 800d826: 68fb ldr r3, [r7, #12]
- 800d828: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800d82a: e3c0 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800d82c: 2300 movs r3, #0
- 800d82e: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d830: e3bd b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SAI4ACLKSOURCE_CLKP: /* CKPER is the clock source for SAI4A*/
- {
- ckpclocksource = __HAL_RCC_GET_CLKP_SOURCE();
- 800d832: 4b6f ldr r3, [pc, #444] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d834: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800d836: f003 5340 and.w r3, r3, #805306368 @ 0x30000000
- 800d83a: 637b str r3, [r7, #52] @ 0x34
- if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI))
- 800d83c: 4b6c ldr r3, [pc, #432] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d83e: 681b ldr r3, [r3, #0]
- 800d840: f003 0304 and.w r3, r3, #4
- 800d844: 2b04 cmp r3, #4
- 800d846: d10c bne.n 800d862 <HAL_RCCEx_GetPeriphCLKFreq+0x3a2>
- 800d848: 6b7b ldr r3, [r7, #52] @ 0x34
- 800d84a: 2b00 cmp r3, #0
- 800d84c: d109 bne.n 800d862 <HAL_RCCEx_GetPeriphCLKFreq+0x3a2>
- {
- /* In Case the CKPER Source is HSI */
- frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
- 800d84e: 4b68 ldr r3, [pc, #416] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d850: 681b ldr r3, [r3, #0]
- 800d852: 08db lsrs r3, r3, #3
- 800d854: f003 0303 and.w r3, r3, #3
- 800d858: 4a66 ldr r2, [pc, #408] @ (800d9f4 <HAL_RCCEx_GetPeriphCLKFreq+0x534>)
- 800d85a: fa22 f303 lsr.w r3, r2, r3
- 800d85e: 63fb str r3, [r7, #60] @ 0x3c
- 800d860: e01e b.n 800d8a0 <HAL_RCCEx_GetPeriphCLKFreq+0x3e0>
- }
- else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI))
- 800d862: 4b63 ldr r3, [pc, #396] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d864: 681b ldr r3, [r3, #0]
- 800d866: f403 7380 and.w r3, r3, #256 @ 0x100
- 800d86a: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800d86e: d106 bne.n 800d87e <HAL_RCCEx_GetPeriphCLKFreq+0x3be>
- 800d870: 6b7b ldr r3, [r7, #52] @ 0x34
- 800d872: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
- 800d876: d102 bne.n 800d87e <HAL_RCCEx_GetPeriphCLKFreq+0x3be>
- {
- /* In Case the CKPER Source is CSI */
- frequency = CSI_VALUE;
- 800d878: 4b5f ldr r3, [pc, #380] @ (800d9f8 <HAL_RCCEx_GetPeriphCLKFreq+0x538>)
- 800d87a: 63fb str r3, [r7, #60] @ 0x3c
- 800d87c: e010 b.n 800d8a0 <HAL_RCCEx_GetPeriphCLKFreq+0x3e0>
- }
- else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE))
- 800d87e: 4b5c ldr r3, [pc, #368] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d880: 681b ldr r3, [r3, #0]
- 800d882: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800d886: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800d88a: d106 bne.n 800d89a <HAL_RCCEx_GetPeriphCLKFreq+0x3da>
- 800d88c: 6b7b ldr r3, [r7, #52] @ 0x34
- 800d88e: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800d892: d102 bne.n 800d89a <HAL_RCCEx_GetPeriphCLKFreq+0x3da>
- {
- /* In Case the CKPER Source is HSE */
- frequency = HSE_VALUE;
- 800d894: 4b59 ldr r3, [pc, #356] @ (800d9fc <HAL_RCCEx_GetPeriphCLKFreq+0x53c>)
- 800d896: 63fb str r3, [r7, #60] @ 0x3c
- 800d898: e002 b.n 800d8a0 <HAL_RCCEx_GetPeriphCLKFreq+0x3e0>
- }
- else
- {
- /* In Case the CKPER is disabled*/
- frequency = 0;
- 800d89a: 2300 movs r3, #0
- 800d89c: 63fb str r3, [r7, #60] @ 0x3c
- }
- break;
- 800d89e: e386 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- 800d8a0: e385 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SAI4ACLKSOURCE_PIN: /* External clock is the clock source for SAI4A */
- {
- frequency = EXTERNAL_CLOCK_VALUE;
- 800d8a2: 4b57 ldr r3, [pc, #348] @ (800da00 <HAL_RCCEx_GetPeriphCLKFreq+0x540>)
- 800d8a4: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d8a6: e382 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- default :
- {
- frequency = 0;
- 800d8a8: 2300 movs r3, #0
- 800d8aa: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d8ac: e37f b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- }
- }
- else if (PeriphClk == RCC_PERIPHCLK_SAI4B)
- 800d8ae: e9d7 2300 ldrd r2, r3, [r7]
- 800d8b2: f5a2 6100 sub.w r1, r2, #2048 @ 0x800
- 800d8b6: 430b orrs r3, r1
- 800d8b8: f040 80a7 bne.w 800da0a <HAL_RCCEx_GetPeriphCLKFreq+0x54a>
- {
- saiclocksource = __HAL_RCC_GET_SAI4B_SOURCE();
- 800d8bc: 4b4c ldr r3, [pc, #304] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d8be: 6d9b ldr r3, [r3, #88] @ 0x58
- 800d8c0: f003 63e0 and.w r3, r3, #117440512 @ 0x7000000
- 800d8c4: 633b str r3, [r7, #48] @ 0x30
- switch (saiclocksource)
- 800d8c6: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d8c8: f1b3 6f80 cmp.w r3, #67108864 @ 0x4000000
- 800d8cc: d055 beq.n 800d97a <HAL_RCCEx_GetPeriphCLKFreq+0x4ba>
- 800d8ce: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d8d0: f1b3 6f80 cmp.w r3, #67108864 @ 0x4000000
- 800d8d4: f200 8096 bhi.w 800da04 <HAL_RCCEx_GetPeriphCLKFreq+0x544>
- 800d8d8: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d8da: f1b3 7f40 cmp.w r3, #50331648 @ 0x3000000
- 800d8de: f000 8084 beq.w 800d9ea <HAL_RCCEx_GetPeriphCLKFreq+0x52a>
- 800d8e2: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d8e4: f1b3 7f40 cmp.w r3, #50331648 @ 0x3000000
- 800d8e8: f200 808c bhi.w 800da04 <HAL_RCCEx_GetPeriphCLKFreq+0x544>
- 800d8ec: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d8ee: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000
- 800d8f2: d030 beq.n 800d956 <HAL_RCCEx_GetPeriphCLKFreq+0x496>
- 800d8f4: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d8f6: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000
- 800d8fa: f200 8083 bhi.w 800da04 <HAL_RCCEx_GetPeriphCLKFreq+0x544>
- 800d8fe: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d900: 2b00 cmp r3, #0
- 800d902: d004 beq.n 800d90e <HAL_RCCEx_GetPeriphCLKFreq+0x44e>
- 800d904: 6b3b ldr r3, [r7, #48] @ 0x30
- 800d906: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
- 800d90a: d012 beq.n 800d932 <HAL_RCCEx_GetPeriphCLKFreq+0x472>
- 800d90c: e07a b.n 800da04 <HAL_RCCEx_GetPeriphCLKFreq+0x544>
- {
- case RCC_SAI4BCLKSOURCE_PLL: /* PLL1 is the clock source for SAI4B */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY))
- 800d90e: 4b38 ldr r3, [pc, #224] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d910: 681b ldr r3, [r3, #0]
- 800d912: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
- 800d916: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000
- 800d91a: d107 bne.n 800d92c <HAL_RCCEx_GetPeriphCLKFreq+0x46c>
- {
- HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
- 800d91c: f107 0324 add.w r3, r7, #36 @ 0x24
- 800d920: 4618 mov r0, r3
- 800d922: f000 fe0b bl 800e53c <HAL_RCCEx_GetPLL1ClockFreq>
- frequency = pll1_clocks.PLL1_Q_Frequency;
- 800d926: 6abb ldr r3, [r7, #40] @ 0x28
- 800d928: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800d92a: e340 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800d92c: 2300 movs r3, #0
- 800d92e: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d930: e33d b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SAI4BCLKSOURCE_PLL2: /* PLLI2 is the clock source for SAI4B */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY))
- 800d932: 4b2f ldr r3, [pc, #188] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d934: 681b ldr r3, [r3, #0]
- 800d936: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
- 800d93a: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
- 800d93e: d107 bne.n 800d950 <HAL_RCCEx_GetPeriphCLKFreq+0x490>
- {
- HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
- 800d940: f107 0318 add.w r3, r7, #24
- 800d944: 4618 mov r0, r3
- 800d946: f000 fb51 bl 800dfec <HAL_RCCEx_GetPLL2ClockFreq>
- frequency = pll2_clocks.PLL2_P_Frequency;
- 800d94a: 69bb ldr r3, [r7, #24]
- 800d94c: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800d94e: e32e b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800d950: 2300 movs r3, #0
- 800d952: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d954: e32b b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SAI4BCLKSOURCE_PLL3: /* PLLI3 is the clock source for SAI4B */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY))
- 800d956: 4b26 ldr r3, [pc, #152] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d958: 681b ldr r3, [r3, #0]
- 800d95a: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
- 800d95e: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800d962: d107 bne.n 800d974 <HAL_RCCEx_GetPeriphCLKFreq+0x4b4>
- {
- HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
- 800d964: f107 030c add.w r3, r7, #12
- 800d968: 4618 mov r0, r3
- 800d96a: f000 fc93 bl 800e294 <HAL_RCCEx_GetPLL3ClockFreq>
- frequency = pll3_clocks.PLL3_P_Frequency;
- 800d96e: 68fb ldr r3, [r7, #12]
- 800d970: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800d972: e31c b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800d974: 2300 movs r3, #0
- 800d976: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d978: e319 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SAI4BCLKSOURCE_CLKP: /* CKPER is the clock source for SAI4B*/
- {
- ckpclocksource = __HAL_RCC_GET_CLKP_SOURCE();
- 800d97a: 4b1d ldr r3, [pc, #116] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d97c: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800d97e: f003 5340 and.w r3, r3, #805306368 @ 0x30000000
- 800d982: 637b str r3, [r7, #52] @ 0x34
- if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI))
- 800d984: 4b1a ldr r3, [pc, #104] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d986: 681b ldr r3, [r3, #0]
- 800d988: f003 0304 and.w r3, r3, #4
- 800d98c: 2b04 cmp r3, #4
- 800d98e: d10c bne.n 800d9aa <HAL_RCCEx_GetPeriphCLKFreq+0x4ea>
- 800d990: 6b7b ldr r3, [r7, #52] @ 0x34
- 800d992: 2b00 cmp r3, #0
- 800d994: d109 bne.n 800d9aa <HAL_RCCEx_GetPeriphCLKFreq+0x4ea>
- {
- /* In Case the CKPER Source is HSI */
- frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
- 800d996: 4b16 ldr r3, [pc, #88] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d998: 681b ldr r3, [r3, #0]
- 800d99a: 08db lsrs r3, r3, #3
- 800d99c: f003 0303 and.w r3, r3, #3
- 800d9a0: 4a14 ldr r2, [pc, #80] @ (800d9f4 <HAL_RCCEx_GetPeriphCLKFreq+0x534>)
- 800d9a2: fa22 f303 lsr.w r3, r2, r3
- 800d9a6: 63fb str r3, [r7, #60] @ 0x3c
- 800d9a8: e01e b.n 800d9e8 <HAL_RCCEx_GetPeriphCLKFreq+0x528>
- }
- else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI))
- 800d9aa: 4b11 ldr r3, [pc, #68] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d9ac: 681b ldr r3, [r3, #0]
- 800d9ae: f403 7380 and.w r3, r3, #256 @ 0x100
- 800d9b2: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800d9b6: d106 bne.n 800d9c6 <HAL_RCCEx_GetPeriphCLKFreq+0x506>
- 800d9b8: 6b7b ldr r3, [r7, #52] @ 0x34
- 800d9ba: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
- 800d9be: d102 bne.n 800d9c6 <HAL_RCCEx_GetPeriphCLKFreq+0x506>
- {
- /* In Case the CKPER Source is CSI */
- frequency = CSI_VALUE;
- 800d9c0: 4b0d ldr r3, [pc, #52] @ (800d9f8 <HAL_RCCEx_GetPeriphCLKFreq+0x538>)
- 800d9c2: 63fb str r3, [r7, #60] @ 0x3c
- 800d9c4: e010 b.n 800d9e8 <HAL_RCCEx_GetPeriphCLKFreq+0x528>
- }
- else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE))
- 800d9c6: 4b0a ldr r3, [pc, #40] @ (800d9f0 <HAL_RCCEx_GetPeriphCLKFreq+0x530>)
- 800d9c8: 681b ldr r3, [r3, #0]
- 800d9ca: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800d9ce: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800d9d2: d106 bne.n 800d9e2 <HAL_RCCEx_GetPeriphCLKFreq+0x522>
- 800d9d4: 6b7b ldr r3, [r7, #52] @ 0x34
- 800d9d6: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800d9da: d102 bne.n 800d9e2 <HAL_RCCEx_GetPeriphCLKFreq+0x522>
- {
- /* In Case the CKPER Source is HSE */
- frequency = HSE_VALUE;
- 800d9dc: 4b07 ldr r3, [pc, #28] @ (800d9fc <HAL_RCCEx_GetPeriphCLKFreq+0x53c>)
- 800d9de: 63fb str r3, [r7, #60] @ 0x3c
- 800d9e0: e002 b.n 800d9e8 <HAL_RCCEx_GetPeriphCLKFreq+0x528>
- }
- else
- {
- /* In Case the CKPER is disabled*/
- frequency = 0;
- 800d9e2: 2300 movs r3, #0
- 800d9e4: 63fb str r3, [r7, #60] @ 0x3c
- }
- break;
- 800d9e6: e2e2 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- 800d9e8: e2e1 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SAI4BCLKSOURCE_PIN: /* External clock is the clock source for SAI4B */
- {
- frequency = EXTERNAL_CLOCK_VALUE;
- 800d9ea: 4b05 ldr r3, [pc, #20] @ (800da00 <HAL_RCCEx_GetPeriphCLKFreq+0x540>)
- 800d9ec: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800d9ee: e2de b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- 800d9f0: 58024400 .word 0x58024400
- 800d9f4: 03d09000 .word 0x03d09000
- 800d9f8: 003d0900 .word 0x003d0900
- 800d9fc: 017d7840 .word 0x017d7840
- 800da00: 00bb8000 .word 0x00bb8000
- }
- default :
- {
- frequency = 0;
- 800da04: 2300 movs r3, #0
- 800da06: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800da08: e2d1 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- }
- }
- #endif /*SAI4*/
- else if (PeriphClk == RCC_PERIPHCLK_SPI123)
- 800da0a: e9d7 2300 ldrd r2, r3, [r7]
- 800da0e: f5a2 5180 sub.w r1, r2, #4096 @ 0x1000
- 800da12: 430b orrs r3, r1
- 800da14: f040 809c bne.w 800db50 <HAL_RCCEx_GetPeriphCLKFreq+0x690>
- {
- /* Get SPI1/2/3 clock source */
- srcclk = __HAL_RCC_GET_SPI123_SOURCE();
- 800da18: 4b93 ldr r3, [pc, #588] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800da1a: 6d1b ldr r3, [r3, #80] @ 0x50
- 800da1c: f403 43e0 and.w r3, r3, #28672 @ 0x7000
- 800da20: 63bb str r3, [r7, #56] @ 0x38
- switch (srcclk)
- 800da22: 6bbb ldr r3, [r7, #56] @ 0x38
- 800da24: f5b3 4f80 cmp.w r3, #16384 @ 0x4000
- 800da28: d054 beq.n 800dad4 <HAL_RCCEx_GetPeriphCLKFreq+0x614>
- 800da2a: 6bbb ldr r3, [r7, #56] @ 0x38
- 800da2c: f5b3 4f80 cmp.w r3, #16384 @ 0x4000
- 800da30: f200 808b bhi.w 800db4a <HAL_RCCEx_GetPeriphCLKFreq+0x68a>
- 800da34: 6bbb ldr r3, [r7, #56] @ 0x38
- 800da36: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
- 800da3a: f000 8083 beq.w 800db44 <HAL_RCCEx_GetPeriphCLKFreq+0x684>
- 800da3e: 6bbb ldr r3, [r7, #56] @ 0x38
- 800da40: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
- 800da44: f200 8081 bhi.w 800db4a <HAL_RCCEx_GetPeriphCLKFreq+0x68a>
- 800da48: 6bbb ldr r3, [r7, #56] @ 0x38
- 800da4a: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
- 800da4e: d02f beq.n 800dab0 <HAL_RCCEx_GetPeriphCLKFreq+0x5f0>
- 800da50: 6bbb ldr r3, [r7, #56] @ 0x38
- 800da52: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
- 800da56: d878 bhi.n 800db4a <HAL_RCCEx_GetPeriphCLKFreq+0x68a>
- 800da58: 6bbb ldr r3, [r7, #56] @ 0x38
- 800da5a: 2b00 cmp r3, #0
- 800da5c: d004 beq.n 800da68 <HAL_RCCEx_GetPeriphCLKFreq+0x5a8>
- 800da5e: 6bbb ldr r3, [r7, #56] @ 0x38
- 800da60: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 800da64: d012 beq.n 800da8c <HAL_RCCEx_GetPeriphCLKFreq+0x5cc>
- 800da66: e070 b.n 800db4a <HAL_RCCEx_GetPeriphCLKFreq+0x68a>
- {
- case RCC_SPI123CLKSOURCE_PLL: /* PLL1 is the clock source for SPI123 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY))
- 800da68: 4b7f ldr r3, [pc, #508] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800da6a: 681b ldr r3, [r3, #0]
- 800da6c: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
- 800da70: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000
- 800da74: d107 bne.n 800da86 <HAL_RCCEx_GetPeriphCLKFreq+0x5c6>
- {
- HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
- 800da76: f107 0324 add.w r3, r7, #36 @ 0x24
- 800da7a: 4618 mov r0, r3
- 800da7c: f000 fd5e bl 800e53c <HAL_RCCEx_GetPLL1ClockFreq>
- frequency = pll1_clocks.PLL1_Q_Frequency;
- 800da80: 6abb ldr r3, [r7, #40] @ 0x28
- 800da82: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800da84: e293 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800da86: 2300 movs r3, #0
- 800da88: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800da8a: e290 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SPI123CLKSOURCE_PLL2: /* PLL2 is the clock source for SPI123 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY))
- 800da8c: 4b76 ldr r3, [pc, #472] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800da8e: 681b ldr r3, [r3, #0]
- 800da90: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
- 800da94: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
- 800da98: d107 bne.n 800daaa <HAL_RCCEx_GetPeriphCLKFreq+0x5ea>
- {
- HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
- 800da9a: f107 0318 add.w r3, r7, #24
- 800da9e: 4618 mov r0, r3
- 800daa0: f000 faa4 bl 800dfec <HAL_RCCEx_GetPLL2ClockFreq>
- frequency = pll2_clocks.PLL2_P_Frequency;
- 800daa4: 69bb ldr r3, [r7, #24]
- 800daa6: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800daa8: e281 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800daaa: 2300 movs r3, #0
- 800daac: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800daae: e27e b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SPI123CLKSOURCE_PLL3: /* PLL3 is the clock source for SPI123 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY))
- 800dab0: 4b6d ldr r3, [pc, #436] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800dab2: 681b ldr r3, [r3, #0]
- 800dab4: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
- 800dab8: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800dabc: d107 bne.n 800dace <HAL_RCCEx_GetPeriphCLKFreq+0x60e>
- {
- HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
- 800dabe: f107 030c add.w r3, r7, #12
- 800dac2: 4618 mov r0, r3
- 800dac4: f000 fbe6 bl 800e294 <HAL_RCCEx_GetPLL3ClockFreq>
- frequency = pll3_clocks.PLL3_P_Frequency;
- 800dac8: 68fb ldr r3, [r7, #12]
- 800daca: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800dacc: e26f b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800dace: 2300 movs r3, #0
- 800dad0: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dad2: e26c b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SPI123CLKSOURCE_CLKP: /* CKPER is the clock source for SPI123 */
- {
- ckpclocksource = __HAL_RCC_GET_CLKP_SOURCE();
- 800dad4: 4b64 ldr r3, [pc, #400] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800dad6: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800dad8: f003 5340 and.w r3, r3, #805306368 @ 0x30000000
- 800dadc: 637b str r3, [r7, #52] @ 0x34
- if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI))
- 800dade: 4b62 ldr r3, [pc, #392] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800dae0: 681b ldr r3, [r3, #0]
- 800dae2: f003 0304 and.w r3, r3, #4
- 800dae6: 2b04 cmp r3, #4
- 800dae8: d10c bne.n 800db04 <HAL_RCCEx_GetPeriphCLKFreq+0x644>
- 800daea: 6b7b ldr r3, [r7, #52] @ 0x34
- 800daec: 2b00 cmp r3, #0
- 800daee: d109 bne.n 800db04 <HAL_RCCEx_GetPeriphCLKFreq+0x644>
- {
- /* In Case the CKPER Source is HSI */
- frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
- 800daf0: 4b5d ldr r3, [pc, #372] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800daf2: 681b ldr r3, [r3, #0]
- 800daf4: 08db lsrs r3, r3, #3
- 800daf6: f003 0303 and.w r3, r3, #3
- 800dafa: 4a5c ldr r2, [pc, #368] @ (800dc6c <HAL_RCCEx_GetPeriphCLKFreq+0x7ac>)
- 800dafc: fa22 f303 lsr.w r3, r2, r3
- 800db00: 63fb str r3, [r7, #60] @ 0x3c
- 800db02: e01e b.n 800db42 <HAL_RCCEx_GetPeriphCLKFreq+0x682>
- }
- else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI))
- 800db04: 4b58 ldr r3, [pc, #352] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800db06: 681b ldr r3, [r3, #0]
- 800db08: f403 7380 and.w r3, r3, #256 @ 0x100
- 800db0c: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800db10: d106 bne.n 800db20 <HAL_RCCEx_GetPeriphCLKFreq+0x660>
- 800db12: 6b7b ldr r3, [r7, #52] @ 0x34
- 800db14: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
- 800db18: d102 bne.n 800db20 <HAL_RCCEx_GetPeriphCLKFreq+0x660>
- {
- /* In Case the CKPER Source is CSI */
- frequency = CSI_VALUE;
- 800db1a: 4b55 ldr r3, [pc, #340] @ (800dc70 <HAL_RCCEx_GetPeriphCLKFreq+0x7b0>)
- 800db1c: 63fb str r3, [r7, #60] @ 0x3c
- 800db1e: e010 b.n 800db42 <HAL_RCCEx_GetPeriphCLKFreq+0x682>
- }
- else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE))
- 800db20: 4b51 ldr r3, [pc, #324] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800db22: 681b ldr r3, [r3, #0]
- 800db24: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800db28: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800db2c: d106 bne.n 800db3c <HAL_RCCEx_GetPeriphCLKFreq+0x67c>
- 800db2e: 6b7b ldr r3, [r7, #52] @ 0x34
- 800db30: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800db34: d102 bne.n 800db3c <HAL_RCCEx_GetPeriphCLKFreq+0x67c>
- {
- /* In Case the CKPER Source is HSE */
- frequency = HSE_VALUE;
- 800db36: 4b4f ldr r3, [pc, #316] @ (800dc74 <HAL_RCCEx_GetPeriphCLKFreq+0x7b4>)
- 800db38: 63fb str r3, [r7, #60] @ 0x3c
- 800db3a: e002 b.n 800db42 <HAL_RCCEx_GetPeriphCLKFreq+0x682>
- }
- else
- {
- /* In Case the CKPER is disabled*/
- frequency = 0;
- 800db3c: 2300 movs r3, #0
- 800db3e: 63fb str r3, [r7, #60] @ 0x3c
- }
- break;
- 800db40: e235 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- 800db42: e234 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case (RCC_SPI123CLKSOURCE_PIN): /* External clock is the clock source for I2S */
- {
- frequency = EXTERNAL_CLOCK_VALUE;
- 800db44: 4b4c ldr r3, [pc, #304] @ (800dc78 <HAL_RCCEx_GetPeriphCLKFreq+0x7b8>)
- 800db46: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800db48: e231 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- default :
- {
- frequency = 0;
- 800db4a: 2300 movs r3, #0
- 800db4c: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800db4e: e22e b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- }
- }
- else if (PeriphClk == RCC_PERIPHCLK_SPI45)
- 800db50: e9d7 2300 ldrd r2, r3, [r7]
- 800db54: f5a2 5100 sub.w r1, r2, #8192 @ 0x2000
- 800db58: 430b orrs r3, r1
- 800db5a: f040 808f bne.w 800dc7c <HAL_RCCEx_GetPeriphCLKFreq+0x7bc>
- {
- /* Get SPI45 clock source */
- srcclk = __HAL_RCC_GET_SPI45_SOURCE();
- 800db5e: 4b42 ldr r3, [pc, #264] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800db60: 6d1b ldr r3, [r3, #80] @ 0x50
- 800db62: f403 23e0 and.w r3, r3, #458752 @ 0x70000
- 800db66: 63bb str r3, [r7, #56] @ 0x38
- switch (srcclk)
- 800db68: 6bbb ldr r3, [r7, #56] @ 0x38
- 800db6a: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
- 800db6e: d06b beq.n 800dc48 <HAL_RCCEx_GetPeriphCLKFreq+0x788>
- 800db70: 6bbb ldr r3, [r7, #56] @ 0x38
- 800db72: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
- 800db76: d874 bhi.n 800dc62 <HAL_RCCEx_GetPeriphCLKFreq+0x7a2>
- 800db78: 6bbb ldr r3, [r7, #56] @ 0x38
- 800db7a: f5b3 2f80 cmp.w r3, #262144 @ 0x40000
- 800db7e: d056 beq.n 800dc2e <HAL_RCCEx_GetPeriphCLKFreq+0x76e>
- 800db80: 6bbb ldr r3, [r7, #56] @ 0x38
- 800db82: f5b3 2f80 cmp.w r3, #262144 @ 0x40000
- 800db86: d86c bhi.n 800dc62 <HAL_RCCEx_GetPeriphCLKFreq+0x7a2>
- 800db88: 6bbb ldr r3, [r7, #56] @ 0x38
- 800db8a: f5b3 3f40 cmp.w r3, #196608 @ 0x30000
- 800db8e: d03b beq.n 800dc08 <HAL_RCCEx_GetPeriphCLKFreq+0x748>
- 800db90: 6bbb ldr r3, [r7, #56] @ 0x38
- 800db92: f5b3 3f40 cmp.w r3, #196608 @ 0x30000
- 800db96: d864 bhi.n 800dc62 <HAL_RCCEx_GetPeriphCLKFreq+0x7a2>
- 800db98: 6bbb ldr r3, [r7, #56] @ 0x38
- 800db9a: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800db9e: d021 beq.n 800dbe4 <HAL_RCCEx_GetPeriphCLKFreq+0x724>
- 800dba0: 6bbb ldr r3, [r7, #56] @ 0x38
- 800dba2: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800dba6: d85c bhi.n 800dc62 <HAL_RCCEx_GetPeriphCLKFreq+0x7a2>
- 800dba8: 6bbb ldr r3, [r7, #56] @ 0x38
- 800dbaa: 2b00 cmp r3, #0
- 800dbac: d004 beq.n 800dbb8 <HAL_RCCEx_GetPeriphCLKFreq+0x6f8>
- 800dbae: 6bbb ldr r3, [r7, #56] @ 0x38
- 800dbb0: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
- 800dbb4: d004 beq.n 800dbc0 <HAL_RCCEx_GetPeriphCLKFreq+0x700>
- 800dbb6: e054 b.n 800dc62 <HAL_RCCEx_GetPeriphCLKFreq+0x7a2>
- {
- case RCC_SPI45CLKSOURCE_PCLK2: /* CD/D2 PCLK2 is the clock source for SPI4/5 */
- {
- frequency = HAL_RCC_GetPCLK1Freq();
- 800dbb8: f7fe fa26 bl 800c008 <HAL_RCC_GetPCLK1Freq>
- 800dbbc: 63f8 str r0, [r7, #60] @ 0x3c
- break;
- 800dbbe: e1f6 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SPI45CLKSOURCE_PLL2: /* PLL2 is the clock source for SPI45 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY))
- 800dbc0: 4b29 ldr r3, [pc, #164] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800dbc2: 681b ldr r3, [r3, #0]
- 800dbc4: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
- 800dbc8: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
- 800dbcc: d107 bne.n 800dbde <HAL_RCCEx_GetPeriphCLKFreq+0x71e>
- {
- HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
- 800dbce: f107 0318 add.w r3, r7, #24
- 800dbd2: 4618 mov r0, r3
- 800dbd4: f000 fa0a bl 800dfec <HAL_RCCEx_GetPLL2ClockFreq>
- frequency = pll2_clocks.PLL2_Q_Frequency;
- 800dbd8: 69fb ldr r3, [r7, #28]
- 800dbda: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800dbdc: e1e7 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800dbde: 2300 movs r3, #0
- 800dbe0: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dbe2: e1e4 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SPI45CLKSOURCE_PLL3: /* PLL3 is the clock source for SPI45 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY))
- 800dbe4: 4b20 ldr r3, [pc, #128] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800dbe6: 681b ldr r3, [r3, #0]
- 800dbe8: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
- 800dbec: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800dbf0: d107 bne.n 800dc02 <HAL_RCCEx_GetPeriphCLKFreq+0x742>
- {
- HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
- 800dbf2: f107 030c add.w r3, r7, #12
- 800dbf6: 4618 mov r0, r3
- 800dbf8: f000 fb4c bl 800e294 <HAL_RCCEx_GetPLL3ClockFreq>
- frequency = pll3_clocks.PLL3_Q_Frequency;
- 800dbfc: 693b ldr r3, [r7, #16]
- 800dbfe: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800dc00: e1d5 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800dc02: 2300 movs r3, #0
- 800dc04: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dc06: e1d2 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SPI45CLKSOURCE_HSI: /* HSI is the clock source for SPI45 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))
- 800dc08: 4b17 ldr r3, [pc, #92] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800dc0a: 681b ldr r3, [r3, #0]
- 800dc0c: f003 0304 and.w r3, r3, #4
- 800dc10: 2b04 cmp r3, #4
- 800dc12: d109 bne.n 800dc28 <HAL_RCCEx_GetPeriphCLKFreq+0x768>
- {
- frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
- 800dc14: 4b14 ldr r3, [pc, #80] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800dc16: 681b ldr r3, [r3, #0]
- 800dc18: 08db lsrs r3, r3, #3
- 800dc1a: f003 0303 and.w r3, r3, #3
- 800dc1e: 4a13 ldr r2, [pc, #76] @ (800dc6c <HAL_RCCEx_GetPeriphCLKFreq+0x7ac>)
- 800dc20: fa22 f303 lsr.w r3, r2, r3
- 800dc24: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800dc26: e1c2 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800dc28: 2300 movs r3, #0
- 800dc2a: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dc2c: e1bf b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SPI45CLKSOURCE_CSI: /* CSI is the clock source for SPI45 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY))
- 800dc2e: 4b0e ldr r3, [pc, #56] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800dc30: 681b ldr r3, [r3, #0]
- 800dc32: f403 7380 and.w r3, r3, #256 @ 0x100
- 800dc36: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800dc3a: d102 bne.n 800dc42 <HAL_RCCEx_GetPeriphCLKFreq+0x782>
- {
- frequency = CSI_VALUE;
- 800dc3c: 4b0c ldr r3, [pc, #48] @ (800dc70 <HAL_RCCEx_GetPeriphCLKFreq+0x7b0>)
- 800dc3e: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800dc40: e1b5 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800dc42: 2300 movs r3, #0
- 800dc44: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dc46: e1b2 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SPI45CLKSOURCE_HSE: /* HSE is the clock source for SPI45 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))
- 800dc48: 4b07 ldr r3, [pc, #28] @ (800dc68 <HAL_RCCEx_GetPeriphCLKFreq+0x7a8>)
- 800dc4a: 681b ldr r3, [r3, #0]
- 800dc4c: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800dc50: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800dc54: d102 bne.n 800dc5c <HAL_RCCEx_GetPeriphCLKFreq+0x79c>
- {
- frequency = HSE_VALUE;
- 800dc56: 4b07 ldr r3, [pc, #28] @ (800dc74 <HAL_RCCEx_GetPeriphCLKFreq+0x7b4>)
- 800dc58: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800dc5a: e1a8 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800dc5c: 2300 movs r3, #0
- 800dc5e: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dc60: e1a5 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- default :
- {
- frequency = 0;
- 800dc62: 2300 movs r3, #0
- 800dc64: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dc66: e1a2 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- 800dc68: 58024400 .word 0x58024400
- 800dc6c: 03d09000 .word 0x03d09000
- 800dc70: 003d0900 .word 0x003d0900
- 800dc74: 017d7840 .word 0x017d7840
- 800dc78: 00bb8000 .word 0x00bb8000
- }
- }
- }
- else if (PeriphClk == RCC_PERIPHCLK_ADC)
- 800dc7c: e9d7 2300 ldrd r2, r3, [r7]
- 800dc80: f5a2 2100 sub.w r1, r2, #524288 @ 0x80000
- 800dc84: 430b orrs r3, r1
- 800dc86: d173 bne.n 800dd70 <HAL_RCCEx_GetPeriphCLKFreq+0x8b0>
- {
- /* Get ADC clock source */
- srcclk = __HAL_RCC_GET_ADC_SOURCE();
- 800dc88: 4b9c ldr r3, [pc, #624] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800dc8a: 6d9b ldr r3, [r3, #88] @ 0x58
- 800dc8c: f403 3340 and.w r3, r3, #196608 @ 0x30000
- 800dc90: 63bb str r3, [r7, #56] @ 0x38
- switch (srcclk)
- 800dc92: 6bbb ldr r3, [r7, #56] @ 0x38
- 800dc94: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800dc98: d02f beq.n 800dcfa <HAL_RCCEx_GetPeriphCLKFreq+0x83a>
- 800dc9a: 6bbb ldr r3, [r7, #56] @ 0x38
- 800dc9c: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800dca0: d863 bhi.n 800dd6a <HAL_RCCEx_GetPeriphCLKFreq+0x8aa>
- 800dca2: 6bbb ldr r3, [r7, #56] @ 0x38
- 800dca4: 2b00 cmp r3, #0
- 800dca6: d004 beq.n 800dcb2 <HAL_RCCEx_GetPeriphCLKFreq+0x7f2>
- 800dca8: 6bbb ldr r3, [r7, #56] @ 0x38
- 800dcaa: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
- 800dcae: d012 beq.n 800dcd6 <HAL_RCCEx_GetPeriphCLKFreq+0x816>
- 800dcb0: e05b b.n 800dd6a <HAL_RCCEx_GetPeriphCLKFreq+0x8aa>
- {
- case RCC_ADCCLKSOURCE_PLL2:
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY))
- 800dcb2: 4b92 ldr r3, [pc, #584] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800dcb4: 681b ldr r3, [r3, #0]
- 800dcb6: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
- 800dcba: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
- 800dcbe: d107 bne.n 800dcd0 <HAL_RCCEx_GetPeriphCLKFreq+0x810>
- {
- HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
- 800dcc0: f107 0318 add.w r3, r7, #24
- 800dcc4: 4618 mov r0, r3
- 800dcc6: f000 f991 bl 800dfec <HAL_RCCEx_GetPLL2ClockFreq>
- frequency = pll2_clocks.PLL2_P_Frequency;
- 800dcca: 69bb ldr r3, [r7, #24]
- 800dccc: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800dcce: e16e b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800dcd0: 2300 movs r3, #0
- 800dcd2: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dcd4: e16b b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_ADCCLKSOURCE_PLL3:
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY))
- 800dcd6: 4b89 ldr r3, [pc, #548] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800dcd8: 681b ldr r3, [r3, #0]
- 800dcda: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
- 800dcde: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800dce2: d107 bne.n 800dcf4 <HAL_RCCEx_GetPeriphCLKFreq+0x834>
- {
- HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
- 800dce4: f107 030c add.w r3, r7, #12
- 800dce8: 4618 mov r0, r3
- 800dcea: f000 fad3 bl 800e294 <HAL_RCCEx_GetPLL3ClockFreq>
- frequency = pll3_clocks.PLL3_R_Frequency;
- 800dcee: 697b ldr r3, [r7, #20]
- 800dcf0: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800dcf2: e15c b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800dcf4: 2300 movs r3, #0
- 800dcf6: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dcf8: e159 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_ADCCLKSOURCE_CLKP:
- {
- ckpclocksource = __HAL_RCC_GET_CLKP_SOURCE();
- 800dcfa: 4b80 ldr r3, [pc, #512] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800dcfc: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800dcfe: f003 5340 and.w r3, r3, #805306368 @ 0x30000000
- 800dd02: 637b str r3, [r7, #52] @ 0x34
- if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI))
- 800dd04: 4b7d ldr r3, [pc, #500] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800dd06: 681b ldr r3, [r3, #0]
- 800dd08: f003 0304 and.w r3, r3, #4
- 800dd0c: 2b04 cmp r3, #4
- 800dd0e: d10c bne.n 800dd2a <HAL_RCCEx_GetPeriphCLKFreq+0x86a>
- 800dd10: 6b7b ldr r3, [r7, #52] @ 0x34
- 800dd12: 2b00 cmp r3, #0
- 800dd14: d109 bne.n 800dd2a <HAL_RCCEx_GetPeriphCLKFreq+0x86a>
- {
- /* In Case the CKPER Source is HSI */
- frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
- 800dd16: 4b79 ldr r3, [pc, #484] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800dd18: 681b ldr r3, [r3, #0]
- 800dd1a: 08db lsrs r3, r3, #3
- 800dd1c: f003 0303 and.w r3, r3, #3
- 800dd20: 4a77 ldr r2, [pc, #476] @ (800df00 <HAL_RCCEx_GetPeriphCLKFreq+0xa40>)
- 800dd22: fa22 f303 lsr.w r3, r2, r3
- 800dd26: 63fb str r3, [r7, #60] @ 0x3c
- 800dd28: e01e b.n 800dd68 <HAL_RCCEx_GetPeriphCLKFreq+0x8a8>
- }
- else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI))
- 800dd2a: 4b74 ldr r3, [pc, #464] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800dd2c: 681b ldr r3, [r3, #0]
- 800dd2e: f403 7380 and.w r3, r3, #256 @ 0x100
- 800dd32: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800dd36: d106 bne.n 800dd46 <HAL_RCCEx_GetPeriphCLKFreq+0x886>
- 800dd38: 6b7b ldr r3, [r7, #52] @ 0x34
- 800dd3a: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
- 800dd3e: d102 bne.n 800dd46 <HAL_RCCEx_GetPeriphCLKFreq+0x886>
- {
- /* In Case the CKPER Source is CSI */
- frequency = CSI_VALUE;
- 800dd40: 4b70 ldr r3, [pc, #448] @ (800df04 <HAL_RCCEx_GetPeriphCLKFreq+0xa44>)
- 800dd42: 63fb str r3, [r7, #60] @ 0x3c
- 800dd44: e010 b.n 800dd68 <HAL_RCCEx_GetPeriphCLKFreq+0x8a8>
- }
- else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE))
- 800dd46: 4b6d ldr r3, [pc, #436] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800dd48: 681b ldr r3, [r3, #0]
- 800dd4a: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800dd4e: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800dd52: d106 bne.n 800dd62 <HAL_RCCEx_GetPeriphCLKFreq+0x8a2>
- 800dd54: 6b7b ldr r3, [r7, #52] @ 0x34
- 800dd56: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800dd5a: d102 bne.n 800dd62 <HAL_RCCEx_GetPeriphCLKFreq+0x8a2>
- {
- /* In Case the CKPER Source is HSE */
- frequency = HSE_VALUE;
- 800dd5c: 4b6a ldr r3, [pc, #424] @ (800df08 <HAL_RCCEx_GetPeriphCLKFreq+0xa48>)
- 800dd5e: 63fb str r3, [r7, #60] @ 0x3c
- 800dd60: e002 b.n 800dd68 <HAL_RCCEx_GetPeriphCLKFreq+0x8a8>
- }
- else
- {
- /* In Case the CKPER is disabled*/
- frequency = 0;
- 800dd62: 2300 movs r3, #0
- 800dd64: 63fb str r3, [r7, #60] @ 0x3c
- }
- break;
- 800dd66: e122 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- 800dd68: e121 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- default :
- {
- frequency = 0;
- 800dd6a: 2300 movs r3, #0
- 800dd6c: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dd6e: e11e b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- }
- }
- else if (PeriphClk == RCC_PERIPHCLK_SDMMC)
- 800dd70: e9d7 2300 ldrd r2, r3, [r7]
- 800dd74: f5a2 3180 sub.w r1, r2, #65536 @ 0x10000
- 800dd78: 430b orrs r3, r1
- 800dd7a: d133 bne.n 800dde4 <HAL_RCCEx_GetPeriphCLKFreq+0x924>
- {
- /* Get SDMMC clock source */
- srcclk = __HAL_RCC_GET_SDMMC_SOURCE();
- 800dd7c: 4b5f ldr r3, [pc, #380] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800dd7e: 6cdb ldr r3, [r3, #76] @ 0x4c
- 800dd80: f403 3380 and.w r3, r3, #65536 @ 0x10000
- 800dd84: 63bb str r3, [r7, #56] @ 0x38
- switch (srcclk)
- 800dd86: 6bbb ldr r3, [r7, #56] @ 0x38
- 800dd88: 2b00 cmp r3, #0
- 800dd8a: d004 beq.n 800dd96 <HAL_RCCEx_GetPeriphCLKFreq+0x8d6>
- 800dd8c: 6bbb ldr r3, [r7, #56] @ 0x38
- 800dd8e: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
- 800dd92: d012 beq.n 800ddba <HAL_RCCEx_GetPeriphCLKFreq+0x8fa>
- 800dd94: e023 b.n 800ddde <HAL_RCCEx_GetPeriphCLKFreq+0x91e>
- {
- case RCC_SDMMCCLKSOURCE_PLL: /* PLL1 is the clock source for SDMMC */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY))
- 800dd96: 4b59 ldr r3, [pc, #356] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800dd98: 681b ldr r3, [r3, #0]
- 800dd9a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
- 800dd9e: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000
- 800dda2: d107 bne.n 800ddb4 <HAL_RCCEx_GetPeriphCLKFreq+0x8f4>
- {
- HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
- 800dda4: f107 0324 add.w r3, r7, #36 @ 0x24
- 800dda8: 4618 mov r0, r3
- 800ddaa: f000 fbc7 bl 800e53c <HAL_RCCEx_GetPLL1ClockFreq>
- frequency = pll1_clocks.PLL1_Q_Frequency;
- 800ddae: 6abb ldr r3, [r7, #40] @ 0x28
- 800ddb0: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800ddb2: e0fc b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800ddb4: 2300 movs r3, #0
- 800ddb6: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800ddb8: e0f9 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SDMMCCLKSOURCE_PLL2: /* PLL2 is the clock source for SDMMC */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY))
- 800ddba: 4b50 ldr r3, [pc, #320] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800ddbc: 681b ldr r3, [r3, #0]
- 800ddbe: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
- 800ddc2: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
- 800ddc6: d107 bne.n 800ddd8 <HAL_RCCEx_GetPeriphCLKFreq+0x918>
- {
- HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
- 800ddc8: f107 0318 add.w r3, r7, #24
- 800ddcc: 4618 mov r0, r3
- 800ddce: f000 f90d bl 800dfec <HAL_RCCEx_GetPLL2ClockFreq>
- frequency = pll2_clocks.PLL2_R_Frequency;
- 800ddd2: 6a3b ldr r3, [r7, #32]
- 800ddd4: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800ddd6: e0ea b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800ddd8: 2300 movs r3, #0
- 800ddda: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dddc: e0e7 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- default :
- {
- frequency = 0;
- 800ddde: 2300 movs r3, #0
- 800dde0: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dde2: e0e4 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- }
- }
- else if (PeriphClk == RCC_PERIPHCLK_SPI6)
- 800dde4: e9d7 2300 ldrd r2, r3, [r7]
- 800dde8: f5a2 4180 sub.w r1, r2, #16384 @ 0x4000
- 800ddec: 430b orrs r3, r1
- 800ddee: f040 808d bne.w 800df0c <HAL_RCCEx_GetPeriphCLKFreq+0xa4c>
- {
- /* Get SPI6 clock source */
- srcclk = __HAL_RCC_GET_SPI6_SOURCE();
- 800ddf2: 4b42 ldr r3, [pc, #264] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800ddf4: 6d9b ldr r3, [r3, #88] @ 0x58
- 800ddf6: f003 43e0 and.w r3, r3, #1879048192 @ 0x70000000
- 800ddfa: 63bb str r3, [r7, #56] @ 0x38
- switch (srcclk)
- 800ddfc: 6bbb ldr r3, [r7, #56] @ 0x38
- 800ddfe: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
- 800de02: d06b beq.n 800dedc <HAL_RCCEx_GetPeriphCLKFreq+0xa1c>
- 800de04: 6bbb ldr r3, [r7, #56] @ 0x38
- 800de06: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
- 800de0a: d874 bhi.n 800def6 <HAL_RCCEx_GetPeriphCLKFreq+0xa36>
- 800de0c: 6bbb ldr r3, [r7, #56] @ 0x38
- 800de0e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 800de12: d056 beq.n 800dec2 <HAL_RCCEx_GetPeriphCLKFreq+0xa02>
- 800de14: 6bbb ldr r3, [r7, #56] @ 0x38
- 800de16: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 800de1a: d86c bhi.n 800def6 <HAL_RCCEx_GetPeriphCLKFreq+0xa36>
- 800de1c: 6bbb ldr r3, [r7, #56] @ 0x38
- 800de1e: f1b3 5f40 cmp.w r3, #805306368 @ 0x30000000
- 800de22: d03b beq.n 800de9c <HAL_RCCEx_GetPeriphCLKFreq+0x9dc>
- 800de24: 6bbb ldr r3, [r7, #56] @ 0x38
- 800de26: f1b3 5f40 cmp.w r3, #805306368 @ 0x30000000
- 800de2a: d864 bhi.n 800def6 <HAL_RCCEx_GetPeriphCLKFreq+0xa36>
- 800de2c: 6bbb ldr r3, [r7, #56] @ 0x38
- 800de2e: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800de32: d021 beq.n 800de78 <HAL_RCCEx_GetPeriphCLKFreq+0x9b8>
- 800de34: 6bbb ldr r3, [r7, #56] @ 0x38
- 800de36: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800de3a: d85c bhi.n 800def6 <HAL_RCCEx_GetPeriphCLKFreq+0xa36>
- 800de3c: 6bbb ldr r3, [r7, #56] @ 0x38
- 800de3e: 2b00 cmp r3, #0
- 800de40: d004 beq.n 800de4c <HAL_RCCEx_GetPeriphCLKFreq+0x98c>
- 800de42: 6bbb ldr r3, [r7, #56] @ 0x38
- 800de44: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
- 800de48: d004 beq.n 800de54 <HAL_RCCEx_GetPeriphCLKFreq+0x994>
- 800de4a: e054 b.n 800def6 <HAL_RCCEx_GetPeriphCLKFreq+0xa36>
- {
- case RCC_SPI6CLKSOURCE_D3PCLK1: /* D3PCLK1 (PCLK4) is the clock source for SPI6 */
- {
- frequency = HAL_RCCEx_GetD3PCLK1Freq();
- 800de4c: f000 f8b8 bl 800dfc0 <HAL_RCCEx_GetD3PCLK1Freq>
- 800de50: 63f8 str r0, [r7, #60] @ 0x3c
- break;
- 800de52: e0ac b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SPI6CLKSOURCE_PLL2: /* PLL2 is the clock source for SPI6 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY))
- 800de54: 4b29 ldr r3, [pc, #164] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800de56: 681b ldr r3, [r3, #0]
- 800de58: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
- 800de5c: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
- 800de60: d107 bne.n 800de72 <HAL_RCCEx_GetPeriphCLKFreq+0x9b2>
- {
- HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
- 800de62: f107 0318 add.w r3, r7, #24
- 800de66: 4618 mov r0, r3
- 800de68: f000 f8c0 bl 800dfec <HAL_RCCEx_GetPLL2ClockFreq>
- frequency = pll2_clocks.PLL2_Q_Frequency;
- 800de6c: 69fb ldr r3, [r7, #28]
- 800de6e: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800de70: e09d b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800de72: 2300 movs r3, #0
- 800de74: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800de76: e09a b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SPI6CLKSOURCE_PLL3: /* PLL3 is the clock source for SPI6 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY))
- 800de78: 4b20 ldr r3, [pc, #128] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800de7a: 681b ldr r3, [r3, #0]
- 800de7c: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
- 800de80: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800de84: d107 bne.n 800de96 <HAL_RCCEx_GetPeriphCLKFreq+0x9d6>
- {
- HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
- 800de86: f107 030c add.w r3, r7, #12
- 800de8a: 4618 mov r0, r3
- 800de8c: f000 fa02 bl 800e294 <HAL_RCCEx_GetPLL3ClockFreq>
- frequency = pll3_clocks.PLL3_Q_Frequency;
- 800de90: 693b ldr r3, [r7, #16]
- 800de92: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800de94: e08b b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800de96: 2300 movs r3, #0
- 800de98: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800de9a: e088 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SPI6CLKSOURCE_HSI: /* HSI is the clock source for SPI6 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))
- 800de9c: 4b17 ldr r3, [pc, #92] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800de9e: 681b ldr r3, [r3, #0]
- 800dea0: f003 0304 and.w r3, r3, #4
- 800dea4: 2b04 cmp r3, #4
- 800dea6: d109 bne.n 800debc <HAL_RCCEx_GetPeriphCLKFreq+0x9fc>
- {
- frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
- 800dea8: 4b14 ldr r3, [pc, #80] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800deaa: 681b ldr r3, [r3, #0]
- 800deac: 08db lsrs r3, r3, #3
- 800deae: f003 0303 and.w r3, r3, #3
- 800deb2: 4a13 ldr r2, [pc, #76] @ (800df00 <HAL_RCCEx_GetPeriphCLKFreq+0xa40>)
- 800deb4: fa22 f303 lsr.w r3, r2, r3
- 800deb8: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800deba: e078 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800debc: 2300 movs r3, #0
- 800debe: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dec0: e075 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SPI6CLKSOURCE_CSI: /* CSI is the clock source for SPI6 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY))
- 800dec2: 4b0e ldr r3, [pc, #56] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800dec4: 681b ldr r3, [r3, #0]
- 800dec6: f403 7380 and.w r3, r3, #256 @ 0x100
- 800deca: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 800dece: d102 bne.n 800ded6 <HAL_RCCEx_GetPeriphCLKFreq+0xa16>
- {
- frequency = CSI_VALUE;
- 800ded0: 4b0c ldr r3, [pc, #48] @ (800df04 <HAL_RCCEx_GetPeriphCLKFreq+0xa44>)
- 800ded2: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800ded4: e06b b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800ded6: 2300 movs r3, #0
- 800ded8: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800deda: e068 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_SPI6CLKSOURCE_HSE: /* HSE is the clock source for SPI6 */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))
- 800dedc: 4b07 ldr r3, [pc, #28] @ (800defc <HAL_RCCEx_GetPeriphCLKFreq+0xa3c>)
- 800dede: 681b ldr r3, [r3, #0]
- 800dee0: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800dee4: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800dee8: d102 bne.n 800def0 <HAL_RCCEx_GetPeriphCLKFreq+0xa30>
- {
- frequency = HSE_VALUE;
- 800deea: 4b07 ldr r3, [pc, #28] @ (800df08 <HAL_RCCEx_GetPeriphCLKFreq+0xa48>)
- 800deec: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800deee: e05e b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800def0: 2300 movs r3, #0
- 800def2: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800def4: e05b b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- break;
- }
- #endif /* RCC_SPI6CLKSOURCE_PIN */
- default :
- {
- frequency = 0;
- 800def6: 2300 movs r3, #0
- 800def8: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800defa: e058 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- 800defc: 58024400 .word 0x58024400
- 800df00: 03d09000 .word 0x03d09000
- 800df04: 003d0900 .word 0x003d0900
- 800df08: 017d7840 .word 0x017d7840
- }
- }
- }
- else if (PeriphClk == RCC_PERIPHCLK_FDCAN)
- 800df0c: e9d7 2300 ldrd r2, r3, [r7]
- 800df10: f5a2 4100 sub.w r1, r2, #32768 @ 0x8000
- 800df14: 430b orrs r3, r1
- 800df16: d148 bne.n 800dfaa <HAL_RCCEx_GetPeriphCLKFreq+0xaea>
- {
- /* Get FDCAN clock source */
- srcclk = __HAL_RCC_GET_FDCAN_SOURCE();
- 800df18: 4b27 ldr r3, [pc, #156] @ (800dfb8 <HAL_RCCEx_GetPeriphCLKFreq+0xaf8>)
- 800df1a: 6d1b ldr r3, [r3, #80] @ 0x50
- 800df1c: f003 5340 and.w r3, r3, #805306368 @ 0x30000000
- 800df20: 63bb str r3, [r7, #56] @ 0x38
- switch (srcclk)
- 800df22: 6bbb ldr r3, [r7, #56] @ 0x38
- 800df24: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800df28: d02a beq.n 800df80 <HAL_RCCEx_GetPeriphCLKFreq+0xac0>
- 800df2a: 6bbb ldr r3, [r7, #56] @ 0x38
- 800df2c: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 800df30: d838 bhi.n 800dfa4 <HAL_RCCEx_GetPeriphCLKFreq+0xae4>
- 800df32: 6bbb ldr r3, [r7, #56] @ 0x38
- 800df34: 2b00 cmp r3, #0
- 800df36: d004 beq.n 800df42 <HAL_RCCEx_GetPeriphCLKFreq+0xa82>
- 800df38: 6bbb ldr r3, [r7, #56] @ 0x38
- 800df3a: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
- 800df3e: d00d beq.n 800df5c <HAL_RCCEx_GetPeriphCLKFreq+0xa9c>
- 800df40: e030 b.n 800dfa4 <HAL_RCCEx_GetPeriphCLKFreq+0xae4>
- {
- case RCC_FDCANCLKSOURCE_HSE: /* HSE is the clock source for FDCAN */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))
- 800df42: 4b1d ldr r3, [pc, #116] @ (800dfb8 <HAL_RCCEx_GetPeriphCLKFreq+0xaf8>)
- 800df44: 681b ldr r3, [r3, #0]
- 800df46: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800df4a: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
- 800df4e: d102 bne.n 800df56 <HAL_RCCEx_GetPeriphCLKFreq+0xa96>
- {
- frequency = HSE_VALUE;
- 800df50: 4b1a ldr r3, [pc, #104] @ (800dfbc <HAL_RCCEx_GetPeriphCLKFreq+0xafc>)
- 800df52: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800df54: e02b b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800df56: 2300 movs r3, #0
- 800df58: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800df5a: e028 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_FDCANCLKSOURCE_PLL: /* PLL is the clock source for FDCAN */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY))
- 800df5c: 4b16 ldr r3, [pc, #88] @ (800dfb8 <HAL_RCCEx_GetPeriphCLKFreq+0xaf8>)
- 800df5e: 681b ldr r3, [r3, #0]
- 800df60: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
- 800df64: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000
- 800df68: d107 bne.n 800df7a <HAL_RCCEx_GetPeriphCLKFreq+0xaba>
- {
- HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
- 800df6a: f107 0324 add.w r3, r7, #36 @ 0x24
- 800df6e: 4618 mov r0, r3
- 800df70: f000 fae4 bl 800e53c <HAL_RCCEx_GetPLL1ClockFreq>
- frequency = pll1_clocks.PLL1_Q_Frequency;
- 800df74: 6abb ldr r3, [r7, #40] @ 0x28
- 800df76: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800df78: e019 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800df7a: 2300 movs r3, #0
- 800df7c: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800df7e: e016 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- case RCC_FDCANCLKSOURCE_PLL2: /* PLL2 is the clock source for FDCAN */
- {
- if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY))
- 800df80: 4b0d ldr r3, [pc, #52] @ (800dfb8 <HAL_RCCEx_GetPeriphCLKFreq+0xaf8>)
- 800df82: 681b ldr r3, [r3, #0]
- 800df84: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
- 800df88: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
- 800df8c: d107 bne.n 800df9e <HAL_RCCEx_GetPeriphCLKFreq+0xade>
- {
- HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
- 800df8e: f107 0318 add.w r3, r7, #24
- 800df92: 4618 mov r0, r3
- 800df94: f000 f82a bl 800dfec <HAL_RCCEx_GetPLL2ClockFreq>
- frequency = pll2_clocks.PLL2_Q_Frequency;
- 800df98: 69fb ldr r3, [r7, #28]
- 800df9a: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- frequency = 0;
- }
- break;
- 800df9c: e007 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- frequency = 0;
- 800df9e: 2300 movs r3, #0
- 800dfa0: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dfa2: e004 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- default :
- {
- frequency = 0;
- 800dfa4: 2300 movs r3, #0
- 800dfa6: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 800dfa8: e001 b.n 800dfae <HAL_RCCEx_GetPeriphCLKFreq+0xaee>
- }
- }
- }
- else
- {
- frequency = 0;
- 800dfaa: 2300 movs r3, #0
- 800dfac: 63fb str r3, [r7, #60] @ 0x3c
- }
- return frequency;
- 800dfae: 6bfb ldr r3, [r7, #60] @ 0x3c
- }
- 800dfb0: 4618 mov r0, r3
- 800dfb2: 3740 adds r7, #64 @ 0x40
- 800dfb4: 46bd mov sp, r7
- 800dfb6: bd80 pop {r7, pc}
- 800dfb8: 58024400 .word 0x58024400
- 800dfbc: 017d7840 .word 0x017d7840
- 0800dfc0 <HAL_RCCEx_GetD3PCLK1Freq>:
- * @note Each time D3PCLK1 changes, this function must be called to update the
- * right D3PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
- * @retval D3PCLK1 frequency
- */
- uint32_t HAL_RCCEx_GetD3PCLK1Freq(void)
- {
- 800dfc0: b580 push {r7, lr}
- 800dfc2: af00 add r7, sp, #0
- #if defined(RCC_D3CFGR_D3PPRE)
- /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/
- return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->D3CFGR & RCC_D3CFGR_D3PPRE) >> RCC_D3CFGR_D3PPRE_Pos] & 0x1FU));
- 800dfc4: f7fd fff0 bl 800bfa8 <HAL_RCC_GetHCLKFreq>
- 800dfc8: 4602 mov r2, r0
- 800dfca: 4b06 ldr r3, [pc, #24] @ (800dfe4 <HAL_RCCEx_GetD3PCLK1Freq+0x24>)
- 800dfcc: 6a1b ldr r3, [r3, #32]
- 800dfce: 091b lsrs r3, r3, #4
- 800dfd0: f003 0307 and.w r3, r3, #7
- 800dfd4: 4904 ldr r1, [pc, #16] @ (800dfe8 <HAL_RCCEx_GetD3PCLK1Freq+0x28>)
- 800dfd6: 5ccb ldrb r3, [r1, r3]
- 800dfd8: f003 031f and.w r3, r3, #31
- 800dfdc: fa22 f303 lsr.w r3, r2, r3
- #else
- /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/
- return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE) >> RCC_SRDCFGR_SRDPPRE_Pos] & 0x1FU));
- #endif
- }
- 800dfe0: 4618 mov r0, r3
- 800dfe2: bd80 pop {r7, pc}
- 800dfe4: 58024400 .word 0x58024400
- 800dfe8: 08018c18 .word 0x08018c18
- 0800dfec <HAL_RCCEx_GetPLL2ClockFreq>:
- * right PLL2CLK value. Otherwise, any configuration based on this function will be incorrect.
- * @param PLL2_Clocks structure.
- * @retval None
- */
- void HAL_RCCEx_GetPLL2ClockFreq(PLL2_ClocksTypeDef *PLL2_Clocks)
- {
- 800dfec: b480 push {r7}
- 800dfee: b089 sub sp, #36 @ 0x24
- 800dff0: af00 add r7, sp, #0
- 800dff2: 6078 str r0, [r7, #4]
- float_t fracn2, pll2vco;
- /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL2M) * PLL2N
- PLL2xCLK = PLL2_VCO / PLL2x
- */
- pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
- 800dff4: 4ba1 ldr r3, [pc, #644] @ (800e27c <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
- 800dff6: 6a9b ldr r3, [r3, #40] @ 0x28
- 800dff8: f003 0303 and.w r3, r3, #3
- 800dffc: 61bb str r3, [r7, #24]
- pll2m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM2) >> 12);
- 800dffe: 4b9f ldr r3, [pc, #636] @ (800e27c <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
- 800e000: 6a9b ldr r3, [r3, #40] @ 0x28
- 800e002: 0b1b lsrs r3, r3, #12
- 800e004: f003 033f and.w r3, r3, #63 @ 0x3f
- 800e008: 617b str r3, [r7, #20]
- pll2fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL2FRACEN) >> RCC_PLLCFGR_PLL2FRACEN_Pos;
- 800e00a: 4b9c ldr r3, [pc, #624] @ (800e27c <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
- 800e00c: 6adb ldr r3, [r3, #44] @ 0x2c
- 800e00e: 091b lsrs r3, r3, #4
- 800e010: f003 0301 and.w r3, r3, #1
- 800e014: 613b str r3, [r7, #16]
- fracn2 = (float_t)(uint32_t)(pll2fracen * ((RCC->PLL2FRACR & RCC_PLL2FRACR_FRACN2) >> 3));
- 800e016: 4b99 ldr r3, [pc, #612] @ (800e27c <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
- 800e018: 6bdb ldr r3, [r3, #60] @ 0x3c
- 800e01a: 08db lsrs r3, r3, #3
- 800e01c: f3c3 030c ubfx r3, r3, #0, #13
- 800e020: 693a ldr r2, [r7, #16]
- 800e022: fb02 f303 mul.w r3, r2, r3
- 800e026: ee07 3a90 vmov s15, r3
- 800e02a: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e02e: edc7 7a03 vstr s15, [r7, #12]
- if (pll2m != 0U)
- 800e032: 697b ldr r3, [r7, #20]
- 800e034: 2b00 cmp r3, #0
- 800e036: f000 8111 beq.w 800e25c <HAL_RCCEx_GetPLL2ClockFreq+0x270>
- {
- switch (pllsource)
- 800e03a: 69bb ldr r3, [r7, #24]
- 800e03c: 2b02 cmp r3, #2
- 800e03e: f000 8083 beq.w 800e148 <HAL_RCCEx_GetPLL2ClockFreq+0x15c>
- 800e042: 69bb ldr r3, [r7, #24]
- 800e044: 2b02 cmp r3, #2
- 800e046: f200 80a1 bhi.w 800e18c <HAL_RCCEx_GetPLL2ClockFreq+0x1a0>
- 800e04a: 69bb ldr r3, [r7, #24]
- 800e04c: 2b00 cmp r3, #0
- 800e04e: d003 beq.n 800e058 <HAL_RCCEx_GetPLL2ClockFreq+0x6c>
- 800e050: 69bb ldr r3, [r7, #24]
- 800e052: 2b01 cmp r3, #1
- 800e054: d056 beq.n 800e104 <HAL_RCCEx_GetPLL2ClockFreq+0x118>
- 800e056: e099 b.n 800e18c <HAL_RCCEx_GetPLL2ClockFreq+0x1a0>
- {
- case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
- 800e058: 4b88 ldr r3, [pc, #544] @ (800e27c <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
- 800e05a: 681b ldr r3, [r3, #0]
- 800e05c: f003 0320 and.w r3, r3, #32
- 800e060: 2b00 cmp r3, #0
- 800e062: d02d beq.n 800e0c0 <HAL_RCCEx_GetPLL2ClockFreq+0xd4>
- {
- hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
- 800e064: 4b85 ldr r3, [pc, #532] @ (800e27c <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
- 800e066: 681b ldr r3, [r3, #0]
- 800e068: 08db lsrs r3, r3, #3
- 800e06a: f003 0303 and.w r3, r3, #3
- 800e06e: 4a84 ldr r2, [pc, #528] @ (800e280 <HAL_RCCEx_GetPLL2ClockFreq+0x294>)
- 800e070: fa22 f303 lsr.w r3, r2, r3
- 800e074: 60bb str r3, [r7, #8]
- pll2vco = ((float_t)hsivalue / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
- 800e076: 68bb ldr r3, [r7, #8]
- 800e078: ee07 3a90 vmov s15, r3
- 800e07c: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e080: 697b ldr r3, [r7, #20]
- 800e082: ee07 3a90 vmov s15, r3
- 800e086: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e08a: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e08e: 4b7b ldr r3, [pc, #492] @ (800e27c <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
- 800e090: 6b9b ldr r3, [r3, #56] @ 0x38
- 800e092: f3c3 0308 ubfx r3, r3, #0, #9
- 800e096: ee07 3a90 vmov s15, r3
- 800e09a: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e09e: ed97 6a03 vldr s12, [r7, #12]
- 800e0a2: eddf 5a78 vldr s11, [pc, #480] @ 800e284 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
- 800e0a6: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e0aa: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e0ae: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e0b2: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e0b6: ee67 7a27 vmul.f32 s15, s14, s15
- 800e0ba: edc7 7a07 vstr s15, [r7, #28]
- }
- else
- {
- pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
- }
- break;
- 800e0be: e087 b.n 800e1d0 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>
- pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
- 800e0c0: 697b ldr r3, [r7, #20]
- 800e0c2: ee07 3a90 vmov s15, r3
- 800e0c6: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e0ca: eddf 6a6f vldr s13, [pc, #444] @ 800e288 <HAL_RCCEx_GetPLL2ClockFreq+0x29c>
- 800e0ce: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e0d2: 4b6a ldr r3, [pc, #424] @ (800e27c <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
- 800e0d4: 6b9b ldr r3, [r3, #56] @ 0x38
- 800e0d6: f3c3 0308 ubfx r3, r3, #0, #9
- 800e0da: ee07 3a90 vmov s15, r3
- 800e0de: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e0e2: ed97 6a03 vldr s12, [r7, #12]
- 800e0e6: eddf 5a67 vldr s11, [pc, #412] @ 800e284 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
- 800e0ea: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e0ee: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e0f2: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e0f6: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e0fa: ee67 7a27 vmul.f32 s15, s14, s15
- 800e0fe: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800e102: e065 b.n 800e1d0 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>
- case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */
- pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
- 800e104: 697b ldr r3, [r7, #20]
- 800e106: ee07 3a90 vmov s15, r3
- 800e10a: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e10e: eddf 6a5f vldr s13, [pc, #380] @ 800e28c <HAL_RCCEx_GetPLL2ClockFreq+0x2a0>
- 800e112: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e116: 4b59 ldr r3, [pc, #356] @ (800e27c <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
- 800e118: 6b9b ldr r3, [r3, #56] @ 0x38
- 800e11a: f3c3 0308 ubfx r3, r3, #0, #9
- 800e11e: ee07 3a90 vmov s15, r3
- 800e122: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e126: ed97 6a03 vldr s12, [r7, #12]
- 800e12a: eddf 5a56 vldr s11, [pc, #344] @ 800e284 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
- 800e12e: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e132: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e136: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e13a: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e13e: ee67 7a27 vmul.f32 s15, s14, s15
- 800e142: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800e146: e043 b.n 800e1d0 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>
- case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
- pll2vco = ((float_t)HSE_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
- 800e148: 697b ldr r3, [r7, #20]
- 800e14a: ee07 3a90 vmov s15, r3
- 800e14e: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e152: eddf 6a4f vldr s13, [pc, #316] @ 800e290 <HAL_RCCEx_GetPLL2ClockFreq+0x2a4>
- 800e156: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e15a: 4b48 ldr r3, [pc, #288] @ (800e27c <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
- 800e15c: 6b9b ldr r3, [r3, #56] @ 0x38
- 800e15e: f3c3 0308 ubfx r3, r3, #0, #9
- 800e162: ee07 3a90 vmov s15, r3
- 800e166: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e16a: ed97 6a03 vldr s12, [r7, #12]
- 800e16e: eddf 5a45 vldr s11, [pc, #276] @ 800e284 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
- 800e172: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e176: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e17a: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e17e: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e182: ee67 7a27 vmul.f32 s15, s14, s15
- 800e186: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800e18a: e021 b.n 800e1d0 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>
- default:
- pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
- 800e18c: 697b ldr r3, [r7, #20]
- 800e18e: ee07 3a90 vmov s15, r3
- 800e192: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e196: eddf 6a3d vldr s13, [pc, #244] @ 800e28c <HAL_RCCEx_GetPLL2ClockFreq+0x2a0>
- 800e19a: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e19e: 4b37 ldr r3, [pc, #220] @ (800e27c <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
- 800e1a0: 6b9b ldr r3, [r3, #56] @ 0x38
- 800e1a2: f3c3 0308 ubfx r3, r3, #0, #9
- 800e1a6: ee07 3a90 vmov s15, r3
- 800e1aa: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e1ae: ed97 6a03 vldr s12, [r7, #12]
- 800e1b2: eddf 5a34 vldr s11, [pc, #208] @ 800e284 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
- 800e1b6: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e1ba: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e1be: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e1c2: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e1c6: ee67 7a27 vmul.f32 s15, s14, s15
- 800e1ca: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800e1ce: bf00 nop
- }
- PLL2_Clocks->PLL2_P_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_P2) >> 9) + (float_t)1)) ;
- 800e1d0: 4b2a ldr r3, [pc, #168] @ (800e27c <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
- 800e1d2: 6b9b ldr r3, [r3, #56] @ 0x38
- 800e1d4: 0a5b lsrs r3, r3, #9
- 800e1d6: f003 037f and.w r3, r3, #127 @ 0x7f
- 800e1da: ee07 3a90 vmov s15, r3
- 800e1de: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e1e2: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
- 800e1e6: ee37 7a87 vadd.f32 s14, s15, s14
- 800e1ea: edd7 6a07 vldr s13, [r7, #28]
- 800e1ee: eec6 7a87 vdiv.f32 s15, s13, s14
- 800e1f2: eefc 7ae7 vcvt.u32.f32 s15, s15
- 800e1f6: ee17 2a90 vmov r2, s15
- 800e1fa: 687b ldr r3, [r7, #4]
- 800e1fc: 601a str r2, [r3, #0]
- PLL2_Clocks->PLL2_Q_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_Q2) >> 16) + (float_t)1)) ;
- 800e1fe: 4b1f ldr r3, [pc, #124] @ (800e27c <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
- 800e200: 6b9b ldr r3, [r3, #56] @ 0x38
- 800e202: 0c1b lsrs r3, r3, #16
- 800e204: f003 037f and.w r3, r3, #127 @ 0x7f
- 800e208: ee07 3a90 vmov s15, r3
- 800e20c: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e210: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
- 800e214: ee37 7a87 vadd.f32 s14, s15, s14
- 800e218: edd7 6a07 vldr s13, [r7, #28]
- 800e21c: eec6 7a87 vdiv.f32 s15, s13, s14
- 800e220: eefc 7ae7 vcvt.u32.f32 s15, s15
- 800e224: ee17 2a90 vmov r2, s15
- 800e228: 687b ldr r3, [r7, #4]
- 800e22a: 605a str r2, [r3, #4]
- PLL2_Clocks->PLL2_R_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_R2) >> 24) + (float_t)1)) ;
- 800e22c: 4b13 ldr r3, [pc, #76] @ (800e27c <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
- 800e22e: 6b9b ldr r3, [r3, #56] @ 0x38
- 800e230: 0e1b lsrs r3, r3, #24
- 800e232: f003 037f and.w r3, r3, #127 @ 0x7f
- 800e236: ee07 3a90 vmov s15, r3
- 800e23a: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e23e: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
- 800e242: ee37 7a87 vadd.f32 s14, s15, s14
- 800e246: edd7 6a07 vldr s13, [r7, #28]
- 800e24a: eec6 7a87 vdiv.f32 s15, s13, s14
- 800e24e: eefc 7ae7 vcvt.u32.f32 s15, s15
- 800e252: ee17 2a90 vmov r2, s15
- 800e256: 687b ldr r3, [r7, #4]
- 800e258: 609a str r2, [r3, #8]
- {
- PLL2_Clocks->PLL2_P_Frequency = 0U;
- PLL2_Clocks->PLL2_Q_Frequency = 0U;
- PLL2_Clocks->PLL2_R_Frequency = 0U;
- }
- }
- 800e25a: e008 b.n 800e26e <HAL_RCCEx_GetPLL2ClockFreq+0x282>
- PLL2_Clocks->PLL2_P_Frequency = 0U;
- 800e25c: 687b ldr r3, [r7, #4]
- 800e25e: 2200 movs r2, #0
- 800e260: 601a str r2, [r3, #0]
- PLL2_Clocks->PLL2_Q_Frequency = 0U;
- 800e262: 687b ldr r3, [r7, #4]
- 800e264: 2200 movs r2, #0
- 800e266: 605a str r2, [r3, #4]
- PLL2_Clocks->PLL2_R_Frequency = 0U;
- 800e268: 687b ldr r3, [r7, #4]
- 800e26a: 2200 movs r2, #0
- 800e26c: 609a str r2, [r3, #8]
- }
- 800e26e: bf00 nop
- 800e270: 3724 adds r7, #36 @ 0x24
- 800e272: 46bd mov sp, r7
- 800e274: f85d 7b04 ldr.w r7, [sp], #4
- 800e278: 4770 bx lr
- 800e27a: bf00 nop
- 800e27c: 58024400 .word 0x58024400
- 800e280: 03d09000 .word 0x03d09000
- 800e284: 46000000 .word 0x46000000
- 800e288: 4c742400 .word 0x4c742400
- 800e28c: 4a742400 .word 0x4a742400
- 800e290: 4bbebc20 .word 0x4bbebc20
- 0800e294 <HAL_RCCEx_GetPLL3ClockFreq>:
- * right PLL3CLK value. Otherwise, any configuration based on this function will be incorrect.
- * @param PLL3_Clocks structure.
- * @retval None
- */
- void HAL_RCCEx_GetPLL3ClockFreq(PLL3_ClocksTypeDef *PLL3_Clocks)
- {
- 800e294: b480 push {r7}
- 800e296: b089 sub sp, #36 @ 0x24
- 800e298: af00 add r7, sp, #0
- 800e29a: 6078 str r0, [r7, #4]
- float_t fracn3, pll3vco;
- /* PLL3_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL3M) * PLL3N
- PLL3xCLK = PLL3_VCO / PLLxR
- */
- pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
- 800e29c: 4ba1 ldr r3, [pc, #644] @ (800e524 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
- 800e29e: 6a9b ldr r3, [r3, #40] @ 0x28
- 800e2a0: f003 0303 and.w r3, r3, #3
- 800e2a4: 61bb str r3, [r7, #24]
- pll3m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM3) >> 20) ;
- 800e2a6: 4b9f ldr r3, [pc, #636] @ (800e524 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
- 800e2a8: 6a9b ldr r3, [r3, #40] @ 0x28
- 800e2aa: 0d1b lsrs r3, r3, #20
- 800e2ac: f003 033f and.w r3, r3, #63 @ 0x3f
- 800e2b0: 617b str r3, [r7, #20]
- pll3fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL3FRACEN) >> RCC_PLLCFGR_PLL3FRACEN_Pos;
- 800e2b2: 4b9c ldr r3, [pc, #624] @ (800e524 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
- 800e2b4: 6adb ldr r3, [r3, #44] @ 0x2c
- 800e2b6: 0a1b lsrs r3, r3, #8
- 800e2b8: f003 0301 and.w r3, r3, #1
- 800e2bc: 613b str r3, [r7, #16]
- fracn3 = (float_t)(uint32_t)(pll3fracen * ((RCC->PLL3FRACR & RCC_PLL3FRACR_FRACN3) >> 3));
- 800e2be: 4b99 ldr r3, [pc, #612] @ (800e524 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
- 800e2c0: 6c5b ldr r3, [r3, #68] @ 0x44
- 800e2c2: 08db lsrs r3, r3, #3
- 800e2c4: f3c3 030c ubfx r3, r3, #0, #13
- 800e2c8: 693a ldr r2, [r7, #16]
- 800e2ca: fb02 f303 mul.w r3, r2, r3
- 800e2ce: ee07 3a90 vmov s15, r3
- 800e2d2: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e2d6: edc7 7a03 vstr s15, [r7, #12]
- if (pll3m != 0U)
- 800e2da: 697b ldr r3, [r7, #20]
- 800e2dc: 2b00 cmp r3, #0
- 800e2de: f000 8111 beq.w 800e504 <HAL_RCCEx_GetPLL3ClockFreq+0x270>
- {
- switch (pllsource)
- 800e2e2: 69bb ldr r3, [r7, #24]
- 800e2e4: 2b02 cmp r3, #2
- 800e2e6: f000 8083 beq.w 800e3f0 <HAL_RCCEx_GetPLL3ClockFreq+0x15c>
- 800e2ea: 69bb ldr r3, [r7, #24]
- 800e2ec: 2b02 cmp r3, #2
- 800e2ee: f200 80a1 bhi.w 800e434 <HAL_RCCEx_GetPLL3ClockFreq+0x1a0>
- 800e2f2: 69bb ldr r3, [r7, #24]
- 800e2f4: 2b00 cmp r3, #0
- 800e2f6: d003 beq.n 800e300 <HAL_RCCEx_GetPLL3ClockFreq+0x6c>
- 800e2f8: 69bb ldr r3, [r7, #24]
- 800e2fa: 2b01 cmp r3, #1
- 800e2fc: d056 beq.n 800e3ac <HAL_RCCEx_GetPLL3ClockFreq+0x118>
- 800e2fe: e099 b.n 800e434 <HAL_RCCEx_GetPLL3ClockFreq+0x1a0>
- {
- case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
- 800e300: 4b88 ldr r3, [pc, #544] @ (800e524 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
- 800e302: 681b ldr r3, [r3, #0]
- 800e304: f003 0320 and.w r3, r3, #32
- 800e308: 2b00 cmp r3, #0
- 800e30a: d02d beq.n 800e368 <HAL_RCCEx_GetPLL3ClockFreq+0xd4>
- {
- hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
- 800e30c: 4b85 ldr r3, [pc, #532] @ (800e524 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
- 800e30e: 681b ldr r3, [r3, #0]
- 800e310: 08db lsrs r3, r3, #3
- 800e312: f003 0303 and.w r3, r3, #3
- 800e316: 4a84 ldr r2, [pc, #528] @ (800e528 <HAL_RCCEx_GetPLL3ClockFreq+0x294>)
- 800e318: fa22 f303 lsr.w r3, r2, r3
- 800e31c: 60bb str r3, [r7, #8]
- pll3vco = ((float_t)hsivalue / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
- 800e31e: 68bb ldr r3, [r7, #8]
- 800e320: ee07 3a90 vmov s15, r3
- 800e324: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e328: 697b ldr r3, [r7, #20]
- 800e32a: ee07 3a90 vmov s15, r3
- 800e32e: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e332: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e336: 4b7b ldr r3, [pc, #492] @ (800e524 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
- 800e338: 6c1b ldr r3, [r3, #64] @ 0x40
- 800e33a: f3c3 0308 ubfx r3, r3, #0, #9
- 800e33e: ee07 3a90 vmov s15, r3
- 800e342: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e346: ed97 6a03 vldr s12, [r7, #12]
- 800e34a: eddf 5a78 vldr s11, [pc, #480] @ 800e52c <HAL_RCCEx_GetPLL3ClockFreq+0x298>
- 800e34e: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e352: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e356: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e35a: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e35e: ee67 7a27 vmul.f32 s15, s14, s15
- 800e362: edc7 7a07 vstr s15, [r7, #28]
- }
- else
- {
- pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
- }
- break;
- 800e366: e087 b.n 800e478 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
- pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
- 800e368: 697b ldr r3, [r7, #20]
- 800e36a: ee07 3a90 vmov s15, r3
- 800e36e: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e372: eddf 6a6f vldr s13, [pc, #444] @ 800e530 <HAL_RCCEx_GetPLL3ClockFreq+0x29c>
- 800e376: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e37a: 4b6a ldr r3, [pc, #424] @ (800e524 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
- 800e37c: 6c1b ldr r3, [r3, #64] @ 0x40
- 800e37e: f3c3 0308 ubfx r3, r3, #0, #9
- 800e382: ee07 3a90 vmov s15, r3
- 800e386: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e38a: ed97 6a03 vldr s12, [r7, #12]
- 800e38e: eddf 5a67 vldr s11, [pc, #412] @ 800e52c <HAL_RCCEx_GetPLL3ClockFreq+0x298>
- 800e392: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e396: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e39a: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e39e: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e3a2: ee67 7a27 vmul.f32 s15, s14, s15
- 800e3a6: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800e3aa: e065 b.n 800e478 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
- case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */
- pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
- 800e3ac: 697b ldr r3, [r7, #20]
- 800e3ae: ee07 3a90 vmov s15, r3
- 800e3b2: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e3b6: eddf 6a5f vldr s13, [pc, #380] @ 800e534 <HAL_RCCEx_GetPLL3ClockFreq+0x2a0>
- 800e3ba: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e3be: 4b59 ldr r3, [pc, #356] @ (800e524 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
- 800e3c0: 6c1b ldr r3, [r3, #64] @ 0x40
- 800e3c2: f3c3 0308 ubfx r3, r3, #0, #9
- 800e3c6: ee07 3a90 vmov s15, r3
- 800e3ca: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e3ce: ed97 6a03 vldr s12, [r7, #12]
- 800e3d2: eddf 5a56 vldr s11, [pc, #344] @ 800e52c <HAL_RCCEx_GetPLL3ClockFreq+0x298>
- 800e3d6: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e3da: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e3de: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e3e2: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e3e6: ee67 7a27 vmul.f32 s15, s14, s15
- 800e3ea: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800e3ee: e043 b.n 800e478 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
- case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
- pll3vco = ((float_t)HSE_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
- 800e3f0: 697b ldr r3, [r7, #20]
- 800e3f2: ee07 3a90 vmov s15, r3
- 800e3f6: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e3fa: eddf 6a4f vldr s13, [pc, #316] @ 800e538 <HAL_RCCEx_GetPLL3ClockFreq+0x2a4>
- 800e3fe: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e402: 4b48 ldr r3, [pc, #288] @ (800e524 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
- 800e404: 6c1b ldr r3, [r3, #64] @ 0x40
- 800e406: f3c3 0308 ubfx r3, r3, #0, #9
- 800e40a: ee07 3a90 vmov s15, r3
- 800e40e: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e412: ed97 6a03 vldr s12, [r7, #12]
- 800e416: eddf 5a45 vldr s11, [pc, #276] @ 800e52c <HAL_RCCEx_GetPLL3ClockFreq+0x298>
- 800e41a: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e41e: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e422: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e426: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e42a: ee67 7a27 vmul.f32 s15, s14, s15
- 800e42e: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800e432: e021 b.n 800e478 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
- default:
- pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
- 800e434: 697b ldr r3, [r7, #20]
- 800e436: ee07 3a90 vmov s15, r3
- 800e43a: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e43e: eddf 6a3d vldr s13, [pc, #244] @ 800e534 <HAL_RCCEx_GetPLL3ClockFreq+0x2a0>
- 800e442: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e446: 4b37 ldr r3, [pc, #220] @ (800e524 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
- 800e448: 6c1b ldr r3, [r3, #64] @ 0x40
- 800e44a: f3c3 0308 ubfx r3, r3, #0, #9
- 800e44e: ee07 3a90 vmov s15, r3
- 800e452: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e456: ed97 6a03 vldr s12, [r7, #12]
- 800e45a: eddf 5a34 vldr s11, [pc, #208] @ 800e52c <HAL_RCCEx_GetPLL3ClockFreq+0x298>
- 800e45e: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e462: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e466: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e46a: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e46e: ee67 7a27 vmul.f32 s15, s14, s15
- 800e472: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800e476: bf00 nop
- }
- PLL3_Clocks->PLL3_P_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_P3) >> 9) + (float_t)1)) ;
- 800e478: 4b2a ldr r3, [pc, #168] @ (800e524 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
- 800e47a: 6c1b ldr r3, [r3, #64] @ 0x40
- 800e47c: 0a5b lsrs r3, r3, #9
- 800e47e: f003 037f and.w r3, r3, #127 @ 0x7f
- 800e482: ee07 3a90 vmov s15, r3
- 800e486: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e48a: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
- 800e48e: ee37 7a87 vadd.f32 s14, s15, s14
- 800e492: edd7 6a07 vldr s13, [r7, #28]
- 800e496: eec6 7a87 vdiv.f32 s15, s13, s14
- 800e49a: eefc 7ae7 vcvt.u32.f32 s15, s15
- 800e49e: ee17 2a90 vmov r2, s15
- 800e4a2: 687b ldr r3, [r7, #4]
- 800e4a4: 601a str r2, [r3, #0]
- PLL3_Clocks->PLL3_Q_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_Q3) >> 16) + (float_t)1)) ;
- 800e4a6: 4b1f ldr r3, [pc, #124] @ (800e524 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
- 800e4a8: 6c1b ldr r3, [r3, #64] @ 0x40
- 800e4aa: 0c1b lsrs r3, r3, #16
- 800e4ac: f003 037f and.w r3, r3, #127 @ 0x7f
- 800e4b0: ee07 3a90 vmov s15, r3
- 800e4b4: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e4b8: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
- 800e4bc: ee37 7a87 vadd.f32 s14, s15, s14
- 800e4c0: edd7 6a07 vldr s13, [r7, #28]
- 800e4c4: eec6 7a87 vdiv.f32 s15, s13, s14
- 800e4c8: eefc 7ae7 vcvt.u32.f32 s15, s15
- 800e4cc: ee17 2a90 vmov r2, s15
- 800e4d0: 687b ldr r3, [r7, #4]
- 800e4d2: 605a str r2, [r3, #4]
- PLL3_Clocks->PLL3_R_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_R3) >> 24) + (float_t)1)) ;
- 800e4d4: 4b13 ldr r3, [pc, #76] @ (800e524 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
- 800e4d6: 6c1b ldr r3, [r3, #64] @ 0x40
- 800e4d8: 0e1b lsrs r3, r3, #24
- 800e4da: f003 037f and.w r3, r3, #127 @ 0x7f
- 800e4de: ee07 3a90 vmov s15, r3
- 800e4e2: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e4e6: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
- 800e4ea: ee37 7a87 vadd.f32 s14, s15, s14
- 800e4ee: edd7 6a07 vldr s13, [r7, #28]
- 800e4f2: eec6 7a87 vdiv.f32 s15, s13, s14
- 800e4f6: eefc 7ae7 vcvt.u32.f32 s15, s15
- 800e4fa: ee17 2a90 vmov r2, s15
- 800e4fe: 687b ldr r3, [r7, #4]
- 800e500: 609a str r2, [r3, #8]
- PLL3_Clocks->PLL3_P_Frequency = 0U;
- PLL3_Clocks->PLL3_Q_Frequency = 0U;
- PLL3_Clocks->PLL3_R_Frequency = 0U;
- }
- }
- 800e502: e008 b.n 800e516 <HAL_RCCEx_GetPLL3ClockFreq+0x282>
- PLL3_Clocks->PLL3_P_Frequency = 0U;
- 800e504: 687b ldr r3, [r7, #4]
- 800e506: 2200 movs r2, #0
- 800e508: 601a str r2, [r3, #0]
- PLL3_Clocks->PLL3_Q_Frequency = 0U;
- 800e50a: 687b ldr r3, [r7, #4]
- 800e50c: 2200 movs r2, #0
- 800e50e: 605a str r2, [r3, #4]
- PLL3_Clocks->PLL3_R_Frequency = 0U;
- 800e510: 687b ldr r3, [r7, #4]
- 800e512: 2200 movs r2, #0
- 800e514: 609a str r2, [r3, #8]
- }
- 800e516: bf00 nop
- 800e518: 3724 adds r7, #36 @ 0x24
- 800e51a: 46bd mov sp, r7
- 800e51c: f85d 7b04 ldr.w r7, [sp], #4
- 800e520: 4770 bx lr
- 800e522: bf00 nop
- 800e524: 58024400 .word 0x58024400
- 800e528: 03d09000 .word 0x03d09000
- 800e52c: 46000000 .word 0x46000000
- 800e530: 4c742400 .word 0x4c742400
- 800e534: 4a742400 .word 0x4a742400
- 800e538: 4bbebc20 .word 0x4bbebc20
- 0800e53c <HAL_RCCEx_GetPLL1ClockFreq>:
- * right PLL1CLK value. Otherwise, any configuration based on this function will be incorrect.
- * @param PLL1_Clocks structure.
- * @retval None
- */
- void HAL_RCCEx_GetPLL1ClockFreq(PLL1_ClocksTypeDef *PLL1_Clocks)
- {
- 800e53c: b480 push {r7}
- 800e53e: b089 sub sp, #36 @ 0x24
- 800e540: af00 add r7, sp, #0
- 800e542: 6078 str r0, [r7, #4]
- uint32_t pllsource, pll1m, pll1fracen, hsivalue;
- float_t fracn1, pll1vco;
- pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
- 800e544: 4ba0 ldr r3, [pc, #640] @ (800e7c8 <HAL_RCCEx_GetPLL1ClockFreq+0x28c>)
- 800e546: 6a9b ldr r3, [r3, #40] @ 0x28
- 800e548: f003 0303 and.w r3, r3, #3
- 800e54c: 61bb str r3, [r7, #24]
- pll1m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> 4);
- 800e54e: 4b9e ldr r3, [pc, #632] @ (800e7c8 <HAL_RCCEx_GetPLL1ClockFreq+0x28c>)
- 800e550: 6a9b ldr r3, [r3, #40] @ 0x28
- 800e552: 091b lsrs r3, r3, #4
- 800e554: f003 033f and.w r3, r3, #63 @ 0x3f
- 800e558: 617b str r3, [r7, #20]
- pll1fracen = RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN;
- 800e55a: 4b9b ldr r3, [pc, #620] @ (800e7c8 <HAL_RCCEx_GetPLL1ClockFreq+0x28c>)
- 800e55c: 6adb ldr r3, [r3, #44] @ 0x2c
- 800e55e: f003 0301 and.w r3, r3, #1
- 800e562: 613b str r3, [r7, #16]
- fracn1 = (float_t)(uint32_t)(pll1fracen * ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> 3));
- 800e564: 4b98 ldr r3, [pc, #608] @ (800e7c8 <HAL_RCCEx_GetPLL1ClockFreq+0x28c>)
- 800e566: 6b5b ldr r3, [r3, #52] @ 0x34
- 800e568: 08db lsrs r3, r3, #3
- 800e56a: f3c3 030c ubfx r3, r3, #0, #13
- 800e56e: 693a ldr r2, [r7, #16]
- 800e570: fb02 f303 mul.w r3, r2, r3
- 800e574: ee07 3a90 vmov s15, r3
- 800e578: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e57c: edc7 7a03 vstr s15, [r7, #12]
- if (pll1m != 0U)
- 800e580: 697b ldr r3, [r7, #20]
- 800e582: 2b00 cmp r3, #0
- 800e584: f000 8111 beq.w 800e7aa <HAL_RCCEx_GetPLL1ClockFreq+0x26e>
- {
- switch (pllsource)
- 800e588: 69bb ldr r3, [r7, #24]
- 800e58a: 2b02 cmp r3, #2
- 800e58c: f000 8083 beq.w 800e696 <HAL_RCCEx_GetPLL1ClockFreq+0x15a>
- 800e590: 69bb ldr r3, [r7, #24]
- 800e592: 2b02 cmp r3, #2
- 800e594: f200 80a1 bhi.w 800e6da <HAL_RCCEx_GetPLL1ClockFreq+0x19e>
- 800e598: 69bb ldr r3, [r7, #24]
- 800e59a: 2b00 cmp r3, #0
- 800e59c: d003 beq.n 800e5a6 <HAL_RCCEx_GetPLL1ClockFreq+0x6a>
- 800e59e: 69bb ldr r3, [r7, #24]
- 800e5a0: 2b01 cmp r3, #1
- 800e5a2: d056 beq.n 800e652 <HAL_RCCEx_GetPLL1ClockFreq+0x116>
- 800e5a4: e099 b.n 800e6da <HAL_RCCEx_GetPLL1ClockFreq+0x19e>
- {
- case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
- 800e5a6: 4b88 ldr r3, [pc, #544] @ (800e7c8 <HAL_RCCEx_GetPLL1ClockFreq+0x28c>)
- 800e5a8: 681b ldr r3, [r3, #0]
- 800e5aa: f003 0320 and.w r3, r3, #32
- 800e5ae: 2b00 cmp r3, #0
- 800e5b0: d02d beq.n 800e60e <HAL_RCCEx_GetPLL1ClockFreq+0xd2>
- {
- hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
- 800e5b2: 4b85 ldr r3, [pc, #532] @ (800e7c8 <HAL_RCCEx_GetPLL1ClockFreq+0x28c>)
- 800e5b4: 681b ldr r3, [r3, #0]
- 800e5b6: 08db lsrs r3, r3, #3
- 800e5b8: f003 0303 and.w r3, r3, #3
- 800e5bc: 4a83 ldr r2, [pc, #524] @ (800e7cc <HAL_RCCEx_GetPLL1ClockFreq+0x290>)
- 800e5be: fa22 f303 lsr.w r3, r2, r3
- 800e5c2: 60bb str r3, [r7, #8]
- pll1vco = ((float_t)hsivalue / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
- 800e5c4: 68bb ldr r3, [r7, #8]
- 800e5c6: ee07 3a90 vmov s15, r3
- 800e5ca: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e5ce: 697b ldr r3, [r7, #20]
- 800e5d0: ee07 3a90 vmov s15, r3
- 800e5d4: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e5d8: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e5dc: 4b7a ldr r3, [pc, #488] @ (800e7c8 <HAL_RCCEx_GetPLL1ClockFreq+0x28c>)
- 800e5de: 6b1b ldr r3, [r3, #48] @ 0x30
- 800e5e0: f3c3 0308 ubfx r3, r3, #0, #9
- 800e5e4: ee07 3a90 vmov s15, r3
- 800e5e8: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e5ec: ed97 6a03 vldr s12, [r7, #12]
- 800e5f0: eddf 5a77 vldr s11, [pc, #476] @ 800e7d0 <HAL_RCCEx_GetPLL1ClockFreq+0x294>
- 800e5f4: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e5f8: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e5fc: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e600: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e604: ee67 7a27 vmul.f32 s15, s14, s15
- 800e608: edc7 7a07 vstr s15, [r7, #28]
- }
- else
- {
- pll1vco = ((float_t)HSI_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
- }
- break;
- 800e60c: e087 b.n 800e71e <HAL_RCCEx_GetPLL1ClockFreq+0x1e2>
- pll1vco = ((float_t)HSI_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
- 800e60e: 697b ldr r3, [r7, #20]
- 800e610: ee07 3a90 vmov s15, r3
- 800e614: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e618: eddf 6a6e vldr s13, [pc, #440] @ 800e7d4 <HAL_RCCEx_GetPLL1ClockFreq+0x298>
- 800e61c: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e620: 4b69 ldr r3, [pc, #420] @ (800e7c8 <HAL_RCCEx_GetPLL1ClockFreq+0x28c>)
- 800e622: 6b1b ldr r3, [r3, #48] @ 0x30
- 800e624: f3c3 0308 ubfx r3, r3, #0, #9
- 800e628: ee07 3a90 vmov s15, r3
- 800e62c: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e630: ed97 6a03 vldr s12, [r7, #12]
- 800e634: eddf 5a66 vldr s11, [pc, #408] @ 800e7d0 <HAL_RCCEx_GetPLL1ClockFreq+0x294>
- 800e638: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e63c: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e640: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e644: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e648: ee67 7a27 vmul.f32 s15, s14, s15
- 800e64c: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800e650: e065 b.n 800e71e <HAL_RCCEx_GetPLL1ClockFreq+0x1e2>
- case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */
- pll1vco = ((float_t)CSI_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
- 800e652: 697b ldr r3, [r7, #20]
- 800e654: ee07 3a90 vmov s15, r3
- 800e658: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e65c: eddf 6a5e vldr s13, [pc, #376] @ 800e7d8 <HAL_RCCEx_GetPLL1ClockFreq+0x29c>
- 800e660: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e664: 4b58 ldr r3, [pc, #352] @ (800e7c8 <HAL_RCCEx_GetPLL1ClockFreq+0x28c>)
- 800e666: 6b1b ldr r3, [r3, #48] @ 0x30
- 800e668: f3c3 0308 ubfx r3, r3, #0, #9
- 800e66c: ee07 3a90 vmov s15, r3
- 800e670: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e674: ed97 6a03 vldr s12, [r7, #12]
- 800e678: eddf 5a55 vldr s11, [pc, #340] @ 800e7d0 <HAL_RCCEx_GetPLL1ClockFreq+0x294>
- 800e67c: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e680: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e684: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e688: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e68c: ee67 7a27 vmul.f32 s15, s14, s15
- 800e690: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800e694: e043 b.n 800e71e <HAL_RCCEx_GetPLL1ClockFreq+0x1e2>
- case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
- pll1vco = ((float_t)HSE_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
- 800e696: 697b ldr r3, [r7, #20]
- 800e698: ee07 3a90 vmov s15, r3
- 800e69c: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e6a0: eddf 6a4e vldr s13, [pc, #312] @ 800e7dc <HAL_RCCEx_GetPLL1ClockFreq+0x2a0>
- 800e6a4: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e6a8: 4b47 ldr r3, [pc, #284] @ (800e7c8 <HAL_RCCEx_GetPLL1ClockFreq+0x28c>)
- 800e6aa: 6b1b ldr r3, [r3, #48] @ 0x30
- 800e6ac: f3c3 0308 ubfx r3, r3, #0, #9
- 800e6b0: ee07 3a90 vmov s15, r3
- 800e6b4: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e6b8: ed97 6a03 vldr s12, [r7, #12]
- 800e6bc: eddf 5a44 vldr s11, [pc, #272] @ 800e7d0 <HAL_RCCEx_GetPLL1ClockFreq+0x294>
- 800e6c0: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e6c4: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e6c8: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e6cc: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e6d0: ee67 7a27 vmul.f32 s15, s14, s15
- 800e6d4: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800e6d8: e021 b.n 800e71e <HAL_RCCEx_GetPLL1ClockFreq+0x1e2>
- default:
- pll1vco = ((float_t)HSI_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
- 800e6da: 697b ldr r3, [r7, #20]
- 800e6dc: ee07 3a90 vmov s15, r3
- 800e6e0: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e6e4: eddf 6a3b vldr s13, [pc, #236] @ 800e7d4 <HAL_RCCEx_GetPLL1ClockFreq+0x298>
- 800e6e8: ee86 7aa7 vdiv.f32 s14, s13, s15
- 800e6ec: 4b36 ldr r3, [pc, #216] @ (800e7c8 <HAL_RCCEx_GetPLL1ClockFreq+0x28c>)
- 800e6ee: 6b1b ldr r3, [r3, #48] @ 0x30
- 800e6f0: f3c3 0308 ubfx r3, r3, #0, #9
- 800e6f4: ee07 3a90 vmov s15, r3
- 800e6f8: eef8 6a67 vcvt.f32.u32 s13, s15
- 800e6fc: ed97 6a03 vldr s12, [r7, #12]
- 800e700: eddf 5a33 vldr s11, [pc, #204] @ 800e7d0 <HAL_RCCEx_GetPLL1ClockFreq+0x294>
- 800e704: eec6 7a25 vdiv.f32 s15, s12, s11
- 800e708: ee76 7aa7 vadd.f32 s15, s13, s15
- 800e70c: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
- 800e710: ee77 7aa6 vadd.f32 s15, s15, s13
- 800e714: ee67 7a27 vmul.f32 s15, s14, s15
- 800e718: edc7 7a07 vstr s15, [r7, #28]
- break;
- 800e71c: bf00 nop
- }
- PLL1_Clocks->PLL1_P_Frequency = (uint32_t)(float_t)(pll1vco / ((float_t)(uint32_t)((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >> 9) + (float_t)1)) ;
- 800e71e: 4b2a ldr r3, [pc, #168] @ (800e7c8 <HAL_RCCEx_GetPLL1ClockFreq+0x28c>)
- 800e720: 6b1b ldr r3, [r3, #48] @ 0x30
- 800e722: 0a5b lsrs r3, r3, #9
- 800e724: f003 037f and.w r3, r3, #127 @ 0x7f
- 800e728: ee07 3a90 vmov s15, r3
- 800e72c: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e730: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
- 800e734: ee37 7a87 vadd.f32 s14, s15, s14
- 800e738: edd7 6a07 vldr s13, [r7, #28]
- 800e73c: eec6 7a87 vdiv.f32 s15, s13, s14
- 800e740: eefc 7ae7 vcvt.u32.f32 s15, s15
- 800e744: ee17 2a90 vmov r2, s15
- 800e748: 687b ldr r3, [r7, #4]
- 800e74a: 601a str r2, [r3, #0]
- PLL1_Clocks->PLL1_Q_Frequency = (uint32_t)(float_t)(pll1vco / ((float_t)(uint32_t)((RCC->PLL1DIVR & RCC_PLL1DIVR_Q1) >> 16) + (float_t)1)) ;
- 800e74c: 4b1e ldr r3, [pc, #120] @ (800e7c8 <HAL_RCCEx_GetPLL1ClockFreq+0x28c>)
- 800e74e: 6b1b ldr r3, [r3, #48] @ 0x30
- 800e750: 0c1b lsrs r3, r3, #16
- 800e752: f003 037f and.w r3, r3, #127 @ 0x7f
- 800e756: ee07 3a90 vmov s15, r3
- 800e75a: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e75e: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
- 800e762: ee37 7a87 vadd.f32 s14, s15, s14
- 800e766: edd7 6a07 vldr s13, [r7, #28]
- 800e76a: eec6 7a87 vdiv.f32 s15, s13, s14
- 800e76e: eefc 7ae7 vcvt.u32.f32 s15, s15
- 800e772: ee17 2a90 vmov r2, s15
- 800e776: 687b ldr r3, [r7, #4]
- 800e778: 605a str r2, [r3, #4]
- PLL1_Clocks->PLL1_R_Frequency = (uint32_t)(float_t)(pll1vco / ((float_t)(uint32_t)((RCC->PLL1DIVR & RCC_PLL1DIVR_R1) >> 24) + (float_t)1)) ;
- 800e77a: 4b13 ldr r3, [pc, #76] @ (800e7c8 <HAL_RCCEx_GetPLL1ClockFreq+0x28c>)
- 800e77c: 6b1b ldr r3, [r3, #48] @ 0x30
- 800e77e: 0e1b lsrs r3, r3, #24
- 800e780: f003 037f and.w r3, r3, #127 @ 0x7f
- 800e784: ee07 3a90 vmov s15, r3
- 800e788: eef8 7a67 vcvt.f32.u32 s15, s15
- 800e78c: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
- 800e790: ee37 7a87 vadd.f32 s14, s15, s14
- 800e794: edd7 6a07 vldr s13, [r7, #28]
- 800e798: eec6 7a87 vdiv.f32 s15, s13, s14
- 800e79c: eefc 7ae7 vcvt.u32.f32 s15, s15
- 800e7a0: ee17 2a90 vmov r2, s15
- 800e7a4: 687b ldr r3, [r7, #4]
- 800e7a6: 609a str r2, [r3, #8]
- PLL1_Clocks->PLL1_P_Frequency = 0U;
- PLL1_Clocks->PLL1_Q_Frequency = 0U;
- PLL1_Clocks->PLL1_R_Frequency = 0U;
- }
- }
- 800e7a8: e008 b.n 800e7bc <HAL_RCCEx_GetPLL1ClockFreq+0x280>
- PLL1_Clocks->PLL1_P_Frequency = 0U;
- 800e7aa: 687b ldr r3, [r7, #4]
- 800e7ac: 2200 movs r2, #0
- 800e7ae: 601a str r2, [r3, #0]
- PLL1_Clocks->PLL1_Q_Frequency = 0U;
- 800e7b0: 687b ldr r3, [r7, #4]
- 800e7b2: 2200 movs r2, #0
- 800e7b4: 605a str r2, [r3, #4]
- PLL1_Clocks->PLL1_R_Frequency = 0U;
- 800e7b6: 687b ldr r3, [r7, #4]
- 800e7b8: 2200 movs r2, #0
- 800e7ba: 609a str r2, [r3, #8]
- }
- 800e7bc: bf00 nop
- 800e7be: 3724 adds r7, #36 @ 0x24
- 800e7c0: 46bd mov sp, r7
- 800e7c2: f85d 7b04 ldr.w r7, [sp], #4
- 800e7c6: 4770 bx lr
- 800e7c8: 58024400 .word 0x58024400
- 800e7cc: 03d09000 .word 0x03d09000
- 800e7d0: 46000000 .word 0x46000000
- 800e7d4: 4c742400 .word 0x4c742400
- 800e7d8: 4a742400 .word 0x4a742400
- 800e7dc: 4bbebc20 .word 0x4bbebc20
- 0800e7e0 <RCCEx_PLL2_Config>:
- * @note PLL2 is temporary disabled to apply new parameters
- *
- * @retval HAL status
- */
- static HAL_StatusTypeDef RCCEx_PLL2_Config(RCC_PLL2InitTypeDef *pll2, uint32_t Divider)
- {
- 800e7e0: b580 push {r7, lr}
- 800e7e2: b084 sub sp, #16
- 800e7e4: af00 add r7, sp, #0
- 800e7e6: 6078 str r0, [r7, #4]
- 800e7e8: 6039 str r1, [r7, #0]
- uint32_t tickstart;
- HAL_StatusTypeDef status = HAL_OK;
- 800e7ea: 2300 movs r3, #0
- 800e7ec: 73fb strb r3, [r7, #15]
- assert_param(IS_RCC_PLL2RGE_VALUE(pll2->PLL2RGE));
- assert_param(IS_RCC_PLL2VCO_VALUE(pll2->PLL2VCOSEL));
- assert_param(IS_RCC_PLLFRACN_VALUE(pll2->PLL2FRACN));
- /* Check that PLL2 OSC clock source is already set */
- if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE)
- 800e7ee: 4b53 ldr r3, [pc, #332] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e7f0: 6a9b ldr r3, [r3, #40] @ 0x28
- 800e7f2: f003 0303 and.w r3, r3, #3
- 800e7f6: 2b03 cmp r3, #3
- 800e7f8: d101 bne.n 800e7fe <RCCEx_PLL2_Config+0x1e>
- {
- return HAL_ERROR;
- 800e7fa: 2301 movs r3, #1
- 800e7fc: e099 b.n 800e932 <RCCEx_PLL2_Config+0x152>
- else
- {
- /* Disable PLL2. */
- __HAL_RCC_PLL2_DISABLE();
- 800e7fe: 4b4f ldr r3, [pc, #316] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e800: 681b ldr r3, [r3, #0]
- 800e802: 4a4e ldr r2, [pc, #312] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e804: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000
- 800e808: 6013 str r3, [r2, #0]
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800e80a: f7f6 fead bl 8005568 <HAL_GetTick>
- 800e80e: 60b8 str r0, [r7, #8]
- /* Wait till PLL is disabled */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U)
- 800e810: e008 b.n 800e824 <RCCEx_PLL2_Config+0x44>
- {
- if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
- 800e812: f7f6 fea9 bl 8005568 <HAL_GetTick>
- 800e816: 4602 mov r2, r0
- 800e818: 68bb ldr r3, [r7, #8]
- 800e81a: 1ad3 subs r3, r2, r3
- 800e81c: 2b02 cmp r3, #2
- 800e81e: d901 bls.n 800e824 <RCCEx_PLL2_Config+0x44>
- {
- return HAL_TIMEOUT;
- 800e820: 2303 movs r3, #3
- 800e822: e086 b.n 800e932 <RCCEx_PLL2_Config+0x152>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U)
- 800e824: 4b45 ldr r3, [pc, #276] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e826: 681b ldr r3, [r3, #0]
- 800e828: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
- 800e82c: 2b00 cmp r3, #0
- 800e82e: d1f0 bne.n 800e812 <RCCEx_PLL2_Config+0x32>
- }
- }
- /* Configure PLL2 multiplication and division factors. */
- __HAL_RCC_PLL2_CONFIG(pll2->PLL2M,
- 800e830: 4b42 ldr r3, [pc, #264] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e832: 6a9b ldr r3, [r3, #40] @ 0x28
- 800e834: f423 327c bic.w r2, r3, #258048 @ 0x3f000
- 800e838: 687b ldr r3, [r7, #4]
- 800e83a: 681b ldr r3, [r3, #0]
- 800e83c: 031b lsls r3, r3, #12
- 800e83e: 493f ldr r1, [pc, #252] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e840: 4313 orrs r3, r2
- 800e842: 628b str r3, [r1, #40] @ 0x28
- 800e844: 687b ldr r3, [r7, #4]
- 800e846: 685b ldr r3, [r3, #4]
- 800e848: 3b01 subs r3, #1
- 800e84a: f3c3 0208 ubfx r2, r3, #0, #9
- 800e84e: 687b ldr r3, [r7, #4]
- 800e850: 689b ldr r3, [r3, #8]
- 800e852: 3b01 subs r3, #1
- 800e854: 025b lsls r3, r3, #9
- 800e856: b29b uxth r3, r3
- 800e858: 431a orrs r2, r3
- 800e85a: 687b ldr r3, [r7, #4]
- 800e85c: 68db ldr r3, [r3, #12]
- 800e85e: 3b01 subs r3, #1
- 800e860: 041b lsls r3, r3, #16
- 800e862: f403 03fe and.w r3, r3, #8323072 @ 0x7f0000
- 800e866: 431a orrs r2, r3
- 800e868: 687b ldr r3, [r7, #4]
- 800e86a: 691b ldr r3, [r3, #16]
- 800e86c: 3b01 subs r3, #1
- 800e86e: 061b lsls r3, r3, #24
- 800e870: f003 43fe and.w r3, r3, #2130706432 @ 0x7f000000
- 800e874: 4931 ldr r1, [pc, #196] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e876: 4313 orrs r3, r2
- 800e878: 638b str r3, [r1, #56] @ 0x38
- pll2->PLL2P,
- pll2->PLL2Q,
- pll2->PLL2R);
- /* Select PLL2 input reference frequency range: VCI */
- __HAL_RCC_PLL2_VCIRANGE(pll2->PLL2RGE) ;
- 800e87a: 4b30 ldr r3, [pc, #192] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e87c: 6adb ldr r3, [r3, #44] @ 0x2c
- 800e87e: f023 02c0 bic.w r2, r3, #192 @ 0xc0
- 800e882: 687b ldr r3, [r7, #4]
- 800e884: 695b ldr r3, [r3, #20]
- 800e886: 492d ldr r1, [pc, #180] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e888: 4313 orrs r3, r2
- 800e88a: 62cb str r3, [r1, #44] @ 0x2c
- /* Select PLL2 output frequency range : VCO */
- __HAL_RCC_PLL2_VCORANGE(pll2->PLL2VCOSEL) ;
- 800e88c: 4b2b ldr r3, [pc, #172] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e88e: 6adb ldr r3, [r3, #44] @ 0x2c
- 800e890: f023 0220 bic.w r2, r3, #32
- 800e894: 687b ldr r3, [r7, #4]
- 800e896: 699b ldr r3, [r3, #24]
- 800e898: 4928 ldr r1, [pc, #160] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e89a: 4313 orrs r3, r2
- 800e89c: 62cb str r3, [r1, #44] @ 0x2c
- /* Disable PLL2FRACN . */
- __HAL_RCC_PLL2FRACN_DISABLE();
- 800e89e: 4b27 ldr r3, [pc, #156] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e8a0: 6adb ldr r3, [r3, #44] @ 0x2c
- 800e8a2: 4a26 ldr r2, [pc, #152] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e8a4: f023 0310 bic.w r3, r3, #16
- 800e8a8: 62d3 str r3, [r2, #44] @ 0x2c
- /* Configures PLL2 clock Fractional Part Of The Multiplication Factor */
- __HAL_RCC_PLL2FRACN_CONFIG(pll2->PLL2FRACN);
- 800e8aa: 4b24 ldr r3, [pc, #144] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e8ac: 6bda ldr r2, [r3, #60] @ 0x3c
- 800e8ae: 4b24 ldr r3, [pc, #144] @ (800e940 <RCCEx_PLL2_Config+0x160>)
- 800e8b0: 4013 ands r3, r2
- 800e8b2: 687a ldr r2, [r7, #4]
- 800e8b4: 69d2 ldr r2, [r2, #28]
- 800e8b6: 00d2 lsls r2, r2, #3
- 800e8b8: 4920 ldr r1, [pc, #128] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e8ba: 4313 orrs r3, r2
- 800e8bc: 63cb str r3, [r1, #60] @ 0x3c
- /* Enable PLL2FRACN . */
- __HAL_RCC_PLL2FRACN_ENABLE();
- 800e8be: 4b1f ldr r3, [pc, #124] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e8c0: 6adb ldr r3, [r3, #44] @ 0x2c
- 800e8c2: 4a1e ldr r2, [pc, #120] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e8c4: f043 0310 orr.w r3, r3, #16
- 800e8c8: 62d3 str r3, [r2, #44] @ 0x2c
- /* Enable the PLL2 clock output */
- if (Divider == DIVIDER_P_UPDATE)
- 800e8ca: 683b ldr r3, [r7, #0]
- 800e8cc: 2b00 cmp r3, #0
- 800e8ce: d106 bne.n 800e8de <RCCEx_PLL2_Config+0xfe>
- {
- __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVP);
- 800e8d0: 4b1a ldr r3, [pc, #104] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e8d2: 6adb ldr r3, [r3, #44] @ 0x2c
- 800e8d4: 4a19 ldr r2, [pc, #100] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e8d6: f443 2300 orr.w r3, r3, #524288 @ 0x80000
- 800e8da: 62d3 str r3, [r2, #44] @ 0x2c
- 800e8dc: e00f b.n 800e8fe <RCCEx_PLL2_Config+0x11e>
- }
- else if (Divider == DIVIDER_Q_UPDATE)
- 800e8de: 683b ldr r3, [r7, #0]
- 800e8e0: 2b01 cmp r3, #1
- 800e8e2: d106 bne.n 800e8f2 <RCCEx_PLL2_Config+0x112>
- {
- __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVQ);
- 800e8e4: 4b15 ldr r3, [pc, #84] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e8e6: 6adb ldr r3, [r3, #44] @ 0x2c
- 800e8e8: 4a14 ldr r2, [pc, #80] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e8ea: f443 1380 orr.w r3, r3, #1048576 @ 0x100000
- 800e8ee: 62d3 str r3, [r2, #44] @ 0x2c
- 800e8f0: e005 b.n 800e8fe <RCCEx_PLL2_Config+0x11e>
- }
- else
- {
- __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVR);
- 800e8f2: 4b12 ldr r3, [pc, #72] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e8f4: 6adb ldr r3, [r3, #44] @ 0x2c
- 800e8f6: 4a11 ldr r2, [pc, #68] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e8f8: f443 1300 orr.w r3, r3, #2097152 @ 0x200000
- 800e8fc: 62d3 str r3, [r2, #44] @ 0x2c
- }
- /* Enable PLL2. */
- __HAL_RCC_PLL2_ENABLE();
- 800e8fe: 4b0f ldr r3, [pc, #60] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e900: 681b ldr r3, [r3, #0]
- 800e902: 4a0e ldr r2, [pc, #56] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e904: f043 6380 orr.w r3, r3, #67108864 @ 0x4000000
- 800e908: 6013 str r3, [r2, #0]
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800e90a: f7f6 fe2d bl 8005568 <HAL_GetTick>
- 800e90e: 60b8 str r0, [r7, #8]
- /* Wait till PLL2 is ready */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U)
- 800e910: e008 b.n 800e924 <RCCEx_PLL2_Config+0x144>
- {
- if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
- 800e912: f7f6 fe29 bl 8005568 <HAL_GetTick>
- 800e916: 4602 mov r2, r0
- 800e918: 68bb ldr r3, [r7, #8]
- 800e91a: 1ad3 subs r3, r2, r3
- 800e91c: 2b02 cmp r3, #2
- 800e91e: d901 bls.n 800e924 <RCCEx_PLL2_Config+0x144>
- {
- return HAL_TIMEOUT;
- 800e920: 2303 movs r3, #3
- 800e922: e006 b.n 800e932 <RCCEx_PLL2_Config+0x152>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U)
- 800e924: 4b05 ldr r3, [pc, #20] @ (800e93c <RCCEx_PLL2_Config+0x15c>)
- 800e926: 681b ldr r3, [r3, #0]
- 800e928: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
- 800e92c: 2b00 cmp r3, #0
- 800e92e: d0f0 beq.n 800e912 <RCCEx_PLL2_Config+0x132>
- }
- }
- return status;
- 800e930: 7bfb ldrb r3, [r7, #15]
- }
- 800e932: 4618 mov r0, r3
- 800e934: 3710 adds r7, #16
- 800e936: 46bd mov sp, r7
- 800e938: bd80 pop {r7, pc}
- 800e93a: bf00 nop
- 800e93c: 58024400 .word 0x58024400
- 800e940: ffff0007 .word 0xffff0007
- 0800e944 <RCCEx_PLL3_Config>:
- * @note PLL3 is temporary disabled to apply new parameters
- *
- * @retval HAL status
- */
- static HAL_StatusTypeDef RCCEx_PLL3_Config(RCC_PLL3InitTypeDef *pll3, uint32_t Divider)
- {
- 800e944: b580 push {r7, lr}
- 800e946: b084 sub sp, #16
- 800e948: af00 add r7, sp, #0
- 800e94a: 6078 str r0, [r7, #4]
- 800e94c: 6039 str r1, [r7, #0]
- uint32_t tickstart;
- HAL_StatusTypeDef status = HAL_OK;
- 800e94e: 2300 movs r3, #0
- 800e950: 73fb strb r3, [r7, #15]
- assert_param(IS_RCC_PLL3RGE_VALUE(pll3->PLL3RGE));
- assert_param(IS_RCC_PLL3VCO_VALUE(pll3->PLL3VCOSEL));
- assert_param(IS_RCC_PLLFRACN_VALUE(pll3->PLL3FRACN));
- /* Check that PLL3 OSC clock source is already set */
- if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE)
- 800e952: 4b53 ldr r3, [pc, #332] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800e954: 6a9b ldr r3, [r3, #40] @ 0x28
- 800e956: f003 0303 and.w r3, r3, #3
- 800e95a: 2b03 cmp r3, #3
- 800e95c: d101 bne.n 800e962 <RCCEx_PLL3_Config+0x1e>
- {
- return HAL_ERROR;
- 800e95e: 2301 movs r3, #1
- 800e960: e099 b.n 800ea96 <RCCEx_PLL3_Config+0x152>
- else
- {
- /* Disable PLL3. */
- __HAL_RCC_PLL3_DISABLE();
- 800e962: 4b4f ldr r3, [pc, #316] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800e964: 681b ldr r3, [r3, #0]
- 800e966: 4a4e ldr r2, [pc, #312] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800e968: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
- 800e96c: 6013 str r3, [r2, #0]
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800e96e: f7f6 fdfb bl 8005568 <HAL_GetTick>
- 800e972: 60b8 str r0, [r7, #8]
- /* Wait till PLL3 is ready */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U)
- 800e974: e008 b.n 800e988 <RCCEx_PLL3_Config+0x44>
- {
- if ((HAL_GetTick() - tickstart) > PLL3_TIMEOUT_VALUE)
- 800e976: f7f6 fdf7 bl 8005568 <HAL_GetTick>
- 800e97a: 4602 mov r2, r0
- 800e97c: 68bb ldr r3, [r7, #8]
- 800e97e: 1ad3 subs r3, r2, r3
- 800e980: 2b02 cmp r3, #2
- 800e982: d901 bls.n 800e988 <RCCEx_PLL3_Config+0x44>
- {
- return HAL_TIMEOUT;
- 800e984: 2303 movs r3, #3
- 800e986: e086 b.n 800ea96 <RCCEx_PLL3_Config+0x152>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U)
- 800e988: 4b45 ldr r3, [pc, #276] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800e98a: 681b ldr r3, [r3, #0]
- 800e98c: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
- 800e990: 2b00 cmp r3, #0
- 800e992: d1f0 bne.n 800e976 <RCCEx_PLL3_Config+0x32>
- }
- }
- /* Configure the PLL3 multiplication and division factors. */
- __HAL_RCC_PLL3_CONFIG(pll3->PLL3M,
- 800e994: 4b42 ldr r3, [pc, #264] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800e996: 6a9b ldr r3, [r3, #40] @ 0x28
- 800e998: f023 727c bic.w r2, r3, #66060288 @ 0x3f00000
- 800e99c: 687b ldr r3, [r7, #4]
- 800e99e: 681b ldr r3, [r3, #0]
- 800e9a0: 051b lsls r3, r3, #20
- 800e9a2: 493f ldr r1, [pc, #252] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800e9a4: 4313 orrs r3, r2
- 800e9a6: 628b str r3, [r1, #40] @ 0x28
- 800e9a8: 687b ldr r3, [r7, #4]
- 800e9aa: 685b ldr r3, [r3, #4]
- 800e9ac: 3b01 subs r3, #1
- 800e9ae: f3c3 0208 ubfx r2, r3, #0, #9
- 800e9b2: 687b ldr r3, [r7, #4]
- 800e9b4: 689b ldr r3, [r3, #8]
- 800e9b6: 3b01 subs r3, #1
- 800e9b8: 025b lsls r3, r3, #9
- 800e9ba: b29b uxth r3, r3
- 800e9bc: 431a orrs r2, r3
- 800e9be: 687b ldr r3, [r7, #4]
- 800e9c0: 68db ldr r3, [r3, #12]
- 800e9c2: 3b01 subs r3, #1
- 800e9c4: 041b lsls r3, r3, #16
- 800e9c6: f403 03fe and.w r3, r3, #8323072 @ 0x7f0000
- 800e9ca: 431a orrs r2, r3
- 800e9cc: 687b ldr r3, [r7, #4]
- 800e9ce: 691b ldr r3, [r3, #16]
- 800e9d0: 3b01 subs r3, #1
- 800e9d2: 061b lsls r3, r3, #24
- 800e9d4: f003 43fe and.w r3, r3, #2130706432 @ 0x7f000000
- 800e9d8: 4931 ldr r1, [pc, #196] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800e9da: 4313 orrs r3, r2
- 800e9dc: 640b str r3, [r1, #64] @ 0x40
- pll3->PLL3P,
- pll3->PLL3Q,
- pll3->PLL3R);
- /* Select PLL3 input reference frequency range: VCI */
- __HAL_RCC_PLL3_VCIRANGE(pll3->PLL3RGE) ;
- 800e9de: 4b30 ldr r3, [pc, #192] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800e9e0: 6adb ldr r3, [r3, #44] @ 0x2c
- 800e9e2: f423 6240 bic.w r2, r3, #3072 @ 0xc00
- 800e9e6: 687b ldr r3, [r7, #4]
- 800e9e8: 695b ldr r3, [r3, #20]
- 800e9ea: 492d ldr r1, [pc, #180] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800e9ec: 4313 orrs r3, r2
- 800e9ee: 62cb str r3, [r1, #44] @ 0x2c
- /* Select PLL3 output frequency range : VCO */
- __HAL_RCC_PLL3_VCORANGE(pll3->PLL3VCOSEL) ;
- 800e9f0: 4b2b ldr r3, [pc, #172] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800e9f2: 6adb ldr r3, [r3, #44] @ 0x2c
- 800e9f4: f423 7200 bic.w r2, r3, #512 @ 0x200
- 800e9f8: 687b ldr r3, [r7, #4]
- 800e9fa: 699b ldr r3, [r3, #24]
- 800e9fc: 4928 ldr r1, [pc, #160] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800e9fe: 4313 orrs r3, r2
- 800ea00: 62cb str r3, [r1, #44] @ 0x2c
- /* Disable PLL3FRACN . */
- __HAL_RCC_PLL3FRACN_DISABLE();
- 800ea02: 4b27 ldr r3, [pc, #156] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea04: 6adb ldr r3, [r3, #44] @ 0x2c
- 800ea06: 4a26 ldr r2, [pc, #152] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea08: f423 7380 bic.w r3, r3, #256 @ 0x100
- 800ea0c: 62d3 str r3, [r2, #44] @ 0x2c
- /* Configures PLL3 clock Fractional Part Of The Multiplication Factor */
- __HAL_RCC_PLL3FRACN_CONFIG(pll3->PLL3FRACN);
- 800ea0e: 4b24 ldr r3, [pc, #144] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea10: 6c5a ldr r2, [r3, #68] @ 0x44
- 800ea12: 4b24 ldr r3, [pc, #144] @ (800eaa4 <RCCEx_PLL3_Config+0x160>)
- 800ea14: 4013 ands r3, r2
- 800ea16: 687a ldr r2, [r7, #4]
- 800ea18: 69d2 ldr r2, [r2, #28]
- 800ea1a: 00d2 lsls r2, r2, #3
- 800ea1c: 4920 ldr r1, [pc, #128] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea1e: 4313 orrs r3, r2
- 800ea20: 644b str r3, [r1, #68] @ 0x44
- /* Enable PLL3FRACN . */
- __HAL_RCC_PLL3FRACN_ENABLE();
- 800ea22: 4b1f ldr r3, [pc, #124] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea24: 6adb ldr r3, [r3, #44] @ 0x2c
- 800ea26: 4a1e ldr r2, [pc, #120] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea28: f443 7380 orr.w r3, r3, #256 @ 0x100
- 800ea2c: 62d3 str r3, [r2, #44] @ 0x2c
- /* Enable the PLL3 clock output */
- if (Divider == DIVIDER_P_UPDATE)
- 800ea2e: 683b ldr r3, [r7, #0]
- 800ea30: 2b00 cmp r3, #0
- 800ea32: d106 bne.n 800ea42 <RCCEx_PLL3_Config+0xfe>
- {
- __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVP);
- 800ea34: 4b1a ldr r3, [pc, #104] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea36: 6adb ldr r3, [r3, #44] @ 0x2c
- 800ea38: 4a19 ldr r2, [pc, #100] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea3a: f443 0380 orr.w r3, r3, #4194304 @ 0x400000
- 800ea3e: 62d3 str r3, [r2, #44] @ 0x2c
- 800ea40: e00f b.n 800ea62 <RCCEx_PLL3_Config+0x11e>
- }
- else if (Divider == DIVIDER_Q_UPDATE)
- 800ea42: 683b ldr r3, [r7, #0]
- 800ea44: 2b01 cmp r3, #1
- 800ea46: d106 bne.n 800ea56 <RCCEx_PLL3_Config+0x112>
- {
- __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ);
- 800ea48: 4b15 ldr r3, [pc, #84] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea4a: 6adb ldr r3, [r3, #44] @ 0x2c
- 800ea4c: 4a14 ldr r2, [pc, #80] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea4e: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
- 800ea52: 62d3 str r3, [r2, #44] @ 0x2c
- 800ea54: e005 b.n 800ea62 <RCCEx_PLL3_Config+0x11e>
- }
- else
- {
- __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVR);
- 800ea56: 4b12 ldr r3, [pc, #72] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea58: 6adb ldr r3, [r3, #44] @ 0x2c
- 800ea5a: 4a11 ldr r2, [pc, #68] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea5c: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000
- 800ea60: 62d3 str r3, [r2, #44] @ 0x2c
- }
- /* Enable PLL3. */
- __HAL_RCC_PLL3_ENABLE();
- 800ea62: 4b0f ldr r3, [pc, #60] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea64: 681b ldr r3, [r3, #0]
- 800ea66: 4a0e ldr r2, [pc, #56] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea68: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
- 800ea6c: 6013 str r3, [r2, #0]
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800ea6e: f7f6 fd7b bl 8005568 <HAL_GetTick>
- 800ea72: 60b8 str r0, [r7, #8]
- /* Wait till PLL3 is ready */
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U)
- 800ea74: e008 b.n 800ea88 <RCCEx_PLL3_Config+0x144>
- {
- if ((HAL_GetTick() - tickstart) > PLL3_TIMEOUT_VALUE)
- 800ea76: f7f6 fd77 bl 8005568 <HAL_GetTick>
- 800ea7a: 4602 mov r2, r0
- 800ea7c: 68bb ldr r3, [r7, #8]
- 800ea7e: 1ad3 subs r3, r2, r3
- 800ea80: 2b02 cmp r3, #2
- 800ea82: d901 bls.n 800ea88 <RCCEx_PLL3_Config+0x144>
- {
- return HAL_TIMEOUT;
- 800ea84: 2303 movs r3, #3
- 800ea86: e006 b.n 800ea96 <RCCEx_PLL3_Config+0x152>
- while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U)
- 800ea88: 4b05 ldr r3, [pc, #20] @ (800eaa0 <RCCEx_PLL3_Config+0x15c>)
- 800ea8a: 681b ldr r3, [r3, #0]
- 800ea8c: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
- 800ea90: 2b00 cmp r3, #0
- 800ea92: d0f0 beq.n 800ea76 <RCCEx_PLL3_Config+0x132>
- }
- }
- return status;
- 800ea94: 7bfb ldrb r3, [r7, #15]
- }
- 800ea96: 4618 mov r0, r3
- 800ea98: 3710 adds r7, #16
- 800ea9a: 46bd mov sp, r7
- 800ea9c: bd80 pop {r7, pc}
- 800ea9e: bf00 nop
- 800eaa0: 58024400 .word 0x58024400
- 800eaa4: ffff0007 .word 0xffff0007
- 0800eaa8 <HAL_RNG_Init>:
- * @param hrng pointer to a RNG_HandleTypeDef structure that contains
- * the configuration information for RNG.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
- {
- 800eaa8: b580 push {r7, lr}
- 800eaaa: b084 sub sp, #16
- 800eaac: af00 add r7, sp, #0
- 800eaae: 6078 str r0, [r7, #4]
- uint32_t tickstart;
- /* Check the RNG handle allocation */
- if (hrng == NULL)
- 800eab0: 687b ldr r3, [r7, #4]
- 800eab2: 2b00 cmp r3, #0
- 800eab4: d101 bne.n 800eaba <HAL_RNG_Init+0x12>
- {
- return HAL_ERROR;
- 800eab6: 2301 movs r3, #1
- 800eab8: e054 b.n 800eb64 <HAL_RNG_Init+0xbc>
- /* Init the low level hardware */
- hrng->MspInitCallback(hrng);
- }
- #else
- if (hrng->State == HAL_RNG_STATE_RESET)
- 800eaba: 687b ldr r3, [r7, #4]
- 800eabc: 7a5b ldrb r3, [r3, #9]
- 800eabe: b2db uxtb r3, r3
- 800eac0: 2b00 cmp r3, #0
- 800eac2: d105 bne.n 800ead0 <HAL_RNG_Init+0x28>
- {
- /* Allocate lock resource and initialize it */
- hrng->Lock = HAL_UNLOCKED;
- 800eac4: 687b ldr r3, [r7, #4]
- 800eac6: 2200 movs r2, #0
- 800eac8: 721a strb r2, [r3, #8]
- /* Init the low level hardware */
- HAL_RNG_MspInit(hrng);
- 800eaca: 6878 ldr r0, [r7, #4]
- 800eacc: f7f4 ffbc bl 8003a48 <HAL_RNG_MspInit>
- }
- #endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
- /* Change RNG peripheral state */
- hrng->State = HAL_RNG_STATE_BUSY;
- 800ead0: 687b ldr r3, [r7, #4]
- 800ead2: 2202 movs r2, #2
- 800ead4: 725a strb r2, [r3, #9]
- }
- }
- }
- #else
- /* Clock Error Detection Configuration */
- MODIFY_REG(hrng->Instance->CR, RNG_CR_CED, hrng->Init.ClockErrorDetection);
- 800ead6: 687b ldr r3, [r7, #4]
- 800ead8: 681b ldr r3, [r3, #0]
- 800eada: 681b ldr r3, [r3, #0]
- 800eadc: f023 0120 bic.w r1, r3, #32
- 800eae0: 687b ldr r3, [r7, #4]
- 800eae2: 685a ldr r2, [r3, #4]
- 800eae4: 687b ldr r3, [r7, #4]
- 800eae6: 681b ldr r3, [r3, #0]
- 800eae8: 430a orrs r2, r1
- 800eaea: 601a str r2, [r3, #0]
- #endif /* RNG_CR_CONDRST */
- /* Enable the RNG Peripheral */
- __HAL_RNG_ENABLE(hrng);
- 800eaec: 687b ldr r3, [r7, #4]
- 800eaee: 681b ldr r3, [r3, #0]
- 800eaf0: 681a ldr r2, [r3, #0]
- 800eaf2: 687b ldr r3, [r7, #4]
- 800eaf4: 681b ldr r3, [r3, #0]
- 800eaf6: f042 0204 orr.w r2, r2, #4
- 800eafa: 601a str r2, [r3, #0]
- /* verify that no seed error */
- if (__HAL_RNG_GET_IT(hrng, RNG_IT_SEI) != RESET)
- 800eafc: 687b ldr r3, [r7, #4]
- 800eafe: 681b ldr r3, [r3, #0]
- 800eb00: 685b ldr r3, [r3, #4]
- 800eb02: f003 0340 and.w r3, r3, #64 @ 0x40
- 800eb06: 2b40 cmp r3, #64 @ 0x40
- 800eb08: d104 bne.n 800eb14 <HAL_RNG_Init+0x6c>
- {
- hrng->State = HAL_RNG_STATE_ERROR;
- 800eb0a: 687b ldr r3, [r7, #4]
- 800eb0c: 2204 movs r2, #4
- 800eb0e: 725a strb r2, [r3, #9]
- return HAL_ERROR;
- 800eb10: 2301 movs r3, #1
- 800eb12: e027 b.n 800eb64 <HAL_RNG_Init+0xbc>
- }
- /* Get tick */
- tickstart = HAL_GetTick();
- 800eb14: f7f6 fd28 bl 8005568 <HAL_GetTick>
- 800eb18: 60f8 str r0, [r7, #12]
- /* Check if data register contains valid random data */
- while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
- 800eb1a: e015 b.n 800eb48 <HAL_RNG_Init+0xa0>
- {
- if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
- 800eb1c: f7f6 fd24 bl 8005568 <HAL_GetTick>
- 800eb20: 4602 mov r2, r0
- 800eb22: 68fb ldr r3, [r7, #12]
- 800eb24: 1ad3 subs r3, r2, r3
- 800eb26: 2b02 cmp r3, #2
- 800eb28: d90e bls.n 800eb48 <HAL_RNG_Init+0xa0>
- {
- /* New check to avoid false timeout detection in case of preemption */
- if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
- 800eb2a: 687b ldr r3, [r7, #4]
- 800eb2c: 681b ldr r3, [r3, #0]
- 800eb2e: 685b ldr r3, [r3, #4]
- 800eb30: f003 0304 and.w r3, r3, #4
- 800eb34: 2b04 cmp r3, #4
- 800eb36: d107 bne.n 800eb48 <HAL_RNG_Init+0xa0>
- {
- hrng->State = HAL_RNG_STATE_ERROR;
- 800eb38: 687b ldr r3, [r7, #4]
- 800eb3a: 2204 movs r2, #4
- 800eb3c: 725a strb r2, [r3, #9]
- hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
- 800eb3e: 687b ldr r3, [r7, #4]
- 800eb40: 2202 movs r2, #2
- 800eb42: 60da str r2, [r3, #12]
- return HAL_ERROR;
- 800eb44: 2301 movs r3, #1
- 800eb46: e00d b.n 800eb64 <HAL_RNG_Init+0xbc>
- while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
- 800eb48: 687b ldr r3, [r7, #4]
- 800eb4a: 681b ldr r3, [r3, #0]
- 800eb4c: 685b ldr r3, [r3, #4]
- 800eb4e: f003 0304 and.w r3, r3, #4
- 800eb52: 2b04 cmp r3, #4
- 800eb54: d0e2 beq.n 800eb1c <HAL_RNG_Init+0x74>
- }
- }
- }
- /* Initialize the RNG state */
- hrng->State = HAL_RNG_STATE_READY;
- 800eb56: 687b ldr r3, [r7, #4]
- 800eb58: 2201 movs r2, #1
- 800eb5a: 725a strb r2, [r3, #9]
- /* Initialise the error code */
- hrng->ErrorCode = HAL_RNG_ERROR_NONE;
- 800eb5c: 687b ldr r3, [r7, #4]
- 800eb5e: 2200 movs r2, #0
- 800eb60: 60da str r2, [r3, #12]
- /* Return function status */
- return HAL_OK;
- 800eb62: 2300 movs r3, #0
- }
- 800eb64: 4618 mov r0, r3
- 800eb66: 3710 adds r7, #16
- 800eb68: 46bd mov sp, r7
- 800eb6a: bd80 pop {r7, pc}
- 0800eb6c <HAL_TIM_Base_Init>:
- * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
- * @param htim TIM Base handle
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
- {
- 800eb6c: b580 push {r7, lr}
- 800eb6e: b082 sub sp, #8
- 800eb70: af00 add r7, sp, #0
- 800eb72: 6078 str r0, [r7, #4]
- /* Check the TIM handle allocation */
- if (htim == NULL)
- 800eb74: 687b ldr r3, [r7, #4]
- 800eb76: 2b00 cmp r3, #0
- 800eb78: d101 bne.n 800eb7e <HAL_TIM_Base_Init+0x12>
- {
- return HAL_ERROR;
- 800eb7a: 2301 movs r3, #1
- 800eb7c: e049 b.n 800ec12 <HAL_TIM_Base_Init+0xa6>
- assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
- assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
- assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
- assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
- if (htim->State == HAL_TIM_STATE_RESET)
- 800eb7e: 687b ldr r3, [r7, #4]
- 800eb80: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
- 800eb84: b2db uxtb r3, r3
- 800eb86: 2b00 cmp r3, #0
- 800eb88: d106 bne.n 800eb98 <HAL_TIM_Base_Init+0x2c>
- {
- /* Allocate lock resource and initialize it */
- htim->Lock = HAL_UNLOCKED;
- 800eb8a: 687b ldr r3, [r7, #4]
- 800eb8c: 2200 movs r2, #0
- 800eb8e: f883 203c strb.w r2, [r3, #60] @ 0x3c
- }
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- htim->Base_MspInitCallback(htim);
- #else
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- HAL_TIM_Base_MspInit(htim);
- 800eb92: 6878 ldr r0, [r7, #4]
- 800eb94: f7f4 ffcc bl 8003b30 <HAL_TIM_Base_MspInit>
- #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
- 800eb98: 687b ldr r3, [r7, #4]
- 800eb9a: 2202 movs r2, #2
- 800eb9c: f883 203d strb.w r2, [r3, #61] @ 0x3d
- /* Set the Time Base configuration */
- TIM_Base_SetConfig(htim->Instance, &htim->Init);
- 800eba0: 687b ldr r3, [r7, #4]
- 800eba2: 681a ldr r2, [r3, #0]
- 800eba4: 687b ldr r3, [r7, #4]
- 800eba6: 3304 adds r3, #4
- 800eba8: 4619 mov r1, r3
- 800ebaa: 4610 mov r0, r2
- 800ebac: f001 f918 bl 800fde0 <TIM_Base_SetConfig>
- /* Initialize the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
- 800ebb0: 687b ldr r3, [r7, #4]
- 800ebb2: 2201 movs r2, #1
- 800ebb4: f883 2048 strb.w r2, [r3, #72] @ 0x48
- /* Initialize the TIM channels state */
- TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
- 800ebb8: 687b ldr r3, [r7, #4]
- 800ebba: 2201 movs r2, #1
- 800ebbc: f883 203e strb.w r2, [r3, #62] @ 0x3e
- 800ebc0: 687b ldr r3, [r7, #4]
- 800ebc2: 2201 movs r2, #1
- 800ebc4: f883 203f strb.w r2, [r3, #63] @ 0x3f
- 800ebc8: 687b ldr r3, [r7, #4]
- 800ebca: 2201 movs r2, #1
- 800ebcc: f883 2040 strb.w r2, [r3, #64] @ 0x40
- 800ebd0: 687b ldr r3, [r7, #4]
- 800ebd2: 2201 movs r2, #1
- 800ebd4: f883 2041 strb.w r2, [r3, #65] @ 0x41
- 800ebd8: 687b ldr r3, [r7, #4]
- 800ebda: 2201 movs r2, #1
- 800ebdc: f883 2042 strb.w r2, [r3, #66] @ 0x42
- 800ebe0: 687b ldr r3, [r7, #4]
- 800ebe2: 2201 movs r2, #1
- 800ebe4: f883 2043 strb.w r2, [r3, #67] @ 0x43
- TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
- 800ebe8: 687b ldr r3, [r7, #4]
- 800ebea: 2201 movs r2, #1
- 800ebec: f883 2044 strb.w r2, [r3, #68] @ 0x44
- 800ebf0: 687b ldr r3, [r7, #4]
- 800ebf2: 2201 movs r2, #1
- 800ebf4: f883 2045 strb.w r2, [r3, #69] @ 0x45
- 800ebf8: 687b ldr r3, [r7, #4]
- 800ebfa: 2201 movs r2, #1
- 800ebfc: f883 2046 strb.w r2, [r3, #70] @ 0x46
- 800ec00: 687b ldr r3, [r7, #4]
- 800ec02: 2201 movs r2, #1
- 800ec04: f883 2047 strb.w r2, [r3, #71] @ 0x47
- /* Initialize the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
- 800ec08: 687b ldr r3, [r7, #4]
- 800ec0a: 2201 movs r2, #1
- 800ec0c: f883 203d strb.w r2, [r3, #61] @ 0x3d
- return HAL_OK;
- 800ec10: 2300 movs r3, #0
- }
- 800ec12: 4618 mov r0, r3
- 800ec14: 3708 adds r7, #8
- 800ec16: 46bd mov sp, r7
- 800ec18: bd80 pop {r7, pc}
- ...
- 0800ec1c <HAL_TIM_Base_Start>:
- * @brief Starts the TIM Base generation.
- * @param htim TIM Base handle
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim)
- {
- 800ec1c: b480 push {r7}
- 800ec1e: b085 sub sp, #20
- 800ec20: af00 add r7, sp, #0
- 800ec22: 6078 str r0, [r7, #4]
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
- /* Check the TIM state */
- if (htim->State != HAL_TIM_STATE_READY)
- 800ec24: 687b ldr r3, [r7, #4]
- 800ec26: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
- 800ec2a: b2db uxtb r3, r3
- 800ec2c: 2b01 cmp r3, #1
- 800ec2e: d001 beq.n 800ec34 <HAL_TIM_Base_Start+0x18>
- {
- return HAL_ERROR;
- 800ec30: 2301 movs r3, #1
- 800ec32: e04c b.n 800ecce <HAL_TIM_Base_Start+0xb2>
- }
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
- 800ec34: 687b ldr r3, [r7, #4]
- 800ec36: 2202 movs r2, #2
- 800ec38: f883 203d strb.w r2, [r3, #61] @ 0x3d
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- 800ec3c: 687b ldr r3, [r7, #4]
- 800ec3e: 681b ldr r3, [r3, #0]
- 800ec40: 4a26 ldr r2, [pc, #152] @ (800ecdc <HAL_TIM_Base_Start+0xc0>)
- 800ec42: 4293 cmp r3, r2
- 800ec44: d022 beq.n 800ec8c <HAL_TIM_Base_Start+0x70>
- 800ec46: 687b ldr r3, [r7, #4]
- 800ec48: 681b ldr r3, [r3, #0]
- 800ec4a: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 800ec4e: d01d beq.n 800ec8c <HAL_TIM_Base_Start+0x70>
- 800ec50: 687b ldr r3, [r7, #4]
- 800ec52: 681b ldr r3, [r3, #0]
- 800ec54: 4a22 ldr r2, [pc, #136] @ (800ece0 <HAL_TIM_Base_Start+0xc4>)
- 800ec56: 4293 cmp r3, r2
- 800ec58: d018 beq.n 800ec8c <HAL_TIM_Base_Start+0x70>
- 800ec5a: 687b ldr r3, [r7, #4]
- 800ec5c: 681b ldr r3, [r3, #0]
- 800ec5e: 4a21 ldr r2, [pc, #132] @ (800ece4 <HAL_TIM_Base_Start+0xc8>)
- 800ec60: 4293 cmp r3, r2
- 800ec62: d013 beq.n 800ec8c <HAL_TIM_Base_Start+0x70>
- 800ec64: 687b ldr r3, [r7, #4]
- 800ec66: 681b ldr r3, [r3, #0]
- 800ec68: 4a1f ldr r2, [pc, #124] @ (800ece8 <HAL_TIM_Base_Start+0xcc>)
- 800ec6a: 4293 cmp r3, r2
- 800ec6c: d00e beq.n 800ec8c <HAL_TIM_Base_Start+0x70>
- 800ec6e: 687b ldr r3, [r7, #4]
- 800ec70: 681b ldr r3, [r3, #0]
- 800ec72: 4a1e ldr r2, [pc, #120] @ (800ecec <HAL_TIM_Base_Start+0xd0>)
- 800ec74: 4293 cmp r3, r2
- 800ec76: d009 beq.n 800ec8c <HAL_TIM_Base_Start+0x70>
- 800ec78: 687b ldr r3, [r7, #4]
- 800ec7a: 681b ldr r3, [r3, #0]
- 800ec7c: 4a1c ldr r2, [pc, #112] @ (800ecf0 <HAL_TIM_Base_Start+0xd4>)
- 800ec7e: 4293 cmp r3, r2
- 800ec80: d004 beq.n 800ec8c <HAL_TIM_Base_Start+0x70>
- 800ec82: 687b ldr r3, [r7, #4]
- 800ec84: 681b ldr r3, [r3, #0]
- 800ec86: 4a1b ldr r2, [pc, #108] @ (800ecf4 <HAL_TIM_Base_Start+0xd8>)
- 800ec88: 4293 cmp r3, r2
- 800ec8a: d115 bne.n 800ecb8 <HAL_TIM_Base_Start+0x9c>
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- 800ec8c: 687b ldr r3, [r7, #4]
- 800ec8e: 681b ldr r3, [r3, #0]
- 800ec90: 689a ldr r2, [r3, #8]
- 800ec92: 4b19 ldr r3, [pc, #100] @ (800ecf8 <HAL_TIM_Base_Start+0xdc>)
- 800ec94: 4013 ands r3, r2
- 800ec96: 60fb str r3, [r7, #12]
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- 800ec98: 68fb ldr r3, [r7, #12]
- 800ec9a: 2b06 cmp r3, #6
- 800ec9c: d015 beq.n 800ecca <HAL_TIM_Base_Start+0xae>
- 800ec9e: 68fb ldr r3, [r7, #12]
- 800eca0: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
- 800eca4: d011 beq.n 800ecca <HAL_TIM_Base_Start+0xae>
- {
- __HAL_TIM_ENABLE(htim);
- 800eca6: 687b ldr r3, [r7, #4]
- 800eca8: 681b ldr r3, [r3, #0]
- 800ecaa: 681a ldr r2, [r3, #0]
- 800ecac: 687b ldr r3, [r7, #4]
- 800ecae: 681b ldr r3, [r3, #0]
- 800ecb0: f042 0201 orr.w r2, r2, #1
- 800ecb4: 601a str r2, [r3, #0]
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- 800ecb6: e008 b.n 800ecca <HAL_TIM_Base_Start+0xae>
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- 800ecb8: 687b ldr r3, [r7, #4]
- 800ecba: 681b ldr r3, [r3, #0]
- 800ecbc: 681a ldr r2, [r3, #0]
- 800ecbe: 687b ldr r3, [r7, #4]
- 800ecc0: 681b ldr r3, [r3, #0]
- 800ecc2: f042 0201 orr.w r2, r2, #1
- 800ecc6: 601a str r2, [r3, #0]
- 800ecc8: e000 b.n 800eccc <HAL_TIM_Base_Start+0xb0>
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- 800ecca: bf00 nop
- }
- /* Return function status */
- return HAL_OK;
- 800eccc: 2300 movs r3, #0
- }
- 800ecce: 4618 mov r0, r3
- 800ecd0: 3714 adds r7, #20
- 800ecd2: 46bd mov sp, r7
- 800ecd4: f85d 7b04 ldr.w r7, [sp], #4
- 800ecd8: 4770 bx lr
- 800ecda: bf00 nop
- 800ecdc: 40010000 .word 0x40010000
- 800ece0: 40000400 .word 0x40000400
- 800ece4: 40000800 .word 0x40000800
- 800ece8: 40000c00 .word 0x40000c00
- 800ecec: 40010400 .word 0x40010400
- 800ecf0: 40001800 .word 0x40001800
- 800ecf4: 40014000 .word 0x40014000
- 800ecf8: 00010007 .word 0x00010007
- 0800ecfc <HAL_TIM_Base_Start_IT>:
- * @brief Starts the TIM Base generation in interrupt mode.
- * @param htim TIM Base handle
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
- {
- 800ecfc: b480 push {r7}
- 800ecfe: b085 sub sp, #20
- 800ed00: af00 add r7, sp, #0
- 800ed02: 6078 str r0, [r7, #4]
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
- /* Check the TIM state */
- if (htim->State != HAL_TIM_STATE_READY)
- 800ed04: 687b ldr r3, [r7, #4]
- 800ed06: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
- 800ed0a: b2db uxtb r3, r3
- 800ed0c: 2b01 cmp r3, #1
- 800ed0e: d001 beq.n 800ed14 <HAL_TIM_Base_Start_IT+0x18>
- {
- return HAL_ERROR;
- 800ed10: 2301 movs r3, #1
- 800ed12: e054 b.n 800edbe <HAL_TIM_Base_Start_IT+0xc2>
- }
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
- 800ed14: 687b ldr r3, [r7, #4]
- 800ed16: 2202 movs r2, #2
- 800ed18: f883 203d strb.w r2, [r3, #61] @ 0x3d
- /* Enable the TIM Update interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
- 800ed1c: 687b ldr r3, [r7, #4]
- 800ed1e: 681b ldr r3, [r3, #0]
- 800ed20: 68da ldr r2, [r3, #12]
- 800ed22: 687b ldr r3, [r7, #4]
- 800ed24: 681b ldr r3, [r3, #0]
- 800ed26: f042 0201 orr.w r2, r2, #1
- 800ed2a: 60da str r2, [r3, #12]
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- 800ed2c: 687b ldr r3, [r7, #4]
- 800ed2e: 681b ldr r3, [r3, #0]
- 800ed30: 4a26 ldr r2, [pc, #152] @ (800edcc <HAL_TIM_Base_Start_IT+0xd0>)
- 800ed32: 4293 cmp r3, r2
- 800ed34: d022 beq.n 800ed7c <HAL_TIM_Base_Start_IT+0x80>
- 800ed36: 687b ldr r3, [r7, #4]
- 800ed38: 681b ldr r3, [r3, #0]
- 800ed3a: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 800ed3e: d01d beq.n 800ed7c <HAL_TIM_Base_Start_IT+0x80>
- 800ed40: 687b ldr r3, [r7, #4]
- 800ed42: 681b ldr r3, [r3, #0]
- 800ed44: 4a22 ldr r2, [pc, #136] @ (800edd0 <HAL_TIM_Base_Start_IT+0xd4>)
- 800ed46: 4293 cmp r3, r2
- 800ed48: d018 beq.n 800ed7c <HAL_TIM_Base_Start_IT+0x80>
- 800ed4a: 687b ldr r3, [r7, #4]
- 800ed4c: 681b ldr r3, [r3, #0]
- 800ed4e: 4a21 ldr r2, [pc, #132] @ (800edd4 <HAL_TIM_Base_Start_IT+0xd8>)
- 800ed50: 4293 cmp r3, r2
- 800ed52: d013 beq.n 800ed7c <HAL_TIM_Base_Start_IT+0x80>
- 800ed54: 687b ldr r3, [r7, #4]
- 800ed56: 681b ldr r3, [r3, #0]
- 800ed58: 4a1f ldr r2, [pc, #124] @ (800edd8 <HAL_TIM_Base_Start_IT+0xdc>)
- 800ed5a: 4293 cmp r3, r2
- 800ed5c: d00e beq.n 800ed7c <HAL_TIM_Base_Start_IT+0x80>
- 800ed5e: 687b ldr r3, [r7, #4]
- 800ed60: 681b ldr r3, [r3, #0]
- 800ed62: 4a1e ldr r2, [pc, #120] @ (800eddc <HAL_TIM_Base_Start_IT+0xe0>)
- 800ed64: 4293 cmp r3, r2
- 800ed66: d009 beq.n 800ed7c <HAL_TIM_Base_Start_IT+0x80>
- 800ed68: 687b ldr r3, [r7, #4]
- 800ed6a: 681b ldr r3, [r3, #0]
- 800ed6c: 4a1c ldr r2, [pc, #112] @ (800ede0 <HAL_TIM_Base_Start_IT+0xe4>)
- 800ed6e: 4293 cmp r3, r2
- 800ed70: d004 beq.n 800ed7c <HAL_TIM_Base_Start_IT+0x80>
- 800ed72: 687b ldr r3, [r7, #4]
- 800ed74: 681b ldr r3, [r3, #0]
- 800ed76: 4a1b ldr r2, [pc, #108] @ (800ede4 <HAL_TIM_Base_Start_IT+0xe8>)
- 800ed78: 4293 cmp r3, r2
- 800ed7a: d115 bne.n 800eda8 <HAL_TIM_Base_Start_IT+0xac>
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- 800ed7c: 687b ldr r3, [r7, #4]
- 800ed7e: 681b ldr r3, [r3, #0]
- 800ed80: 689a ldr r2, [r3, #8]
- 800ed82: 4b19 ldr r3, [pc, #100] @ (800ede8 <HAL_TIM_Base_Start_IT+0xec>)
- 800ed84: 4013 ands r3, r2
- 800ed86: 60fb str r3, [r7, #12]
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- 800ed88: 68fb ldr r3, [r7, #12]
- 800ed8a: 2b06 cmp r3, #6
- 800ed8c: d015 beq.n 800edba <HAL_TIM_Base_Start_IT+0xbe>
- 800ed8e: 68fb ldr r3, [r7, #12]
- 800ed90: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
- 800ed94: d011 beq.n 800edba <HAL_TIM_Base_Start_IT+0xbe>
- {
- __HAL_TIM_ENABLE(htim);
- 800ed96: 687b ldr r3, [r7, #4]
- 800ed98: 681b ldr r3, [r3, #0]
- 800ed9a: 681a ldr r2, [r3, #0]
- 800ed9c: 687b ldr r3, [r7, #4]
- 800ed9e: 681b ldr r3, [r3, #0]
- 800eda0: f042 0201 orr.w r2, r2, #1
- 800eda4: 601a str r2, [r3, #0]
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- 800eda6: e008 b.n 800edba <HAL_TIM_Base_Start_IT+0xbe>
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- 800eda8: 687b ldr r3, [r7, #4]
- 800edaa: 681b ldr r3, [r3, #0]
- 800edac: 681a ldr r2, [r3, #0]
- 800edae: 687b ldr r3, [r7, #4]
- 800edb0: 681b ldr r3, [r3, #0]
- 800edb2: f042 0201 orr.w r2, r2, #1
- 800edb6: 601a str r2, [r3, #0]
- 800edb8: e000 b.n 800edbc <HAL_TIM_Base_Start_IT+0xc0>
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- 800edba: bf00 nop
- }
- /* Return function status */
- return HAL_OK;
- 800edbc: 2300 movs r3, #0
- }
- 800edbe: 4618 mov r0, r3
- 800edc0: 3714 adds r7, #20
- 800edc2: 46bd mov sp, r7
- 800edc4: f85d 7b04 ldr.w r7, [sp], #4
- 800edc8: 4770 bx lr
- 800edca: bf00 nop
- 800edcc: 40010000 .word 0x40010000
- 800edd0: 40000400 .word 0x40000400
- 800edd4: 40000800 .word 0x40000800
- 800edd8: 40000c00 .word 0x40000c00
- 800eddc: 40010400 .word 0x40010400
- 800ede0: 40001800 .word 0x40001800
- 800ede4: 40014000 .word 0x40014000
- 800ede8: 00010007 .word 0x00010007
- 0800edec <HAL_TIM_PWM_Init>:
- * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
- * @param htim TIM PWM handle
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
- {
- 800edec: b580 push {r7, lr}
- 800edee: b082 sub sp, #8
- 800edf0: af00 add r7, sp, #0
- 800edf2: 6078 str r0, [r7, #4]
- /* Check the TIM handle allocation */
- if (htim == NULL)
- 800edf4: 687b ldr r3, [r7, #4]
- 800edf6: 2b00 cmp r3, #0
- 800edf8: d101 bne.n 800edfe <HAL_TIM_PWM_Init+0x12>
- {
- return HAL_ERROR;
- 800edfa: 2301 movs r3, #1
- 800edfc: e049 b.n 800ee92 <HAL_TIM_PWM_Init+0xa6>
- assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
- assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
- assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
- assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
- if (htim->State == HAL_TIM_STATE_RESET)
- 800edfe: 687b ldr r3, [r7, #4]
- 800ee00: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
- 800ee04: b2db uxtb r3, r3
- 800ee06: 2b00 cmp r3, #0
- 800ee08: d106 bne.n 800ee18 <HAL_TIM_PWM_Init+0x2c>
- {
- /* Allocate lock resource and initialize it */
- htim->Lock = HAL_UNLOCKED;
- 800ee0a: 687b ldr r3, [r7, #4]
- 800ee0c: 2200 movs r2, #0
- 800ee0e: f883 203c strb.w r2, [r3, #60] @ 0x3c
- }
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- htim->PWM_MspInitCallback(htim);
- #else
- /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
- HAL_TIM_PWM_MspInit(htim);
- 800ee12: 6878 ldr r0, [r7, #4]
- 800ee14: f7f4 fe52 bl 8003abc <HAL_TIM_PWM_MspInit>
- #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
- 800ee18: 687b ldr r3, [r7, #4]
- 800ee1a: 2202 movs r2, #2
- 800ee1c: f883 203d strb.w r2, [r3, #61] @ 0x3d
- /* Init the base time for the PWM */
- TIM_Base_SetConfig(htim->Instance, &htim->Init);
- 800ee20: 687b ldr r3, [r7, #4]
- 800ee22: 681a ldr r2, [r3, #0]
- 800ee24: 687b ldr r3, [r7, #4]
- 800ee26: 3304 adds r3, #4
- 800ee28: 4619 mov r1, r3
- 800ee2a: 4610 mov r0, r2
- 800ee2c: f000 ffd8 bl 800fde0 <TIM_Base_SetConfig>
- /* Initialize the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
- 800ee30: 687b ldr r3, [r7, #4]
- 800ee32: 2201 movs r2, #1
- 800ee34: f883 2048 strb.w r2, [r3, #72] @ 0x48
- /* Initialize the TIM channels state */
- TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
- 800ee38: 687b ldr r3, [r7, #4]
- 800ee3a: 2201 movs r2, #1
- 800ee3c: f883 203e strb.w r2, [r3, #62] @ 0x3e
- 800ee40: 687b ldr r3, [r7, #4]
- 800ee42: 2201 movs r2, #1
- 800ee44: f883 203f strb.w r2, [r3, #63] @ 0x3f
- 800ee48: 687b ldr r3, [r7, #4]
- 800ee4a: 2201 movs r2, #1
- 800ee4c: f883 2040 strb.w r2, [r3, #64] @ 0x40
- 800ee50: 687b ldr r3, [r7, #4]
- 800ee52: 2201 movs r2, #1
- 800ee54: f883 2041 strb.w r2, [r3, #65] @ 0x41
- 800ee58: 687b ldr r3, [r7, #4]
- 800ee5a: 2201 movs r2, #1
- 800ee5c: f883 2042 strb.w r2, [r3, #66] @ 0x42
- 800ee60: 687b ldr r3, [r7, #4]
- 800ee62: 2201 movs r2, #1
- 800ee64: f883 2043 strb.w r2, [r3, #67] @ 0x43
- TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
- 800ee68: 687b ldr r3, [r7, #4]
- 800ee6a: 2201 movs r2, #1
- 800ee6c: f883 2044 strb.w r2, [r3, #68] @ 0x44
- 800ee70: 687b ldr r3, [r7, #4]
- 800ee72: 2201 movs r2, #1
- 800ee74: f883 2045 strb.w r2, [r3, #69] @ 0x45
- 800ee78: 687b ldr r3, [r7, #4]
- 800ee7a: 2201 movs r2, #1
- 800ee7c: f883 2046 strb.w r2, [r3, #70] @ 0x46
- 800ee80: 687b ldr r3, [r7, #4]
- 800ee82: 2201 movs r2, #1
- 800ee84: f883 2047 strb.w r2, [r3, #71] @ 0x47
- /* Initialize the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
- 800ee88: 687b ldr r3, [r7, #4]
- 800ee8a: 2201 movs r2, #1
- 800ee8c: f883 203d strb.w r2, [r3, #61] @ 0x3d
- return HAL_OK;
- 800ee90: 2300 movs r3, #0
- }
- 800ee92: 4618 mov r0, r3
- 800ee94: 3708 adds r7, #8
- 800ee96: 46bd mov sp, r7
- 800ee98: bd80 pop {r7, pc}
- ...
- 0800ee9c <HAL_TIM_PWM_Start>:
- * @arg TIM_CHANNEL_5: TIM Channel 5 selected
- * @arg TIM_CHANNEL_6: TIM Channel 6 selected
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
- {
- 800ee9c: b580 push {r7, lr}
- 800ee9e: b084 sub sp, #16
- 800eea0: af00 add r7, sp, #0
- 800eea2: 6078 str r0, [r7, #4]
- 800eea4: 6039 str r1, [r7, #0]
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
- /* Check the TIM channel state */
- if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
- 800eea6: 683b ldr r3, [r7, #0]
- 800eea8: 2b00 cmp r3, #0
- 800eeaa: d109 bne.n 800eec0 <HAL_TIM_PWM_Start+0x24>
- 800eeac: 687b ldr r3, [r7, #4]
- 800eeae: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
- 800eeb2: b2db uxtb r3, r3
- 800eeb4: 2b01 cmp r3, #1
- 800eeb6: bf14 ite ne
- 800eeb8: 2301 movne r3, #1
- 800eeba: 2300 moveq r3, #0
- 800eebc: b2db uxtb r3, r3
- 800eebe: e03c b.n 800ef3a <HAL_TIM_PWM_Start+0x9e>
- 800eec0: 683b ldr r3, [r7, #0]
- 800eec2: 2b04 cmp r3, #4
- 800eec4: d109 bne.n 800eeda <HAL_TIM_PWM_Start+0x3e>
- 800eec6: 687b ldr r3, [r7, #4]
- 800eec8: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
- 800eecc: b2db uxtb r3, r3
- 800eece: 2b01 cmp r3, #1
- 800eed0: bf14 ite ne
- 800eed2: 2301 movne r3, #1
- 800eed4: 2300 moveq r3, #0
- 800eed6: b2db uxtb r3, r3
- 800eed8: e02f b.n 800ef3a <HAL_TIM_PWM_Start+0x9e>
- 800eeda: 683b ldr r3, [r7, #0]
- 800eedc: 2b08 cmp r3, #8
- 800eede: d109 bne.n 800eef4 <HAL_TIM_PWM_Start+0x58>
- 800eee0: 687b ldr r3, [r7, #4]
- 800eee2: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
- 800eee6: b2db uxtb r3, r3
- 800eee8: 2b01 cmp r3, #1
- 800eeea: bf14 ite ne
- 800eeec: 2301 movne r3, #1
- 800eeee: 2300 moveq r3, #0
- 800eef0: b2db uxtb r3, r3
- 800eef2: e022 b.n 800ef3a <HAL_TIM_PWM_Start+0x9e>
- 800eef4: 683b ldr r3, [r7, #0]
- 800eef6: 2b0c cmp r3, #12
- 800eef8: d109 bne.n 800ef0e <HAL_TIM_PWM_Start+0x72>
- 800eefa: 687b ldr r3, [r7, #4]
- 800eefc: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
- 800ef00: b2db uxtb r3, r3
- 800ef02: 2b01 cmp r3, #1
- 800ef04: bf14 ite ne
- 800ef06: 2301 movne r3, #1
- 800ef08: 2300 moveq r3, #0
- 800ef0a: b2db uxtb r3, r3
- 800ef0c: e015 b.n 800ef3a <HAL_TIM_PWM_Start+0x9e>
- 800ef0e: 683b ldr r3, [r7, #0]
- 800ef10: 2b10 cmp r3, #16
- 800ef12: d109 bne.n 800ef28 <HAL_TIM_PWM_Start+0x8c>
- 800ef14: 687b ldr r3, [r7, #4]
- 800ef16: f893 3042 ldrb.w r3, [r3, #66] @ 0x42
- 800ef1a: b2db uxtb r3, r3
- 800ef1c: 2b01 cmp r3, #1
- 800ef1e: bf14 ite ne
- 800ef20: 2301 movne r3, #1
- 800ef22: 2300 moveq r3, #0
- 800ef24: b2db uxtb r3, r3
- 800ef26: e008 b.n 800ef3a <HAL_TIM_PWM_Start+0x9e>
- 800ef28: 687b ldr r3, [r7, #4]
- 800ef2a: f893 3043 ldrb.w r3, [r3, #67] @ 0x43
- 800ef2e: b2db uxtb r3, r3
- 800ef30: 2b01 cmp r3, #1
- 800ef32: bf14 ite ne
- 800ef34: 2301 movne r3, #1
- 800ef36: 2300 moveq r3, #0
- 800ef38: b2db uxtb r3, r3
- 800ef3a: 2b00 cmp r3, #0
- 800ef3c: d001 beq.n 800ef42 <HAL_TIM_PWM_Start+0xa6>
- {
- return HAL_ERROR;
- 800ef3e: 2301 movs r3, #1
- 800ef40: e0a1 b.n 800f086 <HAL_TIM_PWM_Start+0x1ea>
- }
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
- 800ef42: 683b ldr r3, [r7, #0]
- 800ef44: 2b00 cmp r3, #0
- 800ef46: d104 bne.n 800ef52 <HAL_TIM_PWM_Start+0xb6>
- 800ef48: 687b ldr r3, [r7, #4]
- 800ef4a: 2202 movs r2, #2
- 800ef4c: f883 203e strb.w r2, [r3, #62] @ 0x3e
- 800ef50: e023 b.n 800ef9a <HAL_TIM_PWM_Start+0xfe>
- 800ef52: 683b ldr r3, [r7, #0]
- 800ef54: 2b04 cmp r3, #4
- 800ef56: d104 bne.n 800ef62 <HAL_TIM_PWM_Start+0xc6>
- 800ef58: 687b ldr r3, [r7, #4]
- 800ef5a: 2202 movs r2, #2
- 800ef5c: f883 203f strb.w r2, [r3, #63] @ 0x3f
- 800ef60: e01b b.n 800ef9a <HAL_TIM_PWM_Start+0xfe>
- 800ef62: 683b ldr r3, [r7, #0]
- 800ef64: 2b08 cmp r3, #8
- 800ef66: d104 bne.n 800ef72 <HAL_TIM_PWM_Start+0xd6>
- 800ef68: 687b ldr r3, [r7, #4]
- 800ef6a: 2202 movs r2, #2
- 800ef6c: f883 2040 strb.w r2, [r3, #64] @ 0x40
- 800ef70: e013 b.n 800ef9a <HAL_TIM_PWM_Start+0xfe>
- 800ef72: 683b ldr r3, [r7, #0]
- 800ef74: 2b0c cmp r3, #12
- 800ef76: d104 bne.n 800ef82 <HAL_TIM_PWM_Start+0xe6>
- 800ef78: 687b ldr r3, [r7, #4]
- 800ef7a: 2202 movs r2, #2
- 800ef7c: f883 2041 strb.w r2, [r3, #65] @ 0x41
- 800ef80: e00b b.n 800ef9a <HAL_TIM_PWM_Start+0xfe>
- 800ef82: 683b ldr r3, [r7, #0]
- 800ef84: 2b10 cmp r3, #16
- 800ef86: d104 bne.n 800ef92 <HAL_TIM_PWM_Start+0xf6>
- 800ef88: 687b ldr r3, [r7, #4]
- 800ef8a: 2202 movs r2, #2
- 800ef8c: f883 2042 strb.w r2, [r3, #66] @ 0x42
- 800ef90: e003 b.n 800ef9a <HAL_TIM_PWM_Start+0xfe>
- 800ef92: 687b ldr r3, [r7, #4]
- 800ef94: 2202 movs r2, #2
- 800ef96: f883 2043 strb.w r2, [r3, #67] @ 0x43
- /* Enable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
- 800ef9a: 687b ldr r3, [r7, #4]
- 800ef9c: 681b ldr r3, [r3, #0]
- 800ef9e: 2201 movs r2, #1
- 800efa0: 6839 ldr r1, [r7, #0]
- 800efa2: 4618 mov r0, r3
- 800efa4: f001 fc60 bl 8010868 <TIM_CCxChannelCmd>
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- 800efa8: 687b ldr r3, [r7, #4]
- 800efaa: 681b ldr r3, [r3, #0]
- 800efac: 4a38 ldr r2, [pc, #224] @ (800f090 <HAL_TIM_PWM_Start+0x1f4>)
- 800efae: 4293 cmp r3, r2
- 800efb0: d013 beq.n 800efda <HAL_TIM_PWM_Start+0x13e>
- 800efb2: 687b ldr r3, [r7, #4]
- 800efb4: 681b ldr r3, [r3, #0]
- 800efb6: 4a37 ldr r2, [pc, #220] @ (800f094 <HAL_TIM_PWM_Start+0x1f8>)
- 800efb8: 4293 cmp r3, r2
- 800efba: d00e beq.n 800efda <HAL_TIM_PWM_Start+0x13e>
- 800efbc: 687b ldr r3, [r7, #4]
- 800efbe: 681b ldr r3, [r3, #0]
- 800efc0: 4a35 ldr r2, [pc, #212] @ (800f098 <HAL_TIM_PWM_Start+0x1fc>)
- 800efc2: 4293 cmp r3, r2
- 800efc4: d009 beq.n 800efda <HAL_TIM_PWM_Start+0x13e>
- 800efc6: 687b ldr r3, [r7, #4]
- 800efc8: 681b ldr r3, [r3, #0]
- 800efca: 4a34 ldr r2, [pc, #208] @ (800f09c <HAL_TIM_PWM_Start+0x200>)
- 800efcc: 4293 cmp r3, r2
- 800efce: d004 beq.n 800efda <HAL_TIM_PWM_Start+0x13e>
- 800efd0: 687b ldr r3, [r7, #4]
- 800efd2: 681b ldr r3, [r3, #0]
- 800efd4: 4a32 ldr r2, [pc, #200] @ (800f0a0 <HAL_TIM_PWM_Start+0x204>)
- 800efd6: 4293 cmp r3, r2
- 800efd8: d101 bne.n 800efde <HAL_TIM_PWM_Start+0x142>
- 800efda: 2301 movs r3, #1
- 800efdc: e000 b.n 800efe0 <HAL_TIM_PWM_Start+0x144>
- 800efde: 2300 movs r3, #0
- 800efe0: 2b00 cmp r3, #0
- 800efe2: d007 beq.n 800eff4 <HAL_TIM_PWM_Start+0x158>
- {
- /* Enable the main output */
- __HAL_TIM_MOE_ENABLE(htim);
- 800efe4: 687b ldr r3, [r7, #4]
- 800efe6: 681b ldr r3, [r3, #0]
- 800efe8: 6c5a ldr r2, [r3, #68] @ 0x44
- 800efea: 687b ldr r3, [r7, #4]
- 800efec: 681b ldr r3, [r3, #0]
- 800efee: f442 4200 orr.w r2, r2, #32768 @ 0x8000
- 800eff2: 645a str r2, [r3, #68] @ 0x44
- }
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- 800eff4: 687b ldr r3, [r7, #4]
- 800eff6: 681b ldr r3, [r3, #0]
- 800eff8: 4a25 ldr r2, [pc, #148] @ (800f090 <HAL_TIM_PWM_Start+0x1f4>)
- 800effa: 4293 cmp r3, r2
- 800effc: d022 beq.n 800f044 <HAL_TIM_PWM_Start+0x1a8>
- 800effe: 687b ldr r3, [r7, #4]
- 800f000: 681b ldr r3, [r3, #0]
- 800f002: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 800f006: d01d beq.n 800f044 <HAL_TIM_PWM_Start+0x1a8>
- 800f008: 687b ldr r3, [r7, #4]
- 800f00a: 681b ldr r3, [r3, #0]
- 800f00c: 4a25 ldr r2, [pc, #148] @ (800f0a4 <HAL_TIM_PWM_Start+0x208>)
- 800f00e: 4293 cmp r3, r2
- 800f010: d018 beq.n 800f044 <HAL_TIM_PWM_Start+0x1a8>
- 800f012: 687b ldr r3, [r7, #4]
- 800f014: 681b ldr r3, [r3, #0]
- 800f016: 4a24 ldr r2, [pc, #144] @ (800f0a8 <HAL_TIM_PWM_Start+0x20c>)
- 800f018: 4293 cmp r3, r2
- 800f01a: d013 beq.n 800f044 <HAL_TIM_PWM_Start+0x1a8>
- 800f01c: 687b ldr r3, [r7, #4]
- 800f01e: 681b ldr r3, [r3, #0]
- 800f020: 4a22 ldr r2, [pc, #136] @ (800f0ac <HAL_TIM_PWM_Start+0x210>)
- 800f022: 4293 cmp r3, r2
- 800f024: d00e beq.n 800f044 <HAL_TIM_PWM_Start+0x1a8>
- 800f026: 687b ldr r3, [r7, #4]
- 800f028: 681b ldr r3, [r3, #0]
- 800f02a: 4a1a ldr r2, [pc, #104] @ (800f094 <HAL_TIM_PWM_Start+0x1f8>)
- 800f02c: 4293 cmp r3, r2
- 800f02e: d009 beq.n 800f044 <HAL_TIM_PWM_Start+0x1a8>
- 800f030: 687b ldr r3, [r7, #4]
- 800f032: 681b ldr r3, [r3, #0]
- 800f034: 4a1e ldr r2, [pc, #120] @ (800f0b0 <HAL_TIM_PWM_Start+0x214>)
- 800f036: 4293 cmp r3, r2
- 800f038: d004 beq.n 800f044 <HAL_TIM_PWM_Start+0x1a8>
- 800f03a: 687b ldr r3, [r7, #4]
- 800f03c: 681b ldr r3, [r3, #0]
- 800f03e: 4a16 ldr r2, [pc, #88] @ (800f098 <HAL_TIM_PWM_Start+0x1fc>)
- 800f040: 4293 cmp r3, r2
- 800f042: d115 bne.n 800f070 <HAL_TIM_PWM_Start+0x1d4>
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- 800f044: 687b ldr r3, [r7, #4]
- 800f046: 681b ldr r3, [r3, #0]
- 800f048: 689a ldr r2, [r3, #8]
- 800f04a: 4b1a ldr r3, [pc, #104] @ (800f0b4 <HAL_TIM_PWM_Start+0x218>)
- 800f04c: 4013 ands r3, r2
- 800f04e: 60fb str r3, [r7, #12]
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- 800f050: 68fb ldr r3, [r7, #12]
- 800f052: 2b06 cmp r3, #6
- 800f054: d015 beq.n 800f082 <HAL_TIM_PWM_Start+0x1e6>
- 800f056: 68fb ldr r3, [r7, #12]
- 800f058: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
- 800f05c: d011 beq.n 800f082 <HAL_TIM_PWM_Start+0x1e6>
- {
- __HAL_TIM_ENABLE(htim);
- 800f05e: 687b ldr r3, [r7, #4]
- 800f060: 681b ldr r3, [r3, #0]
- 800f062: 681a ldr r2, [r3, #0]
- 800f064: 687b ldr r3, [r7, #4]
- 800f066: 681b ldr r3, [r3, #0]
- 800f068: f042 0201 orr.w r2, r2, #1
- 800f06c: 601a str r2, [r3, #0]
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- 800f06e: e008 b.n 800f082 <HAL_TIM_PWM_Start+0x1e6>
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- 800f070: 687b ldr r3, [r7, #4]
- 800f072: 681b ldr r3, [r3, #0]
- 800f074: 681a ldr r2, [r3, #0]
- 800f076: 687b ldr r3, [r7, #4]
- 800f078: 681b ldr r3, [r3, #0]
- 800f07a: f042 0201 orr.w r2, r2, #1
- 800f07e: 601a str r2, [r3, #0]
- 800f080: e000 b.n 800f084 <HAL_TIM_PWM_Start+0x1e8>
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- 800f082: bf00 nop
- }
- /* Return function status */
- return HAL_OK;
- 800f084: 2300 movs r3, #0
- }
- 800f086: 4618 mov r0, r3
- 800f088: 3710 adds r7, #16
- 800f08a: 46bd mov sp, r7
- 800f08c: bd80 pop {r7, pc}
- 800f08e: bf00 nop
- 800f090: 40010000 .word 0x40010000
- 800f094: 40010400 .word 0x40010400
- 800f098: 40014000 .word 0x40014000
- 800f09c: 40014400 .word 0x40014400
- 800f0a0: 40014800 .word 0x40014800
- 800f0a4: 40000400 .word 0x40000400
- 800f0a8: 40000800 .word 0x40000800
- 800f0ac: 40000c00 .word 0x40000c00
- 800f0b0: 40001800 .word 0x40001800
- 800f0b4: 00010007 .word 0x00010007
- 0800f0b8 <HAL_TIM_PWM_Stop>:
- * @arg TIM_CHANNEL_5: TIM Channel 5 selected
- * @arg TIM_CHANNEL_6: TIM Channel 6 selected
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
- {
- 800f0b8: b580 push {r7, lr}
- 800f0ba: b082 sub sp, #8
- 800f0bc: af00 add r7, sp, #0
- 800f0be: 6078 str r0, [r7, #4]
- 800f0c0: 6039 str r1, [r7, #0]
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
- /* Disable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
- 800f0c2: 687b ldr r3, [r7, #4]
- 800f0c4: 681b ldr r3, [r3, #0]
- 800f0c6: 2200 movs r2, #0
- 800f0c8: 6839 ldr r1, [r7, #0]
- 800f0ca: 4618 mov r0, r3
- 800f0cc: f001 fbcc bl 8010868 <TIM_CCxChannelCmd>
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- 800f0d0: 687b ldr r3, [r7, #4]
- 800f0d2: 681b ldr r3, [r3, #0]
- 800f0d4: 4a3e ldr r2, [pc, #248] @ (800f1d0 <HAL_TIM_PWM_Stop+0x118>)
- 800f0d6: 4293 cmp r3, r2
- 800f0d8: d013 beq.n 800f102 <HAL_TIM_PWM_Stop+0x4a>
- 800f0da: 687b ldr r3, [r7, #4]
- 800f0dc: 681b ldr r3, [r3, #0]
- 800f0de: 4a3d ldr r2, [pc, #244] @ (800f1d4 <HAL_TIM_PWM_Stop+0x11c>)
- 800f0e0: 4293 cmp r3, r2
- 800f0e2: d00e beq.n 800f102 <HAL_TIM_PWM_Stop+0x4a>
- 800f0e4: 687b ldr r3, [r7, #4]
- 800f0e6: 681b ldr r3, [r3, #0]
- 800f0e8: 4a3b ldr r2, [pc, #236] @ (800f1d8 <HAL_TIM_PWM_Stop+0x120>)
- 800f0ea: 4293 cmp r3, r2
- 800f0ec: d009 beq.n 800f102 <HAL_TIM_PWM_Stop+0x4a>
- 800f0ee: 687b ldr r3, [r7, #4]
- 800f0f0: 681b ldr r3, [r3, #0]
- 800f0f2: 4a3a ldr r2, [pc, #232] @ (800f1dc <HAL_TIM_PWM_Stop+0x124>)
- 800f0f4: 4293 cmp r3, r2
- 800f0f6: d004 beq.n 800f102 <HAL_TIM_PWM_Stop+0x4a>
- 800f0f8: 687b ldr r3, [r7, #4]
- 800f0fa: 681b ldr r3, [r3, #0]
- 800f0fc: 4a38 ldr r2, [pc, #224] @ (800f1e0 <HAL_TIM_PWM_Stop+0x128>)
- 800f0fe: 4293 cmp r3, r2
- 800f100: d101 bne.n 800f106 <HAL_TIM_PWM_Stop+0x4e>
- 800f102: 2301 movs r3, #1
- 800f104: e000 b.n 800f108 <HAL_TIM_PWM_Stop+0x50>
- 800f106: 2300 movs r3, #0
- 800f108: 2b00 cmp r3, #0
- 800f10a: d017 beq.n 800f13c <HAL_TIM_PWM_Stop+0x84>
- {
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
- 800f10c: 687b ldr r3, [r7, #4]
- 800f10e: 681b ldr r3, [r3, #0]
- 800f110: 6a1a ldr r2, [r3, #32]
- 800f112: f241 1311 movw r3, #4369 @ 0x1111
- 800f116: 4013 ands r3, r2
- 800f118: 2b00 cmp r3, #0
- 800f11a: d10f bne.n 800f13c <HAL_TIM_PWM_Stop+0x84>
- 800f11c: 687b ldr r3, [r7, #4]
- 800f11e: 681b ldr r3, [r3, #0]
- 800f120: 6a1a ldr r2, [r3, #32]
- 800f122: f240 4344 movw r3, #1092 @ 0x444
- 800f126: 4013 ands r3, r2
- 800f128: 2b00 cmp r3, #0
- 800f12a: d107 bne.n 800f13c <HAL_TIM_PWM_Stop+0x84>
- 800f12c: 687b ldr r3, [r7, #4]
- 800f12e: 681b ldr r3, [r3, #0]
- 800f130: 6c5a ldr r2, [r3, #68] @ 0x44
- 800f132: 687b ldr r3, [r7, #4]
- 800f134: 681b ldr r3, [r3, #0]
- 800f136: f422 4200 bic.w r2, r2, #32768 @ 0x8000
- 800f13a: 645a str r2, [r3, #68] @ 0x44
- }
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
- 800f13c: 687b ldr r3, [r7, #4]
- 800f13e: 681b ldr r3, [r3, #0]
- 800f140: 6a1a ldr r2, [r3, #32]
- 800f142: f241 1311 movw r3, #4369 @ 0x1111
- 800f146: 4013 ands r3, r2
- 800f148: 2b00 cmp r3, #0
- 800f14a: d10f bne.n 800f16c <HAL_TIM_PWM_Stop+0xb4>
- 800f14c: 687b ldr r3, [r7, #4]
- 800f14e: 681b ldr r3, [r3, #0]
- 800f150: 6a1a ldr r2, [r3, #32]
- 800f152: f240 4344 movw r3, #1092 @ 0x444
- 800f156: 4013 ands r3, r2
- 800f158: 2b00 cmp r3, #0
- 800f15a: d107 bne.n 800f16c <HAL_TIM_PWM_Stop+0xb4>
- 800f15c: 687b ldr r3, [r7, #4]
- 800f15e: 681b ldr r3, [r3, #0]
- 800f160: 681a ldr r2, [r3, #0]
- 800f162: 687b ldr r3, [r7, #4]
- 800f164: 681b ldr r3, [r3, #0]
- 800f166: f022 0201 bic.w r2, r2, #1
- 800f16a: 601a str r2, [r3, #0]
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- 800f16c: 683b ldr r3, [r7, #0]
- 800f16e: 2b00 cmp r3, #0
- 800f170: d104 bne.n 800f17c <HAL_TIM_PWM_Stop+0xc4>
- 800f172: 687b ldr r3, [r7, #4]
- 800f174: 2201 movs r2, #1
- 800f176: f883 203e strb.w r2, [r3, #62] @ 0x3e
- 800f17a: e023 b.n 800f1c4 <HAL_TIM_PWM_Stop+0x10c>
- 800f17c: 683b ldr r3, [r7, #0]
- 800f17e: 2b04 cmp r3, #4
- 800f180: d104 bne.n 800f18c <HAL_TIM_PWM_Stop+0xd4>
- 800f182: 687b ldr r3, [r7, #4]
- 800f184: 2201 movs r2, #1
- 800f186: f883 203f strb.w r2, [r3, #63] @ 0x3f
- 800f18a: e01b b.n 800f1c4 <HAL_TIM_PWM_Stop+0x10c>
- 800f18c: 683b ldr r3, [r7, #0]
- 800f18e: 2b08 cmp r3, #8
- 800f190: d104 bne.n 800f19c <HAL_TIM_PWM_Stop+0xe4>
- 800f192: 687b ldr r3, [r7, #4]
- 800f194: 2201 movs r2, #1
- 800f196: f883 2040 strb.w r2, [r3, #64] @ 0x40
- 800f19a: e013 b.n 800f1c4 <HAL_TIM_PWM_Stop+0x10c>
- 800f19c: 683b ldr r3, [r7, #0]
- 800f19e: 2b0c cmp r3, #12
- 800f1a0: d104 bne.n 800f1ac <HAL_TIM_PWM_Stop+0xf4>
- 800f1a2: 687b ldr r3, [r7, #4]
- 800f1a4: 2201 movs r2, #1
- 800f1a6: f883 2041 strb.w r2, [r3, #65] @ 0x41
- 800f1aa: e00b b.n 800f1c4 <HAL_TIM_PWM_Stop+0x10c>
- 800f1ac: 683b ldr r3, [r7, #0]
- 800f1ae: 2b10 cmp r3, #16
- 800f1b0: d104 bne.n 800f1bc <HAL_TIM_PWM_Stop+0x104>
- 800f1b2: 687b ldr r3, [r7, #4]
- 800f1b4: 2201 movs r2, #1
- 800f1b6: f883 2042 strb.w r2, [r3, #66] @ 0x42
- 800f1ba: e003 b.n 800f1c4 <HAL_TIM_PWM_Stop+0x10c>
- 800f1bc: 687b ldr r3, [r7, #4]
- 800f1be: 2201 movs r2, #1
- 800f1c0: f883 2043 strb.w r2, [r3, #67] @ 0x43
- /* Return function status */
- return HAL_OK;
- 800f1c4: 2300 movs r3, #0
- }
- 800f1c6: 4618 mov r0, r3
- 800f1c8: 3708 adds r7, #8
- 800f1ca: 46bd mov sp, r7
- 800f1cc: bd80 pop {r7, pc}
- 800f1ce: bf00 nop
- 800f1d0: 40010000 .word 0x40010000
- 800f1d4: 40010400 .word 0x40010400
- 800f1d8: 40014000 .word 0x40014000
- 800f1dc: 40014400 .word 0x40014400
- 800f1e0: 40014800 .word 0x40014800
- 0800f1e4 <HAL_TIM_IC_Init>:
- * Ex: call @ref HAL_TIM_IC_DeInit() before HAL_TIM_IC_Init()
- * @param htim TIM Input Capture handle
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim)
- {
- 800f1e4: b580 push {r7, lr}
- 800f1e6: b082 sub sp, #8
- 800f1e8: af00 add r7, sp, #0
- 800f1ea: 6078 str r0, [r7, #4]
- /* Check the TIM handle allocation */
- if (htim == NULL)
- 800f1ec: 687b ldr r3, [r7, #4]
- 800f1ee: 2b00 cmp r3, #0
- 800f1f0: d101 bne.n 800f1f6 <HAL_TIM_IC_Init+0x12>
- {
- return HAL_ERROR;
- 800f1f2: 2301 movs r3, #1
- 800f1f4: e049 b.n 800f28a <HAL_TIM_IC_Init+0xa6>
- assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
- assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
- assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
- assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
- if (htim->State == HAL_TIM_STATE_RESET)
- 800f1f6: 687b ldr r3, [r7, #4]
- 800f1f8: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
- 800f1fc: b2db uxtb r3, r3
- 800f1fe: 2b00 cmp r3, #0
- 800f200: d106 bne.n 800f210 <HAL_TIM_IC_Init+0x2c>
- {
- /* Allocate lock resource and initialize it */
- htim->Lock = HAL_UNLOCKED;
- 800f202: 687b ldr r3, [r7, #4]
- 800f204: 2200 movs r2, #0
- 800f206: f883 203c strb.w r2, [r3, #60] @ 0x3c
- }
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- htim->IC_MspInitCallback(htim);
- #else
- /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
- HAL_TIM_IC_MspInit(htim);
- 800f20a: 6878 ldr r0, [r7, #4]
- 800f20c: f000 f841 bl 800f292 <HAL_TIM_IC_MspInit>
- #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
- 800f210: 687b ldr r3, [r7, #4]
- 800f212: 2202 movs r2, #2
- 800f214: f883 203d strb.w r2, [r3, #61] @ 0x3d
- /* Init the base time for the input capture */
- TIM_Base_SetConfig(htim->Instance, &htim->Init);
- 800f218: 687b ldr r3, [r7, #4]
- 800f21a: 681a ldr r2, [r3, #0]
- 800f21c: 687b ldr r3, [r7, #4]
- 800f21e: 3304 adds r3, #4
- 800f220: 4619 mov r1, r3
- 800f222: 4610 mov r0, r2
- 800f224: f000 fddc bl 800fde0 <TIM_Base_SetConfig>
- /* Initialize the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
- 800f228: 687b ldr r3, [r7, #4]
- 800f22a: 2201 movs r2, #1
- 800f22c: f883 2048 strb.w r2, [r3, #72] @ 0x48
- /* Initialize the TIM channels state */
- TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
- 800f230: 687b ldr r3, [r7, #4]
- 800f232: 2201 movs r2, #1
- 800f234: f883 203e strb.w r2, [r3, #62] @ 0x3e
- 800f238: 687b ldr r3, [r7, #4]
- 800f23a: 2201 movs r2, #1
- 800f23c: f883 203f strb.w r2, [r3, #63] @ 0x3f
- 800f240: 687b ldr r3, [r7, #4]
- 800f242: 2201 movs r2, #1
- 800f244: f883 2040 strb.w r2, [r3, #64] @ 0x40
- 800f248: 687b ldr r3, [r7, #4]
- 800f24a: 2201 movs r2, #1
- 800f24c: f883 2041 strb.w r2, [r3, #65] @ 0x41
- 800f250: 687b ldr r3, [r7, #4]
- 800f252: 2201 movs r2, #1
- 800f254: f883 2042 strb.w r2, [r3, #66] @ 0x42
- 800f258: 687b ldr r3, [r7, #4]
- 800f25a: 2201 movs r2, #1
- 800f25c: f883 2043 strb.w r2, [r3, #67] @ 0x43
- TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
- 800f260: 687b ldr r3, [r7, #4]
- 800f262: 2201 movs r2, #1
- 800f264: f883 2044 strb.w r2, [r3, #68] @ 0x44
- 800f268: 687b ldr r3, [r7, #4]
- 800f26a: 2201 movs r2, #1
- 800f26c: f883 2045 strb.w r2, [r3, #69] @ 0x45
- 800f270: 687b ldr r3, [r7, #4]
- 800f272: 2201 movs r2, #1
- 800f274: f883 2046 strb.w r2, [r3, #70] @ 0x46
- 800f278: 687b ldr r3, [r7, #4]
- 800f27a: 2201 movs r2, #1
- 800f27c: f883 2047 strb.w r2, [r3, #71] @ 0x47
- /* Initialize the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
- 800f280: 687b ldr r3, [r7, #4]
- 800f282: 2201 movs r2, #1
- 800f284: f883 203d strb.w r2, [r3, #61] @ 0x3d
- return HAL_OK;
- 800f288: 2300 movs r3, #0
- }
- 800f28a: 4618 mov r0, r3
- 800f28c: 3708 adds r7, #8
- 800f28e: 46bd mov sp, r7
- 800f290: bd80 pop {r7, pc}
- 0800f292 <HAL_TIM_IC_MspInit>:
- * @brief Initializes the TIM Input Capture MSP.
- * @param htim TIM Input Capture handle
- * @retval None
- */
- __weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim)
- {
- 800f292: b480 push {r7}
- 800f294: b083 sub sp, #12
- 800f296: af00 add r7, sp, #0
- 800f298: 6078 str r0, [r7, #4]
- UNUSED(htim);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_IC_MspInit could be implemented in the user file
- */
- }
- 800f29a: bf00 nop
- 800f29c: 370c adds r7, #12
- 800f29e: 46bd mov sp, r7
- 800f2a0: f85d 7b04 ldr.w r7, [sp], #4
- 800f2a4: 4770 bx lr
- ...
- 0800f2a8 <HAL_TIM_IC_Start_IT>:
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
- {
- 800f2a8: b580 push {r7, lr}
- 800f2aa: b084 sub sp, #16
- 800f2ac: af00 add r7, sp, #0
- 800f2ae: 6078 str r0, [r7, #4]
- 800f2b0: 6039 str r1, [r7, #0]
- HAL_StatusTypeDef status = HAL_OK;
- 800f2b2: 2300 movs r3, #0
- 800f2b4: 73fb strb r3, [r7, #15]
- uint32_t tmpsmcr;
- HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
- 800f2b6: 683b ldr r3, [r7, #0]
- 800f2b8: 2b00 cmp r3, #0
- 800f2ba: d104 bne.n 800f2c6 <HAL_TIM_IC_Start_IT+0x1e>
- 800f2bc: 687b ldr r3, [r7, #4]
- 800f2be: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
- 800f2c2: b2db uxtb r3, r3
- 800f2c4: e023 b.n 800f30e <HAL_TIM_IC_Start_IT+0x66>
- 800f2c6: 683b ldr r3, [r7, #0]
- 800f2c8: 2b04 cmp r3, #4
- 800f2ca: d104 bne.n 800f2d6 <HAL_TIM_IC_Start_IT+0x2e>
- 800f2cc: 687b ldr r3, [r7, #4]
- 800f2ce: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
- 800f2d2: b2db uxtb r3, r3
- 800f2d4: e01b b.n 800f30e <HAL_TIM_IC_Start_IT+0x66>
- 800f2d6: 683b ldr r3, [r7, #0]
- 800f2d8: 2b08 cmp r3, #8
- 800f2da: d104 bne.n 800f2e6 <HAL_TIM_IC_Start_IT+0x3e>
- 800f2dc: 687b ldr r3, [r7, #4]
- 800f2de: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
- 800f2e2: b2db uxtb r3, r3
- 800f2e4: e013 b.n 800f30e <HAL_TIM_IC_Start_IT+0x66>
- 800f2e6: 683b ldr r3, [r7, #0]
- 800f2e8: 2b0c cmp r3, #12
- 800f2ea: d104 bne.n 800f2f6 <HAL_TIM_IC_Start_IT+0x4e>
- 800f2ec: 687b ldr r3, [r7, #4]
- 800f2ee: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
- 800f2f2: b2db uxtb r3, r3
- 800f2f4: e00b b.n 800f30e <HAL_TIM_IC_Start_IT+0x66>
- 800f2f6: 683b ldr r3, [r7, #0]
- 800f2f8: 2b10 cmp r3, #16
- 800f2fa: d104 bne.n 800f306 <HAL_TIM_IC_Start_IT+0x5e>
- 800f2fc: 687b ldr r3, [r7, #4]
- 800f2fe: f893 3042 ldrb.w r3, [r3, #66] @ 0x42
- 800f302: b2db uxtb r3, r3
- 800f304: e003 b.n 800f30e <HAL_TIM_IC_Start_IT+0x66>
- 800f306: 687b ldr r3, [r7, #4]
- 800f308: f893 3043 ldrb.w r3, [r3, #67] @ 0x43
- 800f30c: b2db uxtb r3, r3
- 800f30e: 73bb strb r3, [r7, #14]
- HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
- 800f310: 683b ldr r3, [r7, #0]
- 800f312: 2b00 cmp r3, #0
- 800f314: d104 bne.n 800f320 <HAL_TIM_IC_Start_IT+0x78>
- 800f316: 687b ldr r3, [r7, #4]
- 800f318: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
- 800f31c: b2db uxtb r3, r3
- 800f31e: e013 b.n 800f348 <HAL_TIM_IC_Start_IT+0xa0>
- 800f320: 683b ldr r3, [r7, #0]
- 800f322: 2b04 cmp r3, #4
- 800f324: d104 bne.n 800f330 <HAL_TIM_IC_Start_IT+0x88>
- 800f326: 687b ldr r3, [r7, #4]
- 800f328: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
- 800f32c: b2db uxtb r3, r3
- 800f32e: e00b b.n 800f348 <HAL_TIM_IC_Start_IT+0xa0>
- 800f330: 683b ldr r3, [r7, #0]
- 800f332: 2b08 cmp r3, #8
- 800f334: d104 bne.n 800f340 <HAL_TIM_IC_Start_IT+0x98>
- 800f336: 687b ldr r3, [r7, #4]
- 800f338: f893 3046 ldrb.w r3, [r3, #70] @ 0x46
- 800f33c: b2db uxtb r3, r3
- 800f33e: e003 b.n 800f348 <HAL_TIM_IC_Start_IT+0xa0>
- 800f340: 687b ldr r3, [r7, #4]
- 800f342: f893 3047 ldrb.w r3, [r3, #71] @ 0x47
- 800f346: b2db uxtb r3, r3
- 800f348: 737b strb r3, [r7, #13]
- /* Check the parameters */
- assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
- /* Check the TIM channel state */
- if ((channel_state != HAL_TIM_CHANNEL_STATE_READY)
- 800f34a: 7bbb ldrb r3, [r7, #14]
- 800f34c: 2b01 cmp r3, #1
- 800f34e: d102 bne.n 800f356 <HAL_TIM_IC_Start_IT+0xae>
- || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY))
- 800f350: 7b7b ldrb r3, [r7, #13]
- 800f352: 2b01 cmp r3, #1
- 800f354: d001 beq.n 800f35a <HAL_TIM_IC_Start_IT+0xb2>
- {
- return HAL_ERROR;
- 800f356: 2301 movs r3, #1
- 800f358: e0e2 b.n 800f520 <HAL_TIM_IC_Start_IT+0x278>
- }
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
- 800f35a: 683b ldr r3, [r7, #0]
- 800f35c: 2b00 cmp r3, #0
- 800f35e: d104 bne.n 800f36a <HAL_TIM_IC_Start_IT+0xc2>
- 800f360: 687b ldr r3, [r7, #4]
- 800f362: 2202 movs r2, #2
- 800f364: f883 203e strb.w r2, [r3, #62] @ 0x3e
- 800f368: e023 b.n 800f3b2 <HAL_TIM_IC_Start_IT+0x10a>
- 800f36a: 683b ldr r3, [r7, #0]
- 800f36c: 2b04 cmp r3, #4
- 800f36e: d104 bne.n 800f37a <HAL_TIM_IC_Start_IT+0xd2>
- 800f370: 687b ldr r3, [r7, #4]
- 800f372: 2202 movs r2, #2
- 800f374: f883 203f strb.w r2, [r3, #63] @ 0x3f
- 800f378: e01b b.n 800f3b2 <HAL_TIM_IC_Start_IT+0x10a>
- 800f37a: 683b ldr r3, [r7, #0]
- 800f37c: 2b08 cmp r3, #8
- 800f37e: d104 bne.n 800f38a <HAL_TIM_IC_Start_IT+0xe2>
- 800f380: 687b ldr r3, [r7, #4]
- 800f382: 2202 movs r2, #2
- 800f384: f883 2040 strb.w r2, [r3, #64] @ 0x40
- 800f388: e013 b.n 800f3b2 <HAL_TIM_IC_Start_IT+0x10a>
- 800f38a: 683b ldr r3, [r7, #0]
- 800f38c: 2b0c cmp r3, #12
- 800f38e: d104 bne.n 800f39a <HAL_TIM_IC_Start_IT+0xf2>
- 800f390: 687b ldr r3, [r7, #4]
- 800f392: 2202 movs r2, #2
- 800f394: f883 2041 strb.w r2, [r3, #65] @ 0x41
- 800f398: e00b b.n 800f3b2 <HAL_TIM_IC_Start_IT+0x10a>
- 800f39a: 683b ldr r3, [r7, #0]
- 800f39c: 2b10 cmp r3, #16
- 800f39e: d104 bne.n 800f3aa <HAL_TIM_IC_Start_IT+0x102>
- 800f3a0: 687b ldr r3, [r7, #4]
- 800f3a2: 2202 movs r2, #2
- 800f3a4: f883 2042 strb.w r2, [r3, #66] @ 0x42
- 800f3a8: e003 b.n 800f3b2 <HAL_TIM_IC_Start_IT+0x10a>
- 800f3aa: 687b ldr r3, [r7, #4]
- 800f3ac: 2202 movs r2, #2
- 800f3ae: f883 2043 strb.w r2, [r3, #67] @ 0x43
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
- 800f3b2: 683b ldr r3, [r7, #0]
- 800f3b4: 2b00 cmp r3, #0
- 800f3b6: d104 bne.n 800f3c2 <HAL_TIM_IC_Start_IT+0x11a>
- 800f3b8: 687b ldr r3, [r7, #4]
- 800f3ba: 2202 movs r2, #2
- 800f3bc: f883 2044 strb.w r2, [r3, #68] @ 0x44
- 800f3c0: e013 b.n 800f3ea <HAL_TIM_IC_Start_IT+0x142>
- 800f3c2: 683b ldr r3, [r7, #0]
- 800f3c4: 2b04 cmp r3, #4
- 800f3c6: d104 bne.n 800f3d2 <HAL_TIM_IC_Start_IT+0x12a>
- 800f3c8: 687b ldr r3, [r7, #4]
- 800f3ca: 2202 movs r2, #2
- 800f3cc: f883 2045 strb.w r2, [r3, #69] @ 0x45
- 800f3d0: e00b b.n 800f3ea <HAL_TIM_IC_Start_IT+0x142>
- 800f3d2: 683b ldr r3, [r7, #0]
- 800f3d4: 2b08 cmp r3, #8
- 800f3d6: d104 bne.n 800f3e2 <HAL_TIM_IC_Start_IT+0x13a>
- 800f3d8: 687b ldr r3, [r7, #4]
- 800f3da: 2202 movs r2, #2
- 800f3dc: f883 2046 strb.w r2, [r3, #70] @ 0x46
- 800f3e0: e003 b.n 800f3ea <HAL_TIM_IC_Start_IT+0x142>
- 800f3e2: 687b ldr r3, [r7, #4]
- 800f3e4: 2202 movs r2, #2
- 800f3e6: f883 2047 strb.w r2, [r3, #71] @ 0x47
- switch (Channel)
- 800f3ea: 683b ldr r3, [r7, #0]
- 800f3ec: 2b0c cmp r3, #12
- 800f3ee: d841 bhi.n 800f474 <HAL_TIM_IC_Start_IT+0x1cc>
- 800f3f0: a201 add r2, pc, #4 @ (adr r2, 800f3f8 <HAL_TIM_IC_Start_IT+0x150>)
- 800f3f2: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800f3f6: bf00 nop
- 800f3f8: 0800f42d .word 0x0800f42d
- 800f3fc: 0800f475 .word 0x0800f475
- 800f400: 0800f475 .word 0x0800f475
- 800f404: 0800f475 .word 0x0800f475
- 800f408: 0800f43f .word 0x0800f43f
- 800f40c: 0800f475 .word 0x0800f475
- 800f410: 0800f475 .word 0x0800f475
- 800f414: 0800f475 .word 0x0800f475
- 800f418: 0800f451 .word 0x0800f451
- 800f41c: 0800f475 .word 0x0800f475
- 800f420: 0800f475 .word 0x0800f475
- 800f424: 0800f475 .word 0x0800f475
- 800f428: 0800f463 .word 0x0800f463
- {
- case TIM_CHANNEL_1:
- {
- /* Enable the TIM Capture/Compare 1 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
- 800f42c: 687b ldr r3, [r7, #4]
- 800f42e: 681b ldr r3, [r3, #0]
- 800f430: 68da ldr r2, [r3, #12]
- 800f432: 687b ldr r3, [r7, #4]
- 800f434: 681b ldr r3, [r3, #0]
- 800f436: f042 0202 orr.w r2, r2, #2
- 800f43a: 60da str r2, [r3, #12]
- break;
- 800f43c: e01d b.n 800f47a <HAL_TIM_IC_Start_IT+0x1d2>
- }
- case TIM_CHANNEL_2:
- {
- /* Enable the TIM Capture/Compare 2 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
- 800f43e: 687b ldr r3, [r7, #4]
- 800f440: 681b ldr r3, [r3, #0]
- 800f442: 68da ldr r2, [r3, #12]
- 800f444: 687b ldr r3, [r7, #4]
- 800f446: 681b ldr r3, [r3, #0]
- 800f448: f042 0204 orr.w r2, r2, #4
- 800f44c: 60da str r2, [r3, #12]
- break;
- 800f44e: e014 b.n 800f47a <HAL_TIM_IC_Start_IT+0x1d2>
- }
- case TIM_CHANNEL_3:
- {
- /* Enable the TIM Capture/Compare 3 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
- 800f450: 687b ldr r3, [r7, #4]
- 800f452: 681b ldr r3, [r3, #0]
- 800f454: 68da ldr r2, [r3, #12]
- 800f456: 687b ldr r3, [r7, #4]
- 800f458: 681b ldr r3, [r3, #0]
- 800f45a: f042 0208 orr.w r2, r2, #8
- 800f45e: 60da str r2, [r3, #12]
- break;
- 800f460: e00b b.n 800f47a <HAL_TIM_IC_Start_IT+0x1d2>
- }
- case TIM_CHANNEL_4:
- {
- /* Enable the TIM Capture/Compare 4 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
- 800f462: 687b ldr r3, [r7, #4]
- 800f464: 681b ldr r3, [r3, #0]
- 800f466: 68da ldr r2, [r3, #12]
- 800f468: 687b ldr r3, [r7, #4]
- 800f46a: 681b ldr r3, [r3, #0]
- 800f46c: f042 0210 orr.w r2, r2, #16
- 800f470: 60da str r2, [r3, #12]
- break;
- 800f472: e002 b.n 800f47a <HAL_TIM_IC_Start_IT+0x1d2>
- }
- default:
- status = HAL_ERROR;
- 800f474: 2301 movs r3, #1
- 800f476: 73fb strb r3, [r7, #15]
- break;
- 800f478: bf00 nop
- }
- if (status == HAL_OK)
- 800f47a: 7bfb ldrb r3, [r7, #15]
- 800f47c: 2b00 cmp r3, #0
- 800f47e: d14e bne.n 800f51e <HAL_TIM_IC_Start_IT+0x276>
- {
- /* Enable the Input Capture channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
- 800f480: 687b ldr r3, [r7, #4]
- 800f482: 681b ldr r3, [r3, #0]
- 800f484: 2201 movs r2, #1
- 800f486: 6839 ldr r1, [r7, #0]
- 800f488: 4618 mov r0, r3
- 800f48a: f001 f9ed bl 8010868 <TIM_CCxChannelCmd>
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- 800f48e: 687b ldr r3, [r7, #4]
- 800f490: 681b ldr r3, [r3, #0]
- 800f492: 4a25 ldr r2, [pc, #148] @ (800f528 <HAL_TIM_IC_Start_IT+0x280>)
- 800f494: 4293 cmp r3, r2
- 800f496: d022 beq.n 800f4de <HAL_TIM_IC_Start_IT+0x236>
- 800f498: 687b ldr r3, [r7, #4]
- 800f49a: 681b ldr r3, [r3, #0]
- 800f49c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 800f4a0: d01d beq.n 800f4de <HAL_TIM_IC_Start_IT+0x236>
- 800f4a2: 687b ldr r3, [r7, #4]
- 800f4a4: 681b ldr r3, [r3, #0]
- 800f4a6: 4a21 ldr r2, [pc, #132] @ (800f52c <HAL_TIM_IC_Start_IT+0x284>)
- 800f4a8: 4293 cmp r3, r2
- 800f4aa: d018 beq.n 800f4de <HAL_TIM_IC_Start_IT+0x236>
- 800f4ac: 687b ldr r3, [r7, #4]
- 800f4ae: 681b ldr r3, [r3, #0]
- 800f4b0: 4a1f ldr r2, [pc, #124] @ (800f530 <HAL_TIM_IC_Start_IT+0x288>)
- 800f4b2: 4293 cmp r3, r2
- 800f4b4: d013 beq.n 800f4de <HAL_TIM_IC_Start_IT+0x236>
- 800f4b6: 687b ldr r3, [r7, #4]
- 800f4b8: 681b ldr r3, [r3, #0]
- 800f4ba: 4a1e ldr r2, [pc, #120] @ (800f534 <HAL_TIM_IC_Start_IT+0x28c>)
- 800f4bc: 4293 cmp r3, r2
- 800f4be: d00e beq.n 800f4de <HAL_TIM_IC_Start_IT+0x236>
- 800f4c0: 687b ldr r3, [r7, #4]
- 800f4c2: 681b ldr r3, [r3, #0]
- 800f4c4: 4a1c ldr r2, [pc, #112] @ (800f538 <HAL_TIM_IC_Start_IT+0x290>)
- 800f4c6: 4293 cmp r3, r2
- 800f4c8: d009 beq.n 800f4de <HAL_TIM_IC_Start_IT+0x236>
- 800f4ca: 687b ldr r3, [r7, #4]
- 800f4cc: 681b ldr r3, [r3, #0]
- 800f4ce: 4a1b ldr r2, [pc, #108] @ (800f53c <HAL_TIM_IC_Start_IT+0x294>)
- 800f4d0: 4293 cmp r3, r2
- 800f4d2: d004 beq.n 800f4de <HAL_TIM_IC_Start_IT+0x236>
- 800f4d4: 687b ldr r3, [r7, #4]
- 800f4d6: 681b ldr r3, [r3, #0]
- 800f4d8: 4a19 ldr r2, [pc, #100] @ (800f540 <HAL_TIM_IC_Start_IT+0x298>)
- 800f4da: 4293 cmp r3, r2
- 800f4dc: d115 bne.n 800f50a <HAL_TIM_IC_Start_IT+0x262>
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- 800f4de: 687b ldr r3, [r7, #4]
- 800f4e0: 681b ldr r3, [r3, #0]
- 800f4e2: 689a ldr r2, [r3, #8]
- 800f4e4: 4b17 ldr r3, [pc, #92] @ (800f544 <HAL_TIM_IC_Start_IT+0x29c>)
- 800f4e6: 4013 ands r3, r2
- 800f4e8: 60bb str r3, [r7, #8]
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- 800f4ea: 68bb ldr r3, [r7, #8]
- 800f4ec: 2b06 cmp r3, #6
- 800f4ee: d015 beq.n 800f51c <HAL_TIM_IC_Start_IT+0x274>
- 800f4f0: 68bb ldr r3, [r7, #8]
- 800f4f2: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
- 800f4f6: d011 beq.n 800f51c <HAL_TIM_IC_Start_IT+0x274>
- {
- __HAL_TIM_ENABLE(htim);
- 800f4f8: 687b ldr r3, [r7, #4]
- 800f4fa: 681b ldr r3, [r3, #0]
- 800f4fc: 681a ldr r2, [r3, #0]
- 800f4fe: 687b ldr r3, [r7, #4]
- 800f500: 681b ldr r3, [r3, #0]
- 800f502: f042 0201 orr.w r2, r2, #1
- 800f506: 601a str r2, [r3, #0]
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- 800f508: e008 b.n 800f51c <HAL_TIM_IC_Start_IT+0x274>
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- 800f50a: 687b ldr r3, [r7, #4]
- 800f50c: 681b ldr r3, [r3, #0]
- 800f50e: 681a ldr r2, [r3, #0]
- 800f510: 687b ldr r3, [r7, #4]
- 800f512: 681b ldr r3, [r3, #0]
- 800f514: f042 0201 orr.w r2, r2, #1
- 800f518: 601a str r2, [r3, #0]
- 800f51a: e000 b.n 800f51e <HAL_TIM_IC_Start_IT+0x276>
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- 800f51c: bf00 nop
- }
- }
- /* Return function status */
- return status;
- 800f51e: 7bfb ldrb r3, [r7, #15]
- }
- 800f520: 4618 mov r0, r3
- 800f522: 3710 adds r7, #16
- 800f524: 46bd mov sp, r7
- 800f526: bd80 pop {r7, pc}
- 800f528: 40010000 .word 0x40010000
- 800f52c: 40000400 .word 0x40000400
- 800f530: 40000800 .word 0x40000800
- 800f534: 40000c00 .word 0x40000c00
- 800f538: 40010400 .word 0x40010400
- 800f53c: 40001800 .word 0x40001800
- 800f540: 40014000 .word 0x40014000
- 800f544: 00010007 .word 0x00010007
- 0800f548 <HAL_TIM_IRQHandler>:
- * @brief This function handles TIM interrupts requests.
- * @param htim TIM handle
- * @retval None
- */
- void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
- {
- 800f548: b580 push {r7, lr}
- 800f54a: b084 sub sp, #16
- 800f54c: af00 add r7, sp, #0
- 800f54e: 6078 str r0, [r7, #4]
- uint32_t itsource = htim->Instance->DIER;
- 800f550: 687b ldr r3, [r7, #4]
- 800f552: 681b ldr r3, [r3, #0]
- 800f554: 68db ldr r3, [r3, #12]
- 800f556: 60fb str r3, [r7, #12]
- uint32_t itflag = htim->Instance->SR;
- 800f558: 687b ldr r3, [r7, #4]
- 800f55a: 681b ldr r3, [r3, #0]
- 800f55c: 691b ldr r3, [r3, #16]
- 800f55e: 60bb str r3, [r7, #8]
- /* Capture compare 1 event */
- if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1))
- 800f560: 68bb ldr r3, [r7, #8]
- 800f562: f003 0302 and.w r3, r3, #2
- 800f566: 2b00 cmp r3, #0
- 800f568: d020 beq.n 800f5ac <HAL_TIM_IRQHandler+0x64>
- {
- if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1))
- 800f56a: 68fb ldr r3, [r7, #12]
- 800f56c: f003 0302 and.w r3, r3, #2
- 800f570: 2b00 cmp r3, #0
- 800f572: d01b beq.n 800f5ac <HAL_TIM_IRQHandler+0x64>
- {
- {
- __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1);
- 800f574: 687b ldr r3, [r7, #4]
- 800f576: 681b ldr r3, [r3, #0]
- 800f578: f06f 0202 mvn.w r2, #2
- 800f57c: 611a str r2, [r3, #16]
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
- 800f57e: 687b ldr r3, [r7, #4]
- 800f580: 2201 movs r2, #1
- 800f582: 771a strb r2, [r3, #28]
- /* Input capture event */
- if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
- 800f584: 687b ldr r3, [r7, #4]
- 800f586: 681b ldr r3, [r3, #0]
- 800f588: 699b ldr r3, [r3, #24]
- 800f58a: f003 0303 and.w r3, r3, #3
- 800f58e: 2b00 cmp r3, #0
- 800f590: d003 beq.n 800f59a <HAL_TIM_IRQHandler+0x52>
- {
- #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->IC_CaptureCallback(htim);
- #else
- HAL_TIM_IC_CaptureCallback(htim);
- 800f592: 6878 ldr r0, [r7, #4]
- 800f594: f7f2 fa68 bl 8001a68 <HAL_TIM_IC_CaptureCallback>
- 800f598: e005 b.n 800f5a6 <HAL_TIM_IRQHandler+0x5e>
- {
- #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->OC_DelayElapsedCallback(htim);
- htim->PWM_PulseFinishedCallback(htim);
- #else
- HAL_TIM_OC_DelayElapsedCallback(htim);
- 800f59a: 6878 ldr r0, [r7, #4]
- 800f59c: f000 fbc8 bl 800fd30 <HAL_TIM_OC_DelayElapsedCallback>
- HAL_TIM_PWM_PulseFinishedCallback(htim);
- 800f5a0: 6878 ldr r0, [r7, #4]
- 800f5a2: f000 fbcf bl 800fd44 <HAL_TIM_PWM_PulseFinishedCallback>
- #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 800f5a6: 687b ldr r3, [r7, #4]
- 800f5a8: 2200 movs r2, #0
- 800f5aa: 771a strb r2, [r3, #28]
- }
- }
- }
- /* Capture compare 2 event */
- if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2))
- 800f5ac: 68bb ldr r3, [r7, #8]
- 800f5ae: f003 0304 and.w r3, r3, #4
- 800f5b2: 2b00 cmp r3, #0
- 800f5b4: d020 beq.n 800f5f8 <HAL_TIM_IRQHandler+0xb0>
- {
- if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2))
- 800f5b6: 68fb ldr r3, [r7, #12]
- 800f5b8: f003 0304 and.w r3, r3, #4
- 800f5bc: 2b00 cmp r3, #0
- 800f5be: d01b beq.n 800f5f8 <HAL_TIM_IRQHandler+0xb0>
- {
- __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2);
- 800f5c0: 687b ldr r3, [r7, #4]
- 800f5c2: 681b ldr r3, [r3, #0]
- 800f5c4: f06f 0204 mvn.w r2, #4
- 800f5c8: 611a str r2, [r3, #16]
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
- 800f5ca: 687b ldr r3, [r7, #4]
- 800f5cc: 2202 movs r2, #2
- 800f5ce: 771a strb r2, [r3, #28]
- /* Input capture event */
- if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
- 800f5d0: 687b ldr r3, [r7, #4]
- 800f5d2: 681b ldr r3, [r3, #0]
- 800f5d4: 699b ldr r3, [r3, #24]
- 800f5d6: f403 7340 and.w r3, r3, #768 @ 0x300
- 800f5da: 2b00 cmp r3, #0
- 800f5dc: d003 beq.n 800f5e6 <HAL_TIM_IRQHandler+0x9e>
- {
- #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->IC_CaptureCallback(htim);
- #else
- HAL_TIM_IC_CaptureCallback(htim);
- 800f5de: 6878 ldr r0, [r7, #4]
- 800f5e0: f7f2 fa42 bl 8001a68 <HAL_TIM_IC_CaptureCallback>
- 800f5e4: e005 b.n 800f5f2 <HAL_TIM_IRQHandler+0xaa>
- {
- #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->OC_DelayElapsedCallback(htim);
- htim->PWM_PulseFinishedCallback(htim);
- #else
- HAL_TIM_OC_DelayElapsedCallback(htim);
- 800f5e6: 6878 ldr r0, [r7, #4]
- 800f5e8: f000 fba2 bl 800fd30 <HAL_TIM_OC_DelayElapsedCallback>
- HAL_TIM_PWM_PulseFinishedCallback(htim);
- 800f5ec: 6878 ldr r0, [r7, #4]
- 800f5ee: f000 fba9 bl 800fd44 <HAL_TIM_PWM_PulseFinishedCallback>
- #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 800f5f2: 687b ldr r3, [r7, #4]
- 800f5f4: 2200 movs r2, #0
- 800f5f6: 771a strb r2, [r3, #28]
- }
- }
- /* Capture compare 3 event */
- if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3))
- 800f5f8: 68bb ldr r3, [r7, #8]
- 800f5fa: f003 0308 and.w r3, r3, #8
- 800f5fe: 2b00 cmp r3, #0
- 800f600: d020 beq.n 800f644 <HAL_TIM_IRQHandler+0xfc>
- {
- if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
- 800f602: 68fb ldr r3, [r7, #12]
- 800f604: f003 0308 and.w r3, r3, #8
- 800f608: 2b00 cmp r3, #0
- 800f60a: d01b beq.n 800f644 <HAL_TIM_IRQHandler+0xfc>
- {
- __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
- 800f60c: 687b ldr r3, [r7, #4]
- 800f60e: 681b ldr r3, [r3, #0]
- 800f610: f06f 0208 mvn.w r2, #8
- 800f614: 611a str r2, [r3, #16]
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
- 800f616: 687b ldr r3, [r7, #4]
- 800f618: 2204 movs r2, #4
- 800f61a: 771a strb r2, [r3, #28]
- /* Input capture event */
- if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
- 800f61c: 687b ldr r3, [r7, #4]
- 800f61e: 681b ldr r3, [r3, #0]
- 800f620: 69db ldr r3, [r3, #28]
- 800f622: f003 0303 and.w r3, r3, #3
- 800f626: 2b00 cmp r3, #0
- 800f628: d003 beq.n 800f632 <HAL_TIM_IRQHandler+0xea>
- {
- #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->IC_CaptureCallback(htim);
- #else
- HAL_TIM_IC_CaptureCallback(htim);
- 800f62a: 6878 ldr r0, [r7, #4]
- 800f62c: f7f2 fa1c bl 8001a68 <HAL_TIM_IC_CaptureCallback>
- 800f630: e005 b.n 800f63e <HAL_TIM_IRQHandler+0xf6>
- {
- #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->OC_DelayElapsedCallback(htim);
- htim->PWM_PulseFinishedCallback(htim);
- #else
- HAL_TIM_OC_DelayElapsedCallback(htim);
- 800f632: 6878 ldr r0, [r7, #4]
- 800f634: f000 fb7c bl 800fd30 <HAL_TIM_OC_DelayElapsedCallback>
- HAL_TIM_PWM_PulseFinishedCallback(htim);
- 800f638: 6878 ldr r0, [r7, #4]
- 800f63a: f000 fb83 bl 800fd44 <HAL_TIM_PWM_PulseFinishedCallback>
- #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 800f63e: 687b ldr r3, [r7, #4]
- 800f640: 2200 movs r2, #0
- 800f642: 771a strb r2, [r3, #28]
- }
- }
- /* Capture compare 4 event */
- if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4))
- 800f644: 68bb ldr r3, [r7, #8]
- 800f646: f003 0310 and.w r3, r3, #16
- 800f64a: 2b00 cmp r3, #0
- 800f64c: d020 beq.n 800f690 <HAL_TIM_IRQHandler+0x148>
- {
- if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4))
- 800f64e: 68fb ldr r3, [r7, #12]
- 800f650: f003 0310 and.w r3, r3, #16
- 800f654: 2b00 cmp r3, #0
- 800f656: d01b beq.n 800f690 <HAL_TIM_IRQHandler+0x148>
- {
- __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4);
- 800f658: 687b ldr r3, [r7, #4]
- 800f65a: 681b ldr r3, [r3, #0]
- 800f65c: f06f 0210 mvn.w r2, #16
- 800f660: 611a str r2, [r3, #16]
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
- 800f662: 687b ldr r3, [r7, #4]
- 800f664: 2208 movs r2, #8
- 800f666: 771a strb r2, [r3, #28]
- /* Input capture event */
- if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
- 800f668: 687b ldr r3, [r7, #4]
- 800f66a: 681b ldr r3, [r3, #0]
- 800f66c: 69db ldr r3, [r3, #28]
- 800f66e: f403 7340 and.w r3, r3, #768 @ 0x300
- 800f672: 2b00 cmp r3, #0
- 800f674: d003 beq.n 800f67e <HAL_TIM_IRQHandler+0x136>
- {
- #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->IC_CaptureCallback(htim);
- #else
- HAL_TIM_IC_CaptureCallback(htim);
- 800f676: 6878 ldr r0, [r7, #4]
- 800f678: f7f2 f9f6 bl 8001a68 <HAL_TIM_IC_CaptureCallback>
- 800f67c: e005 b.n 800f68a <HAL_TIM_IRQHandler+0x142>
- {
- #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->OC_DelayElapsedCallback(htim);
- htim->PWM_PulseFinishedCallback(htim);
- #else
- HAL_TIM_OC_DelayElapsedCallback(htim);
- 800f67e: 6878 ldr r0, [r7, #4]
- 800f680: f000 fb56 bl 800fd30 <HAL_TIM_OC_DelayElapsedCallback>
- HAL_TIM_PWM_PulseFinishedCallback(htim);
- 800f684: 6878 ldr r0, [r7, #4]
- 800f686: f000 fb5d bl 800fd44 <HAL_TIM_PWM_PulseFinishedCallback>
- #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 800f68a: 687b ldr r3, [r7, #4]
- 800f68c: 2200 movs r2, #0
- 800f68e: 771a strb r2, [r3, #28]
- }
- }
- /* TIM Update event */
- if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE))
- 800f690: 68bb ldr r3, [r7, #8]
- 800f692: f003 0301 and.w r3, r3, #1
- 800f696: 2b00 cmp r3, #0
- 800f698: d00c beq.n 800f6b4 <HAL_TIM_IRQHandler+0x16c>
- {
- if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
- 800f69a: 68fb ldr r3, [r7, #12]
- 800f69c: f003 0301 and.w r3, r3, #1
- 800f6a0: 2b00 cmp r3, #0
- 800f6a2: d007 beq.n 800f6b4 <HAL_TIM_IRQHandler+0x16c>
- {
- __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
- 800f6a4: 687b ldr r3, [r7, #4]
- 800f6a6: 681b ldr r3, [r3, #0]
- 800f6a8: f06f 0201 mvn.w r2, #1
- 800f6ac: 611a str r2, [r3, #16]
- #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->PeriodElapsedCallback(htim);
- #else
- HAL_TIM_PeriodElapsedCallback(htim);
- 800f6ae: 6878 ldr r0, [r7, #4]
- 800f6b0: f7f2 fc36 bl 8001f20 <HAL_TIM_PeriodElapsedCallback>
- #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- }
- /* TIM Break input event */
- if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
- 800f6b4: 68bb ldr r3, [r7, #8]
- 800f6b6: f003 0380 and.w r3, r3, #128 @ 0x80
- 800f6ba: 2b00 cmp r3, #0
- 800f6bc: d104 bne.n 800f6c8 <HAL_TIM_IRQHandler+0x180>
- ((itflag & (TIM_FLAG_SYSTEM_BREAK)) == (TIM_FLAG_SYSTEM_BREAK)))
- 800f6be: 68bb ldr r3, [r7, #8]
- 800f6c0: f403 5300 and.w r3, r3, #8192 @ 0x2000
- if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
- 800f6c4: 2b00 cmp r3, #0
- 800f6c6: d00c beq.n 800f6e2 <HAL_TIM_IRQHandler+0x19a>
- {
- if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
- 800f6c8: 68fb ldr r3, [r7, #12]
- 800f6ca: f003 0380 and.w r3, r3, #128 @ 0x80
- 800f6ce: 2b00 cmp r3, #0
- 800f6d0: d007 beq.n 800f6e2 <HAL_TIM_IRQHandler+0x19a>
- {
- __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK | TIM_FLAG_SYSTEM_BREAK);
- 800f6d2: 687b ldr r3, [r7, #4]
- 800f6d4: 681b ldr r3, [r3, #0]
- 800f6d6: f46f 5202 mvn.w r2, #8320 @ 0x2080
- 800f6da: 611a str r2, [r3, #16]
- #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->BreakCallback(htim);
- #else
- HAL_TIMEx_BreakCallback(htim);
- 800f6dc: 6878 ldr r0, [r7, #4]
- 800f6de: f001 f9ff bl 8010ae0 <HAL_TIMEx_BreakCallback>
- #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- }
- /* TIM Break2 input event */
- if ((itflag & (TIM_FLAG_BREAK2)) == (TIM_FLAG_BREAK2))
- 800f6e2: 68bb ldr r3, [r7, #8]
- 800f6e4: f403 7380 and.w r3, r3, #256 @ 0x100
- 800f6e8: 2b00 cmp r3, #0
- 800f6ea: d00c beq.n 800f706 <HAL_TIM_IRQHandler+0x1be>
- {
- if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
- 800f6ec: 68fb ldr r3, [r7, #12]
- 800f6ee: f003 0380 and.w r3, r3, #128 @ 0x80
- 800f6f2: 2b00 cmp r3, #0
- 800f6f4: d007 beq.n 800f706 <HAL_TIM_IRQHandler+0x1be>
- {
- __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2);
- 800f6f6: 687b ldr r3, [r7, #4]
- 800f6f8: 681b ldr r3, [r3, #0]
- 800f6fa: f46f 7280 mvn.w r2, #256 @ 0x100
- 800f6fe: 611a str r2, [r3, #16]
- #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->Break2Callback(htim);
- #else
- HAL_TIMEx_Break2Callback(htim);
- 800f700: 6878 ldr r0, [r7, #4]
- 800f702: f001 f9f7 bl 8010af4 <HAL_TIMEx_Break2Callback>
- #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- }
- /* TIM Trigger detection event */
- if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER))
- 800f706: 68bb ldr r3, [r7, #8]
- 800f708: f003 0340 and.w r3, r3, #64 @ 0x40
- 800f70c: 2b00 cmp r3, #0
- 800f70e: d00c beq.n 800f72a <HAL_TIM_IRQHandler+0x1e2>
- {
- if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER))
- 800f710: 68fb ldr r3, [r7, #12]
- 800f712: f003 0340 and.w r3, r3, #64 @ 0x40
- 800f716: 2b00 cmp r3, #0
- 800f718: d007 beq.n 800f72a <HAL_TIM_IRQHandler+0x1e2>
- {
- __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER);
- 800f71a: 687b ldr r3, [r7, #4]
- 800f71c: 681b ldr r3, [r3, #0]
- 800f71e: f06f 0240 mvn.w r2, #64 @ 0x40
- 800f722: 611a str r2, [r3, #16]
- #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->TriggerCallback(htim);
- #else
- HAL_TIM_TriggerCallback(htim);
- 800f724: 6878 ldr r0, [r7, #4]
- 800f726: f000 fb17 bl 800fd58 <HAL_TIM_TriggerCallback>
- #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- }
- /* TIM commutation event */
- if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM))
- 800f72a: 68bb ldr r3, [r7, #8]
- 800f72c: f003 0320 and.w r3, r3, #32
- 800f730: 2b00 cmp r3, #0
- 800f732: d00c beq.n 800f74e <HAL_TIM_IRQHandler+0x206>
- {
- if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM))
- 800f734: 68fb ldr r3, [r7, #12]
- 800f736: f003 0320 and.w r3, r3, #32
- 800f73a: 2b00 cmp r3, #0
- 800f73c: d007 beq.n 800f74e <HAL_TIM_IRQHandler+0x206>
- {
- __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
- 800f73e: 687b ldr r3, [r7, #4]
- 800f740: 681b ldr r3, [r3, #0]
- 800f742: f06f 0220 mvn.w r2, #32
- 800f746: 611a str r2, [r3, #16]
- #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->CommutationCallback(htim);
- #else
- HAL_TIMEx_CommutCallback(htim);
- 800f748: 6878 ldr r0, [r7, #4]
- 800f74a: f001 f9bf bl 8010acc <HAL_TIMEx_CommutCallback>
- #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- }
- }
- 800f74e: bf00 nop
- 800f750: 3710 adds r7, #16
- 800f752: 46bd mov sp, r7
- 800f754: bd80 pop {r7, pc}
- 0800f756 <HAL_TIM_IC_ConfigChannel>:
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_IC_InitTypeDef *sConfig, uint32_t Channel)
- {
- 800f756: b580 push {r7, lr}
- 800f758: b086 sub sp, #24
- 800f75a: af00 add r7, sp, #0
- 800f75c: 60f8 str r0, [r7, #12]
- 800f75e: 60b9 str r1, [r7, #8]
- 800f760: 607a str r2, [r7, #4]
- HAL_StatusTypeDef status = HAL_OK;
- 800f762: 2300 movs r3, #0
- 800f764: 75fb strb r3, [r7, #23]
- assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection));
- assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler));
- assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter));
- /* Process Locked */
- __HAL_LOCK(htim);
- 800f766: 68fb ldr r3, [r7, #12]
- 800f768: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
- 800f76c: 2b01 cmp r3, #1
- 800f76e: d101 bne.n 800f774 <HAL_TIM_IC_ConfigChannel+0x1e>
- 800f770: 2302 movs r3, #2
- 800f772: e088 b.n 800f886 <HAL_TIM_IC_ConfigChannel+0x130>
- 800f774: 68fb ldr r3, [r7, #12]
- 800f776: 2201 movs r2, #1
- 800f778: f883 203c strb.w r2, [r3, #60] @ 0x3c
- if (Channel == TIM_CHANNEL_1)
- 800f77c: 687b ldr r3, [r7, #4]
- 800f77e: 2b00 cmp r3, #0
- 800f780: d11b bne.n 800f7ba <HAL_TIM_IC_ConfigChannel+0x64>
- {
- /* TI1 Configuration */
- TIM_TI1_SetConfig(htim->Instance,
- 800f782: 68fb ldr r3, [r7, #12]
- 800f784: 6818 ldr r0, [r3, #0]
- sConfig->ICPolarity,
- 800f786: 68bb ldr r3, [r7, #8]
- 800f788: 6819 ldr r1, [r3, #0]
- sConfig->ICSelection,
- 800f78a: 68bb ldr r3, [r7, #8]
- 800f78c: 685a ldr r2, [r3, #4]
- sConfig->ICFilter);
- 800f78e: 68bb ldr r3, [r7, #8]
- 800f790: 68db ldr r3, [r3, #12]
- TIM_TI1_SetConfig(htim->Instance,
- 800f792: f000 fea1 bl 80104d8 <TIM_TI1_SetConfig>
- /* Reset the IC1PSC Bits */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
- 800f796: 68fb ldr r3, [r7, #12]
- 800f798: 681b ldr r3, [r3, #0]
- 800f79a: 699a ldr r2, [r3, #24]
- 800f79c: 68fb ldr r3, [r7, #12]
- 800f79e: 681b ldr r3, [r3, #0]
- 800f7a0: f022 020c bic.w r2, r2, #12
- 800f7a4: 619a str r2, [r3, #24]
- /* Set the IC1PSC value */
- htim->Instance->CCMR1 |= sConfig->ICPrescaler;
- 800f7a6: 68fb ldr r3, [r7, #12]
- 800f7a8: 681b ldr r3, [r3, #0]
- 800f7aa: 6999 ldr r1, [r3, #24]
- 800f7ac: 68bb ldr r3, [r7, #8]
- 800f7ae: 689a ldr r2, [r3, #8]
- 800f7b0: 68fb ldr r3, [r7, #12]
- 800f7b2: 681b ldr r3, [r3, #0]
- 800f7b4: 430a orrs r2, r1
- 800f7b6: 619a str r2, [r3, #24]
- 800f7b8: e060 b.n 800f87c <HAL_TIM_IC_ConfigChannel+0x126>
- }
- else if (Channel == TIM_CHANNEL_2)
- 800f7ba: 687b ldr r3, [r7, #4]
- 800f7bc: 2b04 cmp r3, #4
- 800f7be: d11c bne.n 800f7fa <HAL_TIM_IC_ConfigChannel+0xa4>
- {
- /* TI2 Configuration */
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
- TIM_TI2_SetConfig(htim->Instance,
- 800f7c0: 68fb ldr r3, [r7, #12]
- 800f7c2: 6818 ldr r0, [r3, #0]
- sConfig->ICPolarity,
- 800f7c4: 68bb ldr r3, [r7, #8]
- 800f7c6: 6819 ldr r1, [r3, #0]
- sConfig->ICSelection,
- 800f7c8: 68bb ldr r3, [r7, #8]
- 800f7ca: 685a ldr r2, [r3, #4]
- sConfig->ICFilter);
- 800f7cc: 68bb ldr r3, [r7, #8]
- 800f7ce: 68db ldr r3, [r3, #12]
- TIM_TI2_SetConfig(htim->Instance,
- 800f7d0: f000 ff25 bl 801061e <TIM_TI2_SetConfig>
- /* Reset the IC2PSC Bits */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
- 800f7d4: 68fb ldr r3, [r7, #12]
- 800f7d6: 681b ldr r3, [r3, #0]
- 800f7d8: 699a ldr r2, [r3, #24]
- 800f7da: 68fb ldr r3, [r7, #12]
- 800f7dc: 681b ldr r3, [r3, #0]
- 800f7de: f422 6240 bic.w r2, r2, #3072 @ 0xc00
- 800f7e2: 619a str r2, [r3, #24]
- /* Set the IC2PSC value */
- htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8U);
- 800f7e4: 68fb ldr r3, [r7, #12]
- 800f7e6: 681b ldr r3, [r3, #0]
- 800f7e8: 6999 ldr r1, [r3, #24]
- 800f7ea: 68bb ldr r3, [r7, #8]
- 800f7ec: 689b ldr r3, [r3, #8]
- 800f7ee: 021a lsls r2, r3, #8
- 800f7f0: 68fb ldr r3, [r7, #12]
- 800f7f2: 681b ldr r3, [r3, #0]
- 800f7f4: 430a orrs r2, r1
- 800f7f6: 619a str r2, [r3, #24]
- 800f7f8: e040 b.n 800f87c <HAL_TIM_IC_ConfigChannel+0x126>
- }
- else if (Channel == TIM_CHANNEL_3)
- 800f7fa: 687b ldr r3, [r7, #4]
- 800f7fc: 2b08 cmp r3, #8
- 800f7fe: d11b bne.n 800f838 <HAL_TIM_IC_ConfigChannel+0xe2>
- {
- /* TI3 Configuration */
- assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
- TIM_TI3_SetConfig(htim->Instance,
- 800f800: 68fb ldr r3, [r7, #12]
- 800f802: 6818 ldr r0, [r3, #0]
- sConfig->ICPolarity,
- 800f804: 68bb ldr r3, [r7, #8]
- 800f806: 6819 ldr r1, [r3, #0]
- sConfig->ICSelection,
- 800f808: 68bb ldr r3, [r7, #8]
- 800f80a: 685a ldr r2, [r3, #4]
- sConfig->ICFilter);
- 800f80c: 68bb ldr r3, [r7, #8]
- 800f80e: 68db ldr r3, [r3, #12]
- TIM_TI3_SetConfig(htim->Instance,
- 800f810: f000 ff72 bl 80106f8 <TIM_TI3_SetConfig>
- /* Reset the IC3PSC Bits */
- htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC;
- 800f814: 68fb ldr r3, [r7, #12]
- 800f816: 681b ldr r3, [r3, #0]
- 800f818: 69da ldr r2, [r3, #28]
- 800f81a: 68fb ldr r3, [r7, #12]
- 800f81c: 681b ldr r3, [r3, #0]
- 800f81e: f022 020c bic.w r2, r2, #12
- 800f822: 61da str r2, [r3, #28]
- /* Set the IC3PSC value */
- htim->Instance->CCMR2 |= sConfig->ICPrescaler;
- 800f824: 68fb ldr r3, [r7, #12]
- 800f826: 681b ldr r3, [r3, #0]
- 800f828: 69d9 ldr r1, [r3, #28]
- 800f82a: 68bb ldr r3, [r7, #8]
- 800f82c: 689a ldr r2, [r3, #8]
- 800f82e: 68fb ldr r3, [r7, #12]
- 800f830: 681b ldr r3, [r3, #0]
- 800f832: 430a orrs r2, r1
- 800f834: 61da str r2, [r3, #28]
- 800f836: e021 b.n 800f87c <HAL_TIM_IC_ConfigChannel+0x126>
- }
- else if (Channel == TIM_CHANNEL_4)
- 800f838: 687b ldr r3, [r7, #4]
- 800f83a: 2b0c cmp r3, #12
- 800f83c: d11c bne.n 800f878 <HAL_TIM_IC_ConfigChannel+0x122>
- {
- /* TI4 Configuration */
- assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
- TIM_TI4_SetConfig(htim->Instance,
- 800f83e: 68fb ldr r3, [r7, #12]
- 800f840: 6818 ldr r0, [r3, #0]
- sConfig->ICPolarity,
- 800f842: 68bb ldr r3, [r7, #8]
- 800f844: 6819 ldr r1, [r3, #0]
- sConfig->ICSelection,
- 800f846: 68bb ldr r3, [r7, #8]
- 800f848: 685a ldr r2, [r3, #4]
- sConfig->ICFilter);
- 800f84a: 68bb ldr r3, [r7, #8]
- 800f84c: 68db ldr r3, [r3, #12]
- TIM_TI4_SetConfig(htim->Instance,
- 800f84e: f000 ff8f bl 8010770 <TIM_TI4_SetConfig>
- /* Reset the IC4PSC Bits */
- htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC;
- 800f852: 68fb ldr r3, [r7, #12]
- 800f854: 681b ldr r3, [r3, #0]
- 800f856: 69da ldr r2, [r3, #28]
- 800f858: 68fb ldr r3, [r7, #12]
- 800f85a: 681b ldr r3, [r3, #0]
- 800f85c: f422 6240 bic.w r2, r2, #3072 @ 0xc00
- 800f860: 61da str r2, [r3, #28]
- /* Set the IC4PSC value */
- htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8U);
- 800f862: 68fb ldr r3, [r7, #12]
- 800f864: 681b ldr r3, [r3, #0]
- 800f866: 69d9 ldr r1, [r3, #28]
- 800f868: 68bb ldr r3, [r7, #8]
- 800f86a: 689b ldr r3, [r3, #8]
- 800f86c: 021a lsls r2, r3, #8
- 800f86e: 68fb ldr r3, [r7, #12]
- 800f870: 681b ldr r3, [r3, #0]
- 800f872: 430a orrs r2, r1
- 800f874: 61da str r2, [r3, #28]
- 800f876: e001 b.n 800f87c <HAL_TIM_IC_ConfigChannel+0x126>
- }
- else
- {
- status = HAL_ERROR;
- 800f878: 2301 movs r3, #1
- 800f87a: 75fb strb r3, [r7, #23]
- }
- __HAL_UNLOCK(htim);
- 800f87c: 68fb ldr r3, [r7, #12]
- 800f87e: 2200 movs r2, #0
- 800f880: f883 203c strb.w r2, [r3, #60] @ 0x3c
- return status;
- 800f884: 7dfb ldrb r3, [r7, #23]
- }
- 800f886: 4618 mov r0, r3
- 800f888: 3718 adds r7, #24
- 800f88a: 46bd mov sp, r7
- 800f88c: bd80 pop {r7, pc}
- ...
- 0800f890 <HAL_TIM_PWM_ConfigChannel>:
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
- const TIM_OC_InitTypeDef *sConfig,
- uint32_t Channel)
- {
- 800f890: b580 push {r7, lr}
- 800f892: b086 sub sp, #24
- 800f894: af00 add r7, sp, #0
- 800f896: 60f8 str r0, [r7, #12]
- 800f898: 60b9 str r1, [r7, #8]
- 800f89a: 607a str r2, [r7, #4]
- HAL_StatusTypeDef status = HAL_OK;
- 800f89c: 2300 movs r3, #0
- 800f89e: 75fb strb r3, [r7, #23]
- assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
- assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
- assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
- /* Process Locked */
- __HAL_LOCK(htim);
- 800f8a0: 68fb ldr r3, [r7, #12]
- 800f8a2: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
- 800f8a6: 2b01 cmp r3, #1
- 800f8a8: d101 bne.n 800f8ae <HAL_TIM_PWM_ConfigChannel+0x1e>
- 800f8aa: 2302 movs r3, #2
- 800f8ac: e0ff b.n 800faae <HAL_TIM_PWM_ConfigChannel+0x21e>
- 800f8ae: 68fb ldr r3, [r7, #12]
- 800f8b0: 2201 movs r2, #1
- 800f8b2: f883 203c strb.w r2, [r3, #60] @ 0x3c
- switch (Channel)
- 800f8b6: 687b ldr r3, [r7, #4]
- 800f8b8: 2b14 cmp r3, #20
- 800f8ba: f200 80f0 bhi.w 800fa9e <HAL_TIM_PWM_ConfigChannel+0x20e>
- 800f8be: a201 add r2, pc, #4 @ (adr r2, 800f8c4 <HAL_TIM_PWM_ConfigChannel+0x34>)
- 800f8c0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800f8c4: 0800f919 .word 0x0800f919
- 800f8c8: 0800fa9f .word 0x0800fa9f
- 800f8cc: 0800fa9f .word 0x0800fa9f
- 800f8d0: 0800fa9f .word 0x0800fa9f
- 800f8d4: 0800f959 .word 0x0800f959
- 800f8d8: 0800fa9f .word 0x0800fa9f
- 800f8dc: 0800fa9f .word 0x0800fa9f
- 800f8e0: 0800fa9f .word 0x0800fa9f
- 800f8e4: 0800f99b .word 0x0800f99b
- 800f8e8: 0800fa9f .word 0x0800fa9f
- 800f8ec: 0800fa9f .word 0x0800fa9f
- 800f8f0: 0800fa9f .word 0x0800fa9f
- 800f8f4: 0800f9db .word 0x0800f9db
- 800f8f8: 0800fa9f .word 0x0800fa9f
- 800f8fc: 0800fa9f .word 0x0800fa9f
- 800f900: 0800fa9f .word 0x0800fa9f
- 800f904: 0800fa1d .word 0x0800fa1d
- 800f908: 0800fa9f .word 0x0800fa9f
- 800f90c: 0800fa9f .word 0x0800fa9f
- 800f910: 0800fa9f .word 0x0800fa9f
- 800f914: 0800fa5d .word 0x0800fa5d
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
- /* Configure the Channel 1 in PWM mode */
- TIM_OC1_SetConfig(htim->Instance, sConfig);
- 800f918: 68fb ldr r3, [r7, #12]
- 800f91a: 681b ldr r3, [r3, #0]
- 800f91c: 68b9 ldr r1, [r7, #8]
- 800f91e: 4618 mov r0, r3
- 800f920: f000 fb04 bl 800ff2c <TIM_OC1_SetConfig>
- /* Set the Preload enable bit for channel1 */
- htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
- 800f924: 68fb ldr r3, [r7, #12]
- 800f926: 681b ldr r3, [r3, #0]
- 800f928: 699a ldr r2, [r3, #24]
- 800f92a: 68fb ldr r3, [r7, #12]
- 800f92c: 681b ldr r3, [r3, #0]
- 800f92e: f042 0208 orr.w r2, r2, #8
- 800f932: 619a str r2, [r3, #24]
- /* Configure the Output Fast mode */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
- 800f934: 68fb ldr r3, [r7, #12]
- 800f936: 681b ldr r3, [r3, #0]
- 800f938: 699a ldr r2, [r3, #24]
- 800f93a: 68fb ldr r3, [r7, #12]
- 800f93c: 681b ldr r3, [r3, #0]
- 800f93e: f022 0204 bic.w r2, r2, #4
- 800f942: 619a str r2, [r3, #24]
- htim->Instance->CCMR1 |= sConfig->OCFastMode;
- 800f944: 68fb ldr r3, [r7, #12]
- 800f946: 681b ldr r3, [r3, #0]
- 800f948: 6999 ldr r1, [r3, #24]
- 800f94a: 68bb ldr r3, [r7, #8]
- 800f94c: 691a ldr r2, [r3, #16]
- 800f94e: 68fb ldr r3, [r7, #12]
- 800f950: 681b ldr r3, [r3, #0]
- 800f952: 430a orrs r2, r1
- 800f954: 619a str r2, [r3, #24]
- break;
- 800f956: e0a5 b.n 800faa4 <HAL_TIM_PWM_ConfigChannel+0x214>
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
- /* Configure the Channel 2 in PWM mode */
- TIM_OC2_SetConfig(htim->Instance, sConfig);
- 800f958: 68fb ldr r3, [r7, #12]
- 800f95a: 681b ldr r3, [r3, #0]
- 800f95c: 68b9 ldr r1, [r7, #8]
- 800f95e: 4618 mov r0, r3
- 800f960: f000 fb74 bl 801004c <TIM_OC2_SetConfig>
- /* Set the Preload enable bit for channel2 */
- htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
- 800f964: 68fb ldr r3, [r7, #12]
- 800f966: 681b ldr r3, [r3, #0]
- 800f968: 699a ldr r2, [r3, #24]
- 800f96a: 68fb ldr r3, [r7, #12]
- 800f96c: 681b ldr r3, [r3, #0]
- 800f96e: f442 6200 orr.w r2, r2, #2048 @ 0x800
- 800f972: 619a str r2, [r3, #24]
- /* Configure the Output Fast mode */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
- 800f974: 68fb ldr r3, [r7, #12]
- 800f976: 681b ldr r3, [r3, #0]
- 800f978: 699a ldr r2, [r3, #24]
- 800f97a: 68fb ldr r3, [r7, #12]
- 800f97c: 681b ldr r3, [r3, #0]
- 800f97e: f422 6280 bic.w r2, r2, #1024 @ 0x400
- 800f982: 619a str r2, [r3, #24]
- htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
- 800f984: 68fb ldr r3, [r7, #12]
- 800f986: 681b ldr r3, [r3, #0]
- 800f988: 6999 ldr r1, [r3, #24]
- 800f98a: 68bb ldr r3, [r7, #8]
- 800f98c: 691b ldr r3, [r3, #16]
- 800f98e: 021a lsls r2, r3, #8
- 800f990: 68fb ldr r3, [r7, #12]
- 800f992: 681b ldr r3, [r3, #0]
- 800f994: 430a orrs r2, r1
- 800f996: 619a str r2, [r3, #24]
- break;
- 800f998: e084 b.n 800faa4 <HAL_TIM_PWM_ConfigChannel+0x214>
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
- /* Configure the Channel 3 in PWM mode */
- TIM_OC3_SetConfig(htim->Instance, sConfig);
- 800f99a: 68fb ldr r3, [r7, #12]
- 800f99c: 681b ldr r3, [r3, #0]
- 800f99e: 68b9 ldr r1, [r7, #8]
- 800f9a0: 4618 mov r0, r3
- 800f9a2: f000 fbdd bl 8010160 <TIM_OC3_SetConfig>
- /* Set the Preload enable bit for channel3 */
- htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
- 800f9a6: 68fb ldr r3, [r7, #12]
- 800f9a8: 681b ldr r3, [r3, #0]
- 800f9aa: 69da ldr r2, [r3, #28]
- 800f9ac: 68fb ldr r3, [r7, #12]
- 800f9ae: 681b ldr r3, [r3, #0]
- 800f9b0: f042 0208 orr.w r2, r2, #8
- 800f9b4: 61da str r2, [r3, #28]
- /* Configure the Output Fast mode */
- htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
- 800f9b6: 68fb ldr r3, [r7, #12]
- 800f9b8: 681b ldr r3, [r3, #0]
- 800f9ba: 69da ldr r2, [r3, #28]
- 800f9bc: 68fb ldr r3, [r7, #12]
- 800f9be: 681b ldr r3, [r3, #0]
- 800f9c0: f022 0204 bic.w r2, r2, #4
- 800f9c4: 61da str r2, [r3, #28]
- htim->Instance->CCMR2 |= sConfig->OCFastMode;
- 800f9c6: 68fb ldr r3, [r7, #12]
- 800f9c8: 681b ldr r3, [r3, #0]
- 800f9ca: 69d9 ldr r1, [r3, #28]
- 800f9cc: 68bb ldr r3, [r7, #8]
- 800f9ce: 691a ldr r2, [r3, #16]
- 800f9d0: 68fb ldr r3, [r7, #12]
- 800f9d2: 681b ldr r3, [r3, #0]
- 800f9d4: 430a orrs r2, r1
- 800f9d6: 61da str r2, [r3, #28]
- break;
- 800f9d8: e064 b.n 800faa4 <HAL_TIM_PWM_ConfigChannel+0x214>
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
- /* Configure the Channel 4 in PWM mode */
- TIM_OC4_SetConfig(htim->Instance, sConfig);
- 800f9da: 68fb ldr r3, [r7, #12]
- 800f9dc: 681b ldr r3, [r3, #0]
- 800f9de: 68b9 ldr r1, [r7, #8]
- 800f9e0: 4618 mov r0, r3
- 800f9e2: f000 fc45 bl 8010270 <TIM_OC4_SetConfig>
- /* Set the Preload enable bit for channel4 */
- htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
- 800f9e6: 68fb ldr r3, [r7, #12]
- 800f9e8: 681b ldr r3, [r3, #0]
- 800f9ea: 69da ldr r2, [r3, #28]
- 800f9ec: 68fb ldr r3, [r7, #12]
- 800f9ee: 681b ldr r3, [r3, #0]
- 800f9f0: f442 6200 orr.w r2, r2, #2048 @ 0x800
- 800f9f4: 61da str r2, [r3, #28]
- /* Configure the Output Fast mode */
- htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
- 800f9f6: 68fb ldr r3, [r7, #12]
- 800f9f8: 681b ldr r3, [r3, #0]
- 800f9fa: 69da ldr r2, [r3, #28]
- 800f9fc: 68fb ldr r3, [r7, #12]
- 800f9fe: 681b ldr r3, [r3, #0]
- 800fa00: f422 6280 bic.w r2, r2, #1024 @ 0x400
- 800fa04: 61da str r2, [r3, #28]
- htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
- 800fa06: 68fb ldr r3, [r7, #12]
- 800fa08: 681b ldr r3, [r3, #0]
- 800fa0a: 69d9 ldr r1, [r3, #28]
- 800fa0c: 68bb ldr r3, [r7, #8]
- 800fa0e: 691b ldr r3, [r3, #16]
- 800fa10: 021a lsls r2, r3, #8
- 800fa12: 68fb ldr r3, [r7, #12]
- 800fa14: 681b ldr r3, [r3, #0]
- 800fa16: 430a orrs r2, r1
- 800fa18: 61da str r2, [r3, #28]
- break;
- 800fa1a: e043 b.n 800faa4 <HAL_TIM_PWM_ConfigChannel+0x214>
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC5_INSTANCE(htim->Instance));
- /* Configure the Channel 5 in PWM mode */
- TIM_OC5_SetConfig(htim->Instance, sConfig);
- 800fa1c: 68fb ldr r3, [r7, #12]
- 800fa1e: 681b ldr r3, [r3, #0]
- 800fa20: 68b9 ldr r1, [r7, #8]
- 800fa22: 4618 mov r0, r3
- 800fa24: f000 fc8e bl 8010344 <TIM_OC5_SetConfig>
- /* Set the Preload enable bit for channel5*/
- htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE;
- 800fa28: 68fb ldr r3, [r7, #12]
- 800fa2a: 681b ldr r3, [r3, #0]
- 800fa2c: 6d5a ldr r2, [r3, #84] @ 0x54
- 800fa2e: 68fb ldr r3, [r7, #12]
- 800fa30: 681b ldr r3, [r3, #0]
- 800fa32: f042 0208 orr.w r2, r2, #8
- 800fa36: 655a str r2, [r3, #84] @ 0x54
- /* Configure the Output Fast mode */
- htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE;
- 800fa38: 68fb ldr r3, [r7, #12]
- 800fa3a: 681b ldr r3, [r3, #0]
- 800fa3c: 6d5a ldr r2, [r3, #84] @ 0x54
- 800fa3e: 68fb ldr r3, [r7, #12]
- 800fa40: 681b ldr r3, [r3, #0]
- 800fa42: f022 0204 bic.w r2, r2, #4
- 800fa46: 655a str r2, [r3, #84] @ 0x54
- htim->Instance->CCMR3 |= sConfig->OCFastMode;
- 800fa48: 68fb ldr r3, [r7, #12]
- 800fa4a: 681b ldr r3, [r3, #0]
- 800fa4c: 6d59 ldr r1, [r3, #84] @ 0x54
- 800fa4e: 68bb ldr r3, [r7, #8]
- 800fa50: 691a ldr r2, [r3, #16]
- 800fa52: 68fb ldr r3, [r7, #12]
- 800fa54: 681b ldr r3, [r3, #0]
- 800fa56: 430a orrs r2, r1
- 800fa58: 655a str r2, [r3, #84] @ 0x54
- break;
- 800fa5a: e023 b.n 800faa4 <HAL_TIM_PWM_ConfigChannel+0x214>
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC6_INSTANCE(htim->Instance));
- /* Configure the Channel 6 in PWM mode */
- TIM_OC6_SetConfig(htim->Instance, sConfig);
- 800fa5c: 68fb ldr r3, [r7, #12]
- 800fa5e: 681b ldr r3, [r3, #0]
- 800fa60: 68b9 ldr r1, [r7, #8]
- 800fa62: 4618 mov r0, r3
- 800fa64: f000 fcd2 bl 801040c <TIM_OC6_SetConfig>
- /* Set the Preload enable bit for channel6 */
- htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE;
- 800fa68: 68fb ldr r3, [r7, #12]
- 800fa6a: 681b ldr r3, [r3, #0]
- 800fa6c: 6d5a ldr r2, [r3, #84] @ 0x54
- 800fa6e: 68fb ldr r3, [r7, #12]
- 800fa70: 681b ldr r3, [r3, #0]
- 800fa72: f442 6200 orr.w r2, r2, #2048 @ 0x800
- 800fa76: 655a str r2, [r3, #84] @ 0x54
- /* Configure the Output Fast mode */
- htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE;
- 800fa78: 68fb ldr r3, [r7, #12]
- 800fa7a: 681b ldr r3, [r3, #0]
- 800fa7c: 6d5a ldr r2, [r3, #84] @ 0x54
- 800fa7e: 68fb ldr r3, [r7, #12]
- 800fa80: 681b ldr r3, [r3, #0]
- 800fa82: f422 6280 bic.w r2, r2, #1024 @ 0x400
- 800fa86: 655a str r2, [r3, #84] @ 0x54
- htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U;
- 800fa88: 68fb ldr r3, [r7, #12]
- 800fa8a: 681b ldr r3, [r3, #0]
- 800fa8c: 6d59 ldr r1, [r3, #84] @ 0x54
- 800fa8e: 68bb ldr r3, [r7, #8]
- 800fa90: 691b ldr r3, [r3, #16]
- 800fa92: 021a lsls r2, r3, #8
- 800fa94: 68fb ldr r3, [r7, #12]
- 800fa96: 681b ldr r3, [r3, #0]
- 800fa98: 430a orrs r2, r1
- 800fa9a: 655a str r2, [r3, #84] @ 0x54
- break;
- 800fa9c: e002 b.n 800faa4 <HAL_TIM_PWM_ConfigChannel+0x214>
- }
- default:
- status = HAL_ERROR;
- 800fa9e: 2301 movs r3, #1
- 800faa0: 75fb strb r3, [r7, #23]
- break;
- 800faa2: bf00 nop
- }
- __HAL_UNLOCK(htim);
- 800faa4: 68fb ldr r3, [r7, #12]
- 800faa6: 2200 movs r2, #0
- 800faa8: f883 203c strb.w r2, [r3, #60] @ 0x3c
- return status;
- 800faac: 7dfb ldrb r3, [r7, #23]
- }
- 800faae: 4618 mov r0, r3
- 800fab0: 3718 adds r7, #24
- 800fab2: 46bd mov sp, r7
- 800fab4: bd80 pop {r7, pc}
- 800fab6: bf00 nop
- 0800fab8 <HAL_TIM_ConfigClockSource>:
- * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
- * contains the clock source information for the TIM peripheral.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
- {
- 800fab8: b580 push {r7, lr}
- 800faba: b084 sub sp, #16
- 800fabc: af00 add r7, sp, #0
- 800fabe: 6078 str r0, [r7, #4]
- 800fac0: 6039 str r1, [r7, #0]
- HAL_StatusTypeDef status = HAL_OK;
- 800fac2: 2300 movs r3, #0
- 800fac4: 73fb strb r3, [r7, #15]
- uint32_t tmpsmcr;
- /* Process Locked */
- __HAL_LOCK(htim);
- 800fac6: 687b ldr r3, [r7, #4]
- 800fac8: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
- 800facc: 2b01 cmp r3, #1
- 800face: d101 bne.n 800fad4 <HAL_TIM_ConfigClockSource+0x1c>
- 800fad0: 2302 movs r3, #2
- 800fad2: e0dc b.n 800fc8e <HAL_TIM_ConfigClockSource+0x1d6>
- 800fad4: 687b ldr r3, [r7, #4]
- 800fad6: 2201 movs r2, #1
- 800fad8: f883 203c strb.w r2, [r3, #60] @ 0x3c
- htim->State = HAL_TIM_STATE_BUSY;
- 800fadc: 687b ldr r3, [r7, #4]
- 800fade: 2202 movs r2, #2
- 800fae0: f883 203d strb.w r2, [r3, #61] @ 0x3d
- /* Check the parameters */
- assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
- /* Reset the SMS, TS, ECE, ETPS and ETRF bits */
- tmpsmcr = htim->Instance->SMCR;
- 800fae4: 687b ldr r3, [r7, #4]
- 800fae6: 681b ldr r3, [r3, #0]
- 800fae8: 689b ldr r3, [r3, #8]
- 800faea: 60bb str r3, [r7, #8]
- tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
- 800faec: 68ba ldr r2, [r7, #8]
- 800faee: 4b6a ldr r3, [pc, #424] @ (800fc98 <HAL_TIM_ConfigClockSource+0x1e0>)
- 800faf0: 4013 ands r3, r2
- 800faf2: 60bb str r3, [r7, #8]
- tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
- 800faf4: 68bb ldr r3, [r7, #8]
- 800faf6: f423 437f bic.w r3, r3, #65280 @ 0xff00
- 800fafa: 60bb str r3, [r7, #8]
- htim->Instance->SMCR = tmpsmcr;
- 800fafc: 687b ldr r3, [r7, #4]
- 800fafe: 681b ldr r3, [r3, #0]
- 800fb00: 68ba ldr r2, [r7, #8]
- 800fb02: 609a str r2, [r3, #8]
- switch (sClockSourceConfig->ClockSource)
- 800fb04: 683b ldr r3, [r7, #0]
- 800fb06: 681b ldr r3, [r3, #0]
- 800fb08: 4a64 ldr r2, [pc, #400] @ (800fc9c <HAL_TIM_ConfigClockSource+0x1e4>)
- 800fb0a: 4293 cmp r3, r2
- 800fb0c: f000 80a9 beq.w 800fc62 <HAL_TIM_ConfigClockSource+0x1aa>
- 800fb10: 4a62 ldr r2, [pc, #392] @ (800fc9c <HAL_TIM_ConfigClockSource+0x1e4>)
- 800fb12: 4293 cmp r3, r2
- 800fb14: f200 80ae bhi.w 800fc74 <HAL_TIM_ConfigClockSource+0x1bc>
- 800fb18: 4a61 ldr r2, [pc, #388] @ (800fca0 <HAL_TIM_ConfigClockSource+0x1e8>)
- 800fb1a: 4293 cmp r3, r2
- 800fb1c: f000 80a1 beq.w 800fc62 <HAL_TIM_ConfigClockSource+0x1aa>
- 800fb20: 4a5f ldr r2, [pc, #380] @ (800fca0 <HAL_TIM_ConfigClockSource+0x1e8>)
- 800fb22: 4293 cmp r3, r2
- 800fb24: f200 80a6 bhi.w 800fc74 <HAL_TIM_ConfigClockSource+0x1bc>
- 800fb28: 4a5e ldr r2, [pc, #376] @ (800fca4 <HAL_TIM_ConfigClockSource+0x1ec>)
- 800fb2a: 4293 cmp r3, r2
- 800fb2c: f000 8099 beq.w 800fc62 <HAL_TIM_ConfigClockSource+0x1aa>
- 800fb30: 4a5c ldr r2, [pc, #368] @ (800fca4 <HAL_TIM_ConfigClockSource+0x1ec>)
- 800fb32: 4293 cmp r3, r2
- 800fb34: f200 809e bhi.w 800fc74 <HAL_TIM_ConfigClockSource+0x1bc>
- 800fb38: f1b3 1f10 cmp.w r3, #1048592 @ 0x100010
- 800fb3c: f000 8091 beq.w 800fc62 <HAL_TIM_ConfigClockSource+0x1aa>
- 800fb40: f1b3 1f10 cmp.w r3, #1048592 @ 0x100010
- 800fb44: f200 8096 bhi.w 800fc74 <HAL_TIM_ConfigClockSource+0x1bc>
- 800fb48: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
- 800fb4c: f000 8089 beq.w 800fc62 <HAL_TIM_ConfigClockSource+0x1aa>
- 800fb50: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
- 800fb54: f200 808e bhi.w 800fc74 <HAL_TIM_ConfigClockSource+0x1bc>
- 800fb58: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
- 800fb5c: d03e beq.n 800fbdc <HAL_TIM_ConfigClockSource+0x124>
- 800fb5e: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
- 800fb62: f200 8087 bhi.w 800fc74 <HAL_TIM_ConfigClockSource+0x1bc>
- 800fb66: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 800fb6a: f000 8086 beq.w 800fc7a <HAL_TIM_ConfigClockSource+0x1c2>
- 800fb6e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 800fb72: d87f bhi.n 800fc74 <HAL_TIM_ConfigClockSource+0x1bc>
- 800fb74: 2b70 cmp r3, #112 @ 0x70
- 800fb76: d01a beq.n 800fbae <HAL_TIM_ConfigClockSource+0xf6>
- 800fb78: 2b70 cmp r3, #112 @ 0x70
- 800fb7a: d87b bhi.n 800fc74 <HAL_TIM_ConfigClockSource+0x1bc>
- 800fb7c: 2b60 cmp r3, #96 @ 0x60
- 800fb7e: d050 beq.n 800fc22 <HAL_TIM_ConfigClockSource+0x16a>
- 800fb80: 2b60 cmp r3, #96 @ 0x60
- 800fb82: d877 bhi.n 800fc74 <HAL_TIM_ConfigClockSource+0x1bc>
- 800fb84: 2b50 cmp r3, #80 @ 0x50
- 800fb86: d03c beq.n 800fc02 <HAL_TIM_ConfigClockSource+0x14a>
- 800fb88: 2b50 cmp r3, #80 @ 0x50
- 800fb8a: d873 bhi.n 800fc74 <HAL_TIM_ConfigClockSource+0x1bc>
- 800fb8c: 2b40 cmp r3, #64 @ 0x40
- 800fb8e: d058 beq.n 800fc42 <HAL_TIM_ConfigClockSource+0x18a>
- 800fb90: 2b40 cmp r3, #64 @ 0x40
- 800fb92: d86f bhi.n 800fc74 <HAL_TIM_ConfigClockSource+0x1bc>
- 800fb94: 2b30 cmp r3, #48 @ 0x30
- 800fb96: d064 beq.n 800fc62 <HAL_TIM_ConfigClockSource+0x1aa>
- 800fb98: 2b30 cmp r3, #48 @ 0x30
- 800fb9a: d86b bhi.n 800fc74 <HAL_TIM_ConfigClockSource+0x1bc>
- 800fb9c: 2b20 cmp r3, #32
- 800fb9e: d060 beq.n 800fc62 <HAL_TIM_ConfigClockSource+0x1aa>
- 800fba0: 2b20 cmp r3, #32
- 800fba2: d867 bhi.n 800fc74 <HAL_TIM_ConfigClockSource+0x1bc>
- 800fba4: 2b00 cmp r3, #0
- 800fba6: d05c beq.n 800fc62 <HAL_TIM_ConfigClockSource+0x1aa>
- 800fba8: 2b10 cmp r3, #16
- 800fbaa: d05a beq.n 800fc62 <HAL_TIM_ConfigClockSource+0x1aa>
- 800fbac: e062 b.n 800fc74 <HAL_TIM_ConfigClockSource+0x1bc>
- assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
- assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
- assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
- /* Configure the ETR Clock source */
- TIM_ETR_SetConfig(htim->Instance,
- 800fbae: 687b ldr r3, [r7, #4]
- 800fbb0: 6818 ldr r0, [r3, #0]
- sClockSourceConfig->ClockPrescaler,
- 800fbb2: 683b ldr r3, [r7, #0]
- 800fbb4: 6899 ldr r1, [r3, #8]
- sClockSourceConfig->ClockPolarity,
- 800fbb6: 683b ldr r3, [r7, #0]
- 800fbb8: 685a ldr r2, [r3, #4]
- sClockSourceConfig->ClockFilter);
- 800fbba: 683b ldr r3, [r7, #0]
- 800fbbc: 68db ldr r3, [r3, #12]
- TIM_ETR_SetConfig(htim->Instance,
- 800fbbe: f000 fe33 bl 8010828 <TIM_ETR_SetConfig>
- /* Select the External clock mode1 and the ETRF trigger */
- tmpsmcr = htim->Instance->SMCR;
- 800fbc2: 687b ldr r3, [r7, #4]
- 800fbc4: 681b ldr r3, [r3, #0]
- 800fbc6: 689b ldr r3, [r3, #8]
- 800fbc8: 60bb str r3, [r7, #8]
- tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
- 800fbca: 68bb ldr r3, [r7, #8]
- 800fbcc: f043 0377 orr.w r3, r3, #119 @ 0x77
- 800fbd0: 60bb str r3, [r7, #8]
- /* Write to TIMx SMCR */
- htim->Instance->SMCR = tmpsmcr;
- 800fbd2: 687b ldr r3, [r7, #4]
- 800fbd4: 681b ldr r3, [r3, #0]
- 800fbd6: 68ba ldr r2, [r7, #8]
- 800fbd8: 609a str r2, [r3, #8]
- break;
- 800fbda: e04f b.n 800fc7c <HAL_TIM_ConfigClockSource+0x1c4>
- assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
- assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
- assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
- /* Configure the ETR Clock source */
- TIM_ETR_SetConfig(htim->Instance,
- 800fbdc: 687b ldr r3, [r7, #4]
- 800fbde: 6818 ldr r0, [r3, #0]
- sClockSourceConfig->ClockPrescaler,
- 800fbe0: 683b ldr r3, [r7, #0]
- 800fbe2: 6899 ldr r1, [r3, #8]
- sClockSourceConfig->ClockPolarity,
- 800fbe4: 683b ldr r3, [r7, #0]
- 800fbe6: 685a ldr r2, [r3, #4]
- sClockSourceConfig->ClockFilter);
- 800fbe8: 683b ldr r3, [r7, #0]
- 800fbea: 68db ldr r3, [r3, #12]
- TIM_ETR_SetConfig(htim->Instance,
- 800fbec: f000 fe1c bl 8010828 <TIM_ETR_SetConfig>
- /* Enable the External clock mode2 */
- htim->Instance->SMCR |= TIM_SMCR_ECE;
- 800fbf0: 687b ldr r3, [r7, #4]
- 800fbf2: 681b ldr r3, [r3, #0]
- 800fbf4: 689a ldr r2, [r3, #8]
- 800fbf6: 687b ldr r3, [r7, #4]
- 800fbf8: 681b ldr r3, [r3, #0]
- 800fbfa: f442 4280 orr.w r2, r2, #16384 @ 0x4000
- 800fbfe: 609a str r2, [r3, #8]
- break;
- 800fc00: e03c b.n 800fc7c <HAL_TIM_ConfigClockSource+0x1c4>
- /* Check TI1 input conditioning related parameters */
- assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
- assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
- TIM_TI1_ConfigInputStage(htim->Instance,
- 800fc02: 687b ldr r3, [r7, #4]
- 800fc04: 6818 ldr r0, [r3, #0]
- sClockSourceConfig->ClockPolarity,
- 800fc06: 683b ldr r3, [r7, #0]
- 800fc08: 6859 ldr r1, [r3, #4]
- sClockSourceConfig->ClockFilter);
- 800fc0a: 683b ldr r3, [r7, #0]
- 800fc0c: 68db ldr r3, [r3, #12]
- TIM_TI1_ConfigInputStage(htim->Instance,
- 800fc0e: 461a mov r2, r3
- 800fc10: f000 fcd6 bl 80105c0 <TIM_TI1_ConfigInputStage>
- TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
- 800fc14: 687b ldr r3, [r7, #4]
- 800fc16: 681b ldr r3, [r3, #0]
- 800fc18: 2150 movs r1, #80 @ 0x50
- 800fc1a: 4618 mov r0, r3
- 800fc1c: f000 fde6 bl 80107ec <TIM_ITRx_SetConfig>
- break;
- 800fc20: e02c b.n 800fc7c <HAL_TIM_ConfigClockSource+0x1c4>
- /* Check TI2 input conditioning related parameters */
- assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
- assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
- TIM_TI2_ConfigInputStage(htim->Instance,
- 800fc22: 687b ldr r3, [r7, #4]
- 800fc24: 6818 ldr r0, [r3, #0]
- sClockSourceConfig->ClockPolarity,
- 800fc26: 683b ldr r3, [r7, #0]
- 800fc28: 6859 ldr r1, [r3, #4]
- sClockSourceConfig->ClockFilter);
- 800fc2a: 683b ldr r3, [r7, #0]
- 800fc2c: 68db ldr r3, [r3, #12]
- TIM_TI2_ConfigInputStage(htim->Instance,
- 800fc2e: 461a mov r2, r3
- 800fc30: f000 fd32 bl 8010698 <TIM_TI2_ConfigInputStage>
- TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
- 800fc34: 687b ldr r3, [r7, #4]
- 800fc36: 681b ldr r3, [r3, #0]
- 800fc38: 2160 movs r1, #96 @ 0x60
- 800fc3a: 4618 mov r0, r3
- 800fc3c: f000 fdd6 bl 80107ec <TIM_ITRx_SetConfig>
- break;
- 800fc40: e01c b.n 800fc7c <HAL_TIM_ConfigClockSource+0x1c4>
- /* Check TI1 input conditioning related parameters */
- assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
- assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
- TIM_TI1_ConfigInputStage(htim->Instance,
- 800fc42: 687b ldr r3, [r7, #4]
- 800fc44: 6818 ldr r0, [r3, #0]
- sClockSourceConfig->ClockPolarity,
- 800fc46: 683b ldr r3, [r7, #0]
- 800fc48: 6859 ldr r1, [r3, #4]
- sClockSourceConfig->ClockFilter);
- 800fc4a: 683b ldr r3, [r7, #0]
- 800fc4c: 68db ldr r3, [r3, #12]
- TIM_TI1_ConfigInputStage(htim->Instance,
- 800fc4e: 461a mov r2, r3
- 800fc50: f000 fcb6 bl 80105c0 <TIM_TI1_ConfigInputStage>
- TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
- 800fc54: 687b ldr r3, [r7, #4]
- 800fc56: 681b ldr r3, [r3, #0]
- 800fc58: 2140 movs r1, #64 @ 0x40
- 800fc5a: 4618 mov r0, r3
- 800fc5c: f000 fdc6 bl 80107ec <TIM_ITRx_SetConfig>
- break;
- 800fc60: e00c b.n 800fc7c <HAL_TIM_ConfigClockSource+0x1c4>
- case TIM_CLOCKSOURCE_ITR8:
- {
- /* Check whether or not the timer instance supports internal trigger input */
- assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
- TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
- 800fc62: 687b ldr r3, [r7, #4]
- 800fc64: 681a ldr r2, [r3, #0]
- 800fc66: 683b ldr r3, [r7, #0]
- 800fc68: 681b ldr r3, [r3, #0]
- 800fc6a: 4619 mov r1, r3
- 800fc6c: 4610 mov r0, r2
- 800fc6e: f000 fdbd bl 80107ec <TIM_ITRx_SetConfig>
- break;
- 800fc72: e003 b.n 800fc7c <HAL_TIM_ConfigClockSource+0x1c4>
- }
- default:
- status = HAL_ERROR;
- 800fc74: 2301 movs r3, #1
- 800fc76: 73fb strb r3, [r7, #15]
- break;
- 800fc78: e000 b.n 800fc7c <HAL_TIM_ConfigClockSource+0x1c4>
- break;
- 800fc7a: bf00 nop
- }
- htim->State = HAL_TIM_STATE_READY;
- 800fc7c: 687b ldr r3, [r7, #4]
- 800fc7e: 2201 movs r2, #1
- 800fc80: f883 203d strb.w r2, [r3, #61] @ 0x3d
- __HAL_UNLOCK(htim);
- 800fc84: 687b ldr r3, [r7, #4]
- 800fc86: 2200 movs r2, #0
- 800fc88: f883 203c strb.w r2, [r3, #60] @ 0x3c
- return status;
- 800fc8c: 7bfb ldrb r3, [r7, #15]
- }
- 800fc8e: 4618 mov r0, r3
- 800fc90: 3710 adds r7, #16
- 800fc92: 46bd mov sp, r7
- 800fc94: bd80 pop {r7, pc}
- 800fc96: bf00 nop
- 800fc98: ffceff88 .word 0xffceff88
- 800fc9c: 00100040 .word 0x00100040
- 800fca0: 00100030 .word 0x00100030
- 800fca4: 00100020 .word 0x00100020
- 0800fca8 <HAL_TIM_ReadCapturedValue>:
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval Captured value
- */
- uint32_t HAL_TIM_ReadCapturedValue(const TIM_HandleTypeDef *htim, uint32_t Channel)
- {
- 800fca8: b480 push {r7}
- 800fcaa: b085 sub sp, #20
- 800fcac: af00 add r7, sp, #0
- 800fcae: 6078 str r0, [r7, #4]
- 800fcb0: 6039 str r1, [r7, #0]
- uint32_t tmpreg = 0U;
- 800fcb2: 2300 movs r3, #0
- 800fcb4: 60fb str r3, [r7, #12]
- switch (Channel)
- 800fcb6: 683b ldr r3, [r7, #0]
- 800fcb8: 2b0c cmp r3, #12
- 800fcba: d831 bhi.n 800fd20 <HAL_TIM_ReadCapturedValue+0x78>
- 800fcbc: a201 add r2, pc, #4 @ (adr r2, 800fcc4 <HAL_TIM_ReadCapturedValue+0x1c>)
- 800fcbe: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800fcc2: bf00 nop
- 800fcc4: 0800fcf9 .word 0x0800fcf9
- 800fcc8: 0800fd21 .word 0x0800fd21
- 800fccc: 0800fd21 .word 0x0800fd21
- 800fcd0: 0800fd21 .word 0x0800fd21
- 800fcd4: 0800fd03 .word 0x0800fd03
- 800fcd8: 0800fd21 .word 0x0800fd21
- 800fcdc: 0800fd21 .word 0x0800fd21
- 800fce0: 0800fd21 .word 0x0800fd21
- 800fce4: 0800fd0d .word 0x0800fd0d
- 800fce8: 0800fd21 .word 0x0800fd21
- 800fcec: 0800fd21 .word 0x0800fd21
- 800fcf0: 0800fd21 .word 0x0800fd21
- 800fcf4: 0800fd17 .word 0x0800fd17
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
- /* Return the capture 1 value */
- tmpreg = htim->Instance->CCR1;
- 800fcf8: 687b ldr r3, [r7, #4]
- 800fcfa: 681b ldr r3, [r3, #0]
- 800fcfc: 6b5b ldr r3, [r3, #52] @ 0x34
- 800fcfe: 60fb str r3, [r7, #12]
- break;
- 800fd00: e00f b.n 800fd22 <HAL_TIM_ReadCapturedValue+0x7a>
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
- /* Return the capture 2 value */
- tmpreg = htim->Instance->CCR2;
- 800fd02: 687b ldr r3, [r7, #4]
- 800fd04: 681b ldr r3, [r3, #0]
- 800fd06: 6b9b ldr r3, [r3, #56] @ 0x38
- 800fd08: 60fb str r3, [r7, #12]
- break;
- 800fd0a: e00a b.n 800fd22 <HAL_TIM_ReadCapturedValue+0x7a>
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
- /* Return the capture 3 value */
- tmpreg = htim->Instance->CCR3;
- 800fd0c: 687b ldr r3, [r7, #4]
- 800fd0e: 681b ldr r3, [r3, #0]
- 800fd10: 6bdb ldr r3, [r3, #60] @ 0x3c
- 800fd12: 60fb str r3, [r7, #12]
- break;
- 800fd14: e005 b.n 800fd22 <HAL_TIM_ReadCapturedValue+0x7a>
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
- /* Return the capture 4 value */
- tmpreg = htim->Instance->CCR4;
- 800fd16: 687b ldr r3, [r7, #4]
- 800fd18: 681b ldr r3, [r3, #0]
- 800fd1a: 6c1b ldr r3, [r3, #64] @ 0x40
- 800fd1c: 60fb str r3, [r7, #12]
- break;
- 800fd1e: e000 b.n 800fd22 <HAL_TIM_ReadCapturedValue+0x7a>
- }
- default:
- break;
- 800fd20: bf00 nop
- }
- return tmpreg;
- 800fd22: 68fb ldr r3, [r7, #12]
- }
- 800fd24: 4618 mov r0, r3
- 800fd26: 3714 adds r7, #20
- 800fd28: 46bd mov sp, r7
- 800fd2a: f85d 7b04 ldr.w r7, [sp], #4
- 800fd2e: 4770 bx lr
- 0800fd30 <HAL_TIM_OC_DelayElapsedCallback>:
- * @brief Output Compare callback in non-blocking mode
- * @param htim TIM OC handle
- * @retval None
- */
- __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
- {
- 800fd30: b480 push {r7}
- 800fd32: b083 sub sp, #12
- 800fd34: af00 add r7, sp, #0
- 800fd36: 6078 str r0, [r7, #4]
- UNUSED(htim);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
- */
- }
- 800fd38: bf00 nop
- 800fd3a: 370c adds r7, #12
- 800fd3c: 46bd mov sp, r7
- 800fd3e: f85d 7b04 ldr.w r7, [sp], #4
- 800fd42: 4770 bx lr
- 0800fd44 <HAL_TIM_PWM_PulseFinishedCallback>:
- * @brief PWM Pulse finished callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
- __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
- {
- 800fd44: b480 push {r7}
- 800fd46: b083 sub sp, #12
- 800fd48: af00 add r7, sp, #0
- 800fd4a: 6078 str r0, [r7, #4]
- UNUSED(htim);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
- */
- }
- 800fd4c: bf00 nop
- 800fd4e: 370c adds r7, #12
- 800fd50: 46bd mov sp, r7
- 800fd52: f85d 7b04 ldr.w r7, [sp], #4
- 800fd56: 4770 bx lr
- 0800fd58 <HAL_TIM_TriggerCallback>:
- * @brief Hall Trigger detection callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
- __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
- {
- 800fd58: b480 push {r7}
- 800fd5a: b083 sub sp, #12
- 800fd5c: af00 add r7, sp, #0
- 800fd5e: 6078 str r0, [r7, #4]
- UNUSED(htim);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_TriggerCallback could be implemented in the user file
- */
- }
- 800fd60: bf00 nop
- 800fd62: 370c adds r7, #12
- 800fd64: 46bd mov sp, r7
- 800fd66: f85d 7b04 ldr.w r7, [sp], #4
- 800fd6a: 4770 bx lr
- 0800fd6c <HAL_TIM_GetChannelState>:
- * @arg TIM_CHANNEL_5: TIM Channel 5
- * @arg TIM_CHANNEL_6: TIM Channel 6
- * @retval TIM Channel state
- */
- HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel)
- {
- 800fd6c: b480 push {r7}
- 800fd6e: b085 sub sp, #20
- 800fd70: af00 add r7, sp, #0
- 800fd72: 6078 str r0, [r7, #4]
- 800fd74: 6039 str r1, [r7, #0]
- HAL_TIM_ChannelStateTypeDef channel_state;
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
- channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
- 800fd76: 683b ldr r3, [r7, #0]
- 800fd78: 2b00 cmp r3, #0
- 800fd7a: d104 bne.n 800fd86 <HAL_TIM_GetChannelState+0x1a>
- 800fd7c: 687b ldr r3, [r7, #4]
- 800fd7e: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
- 800fd82: b2db uxtb r3, r3
- 800fd84: e023 b.n 800fdce <HAL_TIM_GetChannelState+0x62>
- 800fd86: 683b ldr r3, [r7, #0]
- 800fd88: 2b04 cmp r3, #4
- 800fd8a: d104 bne.n 800fd96 <HAL_TIM_GetChannelState+0x2a>
- 800fd8c: 687b ldr r3, [r7, #4]
- 800fd8e: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
- 800fd92: b2db uxtb r3, r3
- 800fd94: e01b b.n 800fdce <HAL_TIM_GetChannelState+0x62>
- 800fd96: 683b ldr r3, [r7, #0]
- 800fd98: 2b08 cmp r3, #8
- 800fd9a: d104 bne.n 800fda6 <HAL_TIM_GetChannelState+0x3a>
- 800fd9c: 687b ldr r3, [r7, #4]
- 800fd9e: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
- 800fda2: b2db uxtb r3, r3
- 800fda4: e013 b.n 800fdce <HAL_TIM_GetChannelState+0x62>
- 800fda6: 683b ldr r3, [r7, #0]
- 800fda8: 2b0c cmp r3, #12
- 800fdaa: d104 bne.n 800fdb6 <HAL_TIM_GetChannelState+0x4a>
- 800fdac: 687b ldr r3, [r7, #4]
- 800fdae: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
- 800fdb2: b2db uxtb r3, r3
- 800fdb4: e00b b.n 800fdce <HAL_TIM_GetChannelState+0x62>
- 800fdb6: 683b ldr r3, [r7, #0]
- 800fdb8: 2b10 cmp r3, #16
- 800fdba: d104 bne.n 800fdc6 <HAL_TIM_GetChannelState+0x5a>
- 800fdbc: 687b ldr r3, [r7, #4]
- 800fdbe: f893 3042 ldrb.w r3, [r3, #66] @ 0x42
- 800fdc2: b2db uxtb r3, r3
- 800fdc4: e003 b.n 800fdce <HAL_TIM_GetChannelState+0x62>
- 800fdc6: 687b ldr r3, [r7, #4]
- 800fdc8: f893 3043 ldrb.w r3, [r3, #67] @ 0x43
- 800fdcc: b2db uxtb r3, r3
- 800fdce: 73fb strb r3, [r7, #15]
- return channel_state;
- 800fdd0: 7bfb ldrb r3, [r7, #15]
- }
- 800fdd2: 4618 mov r0, r3
- 800fdd4: 3714 adds r7, #20
- 800fdd6: 46bd mov sp, r7
- 800fdd8: f85d 7b04 ldr.w r7, [sp], #4
- 800fddc: 4770 bx lr
- ...
- 0800fde0 <TIM_Base_SetConfig>:
- * @param TIMx TIM peripheral
- * @param Structure TIM Base configuration structure
- * @retval None
- */
- void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
- {
- 800fde0: b480 push {r7}
- 800fde2: b085 sub sp, #20
- 800fde4: af00 add r7, sp, #0
- 800fde6: 6078 str r0, [r7, #4]
- 800fde8: 6039 str r1, [r7, #0]
- uint32_t tmpcr1;
- tmpcr1 = TIMx->CR1;
- 800fdea: 687b ldr r3, [r7, #4]
- 800fdec: 681b ldr r3, [r3, #0]
- 800fdee: 60fb str r3, [r7, #12]
- /* Set TIM Time Base Unit parameters ---------------------------------------*/
- if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
- 800fdf0: 687b ldr r3, [r7, #4]
- 800fdf2: 4a46 ldr r2, [pc, #280] @ (800ff0c <TIM_Base_SetConfig+0x12c>)
- 800fdf4: 4293 cmp r3, r2
- 800fdf6: d013 beq.n 800fe20 <TIM_Base_SetConfig+0x40>
- 800fdf8: 687b ldr r3, [r7, #4]
- 800fdfa: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 800fdfe: d00f beq.n 800fe20 <TIM_Base_SetConfig+0x40>
- 800fe00: 687b ldr r3, [r7, #4]
- 800fe02: 4a43 ldr r2, [pc, #268] @ (800ff10 <TIM_Base_SetConfig+0x130>)
- 800fe04: 4293 cmp r3, r2
- 800fe06: d00b beq.n 800fe20 <TIM_Base_SetConfig+0x40>
- 800fe08: 687b ldr r3, [r7, #4]
- 800fe0a: 4a42 ldr r2, [pc, #264] @ (800ff14 <TIM_Base_SetConfig+0x134>)
- 800fe0c: 4293 cmp r3, r2
- 800fe0e: d007 beq.n 800fe20 <TIM_Base_SetConfig+0x40>
- 800fe10: 687b ldr r3, [r7, #4]
- 800fe12: 4a41 ldr r2, [pc, #260] @ (800ff18 <TIM_Base_SetConfig+0x138>)
- 800fe14: 4293 cmp r3, r2
- 800fe16: d003 beq.n 800fe20 <TIM_Base_SetConfig+0x40>
- 800fe18: 687b ldr r3, [r7, #4]
- 800fe1a: 4a40 ldr r2, [pc, #256] @ (800ff1c <TIM_Base_SetConfig+0x13c>)
- 800fe1c: 4293 cmp r3, r2
- 800fe1e: d108 bne.n 800fe32 <TIM_Base_SetConfig+0x52>
- {
- /* Select the Counter Mode */
- tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
- 800fe20: 68fb ldr r3, [r7, #12]
- 800fe22: f023 0370 bic.w r3, r3, #112 @ 0x70
- 800fe26: 60fb str r3, [r7, #12]
- tmpcr1 |= Structure->CounterMode;
- 800fe28: 683b ldr r3, [r7, #0]
- 800fe2a: 685b ldr r3, [r3, #4]
- 800fe2c: 68fa ldr r2, [r7, #12]
- 800fe2e: 4313 orrs r3, r2
- 800fe30: 60fb str r3, [r7, #12]
- }
- if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
- 800fe32: 687b ldr r3, [r7, #4]
- 800fe34: 4a35 ldr r2, [pc, #212] @ (800ff0c <TIM_Base_SetConfig+0x12c>)
- 800fe36: 4293 cmp r3, r2
- 800fe38: d01f beq.n 800fe7a <TIM_Base_SetConfig+0x9a>
- 800fe3a: 687b ldr r3, [r7, #4]
- 800fe3c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 800fe40: d01b beq.n 800fe7a <TIM_Base_SetConfig+0x9a>
- 800fe42: 687b ldr r3, [r7, #4]
- 800fe44: 4a32 ldr r2, [pc, #200] @ (800ff10 <TIM_Base_SetConfig+0x130>)
- 800fe46: 4293 cmp r3, r2
- 800fe48: d017 beq.n 800fe7a <TIM_Base_SetConfig+0x9a>
- 800fe4a: 687b ldr r3, [r7, #4]
- 800fe4c: 4a31 ldr r2, [pc, #196] @ (800ff14 <TIM_Base_SetConfig+0x134>)
- 800fe4e: 4293 cmp r3, r2
- 800fe50: d013 beq.n 800fe7a <TIM_Base_SetConfig+0x9a>
- 800fe52: 687b ldr r3, [r7, #4]
- 800fe54: 4a30 ldr r2, [pc, #192] @ (800ff18 <TIM_Base_SetConfig+0x138>)
- 800fe56: 4293 cmp r3, r2
- 800fe58: d00f beq.n 800fe7a <TIM_Base_SetConfig+0x9a>
- 800fe5a: 687b ldr r3, [r7, #4]
- 800fe5c: 4a2f ldr r2, [pc, #188] @ (800ff1c <TIM_Base_SetConfig+0x13c>)
- 800fe5e: 4293 cmp r3, r2
- 800fe60: d00b beq.n 800fe7a <TIM_Base_SetConfig+0x9a>
- 800fe62: 687b ldr r3, [r7, #4]
- 800fe64: 4a2e ldr r2, [pc, #184] @ (800ff20 <TIM_Base_SetConfig+0x140>)
- 800fe66: 4293 cmp r3, r2
- 800fe68: d007 beq.n 800fe7a <TIM_Base_SetConfig+0x9a>
- 800fe6a: 687b ldr r3, [r7, #4]
- 800fe6c: 4a2d ldr r2, [pc, #180] @ (800ff24 <TIM_Base_SetConfig+0x144>)
- 800fe6e: 4293 cmp r3, r2
- 800fe70: d003 beq.n 800fe7a <TIM_Base_SetConfig+0x9a>
- 800fe72: 687b ldr r3, [r7, #4]
- 800fe74: 4a2c ldr r2, [pc, #176] @ (800ff28 <TIM_Base_SetConfig+0x148>)
- 800fe76: 4293 cmp r3, r2
- 800fe78: d108 bne.n 800fe8c <TIM_Base_SetConfig+0xac>
- {
- /* Set the clock division */
- tmpcr1 &= ~TIM_CR1_CKD;
- 800fe7a: 68fb ldr r3, [r7, #12]
- 800fe7c: f423 7340 bic.w r3, r3, #768 @ 0x300
- 800fe80: 60fb str r3, [r7, #12]
- tmpcr1 |= (uint32_t)Structure->ClockDivision;
- 800fe82: 683b ldr r3, [r7, #0]
- 800fe84: 68db ldr r3, [r3, #12]
- 800fe86: 68fa ldr r2, [r7, #12]
- 800fe88: 4313 orrs r3, r2
- 800fe8a: 60fb str r3, [r7, #12]
- }
- /* Set the auto-reload preload */
- MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
- 800fe8c: 68fb ldr r3, [r7, #12]
- 800fe8e: f023 0280 bic.w r2, r3, #128 @ 0x80
- 800fe92: 683b ldr r3, [r7, #0]
- 800fe94: 695b ldr r3, [r3, #20]
- 800fe96: 4313 orrs r3, r2
- 800fe98: 60fb str r3, [r7, #12]
- TIMx->CR1 = tmpcr1;
- 800fe9a: 687b ldr r3, [r7, #4]
- 800fe9c: 68fa ldr r2, [r7, #12]
- 800fe9e: 601a str r2, [r3, #0]
- /* Set the Autoreload value */
- TIMx->ARR = (uint32_t)Structure->Period ;
- 800fea0: 683b ldr r3, [r7, #0]
- 800fea2: 689a ldr r2, [r3, #8]
- 800fea4: 687b ldr r3, [r7, #4]
- 800fea6: 62da str r2, [r3, #44] @ 0x2c
- /* Set the Prescaler value */
- TIMx->PSC = Structure->Prescaler;
- 800fea8: 683b ldr r3, [r7, #0]
- 800feaa: 681a ldr r2, [r3, #0]
- 800feac: 687b ldr r3, [r7, #4]
- 800feae: 629a str r2, [r3, #40] @ 0x28
- if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
- 800feb0: 687b ldr r3, [r7, #4]
- 800feb2: 4a16 ldr r2, [pc, #88] @ (800ff0c <TIM_Base_SetConfig+0x12c>)
- 800feb4: 4293 cmp r3, r2
- 800feb6: d00f beq.n 800fed8 <TIM_Base_SetConfig+0xf8>
- 800feb8: 687b ldr r3, [r7, #4]
- 800feba: 4a18 ldr r2, [pc, #96] @ (800ff1c <TIM_Base_SetConfig+0x13c>)
- 800febc: 4293 cmp r3, r2
- 800febe: d00b beq.n 800fed8 <TIM_Base_SetConfig+0xf8>
- 800fec0: 687b ldr r3, [r7, #4]
- 800fec2: 4a17 ldr r2, [pc, #92] @ (800ff20 <TIM_Base_SetConfig+0x140>)
- 800fec4: 4293 cmp r3, r2
- 800fec6: d007 beq.n 800fed8 <TIM_Base_SetConfig+0xf8>
- 800fec8: 687b ldr r3, [r7, #4]
- 800feca: 4a16 ldr r2, [pc, #88] @ (800ff24 <TIM_Base_SetConfig+0x144>)
- 800fecc: 4293 cmp r3, r2
- 800fece: d003 beq.n 800fed8 <TIM_Base_SetConfig+0xf8>
- 800fed0: 687b ldr r3, [r7, #4]
- 800fed2: 4a15 ldr r2, [pc, #84] @ (800ff28 <TIM_Base_SetConfig+0x148>)
- 800fed4: 4293 cmp r3, r2
- 800fed6: d103 bne.n 800fee0 <TIM_Base_SetConfig+0x100>
- {
- /* Set the Repetition Counter value */
- TIMx->RCR = Structure->RepetitionCounter;
- 800fed8: 683b ldr r3, [r7, #0]
- 800feda: 691a ldr r2, [r3, #16]
- 800fedc: 687b ldr r3, [r7, #4]
- 800fede: 631a str r2, [r3, #48] @ 0x30
- }
- /* Generate an update event to reload the Prescaler
- and the repetition counter (only for advanced timer) value immediately */
- TIMx->EGR = TIM_EGR_UG;
- 800fee0: 687b ldr r3, [r7, #4]
- 800fee2: 2201 movs r2, #1
- 800fee4: 615a str r2, [r3, #20]
- /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
- if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
- 800fee6: 687b ldr r3, [r7, #4]
- 800fee8: 691b ldr r3, [r3, #16]
- 800feea: f003 0301 and.w r3, r3, #1
- 800feee: 2b01 cmp r3, #1
- 800fef0: d105 bne.n 800fefe <TIM_Base_SetConfig+0x11e>
- {
- /* Clear the update flag */
- CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
- 800fef2: 687b ldr r3, [r7, #4]
- 800fef4: 691b ldr r3, [r3, #16]
- 800fef6: f023 0201 bic.w r2, r3, #1
- 800fefa: 687b ldr r3, [r7, #4]
- 800fefc: 611a str r2, [r3, #16]
- }
- }
- 800fefe: bf00 nop
- 800ff00: 3714 adds r7, #20
- 800ff02: 46bd mov sp, r7
- 800ff04: f85d 7b04 ldr.w r7, [sp], #4
- 800ff08: 4770 bx lr
- 800ff0a: bf00 nop
- 800ff0c: 40010000 .word 0x40010000
- 800ff10: 40000400 .word 0x40000400
- 800ff14: 40000800 .word 0x40000800
- 800ff18: 40000c00 .word 0x40000c00
- 800ff1c: 40010400 .word 0x40010400
- 800ff20: 40014000 .word 0x40014000
- 800ff24: 40014400 .word 0x40014400
- 800ff28: 40014800 .word 0x40014800
- 0800ff2c <TIM_OC1_SetConfig>:
- * @param TIMx to select the TIM peripheral
- * @param OC_Config The output configuration structure
- * @retval None
- */
- static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
- {
- 800ff2c: b480 push {r7}
- 800ff2e: b087 sub sp, #28
- 800ff30: af00 add r7, sp, #0
- 800ff32: 6078 str r0, [r7, #4]
- 800ff34: 6039 str r1, [r7, #0]
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- 800ff36: 687b ldr r3, [r7, #4]
- 800ff38: 6a1b ldr r3, [r3, #32]
- 800ff3a: 617b str r3, [r7, #20]
- /* Disable the Channel 1: Reset the CC1E Bit */
- TIMx->CCER &= ~TIM_CCER_CC1E;
- 800ff3c: 687b ldr r3, [r7, #4]
- 800ff3e: 6a1b ldr r3, [r3, #32]
- 800ff40: f023 0201 bic.w r2, r3, #1
- 800ff44: 687b ldr r3, [r7, #4]
- 800ff46: 621a str r2, [r3, #32]
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
- 800ff48: 687b ldr r3, [r7, #4]
- 800ff4a: 685b ldr r3, [r3, #4]
- 800ff4c: 613b str r3, [r7, #16]
- /* Get the TIMx CCMR1 register value */
- tmpccmrx = TIMx->CCMR1;
- 800ff4e: 687b ldr r3, [r7, #4]
- 800ff50: 699b ldr r3, [r3, #24]
- 800ff52: 60fb str r3, [r7, #12]
- /* Reset the Output Compare Mode Bits */
- tmpccmrx &= ~TIM_CCMR1_OC1M;
- 800ff54: 68fa ldr r2, [r7, #12]
- 800ff56: 4b37 ldr r3, [pc, #220] @ (8010034 <TIM_OC1_SetConfig+0x108>)
- 800ff58: 4013 ands r3, r2
- 800ff5a: 60fb str r3, [r7, #12]
- tmpccmrx &= ~TIM_CCMR1_CC1S;
- 800ff5c: 68fb ldr r3, [r7, #12]
- 800ff5e: f023 0303 bic.w r3, r3, #3
- 800ff62: 60fb str r3, [r7, #12]
- /* Select the Output Compare Mode */
- tmpccmrx |= OC_Config->OCMode;
- 800ff64: 683b ldr r3, [r7, #0]
- 800ff66: 681b ldr r3, [r3, #0]
- 800ff68: 68fa ldr r2, [r7, #12]
- 800ff6a: 4313 orrs r3, r2
- 800ff6c: 60fb str r3, [r7, #12]
- /* Reset the Output Polarity level */
- tmpccer &= ~TIM_CCER_CC1P;
- 800ff6e: 697b ldr r3, [r7, #20]
- 800ff70: f023 0302 bic.w r3, r3, #2
- 800ff74: 617b str r3, [r7, #20]
- /* Set the Output Compare Polarity */
- tmpccer |= OC_Config->OCPolarity;
- 800ff76: 683b ldr r3, [r7, #0]
- 800ff78: 689b ldr r3, [r3, #8]
- 800ff7a: 697a ldr r2, [r7, #20]
- 800ff7c: 4313 orrs r3, r2
- 800ff7e: 617b str r3, [r7, #20]
- if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
- 800ff80: 687b ldr r3, [r7, #4]
- 800ff82: 4a2d ldr r2, [pc, #180] @ (8010038 <TIM_OC1_SetConfig+0x10c>)
- 800ff84: 4293 cmp r3, r2
- 800ff86: d00f beq.n 800ffa8 <TIM_OC1_SetConfig+0x7c>
- 800ff88: 687b ldr r3, [r7, #4]
- 800ff8a: 4a2c ldr r2, [pc, #176] @ (801003c <TIM_OC1_SetConfig+0x110>)
- 800ff8c: 4293 cmp r3, r2
- 800ff8e: d00b beq.n 800ffa8 <TIM_OC1_SetConfig+0x7c>
- 800ff90: 687b ldr r3, [r7, #4]
- 800ff92: 4a2b ldr r2, [pc, #172] @ (8010040 <TIM_OC1_SetConfig+0x114>)
- 800ff94: 4293 cmp r3, r2
- 800ff96: d007 beq.n 800ffa8 <TIM_OC1_SetConfig+0x7c>
- 800ff98: 687b ldr r3, [r7, #4]
- 800ff9a: 4a2a ldr r2, [pc, #168] @ (8010044 <TIM_OC1_SetConfig+0x118>)
- 800ff9c: 4293 cmp r3, r2
- 800ff9e: d003 beq.n 800ffa8 <TIM_OC1_SetConfig+0x7c>
- 800ffa0: 687b ldr r3, [r7, #4]
- 800ffa2: 4a29 ldr r2, [pc, #164] @ (8010048 <TIM_OC1_SetConfig+0x11c>)
- 800ffa4: 4293 cmp r3, r2
- 800ffa6: d10c bne.n 800ffc2 <TIM_OC1_SetConfig+0x96>
- {
- /* Check parameters */
- assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
- /* Reset the Output N Polarity level */
- tmpccer &= ~TIM_CCER_CC1NP;
- 800ffa8: 697b ldr r3, [r7, #20]
- 800ffaa: f023 0308 bic.w r3, r3, #8
- 800ffae: 617b str r3, [r7, #20]
- /* Set the Output N Polarity */
- tmpccer |= OC_Config->OCNPolarity;
- 800ffb0: 683b ldr r3, [r7, #0]
- 800ffb2: 68db ldr r3, [r3, #12]
- 800ffb4: 697a ldr r2, [r7, #20]
- 800ffb6: 4313 orrs r3, r2
- 800ffb8: 617b str r3, [r7, #20]
- /* Reset the Output N State */
- tmpccer &= ~TIM_CCER_CC1NE;
- 800ffba: 697b ldr r3, [r7, #20]
- 800ffbc: f023 0304 bic.w r3, r3, #4
- 800ffc0: 617b str r3, [r7, #20]
- }
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- 800ffc2: 687b ldr r3, [r7, #4]
- 800ffc4: 4a1c ldr r2, [pc, #112] @ (8010038 <TIM_OC1_SetConfig+0x10c>)
- 800ffc6: 4293 cmp r3, r2
- 800ffc8: d00f beq.n 800ffea <TIM_OC1_SetConfig+0xbe>
- 800ffca: 687b ldr r3, [r7, #4]
- 800ffcc: 4a1b ldr r2, [pc, #108] @ (801003c <TIM_OC1_SetConfig+0x110>)
- 800ffce: 4293 cmp r3, r2
- 800ffd0: d00b beq.n 800ffea <TIM_OC1_SetConfig+0xbe>
- 800ffd2: 687b ldr r3, [r7, #4]
- 800ffd4: 4a1a ldr r2, [pc, #104] @ (8010040 <TIM_OC1_SetConfig+0x114>)
- 800ffd6: 4293 cmp r3, r2
- 800ffd8: d007 beq.n 800ffea <TIM_OC1_SetConfig+0xbe>
- 800ffda: 687b ldr r3, [r7, #4]
- 800ffdc: 4a19 ldr r2, [pc, #100] @ (8010044 <TIM_OC1_SetConfig+0x118>)
- 800ffde: 4293 cmp r3, r2
- 800ffe0: d003 beq.n 800ffea <TIM_OC1_SetConfig+0xbe>
- 800ffe2: 687b ldr r3, [r7, #4]
- 800ffe4: 4a18 ldr r2, [pc, #96] @ (8010048 <TIM_OC1_SetConfig+0x11c>)
- 800ffe6: 4293 cmp r3, r2
- 800ffe8: d111 bne.n 801000e <TIM_OC1_SetConfig+0xe2>
- /* Check parameters */
- assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
- assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
- /* Reset the Output Compare and Output Compare N IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS1;
- 800ffea: 693b ldr r3, [r7, #16]
- 800ffec: f423 7380 bic.w r3, r3, #256 @ 0x100
- 800fff0: 613b str r3, [r7, #16]
- tmpcr2 &= ~TIM_CR2_OIS1N;
- 800fff2: 693b ldr r3, [r7, #16]
- 800fff4: f423 7300 bic.w r3, r3, #512 @ 0x200
- 800fff8: 613b str r3, [r7, #16]
- /* Set the Output Idle state */
- tmpcr2 |= OC_Config->OCIdleState;
- 800fffa: 683b ldr r3, [r7, #0]
- 800fffc: 695b ldr r3, [r3, #20]
- 800fffe: 693a ldr r2, [r7, #16]
- 8010000: 4313 orrs r3, r2
- 8010002: 613b str r3, [r7, #16]
- /* Set the Output N Idle state */
- tmpcr2 |= OC_Config->OCNIdleState;
- 8010004: 683b ldr r3, [r7, #0]
- 8010006: 699b ldr r3, [r3, #24]
- 8010008: 693a ldr r2, [r7, #16]
- 801000a: 4313 orrs r3, r2
- 801000c: 613b str r3, [r7, #16]
- }
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
- 801000e: 687b ldr r3, [r7, #4]
- 8010010: 693a ldr r2, [r7, #16]
- 8010012: 605a str r2, [r3, #4]
- /* Write to TIMx CCMR1 */
- TIMx->CCMR1 = tmpccmrx;
- 8010014: 687b ldr r3, [r7, #4]
- 8010016: 68fa ldr r2, [r7, #12]
- 8010018: 619a str r2, [r3, #24]
- /* Set the Capture Compare Register value */
- TIMx->CCR1 = OC_Config->Pulse;
- 801001a: 683b ldr r3, [r7, #0]
- 801001c: 685a ldr r2, [r3, #4]
- 801001e: 687b ldr r3, [r7, #4]
- 8010020: 635a str r2, [r3, #52] @ 0x34
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
- 8010022: 687b ldr r3, [r7, #4]
- 8010024: 697a ldr r2, [r7, #20]
- 8010026: 621a str r2, [r3, #32]
- }
- 8010028: bf00 nop
- 801002a: 371c adds r7, #28
- 801002c: 46bd mov sp, r7
- 801002e: f85d 7b04 ldr.w r7, [sp], #4
- 8010032: 4770 bx lr
- 8010034: fffeff8f .word 0xfffeff8f
- 8010038: 40010000 .word 0x40010000
- 801003c: 40010400 .word 0x40010400
- 8010040: 40014000 .word 0x40014000
- 8010044: 40014400 .word 0x40014400
- 8010048: 40014800 .word 0x40014800
- 0801004c <TIM_OC2_SetConfig>:
- * @param TIMx to select the TIM peripheral
- * @param OC_Config The output configuration structure
- * @retval None
- */
- void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
- {
- 801004c: b480 push {r7}
- 801004e: b087 sub sp, #28
- 8010050: af00 add r7, sp, #0
- 8010052: 6078 str r0, [r7, #4]
- 8010054: 6039 str r1, [r7, #0]
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- 8010056: 687b ldr r3, [r7, #4]
- 8010058: 6a1b ldr r3, [r3, #32]
- 801005a: 617b str r3, [r7, #20]
- /* Disable the Channel 2: Reset the CC2E Bit */
- TIMx->CCER &= ~TIM_CCER_CC2E;
- 801005c: 687b ldr r3, [r7, #4]
- 801005e: 6a1b ldr r3, [r3, #32]
- 8010060: f023 0210 bic.w r2, r3, #16
- 8010064: 687b ldr r3, [r7, #4]
- 8010066: 621a str r2, [r3, #32]
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
- 8010068: 687b ldr r3, [r7, #4]
- 801006a: 685b ldr r3, [r3, #4]
- 801006c: 613b str r3, [r7, #16]
- /* Get the TIMx CCMR1 register value */
- tmpccmrx = TIMx->CCMR1;
- 801006e: 687b ldr r3, [r7, #4]
- 8010070: 699b ldr r3, [r3, #24]
- 8010072: 60fb str r3, [r7, #12]
- /* Reset the Output Compare mode and Capture/Compare selection Bits */
- tmpccmrx &= ~TIM_CCMR1_OC2M;
- 8010074: 68fa ldr r2, [r7, #12]
- 8010076: 4b34 ldr r3, [pc, #208] @ (8010148 <TIM_OC2_SetConfig+0xfc>)
- 8010078: 4013 ands r3, r2
- 801007a: 60fb str r3, [r7, #12]
- tmpccmrx &= ~TIM_CCMR1_CC2S;
- 801007c: 68fb ldr r3, [r7, #12]
- 801007e: f423 7340 bic.w r3, r3, #768 @ 0x300
- 8010082: 60fb str r3, [r7, #12]
- /* Select the Output Compare Mode */
- tmpccmrx |= (OC_Config->OCMode << 8U);
- 8010084: 683b ldr r3, [r7, #0]
- 8010086: 681b ldr r3, [r3, #0]
- 8010088: 021b lsls r3, r3, #8
- 801008a: 68fa ldr r2, [r7, #12]
- 801008c: 4313 orrs r3, r2
- 801008e: 60fb str r3, [r7, #12]
- /* Reset the Output Polarity level */
- tmpccer &= ~TIM_CCER_CC2P;
- 8010090: 697b ldr r3, [r7, #20]
- 8010092: f023 0320 bic.w r3, r3, #32
- 8010096: 617b str r3, [r7, #20]
- /* Set the Output Compare Polarity */
- tmpccer |= (OC_Config->OCPolarity << 4U);
- 8010098: 683b ldr r3, [r7, #0]
- 801009a: 689b ldr r3, [r3, #8]
- 801009c: 011b lsls r3, r3, #4
- 801009e: 697a ldr r2, [r7, #20]
- 80100a0: 4313 orrs r3, r2
- 80100a2: 617b str r3, [r7, #20]
- if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
- 80100a4: 687b ldr r3, [r7, #4]
- 80100a6: 4a29 ldr r2, [pc, #164] @ (801014c <TIM_OC2_SetConfig+0x100>)
- 80100a8: 4293 cmp r3, r2
- 80100aa: d003 beq.n 80100b4 <TIM_OC2_SetConfig+0x68>
- 80100ac: 687b ldr r3, [r7, #4]
- 80100ae: 4a28 ldr r2, [pc, #160] @ (8010150 <TIM_OC2_SetConfig+0x104>)
- 80100b0: 4293 cmp r3, r2
- 80100b2: d10d bne.n 80100d0 <TIM_OC2_SetConfig+0x84>
- {
- assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
- /* Reset the Output N Polarity level */
- tmpccer &= ~TIM_CCER_CC2NP;
- 80100b4: 697b ldr r3, [r7, #20]
- 80100b6: f023 0380 bic.w r3, r3, #128 @ 0x80
- 80100ba: 617b str r3, [r7, #20]
- /* Set the Output N Polarity */
- tmpccer |= (OC_Config->OCNPolarity << 4U);
- 80100bc: 683b ldr r3, [r7, #0]
- 80100be: 68db ldr r3, [r3, #12]
- 80100c0: 011b lsls r3, r3, #4
- 80100c2: 697a ldr r2, [r7, #20]
- 80100c4: 4313 orrs r3, r2
- 80100c6: 617b str r3, [r7, #20]
- /* Reset the Output N State */
- tmpccer &= ~TIM_CCER_CC2NE;
- 80100c8: 697b ldr r3, [r7, #20]
- 80100ca: f023 0340 bic.w r3, r3, #64 @ 0x40
- 80100ce: 617b str r3, [r7, #20]
- }
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- 80100d0: 687b ldr r3, [r7, #4]
- 80100d2: 4a1e ldr r2, [pc, #120] @ (801014c <TIM_OC2_SetConfig+0x100>)
- 80100d4: 4293 cmp r3, r2
- 80100d6: d00f beq.n 80100f8 <TIM_OC2_SetConfig+0xac>
- 80100d8: 687b ldr r3, [r7, #4]
- 80100da: 4a1d ldr r2, [pc, #116] @ (8010150 <TIM_OC2_SetConfig+0x104>)
- 80100dc: 4293 cmp r3, r2
- 80100de: d00b beq.n 80100f8 <TIM_OC2_SetConfig+0xac>
- 80100e0: 687b ldr r3, [r7, #4]
- 80100e2: 4a1c ldr r2, [pc, #112] @ (8010154 <TIM_OC2_SetConfig+0x108>)
- 80100e4: 4293 cmp r3, r2
- 80100e6: d007 beq.n 80100f8 <TIM_OC2_SetConfig+0xac>
- 80100e8: 687b ldr r3, [r7, #4]
- 80100ea: 4a1b ldr r2, [pc, #108] @ (8010158 <TIM_OC2_SetConfig+0x10c>)
- 80100ec: 4293 cmp r3, r2
- 80100ee: d003 beq.n 80100f8 <TIM_OC2_SetConfig+0xac>
- 80100f0: 687b ldr r3, [r7, #4]
- 80100f2: 4a1a ldr r2, [pc, #104] @ (801015c <TIM_OC2_SetConfig+0x110>)
- 80100f4: 4293 cmp r3, r2
- 80100f6: d113 bne.n 8010120 <TIM_OC2_SetConfig+0xd4>
- /* Check parameters */
- assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
- assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
- /* Reset the Output Compare and Output Compare N IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS2;
- 80100f8: 693b ldr r3, [r7, #16]
- 80100fa: f423 6380 bic.w r3, r3, #1024 @ 0x400
- 80100fe: 613b str r3, [r7, #16]
- tmpcr2 &= ~TIM_CR2_OIS2N;
- 8010100: 693b ldr r3, [r7, #16]
- 8010102: f423 6300 bic.w r3, r3, #2048 @ 0x800
- 8010106: 613b str r3, [r7, #16]
- /* Set the Output Idle state */
- tmpcr2 |= (OC_Config->OCIdleState << 2U);
- 8010108: 683b ldr r3, [r7, #0]
- 801010a: 695b ldr r3, [r3, #20]
- 801010c: 009b lsls r3, r3, #2
- 801010e: 693a ldr r2, [r7, #16]
- 8010110: 4313 orrs r3, r2
- 8010112: 613b str r3, [r7, #16]
- /* Set the Output N Idle state */
- tmpcr2 |= (OC_Config->OCNIdleState << 2U);
- 8010114: 683b ldr r3, [r7, #0]
- 8010116: 699b ldr r3, [r3, #24]
- 8010118: 009b lsls r3, r3, #2
- 801011a: 693a ldr r2, [r7, #16]
- 801011c: 4313 orrs r3, r2
- 801011e: 613b str r3, [r7, #16]
- }
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
- 8010120: 687b ldr r3, [r7, #4]
- 8010122: 693a ldr r2, [r7, #16]
- 8010124: 605a str r2, [r3, #4]
- /* Write to TIMx CCMR1 */
- TIMx->CCMR1 = tmpccmrx;
- 8010126: 687b ldr r3, [r7, #4]
- 8010128: 68fa ldr r2, [r7, #12]
- 801012a: 619a str r2, [r3, #24]
- /* Set the Capture Compare Register value */
- TIMx->CCR2 = OC_Config->Pulse;
- 801012c: 683b ldr r3, [r7, #0]
- 801012e: 685a ldr r2, [r3, #4]
- 8010130: 687b ldr r3, [r7, #4]
- 8010132: 639a str r2, [r3, #56] @ 0x38
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
- 8010134: 687b ldr r3, [r7, #4]
- 8010136: 697a ldr r2, [r7, #20]
- 8010138: 621a str r2, [r3, #32]
- }
- 801013a: bf00 nop
- 801013c: 371c adds r7, #28
- 801013e: 46bd mov sp, r7
- 8010140: f85d 7b04 ldr.w r7, [sp], #4
- 8010144: 4770 bx lr
- 8010146: bf00 nop
- 8010148: feff8fff .word 0xfeff8fff
- 801014c: 40010000 .word 0x40010000
- 8010150: 40010400 .word 0x40010400
- 8010154: 40014000 .word 0x40014000
- 8010158: 40014400 .word 0x40014400
- 801015c: 40014800 .word 0x40014800
- 08010160 <TIM_OC3_SetConfig>:
- * @param TIMx to select the TIM peripheral
- * @param OC_Config The output configuration structure
- * @retval None
- */
- static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
- {
- 8010160: b480 push {r7}
- 8010162: b087 sub sp, #28
- 8010164: af00 add r7, sp, #0
- 8010166: 6078 str r0, [r7, #4]
- 8010168: 6039 str r1, [r7, #0]
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- 801016a: 687b ldr r3, [r7, #4]
- 801016c: 6a1b ldr r3, [r3, #32]
- 801016e: 617b str r3, [r7, #20]
- /* Disable the Channel 3: Reset the CC2E Bit */
- TIMx->CCER &= ~TIM_CCER_CC3E;
- 8010170: 687b ldr r3, [r7, #4]
- 8010172: 6a1b ldr r3, [r3, #32]
- 8010174: f423 7280 bic.w r2, r3, #256 @ 0x100
- 8010178: 687b ldr r3, [r7, #4]
- 801017a: 621a str r2, [r3, #32]
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
- 801017c: 687b ldr r3, [r7, #4]
- 801017e: 685b ldr r3, [r3, #4]
- 8010180: 613b str r3, [r7, #16]
- /* Get the TIMx CCMR2 register value */
- tmpccmrx = TIMx->CCMR2;
- 8010182: 687b ldr r3, [r7, #4]
- 8010184: 69db ldr r3, [r3, #28]
- 8010186: 60fb str r3, [r7, #12]
- /* Reset the Output Compare mode and Capture/Compare selection Bits */
- tmpccmrx &= ~TIM_CCMR2_OC3M;
- 8010188: 68fa ldr r2, [r7, #12]
- 801018a: 4b33 ldr r3, [pc, #204] @ (8010258 <TIM_OC3_SetConfig+0xf8>)
- 801018c: 4013 ands r3, r2
- 801018e: 60fb str r3, [r7, #12]
- tmpccmrx &= ~TIM_CCMR2_CC3S;
- 8010190: 68fb ldr r3, [r7, #12]
- 8010192: f023 0303 bic.w r3, r3, #3
- 8010196: 60fb str r3, [r7, #12]
- /* Select the Output Compare Mode */
- tmpccmrx |= OC_Config->OCMode;
- 8010198: 683b ldr r3, [r7, #0]
- 801019a: 681b ldr r3, [r3, #0]
- 801019c: 68fa ldr r2, [r7, #12]
- 801019e: 4313 orrs r3, r2
- 80101a0: 60fb str r3, [r7, #12]
- /* Reset the Output Polarity level */
- tmpccer &= ~TIM_CCER_CC3P;
- 80101a2: 697b ldr r3, [r7, #20]
- 80101a4: f423 7300 bic.w r3, r3, #512 @ 0x200
- 80101a8: 617b str r3, [r7, #20]
- /* Set the Output Compare Polarity */
- tmpccer |= (OC_Config->OCPolarity << 8U);
- 80101aa: 683b ldr r3, [r7, #0]
- 80101ac: 689b ldr r3, [r3, #8]
- 80101ae: 021b lsls r3, r3, #8
- 80101b0: 697a ldr r2, [r7, #20]
- 80101b2: 4313 orrs r3, r2
- 80101b4: 617b str r3, [r7, #20]
- if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
- 80101b6: 687b ldr r3, [r7, #4]
- 80101b8: 4a28 ldr r2, [pc, #160] @ (801025c <TIM_OC3_SetConfig+0xfc>)
- 80101ba: 4293 cmp r3, r2
- 80101bc: d003 beq.n 80101c6 <TIM_OC3_SetConfig+0x66>
- 80101be: 687b ldr r3, [r7, #4]
- 80101c0: 4a27 ldr r2, [pc, #156] @ (8010260 <TIM_OC3_SetConfig+0x100>)
- 80101c2: 4293 cmp r3, r2
- 80101c4: d10d bne.n 80101e2 <TIM_OC3_SetConfig+0x82>
- {
- assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
- /* Reset the Output N Polarity level */
- tmpccer &= ~TIM_CCER_CC3NP;
- 80101c6: 697b ldr r3, [r7, #20]
- 80101c8: f423 6300 bic.w r3, r3, #2048 @ 0x800
- 80101cc: 617b str r3, [r7, #20]
- /* Set the Output N Polarity */
- tmpccer |= (OC_Config->OCNPolarity << 8U);
- 80101ce: 683b ldr r3, [r7, #0]
- 80101d0: 68db ldr r3, [r3, #12]
- 80101d2: 021b lsls r3, r3, #8
- 80101d4: 697a ldr r2, [r7, #20]
- 80101d6: 4313 orrs r3, r2
- 80101d8: 617b str r3, [r7, #20]
- /* Reset the Output N State */
- tmpccer &= ~TIM_CCER_CC3NE;
- 80101da: 697b ldr r3, [r7, #20]
- 80101dc: f423 6380 bic.w r3, r3, #1024 @ 0x400
- 80101e0: 617b str r3, [r7, #20]
- }
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- 80101e2: 687b ldr r3, [r7, #4]
- 80101e4: 4a1d ldr r2, [pc, #116] @ (801025c <TIM_OC3_SetConfig+0xfc>)
- 80101e6: 4293 cmp r3, r2
- 80101e8: d00f beq.n 801020a <TIM_OC3_SetConfig+0xaa>
- 80101ea: 687b ldr r3, [r7, #4]
- 80101ec: 4a1c ldr r2, [pc, #112] @ (8010260 <TIM_OC3_SetConfig+0x100>)
- 80101ee: 4293 cmp r3, r2
- 80101f0: d00b beq.n 801020a <TIM_OC3_SetConfig+0xaa>
- 80101f2: 687b ldr r3, [r7, #4]
- 80101f4: 4a1b ldr r2, [pc, #108] @ (8010264 <TIM_OC3_SetConfig+0x104>)
- 80101f6: 4293 cmp r3, r2
- 80101f8: d007 beq.n 801020a <TIM_OC3_SetConfig+0xaa>
- 80101fa: 687b ldr r3, [r7, #4]
- 80101fc: 4a1a ldr r2, [pc, #104] @ (8010268 <TIM_OC3_SetConfig+0x108>)
- 80101fe: 4293 cmp r3, r2
- 8010200: d003 beq.n 801020a <TIM_OC3_SetConfig+0xaa>
- 8010202: 687b ldr r3, [r7, #4]
- 8010204: 4a19 ldr r2, [pc, #100] @ (801026c <TIM_OC3_SetConfig+0x10c>)
- 8010206: 4293 cmp r3, r2
- 8010208: d113 bne.n 8010232 <TIM_OC3_SetConfig+0xd2>
- /* Check parameters */
- assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
- assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
- /* Reset the Output Compare and Output Compare N IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS3;
- 801020a: 693b ldr r3, [r7, #16]
- 801020c: f423 5380 bic.w r3, r3, #4096 @ 0x1000
- 8010210: 613b str r3, [r7, #16]
- tmpcr2 &= ~TIM_CR2_OIS3N;
- 8010212: 693b ldr r3, [r7, #16]
- 8010214: f423 5300 bic.w r3, r3, #8192 @ 0x2000
- 8010218: 613b str r3, [r7, #16]
- /* Set the Output Idle state */
- tmpcr2 |= (OC_Config->OCIdleState << 4U);
- 801021a: 683b ldr r3, [r7, #0]
- 801021c: 695b ldr r3, [r3, #20]
- 801021e: 011b lsls r3, r3, #4
- 8010220: 693a ldr r2, [r7, #16]
- 8010222: 4313 orrs r3, r2
- 8010224: 613b str r3, [r7, #16]
- /* Set the Output N Idle state */
- tmpcr2 |= (OC_Config->OCNIdleState << 4U);
- 8010226: 683b ldr r3, [r7, #0]
- 8010228: 699b ldr r3, [r3, #24]
- 801022a: 011b lsls r3, r3, #4
- 801022c: 693a ldr r2, [r7, #16]
- 801022e: 4313 orrs r3, r2
- 8010230: 613b str r3, [r7, #16]
- }
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
- 8010232: 687b ldr r3, [r7, #4]
- 8010234: 693a ldr r2, [r7, #16]
- 8010236: 605a str r2, [r3, #4]
- /* Write to TIMx CCMR2 */
- TIMx->CCMR2 = tmpccmrx;
- 8010238: 687b ldr r3, [r7, #4]
- 801023a: 68fa ldr r2, [r7, #12]
- 801023c: 61da str r2, [r3, #28]
- /* Set the Capture Compare Register value */
- TIMx->CCR3 = OC_Config->Pulse;
- 801023e: 683b ldr r3, [r7, #0]
- 8010240: 685a ldr r2, [r3, #4]
- 8010242: 687b ldr r3, [r7, #4]
- 8010244: 63da str r2, [r3, #60] @ 0x3c
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
- 8010246: 687b ldr r3, [r7, #4]
- 8010248: 697a ldr r2, [r7, #20]
- 801024a: 621a str r2, [r3, #32]
- }
- 801024c: bf00 nop
- 801024e: 371c adds r7, #28
- 8010250: 46bd mov sp, r7
- 8010252: f85d 7b04 ldr.w r7, [sp], #4
- 8010256: 4770 bx lr
- 8010258: fffeff8f .word 0xfffeff8f
- 801025c: 40010000 .word 0x40010000
- 8010260: 40010400 .word 0x40010400
- 8010264: 40014000 .word 0x40014000
- 8010268: 40014400 .word 0x40014400
- 801026c: 40014800 .word 0x40014800
- 08010270 <TIM_OC4_SetConfig>:
- * @param TIMx to select the TIM peripheral
- * @param OC_Config The output configuration structure
- * @retval None
- */
- static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
- {
- 8010270: b480 push {r7}
- 8010272: b087 sub sp, #28
- 8010274: af00 add r7, sp, #0
- 8010276: 6078 str r0, [r7, #4]
- 8010278: 6039 str r1, [r7, #0]
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- 801027a: 687b ldr r3, [r7, #4]
- 801027c: 6a1b ldr r3, [r3, #32]
- 801027e: 613b str r3, [r7, #16]
- /* Disable the Channel 4: Reset the CC4E Bit */
- TIMx->CCER &= ~TIM_CCER_CC4E;
- 8010280: 687b ldr r3, [r7, #4]
- 8010282: 6a1b ldr r3, [r3, #32]
- 8010284: f423 5280 bic.w r2, r3, #4096 @ 0x1000
- 8010288: 687b ldr r3, [r7, #4]
- 801028a: 621a str r2, [r3, #32]
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
- 801028c: 687b ldr r3, [r7, #4]
- 801028e: 685b ldr r3, [r3, #4]
- 8010290: 617b str r3, [r7, #20]
- /* Get the TIMx CCMR2 register value */
- tmpccmrx = TIMx->CCMR2;
- 8010292: 687b ldr r3, [r7, #4]
- 8010294: 69db ldr r3, [r3, #28]
- 8010296: 60fb str r3, [r7, #12]
- /* Reset the Output Compare mode and Capture/Compare selection Bits */
- tmpccmrx &= ~TIM_CCMR2_OC4M;
- 8010298: 68fa ldr r2, [r7, #12]
- 801029a: 4b24 ldr r3, [pc, #144] @ (801032c <TIM_OC4_SetConfig+0xbc>)
- 801029c: 4013 ands r3, r2
- 801029e: 60fb str r3, [r7, #12]
- tmpccmrx &= ~TIM_CCMR2_CC4S;
- 80102a0: 68fb ldr r3, [r7, #12]
- 80102a2: f423 7340 bic.w r3, r3, #768 @ 0x300
- 80102a6: 60fb str r3, [r7, #12]
- /* Select the Output Compare Mode */
- tmpccmrx |= (OC_Config->OCMode << 8U);
- 80102a8: 683b ldr r3, [r7, #0]
- 80102aa: 681b ldr r3, [r3, #0]
- 80102ac: 021b lsls r3, r3, #8
- 80102ae: 68fa ldr r2, [r7, #12]
- 80102b0: 4313 orrs r3, r2
- 80102b2: 60fb str r3, [r7, #12]
- /* Reset the Output Polarity level */
- tmpccer &= ~TIM_CCER_CC4P;
- 80102b4: 693b ldr r3, [r7, #16]
- 80102b6: f423 5300 bic.w r3, r3, #8192 @ 0x2000
- 80102ba: 613b str r3, [r7, #16]
- /* Set the Output Compare Polarity */
- tmpccer |= (OC_Config->OCPolarity << 12U);
- 80102bc: 683b ldr r3, [r7, #0]
- 80102be: 689b ldr r3, [r3, #8]
- 80102c0: 031b lsls r3, r3, #12
- 80102c2: 693a ldr r2, [r7, #16]
- 80102c4: 4313 orrs r3, r2
- 80102c6: 613b str r3, [r7, #16]
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- 80102c8: 687b ldr r3, [r7, #4]
- 80102ca: 4a19 ldr r2, [pc, #100] @ (8010330 <TIM_OC4_SetConfig+0xc0>)
- 80102cc: 4293 cmp r3, r2
- 80102ce: d00f beq.n 80102f0 <TIM_OC4_SetConfig+0x80>
- 80102d0: 687b ldr r3, [r7, #4]
- 80102d2: 4a18 ldr r2, [pc, #96] @ (8010334 <TIM_OC4_SetConfig+0xc4>)
- 80102d4: 4293 cmp r3, r2
- 80102d6: d00b beq.n 80102f0 <TIM_OC4_SetConfig+0x80>
- 80102d8: 687b ldr r3, [r7, #4]
- 80102da: 4a17 ldr r2, [pc, #92] @ (8010338 <TIM_OC4_SetConfig+0xc8>)
- 80102dc: 4293 cmp r3, r2
- 80102de: d007 beq.n 80102f0 <TIM_OC4_SetConfig+0x80>
- 80102e0: 687b ldr r3, [r7, #4]
- 80102e2: 4a16 ldr r2, [pc, #88] @ (801033c <TIM_OC4_SetConfig+0xcc>)
- 80102e4: 4293 cmp r3, r2
- 80102e6: d003 beq.n 80102f0 <TIM_OC4_SetConfig+0x80>
- 80102e8: 687b ldr r3, [r7, #4]
- 80102ea: 4a15 ldr r2, [pc, #84] @ (8010340 <TIM_OC4_SetConfig+0xd0>)
- 80102ec: 4293 cmp r3, r2
- 80102ee: d109 bne.n 8010304 <TIM_OC4_SetConfig+0x94>
- {
- /* Check parameters */
- assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
- /* Reset the Output Compare IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS4;
- 80102f0: 697b ldr r3, [r7, #20]
- 80102f2: f423 4380 bic.w r3, r3, #16384 @ 0x4000
- 80102f6: 617b str r3, [r7, #20]
- /* Set the Output Idle state */
- tmpcr2 |= (OC_Config->OCIdleState << 6U);
- 80102f8: 683b ldr r3, [r7, #0]
- 80102fa: 695b ldr r3, [r3, #20]
- 80102fc: 019b lsls r3, r3, #6
- 80102fe: 697a ldr r2, [r7, #20]
- 8010300: 4313 orrs r3, r2
- 8010302: 617b str r3, [r7, #20]
- }
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
- 8010304: 687b ldr r3, [r7, #4]
- 8010306: 697a ldr r2, [r7, #20]
- 8010308: 605a str r2, [r3, #4]
- /* Write to TIMx CCMR2 */
- TIMx->CCMR2 = tmpccmrx;
- 801030a: 687b ldr r3, [r7, #4]
- 801030c: 68fa ldr r2, [r7, #12]
- 801030e: 61da str r2, [r3, #28]
- /* Set the Capture Compare Register value */
- TIMx->CCR4 = OC_Config->Pulse;
- 8010310: 683b ldr r3, [r7, #0]
- 8010312: 685a ldr r2, [r3, #4]
- 8010314: 687b ldr r3, [r7, #4]
- 8010316: 641a str r2, [r3, #64] @ 0x40
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
- 8010318: 687b ldr r3, [r7, #4]
- 801031a: 693a ldr r2, [r7, #16]
- 801031c: 621a str r2, [r3, #32]
- }
- 801031e: bf00 nop
- 8010320: 371c adds r7, #28
- 8010322: 46bd mov sp, r7
- 8010324: f85d 7b04 ldr.w r7, [sp], #4
- 8010328: 4770 bx lr
- 801032a: bf00 nop
- 801032c: feff8fff .word 0xfeff8fff
- 8010330: 40010000 .word 0x40010000
- 8010334: 40010400 .word 0x40010400
- 8010338: 40014000 .word 0x40014000
- 801033c: 40014400 .word 0x40014400
- 8010340: 40014800 .word 0x40014800
- 08010344 <TIM_OC5_SetConfig>:
- * @param OC_Config The output configuration structure
- * @retval None
- */
- static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx,
- const TIM_OC_InitTypeDef *OC_Config)
- {
- 8010344: b480 push {r7}
- 8010346: b087 sub sp, #28
- 8010348: af00 add r7, sp, #0
- 801034a: 6078 str r0, [r7, #4]
- 801034c: 6039 str r1, [r7, #0]
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- 801034e: 687b ldr r3, [r7, #4]
- 8010350: 6a1b ldr r3, [r3, #32]
- 8010352: 613b str r3, [r7, #16]
- /* Disable the output: Reset the CCxE Bit */
- TIMx->CCER &= ~TIM_CCER_CC5E;
- 8010354: 687b ldr r3, [r7, #4]
- 8010356: 6a1b ldr r3, [r3, #32]
- 8010358: f423 3280 bic.w r2, r3, #65536 @ 0x10000
- 801035c: 687b ldr r3, [r7, #4]
- 801035e: 621a str r2, [r3, #32]
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
- 8010360: 687b ldr r3, [r7, #4]
- 8010362: 685b ldr r3, [r3, #4]
- 8010364: 617b str r3, [r7, #20]
- /* Get the TIMx CCMR1 register value */
- tmpccmrx = TIMx->CCMR3;
- 8010366: 687b ldr r3, [r7, #4]
- 8010368: 6d5b ldr r3, [r3, #84] @ 0x54
- 801036a: 60fb str r3, [r7, #12]
- /* Reset the Output Compare Mode Bits */
- tmpccmrx &= ~(TIM_CCMR3_OC5M);
- 801036c: 68fa ldr r2, [r7, #12]
- 801036e: 4b21 ldr r3, [pc, #132] @ (80103f4 <TIM_OC5_SetConfig+0xb0>)
- 8010370: 4013 ands r3, r2
- 8010372: 60fb str r3, [r7, #12]
- /* Select the Output Compare Mode */
- tmpccmrx |= OC_Config->OCMode;
- 8010374: 683b ldr r3, [r7, #0]
- 8010376: 681b ldr r3, [r3, #0]
- 8010378: 68fa ldr r2, [r7, #12]
- 801037a: 4313 orrs r3, r2
- 801037c: 60fb str r3, [r7, #12]
- /* Reset the Output Polarity level */
- tmpccer &= ~TIM_CCER_CC5P;
- 801037e: 693b ldr r3, [r7, #16]
- 8010380: f423 3300 bic.w r3, r3, #131072 @ 0x20000
- 8010384: 613b str r3, [r7, #16]
- /* Set the Output Compare Polarity */
- tmpccer |= (OC_Config->OCPolarity << 16U);
- 8010386: 683b ldr r3, [r7, #0]
- 8010388: 689b ldr r3, [r3, #8]
- 801038a: 041b lsls r3, r3, #16
- 801038c: 693a ldr r2, [r7, #16]
- 801038e: 4313 orrs r3, r2
- 8010390: 613b str r3, [r7, #16]
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- 8010392: 687b ldr r3, [r7, #4]
- 8010394: 4a18 ldr r2, [pc, #96] @ (80103f8 <TIM_OC5_SetConfig+0xb4>)
- 8010396: 4293 cmp r3, r2
- 8010398: d00f beq.n 80103ba <TIM_OC5_SetConfig+0x76>
- 801039a: 687b ldr r3, [r7, #4]
- 801039c: 4a17 ldr r2, [pc, #92] @ (80103fc <TIM_OC5_SetConfig+0xb8>)
- 801039e: 4293 cmp r3, r2
- 80103a0: d00b beq.n 80103ba <TIM_OC5_SetConfig+0x76>
- 80103a2: 687b ldr r3, [r7, #4]
- 80103a4: 4a16 ldr r2, [pc, #88] @ (8010400 <TIM_OC5_SetConfig+0xbc>)
- 80103a6: 4293 cmp r3, r2
- 80103a8: d007 beq.n 80103ba <TIM_OC5_SetConfig+0x76>
- 80103aa: 687b ldr r3, [r7, #4]
- 80103ac: 4a15 ldr r2, [pc, #84] @ (8010404 <TIM_OC5_SetConfig+0xc0>)
- 80103ae: 4293 cmp r3, r2
- 80103b0: d003 beq.n 80103ba <TIM_OC5_SetConfig+0x76>
- 80103b2: 687b ldr r3, [r7, #4]
- 80103b4: 4a14 ldr r2, [pc, #80] @ (8010408 <TIM_OC5_SetConfig+0xc4>)
- 80103b6: 4293 cmp r3, r2
- 80103b8: d109 bne.n 80103ce <TIM_OC5_SetConfig+0x8a>
- {
- /* Reset the Output Compare IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS5;
- 80103ba: 697b ldr r3, [r7, #20]
- 80103bc: f423 3380 bic.w r3, r3, #65536 @ 0x10000
- 80103c0: 617b str r3, [r7, #20]
- /* Set the Output Idle state */
- tmpcr2 |= (OC_Config->OCIdleState << 8U);
- 80103c2: 683b ldr r3, [r7, #0]
- 80103c4: 695b ldr r3, [r3, #20]
- 80103c6: 021b lsls r3, r3, #8
- 80103c8: 697a ldr r2, [r7, #20]
- 80103ca: 4313 orrs r3, r2
- 80103cc: 617b str r3, [r7, #20]
- }
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
- 80103ce: 687b ldr r3, [r7, #4]
- 80103d0: 697a ldr r2, [r7, #20]
- 80103d2: 605a str r2, [r3, #4]
- /* Write to TIMx CCMR3 */
- TIMx->CCMR3 = tmpccmrx;
- 80103d4: 687b ldr r3, [r7, #4]
- 80103d6: 68fa ldr r2, [r7, #12]
- 80103d8: 655a str r2, [r3, #84] @ 0x54
- /* Set the Capture Compare Register value */
- TIMx->CCR5 = OC_Config->Pulse;
- 80103da: 683b ldr r3, [r7, #0]
- 80103dc: 685a ldr r2, [r3, #4]
- 80103de: 687b ldr r3, [r7, #4]
- 80103e0: 659a str r2, [r3, #88] @ 0x58
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
- 80103e2: 687b ldr r3, [r7, #4]
- 80103e4: 693a ldr r2, [r7, #16]
- 80103e6: 621a str r2, [r3, #32]
- }
- 80103e8: bf00 nop
- 80103ea: 371c adds r7, #28
- 80103ec: 46bd mov sp, r7
- 80103ee: f85d 7b04 ldr.w r7, [sp], #4
- 80103f2: 4770 bx lr
- 80103f4: fffeff8f .word 0xfffeff8f
- 80103f8: 40010000 .word 0x40010000
- 80103fc: 40010400 .word 0x40010400
- 8010400: 40014000 .word 0x40014000
- 8010404: 40014400 .word 0x40014400
- 8010408: 40014800 .word 0x40014800
- 0801040c <TIM_OC6_SetConfig>:
- * @param OC_Config The output configuration structure
- * @retval None
- */
- static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx,
- const TIM_OC_InitTypeDef *OC_Config)
- {
- 801040c: b480 push {r7}
- 801040e: b087 sub sp, #28
- 8010410: af00 add r7, sp, #0
- 8010412: 6078 str r0, [r7, #4]
- 8010414: 6039 str r1, [r7, #0]
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- 8010416: 687b ldr r3, [r7, #4]
- 8010418: 6a1b ldr r3, [r3, #32]
- 801041a: 613b str r3, [r7, #16]
- /* Disable the output: Reset the CCxE Bit */
- TIMx->CCER &= ~TIM_CCER_CC6E;
- 801041c: 687b ldr r3, [r7, #4]
- 801041e: 6a1b ldr r3, [r3, #32]
- 8010420: f423 1280 bic.w r2, r3, #1048576 @ 0x100000
- 8010424: 687b ldr r3, [r7, #4]
- 8010426: 621a str r2, [r3, #32]
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
- 8010428: 687b ldr r3, [r7, #4]
- 801042a: 685b ldr r3, [r3, #4]
- 801042c: 617b str r3, [r7, #20]
- /* Get the TIMx CCMR1 register value */
- tmpccmrx = TIMx->CCMR3;
- 801042e: 687b ldr r3, [r7, #4]
- 8010430: 6d5b ldr r3, [r3, #84] @ 0x54
- 8010432: 60fb str r3, [r7, #12]
- /* Reset the Output Compare Mode Bits */
- tmpccmrx &= ~(TIM_CCMR3_OC6M);
- 8010434: 68fa ldr r2, [r7, #12]
- 8010436: 4b22 ldr r3, [pc, #136] @ (80104c0 <TIM_OC6_SetConfig+0xb4>)
- 8010438: 4013 ands r3, r2
- 801043a: 60fb str r3, [r7, #12]
- /* Select the Output Compare Mode */
- tmpccmrx |= (OC_Config->OCMode << 8U);
- 801043c: 683b ldr r3, [r7, #0]
- 801043e: 681b ldr r3, [r3, #0]
- 8010440: 021b lsls r3, r3, #8
- 8010442: 68fa ldr r2, [r7, #12]
- 8010444: 4313 orrs r3, r2
- 8010446: 60fb str r3, [r7, #12]
- /* Reset the Output Polarity level */
- tmpccer &= (uint32_t)~TIM_CCER_CC6P;
- 8010448: 693b ldr r3, [r7, #16]
- 801044a: f423 1300 bic.w r3, r3, #2097152 @ 0x200000
- 801044e: 613b str r3, [r7, #16]
- /* Set the Output Compare Polarity */
- tmpccer |= (OC_Config->OCPolarity << 20U);
- 8010450: 683b ldr r3, [r7, #0]
- 8010452: 689b ldr r3, [r3, #8]
- 8010454: 051b lsls r3, r3, #20
- 8010456: 693a ldr r2, [r7, #16]
- 8010458: 4313 orrs r3, r2
- 801045a: 613b str r3, [r7, #16]
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- 801045c: 687b ldr r3, [r7, #4]
- 801045e: 4a19 ldr r2, [pc, #100] @ (80104c4 <TIM_OC6_SetConfig+0xb8>)
- 8010460: 4293 cmp r3, r2
- 8010462: d00f beq.n 8010484 <TIM_OC6_SetConfig+0x78>
- 8010464: 687b ldr r3, [r7, #4]
- 8010466: 4a18 ldr r2, [pc, #96] @ (80104c8 <TIM_OC6_SetConfig+0xbc>)
- 8010468: 4293 cmp r3, r2
- 801046a: d00b beq.n 8010484 <TIM_OC6_SetConfig+0x78>
- 801046c: 687b ldr r3, [r7, #4]
- 801046e: 4a17 ldr r2, [pc, #92] @ (80104cc <TIM_OC6_SetConfig+0xc0>)
- 8010470: 4293 cmp r3, r2
- 8010472: d007 beq.n 8010484 <TIM_OC6_SetConfig+0x78>
- 8010474: 687b ldr r3, [r7, #4]
- 8010476: 4a16 ldr r2, [pc, #88] @ (80104d0 <TIM_OC6_SetConfig+0xc4>)
- 8010478: 4293 cmp r3, r2
- 801047a: d003 beq.n 8010484 <TIM_OC6_SetConfig+0x78>
- 801047c: 687b ldr r3, [r7, #4]
- 801047e: 4a15 ldr r2, [pc, #84] @ (80104d4 <TIM_OC6_SetConfig+0xc8>)
- 8010480: 4293 cmp r3, r2
- 8010482: d109 bne.n 8010498 <TIM_OC6_SetConfig+0x8c>
- {
- /* Reset the Output Compare IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS6;
- 8010484: 697b ldr r3, [r7, #20]
- 8010486: f423 2380 bic.w r3, r3, #262144 @ 0x40000
- 801048a: 617b str r3, [r7, #20]
- /* Set the Output Idle state */
- tmpcr2 |= (OC_Config->OCIdleState << 10U);
- 801048c: 683b ldr r3, [r7, #0]
- 801048e: 695b ldr r3, [r3, #20]
- 8010490: 029b lsls r3, r3, #10
- 8010492: 697a ldr r2, [r7, #20]
- 8010494: 4313 orrs r3, r2
- 8010496: 617b str r3, [r7, #20]
- }
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
- 8010498: 687b ldr r3, [r7, #4]
- 801049a: 697a ldr r2, [r7, #20]
- 801049c: 605a str r2, [r3, #4]
- /* Write to TIMx CCMR3 */
- TIMx->CCMR3 = tmpccmrx;
- 801049e: 687b ldr r3, [r7, #4]
- 80104a0: 68fa ldr r2, [r7, #12]
- 80104a2: 655a str r2, [r3, #84] @ 0x54
- /* Set the Capture Compare Register value */
- TIMx->CCR6 = OC_Config->Pulse;
- 80104a4: 683b ldr r3, [r7, #0]
- 80104a6: 685a ldr r2, [r3, #4]
- 80104a8: 687b ldr r3, [r7, #4]
- 80104aa: 65da str r2, [r3, #92] @ 0x5c
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
- 80104ac: 687b ldr r3, [r7, #4]
- 80104ae: 693a ldr r2, [r7, #16]
- 80104b0: 621a str r2, [r3, #32]
- }
- 80104b2: bf00 nop
- 80104b4: 371c adds r7, #28
- 80104b6: 46bd mov sp, r7
- 80104b8: f85d 7b04 ldr.w r7, [sp], #4
- 80104bc: 4770 bx lr
- 80104be: bf00 nop
- 80104c0: feff8fff .word 0xfeff8fff
- 80104c4: 40010000 .word 0x40010000
- 80104c8: 40010400 .word 0x40010400
- 80104cc: 40014000 .word 0x40014000
- 80104d0: 40014400 .word 0x40014400
- 80104d4: 40014800 .word 0x40014800
- 080104d8 <TIM_TI1_SetConfig>:
- * (on channel2 path) is used as the input signal. Therefore CCMR1 must be
- * protected against un-initialized filter and polarity values.
- */
- void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
- uint32_t TIM_ICFilter)
- {
- 80104d8: b480 push {r7}
- 80104da: b087 sub sp, #28
- 80104dc: af00 add r7, sp, #0
- 80104de: 60f8 str r0, [r7, #12]
- 80104e0: 60b9 str r1, [r7, #8]
- 80104e2: 607a str r2, [r7, #4]
- 80104e4: 603b str r3, [r7, #0]
- uint32_t tmpccmr1;
- uint32_t tmpccer;
- /* Disable the Channel 1: Reset the CC1E Bit */
- tmpccer = TIMx->CCER;
- 80104e6: 68fb ldr r3, [r7, #12]
- 80104e8: 6a1b ldr r3, [r3, #32]
- 80104ea: 613b str r3, [r7, #16]
- TIMx->CCER &= ~TIM_CCER_CC1E;
- 80104ec: 68fb ldr r3, [r7, #12]
- 80104ee: 6a1b ldr r3, [r3, #32]
- 80104f0: f023 0201 bic.w r2, r3, #1
- 80104f4: 68fb ldr r3, [r7, #12]
- 80104f6: 621a str r2, [r3, #32]
- tmpccmr1 = TIMx->CCMR1;
- 80104f8: 68fb ldr r3, [r7, #12]
- 80104fa: 699b ldr r3, [r3, #24]
- 80104fc: 617b str r3, [r7, #20]
- /* Select the Input */
- if (IS_TIM_CC2_INSTANCE(TIMx) != RESET)
- 80104fe: 68fb ldr r3, [r7, #12]
- 8010500: 4a28 ldr r2, [pc, #160] @ (80105a4 <TIM_TI1_SetConfig+0xcc>)
- 8010502: 4293 cmp r3, r2
- 8010504: d01b beq.n 801053e <TIM_TI1_SetConfig+0x66>
- 8010506: 68fb ldr r3, [r7, #12]
- 8010508: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 801050c: d017 beq.n 801053e <TIM_TI1_SetConfig+0x66>
- 801050e: 68fb ldr r3, [r7, #12]
- 8010510: 4a25 ldr r2, [pc, #148] @ (80105a8 <TIM_TI1_SetConfig+0xd0>)
- 8010512: 4293 cmp r3, r2
- 8010514: d013 beq.n 801053e <TIM_TI1_SetConfig+0x66>
- 8010516: 68fb ldr r3, [r7, #12]
- 8010518: 4a24 ldr r2, [pc, #144] @ (80105ac <TIM_TI1_SetConfig+0xd4>)
- 801051a: 4293 cmp r3, r2
- 801051c: d00f beq.n 801053e <TIM_TI1_SetConfig+0x66>
- 801051e: 68fb ldr r3, [r7, #12]
- 8010520: 4a23 ldr r2, [pc, #140] @ (80105b0 <TIM_TI1_SetConfig+0xd8>)
- 8010522: 4293 cmp r3, r2
- 8010524: d00b beq.n 801053e <TIM_TI1_SetConfig+0x66>
- 8010526: 68fb ldr r3, [r7, #12]
- 8010528: 4a22 ldr r2, [pc, #136] @ (80105b4 <TIM_TI1_SetConfig+0xdc>)
- 801052a: 4293 cmp r3, r2
- 801052c: d007 beq.n 801053e <TIM_TI1_SetConfig+0x66>
- 801052e: 68fb ldr r3, [r7, #12]
- 8010530: 4a21 ldr r2, [pc, #132] @ (80105b8 <TIM_TI1_SetConfig+0xe0>)
- 8010532: 4293 cmp r3, r2
- 8010534: d003 beq.n 801053e <TIM_TI1_SetConfig+0x66>
- 8010536: 68fb ldr r3, [r7, #12]
- 8010538: 4a20 ldr r2, [pc, #128] @ (80105bc <TIM_TI1_SetConfig+0xe4>)
- 801053a: 4293 cmp r3, r2
- 801053c: d101 bne.n 8010542 <TIM_TI1_SetConfig+0x6a>
- 801053e: 2301 movs r3, #1
- 8010540: e000 b.n 8010544 <TIM_TI1_SetConfig+0x6c>
- 8010542: 2300 movs r3, #0
- 8010544: 2b00 cmp r3, #0
- 8010546: d008 beq.n 801055a <TIM_TI1_SetConfig+0x82>
- {
- tmpccmr1 &= ~TIM_CCMR1_CC1S;
- 8010548: 697b ldr r3, [r7, #20]
- 801054a: f023 0303 bic.w r3, r3, #3
- 801054e: 617b str r3, [r7, #20]
- tmpccmr1 |= TIM_ICSelection;
- 8010550: 697a ldr r2, [r7, #20]
- 8010552: 687b ldr r3, [r7, #4]
- 8010554: 4313 orrs r3, r2
- 8010556: 617b str r3, [r7, #20]
- 8010558: e003 b.n 8010562 <TIM_TI1_SetConfig+0x8a>
- }
- else
- {
- tmpccmr1 |= TIM_CCMR1_CC1S_0;
- 801055a: 697b ldr r3, [r7, #20]
- 801055c: f043 0301 orr.w r3, r3, #1
- 8010560: 617b str r3, [r7, #20]
- }
- /* Set the filter */
- tmpccmr1 &= ~TIM_CCMR1_IC1F;
- 8010562: 697b ldr r3, [r7, #20]
- 8010564: f023 03f0 bic.w r3, r3, #240 @ 0xf0
- 8010568: 617b str r3, [r7, #20]
- tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F);
- 801056a: 683b ldr r3, [r7, #0]
- 801056c: 011b lsls r3, r3, #4
- 801056e: b2db uxtb r3, r3
- 8010570: 697a ldr r2, [r7, #20]
- 8010572: 4313 orrs r3, r2
- 8010574: 617b str r3, [r7, #20]
- /* Select the Polarity and set the CC1E Bit */
- tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
- 8010576: 693b ldr r3, [r7, #16]
- 8010578: f023 030a bic.w r3, r3, #10
- 801057c: 613b str r3, [r7, #16]
- tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP));
- 801057e: 68bb ldr r3, [r7, #8]
- 8010580: f003 030a and.w r3, r3, #10
- 8010584: 693a ldr r2, [r7, #16]
- 8010586: 4313 orrs r3, r2
- 8010588: 613b str r3, [r7, #16]
- /* Write to TIMx CCMR1 and CCER registers */
- TIMx->CCMR1 = tmpccmr1;
- 801058a: 68fb ldr r3, [r7, #12]
- 801058c: 697a ldr r2, [r7, #20]
- 801058e: 619a str r2, [r3, #24]
- TIMx->CCER = tmpccer;
- 8010590: 68fb ldr r3, [r7, #12]
- 8010592: 693a ldr r2, [r7, #16]
- 8010594: 621a str r2, [r3, #32]
- }
- 8010596: bf00 nop
- 8010598: 371c adds r7, #28
- 801059a: 46bd mov sp, r7
- 801059c: f85d 7b04 ldr.w r7, [sp], #4
- 80105a0: 4770 bx lr
- 80105a2: bf00 nop
- 80105a4: 40010000 .word 0x40010000
- 80105a8: 40000400 .word 0x40000400
- 80105ac: 40000800 .word 0x40000800
- 80105b0: 40000c00 .word 0x40000c00
- 80105b4: 40010400 .word 0x40010400
- 80105b8: 40001800 .word 0x40001800
- 80105bc: 40014000 .word 0x40014000
- 080105c0 <TIM_TI1_ConfigInputStage>:
- * @param TIM_ICFilter Specifies the Input Capture Filter.
- * This parameter must be a value between 0x00 and 0x0F.
- * @retval None
- */
- static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
- {
- 80105c0: b480 push {r7}
- 80105c2: b087 sub sp, #28
- 80105c4: af00 add r7, sp, #0
- 80105c6: 60f8 str r0, [r7, #12]
- 80105c8: 60b9 str r1, [r7, #8]
- 80105ca: 607a str r2, [r7, #4]
- uint32_t tmpccmr1;
- uint32_t tmpccer;
- /* Disable the Channel 1: Reset the CC1E Bit */
- tmpccer = TIMx->CCER;
- 80105cc: 68fb ldr r3, [r7, #12]
- 80105ce: 6a1b ldr r3, [r3, #32]
- 80105d0: 617b str r3, [r7, #20]
- TIMx->CCER &= ~TIM_CCER_CC1E;
- 80105d2: 68fb ldr r3, [r7, #12]
- 80105d4: 6a1b ldr r3, [r3, #32]
- 80105d6: f023 0201 bic.w r2, r3, #1
- 80105da: 68fb ldr r3, [r7, #12]
- 80105dc: 621a str r2, [r3, #32]
- tmpccmr1 = TIMx->CCMR1;
- 80105de: 68fb ldr r3, [r7, #12]
- 80105e0: 699b ldr r3, [r3, #24]
- 80105e2: 613b str r3, [r7, #16]
- /* Set the filter */
- tmpccmr1 &= ~TIM_CCMR1_IC1F;
- 80105e4: 693b ldr r3, [r7, #16]
- 80105e6: f023 03f0 bic.w r3, r3, #240 @ 0xf0
- 80105ea: 613b str r3, [r7, #16]
- tmpccmr1 |= (TIM_ICFilter << 4U);
- 80105ec: 687b ldr r3, [r7, #4]
- 80105ee: 011b lsls r3, r3, #4
- 80105f0: 693a ldr r2, [r7, #16]
- 80105f2: 4313 orrs r3, r2
- 80105f4: 613b str r3, [r7, #16]
- /* Select the Polarity and set the CC1E Bit */
- tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
- 80105f6: 697b ldr r3, [r7, #20]
- 80105f8: f023 030a bic.w r3, r3, #10
- 80105fc: 617b str r3, [r7, #20]
- tmpccer |= TIM_ICPolarity;
- 80105fe: 697a ldr r2, [r7, #20]
- 8010600: 68bb ldr r3, [r7, #8]
- 8010602: 4313 orrs r3, r2
- 8010604: 617b str r3, [r7, #20]
- /* Write to TIMx CCMR1 and CCER registers */
- TIMx->CCMR1 = tmpccmr1;
- 8010606: 68fb ldr r3, [r7, #12]
- 8010608: 693a ldr r2, [r7, #16]
- 801060a: 619a str r2, [r3, #24]
- TIMx->CCER = tmpccer;
- 801060c: 68fb ldr r3, [r7, #12]
- 801060e: 697a ldr r2, [r7, #20]
- 8010610: 621a str r2, [r3, #32]
- }
- 8010612: bf00 nop
- 8010614: 371c adds r7, #28
- 8010616: 46bd mov sp, r7
- 8010618: f85d 7b04 ldr.w r7, [sp], #4
- 801061c: 4770 bx lr
- 0801061e <TIM_TI2_SetConfig>:
- * (on channel1 path) is used as the input signal. Therefore CCMR1 must be
- * protected against un-initialized filter and polarity values.
- */
- static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
- uint32_t TIM_ICFilter)
- {
- 801061e: b480 push {r7}
- 8010620: b087 sub sp, #28
- 8010622: af00 add r7, sp, #0
- 8010624: 60f8 str r0, [r7, #12]
- 8010626: 60b9 str r1, [r7, #8]
- 8010628: 607a str r2, [r7, #4]
- 801062a: 603b str r3, [r7, #0]
- uint32_t tmpccmr1;
- uint32_t tmpccer;
- /* Disable the Channel 2: Reset the CC2E Bit */
- tmpccer = TIMx->CCER;
- 801062c: 68fb ldr r3, [r7, #12]
- 801062e: 6a1b ldr r3, [r3, #32]
- 8010630: 617b str r3, [r7, #20]
- TIMx->CCER &= ~TIM_CCER_CC2E;
- 8010632: 68fb ldr r3, [r7, #12]
- 8010634: 6a1b ldr r3, [r3, #32]
- 8010636: f023 0210 bic.w r2, r3, #16
- 801063a: 68fb ldr r3, [r7, #12]
- 801063c: 621a str r2, [r3, #32]
- tmpccmr1 = TIMx->CCMR1;
- 801063e: 68fb ldr r3, [r7, #12]
- 8010640: 699b ldr r3, [r3, #24]
- 8010642: 613b str r3, [r7, #16]
- /* Select the Input */
- tmpccmr1 &= ~TIM_CCMR1_CC2S;
- 8010644: 693b ldr r3, [r7, #16]
- 8010646: f423 7340 bic.w r3, r3, #768 @ 0x300
- 801064a: 613b str r3, [r7, #16]
- tmpccmr1 |= (TIM_ICSelection << 8U);
- 801064c: 687b ldr r3, [r7, #4]
- 801064e: 021b lsls r3, r3, #8
- 8010650: 693a ldr r2, [r7, #16]
- 8010652: 4313 orrs r3, r2
- 8010654: 613b str r3, [r7, #16]
- /* Set the filter */
- tmpccmr1 &= ~TIM_CCMR1_IC2F;
- 8010656: 693b ldr r3, [r7, #16]
- 8010658: f423 4370 bic.w r3, r3, #61440 @ 0xf000
- 801065c: 613b str r3, [r7, #16]
- tmpccmr1 |= ((TIM_ICFilter << 12U) & TIM_CCMR1_IC2F);
- 801065e: 683b ldr r3, [r7, #0]
- 8010660: 031b lsls r3, r3, #12
- 8010662: b29b uxth r3, r3
- 8010664: 693a ldr r2, [r7, #16]
- 8010666: 4313 orrs r3, r2
- 8010668: 613b str r3, [r7, #16]
- /* Select the Polarity and set the CC2E Bit */
- tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
- 801066a: 697b ldr r3, [r7, #20]
- 801066c: f023 03a0 bic.w r3, r3, #160 @ 0xa0
- 8010670: 617b str r3, [r7, #20]
- tmpccer |= ((TIM_ICPolarity << 4U) & (TIM_CCER_CC2P | TIM_CCER_CC2NP));
- 8010672: 68bb ldr r3, [r7, #8]
- 8010674: 011b lsls r3, r3, #4
- 8010676: f003 03a0 and.w r3, r3, #160 @ 0xa0
- 801067a: 697a ldr r2, [r7, #20]
- 801067c: 4313 orrs r3, r2
- 801067e: 617b str r3, [r7, #20]
- /* Write to TIMx CCMR1 and CCER registers */
- TIMx->CCMR1 = tmpccmr1 ;
- 8010680: 68fb ldr r3, [r7, #12]
- 8010682: 693a ldr r2, [r7, #16]
- 8010684: 619a str r2, [r3, #24]
- TIMx->CCER = tmpccer;
- 8010686: 68fb ldr r3, [r7, #12]
- 8010688: 697a ldr r2, [r7, #20]
- 801068a: 621a str r2, [r3, #32]
- }
- 801068c: bf00 nop
- 801068e: 371c adds r7, #28
- 8010690: 46bd mov sp, r7
- 8010692: f85d 7b04 ldr.w r7, [sp], #4
- 8010696: 4770 bx lr
- 08010698 <TIM_TI2_ConfigInputStage>:
- * @param TIM_ICFilter Specifies the Input Capture Filter.
- * This parameter must be a value between 0x00 and 0x0F.
- * @retval None
- */
- static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
- {
- 8010698: b480 push {r7}
- 801069a: b087 sub sp, #28
- 801069c: af00 add r7, sp, #0
- 801069e: 60f8 str r0, [r7, #12]
- 80106a0: 60b9 str r1, [r7, #8]
- 80106a2: 607a str r2, [r7, #4]
- uint32_t tmpccmr1;
- uint32_t tmpccer;
- /* Disable the Channel 2: Reset the CC2E Bit */
- tmpccer = TIMx->CCER;
- 80106a4: 68fb ldr r3, [r7, #12]
- 80106a6: 6a1b ldr r3, [r3, #32]
- 80106a8: 617b str r3, [r7, #20]
- TIMx->CCER &= ~TIM_CCER_CC2E;
- 80106aa: 68fb ldr r3, [r7, #12]
- 80106ac: 6a1b ldr r3, [r3, #32]
- 80106ae: f023 0210 bic.w r2, r3, #16
- 80106b2: 68fb ldr r3, [r7, #12]
- 80106b4: 621a str r2, [r3, #32]
- tmpccmr1 = TIMx->CCMR1;
- 80106b6: 68fb ldr r3, [r7, #12]
- 80106b8: 699b ldr r3, [r3, #24]
- 80106ba: 613b str r3, [r7, #16]
- /* Set the filter */
- tmpccmr1 &= ~TIM_CCMR1_IC2F;
- 80106bc: 693b ldr r3, [r7, #16]
- 80106be: f423 4370 bic.w r3, r3, #61440 @ 0xf000
- 80106c2: 613b str r3, [r7, #16]
- tmpccmr1 |= (TIM_ICFilter << 12U);
- 80106c4: 687b ldr r3, [r7, #4]
- 80106c6: 031b lsls r3, r3, #12
- 80106c8: 693a ldr r2, [r7, #16]
- 80106ca: 4313 orrs r3, r2
- 80106cc: 613b str r3, [r7, #16]
- /* Select the Polarity and set the CC2E Bit */
- tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
- 80106ce: 697b ldr r3, [r7, #20]
- 80106d0: f023 03a0 bic.w r3, r3, #160 @ 0xa0
- 80106d4: 617b str r3, [r7, #20]
- tmpccer |= (TIM_ICPolarity << 4U);
- 80106d6: 68bb ldr r3, [r7, #8]
- 80106d8: 011b lsls r3, r3, #4
- 80106da: 697a ldr r2, [r7, #20]
- 80106dc: 4313 orrs r3, r2
- 80106de: 617b str r3, [r7, #20]
- /* Write to TIMx CCMR1 and CCER registers */
- TIMx->CCMR1 = tmpccmr1 ;
- 80106e0: 68fb ldr r3, [r7, #12]
- 80106e2: 693a ldr r2, [r7, #16]
- 80106e4: 619a str r2, [r3, #24]
- TIMx->CCER = tmpccer;
- 80106e6: 68fb ldr r3, [r7, #12]
- 80106e8: 697a ldr r2, [r7, #20]
- 80106ea: 621a str r2, [r3, #32]
- }
- 80106ec: bf00 nop
- 80106ee: 371c adds r7, #28
- 80106f0: 46bd mov sp, r7
- 80106f2: f85d 7b04 ldr.w r7, [sp], #4
- 80106f6: 4770 bx lr
- 080106f8 <TIM_TI3_SetConfig>:
- * (on channel1 path) is used as the input signal. Therefore CCMR2 must be
- * protected against un-initialized filter and polarity values.
- */
- static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
- uint32_t TIM_ICFilter)
- {
- 80106f8: b480 push {r7}
- 80106fa: b087 sub sp, #28
- 80106fc: af00 add r7, sp, #0
- 80106fe: 60f8 str r0, [r7, #12]
- 8010700: 60b9 str r1, [r7, #8]
- 8010702: 607a str r2, [r7, #4]
- 8010704: 603b str r3, [r7, #0]
- uint32_t tmpccmr2;
- uint32_t tmpccer;
- /* Disable the Channel 3: Reset the CC3E Bit */
- tmpccer = TIMx->CCER;
- 8010706: 68fb ldr r3, [r7, #12]
- 8010708: 6a1b ldr r3, [r3, #32]
- 801070a: 617b str r3, [r7, #20]
- TIMx->CCER &= ~TIM_CCER_CC3E;
- 801070c: 68fb ldr r3, [r7, #12]
- 801070e: 6a1b ldr r3, [r3, #32]
- 8010710: f423 7280 bic.w r2, r3, #256 @ 0x100
- 8010714: 68fb ldr r3, [r7, #12]
- 8010716: 621a str r2, [r3, #32]
- tmpccmr2 = TIMx->CCMR2;
- 8010718: 68fb ldr r3, [r7, #12]
- 801071a: 69db ldr r3, [r3, #28]
- 801071c: 613b str r3, [r7, #16]
- /* Select the Input */
- tmpccmr2 &= ~TIM_CCMR2_CC3S;
- 801071e: 693b ldr r3, [r7, #16]
- 8010720: f023 0303 bic.w r3, r3, #3
- 8010724: 613b str r3, [r7, #16]
- tmpccmr2 |= TIM_ICSelection;
- 8010726: 693a ldr r2, [r7, #16]
- 8010728: 687b ldr r3, [r7, #4]
- 801072a: 4313 orrs r3, r2
- 801072c: 613b str r3, [r7, #16]
- /* Set the filter */
- tmpccmr2 &= ~TIM_CCMR2_IC3F;
- 801072e: 693b ldr r3, [r7, #16]
- 8010730: f023 03f0 bic.w r3, r3, #240 @ 0xf0
- 8010734: 613b str r3, [r7, #16]
- tmpccmr2 |= ((TIM_ICFilter << 4U) & TIM_CCMR2_IC3F);
- 8010736: 683b ldr r3, [r7, #0]
- 8010738: 011b lsls r3, r3, #4
- 801073a: b2db uxtb r3, r3
- 801073c: 693a ldr r2, [r7, #16]
- 801073e: 4313 orrs r3, r2
- 8010740: 613b str r3, [r7, #16]
- /* Select the Polarity and set the CC3E Bit */
- tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP);
- 8010742: 697b ldr r3, [r7, #20]
- 8010744: f423 6320 bic.w r3, r3, #2560 @ 0xa00
- 8010748: 617b str r3, [r7, #20]
- tmpccer |= ((TIM_ICPolarity << 8U) & (TIM_CCER_CC3P | TIM_CCER_CC3NP));
- 801074a: 68bb ldr r3, [r7, #8]
- 801074c: 021b lsls r3, r3, #8
- 801074e: f403 6320 and.w r3, r3, #2560 @ 0xa00
- 8010752: 697a ldr r2, [r7, #20]
- 8010754: 4313 orrs r3, r2
- 8010756: 617b str r3, [r7, #20]
- /* Write to TIMx CCMR2 and CCER registers */
- TIMx->CCMR2 = tmpccmr2;
- 8010758: 68fb ldr r3, [r7, #12]
- 801075a: 693a ldr r2, [r7, #16]
- 801075c: 61da str r2, [r3, #28]
- TIMx->CCER = tmpccer;
- 801075e: 68fb ldr r3, [r7, #12]
- 8010760: 697a ldr r2, [r7, #20]
- 8010762: 621a str r2, [r3, #32]
- }
- 8010764: bf00 nop
- 8010766: 371c adds r7, #28
- 8010768: 46bd mov sp, r7
- 801076a: f85d 7b04 ldr.w r7, [sp], #4
- 801076e: 4770 bx lr
- 08010770 <TIM_TI4_SetConfig>:
- * protected against un-initialized filter and polarity values.
- * @retval None
- */
- static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
- uint32_t TIM_ICFilter)
- {
- 8010770: b480 push {r7}
- 8010772: b087 sub sp, #28
- 8010774: af00 add r7, sp, #0
- 8010776: 60f8 str r0, [r7, #12]
- 8010778: 60b9 str r1, [r7, #8]
- 801077a: 607a str r2, [r7, #4]
- 801077c: 603b str r3, [r7, #0]
- uint32_t tmpccmr2;
- uint32_t tmpccer;
- /* Disable the Channel 4: Reset the CC4E Bit */
- tmpccer = TIMx->CCER;
- 801077e: 68fb ldr r3, [r7, #12]
- 8010780: 6a1b ldr r3, [r3, #32]
- 8010782: 617b str r3, [r7, #20]
- TIMx->CCER &= ~TIM_CCER_CC4E;
- 8010784: 68fb ldr r3, [r7, #12]
- 8010786: 6a1b ldr r3, [r3, #32]
- 8010788: f423 5280 bic.w r2, r3, #4096 @ 0x1000
- 801078c: 68fb ldr r3, [r7, #12]
- 801078e: 621a str r2, [r3, #32]
- tmpccmr2 = TIMx->CCMR2;
- 8010790: 68fb ldr r3, [r7, #12]
- 8010792: 69db ldr r3, [r3, #28]
- 8010794: 613b str r3, [r7, #16]
- /* Select the Input */
- tmpccmr2 &= ~TIM_CCMR2_CC4S;
- 8010796: 693b ldr r3, [r7, #16]
- 8010798: f423 7340 bic.w r3, r3, #768 @ 0x300
- 801079c: 613b str r3, [r7, #16]
- tmpccmr2 |= (TIM_ICSelection << 8U);
- 801079e: 687b ldr r3, [r7, #4]
- 80107a0: 021b lsls r3, r3, #8
- 80107a2: 693a ldr r2, [r7, #16]
- 80107a4: 4313 orrs r3, r2
- 80107a6: 613b str r3, [r7, #16]
- /* Set the filter */
- tmpccmr2 &= ~TIM_CCMR2_IC4F;
- 80107a8: 693b ldr r3, [r7, #16]
- 80107aa: f423 4370 bic.w r3, r3, #61440 @ 0xf000
- 80107ae: 613b str r3, [r7, #16]
- tmpccmr2 |= ((TIM_ICFilter << 12U) & TIM_CCMR2_IC4F);
- 80107b0: 683b ldr r3, [r7, #0]
- 80107b2: 031b lsls r3, r3, #12
- 80107b4: b29b uxth r3, r3
- 80107b6: 693a ldr r2, [r7, #16]
- 80107b8: 4313 orrs r3, r2
- 80107ba: 613b str r3, [r7, #16]
- /* Select the Polarity and set the CC4E Bit */
- tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP);
- 80107bc: 697b ldr r3, [r7, #20]
- 80107be: f423 4320 bic.w r3, r3, #40960 @ 0xa000
- 80107c2: 617b str r3, [r7, #20]
- tmpccer |= ((TIM_ICPolarity << 12U) & (TIM_CCER_CC4P | TIM_CCER_CC4NP));
- 80107c4: 68bb ldr r3, [r7, #8]
- 80107c6: 031b lsls r3, r3, #12
- 80107c8: f403 4320 and.w r3, r3, #40960 @ 0xa000
- 80107cc: 697a ldr r2, [r7, #20]
- 80107ce: 4313 orrs r3, r2
- 80107d0: 617b str r3, [r7, #20]
- /* Write to TIMx CCMR2 and CCER registers */
- TIMx->CCMR2 = tmpccmr2;
- 80107d2: 68fb ldr r3, [r7, #12]
- 80107d4: 693a ldr r2, [r7, #16]
- 80107d6: 61da str r2, [r3, #28]
- TIMx->CCER = tmpccer ;
- 80107d8: 68fb ldr r3, [r7, #12]
- 80107da: 697a ldr r2, [r7, #20]
- 80107dc: 621a str r2, [r3, #32]
- }
- 80107de: bf00 nop
- 80107e0: 371c adds r7, #28
- 80107e2: 46bd mov sp, r7
- 80107e4: f85d 7b04 ldr.w r7, [sp], #4
- 80107e8: 4770 bx lr
- ...
- 080107ec <TIM_ITRx_SetConfig>:
- * (*) Value not defined in all devices.
- *
- * @retval None
- */
- static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
- {
- 80107ec: b480 push {r7}
- 80107ee: b085 sub sp, #20
- 80107f0: af00 add r7, sp, #0
- 80107f2: 6078 str r0, [r7, #4]
- 80107f4: 6039 str r1, [r7, #0]
- uint32_t tmpsmcr;
- /* Get the TIMx SMCR register value */
- tmpsmcr = TIMx->SMCR;
- 80107f6: 687b ldr r3, [r7, #4]
- 80107f8: 689b ldr r3, [r3, #8]
- 80107fa: 60fb str r3, [r7, #12]
- /* Reset the TS Bits */
- tmpsmcr &= ~TIM_SMCR_TS;
- 80107fc: 68fa ldr r2, [r7, #12]
- 80107fe: 4b09 ldr r3, [pc, #36] @ (8010824 <TIM_ITRx_SetConfig+0x38>)
- 8010800: 4013 ands r3, r2
- 8010802: 60fb str r3, [r7, #12]
- /* Set the Input Trigger source and the slave mode*/
- tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
- 8010804: 683a ldr r2, [r7, #0]
- 8010806: 68fb ldr r3, [r7, #12]
- 8010808: 4313 orrs r3, r2
- 801080a: f043 0307 orr.w r3, r3, #7
- 801080e: 60fb str r3, [r7, #12]
- /* Write to TIMx SMCR */
- TIMx->SMCR = tmpsmcr;
- 8010810: 687b ldr r3, [r7, #4]
- 8010812: 68fa ldr r2, [r7, #12]
- 8010814: 609a str r2, [r3, #8]
- }
- 8010816: bf00 nop
- 8010818: 3714 adds r7, #20
- 801081a: 46bd mov sp, r7
- 801081c: f85d 7b04 ldr.w r7, [sp], #4
- 8010820: 4770 bx lr
- 8010822: bf00 nop
- 8010824: ffcfff8f .word 0xffcfff8f
- 08010828 <TIM_ETR_SetConfig>:
- * This parameter must be a value between 0x00 and 0x0F
- * @retval None
- */
- void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
- uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
- {
- 8010828: b480 push {r7}
- 801082a: b087 sub sp, #28
- 801082c: af00 add r7, sp, #0
- 801082e: 60f8 str r0, [r7, #12]
- 8010830: 60b9 str r1, [r7, #8]
- 8010832: 607a str r2, [r7, #4]
- 8010834: 603b str r3, [r7, #0]
- uint32_t tmpsmcr;
- tmpsmcr = TIMx->SMCR;
- 8010836: 68fb ldr r3, [r7, #12]
- 8010838: 689b ldr r3, [r3, #8]
- 801083a: 617b str r3, [r7, #20]
- /* Reset the ETR Bits */
- tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
- 801083c: 697b ldr r3, [r7, #20]
- 801083e: f423 437f bic.w r3, r3, #65280 @ 0xff00
- 8010842: 617b str r3, [r7, #20]
- /* Set the Prescaler, the Filter value and the Polarity */
- tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
- 8010844: 683b ldr r3, [r7, #0]
- 8010846: 021a lsls r2, r3, #8
- 8010848: 687b ldr r3, [r7, #4]
- 801084a: 431a orrs r2, r3
- 801084c: 68bb ldr r3, [r7, #8]
- 801084e: 4313 orrs r3, r2
- 8010850: 697a ldr r2, [r7, #20]
- 8010852: 4313 orrs r3, r2
- 8010854: 617b str r3, [r7, #20]
- /* Write to TIMx SMCR */
- TIMx->SMCR = tmpsmcr;
- 8010856: 68fb ldr r3, [r7, #12]
- 8010858: 697a ldr r2, [r7, #20]
- 801085a: 609a str r2, [r3, #8]
- }
- 801085c: bf00 nop
- 801085e: 371c adds r7, #28
- 8010860: 46bd mov sp, r7
- 8010862: f85d 7b04 ldr.w r7, [sp], #4
- 8010866: 4770 bx lr
- 08010868 <TIM_CCxChannelCmd>:
- * @param ChannelState specifies the TIM Channel CCxE bit new state.
- * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
- * @retval None
- */
- void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
- {
- 8010868: b480 push {r7}
- 801086a: b087 sub sp, #28
- 801086c: af00 add r7, sp, #0
- 801086e: 60f8 str r0, [r7, #12]
- 8010870: 60b9 str r1, [r7, #8]
- 8010872: 607a str r2, [r7, #4]
- /* Check the parameters */
- assert_param(IS_TIM_CC1_INSTANCE(TIMx));
- assert_param(IS_TIM_CHANNELS(Channel));
- tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
- 8010874: 68bb ldr r3, [r7, #8]
- 8010876: f003 031f and.w r3, r3, #31
- 801087a: 2201 movs r2, #1
- 801087c: fa02 f303 lsl.w r3, r2, r3
- 8010880: 617b str r3, [r7, #20]
- /* Reset the CCxE Bit */
- TIMx->CCER &= ~tmp;
- 8010882: 68fb ldr r3, [r7, #12]
- 8010884: 6a1a ldr r2, [r3, #32]
- 8010886: 697b ldr r3, [r7, #20]
- 8010888: 43db mvns r3, r3
- 801088a: 401a ands r2, r3
- 801088c: 68fb ldr r3, [r7, #12]
- 801088e: 621a str r2, [r3, #32]
- /* Set or reset the CCxE Bit */
- TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
- 8010890: 68fb ldr r3, [r7, #12]
- 8010892: 6a1a ldr r2, [r3, #32]
- 8010894: 68bb ldr r3, [r7, #8]
- 8010896: f003 031f and.w r3, r3, #31
- 801089a: 6879 ldr r1, [r7, #4]
- 801089c: fa01 f303 lsl.w r3, r1, r3
- 80108a0: 431a orrs r2, r3
- 80108a2: 68fb ldr r3, [r7, #12]
- 80108a4: 621a str r2, [r3, #32]
- }
- 80108a6: bf00 nop
- 80108a8: 371c adds r7, #28
- 80108aa: 46bd mov sp, r7
- 80108ac: f85d 7b04 ldr.w r7, [sp], #4
- 80108b0: 4770 bx lr
- ...
- 080108b4 <HAL_TIMEx_MasterConfigSynchronization>:
- * mode.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
- const TIM_MasterConfigTypeDef *sMasterConfig)
- {
- 80108b4: b480 push {r7}
- 80108b6: b085 sub sp, #20
- 80108b8: af00 add r7, sp, #0
- 80108ba: 6078 str r0, [r7, #4]
- 80108bc: 6039 str r1, [r7, #0]
- assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
- assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
- assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
- /* Check input state */
- __HAL_LOCK(htim);
- 80108be: 687b ldr r3, [r7, #4]
- 80108c0: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
- 80108c4: 2b01 cmp r3, #1
- 80108c6: d101 bne.n 80108cc <HAL_TIMEx_MasterConfigSynchronization+0x18>
- 80108c8: 2302 movs r3, #2
- 80108ca: e06d b.n 80109a8 <HAL_TIMEx_MasterConfigSynchronization+0xf4>
- 80108cc: 687b ldr r3, [r7, #4]
- 80108ce: 2201 movs r2, #1
- 80108d0: f883 203c strb.w r2, [r3, #60] @ 0x3c
- /* Change the handler state */
- htim->State = HAL_TIM_STATE_BUSY;
- 80108d4: 687b ldr r3, [r7, #4]
- 80108d6: 2202 movs r2, #2
- 80108d8: f883 203d strb.w r2, [r3, #61] @ 0x3d
- /* Get the TIMx CR2 register value */
- tmpcr2 = htim->Instance->CR2;
- 80108dc: 687b ldr r3, [r7, #4]
- 80108de: 681b ldr r3, [r3, #0]
- 80108e0: 685b ldr r3, [r3, #4]
- 80108e2: 60fb str r3, [r7, #12]
- /* Get the TIMx SMCR register value */
- tmpsmcr = htim->Instance->SMCR;
- 80108e4: 687b ldr r3, [r7, #4]
- 80108e6: 681b ldr r3, [r3, #0]
- 80108e8: 689b ldr r3, [r3, #8]
- 80108ea: 60bb str r3, [r7, #8]
- /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
- if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
- 80108ec: 687b ldr r3, [r7, #4]
- 80108ee: 681b ldr r3, [r3, #0]
- 80108f0: 4a30 ldr r2, [pc, #192] @ (80109b4 <HAL_TIMEx_MasterConfigSynchronization+0x100>)
- 80108f2: 4293 cmp r3, r2
- 80108f4: d004 beq.n 8010900 <HAL_TIMEx_MasterConfigSynchronization+0x4c>
- 80108f6: 687b ldr r3, [r7, #4]
- 80108f8: 681b ldr r3, [r3, #0]
- 80108fa: 4a2f ldr r2, [pc, #188] @ (80109b8 <HAL_TIMEx_MasterConfigSynchronization+0x104>)
- 80108fc: 4293 cmp r3, r2
- 80108fe: d108 bne.n 8010912 <HAL_TIMEx_MasterConfigSynchronization+0x5e>
- {
- /* Check the parameters */
- assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
- /* Clear the MMS2 bits */
- tmpcr2 &= ~TIM_CR2_MMS2;
- 8010900: 68fb ldr r3, [r7, #12]
- 8010902: f423 0370 bic.w r3, r3, #15728640 @ 0xf00000
- 8010906: 60fb str r3, [r7, #12]
- /* Select the TRGO2 source*/
- tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
- 8010908: 683b ldr r3, [r7, #0]
- 801090a: 685b ldr r3, [r3, #4]
- 801090c: 68fa ldr r2, [r7, #12]
- 801090e: 4313 orrs r3, r2
- 8010910: 60fb str r3, [r7, #12]
- }
- /* Reset the MMS Bits */
- tmpcr2 &= ~TIM_CR2_MMS;
- 8010912: 68fb ldr r3, [r7, #12]
- 8010914: f023 0370 bic.w r3, r3, #112 @ 0x70
- 8010918: 60fb str r3, [r7, #12]
- /* Select the TRGO source */
- tmpcr2 |= sMasterConfig->MasterOutputTrigger;
- 801091a: 683b ldr r3, [r7, #0]
- 801091c: 681b ldr r3, [r3, #0]
- 801091e: 68fa ldr r2, [r7, #12]
- 8010920: 4313 orrs r3, r2
- 8010922: 60fb str r3, [r7, #12]
- /* Update TIMx CR2 */
- htim->Instance->CR2 = tmpcr2;
- 8010924: 687b ldr r3, [r7, #4]
- 8010926: 681b ldr r3, [r3, #0]
- 8010928: 68fa ldr r2, [r7, #12]
- 801092a: 605a str r2, [r3, #4]
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- 801092c: 687b ldr r3, [r7, #4]
- 801092e: 681b ldr r3, [r3, #0]
- 8010930: 4a20 ldr r2, [pc, #128] @ (80109b4 <HAL_TIMEx_MasterConfigSynchronization+0x100>)
- 8010932: 4293 cmp r3, r2
- 8010934: d022 beq.n 801097c <HAL_TIMEx_MasterConfigSynchronization+0xc8>
- 8010936: 687b ldr r3, [r7, #4]
- 8010938: 681b ldr r3, [r3, #0]
- 801093a: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
- 801093e: d01d beq.n 801097c <HAL_TIMEx_MasterConfigSynchronization+0xc8>
- 8010940: 687b ldr r3, [r7, #4]
- 8010942: 681b ldr r3, [r3, #0]
- 8010944: 4a1d ldr r2, [pc, #116] @ (80109bc <HAL_TIMEx_MasterConfigSynchronization+0x108>)
- 8010946: 4293 cmp r3, r2
- 8010948: d018 beq.n 801097c <HAL_TIMEx_MasterConfigSynchronization+0xc8>
- 801094a: 687b ldr r3, [r7, #4]
- 801094c: 681b ldr r3, [r3, #0]
- 801094e: 4a1c ldr r2, [pc, #112] @ (80109c0 <HAL_TIMEx_MasterConfigSynchronization+0x10c>)
- 8010950: 4293 cmp r3, r2
- 8010952: d013 beq.n 801097c <HAL_TIMEx_MasterConfigSynchronization+0xc8>
- 8010954: 687b ldr r3, [r7, #4]
- 8010956: 681b ldr r3, [r3, #0]
- 8010958: 4a1a ldr r2, [pc, #104] @ (80109c4 <HAL_TIMEx_MasterConfigSynchronization+0x110>)
- 801095a: 4293 cmp r3, r2
- 801095c: d00e beq.n 801097c <HAL_TIMEx_MasterConfigSynchronization+0xc8>
- 801095e: 687b ldr r3, [r7, #4]
- 8010960: 681b ldr r3, [r3, #0]
- 8010962: 4a15 ldr r2, [pc, #84] @ (80109b8 <HAL_TIMEx_MasterConfigSynchronization+0x104>)
- 8010964: 4293 cmp r3, r2
- 8010966: d009 beq.n 801097c <HAL_TIMEx_MasterConfigSynchronization+0xc8>
- 8010968: 687b ldr r3, [r7, #4]
- 801096a: 681b ldr r3, [r3, #0]
- 801096c: 4a16 ldr r2, [pc, #88] @ (80109c8 <HAL_TIMEx_MasterConfigSynchronization+0x114>)
- 801096e: 4293 cmp r3, r2
- 8010970: d004 beq.n 801097c <HAL_TIMEx_MasterConfigSynchronization+0xc8>
- 8010972: 687b ldr r3, [r7, #4]
- 8010974: 681b ldr r3, [r3, #0]
- 8010976: 4a15 ldr r2, [pc, #84] @ (80109cc <HAL_TIMEx_MasterConfigSynchronization+0x118>)
- 8010978: 4293 cmp r3, r2
- 801097a: d10c bne.n 8010996 <HAL_TIMEx_MasterConfigSynchronization+0xe2>
- {
- /* Reset the MSM Bit */
- tmpsmcr &= ~TIM_SMCR_MSM;
- 801097c: 68bb ldr r3, [r7, #8]
- 801097e: f023 0380 bic.w r3, r3, #128 @ 0x80
- 8010982: 60bb str r3, [r7, #8]
- /* Set master mode */
- tmpsmcr |= sMasterConfig->MasterSlaveMode;
- 8010984: 683b ldr r3, [r7, #0]
- 8010986: 689b ldr r3, [r3, #8]
- 8010988: 68ba ldr r2, [r7, #8]
- 801098a: 4313 orrs r3, r2
- 801098c: 60bb str r3, [r7, #8]
- /* Update TIMx SMCR */
- htim->Instance->SMCR = tmpsmcr;
- 801098e: 687b ldr r3, [r7, #4]
- 8010990: 681b ldr r3, [r3, #0]
- 8010992: 68ba ldr r2, [r7, #8]
- 8010994: 609a str r2, [r3, #8]
- }
- /* Change the htim state */
- htim->State = HAL_TIM_STATE_READY;
- 8010996: 687b ldr r3, [r7, #4]
- 8010998: 2201 movs r2, #1
- 801099a: f883 203d strb.w r2, [r3, #61] @ 0x3d
- __HAL_UNLOCK(htim);
- 801099e: 687b ldr r3, [r7, #4]
- 80109a0: 2200 movs r2, #0
- 80109a2: f883 203c strb.w r2, [r3, #60] @ 0x3c
- return HAL_OK;
- 80109a6: 2300 movs r3, #0
- }
- 80109a8: 4618 mov r0, r3
- 80109aa: 3714 adds r7, #20
- 80109ac: 46bd mov sp, r7
- 80109ae: f85d 7b04 ldr.w r7, [sp], #4
- 80109b2: 4770 bx lr
- 80109b4: 40010000 .word 0x40010000
- 80109b8: 40010400 .word 0x40010400
- 80109bc: 40000400 .word 0x40000400
- 80109c0: 40000800 .word 0x40000800
- 80109c4: 40000c00 .word 0x40000c00
- 80109c8: 40001800 .word 0x40001800
- 80109cc: 40014000 .word 0x40014000
- 080109d0 <HAL_TIMEx_ConfigBreakDeadTime>:
- * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
- const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
- {
- 80109d0: b480 push {r7}
- 80109d2: b085 sub sp, #20
- 80109d4: af00 add r7, sp, #0
- 80109d6: 6078 str r0, [r7, #4]
- 80109d8: 6039 str r1, [r7, #0]
- /* Keep this variable initialized to 0 as it is used to configure BDTR register */
- uint32_t tmpbdtr = 0U;
- 80109da: 2300 movs r3, #0
- 80109dc: 60fb str r3, [r7, #12]
- #if defined(TIM_BDTR_BKBID)
- assert_param(IS_TIM_BREAK_AFMODE(sBreakDeadTimeConfig->BreakAFMode));
- #endif /* TIM_BDTR_BKBID */
- /* Check input state */
- __HAL_LOCK(htim);
- 80109de: 687b ldr r3, [r7, #4]
- 80109e0: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
- 80109e4: 2b01 cmp r3, #1
- 80109e6: d101 bne.n 80109ec <HAL_TIMEx_ConfigBreakDeadTime+0x1c>
- 80109e8: 2302 movs r3, #2
- 80109ea: e065 b.n 8010ab8 <HAL_TIMEx_ConfigBreakDeadTime+0xe8>
- 80109ec: 687b ldr r3, [r7, #4]
- 80109ee: 2201 movs r2, #1
- 80109f0: f883 203c strb.w r2, [r3, #60] @ 0x3c
- /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
- the OSSI State, the dead time value and the Automatic Output Enable Bit */
- /* Set the BDTR bits */
- MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
- 80109f4: 68fb ldr r3, [r7, #12]
- 80109f6: f023 02ff bic.w r2, r3, #255 @ 0xff
- 80109fa: 683b ldr r3, [r7, #0]
- 80109fc: 68db ldr r3, [r3, #12]
- 80109fe: 4313 orrs r3, r2
- 8010a00: 60fb str r3, [r7, #12]
- MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
- 8010a02: 68fb ldr r3, [r7, #12]
- 8010a04: f423 7240 bic.w r2, r3, #768 @ 0x300
- 8010a08: 683b ldr r3, [r7, #0]
- 8010a0a: 689b ldr r3, [r3, #8]
- 8010a0c: 4313 orrs r3, r2
- 8010a0e: 60fb str r3, [r7, #12]
- MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
- 8010a10: 68fb ldr r3, [r7, #12]
- 8010a12: f423 6280 bic.w r2, r3, #1024 @ 0x400
- 8010a16: 683b ldr r3, [r7, #0]
- 8010a18: 685b ldr r3, [r3, #4]
- 8010a1a: 4313 orrs r3, r2
- 8010a1c: 60fb str r3, [r7, #12]
- MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
- 8010a1e: 68fb ldr r3, [r7, #12]
- 8010a20: f423 6200 bic.w r2, r3, #2048 @ 0x800
- 8010a24: 683b ldr r3, [r7, #0]
- 8010a26: 681b ldr r3, [r3, #0]
- 8010a28: 4313 orrs r3, r2
- 8010a2a: 60fb str r3, [r7, #12]
- MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
- 8010a2c: 68fb ldr r3, [r7, #12]
- 8010a2e: f423 5280 bic.w r2, r3, #4096 @ 0x1000
- 8010a32: 683b ldr r3, [r7, #0]
- 8010a34: 691b ldr r3, [r3, #16]
- 8010a36: 4313 orrs r3, r2
- 8010a38: 60fb str r3, [r7, #12]
- MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
- 8010a3a: 68fb ldr r3, [r7, #12]
- 8010a3c: f423 5200 bic.w r2, r3, #8192 @ 0x2000
- 8010a40: 683b ldr r3, [r7, #0]
- 8010a42: 695b ldr r3, [r3, #20]
- 8010a44: 4313 orrs r3, r2
- 8010a46: 60fb str r3, [r7, #12]
- MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
- 8010a48: 68fb ldr r3, [r7, #12]
- 8010a4a: f423 4280 bic.w r2, r3, #16384 @ 0x4000
- 8010a4e: 683b ldr r3, [r7, #0]
- 8010a50: 6a9b ldr r3, [r3, #40] @ 0x28
- 8010a52: 4313 orrs r3, r2
- 8010a54: 60fb str r3, [r7, #12]
- MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos));
- 8010a56: 68fb ldr r3, [r7, #12]
- 8010a58: f423 2270 bic.w r2, r3, #983040 @ 0xf0000
- 8010a5c: 683b ldr r3, [r7, #0]
- 8010a5e: 699b ldr r3, [r3, #24]
- 8010a60: 041b lsls r3, r3, #16
- 8010a62: 4313 orrs r3, r2
- 8010a64: 60fb str r3, [r7, #12]
- #if defined(TIM_BDTR_BKBID)
- MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode);
- #endif /* TIM_BDTR_BKBID */
- if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
- 8010a66: 687b ldr r3, [r7, #4]
- 8010a68: 681b ldr r3, [r3, #0]
- 8010a6a: 4a16 ldr r2, [pc, #88] @ (8010ac4 <HAL_TIMEx_ConfigBreakDeadTime+0xf4>)
- 8010a6c: 4293 cmp r3, r2
- 8010a6e: d004 beq.n 8010a7a <HAL_TIMEx_ConfigBreakDeadTime+0xaa>
- 8010a70: 687b ldr r3, [r7, #4]
- 8010a72: 681b ldr r3, [r3, #0]
- 8010a74: 4a14 ldr r2, [pc, #80] @ (8010ac8 <HAL_TIMEx_ConfigBreakDeadTime+0xf8>)
- 8010a76: 4293 cmp r3, r2
- 8010a78: d115 bne.n 8010aa6 <HAL_TIMEx_ConfigBreakDeadTime+0xd6>
- #if defined(TIM_BDTR_BKBID)
- assert_param(IS_TIM_BREAK2_AFMODE(sBreakDeadTimeConfig->Break2AFMode));
- #endif /* TIM_BDTR_BKBID */
- /* Set the BREAK2 input related BDTR bits */
- MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos));
- 8010a7a: 68fb ldr r3, [r7, #12]
- 8010a7c: f423 0270 bic.w r2, r3, #15728640 @ 0xf00000
- 8010a80: 683b ldr r3, [r7, #0]
- 8010a82: 6a5b ldr r3, [r3, #36] @ 0x24
- 8010a84: 051b lsls r3, r3, #20
- 8010a86: 4313 orrs r3, r2
- 8010a88: 60fb str r3, [r7, #12]
- MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
- 8010a8a: 68fb ldr r3, [r7, #12]
- 8010a8c: f023 7280 bic.w r2, r3, #16777216 @ 0x1000000
- 8010a90: 683b ldr r3, [r7, #0]
- 8010a92: 69db ldr r3, [r3, #28]
- 8010a94: 4313 orrs r3, r2
- 8010a96: 60fb str r3, [r7, #12]
- MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
- 8010a98: 68fb ldr r3, [r7, #12]
- 8010a9a: f023 7200 bic.w r2, r3, #33554432 @ 0x2000000
- 8010a9e: 683b ldr r3, [r7, #0]
- 8010aa0: 6a1b ldr r3, [r3, #32]
- 8010aa2: 4313 orrs r3, r2
- 8010aa4: 60fb str r3, [r7, #12]
- MODIFY_REG(tmpbdtr, TIM_BDTR_BK2BID, sBreakDeadTimeConfig->Break2AFMode);
- #endif /* TIM_BDTR_BKBID */
- }
- /* Set TIMx_BDTR */
- htim->Instance->BDTR = tmpbdtr;
- 8010aa6: 687b ldr r3, [r7, #4]
- 8010aa8: 681b ldr r3, [r3, #0]
- 8010aaa: 68fa ldr r2, [r7, #12]
- 8010aac: 645a str r2, [r3, #68] @ 0x44
- __HAL_UNLOCK(htim);
- 8010aae: 687b ldr r3, [r7, #4]
- 8010ab0: 2200 movs r2, #0
- 8010ab2: f883 203c strb.w r2, [r3, #60] @ 0x3c
- return HAL_OK;
- 8010ab6: 2300 movs r3, #0
- }
- 8010ab8: 4618 mov r0, r3
- 8010aba: 3714 adds r7, #20
- 8010abc: 46bd mov sp, r7
- 8010abe: f85d 7b04 ldr.w r7, [sp], #4
- 8010ac2: 4770 bx lr
- 8010ac4: 40010000 .word 0x40010000
- 8010ac8: 40010400 .word 0x40010400
- 08010acc <HAL_TIMEx_CommutCallback>:
- * @brief Commutation callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
- __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
- {
- 8010acc: b480 push {r7}
- 8010ace: b083 sub sp, #12
- 8010ad0: af00 add r7, sp, #0
- 8010ad2: 6078 str r0, [r7, #4]
- UNUSED(htim);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIMEx_CommutCallback could be implemented in the user file
- */
- }
- 8010ad4: bf00 nop
- 8010ad6: 370c adds r7, #12
- 8010ad8: 46bd mov sp, r7
- 8010ada: f85d 7b04 ldr.w r7, [sp], #4
- 8010ade: 4770 bx lr
- 08010ae0 <HAL_TIMEx_BreakCallback>:
- * @brief Break detection callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
- __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
- {
- 8010ae0: b480 push {r7}
- 8010ae2: b083 sub sp, #12
- 8010ae4: af00 add r7, sp, #0
- 8010ae6: 6078 str r0, [r7, #4]
- UNUSED(htim);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIMEx_BreakCallback could be implemented in the user file
- */
- }
- 8010ae8: bf00 nop
- 8010aea: 370c adds r7, #12
- 8010aec: 46bd mov sp, r7
- 8010aee: f85d 7b04 ldr.w r7, [sp], #4
- 8010af2: 4770 bx lr
- 08010af4 <HAL_TIMEx_Break2Callback>:
- * @brief Break2 detection callback in non blocking mode
- * @param htim: TIM handle
- * @retval None
- */
- __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
- {
- 8010af4: b480 push {r7}
- 8010af6: b083 sub sp, #12
- 8010af8: af00 add r7, sp, #0
- 8010afa: 6078 str r0, [r7, #4]
- UNUSED(htim);
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_TIMEx_Break2Callback could be implemented in the user file
- */
- }
- 8010afc: bf00 nop
- 8010afe: 370c adds r7, #12
- 8010b00: 46bd mov sp, r7
- 8010b02: f85d 7b04 ldr.w r7, [sp], #4
- 8010b06: 4770 bx lr
- 08010b08 <HAL_UART_Init>:
- * parameters in the UART_InitTypeDef and initialize the associated handle.
- * @param huart UART handle.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
- {
- 8010b08: b580 push {r7, lr}
- 8010b0a: b082 sub sp, #8
- 8010b0c: af00 add r7, sp, #0
- 8010b0e: 6078 str r0, [r7, #4]
- /* Check the UART handle allocation */
- if (huart == NULL)
- 8010b10: 687b ldr r3, [r7, #4]
- 8010b12: 2b00 cmp r3, #0
- 8010b14: d101 bne.n 8010b1a <HAL_UART_Init+0x12>
- {
- return HAL_ERROR;
- 8010b16: 2301 movs r3, #1
- 8010b18: e042 b.n 8010ba0 <HAL_UART_Init+0x98>
- {
- /* Check the parameters */
- assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
- }
- if (huart->gState == HAL_UART_STATE_RESET)
- 8010b1a: 687b ldr r3, [r7, #4]
- 8010b1c: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
- 8010b20: 2b00 cmp r3, #0
- 8010b22: d106 bne.n 8010b32 <HAL_UART_Init+0x2a>
- {
- /* Allocate lock resource and initialize it */
- huart->Lock = HAL_UNLOCKED;
- 8010b24: 687b ldr r3, [r7, #4]
- 8010b26: 2200 movs r2, #0
- 8010b28: f883 2084 strb.w r2, [r3, #132] @ 0x84
- /* Init the low level hardware */
- huart->MspInitCallback(huart);
- #else
- /* Init the low level hardware : GPIO, CLOCK */
- HAL_UART_MspInit(huart);
- 8010b2c: 6878 ldr r0, [r7, #4]
- 8010b2e: f7f3 f90d bl 8003d4c <HAL_UART_MspInit>
- #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
- }
- huart->gState = HAL_UART_STATE_BUSY;
- 8010b32: 687b ldr r3, [r7, #4]
- 8010b34: 2224 movs r2, #36 @ 0x24
- 8010b36: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- __HAL_UART_DISABLE(huart);
- 8010b3a: 687b ldr r3, [r7, #4]
- 8010b3c: 681b ldr r3, [r3, #0]
- 8010b3e: 681a ldr r2, [r3, #0]
- 8010b40: 687b ldr r3, [r7, #4]
- 8010b42: 681b ldr r3, [r3, #0]
- 8010b44: f022 0201 bic.w r2, r2, #1
- 8010b48: 601a str r2, [r3, #0]
- /* Perform advanced settings configuration */
- /* For some items, configuration requires to be done prior TE and RE bits are set */
- if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
- 8010b4a: 687b ldr r3, [r7, #4]
- 8010b4c: 6a9b ldr r3, [r3, #40] @ 0x28
- 8010b4e: 2b00 cmp r3, #0
- 8010b50: d002 beq.n 8010b58 <HAL_UART_Init+0x50>
- {
- UART_AdvFeatureConfig(huart);
- 8010b52: 6878 ldr r0, [r7, #4]
- 8010b54: f001 fa76 bl 8012044 <UART_AdvFeatureConfig>
- }
- /* Set the UART Communication parameters */
- if (UART_SetConfig(huart) == HAL_ERROR)
- 8010b58: 6878 ldr r0, [r7, #4]
- 8010b5a: f000 fd0b bl 8011574 <UART_SetConfig>
- 8010b5e: 4603 mov r3, r0
- 8010b60: 2b01 cmp r3, #1
- 8010b62: d101 bne.n 8010b68 <HAL_UART_Init+0x60>
- {
- return HAL_ERROR;
- 8010b64: 2301 movs r3, #1
- 8010b66: e01b b.n 8010ba0 <HAL_UART_Init+0x98>
- }
- /* In asynchronous mode, the following bits must be kept cleared:
- - LINEN and CLKEN bits in the USART_CR2 register,
- - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
- CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
- 8010b68: 687b ldr r3, [r7, #4]
- 8010b6a: 681b ldr r3, [r3, #0]
- 8010b6c: 685a ldr r2, [r3, #4]
- 8010b6e: 687b ldr r3, [r7, #4]
- 8010b70: 681b ldr r3, [r3, #0]
- 8010b72: f422 4290 bic.w r2, r2, #18432 @ 0x4800
- 8010b76: 605a str r2, [r3, #4]
- CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
- 8010b78: 687b ldr r3, [r7, #4]
- 8010b7a: 681b ldr r3, [r3, #0]
- 8010b7c: 689a ldr r2, [r3, #8]
- 8010b7e: 687b ldr r3, [r7, #4]
- 8010b80: 681b ldr r3, [r3, #0]
- 8010b82: f022 022a bic.w r2, r2, #42 @ 0x2a
- 8010b86: 609a str r2, [r3, #8]
- __HAL_UART_ENABLE(huart);
- 8010b88: 687b ldr r3, [r7, #4]
- 8010b8a: 681b ldr r3, [r3, #0]
- 8010b8c: 681a ldr r2, [r3, #0]
- 8010b8e: 687b ldr r3, [r7, #4]
- 8010b90: 681b ldr r3, [r3, #0]
- 8010b92: f042 0201 orr.w r2, r2, #1
- 8010b96: 601a str r2, [r3, #0]
- /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
- return (UART_CheckIdleState(huart));
- 8010b98: 6878 ldr r0, [r7, #4]
- 8010b9a: f001 faf5 bl 8012188 <UART_CheckIdleState>
- 8010b9e: 4603 mov r3, r0
- }
- 8010ba0: 4618 mov r0, r3
- 8010ba2: 3708 adds r7, #8
- 8010ba4: 46bd mov sp, r7
- 8010ba6: bd80 pop {r7, pc}
- 08010ba8 <HAL_UART_Transmit>:
- * @param Size Amount of data elements (u8 or u16) to be sent.
- * @param Timeout Timeout duration.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
- {
- 8010ba8: b580 push {r7, lr}
- 8010baa: b08a sub sp, #40 @ 0x28
- 8010bac: af02 add r7, sp, #8
- 8010bae: 60f8 str r0, [r7, #12]
- 8010bb0: 60b9 str r1, [r7, #8]
- 8010bb2: 603b str r3, [r7, #0]
- 8010bb4: 4613 mov r3, r2
- 8010bb6: 80fb strh r3, [r7, #6]
- const uint8_t *pdata8bits;
- const uint16_t *pdata16bits;
- uint32_t tickstart;
- /* Check that a Tx process is not already ongoing */
- if (huart->gState == HAL_UART_STATE_READY)
- 8010bb8: 68fb ldr r3, [r7, #12]
- 8010bba: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
- 8010bbe: 2b20 cmp r3, #32
- 8010bc0: d17b bne.n 8010cba <HAL_UART_Transmit+0x112>
- {
- if ((pData == NULL) || (Size == 0U))
- 8010bc2: 68bb ldr r3, [r7, #8]
- 8010bc4: 2b00 cmp r3, #0
- 8010bc6: d002 beq.n 8010bce <HAL_UART_Transmit+0x26>
- 8010bc8: 88fb ldrh r3, [r7, #6]
- 8010bca: 2b00 cmp r3, #0
- 8010bcc: d101 bne.n 8010bd2 <HAL_UART_Transmit+0x2a>
- {
- return HAL_ERROR;
- 8010bce: 2301 movs r3, #1
- 8010bd0: e074 b.n 8010cbc <HAL_UART_Transmit+0x114>
- }
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 8010bd2: 68fb ldr r3, [r7, #12]
- 8010bd4: 2200 movs r2, #0
- 8010bd6: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- huart->gState = HAL_UART_STATE_BUSY_TX;
- 8010bda: 68fb ldr r3, [r7, #12]
- 8010bdc: 2221 movs r2, #33 @ 0x21
- 8010bde: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- /* Init tickstart for timeout management */
- tickstart = HAL_GetTick();
- 8010be2: f7f4 fcc1 bl 8005568 <HAL_GetTick>
- 8010be6: 6178 str r0, [r7, #20]
- huart->TxXferSize = Size;
- 8010be8: 68fb ldr r3, [r7, #12]
- 8010bea: 88fa ldrh r2, [r7, #6]
- 8010bec: f8a3 2054 strh.w r2, [r3, #84] @ 0x54
- huart->TxXferCount = Size;
- 8010bf0: 68fb ldr r3, [r7, #12]
- 8010bf2: 88fa ldrh r2, [r7, #6]
- 8010bf4: f8a3 2056 strh.w r2, [r3, #86] @ 0x56
- /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
- if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- 8010bf8: 68fb ldr r3, [r7, #12]
- 8010bfa: 689b ldr r3, [r3, #8]
- 8010bfc: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 8010c00: d108 bne.n 8010c14 <HAL_UART_Transmit+0x6c>
- 8010c02: 68fb ldr r3, [r7, #12]
- 8010c04: 691b ldr r3, [r3, #16]
- 8010c06: 2b00 cmp r3, #0
- 8010c08: d104 bne.n 8010c14 <HAL_UART_Transmit+0x6c>
- {
- pdata8bits = NULL;
- 8010c0a: 2300 movs r3, #0
- 8010c0c: 61fb str r3, [r7, #28]
- pdata16bits = (const uint16_t *) pData;
- 8010c0e: 68bb ldr r3, [r7, #8]
- 8010c10: 61bb str r3, [r7, #24]
- 8010c12: e003 b.n 8010c1c <HAL_UART_Transmit+0x74>
- }
- else
- {
- pdata8bits = pData;
- 8010c14: 68bb ldr r3, [r7, #8]
- 8010c16: 61fb str r3, [r7, #28]
- pdata16bits = NULL;
- 8010c18: 2300 movs r3, #0
- 8010c1a: 61bb str r3, [r7, #24]
- }
- while (huart->TxXferCount > 0U)
- 8010c1c: e030 b.n 8010c80 <HAL_UART_Transmit+0xd8>
- {
- if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
- 8010c1e: 683b ldr r3, [r7, #0]
- 8010c20: 9300 str r3, [sp, #0]
- 8010c22: 697b ldr r3, [r7, #20]
- 8010c24: 2200 movs r2, #0
- 8010c26: 2180 movs r1, #128 @ 0x80
- 8010c28: 68f8 ldr r0, [r7, #12]
- 8010c2a: f001 fb57 bl 80122dc <UART_WaitOnFlagUntilTimeout>
- 8010c2e: 4603 mov r3, r0
- 8010c30: 2b00 cmp r3, #0
- 8010c32: d005 beq.n 8010c40 <HAL_UART_Transmit+0x98>
- {
- huart->gState = HAL_UART_STATE_READY;
- 8010c34: 68fb ldr r3, [r7, #12]
- 8010c36: 2220 movs r2, #32
- 8010c38: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- return HAL_TIMEOUT;
- 8010c3c: 2303 movs r3, #3
- 8010c3e: e03d b.n 8010cbc <HAL_UART_Transmit+0x114>
- }
- if (pdata8bits == NULL)
- 8010c40: 69fb ldr r3, [r7, #28]
- 8010c42: 2b00 cmp r3, #0
- 8010c44: d10b bne.n 8010c5e <HAL_UART_Transmit+0xb6>
- {
- huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU);
- 8010c46: 69bb ldr r3, [r7, #24]
- 8010c48: 881b ldrh r3, [r3, #0]
- 8010c4a: 461a mov r2, r3
- 8010c4c: 68fb ldr r3, [r7, #12]
- 8010c4e: 681b ldr r3, [r3, #0]
- 8010c50: f3c2 0208 ubfx r2, r2, #0, #9
- 8010c54: 629a str r2, [r3, #40] @ 0x28
- pdata16bits++;
- 8010c56: 69bb ldr r3, [r7, #24]
- 8010c58: 3302 adds r3, #2
- 8010c5a: 61bb str r3, [r7, #24]
- 8010c5c: e007 b.n 8010c6e <HAL_UART_Transmit+0xc6>
- }
- else
- {
- huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
- 8010c5e: 69fb ldr r3, [r7, #28]
- 8010c60: 781a ldrb r2, [r3, #0]
- 8010c62: 68fb ldr r3, [r7, #12]
- 8010c64: 681b ldr r3, [r3, #0]
- 8010c66: 629a str r2, [r3, #40] @ 0x28
- pdata8bits++;
- 8010c68: 69fb ldr r3, [r7, #28]
- 8010c6a: 3301 adds r3, #1
- 8010c6c: 61fb str r3, [r7, #28]
- }
- huart->TxXferCount--;
- 8010c6e: 68fb ldr r3, [r7, #12]
- 8010c70: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
- 8010c74: b29b uxth r3, r3
- 8010c76: 3b01 subs r3, #1
- 8010c78: b29a uxth r2, r3
- 8010c7a: 68fb ldr r3, [r7, #12]
- 8010c7c: f8a3 2056 strh.w r2, [r3, #86] @ 0x56
- while (huart->TxXferCount > 0U)
- 8010c80: 68fb ldr r3, [r7, #12]
- 8010c82: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
- 8010c86: b29b uxth r3, r3
- 8010c88: 2b00 cmp r3, #0
- 8010c8a: d1c8 bne.n 8010c1e <HAL_UART_Transmit+0x76>
- }
- if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
- 8010c8c: 683b ldr r3, [r7, #0]
- 8010c8e: 9300 str r3, [sp, #0]
- 8010c90: 697b ldr r3, [r7, #20]
- 8010c92: 2200 movs r2, #0
- 8010c94: 2140 movs r1, #64 @ 0x40
- 8010c96: 68f8 ldr r0, [r7, #12]
- 8010c98: f001 fb20 bl 80122dc <UART_WaitOnFlagUntilTimeout>
- 8010c9c: 4603 mov r3, r0
- 8010c9e: 2b00 cmp r3, #0
- 8010ca0: d005 beq.n 8010cae <HAL_UART_Transmit+0x106>
- {
- huart->gState = HAL_UART_STATE_READY;
- 8010ca2: 68fb ldr r3, [r7, #12]
- 8010ca4: 2220 movs r2, #32
- 8010ca6: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- return HAL_TIMEOUT;
- 8010caa: 2303 movs r3, #3
- 8010cac: e006 b.n 8010cbc <HAL_UART_Transmit+0x114>
- }
- /* At end of Tx process, restore huart->gState to Ready */
- huart->gState = HAL_UART_STATE_READY;
- 8010cae: 68fb ldr r3, [r7, #12]
- 8010cb0: 2220 movs r2, #32
- 8010cb2: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- return HAL_OK;
- 8010cb6: 2300 movs r3, #0
- 8010cb8: e000 b.n 8010cbc <HAL_UART_Transmit+0x114>
- }
- else
- {
- return HAL_BUSY;
- 8010cba: 2302 movs r3, #2
- }
- }
- 8010cbc: 4618 mov r0, r3
- 8010cbe: 3720 adds r7, #32
- 8010cc0: 46bd mov sp, r7
- 8010cc2: bd80 pop {r7, pc}
- 08010cc4 <HAL_UART_Transmit_IT>:
- * @param pData Pointer to data buffer (u8 or u16 data elements).
- * @param Size Amount of data elements (u8 or u16) to be sent.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
- {
- 8010cc4: b480 push {r7}
- 8010cc6: b091 sub sp, #68 @ 0x44
- 8010cc8: af00 add r7, sp, #0
- 8010cca: 60f8 str r0, [r7, #12]
- 8010ccc: 60b9 str r1, [r7, #8]
- 8010cce: 4613 mov r3, r2
- 8010cd0: 80fb strh r3, [r7, #6]
- /* Check that a Tx process is not already ongoing */
- if (huart->gState == HAL_UART_STATE_READY)
- 8010cd2: 68fb ldr r3, [r7, #12]
- 8010cd4: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
- 8010cd8: 2b20 cmp r3, #32
- 8010cda: d178 bne.n 8010dce <HAL_UART_Transmit_IT+0x10a>
- {
- if ((pData == NULL) || (Size == 0U))
- 8010cdc: 68bb ldr r3, [r7, #8]
- 8010cde: 2b00 cmp r3, #0
- 8010ce0: d002 beq.n 8010ce8 <HAL_UART_Transmit_IT+0x24>
- 8010ce2: 88fb ldrh r3, [r7, #6]
- 8010ce4: 2b00 cmp r3, #0
- 8010ce6: d101 bne.n 8010cec <HAL_UART_Transmit_IT+0x28>
- {
- return HAL_ERROR;
- 8010ce8: 2301 movs r3, #1
- 8010cea: e071 b.n 8010dd0 <HAL_UART_Transmit_IT+0x10c>
- }
- huart->pTxBuffPtr = pData;
- 8010cec: 68fb ldr r3, [r7, #12]
- 8010cee: 68ba ldr r2, [r7, #8]
- 8010cf0: 651a str r2, [r3, #80] @ 0x50
- huart->TxXferSize = Size;
- 8010cf2: 68fb ldr r3, [r7, #12]
- 8010cf4: 88fa ldrh r2, [r7, #6]
- 8010cf6: f8a3 2054 strh.w r2, [r3, #84] @ 0x54
- huart->TxXferCount = Size;
- 8010cfa: 68fb ldr r3, [r7, #12]
- 8010cfc: 88fa ldrh r2, [r7, #6]
- 8010cfe: f8a3 2056 strh.w r2, [r3, #86] @ 0x56
- huart->TxISR = NULL;
- 8010d02: 68fb ldr r3, [r7, #12]
- 8010d04: 2200 movs r2, #0
- 8010d06: 679a str r2, [r3, #120] @ 0x78
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 8010d08: 68fb ldr r3, [r7, #12]
- 8010d0a: 2200 movs r2, #0
- 8010d0c: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- huart->gState = HAL_UART_STATE_BUSY_TX;
- 8010d10: 68fb ldr r3, [r7, #12]
- 8010d12: 2221 movs r2, #33 @ 0x21
- 8010d14: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- /* Configure Tx interrupt processing */
- if (huart->FifoMode == UART_FIFOMODE_ENABLE)
- 8010d18: 68fb ldr r3, [r7, #12]
- 8010d1a: 6e5b ldr r3, [r3, #100] @ 0x64
- 8010d1c: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 8010d20: d12a bne.n 8010d78 <HAL_UART_Transmit_IT+0xb4>
- {
- /* Set the Tx ISR function pointer according to the data word length */
- if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- 8010d22: 68fb ldr r3, [r7, #12]
- 8010d24: 689b ldr r3, [r3, #8]
- 8010d26: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 8010d2a: d107 bne.n 8010d3c <HAL_UART_Transmit_IT+0x78>
- 8010d2c: 68fb ldr r3, [r7, #12]
- 8010d2e: 691b ldr r3, [r3, #16]
- 8010d30: 2b00 cmp r3, #0
- 8010d32: d103 bne.n 8010d3c <HAL_UART_Transmit_IT+0x78>
- {
- huart->TxISR = UART_TxISR_16BIT_FIFOEN;
- 8010d34: 68fb ldr r3, [r7, #12]
- 8010d36: 4a29 ldr r2, [pc, #164] @ (8010ddc <HAL_UART_Transmit_IT+0x118>)
- 8010d38: 679a str r2, [r3, #120] @ 0x78
- 8010d3a: e002 b.n 8010d42 <HAL_UART_Transmit_IT+0x7e>
- }
- else
- {
- huart->TxISR = UART_TxISR_8BIT_FIFOEN;
- 8010d3c: 68fb ldr r3, [r7, #12]
- 8010d3e: 4a28 ldr r2, [pc, #160] @ (8010de0 <HAL_UART_Transmit_IT+0x11c>)
- 8010d40: 679a str r2, [r3, #120] @ 0x78
- }
- /* Enable the TX FIFO threshold interrupt */
- ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
- 8010d42: 68fb ldr r3, [r7, #12]
- 8010d44: 681b ldr r3, [r3, #0]
- 8010d46: 3308 adds r3, #8
- 8010d48: 62bb str r3, [r7, #40] @ 0x28
- */
- __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
- {
- uint32_t result;
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8010d4a: 6abb ldr r3, [r7, #40] @ 0x28
- 8010d4c: e853 3f00 ldrex r3, [r3]
- 8010d50: 627b str r3, [r7, #36] @ 0x24
- return(result);
- 8010d52: 6a7b ldr r3, [r7, #36] @ 0x24
- 8010d54: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
- 8010d58: 63bb str r3, [r7, #56] @ 0x38
- 8010d5a: 68fb ldr r3, [r7, #12]
- 8010d5c: 681b ldr r3, [r3, #0]
- 8010d5e: 3308 adds r3, #8
- 8010d60: 6bba ldr r2, [r7, #56] @ 0x38
- 8010d62: 637a str r2, [r7, #52] @ 0x34
- 8010d64: 633b str r3, [r7, #48] @ 0x30
- */
- __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
- {
- uint32_t result;
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8010d66: 6b39 ldr r1, [r7, #48] @ 0x30
- 8010d68: 6b7a ldr r2, [r7, #52] @ 0x34
- 8010d6a: e841 2300 strex r3, r2, [r1]
- 8010d6e: 62fb str r3, [r7, #44] @ 0x2c
- return(result);
- 8010d70: 6afb ldr r3, [r7, #44] @ 0x2c
- 8010d72: 2b00 cmp r3, #0
- 8010d74: d1e5 bne.n 8010d42 <HAL_UART_Transmit_IT+0x7e>
- 8010d76: e028 b.n 8010dca <HAL_UART_Transmit_IT+0x106>
- }
- else
- {
- /* Set the Tx ISR function pointer according to the data word length */
- if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- 8010d78: 68fb ldr r3, [r7, #12]
- 8010d7a: 689b ldr r3, [r3, #8]
- 8010d7c: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 8010d80: d107 bne.n 8010d92 <HAL_UART_Transmit_IT+0xce>
- 8010d82: 68fb ldr r3, [r7, #12]
- 8010d84: 691b ldr r3, [r3, #16]
- 8010d86: 2b00 cmp r3, #0
- 8010d88: d103 bne.n 8010d92 <HAL_UART_Transmit_IT+0xce>
- {
- huart->TxISR = UART_TxISR_16BIT;
- 8010d8a: 68fb ldr r3, [r7, #12]
- 8010d8c: 4a15 ldr r2, [pc, #84] @ (8010de4 <HAL_UART_Transmit_IT+0x120>)
- 8010d8e: 679a str r2, [r3, #120] @ 0x78
- 8010d90: e002 b.n 8010d98 <HAL_UART_Transmit_IT+0xd4>
- }
- else
- {
- huart->TxISR = UART_TxISR_8BIT;
- 8010d92: 68fb ldr r3, [r7, #12]
- 8010d94: 4a14 ldr r2, [pc, #80] @ (8010de8 <HAL_UART_Transmit_IT+0x124>)
- 8010d96: 679a str r2, [r3, #120] @ 0x78
- }
- /* Enable the Transmit Data Register Empty interrupt */
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
- 8010d98: 68fb ldr r3, [r7, #12]
- 8010d9a: 681b ldr r3, [r3, #0]
- 8010d9c: 617b str r3, [r7, #20]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8010d9e: 697b ldr r3, [r7, #20]
- 8010da0: e853 3f00 ldrex r3, [r3]
- 8010da4: 613b str r3, [r7, #16]
- return(result);
- 8010da6: 693b ldr r3, [r7, #16]
- 8010da8: f043 0380 orr.w r3, r3, #128 @ 0x80
- 8010dac: 63fb str r3, [r7, #60] @ 0x3c
- 8010dae: 68fb ldr r3, [r7, #12]
- 8010db0: 681b ldr r3, [r3, #0]
- 8010db2: 461a mov r2, r3
- 8010db4: 6bfb ldr r3, [r7, #60] @ 0x3c
- 8010db6: 623b str r3, [r7, #32]
- 8010db8: 61fa str r2, [r7, #28]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8010dba: 69f9 ldr r1, [r7, #28]
- 8010dbc: 6a3a ldr r2, [r7, #32]
- 8010dbe: e841 2300 strex r3, r2, [r1]
- 8010dc2: 61bb str r3, [r7, #24]
- return(result);
- 8010dc4: 69bb ldr r3, [r7, #24]
- 8010dc6: 2b00 cmp r3, #0
- 8010dc8: d1e6 bne.n 8010d98 <HAL_UART_Transmit_IT+0xd4>
- }
- return HAL_OK;
- 8010dca: 2300 movs r3, #0
- 8010dcc: e000 b.n 8010dd0 <HAL_UART_Transmit_IT+0x10c>
- }
- else
- {
- return HAL_BUSY;
- 8010dce: 2302 movs r3, #2
- }
- }
- 8010dd0: 4618 mov r0, r3
- 8010dd2: 3744 adds r7, #68 @ 0x44
- 8010dd4: 46bd mov sp, r7
- 8010dd6: f85d 7b04 ldr.w r7, [sp], #4
- 8010dda: 4770 bx lr
- 8010ddc: 0801294f .word 0x0801294f
- 8010de0: 0801286f .word 0x0801286f
- 8010de4: 080127ad .word 0x080127ad
- 8010de8: 080126f5 .word 0x080126f5
- 08010dec <HAL_UART_IRQHandler>:
- * @brief Handle UART interrupt request.
- * @param huart UART handle.
- * @retval None
- */
- void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
- {
- 8010dec: b580 push {r7, lr}
- 8010dee: b0ba sub sp, #232 @ 0xe8
- 8010df0: af00 add r7, sp, #0
- 8010df2: 6078 str r0, [r7, #4]
- uint32_t isrflags = READ_REG(huart->Instance->ISR);
- 8010df4: 687b ldr r3, [r7, #4]
- 8010df6: 681b ldr r3, [r3, #0]
- 8010df8: 69db ldr r3, [r3, #28]
- 8010dfa: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
- uint32_t cr1its = READ_REG(huart->Instance->CR1);
- 8010dfe: 687b ldr r3, [r7, #4]
- 8010e00: 681b ldr r3, [r3, #0]
- 8010e02: 681b ldr r3, [r3, #0]
- 8010e04: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
- uint32_t cr3its = READ_REG(huart->Instance->CR3);
- 8010e08: 687b ldr r3, [r7, #4]
- 8010e0a: 681b ldr r3, [r3, #0]
- 8010e0c: 689b ldr r3, [r3, #8]
- 8010e0e: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
- uint32_t errorflags;
- uint32_t errorcode;
- /* If no error occurs */
- errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
- 8010e12: f8d7 20e4 ldr.w r2, [r7, #228] @ 0xe4
- 8010e16: f640 030f movw r3, #2063 @ 0x80f
- 8010e1a: 4013 ands r3, r2
- 8010e1c: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
- if (errorflags == 0U)
- 8010e20: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
- 8010e24: 2b00 cmp r3, #0
- 8010e26: d11b bne.n 8010e60 <HAL_UART_IRQHandler+0x74>
- {
- /* UART in mode Receiver ---------------------------------------------------*/
- if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
- 8010e28: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
- 8010e2c: f003 0320 and.w r3, r3, #32
- 8010e30: 2b00 cmp r3, #0
- 8010e32: d015 beq.n 8010e60 <HAL_UART_IRQHandler+0x74>
- && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
- 8010e34: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
- 8010e38: f003 0320 and.w r3, r3, #32
- 8010e3c: 2b00 cmp r3, #0
- 8010e3e: d105 bne.n 8010e4c <HAL_UART_IRQHandler+0x60>
- || ((cr3its & USART_CR3_RXFTIE) != 0U)))
- 8010e40: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
- 8010e44: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
- 8010e48: 2b00 cmp r3, #0
- 8010e4a: d009 beq.n 8010e60 <HAL_UART_IRQHandler+0x74>
- {
- if (huart->RxISR != NULL)
- 8010e4c: 687b ldr r3, [r7, #4]
- 8010e4e: 6f5b ldr r3, [r3, #116] @ 0x74
- 8010e50: 2b00 cmp r3, #0
- 8010e52: f000 8377 beq.w 8011544 <HAL_UART_IRQHandler+0x758>
- {
- huart->RxISR(huart);
- 8010e56: 687b ldr r3, [r7, #4]
- 8010e58: 6f5b ldr r3, [r3, #116] @ 0x74
- 8010e5a: 6878 ldr r0, [r7, #4]
- 8010e5c: 4798 blx r3
- }
- return;
- 8010e5e: e371 b.n 8011544 <HAL_UART_IRQHandler+0x758>
- }
- }
- /* If some errors occur */
- if ((errorflags != 0U)
- 8010e60: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
- 8010e64: 2b00 cmp r3, #0
- 8010e66: f000 8123 beq.w 80110b0 <HAL_UART_IRQHandler+0x2c4>
- && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
- 8010e6a: f8d7 20dc ldr.w r2, [r7, #220] @ 0xdc
- 8010e6e: 4b8d ldr r3, [pc, #564] @ (80110a4 <HAL_UART_IRQHandler+0x2b8>)
- 8010e70: 4013 ands r3, r2
- 8010e72: 2b00 cmp r3, #0
- 8010e74: d106 bne.n 8010e84 <HAL_UART_IRQHandler+0x98>
- || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))))
- 8010e76: f8d7 20e0 ldr.w r2, [r7, #224] @ 0xe0
- 8010e7a: 4b8b ldr r3, [pc, #556] @ (80110a8 <HAL_UART_IRQHandler+0x2bc>)
- 8010e7c: 4013 ands r3, r2
- 8010e7e: 2b00 cmp r3, #0
- 8010e80: f000 8116 beq.w 80110b0 <HAL_UART_IRQHandler+0x2c4>
- {
- /* UART parity error interrupt occurred -------------------------------------*/
- if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
- 8010e84: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
- 8010e88: f003 0301 and.w r3, r3, #1
- 8010e8c: 2b00 cmp r3, #0
- 8010e8e: d011 beq.n 8010eb4 <HAL_UART_IRQHandler+0xc8>
- 8010e90: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
- 8010e94: f403 7380 and.w r3, r3, #256 @ 0x100
- 8010e98: 2b00 cmp r3, #0
- 8010e9a: d00b beq.n 8010eb4 <HAL_UART_IRQHandler+0xc8>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
- 8010e9c: 687b ldr r3, [r7, #4]
- 8010e9e: 681b ldr r3, [r3, #0]
- 8010ea0: 2201 movs r2, #1
- 8010ea2: 621a str r2, [r3, #32]
- huart->ErrorCode |= HAL_UART_ERROR_PE;
- 8010ea4: 687b ldr r3, [r7, #4]
- 8010ea6: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8010eaa: f043 0201 orr.w r2, r3, #1
- 8010eae: 687b ldr r3, [r7, #4]
- 8010eb0: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- }
- /* UART frame error interrupt occurred --------------------------------------*/
- if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
- 8010eb4: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
- 8010eb8: f003 0302 and.w r3, r3, #2
- 8010ebc: 2b00 cmp r3, #0
- 8010ebe: d011 beq.n 8010ee4 <HAL_UART_IRQHandler+0xf8>
- 8010ec0: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
- 8010ec4: f003 0301 and.w r3, r3, #1
- 8010ec8: 2b00 cmp r3, #0
- 8010eca: d00b beq.n 8010ee4 <HAL_UART_IRQHandler+0xf8>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
- 8010ecc: 687b ldr r3, [r7, #4]
- 8010ece: 681b ldr r3, [r3, #0]
- 8010ed0: 2202 movs r2, #2
- 8010ed2: 621a str r2, [r3, #32]
- huart->ErrorCode |= HAL_UART_ERROR_FE;
- 8010ed4: 687b ldr r3, [r7, #4]
- 8010ed6: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8010eda: f043 0204 orr.w r2, r3, #4
- 8010ede: 687b ldr r3, [r7, #4]
- 8010ee0: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- }
- /* UART noise error interrupt occurred --------------------------------------*/
- if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
- 8010ee4: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
- 8010ee8: f003 0304 and.w r3, r3, #4
- 8010eec: 2b00 cmp r3, #0
- 8010eee: d011 beq.n 8010f14 <HAL_UART_IRQHandler+0x128>
- 8010ef0: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
- 8010ef4: f003 0301 and.w r3, r3, #1
- 8010ef8: 2b00 cmp r3, #0
- 8010efa: d00b beq.n 8010f14 <HAL_UART_IRQHandler+0x128>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
- 8010efc: 687b ldr r3, [r7, #4]
- 8010efe: 681b ldr r3, [r3, #0]
- 8010f00: 2204 movs r2, #4
- 8010f02: 621a str r2, [r3, #32]
- huart->ErrorCode |= HAL_UART_ERROR_NE;
- 8010f04: 687b ldr r3, [r7, #4]
- 8010f06: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8010f0a: f043 0202 orr.w r2, r3, #2
- 8010f0e: 687b ldr r3, [r7, #4]
- 8010f10: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- }
- /* UART Over-Run interrupt occurred -----------------------------------------*/
- if (((isrflags & USART_ISR_ORE) != 0U)
- 8010f14: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
- 8010f18: f003 0308 and.w r3, r3, #8
- 8010f1c: 2b00 cmp r3, #0
- 8010f1e: d017 beq.n 8010f50 <HAL_UART_IRQHandler+0x164>
- && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
- 8010f20: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
- 8010f24: f003 0320 and.w r3, r3, #32
- 8010f28: 2b00 cmp r3, #0
- 8010f2a: d105 bne.n 8010f38 <HAL_UART_IRQHandler+0x14c>
- ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
- 8010f2c: f8d7 20dc ldr.w r2, [r7, #220] @ 0xdc
- 8010f30: 4b5c ldr r3, [pc, #368] @ (80110a4 <HAL_UART_IRQHandler+0x2b8>)
- 8010f32: 4013 ands r3, r2
- && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
- 8010f34: 2b00 cmp r3, #0
- 8010f36: d00b beq.n 8010f50 <HAL_UART_IRQHandler+0x164>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
- 8010f38: 687b ldr r3, [r7, #4]
- 8010f3a: 681b ldr r3, [r3, #0]
- 8010f3c: 2208 movs r2, #8
- 8010f3e: 621a str r2, [r3, #32]
- huart->ErrorCode |= HAL_UART_ERROR_ORE;
- 8010f40: 687b ldr r3, [r7, #4]
- 8010f42: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8010f46: f043 0208 orr.w r2, r3, #8
- 8010f4a: 687b ldr r3, [r7, #4]
- 8010f4c: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- }
- /* UART Receiver Timeout interrupt occurred ---------------------------------*/
- if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
- 8010f50: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
- 8010f54: f403 6300 and.w r3, r3, #2048 @ 0x800
- 8010f58: 2b00 cmp r3, #0
- 8010f5a: d012 beq.n 8010f82 <HAL_UART_IRQHandler+0x196>
- 8010f5c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
- 8010f60: f003 6380 and.w r3, r3, #67108864 @ 0x4000000
- 8010f64: 2b00 cmp r3, #0
- 8010f66: d00c beq.n 8010f82 <HAL_UART_IRQHandler+0x196>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
- 8010f68: 687b ldr r3, [r7, #4]
- 8010f6a: 681b ldr r3, [r3, #0]
- 8010f6c: f44f 6200 mov.w r2, #2048 @ 0x800
- 8010f70: 621a str r2, [r3, #32]
- huart->ErrorCode |= HAL_UART_ERROR_RTO;
- 8010f72: 687b ldr r3, [r7, #4]
- 8010f74: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8010f78: f043 0220 orr.w r2, r3, #32
- 8010f7c: 687b ldr r3, [r7, #4]
- 8010f7e: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- }
- /* Call UART Error Call back function if need be ----------------------------*/
- if (huart->ErrorCode != HAL_UART_ERROR_NONE)
- 8010f82: 687b ldr r3, [r7, #4]
- 8010f84: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8010f88: 2b00 cmp r3, #0
- 8010f8a: f000 82dd beq.w 8011548 <HAL_UART_IRQHandler+0x75c>
- {
- /* UART in mode Receiver --------------------------------------------------*/
- if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
- 8010f8e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
- 8010f92: f003 0320 and.w r3, r3, #32
- 8010f96: 2b00 cmp r3, #0
- 8010f98: d013 beq.n 8010fc2 <HAL_UART_IRQHandler+0x1d6>
- && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
- 8010f9a: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
- 8010f9e: f003 0320 and.w r3, r3, #32
- 8010fa2: 2b00 cmp r3, #0
- 8010fa4: d105 bne.n 8010fb2 <HAL_UART_IRQHandler+0x1c6>
- || ((cr3its & USART_CR3_RXFTIE) != 0U)))
- 8010fa6: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
- 8010faa: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
- 8010fae: 2b00 cmp r3, #0
- 8010fb0: d007 beq.n 8010fc2 <HAL_UART_IRQHandler+0x1d6>
- {
- if (huart->RxISR != NULL)
- 8010fb2: 687b ldr r3, [r7, #4]
- 8010fb4: 6f5b ldr r3, [r3, #116] @ 0x74
- 8010fb6: 2b00 cmp r3, #0
- 8010fb8: d003 beq.n 8010fc2 <HAL_UART_IRQHandler+0x1d6>
- {
- huart->RxISR(huart);
- 8010fba: 687b ldr r3, [r7, #4]
- 8010fbc: 6f5b ldr r3, [r3, #116] @ 0x74
- 8010fbe: 6878 ldr r0, [r7, #4]
- 8010fc0: 4798 blx r3
- /* If Error is to be considered as blocking :
- - Receiver Timeout error in Reception
- - Overrun error in Reception
- - any error occurs in DMA mode reception
- */
- errorcode = huart->ErrorCode;
- 8010fc2: 687b ldr r3, [r7, #4]
- 8010fc4: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8010fc8: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
- if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
- 8010fcc: 687b ldr r3, [r7, #4]
- 8010fce: 681b ldr r3, [r3, #0]
- 8010fd0: 689b ldr r3, [r3, #8]
- 8010fd2: f003 0340 and.w r3, r3, #64 @ 0x40
- 8010fd6: 2b40 cmp r3, #64 @ 0x40
- 8010fd8: d005 beq.n 8010fe6 <HAL_UART_IRQHandler+0x1fa>
- ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
- 8010fda: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
- 8010fde: f003 0328 and.w r3, r3, #40 @ 0x28
- if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
- 8010fe2: 2b00 cmp r3, #0
- 8010fe4: d054 beq.n 8011090 <HAL_UART_IRQHandler+0x2a4>
- {
- /* Blocking error : transfer is aborted
- Set the UART state ready to be able to start again the process,
- Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
- UART_EndRxTransfer(huart);
- 8010fe6: 6878 ldr r0, [r7, #4]
- 8010fe8: f001 fb08 bl 80125fc <UART_EndRxTransfer>
- /* Abort the UART DMA Rx channel if enabled */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 8010fec: 687b ldr r3, [r7, #4]
- 8010fee: 681b ldr r3, [r3, #0]
- 8010ff0: 689b ldr r3, [r3, #8]
- 8010ff2: f003 0340 and.w r3, r3, #64 @ 0x40
- 8010ff6: 2b40 cmp r3, #64 @ 0x40
- 8010ff8: d146 bne.n 8011088 <HAL_UART_IRQHandler+0x29c>
- {
- /* Disable the UART DMA Rx request if enabled */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
- 8010ffa: 687b ldr r3, [r7, #4]
- 8010ffc: 681b ldr r3, [r3, #0]
- 8010ffe: 3308 adds r3, #8
- 8011000: f8c7 309c str.w r3, [r7, #156] @ 0x9c
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8011004: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
- 8011008: e853 3f00 ldrex r3, [r3]
- 801100c: f8c7 3098 str.w r3, [r7, #152] @ 0x98
- return(result);
- 8011010: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
- 8011014: f023 0340 bic.w r3, r3, #64 @ 0x40
- 8011018: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
- 801101c: 687b ldr r3, [r7, #4]
- 801101e: 681b ldr r3, [r3, #0]
- 8011020: 3308 adds r3, #8
- 8011022: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0
- 8011026: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8
- 801102a: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 801102e: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4
- 8011032: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8
- 8011036: e841 2300 strex r3, r2, [r1]
- 801103a: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
- return(result);
- 801103e: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
- 8011042: 2b00 cmp r3, #0
- 8011044: d1d9 bne.n 8010ffa <HAL_UART_IRQHandler+0x20e>
- /* Abort the UART DMA Rx channel */
- if (huart->hdmarx != NULL)
- 8011046: 687b ldr r3, [r7, #4]
- 8011048: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 801104c: 2b00 cmp r3, #0
- 801104e: d017 beq.n 8011080 <HAL_UART_IRQHandler+0x294>
- {
- /* Set the UART DMA Abort callback :
- will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
- huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
- 8011050: 687b ldr r3, [r7, #4]
- 8011052: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 8011056: 4a15 ldr r2, [pc, #84] @ (80110ac <HAL_UART_IRQHandler+0x2c0>)
- 8011058: 651a str r2, [r3, #80] @ 0x50
- /* Abort DMA RX */
- if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
- 801105a: 687b ldr r3, [r7, #4]
- 801105c: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 8011060: 4618 mov r0, r3
- 8011062: f7f7 ff01 bl 8008e68 <HAL_DMA_Abort_IT>
- 8011066: 4603 mov r3, r0
- 8011068: 2b00 cmp r3, #0
- 801106a: d019 beq.n 80110a0 <HAL_UART_IRQHandler+0x2b4>
- {
- /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
- huart->hdmarx->XferAbortCallback(huart->hdmarx);
- 801106c: 687b ldr r3, [r7, #4]
- 801106e: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 8011072: 6d1b ldr r3, [r3, #80] @ 0x50
- 8011074: 687a ldr r2, [r7, #4]
- 8011076: f8d2 2080 ldr.w r2, [r2, #128] @ 0x80
- 801107a: 4610 mov r0, r2
- 801107c: 4798 blx r3
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 801107e: e00f b.n 80110a0 <HAL_UART_IRQHandler+0x2b4>
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
- #else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
- 8011080: 6878 ldr r0, [r7, #4]
- 8011082: f000 fa6d bl 8011560 <HAL_UART_ErrorCallback>
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 8011086: e00b b.n 80110a0 <HAL_UART_IRQHandler+0x2b4>
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
- #else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
- 8011088: 6878 ldr r0, [r7, #4]
- 801108a: f000 fa69 bl 8011560 <HAL_UART_ErrorCallback>
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 801108e: e007 b.n 80110a0 <HAL_UART_IRQHandler+0x2b4>
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
- #else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
- 8011090: 6878 ldr r0, [r7, #4]
- 8011092: f000 fa65 bl 8011560 <HAL_UART_ErrorCallback>
- #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 8011096: 687b ldr r3, [r7, #4]
- 8011098: 2200 movs r2, #0
- 801109a: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- }
- }
- return;
- 801109e: e253 b.n 8011548 <HAL_UART_IRQHandler+0x75c>
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 80110a0: bf00 nop
- return;
- 80110a2: e251 b.n 8011548 <HAL_UART_IRQHandler+0x75c>
- 80110a4: 10000001 .word 0x10000001
- 80110a8: 04000120 .word 0x04000120
- 80110ac: 080126c9 .word 0x080126c9
- } /* End if some error occurs */
- /* Check current reception Mode :
- If Reception till IDLE event has been selected : */
- if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- 80110b0: 687b ldr r3, [r7, #4]
- 80110b2: 6edb ldr r3, [r3, #108] @ 0x6c
- 80110b4: 2b01 cmp r3, #1
- 80110b6: f040 81e7 bne.w 8011488 <HAL_UART_IRQHandler+0x69c>
- && ((isrflags & USART_ISR_IDLE) != 0U)
- 80110ba: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
- 80110be: f003 0310 and.w r3, r3, #16
- 80110c2: 2b00 cmp r3, #0
- 80110c4: f000 81e0 beq.w 8011488 <HAL_UART_IRQHandler+0x69c>
- && ((cr1its & USART_ISR_IDLE) != 0U))
- 80110c8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
- 80110cc: f003 0310 and.w r3, r3, #16
- 80110d0: 2b00 cmp r3, #0
- 80110d2: f000 81d9 beq.w 8011488 <HAL_UART_IRQHandler+0x69c>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
- 80110d6: 687b ldr r3, [r7, #4]
- 80110d8: 681b ldr r3, [r3, #0]
- 80110da: 2210 movs r2, #16
- 80110dc: 621a str r2, [r3, #32]
- /* Check if DMA mode is enabled in UART */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 80110de: 687b ldr r3, [r7, #4]
- 80110e0: 681b ldr r3, [r3, #0]
- 80110e2: 689b ldr r3, [r3, #8]
- 80110e4: f003 0340 and.w r3, r3, #64 @ 0x40
- 80110e8: 2b40 cmp r3, #64 @ 0x40
- 80110ea: f040 8151 bne.w 8011390 <HAL_UART_IRQHandler+0x5a4>
- {
- /* DMA mode enabled */
- /* Check received length : If all expected data are received, do nothing,
- (DMA cplt callback will be called).
- Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
- uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
- 80110ee: 687b ldr r3, [r7, #4]
- 80110f0: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 80110f4: 681b ldr r3, [r3, #0]
- 80110f6: 4a96 ldr r2, [pc, #600] @ (8011350 <HAL_UART_IRQHandler+0x564>)
- 80110f8: 4293 cmp r3, r2
- 80110fa: d068 beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 80110fc: 687b ldr r3, [r7, #4]
- 80110fe: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 8011102: 681b ldr r3, [r3, #0]
- 8011104: 4a93 ldr r2, [pc, #588] @ (8011354 <HAL_UART_IRQHandler+0x568>)
- 8011106: 4293 cmp r3, r2
- 8011108: d061 beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 801110a: 687b ldr r3, [r7, #4]
- 801110c: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 8011110: 681b ldr r3, [r3, #0]
- 8011112: 4a91 ldr r2, [pc, #580] @ (8011358 <HAL_UART_IRQHandler+0x56c>)
- 8011114: 4293 cmp r3, r2
- 8011116: d05a beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 8011118: 687b ldr r3, [r7, #4]
- 801111a: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 801111e: 681b ldr r3, [r3, #0]
- 8011120: 4a8e ldr r2, [pc, #568] @ (801135c <HAL_UART_IRQHandler+0x570>)
- 8011122: 4293 cmp r3, r2
- 8011124: d053 beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 8011126: 687b ldr r3, [r7, #4]
- 8011128: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 801112c: 681b ldr r3, [r3, #0]
- 801112e: 4a8c ldr r2, [pc, #560] @ (8011360 <HAL_UART_IRQHandler+0x574>)
- 8011130: 4293 cmp r3, r2
- 8011132: d04c beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 8011134: 687b ldr r3, [r7, #4]
- 8011136: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 801113a: 681b ldr r3, [r3, #0]
- 801113c: 4a89 ldr r2, [pc, #548] @ (8011364 <HAL_UART_IRQHandler+0x578>)
- 801113e: 4293 cmp r3, r2
- 8011140: d045 beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 8011142: 687b ldr r3, [r7, #4]
- 8011144: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 8011148: 681b ldr r3, [r3, #0]
- 801114a: 4a87 ldr r2, [pc, #540] @ (8011368 <HAL_UART_IRQHandler+0x57c>)
- 801114c: 4293 cmp r3, r2
- 801114e: d03e beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 8011150: 687b ldr r3, [r7, #4]
- 8011152: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 8011156: 681b ldr r3, [r3, #0]
- 8011158: 4a84 ldr r2, [pc, #528] @ (801136c <HAL_UART_IRQHandler+0x580>)
- 801115a: 4293 cmp r3, r2
- 801115c: d037 beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 801115e: 687b ldr r3, [r7, #4]
- 8011160: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 8011164: 681b ldr r3, [r3, #0]
- 8011166: 4a82 ldr r2, [pc, #520] @ (8011370 <HAL_UART_IRQHandler+0x584>)
- 8011168: 4293 cmp r3, r2
- 801116a: d030 beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 801116c: 687b ldr r3, [r7, #4]
- 801116e: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 8011172: 681b ldr r3, [r3, #0]
- 8011174: 4a7f ldr r2, [pc, #508] @ (8011374 <HAL_UART_IRQHandler+0x588>)
- 8011176: 4293 cmp r3, r2
- 8011178: d029 beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 801117a: 687b ldr r3, [r7, #4]
- 801117c: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 8011180: 681b ldr r3, [r3, #0]
- 8011182: 4a7d ldr r2, [pc, #500] @ (8011378 <HAL_UART_IRQHandler+0x58c>)
- 8011184: 4293 cmp r3, r2
- 8011186: d022 beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 8011188: 687b ldr r3, [r7, #4]
- 801118a: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 801118e: 681b ldr r3, [r3, #0]
- 8011190: 4a7a ldr r2, [pc, #488] @ (801137c <HAL_UART_IRQHandler+0x590>)
- 8011192: 4293 cmp r3, r2
- 8011194: d01b beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 8011196: 687b ldr r3, [r7, #4]
- 8011198: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 801119c: 681b ldr r3, [r3, #0]
- 801119e: 4a78 ldr r2, [pc, #480] @ (8011380 <HAL_UART_IRQHandler+0x594>)
- 80111a0: 4293 cmp r3, r2
- 80111a2: d014 beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 80111a4: 687b ldr r3, [r7, #4]
- 80111a6: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 80111aa: 681b ldr r3, [r3, #0]
- 80111ac: 4a75 ldr r2, [pc, #468] @ (8011384 <HAL_UART_IRQHandler+0x598>)
- 80111ae: 4293 cmp r3, r2
- 80111b0: d00d beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 80111b2: 687b ldr r3, [r7, #4]
- 80111b4: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 80111b8: 681b ldr r3, [r3, #0]
- 80111ba: 4a73 ldr r2, [pc, #460] @ (8011388 <HAL_UART_IRQHandler+0x59c>)
- 80111bc: 4293 cmp r3, r2
- 80111be: d006 beq.n 80111ce <HAL_UART_IRQHandler+0x3e2>
- 80111c0: 687b ldr r3, [r7, #4]
- 80111c2: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 80111c6: 681b ldr r3, [r3, #0]
- 80111c8: 4a70 ldr r2, [pc, #448] @ (801138c <HAL_UART_IRQHandler+0x5a0>)
- 80111ca: 4293 cmp r3, r2
- 80111cc: d106 bne.n 80111dc <HAL_UART_IRQHandler+0x3f0>
- 80111ce: 687b ldr r3, [r7, #4]
- 80111d0: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 80111d4: 681b ldr r3, [r3, #0]
- 80111d6: 685b ldr r3, [r3, #4]
- 80111d8: b29b uxth r3, r3
- 80111da: e005 b.n 80111e8 <HAL_UART_IRQHandler+0x3fc>
- 80111dc: 687b ldr r3, [r7, #4]
- 80111de: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 80111e2: 681b ldr r3, [r3, #0]
- 80111e4: 685b ldr r3, [r3, #4]
- 80111e6: b29b uxth r3, r3
- 80111e8: f8a7 30be strh.w r3, [r7, #190] @ 0xbe
- if ((nb_remaining_rx_data > 0U)
- 80111ec: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe
- 80111f0: 2b00 cmp r3, #0
- 80111f2: f000 81ab beq.w 801154c <HAL_UART_IRQHandler+0x760>
- && (nb_remaining_rx_data < huart->RxXferSize))
- 80111f6: 687b ldr r3, [r7, #4]
- 80111f8: f8b3 305c ldrh.w r3, [r3, #92] @ 0x5c
- 80111fc: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe
- 8011200: 429a cmp r2, r3
- 8011202: f080 81a3 bcs.w 801154c <HAL_UART_IRQHandler+0x760>
- {
- /* Reception is not complete */
- huart->RxXferCount = nb_remaining_rx_data;
- 8011206: 687b ldr r3, [r7, #4]
- 8011208: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe
- 801120c: f8a3 205e strh.w r2, [r3, #94] @ 0x5e
- /* In Normal mode, end DMA xfer and HAL UART Rx process*/
- if (huart->hdmarx->Init.Mode != DMA_CIRCULAR)
- 8011210: 687b ldr r3, [r7, #4]
- 8011212: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 8011216: 69db ldr r3, [r3, #28]
- 8011218: f5b3 7f80 cmp.w r3, #256 @ 0x100
- 801121c: f000 8087 beq.w 801132e <HAL_UART_IRQHandler+0x542>
- {
- /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
- 8011220: 687b ldr r3, [r7, #4]
- 8011222: 681b ldr r3, [r3, #0]
- 8011224: f8c7 3088 str.w r3, [r7, #136] @ 0x88
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8011228: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88
- 801122c: e853 3f00 ldrex r3, [r3]
- 8011230: f8c7 3084 str.w r3, [r7, #132] @ 0x84
- return(result);
- 8011234: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
- 8011238: f423 7380 bic.w r3, r3, #256 @ 0x100
- 801123c: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
- 8011240: 687b ldr r3, [r7, #4]
- 8011242: 681b ldr r3, [r3, #0]
- 8011244: 461a mov r2, r3
- 8011246: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
- 801124a: f8c7 3094 str.w r3, [r7, #148] @ 0x94
- 801124e: f8c7 2090 str.w r2, [r7, #144] @ 0x90
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8011252: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90
- 8011256: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94
- 801125a: e841 2300 strex r3, r2, [r1]
- 801125e: f8c7 308c str.w r3, [r7, #140] @ 0x8c
- return(result);
- 8011262: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
- 8011266: 2b00 cmp r3, #0
- 8011268: d1da bne.n 8011220 <HAL_UART_IRQHandler+0x434>
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 801126a: 687b ldr r3, [r7, #4]
- 801126c: 681b ldr r3, [r3, #0]
- 801126e: 3308 adds r3, #8
- 8011270: 677b str r3, [r7, #116] @ 0x74
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8011272: 6f7b ldr r3, [r7, #116] @ 0x74
- 8011274: e853 3f00 ldrex r3, [r3]
- 8011278: 673b str r3, [r7, #112] @ 0x70
- return(result);
- 801127a: 6f3b ldr r3, [r7, #112] @ 0x70
- 801127c: f023 0301 bic.w r3, r3, #1
- 8011280: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
- 8011284: 687b ldr r3, [r7, #4]
- 8011286: 681b ldr r3, [r3, #0]
- 8011288: 3308 adds r3, #8
- 801128a: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4
- 801128e: f8c7 2080 str.w r2, [r7, #128] @ 0x80
- 8011292: 67fb str r3, [r7, #124] @ 0x7c
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8011294: 6ff9 ldr r1, [r7, #124] @ 0x7c
- 8011296: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80
- 801129a: e841 2300 strex r3, r2, [r1]
- 801129e: 67bb str r3, [r7, #120] @ 0x78
- return(result);
- 80112a0: 6fbb ldr r3, [r7, #120] @ 0x78
- 80112a2: 2b00 cmp r3, #0
- 80112a4: d1e1 bne.n 801126a <HAL_UART_IRQHandler+0x47e>
- /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
- in the UART CR3 register */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
- 80112a6: 687b ldr r3, [r7, #4]
- 80112a8: 681b ldr r3, [r3, #0]
- 80112aa: 3308 adds r3, #8
- 80112ac: 663b str r3, [r7, #96] @ 0x60
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 80112ae: 6e3b ldr r3, [r7, #96] @ 0x60
- 80112b0: e853 3f00 ldrex r3, [r3]
- 80112b4: 65fb str r3, [r7, #92] @ 0x5c
- return(result);
- 80112b6: 6dfb ldr r3, [r7, #92] @ 0x5c
- 80112b8: f023 0340 bic.w r3, r3, #64 @ 0x40
- 80112bc: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
- 80112c0: 687b ldr r3, [r7, #4]
- 80112c2: 681b ldr r3, [r3, #0]
- 80112c4: 3308 adds r3, #8
- 80112c6: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0
- 80112ca: 66fa str r2, [r7, #108] @ 0x6c
- 80112cc: 66bb str r3, [r7, #104] @ 0x68
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 80112ce: 6eb9 ldr r1, [r7, #104] @ 0x68
- 80112d0: 6efa ldr r2, [r7, #108] @ 0x6c
- 80112d2: e841 2300 strex r3, r2, [r1]
- 80112d6: 667b str r3, [r7, #100] @ 0x64
- return(result);
- 80112d8: 6e7b ldr r3, [r7, #100] @ 0x64
- 80112da: 2b00 cmp r3, #0
- 80112dc: d1e3 bne.n 80112a6 <HAL_UART_IRQHandler+0x4ba>
- /* At end of Rx process, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- 80112de: 687b ldr r3, [r7, #4]
- 80112e0: 2220 movs r2, #32
- 80112e2: f8c3 208c str.w r2, [r3, #140] @ 0x8c
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 80112e6: 687b ldr r3, [r7, #4]
- 80112e8: 2200 movs r2, #0
- 80112ea: 66da str r2, [r3, #108] @ 0x6c
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- 80112ec: 687b ldr r3, [r7, #4]
- 80112ee: 681b ldr r3, [r3, #0]
- 80112f0: 64fb str r3, [r7, #76] @ 0x4c
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 80112f2: 6cfb ldr r3, [r7, #76] @ 0x4c
- 80112f4: e853 3f00 ldrex r3, [r3]
- 80112f8: 64bb str r3, [r7, #72] @ 0x48
- return(result);
- 80112fa: 6cbb ldr r3, [r7, #72] @ 0x48
- 80112fc: f023 0310 bic.w r3, r3, #16
- 8011300: f8c7 30ac str.w r3, [r7, #172] @ 0xac
- 8011304: 687b ldr r3, [r7, #4]
- 8011306: 681b ldr r3, [r3, #0]
- 8011308: 461a mov r2, r3
- 801130a: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
- 801130e: 65bb str r3, [r7, #88] @ 0x58
- 8011310: 657a str r2, [r7, #84] @ 0x54
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8011312: 6d79 ldr r1, [r7, #84] @ 0x54
- 8011314: 6dba ldr r2, [r7, #88] @ 0x58
- 8011316: e841 2300 strex r3, r2, [r1]
- 801131a: 653b str r3, [r7, #80] @ 0x50
- return(result);
- 801131c: 6d3b ldr r3, [r7, #80] @ 0x50
- 801131e: 2b00 cmp r3, #0
- 8011320: d1e4 bne.n 80112ec <HAL_UART_IRQHandler+0x500>
- /* Last bytes received, so no need as the abort is immediate */
- (void)HAL_DMA_Abort(huart->hdmarx);
- 8011322: 687b ldr r3, [r7, #4]
- 8011324: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
- 8011328: 4618 mov r0, r3
- 801132a: f7f7 fa7f bl 800882c <HAL_DMA_Abort>
- }
- /* Initialize type of RxEvent that correspond to RxEvent callback execution;
- In this case, Rx Event type is Idle Event */
- huart->RxEventType = HAL_UART_RXEVENT_IDLE;
- 801132e: 687b ldr r3, [r7, #4]
- 8011330: 2202 movs r2, #2
- 8011332: 671a str r2, [r3, #112] @ 0x70
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx Event callback*/
- huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
- #else
- /*Call legacy weak Rx Event callback*/
- HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
- 8011334: 687b ldr r3, [r7, #4]
- 8011336: f8b3 205c ldrh.w r2, [r3, #92] @ 0x5c
- 801133a: 687b ldr r3, [r7, #4]
- 801133c: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
- 8011340: b29b uxth r3, r3
- 8011342: 1ad3 subs r3, r2, r3
- 8011344: b29b uxth r3, r3
- 8011346: 4619 mov r1, r3
- 8011348: 6878 ldr r0, [r7, #4]
- 801134a: f7f3 f873 bl 8004434 <HAL_UARTEx_RxEventCallback>
- #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
- }
- return;
- 801134e: e0fd b.n 801154c <HAL_UART_IRQHandler+0x760>
- 8011350: 40020010 .word 0x40020010
- 8011354: 40020028 .word 0x40020028
- 8011358: 40020040 .word 0x40020040
- 801135c: 40020058 .word 0x40020058
- 8011360: 40020070 .word 0x40020070
- 8011364: 40020088 .word 0x40020088
- 8011368: 400200a0 .word 0x400200a0
- 801136c: 400200b8 .word 0x400200b8
- 8011370: 40020410 .word 0x40020410
- 8011374: 40020428 .word 0x40020428
- 8011378: 40020440 .word 0x40020440
- 801137c: 40020458 .word 0x40020458
- 8011380: 40020470 .word 0x40020470
- 8011384: 40020488 .word 0x40020488
- 8011388: 400204a0 .word 0x400204a0
- 801138c: 400204b8 .word 0x400204b8
- else
- {
- /* DMA mode not enabled */
- /* Check received length : If all expected data are received, do nothing.
- Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
- uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
- 8011390: 687b ldr r3, [r7, #4]
- 8011392: f8b3 205c ldrh.w r2, [r3, #92] @ 0x5c
- 8011396: 687b ldr r3, [r7, #4]
- 8011398: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
- 801139c: b29b uxth r3, r3
- 801139e: 1ad3 subs r3, r2, r3
- 80113a0: f8a7 30ce strh.w r3, [r7, #206] @ 0xce
- if ((huart->RxXferCount > 0U)
- 80113a4: 687b ldr r3, [r7, #4]
- 80113a6: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
- 80113aa: b29b uxth r3, r3
- 80113ac: 2b00 cmp r3, #0
- 80113ae: f000 80cf beq.w 8011550 <HAL_UART_IRQHandler+0x764>
- && (nb_rx_data > 0U))
- 80113b2: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce
- 80113b6: 2b00 cmp r3, #0
- 80113b8: f000 80ca beq.w 8011550 <HAL_UART_IRQHandler+0x764>
- {
- /* Disable the UART Parity Error Interrupt and RXNE interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
- 80113bc: 687b ldr r3, [r7, #4]
- 80113be: 681b ldr r3, [r3, #0]
- 80113c0: 63bb str r3, [r7, #56] @ 0x38
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 80113c2: 6bbb ldr r3, [r7, #56] @ 0x38
- 80113c4: e853 3f00 ldrex r3, [r3]
- 80113c8: 637b str r3, [r7, #52] @ 0x34
- return(result);
- 80113ca: 6b7b ldr r3, [r7, #52] @ 0x34
- 80113cc: f423 7390 bic.w r3, r3, #288 @ 0x120
- 80113d0: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
- 80113d4: 687b ldr r3, [r7, #4]
- 80113d6: 681b ldr r3, [r3, #0]
- 80113d8: 461a mov r2, r3
- 80113da: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
- 80113de: 647b str r3, [r7, #68] @ 0x44
- 80113e0: 643a str r2, [r7, #64] @ 0x40
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 80113e2: 6c39 ldr r1, [r7, #64] @ 0x40
- 80113e4: 6c7a ldr r2, [r7, #68] @ 0x44
- 80113e6: e841 2300 strex r3, r2, [r1]
- 80113ea: 63fb str r3, [r7, #60] @ 0x3c
- return(result);
- 80113ec: 6bfb ldr r3, [r7, #60] @ 0x3c
- 80113ee: 2b00 cmp r3, #0
- 80113f0: d1e4 bne.n 80113bc <HAL_UART_IRQHandler+0x5d0>
- /* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
- 80113f2: 687b ldr r3, [r7, #4]
- 80113f4: 681b ldr r3, [r3, #0]
- 80113f6: 3308 adds r3, #8
- 80113f8: 627b str r3, [r7, #36] @ 0x24
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 80113fa: 6a7b ldr r3, [r7, #36] @ 0x24
- 80113fc: e853 3f00 ldrex r3, [r3]
- 8011400: 623b str r3, [r7, #32]
- return(result);
- 8011402: 6a3a ldr r2, [r7, #32]
- 8011404: 4b55 ldr r3, [pc, #340] @ (801155c <HAL_UART_IRQHandler+0x770>)
- 8011406: 4013 ands r3, r2
- 8011408: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
- 801140c: 687b ldr r3, [r7, #4]
- 801140e: 681b ldr r3, [r3, #0]
- 8011410: 3308 adds r3, #8
- 8011412: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4
- 8011416: 633a str r2, [r7, #48] @ 0x30
- 8011418: 62fb str r3, [r7, #44] @ 0x2c
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 801141a: 6af9 ldr r1, [r7, #44] @ 0x2c
- 801141c: 6b3a ldr r2, [r7, #48] @ 0x30
- 801141e: e841 2300 strex r3, r2, [r1]
- 8011422: 62bb str r3, [r7, #40] @ 0x28
- return(result);
- 8011424: 6abb ldr r3, [r7, #40] @ 0x28
- 8011426: 2b00 cmp r3, #0
- 8011428: d1e3 bne.n 80113f2 <HAL_UART_IRQHandler+0x606>
- /* Rx process is completed, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- 801142a: 687b ldr r3, [r7, #4]
- 801142c: 2220 movs r2, #32
- 801142e: f8c3 208c str.w r2, [r3, #140] @ 0x8c
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 8011432: 687b ldr r3, [r7, #4]
- 8011434: 2200 movs r2, #0
- 8011436: 66da str r2, [r3, #108] @ 0x6c
- /* Clear RxISR function pointer */
- huart->RxISR = NULL;
- 8011438: 687b ldr r3, [r7, #4]
- 801143a: 2200 movs r2, #0
- 801143c: 675a str r2, [r3, #116] @ 0x74
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- 801143e: 687b ldr r3, [r7, #4]
- 8011440: 681b ldr r3, [r3, #0]
- 8011442: 613b str r3, [r7, #16]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8011444: 693b ldr r3, [r7, #16]
- 8011446: e853 3f00 ldrex r3, [r3]
- 801144a: 60fb str r3, [r7, #12]
- return(result);
- 801144c: 68fb ldr r3, [r7, #12]
- 801144e: f023 0310 bic.w r3, r3, #16
- 8011452: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
- 8011456: 687b ldr r3, [r7, #4]
- 8011458: 681b ldr r3, [r3, #0]
- 801145a: 461a mov r2, r3
- 801145c: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
- 8011460: 61fb str r3, [r7, #28]
- 8011462: 61ba str r2, [r7, #24]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8011464: 69b9 ldr r1, [r7, #24]
- 8011466: 69fa ldr r2, [r7, #28]
- 8011468: e841 2300 strex r3, r2, [r1]
- 801146c: 617b str r3, [r7, #20]
- return(result);
- 801146e: 697b ldr r3, [r7, #20]
- 8011470: 2b00 cmp r3, #0
- 8011472: d1e4 bne.n 801143e <HAL_UART_IRQHandler+0x652>
- /* Initialize type of RxEvent that correspond to RxEvent callback execution;
- In this case, Rx Event type is Idle Event */
- huart->RxEventType = HAL_UART_RXEVENT_IDLE;
- 8011474: 687b ldr r3, [r7, #4]
- 8011476: 2202 movs r2, #2
- 8011478: 671a str r2, [r3, #112] @ 0x70
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx complete callback*/
- huart->RxEventCallback(huart, nb_rx_data);
- #else
- /*Call legacy weak Rx Event callback*/
- HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
- 801147a: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce
- 801147e: 4619 mov r1, r3
- 8011480: 6878 ldr r0, [r7, #4]
- 8011482: f7f2 ffd7 bl 8004434 <HAL_UARTEx_RxEventCallback>
- #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
- }
- return;
- 8011486: e063 b.n 8011550 <HAL_UART_IRQHandler+0x764>
- }
- }
- /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
- if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
- 8011488: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
- 801148c: f403 1380 and.w r3, r3, #1048576 @ 0x100000
- 8011490: 2b00 cmp r3, #0
- 8011492: d00e beq.n 80114b2 <HAL_UART_IRQHandler+0x6c6>
- 8011494: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
- 8011498: f403 0380 and.w r3, r3, #4194304 @ 0x400000
- 801149c: 2b00 cmp r3, #0
- 801149e: d008 beq.n 80114b2 <HAL_UART_IRQHandler+0x6c6>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
- 80114a0: 687b ldr r3, [r7, #4]
- 80114a2: 681b ldr r3, [r3, #0]
- 80114a4: f44f 1280 mov.w r2, #1048576 @ 0x100000
- 80114a8: 621a str r2, [r3, #32]
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /* Call registered Wakeup Callback */
- huart->WakeupCallback(huart);
- #else
- /* Call legacy weak Wakeup Callback */
- HAL_UARTEx_WakeupCallback(huart);
- 80114aa: 6878 ldr r0, [r7, #4]
- 80114ac: f002 f80c bl 80134c8 <HAL_UARTEx_WakeupCallback>
- #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- return;
- 80114b0: e051 b.n 8011556 <HAL_UART_IRQHandler+0x76a>
- }
- /* UART in mode Transmitter ------------------------------------------------*/
- if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
- 80114b2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
- 80114b6: f003 0380 and.w r3, r3, #128 @ 0x80
- 80114ba: 2b00 cmp r3, #0
- 80114bc: d014 beq.n 80114e8 <HAL_UART_IRQHandler+0x6fc>
- && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
- 80114be: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
- 80114c2: f003 0380 and.w r3, r3, #128 @ 0x80
- 80114c6: 2b00 cmp r3, #0
- 80114c8: d105 bne.n 80114d6 <HAL_UART_IRQHandler+0x6ea>
- || ((cr3its & USART_CR3_TXFTIE) != 0U)))
- 80114ca: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
- 80114ce: f403 0300 and.w r3, r3, #8388608 @ 0x800000
- 80114d2: 2b00 cmp r3, #0
- 80114d4: d008 beq.n 80114e8 <HAL_UART_IRQHandler+0x6fc>
- {
- if (huart->TxISR != NULL)
- 80114d6: 687b ldr r3, [r7, #4]
- 80114d8: 6f9b ldr r3, [r3, #120] @ 0x78
- 80114da: 2b00 cmp r3, #0
- 80114dc: d03a beq.n 8011554 <HAL_UART_IRQHandler+0x768>
- {
- huart->TxISR(huart);
- 80114de: 687b ldr r3, [r7, #4]
- 80114e0: 6f9b ldr r3, [r3, #120] @ 0x78
- 80114e2: 6878 ldr r0, [r7, #4]
- 80114e4: 4798 blx r3
- }
- return;
- 80114e6: e035 b.n 8011554 <HAL_UART_IRQHandler+0x768>
- }
- /* UART in mode Transmitter (transmission end) -----------------------------*/
- if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
- 80114e8: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
- 80114ec: f003 0340 and.w r3, r3, #64 @ 0x40
- 80114f0: 2b00 cmp r3, #0
- 80114f2: d009 beq.n 8011508 <HAL_UART_IRQHandler+0x71c>
- 80114f4: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
- 80114f8: f003 0340 and.w r3, r3, #64 @ 0x40
- 80114fc: 2b00 cmp r3, #0
- 80114fe: d003 beq.n 8011508 <HAL_UART_IRQHandler+0x71c>
- {
- UART_EndTransmit_IT(huart);
- 8011500: 6878 ldr r0, [r7, #4]
- 8011502: f001 fa99 bl 8012a38 <UART_EndTransmit_IT>
- return;
- 8011506: e026 b.n 8011556 <HAL_UART_IRQHandler+0x76a>
- }
- /* UART TX Fifo Empty occurred ----------------------------------------------*/
- if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
- 8011508: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
- 801150c: f403 0300 and.w r3, r3, #8388608 @ 0x800000
- 8011510: 2b00 cmp r3, #0
- 8011512: d009 beq.n 8011528 <HAL_UART_IRQHandler+0x73c>
- 8011514: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
- 8011518: f003 4380 and.w r3, r3, #1073741824 @ 0x40000000
- 801151c: 2b00 cmp r3, #0
- 801151e: d003 beq.n 8011528 <HAL_UART_IRQHandler+0x73c>
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /* Call registered Tx Fifo Empty Callback */
- huart->TxFifoEmptyCallback(huart);
- #else
- /* Call legacy weak Tx Fifo Empty Callback */
- HAL_UARTEx_TxFifoEmptyCallback(huart);
- 8011520: 6878 ldr r0, [r7, #4]
- 8011522: f001 ffe5 bl 80134f0 <HAL_UARTEx_TxFifoEmptyCallback>
- #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- return;
- 8011526: e016 b.n 8011556 <HAL_UART_IRQHandler+0x76a>
- }
- /* UART RX Fifo Full occurred ----------------------------------------------*/
- if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
- 8011528: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
- 801152c: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
- 8011530: 2b00 cmp r3, #0
- 8011532: d010 beq.n 8011556 <HAL_UART_IRQHandler+0x76a>
- 8011534: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
- 8011538: 2b00 cmp r3, #0
- 801153a: da0c bge.n 8011556 <HAL_UART_IRQHandler+0x76a>
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /* Call registered Rx Fifo Full Callback */
- huart->RxFifoFullCallback(huart);
- #else
- /* Call legacy weak Rx Fifo Full Callback */
- HAL_UARTEx_RxFifoFullCallback(huart);
- 801153c: 6878 ldr r0, [r7, #4]
- 801153e: f001 ffcd bl 80134dc <HAL_UARTEx_RxFifoFullCallback>
- #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- return;
- 8011542: e008 b.n 8011556 <HAL_UART_IRQHandler+0x76a>
- return;
- 8011544: bf00 nop
- 8011546: e006 b.n 8011556 <HAL_UART_IRQHandler+0x76a>
- return;
- 8011548: bf00 nop
- 801154a: e004 b.n 8011556 <HAL_UART_IRQHandler+0x76a>
- return;
- 801154c: bf00 nop
- 801154e: e002 b.n 8011556 <HAL_UART_IRQHandler+0x76a>
- return;
- 8011550: bf00 nop
- 8011552: e000 b.n 8011556 <HAL_UART_IRQHandler+0x76a>
- return;
- 8011554: bf00 nop
- }
- }
- 8011556: 37e8 adds r7, #232 @ 0xe8
- 8011558: 46bd mov sp, r7
- 801155a: bd80 pop {r7, pc}
- 801155c: effffffe .word 0xeffffffe
- 08011560 <HAL_UART_ErrorCallback>:
- * @brief UART error callback.
- * @param huart UART handle.
- * @retval None
- */
- __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
- {
- 8011560: b480 push {r7}
- 8011562: b083 sub sp, #12
- 8011564: af00 add r7, sp, #0
- 8011566: 6078 str r0, [r7, #4]
- UNUSED(huart);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_UART_ErrorCallback can be implemented in the user file.
- */
- }
- 8011568: bf00 nop
- 801156a: 370c adds r7, #12
- 801156c: 46bd mov sp, r7
- 801156e: f85d 7b04 ldr.w r7, [sp], #4
- 8011572: 4770 bx lr
- 08011574 <UART_SetConfig>:
- * @brief Configure the UART peripheral.
- * @param huart UART handle.
- * @retval HAL status
- */
- HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
- {
- 8011574: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
- 8011578: b092 sub sp, #72 @ 0x48
- 801157a: af00 add r7, sp, #0
- 801157c: 6178 str r0, [r7, #20]
- uint32_t tmpreg;
- uint16_t brrtemp;
- UART_ClockSourceTypeDef clocksource;
- uint32_t usartdiv;
- HAL_StatusTypeDef ret = HAL_OK;
- 801157e: 2300 movs r3, #0
- 8011580: f887 3042 strb.w r3, [r7, #66] @ 0x42
- * the UART Word Length, Parity, Mode and oversampling:
- * set the M bits according to huart->Init.WordLength value
- * set PCE and PS bits according to huart->Init.Parity value
- * set TE and RE bits according to huart->Init.Mode value
- * set OVER8 bit according to huart->Init.OverSampling value */
- tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
- 8011584: 697b ldr r3, [r7, #20]
- 8011586: 689a ldr r2, [r3, #8]
- 8011588: 697b ldr r3, [r7, #20]
- 801158a: 691b ldr r3, [r3, #16]
- 801158c: 431a orrs r2, r3
- 801158e: 697b ldr r3, [r7, #20]
- 8011590: 695b ldr r3, [r3, #20]
- 8011592: 431a orrs r2, r3
- 8011594: 697b ldr r3, [r7, #20]
- 8011596: 69db ldr r3, [r3, #28]
- 8011598: 4313 orrs r3, r2
- 801159a: 647b str r3, [r7, #68] @ 0x44
- MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
- 801159c: 697b ldr r3, [r7, #20]
- 801159e: 681b ldr r3, [r3, #0]
- 80115a0: 681a ldr r2, [r3, #0]
- 80115a2: 4bbe ldr r3, [pc, #760] @ (801189c <UART_SetConfig+0x328>)
- 80115a4: 4013 ands r3, r2
- 80115a6: 697a ldr r2, [r7, #20]
- 80115a8: 6812 ldr r2, [r2, #0]
- 80115aa: 6c79 ldr r1, [r7, #68] @ 0x44
- 80115ac: 430b orrs r3, r1
- 80115ae: 6013 str r3, [r2, #0]
- /*-------------------------- USART CR2 Configuration -----------------------*/
- /* Configure the UART Stop Bits: Set STOP[13:12] bits according
- * to huart->Init.StopBits value */
- MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
- 80115b0: 697b ldr r3, [r7, #20]
- 80115b2: 681b ldr r3, [r3, #0]
- 80115b4: 685b ldr r3, [r3, #4]
- 80115b6: f423 5140 bic.w r1, r3, #12288 @ 0x3000
- 80115ba: 697b ldr r3, [r7, #20]
- 80115bc: 68da ldr r2, [r3, #12]
- 80115be: 697b ldr r3, [r7, #20]
- 80115c0: 681b ldr r3, [r3, #0]
- 80115c2: 430a orrs r2, r1
- 80115c4: 605a str r2, [r3, #4]
- /* Configure
- * - UART HardWare Flow Control: set CTSE and RTSE bits according
- * to huart->Init.HwFlowCtl value
- * - one-bit sampling method versus three samples' majority rule according
- * to huart->Init.OneBitSampling (not applicable to LPUART) */
- tmpreg = (uint32_t)huart->Init.HwFlowCtl;
- 80115c6: 697b ldr r3, [r7, #20]
- 80115c8: 699b ldr r3, [r3, #24]
- 80115ca: 647b str r3, [r7, #68] @ 0x44
- if (!(UART_INSTANCE_LOWPOWER(huart)))
- 80115cc: 697b ldr r3, [r7, #20]
- 80115ce: 681b ldr r3, [r3, #0]
- 80115d0: 4ab3 ldr r2, [pc, #716] @ (80118a0 <UART_SetConfig+0x32c>)
- 80115d2: 4293 cmp r3, r2
- 80115d4: d004 beq.n 80115e0 <UART_SetConfig+0x6c>
- {
- tmpreg |= huart->Init.OneBitSampling;
- 80115d6: 697b ldr r3, [r7, #20]
- 80115d8: 6a1b ldr r3, [r3, #32]
- 80115da: 6c7a ldr r2, [r7, #68] @ 0x44
- 80115dc: 4313 orrs r3, r2
- 80115de: 647b str r3, [r7, #68] @ 0x44
- }
- MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
- 80115e0: 697b ldr r3, [r7, #20]
- 80115e2: 681b ldr r3, [r3, #0]
- 80115e4: 689a ldr r2, [r3, #8]
- 80115e6: 4baf ldr r3, [pc, #700] @ (80118a4 <UART_SetConfig+0x330>)
- 80115e8: 4013 ands r3, r2
- 80115ea: 697a ldr r2, [r7, #20]
- 80115ec: 6812 ldr r2, [r2, #0]
- 80115ee: 6c79 ldr r1, [r7, #68] @ 0x44
- 80115f0: 430b orrs r3, r1
- 80115f2: 6093 str r3, [r2, #8]
- /*-------------------------- USART PRESC Configuration -----------------------*/
- /* Configure
- * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */
- MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler);
- 80115f4: 697b ldr r3, [r7, #20]
- 80115f6: 681b ldr r3, [r3, #0]
- 80115f8: 6adb ldr r3, [r3, #44] @ 0x2c
- 80115fa: f023 010f bic.w r1, r3, #15
- 80115fe: 697b ldr r3, [r7, #20]
- 8011600: 6a5a ldr r2, [r3, #36] @ 0x24
- 8011602: 697b ldr r3, [r7, #20]
- 8011604: 681b ldr r3, [r3, #0]
- 8011606: 430a orrs r2, r1
- 8011608: 62da str r2, [r3, #44] @ 0x2c
- /*-------------------------- USART BRR Configuration -----------------------*/
- UART_GETCLOCKSOURCE(huart, clocksource);
- 801160a: 697b ldr r3, [r7, #20]
- 801160c: 681b ldr r3, [r3, #0]
- 801160e: 4aa6 ldr r2, [pc, #664] @ (80118a8 <UART_SetConfig+0x334>)
- 8011610: 4293 cmp r3, r2
- 8011612: d177 bne.n 8011704 <UART_SetConfig+0x190>
- 8011614: 4ba5 ldr r3, [pc, #660] @ (80118ac <UART_SetConfig+0x338>)
- 8011616: 6d5b ldr r3, [r3, #84] @ 0x54
- 8011618: f003 0338 and.w r3, r3, #56 @ 0x38
- 801161c: 2b28 cmp r3, #40 @ 0x28
- 801161e: d86d bhi.n 80116fc <UART_SetConfig+0x188>
- 8011620: a201 add r2, pc, #4 @ (adr r2, 8011628 <UART_SetConfig+0xb4>)
- 8011622: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8011626: bf00 nop
- 8011628: 080116cd .word 0x080116cd
- 801162c: 080116fd .word 0x080116fd
- 8011630: 080116fd .word 0x080116fd
- 8011634: 080116fd .word 0x080116fd
- 8011638: 080116fd .word 0x080116fd
- 801163c: 080116fd .word 0x080116fd
- 8011640: 080116fd .word 0x080116fd
- 8011644: 080116fd .word 0x080116fd
- 8011648: 080116d5 .word 0x080116d5
- 801164c: 080116fd .word 0x080116fd
- 8011650: 080116fd .word 0x080116fd
- 8011654: 080116fd .word 0x080116fd
- 8011658: 080116fd .word 0x080116fd
- 801165c: 080116fd .word 0x080116fd
- 8011660: 080116fd .word 0x080116fd
- 8011664: 080116fd .word 0x080116fd
- 8011668: 080116dd .word 0x080116dd
- 801166c: 080116fd .word 0x080116fd
- 8011670: 080116fd .word 0x080116fd
- 8011674: 080116fd .word 0x080116fd
- 8011678: 080116fd .word 0x080116fd
- 801167c: 080116fd .word 0x080116fd
- 8011680: 080116fd .word 0x080116fd
- 8011684: 080116fd .word 0x080116fd
- 8011688: 080116e5 .word 0x080116e5
- 801168c: 080116fd .word 0x080116fd
- 8011690: 080116fd .word 0x080116fd
- 8011694: 080116fd .word 0x080116fd
- 8011698: 080116fd .word 0x080116fd
- 801169c: 080116fd .word 0x080116fd
- 80116a0: 080116fd .word 0x080116fd
- 80116a4: 080116fd .word 0x080116fd
- 80116a8: 080116ed .word 0x080116ed
- 80116ac: 080116fd .word 0x080116fd
- 80116b0: 080116fd .word 0x080116fd
- 80116b4: 080116fd .word 0x080116fd
- 80116b8: 080116fd .word 0x080116fd
- 80116bc: 080116fd .word 0x080116fd
- 80116c0: 080116fd .word 0x080116fd
- 80116c4: 080116fd .word 0x080116fd
- 80116c8: 080116f5 .word 0x080116f5
- 80116cc: 2301 movs r3, #1
- 80116ce: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80116d2: e222 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80116d4: 2304 movs r3, #4
- 80116d6: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80116da: e21e b.n 8011b1a <UART_SetConfig+0x5a6>
- 80116dc: 2308 movs r3, #8
- 80116de: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80116e2: e21a b.n 8011b1a <UART_SetConfig+0x5a6>
- 80116e4: 2310 movs r3, #16
- 80116e6: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80116ea: e216 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80116ec: 2320 movs r3, #32
- 80116ee: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80116f2: e212 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80116f4: 2340 movs r3, #64 @ 0x40
- 80116f6: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80116fa: e20e b.n 8011b1a <UART_SetConfig+0x5a6>
- 80116fc: 2380 movs r3, #128 @ 0x80
- 80116fe: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011702: e20a b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011704: 697b ldr r3, [r7, #20]
- 8011706: 681b ldr r3, [r3, #0]
- 8011708: 4a69 ldr r2, [pc, #420] @ (80118b0 <UART_SetConfig+0x33c>)
- 801170a: 4293 cmp r3, r2
- 801170c: d130 bne.n 8011770 <UART_SetConfig+0x1fc>
- 801170e: 4b67 ldr r3, [pc, #412] @ (80118ac <UART_SetConfig+0x338>)
- 8011710: 6d5b ldr r3, [r3, #84] @ 0x54
- 8011712: f003 0307 and.w r3, r3, #7
- 8011716: 2b05 cmp r3, #5
- 8011718: d826 bhi.n 8011768 <UART_SetConfig+0x1f4>
- 801171a: a201 add r2, pc, #4 @ (adr r2, 8011720 <UART_SetConfig+0x1ac>)
- 801171c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8011720: 08011739 .word 0x08011739
- 8011724: 08011741 .word 0x08011741
- 8011728: 08011749 .word 0x08011749
- 801172c: 08011751 .word 0x08011751
- 8011730: 08011759 .word 0x08011759
- 8011734: 08011761 .word 0x08011761
- 8011738: 2300 movs r3, #0
- 801173a: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 801173e: e1ec b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011740: 2304 movs r3, #4
- 8011742: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011746: e1e8 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011748: 2308 movs r3, #8
- 801174a: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 801174e: e1e4 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011750: 2310 movs r3, #16
- 8011752: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011756: e1e0 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011758: 2320 movs r3, #32
- 801175a: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 801175e: e1dc b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011760: 2340 movs r3, #64 @ 0x40
- 8011762: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011766: e1d8 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011768: 2380 movs r3, #128 @ 0x80
- 801176a: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 801176e: e1d4 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011770: 697b ldr r3, [r7, #20]
- 8011772: 681b ldr r3, [r3, #0]
- 8011774: 4a4f ldr r2, [pc, #316] @ (80118b4 <UART_SetConfig+0x340>)
- 8011776: 4293 cmp r3, r2
- 8011778: d130 bne.n 80117dc <UART_SetConfig+0x268>
- 801177a: 4b4c ldr r3, [pc, #304] @ (80118ac <UART_SetConfig+0x338>)
- 801177c: 6d5b ldr r3, [r3, #84] @ 0x54
- 801177e: f003 0307 and.w r3, r3, #7
- 8011782: 2b05 cmp r3, #5
- 8011784: d826 bhi.n 80117d4 <UART_SetConfig+0x260>
- 8011786: a201 add r2, pc, #4 @ (adr r2, 801178c <UART_SetConfig+0x218>)
- 8011788: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 801178c: 080117a5 .word 0x080117a5
- 8011790: 080117ad .word 0x080117ad
- 8011794: 080117b5 .word 0x080117b5
- 8011798: 080117bd .word 0x080117bd
- 801179c: 080117c5 .word 0x080117c5
- 80117a0: 080117cd .word 0x080117cd
- 80117a4: 2300 movs r3, #0
- 80117a6: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80117aa: e1b6 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80117ac: 2304 movs r3, #4
- 80117ae: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80117b2: e1b2 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80117b4: 2308 movs r3, #8
- 80117b6: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80117ba: e1ae b.n 8011b1a <UART_SetConfig+0x5a6>
- 80117bc: 2310 movs r3, #16
- 80117be: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80117c2: e1aa b.n 8011b1a <UART_SetConfig+0x5a6>
- 80117c4: 2320 movs r3, #32
- 80117c6: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80117ca: e1a6 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80117cc: 2340 movs r3, #64 @ 0x40
- 80117ce: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80117d2: e1a2 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80117d4: 2380 movs r3, #128 @ 0x80
- 80117d6: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80117da: e19e b.n 8011b1a <UART_SetConfig+0x5a6>
- 80117dc: 697b ldr r3, [r7, #20]
- 80117de: 681b ldr r3, [r3, #0]
- 80117e0: 4a35 ldr r2, [pc, #212] @ (80118b8 <UART_SetConfig+0x344>)
- 80117e2: 4293 cmp r3, r2
- 80117e4: d130 bne.n 8011848 <UART_SetConfig+0x2d4>
- 80117e6: 4b31 ldr r3, [pc, #196] @ (80118ac <UART_SetConfig+0x338>)
- 80117e8: 6d5b ldr r3, [r3, #84] @ 0x54
- 80117ea: f003 0307 and.w r3, r3, #7
- 80117ee: 2b05 cmp r3, #5
- 80117f0: d826 bhi.n 8011840 <UART_SetConfig+0x2cc>
- 80117f2: a201 add r2, pc, #4 @ (adr r2, 80117f8 <UART_SetConfig+0x284>)
- 80117f4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 80117f8: 08011811 .word 0x08011811
- 80117fc: 08011819 .word 0x08011819
- 8011800: 08011821 .word 0x08011821
- 8011804: 08011829 .word 0x08011829
- 8011808: 08011831 .word 0x08011831
- 801180c: 08011839 .word 0x08011839
- 8011810: 2300 movs r3, #0
- 8011812: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011816: e180 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011818: 2304 movs r3, #4
- 801181a: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 801181e: e17c b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011820: 2308 movs r3, #8
- 8011822: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011826: e178 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011828: 2310 movs r3, #16
- 801182a: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 801182e: e174 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011830: 2320 movs r3, #32
- 8011832: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011836: e170 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011838: 2340 movs r3, #64 @ 0x40
- 801183a: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 801183e: e16c b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011840: 2380 movs r3, #128 @ 0x80
- 8011842: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011846: e168 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011848: 697b ldr r3, [r7, #20]
- 801184a: 681b ldr r3, [r3, #0]
- 801184c: 4a1b ldr r2, [pc, #108] @ (80118bc <UART_SetConfig+0x348>)
- 801184e: 4293 cmp r3, r2
- 8011850: d142 bne.n 80118d8 <UART_SetConfig+0x364>
- 8011852: 4b16 ldr r3, [pc, #88] @ (80118ac <UART_SetConfig+0x338>)
- 8011854: 6d5b ldr r3, [r3, #84] @ 0x54
- 8011856: f003 0307 and.w r3, r3, #7
- 801185a: 2b05 cmp r3, #5
- 801185c: d838 bhi.n 80118d0 <UART_SetConfig+0x35c>
- 801185e: a201 add r2, pc, #4 @ (adr r2, 8011864 <UART_SetConfig+0x2f0>)
- 8011860: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8011864: 0801187d .word 0x0801187d
- 8011868: 08011885 .word 0x08011885
- 801186c: 0801188d .word 0x0801188d
- 8011870: 08011895 .word 0x08011895
- 8011874: 080118c1 .word 0x080118c1
- 8011878: 080118c9 .word 0x080118c9
- 801187c: 2300 movs r3, #0
- 801187e: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011882: e14a b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011884: 2304 movs r3, #4
- 8011886: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 801188a: e146 b.n 8011b1a <UART_SetConfig+0x5a6>
- 801188c: 2308 movs r3, #8
- 801188e: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011892: e142 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011894: 2310 movs r3, #16
- 8011896: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 801189a: e13e b.n 8011b1a <UART_SetConfig+0x5a6>
- 801189c: cfff69f3 .word 0xcfff69f3
- 80118a0: 58000c00 .word 0x58000c00
- 80118a4: 11fff4ff .word 0x11fff4ff
- 80118a8: 40011000 .word 0x40011000
- 80118ac: 58024400 .word 0x58024400
- 80118b0: 40004400 .word 0x40004400
- 80118b4: 40004800 .word 0x40004800
- 80118b8: 40004c00 .word 0x40004c00
- 80118bc: 40005000 .word 0x40005000
- 80118c0: 2320 movs r3, #32
- 80118c2: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80118c6: e128 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80118c8: 2340 movs r3, #64 @ 0x40
- 80118ca: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80118ce: e124 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80118d0: 2380 movs r3, #128 @ 0x80
- 80118d2: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80118d6: e120 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80118d8: 697b ldr r3, [r7, #20]
- 80118da: 681b ldr r3, [r3, #0]
- 80118dc: 4acb ldr r2, [pc, #812] @ (8011c0c <UART_SetConfig+0x698>)
- 80118de: 4293 cmp r3, r2
- 80118e0: d176 bne.n 80119d0 <UART_SetConfig+0x45c>
- 80118e2: 4bcb ldr r3, [pc, #812] @ (8011c10 <UART_SetConfig+0x69c>)
- 80118e4: 6d5b ldr r3, [r3, #84] @ 0x54
- 80118e6: f003 0338 and.w r3, r3, #56 @ 0x38
- 80118ea: 2b28 cmp r3, #40 @ 0x28
- 80118ec: d86c bhi.n 80119c8 <UART_SetConfig+0x454>
- 80118ee: a201 add r2, pc, #4 @ (adr r2, 80118f4 <UART_SetConfig+0x380>)
- 80118f0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 80118f4: 08011999 .word 0x08011999
- 80118f8: 080119c9 .word 0x080119c9
- 80118fc: 080119c9 .word 0x080119c9
- 8011900: 080119c9 .word 0x080119c9
- 8011904: 080119c9 .word 0x080119c9
- 8011908: 080119c9 .word 0x080119c9
- 801190c: 080119c9 .word 0x080119c9
- 8011910: 080119c9 .word 0x080119c9
- 8011914: 080119a1 .word 0x080119a1
- 8011918: 080119c9 .word 0x080119c9
- 801191c: 080119c9 .word 0x080119c9
- 8011920: 080119c9 .word 0x080119c9
- 8011924: 080119c9 .word 0x080119c9
- 8011928: 080119c9 .word 0x080119c9
- 801192c: 080119c9 .word 0x080119c9
- 8011930: 080119c9 .word 0x080119c9
- 8011934: 080119a9 .word 0x080119a9
- 8011938: 080119c9 .word 0x080119c9
- 801193c: 080119c9 .word 0x080119c9
- 8011940: 080119c9 .word 0x080119c9
- 8011944: 080119c9 .word 0x080119c9
- 8011948: 080119c9 .word 0x080119c9
- 801194c: 080119c9 .word 0x080119c9
- 8011950: 080119c9 .word 0x080119c9
- 8011954: 080119b1 .word 0x080119b1
- 8011958: 080119c9 .word 0x080119c9
- 801195c: 080119c9 .word 0x080119c9
- 8011960: 080119c9 .word 0x080119c9
- 8011964: 080119c9 .word 0x080119c9
- 8011968: 080119c9 .word 0x080119c9
- 801196c: 080119c9 .word 0x080119c9
- 8011970: 080119c9 .word 0x080119c9
- 8011974: 080119b9 .word 0x080119b9
- 8011978: 080119c9 .word 0x080119c9
- 801197c: 080119c9 .word 0x080119c9
- 8011980: 080119c9 .word 0x080119c9
- 8011984: 080119c9 .word 0x080119c9
- 8011988: 080119c9 .word 0x080119c9
- 801198c: 080119c9 .word 0x080119c9
- 8011990: 080119c9 .word 0x080119c9
- 8011994: 080119c1 .word 0x080119c1
- 8011998: 2301 movs r3, #1
- 801199a: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 801199e: e0bc b.n 8011b1a <UART_SetConfig+0x5a6>
- 80119a0: 2304 movs r3, #4
- 80119a2: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80119a6: e0b8 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80119a8: 2308 movs r3, #8
- 80119aa: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80119ae: e0b4 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80119b0: 2310 movs r3, #16
- 80119b2: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80119b6: e0b0 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80119b8: 2320 movs r3, #32
- 80119ba: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80119be: e0ac b.n 8011b1a <UART_SetConfig+0x5a6>
- 80119c0: 2340 movs r3, #64 @ 0x40
- 80119c2: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80119c6: e0a8 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80119c8: 2380 movs r3, #128 @ 0x80
- 80119ca: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 80119ce: e0a4 b.n 8011b1a <UART_SetConfig+0x5a6>
- 80119d0: 697b ldr r3, [r7, #20]
- 80119d2: 681b ldr r3, [r3, #0]
- 80119d4: 4a8f ldr r2, [pc, #572] @ (8011c14 <UART_SetConfig+0x6a0>)
- 80119d6: 4293 cmp r3, r2
- 80119d8: d130 bne.n 8011a3c <UART_SetConfig+0x4c8>
- 80119da: 4b8d ldr r3, [pc, #564] @ (8011c10 <UART_SetConfig+0x69c>)
- 80119dc: 6d5b ldr r3, [r3, #84] @ 0x54
- 80119de: f003 0307 and.w r3, r3, #7
- 80119e2: 2b05 cmp r3, #5
- 80119e4: d826 bhi.n 8011a34 <UART_SetConfig+0x4c0>
- 80119e6: a201 add r2, pc, #4 @ (adr r2, 80119ec <UART_SetConfig+0x478>)
- 80119e8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 80119ec: 08011a05 .word 0x08011a05
- 80119f0: 08011a0d .word 0x08011a0d
- 80119f4: 08011a15 .word 0x08011a15
- 80119f8: 08011a1d .word 0x08011a1d
- 80119fc: 08011a25 .word 0x08011a25
- 8011a00: 08011a2d .word 0x08011a2d
- 8011a04: 2300 movs r3, #0
- 8011a06: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011a0a: e086 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011a0c: 2304 movs r3, #4
- 8011a0e: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011a12: e082 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011a14: 2308 movs r3, #8
- 8011a16: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011a1a: e07e b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011a1c: 2310 movs r3, #16
- 8011a1e: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011a22: e07a b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011a24: 2320 movs r3, #32
- 8011a26: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011a2a: e076 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011a2c: 2340 movs r3, #64 @ 0x40
- 8011a2e: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011a32: e072 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011a34: 2380 movs r3, #128 @ 0x80
- 8011a36: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011a3a: e06e b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011a3c: 697b ldr r3, [r7, #20]
- 8011a3e: 681b ldr r3, [r3, #0]
- 8011a40: 4a75 ldr r2, [pc, #468] @ (8011c18 <UART_SetConfig+0x6a4>)
- 8011a42: 4293 cmp r3, r2
- 8011a44: d130 bne.n 8011aa8 <UART_SetConfig+0x534>
- 8011a46: 4b72 ldr r3, [pc, #456] @ (8011c10 <UART_SetConfig+0x69c>)
- 8011a48: 6d5b ldr r3, [r3, #84] @ 0x54
- 8011a4a: f003 0307 and.w r3, r3, #7
- 8011a4e: 2b05 cmp r3, #5
- 8011a50: d826 bhi.n 8011aa0 <UART_SetConfig+0x52c>
- 8011a52: a201 add r2, pc, #4 @ (adr r2, 8011a58 <UART_SetConfig+0x4e4>)
- 8011a54: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8011a58: 08011a71 .word 0x08011a71
- 8011a5c: 08011a79 .word 0x08011a79
- 8011a60: 08011a81 .word 0x08011a81
- 8011a64: 08011a89 .word 0x08011a89
- 8011a68: 08011a91 .word 0x08011a91
- 8011a6c: 08011a99 .word 0x08011a99
- 8011a70: 2300 movs r3, #0
- 8011a72: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011a76: e050 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011a78: 2304 movs r3, #4
- 8011a7a: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011a7e: e04c b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011a80: 2308 movs r3, #8
- 8011a82: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011a86: e048 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011a88: 2310 movs r3, #16
- 8011a8a: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011a8e: e044 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011a90: 2320 movs r3, #32
- 8011a92: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011a96: e040 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011a98: 2340 movs r3, #64 @ 0x40
- 8011a9a: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011a9e: e03c b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011aa0: 2380 movs r3, #128 @ 0x80
- 8011aa2: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011aa6: e038 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011aa8: 697b ldr r3, [r7, #20]
- 8011aaa: 681b ldr r3, [r3, #0]
- 8011aac: 4a5b ldr r2, [pc, #364] @ (8011c1c <UART_SetConfig+0x6a8>)
- 8011aae: 4293 cmp r3, r2
- 8011ab0: d130 bne.n 8011b14 <UART_SetConfig+0x5a0>
- 8011ab2: 4b57 ldr r3, [pc, #348] @ (8011c10 <UART_SetConfig+0x69c>)
- 8011ab4: 6d9b ldr r3, [r3, #88] @ 0x58
- 8011ab6: f003 0307 and.w r3, r3, #7
- 8011aba: 2b05 cmp r3, #5
- 8011abc: d826 bhi.n 8011b0c <UART_SetConfig+0x598>
- 8011abe: a201 add r2, pc, #4 @ (adr r2, 8011ac4 <UART_SetConfig+0x550>)
- 8011ac0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8011ac4: 08011add .word 0x08011add
- 8011ac8: 08011ae5 .word 0x08011ae5
- 8011acc: 08011aed .word 0x08011aed
- 8011ad0: 08011af5 .word 0x08011af5
- 8011ad4: 08011afd .word 0x08011afd
- 8011ad8: 08011b05 .word 0x08011b05
- 8011adc: 2302 movs r3, #2
- 8011ade: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011ae2: e01a b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011ae4: 2304 movs r3, #4
- 8011ae6: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011aea: e016 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011aec: 2308 movs r3, #8
- 8011aee: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011af2: e012 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011af4: 2310 movs r3, #16
- 8011af6: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011afa: e00e b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011afc: 2320 movs r3, #32
- 8011afe: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011b02: e00a b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011b04: 2340 movs r3, #64 @ 0x40
- 8011b06: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011b0a: e006 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011b0c: 2380 movs r3, #128 @ 0x80
- 8011b0e: f887 3043 strb.w r3, [r7, #67] @ 0x43
- 8011b12: e002 b.n 8011b1a <UART_SetConfig+0x5a6>
- 8011b14: 2380 movs r3, #128 @ 0x80
- 8011b16: f887 3043 strb.w r3, [r7, #67] @ 0x43
- /* Check LPUART instance */
- if (UART_INSTANCE_LOWPOWER(huart))
- 8011b1a: 697b ldr r3, [r7, #20]
- 8011b1c: 681b ldr r3, [r3, #0]
- 8011b1e: 4a3f ldr r2, [pc, #252] @ (8011c1c <UART_SetConfig+0x6a8>)
- 8011b20: 4293 cmp r3, r2
- 8011b22: f040 80f8 bne.w 8011d16 <UART_SetConfig+0x7a2>
- {
- /* Retrieve frequency clock */
- switch (clocksource)
- 8011b26: f897 3043 ldrb.w r3, [r7, #67] @ 0x43
- 8011b2a: 2b20 cmp r3, #32
- 8011b2c: dc46 bgt.n 8011bbc <UART_SetConfig+0x648>
- 8011b2e: 2b02 cmp r3, #2
- 8011b30: f2c0 8082 blt.w 8011c38 <UART_SetConfig+0x6c4>
- 8011b34: 3b02 subs r3, #2
- 8011b36: 2b1e cmp r3, #30
- 8011b38: d87e bhi.n 8011c38 <UART_SetConfig+0x6c4>
- 8011b3a: a201 add r2, pc, #4 @ (adr r2, 8011b40 <UART_SetConfig+0x5cc>)
- 8011b3c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8011b40: 08011bc3 .word 0x08011bc3
- 8011b44: 08011c39 .word 0x08011c39
- 8011b48: 08011bcb .word 0x08011bcb
- 8011b4c: 08011c39 .word 0x08011c39
- 8011b50: 08011c39 .word 0x08011c39
- 8011b54: 08011c39 .word 0x08011c39
- 8011b58: 08011bdb .word 0x08011bdb
- 8011b5c: 08011c39 .word 0x08011c39
- 8011b60: 08011c39 .word 0x08011c39
- 8011b64: 08011c39 .word 0x08011c39
- 8011b68: 08011c39 .word 0x08011c39
- 8011b6c: 08011c39 .word 0x08011c39
- 8011b70: 08011c39 .word 0x08011c39
- 8011b74: 08011c39 .word 0x08011c39
- 8011b78: 08011beb .word 0x08011beb
- 8011b7c: 08011c39 .word 0x08011c39
- 8011b80: 08011c39 .word 0x08011c39
- 8011b84: 08011c39 .word 0x08011c39
- 8011b88: 08011c39 .word 0x08011c39
- 8011b8c: 08011c39 .word 0x08011c39
- 8011b90: 08011c39 .word 0x08011c39
- 8011b94: 08011c39 .word 0x08011c39
- 8011b98: 08011c39 .word 0x08011c39
- 8011b9c: 08011c39 .word 0x08011c39
- 8011ba0: 08011c39 .word 0x08011c39
- 8011ba4: 08011c39 .word 0x08011c39
- 8011ba8: 08011c39 .word 0x08011c39
- 8011bac: 08011c39 .word 0x08011c39
- 8011bb0: 08011c39 .word 0x08011c39
- 8011bb4: 08011c39 .word 0x08011c39
- 8011bb8: 08011c2b .word 0x08011c2b
- 8011bbc: 2b40 cmp r3, #64 @ 0x40
- 8011bbe: d037 beq.n 8011c30 <UART_SetConfig+0x6bc>
- 8011bc0: e03a b.n 8011c38 <UART_SetConfig+0x6c4>
- {
- case UART_CLOCKSOURCE_D3PCLK1:
- pclk = HAL_RCCEx_GetD3PCLK1Freq();
- 8011bc2: f7fc f9fd bl 800dfc0 <HAL_RCCEx_GetD3PCLK1Freq>
- 8011bc6: 63f8 str r0, [r7, #60] @ 0x3c
- break;
- 8011bc8: e03c b.n 8011c44 <UART_SetConfig+0x6d0>
- case UART_CLOCKSOURCE_PLL2:
- HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
- 8011bca: f107 0324 add.w r3, r7, #36 @ 0x24
- 8011bce: 4618 mov r0, r3
- 8011bd0: f7fc fa0c bl 800dfec <HAL_RCCEx_GetPLL2ClockFreq>
- pclk = pll2_clocks.PLL2_Q_Frequency;
- 8011bd4: 6abb ldr r3, [r7, #40] @ 0x28
- 8011bd6: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011bd8: e034 b.n 8011c44 <UART_SetConfig+0x6d0>
- case UART_CLOCKSOURCE_PLL3:
- HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
- 8011bda: f107 0318 add.w r3, r7, #24
- 8011bde: 4618 mov r0, r3
- 8011be0: f7fc fb58 bl 800e294 <HAL_RCCEx_GetPLL3ClockFreq>
- pclk = pll3_clocks.PLL3_Q_Frequency;
- 8011be4: 69fb ldr r3, [r7, #28]
- 8011be6: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011be8: e02c b.n 8011c44 <UART_SetConfig+0x6d0>
- case UART_CLOCKSOURCE_HSI:
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
- 8011bea: 4b09 ldr r3, [pc, #36] @ (8011c10 <UART_SetConfig+0x69c>)
- 8011bec: 681b ldr r3, [r3, #0]
- 8011bee: f003 0320 and.w r3, r3, #32
- 8011bf2: 2b00 cmp r3, #0
- 8011bf4: d016 beq.n 8011c24 <UART_SetConfig+0x6b0>
- {
- pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
- 8011bf6: 4b06 ldr r3, [pc, #24] @ (8011c10 <UART_SetConfig+0x69c>)
- 8011bf8: 681b ldr r3, [r3, #0]
- 8011bfa: 08db lsrs r3, r3, #3
- 8011bfc: f003 0303 and.w r3, r3, #3
- 8011c00: 4a07 ldr r2, [pc, #28] @ (8011c20 <UART_SetConfig+0x6ac>)
- 8011c02: fa22 f303 lsr.w r3, r2, r3
- 8011c06: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- pclk = (uint32_t) HSI_VALUE;
- }
- break;
- 8011c08: e01c b.n 8011c44 <UART_SetConfig+0x6d0>
- 8011c0a: bf00 nop
- 8011c0c: 40011400 .word 0x40011400
- 8011c10: 58024400 .word 0x58024400
- 8011c14: 40007800 .word 0x40007800
- 8011c18: 40007c00 .word 0x40007c00
- 8011c1c: 58000c00 .word 0x58000c00
- 8011c20: 03d09000 .word 0x03d09000
- pclk = (uint32_t) HSI_VALUE;
- 8011c24: 4b9d ldr r3, [pc, #628] @ (8011e9c <UART_SetConfig+0x928>)
- 8011c26: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011c28: e00c b.n 8011c44 <UART_SetConfig+0x6d0>
- case UART_CLOCKSOURCE_CSI:
- pclk = (uint32_t) CSI_VALUE;
- 8011c2a: 4b9d ldr r3, [pc, #628] @ (8011ea0 <UART_SetConfig+0x92c>)
- 8011c2c: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011c2e: e009 b.n 8011c44 <UART_SetConfig+0x6d0>
- case UART_CLOCKSOURCE_LSE:
- pclk = (uint32_t) LSE_VALUE;
- 8011c30: f44f 4300 mov.w r3, #32768 @ 0x8000
- 8011c34: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011c36: e005 b.n 8011c44 <UART_SetConfig+0x6d0>
- default:
- pclk = 0U;
- 8011c38: 2300 movs r3, #0
- 8011c3a: 63fb str r3, [r7, #60] @ 0x3c
- ret = HAL_ERROR;
- 8011c3c: 2301 movs r3, #1
- 8011c3e: f887 3042 strb.w r3, [r7, #66] @ 0x42
- break;
- 8011c42: bf00 nop
- }
- /* If proper clock source reported */
- if (pclk != 0U)
- 8011c44: 6bfb ldr r3, [r7, #60] @ 0x3c
- 8011c46: 2b00 cmp r3, #0
- 8011c48: f000 81de beq.w 8012008 <UART_SetConfig+0xa94>
- {
- /* Compute clock after Prescaler */
- lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]);
- 8011c4c: 697b ldr r3, [r7, #20]
- 8011c4e: 6a5b ldr r3, [r3, #36] @ 0x24
- 8011c50: 4a94 ldr r2, [pc, #592] @ (8011ea4 <UART_SetConfig+0x930>)
- 8011c52: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
- 8011c56: 461a mov r2, r3
- 8011c58: 6bfb ldr r3, [r7, #60] @ 0x3c
- 8011c5a: fbb3 f3f2 udiv r3, r3, r2
- 8011c5e: 633b str r3, [r7, #48] @ 0x30
- /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
- if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
- 8011c60: 697b ldr r3, [r7, #20]
- 8011c62: 685a ldr r2, [r3, #4]
- 8011c64: 4613 mov r3, r2
- 8011c66: 005b lsls r3, r3, #1
- 8011c68: 4413 add r3, r2
- 8011c6a: 6b3a ldr r2, [r7, #48] @ 0x30
- 8011c6c: 429a cmp r2, r3
- 8011c6e: d305 bcc.n 8011c7c <UART_SetConfig+0x708>
- (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate)))
- 8011c70: 697b ldr r3, [r7, #20]
- 8011c72: 685b ldr r3, [r3, #4]
- 8011c74: 031b lsls r3, r3, #12
- if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
- 8011c76: 6b3a ldr r2, [r7, #48] @ 0x30
- 8011c78: 429a cmp r2, r3
- 8011c7a: d903 bls.n 8011c84 <UART_SetConfig+0x710>
- {
- ret = HAL_ERROR;
- 8011c7c: 2301 movs r3, #1
- 8011c7e: f887 3042 strb.w r3, [r7, #66] @ 0x42
- 8011c82: e1c1 b.n 8012008 <UART_SetConfig+0xa94>
- }
- else
- {
- /* Check computed UsartDiv value is in allocated range
- (it is forbidden to write values lower than 0x300 in the LPUART_BRR register) */
- usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
- 8011c84: 6bfb ldr r3, [r7, #60] @ 0x3c
- 8011c86: 2200 movs r2, #0
- 8011c88: 60bb str r3, [r7, #8]
- 8011c8a: 60fa str r2, [r7, #12]
- 8011c8c: 697b ldr r3, [r7, #20]
- 8011c8e: 6a5b ldr r3, [r3, #36] @ 0x24
- 8011c90: 4a84 ldr r2, [pc, #528] @ (8011ea4 <UART_SetConfig+0x930>)
- 8011c92: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
- 8011c96: b29b uxth r3, r3
- 8011c98: 2200 movs r2, #0
- 8011c9a: 603b str r3, [r7, #0]
- 8011c9c: 607a str r2, [r7, #4]
- 8011c9e: e9d7 2300 ldrd r2, r3, [r7]
- 8011ca2: e9d7 0102 ldrd r0, r1, [r7, #8]
- 8011ca6: f7ee fb6b bl 8000380 <__aeabi_uldivmod>
- 8011caa: 4602 mov r2, r0
- 8011cac: 460b mov r3, r1
- 8011cae: 4610 mov r0, r2
- 8011cb0: 4619 mov r1, r3
- 8011cb2: f04f 0200 mov.w r2, #0
- 8011cb6: f04f 0300 mov.w r3, #0
- 8011cba: 020b lsls r3, r1, #8
- 8011cbc: ea43 6310 orr.w r3, r3, r0, lsr #24
- 8011cc0: 0202 lsls r2, r0, #8
- 8011cc2: 6979 ldr r1, [r7, #20]
- 8011cc4: 6849 ldr r1, [r1, #4]
- 8011cc6: 0849 lsrs r1, r1, #1
- 8011cc8: 2000 movs r0, #0
- 8011cca: 460c mov r4, r1
- 8011ccc: 4605 mov r5, r0
- 8011cce: eb12 0804 adds.w r8, r2, r4
- 8011cd2: eb43 0905 adc.w r9, r3, r5
- 8011cd6: 697b ldr r3, [r7, #20]
- 8011cd8: 685b ldr r3, [r3, #4]
- 8011cda: 2200 movs r2, #0
- 8011cdc: 469a mov sl, r3
- 8011cde: 4693 mov fp, r2
- 8011ce0: 4652 mov r2, sl
- 8011ce2: 465b mov r3, fp
- 8011ce4: 4640 mov r0, r8
- 8011ce6: 4649 mov r1, r9
- 8011ce8: f7ee fb4a bl 8000380 <__aeabi_uldivmod>
- 8011cec: 4602 mov r2, r0
- 8011cee: 460b mov r3, r1
- 8011cf0: 4613 mov r3, r2
- 8011cf2: 63bb str r3, [r7, #56] @ 0x38
- if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
- 8011cf4: 6bbb ldr r3, [r7, #56] @ 0x38
- 8011cf6: f5b3 7f40 cmp.w r3, #768 @ 0x300
- 8011cfa: d308 bcc.n 8011d0e <UART_SetConfig+0x79a>
- 8011cfc: 6bbb ldr r3, [r7, #56] @ 0x38
- 8011cfe: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
- 8011d02: d204 bcs.n 8011d0e <UART_SetConfig+0x79a>
- {
- huart->Instance->BRR = usartdiv;
- 8011d04: 697b ldr r3, [r7, #20]
- 8011d06: 681b ldr r3, [r3, #0]
- 8011d08: 6bba ldr r2, [r7, #56] @ 0x38
- 8011d0a: 60da str r2, [r3, #12]
- 8011d0c: e17c b.n 8012008 <UART_SetConfig+0xa94>
- }
- else
- {
- ret = HAL_ERROR;
- 8011d0e: 2301 movs r3, #1
- 8011d10: f887 3042 strb.w r3, [r7, #66] @ 0x42
- 8011d14: e178 b.n 8012008 <UART_SetConfig+0xa94>
- } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) ||
- (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */
- } /* if (pclk != 0) */
- }
- /* Check UART Over Sampling to set Baud Rate Register */
- else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
- 8011d16: 697b ldr r3, [r7, #20]
- 8011d18: 69db ldr r3, [r3, #28]
- 8011d1a: f5b3 4f00 cmp.w r3, #32768 @ 0x8000
- 8011d1e: f040 80c5 bne.w 8011eac <UART_SetConfig+0x938>
- {
- switch (clocksource)
- 8011d22: f897 3043 ldrb.w r3, [r7, #67] @ 0x43
- 8011d26: 2b20 cmp r3, #32
- 8011d28: dc48 bgt.n 8011dbc <UART_SetConfig+0x848>
- 8011d2a: 2b00 cmp r3, #0
- 8011d2c: db7b blt.n 8011e26 <UART_SetConfig+0x8b2>
- 8011d2e: 2b20 cmp r3, #32
- 8011d30: d879 bhi.n 8011e26 <UART_SetConfig+0x8b2>
- 8011d32: a201 add r2, pc, #4 @ (adr r2, 8011d38 <UART_SetConfig+0x7c4>)
- 8011d34: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8011d38: 08011dc3 .word 0x08011dc3
- 8011d3c: 08011dcb .word 0x08011dcb
- 8011d40: 08011e27 .word 0x08011e27
- 8011d44: 08011e27 .word 0x08011e27
- 8011d48: 08011dd3 .word 0x08011dd3
- 8011d4c: 08011e27 .word 0x08011e27
- 8011d50: 08011e27 .word 0x08011e27
- 8011d54: 08011e27 .word 0x08011e27
- 8011d58: 08011de3 .word 0x08011de3
- 8011d5c: 08011e27 .word 0x08011e27
- 8011d60: 08011e27 .word 0x08011e27
- 8011d64: 08011e27 .word 0x08011e27
- 8011d68: 08011e27 .word 0x08011e27
- 8011d6c: 08011e27 .word 0x08011e27
- 8011d70: 08011e27 .word 0x08011e27
- 8011d74: 08011e27 .word 0x08011e27
- 8011d78: 08011df3 .word 0x08011df3
- 8011d7c: 08011e27 .word 0x08011e27
- 8011d80: 08011e27 .word 0x08011e27
- 8011d84: 08011e27 .word 0x08011e27
- 8011d88: 08011e27 .word 0x08011e27
- 8011d8c: 08011e27 .word 0x08011e27
- 8011d90: 08011e27 .word 0x08011e27
- 8011d94: 08011e27 .word 0x08011e27
- 8011d98: 08011e27 .word 0x08011e27
- 8011d9c: 08011e27 .word 0x08011e27
- 8011da0: 08011e27 .word 0x08011e27
- 8011da4: 08011e27 .word 0x08011e27
- 8011da8: 08011e27 .word 0x08011e27
- 8011dac: 08011e27 .word 0x08011e27
- 8011db0: 08011e27 .word 0x08011e27
- 8011db4: 08011e27 .word 0x08011e27
- 8011db8: 08011e19 .word 0x08011e19
- 8011dbc: 2b40 cmp r3, #64 @ 0x40
- 8011dbe: d02e beq.n 8011e1e <UART_SetConfig+0x8aa>
- 8011dc0: e031 b.n 8011e26 <UART_SetConfig+0x8b2>
- {
- case UART_CLOCKSOURCE_D2PCLK1:
- pclk = HAL_RCC_GetPCLK1Freq();
- 8011dc2: f7fa f921 bl 800c008 <HAL_RCC_GetPCLK1Freq>
- 8011dc6: 63f8 str r0, [r7, #60] @ 0x3c
- break;
- 8011dc8: e033 b.n 8011e32 <UART_SetConfig+0x8be>
- case UART_CLOCKSOURCE_D2PCLK2:
- pclk = HAL_RCC_GetPCLK2Freq();
- 8011dca: f7fa f933 bl 800c034 <HAL_RCC_GetPCLK2Freq>
- 8011dce: 63f8 str r0, [r7, #60] @ 0x3c
- break;
- 8011dd0: e02f b.n 8011e32 <UART_SetConfig+0x8be>
- case UART_CLOCKSOURCE_PLL2:
- HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
- 8011dd2: f107 0324 add.w r3, r7, #36 @ 0x24
- 8011dd6: 4618 mov r0, r3
- 8011dd8: f7fc f908 bl 800dfec <HAL_RCCEx_GetPLL2ClockFreq>
- pclk = pll2_clocks.PLL2_Q_Frequency;
- 8011ddc: 6abb ldr r3, [r7, #40] @ 0x28
- 8011dde: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011de0: e027 b.n 8011e32 <UART_SetConfig+0x8be>
- case UART_CLOCKSOURCE_PLL3:
- HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
- 8011de2: f107 0318 add.w r3, r7, #24
- 8011de6: 4618 mov r0, r3
- 8011de8: f7fc fa54 bl 800e294 <HAL_RCCEx_GetPLL3ClockFreq>
- pclk = pll3_clocks.PLL3_Q_Frequency;
- 8011dec: 69fb ldr r3, [r7, #28]
- 8011dee: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011df0: e01f b.n 8011e32 <UART_SetConfig+0x8be>
- case UART_CLOCKSOURCE_HSI:
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
- 8011df2: 4b2d ldr r3, [pc, #180] @ (8011ea8 <UART_SetConfig+0x934>)
- 8011df4: 681b ldr r3, [r3, #0]
- 8011df6: f003 0320 and.w r3, r3, #32
- 8011dfa: 2b00 cmp r3, #0
- 8011dfc: d009 beq.n 8011e12 <UART_SetConfig+0x89e>
- {
- pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
- 8011dfe: 4b2a ldr r3, [pc, #168] @ (8011ea8 <UART_SetConfig+0x934>)
- 8011e00: 681b ldr r3, [r3, #0]
- 8011e02: 08db lsrs r3, r3, #3
- 8011e04: f003 0303 and.w r3, r3, #3
- 8011e08: 4a24 ldr r2, [pc, #144] @ (8011e9c <UART_SetConfig+0x928>)
- 8011e0a: fa22 f303 lsr.w r3, r2, r3
- 8011e0e: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- pclk = (uint32_t) HSI_VALUE;
- }
- break;
- 8011e10: e00f b.n 8011e32 <UART_SetConfig+0x8be>
- pclk = (uint32_t) HSI_VALUE;
- 8011e12: 4b22 ldr r3, [pc, #136] @ (8011e9c <UART_SetConfig+0x928>)
- 8011e14: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011e16: e00c b.n 8011e32 <UART_SetConfig+0x8be>
- case UART_CLOCKSOURCE_CSI:
- pclk = (uint32_t) CSI_VALUE;
- 8011e18: 4b21 ldr r3, [pc, #132] @ (8011ea0 <UART_SetConfig+0x92c>)
- 8011e1a: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011e1c: e009 b.n 8011e32 <UART_SetConfig+0x8be>
- case UART_CLOCKSOURCE_LSE:
- pclk = (uint32_t) LSE_VALUE;
- 8011e1e: f44f 4300 mov.w r3, #32768 @ 0x8000
- 8011e22: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011e24: e005 b.n 8011e32 <UART_SetConfig+0x8be>
- default:
- pclk = 0U;
- 8011e26: 2300 movs r3, #0
- 8011e28: 63fb str r3, [r7, #60] @ 0x3c
- ret = HAL_ERROR;
- 8011e2a: 2301 movs r3, #1
- 8011e2c: f887 3042 strb.w r3, [r7, #66] @ 0x42
- break;
- 8011e30: bf00 nop
- }
- /* USARTDIV must be greater than or equal to 0d16 */
- if (pclk != 0U)
- 8011e32: 6bfb ldr r3, [r7, #60] @ 0x3c
- 8011e34: 2b00 cmp r3, #0
- 8011e36: f000 80e7 beq.w 8012008 <UART_SetConfig+0xa94>
- {
- usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
- 8011e3a: 697b ldr r3, [r7, #20]
- 8011e3c: 6a5b ldr r3, [r3, #36] @ 0x24
- 8011e3e: 4a19 ldr r2, [pc, #100] @ (8011ea4 <UART_SetConfig+0x930>)
- 8011e40: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
- 8011e44: 461a mov r2, r3
- 8011e46: 6bfb ldr r3, [r7, #60] @ 0x3c
- 8011e48: fbb3 f3f2 udiv r3, r3, r2
- 8011e4c: 005a lsls r2, r3, #1
- 8011e4e: 697b ldr r3, [r7, #20]
- 8011e50: 685b ldr r3, [r3, #4]
- 8011e52: 085b lsrs r3, r3, #1
- 8011e54: 441a add r2, r3
- 8011e56: 697b ldr r3, [r7, #20]
- 8011e58: 685b ldr r3, [r3, #4]
- 8011e5a: fbb2 f3f3 udiv r3, r2, r3
- 8011e5e: 63bb str r3, [r7, #56] @ 0x38
- if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
- 8011e60: 6bbb ldr r3, [r7, #56] @ 0x38
- 8011e62: 2b0f cmp r3, #15
- 8011e64: d916 bls.n 8011e94 <UART_SetConfig+0x920>
- 8011e66: 6bbb ldr r3, [r7, #56] @ 0x38
- 8011e68: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
- 8011e6c: d212 bcs.n 8011e94 <UART_SetConfig+0x920>
- {
- brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
- 8011e6e: 6bbb ldr r3, [r7, #56] @ 0x38
- 8011e70: b29b uxth r3, r3
- 8011e72: f023 030f bic.w r3, r3, #15
- 8011e76: 86fb strh r3, [r7, #54] @ 0x36
- brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
- 8011e78: 6bbb ldr r3, [r7, #56] @ 0x38
- 8011e7a: 085b lsrs r3, r3, #1
- 8011e7c: b29b uxth r3, r3
- 8011e7e: f003 0307 and.w r3, r3, #7
- 8011e82: b29a uxth r2, r3
- 8011e84: 8efb ldrh r3, [r7, #54] @ 0x36
- 8011e86: 4313 orrs r3, r2
- 8011e88: 86fb strh r3, [r7, #54] @ 0x36
- huart->Instance->BRR = brrtemp;
- 8011e8a: 697b ldr r3, [r7, #20]
- 8011e8c: 681b ldr r3, [r3, #0]
- 8011e8e: 8efa ldrh r2, [r7, #54] @ 0x36
- 8011e90: 60da str r2, [r3, #12]
- 8011e92: e0b9 b.n 8012008 <UART_SetConfig+0xa94>
- }
- else
- {
- ret = HAL_ERROR;
- 8011e94: 2301 movs r3, #1
- 8011e96: f887 3042 strb.w r3, [r7, #66] @ 0x42
- 8011e9a: e0b5 b.n 8012008 <UART_SetConfig+0xa94>
- 8011e9c: 03d09000 .word 0x03d09000
- 8011ea0: 003d0900 .word 0x003d0900
- 8011ea4: 08018c30 .word 0x08018c30
- 8011ea8: 58024400 .word 0x58024400
- }
- }
- }
- else
- {
- switch (clocksource)
- 8011eac: f897 3043 ldrb.w r3, [r7, #67] @ 0x43
- 8011eb0: 2b20 cmp r3, #32
- 8011eb2: dc49 bgt.n 8011f48 <UART_SetConfig+0x9d4>
- 8011eb4: 2b00 cmp r3, #0
- 8011eb6: db7c blt.n 8011fb2 <UART_SetConfig+0xa3e>
- 8011eb8: 2b20 cmp r3, #32
- 8011eba: d87a bhi.n 8011fb2 <UART_SetConfig+0xa3e>
- 8011ebc: a201 add r2, pc, #4 @ (adr r2, 8011ec4 <UART_SetConfig+0x950>)
- 8011ebe: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8011ec2: bf00 nop
- 8011ec4: 08011f4f .word 0x08011f4f
- 8011ec8: 08011f57 .word 0x08011f57
- 8011ecc: 08011fb3 .word 0x08011fb3
- 8011ed0: 08011fb3 .word 0x08011fb3
- 8011ed4: 08011f5f .word 0x08011f5f
- 8011ed8: 08011fb3 .word 0x08011fb3
- 8011edc: 08011fb3 .word 0x08011fb3
- 8011ee0: 08011fb3 .word 0x08011fb3
- 8011ee4: 08011f6f .word 0x08011f6f
- 8011ee8: 08011fb3 .word 0x08011fb3
- 8011eec: 08011fb3 .word 0x08011fb3
- 8011ef0: 08011fb3 .word 0x08011fb3
- 8011ef4: 08011fb3 .word 0x08011fb3
- 8011ef8: 08011fb3 .word 0x08011fb3
- 8011efc: 08011fb3 .word 0x08011fb3
- 8011f00: 08011fb3 .word 0x08011fb3
- 8011f04: 08011f7f .word 0x08011f7f
- 8011f08: 08011fb3 .word 0x08011fb3
- 8011f0c: 08011fb3 .word 0x08011fb3
- 8011f10: 08011fb3 .word 0x08011fb3
- 8011f14: 08011fb3 .word 0x08011fb3
- 8011f18: 08011fb3 .word 0x08011fb3
- 8011f1c: 08011fb3 .word 0x08011fb3
- 8011f20: 08011fb3 .word 0x08011fb3
- 8011f24: 08011fb3 .word 0x08011fb3
- 8011f28: 08011fb3 .word 0x08011fb3
- 8011f2c: 08011fb3 .word 0x08011fb3
- 8011f30: 08011fb3 .word 0x08011fb3
- 8011f34: 08011fb3 .word 0x08011fb3
- 8011f38: 08011fb3 .word 0x08011fb3
- 8011f3c: 08011fb3 .word 0x08011fb3
- 8011f40: 08011fb3 .word 0x08011fb3
- 8011f44: 08011fa5 .word 0x08011fa5
- 8011f48: 2b40 cmp r3, #64 @ 0x40
- 8011f4a: d02e beq.n 8011faa <UART_SetConfig+0xa36>
- 8011f4c: e031 b.n 8011fb2 <UART_SetConfig+0xa3e>
- {
- case UART_CLOCKSOURCE_D2PCLK1:
- pclk = HAL_RCC_GetPCLK1Freq();
- 8011f4e: f7fa f85b bl 800c008 <HAL_RCC_GetPCLK1Freq>
- 8011f52: 63f8 str r0, [r7, #60] @ 0x3c
- break;
- 8011f54: e033 b.n 8011fbe <UART_SetConfig+0xa4a>
- case UART_CLOCKSOURCE_D2PCLK2:
- pclk = HAL_RCC_GetPCLK2Freq();
- 8011f56: f7fa f86d bl 800c034 <HAL_RCC_GetPCLK2Freq>
- 8011f5a: 63f8 str r0, [r7, #60] @ 0x3c
- break;
- 8011f5c: e02f b.n 8011fbe <UART_SetConfig+0xa4a>
- case UART_CLOCKSOURCE_PLL2:
- HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
- 8011f5e: f107 0324 add.w r3, r7, #36 @ 0x24
- 8011f62: 4618 mov r0, r3
- 8011f64: f7fc f842 bl 800dfec <HAL_RCCEx_GetPLL2ClockFreq>
- pclk = pll2_clocks.PLL2_Q_Frequency;
- 8011f68: 6abb ldr r3, [r7, #40] @ 0x28
- 8011f6a: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011f6c: e027 b.n 8011fbe <UART_SetConfig+0xa4a>
- case UART_CLOCKSOURCE_PLL3:
- HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
- 8011f6e: f107 0318 add.w r3, r7, #24
- 8011f72: 4618 mov r0, r3
- 8011f74: f7fc f98e bl 800e294 <HAL_RCCEx_GetPLL3ClockFreq>
- pclk = pll3_clocks.PLL3_Q_Frequency;
- 8011f78: 69fb ldr r3, [r7, #28]
- 8011f7a: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011f7c: e01f b.n 8011fbe <UART_SetConfig+0xa4a>
- case UART_CLOCKSOURCE_HSI:
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
- 8011f7e: 4b2d ldr r3, [pc, #180] @ (8012034 <UART_SetConfig+0xac0>)
- 8011f80: 681b ldr r3, [r3, #0]
- 8011f82: f003 0320 and.w r3, r3, #32
- 8011f86: 2b00 cmp r3, #0
- 8011f88: d009 beq.n 8011f9e <UART_SetConfig+0xa2a>
- {
- pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
- 8011f8a: 4b2a ldr r3, [pc, #168] @ (8012034 <UART_SetConfig+0xac0>)
- 8011f8c: 681b ldr r3, [r3, #0]
- 8011f8e: 08db lsrs r3, r3, #3
- 8011f90: f003 0303 and.w r3, r3, #3
- 8011f94: 4a28 ldr r2, [pc, #160] @ (8012038 <UART_SetConfig+0xac4>)
- 8011f96: fa22 f303 lsr.w r3, r2, r3
- 8011f9a: 63fb str r3, [r7, #60] @ 0x3c
- }
- else
- {
- pclk = (uint32_t) HSI_VALUE;
- }
- break;
- 8011f9c: e00f b.n 8011fbe <UART_SetConfig+0xa4a>
- pclk = (uint32_t) HSI_VALUE;
- 8011f9e: 4b26 ldr r3, [pc, #152] @ (8012038 <UART_SetConfig+0xac4>)
- 8011fa0: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011fa2: e00c b.n 8011fbe <UART_SetConfig+0xa4a>
- case UART_CLOCKSOURCE_CSI:
- pclk = (uint32_t) CSI_VALUE;
- 8011fa4: 4b25 ldr r3, [pc, #148] @ (801203c <UART_SetConfig+0xac8>)
- 8011fa6: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011fa8: e009 b.n 8011fbe <UART_SetConfig+0xa4a>
- case UART_CLOCKSOURCE_LSE:
- pclk = (uint32_t) LSE_VALUE;
- 8011faa: f44f 4300 mov.w r3, #32768 @ 0x8000
- 8011fae: 63fb str r3, [r7, #60] @ 0x3c
- break;
- 8011fb0: e005 b.n 8011fbe <UART_SetConfig+0xa4a>
- default:
- pclk = 0U;
- 8011fb2: 2300 movs r3, #0
- 8011fb4: 63fb str r3, [r7, #60] @ 0x3c
- ret = HAL_ERROR;
- 8011fb6: 2301 movs r3, #1
- 8011fb8: f887 3042 strb.w r3, [r7, #66] @ 0x42
- break;
- 8011fbc: bf00 nop
- }
- if (pclk != 0U)
- 8011fbe: 6bfb ldr r3, [r7, #60] @ 0x3c
- 8011fc0: 2b00 cmp r3, #0
- 8011fc2: d021 beq.n 8012008 <UART_SetConfig+0xa94>
- {
- /* USARTDIV must be greater than or equal to 0d16 */
- usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
- 8011fc4: 697b ldr r3, [r7, #20]
- 8011fc6: 6a5b ldr r3, [r3, #36] @ 0x24
- 8011fc8: 4a1d ldr r2, [pc, #116] @ (8012040 <UART_SetConfig+0xacc>)
- 8011fca: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
- 8011fce: 461a mov r2, r3
- 8011fd0: 6bfb ldr r3, [r7, #60] @ 0x3c
- 8011fd2: fbb3 f2f2 udiv r2, r3, r2
- 8011fd6: 697b ldr r3, [r7, #20]
- 8011fd8: 685b ldr r3, [r3, #4]
- 8011fda: 085b lsrs r3, r3, #1
- 8011fdc: 441a add r2, r3
- 8011fde: 697b ldr r3, [r7, #20]
- 8011fe0: 685b ldr r3, [r3, #4]
- 8011fe2: fbb2 f3f3 udiv r3, r2, r3
- 8011fe6: 63bb str r3, [r7, #56] @ 0x38
- if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
- 8011fe8: 6bbb ldr r3, [r7, #56] @ 0x38
- 8011fea: 2b0f cmp r3, #15
- 8011fec: d909 bls.n 8012002 <UART_SetConfig+0xa8e>
- 8011fee: 6bbb ldr r3, [r7, #56] @ 0x38
- 8011ff0: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
- 8011ff4: d205 bcs.n 8012002 <UART_SetConfig+0xa8e>
- {
- huart->Instance->BRR = (uint16_t)usartdiv;
- 8011ff6: 6bbb ldr r3, [r7, #56] @ 0x38
- 8011ff8: b29a uxth r2, r3
- 8011ffa: 697b ldr r3, [r7, #20]
- 8011ffc: 681b ldr r3, [r3, #0]
- 8011ffe: 60da str r2, [r3, #12]
- 8012000: e002 b.n 8012008 <UART_SetConfig+0xa94>
- }
- else
- {
- ret = HAL_ERROR;
- 8012002: 2301 movs r3, #1
- 8012004: f887 3042 strb.w r3, [r7, #66] @ 0x42
- }
- }
- }
- /* Initialize the number of data to process during RX/TX ISR execution */
- huart->NbTxDataToProcess = 1;
- 8012008: 697b ldr r3, [r7, #20]
- 801200a: 2201 movs r2, #1
- 801200c: f8a3 206a strh.w r2, [r3, #106] @ 0x6a
- huart->NbRxDataToProcess = 1;
- 8012010: 697b ldr r3, [r7, #20]
- 8012012: 2201 movs r2, #1
- 8012014: f8a3 2068 strh.w r2, [r3, #104] @ 0x68
- /* Clear ISR function pointers */
- huart->RxISR = NULL;
- 8012018: 697b ldr r3, [r7, #20]
- 801201a: 2200 movs r2, #0
- 801201c: 675a str r2, [r3, #116] @ 0x74
- huart->TxISR = NULL;
- 801201e: 697b ldr r3, [r7, #20]
- 8012020: 2200 movs r2, #0
- 8012022: 679a str r2, [r3, #120] @ 0x78
- return ret;
- 8012024: f897 3042 ldrb.w r3, [r7, #66] @ 0x42
- }
- 8012028: 4618 mov r0, r3
- 801202a: 3748 adds r7, #72 @ 0x48
- 801202c: 46bd mov sp, r7
- 801202e: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
- 8012032: bf00 nop
- 8012034: 58024400 .word 0x58024400
- 8012038: 03d09000 .word 0x03d09000
- 801203c: 003d0900 .word 0x003d0900
- 8012040: 08018c30 .word 0x08018c30
- 08012044 <UART_AdvFeatureConfig>:
- * @brief Configure the UART peripheral advanced features.
- * @param huart UART handle.
- * @retval None
- */
- void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
- {
- 8012044: b480 push {r7}
- 8012046: b083 sub sp, #12
- 8012048: af00 add r7, sp, #0
- 801204a: 6078 str r0, [r7, #4]
- /* Check whether the set of advanced features to configure is properly set */
- assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
- /* if required, configure RX/TX pins swap */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
- 801204c: 687b ldr r3, [r7, #4]
- 801204e: 6a9b ldr r3, [r3, #40] @ 0x28
- 8012050: f003 0308 and.w r3, r3, #8
- 8012054: 2b00 cmp r3, #0
- 8012056: d00a beq.n 801206e <UART_AdvFeatureConfig+0x2a>
- {
- assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
- 8012058: 687b ldr r3, [r7, #4]
- 801205a: 681b ldr r3, [r3, #0]
- 801205c: 685b ldr r3, [r3, #4]
- 801205e: f423 4100 bic.w r1, r3, #32768 @ 0x8000
- 8012062: 687b ldr r3, [r7, #4]
- 8012064: 6b9a ldr r2, [r3, #56] @ 0x38
- 8012066: 687b ldr r3, [r7, #4]
- 8012068: 681b ldr r3, [r3, #0]
- 801206a: 430a orrs r2, r1
- 801206c: 605a str r2, [r3, #4]
- }
- /* if required, configure TX pin active level inversion */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
- 801206e: 687b ldr r3, [r7, #4]
- 8012070: 6a9b ldr r3, [r3, #40] @ 0x28
- 8012072: f003 0301 and.w r3, r3, #1
- 8012076: 2b00 cmp r3, #0
- 8012078: d00a beq.n 8012090 <UART_AdvFeatureConfig+0x4c>
- {
- assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
- 801207a: 687b ldr r3, [r7, #4]
- 801207c: 681b ldr r3, [r3, #0]
- 801207e: 685b ldr r3, [r3, #4]
- 8012080: f423 3100 bic.w r1, r3, #131072 @ 0x20000
- 8012084: 687b ldr r3, [r7, #4]
- 8012086: 6ada ldr r2, [r3, #44] @ 0x2c
- 8012088: 687b ldr r3, [r7, #4]
- 801208a: 681b ldr r3, [r3, #0]
- 801208c: 430a orrs r2, r1
- 801208e: 605a str r2, [r3, #4]
- }
- /* if required, configure RX pin active level inversion */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
- 8012090: 687b ldr r3, [r7, #4]
- 8012092: 6a9b ldr r3, [r3, #40] @ 0x28
- 8012094: f003 0302 and.w r3, r3, #2
- 8012098: 2b00 cmp r3, #0
- 801209a: d00a beq.n 80120b2 <UART_AdvFeatureConfig+0x6e>
- {
- assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
- 801209c: 687b ldr r3, [r7, #4]
- 801209e: 681b ldr r3, [r3, #0]
- 80120a0: 685b ldr r3, [r3, #4]
- 80120a2: f423 3180 bic.w r1, r3, #65536 @ 0x10000
- 80120a6: 687b ldr r3, [r7, #4]
- 80120a8: 6b1a ldr r2, [r3, #48] @ 0x30
- 80120aa: 687b ldr r3, [r7, #4]
- 80120ac: 681b ldr r3, [r3, #0]
- 80120ae: 430a orrs r2, r1
- 80120b0: 605a str r2, [r3, #4]
- }
- /* if required, configure data inversion */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
- 80120b2: 687b ldr r3, [r7, #4]
- 80120b4: 6a9b ldr r3, [r3, #40] @ 0x28
- 80120b6: f003 0304 and.w r3, r3, #4
- 80120ba: 2b00 cmp r3, #0
- 80120bc: d00a beq.n 80120d4 <UART_AdvFeatureConfig+0x90>
- {
- assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
- 80120be: 687b ldr r3, [r7, #4]
- 80120c0: 681b ldr r3, [r3, #0]
- 80120c2: 685b ldr r3, [r3, #4]
- 80120c4: f423 2180 bic.w r1, r3, #262144 @ 0x40000
- 80120c8: 687b ldr r3, [r7, #4]
- 80120ca: 6b5a ldr r2, [r3, #52] @ 0x34
- 80120cc: 687b ldr r3, [r7, #4]
- 80120ce: 681b ldr r3, [r3, #0]
- 80120d0: 430a orrs r2, r1
- 80120d2: 605a str r2, [r3, #4]
- }
- /* if required, configure RX overrun detection disabling */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
- 80120d4: 687b ldr r3, [r7, #4]
- 80120d6: 6a9b ldr r3, [r3, #40] @ 0x28
- 80120d8: f003 0310 and.w r3, r3, #16
- 80120dc: 2b00 cmp r3, #0
- 80120de: d00a beq.n 80120f6 <UART_AdvFeatureConfig+0xb2>
- {
- assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
- MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
- 80120e0: 687b ldr r3, [r7, #4]
- 80120e2: 681b ldr r3, [r3, #0]
- 80120e4: 689b ldr r3, [r3, #8]
- 80120e6: f423 5180 bic.w r1, r3, #4096 @ 0x1000
- 80120ea: 687b ldr r3, [r7, #4]
- 80120ec: 6bda ldr r2, [r3, #60] @ 0x3c
- 80120ee: 687b ldr r3, [r7, #4]
- 80120f0: 681b ldr r3, [r3, #0]
- 80120f2: 430a orrs r2, r1
- 80120f4: 609a str r2, [r3, #8]
- }
- /* if required, configure DMA disabling on reception error */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
- 80120f6: 687b ldr r3, [r7, #4]
- 80120f8: 6a9b ldr r3, [r3, #40] @ 0x28
- 80120fa: f003 0320 and.w r3, r3, #32
- 80120fe: 2b00 cmp r3, #0
- 8012100: d00a beq.n 8012118 <UART_AdvFeatureConfig+0xd4>
- {
- assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
- MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
- 8012102: 687b ldr r3, [r7, #4]
- 8012104: 681b ldr r3, [r3, #0]
- 8012106: 689b ldr r3, [r3, #8]
- 8012108: f423 5100 bic.w r1, r3, #8192 @ 0x2000
- 801210c: 687b ldr r3, [r7, #4]
- 801210e: 6c1a ldr r2, [r3, #64] @ 0x40
- 8012110: 687b ldr r3, [r7, #4]
- 8012112: 681b ldr r3, [r3, #0]
- 8012114: 430a orrs r2, r1
- 8012116: 609a str r2, [r3, #8]
- }
- /* if required, configure auto Baud rate detection scheme */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
- 8012118: 687b ldr r3, [r7, #4]
- 801211a: 6a9b ldr r3, [r3, #40] @ 0x28
- 801211c: f003 0340 and.w r3, r3, #64 @ 0x40
- 8012120: 2b00 cmp r3, #0
- 8012122: d01a beq.n 801215a <UART_AdvFeatureConfig+0x116>
- {
- assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
- assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
- 8012124: 687b ldr r3, [r7, #4]
- 8012126: 681b ldr r3, [r3, #0]
- 8012128: 685b ldr r3, [r3, #4]
- 801212a: f423 1180 bic.w r1, r3, #1048576 @ 0x100000
- 801212e: 687b ldr r3, [r7, #4]
- 8012130: 6c5a ldr r2, [r3, #68] @ 0x44
- 8012132: 687b ldr r3, [r7, #4]
- 8012134: 681b ldr r3, [r3, #0]
- 8012136: 430a orrs r2, r1
- 8012138: 605a str r2, [r3, #4]
- /* set auto Baudrate detection parameters if detection is enabled */
- if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
- 801213a: 687b ldr r3, [r7, #4]
- 801213c: 6c5b ldr r3, [r3, #68] @ 0x44
- 801213e: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
- 8012142: d10a bne.n 801215a <UART_AdvFeatureConfig+0x116>
- {
- assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
- 8012144: 687b ldr r3, [r7, #4]
- 8012146: 681b ldr r3, [r3, #0]
- 8012148: 685b ldr r3, [r3, #4]
- 801214a: f423 01c0 bic.w r1, r3, #6291456 @ 0x600000
- 801214e: 687b ldr r3, [r7, #4]
- 8012150: 6c9a ldr r2, [r3, #72] @ 0x48
- 8012152: 687b ldr r3, [r7, #4]
- 8012154: 681b ldr r3, [r3, #0]
- 8012156: 430a orrs r2, r1
- 8012158: 605a str r2, [r3, #4]
- }
- }
- /* if required, configure MSB first on communication line */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
- 801215a: 687b ldr r3, [r7, #4]
- 801215c: 6a9b ldr r3, [r3, #40] @ 0x28
- 801215e: f003 0380 and.w r3, r3, #128 @ 0x80
- 8012162: 2b00 cmp r3, #0
- 8012164: d00a beq.n 801217c <UART_AdvFeatureConfig+0x138>
- {
- assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
- 8012166: 687b ldr r3, [r7, #4]
- 8012168: 681b ldr r3, [r3, #0]
- 801216a: 685b ldr r3, [r3, #4]
- 801216c: f423 2100 bic.w r1, r3, #524288 @ 0x80000
- 8012170: 687b ldr r3, [r7, #4]
- 8012172: 6cda ldr r2, [r3, #76] @ 0x4c
- 8012174: 687b ldr r3, [r7, #4]
- 8012176: 681b ldr r3, [r3, #0]
- 8012178: 430a orrs r2, r1
- 801217a: 605a str r2, [r3, #4]
- }
- }
- 801217c: bf00 nop
- 801217e: 370c adds r7, #12
- 8012180: 46bd mov sp, r7
- 8012182: f85d 7b04 ldr.w r7, [sp], #4
- 8012186: 4770 bx lr
- 08012188 <UART_CheckIdleState>:
- * @brief Check the UART Idle State.
- * @param huart UART handle.
- * @retval HAL status
- */
- HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
- {
- 8012188: b580 push {r7, lr}
- 801218a: b098 sub sp, #96 @ 0x60
- 801218c: af02 add r7, sp, #8
- 801218e: 6078 str r0, [r7, #4]
- uint32_t tickstart;
- /* Initialize the UART ErrorCode */
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 8012190: 687b ldr r3, [r7, #4]
- 8012192: 2200 movs r2, #0
- 8012194: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- /* Init tickstart for timeout management */
- tickstart = HAL_GetTick();
- 8012198: f7f3 f9e6 bl 8005568 <HAL_GetTick>
- 801219c: 6578 str r0, [r7, #84] @ 0x54
- /* Check if the Transmitter is enabled */
- if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
- 801219e: 687b ldr r3, [r7, #4]
- 80121a0: 681b ldr r3, [r3, #0]
- 80121a2: 681b ldr r3, [r3, #0]
- 80121a4: f003 0308 and.w r3, r3, #8
- 80121a8: 2b08 cmp r3, #8
- 80121aa: d12f bne.n 801220c <UART_CheckIdleState+0x84>
- {
- /* Wait until TEACK flag is set */
- if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
- 80121ac: f06f 437e mvn.w r3, #4261412864 @ 0xfe000000
- 80121b0: 9300 str r3, [sp, #0]
- 80121b2: 6d7b ldr r3, [r7, #84] @ 0x54
- 80121b4: 2200 movs r2, #0
- 80121b6: f44f 1100 mov.w r1, #2097152 @ 0x200000
- 80121ba: 6878 ldr r0, [r7, #4]
- 80121bc: f000 f88e bl 80122dc <UART_WaitOnFlagUntilTimeout>
- 80121c0: 4603 mov r3, r0
- 80121c2: 2b00 cmp r3, #0
- 80121c4: d022 beq.n 801220c <UART_CheckIdleState+0x84>
- {
- /* Disable TXE interrupt for the interrupt process */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE));
- 80121c6: 687b ldr r3, [r7, #4]
- 80121c8: 681b ldr r3, [r3, #0]
- 80121ca: 63bb str r3, [r7, #56] @ 0x38
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 80121cc: 6bbb ldr r3, [r7, #56] @ 0x38
- 80121ce: e853 3f00 ldrex r3, [r3]
- 80121d2: 637b str r3, [r7, #52] @ 0x34
- return(result);
- 80121d4: 6b7b ldr r3, [r7, #52] @ 0x34
- 80121d6: f023 0380 bic.w r3, r3, #128 @ 0x80
- 80121da: 653b str r3, [r7, #80] @ 0x50
- 80121dc: 687b ldr r3, [r7, #4]
- 80121de: 681b ldr r3, [r3, #0]
- 80121e0: 461a mov r2, r3
- 80121e2: 6d3b ldr r3, [r7, #80] @ 0x50
- 80121e4: 647b str r3, [r7, #68] @ 0x44
- 80121e6: 643a str r2, [r7, #64] @ 0x40
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 80121e8: 6c39 ldr r1, [r7, #64] @ 0x40
- 80121ea: 6c7a ldr r2, [r7, #68] @ 0x44
- 80121ec: e841 2300 strex r3, r2, [r1]
- 80121f0: 63fb str r3, [r7, #60] @ 0x3c
- return(result);
- 80121f2: 6bfb ldr r3, [r7, #60] @ 0x3c
- 80121f4: 2b00 cmp r3, #0
- 80121f6: d1e6 bne.n 80121c6 <UART_CheckIdleState+0x3e>
- huart->gState = HAL_UART_STATE_READY;
- 80121f8: 687b ldr r3, [r7, #4]
- 80121fa: 2220 movs r2, #32
- 80121fc: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- __HAL_UNLOCK(huart);
- 8012200: 687b ldr r3, [r7, #4]
- 8012202: 2200 movs r2, #0
- 8012204: f883 2084 strb.w r2, [r3, #132] @ 0x84
- /* Timeout occurred */
- return HAL_TIMEOUT;
- 8012208: 2303 movs r3, #3
- 801220a: e063 b.n 80122d4 <UART_CheckIdleState+0x14c>
- }
- }
- /* Check if the Receiver is enabled */
- if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
- 801220c: 687b ldr r3, [r7, #4]
- 801220e: 681b ldr r3, [r3, #0]
- 8012210: 681b ldr r3, [r3, #0]
- 8012212: f003 0304 and.w r3, r3, #4
- 8012216: 2b04 cmp r3, #4
- 8012218: d149 bne.n 80122ae <UART_CheckIdleState+0x126>
- {
- /* Wait until REACK flag is set */
- if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
- 801221a: f06f 437e mvn.w r3, #4261412864 @ 0xfe000000
- 801221e: 9300 str r3, [sp, #0]
- 8012220: 6d7b ldr r3, [r7, #84] @ 0x54
- 8012222: 2200 movs r2, #0
- 8012224: f44f 0180 mov.w r1, #4194304 @ 0x400000
- 8012228: 6878 ldr r0, [r7, #4]
- 801222a: f000 f857 bl 80122dc <UART_WaitOnFlagUntilTimeout>
- 801222e: 4603 mov r3, r0
- 8012230: 2b00 cmp r3, #0
- 8012232: d03c beq.n 80122ae <UART_CheckIdleState+0x126>
- {
- /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error)
- interrupts for the interrupt process */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
- 8012234: 687b ldr r3, [r7, #4]
- 8012236: 681b ldr r3, [r3, #0]
- 8012238: 627b str r3, [r7, #36] @ 0x24
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 801223a: 6a7b ldr r3, [r7, #36] @ 0x24
- 801223c: e853 3f00 ldrex r3, [r3]
- 8012240: 623b str r3, [r7, #32]
- return(result);
- 8012242: 6a3b ldr r3, [r7, #32]
- 8012244: f423 7390 bic.w r3, r3, #288 @ 0x120
- 8012248: 64fb str r3, [r7, #76] @ 0x4c
- 801224a: 687b ldr r3, [r7, #4]
- 801224c: 681b ldr r3, [r3, #0]
- 801224e: 461a mov r2, r3
- 8012250: 6cfb ldr r3, [r7, #76] @ 0x4c
- 8012252: 633b str r3, [r7, #48] @ 0x30
- 8012254: 62fa str r2, [r7, #44] @ 0x2c
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012256: 6af9 ldr r1, [r7, #44] @ 0x2c
- 8012258: 6b3a ldr r2, [r7, #48] @ 0x30
- 801225a: e841 2300 strex r3, r2, [r1]
- 801225e: 62bb str r3, [r7, #40] @ 0x28
- return(result);
- 8012260: 6abb ldr r3, [r7, #40] @ 0x28
- 8012262: 2b00 cmp r3, #0
- 8012264: d1e6 bne.n 8012234 <UART_CheckIdleState+0xac>
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8012266: 687b ldr r3, [r7, #4]
- 8012268: 681b ldr r3, [r3, #0]
- 801226a: 3308 adds r3, #8
- 801226c: 613b str r3, [r7, #16]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 801226e: 693b ldr r3, [r7, #16]
- 8012270: e853 3f00 ldrex r3, [r3]
- 8012274: 60fb str r3, [r7, #12]
- return(result);
- 8012276: 68fb ldr r3, [r7, #12]
- 8012278: f023 0301 bic.w r3, r3, #1
- 801227c: 64bb str r3, [r7, #72] @ 0x48
- 801227e: 687b ldr r3, [r7, #4]
- 8012280: 681b ldr r3, [r3, #0]
- 8012282: 3308 adds r3, #8
- 8012284: 6cba ldr r2, [r7, #72] @ 0x48
- 8012286: 61fa str r2, [r7, #28]
- 8012288: 61bb str r3, [r7, #24]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 801228a: 69b9 ldr r1, [r7, #24]
- 801228c: 69fa ldr r2, [r7, #28]
- 801228e: e841 2300 strex r3, r2, [r1]
- 8012292: 617b str r3, [r7, #20]
- return(result);
- 8012294: 697b ldr r3, [r7, #20]
- 8012296: 2b00 cmp r3, #0
- 8012298: d1e5 bne.n 8012266 <UART_CheckIdleState+0xde>
- huart->RxState = HAL_UART_STATE_READY;
- 801229a: 687b ldr r3, [r7, #4]
- 801229c: 2220 movs r2, #32
- 801229e: f8c3 208c str.w r2, [r3, #140] @ 0x8c
- __HAL_UNLOCK(huart);
- 80122a2: 687b ldr r3, [r7, #4]
- 80122a4: 2200 movs r2, #0
- 80122a6: f883 2084 strb.w r2, [r3, #132] @ 0x84
- /* Timeout occurred */
- return HAL_TIMEOUT;
- 80122aa: 2303 movs r3, #3
- 80122ac: e012 b.n 80122d4 <UART_CheckIdleState+0x14c>
- }
- }
- /* Initialize the UART State */
- huart->gState = HAL_UART_STATE_READY;
- 80122ae: 687b ldr r3, [r7, #4]
- 80122b0: 2220 movs r2, #32
- 80122b2: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- huart->RxState = HAL_UART_STATE_READY;
- 80122b6: 687b ldr r3, [r7, #4]
- 80122b8: 2220 movs r2, #32
- 80122ba: f8c3 208c str.w r2, [r3, #140] @ 0x8c
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 80122be: 687b ldr r3, [r7, #4]
- 80122c0: 2200 movs r2, #0
- 80122c2: 66da str r2, [r3, #108] @ 0x6c
- huart->RxEventType = HAL_UART_RXEVENT_TC;
- 80122c4: 687b ldr r3, [r7, #4]
- 80122c6: 2200 movs r2, #0
- 80122c8: 671a str r2, [r3, #112] @ 0x70
- __HAL_UNLOCK(huart);
- 80122ca: 687b ldr r3, [r7, #4]
- 80122cc: 2200 movs r2, #0
- 80122ce: f883 2084 strb.w r2, [r3, #132] @ 0x84
- return HAL_OK;
- 80122d2: 2300 movs r3, #0
- }
- 80122d4: 4618 mov r0, r3
- 80122d6: 3758 adds r7, #88 @ 0x58
- 80122d8: 46bd mov sp, r7
- 80122da: bd80 pop {r7, pc}
- 080122dc <UART_WaitOnFlagUntilTimeout>:
- * @param Timeout Timeout duration
- * @retval HAL status
- */
- HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
- uint32_t Tickstart, uint32_t Timeout)
- {
- 80122dc: b580 push {r7, lr}
- 80122de: b084 sub sp, #16
- 80122e0: af00 add r7, sp, #0
- 80122e2: 60f8 str r0, [r7, #12]
- 80122e4: 60b9 str r1, [r7, #8]
- 80122e6: 603b str r3, [r7, #0]
- 80122e8: 4613 mov r3, r2
- 80122ea: 71fb strb r3, [r7, #7]
- /* Wait until flag is set */
- while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
- 80122ec: e04f b.n 801238e <UART_WaitOnFlagUntilTimeout+0xb2>
- {
- /* Check for the Timeout */
- if (Timeout != HAL_MAX_DELAY)
- 80122ee: 69bb ldr r3, [r7, #24]
- 80122f0: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 80122f4: d04b beq.n 801238e <UART_WaitOnFlagUntilTimeout+0xb2>
- {
- if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 80122f6: f7f3 f937 bl 8005568 <HAL_GetTick>
- 80122fa: 4602 mov r2, r0
- 80122fc: 683b ldr r3, [r7, #0]
- 80122fe: 1ad3 subs r3, r2, r3
- 8012300: 69ba ldr r2, [r7, #24]
- 8012302: 429a cmp r2, r3
- 8012304: d302 bcc.n 801230c <UART_WaitOnFlagUntilTimeout+0x30>
- 8012306: 69bb ldr r3, [r7, #24]
- 8012308: 2b00 cmp r3, #0
- 801230a: d101 bne.n 8012310 <UART_WaitOnFlagUntilTimeout+0x34>
- {
- return HAL_TIMEOUT;
- 801230c: 2303 movs r3, #3
- 801230e: e04e b.n 80123ae <UART_WaitOnFlagUntilTimeout+0xd2>
- }
- if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
- 8012310: 68fb ldr r3, [r7, #12]
- 8012312: 681b ldr r3, [r3, #0]
- 8012314: 681b ldr r3, [r3, #0]
- 8012316: f003 0304 and.w r3, r3, #4
- 801231a: 2b00 cmp r3, #0
- 801231c: d037 beq.n 801238e <UART_WaitOnFlagUntilTimeout+0xb2>
- 801231e: 68bb ldr r3, [r7, #8]
- 8012320: 2b80 cmp r3, #128 @ 0x80
- 8012322: d034 beq.n 801238e <UART_WaitOnFlagUntilTimeout+0xb2>
- 8012324: 68bb ldr r3, [r7, #8]
- 8012326: 2b40 cmp r3, #64 @ 0x40
- 8012328: d031 beq.n 801238e <UART_WaitOnFlagUntilTimeout+0xb2>
- {
- if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
- 801232a: 68fb ldr r3, [r7, #12]
- 801232c: 681b ldr r3, [r3, #0]
- 801232e: 69db ldr r3, [r3, #28]
- 8012330: f003 0308 and.w r3, r3, #8
- 8012334: 2b08 cmp r3, #8
- 8012336: d110 bne.n 801235a <UART_WaitOnFlagUntilTimeout+0x7e>
- {
- /* Clear Overrun Error flag*/
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
- 8012338: 68fb ldr r3, [r7, #12]
- 801233a: 681b ldr r3, [r3, #0]
- 801233c: 2208 movs r2, #8
- 801233e: 621a str r2, [r3, #32]
- /* Blocking error : transfer is aborted
- Set the UART state ready to be able to start again the process,
- Disable Rx Interrupts if ongoing */
- UART_EndRxTransfer(huart);
- 8012340: 68f8 ldr r0, [r7, #12]
- 8012342: f000 f95b bl 80125fc <UART_EndRxTransfer>
- huart->ErrorCode = HAL_UART_ERROR_ORE;
- 8012346: 68fb ldr r3, [r7, #12]
- 8012348: 2208 movs r2, #8
- 801234a: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 801234e: 68fb ldr r3, [r7, #12]
- 8012350: 2200 movs r2, #0
- 8012352: f883 2084 strb.w r2, [r3, #132] @ 0x84
- return HAL_ERROR;
- 8012356: 2301 movs r3, #1
- 8012358: e029 b.n 80123ae <UART_WaitOnFlagUntilTimeout+0xd2>
- }
- if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
- 801235a: 68fb ldr r3, [r7, #12]
- 801235c: 681b ldr r3, [r3, #0]
- 801235e: 69db ldr r3, [r3, #28]
- 8012360: f403 6300 and.w r3, r3, #2048 @ 0x800
- 8012364: f5b3 6f00 cmp.w r3, #2048 @ 0x800
- 8012368: d111 bne.n 801238e <UART_WaitOnFlagUntilTimeout+0xb2>
- {
- /* Clear Receiver Timeout flag*/
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
- 801236a: 68fb ldr r3, [r7, #12]
- 801236c: 681b ldr r3, [r3, #0]
- 801236e: f44f 6200 mov.w r2, #2048 @ 0x800
- 8012372: 621a str r2, [r3, #32]
- /* Blocking error : transfer is aborted
- Set the UART state ready to be able to start again the process,
- Disable Rx Interrupts if ongoing */
- UART_EndRxTransfer(huart);
- 8012374: 68f8 ldr r0, [r7, #12]
- 8012376: f000 f941 bl 80125fc <UART_EndRxTransfer>
- huart->ErrorCode = HAL_UART_ERROR_RTO;
- 801237a: 68fb ldr r3, [r7, #12]
- 801237c: 2220 movs r2, #32
- 801237e: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 8012382: 68fb ldr r3, [r7, #12]
- 8012384: 2200 movs r2, #0
- 8012386: f883 2084 strb.w r2, [r3, #132] @ 0x84
- return HAL_TIMEOUT;
- 801238a: 2303 movs r3, #3
- 801238c: e00f b.n 80123ae <UART_WaitOnFlagUntilTimeout+0xd2>
- while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
- 801238e: 68fb ldr r3, [r7, #12]
- 8012390: 681b ldr r3, [r3, #0]
- 8012392: 69da ldr r2, [r3, #28]
- 8012394: 68bb ldr r3, [r7, #8]
- 8012396: 4013 ands r3, r2
- 8012398: 68ba ldr r2, [r7, #8]
- 801239a: 429a cmp r2, r3
- 801239c: bf0c ite eq
- 801239e: 2301 moveq r3, #1
- 80123a0: 2300 movne r3, #0
- 80123a2: b2db uxtb r3, r3
- 80123a4: 461a mov r2, r3
- 80123a6: 79fb ldrb r3, [r7, #7]
- 80123a8: 429a cmp r2, r3
- 80123aa: d0a0 beq.n 80122ee <UART_WaitOnFlagUntilTimeout+0x12>
- }
- }
- }
- }
- return HAL_OK;
- 80123ac: 2300 movs r3, #0
- }
- 80123ae: 4618 mov r0, r3
- 80123b0: 3710 adds r7, #16
- 80123b2: 46bd mov sp, r7
- 80123b4: bd80 pop {r7, pc}
- ...
- 080123b8 <UART_Start_Receive_IT>:
- * @param pData Pointer to data buffer (u8 or u16 data elements).
- * @param Size Amount of data elements (u8 or u16) to be received.
- * @retval HAL status
- */
- HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
- {
- 80123b8: b480 push {r7}
- 80123ba: b0a3 sub sp, #140 @ 0x8c
- 80123bc: af00 add r7, sp, #0
- 80123be: 60f8 str r0, [r7, #12]
- 80123c0: 60b9 str r1, [r7, #8]
- 80123c2: 4613 mov r3, r2
- 80123c4: 80fb strh r3, [r7, #6]
- huart->pRxBuffPtr = pData;
- 80123c6: 68fb ldr r3, [r7, #12]
- 80123c8: 68ba ldr r2, [r7, #8]
- 80123ca: 659a str r2, [r3, #88] @ 0x58
- huart->RxXferSize = Size;
- 80123cc: 68fb ldr r3, [r7, #12]
- 80123ce: 88fa ldrh r2, [r7, #6]
- 80123d0: f8a3 205c strh.w r2, [r3, #92] @ 0x5c
- huart->RxXferCount = Size;
- 80123d4: 68fb ldr r3, [r7, #12]
- 80123d6: 88fa ldrh r2, [r7, #6]
- 80123d8: f8a3 205e strh.w r2, [r3, #94] @ 0x5e
- huart->RxISR = NULL;
- 80123dc: 68fb ldr r3, [r7, #12]
- 80123de: 2200 movs r2, #0
- 80123e0: 675a str r2, [r3, #116] @ 0x74
- /* Computation of UART mask to apply to RDR register */
- UART_MASK_COMPUTATION(huart);
- 80123e2: 68fb ldr r3, [r7, #12]
- 80123e4: 689b ldr r3, [r3, #8]
- 80123e6: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 80123ea: d10e bne.n 801240a <UART_Start_Receive_IT+0x52>
- 80123ec: 68fb ldr r3, [r7, #12]
- 80123ee: 691b ldr r3, [r3, #16]
- 80123f0: 2b00 cmp r3, #0
- 80123f2: d105 bne.n 8012400 <UART_Start_Receive_IT+0x48>
- 80123f4: 68fb ldr r3, [r7, #12]
- 80123f6: f240 12ff movw r2, #511 @ 0x1ff
- 80123fa: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
- 80123fe: e02d b.n 801245c <UART_Start_Receive_IT+0xa4>
- 8012400: 68fb ldr r3, [r7, #12]
- 8012402: 22ff movs r2, #255 @ 0xff
- 8012404: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
- 8012408: e028 b.n 801245c <UART_Start_Receive_IT+0xa4>
- 801240a: 68fb ldr r3, [r7, #12]
- 801240c: 689b ldr r3, [r3, #8]
- 801240e: 2b00 cmp r3, #0
- 8012410: d10d bne.n 801242e <UART_Start_Receive_IT+0x76>
- 8012412: 68fb ldr r3, [r7, #12]
- 8012414: 691b ldr r3, [r3, #16]
- 8012416: 2b00 cmp r3, #0
- 8012418: d104 bne.n 8012424 <UART_Start_Receive_IT+0x6c>
- 801241a: 68fb ldr r3, [r7, #12]
- 801241c: 22ff movs r2, #255 @ 0xff
- 801241e: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
- 8012422: e01b b.n 801245c <UART_Start_Receive_IT+0xa4>
- 8012424: 68fb ldr r3, [r7, #12]
- 8012426: 227f movs r2, #127 @ 0x7f
- 8012428: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
- 801242c: e016 b.n 801245c <UART_Start_Receive_IT+0xa4>
- 801242e: 68fb ldr r3, [r7, #12]
- 8012430: 689b ldr r3, [r3, #8]
- 8012432: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
- 8012436: d10d bne.n 8012454 <UART_Start_Receive_IT+0x9c>
- 8012438: 68fb ldr r3, [r7, #12]
- 801243a: 691b ldr r3, [r3, #16]
- 801243c: 2b00 cmp r3, #0
- 801243e: d104 bne.n 801244a <UART_Start_Receive_IT+0x92>
- 8012440: 68fb ldr r3, [r7, #12]
- 8012442: 227f movs r2, #127 @ 0x7f
- 8012444: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
- 8012448: e008 b.n 801245c <UART_Start_Receive_IT+0xa4>
- 801244a: 68fb ldr r3, [r7, #12]
- 801244c: 223f movs r2, #63 @ 0x3f
- 801244e: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
- 8012452: e003 b.n 801245c <UART_Start_Receive_IT+0xa4>
- 8012454: 68fb ldr r3, [r7, #12]
- 8012456: 2200 movs r2, #0
- 8012458: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 801245c: 68fb ldr r3, [r7, #12]
- 801245e: 2200 movs r2, #0
- 8012460: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- huart->RxState = HAL_UART_STATE_BUSY_RX;
- 8012464: 68fb ldr r3, [r7, #12]
- 8012466: 2222 movs r2, #34 @ 0x22
- 8012468: f8c3 208c str.w r2, [r3, #140] @ 0x8c
- /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
- ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 801246c: 68fb ldr r3, [r7, #12]
- 801246e: 681b ldr r3, [r3, #0]
- 8012470: 3308 adds r3, #8
- 8012472: 667b str r3, [r7, #100] @ 0x64
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012474: 6e7b ldr r3, [r7, #100] @ 0x64
- 8012476: e853 3f00 ldrex r3, [r3]
- 801247a: 663b str r3, [r7, #96] @ 0x60
- return(result);
- 801247c: 6e3b ldr r3, [r7, #96] @ 0x60
- 801247e: f043 0301 orr.w r3, r3, #1
- 8012482: f8c7 3084 str.w r3, [r7, #132] @ 0x84
- 8012486: 68fb ldr r3, [r7, #12]
- 8012488: 681b ldr r3, [r3, #0]
- 801248a: 3308 adds r3, #8
- 801248c: f8d7 2084 ldr.w r2, [r7, #132] @ 0x84
- 8012490: 673a str r2, [r7, #112] @ 0x70
- 8012492: 66fb str r3, [r7, #108] @ 0x6c
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012494: 6ef9 ldr r1, [r7, #108] @ 0x6c
- 8012496: 6f3a ldr r2, [r7, #112] @ 0x70
- 8012498: e841 2300 strex r3, r2, [r1]
- 801249c: 66bb str r3, [r7, #104] @ 0x68
- return(result);
- 801249e: 6ebb ldr r3, [r7, #104] @ 0x68
- 80124a0: 2b00 cmp r3, #0
- 80124a2: d1e3 bne.n 801246c <UART_Start_Receive_IT+0xb4>
- /* Configure Rx interrupt processing */
- if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
- 80124a4: 68fb ldr r3, [r7, #12]
- 80124a6: 6e5b ldr r3, [r3, #100] @ 0x64
- 80124a8: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 80124ac: d14f bne.n 801254e <UART_Start_Receive_IT+0x196>
- 80124ae: 68fb ldr r3, [r7, #12]
- 80124b0: f8b3 3068 ldrh.w r3, [r3, #104] @ 0x68
- 80124b4: 88fa ldrh r2, [r7, #6]
- 80124b6: 429a cmp r2, r3
- 80124b8: d349 bcc.n 801254e <UART_Start_Receive_IT+0x196>
- {
- /* Set the Rx ISR function pointer according to the data word length */
- if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- 80124ba: 68fb ldr r3, [r7, #12]
- 80124bc: 689b ldr r3, [r3, #8]
- 80124be: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 80124c2: d107 bne.n 80124d4 <UART_Start_Receive_IT+0x11c>
- 80124c4: 68fb ldr r3, [r7, #12]
- 80124c6: 691b ldr r3, [r3, #16]
- 80124c8: 2b00 cmp r3, #0
- 80124ca: d103 bne.n 80124d4 <UART_Start_Receive_IT+0x11c>
- {
- huart->RxISR = UART_RxISR_16BIT_FIFOEN;
- 80124cc: 68fb ldr r3, [r7, #12]
- 80124ce: 4a47 ldr r2, [pc, #284] @ (80125ec <UART_Start_Receive_IT+0x234>)
- 80124d0: 675a str r2, [r3, #116] @ 0x74
- 80124d2: e002 b.n 80124da <UART_Start_Receive_IT+0x122>
- }
- else
- {
- huart->RxISR = UART_RxISR_8BIT_FIFOEN;
- 80124d4: 68fb ldr r3, [r7, #12]
- 80124d6: 4a46 ldr r2, [pc, #280] @ (80125f0 <UART_Start_Receive_IT+0x238>)
- 80124d8: 675a str r2, [r3, #116] @ 0x74
- }
- /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
- if (huart->Init.Parity != UART_PARITY_NONE)
- 80124da: 68fb ldr r3, [r7, #12]
- 80124dc: 691b ldr r3, [r3, #16]
- 80124de: 2b00 cmp r3, #0
- 80124e0: d01a beq.n 8012518 <UART_Start_Receive_IT+0x160>
- {
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
- 80124e2: 68fb ldr r3, [r7, #12]
- 80124e4: 681b ldr r3, [r3, #0]
- 80124e6: 653b str r3, [r7, #80] @ 0x50
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 80124e8: 6d3b ldr r3, [r7, #80] @ 0x50
- 80124ea: e853 3f00 ldrex r3, [r3]
- 80124ee: 64fb str r3, [r7, #76] @ 0x4c
- return(result);
- 80124f0: 6cfb ldr r3, [r7, #76] @ 0x4c
- 80124f2: f443 7380 orr.w r3, r3, #256 @ 0x100
- 80124f6: f8c7 3080 str.w r3, [r7, #128] @ 0x80
- 80124fa: 68fb ldr r3, [r7, #12]
- 80124fc: 681b ldr r3, [r3, #0]
- 80124fe: 461a mov r2, r3
- 8012500: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
- 8012504: 65fb str r3, [r7, #92] @ 0x5c
- 8012506: 65ba str r2, [r7, #88] @ 0x58
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012508: 6db9 ldr r1, [r7, #88] @ 0x58
- 801250a: 6dfa ldr r2, [r7, #92] @ 0x5c
- 801250c: e841 2300 strex r3, r2, [r1]
- 8012510: 657b str r3, [r7, #84] @ 0x54
- return(result);
- 8012512: 6d7b ldr r3, [r7, #84] @ 0x54
- 8012514: 2b00 cmp r3, #0
- 8012516: d1e4 bne.n 80124e2 <UART_Start_Receive_IT+0x12a>
- }
- ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
- 8012518: 68fb ldr r3, [r7, #12]
- 801251a: 681b ldr r3, [r3, #0]
- 801251c: 3308 adds r3, #8
- 801251e: 63fb str r3, [r7, #60] @ 0x3c
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012520: 6bfb ldr r3, [r7, #60] @ 0x3c
- 8012522: e853 3f00 ldrex r3, [r3]
- 8012526: 63bb str r3, [r7, #56] @ 0x38
- return(result);
- 8012528: 6bbb ldr r3, [r7, #56] @ 0x38
- 801252a: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
- 801252e: 67fb str r3, [r7, #124] @ 0x7c
- 8012530: 68fb ldr r3, [r7, #12]
- 8012532: 681b ldr r3, [r3, #0]
- 8012534: 3308 adds r3, #8
- 8012536: 6ffa ldr r2, [r7, #124] @ 0x7c
- 8012538: 64ba str r2, [r7, #72] @ 0x48
- 801253a: 647b str r3, [r7, #68] @ 0x44
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 801253c: 6c79 ldr r1, [r7, #68] @ 0x44
- 801253e: 6cba ldr r2, [r7, #72] @ 0x48
- 8012540: e841 2300 strex r3, r2, [r1]
- 8012544: 643b str r3, [r7, #64] @ 0x40
- return(result);
- 8012546: 6c3b ldr r3, [r7, #64] @ 0x40
- 8012548: 2b00 cmp r3, #0
- 801254a: d1e5 bne.n 8012518 <UART_Start_Receive_IT+0x160>
- 801254c: e046 b.n 80125dc <UART_Start_Receive_IT+0x224>
- }
- else
- {
- /* Set the Rx ISR function pointer according to the data word length */
- if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- 801254e: 68fb ldr r3, [r7, #12]
- 8012550: 689b ldr r3, [r3, #8]
- 8012552: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
- 8012556: d107 bne.n 8012568 <UART_Start_Receive_IT+0x1b0>
- 8012558: 68fb ldr r3, [r7, #12]
- 801255a: 691b ldr r3, [r3, #16]
- 801255c: 2b00 cmp r3, #0
- 801255e: d103 bne.n 8012568 <UART_Start_Receive_IT+0x1b0>
- {
- huart->RxISR = UART_RxISR_16BIT;
- 8012560: 68fb ldr r3, [r7, #12]
- 8012562: 4a24 ldr r2, [pc, #144] @ (80125f4 <UART_Start_Receive_IT+0x23c>)
- 8012564: 675a str r2, [r3, #116] @ 0x74
- 8012566: e002 b.n 801256e <UART_Start_Receive_IT+0x1b6>
- }
- else
- {
- huart->RxISR = UART_RxISR_8BIT;
- 8012568: 68fb ldr r3, [r7, #12]
- 801256a: 4a23 ldr r2, [pc, #140] @ (80125f8 <UART_Start_Receive_IT+0x240>)
- 801256c: 675a str r2, [r3, #116] @ 0x74
- }
- /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
- if (huart->Init.Parity != UART_PARITY_NONE)
- 801256e: 68fb ldr r3, [r7, #12]
- 8012570: 691b ldr r3, [r3, #16]
- 8012572: 2b00 cmp r3, #0
- 8012574: d019 beq.n 80125aa <UART_Start_Receive_IT+0x1f2>
- {
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
- 8012576: 68fb ldr r3, [r7, #12]
- 8012578: 681b ldr r3, [r3, #0]
- 801257a: 62bb str r3, [r7, #40] @ 0x28
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 801257c: 6abb ldr r3, [r7, #40] @ 0x28
- 801257e: e853 3f00 ldrex r3, [r3]
- 8012582: 627b str r3, [r7, #36] @ 0x24
- return(result);
- 8012584: 6a7b ldr r3, [r7, #36] @ 0x24
- 8012586: f443 7390 orr.w r3, r3, #288 @ 0x120
- 801258a: 677b str r3, [r7, #116] @ 0x74
- 801258c: 68fb ldr r3, [r7, #12]
- 801258e: 681b ldr r3, [r3, #0]
- 8012590: 461a mov r2, r3
- 8012592: 6f7b ldr r3, [r7, #116] @ 0x74
- 8012594: 637b str r3, [r7, #52] @ 0x34
- 8012596: 633a str r2, [r7, #48] @ 0x30
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012598: 6b39 ldr r1, [r7, #48] @ 0x30
- 801259a: 6b7a ldr r2, [r7, #52] @ 0x34
- 801259c: e841 2300 strex r3, r2, [r1]
- 80125a0: 62fb str r3, [r7, #44] @ 0x2c
- return(result);
- 80125a2: 6afb ldr r3, [r7, #44] @ 0x2c
- 80125a4: 2b00 cmp r3, #0
- 80125a6: d1e6 bne.n 8012576 <UART_Start_Receive_IT+0x1be>
- 80125a8: e018 b.n 80125dc <UART_Start_Receive_IT+0x224>
- }
- else
- {
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
- 80125aa: 68fb ldr r3, [r7, #12]
- 80125ac: 681b ldr r3, [r3, #0]
- 80125ae: 617b str r3, [r7, #20]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 80125b0: 697b ldr r3, [r7, #20]
- 80125b2: e853 3f00 ldrex r3, [r3]
- 80125b6: 613b str r3, [r7, #16]
- return(result);
- 80125b8: 693b ldr r3, [r7, #16]
- 80125ba: f043 0320 orr.w r3, r3, #32
- 80125be: 67bb str r3, [r7, #120] @ 0x78
- 80125c0: 68fb ldr r3, [r7, #12]
- 80125c2: 681b ldr r3, [r3, #0]
- 80125c4: 461a mov r2, r3
- 80125c6: 6fbb ldr r3, [r7, #120] @ 0x78
- 80125c8: 623b str r3, [r7, #32]
- 80125ca: 61fa str r2, [r7, #28]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 80125cc: 69f9 ldr r1, [r7, #28]
- 80125ce: 6a3a ldr r2, [r7, #32]
- 80125d0: e841 2300 strex r3, r2, [r1]
- 80125d4: 61bb str r3, [r7, #24]
- return(result);
- 80125d6: 69bb ldr r3, [r7, #24]
- 80125d8: 2b00 cmp r3, #0
- 80125da: d1e6 bne.n 80125aa <UART_Start_Receive_IT+0x1f2>
- }
- }
- return HAL_OK;
- 80125dc: 2300 movs r3, #0
- }
- 80125de: 4618 mov r0, r3
- 80125e0: 378c adds r7, #140 @ 0x8c
- 80125e2: 46bd mov sp, r7
- 80125e4: f85d 7b04 ldr.w r7, [sp], #4
- 80125e8: 4770 bx lr
- 80125ea: bf00 nop
- 80125ec: 08013161 .word 0x08013161
- 80125f0: 08012e01 .word 0x08012e01
- 80125f4: 08012c49 .word 0x08012c49
- 80125f8: 08012a91 .word 0x08012a91
- 080125fc <UART_EndRxTransfer>:
- * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
- * @param huart UART handle.
- * @retval None
- */
- static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
- {
- 80125fc: b480 push {r7}
- 80125fe: b095 sub sp, #84 @ 0x54
- 8012600: af00 add r7, sp, #0
- 8012602: 6078 str r0, [r7, #4]
- /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
- 8012604: 687b ldr r3, [r7, #4]
- 8012606: 681b ldr r3, [r3, #0]
- 8012608: 637b str r3, [r7, #52] @ 0x34
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 801260a: 6b7b ldr r3, [r7, #52] @ 0x34
- 801260c: e853 3f00 ldrex r3, [r3]
- 8012610: 633b str r3, [r7, #48] @ 0x30
- return(result);
- 8012612: 6b3b ldr r3, [r7, #48] @ 0x30
- 8012614: f423 7390 bic.w r3, r3, #288 @ 0x120
- 8012618: 64fb str r3, [r7, #76] @ 0x4c
- 801261a: 687b ldr r3, [r7, #4]
- 801261c: 681b ldr r3, [r3, #0]
- 801261e: 461a mov r2, r3
- 8012620: 6cfb ldr r3, [r7, #76] @ 0x4c
- 8012622: 643b str r3, [r7, #64] @ 0x40
- 8012624: 63fa str r2, [r7, #60] @ 0x3c
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012626: 6bf9 ldr r1, [r7, #60] @ 0x3c
- 8012628: 6c3a ldr r2, [r7, #64] @ 0x40
- 801262a: e841 2300 strex r3, r2, [r1]
- 801262e: 63bb str r3, [r7, #56] @ 0x38
- return(result);
- 8012630: 6bbb ldr r3, [r7, #56] @ 0x38
- 8012632: 2b00 cmp r3, #0
- 8012634: d1e6 bne.n 8012604 <UART_EndRxTransfer+0x8>
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
- 8012636: 687b ldr r3, [r7, #4]
- 8012638: 681b ldr r3, [r3, #0]
- 801263a: 3308 adds r3, #8
- 801263c: 623b str r3, [r7, #32]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 801263e: 6a3b ldr r3, [r7, #32]
- 8012640: e853 3f00 ldrex r3, [r3]
- 8012644: 61fb str r3, [r7, #28]
- return(result);
- 8012646: 69fa ldr r2, [r7, #28]
- 8012648: 4b1e ldr r3, [pc, #120] @ (80126c4 <UART_EndRxTransfer+0xc8>)
- 801264a: 4013 ands r3, r2
- 801264c: 64bb str r3, [r7, #72] @ 0x48
- 801264e: 687b ldr r3, [r7, #4]
- 8012650: 681b ldr r3, [r3, #0]
- 8012652: 3308 adds r3, #8
- 8012654: 6cba ldr r2, [r7, #72] @ 0x48
- 8012656: 62fa str r2, [r7, #44] @ 0x2c
- 8012658: 62bb str r3, [r7, #40] @ 0x28
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 801265a: 6ab9 ldr r1, [r7, #40] @ 0x28
- 801265c: 6afa ldr r2, [r7, #44] @ 0x2c
- 801265e: e841 2300 strex r3, r2, [r1]
- 8012662: 627b str r3, [r7, #36] @ 0x24
- return(result);
- 8012664: 6a7b ldr r3, [r7, #36] @ 0x24
- 8012666: 2b00 cmp r3, #0
- 8012668: d1e5 bne.n 8012636 <UART_EndRxTransfer+0x3a>
- /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- 801266a: 687b ldr r3, [r7, #4]
- 801266c: 6edb ldr r3, [r3, #108] @ 0x6c
- 801266e: 2b01 cmp r3, #1
- 8012670: d118 bne.n 80126a4 <UART_EndRxTransfer+0xa8>
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- 8012672: 687b ldr r3, [r7, #4]
- 8012674: 681b ldr r3, [r3, #0]
- 8012676: 60fb str r3, [r7, #12]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012678: 68fb ldr r3, [r7, #12]
- 801267a: e853 3f00 ldrex r3, [r3]
- 801267e: 60bb str r3, [r7, #8]
- return(result);
- 8012680: 68bb ldr r3, [r7, #8]
- 8012682: f023 0310 bic.w r3, r3, #16
- 8012686: 647b str r3, [r7, #68] @ 0x44
- 8012688: 687b ldr r3, [r7, #4]
- 801268a: 681b ldr r3, [r3, #0]
- 801268c: 461a mov r2, r3
- 801268e: 6c7b ldr r3, [r7, #68] @ 0x44
- 8012690: 61bb str r3, [r7, #24]
- 8012692: 617a str r2, [r7, #20]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012694: 6979 ldr r1, [r7, #20]
- 8012696: 69ba ldr r2, [r7, #24]
- 8012698: e841 2300 strex r3, r2, [r1]
- 801269c: 613b str r3, [r7, #16]
- return(result);
- 801269e: 693b ldr r3, [r7, #16]
- 80126a0: 2b00 cmp r3, #0
- 80126a2: d1e6 bne.n 8012672 <UART_EndRxTransfer+0x76>
- }
- /* At end of Rx process, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- 80126a4: 687b ldr r3, [r7, #4]
- 80126a6: 2220 movs r2, #32
- 80126a8: f8c3 208c str.w r2, [r3, #140] @ 0x8c
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 80126ac: 687b ldr r3, [r7, #4]
- 80126ae: 2200 movs r2, #0
- 80126b0: 66da str r2, [r3, #108] @ 0x6c
- /* Reset RxIsr function pointer */
- huart->RxISR = NULL;
- 80126b2: 687b ldr r3, [r7, #4]
- 80126b4: 2200 movs r2, #0
- 80126b6: 675a str r2, [r3, #116] @ 0x74
- }
- 80126b8: bf00 nop
- 80126ba: 3754 adds r7, #84 @ 0x54
- 80126bc: 46bd mov sp, r7
- 80126be: f85d 7b04 ldr.w r7, [sp], #4
- 80126c2: 4770 bx lr
- 80126c4: effffffe .word 0xeffffffe
- 080126c8 <UART_DMAAbortOnError>:
- * (To be called at end of DMA Abort procedure following error occurrence).
- * @param hdma DMA handle.
- * @retval None
- */
- static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
- {
- 80126c8: b580 push {r7, lr}
- 80126ca: b084 sub sp, #16
- 80126cc: af00 add r7, sp, #0
- 80126ce: 6078 str r0, [r7, #4]
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- 80126d0: 687b ldr r3, [r7, #4]
- 80126d2: 6b9b ldr r3, [r3, #56] @ 0x38
- 80126d4: 60fb str r3, [r7, #12]
- huart->RxXferCount = 0U;
- 80126d6: 68fb ldr r3, [r7, #12]
- 80126d8: 2200 movs r2, #0
- 80126da: f8a3 205e strh.w r2, [r3, #94] @ 0x5e
- huart->TxXferCount = 0U;
- 80126de: 68fb ldr r3, [r7, #12]
- 80126e0: 2200 movs r2, #0
- 80126e2: f8a3 2056 strh.w r2, [r3, #86] @ 0x56
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
- #else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
- 80126e6: 68f8 ldr r0, [r7, #12]
- 80126e8: f7fe ff3a bl 8011560 <HAL_UART_ErrorCallback>
- #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
- 80126ec: bf00 nop
- 80126ee: 3710 adds r7, #16
- 80126f0: 46bd mov sp, r7
- 80126f2: bd80 pop {r7, pc}
- 080126f4 <UART_TxISR_8BIT>:
- * interruptions have been enabled by HAL_UART_Transmit_IT().
- * @param huart UART handle.
- * @retval None
- */
- static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
- {
- 80126f4: b480 push {r7}
- 80126f6: b08f sub sp, #60 @ 0x3c
- 80126f8: af00 add r7, sp, #0
- 80126fa: 6078 str r0, [r7, #4]
- /* Check that a Tx process is ongoing */
- if (huart->gState == HAL_UART_STATE_BUSY_TX)
- 80126fc: 687b ldr r3, [r7, #4]
- 80126fe: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
- 8012702: 2b21 cmp r3, #33 @ 0x21
- 8012704: d14c bne.n 80127a0 <UART_TxISR_8BIT+0xac>
- {
- if (huart->TxXferCount == 0U)
- 8012706: 687b ldr r3, [r7, #4]
- 8012708: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
- 801270c: b29b uxth r3, r3
- 801270e: 2b00 cmp r3, #0
- 8012710: d132 bne.n 8012778 <UART_TxISR_8BIT+0x84>
- {
- /* Disable the UART Transmit Data Register Empty Interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
- 8012712: 687b ldr r3, [r7, #4]
- 8012714: 681b ldr r3, [r3, #0]
- 8012716: 623b str r3, [r7, #32]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012718: 6a3b ldr r3, [r7, #32]
- 801271a: e853 3f00 ldrex r3, [r3]
- 801271e: 61fb str r3, [r7, #28]
- return(result);
- 8012720: 69fb ldr r3, [r7, #28]
- 8012722: f023 0380 bic.w r3, r3, #128 @ 0x80
- 8012726: 637b str r3, [r7, #52] @ 0x34
- 8012728: 687b ldr r3, [r7, #4]
- 801272a: 681b ldr r3, [r3, #0]
- 801272c: 461a mov r2, r3
- 801272e: 6b7b ldr r3, [r7, #52] @ 0x34
- 8012730: 62fb str r3, [r7, #44] @ 0x2c
- 8012732: 62ba str r2, [r7, #40] @ 0x28
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012734: 6ab9 ldr r1, [r7, #40] @ 0x28
- 8012736: 6afa ldr r2, [r7, #44] @ 0x2c
- 8012738: e841 2300 strex r3, r2, [r1]
- 801273c: 627b str r3, [r7, #36] @ 0x24
- return(result);
- 801273e: 6a7b ldr r3, [r7, #36] @ 0x24
- 8012740: 2b00 cmp r3, #0
- 8012742: d1e6 bne.n 8012712 <UART_TxISR_8BIT+0x1e>
- /* Enable the UART Transmit Complete Interrupt */
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
- 8012744: 687b ldr r3, [r7, #4]
- 8012746: 681b ldr r3, [r3, #0]
- 8012748: 60fb str r3, [r7, #12]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 801274a: 68fb ldr r3, [r7, #12]
- 801274c: e853 3f00 ldrex r3, [r3]
- 8012750: 60bb str r3, [r7, #8]
- return(result);
- 8012752: 68bb ldr r3, [r7, #8]
- 8012754: f043 0340 orr.w r3, r3, #64 @ 0x40
- 8012758: 633b str r3, [r7, #48] @ 0x30
- 801275a: 687b ldr r3, [r7, #4]
- 801275c: 681b ldr r3, [r3, #0]
- 801275e: 461a mov r2, r3
- 8012760: 6b3b ldr r3, [r7, #48] @ 0x30
- 8012762: 61bb str r3, [r7, #24]
- 8012764: 617a str r2, [r7, #20]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012766: 6979 ldr r1, [r7, #20]
- 8012768: 69ba ldr r2, [r7, #24]
- 801276a: e841 2300 strex r3, r2, [r1]
- 801276e: 613b str r3, [r7, #16]
- return(result);
- 8012770: 693b ldr r3, [r7, #16]
- 8012772: 2b00 cmp r3, #0
- 8012774: d1e6 bne.n 8012744 <UART_TxISR_8BIT+0x50>
- huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
- huart->pTxBuffPtr++;
- huart->TxXferCount--;
- }
- }
- }
- 8012776: e013 b.n 80127a0 <UART_TxISR_8BIT+0xac>
- huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
- 8012778: 687b ldr r3, [r7, #4]
- 801277a: 6d1b ldr r3, [r3, #80] @ 0x50
- 801277c: 781a ldrb r2, [r3, #0]
- 801277e: 687b ldr r3, [r7, #4]
- 8012780: 681b ldr r3, [r3, #0]
- 8012782: 629a str r2, [r3, #40] @ 0x28
- huart->pTxBuffPtr++;
- 8012784: 687b ldr r3, [r7, #4]
- 8012786: 6d1b ldr r3, [r3, #80] @ 0x50
- 8012788: 1c5a adds r2, r3, #1
- 801278a: 687b ldr r3, [r7, #4]
- 801278c: 651a str r2, [r3, #80] @ 0x50
- huart->TxXferCount--;
- 801278e: 687b ldr r3, [r7, #4]
- 8012790: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
- 8012794: b29b uxth r3, r3
- 8012796: 3b01 subs r3, #1
- 8012798: b29a uxth r2, r3
- 801279a: 687b ldr r3, [r7, #4]
- 801279c: f8a3 2056 strh.w r2, [r3, #86] @ 0x56
- }
- 80127a0: bf00 nop
- 80127a2: 373c adds r7, #60 @ 0x3c
- 80127a4: 46bd mov sp, r7
- 80127a6: f85d 7b04 ldr.w r7, [sp], #4
- 80127aa: 4770 bx lr
- 080127ac <UART_TxISR_16BIT>:
- * interruptions have been enabled by HAL_UART_Transmit_IT().
- * @param huart UART handle.
- * @retval None
- */
- static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
- {
- 80127ac: b480 push {r7}
- 80127ae: b091 sub sp, #68 @ 0x44
- 80127b0: af00 add r7, sp, #0
- 80127b2: 6078 str r0, [r7, #4]
- const uint16_t *tmp;
- /* Check that a Tx process is ongoing */
- if (huart->gState == HAL_UART_STATE_BUSY_TX)
- 80127b4: 687b ldr r3, [r7, #4]
- 80127b6: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
- 80127ba: 2b21 cmp r3, #33 @ 0x21
- 80127bc: d151 bne.n 8012862 <UART_TxISR_16BIT+0xb6>
- {
- if (huart->TxXferCount == 0U)
- 80127be: 687b ldr r3, [r7, #4]
- 80127c0: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
- 80127c4: b29b uxth r3, r3
- 80127c6: 2b00 cmp r3, #0
- 80127c8: d132 bne.n 8012830 <UART_TxISR_16BIT+0x84>
- {
- /* Disable the UART Transmit Data Register Empty Interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
- 80127ca: 687b ldr r3, [r7, #4]
- 80127cc: 681b ldr r3, [r3, #0]
- 80127ce: 627b str r3, [r7, #36] @ 0x24
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 80127d0: 6a7b ldr r3, [r7, #36] @ 0x24
- 80127d2: e853 3f00 ldrex r3, [r3]
- 80127d6: 623b str r3, [r7, #32]
- return(result);
- 80127d8: 6a3b ldr r3, [r7, #32]
- 80127da: f023 0380 bic.w r3, r3, #128 @ 0x80
- 80127de: 63bb str r3, [r7, #56] @ 0x38
- 80127e0: 687b ldr r3, [r7, #4]
- 80127e2: 681b ldr r3, [r3, #0]
- 80127e4: 461a mov r2, r3
- 80127e6: 6bbb ldr r3, [r7, #56] @ 0x38
- 80127e8: 633b str r3, [r7, #48] @ 0x30
- 80127ea: 62fa str r2, [r7, #44] @ 0x2c
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 80127ec: 6af9 ldr r1, [r7, #44] @ 0x2c
- 80127ee: 6b3a ldr r2, [r7, #48] @ 0x30
- 80127f0: e841 2300 strex r3, r2, [r1]
- 80127f4: 62bb str r3, [r7, #40] @ 0x28
- return(result);
- 80127f6: 6abb ldr r3, [r7, #40] @ 0x28
- 80127f8: 2b00 cmp r3, #0
- 80127fa: d1e6 bne.n 80127ca <UART_TxISR_16BIT+0x1e>
- /* Enable the UART Transmit Complete Interrupt */
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
- 80127fc: 687b ldr r3, [r7, #4]
- 80127fe: 681b ldr r3, [r3, #0]
- 8012800: 613b str r3, [r7, #16]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012802: 693b ldr r3, [r7, #16]
- 8012804: e853 3f00 ldrex r3, [r3]
- 8012808: 60fb str r3, [r7, #12]
- return(result);
- 801280a: 68fb ldr r3, [r7, #12]
- 801280c: f043 0340 orr.w r3, r3, #64 @ 0x40
- 8012810: 637b str r3, [r7, #52] @ 0x34
- 8012812: 687b ldr r3, [r7, #4]
- 8012814: 681b ldr r3, [r3, #0]
- 8012816: 461a mov r2, r3
- 8012818: 6b7b ldr r3, [r7, #52] @ 0x34
- 801281a: 61fb str r3, [r7, #28]
- 801281c: 61ba str r2, [r7, #24]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 801281e: 69b9 ldr r1, [r7, #24]
- 8012820: 69fa ldr r2, [r7, #28]
- 8012822: e841 2300 strex r3, r2, [r1]
- 8012826: 617b str r3, [r7, #20]
- return(result);
- 8012828: 697b ldr r3, [r7, #20]
- 801282a: 2b00 cmp r3, #0
- 801282c: d1e6 bne.n 80127fc <UART_TxISR_16BIT+0x50>
- huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
- huart->pTxBuffPtr += 2U;
- huart->TxXferCount--;
- }
- }
- }
- 801282e: e018 b.n 8012862 <UART_TxISR_16BIT+0xb6>
- tmp = (const uint16_t *) huart->pTxBuffPtr;
- 8012830: 687b ldr r3, [r7, #4]
- 8012832: 6d1b ldr r3, [r3, #80] @ 0x50
- 8012834: 63fb str r3, [r7, #60] @ 0x3c
- huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
- 8012836: 6bfb ldr r3, [r7, #60] @ 0x3c
- 8012838: 881b ldrh r3, [r3, #0]
- 801283a: 461a mov r2, r3
- 801283c: 687b ldr r3, [r7, #4]
- 801283e: 681b ldr r3, [r3, #0]
- 8012840: f3c2 0208 ubfx r2, r2, #0, #9
- 8012844: 629a str r2, [r3, #40] @ 0x28
- huart->pTxBuffPtr += 2U;
- 8012846: 687b ldr r3, [r7, #4]
- 8012848: 6d1b ldr r3, [r3, #80] @ 0x50
- 801284a: 1c9a adds r2, r3, #2
- 801284c: 687b ldr r3, [r7, #4]
- 801284e: 651a str r2, [r3, #80] @ 0x50
- huart->TxXferCount--;
- 8012850: 687b ldr r3, [r7, #4]
- 8012852: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
- 8012856: b29b uxth r3, r3
- 8012858: 3b01 subs r3, #1
- 801285a: b29a uxth r2, r3
- 801285c: 687b ldr r3, [r7, #4]
- 801285e: f8a3 2056 strh.w r2, [r3, #86] @ 0x56
- }
- 8012862: bf00 nop
- 8012864: 3744 adds r7, #68 @ 0x44
- 8012866: 46bd mov sp, r7
- 8012868: f85d 7b04 ldr.w r7, [sp], #4
- 801286c: 4770 bx lr
- 0801286e <UART_TxISR_8BIT_FIFOEN>:
- * interruptions have been enabled by HAL_UART_Transmit_IT().
- * @param huart UART handle.
- * @retval None
- */
- static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
- {
- 801286e: b480 push {r7}
- 8012870: b091 sub sp, #68 @ 0x44
- 8012872: af00 add r7, sp, #0
- 8012874: 6078 str r0, [r7, #4]
- uint16_t nb_tx_data;
- /* Check that a Tx process is ongoing */
- if (huart->gState == HAL_UART_STATE_BUSY_TX)
- 8012876: 687b ldr r3, [r7, #4]
- 8012878: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
- 801287c: 2b21 cmp r3, #33 @ 0x21
- 801287e: d160 bne.n 8012942 <UART_TxISR_8BIT_FIFOEN+0xd4>
- {
- for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
- 8012880: 687b ldr r3, [r7, #4]
- 8012882: f8b3 306a ldrh.w r3, [r3, #106] @ 0x6a
- 8012886: 87fb strh r3, [r7, #62] @ 0x3e
- 8012888: e057 b.n 801293a <UART_TxISR_8BIT_FIFOEN+0xcc>
- {
- if (huart->TxXferCount == 0U)
- 801288a: 687b ldr r3, [r7, #4]
- 801288c: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
- 8012890: b29b uxth r3, r3
- 8012892: 2b00 cmp r3, #0
- 8012894: d133 bne.n 80128fe <UART_TxISR_8BIT_FIFOEN+0x90>
- {
- /* Disable the TX FIFO threshold interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
- 8012896: 687b ldr r3, [r7, #4]
- 8012898: 681b ldr r3, [r3, #0]
- 801289a: 3308 adds r3, #8
- 801289c: 627b str r3, [r7, #36] @ 0x24
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 801289e: 6a7b ldr r3, [r7, #36] @ 0x24
- 80128a0: e853 3f00 ldrex r3, [r3]
- 80128a4: 623b str r3, [r7, #32]
- return(result);
- 80128a6: 6a3b ldr r3, [r7, #32]
- 80128a8: f423 0300 bic.w r3, r3, #8388608 @ 0x800000
- 80128ac: 63bb str r3, [r7, #56] @ 0x38
- 80128ae: 687b ldr r3, [r7, #4]
- 80128b0: 681b ldr r3, [r3, #0]
- 80128b2: 3308 adds r3, #8
- 80128b4: 6bba ldr r2, [r7, #56] @ 0x38
- 80128b6: 633a str r2, [r7, #48] @ 0x30
- 80128b8: 62fb str r3, [r7, #44] @ 0x2c
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 80128ba: 6af9 ldr r1, [r7, #44] @ 0x2c
- 80128bc: 6b3a ldr r2, [r7, #48] @ 0x30
- 80128be: e841 2300 strex r3, r2, [r1]
- 80128c2: 62bb str r3, [r7, #40] @ 0x28
- return(result);
- 80128c4: 6abb ldr r3, [r7, #40] @ 0x28
- 80128c6: 2b00 cmp r3, #0
- 80128c8: d1e5 bne.n 8012896 <UART_TxISR_8BIT_FIFOEN+0x28>
- /* Enable the UART Transmit Complete Interrupt */
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
- 80128ca: 687b ldr r3, [r7, #4]
- 80128cc: 681b ldr r3, [r3, #0]
- 80128ce: 613b str r3, [r7, #16]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 80128d0: 693b ldr r3, [r7, #16]
- 80128d2: e853 3f00 ldrex r3, [r3]
- 80128d6: 60fb str r3, [r7, #12]
- return(result);
- 80128d8: 68fb ldr r3, [r7, #12]
- 80128da: f043 0340 orr.w r3, r3, #64 @ 0x40
- 80128de: 637b str r3, [r7, #52] @ 0x34
- 80128e0: 687b ldr r3, [r7, #4]
- 80128e2: 681b ldr r3, [r3, #0]
- 80128e4: 461a mov r2, r3
- 80128e6: 6b7b ldr r3, [r7, #52] @ 0x34
- 80128e8: 61fb str r3, [r7, #28]
- 80128ea: 61ba str r2, [r7, #24]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 80128ec: 69b9 ldr r1, [r7, #24]
- 80128ee: 69fa ldr r2, [r7, #28]
- 80128f0: e841 2300 strex r3, r2, [r1]
- 80128f4: 617b str r3, [r7, #20]
- return(result);
- 80128f6: 697b ldr r3, [r7, #20]
- 80128f8: 2b00 cmp r3, #0
- 80128fa: d1e6 bne.n 80128ca <UART_TxISR_8BIT_FIFOEN+0x5c>
- break; /* force exit loop */
- 80128fc: e021 b.n 8012942 <UART_TxISR_8BIT_FIFOEN+0xd4>
- }
- else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
- 80128fe: 687b ldr r3, [r7, #4]
- 8012900: 681b ldr r3, [r3, #0]
- 8012902: 69db ldr r3, [r3, #28]
- 8012904: f003 0380 and.w r3, r3, #128 @ 0x80
- 8012908: 2b00 cmp r3, #0
- 801290a: d013 beq.n 8012934 <UART_TxISR_8BIT_FIFOEN+0xc6>
- {
- huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
- 801290c: 687b ldr r3, [r7, #4]
- 801290e: 6d1b ldr r3, [r3, #80] @ 0x50
- 8012910: 781a ldrb r2, [r3, #0]
- 8012912: 687b ldr r3, [r7, #4]
- 8012914: 681b ldr r3, [r3, #0]
- 8012916: 629a str r2, [r3, #40] @ 0x28
- huart->pTxBuffPtr++;
- 8012918: 687b ldr r3, [r7, #4]
- 801291a: 6d1b ldr r3, [r3, #80] @ 0x50
- 801291c: 1c5a adds r2, r3, #1
- 801291e: 687b ldr r3, [r7, #4]
- 8012920: 651a str r2, [r3, #80] @ 0x50
- huart->TxXferCount--;
- 8012922: 687b ldr r3, [r7, #4]
- 8012924: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
- 8012928: b29b uxth r3, r3
- 801292a: 3b01 subs r3, #1
- 801292c: b29a uxth r2, r3
- 801292e: 687b ldr r3, [r7, #4]
- 8012930: f8a3 2056 strh.w r2, [r3, #86] @ 0x56
- for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
- 8012934: 8ffb ldrh r3, [r7, #62] @ 0x3e
- 8012936: 3b01 subs r3, #1
- 8012938: 87fb strh r3, [r7, #62] @ 0x3e
- 801293a: 8ffb ldrh r3, [r7, #62] @ 0x3e
- 801293c: 2b00 cmp r3, #0
- 801293e: d1a4 bne.n 801288a <UART_TxISR_8BIT_FIFOEN+0x1c>
- {
- /* Nothing to do */
- }
- }
- }
- }
- 8012940: e7ff b.n 8012942 <UART_TxISR_8BIT_FIFOEN+0xd4>
- 8012942: bf00 nop
- 8012944: 3744 adds r7, #68 @ 0x44
- 8012946: 46bd mov sp, r7
- 8012948: f85d 7b04 ldr.w r7, [sp], #4
- 801294c: 4770 bx lr
- 0801294e <UART_TxISR_16BIT_FIFOEN>:
- * interruptions have been enabled by HAL_UART_Transmit_IT().
- * @param huart UART handle.
- * @retval None
- */
- static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
- {
- 801294e: b480 push {r7}
- 8012950: b091 sub sp, #68 @ 0x44
- 8012952: af00 add r7, sp, #0
- 8012954: 6078 str r0, [r7, #4]
- const uint16_t *tmp;
- uint16_t nb_tx_data;
- /* Check that a Tx process is ongoing */
- if (huart->gState == HAL_UART_STATE_BUSY_TX)
- 8012956: 687b ldr r3, [r7, #4]
- 8012958: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
- 801295c: 2b21 cmp r3, #33 @ 0x21
- 801295e: d165 bne.n 8012a2c <UART_TxISR_16BIT_FIFOEN+0xde>
- {
- for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
- 8012960: 687b ldr r3, [r7, #4]
- 8012962: f8b3 306a ldrh.w r3, [r3, #106] @ 0x6a
- 8012966: 87fb strh r3, [r7, #62] @ 0x3e
- 8012968: e05c b.n 8012a24 <UART_TxISR_16BIT_FIFOEN+0xd6>
- {
- if (huart->TxXferCount == 0U)
- 801296a: 687b ldr r3, [r7, #4]
- 801296c: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
- 8012970: b29b uxth r3, r3
- 8012972: 2b00 cmp r3, #0
- 8012974: d133 bne.n 80129de <UART_TxISR_16BIT_FIFOEN+0x90>
- {
- /* Disable the TX FIFO threshold interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
- 8012976: 687b ldr r3, [r7, #4]
- 8012978: 681b ldr r3, [r3, #0]
- 801297a: 3308 adds r3, #8
- 801297c: 623b str r3, [r7, #32]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 801297e: 6a3b ldr r3, [r7, #32]
- 8012980: e853 3f00 ldrex r3, [r3]
- 8012984: 61fb str r3, [r7, #28]
- return(result);
- 8012986: 69fb ldr r3, [r7, #28]
- 8012988: f423 0300 bic.w r3, r3, #8388608 @ 0x800000
- 801298c: 637b str r3, [r7, #52] @ 0x34
- 801298e: 687b ldr r3, [r7, #4]
- 8012990: 681b ldr r3, [r3, #0]
- 8012992: 3308 adds r3, #8
- 8012994: 6b7a ldr r2, [r7, #52] @ 0x34
- 8012996: 62fa str r2, [r7, #44] @ 0x2c
- 8012998: 62bb str r3, [r7, #40] @ 0x28
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 801299a: 6ab9 ldr r1, [r7, #40] @ 0x28
- 801299c: 6afa ldr r2, [r7, #44] @ 0x2c
- 801299e: e841 2300 strex r3, r2, [r1]
- 80129a2: 627b str r3, [r7, #36] @ 0x24
- return(result);
- 80129a4: 6a7b ldr r3, [r7, #36] @ 0x24
- 80129a6: 2b00 cmp r3, #0
- 80129a8: d1e5 bne.n 8012976 <UART_TxISR_16BIT_FIFOEN+0x28>
- /* Enable the UART Transmit Complete Interrupt */
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
- 80129aa: 687b ldr r3, [r7, #4]
- 80129ac: 681b ldr r3, [r3, #0]
- 80129ae: 60fb str r3, [r7, #12]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 80129b0: 68fb ldr r3, [r7, #12]
- 80129b2: e853 3f00 ldrex r3, [r3]
- 80129b6: 60bb str r3, [r7, #8]
- return(result);
- 80129b8: 68bb ldr r3, [r7, #8]
- 80129ba: f043 0340 orr.w r3, r3, #64 @ 0x40
- 80129be: 633b str r3, [r7, #48] @ 0x30
- 80129c0: 687b ldr r3, [r7, #4]
- 80129c2: 681b ldr r3, [r3, #0]
- 80129c4: 461a mov r2, r3
- 80129c6: 6b3b ldr r3, [r7, #48] @ 0x30
- 80129c8: 61bb str r3, [r7, #24]
- 80129ca: 617a str r2, [r7, #20]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 80129cc: 6979 ldr r1, [r7, #20]
- 80129ce: 69ba ldr r2, [r7, #24]
- 80129d0: e841 2300 strex r3, r2, [r1]
- 80129d4: 613b str r3, [r7, #16]
- return(result);
- 80129d6: 693b ldr r3, [r7, #16]
- 80129d8: 2b00 cmp r3, #0
- 80129da: d1e6 bne.n 80129aa <UART_TxISR_16BIT_FIFOEN+0x5c>
- break; /* force exit loop */
- 80129dc: e026 b.n 8012a2c <UART_TxISR_16BIT_FIFOEN+0xde>
- }
- else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
- 80129de: 687b ldr r3, [r7, #4]
- 80129e0: 681b ldr r3, [r3, #0]
- 80129e2: 69db ldr r3, [r3, #28]
- 80129e4: f003 0380 and.w r3, r3, #128 @ 0x80
- 80129e8: 2b00 cmp r3, #0
- 80129ea: d018 beq.n 8012a1e <UART_TxISR_16BIT_FIFOEN+0xd0>
- {
- tmp = (const uint16_t *) huart->pTxBuffPtr;
- 80129ec: 687b ldr r3, [r7, #4]
- 80129ee: 6d1b ldr r3, [r3, #80] @ 0x50
- 80129f0: 63bb str r3, [r7, #56] @ 0x38
- huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
- 80129f2: 6bbb ldr r3, [r7, #56] @ 0x38
- 80129f4: 881b ldrh r3, [r3, #0]
- 80129f6: 461a mov r2, r3
- 80129f8: 687b ldr r3, [r7, #4]
- 80129fa: 681b ldr r3, [r3, #0]
- 80129fc: f3c2 0208 ubfx r2, r2, #0, #9
- 8012a00: 629a str r2, [r3, #40] @ 0x28
- huart->pTxBuffPtr += 2U;
- 8012a02: 687b ldr r3, [r7, #4]
- 8012a04: 6d1b ldr r3, [r3, #80] @ 0x50
- 8012a06: 1c9a adds r2, r3, #2
- 8012a08: 687b ldr r3, [r7, #4]
- 8012a0a: 651a str r2, [r3, #80] @ 0x50
- huart->TxXferCount--;
- 8012a0c: 687b ldr r3, [r7, #4]
- 8012a0e: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
- 8012a12: b29b uxth r3, r3
- 8012a14: 3b01 subs r3, #1
- 8012a16: b29a uxth r2, r3
- 8012a18: 687b ldr r3, [r7, #4]
- 8012a1a: f8a3 2056 strh.w r2, [r3, #86] @ 0x56
- for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
- 8012a1e: 8ffb ldrh r3, [r7, #62] @ 0x3e
- 8012a20: 3b01 subs r3, #1
- 8012a22: 87fb strh r3, [r7, #62] @ 0x3e
- 8012a24: 8ffb ldrh r3, [r7, #62] @ 0x3e
- 8012a26: 2b00 cmp r3, #0
- 8012a28: d19f bne.n 801296a <UART_TxISR_16BIT_FIFOEN+0x1c>
- {
- /* Nothing to do */
- }
- }
- }
- }
- 8012a2a: e7ff b.n 8012a2c <UART_TxISR_16BIT_FIFOEN+0xde>
- 8012a2c: bf00 nop
- 8012a2e: 3744 adds r7, #68 @ 0x44
- 8012a30: 46bd mov sp, r7
- 8012a32: f85d 7b04 ldr.w r7, [sp], #4
- 8012a36: 4770 bx lr
- 08012a38 <UART_EndTransmit_IT>:
- * @param huart pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval None
- */
- static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
- {
- 8012a38: b580 push {r7, lr}
- 8012a3a: b088 sub sp, #32
- 8012a3c: af00 add r7, sp, #0
- 8012a3e: 6078 str r0, [r7, #4]
- /* Disable the UART Transmit Complete Interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
- 8012a40: 687b ldr r3, [r7, #4]
- 8012a42: 681b ldr r3, [r3, #0]
- 8012a44: 60fb str r3, [r7, #12]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012a46: 68fb ldr r3, [r7, #12]
- 8012a48: e853 3f00 ldrex r3, [r3]
- 8012a4c: 60bb str r3, [r7, #8]
- return(result);
- 8012a4e: 68bb ldr r3, [r7, #8]
- 8012a50: f023 0340 bic.w r3, r3, #64 @ 0x40
- 8012a54: 61fb str r3, [r7, #28]
- 8012a56: 687b ldr r3, [r7, #4]
- 8012a58: 681b ldr r3, [r3, #0]
- 8012a5a: 461a mov r2, r3
- 8012a5c: 69fb ldr r3, [r7, #28]
- 8012a5e: 61bb str r3, [r7, #24]
- 8012a60: 617a str r2, [r7, #20]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012a62: 6979 ldr r1, [r7, #20]
- 8012a64: 69ba ldr r2, [r7, #24]
- 8012a66: e841 2300 strex r3, r2, [r1]
- 8012a6a: 613b str r3, [r7, #16]
- return(result);
- 8012a6c: 693b ldr r3, [r7, #16]
- 8012a6e: 2b00 cmp r3, #0
- 8012a70: d1e6 bne.n 8012a40 <UART_EndTransmit_IT+0x8>
- /* Tx process is ended, restore huart->gState to Ready */
- huart->gState = HAL_UART_STATE_READY;
- 8012a72: 687b ldr r3, [r7, #4]
- 8012a74: 2220 movs r2, #32
- 8012a76: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- /* Cleat TxISR function pointer */
- huart->TxISR = NULL;
- 8012a7a: 687b ldr r3, [r7, #4]
- 8012a7c: 2200 movs r2, #0
- 8012a7e: 679a str r2, [r3, #120] @ 0x78
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Tx complete callback*/
- huart->TxCpltCallback(huart);
- #else
- /*Call legacy weak Tx complete callback*/
- HAL_UART_TxCpltCallback(huart);
- 8012a80: 6878 ldr r0, [r7, #4]
- 8012a82: f7f1 fd01 bl 8004488 <HAL_UART_TxCpltCallback>
- #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
- 8012a86: bf00 nop
- 8012a88: 3720 adds r7, #32
- 8012a8a: 46bd mov sp, r7
- 8012a8c: bd80 pop {r7, pc}
- ...
- 08012a90 <UART_RxISR_8BIT>:
- * @brief RX interrupt handler for 7 or 8 bits data word length .
- * @param huart UART handle.
- * @retval None
- */
- static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
- {
- 8012a90: b580 push {r7, lr}
- 8012a92: b09c sub sp, #112 @ 0x70
- 8012a94: af00 add r7, sp, #0
- 8012a96: 6078 str r0, [r7, #4]
- uint16_t uhMask = huart->Mask;
- 8012a98: 687b ldr r3, [r7, #4]
- 8012a9a: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
- 8012a9e: f8a7 306e strh.w r3, [r7, #110] @ 0x6e
- uint16_t uhdata;
- /* Check that a Rx process is ongoing */
- if (huart->RxState == HAL_UART_STATE_BUSY_RX)
- 8012aa2: 687b ldr r3, [r7, #4]
- 8012aa4: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
- 8012aa8: 2b22 cmp r3, #34 @ 0x22
- 8012aaa: f040 80be bne.w 8012c2a <UART_RxISR_8BIT+0x19a>
- {
- uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
- 8012aae: 687b ldr r3, [r7, #4]
- 8012ab0: 681b ldr r3, [r3, #0]
- 8012ab2: 6a5b ldr r3, [r3, #36] @ 0x24
- 8012ab4: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
- *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
- 8012ab8: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
- 8012abc: b2d9 uxtb r1, r3
- 8012abe: f8b7 306e ldrh.w r3, [r7, #110] @ 0x6e
- 8012ac2: b2da uxtb r2, r3
- 8012ac4: 687b ldr r3, [r7, #4]
- 8012ac6: 6d9b ldr r3, [r3, #88] @ 0x58
- 8012ac8: 400a ands r2, r1
- 8012aca: b2d2 uxtb r2, r2
- 8012acc: 701a strb r2, [r3, #0]
- huart->pRxBuffPtr++;
- 8012ace: 687b ldr r3, [r7, #4]
- 8012ad0: 6d9b ldr r3, [r3, #88] @ 0x58
- 8012ad2: 1c5a adds r2, r3, #1
- 8012ad4: 687b ldr r3, [r7, #4]
- 8012ad6: 659a str r2, [r3, #88] @ 0x58
- huart->RxXferCount--;
- 8012ad8: 687b ldr r3, [r7, #4]
- 8012ada: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
- 8012ade: b29b uxth r3, r3
- 8012ae0: 3b01 subs r3, #1
- 8012ae2: b29a uxth r2, r3
- 8012ae4: 687b ldr r3, [r7, #4]
- 8012ae6: f8a3 205e strh.w r2, [r3, #94] @ 0x5e
- if (huart->RxXferCount == 0U)
- 8012aea: 687b ldr r3, [r7, #4]
- 8012aec: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
- 8012af0: b29b uxth r3, r3
- 8012af2: 2b00 cmp r3, #0
- 8012af4: f040 80a1 bne.w 8012c3a <UART_RxISR_8BIT+0x1aa>
- {
- /* Disable the UART Parity Error Interrupt and RXNE interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
- 8012af8: 687b ldr r3, [r7, #4]
- 8012afa: 681b ldr r3, [r3, #0]
- 8012afc: 64fb str r3, [r7, #76] @ 0x4c
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012afe: 6cfb ldr r3, [r7, #76] @ 0x4c
- 8012b00: e853 3f00 ldrex r3, [r3]
- 8012b04: 64bb str r3, [r7, #72] @ 0x48
- return(result);
- 8012b06: 6cbb ldr r3, [r7, #72] @ 0x48
- 8012b08: f423 7390 bic.w r3, r3, #288 @ 0x120
- 8012b0c: 66bb str r3, [r7, #104] @ 0x68
- 8012b0e: 687b ldr r3, [r7, #4]
- 8012b10: 681b ldr r3, [r3, #0]
- 8012b12: 461a mov r2, r3
- 8012b14: 6ebb ldr r3, [r7, #104] @ 0x68
- 8012b16: 65bb str r3, [r7, #88] @ 0x58
- 8012b18: 657a str r2, [r7, #84] @ 0x54
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012b1a: 6d79 ldr r1, [r7, #84] @ 0x54
- 8012b1c: 6dba ldr r2, [r7, #88] @ 0x58
- 8012b1e: e841 2300 strex r3, r2, [r1]
- 8012b22: 653b str r3, [r7, #80] @ 0x50
- return(result);
- 8012b24: 6d3b ldr r3, [r7, #80] @ 0x50
- 8012b26: 2b00 cmp r3, #0
- 8012b28: d1e6 bne.n 8012af8 <UART_RxISR_8BIT+0x68>
- /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8012b2a: 687b ldr r3, [r7, #4]
- 8012b2c: 681b ldr r3, [r3, #0]
- 8012b2e: 3308 adds r3, #8
- 8012b30: 63bb str r3, [r7, #56] @ 0x38
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012b32: 6bbb ldr r3, [r7, #56] @ 0x38
- 8012b34: e853 3f00 ldrex r3, [r3]
- 8012b38: 637b str r3, [r7, #52] @ 0x34
- return(result);
- 8012b3a: 6b7b ldr r3, [r7, #52] @ 0x34
- 8012b3c: f023 0301 bic.w r3, r3, #1
- 8012b40: 667b str r3, [r7, #100] @ 0x64
- 8012b42: 687b ldr r3, [r7, #4]
- 8012b44: 681b ldr r3, [r3, #0]
- 8012b46: 3308 adds r3, #8
- 8012b48: 6e7a ldr r2, [r7, #100] @ 0x64
- 8012b4a: 647a str r2, [r7, #68] @ 0x44
- 8012b4c: 643b str r3, [r7, #64] @ 0x40
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012b4e: 6c39 ldr r1, [r7, #64] @ 0x40
- 8012b50: 6c7a ldr r2, [r7, #68] @ 0x44
- 8012b52: e841 2300 strex r3, r2, [r1]
- 8012b56: 63fb str r3, [r7, #60] @ 0x3c
- return(result);
- 8012b58: 6bfb ldr r3, [r7, #60] @ 0x3c
- 8012b5a: 2b00 cmp r3, #0
- 8012b5c: d1e5 bne.n 8012b2a <UART_RxISR_8BIT+0x9a>
- /* Rx process is completed, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- 8012b5e: 687b ldr r3, [r7, #4]
- 8012b60: 2220 movs r2, #32
- 8012b62: f8c3 208c str.w r2, [r3, #140] @ 0x8c
- /* Clear RxISR function pointer */
- huart->RxISR = NULL;
- 8012b66: 687b ldr r3, [r7, #4]
- 8012b68: 2200 movs r2, #0
- 8012b6a: 675a str r2, [r3, #116] @ 0x74
- /* Initialize type of RxEvent to Transfer Complete */
- huart->RxEventType = HAL_UART_RXEVENT_TC;
- 8012b6c: 687b ldr r3, [r7, #4]
- 8012b6e: 2200 movs r2, #0
- 8012b70: 671a str r2, [r3, #112] @ 0x70
- if (!(IS_LPUART_INSTANCE(huart->Instance)))
- 8012b72: 687b ldr r3, [r7, #4]
- 8012b74: 681b ldr r3, [r3, #0]
- 8012b76: 4a33 ldr r2, [pc, #204] @ (8012c44 <UART_RxISR_8BIT+0x1b4>)
- 8012b78: 4293 cmp r3, r2
- 8012b7a: d01f beq.n 8012bbc <UART_RxISR_8BIT+0x12c>
- {
- /* Check that USART RTOEN bit is set */
- if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
- 8012b7c: 687b ldr r3, [r7, #4]
- 8012b7e: 681b ldr r3, [r3, #0]
- 8012b80: 685b ldr r3, [r3, #4]
- 8012b82: f403 0300 and.w r3, r3, #8388608 @ 0x800000
- 8012b86: 2b00 cmp r3, #0
- 8012b88: d018 beq.n 8012bbc <UART_RxISR_8BIT+0x12c>
- {
- /* Enable the UART Receiver Timeout Interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
- 8012b8a: 687b ldr r3, [r7, #4]
- 8012b8c: 681b ldr r3, [r3, #0]
- 8012b8e: 627b str r3, [r7, #36] @ 0x24
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012b90: 6a7b ldr r3, [r7, #36] @ 0x24
- 8012b92: e853 3f00 ldrex r3, [r3]
- 8012b96: 623b str r3, [r7, #32]
- return(result);
- 8012b98: 6a3b ldr r3, [r7, #32]
- 8012b9a: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000
- 8012b9e: 663b str r3, [r7, #96] @ 0x60
- 8012ba0: 687b ldr r3, [r7, #4]
- 8012ba2: 681b ldr r3, [r3, #0]
- 8012ba4: 461a mov r2, r3
- 8012ba6: 6e3b ldr r3, [r7, #96] @ 0x60
- 8012ba8: 633b str r3, [r7, #48] @ 0x30
- 8012baa: 62fa str r2, [r7, #44] @ 0x2c
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012bac: 6af9 ldr r1, [r7, #44] @ 0x2c
- 8012bae: 6b3a ldr r2, [r7, #48] @ 0x30
- 8012bb0: e841 2300 strex r3, r2, [r1]
- 8012bb4: 62bb str r3, [r7, #40] @ 0x28
- return(result);
- 8012bb6: 6abb ldr r3, [r7, #40] @ 0x28
- 8012bb8: 2b00 cmp r3, #0
- 8012bba: d1e6 bne.n 8012b8a <UART_RxISR_8BIT+0xfa>
- }
- }
- /* Check current reception Mode :
- If Reception till IDLE event has been selected : */
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- 8012bbc: 687b ldr r3, [r7, #4]
- 8012bbe: 6edb ldr r3, [r3, #108] @ 0x6c
- 8012bc0: 2b01 cmp r3, #1
- 8012bc2: d12e bne.n 8012c22 <UART_RxISR_8BIT+0x192>
- {
- /* Set reception type to Standard */
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 8012bc4: 687b ldr r3, [r7, #4]
- 8012bc6: 2200 movs r2, #0
- 8012bc8: 66da str r2, [r3, #108] @ 0x6c
- /* Disable IDLE interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- 8012bca: 687b ldr r3, [r7, #4]
- 8012bcc: 681b ldr r3, [r3, #0]
- 8012bce: 613b str r3, [r7, #16]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012bd0: 693b ldr r3, [r7, #16]
- 8012bd2: e853 3f00 ldrex r3, [r3]
- 8012bd6: 60fb str r3, [r7, #12]
- return(result);
- 8012bd8: 68fb ldr r3, [r7, #12]
- 8012bda: f023 0310 bic.w r3, r3, #16
- 8012bde: 65fb str r3, [r7, #92] @ 0x5c
- 8012be0: 687b ldr r3, [r7, #4]
- 8012be2: 681b ldr r3, [r3, #0]
- 8012be4: 461a mov r2, r3
- 8012be6: 6dfb ldr r3, [r7, #92] @ 0x5c
- 8012be8: 61fb str r3, [r7, #28]
- 8012bea: 61ba str r2, [r7, #24]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012bec: 69b9 ldr r1, [r7, #24]
- 8012bee: 69fa ldr r2, [r7, #28]
- 8012bf0: e841 2300 strex r3, r2, [r1]
- 8012bf4: 617b str r3, [r7, #20]
- return(result);
- 8012bf6: 697b ldr r3, [r7, #20]
- 8012bf8: 2b00 cmp r3, #0
- 8012bfa: d1e6 bne.n 8012bca <UART_RxISR_8BIT+0x13a>
- if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
- 8012bfc: 687b ldr r3, [r7, #4]
- 8012bfe: 681b ldr r3, [r3, #0]
- 8012c00: 69db ldr r3, [r3, #28]
- 8012c02: f003 0310 and.w r3, r3, #16
- 8012c06: 2b10 cmp r3, #16
- 8012c08: d103 bne.n 8012c12 <UART_RxISR_8BIT+0x182>
- {
- /* Clear IDLE Flag */
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
- 8012c0a: 687b ldr r3, [r7, #4]
- 8012c0c: 681b ldr r3, [r3, #0]
- 8012c0e: 2210 movs r2, #16
- 8012c10: 621a str r2, [r3, #32]
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx Event callback*/
- huart->RxEventCallback(huart, huart->RxXferSize);
- #else
- /*Call legacy weak Rx Event callback*/
- HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
- 8012c12: 687b ldr r3, [r7, #4]
- 8012c14: f8b3 305c ldrh.w r3, [r3, #92] @ 0x5c
- 8012c18: 4619 mov r1, r3
- 8012c1a: 6878 ldr r0, [r7, #4]
- 8012c1c: f7f1 fc0a bl 8004434 <HAL_UARTEx_RxEventCallback>
- else
- {
- /* Clear RXNE interrupt flag */
- __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
- }
- }
- 8012c20: e00b b.n 8012c3a <UART_RxISR_8BIT+0x1aa>
- HAL_UART_RxCpltCallback(huart);
- 8012c22: 6878 ldr r0, [r7, #4]
- 8012c24: f7f1 fbfc bl 8004420 <HAL_UART_RxCpltCallback>
- }
- 8012c28: e007 b.n 8012c3a <UART_RxISR_8BIT+0x1aa>
- __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
- 8012c2a: 687b ldr r3, [r7, #4]
- 8012c2c: 681b ldr r3, [r3, #0]
- 8012c2e: 699a ldr r2, [r3, #24]
- 8012c30: 687b ldr r3, [r7, #4]
- 8012c32: 681b ldr r3, [r3, #0]
- 8012c34: f042 0208 orr.w r2, r2, #8
- 8012c38: 619a str r2, [r3, #24]
- }
- 8012c3a: bf00 nop
- 8012c3c: 3770 adds r7, #112 @ 0x70
- 8012c3e: 46bd mov sp, r7
- 8012c40: bd80 pop {r7, pc}
- 8012c42: bf00 nop
- 8012c44: 58000c00 .word 0x58000c00
- 08012c48 <UART_RxISR_16BIT>:
- * interruptions have been enabled by HAL_UART_Receive_IT()
- * @param huart UART handle.
- * @retval None
- */
- static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
- {
- 8012c48: b580 push {r7, lr}
- 8012c4a: b09c sub sp, #112 @ 0x70
- 8012c4c: af00 add r7, sp, #0
- 8012c4e: 6078 str r0, [r7, #4]
- uint16_t *tmp;
- uint16_t uhMask = huart->Mask;
- 8012c50: 687b ldr r3, [r7, #4]
- 8012c52: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
- 8012c56: f8a7 306e strh.w r3, [r7, #110] @ 0x6e
- uint16_t uhdata;
- /* Check that a Rx process is ongoing */
- if (huart->RxState == HAL_UART_STATE_BUSY_RX)
- 8012c5a: 687b ldr r3, [r7, #4]
- 8012c5c: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
- 8012c60: 2b22 cmp r3, #34 @ 0x22
- 8012c62: f040 80be bne.w 8012de2 <UART_RxISR_16BIT+0x19a>
- {
- uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
- 8012c66: 687b ldr r3, [r7, #4]
- 8012c68: 681b ldr r3, [r3, #0]
- 8012c6a: 6a5b ldr r3, [r3, #36] @ 0x24
- 8012c6c: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
- tmp = (uint16_t *) huart->pRxBuffPtr ;
- 8012c70: 687b ldr r3, [r7, #4]
- 8012c72: 6d9b ldr r3, [r3, #88] @ 0x58
- 8012c74: 66bb str r3, [r7, #104] @ 0x68
- *tmp = (uint16_t)(uhdata & uhMask);
- 8012c76: f8b7 206c ldrh.w r2, [r7, #108] @ 0x6c
- 8012c7a: f8b7 306e ldrh.w r3, [r7, #110] @ 0x6e
- 8012c7e: 4013 ands r3, r2
- 8012c80: b29a uxth r2, r3
- 8012c82: 6ebb ldr r3, [r7, #104] @ 0x68
- 8012c84: 801a strh r2, [r3, #0]
- huart->pRxBuffPtr += 2U;
- 8012c86: 687b ldr r3, [r7, #4]
- 8012c88: 6d9b ldr r3, [r3, #88] @ 0x58
- 8012c8a: 1c9a adds r2, r3, #2
- 8012c8c: 687b ldr r3, [r7, #4]
- 8012c8e: 659a str r2, [r3, #88] @ 0x58
- huart->RxXferCount--;
- 8012c90: 687b ldr r3, [r7, #4]
- 8012c92: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
- 8012c96: b29b uxth r3, r3
- 8012c98: 3b01 subs r3, #1
- 8012c9a: b29a uxth r2, r3
- 8012c9c: 687b ldr r3, [r7, #4]
- 8012c9e: f8a3 205e strh.w r2, [r3, #94] @ 0x5e
- if (huart->RxXferCount == 0U)
- 8012ca2: 687b ldr r3, [r7, #4]
- 8012ca4: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
- 8012ca8: b29b uxth r3, r3
- 8012caa: 2b00 cmp r3, #0
- 8012cac: f040 80a1 bne.w 8012df2 <UART_RxISR_16BIT+0x1aa>
- {
- /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
- 8012cb0: 687b ldr r3, [r7, #4]
- 8012cb2: 681b ldr r3, [r3, #0]
- 8012cb4: 64bb str r3, [r7, #72] @ 0x48
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012cb6: 6cbb ldr r3, [r7, #72] @ 0x48
- 8012cb8: e853 3f00 ldrex r3, [r3]
- 8012cbc: 647b str r3, [r7, #68] @ 0x44
- return(result);
- 8012cbe: 6c7b ldr r3, [r7, #68] @ 0x44
- 8012cc0: f423 7390 bic.w r3, r3, #288 @ 0x120
- 8012cc4: 667b str r3, [r7, #100] @ 0x64
- 8012cc6: 687b ldr r3, [r7, #4]
- 8012cc8: 681b ldr r3, [r3, #0]
- 8012cca: 461a mov r2, r3
- 8012ccc: 6e7b ldr r3, [r7, #100] @ 0x64
- 8012cce: 657b str r3, [r7, #84] @ 0x54
- 8012cd0: 653a str r2, [r7, #80] @ 0x50
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012cd2: 6d39 ldr r1, [r7, #80] @ 0x50
- 8012cd4: 6d7a ldr r2, [r7, #84] @ 0x54
- 8012cd6: e841 2300 strex r3, r2, [r1]
- 8012cda: 64fb str r3, [r7, #76] @ 0x4c
- return(result);
- 8012cdc: 6cfb ldr r3, [r7, #76] @ 0x4c
- 8012cde: 2b00 cmp r3, #0
- 8012ce0: d1e6 bne.n 8012cb0 <UART_RxISR_16BIT+0x68>
- /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8012ce2: 687b ldr r3, [r7, #4]
- 8012ce4: 681b ldr r3, [r3, #0]
- 8012ce6: 3308 adds r3, #8
- 8012ce8: 637b str r3, [r7, #52] @ 0x34
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012cea: 6b7b ldr r3, [r7, #52] @ 0x34
- 8012cec: e853 3f00 ldrex r3, [r3]
- 8012cf0: 633b str r3, [r7, #48] @ 0x30
- return(result);
- 8012cf2: 6b3b ldr r3, [r7, #48] @ 0x30
- 8012cf4: f023 0301 bic.w r3, r3, #1
- 8012cf8: 663b str r3, [r7, #96] @ 0x60
- 8012cfa: 687b ldr r3, [r7, #4]
- 8012cfc: 681b ldr r3, [r3, #0]
- 8012cfe: 3308 adds r3, #8
- 8012d00: 6e3a ldr r2, [r7, #96] @ 0x60
- 8012d02: 643a str r2, [r7, #64] @ 0x40
- 8012d04: 63fb str r3, [r7, #60] @ 0x3c
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012d06: 6bf9 ldr r1, [r7, #60] @ 0x3c
- 8012d08: 6c3a ldr r2, [r7, #64] @ 0x40
- 8012d0a: e841 2300 strex r3, r2, [r1]
- 8012d0e: 63bb str r3, [r7, #56] @ 0x38
- return(result);
- 8012d10: 6bbb ldr r3, [r7, #56] @ 0x38
- 8012d12: 2b00 cmp r3, #0
- 8012d14: d1e5 bne.n 8012ce2 <UART_RxISR_16BIT+0x9a>
- /* Rx process is completed, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- 8012d16: 687b ldr r3, [r7, #4]
- 8012d18: 2220 movs r2, #32
- 8012d1a: f8c3 208c str.w r2, [r3, #140] @ 0x8c
- /* Clear RxISR function pointer */
- huart->RxISR = NULL;
- 8012d1e: 687b ldr r3, [r7, #4]
- 8012d20: 2200 movs r2, #0
- 8012d22: 675a str r2, [r3, #116] @ 0x74
- /* Initialize type of RxEvent to Transfer Complete */
- huart->RxEventType = HAL_UART_RXEVENT_TC;
- 8012d24: 687b ldr r3, [r7, #4]
- 8012d26: 2200 movs r2, #0
- 8012d28: 671a str r2, [r3, #112] @ 0x70
- if (!(IS_LPUART_INSTANCE(huart->Instance)))
- 8012d2a: 687b ldr r3, [r7, #4]
- 8012d2c: 681b ldr r3, [r3, #0]
- 8012d2e: 4a33 ldr r2, [pc, #204] @ (8012dfc <UART_RxISR_16BIT+0x1b4>)
- 8012d30: 4293 cmp r3, r2
- 8012d32: d01f beq.n 8012d74 <UART_RxISR_16BIT+0x12c>
- {
- /* Check that USART RTOEN bit is set */
- if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
- 8012d34: 687b ldr r3, [r7, #4]
- 8012d36: 681b ldr r3, [r3, #0]
- 8012d38: 685b ldr r3, [r3, #4]
- 8012d3a: f403 0300 and.w r3, r3, #8388608 @ 0x800000
- 8012d3e: 2b00 cmp r3, #0
- 8012d40: d018 beq.n 8012d74 <UART_RxISR_16BIT+0x12c>
- {
- /* Enable the UART Receiver Timeout Interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
- 8012d42: 687b ldr r3, [r7, #4]
- 8012d44: 681b ldr r3, [r3, #0]
- 8012d46: 623b str r3, [r7, #32]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012d48: 6a3b ldr r3, [r7, #32]
- 8012d4a: e853 3f00 ldrex r3, [r3]
- 8012d4e: 61fb str r3, [r7, #28]
- return(result);
- 8012d50: 69fb ldr r3, [r7, #28]
- 8012d52: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000
- 8012d56: 65fb str r3, [r7, #92] @ 0x5c
- 8012d58: 687b ldr r3, [r7, #4]
- 8012d5a: 681b ldr r3, [r3, #0]
- 8012d5c: 461a mov r2, r3
- 8012d5e: 6dfb ldr r3, [r7, #92] @ 0x5c
- 8012d60: 62fb str r3, [r7, #44] @ 0x2c
- 8012d62: 62ba str r2, [r7, #40] @ 0x28
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012d64: 6ab9 ldr r1, [r7, #40] @ 0x28
- 8012d66: 6afa ldr r2, [r7, #44] @ 0x2c
- 8012d68: e841 2300 strex r3, r2, [r1]
- 8012d6c: 627b str r3, [r7, #36] @ 0x24
- return(result);
- 8012d6e: 6a7b ldr r3, [r7, #36] @ 0x24
- 8012d70: 2b00 cmp r3, #0
- 8012d72: d1e6 bne.n 8012d42 <UART_RxISR_16BIT+0xfa>
- }
- }
- /* Check current reception Mode :
- If Reception till IDLE event has been selected : */
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- 8012d74: 687b ldr r3, [r7, #4]
- 8012d76: 6edb ldr r3, [r3, #108] @ 0x6c
- 8012d78: 2b01 cmp r3, #1
- 8012d7a: d12e bne.n 8012dda <UART_RxISR_16BIT+0x192>
- {
- /* Set reception type to Standard */
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 8012d7c: 687b ldr r3, [r7, #4]
- 8012d7e: 2200 movs r2, #0
- 8012d80: 66da str r2, [r3, #108] @ 0x6c
- /* Disable IDLE interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- 8012d82: 687b ldr r3, [r7, #4]
- 8012d84: 681b ldr r3, [r3, #0]
- 8012d86: 60fb str r3, [r7, #12]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012d88: 68fb ldr r3, [r7, #12]
- 8012d8a: e853 3f00 ldrex r3, [r3]
- 8012d8e: 60bb str r3, [r7, #8]
- return(result);
- 8012d90: 68bb ldr r3, [r7, #8]
- 8012d92: f023 0310 bic.w r3, r3, #16
- 8012d96: 65bb str r3, [r7, #88] @ 0x58
- 8012d98: 687b ldr r3, [r7, #4]
- 8012d9a: 681b ldr r3, [r3, #0]
- 8012d9c: 461a mov r2, r3
- 8012d9e: 6dbb ldr r3, [r7, #88] @ 0x58
- 8012da0: 61bb str r3, [r7, #24]
- 8012da2: 617a str r2, [r7, #20]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012da4: 6979 ldr r1, [r7, #20]
- 8012da6: 69ba ldr r2, [r7, #24]
- 8012da8: e841 2300 strex r3, r2, [r1]
- 8012dac: 613b str r3, [r7, #16]
- return(result);
- 8012dae: 693b ldr r3, [r7, #16]
- 8012db0: 2b00 cmp r3, #0
- 8012db2: d1e6 bne.n 8012d82 <UART_RxISR_16BIT+0x13a>
- if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
- 8012db4: 687b ldr r3, [r7, #4]
- 8012db6: 681b ldr r3, [r3, #0]
- 8012db8: 69db ldr r3, [r3, #28]
- 8012dba: f003 0310 and.w r3, r3, #16
- 8012dbe: 2b10 cmp r3, #16
- 8012dc0: d103 bne.n 8012dca <UART_RxISR_16BIT+0x182>
- {
- /* Clear IDLE Flag */
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
- 8012dc2: 687b ldr r3, [r7, #4]
- 8012dc4: 681b ldr r3, [r3, #0]
- 8012dc6: 2210 movs r2, #16
- 8012dc8: 621a str r2, [r3, #32]
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx Event callback*/
- huart->RxEventCallback(huart, huart->RxXferSize);
- #else
- /*Call legacy weak Rx Event callback*/
- HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
- 8012dca: 687b ldr r3, [r7, #4]
- 8012dcc: f8b3 305c ldrh.w r3, [r3, #92] @ 0x5c
- 8012dd0: 4619 mov r1, r3
- 8012dd2: 6878 ldr r0, [r7, #4]
- 8012dd4: f7f1 fb2e bl 8004434 <HAL_UARTEx_RxEventCallback>
- else
- {
- /* Clear RXNE interrupt flag */
- __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
- }
- }
- 8012dd8: e00b b.n 8012df2 <UART_RxISR_16BIT+0x1aa>
- HAL_UART_RxCpltCallback(huart);
- 8012dda: 6878 ldr r0, [r7, #4]
- 8012ddc: f7f1 fb20 bl 8004420 <HAL_UART_RxCpltCallback>
- }
- 8012de0: e007 b.n 8012df2 <UART_RxISR_16BIT+0x1aa>
- __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
- 8012de2: 687b ldr r3, [r7, #4]
- 8012de4: 681b ldr r3, [r3, #0]
- 8012de6: 699a ldr r2, [r3, #24]
- 8012de8: 687b ldr r3, [r7, #4]
- 8012dea: 681b ldr r3, [r3, #0]
- 8012dec: f042 0208 orr.w r2, r2, #8
- 8012df0: 619a str r2, [r3, #24]
- }
- 8012df2: bf00 nop
- 8012df4: 3770 adds r7, #112 @ 0x70
- 8012df6: 46bd mov sp, r7
- 8012df8: bd80 pop {r7, pc}
- 8012dfa: bf00 nop
- 8012dfc: 58000c00 .word 0x58000c00
- 08012e00 <UART_RxISR_8BIT_FIFOEN>:
- * interruptions have been enabled by HAL_UART_Receive_IT()
- * @param huart UART handle.
- * @retval None
- */
- static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
- {
- 8012e00: b580 push {r7, lr}
- 8012e02: b0ac sub sp, #176 @ 0xb0
- 8012e04: af00 add r7, sp, #0
- 8012e06: 6078 str r0, [r7, #4]
- uint16_t uhMask = huart->Mask;
- 8012e08: 687b ldr r3, [r7, #4]
- 8012e0a: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
- 8012e0e: f8a7 30aa strh.w r3, [r7, #170] @ 0xaa
- uint16_t uhdata;
- uint16_t nb_rx_data;
- uint16_t rxdatacount;
- uint32_t isrflags = READ_REG(huart->Instance->ISR);
- 8012e12: 687b ldr r3, [r7, #4]
- 8012e14: 681b ldr r3, [r3, #0]
- 8012e16: 69db ldr r3, [r3, #28]
- 8012e18: f8c7 30ac str.w r3, [r7, #172] @ 0xac
- uint32_t cr1its = READ_REG(huart->Instance->CR1);
- 8012e1c: 687b ldr r3, [r7, #4]
- 8012e1e: 681b ldr r3, [r3, #0]
- 8012e20: 681b ldr r3, [r3, #0]
- 8012e22: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
- uint32_t cr3its = READ_REG(huart->Instance->CR3);
- 8012e26: 687b ldr r3, [r7, #4]
- 8012e28: 681b ldr r3, [r3, #0]
- 8012e2a: 689b ldr r3, [r3, #8]
- 8012e2c: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
- /* Check that a Rx process is ongoing */
- if (huart->RxState == HAL_UART_STATE_BUSY_RX)
- 8012e30: 687b ldr r3, [r7, #4]
- 8012e32: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
- 8012e36: 2b22 cmp r3, #34 @ 0x22
- 8012e38: f040 8180 bne.w 801313c <UART_RxISR_8BIT_FIFOEN+0x33c>
- {
- nb_rx_data = huart->NbRxDataToProcess;
- 8012e3c: 687b ldr r3, [r7, #4]
- 8012e3e: f8b3 3068 ldrh.w r3, [r3, #104] @ 0x68
- 8012e42: f8a7 309e strh.w r3, [r7, #158] @ 0x9e
- while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
- 8012e46: e123 b.n 8013090 <UART_RxISR_8BIT_FIFOEN+0x290>
- {
- uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
- 8012e48: 687b ldr r3, [r7, #4]
- 8012e4a: 681b ldr r3, [r3, #0]
- 8012e4c: 6a5b ldr r3, [r3, #36] @ 0x24
- 8012e4e: f8a7 309c strh.w r3, [r7, #156] @ 0x9c
- *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
- 8012e52: f8b7 309c ldrh.w r3, [r7, #156] @ 0x9c
- 8012e56: b2d9 uxtb r1, r3
- 8012e58: f8b7 30aa ldrh.w r3, [r7, #170] @ 0xaa
- 8012e5c: b2da uxtb r2, r3
- 8012e5e: 687b ldr r3, [r7, #4]
- 8012e60: 6d9b ldr r3, [r3, #88] @ 0x58
- 8012e62: 400a ands r2, r1
- 8012e64: b2d2 uxtb r2, r2
- 8012e66: 701a strb r2, [r3, #0]
- huart->pRxBuffPtr++;
- 8012e68: 687b ldr r3, [r7, #4]
- 8012e6a: 6d9b ldr r3, [r3, #88] @ 0x58
- 8012e6c: 1c5a adds r2, r3, #1
- 8012e6e: 687b ldr r3, [r7, #4]
- 8012e70: 659a str r2, [r3, #88] @ 0x58
- huart->RxXferCount--;
- 8012e72: 687b ldr r3, [r7, #4]
- 8012e74: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
- 8012e78: b29b uxth r3, r3
- 8012e7a: 3b01 subs r3, #1
- 8012e7c: b29a uxth r2, r3
- 8012e7e: 687b ldr r3, [r7, #4]
- 8012e80: f8a3 205e strh.w r2, [r3, #94] @ 0x5e
- isrflags = READ_REG(huart->Instance->ISR);
- 8012e84: 687b ldr r3, [r7, #4]
- 8012e86: 681b ldr r3, [r3, #0]
- 8012e88: 69db ldr r3, [r3, #28]
- 8012e8a: f8c7 30ac str.w r3, [r7, #172] @ 0xac
- /* If some non blocking errors occurred */
- if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
- 8012e8e: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
- 8012e92: f003 0307 and.w r3, r3, #7
- 8012e96: 2b00 cmp r3, #0
- 8012e98: d053 beq.n 8012f42 <UART_RxISR_8BIT_FIFOEN+0x142>
- {
- /* UART parity error interrupt occurred -------------------------------------*/
- if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
- 8012e9a: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
- 8012e9e: f003 0301 and.w r3, r3, #1
- 8012ea2: 2b00 cmp r3, #0
- 8012ea4: d011 beq.n 8012eca <UART_RxISR_8BIT_FIFOEN+0xca>
- 8012ea6: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
- 8012eaa: f403 7380 and.w r3, r3, #256 @ 0x100
- 8012eae: 2b00 cmp r3, #0
- 8012eb0: d00b beq.n 8012eca <UART_RxISR_8BIT_FIFOEN+0xca>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
- 8012eb2: 687b ldr r3, [r7, #4]
- 8012eb4: 681b ldr r3, [r3, #0]
- 8012eb6: 2201 movs r2, #1
- 8012eb8: 621a str r2, [r3, #32]
- huart->ErrorCode |= HAL_UART_ERROR_PE;
- 8012eba: 687b ldr r3, [r7, #4]
- 8012ebc: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8012ec0: f043 0201 orr.w r2, r3, #1
- 8012ec4: 687b ldr r3, [r7, #4]
- 8012ec6: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- }
- /* UART frame error interrupt occurred --------------------------------------*/
- if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
- 8012eca: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
- 8012ece: f003 0302 and.w r3, r3, #2
- 8012ed2: 2b00 cmp r3, #0
- 8012ed4: d011 beq.n 8012efa <UART_RxISR_8BIT_FIFOEN+0xfa>
- 8012ed6: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
- 8012eda: f003 0301 and.w r3, r3, #1
- 8012ede: 2b00 cmp r3, #0
- 8012ee0: d00b beq.n 8012efa <UART_RxISR_8BIT_FIFOEN+0xfa>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
- 8012ee2: 687b ldr r3, [r7, #4]
- 8012ee4: 681b ldr r3, [r3, #0]
- 8012ee6: 2202 movs r2, #2
- 8012ee8: 621a str r2, [r3, #32]
- huart->ErrorCode |= HAL_UART_ERROR_FE;
- 8012eea: 687b ldr r3, [r7, #4]
- 8012eec: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8012ef0: f043 0204 orr.w r2, r3, #4
- 8012ef4: 687b ldr r3, [r7, #4]
- 8012ef6: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- }
- /* UART noise error interrupt occurred --------------------------------------*/
- if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
- 8012efa: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
- 8012efe: f003 0304 and.w r3, r3, #4
- 8012f02: 2b00 cmp r3, #0
- 8012f04: d011 beq.n 8012f2a <UART_RxISR_8BIT_FIFOEN+0x12a>
- 8012f06: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
- 8012f0a: f003 0301 and.w r3, r3, #1
- 8012f0e: 2b00 cmp r3, #0
- 8012f10: d00b beq.n 8012f2a <UART_RxISR_8BIT_FIFOEN+0x12a>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
- 8012f12: 687b ldr r3, [r7, #4]
- 8012f14: 681b ldr r3, [r3, #0]
- 8012f16: 2204 movs r2, #4
- 8012f18: 621a str r2, [r3, #32]
- huart->ErrorCode |= HAL_UART_ERROR_NE;
- 8012f1a: 687b ldr r3, [r7, #4]
- 8012f1c: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8012f20: f043 0202 orr.w r2, r3, #2
- 8012f24: 687b ldr r3, [r7, #4]
- 8012f26: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- }
- /* Call UART Error Call back function if need be ----------------------------*/
- if (huart->ErrorCode != HAL_UART_ERROR_NONE)
- 8012f2a: 687b ldr r3, [r7, #4]
- 8012f2c: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8012f30: 2b00 cmp r3, #0
- 8012f32: d006 beq.n 8012f42 <UART_RxISR_8BIT_FIFOEN+0x142>
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
- #else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
- 8012f34: 6878 ldr r0, [r7, #4]
- 8012f36: f7fe fb13 bl 8011560 <HAL_UART_ErrorCallback>
- #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 8012f3a: 687b ldr r3, [r7, #4]
- 8012f3c: 2200 movs r2, #0
- 8012f3e: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- }
- }
- if (huart->RxXferCount == 0U)
- 8012f42: 687b ldr r3, [r7, #4]
- 8012f44: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
- 8012f48: b29b uxth r3, r3
- 8012f4a: 2b00 cmp r3, #0
- 8012f4c: f040 80a0 bne.w 8013090 <UART_RxISR_8BIT_FIFOEN+0x290>
- {
- /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
- 8012f50: 687b ldr r3, [r7, #4]
- 8012f52: 681b ldr r3, [r3, #0]
- 8012f54: 673b str r3, [r7, #112] @ 0x70
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012f56: 6f3b ldr r3, [r7, #112] @ 0x70
- 8012f58: e853 3f00 ldrex r3, [r3]
- 8012f5c: 66fb str r3, [r7, #108] @ 0x6c
- return(result);
- 8012f5e: 6efb ldr r3, [r7, #108] @ 0x6c
- 8012f60: f423 7380 bic.w r3, r3, #256 @ 0x100
- 8012f64: f8c7 3098 str.w r3, [r7, #152] @ 0x98
- 8012f68: 687b ldr r3, [r7, #4]
- 8012f6a: 681b ldr r3, [r3, #0]
- 8012f6c: 461a mov r2, r3
- 8012f6e: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
- 8012f72: 67fb str r3, [r7, #124] @ 0x7c
- 8012f74: 67ba str r2, [r7, #120] @ 0x78
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012f76: 6fb9 ldr r1, [r7, #120] @ 0x78
- 8012f78: 6ffa ldr r2, [r7, #124] @ 0x7c
- 8012f7a: e841 2300 strex r3, r2, [r1]
- 8012f7e: 677b str r3, [r7, #116] @ 0x74
- return(result);
- 8012f80: 6f7b ldr r3, [r7, #116] @ 0x74
- 8012f82: 2b00 cmp r3, #0
- 8012f84: d1e4 bne.n 8012f50 <UART_RxISR_8BIT_FIFOEN+0x150>
- /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
- and RX FIFO Threshold interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
- 8012f86: 687b ldr r3, [r7, #4]
- 8012f88: 681b ldr r3, [r3, #0]
- 8012f8a: 3308 adds r3, #8
- 8012f8c: 65fb str r3, [r7, #92] @ 0x5c
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012f8e: 6dfb ldr r3, [r7, #92] @ 0x5c
- 8012f90: e853 3f00 ldrex r3, [r3]
- 8012f94: 65bb str r3, [r7, #88] @ 0x58
- return(result);
- 8012f96: 6dba ldr r2, [r7, #88] @ 0x58
- 8012f98: 4b6e ldr r3, [pc, #440] @ (8013154 <UART_RxISR_8BIT_FIFOEN+0x354>)
- 8012f9a: 4013 ands r3, r2
- 8012f9c: f8c7 3094 str.w r3, [r7, #148] @ 0x94
- 8012fa0: 687b ldr r3, [r7, #4]
- 8012fa2: 681b ldr r3, [r3, #0]
- 8012fa4: 3308 adds r3, #8
- 8012fa6: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94
- 8012faa: 66ba str r2, [r7, #104] @ 0x68
- 8012fac: 667b str r3, [r7, #100] @ 0x64
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8012fae: 6e79 ldr r1, [r7, #100] @ 0x64
- 8012fb0: 6eba ldr r2, [r7, #104] @ 0x68
- 8012fb2: e841 2300 strex r3, r2, [r1]
- 8012fb6: 663b str r3, [r7, #96] @ 0x60
- return(result);
- 8012fb8: 6e3b ldr r3, [r7, #96] @ 0x60
- 8012fba: 2b00 cmp r3, #0
- 8012fbc: d1e3 bne.n 8012f86 <UART_RxISR_8BIT_FIFOEN+0x186>
- /* Rx process is completed, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- 8012fbe: 687b ldr r3, [r7, #4]
- 8012fc0: 2220 movs r2, #32
- 8012fc2: f8c3 208c str.w r2, [r3, #140] @ 0x8c
- /* Clear RxISR function pointer */
- huart->RxISR = NULL;
- 8012fc6: 687b ldr r3, [r7, #4]
- 8012fc8: 2200 movs r2, #0
- 8012fca: 675a str r2, [r3, #116] @ 0x74
- /* Initialize type of RxEvent to Transfer Complete */
- huart->RxEventType = HAL_UART_RXEVENT_TC;
- 8012fcc: 687b ldr r3, [r7, #4]
- 8012fce: 2200 movs r2, #0
- 8012fd0: 671a str r2, [r3, #112] @ 0x70
- if (!(IS_LPUART_INSTANCE(huart->Instance)))
- 8012fd2: 687b ldr r3, [r7, #4]
- 8012fd4: 681b ldr r3, [r3, #0]
- 8012fd6: 4a60 ldr r2, [pc, #384] @ (8013158 <UART_RxISR_8BIT_FIFOEN+0x358>)
- 8012fd8: 4293 cmp r3, r2
- 8012fda: d021 beq.n 8013020 <UART_RxISR_8BIT_FIFOEN+0x220>
- {
- /* Check that USART RTOEN bit is set */
- if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
- 8012fdc: 687b ldr r3, [r7, #4]
- 8012fde: 681b ldr r3, [r3, #0]
- 8012fe0: 685b ldr r3, [r3, #4]
- 8012fe2: f403 0300 and.w r3, r3, #8388608 @ 0x800000
- 8012fe6: 2b00 cmp r3, #0
- 8012fe8: d01a beq.n 8013020 <UART_RxISR_8BIT_FIFOEN+0x220>
- {
- /* Enable the UART Receiver Timeout Interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
- 8012fea: 687b ldr r3, [r7, #4]
- 8012fec: 681b ldr r3, [r3, #0]
- 8012fee: 64bb str r3, [r7, #72] @ 0x48
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8012ff0: 6cbb ldr r3, [r7, #72] @ 0x48
- 8012ff2: e853 3f00 ldrex r3, [r3]
- 8012ff6: 647b str r3, [r7, #68] @ 0x44
- return(result);
- 8012ff8: 6c7b ldr r3, [r7, #68] @ 0x44
- 8012ffa: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000
- 8012ffe: f8c7 3090 str.w r3, [r7, #144] @ 0x90
- 8013002: 687b ldr r3, [r7, #4]
- 8013004: 681b ldr r3, [r3, #0]
- 8013006: 461a mov r2, r3
- 8013008: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
- 801300c: 657b str r3, [r7, #84] @ 0x54
- 801300e: 653a str r2, [r7, #80] @ 0x50
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8013010: 6d39 ldr r1, [r7, #80] @ 0x50
- 8013012: 6d7a ldr r2, [r7, #84] @ 0x54
- 8013014: e841 2300 strex r3, r2, [r1]
- 8013018: 64fb str r3, [r7, #76] @ 0x4c
- return(result);
- 801301a: 6cfb ldr r3, [r7, #76] @ 0x4c
- 801301c: 2b00 cmp r3, #0
- 801301e: d1e4 bne.n 8012fea <UART_RxISR_8BIT_FIFOEN+0x1ea>
- }
- }
- /* Check current reception Mode :
- If Reception till IDLE event has been selected : */
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- 8013020: 687b ldr r3, [r7, #4]
- 8013022: 6edb ldr r3, [r3, #108] @ 0x6c
- 8013024: 2b01 cmp r3, #1
- 8013026: d130 bne.n 801308a <UART_RxISR_8BIT_FIFOEN+0x28a>
- {
- /* Set reception type to Standard */
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 8013028: 687b ldr r3, [r7, #4]
- 801302a: 2200 movs r2, #0
- 801302c: 66da str r2, [r3, #108] @ 0x6c
- /* Disable IDLE interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- 801302e: 687b ldr r3, [r7, #4]
- 8013030: 681b ldr r3, [r3, #0]
- 8013032: 637b str r3, [r7, #52] @ 0x34
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8013034: 6b7b ldr r3, [r7, #52] @ 0x34
- 8013036: e853 3f00 ldrex r3, [r3]
- 801303a: 633b str r3, [r7, #48] @ 0x30
- return(result);
- 801303c: 6b3b ldr r3, [r7, #48] @ 0x30
- 801303e: f023 0310 bic.w r3, r3, #16
- 8013042: f8c7 308c str.w r3, [r7, #140] @ 0x8c
- 8013046: 687b ldr r3, [r7, #4]
- 8013048: 681b ldr r3, [r3, #0]
- 801304a: 461a mov r2, r3
- 801304c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
- 8013050: 643b str r3, [r7, #64] @ 0x40
- 8013052: 63fa str r2, [r7, #60] @ 0x3c
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8013054: 6bf9 ldr r1, [r7, #60] @ 0x3c
- 8013056: 6c3a ldr r2, [r7, #64] @ 0x40
- 8013058: e841 2300 strex r3, r2, [r1]
- 801305c: 63bb str r3, [r7, #56] @ 0x38
- return(result);
- 801305e: 6bbb ldr r3, [r7, #56] @ 0x38
- 8013060: 2b00 cmp r3, #0
- 8013062: d1e4 bne.n 801302e <UART_RxISR_8BIT_FIFOEN+0x22e>
- if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
- 8013064: 687b ldr r3, [r7, #4]
- 8013066: 681b ldr r3, [r3, #0]
- 8013068: 69db ldr r3, [r3, #28]
- 801306a: f003 0310 and.w r3, r3, #16
- 801306e: 2b10 cmp r3, #16
- 8013070: d103 bne.n 801307a <UART_RxISR_8BIT_FIFOEN+0x27a>
- {
- /* Clear IDLE Flag */
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
- 8013072: 687b ldr r3, [r7, #4]
- 8013074: 681b ldr r3, [r3, #0]
- 8013076: 2210 movs r2, #16
- 8013078: 621a str r2, [r3, #32]
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx Event callback*/
- huart->RxEventCallback(huart, huart->RxXferSize);
- #else
- /*Call legacy weak Rx Event callback*/
- HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
- 801307a: 687b ldr r3, [r7, #4]
- 801307c: f8b3 305c ldrh.w r3, [r3, #92] @ 0x5c
- 8013080: 4619 mov r1, r3
- 8013082: 6878 ldr r0, [r7, #4]
- 8013084: f7f1 f9d6 bl 8004434 <HAL_UARTEx_RxEventCallback>
- 8013088: e002 b.n 8013090 <UART_RxISR_8BIT_FIFOEN+0x290>
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx complete callback*/
- huart->RxCpltCallback(huart);
- #else
- /*Call legacy weak Rx complete callback*/
- HAL_UART_RxCpltCallback(huart);
- 801308a: 6878 ldr r0, [r7, #4]
- 801308c: f7f1 f9c8 bl 8004420 <HAL_UART_RxCpltCallback>
- while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
- 8013090: f8b7 309e ldrh.w r3, [r7, #158] @ 0x9e
- 8013094: 2b00 cmp r3, #0
- 8013096: d006 beq.n 80130a6 <UART_RxISR_8BIT_FIFOEN+0x2a6>
- 8013098: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
- 801309c: f003 0320 and.w r3, r3, #32
- 80130a0: 2b00 cmp r3, #0
- 80130a2: f47f aed1 bne.w 8012e48 <UART_RxISR_8BIT_FIFOEN+0x48>
- /* When remaining number of bytes to receive is less than the RX FIFO
- threshold, next incoming frames are processed as if FIFO mode was
- disabled (i.e. one interrupt per received frame).
- */
- rxdatacount = huart->RxXferCount;
- 80130a6: 687b ldr r3, [r7, #4]
- 80130a8: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
- 80130ac: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
- if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
- 80130b0: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
- 80130b4: 2b00 cmp r3, #0
- 80130b6: d049 beq.n 801314c <UART_RxISR_8BIT_FIFOEN+0x34c>
- 80130b8: 687b ldr r3, [r7, #4]
- 80130ba: f8b3 3068 ldrh.w r3, [r3, #104] @ 0x68
- 80130be: f8b7 208a ldrh.w r2, [r7, #138] @ 0x8a
- 80130c2: 429a cmp r2, r3
- 80130c4: d242 bcs.n 801314c <UART_RxISR_8BIT_FIFOEN+0x34c>
- {
- /* Disable the UART RXFT interrupt*/
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
- 80130c6: 687b ldr r3, [r7, #4]
- 80130c8: 681b ldr r3, [r3, #0]
- 80130ca: 3308 adds r3, #8
- 80130cc: 623b str r3, [r7, #32]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 80130ce: 6a3b ldr r3, [r7, #32]
- 80130d0: e853 3f00 ldrex r3, [r3]
- 80130d4: 61fb str r3, [r7, #28]
- return(result);
- 80130d6: 69fb ldr r3, [r7, #28]
- 80130d8: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
- 80130dc: f8c7 3084 str.w r3, [r7, #132] @ 0x84
- 80130e0: 687b ldr r3, [r7, #4]
- 80130e2: 681b ldr r3, [r3, #0]
- 80130e4: 3308 adds r3, #8
- 80130e6: f8d7 2084 ldr.w r2, [r7, #132] @ 0x84
- 80130ea: 62fa str r2, [r7, #44] @ 0x2c
- 80130ec: 62bb str r3, [r7, #40] @ 0x28
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 80130ee: 6ab9 ldr r1, [r7, #40] @ 0x28
- 80130f0: 6afa ldr r2, [r7, #44] @ 0x2c
- 80130f2: e841 2300 strex r3, r2, [r1]
- 80130f6: 627b str r3, [r7, #36] @ 0x24
- return(result);
- 80130f8: 6a7b ldr r3, [r7, #36] @ 0x24
- 80130fa: 2b00 cmp r3, #0
- 80130fc: d1e3 bne.n 80130c6 <UART_RxISR_8BIT_FIFOEN+0x2c6>
- /* Update the RxISR function pointer */
- huart->RxISR = UART_RxISR_8BIT;
- 80130fe: 687b ldr r3, [r7, #4]
- 8013100: 4a16 ldr r2, [pc, #88] @ (801315c <UART_RxISR_8BIT_FIFOEN+0x35c>)
- 8013102: 675a str r2, [r3, #116] @ 0x74
- /* Enable the UART Data Register Not Empty interrupt */
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
- 8013104: 687b ldr r3, [r7, #4]
- 8013106: 681b ldr r3, [r3, #0]
- 8013108: 60fb str r3, [r7, #12]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 801310a: 68fb ldr r3, [r7, #12]
- 801310c: e853 3f00 ldrex r3, [r3]
- 8013110: 60bb str r3, [r7, #8]
- return(result);
- 8013112: 68bb ldr r3, [r7, #8]
- 8013114: f043 0320 orr.w r3, r3, #32
- 8013118: f8c7 3080 str.w r3, [r7, #128] @ 0x80
- 801311c: 687b ldr r3, [r7, #4]
- 801311e: 681b ldr r3, [r3, #0]
- 8013120: 461a mov r2, r3
- 8013122: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
- 8013126: 61bb str r3, [r7, #24]
- 8013128: 617a str r2, [r7, #20]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 801312a: 6979 ldr r1, [r7, #20]
- 801312c: 69ba ldr r2, [r7, #24]
- 801312e: e841 2300 strex r3, r2, [r1]
- 8013132: 613b str r3, [r7, #16]
- return(result);
- 8013134: 693b ldr r3, [r7, #16]
- 8013136: 2b00 cmp r3, #0
- 8013138: d1e4 bne.n 8013104 <UART_RxISR_8BIT_FIFOEN+0x304>
- else
- {
- /* Clear RXNE interrupt flag */
- __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
- }
- }
- 801313a: e007 b.n 801314c <UART_RxISR_8BIT_FIFOEN+0x34c>
- __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
- 801313c: 687b ldr r3, [r7, #4]
- 801313e: 681b ldr r3, [r3, #0]
- 8013140: 699a ldr r2, [r3, #24]
- 8013142: 687b ldr r3, [r7, #4]
- 8013144: 681b ldr r3, [r3, #0]
- 8013146: f042 0208 orr.w r2, r2, #8
- 801314a: 619a str r2, [r3, #24]
- }
- 801314c: bf00 nop
- 801314e: 37b0 adds r7, #176 @ 0xb0
- 8013150: 46bd mov sp, r7
- 8013152: bd80 pop {r7, pc}
- 8013154: effffffe .word 0xeffffffe
- 8013158: 58000c00 .word 0x58000c00
- 801315c: 08012a91 .word 0x08012a91
- 08013160 <UART_RxISR_16BIT_FIFOEN>:
- * interruptions have been enabled by HAL_UART_Receive_IT()
- * @param huart UART handle.
- * @retval None
- */
- static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
- {
- 8013160: b580 push {r7, lr}
- 8013162: b0ae sub sp, #184 @ 0xb8
- 8013164: af00 add r7, sp, #0
- 8013166: 6078 str r0, [r7, #4]
- uint16_t *tmp;
- uint16_t uhMask = huart->Mask;
- 8013168: 687b ldr r3, [r7, #4]
- 801316a: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
- 801316e: f8a7 30b2 strh.w r3, [r7, #178] @ 0xb2
- uint16_t uhdata;
- uint16_t nb_rx_data;
- uint16_t rxdatacount;
- uint32_t isrflags = READ_REG(huart->Instance->ISR);
- 8013172: 687b ldr r3, [r7, #4]
- 8013174: 681b ldr r3, [r3, #0]
- 8013176: 69db ldr r3, [r3, #28]
- 8013178: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
- uint32_t cr1its = READ_REG(huart->Instance->CR1);
- 801317c: 687b ldr r3, [r7, #4]
- 801317e: 681b ldr r3, [r3, #0]
- 8013180: 681b ldr r3, [r3, #0]
- 8013182: f8c7 30ac str.w r3, [r7, #172] @ 0xac
- uint32_t cr3its = READ_REG(huart->Instance->CR3);
- 8013186: 687b ldr r3, [r7, #4]
- 8013188: 681b ldr r3, [r3, #0]
- 801318a: 689b ldr r3, [r3, #8]
- 801318c: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
- /* Check that a Rx process is ongoing */
- if (huart->RxState == HAL_UART_STATE_BUSY_RX)
- 8013190: 687b ldr r3, [r7, #4]
- 8013192: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
- 8013196: 2b22 cmp r3, #34 @ 0x22
- 8013198: f040 8184 bne.w 80134a4 <UART_RxISR_16BIT_FIFOEN+0x344>
- {
- nb_rx_data = huart->NbRxDataToProcess;
- 801319c: 687b ldr r3, [r7, #4]
- 801319e: f8b3 3068 ldrh.w r3, [r3, #104] @ 0x68
- 80131a2: f8a7 30a6 strh.w r3, [r7, #166] @ 0xa6
- while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
- 80131a6: e127 b.n 80133f8 <UART_RxISR_16BIT_FIFOEN+0x298>
- {
- uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
- 80131a8: 687b ldr r3, [r7, #4]
- 80131aa: 681b ldr r3, [r3, #0]
- 80131ac: 6a5b ldr r3, [r3, #36] @ 0x24
- 80131ae: f8a7 30a4 strh.w r3, [r7, #164] @ 0xa4
- tmp = (uint16_t *) huart->pRxBuffPtr ;
- 80131b2: 687b ldr r3, [r7, #4]
- 80131b4: 6d9b ldr r3, [r3, #88] @ 0x58
- 80131b6: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
- *tmp = (uint16_t)(uhdata & uhMask);
- 80131ba: f8b7 20a4 ldrh.w r2, [r7, #164] @ 0xa4
- 80131be: f8b7 30b2 ldrh.w r3, [r7, #178] @ 0xb2
- 80131c2: 4013 ands r3, r2
- 80131c4: b29a uxth r2, r3
- 80131c6: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
- 80131ca: 801a strh r2, [r3, #0]
- huart->pRxBuffPtr += 2U;
- 80131cc: 687b ldr r3, [r7, #4]
- 80131ce: 6d9b ldr r3, [r3, #88] @ 0x58
- 80131d0: 1c9a adds r2, r3, #2
- 80131d2: 687b ldr r3, [r7, #4]
- 80131d4: 659a str r2, [r3, #88] @ 0x58
- huart->RxXferCount--;
- 80131d6: 687b ldr r3, [r7, #4]
- 80131d8: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
- 80131dc: b29b uxth r3, r3
- 80131de: 3b01 subs r3, #1
- 80131e0: b29a uxth r2, r3
- 80131e2: 687b ldr r3, [r7, #4]
- 80131e4: f8a3 205e strh.w r2, [r3, #94] @ 0x5e
- isrflags = READ_REG(huart->Instance->ISR);
- 80131e8: 687b ldr r3, [r7, #4]
- 80131ea: 681b ldr r3, [r3, #0]
- 80131ec: 69db ldr r3, [r3, #28]
- 80131ee: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
- /* If some non blocking errors occurred */
- if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
- 80131f2: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
- 80131f6: f003 0307 and.w r3, r3, #7
- 80131fa: 2b00 cmp r3, #0
- 80131fc: d053 beq.n 80132a6 <UART_RxISR_16BIT_FIFOEN+0x146>
- {
- /* UART parity error interrupt occurred -------------------------------------*/
- if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
- 80131fe: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
- 8013202: f003 0301 and.w r3, r3, #1
- 8013206: 2b00 cmp r3, #0
- 8013208: d011 beq.n 801322e <UART_RxISR_16BIT_FIFOEN+0xce>
- 801320a: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
- 801320e: f403 7380 and.w r3, r3, #256 @ 0x100
- 8013212: 2b00 cmp r3, #0
- 8013214: d00b beq.n 801322e <UART_RxISR_16BIT_FIFOEN+0xce>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
- 8013216: 687b ldr r3, [r7, #4]
- 8013218: 681b ldr r3, [r3, #0]
- 801321a: 2201 movs r2, #1
- 801321c: 621a str r2, [r3, #32]
- huart->ErrorCode |= HAL_UART_ERROR_PE;
- 801321e: 687b ldr r3, [r7, #4]
- 8013220: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8013224: f043 0201 orr.w r2, r3, #1
- 8013228: 687b ldr r3, [r7, #4]
- 801322a: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- }
- /* UART frame error interrupt occurred --------------------------------------*/
- if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
- 801322e: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
- 8013232: f003 0302 and.w r3, r3, #2
- 8013236: 2b00 cmp r3, #0
- 8013238: d011 beq.n 801325e <UART_RxISR_16BIT_FIFOEN+0xfe>
- 801323a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
- 801323e: f003 0301 and.w r3, r3, #1
- 8013242: 2b00 cmp r3, #0
- 8013244: d00b beq.n 801325e <UART_RxISR_16BIT_FIFOEN+0xfe>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
- 8013246: 687b ldr r3, [r7, #4]
- 8013248: 681b ldr r3, [r3, #0]
- 801324a: 2202 movs r2, #2
- 801324c: 621a str r2, [r3, #32]
- huart->ErrorCode |= HAL_UART_ERROR_FE;
- 801324e: 687b ldr r3, [r7, #4]
- 8013250: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8013254: f043 0204 orr.w r2, r3, #4
- 8013258: 687b ldr r3, [r7, #4]
- 801325a: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- }
- /* UART noise error interrupt occurred --------------------------------------*/
- if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
- 801325e: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
- 8013262: f003 0304 and.w r3, r3, #4
- 8013266: 2b00 cmp r3, #0
- 8013268: d011 beq.n 801328e <UART_RxISR_16BIT_FIFOEN+0x12e>
- 801326a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
- 801326e: f003 0301 and.w r3, r3, #1
- 8013272: 2b00 cmp r3, #0
- 8013274: d00b beq.n 801328e <UART_RxISR_16BIT_FIFOEN+0x12e>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
- 8013276: 687b ldr r3, [r7, #4]
- 8013278: 681b ldr r3, [r3, #0]
- 801327a: 2204 movs r2, #4
- 801327c: 621a str r2, [r3, #32]
- huart->ErrorCode |= HAL_UART_ERROR_NE;
- 801327e: 687b ldr r3, [r7, #4]
- 8013280: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8013284: f043 0202 orr.w r2, r3, #2
- 8013288: 687b ldr r3, [r7, #4]
- 801328a: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- }
- /* Call UART Error Call back function if need be ----------------------------*/
- if (huart->ErrorCode != HAL_UART_ERROR_NONE)
- 801328e: 687b ldr r3, [r7, #4]
- 8013290: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
- 8013294: 2b00 cmp r3, #0
- 8013296: d006 beq.n 80132a6 <UART_RxISR_16BIT_FIFOEN+0x146>
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
- #else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
- 8013298: 6878 ldr r0, [r7, #4]
- 801329a: f7fe f961 bl 8011560 <HAL_UART_ErrorCallback>
- #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 801329e: 687b ldr r3, [r7, #4]
- 80132a0: 2200 movs r2, #0
- 80132a2: f8c3 2090 str.w r2, [r3, #144] @ 0x90
- }
- }
- if (huart->RxXferCount == 0U)
- 80132a6: 687b ldr r3, [r7, #4]
- 80132a8: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
- 80132ac: b29b uxth r3, r3
- 80132ae: 2b00 cmp r3, #0
- 80132b0: f040 80a2 bne.w 80133f8 <UART_RxISR_16BIT_FIFOEN+0x298>
- {
- /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
- 80132b4: 687b ldr r3, [r7, #4]
- 80132b6: 681b ldr r3, [r3, #0]
- 80132b8: 677b str r3, [r7, #116] @ 0x74
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 80132ba: 6f7b ldr r3, [r7, #116] @ 0x74
- 80132bc: e853 3f00 ldrex r3, [r3]
- 80132c0: 673b str r3, [r7, #112] @ 0x70
- return(result);
- 80132c2: 6f3b ldr r3, [r7, #112] @ 0x70
- 80132c4: f423 7380 bic.w r3, r3, #256 @ 0x100
- 80132c8: f8c7 309c str.w r3, [r7, #156] @ 0x9c
- 80132cc: 687b ldr r3, [r7, #4]
- 80132ce: 681b ldr r3, [r3, #0]
- 80132d0: 461a mov r2, r3
- 80132d2: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
- 80132d6: f8c7 3080 str.w r3, [r7, #128] @ 0x80
- 80132da: 67fa str r2, [r7, #124] @ 0x7c
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 80132dc: 6ff9 ldr r1, [r7, #124] @ 0x7c
- 80132de: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80
- 80132e2: e841 2300 strex r3, r2, [r1]
- 80132e6: 67bb str r3, [r7, #120] @ 0x78
- return(result);
- 80132e8: 6fbb ldr r3, [r7, #120] @ 0x78
- 80132ea: 2b00 cmp r3, #0
- 80132ec: d1e2 bne.n 80132b4 <UART_RxISR_16BIT_FIFOEN+0x154>
- /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
- and RX FIFO Threshold interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
- 80132ee: 687b ldr r3, [r7, #4]
- 80132f0: 681b ldr r3, [r3, #0]
- 80132f2: 3308 adds r3, #8
- 80132f4: 663b str r3, [r7, #96] @ 0x60
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 80132f6: 6e3b ldr r3, [r7, #96] @ 0x60
- 80132f8: e853 3f00 ldrex r3, [r3]
- 80132fc: 65fb str r3, [r7, #92] @ 0x5c
- return(result);
- 80132fe: 6dfa ldr r2, [r7, #92] @ 0x5c
- 8013300: 4b6e ldr r3, [pc, #440] @ (80134bc <UART_RxISR_16BIT_FIFOEN+0x35c>)
- 8013302: 4013 ands r3, r2
- 8013304: f8c7 3098 str.w r3, [r7, #152] @ 0x98
- 8013308: 687b ldr r3, [r7, #4]
- 801330a: 681b ldr r3, [r3, #0]
- 801330c: 3308 adds r3, #8
- 801330e: f8d7 2098 ldr.w r2, [r7, #152] @ 0x98
- 8013312: 66fa str r2, [r7, #108] @ 0x6c
- 8013314: 66bb str r3, [r7, #104] @ 0x68
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8013316: 6eb9 ldr r1, [r7, #104] @ 0x68
- 8013318: 6efa ldr r2, [r7, #108] @ 0x6c
- 801331a: e841 2300 strex r3, r2, [r1]
- 801331e: 667b str r3, [r7, #100] @ 0x64
- return(result);
- 8013320: 6e7b ldr r3, [r7, #100] @ 0x64
- 8013322: 2b00 cmp r3, #0
- 8013324: d1e3 bne.n 80132ee <UART_RxISR_16BIT_FIFOEN+0x18e>
- /* Rx process is completed, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- 8013326: 687b ldr r3, [r7, #4]
- 8013328: 2220 movs r2, #32
- 801332a: f8c3 208c str.w r2, [r3, #140] @ 0x8c
- /* Clear RxISR function pointer */
- huart->RxISR = NULL;
- 801332e: 687b ldr r3, [r7, #4]
- 8013330: 2200 movs r2, #0
- 8013332: 675a str r2, [r3, #116] @ 0x74
- /* Initialize type of RxEvent to Transfer Complete */
- huart->RxEventType = HAL_UART_RXEVENT_TC;
- 8013334: 687b ldr r3, [r7, #4]
- 8013336: 2200 movs r2, #0
- 8013338: 671a str r2, [r3, #112] @ 0x70
- if (!(IS_LPUART_INSTANCE(huart->Instance)))
- 801333a: 687b ldr r3, [r7, #4]
- 801333c: 681b ldr r3, [r3, #0]
- 801333e: 4a60 ldr r2, [pc, #384] @ (80134c0 <UART_RxISR_16BIT_FIFOEN+0x360>)
- 8013340: 4293 cmp r3, r2
- 8013342: d021 beq.n 8013388 <UART_RxISR_16BIT_FIFOEN+0x228>
- {
- /* Check that USART RTOEN bit is set */
- if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
- 8013344: 687b ldr r3, [r7, #4]
- 8013346: 681b ldr r3, [r3, #0]
- 8013348: 685b ldr r3, [r3, #4]
- 801334a: f403 0300 and.w r3, r3, #8388608 @ 0x800000
- 801334e: 2b00 cmp r3, #0
- 8013350: d01a beq.n 8013388 <UART_RxISR_16BIT_FIFOEN+0x228>
- {
- /* Enable the UART Receiver Timeout Interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
- 8013352: 687b ldr r3, [r7, #4]
- 8013354: 681b ldr r3, [r3, #0]
- 8013356: 64fb str r3, [r7, #76] @ 0x4c
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8013358: 6cfb ldr r3, [r7, #76] @ 0x4c
- 801335a: e853 3f00 ldrex r3, [r3]
- 801335e: 64bb str r3, [r7, #72] @ 0x48
- return(result);
- 8013360: 6cbb ldr r3, [r7, #72] @ 0x48
- 8013362: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000
- 8013366: f8c7 3094 str.w r3, [r7, #148] @ 0x94
- 801336a: 687b ldr r3, [r7, #4]
- 801336c: 681b ldr r3, [r3, #0]
- 801336e: 461a mov r2, r3
- 8013370: f8d7 3094 ldr.w r3, [r7, #148] @ 0x94
- 8013374: 65bb str r3, [r7, #88] @ 0x58
- 8013376: 657a str r2, [r7, #84] @ 0x54
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8013378: 6d79 ldr r1, [r7, #84] @ 0x54
- 801337a: 6dba ldr r2, [r7, #88] @ 0x58
- 801337c: e841 2300 strex r3, r2, [r1]
- 8013380: 653b str r3, [r7, #80] @ 0x50
- return(result);
- 8013382: 6d3b ldr r3, [r7, #80] @ 0x50
- 8013384: 2b00 cmp r3, #0
- 8013386: d1e4 bne.n 8013352 <UART_RxISR_16BIT_FIFOEN+0x1f2>
- }
- }
- /* Check current reception Mode :
- If Reception till IDLE event has been selected : */
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- 8013388: 687b ldr r3, [r7, #4]
- 801338a: 6edb ldr r3, [r3, #108] @ 0x6c
- 801338c: 2b01 cmp r3, #1
- 801338e: d130 bne.n 80133f2 <UART_RxISR_16BIT_FIFOEN+0x292>
- {
- /* Set reception type to Standard */
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 8013390: 687b ldr r3, [r7, #4]
- 8013392: 2200 movs r2, #0
- 8013394: 66da str r2, [r3, #108] @ 0x6c
- /* Disable IDLE interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- 8013396: 687b ldr r3, [r7, #4]
- 8013398: 681b ldr r3, [r3, #0]
- 801339a: 63bb str r3, [r7, #56] @ 0x38
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 801339c: 6bbb ldr r3, [r7, #56] @ 0x38
- 801339e: e853 3f00 ldrex r3, [r3]
- 80133a2: 637b str r3, [r7, #52] @ 0x34
- return(result);
- 80133a4: 6b7b ldr r3, [r7, #52] @ 0x34
- 80133a6: f023 0310 bic.w r3, r3, #16
- 80133aa: f8c7 3090 str.w r3, [r7, #144] @ 0x90
- 80133ae: 687b ldr r3, [r7, #4]
- 80133b0: 681b ldr r3, [r3, #0]
- 80133b2: 461a mov r2, r3
- 80133b4: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
- 80133b8: 647b str r3, [r7, #68] @ 0x44
- 80133ba: 643a str r2, [r7, #64] @ 0x40
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 80133bc: 6c39 ldr r1, [r7, #64] @ 0x40
- 80133be: 6c7a ldr r2, [r7, #68] @ 0x44
- 80133c0: e841 2300 strex r3, r2, [r1]
- 80133c4: 63fb str r3, [r7, #60] @ 0x3c
- return(result);
- 80133c6: 6bfb ldr r3, [r7, #60] @ 0x3c
- 80133c8: 2b00 cmp r3, #0
- 80133ca: d1e4 bne.n 8013396 <UART_RxISR_16BIT_FIFOEN+0x236>
- if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
- 80133cc: 687b ldr r3, [r7, #4]
- 80133ce: 681b ldr r3, [r3, #0]
- 80133d0: 69db ldr r3, [r3, #28]
- 80133d2: f003 0310 and.w r3, r3, #16
- 80133d6: 2b10 cmp r3, #16
- 80133d8: d103 bne.n 80133e2 <UART_RxISR_16BIT_FIFOEN+0x282>
- {
- /* Clear IDLE Flag */
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
- 80133da: 687b ldr r3, [r7, #4]
- 80133dc: 681b ldr r3, [r3, #0]
- 80133de: 2210 movs r2, #16
- 80133e0: 621a str r2, [r3, #32]
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx Event callback*/
- huart->RxEventCallback(huart, huart->RxXferSize);
- #else
- /*Call legacy weak Rx Event callback*/
- HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
- 80133e2: 687b ldr r3, [r7, #4]
- 80133e4: f8b3 305c ldrh.w r3, [r3, #92] @ 0x5c
- 80133e8: 4619 mov r1, r3
- 80133ea: 6878 ldr r0, [r7, #4]
- 80133ec: f7f1 f822 bl 8004434 <HAL_UARTEx_RxEventCallback>
- 80133f0: e002 b.n 80133f8 <UART_RxISR_16BIT_FIFOEN+0x298>
- #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx complete callback*/
- huart->RxCpltCallback(huart);
- #else
- /*Call legacy weak Rx complete callback*/
- HAL_UART_RxCpltCallback(huart);
- 80133f2: 6878 ldr r0, [r7, #4]
- 80133f4: f7f1 f814 bl 8004420 <HAL_UART_RxCpltCallback>
- while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
- 80133f8: f8b7 30a6 ldrh.w r3, [r7, #166] @ 0xa6
- 80133fc: 2b00 cmp r3, #0
- 80133fe: d006 beq.n 801340e <UART_RxISR_16BIT_FIFOEN+0x2ae>
- 8013400: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
- 8013404: f003 0320 and.w r3, r3, #32
- 8013408: 2b00 cmp r3, #0
- 801340a: f47f aecd bne.w 80131a8 <UART_RxISR_16BIT_FIFOEN+0x48>
- /* When remaining number of bytes to receive is less than the RX FIFO
- threshold, next incoming frames are processed as if FIFO mode was
- disabled (i.e. one interrupt per received frame).
- */
- rxdatacount = huart->RxXferCount;
- 801340e: 687b ldr r3, [r7, #4]
- 8013410: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
- 8013414: f8a7 308e strh.w r3, [r7, #142] @ 0x8e
- if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
- 8013418: f8b7 308e ldrh.w r3, [r7, #142] @ 0x8e
- 801341c: 2b00 cmp r3, #0
- 801341e: d049 beq.n 80134b4 <UART_RxISR_16BIT_FIFOEN+0x354>
- 8013420: 687b ldr r3, [r7, #4]
- 8013422: f8b3 3068 ldrh.w r3, [r3, #104] @ 0x68
- 8013426: f8b7 208e ldrh.w r2, [r7, #142] @ 0x8e
- 801342a: 429a cmp r2, r3
- 801342c: d242 bcs.n 80134b4 <UART_RxISR_16BIT_FIFOEN+0x354>
- {
- /* Disable the UART RXFT interrupt*/
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
- 801342e: 687b ldr r3, [r7, #4]
- 8013430: 681b ldr r3, [r3, #0]
- 8013432: 3308 adds r3, #8
- 8013434: 627b str r3, [r7, #36] @ 0x24
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8013436: 6a7b ldr r3, [r7, #36] @ 0x24
- 8013438: e853 3f00 ldrex r3, [r3]
- 801343c: 623b str r3, [r7, #32]
- return(result);
- 801343e: 6a3b ldr r3, [r7, #32]
- 8013440: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
- 8013444: f8c7 3088 str.w r3, [r7, #136] @ 0x88
- 8013448: 687b ldr r3, [r7, #4]
- 801344a: 681b ldr r3, [r3, #0]
- 801344c: 3308 adds r3, #8
- 801344e: f8d7 2088 ldr.w r2, [r7, #136] @ 0x88
- 8013452: 633a str r2, [r7, #48] @ 0x30
- 8013454: 62fb str r3, [r7, #44] @ 0x2c
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8013456: 6af9 ldr r1, [r7, #44] @ 0x2c
- 8013458: 6b3a ldr r2, [r7, #48] @ 0x30
- 801345a: e841 2300 strex r3, r2, [r1]
- 801345e: 62bb str r3, [r7, #40] @ 0x28
- return(result);
- 8013460: 6abb ldr r3, [r7, #40] @ 0x28
- 8013462: 2b00 cmp r3, #0
- 8013464: d1e3 bne.n 801342e <UART_RxISR_16BIT_FIFOEN+0x2ce>
- /* Update the RxISR function pointer */
- huart->RxISR = UART_RxISR_16BIT;
- 8013466: 687b ldr r3, [r7, #4]
- 8013468: 4a16 ldr r2, [pc, #88] @ (80134c4 <UART_RxISR_16BIT_FIFOEN+0x364>)
- 801346a: 675a str r2, [r3, #116] @ 0x74
- /* Enable the UART Data Register Not Empty interrupt */
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
- 801346c: 687b ldr r3, [r7, #4]
- 801346e: 681b ldr r3, [r3, #0]
- 8013470: 613b str r3, [r7, #16]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 8013472: 693b ldr r3, [r7, #16]
- 8013474: e853 3f00 ldrex r3, [r3]
- 8013478: 60fb str r3, [r7, #12]
- return(result);
- 801347a: 68fb ldr r3, [r7, #12]
- 801347c: f043 0320 orr.w r3, r3, #32
- 8013480: f8c7 3084 str.w r3, [r7, #132] @ 0x84
- 8013484: 687b ldr r3, [r7, #4]
- 8013486: 681b ldr r3, [r3, #0]
- 8013488: 461a mov r2, r3
- 801348a: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
- 801348e: 61fb str r3, [r7, #28]
- 8013490: 61ba str r2, [r7, #24]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 8013492: 69b9 ldr r1, [r7, #24]
- 8013494: 69fa ldr r2, [r7, #28]
- 8013496: e841 2300 strex r3, r2, [r1]
- 801349a: 617b str r3, [r7, #20]
- return(result);
- 801349c: 697b ldr r3, [r7, #20]
- 801349e: 2b00 cmp r3, #0
- 80134a0: d1e4 bne.n 801346c <UART_RxISR_16BIT_FIFOEN+0x30c>
- else
- {
- /* Clear RXNE interrupt flag */
- __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
- }
- }
- 80134a2: e007 b.n 80134b4 <UART_RxISR_16BIT_FIFOEN+0x354>
- __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
- 80134a4: 687b ldr r3, [r7, #4]
- 80134a6: 681b ldr r3, [r3, #0]
- 80134a8: 699a ldr r2, [r3, #24]
- 80134aa: 687b ldr r3, [r7, #4]
- 80134ac: 681b ldr r3, [r3, #0]
- 80134ae: f042 0208 orr.w r2, r2, #8
- 80134b2: 619a str r2, [r3, #24]
- }
- 80134b4: bf00 nop
- 80134b6: 37b8 adds r7, #184 @ 0xb8
- 80134b8: 46bd mov sp, r7
- 80134ba: bd80 pop {r7, pc}
- 80134bc: effffffe .word 0xeffffffe
- 80134c0: 58000c00 .word 0x58000c00
- 80134c4: 08012c49 .word 0x08012c49
- 080134c8 <HAL_UARTEx_WakeupCallback>:
- * @brief UART wakeup from Stop mode callback.
- * @param huart UART handle.
- * @retval None
- */
- __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
- {
- 80134c8: b480 push {r7}
- 80134ca: b083 sub sp, #12
- 80134cc: af00 add r7, sp, #0
- 80134ce: 6078 str r0, [r7, #4]
- UNUSED(huart);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_UARTEx_WakeupCallback can be implemented in the user file.
- */
- }
- 80134d0: bf00 nop
- 80134d2: 370c adds r7, #12
- 80134d4: 46bd mov sp, r7
- 80134d6: f85d 7b04 ldr.w r7, [sp], #4
- 80134da: 4770 bx lr
- 080134dc <HAL_UARTEx_RxFifoFullCallback>:
- * @brief UART RX Fifo full callback.
- * @param huart UART handle.
- * @retval None
- */
- __weak void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart)
- {
- 80134dc: b480 push {r7}
- 80134de: b083 sub sp, #12
- 80134e0: af00 add r7, sp, #0
- 80134e2: 6078 str r0, [r7, #4]
- UNUSED(huart);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_UARTEx_RxFifoFullCallback can be implemented in the user file.
- */
- }
- 80134e4: bf00 nop
- 80134e6: 370c adds r7, #12
- 80134e8: 46bd mov sp, r7
- 80134ea: f85d 7b04 ldr.w r7, [sp], #4
- 80134ee: 4770 bx lr
- 080134f0 <HAL_UARTEx_TxFifoEmptyCallback>:
- * @brief UART TX Fifo empty callback.
- * @param huart UART handle.
- * @retval None
- */
- __weak void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart)
- {
- 80134f0: b480 push {r7}
- 80134f2: b083 sub sp, #12
- 80134f4: af00 add r7, sp, #0
- 80134f6: 6078 str r0, [r7, #4]
- UNUSED(huart);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_UARTEx_TxFifoEmptyCallback can be implemented in the user file.
- */
- }
- 80134f8: bf00 nop
- 80134fa: 370c adds r7, #12
- 80134fc: 46bd mov sp, r7
- 80134fe: f85d 7b04 ldr.w r7, [sp], #4
- 8013502: 4770 bx lr
- 08013504 <HAL_UARTEx_DisableFifoMode>:
- * @brief Disable the FIFO mode.
- * @param huart UART handle.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart)
- {
- 8013504: b480 push {r7}
- 8013506: b085 sub sp, #20
- 8013508: af00 add r7, sp, #0
- 801350a: 6078 str r0, [r7, #4]
- /* Check parameters */
- assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
- /* Process Locked */
- __HAL_LOCK(huart);
- 801350c: 687b ldr r3, [r7, #4]
- 801350e: f893 3084 ldrb.w r3, [r3, #132] @ 0x84
- 8013512: 2b01 cmp r3, #1
- 8013514: d101 bne.n 801351a <HAL_UARTEx_DisableFifoMode+0x16>
- 8013516: 2302 movs r3, #2
- 8013518: e027 b.n 801356a <HAL_UARTEx_DisableFifoMode+0x66>
- 801351a: 687b ldr r3, [r7, #4]
- 801351c: 2201 movs r2, #1
- 801351e: f883 2084 strb.w r2, [r3, #132] @ 0x84
- huart->gState = HAL_UART_STATE_BUSY;
- 8013522: 687b ldr r3, [r7, #4]
- 8013524: 2224 movs r2, #36 @ 0x24
- 8013526: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- /* Save actual UART configuration */
- tmpcr1 = READ_REG(huart->Instance->CR1);
- 801352a: 687b ldr r3, [r7, #4]
- 801352c: 681b ldr r3, [r3, #0]
- 801352e: 681b ldr r3, [r3, #0]
- 8013530: 60fb str r3, [r7, #12]
- /* Disable UART */
- __HAL_UART_DISABLE(huart);
- 8013532: 687b ldr r3, [r7, #4]
- 8013534: 681b ldr r3, [r3, #0]
- 8013536: 681a ldr r2, [r3, #0]
- 8013538: 687b ldr r3, [r7, #4]
- 801353a: 681b ldr r3, [r3, #0]
- 801353c: f022 0201 bic.w r2, r2, #1
- 8013540: 601a str r2, [r3, #0]
- /* Enable FIFO mode */
- CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN);
- 8013542: 68fb ldr r3, [r7, #12]
- 8013544: f023 5300 bic.w r3, r3, #536870912 @ 0x20000000
- 8013548: 60fb str r3, [r7, #12]
- huart->FifoMode = UART_FIFOMODE_DISABLE;
- 801354a: 687b ldr r3, [r7, #4]
- 801354c: 2200 movs r2, #0
- 801354e: 665a str r2, [r3, #100] @ 0x64
- /* Restore UART configuration */
- WRITE_REG(huart->Instance->CR1, tmpcr1);
- 8013550: 687b ldr r3, [r7, #4]
- 8013552: 681b ldr r3, [r3, #0]
- 8013554: 68fa ldr r2, [r7, #12]
- 8013556: 601a str r2, [r3, #0]
- huart->gState = HAL_UART_STATE_READY;
- 8013558: 687b ldr r3, [r7, #4]
- 801355a: 2220 movs r2, #32
- 801355c: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 8013560: 687b ldr r3, [r7, #4]
- 8013562: 2200 movs r2, #0
- 8013564: f883 2084 strb.w r2, [r3, #132] @ 0x84
- return HAL_OK;
- 8013568: 2300 movs r3, #0
- }
- 801356a: 4618 mov r0, r3
- 801356c: 3714 adds r7, #20
- 801356e: 46bd mov sp, r7
- 8013570: f85d 7b04 ldr.w r7, [sp], #4
- 8013574: 4770 bx lr
- 08013576 <HAL_UARTEx_SetTxFifoThreshold>:
- * @arg @ref UART_TXFIFO_THRESHOLD_7_8
- * @arg @ref UART_TXFIFO_THRESHOLD_8_8
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
- {
- 8013576: b580 push {r7, lr}
- 8013578: b084 sub sp, #16
- 801357a: af00 add r7, sp, #0
- 801357c: 6078 str r0, [r7, #4]
- 801357e: 6039 str r1, [r7, #0]
- /* Check parameters */
- assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
- assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold));
- /* Process Locked */
- __HAL_LOCK(huart);
- 8013580: 687b ldr r3, [r7, #4]
- 8013582: f893 3084 ldrb.w r3, [r3, #132] @ 0x84
- 8013586: 2b01 cmp r3, #1
- 8013588: d101 bne.n 801358e <HAL_UARTEx_SetTxFifoThreshold+0x18>
- 801358a: 2302 movs r3, #2
- 801358c: e02d b.n 80135ea <HAL_UARTEx_SetTxFifoThreshold+0x74>
- 801358e: 687b ldr r3, [r7, #4]
- 8013590: 2201 movs r2, #1
- 8013592: f883 2084 strb.w r2, [r3, #132] @ 0x84
- huart->gState = HAL_UART_STATE_BUSY;
- 8013596: 687b ldr r3, [r7, #4]
- 8013598: 2224 movs r2, #36 @ 0x24
- 801359a: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- /* Save actual UART configuration */
- tmpcr1 = READ_REG(huart->Instance->CR1);
- 801359e: 687b ldr r3, [r7, #4]
- 80135a0: 681b ldr r3, [r3, #0]
- 80135a2: 681b ldr r3, [r3, #0]
- 80135a4: 60fb str r3, [r7, #12]
- /* Disable UART */
- __HAL_UART_DISABLE(huart);
- 80135a6: 687b ldr r3, [r7, #4]
- 80135a8: 681b ldr r3, [r3, #0]
- 80135aa: 681a ldr r2, [r3, #0]
- 80135ac: 687b ldr r3, [r7, #4]
- 80135ae: 681b ldr r3, [r3, #0]
- 80135b0: f022 0201 bic.w r2, r2, #1
- 80135b4: 601a str r2, [r3, #0]
- /* Update TX threshold configuration */
- MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold);
- 80135b6: 687b ldr r3, [r7, #4]
- 80135b8: 681b ldr r3, [r3, #0]
- 80135ba: 689b ldr r3, [r3, #8]
- 80135bc: f023 4160 bic.w r1, r3, #3758096384 @ 0xe0000000
- 80135c0: 687b ldr r3, [r7, #4]
- 80135c2: 681b ldr r3, [r3, #0]
- 80135c4: 683a ldr r2, [r7, #0]
- 80135c6: 430a orrs r2, r1
- 80135c8: 609a str r2, [r3, #8]
- /* Determine the number of data to process during RX/TX ISR execution */
- UARTEx_SetNbDataToProcess(huart);
- 80135ca: 6878 ldr r0, [r7, #4]
- 80135cc: f000 f8a0 bl 8013710 <UARTEx_SetNbDataToProcess>
- /* Restore UART configuration */
- WRITE_REG(huart->Instance->CR1, tmpcr1);
- 80135d0: 687b ldr r3, [r7, #4]
- 80135d2: 681b ldr r3, [r3, #0]
- 80135d4: 68fa ldr r2, [r7, #12]
- 80135d6: 601a str r2, [r3, #0]
- huart->gState = HAL_UART_STATE_READY;
- 80135d8: 687b ldr r3, [r7, #4]
- 80135da: 2220 movs r2, #32
- 80135dc: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 80135e0: 687b ldr r3, [r7, #4]
- 80135e2: 2200 movs r2, #0
- 80135e4: f883 2084 strb.w r2, [r3, #132] @ 0x84
- return HAL_OK;
- 80135e8: 2300 movs r3, #0
- }
- 80135ea: 4618 mov r0, r3
- 80135ec: 3710 adds r7, #16
- 80135ee: 46bd mov sp, r7
- 80135f0: bd80 pop {r7, pc}
- 080135f2 <HAL_UARTEx_SetRxFifoThreshold>:
- * @arg @ref UART_RXFIFO_THRESHOLD_7_8
- * @arg @ref UART_RXFIFO_THRESHOLD_8_8
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
- {
- 80135f2: b580 push {r7, lr}
- 80135f4: b084 sub sp, #16
- 80135f6: af00 add r7, sp, #0
- 80135f8: 6078 str r0, [r7, #4]
- 80135fa: 6039 str r1, [r7, #0]
- /* Check the parameters */
- assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
- assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold));
- /* Process Locked */
- __HAL_LOCK(huart);
- 80135fc: 687b ldr r3, [r7, #4]
- 80135fe: f893 3084 ldrb.w r3, [r3, #132] @ 0x84
- 8013602: 2b01 cmp r3, #1
- 8013604: d101 bne.n 801360a <HAL_UARTEx_SetRxFifoThreshold+0x18>
- 8013606: 2302 movs r3, #2
- 8013608: e02d b.n 8013666 <HAL_UARTEx_SetRxFifoThreshold+0x74>
- 801360a: 687b ldr r3, [r7, #4]
- 801360c: 2201 movs r2, #1
- 801360e: f883 2084 strb.w r2, [r3, #132] @ 0x84
- huart->gState = HAL_UART_STATE_BUSY;
- 8013612: 687b ldr r3, [r7, #4]
- 8013614: 2224 movs r2, #36 @ 0x24
- 8013616: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- /* Save actual UART configuration */
- tmpcr1 = READ_REG(huart->Instance->CR1);
- 801361a: 687b ldr r3, [r7, #4]
- 801361c: 681b ldr r3, [r3, #0]
- 801361e: 681b ldr r3, [r3, #0]
- 8013620: 60fb str r3, [r7, #12]
- /* Disable UART */
- __HAL_UART_DISABLE(huart);
- 8013622: 687b ldr r3, [r7, #4]
- 8013624: 681b ldr r3, [r3, #0]
- 8013626: 681a ldr r2, [r3, #0]
- 8013628: 687b ldr r3, [r7, #4]
- 801362a: 681b ldr r3, [r3, #0]
- 801362c: f022 0201 bic.w r2, r2, #1
- 8013630: 601a str r2, [r3, #0]
- /* Update RX threshold configuration */
- MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold);
- 8013632: 687b ldr r3, [r7, #4]
- 8013634: 681b ldr r3, [r3, #0]
- 8013636: 689b ldr r3, [r3, #8]
- 8013638: f023 6160 bic.w r1, r3, #234881024 @ 0xe000000
- 801363c: 687b ldr r3, [r7, #4]
- 801363e: 681b ldr r3, [r3, #0]
- 8013640: 683a ldr r2, [r7, #0]
- 8013642: 430a orrs r2, r1
- 8013644: 609a str r2, [r3, #8]
- /* Determine the number of data to process during RX/TX ISR execution */
- UARTEx_SetNbDataToProcess(huart);
- 8013646: 6878 ldr r0, [r7, #4]
- 8013648: f000 f862 bl 8013710 <UARTEx_SetNbDataToProcess>
- /* Restore UART configuration */
- WRITE_REG(huart->Instance->CR1, tmpcr1);
- 801364c: 687b ldr r3, [r7, #4]
- 801364e: 681b ldr r3, [r3, #0]
- 8013650: 68fa ldr r2, [r7, #12]
- 8013652: 601a str r2, [r3, #0]
- huart->gState = HAL_UART_STATE_READY;
- 8013654: 687b ldr r3, [r7, #4]
- 8013656: 2220 movs r2, #32
- 8013658: f8c3 2088 str.w r2, [r3, #136] @ 0x88
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 801365c: 687b ldr r3, [r7, #4]
- 801365e: 2200 movs r2, #0
- 8013660: f883 2084 strb.w r2, [r3, #132] @ 0x84
- return HAL_OK;
- 8013664: 2300 movs r3, #0
- }
- 8013666: 4618 mov r0, r3
- 8013668: 3710 adds r7, #16
- 801366a: 46bd mov sp, r7
- 801366c: bd80 pop {r7, pc}
- 0801366e <HAL_UARTEx_ReceiveToIdle_IT>:
- * @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
- * @param Size Amount of data elements (uint8_t or uint16_t) to be received.
- * @retval HAL status
- */
- HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
- {
- 801366e: b580 push {r7, lr}
- 8013670: b08c sub sp, #48 @ 0x30
- 8013672: af00 add r7, sp, #0
- 8013674: 60f8 str r0, [r7, #12]
- 8013676: 60b9 str r1, [r7, #8]
- 8013678: 4613 mov r3, r2
- 801367a: 80fb strh r3, [r7, #6]
- HAL_StatusTypeDef status = HAL_OK;
- 801367c: 2300 movs r3, #0
- 801367e: f887 302f strb.w r3, [r7, #47] @ 0x2f
- /* Check that a Rx process is not already ongoing */
- if (huart->RxState == HAL_UART_STATE_READY)
- 8013682: 68fb ldr r3, [r7, #12]
- 8013684: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
- 8013688: 2b20 cmp r3, #32
- 801368a: d13b bne.n 8013704 <HAL_UARTEx_ReceiveToIdle_IT+0x96>
- {
- if ((pData == NULL) || (Size == 0U))
- 801368c: 68bb ldr r3, [r7, #8]
- 801368e: 2b00 cmp r3, #0
- 8013690: d002 beq.n 8013698 <HAL_UARTEx_ReceiveToIdle_IT+0x2a>
- 8013692: 88fb ldrh r3, [r7, #6]
- 8013694: 2b00 cmp r3, #0
- 8013696: d101 bne.n 801369c <HAL_UARTEx_ReceiveToIdle_IT+0x2e>
- {
- return HAL_ERROR;
- 8013698: 2301 movs r3, #1
- 801369a: e034 b.n 8013706 <HAL_UARTEx_ReceiveToIdle_IT+0x98>
- }
- /* Set Reception type to reception till IDLE Event*/
- huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
- 801369c: 68fb ldr r3, [r7, #12]
- 801369e: 2201 movs r2, #1
- 80136a0: 66da str r2, [r3, #108] @ 0x6c
- huart->RxEventType = HAL_UART_RXEVENT_TC;
- 80136a2: 68fb ldr r3, [r7, #12]
- 80136a4: 2200 movs r2, #0
- 80136a6: 671a str r2, [r3, #112] @ 0x70
- (void)UART_Start_Receive_IT(huart, pData, Size);
- 80136a8: 88fb ldrh r3, [r7, #6]
- 80136aa: 461a mov r2, r3
- 80136ac: 68b9 ldr r1, [r7, #8]
- 80136ae: 68f8 ldr r0, [r7, #12]
- 80136b0: f7fe fe82 bl 80123b8 <UART_Start_Receive_IT>
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- 80136b4: 68fb ldr r3, [r7, #12]
- 80136b6: 6edb ldr r3, [r3, #108] @ 0x6c
- 80136b8: 2b01 cmp r3, #1
- 80136ba: d11d bne.n 80136f8 <HAL_UARTEx_ReceiveToIdle_IT+0x8a>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
- 80136bc: 68fb ldr r3, [r7, #12]
- 80136be: 681b ldr r3, [r3, #0]
- 80136c0: 2210 movs r2, #16
- 80136c2: 621a str r2, [r3, #32]
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- 80136c4: 68fb ldr r3, [r7, #12]
- 80136c6: 681b ldr r3, [r3, #0]
- 80136c8: 61bb str r3, [r7, #24]
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 80136ca: 69bb ldr r3, [r7, #24]
- 80136cc: e853 3f00 ldrex r3, [r3]
- 80136d0: 617b str r3, [r7, #20]
- return(result);
- 80136d2: 697b ldr r3, [r7, #20]
- 80136d4: f043 0310 orr.w r3, r3, #16
- 80136d8: 62bb str r3, [r7, #40] @ 0x28
- 80136da: 68fb ldr r3, [r7, #12]
- 80136dc: 681b ldr r3, [r3, #0]
- 80136de: 461a mov r2, r3
- 80136e0: 6abb ldr r3, [r7, #40] @ 0x28
- 80136e2: 627b str r3, [r7, #36] @ 0x24
- 80136e4: 623a str r2, [r7, #32]
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 80136e6: 6a39 ldr r1, [r7, #32]
- 80136e8: 6a7a ldr r2, [r7, #36] @ 0x24
- 80136ea: e841 2300 strex r3, r2, [r1]
- 80136ee: 61fb str r3, [r7, #28]
- return(result);
- 80136f0: 69fb ldr r3, [r7, #28]
- 80136f2: 2b00 cmp r3, #0
- 80136f4: d1e6 bne.n 80136c4 <HAL_UARTEx_ReceiveToIdle_IT+0x56>
- 80136f6: e002 b.n 80136fe <HAL_UARTEx_ReceiveToIdle_IT+0x90>
- {
- /* In case of errors already pending when reception is started,
- Interrupts may have already been raised and lead to reception abortion.
- (Overrun error for instance).
- In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
- status = HAL_ERROR;
- 80136f8: 2301 movs r3, #1
- 80136fa: f887 302f strb.w r3, [r7, #47] @ 0x2f
- }
- return status;
- 80136fe: f897 302f ldrb.w r3, [r7, #47] @ 0x2f
- 8013702: e000 b.n 8013706 <HAL_UARTEx_ReceiveToIdle_IT+0x98>
- }
- else
- {
- return HAL_BUSY;
- 8013704: 2302 movs r3, #2
- }
- }
- 8013706: 4618 mov r0, r3
- 8013708: 3730 adds r7, #48 @ 0x30
- 801370a: 46bd mov sp, r7
- 801370c: bd80 pop {r7, pc}
- ...
- 08013710 <UARTEx_SetNbDataToProcess>:
- * the UART configuration registers.
- * @param huart UART handle.
- * @retval None
- */
- static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart)
- {
- 8013710: b480 push {r7}
- 8013712: b085 sub sp, #20
- 8013714: af00 add r7, sp, #0
- 8013716: 6078 str r0, [r7, #4]
- uint8_t rx_fifo_threshold;
- uint8_t tx_fifo_threshold;
- static const uint8_t numerator[] = {1U, 1U, 1U, 3U, 7U, 1U, 0U, 0U};
- static const uint8_t denominator[] = {8U, 4U, 2U, 4U, 8U, 1U, 1U, 1U};
- if (huart->FifoMode == UART_FIFOMODE_DISABLE)
- 8013718: 687b ldr r3, [r7, #4]
- 801371a: 6e5b ldr r3, [r3, #100] @ 0x64
- 801371c: 2b00 cmp r3, #0
- 801371e: d108 bne.n 8013732 <UARTEx_SetNbDataToProcess+0x22>
- {
- huart->NbTxDataToProcess = 1U;
- 8013720: 687b ldr r3, [r7, #4]
- 8013722: 2201 movs r2, #1
- 8013724: f8a3 206a strh.w r2, [r3, #106] @ 0x6a
- huart->NbRxDataToProcess = 1U;
- 8013728: 687b ldr r3, [r7, #4]
- 801372a: 2201 movs r2, #1
- 801372c: f8a3 2068 strh.w r2, [r3, #104] @ 0x68
- huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
- (uint16_t)denominator[tx_fifo_threshold];
- huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
- (uint16_t)denominator[rx_fifo_threshold];
- }
- }
- 8013730: e031 b.n 8013796 <UARTEx_SetNbDataToProcess+0x86>
- rx_fifo_depth = RX_FIFO_DEPTH;
- 8013732: 2310 movs r3, #16
- 8013734: 73fb strb r3, [r7, #15]
- tx_fifo_depth = TX_FIFO_DEPTH;
- 8013736: 2310 movs r3, #16
- 8013738: 73bb strb r3, [r7, #14]
- rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
- 801373a: 687b ldr r3, [r7, #4]
- 801373c: 681b ldr r3, [r3, #0]
- 801373e: 689b ldr r3, [r3, #8]
- 8013740: 0e5b lsrs r3, r3, #25
- 8013742: b2db uxtb r3, r3
- 8013744: f003 0307 and.w r3, r3, #7
- 8013748: 737b strb r3, [r7, #13]
- tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
- 801374a: 687b ldr r3, [r7, #4]
- 801374c: 681b ldr r3, [r3, #0]
- 801374e: 689b ldr r3, [r3, #8]
- 8013750: 0f5b lsrs r3, r3, #29
- 8013752: b2db uxtb r3, r3
- 8013754: f003 0307 and.w r3, r3, #7
- 8013758: 733b strb r3, [r7, #12]
- huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
- 801375a: 7bbb ldrb r3, [r7, #14]
- 801375c: 7b3a ldrb r2, [r7, #12]
- 801375e: 4911 ldr r1, [pc, #68] @ (80137a4 <UARTEx_SetNbDataToProcess+0x94>)
- 8013760: 5c8a ldrb r2, [r1, r2]
- 8013762: fb02 f303 mul.w r3, r2, r3
- (uint16_t)denominator[tx_fifo_threshold];
- 8013766: 7b3a ldrb r2, [r7, #12]
- 8013768: 490f ldr r1, [pc, #60] @ (80137a8 <UARTEx_SetNbDataToProcess+0x98>)
- 801376a: 5c8a ldrb r2, [r1, r2]
- huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
- 801376c: fb93 f3f2 sdiv r3, r3, r2
- 8013770: b29a uxth r2, r3
- 8013772: 687b ldr r3, [r7, #4]
- 8013774: f8a3 206a strh.w r2, [r3, #106] @ 0x6a
- huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
- 8013778: 7bfb ldrb r3, [r7, #15]
- 801377a: 7b7a ldrb r2, [r7, #13]
- 801377c: 4909 ldr r1, [pc, #36] @ (80137a4 <UARTEx_SetNbDataToProcess+0x94>)
- 801377e: 5c8a ldrb r2, [r1, r2]
- 8013780: fb02 f303 mul.w r3, r2, r3
- (uint16_t)denominator[rx_fifo_threshold];
- 8013784: 7b7a ldrb r2, [r7, #13]
- 8013786: 4908 ldr r1, [pc, #32] @ (80137a8 <UARTEx_SetNbDataToProcess+0x98>)
- 8013788: 5c8a ldrb r2, [r1, r2]
- huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
- 801378a: fb93 f3f2 sdiv r3, r3, r2
- 801378e: b29a uxth r2, r3
- 8013790: 687b ldr r3, [r7, #4]
- 8013792: f8a3 2068 strh.w r2, [r3, #104] @ 0x68
- }
- 8013796: bf00 nop
- 8013798: 3714 adds r7, #20
- 801379a: 46bd mov sp, r7
- 801379c: f85d 7b04 ldr.w r7, [sp], #4
- 80137a0: 4770 bx lr
- 80137a2: bf00 nop
- 80137a4: 08018c48 .word 0x08018c48
- 80137a8: 08018c50 .word 0x08018c50
- 080137ac <__NVIC_SetPriority>:
- {
- 80137ac: b480 push {r7}
- 80137ae: b083 sub sp, #12
- 80137b0: af00 add r7, sp, #0
- 80137b2: 4603 mov r3, r0
- 80137b4: 6039 str r1, [r7, #0]
- 80137b6: 80fb strh r3, [r7, #6]
- if ((int32_t)(IRQn) >= 0)
- 80137b8: f9b7 3006 ldrsh.w r3, [r7, #6]
- 80137bc: 2b00 cmp r3, #0
- 80137be: db0a blt.n 80137d6 <__NVIC_SetPriority+0x2a>
- NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 80137c0: 683b ldr r3, [r7, #0]
- 80137c2: b2da uxtb r2, r3
- 80137c4: 490c ldr r1, [pc, #48] @ (80137f8 <__NVIC_SetPriority+0x4c>)
- 80137c6: f9b7 3006 ldrsh.w r3, [r7, #6]
- 80137ca: 0112 lsls r2, r2, #4
- 80137cc: b2d2 uxtb r2, r2
- 80137ce: 440b add r3, r1
- 80137d0: f883 2300 strb.w r2, [r3, #768] @ 0x300
- }
- 80137d4: e00a b.n 80137ec <__NVIC_SetPriority+0x40>
- SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 80137d6: 683b ldr r3, [r7, #0]
- 80137d8: b2da uxtb r2, r3
- 80137da: 4908 ldr r1, [pc, #32] @ (80137fc <__NVIC_SetPriority+0x50>)
- 80137dc: 88fb ldrh r3, [r7, #6]
- 80137de: f003 030f and.w r3, r3, #15
- 80137e2: 3b04 subs r3, #4
- 80137e4: 0112 lsls r2, r2, #4
- 80137e6: b2d2 uxtb r2, r2
- 80137e8: 440b add r3, r1
- 80137ea: 761a strb r2, [r3, #24]
- }
- 80137ec: bf00 nop
- 80137ee: 370c adds r7, #12
- 80137f0: 46bd mov sp, r7
- 80137f2: f85d 7b04 ldr.w r7, [sp], #4
- 80137f6: 4770 bx lr
- 80137f8: e000e100 .word 0xe000e100
- 80137fc: e000ed00 .word 0xe000ed00
- 08013800 <SysTick_Handler>:
- /*
- SysTick handler implementation that also clears overflow flag.
- */
- #if (USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION == 0)
- void SysTick_Handler (void) {
- 8013800: b580 push {r7, lr}
- 8013802: af00 add r7, sp, #0
- /* Clear overflow flag */
- SysTick->CTRL;
- 8013804: 4b05 ldr r3, [pc, #20] @ (801381c <SysTick_Handler+0x1c>)
- 8013806: 681b ldr r3, [r3, #0]
- if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
- 8013808: f002 fd1e bl 8016248 <xTaskGetSchedulerState>
- 801380c: 4603 mov r3, r0
- 801380e: 2b01 cmp r3, #1
- 8013810: d001 beq.n 8013816 <SysTick_Handler+0x16>
- /* Call tick handler */
- xPortSysTickHandler();
- 8013812: f003 ff31 bl 8017678 <xPortSysTickHandler>
- }
- }
- 8013816: bf00 nop
- 8013818: bd80 pop {r7, pc}
- 801381a: bf00 nop
- 801381c: e000e010 .word 0xe000e010
- 08013820 <SVC_Setup>:
- #endif /* SysTick */
- /*
- Setup SVC to reset value.
- */
- __STATIC_INLINE void SVC_Setup (void) {
- 8013820: b580 push {r7, lr}
- 8013822: af00 add r7, sp, #0
- #if (__ARM_ARCH_7A__ == 0U)
- /* Service Call interrupt might be configured before kernel start */
- /* and when its priority is lower or equal to BASEPRI, svc intruction */
- /* causes a Hard Fault. */
- NVIC_SetPriority (SVCall_IRQ_NBR, 0U);
- 8013824: 2100 movs r1, #0
- 8013826: f06f 0004 mvn.w r0, #4
- 801382a: f7ff ffbf bl 80137ac <__NVIC_SetPriority>
- #endif
- }
- 801382e: bf00 nop
- 8013830: bd80 pop {r7, pc}
- ...
- 08013834 <osKernelInitialize>:
- static uint32_t OS_Tick_GetOverflow (void);
- /* Get OS Tick interval */
- static uint32_t OS_Tick_GetInterval (void);
- /*---------------------------------------------------------------------------*/
- osStatus_t osKernelInitialize (void) {
- 8013834: b480 push {r7}
- 8013836: b083 sub sp, #12
- 8013838: af00 add r7, sp, #0
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- 801383a: f3ef 8305 mrs r3, IPSR
- 801383e: 603b str r3, [r7, #0]
- return(result);
- 8013840: 683b ldr r3, [r7, #0]
- osStatus_t stat;
- if (IS_IRQ()) {
- 8013842: 2b00 cmp r3, #0
- 8013844: d003 beq.n 801384e <osKernelInitialize+0x1a>
- stat = osErrorISR;
- 8013846: f06f 0305 mvn.w r3, #5
- 801384a: 607b str r3, [r7, #4]
- 801384c: e00c b.n 8013868 <osKernelInitialize+0x34>
- }
- else {
- if (KernelState == osKernelInactive) {
- 801384e: 4b0a ldr r3, [pc, #40] @ (8013878 <osKernelInitialize+0x44>)
- 8013850: 681b ldr r3, [r3, #0]
- 8013852: 2b00 cmp r3, #0
- 8013854: d105 bne.n 8013862 <osKernelInitialize+0x2e>
- EvrFreeRTOSSetup(0U);
- #endif
- #if defined(USE_FreeRTOS_HEAP_5) && (HEAP_5_REGION_SETUP == 1)
- vPortDefineHeapRegions (configHEAP_5_REGIONS);
- #endif
- KernelState = osKernelReady;
- 8013856: 4b08 ldr r3, [pc, #32] @ (8013878 <osKernelInitialize+0x44>)
- 8013858: 2201 movs r2, #1
- 801385a: 601a str r2, [r3, #0]
- stat = osOK;
- 801385c: 2300 movs r3, #0
- 801385e: 607b str r3, [r7, #4]
- 8013860: e002 b.n 8013868 <osKernelInitialize+0x34>
- } else {
- stat = osError;
- 8013862: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 8013866: 607b str r3, [r7, #4]
- }
- }
- return (stat);
- 8013868: 687b ldr r3, [r7, #4]
- }
- 801386a: 4618 mov r0, r3
- 801386c: 370c adds r7, #12
- 801386e: 46bd mov sp, r7
- 8013870: f85d 7b04 ldr.w r7, [sp], #4
- 8013874: 4770 bx lr
- 8013876: bf00 nop
- 8013878: 24000d00 .word 0x24000d00
- 0801387c <osKernelStart>:
- }
- return (state);
- }
- osStatus_t osKernelStart (void) {
- 801387c: b580 push {r7, lr}
- 801387e: b082 sub sp, #8
- 8013880: af00 add r7, sp, #0
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- 8013882: f3ef 8305 mrs r3, IPSR
- 8013886: 603b str r3, [r7, #0]
- return(result);
- 8013888: 683b ldr r3, [r7, #0]
- osStatus_t stat;
- if (IS_IRQ()) {
- 801388a: 2b00 cmp r3, #0
- 801388c: d003 beq.n 8013896 <osKernelStart+0x1a>
- stat = osErrorISR;
- 801388e: f06f 0305 mvn.w r3, #5
- 8013892: 607b str r3, [r7, #4]
- 8013894: e010 b.n 80138b8 <osKernelStart+0x3c>
- }
- else {
- if (KernelState == osKernelReady) {
- 8013896: 4b0b ldr r3, [pc, #44] @ (80138c4 <osKernelStart+0x48>)
- 8013898: 681b ldr r3, [r3, #0]
- 801389a: 2b01 cmp r3, #1
- 801389c: d109 bne.n 80138b2 <osKernelStart+0x36>
- /* Ensure SVC priority is at the reset value */
- SVC_Setup();
- 801389e: f7ff ffbf bl 8013820 <SVC_Setup>
- /* Change state to enable IRQ masking check */
- KernelState = osKernelRunning;
- 80138a2: 4b08 ldr r3, [pc, #32] @ (80138c4 <osKernelStart+0x48>)
- 80138a4: 2202 movs r2, #2
- 80138a6: 601a str r2, [r3, #0]
- /* Start the kernel scheduler */
- vTaskStartScheduler();
- 80138a8: f002 f824 bl 80158f4 <vTaskStartScheduler>
- stat = osOK;
- 80138ac: 2300 movs r3, #0
- 80138ae: 607b str r3, [r7, #4]
- 80138b0: e002 b.n 80138b8 <osKernelStart+0x3c>
- } else {
- stat = osError;
- 80138b2: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 80138b6: 607b str r3, [r7, #4]
- }
- }
- return (stat);
- 80138b8: 687b ldr r3, [r7, #4]
- }
- 80138ba: 4618 mov r0, r3
- 80138bc: 3708 adds r7, #8
- 80138be: 46bd mov sp, r7
- 80138c0: bd80 pop {r7, pc}
- 80138c2: bf00 nop
- 80138c4: 24000d00 .word 0x24000d00
- 080138c8 <osThreadNew>:
- return (configCPU_CLOCK_HZ);
- }
- /*---------------------------------------------------------------------------*/
- osThreadId_t osThreadNew (osThreadFunc_t func, void *argument, const osThreadAttr_t *attr) {
- 80138c8: b580 push {r7, lr}
- 80138ca: b08e sub sp, #56 @ 0x38
- 80138cc: af04 add r7, sp, #16
- 80138ce: 60f8 str r0, [r7, #12]
- 80138d0: 60b9 str r1, [r7, #8]
- 80138d2: 607a str r2, [r7, #4]
- uint32_t stack;
- TaskHandle_t hTask;
- UBaseType_t prio;
- int32_t mem;
- hTask = NULL;
- 80138d4: 2300 movs r3, #0
- 80138d6: 613b str r3, [r7, #16]
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- 80138d8: f3ef 8305 mrs r3, IPSR
- 80138dc: 617b str r3, [r7, #20]
- return(result);
- 80138de: 697b ldr r3, [r7, #20]
- if (!IS_IRQ() && (func != NULL)) {
- 80138e0: 2b00 cmp r3, #0
- 80138e2: d17f bne.n 80139e4 <osThreadNew+0x11c>
- 80138e4: 68fb ldr r3, [r7, #12]
- 80138e6: 2b00 cmp r3, #0
- 80138e8: d07c beq.n 80139e4 <osThreadNew+0x11c>
- stack = configMINIMAL_STACK_SIZE;
- 80138ea: f44f 7300 mov.w r3, #512 @ 0x200
- 80138ee: 623b str r3, [r7, #32]
- prio = (UBaseType_t)osPriorityNormal;
- 80138f0: 2318 movs r3, #24
- 80138f2: 61fb str r3, [r7, #28]
- name = NULL;
- 80138f4: 2300 movs r3, #0
- 80138f6: 627b str r3, [r7, #36] @ 0x24
- mem = -1;
- 80138f8: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 80138fc: 61bb str r3, [r7, #24]
- if (attr != NULL) {
- 80138fe: 687b ldr r3, [r7, #4]
- 8013900: 2b00 cmp r3, #0
- 8013902: d045 beq.n 8013990 <osThreadNew+0xc8>
- if (attr->name != NULL) {
- 8013904: 687b ldr r3, [r7, #4]
- 8013906: 681b ldr r3, [r3, #0]
- 8013908: 2b00 cmp r3, #0
- 801390a: d002 beq.n 8013912 <osThreadNew+0x4a>
- name = attr->name;
- 801390c: 687b ldr r3, [r7, #4]
- 801390e: 681b ldr r3, [r3, #0]
- 8013910: 627b str r3, [r7, #36] @ 0x24
- }
- if (attr->priority != osPriorityNone) {
- 8013912: 687b ldr r3, [r7, #4]
- 8013914: 699b ldr r3, [r3, #24]
- 8013916: 2b00 cmp r3, #0
- 8013918: d002 beq.n 8013920 <osThreadNew+0x58>
- prio = (UBaseType_t)attr->priority;
- 801391a: 687b ldr r3, [r7, #4]
- 801391c: 699b ldr r3, [r3, #24]
- 801391e: 61fb str r3, [r7, #28]
- }
- if ((prio < osPriorityIdle) || (prio > osPriorityISR) || ((attr->attr_bits & osThreadJoinable) == osThreadJoinable)) {
- 8013920: 69fb ldr r3, [r7, #28]
- 8013922: 2b00 cmp r3, #0
- 8013924: d008 beq.n 8013938 <osThreadNew+0x70>
- 8013926: 69fb ldr r3, [r7, #28]
- 8013928: 2b38 cmp r3, #56 @ 0x38
- 801392a: d805 bhi.n 8013938 <osThreadNew+0x70>
- 801392c: 687b ldr r3, [r7, #4]
- 801392e: 685b ldr r3, [r3, #4]
- 8013930: f003 0301 and.w r3, r3, #1
- 8013934: 2b00 cmp r3, #0
- 8013936: d001 beq.n 801393c <osThreadNew+0x74>
- return (NULL);
- 8013938: 2300 movs r3, #0
- 801393a: e054 b.n 80139e6 <osThreadNew+0x11e>
- }
- if (attr->stack_size > 0U) {
- 801393c: 687b ldr r3, [r7, #4]
- 801393e: 695b ldr r3, [r3, #20]
- 8013940: 2b00 cmp r3, #0
- 8013942: d003 beq.n 801394c <osThreadNew+0x84>
- /* In FreeRTOS stack is not in bytes, but in sizeof(StackType_t) which is 4 on ARM ports. */
- /* Stack size should be therefore 4 byte aligned in order to avoid division caused side effects */
- stack = attr->stack_size / sizeof(StackType_t);
- 8013944: 687b ldr r3, [r7, #4]
- 8013946: 695b ldr r3, [r3, #20]
- 8013948: 089b lsrs r3, r3, #2
- 801394a: 623b str r3, [r7, #32]
- }
- if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticTask_t)) &&
- 801394c: 687b ldr r3, [r7, #4]
- 801394e: 689b ldr r3, [r3, #8]
- 8013950: 2b00 cmp r3, #0
- 8013952: d00e beq.n 8013972 <osThreadNew+0xaa>
- 8013954: 687b ldr r3, [r7, #4]
- 8013956: 68db ldr r3, [r3, #12]
- 8013958: 2ba7 cmp r3, #167 @ 0xa7
- 801395a: d90a bls.n 8013972 <osThreadNew+0xaa>
- (attr->stack_mem != NULL) && (attr->stack_size > 0U)) {
- 801395c: 687b ldr r3, [r7, #4]
- 801395e: 691b ldr r3, [r3, #16]
- if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticTask_t)) &&
- 8013960: 2b00 cmp r3, #0
- 8013962: d006 beq.n 8013972 <osThreadNew+0xaa>
- (attr->stack_mem != NULL) && (attr->stack_size > 0U)) {
- 8013964: 687b ldr r3, [r7, #4]
- 8013966: 695b ldr r3, [r3, #20]
- 8013968: 2b00 cmp r3, #0
- 801396a: d002 beq.n 8013972 <osThreadNew+0xaa>
- mem = 1;
- 801396c: 2301 movs r3, #1
- 801396e: 61bb str r3, [r7, #24]
- 8013970: e010 b.n 8013994 <osThreadNew+0xcc>
- }
- else {
- if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) && (attr->stack_mem == NULL)) {
- 8013972: 687b ldr r3, [r7, #4]
- 8013974: 689b ldr r3, [r3, #8]
- 8013976: 2b00 cmp r3, #0
- 8013978: d10c bne.n 8013994 <osThreadNew+0xcc>
- 801397a: 687b ldr r3, [r7, #4]
- 801397c: 68db ldr r3, [r3, #12]
- 801397e: 2b00 cmp r3, #0
- 8013980: d108 bne.n 8013994 <osThreadNew+0xcc>
- 8013982: 687b ldr r3, [r7, #4]
- 8013984: 691b ldr r3, [r3, #16]
- 8013986: 2b00 cmp r3, #0
- 8013988: d104 bne.n 8013994 <osThreadNew+0xcc>
- mem = 0;
- 801398a: 2300 movs r3, #0
- 801398c: 61bb str r3, [r7, #24]
- 801398e: e001 b.n 8013994 <osThreadNew+0xcc>
- }
- }
- }
- else {
- mem = 0;
- 8013990: 2300 movs r3, #0
- 8013992: 61bb str r3, [r7, #24]
- }
- if (mem == 1) {
- 8013994: 69bb ldr r3, [r7, #24]
- 8013996: 2b01 cmp r3, #1
- 8013998: d110 bne.n 80139bc <osThreadNew+0xf4>
- #if (configSUPPORT_STATIC_ALLOCATION == 1)
- hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t *)attr->stack_mem,
- 801399a: 687b ldr r3, [r7, #4]
- 801399c: 691b ldr r3, [r3, #16]
- (StaticTask_t *)attr->cb_mem);
- 801399e: 687a ldr r2, [r7, #4]
- 80139a0: 6892 ldr r2, [r2, #8]
- hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t *)attr->stack_mem,
- 80139a2: 9202 str r2, [sp, #8]
- 80139a4: 9301 str r3, [sp, #4]
- 80139a6: 69fb ldr r3, [r7, #28]
- 80139a8: 9300 str r3, [sp, #0]
- 80139aa: 68bb ldr r3, [r7, #8]
- 80139ac: 6a3a ldr r2, [r7, #32]
- 80139ae: 6a79 ldr r1, [r7, #36] @ 0x24
- 80139b0: 68f8 ldr r0, [r7, #12]
- 80139b2: f001 fdac bl 801550e <xTaskCreateStatic>
- 80139b6: 4603 mov r3, r0
- 80139b8: 613b str r3, [r7, #16]
- 80139ba: e013 b.n 80139e4 <osThreadNew+0x11c>
- #endif
- }
- else {
- if (mem == 0) {
- 80139bc: 69bb ldr r3, [r7, #24]
- 80139be: 2b00 cmp r3, #0
- 80139c0: d110 bne.n 80139e4 <osThreadNew+0x11c>
- #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
- if (xTaskCreate ((TaskFunction_t)func, name, (uint16_t)stack, argument, prio, &hTask) != pdPASS) {
- 80139c2: 6a3b ldr r3, [r7, #32]
- 80139c4: b29a uxth r2, r3
- 80139c6: f107 0310 add.w r3, r7, #16
- 80139ca: 9301 str r3, [sp, #4]
- 80139cc: 69fb ldr r3, [r7, #28]
- 80139ce: 9300 str r3, [sp, #0]
- 80139d0: 68bb ldr r3, [r7, #8]
- 80139d2: 6a79 ldr r1, [r7, #36] @ 0x24
- 80139d4: 68f8 ldr r0, [r7, #12]
- 80139d6: f001 fdfa bl 80155ce <xTaskCreate>
- 80139da: 4603 mov r3, r0
- 80139dc: 2b01 cmp r3, #1
- 80139de: d001 beq.n 80139e4 <osThreadNew+0x11c>
- hTask = NULL;
- 80139e0: 2300 movs r3, #0
- 80139e2: 613b str r3, [r7, #16]
- #endif
- }
- }
- }
- return ((osThreadId_t)hTask);
- 80139e4: 693b ldr r3, [r7, #16]
- }
- 80139e6: 4618 mov r0, r3
- 80139e8: 3728 adds r7, #40 @ 0x28
- 80139ea: 46bd mov sp, r7
- 80139ec: bd80 pop {r7, pc}
- 080139ee <osDelay>:
- /* Return flags before clearing */
- return (rflags);
- }
- #endif /* (configUSE_OS2_THREAD_FLAGS == 1) */
- osStatus_t osDelay (uint32_t ticks) {
- 80139ee: b580 push {r7, lr}
- 80139f0: b084 sub sp, #16
- 80139f2: af00 add r7, sp, #0
- 80139f4: 6078 str r0, [r7, #4]
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- 80139f6: f3ef 8305 mrs r3, IPSR
- 80139fa: 60bb str r3, [r7, #8]
- return(result);
- 80139fc: 68bb ldr r3, [r7, #8]
- osStatus_t stat;
- if (IS_IRQ()) {
- 80139fe: 2b00 cmp r3, #0
- 8013a00: d003 beq.n 8013a0a <osDelay+0x1c>
- stat = osErrorISR;
- 8013a02: f06f 0305 mvn.w r3, #5
- 8013a06: 60fb str r3, [r7, #12]
- 8013a08: e007 b.n 8013a1a <osDelay+0x2c>
- }
- else {
- stat = osOK;
- 8013a0a: 2300 movs r3, #0
- 8013a0c: 60fb str r3, [r7, #12]
- if (ticks != 0U) {
- 8013a0e: 687b ldr r3, [r7, #4]
- 8013a10: 2b00 cmp r3, #0
- 8013a12: d002 beq.n 8013a1a <osDelay+0x2c>
- vTaskDelay(ticks);
- 8013a14: 6878 ldr r0, [r7, #4]
- 8013a16: f001 ff37 bl 8015888 <vTaskDelay>
- }
- }
- return (stat);
- 8013a1a: 68fb ldr r3, [r7, #12]
- }
- 8013a1c: 4618 mov r0, r3
- 8013a1e: 3710 adds r7, #16
- 8013a20: 46bd mov sp, r7
- 8013a22: bd80 pop {r7, pc}
- 08013a24 <TimerCallback>:
- }
- /*---------------------------------------------------------------------------*/
- #if (configUSE_OS2_TIMER == 1)
- static void TimerCallback (TimerHandle_t hTimer) {
- 8013a24: b580 push {r7, lr}
- 8013a26: b084 sub sp, #16
- 8013a28: af00 add r7, sp, #0
- 8013a2a: 6078 str r0, [r7, #4]
- TimerCallback_t *callb;
- callb = (TimerCallback_t *)pvTimerGetTimerID (hTimer);
- 8013a2c: 6878 ldr r0, [r7, #4]
- 8013a2e: f003 fc3d bl 80172ac <pvTimerGetTimerID>
- 8013a32: 60f8 str r0, [r7, #12]
- if (callb != NULL) {
- 8013a34: 68fb ldr r3, [r7, #12]
- 8013a36: 2b00 cmp r3, #0
- 8013a38: d005 beq.n 8013a46 <TimerCallback+0x22>
- callb->func (callb->arg);
- 8013a3a: 68fb ldr r3, [r7, #12]
- 8013a3c: 681b ldr r3, [r3, #0]
- 8013a3e: 68fa ldr r2, [r7, #12]
- 8013a40: 6852 ldr r2, [r2, #4]
- 8013a42: 4610 mov r0, r2
- 8013a44: 4798 blx r3
- }
- }
- 8013a46: bf00 nop
- 8013a48: 3710 adds r7, #16
- 8013a4a: 46bd mov sp, r7
- 8013a4c: bd80 pop {r7, pc}
- ...
- 08013a50 <osTimerNew>:
- osTimerId_t osTimerNew (osTimerFunc_t func, osTimerType_t type, void *argument, const osTimerAttr_t *attr) {
- 8013a50: b580 push {r7, lr}
- 8013a52: b08c sub sp, #48 @ 0x30
- 8013a54: af02 add r7, sp, #8
- 8013a56: 60f8 str r0, [r7, #12]
- 8013a58: 607a str r2, [r7, #4]
- 8013a5a: 603b str r3, [r7, #0]
- 8013a5c: 460b mov r3, r1
- 8013a5e: 72fb strb r3, [r7, #11]
- TimerHandle_t hTimer;
- TimerCallback_t *callb;
- UBaseType_t reload;
- int32_t mem;
- hTimer = NULL;
- 8013a60: 2300 movs r3, #0
- 8013a62: 623b str r3, [r7, #32]
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- 8013a64: f3ef 8305 mrs r3, IPSR
- 8013a68: 613b str r3, [r7, #16]
- return(result);
- 8013a6a: 693b ldr r3, [r7, #16]
- if (!IS_IRQ() && (func != NULL)) {
- 8013a6c: 2b00 cmp r3, #0
- 8013a6e: d163 bne.n 8013b38 <osTimerNew+0xe8>
- 8013a70: 68fb ldr r3, [r7, #12]
- 8013a72: 2b00 cmp r3, #0
- 8013a74: d060 beq.n 8013b38 <osTimerNew+0xe8>
- /* Allocate memory to store callback function and argument */
- callb = pvPortMalloc (sizeof(TimerCallback_t));
- 8013a76: 2008 movs r0, #8
- 8013a78: f003 fe90 bl 801779c <pvPortMalloc>
- 8013a7c: 6178 str r0, [r7, #20]
- if (callb != NULL) {
- 8013a7e: 697b ldr r3, [r7, #20]
- 8013a80: 2b00 cmp r3, #0
- 8013a82: d059 beq.n 8013b38 <osTimerNew+0xe8>
- callb->func = func;
- 8013a84: 697b ldr r3, [r7, #20]
- 8013a86: 68fa ldr r2, [r7, #12]
- 8013a88: 601a str r2, [r3, #0]
- callb->arg = argument;
- 8013a8a: 697b ldr r3, [r7, #20]
- 8013a8c: 687a ldr r2, [r7, #4]
- 8013a8e: 605a str r2, [r3, #4]
- if (type == osTimerOnce) {
- 8013a90: 7afb ldrb r3, [r7, #11]
- 8013a92: 2b00 cmp r3, #0
- 8013a94: d102 bne.n 8013a9c <osTimerNew+0x4c>
- reload = pdFALSE;
- 8013a96: 2300 movs r3, #0
- 8013a98: 61fb str r3, [r7, #28]
- 8013a9a: e001 b.n 8013aa0 <osTimerNew+0x50>
- } else {
- reload = pdTRUE;
- 8013a9c: 2301 movs r3, #1
- 8013a9e: 61fb str r3, [r7, #28]
- }
- mem = -1;
- 8013aa0: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 8013aa4: 61bb str r3, [r7, #24]
- name = NULL;
- 8013aa6: 2300 movs r3, #0
- 8013aa8: 627b str r3, [r7, #36] @ 0x24
- if (attr != NULL) {
- 8013aaa: 683b ldr r3, [r7, #0]
- 8013aac: 2b00 cmp r3, #0
- 8013aae: d01c beq.n 8013aea <osTimerNew+0x9a>
- if (attr->name != NULL) {
- 8013ab0: 683b ldr r3, [r7, #0]
- 8013ab2: 681b ldr r3, [r3, #0]
- 8013ab4: 2b00 cmp r3, #0
- 8013ab6: d002 beq.n 8013abe <osTimerNew+0x6e>
- name = attr->name;
- 8013ab8: 683b ldr r3, [r7, #0]
- 8013aba: 681b ldr r3, [r3, #0]
- 8013abc: 627b str r3, [r7, #36] @ 0x24
- }
- if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticTimer_t))) {
- 8013abe: 683b ldr r3, [r7, #0]
- 8013ac0: 689b ldr r3, [r3, #8]
- 8013ac2: 2b00 cmp r3, #0
- 8013ac4: d006 beq.n 8013ad4 <osTimerNew+0x84>
- 8013ac6: 683b ldr r3, [r7, #0]
- 8013ac8: 68db ldr r3, [r3, #12]
- 8013aca: 2b2b cmp r3, #43 @ 0x2b
- 8013acc: d902 bls.n 8013ad4 <osTimerNew+0x84>
- mem = 1;
- 8013ace: 2301 movs r3, #1
- 8013ad0: 61bb str r3, [r7, #24]
- 8013ad2: e00c b.n 8013aee <osTimerNew+0x9e>
- }
- else {
- if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
- 8013ad4: 683b ldr r3, [r7, #0]
- 8013ad6: 689b ldr r3, [r3, #8]
- 8013ad8: 2b00 cmp r3, #0
- 8013ada: d108 bne.n 8013aee <osTimerNew+0x9e>
- 8013adc: 683b ldr r3, [r7, #0]
- 8013ade: 68db ldr r3, [r3, #12]
- 8013ae0: 2b00 cmp r3, #0
- 8013ae2: d104 bne.n 8013aee <osTimerNew+0x9e>
- mem = 0;
- 8013ae4: 2300 movs r3, #0
- 8013ae6: 61bb str r3, [r7, #24]
- 8013ae8: e001 b.n 8013aee <osTimerNew+0x9e>
- }
- }
- }
- else {
- mem = 0;
- 8013aea: 2300 movs r3, #0
- 8013aec: 61bb str r3, [r7, #24]
- }
- if (mem == 1) {
- 8013aee: 69bb ldr r3, [r7, #24]
- 8013af0: 2b01 cmp r3, #1
- 8013af2: d10c bne.n 8013b0e <osTimerNew+0xbe>
- #if (configSUPPORT_STATIC_ALLOCATION == 1)
- hTimer = xTimerCreateStatic (name, 1, reload, callb, TimerCallback, (StaticTimer_t *)attr->cb_mem);
- 8013af4: 683b ldr r3, [r7, #0]
- 8013af6: 689b ldr r3, [r3, #8]
- 8013af8: 9301 str r3, [sp, #4]
- 8013afa: 4b12 ldr r3, [pc, #72] @ (8013b44 <osTimerNew+0xf4>)
- 8013afc: 9300 str r3, [sp, #0]
- 8013afe: 697b ldr r3, [r7, #20]
- 8013b00: 69fa ldr r2, [r7, #28]
- 8013b02: 2101 movs r1, #1
- 8013b04: 6a78 ldr r0, [r7, #36] @ 0x24
- 8013b06: f003 f81a bl 8016b3e <xTimerCreateStatic>
- 8013b0a: 6238 str r0, [r7, #32]
- 8013b0c: e00b b.n 8013b26 <osTimerNew+0xd6>
- #endif
- }
- else {
- if (mem == 0) {
- 8013b0e: 69bb ldr r3, [r7, #24]
- 8013b10: 2b00 cmp r3, #0
- 8013b12: d108 bne.n 8013b26 <osTimerNew+0xd6>
- #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
- hTimer = xTimerCreate (name, 1, reload, callb, TimerCallback);
- 8013b14: 4b0b ldr r3, [pc, #44] @ (8013b44 <osTimerNew+0xf4>)
- 8013b16: 9300 str r3, [sp, #0]
- 8013b18: 697b ldr r3, [r7, #20]
- 8013b1a: 69fa ldr r2, [r7, #28]
- 8013b1c: 2101 movs r1, #1
- 8013b1e: 6a78 ldr r0, [r7, #36] @ 0x24
- 8013b20: f002 ffec bl 8016afc <xTimerCreate>
- 8013b24: 6238 str r0, [r7, #32]
- #endif
- }
- }
- if ((hTimer == NULL) && (callb != NULL)) {
- 8013b26: 6a3b ldr r3, [r7, #32]
- 8013b28: 2b00 cmp r3, #0
- 8013b2a: d105 bne.n 8013b38 <osTimerNew+0xe8>
- 8013b2c: 697b ldr r3, [r7, #20]
- 8013b2e: 2b00 cmp r3, #0
- 8013b30: d002 beq.n 8013b38 <osTimerNew+0xe8>
- vPortFree (callb);
- 8013b32: 6978 ldr r0, [r7, #20]
- 8013b34: f003 ff00 bl 8017938 <vPortFree>
- }
- }
- }
- return ((osTimerId_t)hTimer);
- 8013b38: 6a3b ldr r3, [r7, #32]
- }
- 8013b3a: 4618 mov r0, r3
- 8013b3c: 3728 adds r7, #40 @ 0x28
- 8013b3e: 46bd mov sp, r7
- 8013b40: bd80 pop {r7, pc}
- 8013b42: bf00 nop
- 8013b44: 08013a25 .word 0x08013a25
- 08013b48 <osTimerStart>:
- }
- return (p);
- }
- osStatus_t osTimerStart (osTimerId_t timer_id, uint32_t ticks) {
- 8013b48: b580 push {r7, lr}
- 8013b4a: b088 sub sp, #32
- 8013b4c: af02 add r7, sp, #8
- 8013b4e: 6078 str r0, [r7, #4]
- 8013b50: 6039 str r1, [r7, #0]
- TimerHandle_t hTimer = (TimerHandle_t)timer_id;
- 8013b52: 687b ldr r3, [r7, #4]
- 8013b54: 613b str r3, [r7, #16]
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- 8013b56: f3ef 8305 mrs r3, IPSR
- 8013b5a: 60fb str r3, [r7, #12]
- return(result);
- 8013b5c: 68fb ldr r3, [r7, #12]
- osStatus_t stat;
- if (IS_IRQ()) {
- 8013b5e: 2b00 cmp r3, #0
- 8013b60: d003 beq.n 8013b6a <osTimerStart+0x22>
- stat = osErrorISR;
- 8013b62: f06f 0305 mvn.w r3, #5
- 8013b66: 617b str r3, [r7, #20]
- 8013b68: e017 b.n 8013b9a <osTimerStart+0x52>
- }
- else if (hTimer == NULL) {
- 8013b6a: 693b ldr r3, [r7, #16]
- 8013b6c: 2b00 cmp r3, #0
- 8013b6e: d103 bne.n 8013b78 <osTimerStart+0x30>
- stat = osErrorParameter;
- 8013b70: f06f 0303 mvn.w r3, #3
- 8013b74: 617b str r3, [r7, #20]
- 8013b76: e010 b.n 8013b9a <osTimerStart+0x52>
- }
- else {
- if (xTimerChangePeriod (hTimer, ticks, 0) == pdPASS) {
- 8013b78: 2300 movs r3, #0
- 8013b7a: 9300 str r3, [sp, #0]
- 8013b7c: 2300 movs r3, #0
- 8013b7e: 683a ldr r2, [r7, #0]
- 8013b80: 2104 movs r1, #4
- 8013b82: 6938 ldr r0, [r7, #16]
- 8013b84: f003 f858 bl 8016c38 <xTimerGenericCommand>
- 8013b88: 4603 mov r3, r0
- 8013b8a: 2b01 cmp r3, #1
- 8013b8c: d102 bne.n 8013b94 <osTimerStart+0x4c>
- stat = osOK;
- 8013b8e: 2300 movs r3, #0
- 8013b90: 617b str r3, [r7, #20]
- 8013b92: e002 b.n 8013b9a <osTimerStart+0x52>
- } else {
- stat = osErrorResource;
- 8013b94: f06f 0302 mvn.w r3, #2
- 8013b98: 617b str r3, [r7, #20]
- }
- }
- return (stat);
- 8013b9a: 697b ldr r3, [r7, #20]
- }
- 8013b9c: 4618 mov r0, r3
- 8013b9e: 3718 adds r7, #24
- 8013ba0: 46bd mov sp, r7
- 8013ba2: bd80 pop {r7, pc}
- 08013ba4 <osTimerStop>:
- osStatus_t osTimerStop (osTimerId_t timer_id) {
- 8013ba4: b580 push {r7, lr}
- 8013ba6: b088 sub sp, #32
- 8013ba8: af02 add r7, sp, #8
- 8013baa: 6078 str r0, [r7, #4]
- TimerHandle_t hTimer = (TimerHandle_t)timer_id;
- 8013bac: 687b ldr r3, [r7, #4]
- 8013bae: 613b str r3, [r7, #16]
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- 8013bb0: f3ef 8305 mrs r3, IPSR
- 8013bb4: 60fb str r3, [r7, #12]
- return(result);
- 8013bb6: 68fb ldr r3, [r7, #12]
- osStatus_t stat;
- if (IS_IRQ()) {
- 8013bb8: 2b00 cmp r3, #0
- 8013bba: d003 beq.n 8013bc4 <osTimerStop+0x20>
- stat = osErrorISR;
- 8013bbc: f06f 0305 mvn.w r3, #5
- 8013bc0: 617b str r3, [r7, #20]
- 8013bc2: e021 b.n 8013c08 <osTimerStop+0x64>
- }
- else if (hTimer == NULL) {
- 8013bc4: 693b ldr r3, [r7, #16]
- 8013bc6: 2b00 cmp r3, #0
- 8013bc8: d103 bne.n 8013bd2 <osTimerStop+0x2e>
- stat = osErrorParameter;
- 8013bca: f06f 0303 mvn.w r3, #3
- 8013bce: 617b str r3, [r7, #20]
- 8013bd0: e01a b.n 8013c08 <osTimerStop+0x64>
- }
- else {
- if (xTimerIsTimerActive (hTimer) == pdFALSE) {
- 8013bd2: 6938 ldr r0, [r7, #16]
- 8013bd4: f003 fb40 bl 8017258 <xTimerIsTimerActive>
- 8013bd8: 4603 mov r3, r0
- 8013bda: 2b00 cmp r3, #0
- 8013bdc: d103 bne.n 8013be6 <osTimerStop+0x42>
- stat = osErrorResource;
- 8013bde: f06f 0302 mvn.w r3, #2
- 8013be2: 617b str r3, [r7, #20]
- 8013be4: e010 b.n 8013c08 <osTimerStop+0x64>
- }
- else {
- if (xTimerStop (hTimer, 0) == pdPASS) {
- 8013be6: 2300 movs r3, #0
- 8013be8: 9300 str r3, [sp, #0]
- 8013bea: 2300 movs r3, #0
- 8013bec: 2200 movs r2, #0
- 8013bee: 2103 movs r1, #3
- 8013bf0: 6938 ldr r0, [r7, #16]
- 8013bf2: f003 f821 bl 8016c38 <xTimerGenericCommand>
- 8013bf6: 4603 mov r3, r0
- 8013bf8: 2b01 cmp r3, #1
- 8013bfa: d102 bne.n 8013c02 <osTimerStop+0x5e>
- stat = osOK;
- 8013bfc: 2300 movs r3, #0
- 8013bfe: 617b str r3, [r7, #20]
- 8013c00: e002 b.n 8013c08 <osTimerStop+0x64>
- } else {
- stat = osError;
- 8013c02: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 8013c06: 617b str r3, [r7, #20]
- }
- }
- }
- return (stat);
- 8013c08: 697b ldr r3, [r7, #20]
- }
- 8013c0a: 4618 mov r0, r3
- 8013c0c: 3718 adds r7, #24
- 8013c0e: 46bd mov sp, r7
- 8013c10: bd80 pop {r7, pc}
- 08013c12 <osMutexNew>:
- }
- /*---------------------------------------------------------------------------*/
- #if (configUSE_OS2_MUTEX == 1)
- osMutexId_t osMutexNew (const osMutexAttr_t *attr) {
- 8013c12: b580 push {r7, lr}
- 8013c14: b088 sub sp, #32
- 8013c16: af00 add r7, sp, #0
- 8013c18: 6078 str r0, [r7, #4]
- int32_t mem;
- #if (configQUEUE_REGISTRY_SIZE > 0)
- const char *name;
- #endif
- hMutex = NULL;
- 8013c1a: 2300 movs r3, #0
- 8013c1c: 61fb str r3, [r7, #28]
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- 8013c1e: f3ef 8305 mrs r3, IPSR
- 8013c22: 60bb str r3, [r7, #8]
- return(result);
- 8013c24: 68bb ldr r3, [r7, #8]
- if (!IS_IRQ()) {
- 8013c26: 2b00 cmp r3, #0
- 8013c28: d174 bne.n 8013d14 <osMutexNew+0x102>
- if (attr != NULL) {
- 8013c2a: 687b ldr r3, [r7, #4]
- 8013c2c: 2b00 cmp r3, #0
- 8013c2e: d003 beq.n 8013c38 <osMutexNew+0x26>
- type = attr->attr_bits;
- 8013c30: 687b ldr r3, [r7, #4]
- 8013c32: 685b ldr r3, [r3, #4]
- 8013c34: 61bb str r3, [r7, #24]
- 8013c36: e001 b.n 8013c3c <osMutexNew+0x2a>
- } else {
- type = 0U;
- 8013c38: 2300 movs r3, #0
- 8013c3a: 61bb str r3, [r7, #24]
- }
- if ((type & osMutexRecursive) == osMutexRecursive) {
- 8013c3c: 69bb ldr r3, [r7, #24]
- 8013c3e: f003 0301 and.w r3, r3, #1
- 8013c42: 2b00 cmp r3, #0
- 8013c44: d002 beq.n 8013c4c <osMutexNew+0x3a>
- rmtx = 1U;
- 8013c46: 2301 movs r3, #1
- 8013c48: 617b str r3, [r7, #20]
- 8013c4a: e001 b.n 8013c50 <osMutexNew+0x3e>
- } else {
- rmtx = 0U;
- 8013c4c: 2300 movs r3, #0
- 8013c4e: 617b str r3, [r7, #20]
- }
- if ((type & osMutexRobust) != osMutexRobust) {
- 8013c50: 69bb ldr r3, [r7, #24]
- 8013c52: f003 0308 and.w r3, r3, #8
- 8013c56: 2b00 cmp r3, #0
- 8013c58: d15c bne.n 8013d14 <osMutexNew+0x102>
- mem = -1;
- 8013c5a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 8013c5e: 613b str r3, [r7, #16]
- if (attr != NULL) {
- 8013c60: 687b ldr r3, [r7, #4]
- 8013c62: 2b00 cmp r3, #0
- 8013c64: d015 beq.n 8013c92 <osMutexNew+0x80>
- if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticSemaphore_t))) {
- 8013c66: 687b ldr r3, [r7, #4]
- 8013c68: 689b ldr r3, [r3, #8]
- 8013c6a: 2b00 cmp r3, #0
- 8013c6c: d006 beq.n 8013c7c <osMutexNew+0x6a>
- 8013c6e: 687b ldr r3, [r7, #4]
- 8013c70: 68db ldr r3, [r3, #12]
- 8013c72: 2b4f cmp r3, #79 @ 0x4f
- 8013c74: d902 bls.n 8013c7c <osMutexNew+0x6a>
- mem = 1;
- 8013c76: 2301 movs r3, #1
- 8013c78: 613b str r3, [r7, #16]
- 8013c7a: e00c b.n 8013c96 <osMutexNew+0x84>
- }
- else {
- if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
- 8013c7c: 687b ldr r3, [r7, #4]
- 8013c7e: 689b ldr r3, [r3, #8]
- 8013c80: 2b00 cmp r3, #0
- 8013c82: d108 bne.n 8013c96 <osMutexNew+0x84>
- 8013c84: 687b ldr r3, [r7, #4]
- 8013c86: 68db ldr r3, [r3, #12]
- 8013c88: 2b00 cmp r3, #0
- 8013c8a: d104 bne.n 8013c96 <osMutexNew+0x84>
- mem = 0;
- 8013c8c: 2300 movs r3, #0
- 8013c8e: 613b str r3, [r7, #16]
- 8013c90: e001 b.n 8013c96 <osMutexNew+0x84>
- }
- }
- }
- else {
- mem = 0;
- 8013c92: 2300 movs r3, #0
- 8013c94: 613b str r3, [r7, #16]
- }
- if (mem == 1) {
- 8013c96: 693b ldr r3, [r7, #16]
- 8013c98: 2b01 cmp r3, #1
- 8013c9a: d112 bne.n 8013cc2 <osMutexNew+0xb0>
- #if (configSUPPORT_STATIC_ALLOCATION == 1)
- if (rmtx != 0U) {
- 8013c9c: 697b ldr r3, [r7, #20]
- 8013c9e: 2b00 cmp r3, #0
- 8013ca0: d007 beq.n 8013cb2 <osMutexNew+0xa0>
- #if (configUSE_RECURSIVE_MUTEXES == 1)
- hMutex = xSemaphoreCreateRecursiveMutexStatic (attr->cb_mem);
- 8013ca2: 687b ldr r3, [r7, #4]
- 8013ca4: 689b ldr r3, [r3, #8]
- 8013ca6: 4619 mov r1, r3
- 8013ca8: 2004 movs r0, #4
- 8013caa: f000 fc50 bl 801454e <xQueueCreateMutexStatic>
- 8013cae: 61f8 str r0, [r7, #28]
- 8013cb0: e016 b.n 8013ce0 <osMutexNew+0xce>
- #endif
- }
- else {
- hMutex = xSemaphoreCreateMutexStatic (attr->cb_mem);
- 8013cb2: 687b ldr r3, [r7, #4]
- 8013cb4: 689b ldr r3, [r3, #8]
- 8013cb6: 4619 mov r1, r3
- 8013cb8: 2001 movs r0, #1
- 8013cba: f000 fc48 bl 801454e <xQueueCreateMutexStatic>
- 8013cbe: 61f8 str r0, [r7, #28]
- 8013cc0: e00e b.n 8013ce0 <osMutexNew+0xce>
- }
- #endif
- }
- else {
- if (mem == 0) {
- 8013cc2: 693b ldr r3, [r7, #16]
- 8013cc4: 2b00 cmp r3, #0
- 8013cc6: d10b bne.n 8013ce0 <osMutexNew+0xce>
- #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
- if (rmtx != 0U) {
- 8013cc8: 697b ldr r3, [r7, #20]
- 8013cca: 2b00 cmp r3, #0
- 8013ccc: d004 beq.n 8013cd8 <osMutexNew+0xc6>
- #if (configUSE_RECURSIVE_MUTEXES == 1)
- hMutex = xSemaphoreCreateRecursiveMutex ();
- 8013cce: 2004 movs r0, #4
- 8013cd0: f000 fc25 bl 801451e <xQueueCreateMutex>
- 8013cd4: 61f8 str r0, [r7, #28]
- 8013cd6: e003 b.n 8013ce0 <osMutexNew+0xce>
- #endif
- } else {
- hMutex = xSemaphoreCreateMutex ();
- 8013cd8: 2001 movs r0, #1
- 8013cda: f000 fc20 bl 801451e <xQueueCreateMutex>
- 8013cde: 61f8 str r0, [r7, #28]
- #endif
- }
- }
- #if (configQUEUE_REGISTRY_SIZE > 0)
- if (hMutex != NULL) {
- 8013ce0: 69fb ldr r3, [r7, #28]
- 8013ce2: 2b00 cmp r3, #0
- 8013ce4: d00c beq.n 8013d00 <osMutexNew+0xee>
- if (attr != NULL) {
- 8013ce6: 687b ldr r3, [r7, #4]
- 8013ce8: 2b00 cmp r3, #0
- 8013cea: d003 beq.n 8013cf4 <osMutexNew+0xe2>
- name = attr->name;
- 8013cec: 687b ldr r3, [r7, #4]
- 8013cee: 681b ldr r3, [r3, #0]
- 8013cf0: 60fb str r3, [r7, #12]
- 8013cf2: e001 b.n 8013cf8 <osMutexNew+0xe6>
- } else {
- name = NULL;
- 8013cf4: 2300 movs r3, #0
- 8013cf6: 60fb str r3, [r7, #12]
- }
- vQueueAddToRegistry (hMutex, name);
- 8013cf8: 68f9 ldr r1, [r7, #12]
- 8013cfa: 69f8 ldr r0, [r7, #28]
- 8013cfc: f001 f9ea bl 80150d4 <vQueueAddToRegistry>
- }
- #endif
- if ((hMutex != NULL) && (rmtx != 0U)) {
- 8013d00: 69fb ldr r3, [r7, #28]
- 8013d02: 2b00 cmp r3, #0
- 8013d04: d006 beq.n 8013d14 <osMutexNew+0x102>
- 8013d06: 697b ldr r3, [r7, #20]
- 8013d08: 2b00 cmp r3, #0
- 8013d0a: d003 beq.n 8013d14 <osMutexNew+0x102>
- hMutex = (SemaphoreHandle_t)((uint32_t)hMutex | 1U);
- 8013d0c: 69fb ldr r3, [r7, #28]
- 8013d0e: f043 0301 orr.w r3, r3, #1
- 8013d12: 61fb str r3, [r7, #28]
- }
- }
- }
- return ((osMutexId_t)hMutex);
- 8013d14: 69fb ldr r3, [r7, #28]
- }
- 8013d16: 4618 mov r0, r3
- 8013d18: 3720 adds r7, #32
- 8013d1a: 46bd mov sp, r7
- 8013d1c: bd80 pop {r7, pc}
- 08013d1e <osMutexAcquire>:
- osStatus_t osMutexAcquire (osMutexId_t mutex_id, uint32_t timeout) {
- 8013d1e: b580 push {r7, lr}
- 8013d20: b086 sub sp, #24
- 8013d22: af00 add r7, sp, #0
- 8013d24: 6078 str r0, [r7, #4]
- 8013d26: 6039 str r1, [r7, #0]
- SemaphoreHandle_t hMutex;
- osStatus_t stat;
- uint32_t rmtx;
- hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U);
- 8013d28: 687b ldr r3, [r7, #4]
- 8013d2a: f023 0301 bic.w r3, r3, #1
- 8013d2e: 613b str r3, [r7, #16]
- rmtx = (uint32_t)mutex_id & 1U;
- 8013d30: 687b ldr r3, [r7, #4]
- 8013d32: f003 0301 and.w r3, r3, #1
- 8013d36: 60fb str r3, [r7, #12]
- stat = osOK;
- 8013d38: 2300 movs r3, #0
- 8013d3a: 617b str r3, [r7, #20]
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- 8013d3c: f3ef 8305 mrs r3, IPSR
- 8013d40: 60bb str r3, [r7, #8]
- return(result);
- 8013d42: 68bb ldr r3, [r7, #8]
- if (IS_IRQ()) {
- 8013d44: 2b00 cmp r3, #0
- 8013d46: d003 beq.n 8013d50 <osMutexAcquire+0x32>
- stat = osErrorISR;
- 8013d48: f06f 0305 mvn.w r3, #5
- 8013d4c: 617b str r3, [r7, #20]
- 8013d4e: e02c b.n 8013daa <osMutexAcquire+0x8c>
- }
- else if (hMutex == NULL) {
- 8013d50: 693b ldr r3, [r7, #16]
- 8013d52: 2b00 cmp r3, #0
- 8013d54: d103 bne.n 8013d5e <osMutexAcquire+0x40>
- stat = osErrorParameter;
- 8013d56: f06f 0303 mvn.w r3, #3
- 8013d5a: 617b str r3, [r7, #20]
- 8013d5c: e025 b.n 8013daa <osMutexAcquire+0x8c>
- }
- else {
- if (rmtx != 0U) {
- 8013d5e: 68fb ldr r3, [r7, #12]
- 8013d60: 2b00 cmp r3, #0
- 8013d62: d011 beq.n 8013d88 <osMutexAcquire+0x6a>
- #if (configUSE_RECURSIVE_MUTEXES == 1)
- if (xSemaphoreTakeRecursive (hMutex, timeout) != pdPASS) {
- 8013d64: 6839 ldr r1, [r7, #0]
- 8013d66: 6938 ldr r0, [r7, #16]
- 8013d68: f000 fc41 bl 80145ee <xQueueTakeMutexRecursive>
- 8013d6c: 4603 mov r3, r0
- 8013d6e: 2b01 cmp r3, #1
- 8013d70: d01b beq.n 8013daa <osMutexAcquire+0x8c>
- if (timeout != 0U) {
- 8013d72: 683b ldr r3, [r7, #0]
- 8013d74: 2b00 cmp r3, #0
- 8013d76: d003 beq.n 8013d80 <osMutexAcquire+0x62>
- stat = osErrorTimeout;
- 8013d78: f06f 0301 mvn.w r3, #1
- 8013d7c: 617b str r3, [r7, #20]
- 8013d7e: e014 b.n 8013daa <osMutexAcquire+0x8c>
- } else {
- stat = osErrorResource;
- 8013d80: f06f 0302 mvn.w r3, #2
- 8013d84: 617b str r3, [r7, #20]
- 8013d86: e010 b.n 8013daa <osMutexAcquire+0x8c>
- }
- }
- #endif
- }
- else {
- if (xSemaphoreTake (hMutex, timeout) != pdPASS) {
- 8013d88: 6839 ldr r1, [r7, #0]
- 8013d8a: 6938 ldr r0, [r7, #16]
- 8013d8c: f000 fee8 bl 8014b60 <xQueueSemaphoreTake>
- 8013d90: 4603 mov r3, r0
- 8013d92: 2b01 cmp r3, #1
- 8013d94: d009 beq.n 8013daa <osMutexAcquire+0x8c>
- if (timeout != 0U) {
- 8013d96: 683b ldr r3, [r7, #0]
- 8013d98: 2b00 cmp r3, #0
- 8013d9a: d003 beq.n 8013da4 <osMutexAcquire+0x86>
- stat = osErrorTimeout;
- 8013d9c: f06f 0301 mvn.w r3, #1
- 8013da0: 617b str r3, [r7, #20]
- 8013da2: e002 b.n 8013daa <osMutexAcquire+0x8c>
- } else {
- stat = osErrorResource;
- 8013da4: f06f 0302 mvn.w r3, #2
- 8013da8: 617b str r3, [r7, #20]
- }
- }
- }
- }
- return (stat);
- 8013daa: 697b ldr r3, [r7, #20]
- }
- 8013dac: 4618 mov r0, r3
- 8013dae: 3718 adds r7, #24
- 8013db0: 46bd mov sp, r7
- 8013db2: bd80 pop {r7, pc}
- 08013db4 <osMutexRelease>:
- osStatus_t osMutexRelease (osMutexId_t mutex_id) {
- 8013db4: b580 push {r7, lr}
- 8013db6: b086 sub sp, #24
- 8013db8: af00 add r7, sp, #0
- 8013dba: 6078 str r0, [r7, #4]
- SemaphoreHandle_t hMutex;
- osStatus_t stat;
- uint32_t rmtx;
- hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U);
- 8013dbc: 687b ldr r3, [r7, #4]
- 8013dbe: f023 0301 bic.w r3, r3, #1
- 8013dc2: 613b str r3, [r7, #16]
- rmtx = (uint32_t)mutex_id & 1U;
- 8013dc4: 687b ldr r3, [r7, #4]
- 8013dc6: f003 0301 and.w r3, r3, #1
- 8013dca: 60fb str r3, [r7, #12]
- stat = osOK;
- 8013dcc: 2300 movs r3, #0
- 8013dce: 617b str r3, [r7, #20]
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- 8013dd0: f3ef 8305 mrs r3, IPSR
- 8013dd4: 60bb str r3, [r7, #8]
- return(result);
- 8013dd6: 68bb ldr r3, [r7, #8]
- if (IS_IRQ()) {
- 8013dd8: 2b00 cmp r3, #0
- 8013dda: d003 beq.n 8013de4 <osMutexRelease+0x30>
- stat = osErrorISR;
- 8013ddc: f06f 0305 mvn.w r3, #5
- 8013de0: 617b str r3, [r7, #20]
- 8013de2: e01f b.n 8013e24 <osMutexRelease+0x70>
- }
- else if (hMutex == NULL) {
- 8013de4: 693b ldr r3, [r7, #16]
- 8013de6: 2b00 cmp r3, #0
- 8013de8: d103 bne.n 8013df2 <osMutexRelease+0x3e>
- stat = osErrorParameter;
- 8013dea: f06f 0303 mvn.w r3, #3
- 8013dee: 617b str r3, [r7, #20]
- 8013df0: e018 b.n 8013e24 <osMutexRelease+0x70>
- }
- else {
- if (rmtx != 0U) {
- 8013df2: 68fb ldr r3, [r7, #12]
- 8013df4: 2b00 cmp r3, #0
- 8013df6: d009 beq.n 8013e0c <osMutexRelease+0x58>
- #if (configUSE_RECURSIVE_MUTEXES == 1)
- if (xSemaphoreGiveRecursive (hMutex) != pdPASS) {
- 8013df8: 6938 ldr r0, [r7, #16]
- 8013dfa: f000 fbc3 bl 8014584 <xQueueGiveMutexRecursive>
- 8013dfe: 4603 mov r3, r0
- 8013e00: 2b01 cmp r3, #1
- 8013e02: d00f beq.n 8013e24 <osMutexRelease+0x70>
- stat = osErrorResource;
- 8013e04: f06f 0302 mvn.w r3, #2
- 8013e08: 617b str r3, [r7, #20]
- 8013e0a: e00b b.n 8013e24 <osMutexRelease+0x70>
- }
- #endif
- }
- else {
- if (xSemaphoreGive (hMutex) != pdPASS) {
- 8013e0c: 2300 movs r3, #0
- 8013e0e: 2200 movs r2, #0
- 8013e10: 2100 movs r1, #0
- 8013e12: 6938 ldr r0, [r7, #16]
- 8013e14: f000 fc22 bl 801465c <xQueueGenericSend>
- 8013e18: 4603 mov r3, r0
- 8013e1a: 2b01 cmp r3, #1
- 8013e1c: d002 beq.n 8013e24 <osMutexRelease+0x70>
- stat = osErrorResource;
- 8013e1e: f06f 0302 mvn.w r3, #2
- 8013e22: 617b str r3, [r7, #20]
- }
- }
- }
- return (stat);
- 8013e24: 697b ldr r3, [r7, #20]
- }
- 8013e26: 4618 mov r0, r3
- 8013e28: 3718 adds r7, #24
- 8013e2a: 46bd mov sp, r7
- 8013e2c: bd80 pop {r7, pc}
- 08013e2e <osMessageQueueNew>:
- return (stat);
- }
- /*---------------------------------------------------------------------------*/
- osMessageQueueId_t osMessageQueueNew (uint32_t msg_count, uint32_t msg_size, const osMessageQueueAttr_t *attr) {
- 8013e2e: b580 push {r7, lr}
- 8013e30: b08a sub sp, #40 @ 0x28
- 8013e32: af02 add r7, sp, #8
- 8013e34: 60f8 str r0, [r7, #12]
- 8013e36: 60b9 str r1, [r7, #8]
- 8013e38: 607a str r2, [r7, #4]
- int32_t mem;
- #if (configQUEUE_REGISTRY_SIZE > 0)
- const char *name;
- #endif
- hQueue = NULL;
- 8013e3a: 2300 movs r3, #0
- 8013e3c: 61fb str r3, [r7, #28]
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- 8013e3e: f3ef 8305 mrs r3, IPSR
- 8013e42: 613b str r3, [r7, #16]
- return(result);
- 8013e44: 693b ldr r3, [r7, #16]
- if (!IS_IRQ() && (msg_count > 0U) && (msg_size > 0U)) {
- 8013e46: 2b00 cmp r3, #0
- 8013e48: d15f bne.n 8013f0a <osMessageQueueNew+0xdc>
- 8013e4a: 68fb ldr r3, [r7, #12]
- 8013e4c: 2b00 cmp r3, #0
- 8013e4e: d05c beq.n 8013f0a <osMessageQueueNew+0xdc>
- 8013e50: 68bb ldr r3, [r7, #8]
- 8013e52: 2b00 cmp r3, #0
- 8013e54: d059 beq.n 8013f0a <osMessageQueueNew+0xdc>
- mem = -1;
- 8013e56: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 8013e5a: 61bb str r3, [r7, #24]
- if (attr != NULL) {
- 8013e5c: 687b ldr r3, [r7, #4]
- 8013e5e: 2b00 cmp r3, #0
- 8013e60: d029 beq.n 8013eb6 <osMessageQueueNew+0x88>
- if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) &&
- 8013e62: 687b ldr r3, [r7, #4]
- 8013e64: 689b ldr r3, [r3, #8]
- 8013e66: 2b00 cmp r3, #0
- 8013e68: d012 beq.n 8013e90 <osMessageQueueNew+0x62>
- 8013e6a: 687b ldr r3, [r7, #4]
- 8013e6c: 68db ldr r3, [r3, #12]
- 8013e6e: 2b4f cmp r3, #79 @ 0x4f
- 8013e70: d90e bls.n 8013e90 <osMessageQueueNew+0x62>
- (attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) {
- 8013e72: 687b ldr r3, [r7, #4]
- 8013e74: 691b ldr r3, [r3, #16]
- if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) &&
- 8013e76: 2b00 cmp r3, #0
- 8013e78: d00a beq.n 8013e90 <osMessageQueueNew+0x62>
- (attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) {
- 8013e7a: 687b ldr r3, [r7, #4]
- 8013e7c: 695a ldr r2, [r3, #20]
- 8013e7e: 68fb ldr r3, [r7, #12]
- 8013e80: 68b9 ldr r1, [r7, #8]
- 8013e82: fb01 f303 mul.w r3, r1, r3
- 8013e86: 429a cmp r2, r3
- 8013e88: d302 bcc.n 8013e90 <osMessageQueueNew+0x62>
- mem = 1;
- 8013e8a: 2301 movs r3, #1
- 8013e8c: 61bb str r3, [r7, #24]
- 8013e8e: e014 b.n 8013eba <osMessageQueueNew+0x8c>
- }
- else {
- if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) &&
- 8013e90: 687b ldr r3, [r7, #4]
- 8013e92: 689b ldr r3, [r3, #8]
- 8013e94: 2b00 cmp r3, #0
- 8013e96: d110 bne.n 8013eba <osMessageQueueNew+0x8c>
- 8013e98: 687b ldr r3, [r7, #4]
- 8013e9a: 68db ldr r3, [r3, #12]
- 8013e9c: 2b00 cmp r3, #0
- 8013e9e: d10c bne.n 8013eba <osMessageQueueNew+0x8c>
- (attr->mq_mem == NULL) && (attr->mq_size == 0U)) {
- 8013ea0: 687b ldr r3, [r7, #4]
- 8013ea2: 691b ldr r3, [r3, #16]
- if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) &&
- 8013ea4: 2b00 cmp r3, #0
- 8013ea6: d108 bne.n 8013eba <osMessageQueueNew+0x8c>
- (attr->mq_mem == NULL) && (attr->mq_size == 0U)) {
- 8013ea8: 687b ldr r3, [r7, #4]
- 8013eaa: 695b ldr r3, [r3, #20]
- 8013eac: 2b00 cmp r3, #0
- 8013eae: d104 bne.n 8013eba <osMessageQueueNew+0x8c>
- mem = 0;
- 8013eb0: 2300 movs r3, #0
- 8013eb2: 61bb str r3, [r7, #24]
- 8013eb4: e001 b.n 8013eba <osMessageQueueNew+0x8c>
- }
- }
- }
- else {
- mem = 0;
- 8013eb6: 2300 movs r3, #0
- 8013eb8: 61bb str r3, [r7, #24]
- }
- if (mem == 1) {
- 8013eba: 69bb ldr r3, [r7, #24]
- 8013ebc: 2b01 cmp r3, #1
- 8013ebe: d10b bne.n 8013ed8 <osMessageQueueNew+0xaa>
- #if (configSUPPORT_STATIC_ALLOCATION == 1)
- hQueue = xQueueCreateStatic (msg_count, msg_size, attr->mq_mem, attr->cb_mem);
- 8013ec0: 687b ldr r3, [r7, #4]
- 8013ec2: 691a ldr r2, [r3, #16]
- 8013ec4: 687b ldr r3, [r7, #4]
- 8013ec6: 689b ldr r3, [r3, #8]
- 8013ec8: 2100 movs r1, #0
- 8013eca: 9100 str r1, [sp, #0]
- 8013ecc: 68b9 ldr r1, [r7, #8]
- 8013ece: 68f8 ldr r0, [r7, #12]
- 8013ed0: f000 fa30 bl 8014334 <xQueueGenericCreateStatic>
- 8013ed4: 61f8 str r0, [r7, #28]
- 8013ed6: e008 b.n 8013eea <osMessageQueueNew+0xbc>
- #endif
- }
- else {
- if (mem == 0) {
- 8013ed8: 69bb ldr r3, [r7, #24]
- 8013eda: 2b00 cmp r3, #0
- 8013edc: d105 bne.n 8013eea <osMessageQueueNew+0xbc>
- #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
- hQueue = xQueueCreate (msg_count, msg_size);
- 8013ede: 2200 movs r2, #0
- 8013ee0: 68b9 ldr r1, [r7, #8]
- 8013ee2: 68f8 ldr r0, [r7, #12]
- 8013ee4: f000 faa3 bl 801442e <xQueueGenericCreate>
- 8013ee8: 61f8 str r0, [r7, #28]
- #endif
- }
- }
- #if (configQUEUE_REGISTRY_SIZE > 0)
- if (hQueue != NULL) {
- 8013eea: 69fb ldr r3, [r7, #28]
- 8013eec: 2b00 cmp r3, #0
- 8013eee: d00c beq.n 8013f0a <osMessageQueueNew+0xdc>
- if (attr != NULL) {
- 8013ef0: 687b ldr r3, [r7, #4]
- 8013ef2: 2b00 cmp r3, #0
- 8013ef4: d003 beq.n 8013efe <osMessageQueueNew+0xd0>
- name = attr->name;
- 8013ef6: 687b ldr r3, [r7, #4]
- 8013ef8: 681b ldr r3, [r3, #0]
- 8013efa: 617b str r3, [r7, #20]
- 8013efc: e001 b.n 8013f02 <osMessageQueueNew+0xd4>
- } else {
- name = NULL;
- 8013efe: 2300 movs r3, #0
- 8013f00: 617b str r3, [r7, #20]
- }
- vQueueAddToRegistry (hQueue, name);
- 8013f02: 6979 ldr r1, [r7, #20]
- 8013f04: 69f8 ldr r0, [r7, #28]
- 8013f06: f001 f8e5 bl 80150d4 <vQueueAddToRegistry>
- }
- #endif
- }
- return ((osMessageQueueId_t)hQueue);
- 8013f0a: 69fb ldr r3, [r7, #28]
- }
- 8013f0c: 4618 mov r0, r3
- 8013f0e: 3720 adds r7, #32
- 8013f10: 46bd mov sp, r7
- 8013f12: bd80 pop {r7, pc}
- 08013f14 <osMessageQueuePut>:
- osStatus_t osMessageQueuePut (osMessageQueueId_t mq_id, const void *msg_ptr, uint8_t msg_prio, uint32_t timeout) {
- 8013f14: b580 push {r7, lr}
- 8013f16: b088 sub sp, #32
- 8013f18: af00 add r7, sp, #0
- 8013f1a: 60f8 str r0, [r7, #12]
- 8013f1c: 60b9 str r1, [r7, #8]
- 8013f1e: 603b str r3, [r7, #0]
- 8013f20: 4613 mov r3, r2
- 8013f22: 71fb strb r3, [r7, #7]
- QueueHandle_t hQueue = (QueueHandle_t)mq_id;
- 8013f24: 68fb ldr r3, [r7, #12]
- 8013f26: 61bb str r3, [r7, #24]
- osStatus_t stat;
- BaseType_t yield;
- (void)msg_prio; /* Message priority is ignored */
- stat = osOK;
- 8013f28: 2300 movs r3, #0
- 8013f2a: 61fb str r3, [r7, #28]
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- 8013f2c: f3ef 8305 mrs r3, IPSR
- 8013f30: 617b str r3, [r7, #20]
- return(result);
- 8013f32: 697b ldr r3, [r7, #20]
- if (IS_IRQ()) {
- 8013f34: 2b00 cmp r3, #0
- 8013f36: d028 beq.n 8013f8a <osMessageQueuePut+0x76>
- if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) {
- 8013f38: 69bb ldr r3, [r7, #24]
- 8013f3a: 2b00 cmp r3, #0
- 8013f3c: d005 beq.n 8013f4a <osMessageQueuePut+0x36>
- 8013f3e: 68bb ldr r3, [r7, #8]
- 8013f40: 2b00 cmp r3, #0
- 8013f42: d002 beq.n 8013f4a <osMessageQueuePut+0x36>
- 8013f44: 683b ldr r3, [r7, #0]
- 8013f46: 2b00 cmp r3, #0
- 8013f48: d003 beq.n 8013f52 <osMessageQueuePut+0x3e>
- stat = osErrorParameter;
- 8013f4a: f06f 0303 mvn.w r3, #3
- 8013f4e: 61fb str r3, [r7, #28]
- 8013f50: e038 b.n 8013fc4 <osMessageQueuePut+0xb0>
- }
- else {
- yield = pdFALSE;
- 8013f52: 2300 movs r3, #0
- 8013f54: 613b str r3, [r7, #16]
- if (xQueueSendToBackFromISR (hQueue, msg_ptr, &yield) != pdTRUE) {
- 8013f56: f107 0210 add.w r2, r7, #16
- 8013f5a: 2300 movs r3, #0
- 8013f5c: 68b9 ldr r1, [r7, #8]
- 8013f5e: 69b8 ldr r0, [r7, #24]
- 8013f60: f000 fc7e bl 8014860 <xQueueGenericSendFromISR>
- 8013f64: 4603 mov r3, r0
- 8013f66: 2b01 cmp r3, #1
- 8013f68: d003 beq.n 8013f72 <osMessageQueuePut+0x5e>
- stat = osErrorResource;
- 8013f6a: f06f 0302 mvn.w r3, #2
- 8013f6e: 61fb str r3, [r7, #28]
- 8013f70: e028 b.n 8013fc4 <osMessageQueuePut+0xb0>
- } else {
- portYIELD_FROM_ISR (yield);
- 8013f72: 693b ldr r3, [r7, #16]
- 8013f74: 2b00 cmp r3, #0
- 8013f76: d025 beq.n 8013fc4 <osMessageQueuePut+0xb0>
- 8013f78: 4b15 ldr r3, [pc, #84] @ (8013fd0 <osMessageQueuePut+0xbc>)
- 8013f7a: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 8013f7e: 601a str r2, [r3, #0]
- 8013f80: f3bf 8f4f dsb sy
- 8013f84: f3bf 8f6f isb sy
- 8013f88: e01c b.n 8013fc4 <osMessageQueuePut+0xb0>
- }
- }
- }
- else {
- if ((hQueue == NULL) || (msg_ptr == NULL)) {
- 8013f8a: 69bb ldr r3, [r7, #24]
- 8013f8c: 2b00 cmp r3, #0
- 8013f8e: d002 beq.n 8013f96 <osMessageQueuePut+0x82>
- 8013f90: 68bb ldr r3, [r7, #8]
- 8013f92: 2b00 cmp r3, #0
- 8013f94: d103 bne.n 8013f9e <osMessageQueuePut+0x8a>
- stat = osErrorParameter;
- 8013f96: f06f 0303 mvn.w r3, #3
- 8013f9a: 61fb str r3, [r7, #28]
- 8013f9c: e012 b.n 8013fc4 <osMessageQueuePut+0xb0>
- }
- else {
- if (xQueueSendToBack (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) {
- 8013f9e: 2300 movs r3, #0
- 8013fa0: 683a ldr r2, [r7, #0]
- 8013fa2: 68b9 ldr r1, [r7, #8]
- 8013fa4: 69b8 ldr r0, [r7, #24]
- 8013fa6: f000 fb59 bl 801465c <xQueueGenericSend>
- 8013faa: 4603 mov r3, r0
- 8013fac: 2b01 cmp r3, #1
- 8013fae: d009 beq.n 8013fc4 <osMessageQueuePut+0xb0>
- if (timeout != 0U) {
- 8013fb0: 683b ldr r3, [r7, #0]
- 8013fb2: 2b00 cmp r3, #0
- 8013fb4: d003 beq.n 8013fbe <osMessageQueuePut+0xaa>
- stat = osErrorTimeout;
- 8013fb6: f06f 0301 mvn.w r3, #1
- 8013fba: 61fb str r3, [r7, #28]
- 8013fbc: e002 b.n 8013fc4 <osMessageQueuePut+0xb0>
- } else {
- stat = osErrorResource;
- 8013fbe: f06f 0302 mvn.w r3, #2
- 8013fc2: 61fb str r3, [r7, #28]
- }
- }
- }
- }
- return (stat);
- 8013fc4: 69fb ldr r3, [r7, #28]
- }
- 8013fc6: 4618 mov r0, r3
- 8013fc8: 3720 adds r7, #32
- 8013fca: 46bd mov sp, r7
- 8013fcc: bd80 pop {r7, pc}
- 8013fce: bf00 nop
- 8013fd0: e000ed04 .word 0xe000ed04
- 08013fd4 <osMessageQueueGet>:
- osStatus_t osMessageQueueGet (osMessageQueueId_t mq_id, void *msg_ptr, uint8_t *msg_prio, uint32_t timeout) {
- 8013fd4: b580 push {r7, lr}
- 8013fd6: b088 sub sp, #32
- 8013fd8: af00 add r7, sp, #0
- 8013fda: 60f8 str r0, [r7, #12]
- 8013fdc: 60b9 str r1, [r7, #8]
- 8013fde: 607a str r2, [r7, #4]
- 8013fe0: 603b str r3, [r7, #0]
- QueueHandle_t hQueue = (QueueHandle_t)mq_id;
- 8013fe2: 68fb ldr r3, [r7, #12]
- 8013fe4: 61bb str r3, [r7, #24]
- osStatus_t stat;
- BaseType_t yield;
- (void)msg_prio; /* Message priority is ignored */
- stat = osOK;
- 8013fe6: 2300 movs r3, #0
- 8013fe8: 61fb str r3, [r7, #28]
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- 8013fea: f3ef 8305 mrs r3, IPSR
- 8013fee: 617b str r3, [r7, #20]
- return(result);
- 8013ff0: 697b ldr r3, [r7, #20]
- if (IS_IRQ()) {
- 8013ff2: 2b00 cmp r3, #0
- 8013ff4: d028 beq.n 8014048 <osMessageQueueGet+0x74>
- if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) {
- 8013ff6: 69bb ldr r3, [r7, #24]
- 8013ff8: 2b00 cmp r3, #0
- 8013ffa: d005 beq.n 8014008 <osMessageQueueGet+0x34>
- 8013ffc: 68bb ldr r3, [r7, #8]
- 8013ffe: 2b00 cmp r3, #0
- 8014000: d002 beq.n 8014008 <osMessageQueueGet+0x34>
- 8014002: 683b ldr r3, [r7, #0]
- 8014004: 2b00 cmp r3, #0
- 8014006: d003 beq.n 8014010 <osMessageQueueGet+0x3c>
- stat = osErrorParameter;
- 8014008: f06f 0303 mvn.w r3, #3
- 801400c: 61fb str r3, [r7, #28]
- 801400e: e037 b.n 8014080 <osMessageQueueGet+0xac>
- }
- else {
- yield = pdFALSE;
- 8014010: 2300 movs r3, #0
- 8014012: 613b str r3, [r7, #16]
- if (xQueueReceiveFromISR (hQueue, msg_ptr, &yield) != pdPASS) {
- 8014014: f107 0310 add.w r3, r7, #16
- 8014018: 461a mov r2, r3
- 801401a: 68b9 ldr r1, [r7, #8]
- 801401c: 69b8 ldr r0, [r7, #24]
- 801401e: f000 feaf bl 8014d80 <xQueueReceiveFromISR>
- 8014022: 4603 mov r3, r0
- 8014024: 2b01 cmp r3, #1
- 8014026: d003 beq.n 8014030 <osMessageQueueGet+0x5c>
- stat = osErrorResource;
- 8014028: f06f 0302 mvn.w r3, #2
- 801402c: 61fb str r3, [r7, #28]
- 801402e: e027 b.n 8014080 <osMessageQueueGet+0xac>
- } else {
- portYIELD_FROM_ISR (yield);
- 8014030: 693b ldr r3, [r7, #16]
- 8014032: 2b00 cmp r3, #0
- 8014034: d024 beq.n 8014080 <osMessageQueueGet+0xac>
- 8014036: 4b15 ldr r3, [pc, #84] @ (801408c <osMessageQueueGet+0xb8>)
- 8014038: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 801403c: 601a str r2, [r3, #0]
- 801403e: f3bf 8f4f dsb sy
- 8014042: f3bf 8f6f isb sy
- 8014046: e01b b.n 8014080 <osMessageQueueGet+0xac>
- }
- }
- }
- else {
- if ((hQueue == NULL) || (msg_ptr == NULL)) {
- 8014048: 69bb ldr r3, [r7, #24]
- 801404a: 2b00 cmp r3, #0
- 801404c: d002 beq.n 8014054 <osMessageQueueGet+0x80>
- 801404e: 68bb ldr r3, [r7, #8]
- 8014050: 2b00 cmp r3, #0
- 8014052: d103 bne.n 801405c <osMessageQueueGet+0x88>
- stat = osErrorParameter;
- 8014054: f06f 0303 mvn.w r3, #3
- 8014058: 61fb str r3, [r7, #28]
- 801405a: e011 b.n 8014080 <osMessageQueueGet+0xac>
- }
- else {
- if (xQueueReceive (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) {
- 801405c: 683a ldr r2, [r7, #0]
- 801405e: 68b9 ldr r1, [r7, #8]
- 8014060: 69b8 ldr r0, [r7, #24]
- 8014062: f000 fc9b bl 801499c <xQueueReceive>
- 8014066: 4603 mov r3, r0
- 8014068: 2b01 cmp r3, #1
- 801406a: d009 beq.n 8014080 <osMessageQueueGet+0xac>
- if (timeout != 0U) {
- 801406c: 683b ldr r3, [r7, #0]
- 801406e: 2b00 cmp r3, #0
- 8014070: d003 beq.n 801407a <osMessageQueueGet+0xa6>
- stat = osErrorTimeout;
- 8014072: f06f 0301 mvn.w r3, #1
- 8014076: 61fb str r3, [r7, #28]
- 8014078: e002 b.n 8014080 <osMessageQueueGet+0xac>
- } else {
- stat = osErrorResource;
- 801407a: f06f 0302 mvn.w r3, #2
- 801407e: 61fb str r3, [r7, #28]
- }
- }
- }
- }
- return (stat);
- 8014080: 69fb ldr r3, [r7, #28]
- }
- 8014082: 4618 mov r0, r3
- 8014084: 3720 adds r7, #32
- 8014086: 46bd mov sp, r7
- 8014088: bd80 pop {r7, pc}
- 801408a: bf00 nop
- 801408c: e000ed04 .word 0xe000ed04
- 08014090 <vApplicationGetIdleTaskMemory>:
- /*
- vApplicationGetIdleTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
- equals to 1 and is required for static memory allocation support.
- */
- __WEAK void vApplicationGetIdleTaskMemory (StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize) {
- 8014090: b480 push {r7}
- 8014092: b085 sub sp, #20
- 8014094: af00 add r7, sp, #0
- 8014096: 60f8 str r0, [r7, #12]
- 8014098: 60b9 str r1, [r7, #8]
- 801409a: 607a str r2, [r7, #4]
- /* Idle task control block and stack */
- static StaticTask_t Idle_TCB;
- static StackType_t Idle_Stack[configMINIMAL_STACK_SIZE];
- *ppxIdleTaskTCBBuffer = &Idle_TCB;
- 801409c: 68fb ldr r3, [r7, #12]
- 801409e: 4a07 ldr r2, [pc, #28] @ (80140bc <vApplicationGetIdleTaskMemory+0x2c>)
- 80140a0: 601a str r2, [r3, #0]
- *ppxIdleTaskStackBuffer = &Idle_Stack[0];
- 80140a2: 68bb ldr r3, [r7, #8]
- 80140a4: 4a06 ldr r2, [pc, #24] @ (80140c0 <vApplicationGetIdleTaskMemory+0x30>)
- 80140a6: 601a str r2, [r3, #0]
- *pulIdleTaskStackSize = (uint32_t)configMINIMAL_STACK_SIZE;
- 80140a8: 687b ldr r3, [r7, #4]
- 80140aa: f44f 7200 mov.w r2, #512 @ 0x200
- 80140ae: 601a str r2, [r3, #0]
- }
- 80140b0: bf00 nop
- 80140b2: 3714 adds r7, #20
- 80140b4: 46bd mov sp, r7
- 80140b6: f85d 7b04 ldr.w r7, [sp], #4
- 80140ba: 4770 bx lr
- 80140bc: 24000d04 .word 0x24000d04
- 80140c0: 24000dac .word 0x24000dac
- 080140c4 <vApplicationGetTimerTaskMemory>:
- /*
- vApplicationGetTimerTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
- equals to 1 and is required for static memory allocation support.
- */
- __WEAK void vApplicationGetTimerTaskMemory (StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize) {
- 80140c4: b480 push {r7}
- 80140c6: b085 sub sp, #20
- 80140c8: af00 add r7, sp, #0
- 80140ca: 60f8 str r0, [r7, #12]
- 80140cc: 60b9 str r1, [r7, #8]
- 80140ce: 607a str r2, [r7, #4]
- /* Timer task control block and stack */
- static StaticTask_t Timer_TCB;
- static StackType_t Timer_Stack[configTIMER_TASK_STACK_DEPTH];
- *ppxTimerTaskTCBBuffer = &Timer_TCB;
- 80140d0: 68fb ldr r3, [r7, #12]
- 80140d2: 4a07 ldr r2, [pc, #28] @ (80140f0 <vApplicationGetTimerTaskMemory+0x2c>)
- 80140d4: 601a str r2, [r3, #0]
- *ppxTimerTaskStackBuffer = &Timer_Stack[0];
- 80140d6: 68bb ldr r3, [r7, #8]
- 80140d8: 4a06 ldr r2, [pc, #24] @ (80140f4 <vApplicationGetTimerTaskMemory+0x30>)
- 80140da: 601a str r2, [r3, #0]
- *pulTimerTaskStackSize = (uint32_t)configTIMER_TASK_STACK_DEPTH;
- 80140dc: 687b ldr r3, [r7, #4]
- 80140de: f44f 6280 mov.w r2, #1024 @ 0x400
- 80140e2: 601a str r2, [r3, #0]
- }
- 80140e4: bf00 nop
- 80140e6: 3714 adds r7, #20
- 80140e8: 46bd mov sp, r7
- 80140ea: f85d 7b04 ldr.w r7, [sp], #4
- 80140ee: 4770 bx lr
- 80140f0: 240015ac .word 0x240015ac
- 80140f4: 24001654 .word 0x24001654
- 080140f8 <vListInitialise>:
- /*-----------------------------------------------------------
- * PUBLIC LIST API documented in list.h
- *----------------------------------------------------------*/
- void vListInitialise( List_t * const pxList )
- {
- 80140f8: b480 push {r7}
- 80140fa: b083 sub sp, #12
- 80140fc: af00 add r7, sp, #0
- 80140fe: 6078 str r0, [r7, #4]
- /* The list structure contains a list item which is used to mark the
- end of the list. To initialise the list the list end is inserted
- as the only list entry. */
- pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
- 8014100: 687b ldr r3, [r7, #4]
- 8014102: f103 0208 add.w r2, r3, #8
- 8014106: 687b ldr r3, [r7, #4]
- 8014108: 605a str r2, [r3, #4]
- /* The list end value is the highest possible value in the list to
- ensure it remains at the end of the list. */
- pxList->xListEnd.xItemValue = portMAX_DELAY;
- 801410a: 687b ldr r3, [r7, #4]
- 801410c: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
- 8014110: 609a str r2, [r3, #8]
- /* The list end next and previous pointers point to itself so we know
- when the list is empty. */
- pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
- 8014112: 687b ldr r3, [r7, #4]
- 8014114: f103 0208 add.w r2, r3, #8
- 8014118: 687b ldr r3, [r7, #4]
- 801411a: 60da str r2, [r3, #12]
- pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
- 801411c: 687b ldr r3, [r7, #4]
- 801411e: f103 0208 add.w r2, r3, #8
- 8014122: 687b ldr r3, [r7, #4]
- 8014124: 611a str r2, [r3, #16]
- pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
- 8014126: 687b ldr r3, [r7, #4]
- 8014128: 2200 movs r2, #0
- 801412a: 601a str r2, [r3, #0]
- /* Write known values into the list if
- configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
- listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
- listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
- }
- 801412c: bf00 nop
- 801412e: 370c adds r7, #12
- 8014130: 46bd mov sp, r7
- 8014132: f85d 7b04 ldr.w r7, [sp], #4
- 8014136: 4770 bx lr
- 08014138 <vListInitialiseItem>:
- /*-----------------------------------------------------------*/
- void vListInitialiseItem( ListItem_t * const pxItem )
- {
- 8014138: b480 push {r7}
- 801413a: b083 sub sp, #12
- 801413c: af00 add r7, sp, #0
- 801413e: 6078 str r0, [r7, #4]
- /* Make sure the list item is not recorded as being on a list. */
- pxItem->pxContainer = NULL;
- 8014140: 687b ldr r3, [r7, #4]
- 8014142: 2200 movs r2, #0
- 8014144: 611a str r2, [r3, #16]
- /* Write known values into the list item if
- configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
- listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
- listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
- }
- 8014146: bf00 nop
- 8014148: 370c adds r7, #12
- 801414a: 46bd mov sp, r7
- 801414c: f85d 7b04 ldr.w r7, [sp], #4
- 8014150: 4770 bx lr
- 08014152 <vListInsertEnd>:
- /*-----------------------------------------------------------*/
- void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
- {
- 8014152: b480 push {r7}
- 8014154: b085 sub sp, #20
- 8014156: af00 add r7, sp, #0
- 8014158: 6078 str r0, [r7, #4]
- 801415a: 6039 str r1, [r7, #0]
- ListItem_t * const pxIndex = pxList->pxIndex;
- 801415c: 687b ldr r3, [r7, #4]
- 801415e: 685b ldr r3, [r3, #4]
- 8014160: 60fb str r3, [r7, #12]
- listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
- /* Insert a new list item into pxList, but rather than sort the list,
- makes the new list item the last item to be removed by a call to
- listGET_OWNER_OF_NEXT_ENTRY(). */
- pxNewListItem->pxNext = pxIndex;
- 8014162: 683b ldr r3, [r7, #0]
- 8014164: 68fa ldr r2, [r7, #12]
- 8014166: 605a str r2, [r3, #4]
- pxNewListItem->pxPrevious = pxIndex->pxPrevious;
- 8014168: 68fb ldr r3, [r7, #12]
- 801416a: 689a ldr r2, [r3, #8]
- 801416c: 683b ldr r3, [r7, #0]
- 801416e: 609a str r2, [r3, #8]
- /* Only used during decision coverage testing. */
- mtCOVERAGE_TEST_DELAY();
- pxIndex->pxPrevious->pxNext = pxNewListItem;
- 8014170: 68fb ldr r3, [r7, #12]
- 8014172: 689b ldr r3, [r3, #8]
- 8014174: 683a ldr r2, [r7, #0]
- 8014176: 605a str r2, [r3, #4]
- pxIndex->pxPrevious = pxNewListItem;
- 8014178: 68fb ldr r3, [r7, #12]
- 801417a: 683a ldr r2, [r7, #0]
- 801417c: 609a str r2, [r3, #8]
- /* Remember which list the item is in. */
- pxNewListItem->pxContainer = pxList;
- 801417e: 683b ldr r3, [r7, #0]
- 8014180: 687a ldr r2, [r7, #4]
- 8014182: 611a str r2, [r3, #16]
- ( pxList->uxNumberOfItems )++;
- 8014184: 687b ldr r3, [r7, #4]
- 8014186: 681b ldr r3, [r3, #0]
- 8014188: 1c5a adds r2, r3, #1
- 801418a: 687b ldr r3, [r7, #4]
- 801418c: 601a str r2, [r3, #0]
- }
- 801418e: bf00 nop
- 8014190: 3714 adds r7, #20
- 8014192: 46bd mov sp, r7
- 8014194: f85d 7b04 ldr.w r7, [sp], #4
- 8014198: 4770 bx lr
- 0801419a <vListInsert>:
- /*-----------------------------------------------------------*/
- void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
- {
- 801419a: b480 push {r7}
- 801419c: b085 sub sp, #20
- 801419e: af00 add r7, sp, #0
- 80141a0: 6078 str r0, [r7, #4]
- 80141a2: 6039 str r1, [r7, #0]
- ListItem_t *pxIterator;
- const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
- 80141a4: 683b ldr r3, [r7, #0]
- 80141a6: 681b ldr r3, [r3, #0]
- 80141a8: 60bb str r3, [r7, #8]
- new list item should be placed after it. This ensures that TCBs which are
- stored in ready lists (all of which have the same xItemValue value) get a
- share of the CPU. However, if the xItemValue is the same as the back marker
- the iteration loop below will not end. Therefore the value is checked
- first, and the algorithm slightly modified if necessary. */
- if( xValueOfInsertion == portMAX_DELAY )
- 80141aa: 68bb ldr r3, [r7, #8]
- 80141ac: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 80141b0: d103 bne.n 80141ba <vListInsert+0x20>
- {
- pxIterator = pxList->xListEnd.pxPrevious;
- 80141b2: 687b ldr r3, [r7, #4]
- 80141b4: 691b ldr r3, [r3, #16]
- 80141b6: 60fb str r3, [r7, #12]
- 80141b8: e00c b.n 80141d4 <vListInsert+0x3a>
- 4) Using a queue or semaphore before it has been initialised or
- before the scheduler has been started (are interrupts firing
- before vTaskStartScheduler() has been called?).
- **********************************************************************/
- for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
- 80141ba: 687b ldr r3, [r7, #4]
- 80141bc: 3308 adds r3, #8
- 80141be: 60fb str r3, [r7, #12]
- 80141c0: e002 b.n 80141c8 <vListInsert+0x2e>
- 80141c2: 68fb ldr r3, [r7, #12]
- 80141c4: 685b ldr r3, [r3, #4]
- 80141c6: 60fb str r3, [r7, #12]
- 80141c8: 68fb ldr r3, [r7, #12]
- 80141ca: 685b ldr r3, [r3, #4]
- 80141cc: 681b ldr r3, [r3, #0]
- 80141ce: 68ba ldr r2, [r7, #8]
- 80141d0: 429a cmp r2, r3
- 80141d2: d2f6 bcs.n 80141c2 <vListInsert+0x28>
- /* There is nothing to do here, just iterating to the wanted
- insertion position. */
- }
- }
- pxNewListItem->pxNext = pxIterator->pxNext;
- 80141d4: 68fb ldr r3, [r7, #12]
- 80141d6: 685a ldr r2, [r3, #4]
- 80141d8: 683b ldr r3, [r7, #0]
- 80141da: 605a str r2, [r3, #4]
- pxNewListItem->pxNext->pxPrevious = pxNewListItem;
- 80141dc: 683b ldr r3, [r7, #0]
- 80141de: 685b ldr r3, [r3, #4]
- 80141e0: 683a ldr r2, [r7, #0]
- 80141e2: 609a str r2, [r3, #8]
- pxNewListItem->pxPrevious = pxIterator;
- 80141e4: 683b ldr r3, [r7, #0]
- 80141e6: 68fa ldr r2, [r7, #12]
- 80141e8: 609a str r2, [r3, #8]
- pxIterator->pxNext = pxNewListItem;
- 80141ea: 68fb ldr r3, [r7, #12]
- 80141ec: 683a ldr r2, [r7, #0]
- 80141ee: 605a str r2, [r3, #4]
- /* Remember which list the item is in. This allows fast removal of the
- item later. */
- pxNewListItem->pxContainer = pxList;
- 80141f0: 683b ldr r3, [r7, #0]
- 80141f2: 687a ldr r2, [r7, #4]
- 80141f4: 611a str r2, [r3, #16]
- ( pxList->uxNumberOfItems )++;
- 80141f6: 687b ldr r3, [r7, #4]
- 80141f8: 681b ldr r3, [r3, #0]
- 80141fa: 1c5a adds r2, r3, #1
- 80141fc: 687b ldr r3, [r7, #4]
- 80141fe: 601a str r2, [r3, #0]
- }
- 8014200: bf00 nop
- 8014202: 3714 adds r7, #20
- 8014204: 46bd mov sp, r7
- 8014206: f85d 7b04 ldr.w r7, [sp], #4
- 801420a: 4770 bx lr
- 0801420c <uxListRemove>:
- /*-----------------------------------------------------------*/
- UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
- {
- 801420c: b480 push {r7}
- 801420e: b085 sub sp, #20
- 8014210: af00 add r7, sp, #0
- 8014212: 6078 str r0, [r7, #4]
- /* The list item knows which list it is in. Obtain the list from the list
- item. */
- List_t * const pxList = pxItemToRemove->pxContainer;
- 8014214: 687b ldr r3, [r7, #4]
- 8014216: 691b ldr r3, [r3, #16]
- 8014218: 60fb str r3, [r7, #12]
- pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
- 801421a: 687b ldr r3, [r7, #4]
- 801421c: 685b ldr r3, [r3, #4]
- 801421e: 687a ldr r2, [r7, #4]
- 8014220: 6892 ldr r2, [r2, #8]
- 8014222: 609a str r2, [r3, #8]
- pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
- 8014224: 687b ldr r3, [r7, #4]
- 8014226: 689b ldr r3, [r3, #8]
- 8014228: 687a ldr r2, [r7, #4]
- 801422a: 6852 ldr r2, [r2, #4]
- 801422c: 605a str r2, [r3, #4]
- /* Only used during decision coverage testing. */
- mtCOVERAGE_TEST_DELAY();
- /* Make sure the index is left pointing to a valid item. */
- if( pxList->pxIndex == pxItemToRemove )
- 801422e: 68fb ldr r3, [r7, #12]
- 8014230: 685b ldr r3, [r3, #4]
- 8014232: 687a ldr r2, [r7, #4]
- 8014234: 429a cmp r2, r3
- 8014236: d103 bne.n 8014240 <uxListRemove+0x34>
- {
- pxList->pxIndex = pxItemToRemove->pxPrevious;
- 8014238: 687b ldr r3, [r7, #4]
- 801423a: 689a ldr r2, [r3, #8]
- 801423c: 68fb ldr r3, [r7, #12]
- 801423e: 605a str r2, [r3, #4]
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- pxItemToRemove->pxContainer = NULL;
- 8014240: 687b ldr r3, [r7, #4]
- 8014242: 2200 movs r2, #0
- 8014244: 611a str r2, [r3, #16]
- ( pxList->uxNumberOfItems )--;
- 8014246: 68fb ldr r3, [r7, #12]
- 8014248: 681b ldr r3, [r3, #0]
- 801424a: 1e5a subs r2, r3, #1
- 801424c: 68fb ldr r3, [r7, #12]
- 801424e: 601a str r2, [r3, #0]
- return pxList->uxNumberOfItems;
- 8014250: 68fb ldr r3, [r7, #12]
- 8014252: 681b ldr r3, [r3, #0]
- }
- 8014254: 4618 mov r0, r3
- 8014256: 3714 adds r7, #20
- 8014258: 46bd mov sp, r7
- 801425a: f85d 7b04 ldr.w r7, [sp], #4
- 801425e: 4770 bx lr
- 08014260 <xQueueGenericReset>:
- } \
- taskEXIT_CRITICAL()
- /*-----------------------------------------------------------*/
- BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )
- {
- 8014260: b580 push {r7, lr}
- 8014262: b084 sub sp, #16
- 8014264: af00 add r7, sp, #0
- 8014266: 6078 str r0, [r7, #4]
- 8014268: 6039 str r1, [r7, #0]
- Queue_t * const pxQueue = xQueue;
- 801426a: 687b ldr r3, [r7, #4]
- 801426c: 60fb str r3, [r7, #12]
- configASSERT( pxQueue );
- 801426e: 68fb ldr r3, [r7, #12]
- 8014270: 2b00 cmp r3, #0
- 8014272: d10b bne.n 801428c <xQueueGenericReset+0x2c>
- portFORCE_INLINE static void vPortRaiseBASEPRI( void )
- {
- uint32_t ulNewBASEPRI;
- __asm volatile
- 8014274: f04f 0350 mov.w r3, #80 @ 0x50
- 8014278: f383 8811 msr BASEPRI, r3
- 801427c: f3bf 8f6f isb sy
- 8014280: f3bf 8f4f dsb sy
- 8014284: 60bb str r3, [r7, #8]
- " msr basepri, %0 \n" \
- " isb \n" \
- " dsb \n" \
- :"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
- );
- }
- 8014286: bf00 nop
- 8014288: bf00 nop
- 801428a: e7fd b.n 8014288 <xQueueGenericReset+0x28>
- taskENTER_CRITICAL();
- 801428c: f003 f964 bl 8017558 <vPortEnterCritical>
- {
- pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
- 8014290: 68fb ldr r3, [r7, #12]
- 8014292: 681a ldr r2, [r3, #0]
- 8014294: 68fb ldr r3, [r7, #12]
- 8014296: 6bdb ldr r3, [r3, #60] @ 0x3c
- 8014298: 68f9 ldr r1, [r7, #12]
- 801429a: 6c09 ldr r1, [r1, #64] @ 0x40
- 801429c: fb01 f303 mul.w r3, r1, r3
- 80142a0: 441a add r2, r3
- 80142a2: 68fb ldr r3, [r7, #12]
- 80142a4: 609a str r2, [r3, #8]
- pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
- 80142a6: 68fb ldr r3, [r7, #12]
- 80142a8: 2200 movs r2, #0
- 80142aa: 639a str r2, [r3, #56] @ 0x38
- pxQueue->pcWriteTo = pxQueue->pcHead;
- 80142ac: 68fb ldr r3, [r7, #12]
- 80142ae: 681a ldr r2, [r3, #0]
- 80142b0: 68fb ldr r3, [r7, #12]
- 80142b2: 605a str r2, [r3, #4]
- pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
- 80142b4: 68fb ldr r3, [r7, #12]
- 80142b6: 681a ldr r2, [r3, #0]
- 80142b8: 68fb ldr r3, [r7, #12]
- 80142ba: 6bdb ldr r3, [r3, #60] @ 0x3c
- 80142bc: 3b01 subs r3, #1
- 80142be: 68f9 ldr r1, [r7, #12]
- 80142c0: 6c09 ldr r1, [r1, #64] @ 0x40
- 80142c2: fb01 f303 mul.w r3, r1, r3
- 80142c6: 441a add r2, r3
- 80142c8: 68fb ldr r3, [r7, #12]
- 80142ca: 60da str r2, [r3, #12]
- pxQueue->cRxLock = queueUNLOCKED;
- 80142cc: 68fb ldr r3, [r7, #12]
- 80142ce: 22ff movs r2, #255 @ 0xff
- 80142d0: f883 2044 strb.w r2, [r3, #68] @ 0x44
- pxQueue->cTxLock = queueUNLOCKED;
- 80142d4: 68fb ldr r3, [r7, #12]
- 80142d6: 22ff movs r2, #255 @ 0xff
- 80142d8: f883 2045 strb.w r2, [r3, #69] @ 0x45
- if( xNewQueue == pdFALSE )
- 80142dc: 683b ldr r3, [r7, #0]
- 80142de: 2b00 cmp r3, #0
- 80142e0: d114 bne.n 801430c <xQueueGenericReset+0xac>
- /* If there are tasks blocked waiting to read from the queue, then
- the tasks will remain blocked as after this function exits the queue
- will still be empty. If there are tasks blocked waiting to write to
- the queue, then one should be unblocked as after this function exits
- it will be possible to write to it. */
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
- 80142e2: 68fb ldr r3, [r7, #12]
- 80142e4: 691b ldr r3, [r3, #16]
- 80142e6: 2b00 cmp r3, #0
- 80142e8: d01a beq.n 8014320 <xQueueGenericReset+0xc0>
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
- 80142ea: 68fb ldr r3, [r7, #12]
- 80142ec: 3310 adds r3, #16
- 80142ee: 4618 mov r0, r3
- 80142f0: f001 fdac bl 8015e4c <xTaskRemoveFromEventList>
- 80142f4: 4603 mov r3, r0
- 80142f6: 2b00 cmp r3, #0
- 80142f8: d012 beq.n 8014320 <xQueueGenericReset+0xc0>
- {
- queueYIELD_IF_USING_PREEMPTION();
- 80142fa: 4b0d ldr r3, [pc, #52] @ (8014330 <xQueueGenericReset+0xd0>)
- 80142fc: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 8014300: 601a str r2, [r3, #0]
- 8014302: f3bf 8f4f dsb sy
- 8014306: f3bf 8f6f isb sy
- 801430a: e009 b.n 8014320 <xQueueGenericReset+0xc0>
- }
- }
- else
- {
- /* Ensure the event queues start in the correct state. */
- vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
- 801430c: 68fb ldr r3, [r7, #12]
- 801430e: 3310 adds r3, #16
- 8014310: 4618 mov r0, r3
- 8014312: f7ff fef1 bl 80140f8 <vListInitialise>
- vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
- 8014316: 68fb ldr r3, [r7, #12]
- 8014318: 3324 adds r3, #36 @ 0x24
- 801431a: 4618 mov r0, r3
- 801431c: f7ff feec bl 80140f8 <vListInitialise>
- }
- }
- taskEXIT_CRITICAL();
- 8014320: f003 f94c bl 80175bc <vPortExitCritical>
- /* A value is returned for calling semantic consistency with previous
- versions. */
- return pdPASS;
- 8014324: 2301 movs r3, #1
- }
- 8014326: 4618 mov r0, r3
- 8014328: 3710 adds r7, #16
- 801432a: 46bd mov sp, r7
- 801432c: bd80 pop {r7, pc}
- 801432e: bf00 nop
- 8014330: e000ed04 .word 0xe000ed04
- 08014334 <xQueueGenericCreateStatic>:
- /*-----------------------------------------------------------*/
- #if( configSUPPORT_STATIC_ALLOCATION == 1 )
- QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )
- {
- 8014334: b580 push {r7, lr}
- 8014336: b08e sub sp, #56 @ 0x38
- 8014338: af02 add r7, sp, #8
- 801433a: 60f8 str r0, [r7, #12]
- 801433c: 60b9 str r1, [r7, #8]
- 801433e: 607a str r2, [r7, #4]
- 8014340: 603b str r3, [r7, #0]
- Queue_t *pxNewQueue;
- configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
- 8014342: 68fb ldr r3, [r7, #12]
- 8014344: 2b00 cmp r3, #0
- 8014346: d10b bne.n 8014360 <xQueueGenericCreateStatic+0x2c>
- __asm volatile
- 8014348: f04f 0350 mov.w r3, #80 @ 0x50
- 801434c: f383 8811 msr BASEPRI, r3
- 8014350: f3bf 8f6f isb sy
- 8014354: f3bf 8f4f dsb sy
- 8014358: 62bb str r3, [r7, #40] @ 0x28
- }
- 801435a: bf00 nop
- 801435c: bf00 nop
- 801435e: e7fd b.n 801435c <xQueueGenericCreateStatic+0x28>
- /* The StaticQueue_t structure and the queue storage area must be
- supplied. */
- configASSERT( pxStaticQueue != NULL );
- 8014360: 683b ldr r3, [r7, #0]
- 8014362: 2b00 cmp r3, #0
- 8014364: d10b bne.n 801437e <xQueueGenericCreateStatic+0x4a>
- __asm volatile
- 8014366: f04f 0350 mov.w r3, #80 @ 0x50
- 801436a: f383 8811 msr BASEPRI, r3
- 801436e: f3bf 8f6f isb sy
- 8014372: f3bf 8f4f dsb sy
- 8014376: 627b str r3, [r7, #36] @ 0x24
- }
- 8014378: bf00 nop
- 801437a: bf00 nop
- 801437c: e7fd b.n 801437a <xQueueGenericCreateStatic+0x46>
- /* A queue storage area should be provided if the item size is not 0, and
- should not be provided if the item size is 0. */
- configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
- 801437e: 687b ldr r3, [r7, #4]
- 8014380: 2b00 cmp r3, #0
- 8014382: d002 beq.n 801438a <xQueueGenericCreateStatic+0x56>
- 8014384: 68bb ldr r3, [r7, #8]
- 8014386: 2b00 cmp r3, #0
- 8014388: d001 beq.n 801438e <xQueueGenericCreateStatic+0x5a>
- 801438a: 2301 movs r3, #1
- 801438c: e000 b.n 8014390 <xQueueGenericCreateStatic+0x5c>
- 801438e: 2300 movs r3, #0
- 8014390: 2b00 cmp r3, #0
- 8014392: d10b bne.n 80143ac <xQueueGenericCreateStatic+0x78>
- __asm volatile
- 8014394: f04f 0350 mov.w r3, #80 @ 0x50
- 8014398: f383 8811 msr BASEPRI, r3
- 801439c: f3bf 8f6f isb sy
- 80143a0: f3bf 8f4f dsb sy
- 80143a4: 623b str r3, [r7, #32]
- }
- 80143a6: bf00 nop
- 80143a8: bf00 nop
- 80143aa: e7fd b.n 80143a8 <xQueueGenericCreateStatic+0x74>
- configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
- 80143ac: 687b ldr r3, [r7, #4]
- 80143ae: 2b00 cmp r3, #0
- 80143b0: d102 bne.n 80143b8 <xQueueGenericCreateStatic+0x84>
- 80143b2: 68bb ldr r3, [r7, #8]
- 80143b4: 2b00 cmp r3, #0
- 80143b6: d101 bne.n 80143bc <xQueueGenericCreateStatic+0x88>
- 80143b8: 2301 movs r3, #1
- 80143ba: e000 b.n 80143be <xQueueGenericCreateStatic+0x8a>
- 80143bc: 2300 movs r3, #0
- 80143be: 2b00 cmp r3, #0
- 80143c0: d10b bne.n 80143da <xQueueGenericCreateStatic+0xa6>
- __asm volatile
- 80143c2: f04f 0350 mov.w r3, #80 @ 0x50
- 80143c6: f383 8811 msr BASEPRI, r3
- 80143ca: f3bf 8f6f isb sy
- 80143ce: f3bf 8f4f dsb sy
- 80143d2: 61fb str r3, [r7, #28]
- }
- 80143d4: bf00 nop
- 80143d6: bf00 nop
- 80143d8: e7fd b.n 80143d6 <xQueueGenericCreateStatic+0xa2>
- #if( configASSERT_DEFINED == 1 )
- {
- /* Sanity check that the size of the structure used to declare a
- variable of type StaticQueue_t or StaticSemaphore_t equals the size of
- the real queue and semaphore structures. */
- volatile size_t xSize = sizeof( StaticQueue_t );
- 80143da: 2350 movs r3, #80 @ 0x50
- 80143dc: 617b str r3, [r7, #20]
- configASSERT( xSize == sizeof( Queue_t ) );
- 80143de: 697b ldr r3, [r7, #20]
- 80143e0: 2b50 cmp r3, #80 @ 0x50
- 80143e2: d00b beq.n 80143fc <xQueueGenericCreateStatic+0xc8>
- __asm volatile
- 80143e4: f04f 0350 mov.w r3, #80 @ 0x50
- 80143e8: f383 8811 msr BASEPRI, r3
- 80143ec: f3bf 8f6f isb sy
- 80143f0: f3bf 8f4f dsb sy
- 80143f4: 61bb str r3, [r7, #24]
- }
- 80143f6: bf00 nop
- 80143f8: bf00 nop
- 80143fa: e7fd b.n 80143f8 <xQueueGenericCreateStatic+0xc4>
- ( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
- 80143fc: 697b ldr r3, [r7, #20]
- #endif /* configASSERT_DEFINED */
- /* The address of a statically allocated queue was passed in, use it.
- The address of a statically allocated storage area was also passed in
- but is already set. */
- pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
- 80143fe: 683b ldr r3, [r7, #0]
- 8014400: 62fb str r3, [r7, #44] @ 0x2c
- if( pxNewQueue != NULL )
- 8014402: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014404: 2b00 cmp r3, #0
- 8014406: d00d beq.n 8014424 <xQueueGenericCreateStatic+0xf0>
- #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
- {
- /* Queues can be allocated wither statically or dynamically, so
- note this queue was allocated statically in case the queue is
- later deleted. */
- pxNewQueue->ucStaticallyAllocated = pdTRUE;
- 8014408: 6afb ldr r3, [r7, #44] @ 0x2c
- 801440a: 2201 movs r2, #1
- 801440c: f883 2046 strb.w r2, [r3, #70] @ 0x46
- }
- #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
- prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
- 8014410: f897 2038 ldrb.w r2, [r7, #56] @ 0x38
- 8014414: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014416: 9300 str r3, [sp, #0]
- 8014418: 4613 mov r3, r2
- 801441a: 687a ldr r2, [r7, #4]
- 801441c: 68b9 ldr r1, [r7, #8]
- 801441e: 68f8 ldr r0, [r7, #12]
- 8014420: f000 f840 bl 80144a4 <prvInitialiseNewQueue>
- {
- traceQUEUE_CREATE_FAILED( ucQueueType );
- mtCOVERAGE_TEST_MARKER();
- }
- return pxNewQueue;
- 8014424: 6afb ldr r3, [r7, #44] @ 0x2c
- }
- 8014426: 4618 mov r0, r3
- 8014428: 3730 adds r7, #48 @ 0x30
- 801442a: 46bd mov sp, r7
- 801442c: bd80 pop {r7, pc}
- 0801442e <xQueueGenericCreate>:
- /*-----------------------------------------------------------*/
- #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
- QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )
- {
- 801442e: b580 push {r7, lr}
- 8014430: b08a sub sp, #40 @ 0x28
- 8014432: af02 add r7, sp, #8
- 8014434: 60f8 str r0, [r7, #12]
- 8014436: 60b9 str r1, [r7, #8]
- 8014438: 4613 mov r3, r2
- 801443a: 71fb strb r3, [r7, #7]
- Queue_t *pxNewQueue;
- size_t xQueueSizeInBytes;
- uint8_t *pucQueueStorage;
- configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
- 801443c: 68fb ldr r3, [r7, #12]
- 801443e: 2b00 cmp r3, #0
- 8014440: d10b bne.n 801445a <xQueueGenericCreate+0x2c>
- __asm volatile
- 8014442: f04f 0350 mov.w r3, #80 @ 0x50
- 8014446: f383 8811 msr BASEPRI, r3
- 801444a: f3bf 8f6f isb sy
- 801444e: f3bf 8f4f dsb sy
- 8014452: 613b str r3, [r7, #16]
- }
- 8014454: bf00 nop
- 8014456: bf00 nop
- 8014458: e7fd b.n 8014456 <xQueueGenericCreate+0x28>
- /* Allocate enough space to hold the maximum number of items that
- can be in the queue at any time. It is valid for uxItemSize to be
- zero in the case the queue is used as a semaphore. */
- xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
- 801445a: 68fb ldr r3, [r7, #12]
- 801445c: 68ba ldr r2, [r7, #8]
- 801445e: fb02 f303 mul.w r3, r2, r3
- 8014462: 61fb str r3, [r7, #28]
- alignment requirements of the Queue_t structure - which in this case
- is an int8_t *. Therefore, whenever the stack alignment requirements
- are greater than or equal to the pointer to char requirements the cast
- is safe. In other cases alignment requirements are not strict (one or
- two bytes). */
- pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */
- 8014464: 69fb ldr r3, [r7, #28]
- 8014466: 3350 adds r3, #80 @ 0x50
- 8014468: 4618 mov r0, r3
- 801446a: f003 f997 bl 801779c <pvPortMalloc>
- 801446e: 61b8 str r0, [r7, #24]
- if( pxNewQueue != NULL )
- 8014470: 69bb ldr r3, [r7, #24]
- 8014472: 2b00 cmp r3, #0
- 8014474: d011 beq.n 801449a <xQueueGenericCreate+0x6c>
- {
- /* Jump past the queue structure to find the location of the queue
- storage area. */
- pucQueueStorage = ( uint8_t * ) pxNewQueue;
- 8014476: 69bb ldr r3, [r7, #24]
- 8014478: 617b str r3, [r7, #20]
- pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
- 801447a: 697b ldr r3, [r7, #20]
- 801447c: 3350 adds r3, #80 @ 0x50
- 801447e: 617b str r3, [r7, #20]
- #if( configSUPPORT_STATIC_ALLOCATION == 1 )
- {
- /* Queues can be created either statically or dynamically, so
- note this task was created dynamically in case it is later
- deleted. */
- pxNewQueue->ucStaticallyAllocated = pdFALSE;
- 8014480: 69bb ldr r3, [r7, #24]
- 8014482: 2200 movs r2, #0
- 8014484: f883 2046 strb.w r2, [r3, #70] @ 0x46
- }
- #endif /* configSUPPORT_STATIC_ALLOCATION */
- prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
- 8014488: 79fa ldrb r2, [r7, #7]
- 801448a: 69bb ldr r3, [r7, #24]
- 801448c: 9300 str r3, [sp, #0]
- 801448e: 4613 mov r3, r2
- 8014490: 697a ldr r2, [r7, #20]
- 8014492: 68b9 ldr r1, [r7, #8]
- 8014494: 68f8 ldr r0, [r7, #12]
- 8014496: f000 f805 bl 80144a4 <prvInitialiseNewQueue>
- {
- traceQUEUE_CREATE_FAILED( ucQueueType );
- mtCOVERAGE_TEST_MARKER();
- }
- return pxNewQueue;
- 801449a: 69bb ldr r3, [r7, #24]
- }
- 801449c: 4618 mov r0, r3
- 801449e: 3720 adds r7, #32
- 80144a0: 46bd mov sp, r7
- 80144a2: bd80 pop {r7, pc}
- 080144a4 <prvInitialiseNewQueue>:
- #endif /* configSUPPORT_STATIC_ALLOCATION */
- /*-----------------------------------------------------------*/
- static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )
- {
- 80144a4: b580 push {r7, lr}
- 80144a6: b084 sub sp, #16
- 80144a8: af00 add r7, sp, #0
- 80144aa: 60f8 str r0, [r7, #12]
- 80144ac: 60b9 str r1, [r7, #8]
- 80144ae: 607a str r2, [r7, #4]
- 80144b0: 70fb strb r3, [r7, #3]
- /* Remove compiler warnings about unused parameters should
- configUSE_TRACE_FACILITY not be set to 1. */
- ( void ) ucQueueType;
- if( uxItemSize == ( UBaseType_t ) 0 )
- 80144b2: 68bb ldr r3, [r7, #8]
- 80144b4: 2b00 cmp r3, #0
- 80144b6: d103 bne.n 80144c0 <prvInitialiseNewQueue+0x1c>
- {
- /* No RAM was allocated for the queue storage area, but PC head cannot
- be set to NULL because NULL is used as a key to say the queue is used as
- a mutex. Therefore just set pcHead to point to the queue as a benign
- value that is known to be within the memory map. */
- pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
- 80144b8: 69bb ldr r3, [r7, #24]
- 80144ba: 69ba ldr r2, [r7, #24]
- 80144bc: 601a str r2, [r3, #0]
- 80144be: e002 b.n 80144c6 <prvInitialiseNewQueue+0x22>
- }
- else
- {
- /* Set the head to the start of the queue storage area. */
- pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
- 80144c0: 69bb ldr r3, [r7, #24]
- 80144c2: 687a ldr r2, [r7, #4]
- 80144c4: 601a str r2, [r3, #0]
- }
- /* Initialise the queue members as described where the queue type is
- defined. */
- pxNewQueue->uxLength = uxQueueLength;
- 80144c6: 69bb ldr r3, [r7, #24]
- 80144c8: 68fa ldr r2, [r7, #12]
- 80144ca: 63da str r2, [r3, #60] @ 0x3c
- pxNewQueue->uxItemSize = uxItemSize;
- 80144cc: 69bb ldr r3, [r7, #24]
- 80144ce: 68ba ldr r2, [r7, #8]
- 80144d0: 641a str r2, [r3, #64] @ 0x40
- ( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
- 80144d2: 2101 movs r1, #1
- 80144d4: 69b8 ldr r0, [r7, #24]
- 80144d6: f7ff fec3 bl 8014260 <xQueueGenericReset>
- #if ( configUSE_TRACE_FACILITY == 1 )
- {
- pxNewQueue->ucQueueType = ucQueueType;
- 80144da: 69bb ldr r3, [r7, #24]
- 80144dc: 78fa ldrb r2, [r7, #3]
- 80144de: f883 204c strb.w r2, [r3, #76] @ 0x4c
- pxNewQueue->pxQueueSetContainer = NULL;
- }
- #endif /* configUSE_QUEUE_SETS */
- traceQUEUE_CREATE( pxNewQueue );
- }
- 80144e2: bf00 nop
- 80144e4: 3710 adds r7, #16
- 80144e6: 46bd mov sp, r7
- 80144e8: bd80 pop {r7, pc}
- 080144ea <prvInitialiseMutex>:
- /*-----------------------------------------------------------*/
- #if( configUSE_MUTEXES == 1 )
- static void prvInitialiseMutex( Queue_t *pxNewQueue )
- {
- 80144ea: b580 push {r7, lr}
- 80144ec: b082 sub sp, #8
- 80144ee: af00 add r7, sp, #0
- 80144f0: 6078 str r0, [r7, #4]
- if( pxNewQueue != NULL )
- 80144f2: 687b ldr r3, [r7, #4]
- 80144f4: 2b00 cmp r3, #0
- 80144f6: d00e beq.n 8014516 <prvInitialiseMutex+0x2c>
- {
- /* The queue create function will set all the queue structure members
- correctly for a generic queue, but this function is creating a
- mutex. Overwrite those members that need to be set differently -
- in particular the information required for priority inheritance. */
- pxNewQueue->u.xSemaphore.xMutexHolder = NULL;
- 80144f8: 687b ldr r3, [r7, #4]
- 80144fa: 2200 movs r2, #0
- 80144fc: 609a str r2, [r3, #8]
- pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
- 80144fe: 687b ldr r3, [r7, #4]
- 8014500: 2200 movs r2, #0
- 8014502: 601a str r2, [r3, #0]
- /* In case this is a recursive mutex. */
- pxNewQueue->u.xSemaphore.uxRecursiveCallCount = 0;
- 8014504: 687b ldr r3, [r7, #4]
- 8014506: 2200 movs r2, #0
- 8014508: 60da str r2, [r3, #12]
- traceCREATE_MUTEX( pxNewQueue );
- /* Start with the semaphore in the expected state. */
- ( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );
- 801450a: 2300 movs r3, #0
- 801450c: 2200 movs r2, #0
- 801450e: 2100 movs r1, #0
- 8014510: 6878 ldr r0, [r7, #4]
- 8014512: f000 f8a3 bl 801465c <xQueueGenericSend>
- }
- else
- {
- traceCREATE_MUTEX_FAILED();
- }
- }
- 8014516: bf00 nop
- 8014518: 3708 adds r7, #8
- 801451a: 46bd mov sp, r7
- 801451c: bd80 pop {r7, pc}
- 0801451e <xQueueCreateMutex>:
- /*-----------------------------------------------------------*/
- #if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
- QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )
- {
- 801451e: b580 push {r7, lr}
- 8014520: b086 sub sp, #24
- 8014522: af00 add r7, sp, #0
- 8014524: 4603 mov r3, r0
- 8014526: 71fb strb r3, [r7, #7]
- QueueHandle_t xNewQueue;
- const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
- 8014528: 2301 movs r3, #1
- 801452a: 617b str r3, [r7, #20]
- 801452c: 2300 movs r3, #0
- 801452e: 613b str r3, [r7, #16]
- xNewQueue = xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );
- 8014530: 79fb ldrb r3, [r7, #7]
- 8014532: 461a mov r2, r3
- 8014534: 6939 ldr r1, [r7, #16]
- 8014536: 6978 ldr r0, [r7, #20]
- 8014538: f7ff ff79 bl 801442e <xQueueGenericCreate>
- 801453c: 60f8 str r0, [r7, #12]
- prvInitialiseMutex( ( Queue_t * ) xNewQueue );
- 801453e: 68f8 ldr r0, [r7, #12]
- 8014540: f7ff ffd3 bl 80144ea <prvInitialiseMutex>
- return xNewQueue;
- 8014544: 68fb ldr r3, [r7, #12]
- }
- 8014546: 4618 mov r0, r3
- 8014548: 3718 adds r7, #24
- 801454a: 46bd mov sp, r7
- 801454c: bd80 pop {r7, pc}
- 0801454e <xQueueCreateMutexStatic>:
- /*-----------------------------------------------------------*/
- #if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
- QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )
- {
- 801454e: b580 push {r7, lr}
- 8014550: b088 sub sp, #32
- 8014552: af02 add r7, sp, #8
- 8014554: 4603 mov r3, r0
- 8014556: 6039 str r1, [r7, #0]
- 8014558: 71fb strb r3, [r7, #7]
- QueueHandle_t xNewQueue;
- const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
- 801455a: 2301 movs r3, #1
- 801455c: 617b str r3, [r7, #20]
- 801455e: 2300 movs r3, #0
- 8014560: 613b str r3, [r7, #16]
- /* Prevent compiler warnings about unused parameters if
- configUSE_TRACE_FACILITY does not equal 1. */
- ( void ) ucQueueType;
- xNewQueue = xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );
- 8014562: 79fb ldrb r3, [r7, #7]
- 8014564: 9300 str r3, [sp, #0]
- 8014566: 683b ldr r3, [r7, #0]
- 8014568: 2200 movs r2, #0
- 801456a: 6939 ldr r1, [r7, #16]
- 801456c: 6978 ldr r0, [r7, #20]
- 801456e: f7ff fee1 bl 8014334 <xQueueGenericCreateStatic>
- 8014572: 60f8 str r0, [r7, #12]
- prvInitialiseMutex( ( Queue_t * ) xNewQueue );
- 8014574: 68f8 ldr r0, [r7, #12]
- 8014576: f7ff ffb8 bl 80144ea <prvInitialiseMutex>
- return xNewQueue;
- 801457a: 68fb ldr r3, [r7, #12]
- }
- 801457c: 4618 mov r0, r3
- 801457e: 3718 adds r7, #24
- 8014580: 46bd mov sp, r7
- 8014582: bd80 pop {r7, pc}
- 08014584 <xQueueGiveMutexRecursive>:
- /*-----------------------------------------------------------*/
- #if ( configUSE_RECURSIVE_MUTEXES == 1 )
- BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex )
- {
- 8014584: b590 push {r4, r7, lr}
- 8014586: b087 sub sp, #28
- 8014588: af00 add r7, sp, #0
- 801458a: 6078 str r0, [r7, #4]
- BaseType_t xReturn;
- Queue_t * const pxMutex = ( Queue_t * ) xMutex;
- 801458c: 687b ldr r3, [r7, #4]
- 801458e: 613b str r3, [r7, #16]
- configASSERT( pxMutex );
- 8014590: 693b ldr r3, [r7, #16]
- 8014592: 2b00 cmp r3, #0
- 8014594: d10b bne.n 80145ae <xQueueGiveMutexRecursive+0x2a>
- __asm volatile
- 8014596: f04f 0350 mov.w r3, #80 @ 0x50
- 801459a: f383 8811 msr BASEPRI, r3
- 801459e: f3bf 8f6f isb sy
- 80145a2: f3bf 8f4f dsb sy
- 80145a6: 60fb str r3, [r7, #12]
- }
- 80145a8: bf00 nop
- 80145aa: bf00 nop
- 80145ac: e7fd b.n 80145aa <xQueueGiveMutexRecursive+0x26>
- change outside of this task. If this task does not hold the mutex then
- pxMutexHolder can never coincidentally equal the tasks handle, and as
- this is the only condition we are interested in it does not matter if
- pxMutexHolder is accessed simultaneously by another task. Therefore no
- mutual exclusion is required to test the pxMutexHolder variable. */
- if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
- 80145ae: 693b ldr r3, [r7, #16]
- 80145b0: 689c ldr r4, [r3, #8]
- 80145b2: f001 fe39 bl 8016228 <xTaskGetCurrentTaskHandle>
- 80145b6: 4603 mov r3, r0
- 80145b8: 429c cmp r4, r3
- 80145ba: d111 bne.n 80145e0 <xQueueGiveMutexRecursive+0x5c>
- /* uxRecursiveCallCount cannot be zero if xMutexHolder is equal to
- the task handle, therefore no underflow check is required. Also,
- uxRecursiveCallCount is only modified by the mutex holder, and as
- there can only be one, no mutual exclusion is required to modify the
- uxRecursiveCallCount member. */
- ( pxMutex->u.xSemaphore.uxRecursiveCallCount )--;
- 80145bc: 693b ldr r3, [r7, #16]
- 80145be: 68db ldr r3, [r3, #12]
- 80145c0: 1e5a subs r2, r3, #1
- 80145c2: 693b ldr r3, [r7, #16]
- 80145c4: 60da str r2, [r3, #12]
- /* Has the recursive call count unwound to 0? */
- if( pxMutex->u.xSemaphore.uxRecursiveCallCount == ( UBaseType_t ) 0 )
- 80145c6: 693b ldr r3, [r7, #16]
- 80145c8: 68db ldr r3, [r3, #12]
- 80145ca: 2b00 cmp r3, #0
- 80145cc: d105 bne.n 80145da <xQueueGiveMutexRecursive+0x56>
- {
- /* Return the mutex. This will automatically unblock any other
- task that might be waiting to access the mutex. */
- ( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK );
- 80145ce: 2300 movs r3, #0
- 80145d0: 2200 movs r2, #0
- 80145d2: 2100 movs r1, #0
- 80145d4: 6938 ldr r0, [r7, #16]
- 80145d6: f000 f841 bl 801465c <xQueueGenericSend>
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- xReturn = pdPASS;
- 80145da: 2301 movs r3, #1
- 80145dc: 617b str r3, [r7, #20]
- 80145de: e001 b.n 80145e4 <xQueueGiveMutexRecursive+0x60>
- }
- else
- {
- /* The mutex cannot be given because the calling task is not the
- holder. */
- xReturn = pdFAIL;
- 80145e0: 2300 movs r3, #0
- 80145e2: 617b str r3, [r7, #20]
- traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex );
- }
- return xReturn;
- 80145e4: 697b ldr r3, [r7, #20]
- }
- 80145e6: 4618 mov r0, r3
- 80145e8: 371c adds r7, #28
- 80145ea: 46bd mov sp, r7
- 80145ec: bd90 pop {r4, r7, pc}
- 080145ee <xQueueTakeMutexRecursive>:
- /*-----------------------------------------------------------*/
- #if ( configUSE_RECURSIVE_MUTEXES == 1 )
- BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait )
- {
- 80145ee: b590 push {r4, r7, lr}
- 80145f0: b087 sub sp, #28
- 80145f2: af00 add r7, sp, #0
- 80145f4: 6078 str r0, [r7, #4]
- 80145f6: 6039 str r1, [r7, #0]
- BaseType_t xReturn;
- Queue_t * const pxMutex = ( Queue_t * ) xMutex;
- 80145f8: 687b ldr r3, [r7, #4]
- 80145fa: 613b str r3, [r7, #16]
- configASSERT( pxMutex );
- 80145fc: 693b ldr r3, [r7, #16]
- 80145fe: 2b00 cmp r3, #0
- 8014600: d10b bne.n 801461a <xQueueTakeMutexRecursive+0x2c>
- __asm volatile
- 8014602: f04f 0350 mov.w r3, #80 @ 0x50
- 8014606: f383 8811 msr BASEPRI, r3
- 801460a: f3bf 8f6f isb sy
- 801460e: f3bf 8f4f dsb sy
- 8014612: 60fb str r3, [r7, #12]
- }
- 8014614: bf00 nop
- 8014616: bf00 nop
- 8014618: e7fd b.n 8014616 <xQueueTakeMutexRecursive+0x28>
- /* Comments regarding mutual exclusion as per those within
- xQueueGiveMutexRecursive(). */
- traceTAKE_MUTEX_RECURSIVE( pxMutex );
- if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
- 801461a: 693b ldr r3, [r7, #16]
- 801461c: 689c ldr r4, [r3, #8]
- 801461e: f001 fe03 bl 8016228 <xTaskGetCurrentTaskHandle>
- 8014622: 4603 mov r3, r0
- 8014624: 429c cmp r4, r3
- 8014626: d107 bne.n 8014638 <xQueueTakeMutexRecursive+0x4a>
- {
- ( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
- 8014628: 693b ldr r3, [r7, #16]
- 801462a: 68db ldr r3, [r3, #12]
- 801462c: 1c5a adds r2, r3, #1
- 801462e: 693b ldr r3, [r7, #16]
- 8014630: 60da str r2, [r3, #12]
- xReturn = pdPASS;
- 8014632: 2301 movs r3, #1
- 8014634: 617b str r3, [r7, #20]
- 8014636: e00c b.n 8014652 <xQueueTakeMutexRecursive+0x64>
- }
- else
- {
- xReturn = xQueueSemaphoreTake( pxMutex, xTicksToWait );
- 8014638: 6839 ldr r1, [r7, #0]
- 801463a: 6938 ldr r0, [r7, #16]
- 801463c: f000 fa90 bl 8014b60 <xQueueSemaphoreTake>
- 8014640: 6178 str r0, [r7, #20]
- /* pdPASS will only be returned if the mutex was successfully
- obtained. The calling task may have entered the Blocked state
- before reaching here. */
- if( xReturn != pdFAIL )
- 8014642: 697b ldr r3, [r7, #20]
- 8014644: 2b00 cmp r3, #0
- 8014646: d004 beq.n 8014652 <xQueueTakeMutexRecursive+0x64>
- {
- ( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
- 8014648: 693b ldr r3, [r7, #16]
- 801464a: 68db ldr r3, [r3, #12]
- 801464c: 1c5a adds r2, r3, #1
- 801464e: 693b ldr r3, [r7, #16]
- 8014650: 60da str r2, [r3, #12]
- {
- traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex );
- }
- }
- return xReturn;
- 8014652: 697b ldr r3, [r7, #20]
- }
- 8014654: 4618 mov r0, r3
- 8014656: 371c adds r7, #28
- 8014658: 46bd mov sp, r7
- 801465a: bd90 pop {r4, r7, pc}
- 0801465c <xQueueGenericSend>:
- #endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
- /*-----------------------------------------------------------*/
- BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
- {
- 801465c: b580 push {r7, lr}
- 801465e: b08e sub sp, #56 @ 0x38
- 8014660: af00 add r7, sp, #0
- 8014662: 60f8 str r0, [r7, #12]
- 8014664: 60b9 str r1, [r7, #8]
- 8014666: 607a str r2, [r7, #4]
- 8014668: 603b str r3, [r7, #0]
- BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
- 801466a: 2300 movs r3, #0
- 801466c: 637b str r3, [r7, #52] @ 0x34
- TimeOut_t xTimeOut;
- Queue_t * const pxQueue = xQueue;
- 801466e: 68fb ldr r3, [r7, #12]
- 8014670: 633b str r3, [r7, #48] @ 0x30
- configASSERT( pxQueue );
- 8014672: 6b3b ldr r3, [r7, #48] @ 0x30
- 8014674: 2b00 cmp r3, #0
- 8014676: d10b bne.n 8014690 <xQueueGenericSend+0x34>
- __asm volatile
- 8014678: f04f 0350 mov.w r3, #80 @ 0x50
- 801467c: f383 8811 msr BASEPRI, r3
- 8014680: f3bf 8f6f isb sy
- 8014684: f3bf 8f4f dsb sy
- 8014688: 62bb str r3, [r7, #40] @ 0x28
- }
- 801468a: bf00 nop
- 801468c: bf00 nop
- 801468e: e7fd b.n 801468c <xQueueGenericSend+0x30>
- configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
- 8014690: 68bb ldr r3, [r7, #8]
- 8014692: 2b00 cmp r3, #0
- 8014694: d103 bne.n 801469e <xQueueGenericSend+0x42>
- 8014696: 6b3b ldr r3, [r7, #48] @ 0x30
- 8014698: 6c1b ldr r3, [r3, #64] @ 0x40
- 801469a: 2b00 cmp r3, #0
- 801469c: d101 bne.n 80146a2 <xQueueGenericSend+0x46>
- 801469e: 2301 movs r3, #1
- 80146a0: e000 b.n 80146a4 <xQueueGenericSend+0x48>
- 80146a2: 2300 movs r3, #0
- 80146a4: 2b00 cmp r3, #0
- 80146a6: d10b bne.n 80146c0 <xQueueGenericSend+0x64>
- __asm volatile
- 80146a8: f04f 0350 mov.w r3, #80 @ 0x50
- 80146ac: f383 8811 msr BASEPRI, r3
- 80146b0: f3bf 8f6f isb sy
- 80146b4: f3bf 8f4f dsb sy
- 80146b8: 627b str r3, [r7, #36] @ 0x24
- }
- 80146ba: bf00 nop
- 80146bc: bf00 nop
- 80146be: e7fd b.n 80146bc <xQueueGenericSend+0x60>
- configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
- 80146c0: 683b ldr r3, [r7, #0]
- 80146c2: 2b02 cmp r3, #2
- 80146c4: d103 bne.n 80146ce <xQueueGenericSend+0x72>
- 80146c6: 6b3b ldr r3, [r7, #48] @ 0x30
- 80146c8: 6bdb ldr r3, [r3, #60] @ 0x3c
- 80146ca: 2b01 cmp r3, #1
- 80146cc: d101 bne.n 80146d2 <xQueueGenericSend+0x76>
- 80146ce: 2301 movs r3, #1
- 80146d0: e000 b.n 80146d4 <xQueueGenericSend+0x78>
- 80146d2: 2300 movs r3, #0
- 80146d4: 2b00 cmp r3, #0
- 80146d6: d10b bne.n 80146f0 <xQueueGenericSend+0x94>
- __asm volatile
- 80146d8: f04f 0350 mov.w r3, #80 @ 0x50
- 80146dc: f383 8811 msr BASEPRI, r3
- 80146e0: f3bf 8f6f isb sy
- 80146e4: f3bf 8f4f dsb sy
- 80146e8: 623b str r3, [r7, #32]
- }
- 80146ea: bf00 nop
- 80146ec: bf00 nop
- 80146ee: e7fd b.n 80146ec <xQueueGenericSend+0x90>
- #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
- {
- configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
- 80146f0: f001 fdaa bl 8016248 <xTaskGetSchedulerState>
- 80146f4: 4603 mov r3, r0
- 80146f6: 2b00 cmp r3, #0
- 80146f8: d102 bne.n 8014700 <xQueueGenericSend+0xa4>
- 80146fa: 687b ldr r3, [r7, #4]
- 80146fc: 2b00 cmp r3, #0
- 80146fe: d101 bne.n 8014704 <xQueueGenericSend+0xa8>
- 8014700: 2301 movs r3, #1
- 8014702: e000 b.n 8014706 <xQueueGenericSend+0xaa>
- 8014704: 2300 movs r3, #0
- 8014706: 2b00 cmp r3, #0
- 8014708: d10b bne.n 8014722 <xQueueGenericSend+0xc6>
- __asm volatile
- 801470a: f04f 0350 mov.w r3, #80 @ 0x50
- 801470e: f383 8811 msr BASEPRI, r3
- 8014712: f3bf 8f6f isb sy
- 8014716: f3bf 8f4f dsb sy
- 801471a: 61fb str r3, [r7, #28]
- }
- 801471c: bf00 nop
- 801471e: bf00 nop
- 8014720: e7fd b.n 801471e <xQueueGenericSend+0xc2>
- /*lint -save -e904 This function relaxes the coding standard somewhat to
- allow return statements within the function itself. This is done in the
- interest of execution time efficiency. */
- for( ;; )
- {
- taskENTER_CRITICAL();
- 8014722: f002 ff19 bl 8017558 <vPortEnterCritical>
- {
- /* Is there room on the queue now? The running task must be the
- highest priority task wanting to access the queue. If the head item
- in the queue is to be overwritten then it does not matter if the
- queue is full. */
- if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
- 8014726: 6b3b ldr r3, [r7, #48] @ 0x30
- 8014728: 6b9a ldr r2, [r3, #56] @ 0x38
- 801472a: 6b3b ldr r3, [r7, #48] @ 0x30
- 801472c: 6bdb ldr r3, [r3, #60] @ 0x3c
- 801472e: 429a cmp r2, r3
- 8014730: d302 bcc.n 8014738 <xQueueGenericSend+0xdc>
- 8014732: 683b ldr r3, [r7, #0]
- 8014734: 2b02 cmp r3, #2
- 8014736: d129 bne.n 801478c <xQueueGenericSend+0x130>
- }
- }
- }
- #else /* configUSE_QUEUE_SETS */
- {
- xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
- 8014738: 683a ldr r2, [r7, #0]
- 801473a: 68b9 ldr r1, [r7, #8]
- 801473c: 6b38 ldr r0, [r7, #48] @ 0x30
- 801473e: f000 fbb9 bl 8014eb4 <prvCopyDataToQueue>
- 8014742: 62f8 str r0, [r7, #44] @ 0x2c
- /* If there was a task waiting for data to arrive on the
- queue then unblock it now. */
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
- 8014744: 6b3b ldr r3, [r7, #48] @ 0x30
- 8014746: 6a5b ldr r3, [r3, #36] @ 0x24
- 8014748: 2b00 cmp r3, #0
- 801474a: d010 beq.n 801476e <xQueueGenericSend+0x112>
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
- 801474c: 6b3b ldr r3, [r7, #48] @ 0x30
- 801474e: 3324 adds r3, #36 @ 0x24
- 8014750: 4618 mov r0, r3
- 8014752: f001 fb7b bl 8015e4c <xTaskRemoveFromEventList>
- 8014756: 4603 mov r3, r0
- 8014758: 2b00 cmp r3, #0
- 801475a: d013 beq.n 8014784 <xQueueGenericSend+0x128>
- {
- /* The unblocked task has a priority higher than
- our own so yield immediately. Yes it is ok to do
- this from within the critical section - the kernel
- takes care of that. */
- queueYIELD_IF_USING_PREEMPTION();
- 801475c: 4b3f ldr r3, [pc, #252] @ (801485c <xQueueGenericSend+0x200>)
- 801475e: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 8014762: 601a str r2, [r3, #0]
- 8014764: f3bf 8f4f dsb sy
- 8014768: f3bf 8f6f isb sy
- 801476c: e00a b.n 8014784 <xQueueGenericSend+0x128>
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- else if( xYieldRequired != pdFALSE )
- 801476e: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014770: 2b00 cmp r3, #0
- 8014772: d007 beq.n 8014784 <xQueueGenericSend+0x128>
- {
- /* This path is a special case that will only get
- executed if the task was holding multiple mutexes and
- the mutexes were given back in an order that is
- different to that in which they were taken. */
- queueYIELD_IF_USING_PREEMPTION();
- 8014774: 4b39 ldr r3, [pc, #228] @ (801485c <xQueueGenericSend+0x200>)
- 8014776: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 801477a: 601a str r2, [r3, #0]
- 801477c: f3bf 8f4f dsb sy
- 8014780: f3bf 8f6f isb sy
- mtCOVERAGE_TEST_MARKER();
- }
- }
- #endif /* configUSE_QUEUE_SETS */
- taskEXIT_CRITICAL();
- 8014784: f002 ff1a bl 80175bc <vPortExitCritical>
- return pdPASS;
- 8014788: 2301 movs r3, #1
- 801478a: e063 b.n 8014854 <xQueueGenericSend+0x1f8>
- }
- else
- {
- if( xTicksToWait == ( TickType_t ) 0 )
- 801478c: 687b ldr r3, [r7, #4]
- 801478e: 2b00 cmp r3, #0
- 8014790: d103 bne.n 801479a <xQueueGenericSend+0x13e>
- {
- /* The queue was full and no block time is specified (or
- the block time has expired) so leave now. */
- taskEXIT_CRITICAL();
- 8014792: f002 ff13 bl 80175bc <vPortExitCritical>
- /* Return to the original privilege level before exiting
- the function. */
- traceQUEUE_SEND_FAILED( pxQueue );
- return errQUEUE_FULL;
- 8014796: 2300 movs r3, #0
- 8014798: e05c b.n 8014854 <xQueueGenericSend+0x1f8>
- }
- else if( xEntryTimeSet == pdFALSE )
- 801479a: 6b7b ldr r3, [r7, #52] @ 0x34
- 801479c: 2b00 cmp r3, #0
- 801479e: d106 bne.n 80147ae <xQueueGenericSend+0x152>
- {
- /* The queue was full and a block time was specified so
- configure the timeout structure. */
- vTaskInternalSetTimeOutState( &xTimeOut );
- 80147a0: f107 0314 add.w r3, r7, #20
- 80147a4: 4618 mov r0, r3
- 80147a6: f001 fbdd bl 8015f64 <vTaskInternalSetTimeOutState>
- xEntryTimeSet = pdTRUE;
- 80147aa: 2301 movs r3, #1
- 80147ac: 637b str r3, [r7, #52] @ 0x34
- /* Entry time was already set. */
- mtCOVERAGE_TEST_MARKER();
- }
- }
- }
- taskEXIT_CRITICAL();
- 80147ae: f002 ff05 bl 80175bc <vPortExitCritical>
- /* Interrupts and other tasks can send to and receive from the queue
- now the critical section has been exited. */
- vTaskSuspendAll();
- 80147b2: f001 f90f bl 80159d4 <vTaskSuspendAll>
- prvLockQueue( pxQueue );
- 80147b6: f002 fecf bl 8017558 <vPortEnterCritical>
- 80147ba: 6b3b ldr r3, [r7, #48] @ 0x30
- 80147bc: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
- 80147c0: b25b sxtb r3, r3
- 80147c2: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 80147c6: d103 bne.n 80147d0 <xQueueGenericSend+0x174>
- 80147c8: 6b3b ldr r3, [r7, #48] @ 0x30
- 80147ca: 2200 movs r2, #0
- 80147cc: f883 2044 strb.w r2, [r3, #68] @ 0x44
- 80147d0: 6b3b ldr r3, [r7, #48] @ 0x30
- 80147d2: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
- 80147d6: b25b sxtb r3, r3
- 80147d8: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 80147dc: d103 bne.n 80147e6 <xQueueGenericSend+0x18a>
- 80147de: 6b3b ldr r3, [r7, #48] @ 0x30
- 80147e0: 2200 movs r2, #0
- 80147e2: f883 2045 strb.w r2, [r3, #69] @ 0x45
- 80147e6: f002 fee9 bl 80175bc <vPortExitCritical>
- /* Update the timeout state to see if it has expired yet. */
- if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
- 80147ea: 1d3a adds r2, r7, #4
- 80147ec: f107 0314 add.w r3, r7, #20
- 80147f0: 4611 mov r1, r2
- 80147f2: 4618 mov r0, r3
- 80147f4: f001 fbcc bl 8015f90 <xTaskCheckForTimeOut>
- 80147f8: 4603 mov r3, r0
- 80147fa: 2b00 cmp r3, #0
- 80147fc: d124 bne.n 8014848 <xQueueGenericSend+0x1ec>
- {
- if( prvIsQueueFull( pxQueue ) != pdFALSE )
- 80147fe: 6b38 ldr r0, [r7, #48] @ 0x30
- 8014800: f000 fc50 bl 80150a4 <prvIsQueueFull>
- 8014804: 4603 mov r3, r0
- 8014806: 2b00 cmp r3, #0
- 8014808: d018 beq.n 801483c <xQueueGenericSend+0x1e0>
- {
- traceBLOCKING_ON_QUEUE_SEND( pxQueue );
- vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
- 801480a: 6b3b ldr r3, [r7, #48] @ 0x30
- 801480c: 3310 adds r3, #16
- 801480e: 687a ldr r2, [r7, #4]
- 8014810: 4611 mov r1, r2
- 8014812: 4618 mov r0, r3
- 8014814: f001 fac8 bl 8015da8 <vTaskPlaceOnEventList>
- /* Unlocking the queue means queue events can effect the
- event list. It is possible that interrupts occurring now
- remove this task from the event list again - but as the
- scheduler is suspended the task will go onto the pending
- ready last instead of the actual ready list. */
- prvUnlockQueue( pxQueue );
- 8014818: 6b38 ldr r0, [r7, #48] @ 0x30
- 801481a: f000 fbdb bl 8014fd4 <prvUnlockQueue>
- /* Resuming the scheduler will move tasks from the pending
- ready list into the ready list - so it is feasible that this
- task is already in a ready list before it yields - in which
- case the yield will not cause a context switch unless there
- is also a higher priority task in the pending ready list. */
- if( xTaskResumeAll() == pdFALSE )
- 801481e: f001 f8e7 bl 80159f0 <xTaskResumeAll>
- 8014822: 4603 mov r3, r0
- 8014824: 2b00 cmp r3, #0
- 8014826: f47f af7c bne.w 8014722 <xQueueGenericSend+0xc6>
- {
- portYIELD_WITHIN_API();
- 801482a: 4b0c ldr r3, [pc, #48] @ (801485c <xQueueGenericSend+0x200>)
- 801482c: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 8014830: 601a str r2, [r3, #0]
- 8014832: f3bf 8f4f dsb sy
- 8014836: f3bf 8f6f isb sy
- 801483a: e772 b.n 8014722 <xQueueGenericSend+0xc6>
- }
- }
- else
- {
- /* Try again. */
- prvUnlockQueue( pxQueue );
- 801483c: 6b38 ldr r0, [r7, #48] @ 0x30
- 801483e: f000 fbc9 bl 8014fd4 <prvUnlockQueue>
- ( void ) xTaskResumeAll();
- 8014842: f001 f8d5 bl 80159f0 <xTaskResumeAll>
- 8014846: e76c b.n 8014722 <xQueueGenericSend+0xc6>
- }
- }
- else
- {
- /* The timeout has expired. */
- prvUnlockQueue( pxQueue );
- 8014848: 6b38 ldr r0, [r7, #48] @ 0x30
- 801484a: f000 fbc3 bl 8014fd4 <prvUnlockQueue>
- ( void ) xTaskResumeAll();
- 801484e: f001 f8cf bl 80159f0 <xTaskResumeAll>
- traceQUEUE_SEND_FAILED( pxQueue );
- return errQUEUE_FULL;
- 8014852: 2300 movs r3, #0
- }
- } /*lint -restore */
- }
- 8014854: 4618 mov r0, r3
- 8014856: 3738 adds r7, #56 @ 0x38
- 8014858: 46bd mov sp, r7
- 801485a: bd80 pop {r7, pc}
- 801485c: e000ed04 .word 0xe000ed04
- 08014860 <xQueueGenericSendFromISR>:
- /*-----------------------------------------------------------*/
- BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )
- {
- 8014860: b580 push {r7, lr}
- 8014862: b090 sub sp, #64 @ 0x40
- 8014864: af00 add r7, sp, #0
- 8014866: 60f8 str r0, [r7, #12]
- 8014868: 60b9 str r1, [r7, #8]
- 801486a: 607a str r2, [r7, #4]
- 801486c: 603b str r3, [r7, #0]
- BaseType_t xReturn;
- UBaseType_t uxSavedInterruptStatus;
- Queue_t * const pxQueue = xQueue;
- 801486e: 68fb ldr r3, [r7, #12]
- 8014870: 63bb str r3, [r7, #56] @ 0x38
- configASSERT( pxQueue );
- 8014872: 6bbb ldr r3, [r7, #56] @ 0x38
- 8014874: 2b00 cmp r3, #0
- 8014876: d10b bne.n 8014890 <xQueueGenericSendFromISR+0x30>
- __asm volatile
- 8014878: f04f 0350 mov.w r3, #80 @ 0x50
- 801487c: f383 8811 msr BASEPRI, r3
- 8014880: f3bf 8f6f isb sy
- 8014884: f3bf 8f4f dsb sy
- 8014888: 62bb str r3, [r7, #40] @ 0x28
- }
- 801488a: bf00 nop
- 801488c: bf00 nop
- 801488e: e7fd b.n 801488c <xQueueGenericSendFromISR+0x2c>
- configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
- 8014890: 68bb ldr r3, [r7, #8]
- 8014892: 2b00 cmp r3, #0
- 8014894: d103 bne.n 801489e <xQueueGenericSendFromISR+0x3e>
- 8014896: 6bbb ldr r3, [r7, #56] @ 0x38
- 8014898: 6c1b ldr r3, [r3, #64] @ 0x40
- 801489a: 2b00 cmp r3, #0
- 801489c: d101 bne.n 80148a2 <xQueueGenericSendFromISR+0x42>
- 801489e: 2301 movs r3, #1
- 80148a0: e000 b.n 80148a4 <xQueueGenericSendFromISR+0x44>
- 80148a2: 2300 movs r3, #0
- 80148a4: 2b00 cmp r3, #0
- 80148a6: d10b bne.n 80148c0 <xQueueGenericSendFromISR+0x60>
- __asm volatile
- 80148a8: f04f 0350 mov.w r3, #80 @ 0x50
- 80148ac: f383 8811 msr BASEPRI, r3
- 80148b0: f3bf 8f6f isb sy
- 80148b4: f3bf 8f4f dsb sy
- 80148b8: 627b str r3, [r7, #36] @ 0x24
- }
- 80148ba: bf00 nop
- 80148bc: bf00 nop
- 80148be: e7fd b.n 80148bc <xQueueGenericSendFromISR+0x5c>
- configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
- 80148c0: 683b ldr r3, [r7, #0]
- 80148c2: 2b02 cmp r3, #2
- 80148c4: d103 bne.n 80148ce <xQueueGenericSendFromISR+0x6e>
- 80148c6: 6bbb ldr r3, [r7, #56] @ 0x38
- 80148c8: 6bdb ldr r3, [r3, #60] @ 0x3c
- 80148ca: 2b01 cmp r3, #1
- 80148cc: d101 bne.n 80148d2 <xQueueGenericSendFromISR+0x72>
- 80148ce: 2301 movs r3, #1
- 80148d0: e000 b.n 80148d4 <xQueueGenericSendFromISR+0x74>
- 80148d2: 2300 movs r3, #0
- 80148d4: 2b00 cmp r3, #0
- 80148d6: d10b bne.n 80148f0 <xQueueGenericSendFromISR+0x90>
- __asm volatile
- 80148d8: f04f 0350 mov.w r3, #80 @ 0x50
- 80148dc: f383 8811 msr BASEPRI, r3
- 80148e0: f3bf 8f6f isb sy
- 80148e4: f3bf 8f4f dsb sy
- 80148e8: 623b str r3, [r7, #32]
- }
- 80148ea: bf00 nop
- 80148ec: bf00 nop
- 80148ee: e7fd b.n 80148ec <xQueueGenericSendFromISR+0x8c>
- that have been assigned a priority at or (logically) below the maximum
- system call interrupt priority. FreeRTOS maintains a separate interrupt
- safe API to ensure interrupt entry is as fast and as simple as possible.
- More information (albeit Cortex-M specific) is provided on the following
- link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
- portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
- 80148f0: f002 ff12 bl 8017718 <vPortValidateInterruptPriority>
- portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
- {
- uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
- __asm volatile
- 80148f4: f3ef 8211 mrs r2, BASEPRI
- 80148f8: f04f 0350 mov.w r3, #80 @ 0x50
- 80148fc: f383 8811 msr BASEPRI, r3
- 8014900: f3bf 8f6f isb sy
- 8014904: f3bf 8f4f dsb sy
- 8014908: 61fa str r2, [r7, #28]
- 801490a: 61bb str r3, [r7, #24]
- :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
- );
- /* This return will not be reached but is necessary to prevent compiler
- warnings. */
- return ulOriginalBASEPRI;
- 801490c: 69fb ldr r3, [r7, #28]
- /* Similar to xQueueGenericSend, except without blocking if there is no room
- in the queue. Also don't directly wake a task that was blocked on a queue
- read, instead return a flag to say whether a context switch is required or
- not (i.e. has a task with a higher priority than us been woken by this
- post). */
- uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
- 801490e: 637b str r3, [r7, #52] @ 0x34
- {
- if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
- 8014910: 6bbb ldr r3, [r7, #56] @ 0x38
- 8014912: 6b9a ldr r2, [r3, #56] @ 0x38
- 8014914: 6bbb ldr r3, [r7, #56] @ 0x38
- 8014916: 6bdb ldr r3, [r3, #60] @ 0x3c
- 8014918: 429a cmp r2, r3
- 801491a: d302 bcc.n 8014922 <xQueueGenericSendFromISR+0xc2>
- 801491c: 683b ldr r3, [r7, #0]
- 801491e: 2b02 cmp r3, #2
- 8014920: d12f bne.n 8014982 <xQueueGenericSendFromISR+0x122>
- {
- const int8_t cTxLock = pxQueue->cTxLock;
- 8014922: 6bbb ldr r3, [r7, #56] @ 0x38
- 8014924: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
- 8014928: f887 3033 strb.w r3, [r7, #51] @ 0x33
- const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
- 801492c: 6bbb ldr r3, [r7, #56] @ 0x38
- 801492e: 6b9b ldr r3, [r3, #56] @ 0x38
- 8014930: 62fb str r3, [r7, #44] @ 0x2c
- /* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
- semaphore or mutex. That means prvCopyDataToQueue() cannot result
- in a task disinheriting a priority and prvCopyDataToQueue() can be
- called here even though the disinherit function does not check if
- the scheduler is suspended before accessing the ready lists. */
- ( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
- 8014932: 683a ldr r2, [r7, #0]
- 8014934: 68b9 ldr r1, [r7, #8]
- 8014936: 6bb8 ldr r0, [r7, #56] @ 0x38
- 8014938: f000 fabc bl 8014eb4 <prvCopyDataToQueue>
- /* The event list is not altered if the queue is locked. This will
- be done when the queue is unlocked later. */
- if( cTxLock == queueUNLOCKED )
- 801493c: f997 3033 ldrsb.w r3, [r7, #51] @ 0x33
- 8014940: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 8014944: d112 bne.n 801496c <xQueueGenericSendFromISR+0x10c>
- }
- }
- }
- #else /* configUSE_QUEUE_SETS */
- {
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
- 8014946: 6bbb ldr r3, [r7, #56] @ 0x38
- 8014948: 6a5b ldr r3, [r3, #36] @ 0x24
- 801494a: 2b00 cmp r3, #0
- 801494c: d016 beq.n 801497c <xQueueGenericSendFromISR+0x11c>
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
- 801494e: 6bbb ldr r3, [r7, #56] @ 0x38
- 8014950: 3324 adds r3, #36 @ 0x24
- 8014952: 4618 mov r0, r3
- 8014954: f001 fa7a bl 8015e4c <xTaskRemoveFromEventList>
- 8014958: 4603 mov r3, r0
- 801495a: 2b00 cmp r3, #0
- 801495c: d00e beq.n 801497c <xQueueGenericSendFromISR+0x11c>
- {
- /* The task waiting has a higher priority so record that a
- context switch is required. */
- if( pxHigherPriorityTaskWoken != NULL )
- 801495e: 687b ldr r3, [r7, #4]
- 8014960: 2b00 cmp r3, #0
- 8014962: d00b beq.n 801497c <xQueueGenericSendFromISR+0x11c>
- {
- *pxHigherPriorityTaskWoken = pdTRUE;
- 8014964: 687b ldr r3, [r7, #4]
- 8014966: 2201 movs r2, #1
- 8014968: 601a str r2, [r3, #0]
- 801496a: e007 b.n 801497c <xQueueGenericSendFromISR+0x11c>
- }
- else
- {
- /* Increment the lock count so the task that unlocks the queue
- knows that data was posted while it was locked. */
- pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
- 801496c: f897 3033 ldrb.w r3, [r7, #51] @ 0x33
- 8014970: 3301 adds r3, #1
- 8014972: b2db uxtb r3, r3
- 8014974: b25a sxtb r2, r3
- 8014976: 6bbb ldr r3, [r7, #56] @ 0x38
- 8014978: f883 2045 strb.w r2, [r3, #69] @ 0x45
- }
- xReturn = pdPASS;
- 801497c: 2301 movs r3, #1
- 801497e: 63fb str r3, [r7, #60] @ 0x3c
- {
- 8014980: e001 b.n 8014986 <xQueueGenericSendFromISR+0x126>
- }
- else
- {
- traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
- xReturn = errQUEUE_FULL;
- 8014982: 2300 movs r3, #0
- 8014984: 63fb str r3, [r7, #60] @ 0x3c
- 8014986: 6b7b ldr r3, [r7, #52] @ 0x34
- 8014988: 617b str r3, [r7, #20]
- }
- /*-----------------------------------------------------------*/
- portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
- {
- __asm volatile
- 801498a: 697b ldr r3, [r7, #20]
- 801498c: f383 8811 msr BASEPRI, r3
- (
- " msr basepri, %0 " :: "r" ( ulNewMaskValue ) : "memory"
- );
- }
- 8014990: bf00 nop
- }
- }
- portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
- return xReturn;
- 8014992: 6bfb ldr r3, [r7, #60] @ 0x3c
- }
- 8014994: 4618 mov r0, r3
- 8014996: 3740 adds r7, #64 @ 0x40
- 8014998: 46bd mov sp, r7
- 801499a: bd80 pop {r7, pc}
- 0801499c <xQueueReceive>:
- return xReturn;
- }
- /*-----------------------------------------------------------*/
- BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait )
- {
- 801499c: b580 push {r7, lr}
- 801499e: b08c sub sp, #48 @ 0x30
- 80149a0: af00 add r7, sp, #0
- 80149a2: 60f8 str r0, [r7, #12]
- 80149a4: 60b9 str r1, [r7, #8]
- 80149a6: 607a str r2, [r7, #4]
- BaseType_t xEntryTimeSet = pdFALSE;
- 80149a8: 2300 movs r3, #0
- 80149aa: 62fb str r3, [r7, #44] @ 0x2c
- TimeOut_t xTimeOut;
- Queue_t * const pxQueue = xQueue;
- 80149ac: 68fb ldr r3, [r7, #12]
- 80149ae: 62bb str r3, [r7, #40] @ 0x28
- /* Check the pointer is not NULL. */
- configASSERT( ( pxQueue ) );
- 80149b0: 6abb ldr r3, [r7, #40] @ 0x28
- 80149b2: 2b00 cmp r3, #0
- 80149b4: d10b bne.n 80149ce <xQueueReceive+0x32>
- __asm volatile
- 80149b6: f04f 0350 mov.w r3, #80 @ 0x50
- 80149ba: f383 8811 msr BASEPRI, r3
- 80149be: f3bf 8f6f isb sy
- 80149c2: f3bf 8f4f dsb sy
- 80149c6: 623b str r3, [r7, #32]
- }
- 80149c8: bf00 nop
- 80149ca: bf00 nop
- 80149cc: e7fd b.n 80149ca <xQueueReceive+0x2e>
- /* The buffer into which data is received can only be NULL if the data size
- is zero (so no data is copied into the buffer. */
- configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
- 80149ce: 68bb ldr r3, [r7, #8]
- 80149d0: 2b00 cmp r3, #0
- 80149d2: d103 bne.n 80149dc <xQueueReceive+0x40>
- 80149d4: 6abb ldr r3, [r7, #40] @ 0x28
- 80149d6: 6c1b ldr r3, [r3, #64] @ 0x40
- 80149d8: 2b00 cmp r3, #0
- 80149da: d101 bne.n 80149e0 <xQueueReceive+0x44>
- 80149dc: 2301 movs r3, #1
- 80149de: e000 b.n 80149e2 <xQueueReceive+0x46>
- 80149e0: 2300 movs r3, #0
- 80149e2: 2b00 cmp r3, #0
- 80149e4: d10b bne.n 80149fe <xQueueReceive+0x62>
- __asm volatile
- 80149e6: f04f 0350 mov.w r3, #80 @ 0x50
- 80149ea: f383 8811 msr BASEPRI, r3
- 80149ee: f3bf 8f6f isb sy
- 80149f2: f3bf 8f4f dsb sy
- 80149f6: 61fb str r3, [r7, #28]
- }
- 80149f8: bf00 nop
- 80149fa: bf00 nop
- 80149fc: e7fd b.n 80149fa <xQueueReceive+0x5e>
- /* Cannot block if the scheduler is suspended. */
- #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
- {
- configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
- 80149fe: f001 fc23 bl 8016248 <xTaskGetSchedulerState>
- 8014a02: 4603 mov r3, r0
- 8014a04: 2b00 cmp r3, #0
- 8014a06: d102 bne.n 8014a0e <xQueueReceive+0x72>
- 8014a08: 687b ldr r3, [r7, #4]
- 8014a0a: 2b00 cmp r3, #0
- 8014a0c: d101 bne.n 8014a12 <xQueueReceive+0x76>
- 8014a0e: 2301 movs r3, #1
- 8014a10: e000 b.n 8014a14 <xQueueReceive+0x78>
- 8014a12: 2300 movs r3, #0
- 8014a14: 2b00 cmp r3, #0
- 8014a16: d10b bne.n 8014a30 <xQueueReceive+0x94>
- __asm volatile
- 8014a18: f04f 0350 mov.w r3, #80 @ 0x50
- 8014a1c: f383 8811 msr BASEPRI, r3
- 8014a20: f3bf 8f6f isb sy
- 8014a24: f3bf 8f4f dsb sy
- 8014a28: 61bb str r3, [r7, #24]
- }
- 8014a2a: bf00 nop
- 8014a2c: bf00 nop
- 8014a2e: e7fd b.n 8014a2c <xQueueReceive+0x90>
- /*lint -save -e904 This function relaxes the coding standard somewhat to
- allow return statements within the function itself. This is done in the
- interest of execution time efficiency. */
- for( ;; )
- {
- taskENTER_CRITICAL();
- 8014a30: f002 fd92 bl 8017558 <vPortEnterCritical>
- {
- const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
- 8014a34: 6abb ldr r3, [r7, #40] @ 0x28
- 8014a36: 6b9b ldr r3, [r3, #56] @ 0x38
- 8014a38: 627b str r3, [r7, #36] @ 0x24
- /* Is there data in the queue now? To be running the calling task
- must be the highest priority task wanting to access the queue. */
- if( uxMessagesWaiting > ( UBaseType_t ) 0 )
- 8014a3a: 6a7b ldr r3, [r7, #36] @ 0x24
- 8014a3c: 2b00 cmp r3, #0
- 8014a3e: d01f beq.n 8014a80 <xQueueReceive+0xe4>
- {
- /* Data available, remove one item. */
- prvCopyDataFromQueue( pxQueue, pvBuffer );
- 8014a40: 68b9 ldr r1, [r7, #8]
- 8014a42: 6ab8 ldr r0, [r7, #40] @ 0x28
- 8014a44: f000 faa0 bl 8014f88 <prvCopyDataFromQueue>
- traceQUEUE_RECEIVE( pxQueue );
- pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
- 8014a48: 6a7b ldr r3, [r7, #36] @ 0x24
- 8014a4a: 1e5a subs r2, r3, #1
- 8014a4c: 6abb ldr r3, [r7, #40] @ 0x28
- 8014a4e: 639a str r2, [r3, #56] @ 0x38
- /* There is now space in the queue, were any tasks waiting to
- post to the queue? If so, unblock the highest priority waiting
- task. */
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
- 8014a50: 6abb ldr r3, [r7, #40] @ 0x28
- 8014a52: 691b ldr r3, [r3, #16]
- 8014a54: 2b00 cmp r3, #0
- 8014a56: d00f beq.n 8014a78 <xQueueReceive+0xdc>
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
- 8014a58: 6abb ldr r3, [r7, #40] @ 0x28
- 8014a5a: 3310 adds r3, #16
- 8014a5c: 4618 mov r0, r3
- 8014a5e: f001 f9f5 bl 8015e4c <xTaskRemoveFromEventList>
- 8014a62: 4603 mov r3, r0
- 8014a64: 2b00 cmp r3, #0
- 8014a66: d007 beq.n 8014a78 <xQueueReceive+0xdc>
- {
- queueYIELD_IF_USING_PREEMPTION();
- 8014a68: 4b3c ldr r3, [pc, #240] @ (8014b5c <xQueueReceive+0x1c0>)
- 8014a6a: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 8014a6e: 601a str r2, [r3, #0]
- 8014a70: f3bf 8f4f dsb sy
- 8014a74: f3bf 8f6f isb sy
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- taskEXIT_CRITICAL();
- 8014a78: f002 fda0 bl 80175bc <vPortExitCritical>
- return pdPASS;
- 8014a7c: 2301 movs r3, #1
- 8014a7e: e069 b.n 8014b54 <xQueueReceive+0x1b8>
- }
- else
- {
- if( xTicksToWait == ( TickType_t ) 0 )
- 8014a80: 687b ldr r3, [r7, #4]
- 8014a82: 2b00 cmp r3, #0
- 8014a84: d103 bne.n 8014a8e <xQueueReceive+0xf2>
- {
- /* The queue was empty and no block time is specified (or
- the block time has expired) so leave now. */
- taskEXIT_CRITICAL();
- 8014a86: f002 fd99 bl 80175bc <vPortExitCritical>
- traceQUEUE_RECEIVE_FAILED( pxQueue );
- return errQUEUE_EMPTY;
- 8014a8a: 2300 movs r3, #0
- 8014a8c: e062 b.n 8014b54 <xQueueReceive+0x1b8>
- }
- else if( xEntryTimeSet == pdFALSE )
- 8014a8e: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014a90: 2b00 cmp r3, #0
- 8014a92: d106 bne.n 8014aa2 <xQueueReceive+0x106>
- {
- /* The queue was empty and a block time was specified so
- configure the timeout structure. */
- vTaskInternalSetTimeOutState( &xTimeOut );
- 8014a94: f107 0310 add.w r3, r7, #16
- 8014a98: 4618 mov r0, r3
- 8014a9a: f001 fa63 bl 8015f64 <vTaskInternalSetTimeOutState>
- xEntryTimeSet = pdTRUE;
- 8014a9e: 2301 movs r3, #1
- 8014aa0: 62fb str r3, [r7, #44] @ 0x2c
- /* Entry time was already set. */
- mtCOVERAGE_TEST_MARKER();
- }
- }
- }
- taskEXIT_CRITICAL();
- 8014aa2: f002 fd8b bl 80175bc <vPortExitCritical>
- /* Interrupts and other tasks can send to and receive from the queue
- now the critical section has been exited. */
- vTaskSuspendAll();
- 8014aa6: f000 ff95 bl 80159d4 <vTaskSuspendAll>
- prvLockQueue( pxQueue );
- 8014aaa: f002 fd55 bl 8017558 <vPortEnterCritical>
- 8014aae: 6abb ldr r3, [r7, #40] @ 0x28
- 8014ab0: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
- 8014ab4: b25b sxtb r3, r3
- 8014ab6: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 8014aba: d103 bne.n 8014ac4 <xQueueReceive+0x128>
- 8014abc: 6abb ldr r3, [r7, #40] @ 0x28
- 8014abe: 2200 movs r2, #0
- 8014ac0: f883 2044 strb.w r2, [r3, #68] @ 0x44
- 8014ac4: 6abb ldr r3, [r7, #40] @ 0x28
- 8014ac6: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
- 8014aca: b25b sxtb r3, r3
- 8014acc: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 8014ad0: d103 bne.n 8014ada <xQueueReceive+0x13e>
- 8014ad2: 6abb ldr r3, [r7, #40] @ 0x28
- 8014ad4: 2200 movs r2, #0
- 8014ad6: f883 2045 strb.w r2, [r3, #69] @ 0x45
- 8014ada: f002 fd6f bl 80175bc <vPortExitCritical>
- /* Update the timeout state to see if it has expired yet. */
- if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
- 8014ade: 1d3a adds r2, r7, #4
- 8014ae0: f107 0310 add.w r3, r7, #16
- 8014ae4: 4611 mov r1, r2
- 8014ae6: 4618 mov r0, r3
- 8014ae8: f001 fa52 bl 8015f90 <xTaskCheckForTimeOut>
- 8014aec: 4603 mov r3, r0
- 8014aee: 2b00 cmp r3, #0
- 8014af0: d123 bne.n 8014b3a <xQueueReceive+0x19e>
- {
- /* The timeout has not expired. If the queue is still empty place
- the task on the list of tasks waiting to receive from the queue. */
- if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
- 8014af2: 6ab8 ldr r0, [r7, #40] @ 0x28
- 8014af4: f000 fac0 bl 8015078 <prvIsQueueEmpty>
- 8014af8: 4603 mov r3, r0
- 8014afa: 2b00 cmp r3, #0
- 8014afc: d017 beq.n 8014b2e <xQueueReceive+0x192>
- {
- traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
- vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
- 8014afe: 6abb ldr r3, [r7, #40] @ 0x28
- 8014b00: 3324 adds r3, #36 @ 0x24
- 8014b02: 687a ldr r2, [r7, #4]
- 8014b04: 4611 mov r1, r2
- 8014b06: 4618 mov r0, r3
- 8014b08: f001 f94e bl 8015da8 <vTaskPlaceOnEventList>
- prvUnlockQueue( pxQueue );
- 8014b0c: 6ab8 ldr r0, [r7, #40] @ 0x28
- 8014b0e: f000 fa61 bl 8014fd4 <prvUnlockQueue>
- if( xTaskResumeAll() == pdFALSE )
- 8014b12: f000 ff6d bl 80159f0 <xTaskResumeAll>
- 8014b16: 4603 mov r3, r0
- 8014b18: 2b00 cmp r3, #0
- 8014b1a: d189 bne.n 8014a30 <xQueueReceive+0x94>
- {
- portYIELD_WITHIN_API();
- 8014b1c: 4b0f ldr r3, [pc, #60] @ (8014b5c <xQueueReceive+0x1c0>)
- 8014b1e: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 8014b22: 601a str r2, [r3, #0]
- 8014b24: f3bf 8f4f dsb sy
- 8014b28: f3bf 8f6f isb sy
- 8014b2c: e780 b.n 8014a30 <xQueueReceive+0x94>
- }
- else
- {
- /* The queue contains data again. Loop back to try and read the
- data. */
- prvUnlockQueue( pxQueue );
- 8014b2e: 6ab8 ldr r0, [r7, #40] @ 0x28
- 8014b30: f000 fa50 bl 8014fd4 <prvUnlockQueue>
- ( void ) xTaskResumeAll();
- 8014b34: f000 ff5c bl 80159f0 <xTaskResumeAll>
- 8014b38: e77a b.n 8014a30 <xQueueReceive+0x94>
- }
- else
- {
- /* Timed out. If there is no data in the queue exit, otherwise loop
- back and attempt to read the data. */
- prvUnlockQueue( pxQueue );
- 8014b3a: 6ab8 ldr r0, [r7, #40] @ 0x28
- 8014b3c: f000 fa4a bl 8014fd4 <prvUnlockQueue>
- ( void ) xTaskResumeAll();
- 8014b40: f000 ff56 bl 80159f0 <xTaskResumeAll>
- if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
- 8014b44: 6ab8 ldr r0, [r7, #40] @ 0x28
- 8014b46: f000 fa97 bl 8015078 <prvIsQueueEmpty>
- 8014b4a: 4603 mov r3, r0
- 8014b4c: 2b00 cmp r3, #0
- 8014b4e: f43f af6f beq.w 8014a30 <xQueueReceive+0x94>
- {
- traceQUEUE_RECEIVE_FAILED( pxQueue );
- return errQUEUE_EMPTY;
- 8014b52: 2300 movs r3, #0
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- } /*lint -restore */
- }
- 8014b54: 4618 mov r0, r3
- 8014b56: 3730 adds r7, #48 @ 0x30
- 8014b58: 46bd mov sp, r7
- 8014b5a: bd80 pop {r7, pc}
- 8014b5c: e000ed04 .word 0xe000ed04
- 08014b60 <xQueueSemaphoreTake>:
- /*-----------------------------------------------------------*/
- BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait )
- {
- 8014b60: b580 push {r7, lr}
- 8014b62: b08e sub sp, #56 @ 0x38
- 8014b64: af00 add r7, sp, #0
- 8014b66: 6078 str r0, [r7, #4]
- 8014b68: 6039 str r1, [r7, #0]
- BaseType_t xEntryTimeSet = pdFALSE;
- 8014b6a: 2300 movs r3, #0
- 8014b6c: 637b str r3, [r7, #52] @ 0x34
- TimeOut_t xTimeOut;
- Queue_t * const pxQueue = xQueue;
- 8014b6e: 687b ldr r3, [r7, #4]
- 8014b70: 62fb str r3, [r7, #44] @ 0x2c
- #if( configUSE_MUTEXES == 1 )
- BaseType_t xInheritanceOccurred = pdFALSE;
- 8014b72: 2300 movs r3, #0
- 8014b74: 633b str r3, [r7, #48] @ 0x30
- #endif
- /* Check the queue pointer is not NULL. */
- configASSERT( ( pxQueue ) );
- 8014b76: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014b78: 2b00 cmp r3, #0
- 8014b7a: d10b bne.n 8014b94 <xQueueSemaphoreTake+0x34>
- __asm volatile
- 8014b7c: f04f 0350 mov.w r3, #80 @ 0x50
- 8014b80: f383 8811 msr BASEPRI, r3
- 8014b84: f3bf 8f6f isb sy
- 8014b88: f3bf 8f4f dsb sy
- 8014b8c: 623b str r3, [r7, #32]
- }
- 8014b8e: bf00 nop
- 8014b90: bf00 nop
- 8014b92: e7fd b.n 8014b90 <xQueueSemaphoreTake+0x30>
- /* Check this really is a semaphore, in which case the item size will be
- 0. */
- configASSERT( pxQueue->uxItemSize == 0 );
- 8014b94: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014b96: 6c1b ldr r3, [r3, #64] @ 0x40
- 8014b98: 2b00 cmp r3, #0
- 8014b9a: d00b beq.n 8014bb4 <xQueueSemaphoreTake+0x54>
- __asm volatile
- 8014b9c: f04f 0350 mov.w r3, #80 @ 0x50
- 8014ba0: f383 8811 msr BASEPRI, r3
- 8014ba4: f3bf 8f6f isb sy
- 8014ba8: f3bf 8f4f dsb sy
- 8014bac: 61fb str r3, [r7, #28]
- }
- 8014bae: bf00 nop
- 8014bb0: bf00 nop
- 8014bb2: e7fd b.n 8014bb0 <xQueueSemaphoreTake+0x50>
- /* Cannot block if the scheduler is suspended. */
- #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
- {
- configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
- 8014bb4: f001 fb48 bl 8016248 <xTaskGetSchedulerState>
- 8014bb8: 4603 mov r3, r0
- 8014bba: 2b00 cmp r3, #0
- 8014bbc: d102 bne.n 8014bc4 <xQueueSemaphoreTake+0x64>
- 8014bbe: 683b ldr r3, [r7, #0]
- 8014bc0: 2b00 cmp r3, #0
- 8014bc2: d101 bne.n 8014bc8 <xQueueSemaphoreTake+0x68>
- 8014bc4: 2301 movs r3, #1
- 8014bc6: e000 b.n 8014bca <xQueueSemaphoreTake+0x6a>
- 8014bc8: 2300 movs r3, #0
- 8014bca: 2b00 cmp r3, #0
- 8014bcc: d10b bne.n 8014be6 <xQueueSemaphoreTake+0x86>
- __asm volatile
- 8014bce: f04f 0350 mov.w r3, #80 @ 0x50
- 8014bd2: f383 8811 msr BASEPRI, r3
- 8014bd6: f3bf 8f6f isb sy
- 8014bda: f3bf 8f4f dsb sy
- 8014bde: 61bb str r3, [r7, #24]
- }
- 8014be0: bf00 nop
- 8014be2: bf00 nop
- 8014be4: e7fd b.n 8014be2 <xQueueSemaphoreTake+0x82>
- /*lint -save -e904 This function relaxes the coding standard somewhat to allow return
- statements within the function itself. This is done in the interest
- of execution time efficiency. */
- for( ;; )
- {
- taskENTER_CRITICAL();
- 8014be6: f002 fcb7 bl 8017558 <vPortEnterCritical>
- {
- /* Semaphores are queues with an item size of 0, and where the
- number of messages in the queue is the semaphore's count value. */
- const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting;
- 8014bea: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014bec: 6b9b ldr r3, [r3, #56] @ 0x38
- 8014bee: 62bb str r3, [r7, #40] @ 0x28
- /* Is there data in the queue now? To be running the calling task
- must be the highest priority task wanting to access the queue. */
- if( uxSemaphoreCount > ( UBaseType_t ) 0 )
- 8014bf0: 6abb ldr r3, [r7, #40] @ 0x28
- 8014bf2: 2b00 cmp r3, #0
- 8014bf4: d024 beq.n 8014c40 <xQueueSemaphoreTake+0xe0>
- {
- traceQUEUE_RECEIVE( pxQueue );
- /* Semaphores are queues with a data size of zero and where the
- messages waiting is the semaphore's count. Reduce the count. */
- pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1;
- 8014bf6: 6abb ldr r3, [r7, #40] @ 0x28
- 8014bf8: 1e5a subs r2, r3, #1
- 8014bfa: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014bfc: 639a str r2, [r3, #56] @ 0x38
- #if ( configUSE_MUTEXES == 1 )
- {
- if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
- 8014bfe: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014c00: 681b ldr r3, [r3, #0]
- 8014c02: 2b00 cmp r3, #0
- 8014c04: d104 bne.n 8014c10 <xQueueSemaphoreTake+0xb0>
- {
- /* Record the information required to implement
- priority inheritance should it become necessary. */
- pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount();
- 8014c06: f001 fc99 bl 801653c <pvTaskIncrementMutexHeldCount>
- 8014c0a: 4602 mov r2, r0
- 8014c0c: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014c0e: 609a str r2, [r3, #8]
- }
- #endif /* configUSE_MUTEXES */
- /* Check to see if other tasks are blocked waiting to give the
- semaphore, and if so, unblock the highest priority such task. */
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
- 8014c10: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014c12: 691b ldr r3, [r3, #16]
- 8014c14: 2b00 cmp r3, #0
- 8014c16: d00f beq.n 8014c38 <xQueueSemaphoreTake+0xd8>
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
- 8014c18: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014c1a: 3310 adds r3, #16
- 8014c1c: 4618 mov r0, r3
- 8014c1e: f001 f915 bl 8015e4c <xTaskRemoveFromEventList>
- 8014c22: 4603 mov r3, r0
- 8014c24: 2b00 cmp r3, #0
- 8014c26: d007 beq.n 8014c38 <xQueueSemaphoreTake+0xd8>
- {
- queueYIELD_IF_USING_PREEMPTION();
- 8014c28: 4b54 ldr r3, [pc, #336] @ (8014d7c <xQueueSemaphoreTake+0x21c>)
- 8014c2a: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 8014c2e: 601a str r2, [r3, #0]
- 8014c30: f3bf 8f4f dsb sy
- 8014c34: f3bf 8f6f isb sy
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- taskEXIT_CRITICAL();
- 8014c38: f002 fcc0 bl 80175bc <vPortExitCritical>
- return pdPASS;
- 8014c3c: 2301 movs r3, #1
- 8014c3e: e098 b.n 8014d72 <xQueueSemaphoreTake+0x212>
- }
- else
- {
- if( xTicksToWait == ( TickType_t ) 0 )
- 8014c40: 683b ldr r3, [r7, #0]
- 8014c42: 2b00 cmp r3, #0
- 8014c44: d112 bne.n 8014c6c <xQueueSemaphoreTake+0x10c>
- /* For inheritance to have occurred there must have been an
- initial timeout, and an adjusted timeout cannot become 0, as
- if it were 0 the function would have exited. */
- #if( configUSE_MUTEXES == 1 )
- {
- configASSERT( xInheritanceOccurred == pdFALSE );
- 8014c46: 6b3b ldr r3, [r7, #48] @ 0x30
- 8014c48: 2b00 cmp r3, #0
- 8014c4a: d00b beq.n 8014c64 <xQueueSemaphoreTake+0x104>
- __asm volatile
- 8014c4c: f04f 0350 mov.w r3, #80 @ 0x50
- 8014c50: f383 8811 msr BASEPRI, r3
- 8014c54: f3bf 8f6f isb sy
- 8014c58: f3bf 8f4f dsb sy
- 8014c5c: 617b str r3, [r7, #20]
- }
- 8014c5e: bf00 nop
- 8014c60: bf00 nop
- 8014c62: e7fd b.n 8014c60 <xQueueSemaphoreTake+0x100>
- }
- #endif /* configUSE_MUTEXES */
- /* The semaphore count was 0 and no block time is specified
- (or the block time has expired) so exit now. */
- taskEXIT_CRITICAL();
- 8014c64: f002 fcaa bl 80175bc <vPortExitCritical>
- traceQUEUE_RECEIVE_FAILED( pxQueue );
- return errQUEUE_EMPTY;
- 8014c68: 2300 movs r3, #0
- 8014c6a: e082 b.n 8014d72 <xQueueSemaphoreTake+0x212>
- }
- else if( xEntryTimeSet == pdFALSE )
- 8014c6c: 6b7b ldr r3, [r7, #52] @ 0x34
- 8014c6e: 2b00 cmp r3, #0
- 8014c70: d106 bne.n 8014c80 <xQueueSemaphoreTake+0x120>
- {
- /* The semaphore count was 0 and a block time was specified
- so configure the timeout structure ready to block. */
- vTaskInternalSetTimeOutState( &xTimeOut );
- 8014c72: f107 030c add.w r3, r7, #12
- 8014c76: 4618 mov r0, r3
- 8014c78: f001 f974 bl 8015f64 <vTaskInternalSetTimeOutState>
- xEntryTimeSet = pdTRUE;
- 8014c7c: 2301 movs r3, #1
- 8014c7e: 637b str r3, [r7, #52] @ 0x34
- /* Entry time was already set. */
- mtCOVERAGE_TEST_MARKER();
- }
- }
- }
- taskEXIT_CRITICAL();
- 8014c80: f002 fc9c bl 80175bc <vPortExitCritical>
- /* Interrupts and other tasks can give to and take from the semaphore
- now the critical section has been exited. */
- vTaskSuspendAll();
- 8014c84: f000 fea6 bl 80159d4 <vTaskSuspendAll>
- prvLockQueue( pxQueue );
- 8014c88: f002 fc66 bl 8017558 <vPortEnterCritical>
- 8014c8c: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014c8e: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
- 8014c92: b25b sxtb r3, r3
- 8014c94: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 8014c98: d103 bne.n 8014ca2 <xQueueSemaphoreTake+0x142>
- 8014c9a: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014c9c: 2200 movs r2, #0
- 8014c9e: f883 2044 strb.w r2, [r3, #68] @ 0x44
- 8014ca2: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014ca4: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
- 8014ca8: b25b sxtb r3, r3
- 8014caa: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 8014cae: d103 bne.n 8014cb8 <xQueueSemaphoreTake+0x158>
- 8014cb0: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014cb2: 2200 movs r2, #0
- 8014cb4: f883 2045 strb.w r2, [r3, #69] @ 0x45
- 8014cb8: f002 fc80 bl 80175bc <vPortExitCritical>
- /* Update the timeout state to see if it has expired yet. */
- if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
- 8014cbc: 463a mov r2, r7
- 8014cbe: f107 030c add.w r3, r7, #12
- 8014cc2: 4611 mov r1, r2
- 8014cc4: 4618 mov r0, r3
- 8014cc6: f001 f963 bl 8015f90 <xTaskCheckForTimeOut>
- 8014cca: 4603 mov r3, r0
- 8014ccc: 2b00 cmp r3, #0
- 8014cce: d132 bne.n 8014d36 <xQueueSemaphoreTake+0x1d6>
- {
- /* A block time is specified and not expired. If the semaphore
- count is 0 then enter the Blocked state to wait for a semaphore to
- become available. As semaphores are implemented with queues the
- queue being empty is equivalent to the semaphore count being 0. */
- if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
- 8014cd0: 6af8 ldr r0, [r7, #44] @ 0x2c
- 8014cd2: f000 f9d1 bl 8015078 <prvIsQueueEmpty>
- 8014cd6: 4603 mov r3, r0
- 8014cd8: 2b00 cmp r3, #0
- 8014cda: d026 beq.n 8014d2a <xQueueSemaphoreTake+0x1ca>
- {
- traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
- #if ( configUSE_MUTEXES == 1 )
- {
- if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
- 8014cdc: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014cde: 681b ldr r3, [r3, #0]
- 8014ce0: 2b00 cmp r3, #0
- 8014ce2: d109 bne.n 8014cf8 <xQueueSemaphoreTake+0x198>
- {
- taskENTER_CRITICAL();
- 8014ce4: f002 fc38 bl 8017558 <vPortEnterCritical>
- {
- xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder );
- 8014ce8: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014cea: 689b ldr r3, [r3, #8]
- 8014cec: 4618 mov r0, r3
- 8014cee: f001 fac9 bl 8016284 <xTaskPriorityInherit>
- 8014cf2: 6338 str r0, [r7, #48] @ 0x30
- }
- taskEXIT_CRITICAL();
- 8014cf4: f002 fc62 bl 80175bc <vPortExitCritical>
- mtCOVERAGE_TEST_MARKER();
- }
- }
- #endif
- vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
- 8014cf8: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014cfa: 3324 adds r3, #36 @ 0x24
- 8014cfc: 683a ldr r2, [r7, #0]
- 8014cfe: 4611 mov r1, r2
- 8014d00: 4618 mov r0, r3
- 8014d02: f001 f851 bl 8015da8 <vTaskPlaceOnEventList>
- prvUnlockQueue( pxQueue );
- 8014d06: 6af8 ldr r0, [r7, #44] @ 0x2c
- 8014d08: f000 f964 bl 8014fd4 <prvUnlockQueue>
- if( xTaskResumeAll() == pdFALSE )
- 8014d0c: f000 fe70 bl 80159f0 <xTaskResumeAll>
- 8014d10: 4603 mov r3, r0
- 8014d12: 2b00 cmp r3, #0
- 8014d14: f47f af67 bne.w 8014be6 <xQueueSemaphoreTake+0x86>
- {
- portYIELD_WITHIN_API();
- 8014d18: 4b18 ldr r3, [pc, #96] @ (8014d7c <xQueueSemaphoreTake+0x21c>)
- 8014d1a: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 8014d1e: 601a str r2, [r3, #0]
- 8014d20: f3bf 8f4f dsb sy
- 8014d24: f3bf 8f6f isb sy
- 8014d28: e75d b.n 8014be6 <xQueueSemaphoreTake+0x86>
- }
- else
- {
- /* There was no timeout and the semaphore count was not 0, so
- attempt to take the semaphore again. */
- prvUnlockQueue( pxQueue );
- 8014d2a: 6af8 ldr r0, [r7, #44] @ 0x2c
- 8014d2c: f000 f952 bl 8014fd4 <prvUnlockQueue>
- ( void ) xTaskResumeAll();
- 8014d30: f000 fe5e bl 80159f0 <xTaskResumeAll>
- 8014d34: e757 b.n 8014be6 <xQueueSemaphoreTake+0x86>
- }
- }
- else
- {
- /* Timed out. */
- prvUnlockQueue( pxQueue );
- 8014d36: 6af8 ldr r0, [r7, #44] @ 0x2c
- 8014d38: f000 f94c bl 8014fd4 <prvUnlockQueue>
- ( void ) xTaskResumeAll();
- 8014d3c: f000 fe58 bl 80159f0 <xTaskResumeAll>
- /* If the semaphore count is 0 exit now as the timeout has
- expired. Otherwise return to attempt to take the semaphore that is
- known to be available. As semaphores are implemented by queues the
- queue being empty is equivalent to the semaphore count being 0. */
- if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
- 8014d40: 6af8 ldr r0, [r7, #44] @ 0x2c
- 8014d42: f000 f999 bl 8015078 <prvIsQueueEmpty>
- 8014d46: 4603 mov r3, r0
- 8014d48: 2b00 cmp r3, #0
- 8014d4a: f43f af4c beq.w 8014be6 <xQueueSemaphoreTake+0x86>
- #if ( configUSE_MUTEXES == 1 )
- {
- /* xInheritanceOccurred could only have be set if
- pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to
- test the mutex type again to check it is actually a mutex. */
- if( xInheritanceOccurred != pdFALSE )
- 8014d4e: 6b3b ldr r3, [r7, #48] @ 0x30
- 8014d50: 2b00 cmp r3, #0
- 8014d52: d00d beq.n 8014d70 <xQueueSemaphoreTake+0x210>
- {
- taskENTER_CRITICAL();
- 8014d54: f002 fc00 bl 8017558 <vPortEnterCritical>
- /* This task blocking on the mutex caused another
- task to inherit this task's priority. Now this task
- has timed out the priority should be disinherited
- again, but only as low as the next highest priority
- task that is waiting for the same mutex. */
- uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue );
- 8014d58: 6af8 ldr r0, [r7, #44] @ 0x2c
- 8014d5a: f000 f893 bl 8014e84 <prvGetDisinheritPriorityAfterTimeout>
- 8014d5e: 6278 str r0, [r7, #36] @ 0x24
- vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority );
- 8014d60: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014d62: 689b ldr r3, [r3, #8]
- 8014d64: 6a79 ldr r1, [r7, #36] @ 0x24
- 8014d66: 4618 mov r0, r3
- 8014d68: f001 fb64 bl 8016434 <vTaskPriorityDisinheritAfterTimeout>
- }
- taskEXIT_CRITICAL();
- 8014d6c: f002 fc26 bl 80175bc <vPortExitCritical>
- }
- }
- #endif /* configUSE_MUTEXES */
- traceQUEUE_RECEIVE_FAILED( pxQueue );
- return errQUEUE_EMPTY;
- 8014d70: 2300 movs r3, #0
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- } /*lint -restore */
- }
- 8014d72: 4618 mov r0, r3
- 8014d74: 3738 adds r7, #56 @ 0x38
- 8014d76: 46bd mov sp, r7
- 8014d78: bd80 pop {r7, pc}
- 8014d7a: bf00 nop
- 8014d7c: e000ed04 .word 0xe000ed04
- 08014d80 <xQueueReceiveFromISR>:
- } /*lint -restore */
- }
- /*-----------------------------------------------------------*/
- BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken )
- {
- 8014d80: b580 push {r7, lr}
- 8014d82: b08e sub sp, #56 @ 0x38
- 8014d84: af00 add r7, sp, #0
- 8014d86: 60f8 str r0, [r7, #12]
- 8014d88: 60b9 str r1, [r7, #8]
- 8014d8a: 607a str r2, [r7, #4]
- BaseType_t xReturn;
- UBaseType_t uxSavedInterruptStatus;
- Queue_t * const pxQueue = xQueue;
- 8014d8c: 68fb ldr r3, [r7, #12]
- 8014d8e: 633b str r3, [r7, #48] @ 0x30
- configASSERT( pxQueue );
- 8014d90: 6b3b ldr r3, [r7, #48] @ 0x30
- 8014d92: 2b00 cmp r3, #0
- 8014d94: d10b bne.n 8014dae <xQueueReceiveFromISR+0x2e>
- __asm volatile
- 8014d96: f04f 0350 mov.w r3, #80 @ 0x50
- 8014d9a: f383 8811 msr BASEPRI, r3
- 8014d9e: f3bf 8f6f isb sy
- 8014da2: f3bf 8f4f dsb sy
- 8014da6: 623b str r3, [r7, #32]
- }
- 8014da8: bf00 nop
- 8014daa: bf00 nop
- 8014dac: e7fd b.n 8014daa <xQueueReceiveFromISR+0x2a>
- configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
- 8014dae: 68bb ldr r3, [r7, #8]
- 8014db0: 2b00 cmp r3, #0
- 8014db2: d103 bne.n 8014dbc <xQueueReceiveFromISR+0x3c>
- 8014db4: 6b3b ldr r3, [r7, #48] @ 0x30
- 8014db6: 6c1b ldr r3, [r3, #64] @ 0x40
- 8014db8: 2b00 cmp r3, #0
- 8014dba: d101 bne.n 8014dc0 <xQueueReceiveFromISR+0x40>
- 8014dbc: 2301 movs r3, #1
- 8014dbe: e000 b.n 8014dc2 <xQueueReceiveFromISR+0x42>
- 8014dc0: 2300 movs r3, #0
- 8014dc2: 2b00 cmp r3, #0
- 8014dc4: d10b bne.n 8014dde <xQueueReceiveFromISR+0x5e>
- __asm volatile
- 8014dc6: f04f 0350 mov.w r3, #80 @ 0x50
- 8014dca: f383 8811 msr BASEPRI, r3
- 8014dce: f3bf 8f6f isb sy
- 8014dd2: f3bf 8f4f dsb sy
- 8014dd6: 61fb str r3, [r7, #28]
- }
- 8014dd8: bf00 nop
- 8014dda: bf00 nop
- 8014ddc: e7fd b.n 8014dda <xQueueReceiveFromISR+0x5a>
- that have been assigned a priority at or (logically) below the maximum
- system call interrupt priority. FreeRTOS maintains a separate interrupt
- safe API to ensure interrupt entry is as fast and as simple as possible.
- More information (albeit Cortex-M specific) is provided on the following
- link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
- portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
- 8014dde: f002 fc9b bl 8017718 <vPortValidateInterruptPriority>
- __asm volatile
- 8014de2: f3ef 8211 mrs r2, BASEPRI
- 8014de6: f04f 0350 mov.w r3, #80 @ 0x50
- 8014dea: f383 8811 msr BASEPRI, r3
- 8014dee: f3bf 8f6f isb sy
- 8014df2: f3bf 8f4f dsb sy
- 8014df6: 61ba str r2, [r7, #24]
- 8014df8: 617b str r3, [r7, #20]
- return ulOriginalBASEPRI;
- 8014dfa: 69bb ldr r3, [r7, #24]
- uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
- 8014dfc: 62fb str r3, [r7, #44] @ 0x2c
- {
- const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
- 8014dfe: 6b3b ldr r3, [r7, #48] @ 0x30
- 8014e00: 6b9b ldr r3, [r3, #56] @ 0x38
- 8014e02: 62bb str r3, [r7, #40] @ 0x28
- /* Cannot block in an ISR, so check there is data available. */
- if( uxMessagesWaiting > ( UBaseType_t ) 0 )
- 8014e04: 6abb ldr r3, [r7, #40] @ 0x28
- 8014e06: 2b00 cmp r3, #0
- 8014e08: d02f beq.n 8014e6a <xQueueReceiveFromISR+0xea>
- {
- const int8_t cRxLock = pxQueue->cRxLock;
- 8014e0a: 6b3b ldr r3, [r7, #48] @ 0x30
- 8014e0c: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
- 8014e10: f887 3027 strb.w r3, [r7, #39] @ 0x27
- traceQUEUE_RECEIVE_FROM_ISR( pxQueue );
- prvCopyDataFromQueue( pxQueue, pvBuffer );
- 8014e14: 68b9 ldr r1, [r7, #8]
- 8014e16: 6b38 ldr r0, [r7, #48] @ 0x30
- 8014e18: f000 f8b6 bl 8014f88 <prvCopyDataFromQueue>
- pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
- 8014e1c: 6abb ldr r3, [r7, #40] @ 0x28
- 8014e1e: 1e5a subs r2, r3, #1
- 8014e20: 6b3b ldr r3, [r7, #48] @ 0x30
- 8014e22: 639a str r2, [r3, #56] @ 0x38
- /* If the queue is locked the event list will not be modified.
- Instead update the lock count so the task that unlocks the queue
- will know that an ISR has removed data while the queue was
- locked. */
- if( cRxLock == queueUNLOCKED )
- 8014e24: f997 3027 ldrsb.w r3, [r7, #39] @ 0x27
- 8014e28: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 8014e2c: d112 bne.n 8014e54 <xQueueReceiveFromISR+0xd4>
- {
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
- 8014e2e: 6b3b ldr r3, [r7, #48] @ 0x30
- 8014e30: 691b ldr r3, [r3, #16]
- 8014e32: 2b00 cmp r3, #0
- 8014e34: d016 beq.n 8014e64 <xQueueReceiveFromISR+0xe4>
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
- 8014e36: 6b3b ldr r3, [r7, #48] @ 0x30
- 8014e38: 3310 adds r3, #16
- 8014e3a: 4618 mov r0, r3
- 8014e3c: f001 f806 bl 8015e4c <xTaskRemoveFromEventList>
- 8014e40: 4603 mov r3, r0
- 8014e42: 2b00 cmp r3, #0
- 8014e44: d00e beq.n 8014e64 <xQueueReceiveFromISR+0xe4>
- {
- /* The task waiting has a higher priority than us so
- force a context switch. */
- if( pxHigherPriorityTaskWoken != NULL )
- 8014e46: 687b ldr r3, [r7, #4]
- 8014e48: 2b00 cmp r3, #0
- 8014e4a: d00b beq.n 8014e64 <xQueueReceiveFromISR+0xe4>
- {
- *pxHigherPriorityTaskWoken = pdTRUE;
- 8014e4c: 687b ldr r3, [r7, #4]
- 8014e4e: 2201 movs r2, #1
- 8014e50: 601a str r2, [r3, #0]
- 8014e52: e007 b.n 8014e64 <xQueueReceiveFromISR+0xe4>
- }
- else
- {
- /* Increment the lock count so the task that unlocks the queue
- knows that data was removed while it was locked. */
- pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
- 8014e54: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
- 8014e58: 3301 adds r3, #1
- 8014e5a: b2db uxtb r3, r3
- 8014e5c: b25a sxtb r2, r3
- 8014e5e: 6b3b ldr r3, [r7, #48] @ 0x30
- 8014e60: f883 2044 strb.w r2, [r3, #68] @ 0x44
- }
- xReturn = pdPASS;
- 8014e64: 2301 movs r3, #1
- 8014e66: 637b str r3, [r7, #52] @ 0x34
- 8014e68: e001 b.n 8014e6e <xQueueReceiveFromISR+0xee>
- }
- else
- {
- xReturn = pdFAIL;
- 8014e6a: 2300 movs r3, #0
- 8014e6c: 637b str r3, [r7, #52] @ 0x34
- 8014e6e: 6afb ldr r3, [r7, #44] @ 0x2c
- 8014e70: 613b str r3, [r7, #16]
- __asm volatile
- 8014e72: 693b ldr r3, [r7, #16]
- 8014e74: f383 8811 msr BASEPRI, r3
- }
- 8014e78: bf00 nop
- traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
- }
- }
- portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
- return xReturn;
- 8014e7a: 6b7b ldr r3, [r7, #52] @ 0x34
- }
- 8014e7c: 4618 mov r0, r3
- 8014e7e: 3738 adds r7, #56 @ 0x38
- 8014e80: 46bd mov sp, r7
- 8014e82: bd80 pop {r7, pc}
- 08014e84 <prvGetDisinheritPriorityAfterTimeout>:
- /*-----------------------------------------------------------*/
- #if( configUSE_MUTEXES == 1 )
- static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue )
- {
- 8014e84: b480 push {r7}
- 8014e86: b085 sub sp, #20
- 8014e88: af00 add r7, sp, #0
- 8014e8a: 6078 str r0, [r7, #4]
- priority, but the waiting task times out, then the holder should
- disinherit the priority - but only down to the highest priority of any
- other tasks that are waiting for the same mutex. For this purpose,
- return the priority of the highest priority task that is waiting for the
- mutex. */
- if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U )
- 8014e8c: 687b ldr r3, [r7, #4]
- 8014e8e: 6a5b ldr r3, [r3, #36] @ 0x24
- 8014e90: 2b00 cmp r3, #0
- 8014e92: d006 beq.n 8014ea2 <prvGetDisinheritPriorityAfterTimeout+0x1e>
- {
- uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) );
- 8014e94: 687b ldr r3, [r7, #4]
- 8014e96: 6b1b ldr r3, [r3, #48] @ 0x30
- 8014e98: 681b ldr r3, [r3, #0]
- 8014e9a: f1c3 0338 rsb r3, r3, #56 @ 0x38
- 8014e9e: 60fb str r3, [r7, #12]
- 8014ea0: e001 b.n 8014ea6 <prvGetDisinheritPriorityAfterTimeout+0x22>
- }
- else
- {
- uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY;
- 8014ea2: 2300 movs r3, #0
- 8014ea4: 60fb str r3, [r7, #12]
- }
- return uxHighestPriorityOfWaitingTasks;
- 8014ea6: 68fb ldr r3, [r7, #12]
- }
- 8014ea8: 4618 mov r0, r3
- 8014eaa: 3714 adds r7, #20
- 8014eac: 46bd mov sp, r7
- 8014eae: f85d 7b04 ldr.w r7, [sp], #4
- 8014eb2: 4770 bx lr
- 08014eb4 <prvCopyDataToQueue>:
- #endif /* configUSE_MUTEXES */
- /*-----------------------------------------------------------*/
- static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
- {
- 8014eb4: b580 push {r7, lr}
- 8014eb6: b086 sub sp, #24
- 8014eb8: af00 add r7, sp, #0
- 8014eba: 60f8 str r0, [r7, #12]
- 8014ebc: 60b9 str r1, [r7, #8]
- 8014ebe: 607a str r2, [r7, #4]
- BaseType_t xReturn = pdFALSE;
- 8014ec0: 2300 movs r3, #0
- 8014ec2: 617b str r3, [r7, #20]
- UBaseType_t uxMessagesWaiting;
- /* This function is called from a critical section. */
- uxMessagesWaiting = pxQueue->uxMessagesWaiting;
- 8014ec4: 68fb ldr r3, [r7, #12]
- 8014ec6: 6b9b ldr r3, [r3, #56] @ 0x38
- 8014ec8: 613b str r3, [r7, #16]
- if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
- 8014eca: 68fb ldr r3, [r7, #12]
- 8014ecc: 6c1b ldr r3, [r3, #64] @ 0x40
- 8014ece: 2b00 cmp r3, #0
- 8014ed0: d10d bne.n 8014eee <prvCopyDataToQueue+0x3a>
- {
- #if ( configUSE_MUTEXES == 1 )
- {
- if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
- 8014ed2: 68fb ldr r3, [r7, #12]
- 8014ed4: 681b ldr r3, [r3, #0]
- 8014ed6: 2b00 cmp r3, #0
- 8014ed8: d14d bne.n 8014f76 <prvCopyDataToQueue+0xc2>
- {
- /* The mutex is no longer being held. */
- xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder );
- 8014eda: 68fb ldr r3, [r7, #12]
- 8014edc: 689b ldr r3, [r3, #8]
- 8014ede: 4618 mov r0, r3
- 8014ee0: f001 fa38 bl 8016354 <xTaskPriorityDisinherit>
- 8014ee4: 6178 str r0, [r7, #20]
- pxQueue->u.xSemaphore.xMutexHolder = NULL;
- 8014ee6: 68fb ldr r3, [r7, #12]
- 8014ee8: 2200 movs r2, #0
- 8014eea: 609a str r2, [r3, #8]
- 8014eec: e043 b.n 8014f76 <prvCopyDataToQueue+0xc2>
- mtCOVERAGE_TEST_MARKER();
- }
- }
- #endif /* configUSE_MUTEXES */
- }
- else if( xPosition == queueSEND_TO_BACK )
- 8014eee: 687b ldr r3, [r7, #4]
- 8014ef0: 2b00 cmp r3, #0
- 8014ef2: d119 bne.n 8014f28 <prvCopyDataToQueue+0x74>
- {
- ( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
- 8014ef4: 68fb ldr r3, [r7, #12]
- 8014ef6: 6858 ldr r0, [r3, #4]
- 8014ef8: 68fb ldr r3, [r7, #12]
- 8014efa: 6c1b ldr r3, [r3, #64] @ 0x40
- 8014efc: 461a mov r2, r3
- 8014efe: 68b9 ldr r1, [r7, #8]
- 8014f00: f003 f823 bl 8017f4a <memcpy>
- pxQueue->pcWriteTo += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
- 8014f04: 68fb ldr r3, [r7, #12]
- 8014f06: 685a ldr r2, [r3, #4]
- 8014f08: 68fb ldr r3, [r7, #12]
- 8014f0a: 6c1b ldr r3, [r3, #64] @ 0x40
- 8014f0c: 441a add r2, r3
- 8014f0e: 68fb ldr r3, [r7, #12]
- 8014f10: 605a str r2, [r3, #4]
- if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
- 8014f12: 68fb ldr r3, [r7, #12]
- 8014f14: 685a ldr r2, [r3, #4]
- 8014f16: 68fb ldr r3, [r7, #12]
- 8014f18: 689b ldr r3, [r3, #8]
- 8014f1a: 429a cmp r2, r3
- 8014f1c: d32b bcc.n 8014f76 <prvCopyDataToQueue+0xc2>
- {
- pxQueue->pcWriteTo = pxQueue->pcHead;
- 8014f1e: 68fb ldr r3, [r7, #12]
- 8014f20: 681a ldr r2, [r3, #0]
- 8014f22: 68fb ldr r3, [r7, #12]
- 8014f24: 605a str r2, [r3, #4]
- 8014f26: e026 b.n 8014f76 <prvCopyDataToQueue+0xc2>
- mtCOVERAGE_TEST_MARKER();
- }
- }
- else
- {
- ( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. Assert checks null pointer only used when length is 0. */
- 8014f28: 68fb ldr r3, [r7, #12]
- 8014f2a: 68d8 ldr r0, [r3, #12]
- 8014f2c: 68fb ldr r3, [r7, #12]
- 8014f2e: 6c1b ldr r3, [r3, #64] @ 0x40
- 8014f30: 461a mov r2, r3
- 8014f32: 68b9 ldr r1, [r7, #8]
- 8014f34: f003 f809 bl 8017f4a <memcpy>
- pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize;
- 8014f38: 68fb ldr r3, [r7, #12]
- 8014f3a: 68da ldr r2, [r3, #12]
- 8014f3c: 68fb ldr r3, [r7, #12]
- 8014f3e: 6c1b ldr r3, [r3, #64] @ 0x40
- 8014f40: 425b negs r3, r3
- 8014f42: 441a add r2, r3
- 8014f44: 68fb ldr r3, [r7, #12]
- 8014f46: 60da str r2, [r3, #12]
- if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
- 8014f48: 68fb ldr r3, [r7, #12]
- 8014f4a: 68da ldr r2, [r3, #12]
- 8014f4c: 68fb ldr r3, [r7, #12]
- 8014f4e: 681b ldr r3, [r3, #0]
- 8014f50: 429a cmp r2, r3
- 8014f52: d207 bcs.n 8014f64 <prvCopyDataToQueue+0xb0>
- {
- pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize );
- 8014f54: 68fb ldr r3, [r7, #12]
- 8014f56: 689a ldr r2, [r3, #8]
- 8014f58: 68fb ldr r3, [r7, #12]
- 8014f5a: 6c1b ldr r3, [r3, #64] @ 0x40
- 8014f5c: 425b negs r3, r3
- 8014f5e: 441a add r2, r3
- 8014f60: 68fb ldr r3, [r7, #12]
- 8014f62: 60da str r2, [r3, #12]
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- if( xPosition == queueOVERWRITE )
- 8014f64: 687b ldr r3, [r7, #4]
- 8014f66: 2b02 cmp r3, #2
- 8014f68: d105 bne.n 8014f76 <prvCopyDataToQueue+0xc2>
- {
- if( uxMessagesWaiting > ( UBaseType_t ) 0 )
- 8014f6a: 693b ldr r3, [r7, #16]
- 8014f6c: 2b00 cmp r3, #0
- 8014f6e: d002 beq.n 8014f76 <prvCopyDataToQueue+0xc2>
- {
- /* An item is not being added but overwritten, so subtract
- one from the recorded number of items in the queue so when
- one is added again below the number of recorded items remains
- correct. */
- --uxMessagesWaiting;
- 8014f70: 693b ldr r3, [r7, #16]
- 8014f72: 3b01 subs r3, #1
- 8014f74: 613b str r3, [r7, #16]
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
- 8014f76: 693b ldr r3, [r7, #16]
- 8014f78: 1c5a adds r2, r3, #1
- 8014f7a: 68fb ldr r3, [r7, #12]
- 8014f7c: 639a str r2, [r3, #56] @ 0x38
- return xReturn;
- 8014f7e: 697b ldr r3, [r7, #20]
- }
- 8014f80: 4618 mov r0, r3
- 8014f82: 3718 adds r7, #24
- 8014f84: 46bd mov sp, r7
- 8014f86: bd80 pop {r7, pc}
- 08014f88 <prvCopyDataFromQueue>:
- /*-----------------------------------------------------------*/
- static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )
- {
- 8014f88: b580 push {r7, lr}
- 8014f8a: b082 sub sp, #8
- 8014f8c: af00 add r7, sp, #0
- 8014f8e: 6078 str r0, [r7, #4]
- 8014f90: 6039 str r1, [r7, #0]
- if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
- 8014f92: 687b ldr r3, [r7, #4]
- 8014f94: 6c1b ldr r3, [r3, #64] @ 0x40
- 8014f96: 2b00 cmp r3, #0
- 8014f98: d018 beq.n 8014fcc <prvCopyDataFromQueue+0x44>
- {
- pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
- 8014f9a: 687b ldr r3, [r7, #4]
- 8014f9c: 68da ldr r2, [r3, #12]
- 8014f9e: 687b ldr r3, [r7, #4]
- 8014fa0: 6c1b ldr r3, [r3, #64] @ 0x40
- 8014fa2: 441a add r2, r3
- 8014fa4: 687b ldr r3, [r7, #4]
- 8014fa6: 60da str r2, [r3, #12]
- if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
- 8014fa8: 687b ldr r3, [r7, #4]
- 8014faa: 68da ldr r2, [r3, #12]
- 8014fac: 687b ldr r3, [r7, #4]
- 8014fae: 689b ldr r3, [r3, #8]
- 8014fb0: 429a cmp r2, r3
- 8014fb2: d303 bcc.n 8014fbc <prvCopyDataFromQueue+0x34>
- {
- pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
- 8014fb4: 687b ldr r3, [r7, #4]
- 8014fb6: 681a ldr r2, [r3, #0]
- 8014fb8: 687b ldr r3, [r7, #4]
- 8014fba: 60da str r2, [r3, #12]
- }
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- ( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports. Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
- 8014fbc: 687b ldr r3, [r7, #4]
- 8014fbe: 68d9 ldr r1, [r3, #12]
- 8014fc0: 687b ldr r3, [r7, #4]
- 8014fc2: 6c1b ldr r3, [r3, #64] @ 0x40
- 8014fc4: 461a mov r2, r3
- 8014fc6: 6838 ldr r0, [r7, #0]
- 8014fc8: f002 ffbf bl 8017f4a <memcpy>
- }
- }
- 8014fcc: bf00 nop
- 8014fce: 3708 adds r7, #8
- 8014fd0: 46bd mov sp, r7
- 8014fd2: bd80 pop {r7, pc}
- 08014fd4 <prvUnlockQueue>:
- /*-----------------------------------------------------------*/
- static void prvUnlockQueue( Queue_t * const pxQueue )
- {
- 8014fd4: b580 push {r7, lr}
- 8014fd6: b084 sub sp, #16
- 8014fd8: af00 add r7, sp, #0
- 8014fda: 6078 str r0, [r7, #4]
- /* The lock counts contains the number of extra data items placed or
- removed from the queue while the queue was locked. When a queue is
- locked items can be added or removed, but the event lists cannot be
- updated. */
- taskENTER_CRITICAL();
- 8014fdc: f002 fabc bl 8017558 <vPortEnterCritical>
- {
- int8_t cTxLock = pxQueue->cTxLock;
- 8014fe0: 687b ldr r3, [r7, #4]
- 8014fe2: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
- 8014fe6: 73fb strb r3, [r7, #15]
- /* See if data was added to the queue while it was locked. */
- while( cTxLock > queueLOCKED_UNMODIFIED )
- 8014fe8: e011 b.n 801500e <prvUnlockQueue+0x3a>
- }
- #else /* configUSE_QUEUE_SETS */
- {
- /* Tasks that are removed from the event list will get added to
- the pending ready list as the scheduler is still suspended. */
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
- 8014fea: 687b ldr r3, [r7, #4]
- 8014fec: 6a5b ldr r3, [r3, #36] @ 0x24
- 8014fee: 2b00 cmp r3, #0
- 8014ff0: d012 beq.n 8015018 <prvUnlockQueue+0x44>
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
- 8014ff2: 687b ldr r3, [r7, #4]
- 8014ff4: 3324 adds r3, #36 @ 0x24
- 8014ff6: 4618 mov r0, r3
- 8014ff8: f000 ff28 bl 8015e4c <xTaskRemoveFromEventList>
- 8014ffc: 4603 mov r3, r0
- 8014ffe: 2b00 cmp r3, #0
- 8015000: d001 beq.n 8015006 <prvUnlockQueue+0x32>
- {
- /* The task waiting has a higher priority so record that
- a context switch is required. */
- vTaskMissedYield();
- 8015002: f001 f829 bl 8016058 <vTaskMissedYield>
- break;
- }
- }
- #endif /* configUSE_QUEUE_SETS */
- --cTxLock;
- 8015006: 7bfb ldrb r3, [r7, #15]
- 8015008: 3b01 subs r3, #1
- 801500a: b2db uxtb r3, r3
- 801500c: 73fb strb r3, [r7, #15]
- while( cTxLock > queueLOCKED_UNMODIFIED )
- 801500e: f997 300f ldrsb.w r3, [r7, #15]
- 8015012: 2b00 cmp r3, #0
- 8015014: dce9 bgt.n 8014fea <prvUnlockQueue+0x16>
- 8015016: e000 b.n 801501a <prvUnlockQueue+0x46>
- break;
- 8015018: bf00 nop
- }
- pxQueue->cTxLock = queueUNLOCKED;
- 801501a: 687b ldr r3, [r7, #4]
- 801501c: 22ff movs r2, #255 @ 0xff
- 801501e: f883 2045 strb.w r2, [r3, #69] @ 0x45
- }
- taskEXIT_CRITICAL();
- 8015022: f002 facb bl 80175bc <vPortExitCritical>
- /* Do the same for the Rx lock. */
- taskENTER_CRITICAL();
- 8015026: f002 fa97 bl 8017558 <vPortEnterCritical>
- {
- int8_t cRxLock = pxQueue->cRxLock;
- 801502a: 687b ldr r3, [r7, #4]
- 801502c: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
- 8015030: 73bb strb r3, [r7, #14]
- while( cRxLock > queueLOCKED_UNMODIFIED )
- 8015032: e011 b.n 8015058 <prvUnlockQueue+0x84>
- {
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
- 8015034: 687b ldr r3, [r7, #4]
- 8015036: 691b ldr r3, [r3, #16]
- 8015038: 2b00 cmp r3, #0
- 801503a: d012 beq.n 8015062 <prvUnlockQueue+0x8e>
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
- 801503c: 687b ldr r3, [r7, #4]
- 801503e: 3310 adds r3, #16
- 8015040: 4618 mov r0, r3
- 8015042: f000 ff03 bl 8015e4c <xTaskRemoveFromEventList>
- 8015046: 4603 mov r3, r0
- 8015048: 2b00 cmp r3, #0
- 801504a: d001 beq.n 8015050 <prvUnlockQueue+0x7c>
- {
- vTaskMissedYield();
- 801504c: f001 f804 bl 8016058 <vTaskMissedYield>
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- --cRxLock;
- 8015050: 7bbb ldrb r3, [r7, #14]
- 8015052: 3b01 subs r3, #1
- 8015054: b2db uxtb r3, r3
- 8015056: 73bb strb r3, [r7, #14]
- while( cRxLock > queueLOCKED_UNMODIFIED )
- 8015058: f997 300e ldrsb.w r3, [r7, #14]
- 801505c: 2b00 cmp r3, #0
- 801505e: dce9 bgt.n 8015034 <prvUnlockQueue+0x60>
- 8015060: e000 b.n 8015064 <prvUnlockQueue+0x90>
- }
- else
- {
- break;
- 8015062: bf00 nop
- }
- }
- pxQueue->cRxLock = queueUNLOCKED;
- 8015064: 687b ldr r3, [r7, #4]
- 8015066: 22ff movs r2, #255 @ 0xff
- 8015068: f883 2044 strb.w r2, [r3, #68] @ 0x44
- }
- taskEXIT_CRITICAL();
- 801506c: f002 faa6 bl 80175bc <vPortExitCritical>
- }
- 8015070: bf00 nop
- 8015072: 3710 adds r7, #16
- 8015074: 46bd mov sp, r7
- 8015076: bd80 pop {r7, pc}
- 08015078 <prvIsQueueEmpty>:
- /*-----------------------------------------------------------*/
- static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )
- {
- 8015078: b580 push {r7, lr}
- 801507a: b084 sub sp, #16
- 801507c: af00 add r7, sp, #0
- 801507e: 6078 str r0, [r7, #4]
- BaseType_t xReturn;
- taskENTER_CRITICAL();
- 8015080: f002 fa6a bl 8017558 <vPortEnterCritical>
- {
- if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
- 8015084: 687b ldr r3, [r7, #4]
- 8015086: 6b9b ldr r3, [r3, #56] @ 0x38
- 8015088: 2b00 cmp r3, #0
- 801508a: d102 bne.n 8015092 <prvIsQueueEmpty+0x1a>
- {
- xReturn = pdTRUE;
- 801508c: 2301 movs r3, #1
- 801508e: 60fb str r3, [r7, #12]
- 8015090: e001 b.n 8015096 <prvIsQueueEmpty+0x1e>
- }
- else
- {
- xReturn = pdFALSE;
- 8015092: 2300 movs r3, #0
- 8015094: 60fb str r3, [r7, #12]
- }
- }
- taskEXIT_CRITICAL();
- 8015096: f002 fa91 bl 80175bc <vPortExitCritical>
- return xReturn;
- 801509a: 68fb ldr r3, [r7, #12]
- }
- 801509c: 4618 mov r0, r3
- 801509e: 3710 adds r7, #16
- 80150a0: 46bd mov sp, r7
- 80150a2: bd80 pop {r7, pc}
- 080150a4 <prvIsQueueFull>:
- return xReturn;
- } /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
- /*-----------------------------------------------------------*/
- static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
- {
- 80150a4: b580 push {r7, lr}
- 80150a6: b084 sub sp, #16
- 80150a8: af00 add r7, sp, #0
- 80150aa: 6078 str r0, [r7, #4]
- BaseType_t xReturn;
- taskENTER_CRITICAL();
- 80150ac: f002 fa54 bl 8017558 <vPortEnterCritical>
- {
- if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
- 80150b0: 687b ldr r3, [r7, #4]
- 80150b2: 6b9a ldr r2, [r3, #56] @ 0x38
- 80150b4: 687b ldr r3, [r7, #4]
- 80150b6: 6bdb ldr r3, [r3, #60] @ 0x3c
- 80150b8: 429a cmp r2, r3
- 80150ba: d102 bne.n 80150c2 <prvIsQueueFull+0x1e>
- {
- xReturn = pdTRUE;
- 80150bc: 2301 movs r3, #1
- 80150be: 60fb str r3, [r7, #12]
- 80150c0: e001 b.n 80150c6 <prvIsQueueFull+0x22>
- }
- else
- {
- xReturn = pdFALSE;
- 80150c2: 2300 movs r3, #0
- 80150c4: 60fb str r3, [r7, #12]
- }
- }
- taskEXIT_CRITICAL();
- 80150c6: f002 fa79 bl 80175bc <vPortExitCritical>
- return xReturn;
- 80150ca: 68fb ldr r3, [r7, #12]
- }
- 80150cc: 4618 mov r0, r3
- 80150ce: 3710 adds r7, #16
- 80150d0: 46bd mov sp, r7
- 80150d2: bd80 pop {r7, pc}
- 080150d4 <vQueueAddToRegistry>:
- /*-----------------------------------------------------------*/
- #if ( configQUEUE_REGISTRY_SIZE > 0 )
- void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
- {
- 80150d4: b480 push {r7}
- 80150d6: b085 sub sp, #20
- 80150d8: af00 add r7, sp, #0
- 80150da: 6078 str r0, [r7, #4]
- 80150dc: 6039 str r1, [r7, #0]
- UBaseType_t ux;
- /* See if there is an empty space in the registry. A NULL name denotes
- a free slot. */
- for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
- 80150de: 2300 movs r3, #0
- 80150e0: 60fb str r3, [r7, #12]
- 80150e2: e014 b.n 801510e <vQueueAddToRegistry+0x3a>
- {
- if( xQueueRegistry[ ux ].pcQueueName == NULL )
- 80150e4: 4a0f ldr r2, [pc, #60] @ (8015124 <vQueueAddToRegistry+0x50>)
- 80150e6: 68fb ldr r3, [r7, #12]
- 80150e8: f852 3033 ldr.w r3, [r2, r3, lsl #3]
- 80150ec: 2b00 cmp r3, #0
- 80150ee: d10b bne.n 8015108 <vQueueAddToRegistry+0x34>
- {
- /* Store the information on this queue. */
- xQueueRegistry[ ux ].pcQueueName = pcQueueName;
- 80150f0: 490c ldr r1, [pc, #48] @ (8015124 <vQueueAddToRegistry+0x50>)
- 80150f2: 68fb ldr r3, [r7, #12]
- 80150f4: 683a ldr r2, [r7, #0]
- 80150f6: f841 2033 str.w r2, [r1, r3, lsl #3]
- xQueueRegistry[ ux ].xHandle = xQueue;
- 80150fa: 4a0a ldr r2, [pc, #40] @ (8015124 <vQueueAddToRegistry+0x50>)
- 80150fc: 68fb ldr r3, [r7, #12]
- 80150fe: 00db lsls r3, r3, #3
- 8015100: 4413 add r3, r2
- 8015102: 687a ldr r2, [r7, #4]
- 8015104: 605a str r2, [r3, #4]
- traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName );
- break;
- 8015106: e006 b.n 8015116 <vQueueAddToRegistry+0x42>
- for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
- 8015108: 68fb ldr r3, [r7, #12]
- 801510a: 3301 adds r3, #1
- 801510c: 60fb str r3, [r7, #12]
- 801510e: 68fb ldr r3, [r7, #12]
- 8015110: 2b07 cmp r3, #7
- 8015112: d9e7 bls.n 80150e4 <vQueueAddToRegistry+0x10>
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- }
- 8015114: bf00 nop
- 8015116: bf00 nop
- 8015118: 3714 adds r7, #20
- 801511a: 46bd mov sp, r7
- 801511c: f85d 7b04 ldr.w r7, [sp], #4
- 8015120: 4770 bx lr
- 8015122: bf00 nop
- 8015124: 24002654 .word 0x24002654
- 08015128 <vQueueWaitForMessageRestricted>:
- /*-----------------------------------------------------------*/
- #if ( configUSE_TIMERS == 1 )
- void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
- {
- 8015128: b580 push {r7, lr}
- 801512a: b086 sub sp, #24
- 801512c: af00 add r7, sp, #0
- 801512e: 60f8 str r0, [r7, #12]
- 8015130: 60b9 str r1, [r7, #8]
- 8015132: 607a str r2, [r7, #4]
- Queue_t * const pxQueue = xQueue;
- 8015134: 68fb ldr r3, [r7, #12]
- 8015136: 617b str r3, [r7, #20]
- will not actually cause the task to block, just place it on a blocked
- list. It will not block until the scheduler is unlocked - at which
- time a yield will be performed. If an item is added to the queue while
- the queue is locked, and the calling task blocks on the queue, then the
- calling task will be immediately unblocked when the queue is unlocked. */
- prvLockQueue( pxQueue );
- 8015138: f002 fa0e bl 8017558 <vPortEnterCritical>
- 801513c: 697b ldr r3, [r7, #20]
- 801513e: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
- 8015142: b25b sxtb r3, r3
- 8015144: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 8015148: d103 bne.n 8015152 <vQueueWaitForMessageRestricted+0x2a>
- 801514a: 697b ldr r3, [r7, #20]
- 801514c: 2200 movs r2, #0
- 801514e: f883 2044 strb.w r2, [r3, #68] @ 0x44
- 8015152: 697b ldr r3, [r7, #20]
- 8015154: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
- 8015158: b25b sxtb r3, r3
- 801515a: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 801515e: d103 bne.n 8015168 <vQueueWaitForMessageRestricted+0x40>
- 8015160: 697b ldr r3, [r7, #20]
- 8015162: 2200 movs r2, #0
- 8015164: f883 2045 strb.w r2, [r3, #69] @ 0x45
- 8015168: f002 fa28 bl 80175bc <vPortExitCritical>
- if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
- 801516c: 697b ldr r3, [r7, #20]
- 801516e: 6b9b ldr r3, [r3, #56] @ 0x38
- 8015170: 2b00 cmp r3, #0
- 8015172: d106 bne.n 8015182 <vQueueWaitForMessageRestricted+0x5a>
- {
- /* There is nothing in the queue, block for the specified period. */
- vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
- 8015174: 697b ldr r3, [r7, #20]
- 8015176: 3324 adds r3, #36 @ 0x24
- 8015178: 687a ldr r2, [r7, #4]
- 801517a: 68b9 ldr r1, [r7, #8]
- 801517c: 4618 mov r0, r3
- 801517e: f000 fe39 bl 8015df4 <vTaskPlaceOnEventListRestricted>
- }
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- prvUnlockQueue( pxQueue );
- 8015182: 6978 ldr r0, [r7, #20]
- 8015184: f7ff ff26 bl 8014fd4 <prvUnlockQueue>
- }
- 8015188: bf00 nop
- 801518a: 3718 adds r7, #24
- 801518c: 46bd mov sp, r7
- 801518e: bd80 pop {r7, pc}
- 08015190 <xStreamBufferSpacesAvailable>:
- return xReturn;
- }
- /*-----------------------------------------------------------*/
- size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer )
- {
- 8015190: b480 push {r7}
- 8015192: b087 sub sp, #28
- 8015194: af00 add r7, sp, #0
- 8015196: 6078 str r0, [r7, #4]
- const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
- 8015198: 687b ldr r3, [r7, #4]
- 801519a: 613b str r3, [r7, #16]
- size_t xSpace;
- configASSERT( pxStreamBuffer );
- 801519c: 693b ldr r3, [r7, #16]
- 801519e: 2b00 cmp r3, #0
- 80151a0: d10b bne.n 80151ba <xStreamBufferSpacesAvailable+0x2a>
- __asm volatile
- 80151a2: f04f 0350 mov.w r3, #80 @ 0x50
- 80151a6: f383 8811 msr BASEPRI, r3
- 80151aa: f3bf 8f6f isb sy
- 80151ae: f3bf 8f4f dsb sy
- 80151b2: 60fb str r3, [r7, #12]
- }
- 80151b4: bf00 nop
- 80151b6: bf00 nop
- 80151b8: e7fd b.n 80151b6 <xStreamBufferSpacesAvailable+0x26>
- xSpace = pxStreamBuffer->xLength + pxStreamBuffer->xTail;
- 80151ba: 693b ldr r3, [r7, #16]
- 80151bc: 689a ldr r2, [r3, #8]
- 80151be: 693b ldr r3, [r7, #16]
- 80151c0: 681b ldr r3, [r3, #0]
- 80151c2: 4413 add r3, r2
- 80151c4: 617b str r3, [r7, #20]
- xSpace -= pxStreamBuffer->xHead;
- 80151c6: 693b ldr r3, [r7, #16]
- 80151c8: 685b ldr r3, [r3, #4]
- 80151ca: 697a ldr r2, [r7, #20]
- 80151cc: 1ad3 subs r3, r2, r3
- 80151ce: 617b str r3, [r7, #20]
- xSpace -= ( size_t ) 1;
- 80151d0: 697b ldr r3, [r7, #20]
- 80151d2: 3b01 subs r3, #1
- 80151d4: 617b str r3, [r7, #20]
- if( xSpace >= pxStreamBuffer->xLength )
- 80151d6: 693b ldr r3, [r7, #16]
- 80151d8: 689b ldr r3, [r3, #8]
- 80151da: 697a ldr r2, [r7, #20]
- 80151dc: 429a cmp r2, r3
- 80151de: d304 bcc.n 80151ea <xStreamBufferSpacesAvailable+0x5a>
- {
- xSpace -= pxStreamBuffer->xLength;
- 80151e0: 693b ldr r3, [r7, #16]
- 80151e2: 689b ldr r3, [r3, #8]
- 80151e4: 697a ldr r2, [r7, #20]
- 80151e6: 1ad3 subs r3, r2, r3
- 80151e8: 617b str r3, [r7, #20]
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- return xSpace;
- 80151ea: 697b ldr r3, [r7, #20]
- }
- 80151ec: 4618 mov r0, r3
- 80151ee: 371c adds r7, #28
- 80151f0: 46bd mov sp, r7
- 80151f2: f85d 7b04 ldr.w r7, [sp], #4
- 80151f6: 4770 bx lr
- 080151f8 <xStreamBufferSend>:
- size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
- const void *pvTxData,
- size_t xDataLengthBytes,
- TickType_t xTicksToWait )
- {
- 80151f8: b580 push {r7, lr}
- 80151fa: b090 sub sp, #64 @ 0x40
- 80151fc: af02 add r7, sp, #8
- 80151fe: 60f8 str r0, [r7, #12]
- 8015200: 60b9 str r1, [r7, #8]
- 8015202: 607a str r2, [r7, #4]
- 8015204: 603b str r3, [r7, #0]
- StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
- 8015206: 68fb ldr r3, [r7, #12]
- 8015208: 62fb str r3, [r7, #44] @ 0x2c
- size_t xReturn, xSpace = 0;
- 801520a: 2300 movs r3, #0
- 801520c: 637b str r3, [r7, #52] @ 0x34
- size_t xRequiredSpace = xDataLengthBytes;
- 801520e: 687b ldr r3, [r7, #4]
- 8015210: 633b str r3, [r7, #48] @ 0x30
- TimeOut_t xTimeOut;
- configASSERT( pvTxData );
- 8015212: 68bb ldr r3, [r7, #8]
- 8015214: 2b00 cmp r3, #0
- 8015216: d10b bne.n 8015230 <xStreamBufferSend+0x38>
- __asm volatile
- 8015218: f04f 0350 mov.w r3, #80 @ 0x50
- 801521c: f383 8811 msr BASEPRI, r3
- 8015220: f3bf 8f6f isb sy
- 8015224: f3bf 8f4f dsb sy
- 8015228: 627b str r3, [r7, #36] @ 0x24
- }
- 801522a: bf00 nop
- 801522c: bf00 nop
- 801522e: e7fd b.n 801522c <xStreamBufferSend+0x34>
- configASSERT( pxStreamBuffer );
- 8015230: 6afb ldr r3, [r7, #44] @ 0x2c
- 8015232: 2b00 cmp r3, #0
- 8015234: d10b bne.n 801524e <xStreamBufferSend+0x56>
- __asm volatile
- 8015236: f04f 0350 mov.w r3, #80 @ 0x50
- 801523a: f383 8811 msr BASEPRI, r3
- 801523e: f3bf 8f6f isb sy
- 8015242: f3bf 8f4f dsb sy
- 8015246: 623b str r3, [r7, #32]
- }
- 8015248: bf00 nop
- 801524a: bf00 nop
- 801524c: e7fd b.n 801524a <xStreamBufferSend+0x52>
- /* This send function is used to write to both message buffers and stream
- buffers. If this is a message buffer then the space needed must be
- increased by the amount of bytes needed to store the length of the
- message. */
- if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
- 801524e: 6afb ldr r3, [r7, #44] @ 0x2c
- 8015250: 7f1b ldrb r3, [r3, #28]
- 8015252: f003 0301 and.w r3, r3, #1
- 8015256: 2b00 cmp r3, #0
- 8015258: d012 beq.n 8015280 <xStreamBufferSend+0x88>
- {
- xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
- 801525a: 6b3b ldr r3, [r7, #48] @ 0x30
- 801525c: 3304 adds r3, #4
- 801525e: 633b str r3, [r7, #48] @ 0x30
- /* Overflow? */
- configASSERT( xRequiredSpace > xDataLengthBytes );
- 8015260: 6b3a ldr r2, [r7, #48] @ 0x30
- 8015262: 687b ldr r3, [r7, #4]
- 8015264: 429a cmp r2, r3
- 8015266: d80b bhi.n 8015280 <xStreamBufferSend+0x88>
- __asm volatile
- 8015268: f04f 0350 mov.w r3, #80 @ 0x50
- 801526c: f383 8811 msr BASEPRI, r3
- 8015270: f3bf 8f6f isb sy
- 8015274: f3bf 8f4f dsb sy
- 8015278: 61fb str r3, [r7, #28]
- }
- 801527a: bf00 nop
- 801527c: bf00 nop
- 801527e: e7fd b.n 801527c <xStreamBufferSend+0x84>
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- if( xTicksToWait != ( TickType_t ) 0 )
- 8015280: 683b ldr r3, [r7, #0]
- 8015282: 2b00 cmp r3, #0
- 8015284: d03f beq.n 8015306 <xStreamBufferSend+0x10e>
- {
- vTaskSetTimeOutState( &xTimeOut );
- 8015286: f107 0310 add.w r3, r7, #16
- 801528a: 4618 mov r0, r3
- 801528c: f000 fe42 bl 8015f14 <vTaskSetTimeOutState>
- do
- {
- /* Wait until the required number of bytes are free in the message
- buffer. */
- taskENTER_CRITICAL();
- 8015290: f002 f962 bl 8017558 <vPortEnterCritical>
- {
- xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
- 8015294: 6af8 ldr r0, [r7, #44] @ 0x2c
- 8015296: f7ff ff7b bl 8015190 <xStreamBufferSpacesAvailable>
- 801529a: 6378 str r0, [r7, #52] @ 0x34
- if( xSpace < xRequiredSpace )
- 801529c: 6b7a ldr r2, [r7, #52] @ 0x34
- 801529e: 6b3b ldr r3, [r7, #48] @ 0x30
- 80152a0: 429a cmp r2, r3
- 80152a2: d218 bcs.n 80152d6 <xStreamBufferSend+0xde>
- {
- /* Clear notification state as going to wait for space. */
- ( void ) xTaskNotifyStateClear( NULL );
- 80152a4: 2000 movs r0, #0
- 80152a6: f001 fb65 bl 8016974 <xTaskNotifyStateClear>
- /* Should only be one writer. */
- configASSERT( pxStreamBuffer->xTaskWaitingToSend == NULL );
- 80152aa: 6afb ldr r3, [r7, #44] @ 0x2c
- 80152ac: 695b ldr r3, [r3, #20]
- 80152ae: 2b00 cmp r3, #0
- 80152b0: d00b beq.n 80152ca <xStreamBufferSend+0xd2>
- __asm volatile
- 80152b2: f04f 0350 mov.w r3, #80 @ 0x50
- 80152b6: f383 8811 msr BASEPRI, r3
- 80152ba: f3bf 8f6f isb sy
- 80152be: f3bf 8f4f dsb sy
- 80152c2: 61bb str r3, [r7, #24]
- }
- 80152c4: bf00 nop
- 80152c6: bf00 nop
- 80152c8: e7fd b.n 80152c6 <xStreamBufferSend+0xce>
- pxStreamBuffer->xTaskWaitingToSend = xTaskGetCurrentTaskHandle();
- 80152ca: f000 ffad bl 8016228 <xTaskGetCurrentTaskHandle>
- 80152ce: 4602 mov r2, r0
- 80152d0: 6afb ldr r3, [r7, #44] @ 0x2c
- 80152d2: 615a str r2, [r3, #20]
- 80152d4: e002 b.n 80152dc <xStreamBufferSend+0xe4>
- }
- else
- {
- taskEXIT_CRITICAL();
- 80152d6: f002 f971 bl 80175bc <vPortExitCritical>
- break;
- 80152da: e014 b.n 8015306 <xStreamBufferSend+0x10e>
- }
- }
- taskEXIT_CRITICAL();
- 80152dc: f002 f96e bl 80175bc <vPortExitCritical>
- traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer );
- ( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
- 80152e0: 683b ldr r3, [r7, #0]
- 80152e2: 2200 movs r2, #0
- 80152e4: 2100 movs r1, #0
- 80152e6: 2000 movs r0, #0
- 80152e8: f001 f93c bl 8016564 <xTaskNotifyWait>
- pxStreamBuffer->xTaskWaitingToSend = NULL;
- 80152ec: 6afb ldr r3, [r7, #44] @ 0x2c
- 80152ee: 2200 movs r2, #0
- 80152f0: 615a str r2, [r3, #20]
- } while( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE );
- 80152f2: 463a mov r2, r7
- 80152f4: f107 0310 add.w r3, r7, #16
- 80152f8: 4611 mov r1, r2
- 80152fa: 4618 mov r0, r3
- 80152fc: f000 fe48 bl 8015f90 <xTaskCheckForTimeOut>
- 8015300: 4603 mov r3, r0
- 8015302: 2b00 cmp r3, #0
- 8015304: d0c4 beq.n 8015290 <xStreamBufferSend+0x98>
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- if( xSpace == ( size_t ) 0 )
- 8015306: 6b7b ldr r3, [r7, #52] @ 0x34
- 8015308: 2b00 cmp r3, #0
- 801530a: d103 bne.n 8015314 <xStreamBufferSend+0x11c>
- {
- xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
- 801530c: 6af8 ldr r0, [r7, #44] @ 0x2c
- 801530e: f7ff ff3f bl 8015190 <xStreamBufferSpacesAvailable>
- 8015312: 6378 str r0, [r7, #52] @ 0x34
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
- 8015314: 6b3b ldr r3, [r7, #48] @ 0x30
- 8015316: 9300 str r3, [sp, #0]
- 8015318: 6b7b ldr r3, [r7, #52] @ 0x34
- 801531a: 687a ldr r2, [r7, #4]
- 801531c: 68b9 ldr r1, [r7, #8]
- 801531e: 6af8 ldr r0, [r7, #44] @ 0x2c
- 8015320: f000 f823 bl 801536a <prvWriteMessageToBuffer>
- 8015324: 62b8 str r0, [r7, #40] @ 0x28
- if( xReturn > ( size_t ) 0 )
- 8015326: 6abb ldr r3, [r7, #40] @ 0x28
- 8015328: 2b00 cmp r3, #0
- 801532a: d019 beq.n 8015360 <xStreamBufferSend+0x168>
- {
- traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn );
- /* Was a task waiting for the data? */
- if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
- 801532c: 6af8 ldr r0, [r7, #44] @ 0x2c
- 801532e: f000 f8ce bl 80154ce <prvBytesInBuffer>
- 8015332: 4602 mov r2, r0
- 8015334: 6afb ldr r3, [r7, #44] @ 0x2c
- 8015336: 68db ldr r3, [r3, #12]
- 8015338: 429a cmp r2, r3
- 801533a: d311 bcc.n 8015360 <xStreamBufferSend+0x168>
- {
- sbSEND_COMPLETED( pxStreamBuffer );
- 801533c: f000 fb4a bl 80159d4 <vTaskSuspendAll>
- 8015340: 6afb ldr r3, [r7, #44] @ 0x2c
- 8015342: 691b ldr r3, [r3, #16]
- 8015344: 2b00 cmp r3, #0
- 8015346: d009 beq.n 801535c <xStreamBufferSend+0x164>
- 8015348: 6afb ldr r3, [r7, #44] @ 0x2c
- 801534a: 6918 ldr r0, [r3, #16]
- 801534c: 2300 movs r3, #0
- 801534e: 2200 movs r2, #0
- 8015350: 2100 movs r1, #0
- 8015352: f001 f967 bl 8016624 <xTaskGenericNotify>
- 8015356: 6afb ldr r3, [r7, #44] @ 0x2c
- 8015358: 2200 movs r2, #0
- 801535a: 611a str r2, [r3, #16]
- 801535c: f000 fb48 bl 80159f0 <xTaskResumeAll>
- {
- mtCOVERAGE_TEST_MARKER();
- traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer );
- }
- return xReturn;
- 8015360: 6abb ldr r3, [r7, #40] @ 0x28
- }
- 8015362: 4618 mov r0, r3
- 8015364: 3738 adds r7, #56 @ 0x38
- 8015366: 46bd mov sp, r7
- 8015368: bd80 pop {r7, pc}
- 0801536a <prvWriteMessageToBuffer>:
- static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer,
- const void * pvTxData,
- size_t xDataLengthBytes,
- size_t xSpace,
- size_t xRequiredSpace )
- {
- 801536a: b580 push {r7, lr}
- 801536c: b086 sub sp, #24
- 801536e: af00 add r7, sp, #0
- 8015370: 60f8 str r0, [r7, #12]
- 8015372: 60b9 str r1, [r7, #8]
- 8015374: 607a str r2, [r7, #4]
- 8015376: 603b str r3, [r7, #0]
- BaseType_t xShouldWrite;
- size_t xReturn;
- if( xSpace == ( size_t ) 0 )
- 8015378: 683b ldr r3, [r7, #0]
- 801537a: 2b00 cmp r3, #0
- 801537c: d102 bne.n 8015384 <prvWriteMessageToBuffer+0x1a>
- {
- /* Doesn't matter if this is a stream buffer or a message buffer, there
- is no space to write. */
- xShouldWrite = pdFALSE;
- 801537e: 2300 movs r3, #0
- 8015380: 617b str r3, [r7, #20]
- 8015382: e01d b.n 80153c0 <prvWriteMessageToBuffer+0x56>
- }
- else if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) == ( uint8_t ) 0 )
- 8015384: 68fb ldr r3, [r7, #12]
- 8015386: 7f1b ldrb r3, [r3, #28]
- 8015388: f003 0301 and.w r3, r3, #1
- 801538c: 2b00 cmp r3, #0
- 801538e: d108 bne.n 80153a2 <prvWriteMessageToBuffer+0x38>
- {
- /* This is a stream buffer, as opposed to a message buffer, so writing a
- stream of bytes rather than discrete messages. Write as many bytes as
- possible. */
- xShouldWrite = pdTRUE;
- 8015390: 2301 movs r3, #1
- 8015392: 617b str r3, [r7, #20]
- xDataLengthBytes = configMIN( xDataLengthBytes, xSpace );
- 8015394: 687a ldr r2, [r7, #4]
- 8015396: 683b ldr r3, [r7, #0]
- 8015398: 4293 cmp r3, r2
- 801539a: bf28 it cs
- 801539c: 4613 movcs r3, r2
- 801539e: 607b str r3, [r7, #4]
- 80153a0: e00e b.n 80153c0 <prvWriteMessageToBuffer+0x56>
- }
- else if( xSpace >= xRequiredSpace )
- 80153a2: 683a ldr r2, [r7, #0]
- 80153a4: 6a3b ldr r3, [r7, #32]
- 80153a6: 429a cmp r2, r3
- 80153a8: d308 bcc.n 80153bc <prvWriteMessageToBuffer+0x52>
- {
- /* This is a message buffer, as opposed to a stream buffer, and there
- is enough space to write both the message length and the message itself
- into the buffer. Start by writing the length of the data, the data
- itself will be written later in this function. */
- xShouldWrite = pdTRUE;
- 80153aa: 2301 movs r3, #1
- 80153ac: 617b str r3, [r7, #20]
- ( void ) prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) &( xDataLengthBytes ), sbBYTES_TO_STORE_MESSAGE_LENGTH );
- 80153ae: 1d3b adds r3, r7, #4
- 80153b0: 2204 movs r2, #4
- 80153b2: 4619 mov r1, r3
- 80153b4: 68f8 ldr r0, [r7, #12]
- 80153b6: f000 f815 bl 80153e4 <prvWriteBytesToBuffer>
- 80153ba: e001 b.n 80153c0 <prvWriteMessageToBuffer+0x56>
- }
- else
- {
- /* There is space available, but not enough space. */
- xShouldWrite = pdFALSE;
- 80153bc: 2300 movs r3, #0
- 80153be: 617b str r3, [r7, #20]
- }
- if( xShouldWrite != pdFALSE )
- 80153c0: 697b ldr r3, [r7, #20]
- 80153c2: 2b00 cmp r3, #0
- 80153c4: d007 beq.n 80153d6 <prvWriteMessageToBuffer+0x6c>
- {
- /* Writes the data itself. */
- xReturn = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) pvTxData, xDataLengthBytes ); /*lint !e9079 Storage buffer is implemented as uint8_t for ease of sizing, alighment and access. */
- 80153c6: 687b ldr r3, [r7, #4]
- 80153c8: 461a mov r2, r3
- 80153ca: 68b9 ldr r1, [r7, #8]
- 80153cc: 68f8 ldr r0, [r7, #12]
- 80153ce: f000 f809 bl 80153e4 <prvWriteBytesToBuffer>
- 80153d2: 6138 str r0, [r7, #16]
- 80153d4: e001 b.n 80153da <prvWriteMessageToBuffer+0x70>
- }
- else
- {
- xReturn = 0;
- 80153d6: 2300 movs r3, #0
- 80153d8: 613b str r3, [r7, #16]
- }
- return xReturn;
- 80153da: 693b ldr r3, [r7, #16]
- }
- 80153dc: 4618 mov r0, r3
- 80153de: 3718 adds r7, #24
- 80153e0: 46bd mov sp, r7
- 80153e2: bd80 pop {r7, pc}
- 080153e4 <prvWriteBytesToBuffer>:
- return xReturn;
- }
- /*-----------------------------------------------------------*/
- static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, const uint8_t *pucData, size_t xCount )
- {
- 80153e4: b580 push {r7, lr}
- 80153e6: b08a sub sp, #40 @ 0x28
- 80153e8: af00 add r7, sp, #0
- 80153ea: 60f8 str r0, [r7, #12]
- 80153ec: 60b9 str r1, [r7, #8]
- 80153ee: 607a str r2, [r7, #4]
- size_t xNextHead, xFirstLength;
- configASSERT( xCount > ( size_t ) 0 );
- 80153f0: 687b ldr r3, [r7, #4]
- 80153f2: 2b00 cmp r3, #0
- 80153f4: d10b bne.n 801540e <prvWriteBytesToBuffer+0x2a>
- __asm volatile
- 80153f6: f04f 0350 mov.w r3, #80 @ 0x50
- 80153fa: f383 8811 msr BASEPRI, r3
- 80153fe: f3bf 8f6f isb sy
- 8015402: f3bf 8f4f dsb sy
- 8015406: 61fb str r3, [r7, #28]
- }
- 8015408: bf00 nop
- 801540a: bf00 nop
- 801540c: e7fd b.n 801540a <prvWriteBytesToBuffer+0x26>
- xNextHead = pxStreamBuffer->xHead;
- 801540e: 68fb ldr r3, [r7, #12]
- 8015410: 685b ldr r3, [r3, #4]
- 8015412: 627b str r3, [r7, #36] @ 0x24
- /* Calculate the number of bytes that can be added in the first write -
- which may be less than the total number of bytes that need to be added if
- the buffer will wrap back to the beginning. */
- xFirstLength = configMIN( pxStreamBuffer->xLength - xNextHead, xCount );
- 8015414: 68fb ldr r3, [r7, #12]
- 8015416: 689a ldr r2, [r3, #8]
- 8015418: 6a7b ldr r3, [r7, #36] @ 0x24
- 801541a: 1ad3 subs r3, r2, r3
- 801541c: 687a ldr r2, [r7, #4]
- 801541e: 4293 cmp r3, r2
- 8015420: bf28 it cs
- 8015422: 4613 movcs r3, r2
- 8015424: 623b str r3, [r7, #32]
- /* Write as many bytes as can be written in the first write. */
- configASSERT( ( xNextHead + xFirstLength ) <= pxStreamBuffer->xLength );
- 8015426: 6a7a ldr r2, [r7, #36] @ 0x24
- 8015428: 6a3b ldr r3, [r7, #32]
- 801542a: 441a add r2, r3
- 801542c: 68fb ldr r3, [r7, #12]
- 801542e: 689b ldr r3, [r3, #8]
- 8015430: 429a cmp r2, r3
- 8015432: d90b bls.n 801544c <prvWriteBytesToBuffer+0x68>
- __asm volatile
- 8015434: f04f 0350 mov.w r3, #80 @ 0x50
- 8015438: f383 8811 msr BASEPRI, r3
- 801543c: f3bf 8f6f isb sy
- 8015440: f3bf 8f4f dsb sy
- 8015444: 61bb str r3, [r7, #24]
- }
- 8015446: bf00 nop
- 8015448: bf00 nop
- 801544a: e7fd b.n 8015448 <prvWriteBytesToBuffer+0x64>
- ( void ) memcpy( ( void* ) ( &( pxStreamBuffer->pucBuffer[ xNextHead ] ) ), ( const void * ) pucData, xFirstLength ); /*lint !e9087 memcpy() requires void *. */
- 801544c: 68fb ldr r3, [r7, #12]
- 801544e: 699a ldr r2, [r3, #24]
- 8015450: 6a7b ldr r3, [r7, #36] @ 0x24
- 8015452: 4413 add r3, r2
- 8015454: 6a3a ldr r2, [r7, #32]
- 8015456: 68b9 ldr r1, [r7, #8]
- 8015458: 4618 mov r0, r3
- 801545a: f002 fd76 bl 8017f4a <memcpy>
- /* If the number of bytes written was less than the number that could be
- written in the first write... */
- if( xCount > xFirstLength )
- 801545e: 687a ldr r2, [r7, #4]
- 8015460: 6a3b ldr r3, [r7, #32]
- 8015462: 429a cmp r2, r3
- 8015464: d91d bls.n 80154a2 <prvWriteBytesToBuffer+0xbe>
- {
- /* ...then write the remaining bytes to the start of the buffer. */
- configASSERT( ( xCount - xFirstLength ) <= pxStreamBuffer->xLength );
- 8015466: 687a ldr r2, [r7, #4]
- 8015468: 6a3b ldr r3, [r7, #32]
- 801546a: 1ad2 subs r2, r2, r3
- 801546c: 68fb ldr r3, [r7, #12]
- 801546e: 689b ldr r3, [r3, #8]
- 8015470: 429a cmp r2, r3
- 8015472: d90b bls.n 801548c <prvWriteBytesToBuffer+0xa8>
- __asm volatile
- 8015474: f04f 0350 mov.w r3, #80 @ 0x50
- 8015478: f383 8811 msr BASEPRI, r3
- 801547c: f3bf 8f6f isb sy
- 8015480: f3bf 8f4f dsb sy
- 8015484: 617b str r3, [r7, #20]
- }
- 8015486: bf00 nop
- 8015488: bf00 nop
- 801548a: e7fd b.n 8015488 <prvWriteBytesToBuffer+0xa4>
- ( void ) memcpy( ( void * ) pxStreamBuffer->pucBuffer, ( const void * ) &( pucData[ xFirstLength ] ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
- 801548c: 68fb ldr r3, [r7, #12]
- 801548e: 6998 ldr r0, [r3, #24]
- 8015490: 68ba ldr r2, [r7, #8]
- 8015492: 6a3b ldr r3, [r7, #32]
- 8015494: 18d1 adds r1, r2, r3
- 8015496: 687a ldr r2, [r7, #4]
- 8015498: 6a3b ldr r3, [r7, #32]
- 801549a: 1ad3 subs r3, r2, r3
- 801549c: 461a mov r2, r3
- 801549e: f002 fd54 bl 8017f4a <memcpy>
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- xNextHead += xCount;
- 80154a2: 6a7a ldr r2, [r7, #36] @ 0x24
- 80154a4: 687b ldr r3, [r7, #4]
- 80154a6: 4413 add r3, r2
- 80154a8: 627b str r3, [r7, #36] @ 0x24
- if( xNextHead >= pxStreamBuffer->xLength )
- 80154aa: 68fb ldr r3, [r7, #12]
- 80154ac: 689b ldr r3, [r3, #8]
- 80154ae: 6a7a ldr r2, [r7, #36] @ 0x24
- 80154b0: 429a cmp r2, r3
- 80154b2: d304 bcc.n 80154be <prvWriteBytesToBuffer+0xda>
- {
- xNextHead -= pxStreamBuffer->xLength;
- 80154b4: 68fb ldr r3, [r7, #12]
- 80154b6: 689b ldr r3, [r3, #8]
- 80154b8: 6a7a ldr r2, [r7, #36] @ 0x24
- 80154ba: 1ad3 subs r3, r2, r3
- 80154bc: 627b str r3, [r7, #36] @ 0x24
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- pxStreamBuffer->xHead = xNextHead;
- 80154be: 68fb ldr r3, [r7, #12]
- 80154c0: 6a7a ldr r2, [r7, #36] @ 0x24
- 80154c2: 605a str r2, [r3, #4]
- return xCount;
- 80154c4: 687b ldr r3, [r7, #4]
- }
- 80154c6: 4618 mov r0, r3
- 80154c8: 3728 adds r7, #40 @ 0x28
- 80154ca: 46bd mov sp, r7
- 80154cc: bd80 pop {r7, pc}
- 080154ce <prvBytesInBuffer>:
- return xCount;
- }
- /*-----------------------------------------------------------*/
- static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer )
- {
- 80154ce: b480 push {r7}
- 80154d0: b085 sub sp, #20
- 80154d2: af00 add r7, sp, #0
- 80154d4: 6078 str r0, [r7, #4]
- /* Returns the distance between xTail and xHead. */
- size_t xCount;
- xCount = pxStreamBuffer->xLength + pxStreamBuffer->xHead;
- 80154d6: 687b ldr r3, [r7, #4]
- 80154d8: 689a ldr r2, [r3, #8]
- 80154da: 687b ldr r3, [r7, #4]
- 80154dc: 685b ldr r3, [r3, #4]
- 80154de: 4413 add r3, r2
- 80154e0: 60fb str r3, [r7, #12]
- xCount -= pxStreamBuffer->xTail;
- 80154e2: 687b ldr r3, [r7, #4]
- 80154e4: 681b ldr r3, [r3, #0]
- 80154e6: 68fa ldr r2, [r7, #12]
- 80154e8: 1ad3 subs r3, r2, r3
- 80154ea: 60fb str r3, [r7, #12]
- if ( xCount >= pxStreamBuffer->xLength )
- 80154ec: 687b ldr r3, [r7, #4]
- 80154ee: 689b ldr r3, [r3, #8]
- 80154f0: 68fa ldr r2, [r7, #12]
- 80154f2: 429a cmp r2, r3
- 80154f4: d304 bcc.n 8015500 <prvBytesInBuffer+0x32>
- {
- xCount -= pxStreamBuffer->xLength;
- 80154f6: 687b ldr r3, [r7, #4]
- 80154f8: 689b ldr r3, [r3, #8]
- 80154fa: 68fa ldr r2, [r7, #12]
- 80154fc: 1ad3 subs r3, r2, r3
- 80154fe: 60fb str r3, [r7, #12]
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- return xCount;
- 8015500: 68fb ldr r3, [r7, #12]
- }
- 8015502: 4618 mov r0, r3
- 8015504: 3714 adds r7, #20
- 8015506: 46bd mov sp, r7
- 8015508: f85d 7b04 ldr.w r7, [sp], #4
- 801550c: 4770 bx lr
- 0801550e <xTaskCreateStatic>:
- const uint32_t ulStackDepth,
- void * const pvParameters,
- UBaseType_t uxPriority,
- StackType_t * const puxStackBuffer,
- StaticTask_t * const pxTaskBuffer )
- {
- 801550e: b580 push {r7, lr}
- 8015510: b08e sub sp, #56 @ 0x38
- 8015512: af04 add r7, sp, #16
- 8015514: 60f8 str r0, [r7, #12]
- 8015516: 60b9 str r1, [r7, #8]
- 8015518: 607a str r2, [r7, #4]
- 801551a: 603b str r3, [r7, #0]
- TCB_t *pxNewTCB;
- TaskHandle_t xReturn;
- configASSERT( puxStackBuffer != NULL );
- 801551c: 6b7b ldr r3, [r7, #52] @ 0x34
- 801551e: 2b00 cmp r3, #0
- 8015520: d10b bne.n 801553a <xTaskCreateStatic+0x2c>
- __asm volatile
- 8015522: f04f 0350 mov.w r3, #80 @ 0x50
- 8015526: f383 8811 msr BASEPRI, r3
- 801552a: f3bf 8f6f isb sy
- 801552e: f3bf 8f4f dsb sy
- 8015532: 623b str r3, [r7, #32]
- }
- 8015534: bf00 nop
- 8015536: bf00 nop
- 8015538: e7fd b.n 8015536 <xTaskCreateStatic+0x28>
- configASSERT( pxTaskBuffer != NULL );
- 801553a: 6bbb ldr r3, [r7, #56] @ 0x38
- 801553c: 2b00 cmp r3, #0
- 801553e: d10b bne.n 8015558 <xTaskCreateStatic+0x4a>
- __asm volatile
- 8015540: f04f 0350 mov.w r3, #80 @ 0x50
- 8015544: f383 8811 msr BASEPRI, r3
- 8015548: f3bf 8f6f isb sy
- 801554c: f3bf 8f4f dsb sy
- 8015550: 61fb str r3, [r7, #28]
- }
- 8015552: bf00 nop
- 8015554: bf00 nop
- 8015556: e7fd b.n 8015554 <xTaskCreateStatic+0x46>
- #if( configASSERT_DEFINED == 1 )
- {
- /* Sanity check that the size of the structure used to declare a
- variable of type StaticTask_t equals the size of the real task
- structure. */
- volatile size_t xSize = sizeof( StaticTask_t );
- 8015558: 23a8 movs r3, #168 @ 0xa8
- 801555a: 613b str r3, [r7, #16]
- configASSERT( xSize == sizeof( TCB_t ) );
- 801555c: 693b ldr r3, [r7, #16]
- 801555e: 2ba8 cmp r3, #168 @ 0xa8
- 8015560: d00b beq.n 801557a <xTaskCreateStatic+0x6c>
- __asm volatile
- 8015562: f04f 0350 mov.w r3, #80 @ 0x50
- 8015566: f383 8811 msr BASEPRI, r3
- 801556a: f3bf 8f6f isb sy
- 801556e: f3bf 8f4f dsb sy
- 8015572: 61bb str r3, [r7, #24]
- }
- 8015574: bf00 nop
- 8015576: bf00 nop
- 8015578: e7fd b.n 8015576 <xTaskCreateStatic+0x68>
- ( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
- 801557a: 693b ldr r3, [r7, #16]
- }
- #endif /* configASSERT_DEFINED */
- if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
- 801557c: 6bbb ldr r3, [r7, #56] @ 0x38
- 801557e: 2b00 cmp r3, #0
- 8015580: d01e beq.n 80155c0 <xTaskCreateStatic+0xb2>
- 8015582: 6b7b ldr r3, [r7, #52] @ 0x34
- 8015584: 2b00 cmp r3, #0
- 8015586: d01b beq.n 80155c0 <xTaskCreateStatic+0xb2>
- {
- /* The memory used for the task's TCB and stack are passed into this
- function - use them. */
- pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
- 8015588: 6bbb ldr r3, [r7, #56] @ 0x38
- 801558a: 627b str r3, [r7, #36] @ 0x24
- pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
- 801558c: 6a7b ldr r3, [r7, #36] @ 0x24
- 801558e: 6b7a ldr r2, [r7, #52] @ 0x34
- 8015590: 631a str r2, [r3, #48] @ 0x30
- #if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
- {
- /* Tasks can be created statically or dynamically, so note this
- task was created statically in case the task is later deleted. */
- pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
- 8015592: 6a7b ldr r3, [r7, #36] @ 0x24
- 8015594: 2202 movs r2, #2
- 8015596: f883 20a5 strb.w r2, [r3, #165] @ 0xa5
- }
- #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
- prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
- 801559a: 2300 movs r3, #0
- 801559c: 9303 str r3, [sp, #12]
- 801559e: 6a7b ldr r3, [r7, #36] @ 0x24
- 80155a0: 9302 str r3, [sp, #8]
- 80155a2: f107 0314 add.w r3, r7, #20
- 80155a6: 9301 str r3, [sp, #4]
- 80155a8: 6b3b ldr r3, [r7, #48] @ 0x30
- 80155aa: 9300 str r3, [sp, #0]
- 80155ac: 683b ldr r3, [r7, #0]
- 80155ae: 687a ldr r2, [r7, #4]
- 80155b0: 68b9 ldr r1, [r7, #8]
- 80155b2: 68f8 ldr r0, [r7, #12]
- 80155b4: f000 f850 bl 8015658 <prvInitialiseNewTask>
- prvAddNewTaskToReadyList( pxNewTCB );
- 80155b8: 6a78 ldr r0, [r7, #36] @ 0x24
- 80155ba: f000 f8f5 bl 80157a8 <prvAddNewTaskToReadyList>
- 80155be: e001 b.n 80155c4 <xTaskCreateStatic+0xb6>
- }
- else
- {
- xReturn = NULL;
- 80155c0: 2300 movs r3, #0
- 80155c2: 617b str r3, [r7, #20]
- }
- return xReturn;
- 80155c4: 697b ldr r3, [r7, #20]
- }
- 80155c6: 4618 mov r0, r3
- 80155c8: 3728 adds r7, #40 @ 0x28
- 80155ca: 46bd mov sp, r7
- 80155cc: bd80 pop {r7, pc}
- 080155ce <xTaskCreate>:
- const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
- const configSTACK_DEPTH_TYPE usStackDepth,
- void * const pvParameters,
- UBaseType_t uxPriority,
- TaskHandle_t * const pxCreatedTask )
- {
- 80155ce: b580 push {r7, lr}
- 80155d0: b08c sub sp, #48 @ 0x30
- 80155d2: af04 add r7, sp, #16
- 80155d4: 60f8 str r0, [r7, #12]
- 80155d6: 60b9 str r1, [r7, #8]
- 80155d8: 603b str r3, [r7, #0]
- 80155da: 4613 mov r3, r2
- 80155dc: 80fb strh r3, [r7, #6]
- #else /* portSTACK_GROWTH */
- {
- StackType_t *pxStack;
- /* Allocate space for the stack used by the task being created. */
- pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
- 80155de: 88fb ldrh r3, [r7, #6]
- 80155e0: 009b lsls r3, r3, #2
- 80155e2: 4618 mov r0, r3
- 80155e4: f002 f8da bl 801779c <pvPortMalloc>
- 80155e8: 6178 str r0, [r7, #20]
- if( pxStack != NULL )
- 80155ea: 697b ldr r3, [r7, #20]
- 80155ec: 2b00 cmp r3, #0
- 80155ee: d00e beq.n 801560e <xTaskCreate+0x40>
- {
- /* Allocate space for the TCB. */
- pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
- 80155f0: 20a8 movs r0, #168 @ 0xa8
- 80155f2: f002 f8d3 bl 801779c <pvPortMalloc>
- 80155f6: 61f8 str r0, [r7, #28]
- if( pxNewTCB != NULL )
- 80155f8: 69fb ldr r3, [r7, #28]
- 80155fa: 2b00 cmp r3, #0
- 80155fc: d003 beq.n 8015606 <xTaskCreate+0x38>
- {
- /* Store the stack location in the TCB. */
- pxNewTCB->pxStack = pxStack;
- 80155fe: 69fb ldr r3, [r7, #28]
- 8015600: 697a ldr r2, [r7, #20]
- 8015602: 631a str r2, [r3, #48] @ 0x30
- 8015604: e005 b.n 8015612 <xTaskCreate+0x44>
- }
- else
- {
- /* The stack cannot be used as the TCB was not created. Free
- it again. */
- vPortFree( pxStack );
- 8015606: 6978 ldr r0, [r7, #20]
- 8015608: f002 f996 bl 8017938 <vPortFree>
- 801560c: e001 b.n 8015612 <xTaskCreate+0x44>
- }
- }
- else
- {
- pxNewTCB = NULL;
- 801560e: 2300 movs r3, #0
- 8015610: 61fb str r3, [r7, #28]
- }
- }
- #endif /* portSTACK_GROWTH */
- if( pxNewTCB != NULL )
- 8015612: 69fb ldr r3, [r7, #28]
- 8015614: 2b00 cmp r3, #0
- 8015616: d017 beq.n 8015648 <xTaskCreate+0x7a>
- {
- #if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */
- {
- /* Tasks can be created statically or dynamically, so note this
- task was created dynamically in case it is later deleted. */
- pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
- 8015618: 69fb ldr r3, [r7, #28]
- 801561a: 2200 movs r2, #0
- 801561c: f883 20a5 strb.w r2, [r3, #165] @ 0xa5
- }
- #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
- prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
- 8015620: 88fa ldrh r2, [r7, #6]
- 8015622: 2300 movs r3, #0
- 8015624: 9303 str r3, [sp, #12]
- 8015626: 69fb ldr r3, [r7, #28]
- 8015628: 9302 str r3, [sp, #8]
- 801562a: 6afb ldr r3, [r7, #44] @ 0x2c
- 801562c: 9301 str r3, [sp, #4]
- 801562e: 6abb ldr r3, [r7, #40] @ 0x28
- 8015630: 9300 str r3, [sp, #0]
- 8015632: 683b ldr r3, [r7, #0]
- 8015634: 68b9 ldr r1, [r7, #8]
- 8015636: 68f8 ldr r0, [r7, #12]
- 8015638: f000 f80e bl 8015658 <prvInitialiseNewTask>
- prvAddNewTaskToReadyList( pxNewTCB );
- 801563c: 69f8 ldr r0, [r7, #28]
- 801563e: f000 f8b3 bl 80157a8 <prvAddNewTaskToReadyList>
- xReturn = pdPASS;
- 8015642: 2301 movs r3, #1
- 8015644: 61bb str r3, [r7, #24]
- 8015646: e002 b.n 801564e <xTaskCreate+0x80>
- }
- else
- {
- xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
- 8015648: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 801564c: 61bb str r3, [r7, #24]
- }
- return xReturn;
- 801564e: 69bb ldr r3, [r7, #24]
- }
- 8015650: 4618 mov r0, r3
- 8015652: 3720 adds r7, #32
- 8015654: 46bd mov sp, r7
- 8015656: bd80 pop {r7, pc}
- 08015658 <prvInitialiseNewTask>:
- void * const pvParameters,
- UBaseType_t uxPriority,
- TaskHandle_t * const pxCreatedTask,
- TCB_t *pxNewTCB,
- const MemoryRegion_t * const xRegions )
- {
- 8015658: b580 push {r7, lr}
- 801565a: b088 sub sp, #32
- 801565c: af00 add r7, sp, #0
- 801565e: 60f8 str r0, [r7, #12]
- 8015660: 60b9 str r1, [r7, #8]
- 8015662: 607a str r2, [r7, #4]
- 8015664: 603b str r3, [r7, #0]
- /* Avoid dependency on memset() if it is not required. */
- #if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 )
- {
- /* Fill the stack with a known value to assist debugging. */
- ( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
- 8015666: 6b3b ldr r3, [r7, #48] @ 0x30
- 8015668: 6b18 ldr r0, [r3, #48] @ 0x30
- 801566a: 687b ldr r3, [r7, #4]
- 801566c: 009b lsls r3, r3, #2
- 801566e: 461a mov r2, r3
- 8015670: 21a5 movs r1, #165 @ 0xa5
- 8015672: f002 fb98 bl 8017da6 <memset>
- grows from high memory to low (as per the 80x86) or vice versa.
- portSTACK_GROWTH is used to make the result positive or negative as required
- by the port. */
- #if( portSTACK_GROWTH < 0 )
- {
- pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
- 8015676: 6b3b ldr r3, [r7, #48] @ 0x30
- 8015678: 6b1a ldr r2, [r3, #48] @ 0x30
- 801567a: 6879 ldr r1, [r7, #4]
- 801567c: f06f 4340 mvn.w r3, #3221225472 @ 0xc0000000
- 8015680: 440b add r3, r1
- 8015682: 009b lsls r3, r3, #2
- 8015684: 4413 add r3, r2
- 8015686: 61bb str r3, [r7, #24]
- pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception. Avoiding casts between pointers and integers is not practical. Size differences accounted for using portPOINTER_SIZE_TYPE type. Checked by assert(). */
- 8015688: 69bb ldr r3, [r7, #24]
- 801568a: f023 0307 bic.w r3, r3, #7
- 801568e: 61bb str r3, [r7, #24]
- /* Check the alignment of the calculated top of stack is correct. */
- configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
- 8015690: 69bb ldr r3, [r7, #24]
- 8015692: f003 0307 and.w r3, r3, #7
- 8015696: 2b00 cmp r3, #0
- 8015698: d00b beq.n 80156b2 <prvInitialiseNewTask+0x5a>
- __asm volatile
- 801569a: f04f 0350 mov.w r3, #80 @ 0x50
- 801569e: f383 8811 msr BASEPRI, r3
- 80156a2: f3bf 8f6f isb sy
- 80156a6: f3bf 8f4f dsb sy
- 80156aa: 617b str r3, [r7, #20]
- }
- 80156ac: bf00 nop
- 80156ae: bf00 nop
- 80156b0: e7fd b.n 80156ae <prvInitialiseNewTask+0x56>
- pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
- }
- #endif /* portSTACK_GROWTH */
- /* Store the task name in the TCB. */
- if( pcName != NULL )
- 80156b2: 68bb ldr r3, [r7, #8]
- 80156b4: 2b00 cmp r3, #0
- 80156b6: d01f beq.n 80156f8 <prvInitialiseNewTask+0xa0>
- {
- for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
- 80156b8: 2300 movs r3, #0
- 80156ba: 61fb str r3, [r7, #28]
- 80156bc: e012 b.n 80156e4 <prvInitialiseNewTask+0x8c>
- {
- pxNewTCB->pcTaskName[ x ] = pcName[ x ];
- 80156be: 68ba ldr r2, [r7, #8]
- 80156c0: 69fb ldr r3, [r7, #28]
- 80156c2: 4413 add r3, r2
- 80156c4: 7819 ldrb r1, [r3, #0]
- 80156c6: 6b3a ldr r2, [r7, #48] @ 0x30
- 80156c8: 69fb ldr r3, [r7, #28]
- 80156ca: 4413 add r3, r2
- 80156cc: 3334 adds r3, #52 @ 0x34
- 80156ce: 460a mov r2, r1
- 80156d0: 701a strb r2, [r3, #0]
- /* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
- configMAX_TASK_NAME_LEN characters just in case the memory after the
- string is not accessible (extremely unlikely). */
- if( pcName[ x ] == ( char ) 0x00 )
- 80156d2: 68ba ldr r2, [r7, #8]
- 80156d4: 69fb ldr r3, [r7, #28]
- 80156d6: 4413 add r3, r2
- 80156d8: 781b ldrb r3, [r3, #0]
- 80156da: 2b00 cmp r3, #0
- 80156dc: d006 beq.n 80156ec <prvInitialiseNewTask+0x94>
- for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
- 80156de: 69fb ldr r3, [r7, #28]
- 80156e0: 3301 adds r3, #1
- 80156e2: 61fb str r3, [r7, #28]
- 80156e4: 69fb ldr r3, [r7, #28]
- 80156e6: 2b0f cmp r3, #15
- 80156e8: d9e9 bls.n 80156be <prvInitialiseNewTask+0x66>
- 80156ea: e000 b.n 80156ee <prvInitialiseNewTask+0x96>
- {
- break;
- 80156ec: bf00 nop
- }
- }
- /* Ensure the name string is terminated in the case that the string length
- was greater or equal to configMAX_TASK_NAME_LEN. */
- pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
- 80156ee: 6b3b ldr r3, [r7, #48] @ 0x30
- 80156f0: 2200 movs r2, #0
- 80156f2: f883 2043 strb.w r2, [r3, #67] @ 0x43
- 80156f6: e003 b.n 8015700 <prvInitialiseNewTask+0xa8>
- }
- else
- {
- /* The task has not been given a name, so just ensure there is a NULL
- terminator when it is read out. */
- pxNewTCB->pcTaskName[ 0 ] = 0x00;
- 80156f8: 6b3b ldr r3, [r7, #48] @ 0x30
- 80156fa: 2200 movs r2, #0
- 80156fc: f883 2034 strb.w r2, [r3, #52] @ 0x34
- }
- /* This is used as an array index so must ensure it's not too large. First
- remove the privilege bit if one is present. */
- if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
- 8015700: 6abb ldr r3, [r7, #40] @ 0x28
- 8015702: 2b37 cmp r3, #55 @ 0x37
- 8015704: d901 bls.n 801570a <prvInitialiseNewTask+0xb2>
- {
- uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
- 8015706: 2337 movs r3, #55 @ 0x37
- 8015708: 62bb str r3, [r7, #40] @ 0x28
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- pxNewTCB->uxPriority = uxPriority;
- 801570a: 6b3b ldr r3, [r7, #48] @ 0x30
- 801570c: 6aba ldr r2, [r7, #40] @ 0x28
- 801570e: 62da str r2, [r3, #44] @ 0x2c
- #if ( configUSE_MUTEXES == 1 )
- {
- pxNewTCB->uxBasePriority = uxPriority;
- 8015710: 6b3b ldr r3, [r7, #48] @ 0x30
- 8015712: 6aba ldr r2, [r7, #40] @ 0x28
- 8015714: 64da str r2, [r3, #76] @ 0x4c
- pxNewTCB->uxMutexesHeld = 0;
- 8015716: 6b3b ldr r3, [r7, #48] @ 0x30
- 8015718: 2200 movs r2, #0
- 801571a: 651a str r2, [r3, #80] @ 0x50
- }
- #endif /* configUSE_MUTEXES */
- vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
- 801571c: 6b3b ldr r3, [r7, #48] @ 0x30
- 801571e: 3304 adds r3, #4
- 8015720: 4618 mov r0, r3
- 8015722: f7fe fd09 bl 8014138 <vListInitialiseItem>
- vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
- 8015726: 6b3b ldr r3, [r7, #48] @ 0x30
- 8015728: 3318 adds r3, #24
- 801572a: 4618 mov r0, r3
- 801572c: f7fe fd04 bl 8014138 <vListInitialiseItem>
- /* Set the pxNewTCB as a link back from the ListItem_t. This is so we can get
- back to the containing TCB from a generic item in a list. */
- listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
- 8015730: 6b3b ldr r3, [r7, #48] @ 0x30
- 8015732: 6b3a ldr r2, [r7, #48] @ 0x30
- 8015734: 611a str r2, [r3, #16]
- /* Event lists are always in priority order. */
- listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
- 8015736: 6abb ldr r3, [r7, #40] @ 0x28
- 8015738: f1c3 0238 rsb r2, r3, #56 @ 0x38
- 801573c: 6b3b ldr r3, [r7, #48] @ 0x30
- 801573e: 619a str r2, [r3, #24]
- listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
- 8015740: 6b3b ldr r3, [r7, #48] @ 0x30
- 8015742: 6b3a ldr r2, [r7, #48] @ 0x30
- 8015744: 625a str r2, [r3, #36] @ 0x24
- }
- #endif
- #if ( configUSE_TASK_NOTIFICATIONS == 1 )
- {
- pxNewTCB->ulNotifiedValue = 0;
- 8015746: 6b3b ldr r3, [r7, #48] @ 0x30
- 8015748: 2200 movs r2, #0
- 801574a: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
- pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
- 801574e: 6b3b ldr r3, [r7, #48] @ 0x30
- 8015750: 2200 movs r2, #0
- 8015752: f883 20a4 strb.w r2, [r3, #164] @ 0xa4
- #if ( configUSE_NEWLIB_REENTRANT == 1 )
- {
- /* Initialise this task's Newlib reent structure.
- See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
- for additional information. */
- _REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
- 8015756: 6b3b ldr r3, [r7, #48] @ 0x30
- 8015758: 3354 adds r3, #84 @ 0x54
- 801575a: 224c movs r2, #76 @ 0x4c
- 801575c: 2100 movs r1, #0
- 801575e: 4618 mov r0, r3
- 8015760: f002 fb21 bl 8017da6 <memset>
- 8015764: 6b3b ldr r3, [r7, #48] @ 0x30
- 8015766: 4a0d ldr r2, [pc, #52] @ (801579c <prvInitialiseNewTask+0x144>)
- 8015768: 659a str r2, [r3, #88] @ 0x58
- 801576a: 6b3b ldr r3, [r7, #48] @ 0x30
- 801576c: 4a0c ldr r2, [pc, #48] @ (80157a0 <prvInitialiseNewTask+0x148>)
- 801576e: 65da str r2, [r3, #92] @ 0x5c
- 8015770: 6b3b ldr r3, [r7, #48] @ 0x30
- 8015772: 4a0c ldr r2, [pc, #48] @ (80157a4 <prvInitialiseNewTask+0x14c>)
- 8015774: 661a str r2, [r3, #96] @ 0x60
- }
- #endif /* portSTACK_GROWTH */
- }
- #else /* portHAS_STACK_OVERFLOW_CHECKING */
- {
- pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
- 8015776: 683a ldr r2, [r7, #0]
- 8015778: 68f9 ldr r1, [r7, #12]
- 801577a: 69b8 ldr r0, [r7, #24]
- 801577c: f001 fdb8 bl 80172f0 <pxPortInitialiseStack>
- 8015780: 4602 mov r2, r0
- 8015782: 6b3b ldr r3, [r7, #48] @ 0x30
- 8015784: 601a str r2, [r3, #0]
- }
- #endif /* portHAS_STACK_OVERFLOW_CHECKING */
- }
- #endif /* portUSING_MPU_WRAPPERS */
- if( pxCreatedTask != NULL )
- 8015786: 6afb ldr r3, [r7, #44] @ 0x2c
- 8015788: 2b00 cmp r3, #0
- 801578a: d002 beq.n 8015792 <prvInitialiseNewTask+0x13a>
- {
- /* Pass the handle out in an anonymous way. The handle can be used to
- change the created task's priority, delete the created task, etc.*/
- *pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
- 801578c: 6afb ldr r3, [r7, #44] @ 0x2c
- 801578e: 6b3a ldr r2, [r7, #48] @ 0x30
- 8015790: 601a str r2, [r3, #0]
- }
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- 8015792: bf00 nop
- 8015794: 3720 adds r7, #32
- 8015796: 46bd mov sp, r7
- 8015798: bd80 pop {r7, pc}
- 801579a: bf00 nop
- 801579c: 24012ce8 .word 0x24012ce8
- 80157a0: 24012d50 .word 0x24012d50
- 80157a4: 24012db8 .word 0x24012db8
- 080157a8 <prvAddNewTaskToReadyList>:
- /*-----------------------------------------------------------*/
- static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
- {
- 80157a8: b580 push {r7, lr}
- 80157aa: b082 sub sp, #8
- 80157ac: af00 add r7, sp, #0
- 80157ae: 6078 str r0, [r7, #4]
- /* Ensure interrupts don't access the task lists while the lists are being
- updated. */
- taskENTER_CRITICAL();
- 80157b0: f001 fed2 bl 8017558 <vPortEnterCritical>
- {
- uxCurrentNumberOfTasks++;
- 80157b4: 4b2d ldr r3, [pc, #180] @ (801586c <prvAddNewTaskToReadyList+0xc4>)
- 80157b6: 681b ldr r3, [r3, #0]
- 80157b8: 3301 adds r3, #1
- 80157ba: 4a2c ldr r2, [pc, #176] @ (801586c <prvAddNewTaskToReadyList+0xc4>)
- 80157bc: 6013 str r3, [r2, #0]
- if( pxCurrentTCB == NULL )
- 80157be: 4b2c ldr r3, [pc, #176] @ (8015870 <prvAddNewTaskToReadyList+0xc8>)
- 80157c0: 681b ldr r3, [r3, #0]
- 80157c2: 2b00 cmp r3, #0
- 80157c4: d109 bne.n 80157da <prvAddNewTaskToReadyList+0x32>
- {
- /* There are no other tasks, or all the other tasks are in
- the suspended state - make this the current task. */
- pxCurrentTCB = pxNewTCB;
- 80157c6: 4a2a ldr r2, [pc, #168] @ (8015870 <prvAddNewTaskToReadyList+0xc8>)
- 80157c8: 687b ldr r3, [r7, #4]
- 80157ca: 6013 str r3, [r2, #0]
- if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
- 80157cc: 4b27 ldr r3, [pc, #156] @ (801586c <prvAddNewTaskToReadyList+0xc4>)
- 80157ce: 681b ldr r3, [r3, #0]
- 80157d0: 2b01 cmp r3, #1
- 80157d2: d110 bne.n 80157f6 <prvAddNewTaskToReadyList+0x4e>
- {
- /* This is the first task to be created so do the preliminary
- initialisation required. We will not recover if this call
- fails, but we will report the failure. */
- prvInitialiseTaskLists();
- 80157d4: f000 fc64 bl 80160a0 <prvInitialiseTaskLists>
- 80157d8: e00d b.n 80157f6 <prvAddNewTaskToReadyList+0x4e>
- else
- {
- /* If the scheduler is not already running, make this task the
- current task if it is the highest priority task to be created
- so far. */
- if( xSchedulerRunning == pdFALSE )
- 80157da: 4b26 ldr r3, [pc, #152] @ (8015874 <prvAddNewTaskToReadyList+0xcc>)
- 80157dc: 681b ldr r3, [r3, #0]
- 80157de: 2b00 cmp r3, #0
- 80157e0: d109 bne.n 80157f6 <prvAddNewTaskToReadyList+0x4e>
- {
- if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
- 80157e2: 4b23 ldr r3, [pc, #140] @ (8015870 <prvAddNewTaskToReadyList+0xc8>)
- 80157e4: 681b ldr r3, [r3, #0]
- 80157e6: 6ada ldr r2, [r3, #44] @ 0x2c
- 80157e8: 687b ldr r3, [r7, #4]
- 80157ea: 6adb ldr r3, [r3, #44] @ 0x2c
- 80157ec: 429a cmp r2, r3
- 80157ee: d802 bhi.n 80157f6 <prvAddNewTaskToReadyList+0x4e>
- {
- pxCurrentTCB = pxNewTCB;
- 80157f0: 4a1f ldr r2, [pc, #124] @ (8015870 <prvAddNewTaskToReadyList+0xc8>)
- 80157f2: 687b ldr r3, [r7, #4]
- 80157f4: 6013 str r3, [r2, #0]
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- uxTaskNumber++;
- 80157f6: 4b20 ldr r3, [pc, #128] @ (8015878 <prvAddNewTaskToReadyList+0xd0>)
- 80157f8: 681b ldr r3, [r3, #0]
- 80157fa: 3301 adds r3, #1
- 80157fc: 4a1e ldr r2, [pc, #120] @ (8015878 <prvAddNewTaskToReadyList+0xd0>)
- 80157fe: 6013 str r3, [r2, #0]
- #if ( configUSE_TRACE_FACILITY == 1 )
- {
- /* Add a counter into the TCB for tracing only. */
- pxNewTCB->uxTCBNumber = uxTaskNumber;
- 8015800: 4b1d ldr r3, [pc, #116] @ (8015878 <prvAddNewTaskToReadyList+0xd0>)
- 8015802: 681a ldr r2, [r3, #0]
- 8015804: 687b ldr r3, [r7, #4]
- 8015806: 645a str r2, [r3, #68] @ 0x44
- }
- #endif /* configUSE_TRACE_FACILITY */
- traceTASK_CREATE( pxNewTCB );
- prvAddTaskToReadyList( pxNewTCB );
- 8015808: 687b ldr r3, [r7, #4]
- 801580a: 6ada ldr r2, [r3, #44] @ 0x2c
- 801580c: 4b1b ldr r3, [pc, #108] @ (801587c <prvAddNewTaskToReadyList+0xd4>)
- 801580e: 681b ldr r3, [r3, #0]
- 8015810: 429a cmp r2, r3
- 8015812: d903 bls.n 801581c <prvAddNewTaskToReadyList+0x74>
- 8015814: 687b ldr r3, [r7, #4]
- 8015816: 6adb ldr r3, [r3, #44] @ 0x2c
- 8015818: 4a18 ldr r2, [pc, #96] @ (801587c <prvAddNewTaskToReadyList+0xd4>)
- 801581a: 6013 str r3, [r2, #0]
- 801581c: 687b ldr r3, [r7, #4]
- 801581e: 6ada ldr r2, [r3, #44] @ 0x2c
- 8015820: 4613 mov r3, r2
- 8015822: 009b lsls r3, r3, #2
- 8015824: 4413 add r3, r2
- 8015826: 009b lsls r3, r3, #2
- 8015828: 4a15 ldr r2, [pc, #84] @ (8015880 <prvAddNewTaskToReadyList+0xd8>)
- 801582a: 441a add r2, r3
- 801582c: 687b ldr r3, [r7, #4]
- 801582e: 3304 adds r3, #4
- 8015830: 4619 mov r1, r3
- 8015832: 4610 mov r0, r2
- 8015834: f7fe fc8d bl 8014152 <vListInsertEnd>
- portSETUP_TCB( pxNewTCB );
- }
- taskEXIT_CRITICAL();
- 8015838: f001 fec0 bl 80175bc <vPortExitCritical>
- if( xSchedulerRunning != pdFALSE )
- 801583c: 4b0d ldr r3, [pc, #52] @ (8015874 <prvAddNewTaskToReadyList+0xcc>)
- 801583e: 681b ldr r3, [r3, #0]
- 8015840: 2b00 cmp r3, #0
- 8015842: d00e beq.n 8015862 <prvAddNewTaskToReadyList+0xba>
- {
- /* If the created task is of a higher priority than the current task
- then it should run now. */
- if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
- 8015844: 4b0a ldr r3, [pc, #40] @ (8015870 <prvAddNewTaskToReadyList+0xc8>)
- 8015846: 681b ldr r3, [r3, #0]
- 8015848: 6ada ldr r2, [r3, #44] @ 0x2c
- 801584a: 687b ldr r3, [r7, #4]
- 801584c: 6adb ldr r3, [r3, #44] @ 0x2c
- 801584e: 429a cmp r2, r3
- 8015850: d207 bcs.n 8015862 <prvAddNewTaskToReadyList+0xba>
- {
- taskYIELD_IF_USING_PREEMPTION();
- 8015852: 4b0c ldr r3, [pc, #48] @ (8015884 <prvAddNewTaskToReadyList+0xdc>)
- 8015854: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 8015858: 601a str r2, [r3, #0]
- 801585a: f3bf 8f4f dsb sy
- 801585e: f3bf 8f6f isb sy
- }
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- 8015862: bf00 nop
- 8015864: 3708 adds r7, #8
- 8015866: 46bd mov sp, r7
- 8015868: bd80 pop {r7, pc}
- 801586a: bf00 nop
- 801586c: 24002b68 .word 0x24002b68
- 8015870: 24002694 .word 0x24002694
- 8015874: 24002b74 .word 0x24002b74
- 8015878: 24002b84 .word 0x24002b84
- 801587c: 24002b70 .word 0x24002b70
- 8015880: 24002698 .word 0x24002698
- 8015884: e000ed04 .word 0xe000ed04
- 08015888 <vTaskDelay>:
- /*-----------------------------------------------------------*/
- #if ( INCLUDE_vTaskDelay == 1 )
- void vTaskDelay( const TickType_t xTicksToDelay )
- {
- 8015888: b580 push {r7, lr}
- 801588a: b084 sub sp, #16
- 801588c: af00 add r7, sp, #0
- 801588e: 6078 str r0, [r7, #4]
- BaseType_t xAlreadyYielded = pdFALSE;
- 8015890: 2300 movs r3, #0
- 8015892: 60fb str r3, [r7, #12]
- /* A delay time of zero just forces a reschedule. */
- if( xTicksToDelay > ( TickType_t ) 0U )
- 8015894: 687b ldr r3, [r7, #4]
- 8015896: 2b00 cmp r3, #0
- 8015898: d018 beq.n 80158cc <vTaskDelay+0x44>
- {
- configASSERT( uxSchedulerSuspended == 0 );
- 801589a: 4b14 ldr r3, [pc, #80] @ (80158ec <vTaskDelay+0x64>)
- 801589c: 681b ldr r3, [r3, #0]
- 801589e: 2b00 cmp r3, #0
- 80158a0: d00b beq.n 80158ba <vTaskDelay+0x32>
- __asm volatile
- 80158a2: f04f 0350 mov.w r3, #80 @ 0x50
- 80158a6: f383 8811 msr BASEPRI, r3
- 80158aa: f3bf 8f6f isb sy
- 80158ae: f3bf 8f4f dsb sy
- 80158b2: 60bb str r3, [r7, #8]
- }
- 80158b4: bf00 nop
- 80158b6: bf00 nop
- 80158b8: e7fd b.n 80158b6 <vTaskDelay+0x2e>
- vTaskSuspendAll();
- 80158ba: f000 f88b bl 80159d4 <vTaskSuspendAll>
- list or removed from the blocked list until the scheduler
- is resumed.
- This task cannot be in an event list as it is the currently
- executing task. */
- prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
- 80158be: 2100 movs r1, #0
- 80158c0: 6878 ldr r0, [r7, #4]
- 80158c2: f001 f87d bl 80169c0 <prvAddCurrentTaskToDelayedList>
- }
- xAlreadyYielded = xTaskResumeAll();
- 80158c6: f000 f893 bl 80159f0 <xTaskResumeAll>
- 80158ca: 60f8 str r0, [r7, #12]
- mtCOVERAGE_TEST_MARKER();
- }
- /* Force a reschedule if xTaskResumeAll has not already done so, we may
- have put ourselves to sleep. */
- if( xAlreadyYielded == pdFALSE )
- 80158cc: 68fb ldr r3, [r7, #12]
- 80158ce: 2b00 cmp r3, #0
- 80158d0: d107 bne.n 80158e2 <vTaskDelay+0x5a>
- {
- portYIELD_WITHIN_API();
- 80158d2: 4b07 ldr r3, [pc, #28] @ (80158f0 <vTaskDelay+0x68>)
- 80158d4: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 80158d8: 601a str r2, [r3, #0]
- 80158da: f3bf 8f4f dsb sy
- 80158de: f3bf 8f6f isb sy
- }
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- 80158e2: bf00 nop
- 80158e4: 3710 adds r7, #16
- 80158e6: 46bd mov sp, r7
- 80158e8: bd80 pop {r7, pc}
- 80158ea: bf00 nop
- 80158ec: 24002b90 .word 0x24002b90
- 80158f0: e000ed04 .word 0xe000ed04
- 080158f4 <vTaskStartScheduler>:
- #endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
- /*-----------------------------------------------------------*/
- void vTaskStartScheduler( void )
- {
- 80158f4: b580 push {r7, lr}
- 80158f6: b08a sub sp, #40 @ 0x28
- 80158f8: af04 add r7, sp, #16
- BaseType_t xReturn;
- /* Add the idle task at the lowest priority. */
- #if( configSUPPORT_STATIC_ALLOCATION == 1 )
- {
- StaticTask_t *pxIdleTaskTCBBuffer = NULL;
- 80158fa: 2300 movs r3, #0
- 80158fc: 60bb str r3, [r7, #8]
- StackType_t *pxIdleTaskStackBuffer = NULL;
- 80158fe: 2300 movs r3, #0
- 8015900: 607b str r3, [r7, #4]
- uint32_t ulIdleTaskStackSize;
- /* The Idle task is created using user provided RAM - obtain the
- address of the RAM then create the idle task. */
- vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
- 8015902: 463a mov r2, r7
- 8015904: 1d39 adds r1, r7, #4
- 8015906: f107 0308 add.w r3, r7, #8
- 801590a: 4618 mov r0, r3
- 801590c: f7fe fbc0 bl 8014090 <vApplicationGetIdleTaskMemory>
- xIdleTaskHandle = xTaskCreateStatic( prvIdleTask,
- 8015910: 6839 ldr r1, [r7, #0]
- 8015912: 687b ldr r3, [r7, #4]
- 8015914: 68ba ldr r2, [r7, #8]
- 8015916: 9202 str r2, [sp, #8]
- 8015918: 9301 str r3, [sp, #4]
- 801591a: 2300 movs r3, #0
- 801591c: 9300 str r3, [sp, #0]
- 801591e: 2300 movs r3, #0
- 8015920: 460a mov r2, r1
- 8015922: 4924 ldr r1, [pc, #144] @ (80159b4 <vTaskStartScheduler+0xc0>)
- 8015924: 4824 ldr r0, [pc, #144] @ (80159b8 <vTaskStartScheduler+0xc4>)
- 8015926: f7ff fdf2 bl 801550e <xTaskCreateStatic>
- 801592a: 4603 mov r3, r0
- 801592c: 4a23 ldr r2, [pc, #140] @ (80159bc <vTaskStartScheduler+0xc8>)
- 801592e: 6013 str r3, [r2, #0]
- ( void * ) NULL, /*lint !e961. The cast is not redundant for all compilers. */
- portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
- pxIdleTaskStackBuffer,
- pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
- if( xIdleTaskHandle != NULL )
- 8015930: 4b22 ldr r3, [pc, #136] @ (80159bc <vTaskStartScheduler+0xc8>)
- 8015932: 681b ldr r3, [r3, #0]
- 8015934: 2b00 cmp r3, #0
- 8015936: d002 beq.n 801593e <vTaskStartScheduler+0x4a>
- {
- xReturn = pdPASS;
- 8015938: 2301 movs r3, #1
- 801593a: 617b str r3, [r7, #20]
- 801593c: e001 b.n 8015942 <vTaskStartScheduler+0x4e>
- }
- else
- {
- xReturn = pdFAIL;
- 801593e: 2300 movs r3, #0
- 8015940: 617b str r3, [r7, #20]
- }
- #endif /* configSUPPORT_STATIC_ALLOCATION */
- #if ( configUSE_TIMERS == 1 )
- {
- if( xReturn == pdPASS )
- 8015942: 697b ldr r3, [r7, #20]
- 8015944: 2b01 cmp r3, #1
- 8015946: d102 bne.n 801594e <vTaskStartScheduler+0x5a>
- {
- xReturn = xTimerCreateTimerTask();
- 8015948: f001 f88e bl 8016a68 <xTimerCreateTimerTask>
- 801594c: 6178 str r0, [r7, #20]
- mtCOVERAGE_TEST_MARKER();
- }
- }
- #endif /* configUSE_TIMERS */
- if( xReturn == pdPASS )
- 801594e: 697b ldr r3, [r7, #20]
- 8015950: 2b01 cmp r3, #1
- 8015952: d11b bne.n 801598c <vTaskStartScheduler+0x98>
- __asm volatile
- 8015954: f04f 0350 mov.w r3, #80 @ 0x50
- 8015958: f383 8811 msr BASEPRI, r3
- 801595c: f3bf 8f6f isb sy
- 8015960: f3bf 8f4f dsb sy
- 8015964: 613b str r3, [r7, #16]
- }
- 8015966: bf00 nop
- {
- /* Switch Newlib's _impure_ptr variable to point to the _reent
- structure specific to the task that will run first.
- See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
- for additional information. */
- _impure_ptr = &( pxCurrentTCB->xNewLib_reent );
- 8015968: 4b15 ldr r3, [pc, #84] @ (80159c0 <vTaskStartScheduler+0xcc>)
- 801596a: 681b ldr r3, [r3, #0]
- 801596c: 3354 adds r3, #84 @ 0x54
- 801596e: 4a15 ldr r2, [pc, #84] @ (80159c4 <vTaskStartScheduler+0xd0>)
- 8015970: 6013 str r3, [r2, #0]
- }
- #endif /* configUSE_NEWLIB_REENTRANT */
- xNextTaskUnblockTime = portMAX_DELAY;
- 8015972: 4b15 ldr r3, [pc, #84] @ (80159c8 <vTaskStartScheduler+0xd4>)
- 8015974: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
- 8015978: 601a str r2, [r3, #0]
- xSchedulerRunning = pdTRUE;
- 801597a: 4b14 ldr r3, [pc, #80] @ (80159cc <vTaskStartScheduler+0xd8>)
- 801597c: 2201 movs r2, #1
- 801597e: 601a str r2, [r3, #0]
- xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
- 8015980: 4b13 ldr r3, [pc, #76] @ (80159d0 <vTaskStartScheduler+0xdc>)
- 8015982: 2200 movs r2, #0
- 8015984: 601a str r2, [r3, #0]
- traceTASK_SWITCHED_IN();
- /* Setting up the timer tick is hardware specific and thus in the
- portable interface. */
- if( xPortStartScheduler() != pdFALSE )
- 8015986: f001 fd43 bl 8017410 <xPortStartScheduler>
- }
- /* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
- meaning xIdleTaskHandle is not used anywhere else. */
- ( void ) xIdleTaskHandle;
- }
- 801598a: e00f b.n 80159ac <vTaskStartScheduler+0xb8>
- configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
- 801598c: 697b ldr r3, [r7, #20]
- 801598e: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 8015992: d10b bne.n 80159ac <vTaskStartScheduler+0xb8>
- __asm volatile
- 8015994: f04f 0350 mov.w r3, #80 @ 0x50
- 8015998: f383 8811 msr BASEPRI, r3
- 801599c: f3bf 8f6f isb sy
- 80159a0: f3bf 8f4f dsb sy
- 80159a4: 60fb str r3, [r7, #12]
- }
- 80159a6: bf00 nop
- 80159a8: bf00 nop
- 80159aa: e7fd b.n 80159a8 <vTaskStartScheduler+0xb4>
- }
- 80159ac: bf00 nop
- 80159ae: 3718 adds r7, #24
- 80159b0: 46bd mov sp, r7
- 80159b2: bd80 pop {r7, pc}
- 80159b4: 08018b9c .word 0x08018b9c
- 80159b8: 08016071 .word 0x08016071
- 80159bc: 24002b8c .word 0x24002b8c
- 80159c0: 24002694 .word 0x24002694
- 80159c4: 24000054 .word 0x24000054
- 80159c8: 24002b88 .word 0x24002b88
- 80159cc: 24002b74 .word 0x24002b74
- 80159d0: 24002b6c .word 0x24002b6c
- 080159d4 <vTaskSuspendAll>:
- vPortEndScheduler();
- }
- /*----------------------------------------------------------*/
- void vTaskSuspendAll( void )
- {
- 80159d4: b480 push {r7}
- 80159d6: af00 add r7, sp, #0
- do not otherwise exhibit real time behaviour. */
- portSOFTWARE_BARRIER();
- /* The scheduler is suspended if uxSchedulerSuspended is non-zero. An increment
- is used to allow calls to vTaskSuspendAll() to nest. */
- ++uxSchedulerSuspended;
- 80159d8: 4b04 ldr r3, [pc, #16] @ (80159ec <vTaskSuspendAll+0x18>)
- 80159da: 681b ldr r3, [r3, #0]
- 80159dc: 3301 adds r3, #1
- 80159de: 4a03 ldr r2, [pc, #12] @ (80159ec <vTaskSuspendAll+0x18>)
- 80159e0: 6013 str r3, [r2, #0]
- /* Enforces ordering for ports and optimised compilers that may otherwise place
- the above increment elsewhere. */
- portMEMORY_BARRIER();
- }
- 80159e2: bf00 nop
- 80159e4: 46bd mov sp, r7
- 80159e6: f85d 7b04 ldr.w r7, [sp], #4
- 80159ea: 4770 bx lr
- 80159ec: 24002b90 .word 0x24002b90
- 080159f0 <xTaskResumeAll>:
- #endif /* configUSE_TICKLESS_IDLE */
- /*----------------------------------------------------------*/
- BaseType_t xTaskResumeAll( void )
- {
- 80159f0: b580 push {r7, lr}
- 80159f2: b084 sub sp, #16
- 80159f4: af00 add r7, sp, #0
- TCB_t *pxTCB = NULL;
- 80159f6: 2300 movs r3, #0
- 80159f8: 60fb str r3, [r7, #12]
- BaseType_t xAlreadyYielded = pdFALSE;
- 80159fa: 2300 movs r3, #0
- 80159fc: 60bb str r3, [r7, #8]
- /* If uxSchedulerSuspended is zero then this function does not match a
- previous call to vTaskSuspendAll(). */
- configASSERT( uxSchedulerSuspended );
- 80159fe: 4b42 ldr r3, [pc, #264] @ (8015b08 <xTaskResumeAll+0x118>)
- 8015a00: 681b ldr r3, [r3, #0]
- 8015a02: 2b00 cmp r3, #0
- 8015a04: d10b bne.n 8015a1e <xTaskResumeAll+0x2e>
- __asm volatile
- 8015a06: f04f 0350 mov.w r3, #80 @ 0x50
- 8015a0a: f383 8811 msr BASEPRI, r3
- 8015a0e: f3bf 8f6f isb sy
- 8015a12: f3bf 8f4f dsb sy
- 8015a16: 603b str r3, [r7, #0]
- }
- 8015a18: bf00 nop
- 8015a1a: bf00 nop
- 8015a1c: e7fd b.n 8015a1a <xTaskResumeAll+0x2a>
- /* It is possible that an ISR caused a task to be removed from an event
- list while the scheduler was suspended. If this was the case then the
- removed task will have been added to the xPendingReadyList. Once the
- scheduler has been resumed it is safe to move all the pending ready
- tasks from this list into their appropriate ready list. */
- taskENTER_CRITICAL();
- 8015a1e: f001 fd9b bl 8017558 <vPortEnterCritical>
- {
- --uxSchedulerSuspended;
- 8015a22: 4b39 ldr r3, [pc, #228] @ (8015b08 <xTaskResumeAll+0x118>)
- 8015a24: 681b ldr r3, [r3, #0]
- 8015a26: 3b01 subs r3, #1
- 8015a28: 4a37 ldr r2, [pc, #220] @ (8015b08 <xTaskResumeAll+0x118>)
- 8015a2a: 6013 str r3, [r2, #0]
- if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
- 8015a2c: 4b36 ldr r3, [pc, #216] @ (8015b08 <xTaskResumeAll+0x118>)
- 8015a2e: 681b ldr r3, [r3, #0]
- 8015a30: 2b00 cmp r3, #0
- 8015a32: d162 bne.n 8015afa <xTaskResumeAll+0x10a>
- {
- if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
- 8015a34: 4b35 ldr r3, [pc, #212] @ (8015b0c <xTaskResumeAll+0x11c>)
- 8015a36: 681b ldr r3, [r3, #0]
- 8015a38: 2b00 cmp r3, #0
- 8015a3a: d05e beq.n 8015afa <xTaskResumeAll+0x10a>
- {
- /* Move any readied tasks from the pending list into the
- appropriate ready list. */
- while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
- 8015a3c: e02f b.n 8015a9e <xTaskResumeAll+0xae>
- {
- pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
- 8015a3e: 4b34 ldr r3, [pc, #208] @ (8015b10 <xTaskResumeAll+0x120>)
- 8015a40: 68db ldr r3, [r3, #12]
- 8015a42: 68db ldr r3, [r3, #12]
- 8015a44: 60fb str r3, [r7, #12]
- ( void ) uxListRemove( &( pxTCB->xEventListItem ) );
- 8015a46: 68fb ldr r3, [r7, #12]
- 8015a48: 3318 adds r3, #24
- 8015a4a: 4618 mov r0, r3
- 8015a4c: f7fe fbde bl 801420c <uxListRemove>
- ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
- 8015a50: 68fb ldr r3, [r7, #12]
- 8015a52: 3304 adds r3, #4
- 8015a54: 4618 mov r0, r3
- 8015a56: f7fe fbd9 bl 801420c <uxListRemove>
- prvAddTaskToReadyList( pxTCB );
- 8015a5a: 68fb ldr r3, [r7, #12]
- 8015a5c: 6ada ldr r2, [r3, #44] @ 0x2c
- 8015a5e: 4b2d ldr r3, [pc, #180] @ (8015b14 <xTaskResumeAll+0x124>)
- 8015a60: 681b ldr r3, [r3, #0]
- 8015a62: 429a cmp r2, r3
- 8015a64: d903 bls.n 8015a6e <xTaskResumeAll+0x7e>
- 8015a66: 68fb ldr r3, [r7, #12]
- 8015a68: 6adb ldr r3, [r3, #44] @ 0x2c
- 8015a6a: 4a2a ldr r2, [pc, #168] @ (8015b14 <xTaskResumeAll+0x124>)
- 8015a6c: 6013 str r3, [r2, #0]
- 8015a6e: 68fb ldr r3, [r7, #12]
- 8015a70: 6ada ldr r2, [r3, #44] @ 0x2c
- 8015a72: 4613 mov r3, r2
- 8015a74: 009b lsls r3, r3, #2
- 8015a76: 4413 add r3, r2
- 8015a78: 009b lsls r3, r3, #2
- 8015a7a: 4a27 ldr r2, [pc, #156] @ (8015b18 <xTaskResumeAll+0x128>)
- 8015a7c: 441a add r2, r3
- 8015a7e: 68fb ldr r3, [r7, #12]
- 8015a80: 3304 adds r3, #4
- 8015a82: 4619 mov r1, r3
- 8015a84: 4610 mov r0, r2
- 8015a86: f7fe fb64 bl 8014152 <vListInsertEnd>
- /* If the moved task has a priority higher than the current
- task then a yield must be performed. */
- if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
- 8015a8a: 68fb ldr r3, [r7, #12]
- 8015a8c: 6ada ldr r2, [r3, #44] @ 0x2c
- 8015a8e: 4b23 ldr r3, [pc, #140] @ (8015b1c <xTaskResumeAll+0x12c>)
- 8015a90: 681b ldr r3, [r3, #0]
- 8015a92: 6adb ldr r3, [r3, #44] @ 0x2c
- 8015a94: 429a cmp r2, r3
- 8015a96: d302 bcc.n 8015a9e <xTaskResumeAll+0xae>
- {
- xYieldPending = pdTRUE;
- 8015a98: 4b21 ldr r3, [pc, #132] @ (8015b20 <xTaskResumeAll+0x130>)
- 8015a9a: 2201 movs r2, #1
- 8015a9c: 601a str r2, [r3, #0]
- while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
- 8015a9e: 4b1c ldr r3, [pc, #112] @ (8015b10 <xTaskResumeAll+0x120>)
- 8015aa0: 681b ldr r3, [r3, #0]
- 8015aa2: 2b00 cmp r3, #0
- 8015aa4: d1cb bne.n 8015a3e <xTaskResumeAll+0x4e>
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- if( pxTCB != NULL )
- 8015aa6: 68fb ldr r3, [r7, #12]
- 8015aa8: 2b00 cmp r3, #0
- 8015aaa: d001 beq.n 8015ab0 <xTaskResumeAll+0xc0>
- which may have prevented the next unblock time from being
- re-calculated, in which case re-calculate it now. Mainly
- important for low power tickless implementations, where
- this can prevent an unnecessary exit from low power
- state. */
- prvResetNextTaskUnblockTime();
- 8015aac: f000 fb9c bl 80161e8 <prvResetNextTaskUnblockTime>
- /* If any ticks occurred while the scheduler was suspended then
- they should be processed now. This ensures the tick count does
- not slip, and that any delayed tasks are resumed at the correct
- time. */
- {
- TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
- 8015ab0: 4b1c ldr r3, [pc, #112] @ (8015b24 <xTaskResumeAll+0x134>)
- 8015ab2: 681b ldr r3, [r3, #0]
- 8015ab4: 607b str r3, [r7, #4]
- if( xPendedCounts > ( TickType_t ) 0U )
- 8015ab6: 687b ldr r3, [r7, #4]
- 8015ab8: 2b00 cmp r3, #0
- 8015aba: d010 beq.n 8015ade <xTaskResumeAll+0xee>
- {
- do
- {
- if( xTaskIncrementTick() != pdFALSE )
- 8015abc: f000 f846 bl 8015b4c <xTaskIncrementTick>
- 8015ac0: 4603 mov r3, r0
- 8015ac2: 2b00 cmp r3, #0
- 8015ac4: d002 beq.n 8015acc <xTaskResumeAll+0xdc>
- {
- xYieldPending = pdTRUE;
- 8015ac6: 4b16 ldr r3, [pc, #88] @ (8015b20 <xTaskResumeAll+0x130>)
- 8015ac8: 2201 movs r2, #1
- 8015aca: 601a str r2, [r3, #0]
- }
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- --xPendedCounts;
- 8015acc: 687b ldr r3, [r7, #4]
- 8015ace: 3b01 subs r3, #1
- 8015ad0: 607b str r3, [r7, #4]
- } while( xPendedCounts > ( TickType_t ) 0U );
- 8015ad2: 687b ldr r3, [r7, #4]
- 8015ad4: 2b00 cmp r3, #0
- 8015ad6: d1f1 bne.n 8015abc <xTaskResumeAll+0xcc>
- xPendedTicks = 0;
- 8015ad8: 4b12 ldr r3, [pc, #72] @ (8015b24 <xTaskResumeAll+0x134>)
- 8015ada: 2200 movs r2, #0
- 8015adc: 601a str r2, [r3, #0]
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- if( xYieldPending != pdFALSE )
- 8015ade: 4b10 ldr r3, [pc, #64] @ (8015b20 <xTaskResumeAll+0x130>)
- 8015ae0: 681b ldr r3, [r3, #0]
- 8015ae2: 2b00 cmp r3, #0
- 8015ae4: d009 beq.n 8015afa <xTaskResumeAll+0x10a>
- {
- #if( configUSE_PREEMPTION != 0 )
- {
- xAlreadyYielded = pdTRUE;
- 8015ae6: 2301 movs r3, #1
- 8015ae8: 60bb str r3, [r7, #8]
- }
- #endif
- taskYIELD_IF_USING_PREEMPTION();
- 8015aea: 4b0f ldr r3, [pc, #60] @ (8015b28 <xTaskResumeAll+0x138>)
- 8015aec: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 8015af0: 601a str r2, [r3, #0]
- 8015af2: f3bf 8f4f dsb sy
- 8015af6: f3bf 8f6f isb sy
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- taskEXIT_CRITICAL();
- 8015afa: f001 fd5f bl 80175bc <vPortExitCritical>
- return xAlreadyYielded;
- 8015afe: 68bb ldr r3, [r7, #8]
- }
- 8015b00: 4618 mov r0, r3
- 8015b02: 3710 adds r7, #16
- 8015b04: 46bd mov sp, r7
- 8015b06: bd80 pop {r7, pc}
- 8015b08: 24002b90 .word 0x24002b90
- 8015b0c: 24002b68 .word 0x24002b68
- 8015b10: 24002b28 .word 0x24002b28
- 8015b14: 24002b70 .word 0x24002b70
- 8015b18: 24002698 .word 0x24002698
- 8015b1c: 24002694 .word 0x24002694
- 8015b20: 24002b7c .word 0x24002b7c
- 8015b24: 24002b78 .word 0x24002b78
- 8015b28: e000ed04 .word 0xe000ed04
- 08015b2c <xTaskGetTickCount>:
- /*-----------------------------------------------------------*/
- TickType_t xTaskGetTickCount( void )
- {
- 8015b2c: b480 push {r7}
- 8015b2e: b083 sub sp, #12
- 8015b30: af00 add r7, sp, #0
- TickType_t xTicks;
- /* Critical section required if running on a 16 bit processor. */
- portTICK_TYPE_ENTER_CRITICAL();
- {
- xTicks = xTickCount;
- 8015b32: 4b05 ldr r3, [pc, #20] @ (8015b48 <xTaskGetTickCount+0x1c>)
- 8015b34: 681b ldr r3, [r3, #0]
- 8015b36: 607b str r3, [r7, #4]
- }
- portTICK_TYPE_EXIT_CRITICAL();
- return xTicks;
- 8015b38: 687b ldr r3, [r7, #4]
- }
- 8015b3a: 4618 mov r0, r3
- 8015b3c: 370c adds r7, #12
- 8015b3e: 46bd mov sp, r7
- 8015b40: f85d 7b04 ldr.w r7, [sp], #4
- 8015b44: 4770 bx lr
- 8015b46: bf00 nop
- 8015b48: 24002b6c .word 0x24002b6c
- 08015b4c <xTaskIncrementTick>:
- #endif /* INCLUDE_xTaskAbortDelay */
- /*----------------------------------------------------------*/
- BaseType_t xTaskIncrementTick( void )
- {
- 8015b4c: b580 push {r7, lr}
- 8015b4e: b086 sub sp, #24
- 8015b50: af00 add r7, sp, #0
- TCB_t * pxTCB;
- TickType_t xItemValue;
- BaseType_t xSwitchRequired = pdFALSE;
- 8015b52: 2300 movs r3, #0
- 8015b54: 617b str r3, [r7, #20]
- /* Called by the portable layer each time a tick interrupt occurs.
- Increments the tick then checks to see if the new tick value will cause any
- tasks to be unblocked. */
- traceTASK_INCREMENT_TICK( xTickCount );
- if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
- 8015b56: 4b4f ldr r3, [pc, #316] @ (8015c94 <xTaskIncrementTick+0x148>)
- 8015b58: 681b ldr r3, [r3, #0]
- 8015b5a: 2b00 cmp r3, #0
- 8015b5c: f040 8090 bne.w 8015c80 <xTaskIncrementTick+0x134>
- {
- /* Minor optimisation. The tick count cannot change in this
- block. */
- const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
- 8015b60: 4b4d ldr r3, [pc, #308] @ (8015c98 <xTaskIncrementTick+0x14c>)
- 8015b62: 681b ldr r3, [r3, #0]
- 8015b64: 3301 adds r3, #1
- 8015b66: 613b str r3, [r7, #16]
- /* Increment the RTOS tick, switching the delayed and overflowed
- delayed lists if it wraps to 0. */
- xTickCount = xConstTickCount;
- 8015b68: 4a4b ldr r2, [pc, #300] @ (8015c98 <xTaskIncrementTick+0x14c>)
- 8015b6a: 693b ldr r3, [r7, #16]
- 8015b6c: 6013 str r3, [r2, #0]
- if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
- 8015b6e: 693b ldr r3, [r7, #16]
- 8015b70: 2b00 cmp r3, #0
- 8015b72: d121 bne.n 8015bb8 <xTaskIncrementTick+0x6c>
- {
- taskSWITCH_DELAYED_LISTS();
- 8015b74: 4b49 ldr r3, [pc, #292] @ (8015c9c <xTaskIncrementTick+0x150>)
- 8015b76: 681b ldr r3, [r3, #0]
- 8015b78: 681b ldr r3, [r3, #0]
- 8015b7a: 2b00 cmp r3, #0
- 8015b7c: d00b beq.n 8015b96 <xTaskIncrementTick+0x4a>
- __asm volatile
- 8015b7e: f04f 0350 mov.w r3, #80 @ 0x50
- 8015b82: f383 8811 msr BASEPRI, r3
- 8015b86: f3bf 8f6f isb sy
- 8015b8a: f3bf 8f4f dsb sy
- 8015b8e: 603b str r3, [r7, #0]
- }
- 8015b90: bf00 nop
- 8015b92: bf00 nop
- 8015b94: e7fd b.n 8015b92 <xTaskIncrementTick+0x46>
- 8015b96: 4b41 ldr r3, [pc, #260] @ (8015c9c <xTaskIncrementTick+0x150>)
- 8015b98: 681b ldr r3, [r3, #0]
- 8015b9a: 60fb str r3, [r7, #12]
- 8015b9c: 4b40 ldr r3, [pc, #256] @ (8015ca0 <xTaskIncrementTick+0x154>)
- 8015b9e: 681b ldr r3, [r3, #0]
- 8015ba0: 4a3e ldr r2, [pc, #248] @ (8015c9c <xTaskIncrementTick+0x150>)
- 8015ba2: 6013 str r3, [r2, #0]
- 8015ba4: 4a3e ldr r2, [pc, #248] @ (8015ca0 <xTaskIncrementTick+0x154>)
- 8015ba6: 68fb ldr r3, [r7, #12]
- 8015ba8: 6013 str r3, [r2, #0]
- 8015baa: 4b3e ldr r3, [pc, #248] @ (8015ca4 <xTaskIncrementTick+0x158>)
- 8015bac: 681b ldr r3, [r3, #0]
- 8015bae: 3301 adds r3, #1
- 8015bb0: 4a3c ldr r2, [pc, #240] @ (8015ca4 <xTaskIncrementTick+0x158>)
- 8015bb2: 6013 str r3, [r2, #0]
- 8015bb4: f000 fb18 bl 80161e8 <prvResetNextTaskUnblockTime>
- /* See if this tick has made a timeout expire. Tasks are stored in
- the queue in the order of their wake time - meaning once one task
- has been found whose block time has not expired there is no need to
- look any further down the list. */
- if( xConstTickCount >= xNextTaskUnblockTime )
- 8015bb8: 4b3b ldr r3, [pc, #236] @ (8015ca8 <xTaskIncrementTick+0x15c>)
- 8015bba: 681b ldr r3, [r3, #0]
- 8015bbc: 693a ldr r2, [r7, #16]
- 8015bbe: 429a cmp r2, r3
- 8015bc0: d349 bcc.n 8015c56 <xTaskIncrementTick+0x10a>
- {
- for( ;; )
- {
- if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
- 8015bc2: 4b36 ldr r3, [pc, #216] @ (8015c9c <xTaskIncrementTick+0x150>)
- 8015bc4: 681b ldr r3, [r3, #0]
- 8015bc6: 681b ldr r3, [r3, #0]
- 8015bc8: 2b00 cmp r3, #0
- 8015bca: d104 bne.n 8015bd6 <xTaskIncrementTick+0x8a>
- /* The delayed list is empty. Set xNextTaskUnblockTime
- to the maximum possible value so it is extremely
- unlikely that the
- if( xTickCount >= xNextTaskUnblockTime ) test will pass
- next time through. */
- xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
- 8015bcc: 4b36 ldr r3, [pc, #216] @ (8015ca8 <xTaskIncrementTick+0x15c>)
- 8015bce: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
- 8015bd2: 601a str r2, [r3, #0]
- break;
- 8015bd4: e03f b.n 8015c56 <xTaskIncrementTick+0x10a>
- {
- /* The delayed list is not empty, get the value of the
- item at the head of the delayed list. This is the time
- at which the task at the head of the delayed list must
- be removed from the Blocked state. */
- pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
- 8015bd6: 4b31 ldr r3, [pc, #196] @ (8015c9c <xTaskIncrementTick+0x150>)
- 8015bd8: 681b ldr r3, [r3, #0]
- 8015bda: 68db ldr r3, [r3, #12]
- 8015bdc: 68db ldr r3, [r3, #12]
- 8015bde: 60bb str r3, [r7, #8]
- xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
- 8015be0: 68bb ldr r3, [r7, #8]
- 8015be2: 685b ldr r3, [r3, #4]
- 8015be4: 607b str r3, [r7, #4]
- if( xConstTickCount < xItemValue )
- 8015be6: 693a ldr r2, [r7, #16]
- 8015be8: 687b ldr r3, [r7, #4]
- 8015bea: 429a cmp r2, r3
- 8015bec: d203 bcs.n 8015bf6 <xTaskIncrementTick+0xaa>
- /* It is not time to unblock this item yet, but the
- item value is the time at which the task at the head
- of the blocked list must be removed from the Blocked
- state - so record the item value in
- xNextTaskUnblockTime. */
- xNextTaskUnblockTime = xItemValue;
- 8015bee: 4a2e ldr r2, [pc, #184] @ (8015ca8 <xTaskIncrementTick+0x15c>)
- 8015bf0: 687b ldr r3, [r7, #4]
- 8015bf2: 6013 str r3, [r2, #0]
- break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
- 8015bf4: e02f b.n 8015c56 <xTaskIncrementTick+0x10a>
- {
- mtCOVERAGE_TEST_MARKER();
- }
- /* It is time to remove the item from the Blocked state. */
- ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
- 8015bf6: 68bb ldr r3, [r7, #8]
- 8015bf8: 3304 adds r3, #4
- 8015bfa: 4618 mov r0, r3
- 8015bfc: f7fe fb06 bl 801420c <uxListRemove>
- /* Is the task waiting on an event also? If so remove
- it from the event list. */
- if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
- 8015c00: 68bb ldr r3, [r7, #8]
- 8015c02: 6a9b ldr r3, [r3, #40] @ 0x28
- 8015c04: 2b00 cmp r3, #0
- 8015c06: d004 beq.n 8015c12 <xTaskIncrementTick+0xc6>
- {
- ( void ) uxListRemove( &( pxTCB->xEventListItem ) );
- 8015c08: 68bb ldr r3, [r7, #8]
- 8015c0a: 3318 adds r3, #24
- 8015c0c: 4618 mov r0, r3
- 8015c0e: f7fe fafd bl 801420c <uxListRemove>
- mtCOVERAGE_TEST_MARKER();
- }
- /* Place the unblocked task into the appropriate ready
- list. */
- prvAddTaskToReadyList( pxTCB );
- 8015c12: 68bb ldr r3, [r7, #8]
- 8015c14: 6ada ldr r2, [r3, #44] @ 0x2c
- 8015c16: 4b25 ldr r3, [pc, #148] @ (8015cac <xTaskIncrementTick+0x160>)
- 8015c18: 681b ldr r3, [r3, #0]
- 8015c1a: 429a cmp r2, r3
- 8015c1c: d903 bls.n 8015c26 <xTaskIncrementTick+0xda>
- 8015c1e: 68bb ldr r3, [r7, #8]
- 8015c20: 6adb ldr r3, [r3, #44] @ 0x2c
- 8015c22: 4a22 ldr r2, [pc, #136] @ (8015cac <xTaskIncrementTick+0x160>)
- 8015c24: 6013 str r3, [r2, #0]
- 8015c26: 68bb ldr r3, [r7, #8]
- 8015c28: 6ada ldr r2, [r3, #44] @ 0x2c
- 8015c2a: 4613 mov r3, r2
- 8015c2c: 009b lsls r3, r3, #2
- 8015c2e: 4413 add r3, r2
- 8015c30: 009b lsls r3, r3, #2
- 8015c32: 4a1f ldr r2, [pc, #124] @ (8015cb0 <xTaskIncrementTick+0x164>)
- 8015c34: 441a add r2, r3
- 8015c36: 68bb ldr r3, [r7, #8]
- 8015c38: 3304 adds r3, #4
- 8015c3a: 4619 mov r1, r3
- 8015c3c: 4610 mov r0, r2
- 8015c3e: f7fe fa88 bl 8014152 <vListInsertEnd>
- {
- /* Preemption is on, but a context switch should
- only be performed if the unblocked task has a
- priority that is equal to or higher than the
- currently executing task. */
- if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
- 8015c42: 68bb ldr r3, [r7, #8]
- 8015c44: 6ada ldr r2, [r3, #44] @ 0x2c
- 8015c46: 4b1b ldr r3, [pc, #108] @ (8015cb4 <xTaskIncrementTick+0x168>)
- 8015c48: 681b ldr r3, [r3, #0]
- 8015c4a: 6adb ldr r3, [r3, #44] @ 0x2c
- 8015c4c: 429a cmp r2, r3
- 8015c4e: d3b8 bcc.n 8015bc2 <xTaskIncrementTick+0x76>
- {
- xSwitchRequired = pdTRUE;
- 8015c50: 2301 movs r3, #1
- 8015c52: 617b str r3, [r7, #20]
- if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
- 8015c54: e7b5 b.n 8015bc2 <xTaskIncrementTick+0x76>
- /* Tasks of equal priority to the currently running task will share
- processing time (time slice) if preemption is on, and the application
- writer has not explicitly turned time slicing off. */
- #if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
- {
- if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
- 8015c56: 4b17 ldr r3, [pc, #92] @ (8015cb4 <xTaskIncrementTick+0x168>)
- 8015c58: 681b ldr r3, [r3, #0]
- 8015c5a: 6ada ldr r2, [r3, #44] @ 0x2c
- 8015c5c: 4914 ldr r1, [pc, #80] @ (8015cb0 <xTaskIncrementTick+0x164>)
- 8015c5e: 4613 mov r3, r2
- 8015c60: 009b lsls r3, r3, #2
- 8015c62: 4413 add r3, r2
- 8015c64: 009b lsls r3, r3, #2
- 8015c66: 440b add r3, r1
- 8015c68: 681b ldr r3, [r3, #0]
- 8015c6a: 2b01 cmp r3, #1
- 8015c6c: d901 bls.n 8015c72 <xTaskIncrementTick+0x126>
- {
- xSwitchRequired = pdTRUE;
- 8015c6e: 2301 movs r3, #1
- 8015c70: 617b str r3, [r7, #20]
- }
- #endif /* configUSE_TICK_HOOK */
- #if ( configUSE_PREEMPTION == 1 )
- {
- if( xYieldPending != pdFALSE )
- 8015c72: 4b11 ldr r3, [pc, #68] @ (8015cb8 <xTaskIncrementTick+0x16c>)
- 8015c74: 681b ldr r3, [r3, #0]
- 8015c76: 2b00 cmp r3, #0
- 8015c78: d007 beq.n 8015c8a <xTaskIncrementTick+0x13e>
- {
- xSwitchRequired = pdTRUE;
- 8015c7a: 2301 movs r3, #1
- 8015c7c: 617b str r3, [r7, #20]
- 8015c7e: e004 b.n 8015c8a <xTaskIncrementTick+0x13e>
- }
- #endif /* configUSE_PREEMPTION */
- }
- else
- {
- ++xPendedTicks;
- 8015c80: 4b0e ldr r3, [pc, #56] @ (8015cbc <xTaskIncrementTick+0x170>)
- 8015c82: 681b ldr r3, [r3, #0]
- 8015c84: 3301 adds r3, #1
- 8015c86: 4a0d ldr r2, [pc, #52] @ (8015cbc <xTaskIncrementTick+0x170>)
- 8015c88: 6013 str r3, [r2, #0]
- vApplicationTickHook();
- }
- #endif
- }
- return xSwitchRequired;
- 8015c8a: 697b ldr r3, [r7, #20]
- }
- 8015c8c: 4618 mov r0, r3
- 8015c8e: 3718 adds r7, #24
- 8015c90: 46bd mov sp, r7
- 8015c92: bd80 pop {r7, pc}
- 8015c94: 24002b90 .word 0x24002b90
- 8015c98: 24002b6c .word 0x24002b6c
- 8015c9c: 24002b20 .word 0x24002b20
- 8015ca0: 24002b24 .word 0x24002b24
- 8015ca4: 24002b80 .word 0x24002b80
- 8015ca8: 24002b88 .word 0x24002b88
- 8015cac: 24002b70 .word 0x24002b70
- 8015cb0: 24002698 .word 0x24002698
- 8015cb4: 24002694 .word 0x24002694
- 8015cb8: 24002b7c .word 0x24002b7c
- 8015cbc: 24002b78 .word 0x24002b78
- 08015cc0 <vTaskSwitchContext>:
- #endif /* configUSE_APPLICATION_TASK_TAG */
- /*-----------------------------------------------------------*/
- void vTaskSwitchContext( void )
- {
- 8015cc0: b580 push {r7, lr}
- 8015cc2: b084 sub sp, #16
- 8015cc4: af00 add r7, sp, #0
- if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
- 8015cc6: 4b32 ldr r3, [pc, #200] @ (8015d90 <vTaskSwitchContext+0xd0>)
- 8015cc8: 681b ldr r3, [r3, #0]
- 8015cca: 2b00 cmp r3, #0
- 8015ccc: d003 beq.n 8015cd6 <vTaskSwitchContext+0x16>
- {
- /* The scheduler is currently suspended - do not allow a context
- switch. */
- xYieldPending = pdTRUE;
- 8015cce: 4b31 ldr r3, [pc, #196] @ (8015d94 <vTaskSwitchContext+0xd4>)
- 8015cd0: 2201 movs r2, #1
- 8015cd2: 601a str r2, [r3, #0]
- for additional information. */
- _impure_ptr = &( pxCurrentTCB->xNewLib_reent );
- }
- #endif /* configUSE_NEWLIB_REENTRANT */
- }
- }
- 8015cd4: e058 b.n 8015d88 <vTaskSwitchContext+0xc8>
- xYieldPending = pdFALSE;
- 8015cd6: 4b2f ldr r3, [pc, #188] @ (8015d94 <vTaskSwitchContext+0xd4>)
- 8015cd8: 2200 movs r2, #0
- 8015cda: 601a str r2, [r3, #0]
- taskCHECK_FOR_STACK_OVERFLOW();
- 8015cdc: 4b2e ldr r3, [pc, #184] @ (8015d98 <vTaskSwitchContext+0xd8>)
- 8015cde: 681b ldr r3, [r3, #0]
- 8015ce0: 681a ldr r2, [r3, #0]
- 8015ce2: 4b2d ldr r3, [pc, #180] @ (8015d98 <vTaskSwitchContext+0xd8>)
- 8015ce4: 681b ldr r3, [r3, #0]
- 8015ce6: 6b1b ldr r3, [r3, #48] @ 0x30
- 8015ce8: 429a cmp r2, r3
- 8015cea: d808 bhi.n 8015cfe <vTaskSwitchContext+0x3e>
- 8015cec: 4b2a ldr r3, [pc, #168] @ (8015d98 <vTaskSwitchContext+0xd8>)
- 8015cee: 681a ldr r2, [r3, #0]
- 8015cf0: 4b29 ldr r3, [pc, #164] @ (8015d98 <vTaskSwitchContext+0xd8>)
- 8015cf2: 681b ldr r3, [r3, #0]
- 8015cf4: 3334 adds r3, #52 @ 0x34
- 8015cf6: 4619 mov r1, r3
- 8015cf8: 4610 mov r0, r2
- 8015cfa: f7ea fcb9 bl 8000670 <vApplicationStackOverflowHook>
- taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
- 8015cfe: 4b27 ldr r3, [pc, #156] @ (8015d9c <vTaskSwitchContext+0xdc>)
- 8015d00: 681b ldr r3, [r3, #0]
- 8015d02: 60fb str r3, [r7, #12]
- 8015d04: e011 b.n 8015d2a <vTaskSwitchContext+0x6a>
- 8015d06: 68fb ldr r3, [r7, #12]
- 8015d08: 2b00 cmp r3, #0
- 8015d0a: d10b bne.n 8015d24 <vTaskSwitchContext+0x64>
- __asm volatile
- 8015d0c: f04f 0350 mov.w r3, #80 @ 0x50
- 8015d10: f383 8811 msr BASEPRI, r3
- 8015d14: f3bf 8f6f isb sy
- 8015d18: f3bf 8f4f dsb sy
- 8015d1c: 607b str r3, [r7, #4]
- }
- 8015d1e: bf00 nop
- 8015d20: bf00 nop
- 8015d22: e7fd b.n 8015d20 <vTaskSwitchContext+0x60>
- 8015d24: 68fb ldr r3, [r7, #12]
- 8015d26: 3b01 subs r3, #1
- 8015d28: 60fb str r3, [r7, #12]
- 8015d2a: 491d ldr r1, [pc, #116] @ (8015da0 <vTaskSwitchContext+0xe0>)
- 8015d2c: 68fa ldr r2, [r7, #12]
- 8015d2e: 4613 mov r3, r2
- 8015d30: 009b lsls r3, r3, #2
- 8015d32: 4413 add r3, r2
- 8015d34: 009b lsls r3, r3, #2
- 8015d36: 440b add r3, r1
- 8015d38: 681b ldr r3, [r3, #0]
- 8015d3a: 2b00 cmp r3, #0
- 8015d3c: d0e3 beq.n 8015d06 <vTaskSwitchContext+0x46>
- 8015d3e: 68fa ldr r2, [r7, #12]
- 8015d40: 4613 mov r3, r2
- 8015d42: 009b lsls r3, r3, #2
- 8015d44: 4413 add r3, r2
- 8015d46: 009b lsls r3, r3, #2
- 8015d48: 4a15 ldr r2, [pc, #84] @ (8015da0 <vTaskSwitchContext+0xe0>)
- 8015d4a: 4413 add r3, r2
- 8015d4c: 60bb str r3, [r7, #8]
- 8015d4e: 68bb ldr r3, [r7, #8]
- 8015d50: 685b ldr r3, [r3, #4]
- 8015d52: 685a ldr r2, [r3, #4]
- 8015d54: 68bb ldr r3, [r7, #8]
- 8015d56: 605a str r2, [r3, #4]
- 8015d58: 68bb ldr r3, [r7, #8]
- 8015d5a: 685a ldr r2, [r3, #4]
- 8015d5c: 68bb ldr r3, [r7, #8]
- 8015d5e: 3308 adds r3, #8
- 8015d60: 429a cmp r2, r3
- 8015d62: d104 bne.n 8015d6e <vTaskSwitchContext+0xae>
- 8015d64: 68bb ldr r3, [r7, #8]
- 8015d66: 685b ldr r3, [r3, #4]
- 8015d68: 685a ldr r2, [r3, #4]
- 8015d6a: 68bb ldr r3, [r7, #8]
- 8015d6c: 605a str r2, [r3, #4]
- 8015d6e: 68bb ldr r3, [r7, #8]
- 8015d70: 685b ldr r3, [r3, #4]
- 8015d72: 68db ldr r3, [r3, #12]
- 8015d74: 4a08 ldr r2, [pc, #32] @ (8015d98 <vTaskSwitchContext+0xd8>)
- 8015d76: 6013 str r3, [r2, #0]
- 8015d78: 4a08 ldr r2, [pc, #32] @ (8015d9c <vTaskSwitchContext+0xdc>)
- 8015d7a: 68fb ldr r3, [r7, #12]
- 8015d7c: 6013 str r3, [r2, #0]
- _impure_ptr = &( pxCurrentTCB->xNewLib_reent );
- 8015d7e: 4b06 ldr r3, [pc, #24] @ (8015d98 <vTaskSwitchContext+0xd8>)
- 8015d80: 681b ldr r3, [r3, #0]
- 8015d82: 3354 adds r3, #84 @ 0x54
- 8015d84: 4a07 ldr r2, [pc, #28] @ (8015da4 <vTaskSwitchContext+0xe4>)
- 8015d86: 6013 str r3, [r2, #0]
- }
- 8015d88: bf00 nop
- 8015d8a: 3710 adds r7, #16
- 8015d8c: 46bd mov sp, r7
- 8015d8e: bd80 pop {r7, pc}
- 8015d90: 24002b90 .word 0x24002b90
- 8015d94: 24002b7c .word 0x24002b7c
- 8015d98: 24002694 .word 0x24002694
- 8015d9c: 24002b70 .word 0x24002b70
- 8015da0: 24002698 .word 0x24002698
- 8015da4: 24000054 .word 0x24000054
- 08015da8 <vTaskPlaceOnEventList>:
- /*-----------------------------------------------------------*/
- void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
- {
- 8015da8: b580 push {r7, lr}
- 8015daa: b084 sub sp, #16
- 8015dac: af00 add r7, sp, #0
- 8015dae: 6078 str r0, [r7, #4]
- 8015db0: 6039 str r1, [r7, #0]
- configASSERT( pxEventList );
- 8015db2: 687b ldr r3, [r7, #4]
- 8015db4: 2b00 cmp r3, #0
- 8015db6: d10b bne.n 8015dd0 <vTaskPlaceOnEventList+0x28>
- __asm volatile
- 8015db8: f04f 0350 mov.w r3, #80 @ 0x50
- 8015dbc: f383 8811 msr BASEPRI, r3
- 8015dc0: f3bf 8f6f isb sy
- 8015dc4: f3bf 8f4f dsb sy
- 8015dc8: 60fb str r3, [r7, #12]
- }
- 8015dca: bf00 nop
- 8015dcc: bf00 nop
- 8015dce: e7fd b.n 8015dcc <vTaskPlaceOnEventList+0x24>
- /* Place the event list item of the TCB in the appropriate event list.
- This is placed in the list in priority order so the highest priority task
- is the first to be woken by the event. The queue that contains the event
- list is locked, preventing simultaneous access from interrupts. */
- vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
- 8015dd0: 4b07 ldr r3, [pc, #28] @ (8015df0 <vTaskPlaceOnEventList+0x48>)
- 8015dd2: 681b ldr r3, [r3, #0]
- 8015dd4: 3318 adds r3, #24
- 8015dd6: 4619 mov r1, r3
- 8015dd8: 6878 ldr r0, [r7, #4]
- 8015dda: f7fe f9de bl 801419a <vListInsert>
- prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
- 8015dde: 2101 movs r1, #1
- 8015de0: 6838 ldr r0, [r7, #0]
- 8015de2: f000 fded bl 80169c0 <prvAddCurrentTaskToDelayedList>
- }
- 8015de6: bf00 nop
- 8015de8: 3710 adds r7, #16
- 8015dea: 46bd mov sp, r7
- 8015dec: bd80 pop {r7, pc}
- 8015dee: bf00 nop
- 8015df0: 24002694 .word 0x24002694
- 08015df4 <vTaskPlaceOnEventListRestricted>:
- /*-----------------------------------------------------------*/
- #if( configUSE_TIMERS == 1 )
- void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
- {
- 8015df4: b580 push {r7, lr}
- 8015df6: b086 sub sp, #24
- 8015df8: af00 add r7, sp, #0
- 8015dfa: 60f8 str r0, [r7, #12]
- 8015dfc: 60b9 str r1, [r7, #8]
- 8015dfe: 607a str r2, [r7, #4]
- configASSERT( pxEventList );
- 8015e00: 68fb ldr r3, [r7, #12]
- 8015e02: 2b00 cmp r3, #0
- 8015e04: d10b bne.n 8015e1e <vTaskPlaceOnEventListRestricted+0x2a>
- __asm volatile
- 8015e06: f04f 0350 mov.w r3, #80 @ 0x50
- 8015e0a: f383 8811 msr BASEPRI, r3
- 8015e0e: f3bf 8f6f isb sy
- 8015e12: f3bf 8f4f dsb sy
- 8015e16: 617b str r3, [r7, #20]
- }
- 8015e18: bf00 nop
- 8015e1a: bf00 nop
- 8015e1c: e7fd b.n 8015e1a <vTaskPlaceOnEventListRestricted+0x26>
- /* Place the event list item of the TCB in the appropriate event list.
- In this case it is assume that this is the only task that is going to
- be waiting on this event list, so the faster vListInsertEnd() function
- can be used in place of vListInsert. */
- vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
- 8015e1e: 4b0a ldr r3, [pc, #40] @ (8015e48 <vTaskPlaceOnEventListRestricted+0x54>)
- 8015e20: 681b ldr r3, [r3, #0]
- 8015e22: 3318 adds r3, #24
- 8015e24: 4619 mov r1, r3
- 8015e26: 68f8 ldr r0, [r7, #12]
- 8015e28: f7fe f993 bl 8014152 <vListInsertEnd>
- /* If the task should block indefinitely then set the block time to a
- value that will be recognised as an indefinite delay inside the
- prvAddCurrentTaskToDelayedList() function. */
- if( xWaitIndefinitely != pdFALSE )
- 8015e2c: 687b ldr r3, [r7, #4]
- 8015e2e: 2b00 cmp r3, #0
- 8015e30: d002 beq.n 8015e38 <vTaskPlaceOnEventListRestricted+0x44>
- {
- xTicksToWait = portMAX_DELAY;
- 8015e32: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
- 8015e36: 60bb str r3, [r7, #8]
- }
- traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) );
- prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely );
- 8015e38: 6879 ldr r1, [r7, #4]
- 8015e3a: 68b8 ldr r0, [r7, #8]
- 8015e3c: f000 fdc0 bl 80169c0 <prvAddCurrentTaskToDelayedList>
- }
- 8015e40: bf00 nop
- 8015e42: 3718 adds r7, #24
- 8015e44: 46bd mov sp, r7
- 8015e46: bd80 pop {r7, pc}
- 8015e48: 24002694 .word 0x24002694
- 08015e4c <xTaskRemoveFromEventList>:
- #endif /* configUSE_TIMERS */
- /*-----------------------------------------------------------*/
- BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
- {
- 8015e4c: b580 push {r7, lr}
- 8015e4e: b086 sub sp, #24
- 8015e50: af00 add r7, sp, #0
- 8015e52: 6078 str r0, [r7, #4]
- get called - the lock count on the queue will get modified instead. This
- means exclusive access to the event list is guaranteed here.
- This function assumes that a check has already been made to ensure that
- pxEventList is not empty. */
- pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
- 8015e54: 687b ldr r3, [r7, #4]
- 8015e56: 68db ldr r3, [r3, #12]
- 8015e58: 68db ldr r3, [r3, #12]
- 8015e5a: 613b str r3, [r7, #16]
- configASSERT( pxUnblockedTCB );
- 8015e5c: 693b ldr r3, [r7, #16]
- 8015e5e: 2b00 cmp r3, #0
- 8015e60: d10b bne.n 8015e7a <xTaskRemoveFromEventList+0x2e>
- __asm volatile
- 8015e62: f04f 0350 mov.w r3, #80 @ 0x50
- 8015e66: f383 8811 msr BASEPRI, r3
- 8015e6a: f3bf 8f6f isb sy
- 8015e6e: f3bf 8f4f dsb sy
- 8015e72: 60fb str r3, [r7, #12]
- }
- 8015e74: bf00 nop
- 8015e76: bf00 nop
- 8015e78: e7fd b.n 8015e76 <xTaskRemoveFromEventList+0x2a>
- ( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
- 8015e7a: 693b ldr r3, [r7, #16]
- 8015e7c: 3318 adds r3, #24
- 8015e7e: 4618 mov r0, r3
- 8015e80: f7fe f9c4 bl 801420c <uxListRemove>
- if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
- 8015e84: 4b1d ldr r3, [pc, #116] @ (8015efc <xTaskRemoveFromEventList+0xb0>)
- 8015e86: 681b ldr r3, [r3, #0]
- 8015e88: 2b00 cmp r3, #0
- 8015e8a: d11d bne.n 8015ec8 <xTaskRemoveFromEventList+0x7c>
- {
- ( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
- 8015e8c: 693b ldr r3, [r7, #16]
- 8015e8e: 3304 adds r3, #4
- 8015e90: 4618 mov r0, r3
- 8015e92: f7fe f9bb bl 801420c <uxListRemove>
- prvAddTaskToReadyList( pxUnblockedTCB );
- 8015e96: 693b ldr r3, [r7, #16]
- 8015e98: 6ada ldr r2, [r3, #44] @ 0x2c
- 8015e9a: 4b19 ldr r3, [pc, #100] @ (8015f00 <xTaskRemoveFromEventList+0xb4>)
- 8015e9c: 681b ldr r3, [r3, #0]
- 8015e9e: 429a cmp r2, r3
- 8015ea0: d903 bls.n 8015eaa <xTaskRemoveFromEventList+0x5e>
- 8015ea2: 693b ldr r3, [r7, #16]
- 8015ea4: 6adb ldr r3, [r3, #44] @ 0x2c
- 8015ea6: 4a16 ldr r2, [pc, #88] @ (8015f00 <xTaskRemoveFromEventList+0xb4>)
- 8015ea8: 6013 str r3, [r2, #0]
- 8015eaa: 693b ldr r3, [r7, #16]
- 8015eac: 6ada ldr r2, [r3, #44] @ 0x2c
- 8015eae: 4613 mov r3, r2
- 8015eb0: 009b lsls r3, r3, #2
- 8015eb2: 4413 add r3, r2
- 8015eb4: 009b lsls r3, r3, #2
- 8015eb6: 4a13 ldr r2, [pc, #76] @ (8015f04 <xTaskRemoveFromEventList+0xb8>)
- 8015eb8: 441a add r2, r3
- 8015eba: 693b ldr r3, [r7, #16]
- 8015ebc: 3304 adds r3, #4
- 8015ebe: 4619 mov r1, r3
- 8015ec0: 4610 mov r0, r2
- 8015ec2: f7fe f946 bl 8014152 <vListInsertEnd>
- 8015ec6: e005 b.n 8015ed4 <xTaskRemoveFromEventList+0x88>
- }
- else
- {
- /* The delayed and ready lists cannot be accessed, so hold this task
- pending until the scheduler is resumed. */
- vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
- 8015ec8: 693b ldr r3, [r7, #16]
- 8015eca: 3318 adds r3, #24
- 8015ecc: 4619 mov r1, r3
- 8015ece: 480e ldr r0, [pc, #56] @ (8015f08 <xTaskRemoveFromEventList+0xbc>)
- 8015ed0: f7fe f93f bl 8014152 <vListInsertEnd>
- }
- if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
- 8015ed4: 693b ldr r3, [r7, #16]
- 8015ed6: 6ada ldr r2, [r3, #44] @ 0x2c
- 8015ed8: 4b0c ldr r3, [pc, #48] @ (8015f0c <xTaskRemoveFromEventList+0xc0>)
- 8015eda: 681b ldr r3, [r3, #0]
- 8015edc: 6adb ldr r3, [r3, #44] @ 0x2c
- 8015ede: 429a cmp r2, r3
- 8015ee0: d905 bls.n 8015eee <xTaskRemoveFromEventList+0xa2>
- {
- /* Return true if the task removed from the event list has a higher
- priority than the calling task. This allows the calling task to know if
- it should force a context switch now. */
- xReturn = pdTRUE;
- 8015ee2: 2301 movs r3, #1
- 8015ee4: 617b str r3, [r7, #20]
- /* Mark that a yield is pending in case the user is not using the
- "xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
- xYieldPending = pdTRUE;
- 8015ee6: 4b0a ldr r3, [pc, #40] @ (8015f10 <xTaskRemoveFromEventList+0xc4>)
- 8015ee8: 2201 movs r2, #1
- 8015eea: 601a str r2, [r3, #0]
- 8015eec: e001 b.n 8015ef2 <xTaskRemoveFromEventList+0xa6>
- }
- else
- {
- xReturn = pdFALSE;
- 8015eee: 2300 movs r3, #0
- 8015ef0: 617b str r3, [r7, #20]
- }
- return xReturn;
- 8015ef2: 697b ldr r3, [r7, #20]
- }
- 8015ef4: 4618 mov r0, r3
- 8015ef6: 3718 adds r7, #24
- 8015ef8: 46bd mov sp, r7
- 8015efa: bd80 pop {r7, pc}
- 8015efc: 24002b90 .word 0x24002b90
- 8015f00: 24002b70 .word 0x24002b70
- 8015f04: 24002698 .word 0x24002698
- 8015f08: 24002b28 .word 0x24002b28
- 8015f0c: 24002694 .word 0x24002694
- 8015f10: 24002b7c .word 0x24002b7c
- 08015f14 <vTaskSetTimeOutState>:
- }
- }
- /*-----------------------------------------------------------*/
- void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )
- {
- 8015f14: b580 push {r7, lr}
- 8015f16: b084 sub sp, #16
- 8015f18: af00 add r7, sp, #0
- 8015f1a: 6078 str r0, [r7, #4]
- configASSERT( pxTimeOut );
- 8015f1c: 687b ldr r3, [r7, #4]
- 8015f1e: 2b00 cmp r3, #0
- 8015f20: d10b bne.n 8015f3a <vTaskSetTimeOutState+0x26>
- __asm volatile
- 8015f22: f04f 0350 mov.w r3, #80 @ 0x50
- 8015f26: f383 8811 msr BASEPRI, r3
- 8015f2a: f3bf 8f6f isb sy
- 8015f2e: f3bf 8f4f dsb sy
- 8015f32: 60fb str r3, [r7, #12]
- }
- 8015f34: bf00 nop
- 8015f36: bf00 nop
- 8015f38: e7fd b.n 8015f36 <vTaskSetTimeOutState+0x22>
- taskENTER_CRITICAL();
- 8015f3a: f001 fb0d bl 8017558 <vPortEnterCritical>
- {
- pxTimeOut->xOverflowCount = xNumOfOverflows;
- 8015f3e: 4b07 ldr r3, [pc, #28] @ (8015f5c <vTaskSetTimeOutState+0x48>)
- 8015f40: 681a ldr r2, [r3, #0]
- 8015f42: 687b ldr r3, [r7, #4]
- 8015f44: 601a str r2, [r3, #0]
- pxTimeOut->xTimeOnEntering = xTickCount;
- 8015f46: 4b06 ldr r3, [pc, #24] @ (8015f60 <vTaskSetTimeOutState+0x4c>)
- 8015f48: 681a ldr r2, [r3, #0]
- 8015f4a: 687b ldr r3, [r7, #4]
- 8015f4c: 605a str r2, [r3, #4]
- }
- taskEXIT_CRITICAL();
- 8015f4e: f001 fb35 bl 80175bc <vPortExitCritical>
- }
- 8015f52: bf00 nop
- 8015f54: 3710 adds r7, #16
- 8015f56: 46bd mov sp, r7
- 8015f58: bd80 pop {r7, pc}
- 8015f5a: bf00 nop
- 8015f5c: 24002b80 .word 0x24002b80
- 8015f60: 24002b6c .word 0x24002b6c
- 08015f64 <vTaskInternalSetTimeOutState>:
- /*-----------------------------------------------------------*/
- void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
- {
- 8015f64: b480 push {r7}
- 8015f66: b083 sub sp, #12
- 8015f68: af00 add r7, sp, #0
- 8015f6a: 6078 str r0, [r7, #4]
- /* For internal use only as it does not use a critical section. */
- pxTimeOut->xOverflowCount = xNumOfOverflows;
- 8015f6c: 4b06 ldr r3, [pc, #24] @ (8015f88 <vTaskInternalSetTimeOutState+0x24>)
- 8015f6e: 681a ldr r2, [r3, #0]
- 8015f70: 687b ldr r3, [r7, #4]
- 8015f72: 601a str r2, [r3, #0]
- pxTimeOut->xTimeOnEntering = xTickCount;
- 8015f74: 4b05 ldr r3, [pc, #20] @ (8015f8c <vTaskInternalSetTimeOutState+0x28>)
- 8015f76: 681a ldr r2, [r3, #0]
- 8015f78: 687b ldr r3, [r7, #4]
- 8015f7a: 605a str r2, [r3, #4]
- }
- 8015f7c: bf00 nop
- 8015f7e: 370c adds r7, #12
- 8015f80: 46bd mov sp, r7
- 8015f82: f85d 7b04 ldr.w r7, [sp], #4
- 8015f86: 4770 bx lr
- 8015f88: 24002b80 .word 0x24002b80
- 8015f8c: 24002b6c .word 0x24002b6c
- 08015f90 <xTaskCheckForTimeOut>:
- /*-----------------------------------------------------------*/
- BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
- {
- 8015f90: b580 push {r7, lr}
- 8015f92: b088 sub sp, #32
- 8015f94: af00 add r7, sp, #0
- 8015f96: 6078 str r0, [r7, #4]
- 8015f98: 6039 str r1, [r7, #0]
- BaseType_t xReturn;
- configASSERT( pxTimeOut );
- 8015f9a: 687b ldr r3, [r7, #4]
- 8015f9c: 2b00 cmp r3, #0
- 8015f9e: d10b bne.n 8015fb8 <xTaskCheckForTimeOut+0x28>
- __asm volatile
- 8015fa0: f04f 0350 mov.w r3, #80 @ 0x50
- 8015fa4: f383 8811 msr BASEPRI, r3
- 8015fa8: f3bf 8f6f isb sy
- 8015fac: f3bf 8f4f dsb sy
- 8015fb0: 613b str r3, [r7, #16]
- }
- 8015fb2: bf00 nop
- 8015fb4: bf00 nop
- 8015fb6: e7fd b.n 8015fb4 <xTaskCheckForTimeOut+0x24>
- configASSERT( pxTicksToWait );
- 8015fb8: 683b ldr r3, [r7, #0]
- 8015fba: 2b00 cmp r3, #0
- 8015fbc: d10b bne.n 8015fd6 <xTaskCheckForTimeOut+0x46>
- __asm volatile
- 8015fbe: f04f 0350 mov.w r3, #80 @ 0x50
- 8015fc2: f383 8811 msr BASEPRI, r3
- 8015fc6: f3bf 8f6f isb sy
- 8015fca: f3bf 8f4f dsb sy
- 8015fce: 60fb str r3, [r7, #12]
- }
- 8015fd0: bf00 nop
- 8015fd2: bf00 nop
- 8015fd4: e7fd b.n 8015fd2 <xTaskCheckForTimeOut+0x42>
- taskENTER_CRITICAL();
- 8015fd6: f001 fabf bl 8017558 <vPortEnterCritical>
- {
- /* Minor optimisation. The tick count cannot change in this block. */
- const TickType_t xConstTickCount = xTickCount;
- 8015fda: 4b1d ldr r3, [pc, #116] @ (8016050 <xTaskCheckForTimeOut+0xc0>)
- 8015fdc: 681b ldr r3, [r3, #0]
- 8015fde: 61bb str r3, [r7, #24]
- const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
- 8015fe0: 687b ldr r3, [r7, #4]
- 8015fe2: 685b ldr r3, [r3, #4]
- 8015fe4: 69ba ldr r2, [r7, #24]
- 8015fe6: 1ad3 subs r3, r2, r3
- 8015fe8: 617b str r3, [r7, #20]
- }
- else
- #endif
- #if ( INCLUDE_vTaskSuspend == 1 )
- if( *pxTicksToWait == portMAX_DELAY )
- 8015fea: 683b ldr r3, [r7, #0]
- 8015fec: 681b ldr r3, [r3, #0]
- 8015fee: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 8015ff2: d102 bne.n 8015ffa <xTaskCheckForTimeOut+0x6a>
- {
- /* If INCLUDE_vTaskSuspend is set to 1 and the block time
- specified is the maximum block time then the task should block
- indefinitely, and therefore never time out. */
- xReturn = pdFALSE;
- 8015ff4: 2300 movs r3, #0
- 8015ff6: 61fb str r3, [r7, #28]
- 8015ff8: e023 b.n 8016042 <xTaskCheckForTimeOut+0xb2>
- }
- else
- #endif
- if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
- 8015ffa: 687b ldr r3, [r7, #4]
- 8015ffc: 681a ldr r2, [r3, #0]
- 8015ffe: 4b15 ldr r3, [pc, #84] @ (8016054 <xTaskCheckForTimeOut+0xc4>)
- 8016000: 681b ldr r3, [r3, #0]
- 8016002: 429a cmp r2, r3
- 8016004: d007 beq.n 8016016 <xTaskCheckForTimeOut+0x86>
- 8016006: 687b ldr r3, [r7, #4]
- 8016008: 685b ldr r3, [r3, #4]
- 801600a: 69ba ldr r2, [r7, #24]
- 801600c: 429a cmp r2, r3
- 801600e: d302 bcc.n 8016016 <xTaskCheckForTimeOut+0x86>
- /* The tick count is greater than the time at which
- vTaskSetTimeout() was called, but has also overflowed since
- vTaskSetTimeOut() was called. It must have wrapped all the way
- around and gone past again. This passed since vTaskSetTimeout()
- was called. */
- xReturn = pdTRUE;
- 8016010: 2301 movs r3, #1
- 8016012: 61fb str r3, [r7, #28]
- 8016014: e015 b.n 8016042 <xTaskCheckForTimeOut+0xb2>
- }
- else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
- 8016016: 683b ldr r3, [r7, #0]
- 8016018: 681b ldr r3, [r3, #0]
- 801601a: 697a ldr r2, [r7, #20]
- 801601c: 429a cmp r2, r3
- 801601e: d20b bcs.n 8016038 <xTaskCheckForTimeOut+0xa8>
- {
- /* Not a genuine timeout. Adjust parameters for time remaining. */
- *pxTicksToWait -= xElapsedTime;
- 8016020: 683b ldr r3, [r7, #0]
- 8016022: 681a ldr r2, [r3, #0]
- 8016024: 697b ldr r3, [r7, #20]
- 8016026: 1ad2 subs r2, r2, r3
- 8016028: 683b ldr r3, [r7, #0]
- 801602a: 601a str r2, [r3, #0]
- vTaskInternalSetTimeOutState( pxTimeOut );
- 801602c: 6878 ldr r0, [r7, #4]
- 801602e: f7ff ff99 bl 8015f64 <vTaskInternalSetTimeOutState>
- xReturn = pdFALSE;
- 8016032: 2300 movs r3, #0
- 8016034: 61fb str r3, [r7, #28]
- 8016036: e004 b.n 8016042 <xTaskCheckForTimeOut+0xb2>
- }
- else
- {
- *pxTicksToWait = 0;
- 8016038: 683b ldr r3, [r7, #0]
- 801603a: 2200 movs r2, #0
- 801603c: 601a str r2, [r3, #0]
- xReturn = pdTRUE;
- 801603e: 2301 movs r3, #1
- 8016040: 61fb str r3, [r7, #28]
- }
- }
- taskEXIT_CRITICAL();
- 8016042: f001 fabb bl 80175bc <vPortExitCritical>
- return xReturn;
- 8016046: 69fb ldr r3, [r7, #28]
- }
- 8016048: 4618 mov r0, r3
- 801604a: 3720 adds r7, #32
- 801604c: 46bd mov sp, r7
- 801604e: bd80 pop {r7, pc}
- 8016050: 24002b6c .word 0x24002b6c
- 8016054: 24002b80 .word 0x24002b80
- 08016058 <vTaskMissedYield>:
- /*-----------------------------------------------------------*/
- void vTaskMissedYield( void )
- {
- 8016058: b480 push {r7}
- 801605a: af00 add r7, sp, #0
- xYieldPending = pdTRUE;
- 801605c: 4b03 ldr r3, [pc, #12] @ (801606c <vTaskMissedYield+0x14>)
- 801605e: 2201 movs r2, #1
- 8016060: 601a str r2, [r3, #0]
- }
- 8016062: bf00 nop
- 8016064: 46bd mov sp, r7
- 8016066: f85d 7b04 ldr.w r7, [sp], #4
- 801606a: 4770 bx lr
- 801606c: 24002b7c .word 0x24002b7c
- 08016070 <prvIdleTask>:
- *
- * void prvIdleTask( void *pvParameters );
- *
- */
- static portTASK_FUNCTION( prvIdleTask, pvParameters )
- {
- 8016070: b580 push {r7, lr}
- 8016072: b082 sub sp, #8
- 8016074: af00 add r7, sp, #0
- 8016076: 6078 str r0, [r7, #4]
- for( ;; )
- {
- /* See if any tasks have deleted themselves - if so then the idle task
- is responsible for freeing the deleted task's TCB and stack. */
- prvCheckTasksWaitingTermination();
- 8016078: f000 f852 bl 8016120 <prvCheckTasksWaitingTermination>
- A critical region is not required here as we are just reading from
- the list, and an occasional incorrect value will not matter. If
- the ready list at the idle priority contains more than one task
- then a task other than the idle task is ready to execute. */
- if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
- 801607c: 4b06 ldr r3, [pc, #24] @ (8016098 <prvIdleTask+0x28>)
- 801607e: 681b ldr r3, [r3, #0]
- 8016080: 2b01 cmp r3, #1
- 8016082: d9f9 bls.n 8016078 <prvIdleTask+0x8>
- {
- taskYIELD();
- 8016084: 4b05 ldr r3, [pc, #20] @ (801609c <prvIdleTask+0x2c>)
- 8016086: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 801608a: 601a str r2, [r3, #0]
- 801608c: f3bf 8f4f dsb sy
- 8016090: f3bf 8f6f isb sy
- prvCheckTasksWaitingTermination();
- 8016094: e7f0 b.n 8016078 <prvIdleTask+0x8>
- 8016096: bf00 nop
- 8016098: 24002698 .word 0x24002698
- 801609c: e000ed04 .word 0xe000ed04
- 080160a0 <prvInitialiseTaskLists>:
- #endif /* portUSING_MPU_WRAPPERS */
- /*-----------------------------------------------------------*/
- static void prvInitialiseTaskLists( void )
- {
- 80160a0: b580 push {r7, lr}
- 80160a2: b082 sub sp, #8
- 80160a4: af00 add r7, sp, #0
- UBaseType_t uxPriority;
- for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
- 80160a6: 2300 movs r3, #0
- 80160a8: 607b str r3, [r7, #4]
- 80160aa: e00c b.n 80160c6 <prvInitialiseTaskLists+0x26>
- {
- vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
- 80160ac: 687a ldr r2, [r7, #4]
- 80160ae: 4613 mov r3, r2
- 80160b0: 009b lsls r3, r3, #2
- 80160b2: 4413 add r3, r2
- 80160b4: 009b lsls r3, r3, #2
- 80160b6: 4a12 ldr r2, [pc, #72] @ (8016100 <prvInitialiseTaskLists+0x60>)
- 80160b8: 4413 add r3, r2
- 80160ba: 4618 mov r0, r3
- 80160bc: f7fe f81c bl 80140f8 <vListInitialise>
- for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
- 80160c0: 687b ldr r3, [r7, #4]
- 80160c2: 3301 adds r3, #1
- 80160c4: 607b str r3, [r7, #4]
- 80160c6: 687b ldr r3, [r7, #4]
- 80160c8: 2b37 cmp r3, #55 @ 0x37
- 80160ca: d9ef bls.n 80160ac <prvInitialiseTaskLists+0xc>
- }
- vListInitialise( &xDelayedTaskList1 );
- 80160cc: 480d ldr r0, [pc, #52] @ (8016104 <prvInitialiseTaskLists+0x64>)
- 80160ce: f7fe f813 bl 80140f8 <vListInitialise>
- vListInitialise( &xDelayedTaskList2 );
- 80160d2: 480d ldr r0, [pc, #52] @ (8016108 <prvInitialiseTaskLists+0x68>)
- 80160d4: f7fe f810 bl 80140f8 <vListInitialise>
- vListInitialise( &xPendingReadyList );
- 80160d8: 480c ldr r0, [pc, #48] @ (801610c <prvInitialiseTaskLists+0x6c>)
- 80160da: f7fe f80d bl 80140f8 <vListInitialise>
- #if ( INCLUDE_vTaskDelete == 1 )
- {
- vListInitialise( &xTasksWaitingTermination );
- 80160de: 480c ldr r0, [pc, #48] @ (8016110 <prvInitialiseTaskLists+0x70>)
- 80160e0: f7fe f80a bl 80140f8 <vListInitialise>
- }
- #endif /* INCLUDE_vTaskDelete */
- #if ( INCLUDE_vTaskSuspend == 1 )
- {
- vListInitialise( &xSuspendedTaskList );
- 80160e4: 480b ldr r0, [pc, #44] @ (8016114 <prvInitialiseTaskLists+0x74>)
- 80160e6: f7fe f807 bl 80140f8 <vListInitialise>
- }
- #endif /* INCLUDE_vTaskSuspend */
- /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
- using list2. */
- pxDelayedTaskList = &xDelayedTaskList1;
- 80160ea: 4b0b ldr r3, [pc, #44] @ (8016118 <prvInitialiseTaskLists+0x78>)
- 80160ec: 4a05 ldr r2, [pc, #20] @ (8016104 <prvInitialiseTaskLists+0x64>)
- 80160ee: 601a str r2, [r3, #0]
- pxOverflowDelayedTaskList = &xDelayedTaskList2;
- 80160f0: 4b0a ldr r3, [pc, #40] @ (801611c <prvInitialiseTaskLists+0x7c>)
- 80160f2: 4a05 ldr r2, [pc, #20] @ (8016108 <prvInitialiseTaskLists+0x68>)
- 80160f4: 601a str r2, [r3, #0]
- }
- 80160f6: bf00 nop
- 80160f8: 3708 adds r7, #8
- 80160fa: 46bd mov sp, r7
- 80160fc: bd80 pop {r7, pc}
- 80160fe: bf00 nop
- 8016100: 24002698 .word 0x24002698
- 8016104: 24002af8 .word 0x24002af8
- 8016108: 24002b0c .word 0x24002b0c
- 801610c: 24002b28 .word 0x24002b28
- 8016110: 24002b3c .word 0x24002b3c
- 8016114: 24002b54 .word 0x24002b54
- 8016118: 24002b20 .word 0x24002b20
- 801611c: 24002b24 .word 0x24002b24
- 08016120 <prvCheckTasksWaitingTermination>:
- /*-----------------------------------------------------------*/
- static void prvCheckTasksWaitingTermination( void )
- {
- 8016120: b580 push {r7, lr}
- 8016122: b082 sub sp, #8
- 8016124: af00 add r7, sp, #0
- {
- TCB_t *pxTCB;
- /* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL()
- being called too often in the idle task. */
- while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
- 8016126: e019 b.n 801615c <prvCheckTasksWaitingTermination+0x3c>
- {
- taskENTER_CRITICAL();
- 8016128: f001 fa16 bl 8017558 <vPortEnterCritical>
- {
- pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
- 801612c: 4b10 ldr r3, [pc, #64] @ (8016170 <prvCheckTasksWaitingTermination+0x50>)
- 801612e: 68db ldr r3, [r3, #12]
- 8016130: 68db ldr r3, [r3, #12]
- 8016132: 607b str r3, [r7, #4]
- ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
- 8016134: 687b ldr r3, [r7, #4]
- 8016136: 3304 adds r3, #4
- 8016138: 4618 mov r0, r3
- 801613a: f7fe f867 bl 801420c <uxListRemove>
- --uxCurrentNumberOfTasks;
- 801613e: 4b0d ldr r3, [pc, #52] @ (8016174 <prvCheckTasksWaitingTermination+0x54>)
- 8016140: 681b ldr r3, [r3, #0]
- 8016142: 3b01 subs r3, #1
- 8016144: 4a0b ldr r2, [pc, #44] @ (8016174 <prvCheckTasksWaitingTermination+0x54>)
- 8016146: 6013 str r3, [r2, #0]
- --uxDeletedTasksWaitingCleanUp;
- 8016148: 4b0b ldr r3, [pc, #44] @ (8016178 <prvCheckTasksWaitingTermination+0x58>)
- 801614a: 681b ldr r3, [r3, #0]
- 801614c: 3b01 subs r3, #1
- 801614e: 4a0a ldr r2, [pc, #40] @ (8016178 <prvCheckTasksWaitingTermination+0x58>)
- 8016150: 6013 str r3, [r2, #0]
- }
- taskEXIT_CRITICAL();
- 8016152: f001 fa33 bl 80175bc <vPortExitCritical>
- prvDeleteTCB( pxTCB );
- 8016156: 6878 ldr r0, [r7, #4]
- 8016158: f000 f810 bl 801617c <prvDeleteTCB>
- while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
- 801615c: 4b06 ldr r3, [pc, #24] @ (8016178 <prvCheckTasksWaitingTermination+0x58>)
- 801615e: 681b ldr r3, [r3, #0]
- 8016160: 2b00 cmp r3, #0
- 8016162: d1e1 bne.n 8016128 <prvCheckTasksWaitingTermination+0x8>
- }
- }
- #endif /* INCLUDE_vTaskDelete */
- }
- 8016164: bf00 nop
- 8016166: bf00 nop
- 8016168: 3708 adds r7, #8
- 801616a: 46bd mov sp, r7
- 801616c: bd80 pop {r7, pc}
- 801616e: bf00 nop
- 8016170: 24002b3c .word 0x24002b3c
- 8016174: 24002b68 .word 0x24002b68
- 8016178: 24002b50 .word 0x24002b50
- 0801617c <prvDeleteTCB>:
- /*-----------------------------------------------------------*/
- #if ( INCLUDE_vTaskDelete == 1 )
- static void prvDeleteTCB( TCB_t *pxTCB )
- {
- 801617c: b580 push {r7, lr}
- 801617e: b084 sub sp, #16
- 8016180: af00 add r7, sp, #0
- 8016182: 6078 str r0, [r7, #4]
- to the task to free any memory allocated at the application level.
- See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
- for additional information. */
- #if ( configUSE_NEWLIB_REENTRANT == 1 )
- {
- _reclaim_reent( &( pxTCB->xNewLib_reent ) );
- 8016184: 687b ldr r3, [r7, #4]
- 8016186: 3354 adds r3, #84 @ 0x54
- 8016188: 4618 mov r0, r3
- 801618a: f001 fe25 bl 8017dd8 <_reclaim_reent>
- #elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
- {
- /* The task could have been allocated statically or dynamically, so
- check what was statically allocated before trying to free the
- memory. */
- if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
- 801618e: 687b ldr r3, [r7, #4]
- 8016190: f893 30a5 ldrb.w r3, [r3, #165] @ 0xa5
- 8016194: 2b00 cmp r3, #0
- 8016196: d108 bne.n 80161aa <prvDeleteTCB+0x2e>
- {
- /* Both the stack and TCB were allocated dynamically, so both
- must be freed. */
- vPortFree( pxTCB->pxStack );
- 8016198: 687b ldr r3, [r7, #4]
- 801619a: 6b1b ldr r3, [r3, #48] @ 0x30
- 801619c: 4618 mov r0, r3
- 801619e: f001 fbcb bl 8017938 <vPortFree>
- vPortFree( pxTCB );
- 80161a2: 6878 ldr r0, [r7, #4]
- 80161a4: f001 fbc8 bl 8017938 <vPortFree>
- configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB );
- mtCOVERAGE_TEST_MARKER();
- }
- }
- #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
- }
- 80161a8: e019 b.n 80161de <prvDeleteTCB+0x62>
- else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
- 80161aa: 687b ldr r3, [r7, #4]
- 80161ac: f893 30a5 ldrb.w r3, [r3, #165] @ 0xa5
- 80161b0: 2b01 cmp r3, #1
- 80161b2: d103 bne.n 80161bc <prvDeleteTCB+0x40>
- vPortFree( pxTCB );
- 80161b4: 6878 ldr r0, [r7, #4]
- 80161b6: f001 fbbf bl 8017938 <vPortFree>
- }
- 80161ba: e010 b.n 80161de <prvDeleteTCB+0x62>
- configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB );
- 80161bc: 687b ldr r3, [r7, #4]
- 80161be: f893 30a5 ldrb.w r3, [r3, #165] @ 0xa5
- 80161c2: 2b02 cmp r3, #2
- 80161c4: d00b beq.n 80161de <prvDeleteTCB+0x62>
- __asm volatile
- 80161c6: f04f 0350 mov.w r3, #80 @ 0x50
- 80161ca: f383 8811 msr BASEPRI, r3
- 80161ce: f3bf 8f6f isb sy
- 80161d2: f3bf 8f4f dsb sy
- 80161d6: 60fb str r3, [r7, #12]
- }
- 80161d8: bf00 nop
- 80161da: bf00 nop
- 80161dc: e7fd b.n 80161da <prvDeleteTCB+0x5e>
- }
- 80161de: bf00 nop
- 80161e0: 3710 adds r7, #16
- 80161e2: 46bd mov sp, r7
- 80161e4: bd80 pop {r7, pc}
- ...
- 080161e8 <prvResetNextTaskUnblockTime>:
- #endif /* INCLUDE_vTaskDelete */
- /*-----------------------------------------------------------*/
- static void prvResetNextTaskUnblockTime( void )
- {
- 80161e8: b480 push {r7}
- 80161ea: b083 sub sp, #12
- 80161ec: af00 add r7, sp, #0
- TCB_t *pxTCB;
- if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
- 80161ee: 4b0c ldr r3, [pc, #48] @ (8016220 <prvResetNextTaskUnblockTime+0x38>)
- 80161f0: 681b ldr r3, [r3, #0]
- 80161f2: 681b ldr r3, [r3, #0]
- 80161f4: 2b00 cmp r3, #0
- 80161f6: d104 bne.n 8016202 <prvResetNextTaskUnblockTime+0x1a>
- {
- /* The new current delayed list is empty. Set xNextTaskUnblockTime to
- the maximum possible value so it is extremely unlikely that the
- if( xTickCount >= xNextTaskUnblockTime ) test will pass until
- there is an item in the delayed list. */
- xNextTaskUnblockTime = portMAX_DELAY;
- 80161f8: 4b0a ldr r3, [pc, #40] @ (8016224 <prvResetNextTaskUnblockTime+0x3c>)
- 80161fa: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
- 80161fe: 601a str r2, [r3, #0]
- which the task at the head of the delayed list should be removed
- from the Blocked state. */
- ( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
- xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
- }
- }
- 8016200: e008 b.n 8016214 <prvResetNextTaskUnblockTime+0x2c>
- ( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
- 8016202: 4b07 ldr r3, [pc, #28] @ (8016220 <prvResetNextTaskUnblockTime+0x38>)
- 8016204: 681b ldr r3, [r3, #0]
- 8016206: 68db ldr r3, [r3, #12]
- 8016208: 68db ldr r3, [r3, #12]
- 801620a: 607b str r3, [r7, #4]
- xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
- 801620c: 687b ldr r3, [r7, #4]
- 801620e: 685b ldr r3, [r3, #4]
- 8016210: 4a04 ldr r2, [pc, #16] @ (8016224 <prvResetNextTaskUnblockTime+0x3c>)
- 8016212: 6013 str r3, [r2, #0]
- }
- 8016214: bf00 nop
- 8016216: 370c adds r7, #12
- 8016218: 46bd mov sp, r7
- 801621a: f85d 7b04 ldr.w r7, [sp], #4
- 801621e: 4770 bx lr
- 8016220: 24002b20 .word 0x24002b20
- 8016224: 24002b88 .word 0x24002b88
- 08016228 <xTaskGetCurrentTaskHandle>:
- /*-----------------------------------------------------------*/
- #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) )
- TaskHandle_t xTaskGetCurrentTaskHandle( void )
- {
- 8016228: b480 push {r7}
- 801622a: b083 sub sp, #12
- 801622c: af00 add r7, sp, #0
- TaskHandle_t xReturn;
- /* A critical section is not required as this is not called from
- an interrupt and the current TCB will always be the same for any
- individual execution thread. */
- xReturn = pxCurrentTCB;
- 801622e: 4b05 ldr r3, [pc, #20] @ (8016244 <xTaskGetCurrentTaskHandle+0x1c>)
- 8016230: 681b ldr r3, [r3, #0]
- 8016232: 607b str r3, [r7, #4]
- return xReturn;
- 8016234: 687b ldr r3, [r7, #4]
- }
- 8016236: 4618 mov r0, r3
- 8016238: 370c adds r7, #12
- 801623a: 46bd mov sp, r7
- 801623c: f85d 7b04 ldr.w r7, [sp], #4
- 8016240: 4770 bx lr
- 8016242: bf00 nop
- 8016244: 24002694 .word 0x24002694
- 08016248 <xTaskGetSchedulerState>:
- /*-----------------------------------------------------------*/
- #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
- BaseType_t xTaskGetSchedulerState( void )
- {
- 8016248: b480 push {r7}
- 801624a: b083 sub sp, #12
- 801624c: af00 add r7, sp, #0
- BaseType_t xReturn;
- if( xSchedulerRunning == pdFALSE )
- 801624e: 4b0b ldr r3, [pc, #44] @ (801627c <xTaskGetSchedulerState+0x34>)
- 8016250: 681b ldr r3, [r3, #0]
- 8016252: 2b00 cmp r3, #0
- 8016254: d102 bne.n 801625c <xTaskGetSchedulerState+0x14>
- {
- xReturn = taskSCHEDULER_NOT_STARTED;
- 8016256: 2301 movs r3, #1
- 8016258: 607b str r3, [r7, #4]
- 801625a: e008 b.n 801626e <xTaskGetSchedulerState+0x26>
- }
- else
- {
- if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
- 801625c: 4b08 ldr r3, [pc, #32] @ (8016280 <xTaskGetSchedulerState+0x38>)
- 801625e: 681b ldr r3, [r3, #0]
- 8016260: 2b00 cmp r3, #0
- 8016262: d102 bne.n 801626a <xTaskGetSchedulerState+0x22>
- {
- xReturn = taskSCHEDULER_RUNNING;
- 8016264: 2302 movs r3, #2
- 8016266: 607b str r3, [r7, #4]
- 8016268: e001 b.n 801626e <xTaskGetSchedulerState+0x26>
- }
- else
- {
- xReturn = taskSCHEDULER_SUSPENDED;
- 801626a: 2300 movs r3, #0
- 801626c: 607b str r3, [r7, #4]
- }
- }
- return xReturn;
- 801626e: 687b ldr r3, [r7, #4]
- }
- 8016270: 4618 mov r0, r3
- 8016272: 370c adds r7, #12
- 8016274: 46bd mov sp, r7
- 8016276: f85d 7b04 ldr.w r7, [sp], #4
- 801627a: 4770 bx lr
- 801627c: 24002b74 .word 0x24002b74
- 8016280: 24002b90 .word 0x24002b90
- 08016284 <xTaskPriorityInherit>:
- /*-----------------------------------------------------------*/
- #if ( configUSE_MUTEXES == 1 )
- BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
- {
- 8016284: b580 push {r7, lr}
- 8016286: b084 sub sp, #16
- 8016288: af00 add r7, sp, #0
- 801628a: 6078 str r0, [r7, #4]
- TCB_t * const pxMutexHolderTCB = pxMutexHolder;
- 801628c: 687b ldr r3, [r7, #4]
- 801628e: 60bb str r3, [r7, #8]
- BaseType_t xReturn = pdFALSE;
- 8016290: 2300 movs r3, #0
- 8016292: 60fb str r3, [r7, #12]
- /* If the mutex was given back by an interrupt while the queue was
- locked then the mutex holder might now be NULL. _RB_ Is this still
- needed as interrupts can no longer use mutexes? */
- if( pxMutexHolder != NULL )
- 8016294: 687b ldr r3, [r7, #4]
- 8016296: 2b00 cmp r3, #0
- 8016298: d051 beq.n 801633e <xTaskPriorityInherit+0xba>
- {
- /* If the holder of the mutex has a priority below the priority of
- the task attempting to obtain the mutex then it will temporarily
- inherit the priority of the task attempting to obtain the mutex. */
- if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority )
- 801629a: 68bb ldr r3, [r7, #8]
- 801629c: 6ada ldr r2, [r3, #44] @ 0x2c
- 801629e: 4b2a ldr r3, [pc, #168] @ (8016348 <xTaskPriorityInherit+0xc4>)
- 80162a0: 681b ldr r3, [r3, #0]
- 80162a2: 6adb ldr r3, [r3, #44] @ 0x2c
- 80162a4: 429a cmp r2, r3
- 80162a6: d241 bcs.n 801632c <xTaskPriorityInherit+0xa8>
- {
- /* Adjust the mutex holder state to account for its new
- priority. Only reset the event list item value if the value is
- not being used for anything else. */
- if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
- 80162a8: 68bb ldr r3, [r7, #8]
- 80162aa: 699b ldr r3, [r3, #24]
- 80162ac: 2b00 cmp r3, #0
- 80162ae: db06 blt.n 80162be <xTaskPriorityInherit+0x3a>
- {
- listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
- 80162b0: 4b25 ldr r3, [pc, #148] @ (8016348 <xTaskPriorityInherit+0xc4>)
- 80162b2: 681b ldr r3, [r3, #0]
- 80162b4: 6adb ldr r3, [r3, #44] @ 0x2c
- 80162b6: f1c3 0238 rsb r2, r3, #56 @ 0x38
- 80162ba: 68bb ldr r3, [r7, #8]
- 80162bc: 619a str r2, [r3, #24]
- mtCOVERAGE_TEST_MARKER();
- }
- /* If the task being modified is in the ready state it will need
- to be moved into a new list. */
- if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE )
- 80162be: 68bb ldr r3, [r7, #8]
- 80162c0: 6959 ldr r1, [r3, #20]
- 80162c2: 68bb ldr r3, [r7, #8]
- 80162c4: 6ada ldr r2, [r3, #44] @ 0x2c
- 80162c6: 4613 mov r3, r2
- 80162c8: 009b lsls r3, r3, #2
- 80162ca: 4413 add r3, r2
- 80162cc: 009b lsls r3, r3, #2
- 80162ce: 4a1f ldr r2, [pc, #124] @ (801634c <xTaskPriorityInherit+0xc8>)
- 80162d0: 4413 add r3, r2
- 80162d2: 4299 cmp r1, r3
- 80162d4: d122 bne.n 801631c <xTaskPriorityInherit+0x98>
- {
- if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
- 80162d6: 68bb ldr r3, [r7, #8]
- 80162d8: 3304 adds r3, #4
- 80162da: 4618 mov r0, r3
- 80162dc: f7fd ff96 bl 801420c <uxListRemove>
- {
- mtCOVERAGE_TEST_MARKER();
- }
- /* Inherit the priority before being moved into the new list. */
- pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
- 80162e0: 4b19 ldr r3, [pc, #100] @ (8016348 <xTaskPriorityInherit+0xc4>)
- 80162e2: 681b ldr r3, [r3, #0]
- 80162e4: 6ada ldr r2, [r3, #44] @ 0x2c
- 80162e6: 68bb ldr r3, [r7, #8]
- 80162e8: 62da str r2, [r3, #44] @ 0x2c
- prvAddTaskToReadyList( pxMutexHolderTCB );
- 80162ea: 68bb ldr r3, [r7, #8]
- 80162ec: 6ada ldr r2, [r3, #44] @ 0x2c
- 80162ee: 4b18 ldr r3, [pc, #96] @ (8016350 <xTaskPriorityInherit+0xcc>)
- 80162f0: 681b ldr r3, [r3, #0]
- 80162f2: 429a cmp r2, r3
- 80162f4: d903 bls.n 80162fe <xTaskPriorityInherit+0x7a>
- 80162f6: 68bb ldr r3, [r7, #8]
- 80162f8: 6adb ldr r3, [r3, #44] @ 0x2c
- 80162fa: 4a15 ldr r2, [pc, #84] @ (8016350 <xTaskPriorityInherit+0xcc>)
- 80162fc: 6013 str r3, [r2, #0]
- 80162fe: 68bb ldr r3, [r7, #8]
- 8016300: 6ada ldr r2, [r3, #44] @ 0x2c
- 8016302: 4613 mov r3, r2
- 8016304: 009b lsls r3, r3, #2
- 8016306: 4413 add r3, r2
- 8016308: 009b lsls r3, r3, #2
- 801630a: 4a10 ldr r2, [pc, #64] @ (801634c <xTaskPriorityInherit+0xc8>)
- 801630c: 441a add r2, r3
- 801630e: 68bb ldr r3, [r7, #8]
- 8016310: 3304 adds r3, #4
- 8016312: 4619 mov r1, r3
- 8016314: 4610 mov r0, r2
- 8016316: f7fd ff1c bl 8014152 <vListInsertEnd>
- 801631a: e004 b.n 8016326 <xTaskPriorityInherit+0xa2>
- }
- else
- {
- /* Just inherit the priority. */
- pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
- 801631c: 4b0a ldr r3, [pc, #40] @ (8016348 <xTaskPriorityInherit+0xc4>)
- 801631e: 681b ldr r3, [r3, #0]
- 8016320: 6ada ldr r2, [r3, #44] @ 0x2c
- 8016322: 68bb ldr r3, [r7, #8]
- 8016324: 62da str r2, [r3, #44] @ 0x2c
- }
- traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority );
- /* Inheritance occurred. */
- xReturn = pdTRUE;
- 8016326: 2301 movs r3, #1
- 8016328: 60fb str r3, [r7, #12]
- 801632a: e008 b.n 801633e <xTaskPriorityInherit+0xba>
- }
- else
- {
- if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority )
- 801632c: 68bb ldr r3, [r7, #8]
- 801632e: 6cda ldr r2, [r3, #76] @ 0x4c
- 8016330: 4b05 ldr r3, [pc, #20] @ (8016348 <xTaskPriorityInherit+0xc4>)
- 8016332: 681b ldr r3, [r3, #0]
- 8016334: 6adb ldr r3, [r3, #44] @ 0x2c
- 8016336: 429a cmp r2, r3
- 8016338: d201 bcs.n 801633e <xTaskPriorityInherit+0xba>
- current priority of the mutex holder is not lower than the
- priority of the task attempting to take the mutex.
- Therefore the mutex holder must have already inherited a
- priority, but inheritance would have occurred if that had
- not been the case. */
- xReturn = pdTRUE;
- 801633a: 2301 movs r3, #1
- 801633c: 60fb str r3, [r7, #12]
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- return xReturn;
- 801633e: 68fb ldr r3, [r7, #12]
- }
- 8016340: 4618 mov r0, r3
- 8016342: 3710 adds r7, #16
- 8016344: 46bd mov sp, r7
- 8016346: bd80 pop {r7, pc}
- 8016348: 24002694 .word 0x24002694
- 801634c: 24002698 .word 0x24002698
- 8016350: 24002b70 .word 0x24002b70
- 08016354 <xTaskPriorityDisinherit>:
- /*-----------------------------------------------------------*/
- #if ( configUSE_MUTEXES == 1 )
- BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
- {
- 8016354: b580 push {r7, lr}
- 8016356: b086 sub sp, #24
- 8016358: af00 add r7, sp, #0
- 801635a: 6078 str r0, [r7, #4]
- TCB_t * const pxTCB = pxMutexHolder;
- 801635c: 687b ldr r3, [r7, #4]
- 801635e: 613b str r3, [r7, #16]
- BaseType_t xReturn = pdFALSE;
- 8016360: 2300 movs r3, #0
- 8016362: 617b str r3, [r7, #20]
- if( pxMutexHolder != NULL )
- 8016364: 687b ldr r3, [r7, #4]
- 8016366: 2b00 cmp r3, #0
- 8016368: d058 beq.n 801641c <xTaskPriorityDisinherit+0xc8>
- {
- /* A task can only have an inherited priority if it holds the mutex.
- If the mutex is held by a task then it cannot be given from an
- interrupt, and if a mutex is given by the holding task then it must
- be the running state task. */
- configASSERT( pxTCB == pxCurrentTCB );
- 801636a: 4b2f ldr r3, [pc, #188] @ (8016428 <xTaskPriorityDisinherit+0xd4>)
- 801636c: 681b ldr r3, [r3, #0]
- 801636e: 693a ldr r2, [r7, #16]
- 8016370: 429a cmp r2, r3
- 8016372: d00b beq.n 801638c <xTaskPriorityDisinherit+0x38>
- __asm volatile
- 8016374: f04f 0350 mov.w r3, #80 @ 0x50
- 8016378: f383 8811 msr BASEPRI, r3
- 801637c: f3bf 8f6f isb sy
- 8016380: f3bf 8f4f dsb sy
- 8016384: 60fb str r3, [r7, #12]
- }
- 8016386: bf00 nop
- 8016388: bf00 nop
- 801638a: e7fd b.n 8016388 <xTaskPriorityDisinherit+0x34>
- configASSERT( pxTCB->uxMutexesHeld );
- 801638c: 693b ldr r3, [r7, #16]
- 801638e: 6d1b ldr r3, [r3, #80] @ 0x50
- 8016390: 2b00 cmp r3, #0
- 8016392: d10b bne.n 80163ac <xTaskPriorityDisinherit+0x58>
- __asm volatile
- 8016394: f04f 0350 mov.w r3, #80 @ 0x50
- 8016398: f383 8811 msr BASEPRI, r3
- 801639c: f3bf 8f6f isb sy
- 80163a0: f3bf 8f4f dsb sy
- 80163a4: 60bb str r3, [r7, #8]
- }
- 80163a6: bf00 nop
- 80163a8: bf00 nop
- 80163aa: e7fd b.n 80163a8 <xTaskPriorityDisinherit+0x54>
- ( pxTCB->uxMutexesHeld )--;
- 80163ac: 693b ldr r3, [r7, #16]
- 80163ae: 6d1b ldr r3, [r3, #80] @ 0x50
- 80163b0: 1e5a subs r2, r3, #1
- 80163b2: 693b ldr r3, [r7, #16]
- 80163b4: 651a str r2, [r3, #80] @ 0x50
- /* Has the holder of the mutex inherited the priority of another
- task? */
- if( pxTCB->uxPriority != pxTCB->uxBasePriority )
- 80163b6: 693b ldr r3, [r7, #16]
- 80163b8: 6ada ldr r2, [r3, #44] @ 0x2c
- 80163ba: 693b ldr r3, [r7, #16]
- 80163bc: 6cdb ldr r3, [r3, #76] @ 0x4c
- 80163be: 429a cmp r2, r3
- 80163c0: d02c beq.n 801641c <xTaskPriorityDisinherit+0xc8>
- {
- /* Only disinherit if no other mutexes are held. */
- if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
- 80163c2: 693b ldr r3, [r7, #16]
- 80163c4: 6d1b ldr r3, [r3, #80] @ 0x50
- 80163c6: 2b00 cmp r3, #0
- 80163c8: d128 bne.n 801641c <xTaskPriorityDisinherit+0xc8>
- /* A task can only have an inherited priority if it holds
- the mutex. If the mutex is held by a task then it cannot be
- given from an interrupt, and if a mutex is given by the
- holding task then it must be the running state task. Remove
- the holding task from the ready/delayed list. */
- if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
- 80163ca: 693b ldr r3, [r7, #16]
- 80163cc: 3304 adds r3, #4
- 80163ce: 4618 mov r0, r3
- 80163d0: f7fd ff1c bl 801420c <uxListRemove>
- }
- /* Disinherit the priority before adding the task into the
- new ready list. */
- traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
- pxTCB->uxPriority = pxTCB->uxBasePriority;
- 80163d4: 693b ldr r3, [r7, #16]
- 80163d6: 6cda ldr r2, [r3, #76] @ 0x4c
- 80163d8: 693b ldr r3, [r7, #16]
- 80163da: 62da str r2, [r3, #44] @ 0x2c
- /* Reset the event list item value. It cannot be in use for
- any other purpose if this task is running, and it must be
- running to give back the mutex. */
- listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
- 80163dc: 693b ldr r3, [r7, #16]
- 80163de: 6adb ldr r3, [r3, #44] @ 0x2c
- 80163e0: f1c3 0238 rsb r2, r3, #56 @ 0x38
- 80163e4: 693b ldr r3, [r7, #16]
- 80163e6: 619a str r2, [r3, #24]
- prvAddTaskToReadyList( pxTCB );
- 80163e8: 693b ldr r3, [r7, #16]
- 80163ea: 6ada ldr r2, [r3, #44] @ 0x2c
- 80163ec: 4b0f ldr r3, [pc, #60] @ (801642c <xTaskPriorityDisinherit+0xd8>)
- 80163ee: 681b ldr r3, [r3, #0]
- 80163f0: 429a cmp r2, r3
- 80163f2: d903 bls.n 80163fc <xTaskPriorityDisinherit+0xa8>
- 80163f4: 693b ldr r3, [r7, #16]
- 80163f6: 6adb ldr r3, [r3, #44] @ 0x2c
- 80163f8: 4a0c ldr r2, [pc, #48] @ (801642c <xTaskPriorityDisinherit+0xd8>)
- 80163fa: 6013 str r3, [r2, #0]
- 80163fc: 693b ldr r3, [r7, #16]
- 80163fe: 6ada ldr r2, [r3, #44] @ 0x2c
- 8016400: 4613 mov r3, r2
- 8016402: 009b lsls r3, r3, #2
- 8016404: 4413 add r3, r2
- 8016406: 009b lsls r3, r3, #2
- 8016408: 4a09 ldr r2, [pc, #36] @ (8016430 <xTaskPriorityDisinherit+0xdc>)
- 801640a: 441a add r2, r3
- 801640c: 693b ldr r3, [r7, #16]
- 801640e: 3304 adds r3, #4
- 8016410: 4619 mov r1, r3
- 8016412: 4610 mov r0, r2
- 8016414: f7fd fe9d bl 8014152 <vListInsertEnd>
- in an order different to that in which they were taken.
- If a context switch did not occur when the first mutex was
- returned, even if a task was waiting on it, then a context
- switch should occur when the last mutex is returned whether
- a task is waiting on it or not. */
- xReturn = pdTRUE;
- 8016418: 2301 movs r3, #1
- 801641a: 617b str r3, [r7, #20]
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- return xReturn;
- 801641c: 697b ldr r3, [r7, #20]
- }
- 801641e: 4618 mov r0, r3
- 8016420: 3718 adds r7, #24
- 8016422: 46bd mov sp, r7
- 8016424: bd80 pop {r7, pc}
- 8016426: bf00 nop
- 8016428: 24002694 .word 0x24002694
- 801642c: 24002b70 .word 0x24002b70
- 8016430: 24002698 .word 0x24002698
- 08016434 <vTaskPriorityDisinheritAfterTimeout>:
- /*-----------------------------------------------------------*/
- #if ( configUSE_MUTEXES == 1 )
- void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask )
- {
- 8016434: b580 push {r7, lr}
- 8016436: b088 sub sp, #32
- 8016438: af00 add r7, sp, #0
- 801643a: 6078 str r0, [r7, #4]
- 801643c: 6039 str r1, [r7, #0]
- TCB_t * const pxTCB = pxMutexHolder;
- 801643e: 687b ldr r3, [r7, #4]
- 8016440: 61bb str r3, [r7, #24]
- UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse;
- const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1;
- 8016442: 2301 movs r3, #1
- 8016444: 617b str r3, [r7, #20]
- if( pxMutexHolder != NULL )
- 8016446: 687b ldr r3, [r7, #4]
- 8016448: 2b00 cmp r3, #0
- 801644a: d06c beq.n 8016526 <vTaskPriorityDisinheritAfterTimeout+0xf2>
- {
- /* If pxMutexHolder is not NULL then the holder must hold at least
- one mutex. */
- configASSERT( pxTCB->uxMutexesHeld );
- 801644c: 69bb ldr r3, [r7, #24]
- 801644e: 6d1b ldr r3, [r3, #80] @ 0x50
- 8016450: 2b00 cmp r3, #0
- 8016452: d10b bne.n 801646c <vTaskPriorityDisinheritAfterTimeout+0x38>
- __asm volatile
- 8016454: f04f 0350 mov.w r3, #80 @ 0x50
- 8016458: f383 8811 msr BASEPRI, r3
- 801645c: f3bf 8f6f isb sy
- 8016460: f3bf 8f4f dsb sy
- 8016464: 60fb str r3, [r7, #12]
- }
- 8016466: bf00 nop
- 8016468: bf00 nop
- 801646a: e7fd b.n 8016468 <vTaskPriorityDisinheritAfterTimeout+0x34>
- /* Determine the priority to which the priority of the task that
- holds the mutex should be set. This will be the greater of the
- holding task's base priority and the priority of the highest
- priority task that is waiting to obtain the mutex. */
- if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask )
- 801646c: 69bb ldr r3, [r7, #24]
- 801646e: 6cdb ldr r3, [r3, #76] @ 0x4c
- 8016470: 683a ldr r2, [r7, #0]
- 8016472: 429a cmp r2, r3
- 8016474: d902 bls.n 801647c <vTaskPriorityDisinheritAfterTimeout+0x48>
- {
- uxPriorityToUse = uxHighestPriorityWaitingTask;
- 8016476: 683b ldr r3, [r7, #0]
- 8016478: 61fb str r3, [r7, #28]
- 801647a: e002 b.n 8016482 <vTaskPriorityDisinheritAfterTimeout+0x4e>
- }
- else
- {
- uxPriorityToUse = pxTCB->uxBasePriority;
- 801647c: 69bb ldr r3, [r7, #24]
- 801647e: 6cdb ldr r3, [r3, #76] @ 0x4c
- 8016480: 61fb str r3, [r7, #28]
- }
- /* Does the priority need to change? */
- if( pxTCB->uxPriority != uxPriorityToUse )
- 8016482: 69bb ldr r3, [r7, #24]
- 8016484: 6adb ldr r3, [r3, #44] @ 0x2c
- 8016486: 69fa ldr r2, [r7, #28]
- 8016488: 429a cmp r2, r3
- 801648a: d04c beq.n 8016526 <vTaskPriorityDisinheritAfterTimeout+0xf2>
- {
- /* Only disinherit if no other mutexes are held. This is a
- simplification in the priority inheritance implementation. If
- the task that holds the mutex is also holding other mutexes then
- the other mutexes may have caused the priority inheritance. */
- if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld )
- 801648c: 69bb ldr r3, [r7, #24]
- 801648e: 6d1b ldr r3, [r3, #80] @ 0x50
- 8016490: 697a ldr r2, [r7, #20]
- 8016492: 429a cmp r2, r3
- 8016494: d147 bne.n 8016526 <vTaskPriorityDisinheritAfterTimeout+0xf2>
- {
- /* If a task has timed out because it already holds the
- mutex it was trying to obtain then it cannot of inherited
- its own priority. */
- configASSERT( pxTCB != pxCurrentTCB );
- 8016496: 4b26 ldr r3, [pc, #152] @ (8016530 <vTaskPriorityDisinheritAfterTimeout+0xfc>)
- 8016498: 681b ldr r3, [r3, #0]
- 801649a: 69ba ldr r2, [r7, #24]
- 801649c: 429a cmp r2, r3
- 801649e: d10b bne.n 80164b8 <vTaskPriorityDisinheritAfterTimeout+0x84>
- __asm volatile
- 80164a0: f04f 0350 mov.w r3, #80 @ 0x50
- 80164a4: f383 8811 msr BASEPRI, r3
- 80164a8: f3bf 8f6f isb sy
- 80164ac: f3bf 8f4f dsb sy
- 80164b0: 60bb str r3, [r7, #8]
- }
- 80164b2: bf00 nop
- 80164b4: bf00 nop
- 80164b6: e7fd b.n 80164b4 <vTaskPriorityDisinheritAfterTimeout+0x80>
- /* Disinherit the priority, remembering the previous
- priority to facilitate determining the subject task's
- state. */
- traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
- uxPriorityUsedOnEntry = pxTCB->uxPriority;
- 80164b8: 69bb ldr r3, [r7, #24]
- 80164ba: 6adb ldr r3, [r3, #44] @ 0x2c
- 80164bc: 613b str r3, [r7, #16]
- pxTCB->uxPriority = uxPriorityToUse;
- 80164be: 69bb ldr r3, [r7, #24]
- 80164c0: 69fa ldr r2, [r7, #28]
- 80164c2: 62da str r2, [r3, #44] @ 0x2c
- /* Only reset the event list item value if the value is not
- being used for anything else. */
- if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
- 80164c4: 69bb ldr r3, [r7, #24]
- 80164c6: 699b ldr r3, [r3, #24]
- 80164c8: 2b00 cmp r3, #0
- 80164ca: db04 blt.n 80164d6 <vTaskPriorityDisinheritAfterTimeout+0xa2>
- {
- listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
- 80164cc: 69fb ldr r3, [r7, #28]
- 80164ce: f1c3 0238 rsb r2, r3, #56 @ 0x38
- 80164d2: 69bb ldr r3, [r7, #24]
- 80164d4: 619a str r2, [r3, #24]
- then the task that holds the mutex could be in either the
- Ready, Blocked or Suspended states. Only remove the task
- from its current state list if it is in the Ready state as
- the task's priority is going to change and there is one
- Ready list per priority. */
- if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
- 80164d6: 69bb ldr r3, [r7, #24]
- 80164d8: 6959 ldr r1, [r3, #20]
- 80164da: 693a ldr r2, [r7, #16]
- 80164dc: 4613 mov r3, r2
- 80164de: 009b lsls r3, r3, #2
- 80164e0: 4413 add r3, r2
- 80164e2: 009b lsls r3, r3, #2
- 80164e4: 4a13 ldr r2, [pc, #76] @ (8016534 <vTaskPriorityDisinheritAfterTimeout+0x100>)
- 80164e6: 4413 add r3, r2
- 80164e8: 4299 cmp r1, r3
- 80164ea: d11c bne.n 8016526 <vTaskPriorityDisinheritAfterTimeout+0xf2>
- {
- if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
- 80164ec: 69bb ldr r3, [r7, #24]
- 80164ee: 3304 adds r3, #4
- 80164f0: 4618 mov r0, r3
- 80164f2: f7fd fe8b bl 801420c <uxListRemove>
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- prvAddTaskToReadyList( pxTCB );
- 80164f6: 69bb ldr r3, [r7, #24]
- 80164f8: 6ada ldr r2, [r3, #44] @ 0x2c
- 80164fa: 4b0f ldr r3, [pc, #60] @ (8016538 <vTaskPriorityDisinheritAfterTimeout+0x104>)
- 80164fc: 681b ldr r3, [r3, #0]
- 80164fe: 429a cmp r2, r3
- 8016500: d903 bls.n 801650a <vTaskPriorityDisinheritAfterTimeout+0xd6>
- 8016502: 69bb ldr r3, [r7, #24]
- 8016504: 6adb ldr r3, [r3, #44] @ 0x2c
- 8016506: 4a0c ldr r2, [pc, #48] @ (8016538 <vTaskPriorityDisinheritAfterTimeout+0x104>)
- 8016508: 6013 str r3, [r2, #0]
- 801650a: 69bb ldr r3, [r7, #24]
- 801650c: 6ada ldr r2, [r3, #44] @ 0x2c
- 801650e: 4613 mov r3, r2
- 8016510: 009b lsls r3, r3, #2
- 8016512: 4413 add r3, r2
- 8016514: 009b lsls r3, r3, #2
- 8016516: 4a07 ldr r2, [pc, #28] @ (8016534 <vTaskPriorityDisinheritAfterTimeout+0x100>)
- 8016518: 441a add r2, r3
- 801651a: 69bb ldr r3, [r7, #24]
- 801651c: 3304 adds r3, #4
- 801651e: 4619 mov r1, r3
- 8016520: 4610 mov r0, r2
- 8016522: f7fd fe16 bl 8014152 <vListInsertEnd>
- }
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- 8016526: bf00 nop
- 8016528: 3720 adds r7, #32
- 801652a: 46bd mov sp, r7
- 801652c: bd80 pop {r7, pc}
- 801652e: bf00 nop
- 8016530: 24002694 .word 0x24002694
- 8016534: 24002698 .word 0x24002698
- 8016538: 24002b70 .word 0x24002b70
- 0801653c <pvTaskIncrementMutexHeldCount>:
- /*-----------------------------------------------------------*/
- #if ( configUSE_MUTEXES == 1 )
- TaskHandle_t pvTaskIncrementMutexHeldCount( void )
- {
- 801653c: b480 push {r7}
- 801653e: af00 add r7, sp, #0
- /* If xSemaphoreCreateMutex() is called before any tasks have been created
- then pxCurrentTCB will be NULL. */
- if( pxCurrentTCB != NULL )
- 8016540: 4b07 ldr r3, [pc, #28] @ (8016560 <pvTaskIncrementMutexHeldCount+0x24>)
- 8016542: 681b ldr r3, [r3, #0]
- 8016544: 2b00 cmp r3, #0
- 8016546: d004 beq.n 8016552 <pvTaskIncrementMutexHeldCount+0x16>
- {
- ( pxCurrentTCB->uxMutexesHeld )++;
- 8016548: 4b05 ldr r3, [pc, #20] @ (8016560 <pvTaskIncrementMutexHeldCount+0x24>)
- 801654a: 681b ldr r3, [r3, #0]
- 801654c: 6d1a ldr r2, [r3, #80] @ 0x50
- 801654e: 3201 adds r2, #1
- 8016550: 651a str r2, [r3, #80] @ 0x50
- }
- return pxCurrentTCB;
- 8016552: 4b03 ldr r3, [pc, #12] @ (8016560 <pvTaskIncrementMutexHeldCount+0x24>)
- 8016554: 681b ldr r3, [r3, #0]
- }
- 8016556: 4618 mov r0, r3
- 8016558: 46bd mov sp, r7
- 801655a: f85d 7b04 ldr.w r7, [sp], #4
- 801655e: 4770 bx lr
- 8016560: 24002694 .word 0x24002694
- 08016564 <xTaskNotifyWait>:
- /*-----------------------------------------------------------*/
- #if( configUSE_TASK_NOTIFICATIONS == 1 )
- BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait )
- {
- 8016564: b580 push {r7, lr}
- 8016566: b086 sub sp, #24
- 8016568: af00 add r7, sp, #0
- 801656a: 60f8 str r0, [r7, #12]
- 801656c: 60b9 str r1, [r7, #8]
- 801656e: 607a str r2, [r7, #4]
- 8016570: 603b str r3, [r7, #0]
- BaseType_t xReturn;
- taskENTER_CRITICAL();
- 8016572: f000 fff1 bl 8017558 <vPortEnterCritical>
- {
- /* Only block if a notification is not already pending. */
- if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
- 8016576: 4b29 ldr r3, [pc, #164] @ (801661c <xTaskNotifyWait+0xb8>)
- 8016578: 681b ldr r3, [r3, #0]
- 801657a: f893 30a4 ldrb.w r3, [r3, #164] @ 0xa4
- 801657e: b2db uxtb r3, r3
- 8016580: 2b02 cmp r3, #2
- 8016582: d01c beq.n 80165be <xTaskNotifyWait+0x5a>
- {
- /* Clear bits in the task's notification value as bits may get
- set by the notifying task or interrupt. This can be used to
- clear the value to zero. */
- pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnEntry;
- 8016584: 4b25 ldr r3, [pc, #148] @ (801661c <xTaskNotifyWait+0xb8>)
- 8016586: 681b ldr r3, [r3, #0]
- 8016588: f8d3 10a0 ldr.w r1, [r3, #160] @ 0xa0
- 801658c: 68fa ldr r2, [r7, #12]
- 801658e: 43d2 mvns r2, r2
- 8016590: 400a ands r2, r1
- 8016592: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
- /* Mark this task as waiting for a notification. */
- pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
- 8016596: 4b21 ldr r3, [pc, #132] @ (801661c <xTaskNotifyWait+0xb8>)
- 8016598: 681b ldr r3, [r3, #0]
- 801659a: 2201 movs r2, #1
- 801659c: f883 20a4 strb.w r2, [r3, #164] @ 0xa4
- if( xTicksToWait > ( TickType_t ) 0 )
- 80165a0: 683b ldr r3, [r7, #0]
- 80165a2: 2b00 cmp r3, #0
- 80165a4: d00b beq.n 80165be <xTaskNotifyWait+0x5a>
- {
- prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
- 80165a6: 2101 movs r1, #1
- 80165a8: 6838 ldr r0, [r7, #0]
- 80165aa: f000 fa09 bl 80169c0 <prvAddCurrentTaskToDelayedList>
- /* All ports are written to allow a yield in a critical
- section (some will yield immediately, others wait until the
- critical section exits) - but it is not something that
- application code should ever do. */
- portYIELD_WITHIN_API();
- 80165ae: 4b1c ldr r3, [pc, #112] @ (8016620 <xTaskNotifyWait+0xbc>)
- 80165b0: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 80165b4: 601a str r2, [r3, #0]
- 80165b6: f3bf 8f4f dsb sy
- 80165ba: f3bf 8f6f isb sy
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- taskEXIT_CRITICAL();
- 80165be: f000 fffd bl 80175bc <vPortExitCritical>
- taskENTER_CRITICAL();
- 80165c2: f000 ffc9 bl 8017558 <vPortEnterCritical>
- {
- traceTASK_NOTIFY_WAIT();
- if( pulNotificationValue != NULL )
- 80165c6: 687b ldr r3, [r7, #4]
- 80165c8: 2b00 cmp r3, #0
- 80165ca: d005 beq.n 80165d8 <xTaskNotifyWait+0x74>
- {
- /* Output the current notification value, which may or may not
- have changed. */
- *pulNotificationValue = pxCurrentTCB->ulNotifiedValue;
- 80165cc: 4b13 ldr r3, [pc, #76] @ (801661c <xTaskNotifyWait+0xb8>)
- 80165ce: 681b ldr r3, [r3, #0]
- 80165d0: f8d3 20a0 ldr.w r2, [r3, #160] @ 0xa0
- 80165d4: 687b ldr r3, [r7, #4]
- 80165d6: 601a str r2, [r3, #0]
- /* If ucNotifyValue is set then either the task never entered the
- blocked state (because a notification was already pending) or the
- task unblocked because of a notification. Otherwise the task
- unblocked because of a timeout. */
- if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
- 80165d8: 4b10 ldr r3, [pc, #64] @ (801661c <xTaskNotifyWait+0xb8>)
- 80165da: 681b ldr r3, [r3, #0]
- 80165dc: f893 30a4 ldrb.w r3, [r3, #164] @ 0xa4
- 80165e0: b2db uxtb r3, r3
- 80165e2: 2b02 cmp r3, #2
- 80165e4: d002 beq.n 80165ec <xTaskNotifyWait+0x88>
- {
- /* A notification was not received. */
- xReturn = pdFALSE;
- 80165e6: 2300 movs r3, #0
- 80165e8: 617b str r3, [r7, #20]
- 80165ea: e00a b.n 8016602 <xTaskNotifyWait+0x9e>
- }
- else
- {
- /* A notification was already pending or a notification was
- received while the task was waiting. */
- pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnExit;
- 80165ec: 4b0b ldr r3, [pc, #44] @ (801661c <xTaskNotifyWait+0xb8>)
- 80165ee: 681b ldr r3, [r3, #0]
- 80165f0: f8d3 10a0 ldr.w r1, [r3, #160] @ 0xa0
- 80165f4: 68ba ldr r2, [r7, #8]
- 80165f6: 43d2 mvns r2, r2
- 80165f8: 400a ands r2, r1
- 80165fa: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
- xReturn = pdTRUE;
- 80165fe: 2301 movs r3, #1
- 8016600: 617b str r3, [r7, #20]
- }
- pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
- 8016602: 4b06 ldr r3, [pc, #24] @ (801661c <xTaskNotifyWait+0xb8>)
- 8016604: 681b ldr r3, [r3, #0]
- 8016606: 2200 movs r2, #0
- 8016608: f883 20a4 strb.w r2, [r3, #164] @ 0xa4
- }
- taskEXIT_CRITICAL();
- 801660c: f000 ffd6 bl 80175bc <vPortExitCritical>
- return xReturn;
- 8016610: 697b ldr r3, [r7, #20]
- }
- 8016612: 4618 mov r0, r3
- 8016614: 3718 adds r7, #24
- 8016616: 46bd mov sp, r7
- 8016618: bd80 pop {r7, pc}
- 801661a: bf00 nop
- 801661c: 24002694 .word 0x24002694
- 8016620: e000ed04 .word 0xe000ed04
- 08016624 <xTaskGenericNotify>:
- /*-----------------------------------------------------------*/
- #if( configUSE_TASK_NOTIFICATIONS == 1 )
- BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue )
- {
- 8016624: b580 push {r7, lr}
- 8016626: b08a sub sp, #40 @ 0x28
- 8016628: af00 add r7, sp, #0
- 801662a: 60f8 str r0, [r7, #12]
- 801662c: 60b9 str r1, [r7, #8]
- 801662e: 603b str r3, [r7, #0]
- 8016630: 4613 mov r3, r2
- 8016632: 71fb strb r3, [r7, #7]
- TCB_t * pxTCB;
- BaseType_t xReturn = pdPASS;
- 8016634: 2301 movs r3, #1
- 8016636: 627b str r3, [r7, #36] @ 0x24
- uint8_t ucOriginalNotifyState;
- configASSERT( xTaskToNotify );
- 8016638: 68fb ldr r3, [r7, #12]
- 801663a: 2b00 cmp r3, #0
- 801663c: d10b bne.n 8016656 <xTaskGenericNotify+0x32>
- __asm volatile
- 801663e: f04f 0350 mov.w r3, #80 @ 0x50
- 8016642: f383 8811 msr BASEPRI, r3
- 8016646: f3bf 8f6f isb sy
- 801664a: f3bf 8f4f dsb sy
- 801664e: 61bb str r3, [r7, #24]
- }
- 8016650: bf00 nop
- 8016652: bf00 nop
- 8016654: e7fd b.n 8016652 <xTaskGenericNotify+0x2e>
- pxTCB = xTaskToNotify;
- 8016656: 68fb ldr r3, [r7, #12]
- 8016658: 623b str r3, [r7, #32]
- taskENTER_CRITICAL();
- 801665a: f000 ff7d bl 8017558 <vPortEnterCritical>
- {
- if( pulPreviousNotificationValue != NULL )
- 801665e: 683b ldr r3, [r7, #0]
- 8016660: 2b00 cmp r3, #0
- 8016662: d004 beq.n 801666e <xTaskGenericNotify+0x4a>
- {
- *pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
- 8016664: 6a3b ldr r3, [r7, #32]
- 8016666: f8d3 20a0 ldr.w r2, [r3, #160] @ 0xa0
- 801666a: 683b ldr r3, [r7, #0]
- 801666c: 601a str r2, [r3, #0]
- }
- ucOriginalNotifyState = pxTCB->ucNotifyState;
- 801666e: 6a3b ldr r3, [r7, #32]
- 8016670: f893 30a4 ldrb.w r3, [r3, #164] @ 0xa4
- 8016674: 77fb strb r3, [r7, #31]
- pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
- 8016676: 6a3b ldr r3, [r7, #32]
- 8016678: 2202 movs r2, #2
- 801667a: f883 20a4 strb.w r2, [r3, #164] @ 0xa4
- switch( eAction )
- 801667e: 79fb ldrb r3, [r7, #7]
- 8016680: 2b04 cmp r3, #4
- 8016682: d82e bhi.n 80166e2 <xTaskGenericNotify+0xbe>
- 8016684: a201 add r2, pc, #4 @ (adr r2, 801668c <xTaskGenericNotify+0x68>)
- 8016686: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 801668a: bf00 nop
- 801668c: 08016707 .word 0x08016707
- 8016690: 080166a1 .word 0x080166a1
- 8016694: 080166b3 .word 0x080166b3
- 8016698: 080166c3 .word 0x080166c3
- 801669c: 080166cd .word 0x080166cd
- {
- case eSetBits :
- pxTCB->ulNotifiedValue |= ulValue;
- 80166a0: 6a3b ldr r3, [r7, #32]
- 80166a2: f8d3 20a0 ldr.w r2, [r3, #160] @ 0xa0
- 80166a6: 68bb ldr r3, [r7, #8]
- 80166a8: 431a orrs r2, r3
- 80166aa: 6a3b ldr r3, [r7, #32]
- 80166ac: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
- break;
- 80166b0: e02c b.n 801670c <xTaskGenericNotify+0xe8>
- case eIncrement :
- ( pxTCB->ulNotifiedValue )++;
- 80166b2: 6a3b ldr r3, [r7, #32]
- 80166b4: f8d3 30a0 ldr.w r3, [r3, #160] @ 0xa0
- 80166b8: 1c5a adds r2, r3, #1
- 80166ba: 6a3b ldr r3, [r7, #32]
- 80166bc: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
- break;
- 80166c0: e024 b.n 801670c <xTaskGenericNotify+0xe8>
- case eSetValueWithOverwrite :
- pxTCB->ulNotifiedValue = ulValue;
- 80166c2: 6a3b ldr r3, [r7, #32]
- 80166c4: 68ba ldr r2, [r7, #8]
- 80166c6: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
- break;
- 80166ca: e01f b.n 801670c <xTaskGenericNotify+0xe8>
- case eSetValueWithoutOverwrite :
- if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
- 80166cc: 7ffb ldrb r3, [r7, #31]
- 80166ce: 2b02 cmp r3, #2
- 80166d0: d004 beq.n 80166dc <xTaskGenericNotify+0xb8>
- {
- pxTCB->ulNotifiedValue = ulValue;
- 80166d2: 6a3b ldr r3, [r7, #32]
- 80166d4: 68ba ldr r2, [r7, #8]
- 80166d6: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
- else
- {
- /* The value could not be written to the task. */
- xReturn = pdFAIL;
- }
- break;
- 80166da: e017 b.n 801670c <xTaskGenericNotify+0xe8>
- xReturn = pdFAIL;
- 80166dc: 2300 movs r3, #0
- 80166de: 627b str r3, [r7, #36] @ 0x24
- break;
- 80166e0: e014 b.n 801670c <xTaskGenericNotify+0xe8>
- default:
- /* Should not get here if all enums are handled.
- Artificially force an assert by testing a value the
- compiler can't assume is const. */
- configASSERT( pxTCB->ulNotifiedValue == ~0UL );
- 80166e2: 6a3b ldr r3, [r7, #32]
- 80166e4: f8d3 30a0 ldr.w r3, [r3, #160] @ 0xa0
- 80166e8: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 80166ec: d00d beq.n 801670a <xTaskGenericNotify+0xe6>
- __asm volatile
- 80166ee: f04f 0350 mov.w r3, #80 @ 0x50
- 80166f2: f383 8811 msr BASEPRI, r3
- 80166f6: f3bf 8f6f isb sy
- 80166fa: f3bf 8f4f dsb sy
- 80166fe: 617b str r3, [r7, #20]
- }
- 8016700: bf00 nop
- 8016702: bf00 nop
- 8016704: e7fd b.n 8016702 <xTaskGenericNotify+0xde>
- break;
- 8016706: bf00 nop
- 8016708: e000 b.n 801670c <xTaskGenericNotify+0xe8>
- break;
- 801670a: bf00 nop
- traceTASK_NOTIFY();
- /* If the task is in the blocked state specifically to wait for a
- notification then unblock it now. */
- if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
- 801670c: 7ffb ldrb r3, [r7, #31]
- 801670e: 2b01 cmp r3, #1
- 8016710: d13b bne.n 801678a <xTaskGenericNotify+0x166>
- {
- ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
- 8016712: 6a3b ldr r3, [r7, #32]
- 8016714: 3304 adds r3, #4
- 8016716: 4618 mov r0, r3
- 8016718: f7fd fd78 bl 801420c <uxListRemove>
- prvAddTaskToReadyList( pxTCB );
- 801671c: 6a3b ldr r3, [r7, #32]
- 801671e: 6ada ldr r2, [r3, #44] @ 0x2c
- 8016720: 4b1d ldr r3, [pc, #116] @ (8016798 <xTaskGenericNotify+0x174>)
- 8016722: 681b ldr r3, [r3, #0]
- 8016724: 429a cmp r2, r3
- 8016726: d903 bls.n 8016730 <xTaskGenericNotify+0x10c>
- 8016728: 6a3b ldr r3, [r7, #32]
- 801672a: 6adb ldr r3, [r3, #44] @ 0x2c
- 801672c: 4a1a ldr r2, [pc, #104] @ (8016798 <xTaskGenericNotify+0x174>)
- 801672e: 6013 str r3, [r2, #0]
- 8016730: 6a3b ldr r3, [r7, #32]
- 8016732: 6ada ldr r2, [r3, #44] @ 0x2c
- 8016734: 4613 mov r3, r2
- 8016736: 009b lsls r3, r3, #2
- 8016738: 4413 add r3, r2
- 801673a: 009b lsls r3, r3, #2
- 801673c: 4a17 ldr r2, [pc, #92] @ (801679c <xTaskGenericNotify+0x178>)
- 801673e: 441a add r2, r3
- 8016740: 6a3b ldr r3, [r7, #32]
- 8016742: 3304 adds r3, #4
- 8016744: 4619 mov r1, r3
- 8016746: 4610 mov r0, r2
- 8016748: f7fd fd03 bl 8014152 <vListInsertEnd>
- /* The task should not have been on an event list. */
- configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
- 801674c: 6a3b ldr r3, [r7, #32]
- 801674e: 6a9b ldr r3, [r3, #40] @ 0x28
- 8016750: 2b00 cmp r3, #0
- 8016752: d00b beq.n 801676c <xTaskGenericNotify+0x148>
- __asm volatile
- 8016754: f04f 0350 mov.w r3, #80 @ 0x50
- 8016758: f383 8811 msr BASEPRI, r3
- 801675c: f3bf 8f6f isb sy
- 8016760: f3bf 8f4f dsb sy
- 8016764: 613b str r3, [r7, #16]
- }
- 8016766: bf00 nop
- 8016768: bf00 nop
- 801676a: e7fd b.n 8016768 <xTaskGenericNotify+0x144>
- earliest possible time. */
- prvResetNextTaskUnblockTime();
- }
- #endif
- if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
- 801676c: 6a3b ldr r3, [r7, #32]
- 801676e: 6ada ldr r2, [r3, #44] @ 0x2c
- 8016770: 4b0b ldr r3, [pc, #44] @ (80167a0 <xTaskGenericNotify+0x17c>)
- 8016772: 681b ldr r3, [r3, #0]
- 8016774: 6adb ldr r3, [r3, #44] @ 0x2c
- 8016776: 429a cmp r2, r3
- 8016778: d907 bls.n 801678a <xTaskGenericNotify+0x166>
- {
- /* The notified task has a priority above the currently
- executing task so a yield is required. */
- taskYIELD_IF_USING_PREEMPTION();
- 801677a: 4b0a ldr r3, [pc, #40] @ (80167a4 <xTaskGenericNotify+0x180>)
- 801677c: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 8016780: 601a str r2, [r3, #0]
- 8016782: f3bf 8f4f dsb sy
- 8016786: f3bf 8f6f isb sy
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- taskEXIT_CRITICAL();
- 801678a: f000 ff17 bl 80175bc <vPortExitCritical>
- return xReturn;
- 801678e: 6a7b ldr r3, [r7, #36] @ 0x24
- }
- 8016790: 4618 mov r0, r3
- 8016792: 3728 adds r7, #40 @ 0x28
- 8016794: 46bd mov sp, r7
- 8016796: bd80 pop {r7, pc}
- 8016798: 24002b70 .word 0x24002b70
- 801679c: 24002698 .word 0x24002698
- 80167a0: 24002694 .word 0x24002694
- 80167a4: e000ed04 .word 0xe000ed04
- 080167a8 <xTaskGenericNotifyFromISR>:
- /*-----------------------------------------------------------*/
- #if( configUSE_TASK_NOTIFICATIONS == 1 )
- BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken )
- {
- 80167a8: b580 push {r7, lr}
- 80167aa: b08e sub sp, #56 @ 0x38
- 80167ac: af00 add r7, sp, #0
- 80167ae: 60f8 str r0, [r7, #12]
- 80167b0: 60b9 str r1, [r7, #8]
- 80167b2: 603b str r3, [r7, #0]
- 80167b4: 4613 mov r3, r2
- 80167b6: 71fb strb r3, [r7, #7]
- TCB_t * pxTCB;
- uint8_t ucOriginalNotifyState;
- BaseType_t xReturn = pdPASS;
- 80167b8: 2301 movs r3, #1
- 80167ba: 637b str r3, [r7, #52] @ 0x34
- UBaseType_t uxSavedInterruptStatus;
- configASSERT( xTaskToNotify );
- 80167bc: 68fb ldr r3, [r7, #12]
- 80167be: 2b00 cmp r3, #0
- 80167c0: d10b bne.n 80167da <xTaskGenericNotifyFromISR+0x32>
- __asm volatile
- 80167c2: f04f 0350 mov.w r3, #80 @ 0x50
- 80167c6: f383 8811 msr BASEPRI, r3
- 80167ca: f3bf 8f6f isb sy
- 80167ce: f3bf 8f4f dsb sy
- 80167d2: 627b str r3, [r7, #36] @ 0x24
- }
- 80167d4: bf00 nop
- 80167d6: bf00 nop
- 80167d8: e7fd b.n 80167d6 <xTaskGenericNotifyFromISR+0x2e>
- below the maximum system call interrupt priority. FreeRTOS maintains a
- separate interrupt safe API to ensure interrupt entry is as fast and as
- simple as possible. More information (albeit Cortex-M specific) is
- provided on the following link:
- http://www.freertos.org/RTOS-Cortex-M3-M4.html */
- portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
- 80167da: f000 ff9d bl 8017718 <vPortValidateInterruptPriority>
- pxTCB = xTaskToNotify;
- 80167de: 68fb ldr r3, [r7, #12]
- 80167e0: 633b str r3, [r7, #48] @ 0x30
- __asm volatile
- 80167e2: f3ef 8211 mrs r2, BASEPRI
- 80167e6: f04f 0350 mov.w r3, #80 @ 0x50
- 80167ea: f383 8811 msr BASEPRI, r3
- 80167ee: f3bf 8f6f isb sy
- 80167f2: f3bf 8f4f dsb sy
- 80167f6: 623a str r2, [r7, #32]
- 80167f8: 61fb str r3, [r7, #28]
- return ulOriginalBASEPRI;
- 80167fa: 6a3b ldr r3, [r7, #32]
- uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
- 80167fc: 62fb str r3, [r7, #44] @ 0x2c
- {
- if( pulPreviousNotificationValue != NULL )
- 80167fe: 683b ldr r3, [r7, #0]
- 8016800: 2b00 cmp r3, #0
- 8016802: d004 beq.n 801680e <xTaskGenericNotifyFromISR+0x66>
- {
- *pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
- 8016804: 6b3b ldr r3, [r7, #48] @ 0x30
- 8016806: f8d3 20a0 ldr.w r2, [r3, #160] @ 0xa0
- 801680a: 683b ldr r3, [r7, #0]
- 801680c: 601a str r2, [r3, #0]
- }
- ucOriginalNotifyState = pxTCB->ucNotifyState;
- 801680e: 6b3b ldr r3, [r7, #48] @ 0x30
- 8016810: f893 30a4 ldrb.w r3, [r3, #164] @ 0xa4
- 8016814: f887 302b strb.w r3, [r7, #43] @ 0x2b
- pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
- 8016818: 6b3b ldr r3, [r7, #48] @ 0x30
- 801681a: 2202 movs r2, #2
- 801681c: f883 20a4 strb.w r2, [r3, #164] @ 0xa4
- switch( eAction )
- 8016820: 79fb ldrb r3, [r7, #7]
- 8016822: 2b04 cmp r3, #4
- 8016824: d82e bhi.n 8016884 <xTaskGenericNotifyFromISR+0xdc>
- 8016826: a201 add r2, pc, #4 @ (adr r2, 801682c <xTaskGenericNotifyFromISR+0x84>)
- 8016828: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 801682c: 080168a9 .word 0x080168a9
- 8016830: 08016841 .word 0x08016841
- 8016834: 08016853 .word 0x08016853
- 8016838: 08016863 .word 0x08016863
- 801683c: 0801686d .word 0x0801686d
- {
- case eSetBits :
- pxTCB->ulNotifiedValue |= ulValue;
- 8016840: 6b3b ldr r3, [r7, #48] @ 0x30
- 8016842: f8d3 20a0 ldr.w r2, [r3, #160] @ 0xa0
- 8016846: 68bb ldr r3, [r7, #8]
- 8016848: 431a orrs r2, r3
- 801684a: 6b3b ldr r3, [r7, #48] @ 0x30
- 801684c: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
- break;
- 8016850: e02d b.n 80168ae <xTaskGenericNotifyFromISR+0x106>
- case eIncrement :
- ( pxTCB->ulNotifiedValue )++;
- 8016852: 6b3b ldr r3, [r7, #48] @ 0x30
- 8016854: f8d3 30a0 ldr.w r3, [r3, #160] @ 0xa0
- 8016858: 1c5a adds r2, r3, #1
- 801685a: 6b3b ldr r3, [r7, #48] @ 0x30
- 801685c: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
- break;
- 8016860: e025 b.n 80168ae <xTaskGenericNotifyFromISR+0x106>
- case eSetValueWithOverwrite :
- pxTCB->ulNotifiedValue = ulValue;
- 8016862: 6b3b ldr r3, [r7, #48] @ 0x30
- 8016864: 68ba ldr r2, [r7, #8]
- 8016866: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
- break;
- 801686a: e020 b.n 80168ae <xTaskGenericNotifyFromISR+0x106>
- case eSetValueWithoutOverwrite :
- if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
- 801686c: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
- 8016870: 2b02 cmp r3, #2
- 8016872: d004 beq.n 801687e <xTaskGenericNotifyFromISR+0xd6>
- {
- pxTCB->ulNotifiedValue = ulValue;
- 8016874: 6b3b ldr r3, [r7, #48] @ 0x30
- 8016876: 68ba ldr r2, [r7, #8]
- 8016878: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
- else
- {
- /* The value could not be written to the task. */
- xReturn = pdFAIL;
- }
- break;
- 801687c: e017 b.n 80168ae <xTaskGenericNotifyFromISR+0x106>
- xReturn = pdFAIL;
- 801687e: 2300 movs r3, #0
- 8016880: 637b str r3, [r7, #52] @ 0x34
- break;
- 8016882: e014 b.n 80168ae <xTaskGenericNotifyFromISR+0x106>
- default:
- /* Should not get here if all enums are handled.
- Artificially force an assert by testing a value the
- compiler can't assume is const. */
- configASSERT( pxTCB->ulNotifiedValue == ~0UL );
- 8016884: 6b3b ldr r3, [r7, #48] @ 0x30
- 8016886: f8d3 30a0 ldr.w r3, [r3, #160] @ 0xa0
- 801688a: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 801688e: d00d beq.n 80168ac <xTaskGenericNotifyFromISR+0x104>
- __asm volatile
- 8016890: f04f 0350 mov.w r3, #80 @ 0x50
- 8016894: f383 8811 msr BASEPRI, r3
- 8016898: f3bf 8f6f isb sy
- 801689c: f3bf 8f4f dsb sy
- 80168a0: 61bb str r3, [r7, #24]
- }
- 80168a2: bf00 nop
- 80168a4: bf00 nop
- 80168a6: e7fd b.n 80168a4 <xTaskGenericNotifyFromISR+0xfc>
- break;
- 80168a8: bf00 nop
- 80168aa: e000 b.n 80168ae <xTaskGenericNotifyFromISR+0x106>
- break;
- 80168ac: bf00 nop
- traceTASK_NOTIFY_FROM_ISR();
- /* If the task is in the blocked state specifically to wait for a
- notification then unblock it now. */
- if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
- 80168ae: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
- 80168b2: 2b01 cmp r3, #1
- 80168b4: d147 bne.n 8016946 <xTaskGenericNotifyFromISR+0x19e>
- {
- /* The task should not have been on an event list. */
- configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
- 80168b6: 6b3b ldr r3, [r7, #48] @ 0x30
- 80168b8: 6a9b ldr r3, [r3, #40] @ 0x28
- 80168ba: 2b00 cmp r3, #0
- 80168bc: d00b beq.n 80168d6 <xTaskGenericNotifyFromISR+0x12e>
- __asm volatile
- 80168be: f04f 0350 mov.w r3, #80 @ 0x50
- 80168c2: f383 8811 msr BASEPRI, r3
- 80168c6: f3bf 8f6f isb sy
- 80168ca: f3bf 8f4f dsb sy
- 80168ce: 617b str r3, [r7, #20]
- }
- 80168d0: bf00 nop
- 80168d2: bf00 nop
- 80168d4: e7fd b.n 80168d2 <xTaskGenericNotifyFromISR+0x12a>
- if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
- 80168d6: 4b21 ldr r3, [pc, #132] @ (801695c <xTaskGenericNotifyFromISR+0x1b4>)
- 80168d8: 681b ldr r3, [r3, #0]
- 80168da: 2b00 cmp r3, #0
- 80168dc: d11d bne.n 801691a <xTaskGenericNotifyFromISR+0x172>
- {
- ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
- 80168de: 6b3b ldr r3, [r7, #48] @ 0x30
- 80168e0: 3304 adds r3, #4
- 80168e2: 4618 mov r0, r3
- 80168e4: f7fd fc92 bl 801420c <uxListRemove>
- prvAddTaskToReadyList( pxTCB );
- 80168e8: 6b3b ldr r3, [r7, #48] @ 0x30
- 80168ea: 6ada ldr r2, [r3, #44] @ 0x2c
- 80168ec: 4b1c ldr r3, [pc, #112] @ (8016960 <xTaskGenericNotifyFromISR+0x1b8>)
- 80168ee: 681b ldr r3, [r3, #0]
- 80168f0: 429a cmp r2, r3
- 80168f2: d903 bls.n 80168fc <xTaskGenericNotifyFromISR+0x154>
- 80168f4: 6b3b ldr r3, [r7, #48] @ 0x30
- 80168f6: 6adb ldr r3, [r3, #44] @ 0x2c
- 80168f8: 4a19 ldr r2, [pc, #100] @ (8016960 <xTaskGenericNotifyFromISR+0x1b8>)
- 80168fa: 6013 str r3, [r2, #0]
- 80168fc: 6b3b ldr r3, [r7, #48] @ 0x30
- 80168fe: 6ada ldr r2, [r3, #44] @ 0x2c
- 8016900: 4613 mov r3, r2
- 8016902: 009b lsls r3, r3, #2
- 8016904: 4413 add r3, r2
- 8016906: 009b lsls r3, r3, #2
- 8016908: 4a16 ldr r2, [pc, #88] @ (8016964 <xTaskGenericNotifyFromISR+0x1bc>)
- 801690a: 441a add r2, r3
- 801690c: 6b3b ldr r3, [r7, #48] @ 0x30
- 801690e: 3304 adds r3, #4
- 8016910: 4619 mov r1, r3
- 8016912: 4610 mov r0, r2
- 8016914: f7fd fc1d bl 8014152 <vListInsertEnd>
- 8016918: e005 b.n 8016926 <xTaskGenericNotifyFromISR+0x17e>
- }
- else
- {
- /* The delayed and ready lists cannot be accessed, so hold
- this task pending until the scheduler is resumed. */
- vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
- 801691a: 6b3b ldr r3, [r7, #48] @ 0x30
- 801691c: 3318 adds r3, #24
- 801691e: 4619 mov r1, r3
- 8016920: 4811 ldr r0, [pc, #68] @ (8016968 <xTaskGenericNotifyFromISR+0x1c0>)
- 8016922: f7fd fc16 bl 8014152 <vListInsertEnd>
- }
- if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
- 8016926: 6b3b ldr r3, [r7, #48] @ 0x30
- 8016928: 6ada ldr r2, [r3, #44] @ 0x2c
- 801692a: 4b10 ldr r3, [pc, #64] @ (801696c <xTaskGenericNotifyFromISR+0x1c4>)
- 801692c: 681b ldr r3, [r3, #0]
- 801692e: 6adb ldr r3, [r3, #44] @ 0x2c
- 8016930: 429a cmp r2, r3
- 8016932: d908 bls.n 8016946 <xTaskGenericNotifyFromISR+0x19e>
- {
- /* The notified task has a priority above the currently
- executing task so a yield is required. */
- if( pxHigherPriorityTaskWoken != NULL )
- 8016934: 6c3b ldr r3, [r7, #64] @ 0x40
- 8016936: 2b00 cmp r3, #0
- 8016938: d002 beq.n 8016940 <xTaskGenericNotifyFromISR+0x198>
- {
- *pxHigherPriorityTaskWoken = pdTRUE;
- 801693a: 6c3b ldr r3, [r7, #64] @ 0x40
- 801693c: 2201 movs r2, #1
- 801693e: 601a str r2, [r3, #0]
- }
- /* Mark that a yield is pending in case the user is not
- using the "xHigherPriorityTaskWoken" parameter to an ISR
- safe FreeRTOS function. */
- xYieldPending = pdTRUE;
- 8016940: 4b0b ldr r3, [pc, #44] @ (8016970 <xTaskGenericNotifyFromISR+0x1c8>)
- 8016942: 2201 movs r2, #1
- 8016944: 601a str r2, [r3, #0]
- 8016946: 6afb ldr r3, [r7, #44] @ 0x2c
- 8016948: 613b str r3, [r7, #16]
- __asm volatile
- 801694a: 693b ldr r3, [r7, #16]
- 801694c: f383 8811 msr BASEPRI, r3
- }
- 8016950: bf00 nop
- }
- }
- }
- portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
- return xReturn;
- 8016952: 6b7b ldr r3, [r7, #52] @ 0x34
- }
- 8016954: 4618 mov r0, r3
- 8016956: 3738 adds r7, #56 @ 0x38
- 8016958: 46bd mov sp, r7
- 801695a: bd80 pop {r7, pc}
- 801695c: 24002b90 .word 0x24002b90
- 8016960: 24002b70 .word 0x24002b70
- 8016964: 24002698 .word 0x24002698
- 8016968: 24002b28 .word 0x24002b28
- 801696c: 24002694 .word 0x24002694
- 8016970: 24002b7c .word 0x24002b7c
- 08016974 <xTaskNotifyStateClear>:
- /*-----------------------------------------------------------*/
- #if( configUSE_TASK_NOTIFICATIONS == 1 )
- BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask )
- {
- 8016974: b580 push {r7, lr}
- 8016976: b084 sub sp, #16
- 8016978: af00 add r7, sp, #0
- 801697a: 6078 str r0, [r7, #4]
- TCB_t *pxTCB;
- BaseType_t xReturn;
- /* If null is passed in here then it is the calling task that is having
- its notification state cleared. */
- pxTCB = prvGetTCBFromHandle( xTask );
- 801697c: 687b ldr r3, [r7, #4]
- 801697e: 2b00 cmp r3, #0
- 8016980: d102 bne.n 8016988 <xTaskNotifyStateClear+0x14>
- 8016982: 4b0e ldr r3, [pc, #56] @ (80169bc <xTaskNotifyStateClear+0x48>)
- 8016984: 681b ldr r3, [r3, #0]
- 8016986: e000 b.n 801698a <xTaskNotifyStateClear+0x16>
- 8016988: 687b ldr r3, [r7, #4]
- 801698a: 60bb str r3, [r7, #8]
- taskENTER_CRITICAL();
- 801698c: f000 fde4 bl 8017558 <vPortEnterCritical>
- {
- if( pxTCB->ucNotifyState == taskNOTIFICATION_RECEIVED )
- 8016990: 68bb ldr r3, [r7, #8]
- 8016992: f893 30a4 ldrb.w r3, [r3, #164] @ 0xa4
- 8016996: b2db uxtb r3, r3
- 8016998: 2b02 cmp r3, #2
- 801699a: d106 bne.n 80169aa <xTaskNotifyStateClear+0x36>
- {
- pxTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
- 801699c: 68bb ldr r3, [r7, #8]
- 801699e: 2200 movs r2, #0
- 80169a0: f883 20a4 strb.w r2, [r3, #164] @ 0xa4
- xReturn = pdPASS;
- 80169a4: 2301 movs r3, #1
- 80169a6: 60fb str r3, [r7, #12]
- 80169a8: e001 b.n 80169ae <xTaskNotifyStateClear+0x3a>
- }
- else
- {
- xReturn = pdFAIL;
- 80169aa: 2300 movs r3, #0
- 80169ac: 60fb str r3, [r7, #12]
- }
- }
- taskEXIT_CRITICAL();
- 80169ae: f000 fe05 bl 80175bc <vPortExitCritical>
- return xReturn;
- 80169b2: 68fb ldr r3, [r7, #12]
- }
- 80169b4: 4618 mov r0, r3
- 80169b6: 3710 adds r7, #16
- 80169b8: 46bd mov sp, r7
- 80169ba: bd80 pop {r7, pc}
- 80169bc: 24002694 .word 0x24002694
- 080169c0 <prvAddCurrentTaskToDelayedList>:
- #endif
- /*-----------------------------------------------------------*/
- static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
- {
- 80169c0: b580 push {r7, lr}
- 80169c2: b084 sub sp, #16
- 80169c4: af00 add r7, sp, #0
- 80169c6: 6078 str r0, [r7, #4]
- 80169c8: 6039 str r1, [r7, #0]
- TickType_t xTimeToWake;
- const TickType_t xConstTickCount = xTickCount;
- 80169ca: 4b21 ldr r3, [pc, #132] @ (8016a50 <prvAddCurrentTaskToDelayedList+0x90>)
- 80169cc: 681b ldr r3, [r3, #0]
- 80169ce: 60fb str r3, [r7, #12]
- }
- #endif
- /* Remove the task from the ready list before adding it to the blocked list
- as the same list item is used for both lists. */
- if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
- 80169d0: 4b20 ldr r3, [pc, #128] @ (8016a54 <prvAddCurrentTaskToDelayedList+0x94>)
- 80169d2: 681b ldr r3, [r3, #0]
- 80169d4: 3304 adds r3, #4
- 80169d6: 4618 mov r0, r3
- 80169d8: f7fd fc18 bl 801420c <uxListRemove>
- mtCOVERAGE_TEST_MARKER();
- }
- #if ( INCLUDE_vTaskSuspend == 1 )
- {
- if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
- 80169dc: 687b ldr r3, [r7, #4]
- 80169de: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 80169e2: d10a bne.n 80169fa <prvAddCurrentTaskToDelayedList+0x3a>
- 80169e4: 683b ldr r3, [r7, #0]
- 80169e6: 2b00 cmp r3, #0
- 80169e8: d007 beq.n 80169fa <prvAddCurrentTaskToDelayedList+0x3a>
- {
- /* Add the task to the suspended task list instead of a delayed task
- list to ensure it is not woken by a timing event. It will block
- indefinitely. */
- vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
- 80169ea: 4b1a ldr r3, [pc, #104] @ (8016a54 <prvAddCurrentTaskToDelayedList+0x94>)
- 80169ec: 681b ldr r3, [r3, #0]
- 80169ee: 3304 adds r3, #4
- 80169f0: 4619 mov r1, r3
- 80169f2: 4819 ldr r0, [pc, #100] @ (8016a58 <prvAddCurrentTaskToDelayedList+0x98>)
- 80169f4: f7fd fbad bl 8014152 <vListInsertEnd>
- /* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
- ( void ) xCanBlockIndefinitely;
- }
- #endif /* INCLUDE_vTaskSuspend */
- }
- 80169f8: e026 b.n 8016a48 <prvAddCurrentTaskToDelayedList+0x88>
- xTimeToWake = xConstTickCount + xTicksToWait;
- 80169fa: 68fa ldr r2, [r7, #12]
- 80169fc: 687b ldr r3, [r7, #4]
- 80169fe: 4413 add r3, r2
- 8016a00: 60bb str r3, [r7, #8]
- listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
- 8016a02: 4b14 ldr r3, [pc, #80] @ (8016a54 <prvAddCurrentTaskToDelayedList+0x94>)
- 8016a04: 681b ldr r3, [r3, #0]
- 8016a06: 68ba ldr r2, [r7, #8]
- 8016a08: 605a str r2, [r3, #4]
- if( xTimeToWake < xConstTickCount )
- 8016a0a: 68ba ldr r2, [r7, #8]
- 8016a0c: 68fb ldr r3, [r7, #12]
- 8016a0e: 429a cmp r2, r3
- 8016a10: d209 bcs.n 8016a26 <prvAddCurrentTaskToDelayedList+0x66>
- vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
- 8016a12: 4b12 ldr r3, [pc, #72] @ (8016a5c <prvAddCurrentTaskToDelayedList+0x9c>)
- 8016a14: 681a ldr r2, [r3, #0]
- 8016a16: 4b0f ldr r3, [pc, #60] @ (8016a54 <prvAddCurrentTaskToDelayedList+0x94>)
- 8016a18: 681b ldr r3, [r3, #0]
- 8016a1a: 3304 adds r3, #4
- 8016a1c: 4619 mov r1, r3
- 8016a1e: 4610 mov r0, r2
- 8016a20: f7fd fbbb bl 801419a <vListInsert>
- }
- 8016a24: e010 b.n 8016a48 <prvAddCurrentTaskToDelayedList+0x88>
- vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
- 8016a26: 4b0e ldr r3, [pc, #56] @ (8016a60 <prvAddCurrentTaskToDelayedList+0xa0>)
- 8016a28: 681a ldr r2, [r3, #0]
- 8016a2a: 4b0a ldr r3, [pc, #40] @ (8016a54 <prvAddCurrentTaskToDelayedList+0x94>)
- 8016a2c: 681b ldr r3, [r3, #0]
- 8016a2e: 3304 adds r3, #4
- 8016a30: 4619 mov r1, r3
- 8016a32: 4610 mov r0, r2
- 8016a34: f7fd fbb1 bl 801419a <vListInsert>
- if( xTimeToWake < xNextTaskUnblockTime )
- 8016a38: 4b0a ldr r3, [pc, #40] @ (8016a64 <prvAddCurrentTaskToDelayedList+0xa4>)
- 8016a3a: 681b ldr r3, [r3, #0]
- 8016a3c: 68ba ldr r2, [r7, #8]
- 8016a3e: 429a cmp r2, r3
- 8016a40: d202 bcs.n 8016a48 <prvAddCurrentTaskToDelayedList+0x88>
- xNextTaskUnblockTime = xTimeToWake;
- 8016a42: 4a08 ldr r2, [pc, #32] @ (8016a64 <prvAddCurrentTaskToDelayedList+0xa4>)
- 8016a44: 68bb ldr r3, [r7, #8]
- 8016a46: 6013 str r3, [r2, #0]
- }
- 8016a48: bf00 nop
- 8016a4a: 3710 adds r7, #16
- 8016a4c: 46bd mov sp, r7
- 8016a4e: bd80 pop {r7, pc}
- 8016a50: 24002b6c .word 0x24002b6c
- 8016a54: 24002694 .word 0x24002694
- 8016a58: 24002b54 .word 0x24002b54
- 8016a5c: 24002b24 .word 0x24002b24
- 8016a60: 24002b20 .word 0x24002b20
- 8016a64: 24002b88 .word 0x24002b88
- 08016a68 <xTimerCreateTimerTask>:
- TimerCallbackFunction_t pxCallbackFunction,
- Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION;
- /*-----------------------------------------------------------*/
- BaseType_t xTimerCreateTimerTask( void )
- {
- 8016a68: b580 push {r7, lr}
- 8016a6a: b08a sub sp, #40 @ 0x28
- 8016a6c: af04 add r7, sp, #16
- BaseType_t xReturn = pdFAIL;
- 8016a6e: 2300 movs r3, #0
- 8016a70: 617b str r3, [r7, #20]
- /* This function is called when the scheduler is started if
- configUSE_TIMERS is set to 1. Check that the infrastructure used by the
- timer service task has been created/initialised. If timers have already
- been created then the initialisation will already have been performed. */
- prvCheckForValidListAndQueue();
- 8016a72: f000 fbb1 bl 80171d8 <prvCheckForValidListAndQueue>
- if( xTimerQueue != NULL )
- 8016a76: 4b1d ldr r3, [pc, #116] @ (8016aec <xTimerCreateTimerTask+0x84>)
- 8016a78: 681b ldr r3, [r3, #0]
- 8016a7a: 2b00 cmp r3, #0
- 8016a7c: d021 beq.n 8016ac2 <xTimerCreateTimerTask+0x5a>
- {
- #if( configSUPPORT_STATIC_ALLOCATION == 1 )
- {
- StaticTask_t *pxTimerTaskTCBBuffer = NULL;
- 8016a7e: 2300 movs r3, #0
- 8016a80: 60fb str r3, [r7, #12]
- StackType_t *pxTimerTaskStackBuffer = NULL;
- 8016a82: 2300 movs r3, #0
- 8016a84: 60bb str r3, [r7, #8]
- uint32_t ulTimerTaskStackSize;
- vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize );
- 8016a86: 1d3a adds r2, r7, #4
- 8016a88: f107 0108 add.w r1, r7, #8
- 8016a8c: f107 030c add.w r3, r7, #12
- 8016a90: 4618 mov r0, r3
- 8016a92: f7fd fb17 bl 80140c4 <vApplicationGetTimerTaskMemory>
- xTimerTaskHandle = xTaskCreateStatic( prvTimerTask,
- 8016a96: 6879 ldr r1, [r7, #4]
- 8016a98: 68bb ldr r3, [r7, #8]
- 8016a9a: 68fa ldr r2, [r7, #12]
- 8016a9c: 9202 str r2, [sp, #8]
- 8016a9e: 9301 str r3, [sp, #4]
- 8016aa0: 2302 movs r3, #2
- 8016aa2: 9300 str r3, [sp, #0]
- 8016aa4: 2300 movs r3, #0
- 8016aa6: 460a mov r2, r1
- 8016aa8: 4911 ldr r1, [pc, #68] @ (8016af0 <xTimerCreateTimerTask+0x88>)
- 8016aaa: 4812 ldr r0, [pc, #72] @ (8016af4 <xTimerCreateTimerTask+0x8c>)
- 8016aac: f7fe fd2f bl 801550e <xTaskCreateStatic>
- 8016ab0: 4603 mov r3, r0
- 8016ab2: 4a11 ldr r2, [pc, #68] @ (8016af8 <xTimerCreateTimerTask+0x90>)
- 8016ab4: 6013 str r3, [r2, #0]
- NULL,
- ( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
- pxTimerTaskStackBuffer,
- pxTimerTaskTCBBuffer );
- if( xTimerTaskHandle != NULL )
- 8016ab6: 4b10 ldr r3, [pc, #64] @ (8016af8 <xTimerCreateTimerTask+0x90>)
- 8016ab8: 681b ldr r3, [r3, #0]
- 8016aba: 2b00 cmp r3, #0
- 8016abc: d001 beq.n 8016ac2 <xTimerCreateTimerTask+0x5a>
- {
- xReturn = pdPASS;
- 8016abe: 2301 movs r3, #1
- 8016ac0: 617b str r3, [r7, #20]
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- configASSERT( xReturn );
- 8016ac2: 697b ldr r3, [r7, #20]
- 8016ac4: 2b00 cmp r3, #0
- 8016ac6: d10b bne.n 8016ae0 <xTimerCreateTimerTask+0x78>
- __asm volatile
- 8016ac8: f04f 0350 mov.w r3, #80 @ 0x50
- 8016acc: f383 8811 msr BASEPRI, r3
- 8016ad0: f3bf 8f6f isb sy
- 8016ad4: f3bf 8f4f dsb sy
- 8016ad8: 613b str r3, [r7, #16]
- }
- 8016ada: bf00 nop
- 8016adc: bf00 nop
- 8016ade: e7fd b.n 8016adc <xTimerCreateTimerTask+0x74>
- return xReturn;
- 8016ae0: 697b ldr r3, [r7, #20]
- }
- 8016ae2: 4618 mov r0, r3
- 8016ae4: 3718 adds r7, #24
- 8016ae6: 46bd mov sp, r7
- 8016ae8: bd80 pop {r7, pc}
- 8016aea: bf00 nop
- 8016aec: 24002bc4 .word 0x24002bc4
- 8016af0: 08018ba4 .word 0x08018ba4
- 8016af4: 08016d71 .word 0x08016d71
- 8016af8: 24002bc8 .word 0x24002bc8
- 08016afc <xTimerCreate>:
- TimerHandle_t xTimerCreate( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
- const TickType_t xTimerPeriodInTicks,
- const UBaseType_t uxAutoReload,
- void * const pvTimerID,
- TimerCallbackFunction_t pxCallbackFunction )
- {
- 8016afc: b580 push {r7, lr}
- 8016afe: b088 sub sp, #32
- 8016b00: af02 add r7, sp, #8
- 8016b02: 60f8 str r0, [r7, #12]
- 8016b04: 60b9 str r1, [r7, #8]
- 8016b06: 607a str r2, [r7, #4]
- 8016b08: 603b str r3, [r7, #0]
- Timer_t *pxNewTimer;
- pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of Timer_t is always a pointer to the timer's mame. */
- 8016b0a: 202c movs r0, #44 @ 0x2c
- 8016b0c: f000 fe46 bl 801779c <pvPortMalloc>
- 8016b10: 6178 str r0, [r7, #20]
- if( pxNewTimer != NULL )
- 8016b12: 697b ldr r3, [r7, #20]
- 8016b14: 2b00 cmp r3, #0
- 8016b16: d00d beq.n 8016b34 <xTimerCreate+0x38>
- {
- /* Status is thus far zero as the timer is not created statically
- and has not been started. The auto-reload bit may get set in
- prvInitialiseNewTimer. */
- pxNewTimer->ucStatus = 0x00;
- 8016b18: 697b ldr r3, [r7, #20]
- 8016b1a: 2200 movs r2, #0
- 8016b1c: f883 2028 strb.w r2, [r3, #40] @ 0x28
- prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
- 8016b20: 697b ldr r3, [r7, #20]
- 8016b22: 9301 str r3, [sp, #4]
- 8016b24: 6a3b ldr r3, [r7, #32]
- 8016b26: 9300 str r3, [sp, #0]
- 8016b28: 683b ldr r3, [r7, #0]
- 8016b2a: 687a ldr r2, [r7, #4]
- 8016b2c: 68b9 ldr r1, [r7, #8]
- 8016b2e: 68f8 ldr r0, [r7, #12]
- 8016b30: f000 f845 bl 8016bbe <prvInitialiseNewTimer>
- }
- return pxNewTimer;
- 8016b34: 697b ldr r3, [r7, #20]
- }
- 8016b36: 4618 mov r0, r3
- 8016b38: 3718 adds r7, #24
- 8016b3a: 46bd mov sp, r7
- 8016b3c: bd80 pop {r7, pc}
- 08016b3e <xTimerCreateStatic>:
- const TickType_t xTimerPeriodInTicks,
- const UBaseType_t uxAutoReload,
- void * const pvTimerID,
- TimerCallbackFunction_t pxCallbackFunction,
- StaticTimer_t *pxTimerBuffer )
- {
- 8016b3e: b580 push {r7, lr}
- 8016b40: b08a sub sp, #40 @ 0x28
- 8016b42: af02 add r7, sp, #8
- 8016b44: 60f8 str r0, [r7, #12]
- 8016b46: 60b9 str r1, [r7, #8]
- 8016b48: 607a str r2, [r7, #4]
- 8016b4a: 603b str r3, [r7, #0]
- #if( configASSERT_DEFINED == 1 )
- {
- /* Sanity check that the size of the structure used to declare a
- variable of type StaticTimer_t equals the size of the real timer
- structure. */
- volatile size_t xSize = sizeof( StaticTimer_t );
- 8016b4c: 232c movs r3, #44 @ 0x2c
- 8016b4e: 613b str r3, [r7, #16]
- configASSERT( xSize == sizeof( Timer_t ) );
- 8016b50: 693b ldr r3, [r7, #16]
- 8016b52: 2b2c cmp r3, #44 @ 0x2c
- 8016b54: d00b beq.n 8016b6e <xTimerCreateStatic+0x30>
- __asm volatile
- 8016b56: f04f 0350 mov.w r3, #80 @ 0x50
- 8016b5a: f383 8811 msr BASEPRI, r3
- 8016b5e: f3bf 8f6f isb sy
- 8016b62: f3bf 8f4f dsb sy
- 8016b66: 61bb str r3, [r7, #24]
- }
- 8016b68: bf00 nop
- 8016b6a: bf00 nop
- 8016b6c: e7fd b.n 8016b6a <xTimerCreateStatic+0x2c>
- ( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
- 8016b6e: 693b ldr r3, [r7, #16]
- }
- #endif /* configASSERT_DEFINED */
- /* A pointer to a StaticTimer_t structure MUST be provided, use it. */
- configASSERT( pxTimerBuffer );
- 8016b70: 6afb ldr r3, [r7, #44] @ 0x2c
- 8016b72: 2b00 cmp r3, #0
- 8016b74: d10b bne.n 8016b8e <xTimerCreateStatic+0x50>
- __asm volatile
- 8016b76: f04f 0350 mov.w r3, #80 @ 0x50
- 8016b7a: f383 8811 msr BASEPRI, r3
- 8016b7e: f3bf 8f6f isb sy
- 8016b82: f3bf 8f4f dsb sy
- 8016b86: 617b str r3, [r7, #20]
- }
- 8016b88: bf00 nop
- 8016b8a: bf00 nop
- 8016b8c: e7fd b.n 8016b8a <xTimerCreateStatic+0x4c>
- pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 !e9087 StaticTimer_t is a pointer to a Timer_t, so guaranteed to be aligned and sized correctly (checked by an assert()), so this is safe. */
- 8016b8e: 6afb ldr r3, [r7, #44] @ 0x2c
- 8016b90: 61fb str r3, [r7, #28]
- if( pxNewTimer != NULL )
- 8016b92: 69fb ldr r3, [r7, #28]
- 8016b94: 2b00 cmp r3, #0
- 8016b96: d00d beq.n 8016bb4 <xTimerCreateStatic+0x76>
- {
- /* Timers can be created statically or dynamically so note this
- timer was created statically in case it is later deleted. The
- auto-reload bit may get set in prvInitialiseNewTimer(). */
- pxNewTimer->ucStatus = tmrSTATUS_IS_STATICALLY_ALLOCATED;
- 8016b98: 69fb ldr r3, [r7, #28]
- 8016b9a: 2202 movs r2, #2
- 8016b9c: f883 2028 strb.w r2, [r3, #40] @ 0x28
- prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
- 8016ba0: 69fb ldr r3, [r7, #28]
- 8016ba2: 9301 str r3, [sp, #4]
- 8016ba4: 6abb ldr r3, [r7, #40] @ 0x28
- 8016ba6: 9300 str r3, [sp, #0]
- 8016ba8: 683b ldr r3, [r7, #0]
- 8016baa: 687a ldr r2, [r7, #4]
- 8016bac: 68b9 ldr r1, [r7, #8]
- 8016bae: 68f8 ldr r0, [r7, #12]
- 8016bb0: f000 f805 bl 8016bbe <prvInitialiseNewTimer>
- }
- return pxNewTimer;
- 8016bb4: 69fb ldr r3, [r7, #28]
- }
- 8016bb6: 4618 mov r0, r3
- 8016bb8: 3720 adds r7, #32
- 8016bba: 46bd mov sp, r7
- 8016bbc: bd80 pop {r7, pc}
- 08016bbe <prvInitialiseNewTimer>:
- const TickType_t xTimerPeriodInTicks,
- const UBaseType_t uxAutoReload,
- void * const pvTimerID,
- TimerCallbackFunction_t pxCallbackFunction,
- Timer_t *pxNewTimer )
- {
- 8016bbe: b580 push {r7, lr}
- 8016bc0: b086 sub sp, #24
- 8016bc2: af00 add r7, sp, #0
- 8016bc4: 60f8 str r0, [r7, #12]
- 8016bc6: 60b9 str r1, [r7, #8]
- 8016bc8: 607a str r2, [r7, #4]
- 8016bca: 603b str r3, [r7, #0]
- /* 0 is not a valid value for xTimerPeriodInTicks. */
- configASSERT( ( xTimerPeriodInTicks > 0 ) );
- 8016bcc: 68bb ldr r3, [r7, #8]
- 8016bce: 2b00 cmp r3, #0
- 8016bd0: d10b bne.n 8016bea <prvInitialiseNewTimer+0x2c>
- __asm volatile
- 8016bd2: f04f 0350 mov.w r3, #80 @ 0x50
- 8016bd6: f383 8811 msr BASEPRI, r3
- 8016bda: f3bf 8f6f isb sy
- 8016bde: f3bf 8f4f dsb sy
- 8016be2: 617b str r3, [r7, #20]
- }
- 8016be4: bf00 nop
- 8016be6: bf00 nop
- 8016be8: e7fd b.n 8016be6 <prvInitialiseNewTimer+0x28>
- if( pxNewTimer != NULL )
- 8016bea: 6a7b ldr r3, [r7, #36] @ 0x24
- 8016bec: 2b00 cmp r3, #0
- 8016bee: d01e beq.n 8016c2e <prvInitialiseNewTimer+0x70>
- {
- /* Ensure the infrastructure used by the timer service task has been
- created/initialised. */
- prvCheckForValidListAndQueue();
- 8016bf0: f000 faf2 bl 80171d8 <prvCheckForValidListAndQueue>
- /* Initialise the timer structure members using the function
- parameters. */
- pxNewTimer->pcTimerName = pcTimerName;
- 8016bf4: 6a7b ldr r3, [r7, #36] @ 0x24
- 8016bf6: 68fa ldr r2, [r7, #12]
- 8016bf8: 601a str r2, [r3, #0]
- pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks;
- 8016bfa: 6a7b ldr r3, [r7, #36] @ 0x24
- 8016bfc: 68ba ldr r2, [r7, #8]
- 8016bfe: 619a str r2, [r3, #24]
- pxNewTimer->pvTimerID = pvTimerID;
- 8016c00: 6a7b ldr r3, [r7, #36] @ 0x24
- 8016c02: 683a ldr r2, [r7, #0]
- 8016c04: 61da str r2, [r3, #28]
- pxNewTimer->pxCallbackFunction = pxCallbackFunction;
- 8016c06: 6a7b ldr r3, [r7, #36] @ 0x24
- 8016c08: 6a3a ldr r2, [r7, #32]
- 8016c0a: 621a str r2, [r3, #32]
- vListInitialiseItem( &( pxNewTimer->xTimerListItem ) );
- 8016c0c: 6a7b ldr r3, [r7, #36] @ 0x24
- 8016c0e: 3304 adds r3, #4
- 8016c10: 4618 mov r0, r3
- 8016c12: f7fd fa91 bl 8014138 <vListInitialiseItem>
- if( uxAutoReload != pdFALSE )
- 8016c16: 687b ldr r3, [r7, #4]
- 8016c18: 2b00 cmp r3, #0
- 8016c1a: d008 beq.n 8016c2e <prvInitialiseNewTimer+0x70>
- {
- pxNewTimer->ucStatus |= tmrSTATUS_IS_AUTORELOAD;
- 8016c1c: 6a7b ldr r3, [r7, #36] @ 0x24
- 8016c1e: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
- 8016c22: f043 0304 orr.w r3, r3, #4
- 8016c26: b2da uxtb r2, r3
- 8016c28: 6a7b ldr r3, [r7, #36] @ 0x24
- 8016c2a: f883 2028 strb.w r2, [r3, #40] @ 0x28
- }
- traceTIMER_CREATE( pxNewTimer );
- }
- }
- 8016c2e: bf00 nop
- 8016c30: 3718 adds r7, #24
- 8016c32: 46bd mov sp, r7
- 8016c34: bd80 pop {r7, pc}
- ...
- 08016c38 <xTimerGenericCommand>:
- /*-----------------------------------------------------------*/
- BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait )
- {
- 8016c38: b580 push {r7, lr}
- 8016c3a: b08a sub sp, #40 @ 0x28
- 8016c3c: af00 add r7, sp, #0
- 8016c3e: 60f8 str r0, [r7, #12]
- 8016c40: 60b9 str r1, [r7, #8]
- 8016c42: 607a str r2, [r7, #4]
- 8016c44: 603b str r3, [r7, #0]
- BaseType_t xReturn = pdFAIL;
- 8016c46: 2300 movs r3, #0
- 8016c48: 627b str r3, [r7, #36] @ 0x24
- DaemonTaskMessage_t xMessage;
- configASSERT( xTimer );
- 8016c4a: 68fb ldr r3, [r7, #12]
- 8016c4c: 2b00 cmp r3, #0
- 8016c4e: d10b bne.n 8016c68 <xTimerGenericCommand+0x30>
- __asm volatile
- 8016c50: f04f 0350 mov.w r3, #80 @ 0x50
- 8016c54: f383 8811 msr BASEPRI, r3
- 8016c58: f3bf 8f6f isb sy
- 8016c5c: f3bf 8f4f dsb sy
- 8016c60: 623b str r3, [r7, #32]
- }
- 8016c62: bf00 nop
- 8016c64: bf00 nop
- 8016c66: e7fd b.n 8016c64 <xTimerGenericCommand+0x2c>
- /* Send a message to the timer service task to perform a particular action
- on a particular timer definition. */
- if( xTimerQueue != NULL )
- 8016c68: 4b19 ldr r3, [pc, #100] @ (8016cd0 <xTimerGenericCommand+0x98>)
- 8016c6a: 681b ldr r3, [r3, #0]
- 8016c6c: 2b00 cmp r3, #0
- 8016c6e: d02a beq.n 8016cc6 <xTimerGenericCommand+0x8e>
- {
- /* Send a command to the timer service task to start the xTimer timer. */
- xMessage.xMessageID = xCommandID;
- 8016c70: 68bb ldr r3, [r7, #8]
- 8016c72: 613b str r3, [r7, #16]
- xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;
- 8016c74: 687b ldr r3, [r7, #4]
- 8016c76: 617b str r3, [r7, #20]
- xMessage.u.xTimerParameters.pxTimer = xTimer;
- 8016c78: 68fb ldr r3, [r7, #12]
- 8016c7a: 61bb str r3, [r7, #24]
- if( xCommandID < tmrFIRST_FROM_ISR_COMMAND )
- 8016c7c: 68bb ldr r3, [r7, #8]
- 8016c7e: 2b05 cmp r3, #5
- 8016c80: dc18 bgt.n 8016cb4 <xTimerGenericCommand+0x7c>
- {
- if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
- 8016c82: f7ff fae1 bl 8016248 <xTaskGetSchedulerState>
- 8016c86: 4603 mov r3, r0
- 8016c88: 2b02 cmp r3, #2
- 8016c8a: d109 bne.n 8016ca0 <xTimerGenericCommand+0x68>
- {
- xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
- 8016c8c: 4b10 ldr r3, [pc, #64] @ (8016cd0 <xTimerGenericCommand+0x98>)
- 8016c8e: 6818 ldr r0, [r3, #0]
- 8016c90: f107 0110 add.w r1, r7, #16
- 8016c94: 2300 movs r3, #0
- 8016c96: 6b3a ldr r2, [r7, #48] @ 0x30
- 8016c98: f7fd fce0 bl 801465c <xQueueGenericSend>
- 8016c9c: 6278 str r0, [r7, #36] @ 0x24
- 8016c9e: e012 b.n 8016cc6 <xTimerGenericCommand+0x8e>
- }
- else
- {
- xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
- 8016ca0: 4b0b ldr r3, [pc, #44] @ (8016cd0 <xTimerGenericCommand+0x98>)
- 8016ca2: 6818 ldr r0, [r3, #0]
- 8016ca4: f107 0110 add.w r1, r7, #16
- 8016ca8: 2300 movs r3, #0
- 8016caa: 2200 movs r2, #0
- 8016cac: f7fd fcd6 bl 801465c <xQueueGenericSend>
- 8016cb0: 6278 str r0, [r7, #36] @ 0x24
- 8016cb2: e008 b.n 8016cc6 <xTimerGenericCommand+0x8e>
- }
- }
- else
- {
- xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
- 8016cb4: 4b06 ldr r3, [pc, #24] @ (8016cd0 <xTimerGenericCommand+0x98>)
- 8016cb6: 6818 ldr r0, [r3, #0]
- 8016cb8: f107 0110 add.w r1, r7, #16
- 8016cbc: 2300 movs r3, #0
- 8016cbe: 683a ldr r2, [r7, #0]
- 8016cc0: f7fd fdce bl 8014860 <xQueueGenericSendFromISR>
- 8016cc4: 6278 str r0, [r7, #36] @ 0x24
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- return xReturn;
- 8016cc6: 6a7b ldr r3, [r7, #36] @ 0x24
- }
- 8016cc8: 4618 mov r0, r3
- 8016cca: 3728 adds r7, #40 @ 0x28
- 8016ccc: 46bd mov sp, r7
- 8016cce: bd80 pop {r7, pc}
- 8016cd0: 24002bc4 .word 0x24002bc4
- 08016cd4 <prvProcessExpiredTimer>:
- return pxTimer->pcTimerName;
- }
- /*-----------------------------------------------------------*/
- static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow )
- {
- 8016cd4: b580 push {r7, lr}
- 8016cd6: b088 sub sp, #32
- 8016cd8: af02 add r7, sp, #8
- 8016cda: 6078 str r0, [r7, #4]
- 8016cdc: 6039 str r1, [r7, #0]
- BaseType_t xResult;
- Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
- 8016cde: 4b23 ldr r3, [pc, #140] @ (8016d6c <prvProcessExpiredTimer+0x98>)
- 8016ce0: 681b ldr r3, [r3, #0]
- 8016ce2: 68db ldr r3, [r3, #12]
- 8016ce4: 68db ldr r3, [r3, #12]
- 8016ce6: 617b str r3, [r7, #20]
- /* Remove the timer from the list of active timers. A check has already
- been performed to ensure the list is not empty. */
- ( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
- 8016ce8: 697b ldr r3, [r7, #20]
- 8016cea: 3304 adds r3, #4
- 8016cec: 4618 mov r0, r3
- 8016cee: f7fd fa8d bl 801420c <uxListRemove>
- traceTIMER_EXPIRED( pxTimer );
- /* If the timer is an auto-reload timer then calculate the next
- expiry time and re-insert the timer in the list of active timers. */
- if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
- 8016cf2: 697b ldr r3, [r7, #20]
- 8016cf4: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
- 8016cf8: f003 0304 and.w r3, r3, #4
- 8016cfc: 2b00 cmp r3, #0
- 8016cfe: d023 beq.n 8016d48 <prvProcessExpiredTimer+0x74>
- {
- /* The timer is inserted into a list using a time relative to anything
- other than the current time. It will therefore be inserted into the
- correct list relative to the time this task thinks it is now. */
- if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE )
- 8016d00: 697b ldr r3, [r7, #20]
- 8016d02: 699a ldr r2, [r3, #24]
- 8016d04: 687b ldr r3, [r7, #4]
- 8016d06: 18d1 adds r1, r2, r3
- 8016d08: 687b ldr r3, [r7, #4]
- 8016d0a: 683a ldr r2, [r7, #0]
- 8016d0c: 6978 ldr r0, [r7, #20]
- 8016d0e: f000 f8d5 bl 8016ebc <prvInsertTimerInActiveList>
- 8016d12: 4603 mov r3, r0
- 8016d14: 2b00 cmp r3, #0
- 8016d16: d020 beq.n 8016d5a <prvProcessExpiredTimer+0x86>
- {
- /* The timer expired before it was added to the active timer
- list. Reload it now. */
- xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
- 8016d18: 2300 movs r3, #0
- 8016d1a: 9300 str r3, [sp, #0]
- 8016d1c: 2300 movs r3, #0
- 8016d1e: 687a ldr r2, [r7, #4]
- 8016d20: 2100 movs r1, #0
- 8016d22: 6978 ldr r0, [r7, #20]
- 8016d24: f7ff ff88 bl 8016c38 <xTimerGenericCommand>
- 8016d28: 6138 str r0, [r7, #16]
- configASSERT( xResult );
- 8016d2a: 693b ldr r3, [r7, #16]
- 8016d2c: 2b00 cmp r3, #0
- 8016d2e: d114 bne.n 8016d5a <prvProcessExpiredTimer+0x86>
- __asm volatile
- 8016d30: f04f 0350 mov.w r3, #80 @ 0x50
- 8016d34: f383 8811 msr BASEPRI, r3
- 8016d38: f3bf 8f6f isb sy
- 8016d3c: f3bf 8f4f dsb sy
- 8016d40: 60fb str r3, [r7, #12]
- }
- 8016d42: bf00 nop
- 8016d44: bf00 nop
- 8016d46: e7fd b.n 8016d44 <prvProcessExpiredTimer+0x70>
- mtCOVERAGE_TEST_MARKER();
- }
- }
- else
- {
- pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
- 8016d48: 697b ldr r3, [r7, #20]
- 8016d4a: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
- 8016d4e: f023 0301 bic.w r3, r3, #1
- 8016d52: b2da uxtb r2, r3
- 8016d54: 697b ldr r3, [r7, #20]
- 8016d56: f883 2028 strb.w r2, [r3, #40] @ 0x28
- mtCOVERAGE_TEST_MARKER();
- }
- /* Call the timer callback. */
- pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
- 8016d5a: 697b ldr r3, [r7, #20]
- 8016d5c: 6a1b ldr r3, [r3, #32]
- 8016d5e: 6978 ldr r0, [r7, #20]
- 8016d60: 4798 blx r3
- }
- 8016d62: bf00 nop
- 8016d64: 3718 adds r7, #24
- 8016d66: 46bd mov sp, r7
- 8016d68: bd80 pop {r7, pc}
- 8016d6a: bf00 nop
- 8016d6c: 24002bbc .word 0x24002bbc
- 08016d70 <prvTimerTask>:
- /*-----------------------------------------------------------*/
- static portTASK_FUNCTION( prvTimerTask, pvParameters )
- {
- 8016d70: b580 push {r7, lr}
- 8016d72: b084 sub sp, #16
- 8016d74: af00 add r7, sp, #0
- 8016d76: 6078 str r0, [r7, #4]
- for( ;; )
- {
- /* Query the timers list to see if it contains any timers, and if so,
- obtain the time at which the next timer will expire. */
- xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
- 8016d78: f107 0308 add.w r3, r7, #8
- 8016d7c: 4618 mov r0, r3
- 8016d7e: f000 f859 bl 8016e34 <prvGetNextExpireTime>
- 8016d82: 60f8 str r0, [r7, #12]
- /* If a timer has expired, process it. Otherwise, block this task
- until either a timer does expire, or a command is received. */
- prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
- 8016d84: 68bb ldr r3, [r7, #8]
- 8016d86: 4619 mov r1, r3
- 8016d88: 68f8 ldr r0, [r7, #12]
- 8016d8a: f000 f805 bl 8016d98 <prvProcessTimerOrBlockTask>
- /* Empty the command queue. */
- prvProcessReceivedCommands();
- 8016d8e: f000 f8d7 bl 8016f40 <prvProcessReceivedCommands>
- xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
- 8016d92: bf00 nop
- 8016d94: e7f0 b.n 8016d78 <prvTimerTask+0x8>
- ...
- 08016d98 <prvProcessTimerOrBlockTask>:
- }
- }
- /*-----------------------------------------------------------*/
- static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty )
- {
- 8016d98: b580 push {r7, lr}
- 8016d9a: b084 sub sp, #16
- 8016d9c: af00 add r7, sp, #0
- 8016d9e: 6078 str r0, [r7, #4]
- 8016da0: 6039 str r1, [r7, #0]
- TickType_t xTimeNow;
- BaseType_t xTimerListsWereSwitched;
- vTaskSuspendAll();
- 8016da2: f7fe fe17 bl 80159d4 <vTaskSuspendAll>
- /* Obtain the time now to make an assessment as to whether the timer
- has expired or not. If obtaining the time causes the lists to switch
- then don't process this timer as any timers that remained in the list
- when the lists were switched will have been processed within the
- prvSampleTimeNow() function. */
- xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
- 8016da6: f107 0308 add.w r3, r7, #8
- 8016daa: 4618 mov r0, r3
- 8016dac: f000 f866 bl 8016e7c <prvSampleTimeNow>
- 8016db0: 60f8 str r0, [r7, #12]
- if( xTimerListsWereSwitched == pdFALSE )
- 8016db2: 68bb ldr r3, [r7, #8]
- 8016db4: 2b00 cmp r3, #0
- 8016db6: d130 bne.n 8016e1a <prvProcessTimerOrBlockTask+0x82>
- {
- /* The tick count has not overflowed, has the timer expired? */
- if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
- 8016db8: 683b ldr r3, [r7, #0]
- 8016dba: 2b00 cmp r3, #0
- 8016dbc: d10a bne.n 8016dd4 <prvProcessTimerOrBlockTask+0x3c>
- 8016dbe: 687a ldr r2, [r7, #4]
- 8016dc0: 68fb ldr r3, [r7, #12]
- 8016dc2: 429a cmp r2, r3
- 8016dc4: d806 bhi.n 8016dd4 <prvProcessTimerOrBlockTask+0x3c>
- {
- ( void ) xTaskResumeAll();
- 8016dc6: f7fe fe13 bl 80159f0 <xTaskResumeAll>
- prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
- 8016dca: 68f9 ldr r1, [r7, #12]
- 8016dcc: 6878 ldr r0, [r7, #4]
- 8016dce: f7ff ff81 bl 8016cd4 <prvProcessExpiredTimer>
- else
- {
- ( void ) xTaskResumeAll();
- }
- }
- }
- 8016dd2: e024 b.n 8016e1e <prvProcessTimerOrBlockTask+0x86>
- if( xListWasEmpty != pdFALSE )
- 8016dd4: 683b ldr r3, [r7, #0]
- 8016dd6: 2b00 cmp r3, #0
- 8016dd8: d008 beq.n 8016dec <prvProcessTimerOrBlockTask+0x54>
- xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
- 8016dda: 4b13 ldr r3, [pc, #76] @ (8016e28 <prvProcessTimerOrBlockTask+0x90>)
- 8016ddc: 681b ldr r3, [r3, #0]
- 8016dde: 681b ldr r3, [r3, #0]
- 8016de0: 2b00 cmp r3, #0
- 8016de2: d101 bne.n 8016de8 <prvProcessTimerOrBlockTask+0x50>
- 8016de4: 2301 movs r3, #1
- 8016de6: e000 b.n 8016dea <prvProcessTimerOrBlockTask+0x52>
- 8016de8: 2300 movs r3, #0
- 8016dea: 603b str r3, [r7, #0]
- vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
- 8016dec: 4b0f ldr r3, [pc, #60] @ (8016e2c <prvProcessTimerOrBlockTask+0x94>)
- 8016dee: 6818 ldr r0, [r3, #0]
- 8016df0: 687a ldr r2, [r7, #4]
- 8016df2: 68fb ldr r3, [r7, #12]
- 8016df4: 1ad3 subs r3, r2, r3
- 8016df6: 683a ldr r2, [r7, #0]
- 8016df8: 4619 mov r1, r3
- 8016dfa: f7fe f995 bl 8015128 <vQueueWaitForMessageRestricted>
- if( xTaskResumeAll() == pdFALSE )
- 8016dfe: f7fe fdf7 bl 80159f0 <xTaskResumeAll>
- 8016e02: 4603 mov r3, r0
- 8016e04: 2b00 cmp r3, #0
- 8016e06: d10a bne.n 8016e1e <prvProcessTimerOrBlockTask+0x86>
- portYIELD_WITHIN_API();
- 8016e08: 4b09 ldr r3, [pc, #36] @ (8016e30 <prvProcessTimerOrBlockTask+0x98>)
- 8016e0a: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 8016e0e: 601a str r2, [r3, #0]
- 8016e10: f3bf 8f4f dsb sy
- 8016e14: f3bf 8f6f isb sy
- }
- 8016e18: e001 b.n 8016e1e <prvProcessTimerOrBlockTask+0x86>
- ( void ) xTaskResumeAll();
- 8016e1a: f7fe fde9 bl 80159f0 <xTaskResumeAll>
- }
- 8016e1e: bf00 nop
- 8016e20: 3710 adds r7, #16
- 8016e22: 46bd mov sp, r7
- 8016e24: bd80 pop {r7, pc}
- 8016e26: bf00 nop
- 8016e28: 24002bc0 .word 0x24002bc0
- 8016e2c: 24002bc4 .word 0x24002bc4
- 8016e30: e000ed04 .word 0xe000ed04
- 08016e34 <prvGetNextExpireTime>:
- /*-----------------------------------------------------------*/
- static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )
- {
- 8016e34: b480 push {r7}
- 8016e36: b085 sub sp, #20
- 8016e38: af00 add r7, sp, #0
- 8016e3a: 6078 str r0, [r7, #4]
- the timer with the nearest expiry time will expire. If there are no
- active timers then just set the next expire time to 0. That will cause
- this task to unblock when the tick count overflows, at which point the
- timer lists will be switched and the next expiry time can be
- re-assessed. */
- *pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
- 8016e3c: 4b0e ldr r3, [pc, #56] @ (8016e78 <prvGetNextExpireTime+0x44>)
- 8016e3e: 681b ldr r3, [r3, #0]
- 8016e40: 681b ldr r3, [r3, #0]
- 8016e42: 2b00 cmp r3, #0
- 8016e44: d101 bne.n 8016e4a <prvGetNextExpireTime+0x16>
- 8016e46: 2201 movs r2, #1
- 8016e48: e000 b.n 8016e4c <prvGetNextExpireTime+0x18>
- 8016e4a: 2200 movs r2, #0
- 8016e4c: 687b ldr r3, [r7, #4]
- 8016e4e: 601a str r2, [r3, #0]
- if( *pxListWasEmpty == pdFALSE )
- 8016e50: 687b ldr r3, [r7, #4]
- 8016e52: 681b ldr r3, [r3, #0]
- 8016e54: 2b00 cmp r3, #0
- 8016e56: d105 bne.n 8016e64 <prvGetNextExpireTime+0x30>
- {
- xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
- 8016e58: 4b07 ldr r3, [pc, #28] @ (8016e78 <prvGetNextExpireTime+0x44>)
- 8016e5a: 681b ldr r3, [r3, #0]
- 8016e5c: 68db ldr r3, [r3, #12]
- 8016e5e: 681b ldr r3, [r3, #0]
- 8016e60: 60fb str r3, [r7, #12]
- 8016e62: e001 b.n 8016e68 <prvGetNextExpireTime+0x34>
- }
- else
- {
- /* Ensure the task unblocks when the tick count rolls over. */
- xNextExpireTime = ( TickType_t ) 0U;
- 8016e64: 2300 movs r3, #0
- 8016e66: 60fb str r3, [r7, #12]
- }
- return xNextExpireTime;
- 8016e68: 68fb ldr r3, [r7, #12]
- }
- 8016e6a: 4618 mov r0, r3
- 8016e6c: 3714 adds r7, #20
- 8016e6e: 46bd mov sp, r7
- 8016e70: f85d 7b04 ldr.w r7, [sp], #4
- 8016e74: 4770 bx lr
- 8016e76: bf00 nop
- 8016e78: 24002bbc .word 0x24002bbc
- 08016e7c <prvSampleTimeNow>:
- /*-----------------------------------------------------------*/
- static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )
- {
- 8016e7c: b580 push {r7, lr}
- 8016e7e: b084 sub sp, #16
- 8016e80: af00 add r7, sp, #0
- 8016e82: 6078 str r0, [r7, #4]
- TickType_t xTimeNow;
- PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */
- xTimeNow = xTaskGetTickCount();
- 8016e84: f7fe fe52 bl 8015b2c <xTaskGetTickCount>
- 8016e88: 60f8 str r0, [r7, #12]
- if( xTimeNow < xLastTime )
- 8016e8a: 4b0b ldr r3, [pc, #44] @ (8016eb8 <prvSampleTimeNow+0x3c>)
- 8016e8c: 681b ldr r3, [r3, #0]
- 8016e8e: 68fa ldr r2, [r7, #12]
- 8016e90: 429a cmp r2, r3
- 8016e92: d205 bcs.n 8016ea0 <prvSampleTimeNow+0x24>
- {
- prvSwitchTimerLists();
- 8016e94: f000 f93a bl 801710c <prvSwitchTimerLists>
- *pxTimerListsWereSwitched = pdTRUE;
- 8016e98: 687b ldr r3, [r7, #4]
- 8016e9a: 2201 movs r2, #1
- 8016e9c: 601a str r2, [r3, #0]
- 8016e9e: e002 b.n 8016ea6 <prvSampleTimeNow+0x2a>
- }
- else
- {
- *pxTimerListsWereSwitched = pdFALSE;
- 8016ea0: 687b ldr r3, [r7, #4]
- 8016ea2: 2200 movs r2, #0
- 8016ea4: 601a str r2, [r3, #0]
- }
- xLastTime = xTimeNow;
- 8016ea6: 4a04 ldr r2, [pc, #16] @ (8016eb8 <prvSampleTimeNow+0x3c>)
- 8016ea8: 68fb ldr r3, [r7, #12]
- 8016eaa: 6013 str r3, [r2, #0]
- return xTimeNow;
- 8016eac: 68fb ldr r3, [r7, #12]
- }
- 8016eae: 4618 mov r0, r3
- 8016eb0: 3710 adds r7, #16
- 8016eb2: 46bd mov sp, r7
- 8016eb4: bd80 pop {r7, pc}
- 8016eb6: bf00 nop
- 8016eb8: 24002bcc .word 0x24002bcc
- 08016ebc <prvInsertTimerInActiveList>:
- /*-----------------------------------------------------------*/
- static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime )
- {
- 8016ebc: b580 push {r7, lr}
- 8016ebe: b086 sub sp, #24
- 8016ec0: af00 add r7, sp, #0
- 8016ec2: 60f8 str r0, [r7, #12]
- 8016ec4: 60b9 str r1, [r7, #8]
- 8016ec6: 607a str r2, [r7, #4]
- 8016ec8: 603b str r3, [r7, #0]
- BaseType_t xProcessTimerNow = pdFALSE;
- 8016eca: 2300 movs r3, #0
- 8016ecc: 617b str r3, [r7, #20]
- listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
- 8016ece: 68fb ldr r3, [r7, #12]
- 8016ed0: 68ba ldr r2, [r7, #8]
- 8016ed2: 605a str r2, [r3, #4]
- listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
- 8016ed4: 68fb ldr r3, [r7, #12]
- 8016ed6: 68fa ldr r2, [r7, #12]
- 8016ed8: 611a str r2, [r3, #16]
- if( xNextExpiryTime <= xTimeNow )
- 8016eda: 68ba ldr r2, [r7, #8]
- 8016edc: 687b ldr r3, [r7, #4]
- 8016ede: 429a cmp r2, r3
- 8016ee0: d812 bhi.n 8016f08 <prvInsertTimerInActiveList+0x4c>
- {
- /* Has the expiry time elapsed between the command to start/reset a
- timer was issued, and the time the command was processed? */
- if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
- 8016ee2: 687a ldr r2, [r7, #4]
- 8016ee4: 683b ldr r3, [r7, #0]
- 8016ee6: 1ad2 subs r2, r2, r3
- 8016ee8: 68fb ldr r3, [r7, #12]
- 8016eea: 699b ldr r3, [r3, #24]
- 8016eec: 429a cmp r2, r3
- 8016eee: d302 bcc.n 8016ef6 <prvInsertTimerInActiveList+0x3a>
- {
- /* The time between a command being issued and the command being
- processed actually exceeds the timers period. */
- xProcessTimerNow = pdTRUE;
- 8016ef0: 2301 movs r3, #1
- 8016ef2: 617b str r3, [r7, #20]
- 8016ef4: e01b b.n 8016f2e <prvInsertTimerInActiveList+0x72>
- }
- else
- {
- vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
- 8016ef6: 4b10 ldr r3, [pc, #64] @ (8016f38 <prvInsertTimerInActiveList+0x7c>)
- 8016ef8: 681a ldr r2, [r3, #0]
- 8016efa: 68fb ldr r3, [r7, #12]
- 8016efc: 3304 adds r3, #4
- 8016efe: 4619 mov r1, r3
- 8016f00: 4610 mov r0, r2
- 8016f02: f7fd f94a bl 801419a <vListInsert>
- 8016f06: e012 b.n 8016f2e <prvInsertTimerInActiveList+0x72>
- }
- }
- else
- {
- if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
- 8016f08: 687a ldr r2, [r7, #4]
- 8016f0a: 683b ldr r3, [r7, #0]
- 8016f0c: 429a cmp r2, r3
- 8016f0e: d206 bcs.n 8016f1e <prvInsertTimerInActiveList+0x62>
- 8016f10: 68ba ldr r2, [r7, #8]
- 8016f12: 683b ldr r3, [r7, #0]
- 8016f14: 429a cmp r2, r3
- 8016f16: d302 bcc.n 8016f1e <prvInsertTimerInActiveList+0x62>
- {
- /* If, since the command was issued, the tick count has overflowed
- but the expiry time has not, then the timer must have already passed
- its expiry time and should be processed immediately. */
- xProcessTimerNow = pdTRUE;
- 8016f18: 2301 movs r3, #1
- 8016f1a: 617b str r3, [r7, #20]
- 8016f1c: e007 b.n 8016f2e <prvInsertTimerInActiveList+0x72>
- }
- else
- {
- vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
- 8016f1e: 4b07 ldr r3, [pc, #28] @ (8016f3c <prvInsertTimerInActiveList+0x80>)
- 8016f20: 681a ldr r2, [r3, #0]
- 8016f22: 68fb ldr r3, [r7, #12]
- 8016f24: 3304 adds r3, #4
- 8016f26: 4619 mov r1, r3
- 8016f28: 4610 mov r0, r2
- 8016f2a: f7fd f936 bl 801419a <vListInsert>
- }
- }
- return xProcessTimerNow;
- 8016f2e: 697b ldr r3, [r7, #20]
- }
- 8016f30: 4618 mov r0, r3
- 8016f32: 3718 adds r7, #24
- 8016f34: 46bd mov sp, r7
- 8016f36: bd80 pop {r7, pc}
- 8016f38: 24002bc0 .word 0x24002bc0
- 8016f3c: 24002bbc .word 0x24002bbc
- 08016f40 <prvProcessReceivedCommands>:
- /*-----------------------------------------------------------*/
- static void prvProcessReceivedCommands( void )
- {
- 8016f40: b580 push {r7, lr}
- 8016f42: b08e sub sp, #56 @ 0x38
- 8016f44: af02 add r7, sp, #8
- DaemonTaskMessage_t xMessage;
- Timer_t *pxTimer;
- BaseType_t xTimerListsWereSwitched, xResult;
- TickType_t xTimeNow;
- while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
- 8016f46: e0ce b.n 80170e6 <prvProcessReceivedCommands+0x1a6>
- {
- #if ( INCLUDE_xTimerPendFunctionCall == 1 )
- {
- /* Negative commands are pended function calls rather than timer
- commands. */
- if( xMessage.xMessageID < ( BaseType_t ) 0 )
- 8016f48: 687b ldr r3, [r7, #4]
- 8016f4a: 2b00 cmp r3, #0
- 8016f4c: da19 bge.n 8016f82 <prvProcessReceivedCommands+0x42>
- {
- const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );
- 8016f4e: 1d3b adds r3, r7, #4
- 8016f50: 3304 adds r3, #4
- 8016f52: 62fb str r3, [r7, #44] @ 0x2c
- /* The timer uses the xCallbackParameters member to request a
- callback be executed. Check the callback is not NULL. */
- configASSERT( pxCallback );
- 8016f54: 6afb ldr r3, [r7, #44] @ 0x2c
- 8016f56: 2b00 cmp r3, #0
- 8016f58: d10b bne.n 8016f72 <prvProcessReceivedCommands+0x32>
- __asm volatile
- 8016f5a: f04f 0350 mov.w r3, #80 @ 0x50
- 8016f5e: f383 8811 msr BASEPRI, r3
- 8016f62: f3bf 8f6f isb sy
- 8016f66: f3bf 8f4f dsb sy
- 8016f6a: 61fb str r3, [r7, #28]
- }
- 8016f6c: bf00 nop
- 8016f6e: bf00 nop
- 8016f70: e7fd b.n 8016f6e <prvProcessReceivedCommands+0x2e>
- /* Call the function. */
- pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 );
- 8016f72: 6afb ldr r3, [r7, #44] @ 0x2c
- 8016f74: 681b ldr r3, [r3, #0]
- 8016f76: 6afa ldr r2, [r7, #44] @ 0x2c
- 8016f78: 6850 ldr r0, [r2, #4]
- 8016f7a: 6afa ldr r2, [r7, #44] @ 0x2c
- 8016f7c: 6892 ldr r2, [r2, #8]
- 8016f7e: 4611 mov r1, r2
- 8016f80: 4798 blx r3
- }
- #endif /* INCLUDE_xTimerPendFunctionCall */
- /* Commands that are positive are timer commands rather than pended
- function calls. */
- if( xMessage.xMessageID >= ( BaseType_t ) 0 )
- 8016f82: 687b ldr r3, [r7, #4]
- 8016f84: 2b00 cmp r3, #0
- 8016f86: f2c0 80ae blt.w 80170e6 <prvProcessReceivedCommands+0x1a6>
- {
- /* The messages uses the xTimerParameters member to work on a
- software timer. */
- pxTimer = xMessage.u.xTimerParameters.pxTimer;
- 8016f8a: 68fb ldr r3, [r7, #12]
- 8016f8c: 62bb str r3, [r7, #40] @ 0x28
- if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */
- 8016f8e: 6abb ldr r3, [r7, #40] @ 0x28
- 8016f90: 695b ldr r3, [r3, #20]
- 8016f92: 2b00 cmp r3, #0
- 8016f94: d004 beq.n 8016fa0 <prvProcessReceivedCommands+0x60>
- {
- /* The timer is in a list, remove it. */
- ( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
- 8016f96: 6abb ldr r3, [r7, #40] @ 0x28
- 8016f98: 3304 adds r3, #4
- 8016f9a: 4618 mov r0, r3
- 8016f9c: f7fd f936 bl 801420c <uxListRemove>
- it must be present in the function call. prvSampleTimeNow() must be
- called after the message is received from xTimerQueue so there is no
- possibility of a higher priority task adding a message to the message
- queue with a time that is ahead of the timer daemon task (because it
- pre-empted the timer daemon task after the xTimeNow value was set). */
- xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
- 8016fa0: 463b mov r3, r7
- 8016fa2: 4618 mov r0, r3
- 8016fa4: f7ff ff6a bl 8016e7c <prvSampleTimeNow>
- 8016fa8: 6278 str r0, [r7, #36] @ 0x24
- switch( xMessage.xMessageID )
- 8016faa: 687b ldr r3, [r7, #4]
- 8016fac: 2b09 cmp r3, #9
- 8016fae: f200 8097 bhi.w 80170e0 <prvProcessReceivedCommands+0x1a0>
- 8016fb2: a201 add r2, pc, #4 @ (adr r2, 8016fb8 <prvProcessReceivedCommands+0x78>)
- 8016fb4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8016fb8: 08016fe1 .word 0x08016fe1
- 8016fbc: 08016fe1 .word 0x08016fe1
- 8016fc0: 08016fe1 .word 0x08016fe1
- 8016fc4: 08017057 .word 0x08017057
- 8016fc8: 0801706b .word 0x0801706b
- 8016fcc: 080170b7 .word 0x080170b7
- 8016fd0: 08016fe1 .word 0x08016fe1
- 8016fd4: 08016fe1 .word 0x08016fe1
- 8016fd8: 08017057 .word 0x08017057
- 8016fdc: 0801706b .word 0x0801706b
- case tmrCOMMAND_START_FROM_ISR :
- case tmrCOMMAND_RESET :
- case tmrCOMMAND_RESET_FROM_ISR :
- case tmrCOMMAND_START_DONT_TRACE :
- /* Start or restart a timer. */
- pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
- 8016fe0: 6abb ldr r3, [r7, #40] @ 0x28
- 8016fe2: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
- 8016fe6: f043 0301 orr.w r3, r3, #1
- 8016fea: b2da uxtb r2, r3
- 8016fec: 6abb ldr r3, [r7, #40] @ 0x28
- 8016fee: f883 2028 strb.w r2, [r3, #40] @ 0x28
- if( prvInsertTimerInActiveList( pxTimer, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE )
- 8016ff2: 68ba ldr r2, [r7, #8]
- 8016ff4: 6abb ldr r3, [r7, #40] @ 0x28
- 8016ff6: 699b ldr r3, [r3, #24]
- 8016ff8: 18d1 adds r1, r2, r3
- 8016ffa: 68bb ldr r3, [r7, #8]
- 8016ffc: 6a7a ldr r2, [r7, #36] @ 0x24
- 8016ffe: 6ab8 ldr r0, [r7, #40] @ 0x28
- 8017000: f7ff ff5c bl 8016ebc <prvInsertTimerInActiveList>
- 8017004: 4603 mov r3, r0
- 8017006: 2b00 cmp r3, #0
- 8017008: d06c beq.n 80170e4 <prvProcessReceivedCommands+0x1a4>
- {
- /* The timer expired before it was added to the active
- timer list. Process it now. */
- pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
- 801700a: 6abb ldr r3, [r7, #40] @ 0x28
- 801700c: 6a1b ldr r3, [r3, #32]
- 801700e: 6ab8 ldr r0, [r7, #40] @ 0x28
- 8017010: 4798 blx r3
- traceTIMER_EXPIRED( pxTimer );
- if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
- 8017012: 6abb ldr r3, [r7, #40] @ 0x28
- 8017014: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
- 8017018: f003 0304 and.w r3, r3, #4
- 801701c: 2b00 cmp r3, #0
- 801701e: d061 beq.n 80170e4 <prvProcessReceivedCommands+0x1a4>
- {
- xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );
- 8017020: 68ba ldr r2, [r7, #8]
- 8017022: 6abb ldr r3, [r7, #40] @ 0x28
- 8017024: 699b ldr r3, [r3, #24]
- 8017026: 441a add r2, r3
- 8017028: 2300 movs r3, #0
- 801702a: 9300 str r3, [sp, #0]
- 801702c: 2300 movs r3, #0
- 801702e: 2100 movs r1, #0
- 8017030: 6ab8 ldr r0, [r7, #40] @ 0x28
- 8017032: f7ff fe01 bl 8016c38 <xTimerGenericCommand>
- 8017036: 6238 str r0, [r7, #32]
- configASSERT( xResult );
- 8017038: 6a3b ldr r3, [r7, #32]
- 801703a: 2b00 cmp r3, #0
- 801703c: d152 bne.n 80170e4 <prvProcessReceivedCommands+0x1a4>
- __asm volatile
- 801703e: f04f 0350 mov.w r3, #80 @ 0x50
- 8017042: f383 8811 msr BASEPRI, r3
- 8017046: f3bf 8f6f isb sy
- 801704a: f3bf 8f4f dsb sy
- 801704e: 61bb str r3, [r7, #24]
- }
- 8017050: bf00 nop
- 8017052: bf00 nop
- 8017054: e7fd b.n 8017052 <prvProcessReceivedCommands+0x112>
- break;
- case tmrCOMMAND_STOP :
- case tmrCOMMAND_STOP_FROM_ISR :
- /* The timer has already been removed from the active list. */
- pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
- 8017056: 6abb ldr r3, [r7, #40] @ 0x28
- 8017058: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
- 801705c: f023 0301 bic.w r3, r3, #1
- 8017060: b2da uxtb r2, r3
- 8017062: 6abb ldr r3, [r7, #40] @ 0x28
- 8017064: f883 2028 strb.w r2, [r3, #40] @ 0x28
- break;
- 8017068: e03d b.n 80170e6 <prvProcessReceivedCommands+0x1a6>
- case tmrCOMMAND_CHANGE_PERIOD :
- case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR :
- pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
- 801706a: 6abb ldr r3, [r7, #40] @ 0x28
- 801706c: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
- 8017070: f043 0301 orr.w r3, r3, #1
- 8017074: b2da uxtb r2, r3
- 8017076: 6abb ldr r3, [r7, #40] @ 0x28
- 8017078: f883 2028 strb.w r2, [r3, #40] @ 0x28
- pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue;
- 801707c: 68ba ldr r2, [r7, #8]
- 801707e: 6abb ldr r3, [r7, #40] @ 0x28
- 8017080: 619a str r2, [r3, #24]
- configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
- 8017082: 6abb ldr r3, [r7, #40] @ 0x28
- 8017084: 699b ldr r3, [r3, #24]
- 8017086: 2b00 cmp r3, #0
- 8017088: d10b bne.n 80170a2 <prvProcessReceivedCommands+0x162>
- __asm volatile
- 801708a: f04f 0350 mov.w r3, #80 @ 0x50
- 801708e: f383 8811 msr BASEPRI, r3
- 8017092: f3bf 8f6f isb sy
- 8017096: f3bf 8f4f dsb sy
- 801709a: 617b str r3, [r7, #20]
- }
- 801709c: bf00 nop
- 801709e: bf00 nop
- 80170a0: e7fd b.n 801709e <prvProcessReceivedCommands+0x15e>
- be longer or shorter than the old one. The command time is
- therefore set to the current time, and as the period cannot
- be zero the next expiry time can only be in the future,
- meaning (unlike for the xTimerStart() case above) there is
- no fail case that needs to be handled here. */
- ( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
- 80170a2: 6abb ldr r3, [r7, #40] @ 0x28
- 80170a4: 699a ldr r2, [r3, #24]
- 80170a6: 6a7b ldr r3, [r7, #36] @ 0x24
- 80170a8: 18d1 adds r1, r2, r3
- 80170aa: 6a7b ldr r3, [r7, #36] @ 0x24
- 80170ac: 6a7a ldr r2, [r7, #36] @ 0x24
- 80170ae: 6ab8 ldr r0, [r7, #40] @ 0x28
- 80170b0: f7ff ff04 bl 8016ebc <prvInsertTimerInActiveList>
- break;
- 80170b4: e017 b.n 80170e6 <prvProcessReceivedCommands+0x1a6>
- #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
- {
- /* The timer has already been removed from the active list,
- just free up the memory if the memory was dynamically
- allocated. */
- if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) 0 )
- 80170b6: 6abb ldr r3, [r7, #40] @ 0x28
- 80170b8: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
- 80170bc: f003 0302 and.w r3, r3, #2
- 80170c0: 2b00 cmp r3, #0
- 80170c2: d103 bne.n 80170cc <prvProcessReceivedCommands+0x18c>
- {
- vPortFree( pxTimer );
- 80170c4: 6ab8 ldr r0, [r7, #40] @ 0x28
- 80170c6: f000 fc37 bl 8017938 <vPortFree>
- no need to free the memory - just mark the timer as
- "not active". */
- pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
- }
- #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
- break;
- 80170ca: e00c b.n 80170e6 <prvProcessReceivedCommands+0x1a6>
- pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
- 80170cc: 6abb ldr r3, [r7, #40] @ 0x28
- 80170ce: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
- 80170d2: f023 0301 bic.w r3, r3, #1
- 80170d6: b2da uxtb r2, r3
- 80170d8: 6abb ldr r3, [r7, #40] @ 0x28
- 80170da: f883 2028 strb.w r2, [r3, #40] @ 0x28
- break;
- 80170de: e002 b.n 80170e6 <prvProcessReceivedCommands+0x1a6>
- default :
- /* Don't expect to get here. */
- break;
- 80170e0: bf00 nop
- 80170e2: e000 b.n 80170e6 <prvProcessReceivedCommands+0x1a6>
- break;
- 80170e4: bf00 nop
- while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
- 80170e6: 4b08 ldr r3, [pc, #32] @ (8017108 <prvProcessReceivedCommands+0x1c8>)
- 80170e8: 681b ldr r3, [r3, #0]
- 80170ea: 1d39 adds r1, r7, #4
- 80170ec: 2200 movs r2, #0
- 80170ee: 4618 mov r0, r3
- 80170f0: f7fd fc54 bl 801499c <xQueueReceive>
- 80170f4: 4603 mov r3, r0
- 80170f6: 2b00 cmp r3, #0
- 80170f8: f47f af26 bne.w 8016f48 <prvProcessReceivedCommands+0x8>
- }
- }
- }
- }
- 80170fc: bf00 nop
- 80170fe: bf00 nop
- 8017100: 3730 adds r7, #48 @ 0x30
- 8017102: 46bd mov sp, r7
- 8017104: bd80 pop {r7, pc}
- 8017106: bf00 nop
- 8017108: 24002bc4 .word 0x24002bc4
- 0801710c <prvSwitchTimerLists>:
- /*-----------------------------------------------------------*/
- static void prvSwitchTimerLists( void )
- {
- 801710c: b580 push {r7, lr}
- 801710e: b088 sub sp, #32
- 8017110: af02 add r7, sp, #8
- /* The tick count has overflowed. The timer lists must be switched.
- If there are any timers still referenced from the current timer list
- then they must have expired and should be processed before the lists
- are switched. */
- while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
- 8017112: e049 b.n 80171a8 <prvSwitchTimerLists+0x9c>
- {
- xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
- 8017114: 4b2e ldr r3, [pc, #184] @ (80171d0 <prvSwitchTimerLists+0xc4>)
- 8017116: 681b ldr r3, [r3, #0]
- 8017118: 68db ldr r3, [r3, #12]
- 801711a: 681b ldr r3, [r3, #0]
- 801711c: 613b str r3, [r7, #16]
- /* Remove the timer from the list. */
- pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
- 801711e: 4b2c ldr r3, [pc, #176] @ (80171d0 <prvSwitchTimerLists+0xc4>)
- 8017120: 681b ldr r3, [r3, #0]
- 8017122: 68db ldr r3, [r3, #12]
- 8017124: 68db ldr r3, [r3, #12]
- 8017126: 60fb str r3, [r7, #12]
- ( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
- 8017128: 68fb ldr r3, [r7, #12]
- 801712a: 3304 adds r3, #4
- 801712c: 4618 mov r0, r3
- 801712e: f7fd f86d bl 801420c <uxListRemove>
- traceTIMER_EXPIRED( pxTimer );
- /* Execute its callback, then send a command to restart the timer if
- it is an auto-reload timer. It cannot be restarted here as the lists
- have not yet been switched. */
- pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
- 8017132: 68fb ldr r3, [r7, #12]
- 8017134: 6a1b ldr r3, [r3, #32]
- 8017136: 68f8 ldr r0, [r7, #12]
- 8017138: 4798 blx r3
- if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
- 801713a: 68fb ldr r3, [r7, #12]
- 801713c: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
- 8017140: f003 0304 and.w r3, r3, #4
- 8017144: 2b00 cmp r3, #0
- 8017146: d02f beq.n 80171a8 <prvSwitchTimerLists+0x9c>
- the timer going into the same timer list then it has already expired
- and the timer should be re-inserted into the current list so it is
- processed again within this loop. Otherwise a command should be sent
- to restart the timer to ensure it is only inserted into a list after
- the lists have been swapped. */
- xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks );
- 8017148: 68fb ldr r3, [r7, #12]
- 801714a: 699b ldr r3, [r3, #24]
- 801714c: 693a ldr r2, [r7, #16]
- 801714e: 4413 add r3, r2
- 8017150: 60bb str r3, [r7, #8]
- if( xReloadTime > xNextExpireTime )
- 8017152: 68ba ldr r2, [r7, #8]
- 8017154: 693b ldr r3, [r7, #16]
- 8017156: 429a cmp r2, r3
- 8017158: d90e bls.n 8017178 <prvSwitchTimerLists+0x6c>
- {
- listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime );
- 801715a: 68fb ldr r3, [r7, #12]
- 801715c: 68ba ldr r2, [r7, #8]
- 801715e: 605a str r2, [r3, #4]
- listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
- 8017160: 68fb ldr r3, [r7, #12]
- 8017162: 68fa ldr r2, [r7, #12]
- 8017164: 611a str r2, [r3, #16]
- vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
- 8017166: 4b1a ldr r3, [pc, #104] @ (80171d0 <prvSwitchTimerLists+0xc4>)
- 8017168: 681a ldr r2, [r3, #0]
- 801716a: 68fb ldr r3, [r7, #12]
- 801716c: 3304 adds r3, #4
- 801716e: 4619 mov r1, r3
- 8017170: 4610 mov r0, r2
- 8017172: f7fd f812 bl 801419a <vListInsert>
- 8017176: e017 b.n 80171a8 <prvSwitchTimerLists+0x9c>
- }
- else
- {
- xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
- 8017178: 2300 movs r3, #0
- 801717a: 9300 str r3, [sp, #0]
- 801717c: 2300 movs r3, #0
- 801717e: 693a ldr r2, [r7, #16]
- 8017180: 2100 movs r1, #0
- 8017182: 68f8 ldr r0, [r7, #12]
- 8017184: f7ff fd58 bl 8016c38 <xTimerGenericCommand>
- 8017188: 6078 str r0, [r7, #4]
- configASSERT( xResult );
- 801718a: 687b ldr r3, [r7, #4]
- 801718c: 2b00 cmp r3, #0
- 801718e: d10b bne.n 80171a8 <prvSwitchTimerLists+0x9c>
- __asm volatile
- 8017190: f04f 0350 mov.w r3, #80 @ 0x50
- 8017194: f383 8811 msr BASEPRI, r3
- 8017198: f3bf 8f6f isb sy
- 801719c: f3bf 8f4f dsb sy
- 80171a0: 603b str r3, [r7, #0]
- }
- 80171a2: bf00 nop
- 80171a4: bf00 nop
- 80171a6: e7fd b.n 80171a4 <prvSwitchTimerLists+0x98>
- while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
- 80171a8: 4b09 ldr r3, [pc, #36] @ (80171d0 <prvSwitchTimerLists+0xc4>)
- 80171aa: 681b ldr r3, [r3, #0]
- 80171ac: 681b ldr r3, [r3, #0]
- 80171ae: 2b00 cmp r3, #0
- 80171b0: d1b0 bne.n 8017114 <prvSwitchTimerLists+0x8>
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- pxTemp = pxCurrentTimerList;
- 80171b2: 4b07 ldr r3, [pc, #28] @ (80171d0 <prvSwitchTimerLists+0xc4>)
- 80171b4: 681b ldr r3, [r3, #0]
- 80171b6: 617b str r3, [r7, #20]
- pxCurrentTimerList = pxOverflowTimerList;
- 80171b8: 4b06 ldr r3, [pc, #24] @ (80171d4 <prvSwitchTimerLists+0xc8>)
- 80171ba: 681b ldr r3, [r3, #0]
- 80171bc: 4a04 ldr r2, [pc, #16] @ (80171d0 <prvSwitchTimerLists+0xc4>)
- 80171be: 6013 str r3, [r2, #0]
- pxOverflowTimerList = pxTemp;
- 80171c0: 4a04 ldr r2, [pc, #16] @ (80171d4 <prvSwitchTimerLists+0xc8>)
- 80171c2: 697b ldr r3, [r7, #20]
- 80171c4: 6013 str r3, [r2, #0]
- }
- 80171c6: bf00 nop
- 80171c8: 3718 adds r7, #24
- 80171ca: 46bd mov sp, r7
- 80171cc: bd80 pop {r7, pc}
- 80171ce: bf00 nop
- 80171d0: 24002bbc .word 0x24002bbc
- 80171d4: 24002bc0 .word 0x24002bc0
- 080171d8 <prvCheckForValidListAndQueue>:
- /*-----------------------------------------------------------*/
- static void prvCheckForValidListAndQueue( void )
- {
- 80171d8: b580 push {r7, lr}
- 80171da: b082 sub sp, #8
- 80171dc: af02 add r7, sp, #8
- /* Check that the list from which active timers are referenced, and the
- queue used to communicate with the timer service, have been
- initialised. */
- taskENTER_CRITICAL();
- 80171de: f000 f9bb bl 8017558 <vPortEnterCritical>
- {
- if( xTimerQueue == NULL )
- 80171e2: 4b15 ldr r3, [pc, #84] @ (8017238 <prvCheckForValidListAndQueue+0x60>)
- 80171e4: 681b ldr r3, [r3, #0]
- 80171e6: 2b00 cmp r3, #0
- 80171e8: d120 bne.n 801722c <prvCheckForValidListAndQueue+0x54>
- {
- vListInitialise( &xActiveTimerList1 );
- 80171ea: 4814 ldr r0, [pc, #80] @ (801723c <prvCheckForValidListAndQueue+0x64>)
- 80171ec: f7fc ff84 bl 80140f8 <vListInitialise>
- vListInitialise( &xActiveTimerList2 );
- 80171f0: 4813 ldr r0, [pc, #76] @ (8017240 <prvCheckForValidListAndQueue+0x68>)
- 80171f2: f7fc ff81 bl 80140f8 <vListInitialise>
- pxCurrentTimerList = &xActiveTimerList1;
- 80171f6: 4b13 ldr r3, [pc, #76] @ (8017244 <prvCheckForValidListAndQueue+0x6c>)
- 80171f8: 4a10 ldr r2, [pc, #64] @ (801723c <prvCheckForValidListAndQueue+0x64>)
- 80171fa: 601a str r2, [r3, #0]
- pxOverflowTimerList = &xActiveTimerList2;
- 80171fc: 4b12 ldr r3, [pc, #72] @ (8017248 <prvCheckForValidListAndQueue+0x70>)
- 80171fe: 4a10 ldr r2, [pc, #64] @ (8017240 <prvCheckForValidListAndQueue+0x68>)
- 8017200: 601a str r2, [r3, #0]
- /* The timer queue is allocated statically in case
- configSUPPORT_DYNAMIC_ALLOCATION is 0. */
- static StaticQueue_t xStaticTimerQueue; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
- static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
- xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );
- 8017202: 2300 movs r3, #0
- 8017204: 9300 str r3, [sp, #0]
- 8017206: 4b11 ldr r3, [pc, #68] @ (801724c <prvCheckForValidListAndQueue+0x74>)
- 8017208: 4a11 ldr r2, [pc, #68] @ (8017250 <prvCheckForValidListAndQueue+0x78>)
- 801720a: 2110 movs r1, #16
- 801720c: 200a movs r0, #10
- 801720e: f7fd f891 bl 8014334 <xQueueGenericCreateStatic>
- 8017212: 4603 mov r3, r0
- 8017214: 4a08 ldr r2, [pc, #32] @ (8017238 <prvCheckForValidListAndQueue+0x60>)
- 8017216: 6013 str r3, [r2, #0]
- }
- #endif
- #if ( configQUEUE_REGISTRY_SIZE > 0 )
- {
- if( xTimerQueue != NULL )
- 8017218: 4b07 ldr r3, [pc, #28] @ (8017238 <prvCheckForValidListAndQueue+0x60>)
- 801721a: 681b ldr r3, [r3, #0]
- 801721c: 2b00 cmp r3, #0
- 801721e: d005 beq.n 801722c <prvCheckForValidListAndQueue+0x54>
- {
- vQueueAddToRegistry( xTimerQueue, "TmrQ" );
- 8017220: 4b05 ldr r3, [pc, #20] @ (8017238 <prvCheckForValidListAndQueue+0x60>)
- 8017222: 681b ldr r3, [r3, #0]
- 8017224: 490b ldr r1, [pc, #44] @ (8017254 <prvCheckForValidListAndQueue+0x7c>)
- 8017226: 4618 mov r0, r3
- 8017228: f7fd ff54 bl 80150d4 <vQueueAddToRegistry>
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- taskEXIT_CRITICAL();
- 801722c: f000 f9c6 bl 80175bc <vPortExitCritical>
- }
- 8017230: bf00 nop
- 8017232: 46bd mov sp, r7
- 8017234: bd80 pop {r7, pc}
- 8017236: bf00 nop
- 8017238: 24002bc4 .word 0x24002bc4
- 801723c: 24002b94 .word 0x24002b94
- 8017240: 24002ba8 .word 0x24002ba8
- 8017244: 24002bbc .word 0x24002bbc
- 8017248: 24002bc0 .word 0x24002bc0
- 801724c: 24002c70 .word 0x24002c70
- 8017250: 24002bd0 .word 0x24002bd0
- 8017254: 08018bac .word 0x08018bac
- 08017258 <xTimerIsTimerActive>:
- /*-----------------------------------------------------------*/
- BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer )
- {
- 8017258: b580 push {r7, lr}
- 801725a: b086 sub sp, #24
- 801725c: af00 add r7, sp, #0
- 801725e: 6078 str r0, [r7, #4]
- BaseType_t xReturn;
- Timer_t *pxTimer = xTimer;
- 8017260: 687b ldr r3, [r7, #4]
- 8017262: 613b str r3, [r7, #16]
- configASSERT( xTimer );
- 8017264: 687b ldr r3, [r7, #4]
- 8017266: 2b00 cmp r3, #0
- 8017268: d10b bne.n 8017282 <xTimerIsTimerActive+0x2a>
- __asm volatile
- 801726a: f04f 0350 mov.w r3, #80 @ 0x50
- 801726e: f383 8811 msr BASEPRI, r3
- 8017272: f3bf 8f6f isb sy
- 8017276: f3bf 8f4f dsb sy
- 801727a: 60fb str r3, [r7, #12]
- }
- 801727c: bf00 nop
- 801727e: bf00 nop
- 8017280: e7fd b.n 801727e <xTimerIsTimerActive+0x26>
- /* Is the timer in the list of active timers? */
- taskENTER_CRITICAL();
- 8017282: f000 f969 bl 8017558 <vPortEnterCritical>
- {
- if( ( pxTimer->ucStatus & tmrSTATUS_IS_ACTIVE ) == 0 )
- 8017286: 693b ldr r3, [r7, #16]
- 8017288: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
- 801728c: f003 0301 and.w r3, r3, #1
- 8017290: 2b00 cmp r3, #0
- 8017292: d102 bne.n 801729a <xTimerIsTimerActive+0x42>
- {
- xReturn = pdFALSE;
- 8017294: 2300 movs r3, #0
- 8017296: 617b str r3, [r7, #20]
- 8017298: e001 b.n 801729e <xTimerIsTimerActive+0x46>
- }
- else
- {
- xReturn = pdTRUE;
- 801729a: 2301 movs r3, #1
- 801729c: 617b str r3, [r7, #20]
- }
- }
- taskEXIT_CRITICAL();
- 801729e: f000 f98d bl 80175bc <vPortExitCritical>
- return xReturn;
- 80172a2: 697b ldr r3, [r7, #20]
- } /*lint !e818 Can't be pointer to const due to the typedef. */
- 80172a4: 4618 mov r0, r3
- 80172a6: 3718 adds r7, #24
- 80172a8: 46bd mov sp, r7
- 80172aa: bd80 pop {r7, pc}
- 080172ac <pvTimerGetTimerID>:
- /*-----------------------------------------------------------*/
- void *pvTimerGetTimerID( const TimerHandle_t xTimer )
- {
- 80172ac: b580 push {r7, lr}
- 80172ae: b086 sub sp, #24
- 80172b0: af00 add r7, sp, #0
- 80172b2: 6078 str r0, [r7, #4]
- Timer_t * const pxTimer = xTimer;
- 80172b4: 687b ldr r3, [r7, #4]
- 80172b6: 617b str r3, [r7, #20]
- void *pvReturn;
- configASSERT( xTimer );
- 80172b8: 687b ldr r3, [r7, #4]
- 80172ba: 2b00 cmp r3, #0
- 80172bc: d10b bne.n 80172d6 <pvTimerGetTimerID+0x2a>
- __asm volatile
- 80172be: f04f 0350 mov.w r3, #80 @ 0x50
- 80172c2: f383 8811 msr BASEPRI, r3
- 80172c6: f3bf 8f6f isb sy
- 80172ca: f3bf 8f4f dsb sy
- 80172ce: 60fb str r3, [r7, #12]
- }
- 80172d0: bf00 nop
- 80172d2: bf00 nop
- 80172d4: e7fd b.n 80172d2 <pvTimerGetTimerID+0x26>
- taskENTER_CRITICAL();
- 80172d6: f000 f93f bl 8017558 <vPortEnterCritical>
- {
- pvReturn = pxTimer->pvTimerID;
- 80172da: 697b ldr r3, [r7, #20]
- 80172dc: 69db ldr r3, [r3, #28]
- 80172de: 613b str r3, [r7, #16]
- }
- taskEXIT_CRITICAL();
- 80172e0: f000 f96c bl 80175bc <vPortExitCritical>
- return pvReturn;
- 80172e4: 693b ldr r3, [r7, #16]
- }
- 80172e6: 4618 mov r0, r3
- 80172e8: 3718 adds r7, #24
- 80172ea: 46bd mov sp, r7
- 80172ec: bd80 pop {r7, pc}
- ...
- 080172f0 <pxPortInitialiseStack>:
- /*
- * See header file for description.
- */
- StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
- {
- 80172f0: b480 push {r7}
- 80172f2: b085 sub sp, #20
- 80172f4: af00 add r7, sp, #0
- 80172f6: 60f8 str r0, [r7, #12]
- 80172f8: 60b9 str r1, [r7, #8]
- 80172fa: 607a str r2, [r7, #4]
- /* Simulate the stack frame as it would be created by a context switch
- interrupt. */
- /* Offset added to account for the way the MCU uses the stack on entry/exit
- of interrupts, and to ensure alignment. */
- pxTopOfStack--;
- 80172fc: 68fb ldr r3, [r7, #12]
- 80172fe: 3b04 subs r3, #4
- 8017300: 60fb str r3, [r7, #12]
- *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
- 8017302: 68fb ldr r3, [r7, #12]
- 8017304: f04f 7280 mov.w r2, #16777216 @ 0x1000000
- 8017308: 601a str r2, [r3, #0]
- pxTopOfStack--;
- 801730a: 68fb ldr r3, [r7, #12]
- 801730c: 3b04 subs r3, #4
- 801730e: 60fb str r3, [r7, #12]
- *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
- 8017310: 68bb ldr r3, [r7, #8]
- 8017312: f023 0201 bic.w r2, r3, #1
- 8017316: 68fb ldr r3, [r7, #12]
- 8017318: 601a str r2, [r3, #0]
- pxTopOfStack--;
- 801731a: 68fb ldr r3, [r7, #12]
- 801731c: 3b04 subs r3, #4
- 801731e: 60fb str r3, [r7, #12]
- *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
- 8017320: 4a0c ldr r2, [pc, #48] @ (8017354 <pxPortInitialiseStack+0x64>)
- 8017322: 68fb ldr r3, [r7, #12]
- 8017324: 601a str r2, [r3, #0]
- /* Save code space by skipping register initialisation. */
- pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
- 8017326: 68fb ldr r3, [r7, #12]
- 8017328: 3b14 subs r3, #20
- 801732a: 60fb str r3, [r7, #12]
- *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
- 801732c: 687a ldr r2, [r7, #4]
- 801732e: 68fb ldr r3, [r7, #12]
- 8017330: 601a str r2, [r3, #0]
- /* A save method is being used that requires each task to maintain its
- own exec return value. */
- pxTopOfStack--;
- 8017332: 68fb ldr r3, [r7, #12]
- 8017334: 3b04 subs r3, #4
- 8017336: 60fb str r3, [r7, #12]
- *pxTopOfStack = portINITIAL_EXC_RETURN;
- 8017338: 68fb ldr r3, [r7, #12]
- 801733a: f06f 0202 mvn.w r2, #2
- 801733e: 601a str r2, [r3, #0]
- pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
- 8017340: 68fb ldr r3, [r7, #12]
- 8017342: 3b20 subs r3, #32
- 8017344: 60fb str r3, [r7, #12]
- return pxTopOfStack;
- 8017346: 68fb ldr r3, [r7, #12]
- }
- 8017348: 4618 mov r0, r3
- 801734a: 3714 adds r7, #20
- 801734c: 46bd mov sp, r7
- 801734e: f85d 7b04 ldr.w r7, [sp], #4
- 8017352: 4770 bx lr
- 8017354: 08017359 .word 0x08017359
- 08017358 <prvTaskExitError>:
- /*-----------------------------------------------------------*/
- static void prvTaskExitError( void )
- {
- 8017358: b480 push {r7}
- 801735a: b085 sub sp, #20
- 801735c: af00 add r7, sp, #0
- volatile uint32_t ulDummy = 0;
- 801735e: 2300 movs r3, #0
- 8017360: 607b str r3, [r7, #4]
- its caller as there is nothing to return to. If a task wants to exit it
- should instead call vTaskDelete( NULL ).
- Artificially force an assert() to be triggered if configASSERT() is
- defined, then stop here so application writers can catch the error. */
- configASSERT( uxCriticalNesting == ~0UL );
- 8017362: 4b13 ldr r3, [pc, #76] @ (80173b0 <prvTaskExitError+0x58>)
- 8017364: 681b ldr r3, [r3, #0]
- 8017366: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
- 801736a: d00b beq.n 8017384 <prvTaskExitError+0x2c>
- __asm volatile
- 801736c: f04f 0350 mov.w r3, #80 @ 0x50
- 8017370: f383 8811 msr BASEPRI, r3
- 8017374: f3bf 8f6f isb sy
- 8017378: f3bf 8f4f dsb sy
- 801737c: 60fb str r3, [r7, #12]
- }
- 801737e: bf00 nop
- 8017380: bf00 nop
- 8017382: e7fd b.n 8017380 <prvTaskExitError+0x28>
- __asm volatile
- 8017384: f04f 0350 mov.w r3, #80 @ 0x50
- 8017388: f383 8811 msr BASEPRI, r3
- 801738c: f3bf 8f6f isb sy
- 8017390: f3bf 8f4f dsb sy
- 8017394: 60bb str r3, [r7, #8]
- }
- 8017396: bf00 nop
- portDISABLE_INTERRUPTS();
- while( ulDummy == 0 )
- 8017398: bf00 nop
- 801739a: 687b ldr r3, [r7, #4]
- 801739c: 2b00 cmp r3, #0
- 801739e: d0fc beq.n 801739a <prvTaskExitError+0x42>
- about code appearing after this function is called - making ulDummy
- volatile makes the compiler think the function could return and
- therefore not output an 'unreachable code' warning for code that appears
- after it. */
- }
- }
- 80173a0: bf00 nop
- 80173a2: bf00 nop
- 80173a4: 3714 adds r7, #20
- 80173a6: 46bd mov sp, r7
- 80173a8: f85d 7b04 ldr.w r7, [sp], #4
- 80173ac: 4770 bx lr
- 80173ae: bf00 nop
- 80173b0: 24000044 .word 0x24000044
- ...
- 080173c0 <SVC_Handler>:
- /*-----------------------------------------------------------*/
- void vPortSVCHandler( void )
- {
- __asm volatile (
- 80173c0: 4b07 ldr r3, [pc, #28] @ (80173e0 <pxCurrentTCBConst2>)
- 80173c2: 6819 ldr r1, [r3, #0]
- 80173c4: 6808 ldr r0, [r1, #0]
- 80173c6: e8b0 4ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 80173ca: f380 8809 msr PSP, r0
- 80173ce: f3bf 8f6f isb sy
- 80173d2: f04f 0000 mov.w r0, #0
- 80173d6: f380 8811 msr BASEPRI, r0
- 80173da: 4770 bx lr
- 80173dc: f3af 8000 nop.w
- 080173e0 <pxCurrentTCBConst2>:
- 80173e0: 24002694 .word 0x24002694
- " bx r14 \n"
- " \n"
- " .align 4 \n"
- "pxCurrentTCBConst2: .word pxCurrentTCB \n"
- );
- }
- 80173e4: bf00 nop
- 80173e6: bf00 nop
- 080173e8 <prvPortStartFirstTask>:
- {
- /* Start the first task. This also clears the bit that indicates the FPU is
- in use in case the FPU was used before the scheduler was started - which
- would otherwise result in the unnecessary leaving of space in the SVC stack
- for lazy saving of FPU registers. */
- __asm volatile(
- 80173e8: 4808 ldr r0, [pc, #32] @ (801740c <prvPortStartFirstTask+0x24>)
- 80173ea: 6800 ldr r0, [r0, #0]
- 80173ec: 6800 ldr r0, [r0, #0]
- 80173ee: f380 8808 msr MSP, r0
- 80173f2: f04f 0000 mov.w r0, #0
- 80173f6: f380 8814 msr CONTROL, r0
- 80173fa: b662 cpsie i
- 80173fc: b661 cpsie f
- 80173fe: f3bf 8f4f dsb sy
- 8017402: f3bf 8f6f isb sy
- 8017406: df00 svc 0
- 8017408: bf00 nop
- " dsb \n"
- " isb \n"
- " svc 0 \n" /* System call to start first task. */
- " nop \n"
- );
- }
- 801740a: bf00 nop
- 801740c: e000ed08 .word 0xe000ed08
- 08017410 <xPortStartScheduler>:
- /*
- * See header file for description.
- */
- BaseType_t xPortStartScheduler( void )
- {
- 8017410: b580 push {r7, lr}
- 8017412: b086 sub sp, #24
- 8017414: af00 add r7, sp, #0
- configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
- /* This port can be used on all revisions of the Cortex-M7 core other than
- the r0p1 parts. r0p1 parts should use the port from the
- /source/portable/GCC/ARM_CM7/r0p1 directory. */
- configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
- 8017416: 4b47 ldr r3, [pc, #284] @ (8017534 <xPortStartScheduler+0x124>)
- 8017418: 681b ldr r3, [r3, #0]
- 801741a: 4a47 ldr r2, [pc, #284] @ (8017538 <xPortStartScheduler+0x128>)
- 801741c: 4293 cmp r3, r2
- 801741e: d10b bne.n 8017438 <xPortStartScheduler+0x28>
- __asm volatile
- 8017420: f04f 0350 mov.w r3, #80 @ 0x50
- 8017424: f383 8811 msr BASEPRI, r3
- 8017428: f3bf 8f6f isb sy
- 801742c: f3bf 8f4f dsb sy
- 8017430: 613b str r3, [r7, #16]
- }
- 8017432: bf00 nop
- 8017434: bf00 nop
- 8017436: e7fd b.n 8017434 <xPortStartScheduler+0x24>
- configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
- 8017438: 4b3e ldr r3, [pc, #248] @ (8017534 <xPortStartScheduler+0x124>)
- 801743a: 681b ldr r3, [r3, #0]
- 801743c: 4a3f ldr r2, [pc, #252] @ (801753c <xPortStartScheduler+0x12c>)
- 801743e: 4293 cmp r3, r2
- 8017440: d10b bne.n 801745a <xPortStartScheduler+0x4a>
- __asm volatile
- 8017442: f04f 0350 mov.w r3, #80 @ 0x50
- 8017446: f383 8811 msr BASEPRI, r3
- 801744a: f3bf 8f6f isb sy
- 801744e: f3bf 8f4f dsb sy
- 8017452: 60fb str r3, [r7, #12]
- }
- 8017454: bf00 nop
- 8017456: bf00 nop
- 8017458: e7fd b.n 8017456 <xPortStartScheduler+0x46>
- #if( configASSERT_DEFINED == 1 )
- {
- volatile uint32_t ulOriginalPriority;
- volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
- 801745a: 4b39 ldr r3, [pc, #228] @ (8017540 <xPortStartScheduler+0x130>)
- 801745c: 617b str r3, [r7, #20]
- functions can be called. ISR safe functions are those that end in
- "FromISR". FreeRTOS maintains separate thread and ISR API functions to
- ensure interrupt entry is as fast and simple as possible.
- Save the interrupt priority value that is about to be clobbered. */
- ulOriginalPriority = *pucFirstUserPriorityRegister;
- 801745e: 697b ldr r3, [r7, #20]
- 8017460: 781b ldrb r3, [r3, #0]
- 8017462: b2db uxtb r3, r3
- 8017464: 607b str r3, [r7, #4]
- /* Determine the number of priority bits available. First write to all
- possible bits. */
- *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
- 8017466: 697b ldr r3, [r7, #20]
- 8017468: 22ff movs r2, #255 @ 0xff
- 801746a: 701a strb r2, [r3, #0]
- /* Read the value back to see how many bits stuck. */
- ucMaxPriorityValue = *pucFirstUserPriorityRegister;
- 801746c: 697b ldr r3, [r7, #20]
- 801746e: 781b ldrb r3, [r3, #0]
- 8017470: b2db uxtb r3, r3
- 8017472: 70fb strb r3, [r7, #3]
- /* Use the same mask on the maximum system call priority. */
- ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
- 8017474: 78fb ldrb r3, [r7, #3]
- 8017476: b2db uxtb r3, r3
- 8017478: f003 0350 and.w r3, r3, #80 @ 0x50
- 801747c: b2da uxtb r2, r3
- 801747e: 4b31 ldr r3, [pc, #196] @ (8017544 <xPortStartScheduler+0x134>)
- 8017480: 701a strb r2, [r3, #0]
- /* Calculate the maximum acceptable priority group value for the number
- of bits read back. */
- ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
- 8017482: 4b31 ldr r3, [pc, #196] @ (8017548 <xPortStartScheduler+0x138>)
- 8017484: 2207 movs r2, #7
- 8017486: 601a str r2, [r3, #0]
- while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
- 8017488: e009 b.n 801749e <xPortStartScheduler+0x8e>
- {
- ulMaxPRIGROUPValue--;
- 801748a: 4b2f ldr r3, [pc, #188] @ (8017548 <xPortStartScheduler+0x138>)
- 801748c: 681b ldr r3, [r3, #0]
- 801748e: 3b01 subs r3, #1
- 8017490: 4a2d ldr r2, [pc, #180] @ (8017548 <xPortStartScheduler+0x138>)
- 8017492: 6013 str r3, [r2, #0]
- ucMaxPriorityValue <<= ( uint8_t ) 0x01;
- 8017494: 78fb ldrb r3, [r7, #3]
- 8017496: b2db uxtb r3, r3
- 8017498: 005b lsls r3, r3, #1
- 801749a: b2db uxtb r3, r3
- 801749c: 70fb strb r3, [r7, #3]
- while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
- 801749e: 78fb ldrb r3, [r7, #3]
- 80174a0: b2db uxtb r3, r3
- 80174a2: f003 0380 and.w r3, r3, #128 @ 0x80
- 80174a6: 2b80 cmp r3, #128 @ 0x80
- 80174a8: d0ef beq.n 801748a <xPortStartScheduler+0x7a>
- #ifdef configPRIO_BITS
- {
- /* Check the FreeRTOS configuration that defines the number of
- priority bits matches the number of priority bits actually queried
- from the hardware. */
- configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
- 80174aa: 4b27 ldr r3, [pc, #156] @ (8017548 <xPortStartScheduler+0x138>)
- 80174ac: 681b ldr r3, [r3, #0]
- 80174ae: f1c3 0307 rsb r3, r3, #7
- 80174b2: 2b04 cmp r3, #4
- 80174b4: d00b beq.n 80174ce <xPortStartScheduler+0xbe>
- __asm volatile
- 80174b6: f04f 0350 mov.w r3, #80 @ 0x50
- 80174ba: f383 8811 msr BASEPRI, r3
- 80174be: f3bf 8f6f isb sy
- 80174c2: f3bf 8f4f dsb sy
- 80174c6: 60bb str r3, [r7, #8]
- }
- 80174c8: bf00 nop
- 80174ca: bf00 nop
- 80174cc: e7fd b.n 80174ca <xPortStartScheduler+0xba>
- }
- #endif
- /* Shift the priority group value back to its position within the AIRCR
- register. */
- ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
- 80174ce: 4b1e ldr r3, [pc, #120] @ (8017548 <xPortStartScheduler+0x138>)
- 80174d0: 681b ldr r3, [r3, #0]
- 80174d2: 021b lsls r3, r3, #8
- 80174d4: 4a1c ldr r2, [pc, #112] @ (8017548 <xPortStartScheduler+0x138>)
- 80174d6: 6013 str r3, [r2, #0]
- ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
- 80174d8: 4b1b ldr r3, [pc, #108] @ (8017548 <xPortStartScheduler+0x138>)
- 80174da: 681b ldr r3, [r3, #0]
- 80174dc: f403 63e0 and.w r3, r3, #1792 @ 0x700
- 80174e0: 4a19 ldr r2, [pc, #100] @ (8017548 <xPortStartScheduler+0x138>)
- 80174e2: 6013 str r3, [r2, #0]
- /* Restore the clobbered interrupt priority register to its original
- value. */
- *pucFirstUserPriorityRegister = ulOriginalPriority;
- 80174e4: 687b ldr r3, [r7, #4]
- 80174e6: b2da uxtb r2, r3
- 80174e8: 697b ldr r3, [r7, #20]
- 80174ea: 701a strb r2, [r3, #0]
- }
- #endif /* conifgASSERT_DEFINED */
- /* Make PendSV and SysTick the lowest priority interrupts. */
- portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
- 80174ec: 4b17 ldr r3, [pc, #92] @ (801754c <xPortStartScheduler+0x13c>)
- 80174ee: 681b ldr r3, [r3, #0]
- 80174f0: 4a16 ldr r2, [pc, #88] @ (801754c <xPortStartScheduler+0x13c>)
- 80174f2: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000
- 80174f6: 6013 str r3, [r2, #0]
- portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
- 80174f8: 4b14 ldr r3, [pc, #80] @ (801754c <xPortStartScheduler+0x13c>)
- 80174fa: 681b ldr r3, [r3, #0]
- 80174fc: 4a13 ldr r2, [pc, #76] @ (801754c <xPortStartScheduler+0x13c>)
- 80174fe: f043 4370 orr.w r3, r3, #4026531840 @ 0xf0000000
- 8017502: 6013 str r3, [r2, #0]
- /* Start the timer that generates the tick ISR. Interrupts are disabled
- here already. */
- vPortSetupTimerInterrupt();
- 8017504: f000 f8da bl 80176bc <vPortSetupTimerInterrupt>
- /* Initialise the critical nesting count ready for the first task. */
- uxCriticalNesting = 0;
- 8017508: 4b11 ldr r3, [pc, #68] @ (8017550 <xPortStartScheduler+0x140>)
- 801750a: 2200 movs r2, #0
- 801750c: 601a str r2, [r3, #0]
- /* Ensure the VFP is enabled - it should be anyway. */
- vPortEnableVFP();
- 801750e: f000 f8f9 bl 8017704 <vPortEnableVFP>
- /* Lazy save always. */
- *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
- 8017512: 4b10 ldr r3, [pc, #64] @ (8017554 <xPortStartScheduler+0x144>)
- 8017514: 681b ldr r3, [r3, #0]
- 8017516: 4a0f ldr r2, [pc, #60] @ (8017554 <xPortStartScheduler+0x144>)
- 8017518: f043 4340 orr.w r3, r3, #3221225472 @ 0xc0000000
- 801751c: 6013 str r3, [r2, #0]
- /* Start the first task. */
- prvPortStartFirstTask();
- 801751e: f7ff ff63 bl 80173e8 <prvPortStartFirstTask>
- exit error function to prevent compiler warnings about a static function
- not being called in the case that the application writer overrides this
- functionality by defining configTASK_RETURN_ADDRESS. Call
- vTaskSwitchContext() so link time optimisation does not remove the
- symbol. */
- vTaskSwitchContext();
- 8017522: f7fe fbcd bl 8015cc0 <vTaskSwitchContext>
- prvTaskExitError();
- 8017526: f7ff ff17 bl 8017358 <prvTaskExitError>
- /* Should not get here! */
- return 0;
- 801752a: 2300 movs r3, #0
- }
- 801752c: 4618 mov r0, r3
- 801752e: 3718 adds r7, #24
- 8017530: 46bd mov sp, r7
- 8017532: bd80 pop {r7, pc}
- 8017534: e000ed00 .word 0xe000ed00
- 8017538: 410fc271 .word 0x410fc271
- 801753c: 410fc270 .word 0x410fc270
- 8017540: e000e400 .word 0xe000e400
- 8017544: 24002cc0 .word 0x24002cc0
- 8017548: 24002cc4 .word 0x24002cc4
- 801754c: e000ed20 .word 0xe000ed20
- 8017550: 24000044 .word 0x24000044
- 8017554: e000ef34 .word 0xe000ef34
- 08017558 <vPortEnterCritical>:
- configASSERT( uxCriticalNesting == 1000UL );
- }
- /*-----------------------------------------------------------*/
- void vPortEnterCritical( void )
- {
- 8017558: b480 push {r7}
- 801755a: b083 sub sp, #12
- 801755c: af00 add r7, sp, #0
- __asm volatile
- 801755e: f04f 0350 mov.w r3, #80 @ 0x50
- 8017562: f383 8811 msr BASEPRI, r3
- 8017566: f3bf 8f6f isb sy
- 801756a: f3bf 8f4f dsb sy
- 801756e: 607b str r3, [r7, #4]
- }
- 8017570: bf00 nop
- portDISABLE_INTERRUPTS();
- uxCriticalNesting++;
- 8017572: 4b10 ldr r3, [pc, #64] @ (80175b4 <vPortEnterCritical+0x5c>)
- 8017574: 681b ldr r3, [r3, #0]
- 8017576: 3301 adds r3, #1
- 8017578: 4a0e ldr r2, [pc, #56] @ (80175b4 <vPortEnterCritical+0x5c>)
- 801757a: 6013 str r3, [r2, #0]
- /* This is not the interrupt safe version of the enter critical function so
- assert() if it is being called from an interrupt context. Only API
- functions that end in "FromISR" can be used in an interrupt. Only assert if
- the critical nesting count is 1 to protect against recursive calls if the
- assert function also uses a critical section. */
- if( uxCriticalNesting == 1 )
- 801757c: 4b0d ldr r3, [pc, #52] @ (80175b4 <vPortEnterCritical+0x5c>)
- 801757e: 681b ldr r3, [r3, #0]
- 8017580: 2b01 cmp r3, #1
- 8017582: d110 bne.n 80175a6 <vPortEnterCritical+0x4e>
- {
- configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
- 8017584: 4b0c ldr r3, [pc, #48] @ (80175b8 <vPortEnterCritical+0x60>)
- 8017586: 681b ldr r3, [r3, #0]
- 8017588: b2db uxtb r3, r3
- 801758a: 2b00 cmp r3, #0
- 801758c: d00b beq.n 80175a6 <vPortEnterCritical+0x4e>
- __asm volatile
- 801758e: f04f 0350 mov.w r3, #80 @ 0x50
- 8017592: f383 8811 msr BASEPRI, r3
- 8017596: f3bf 8f6f isb sy
- 801759a: f3bf 8f4f dsb sy
- 801759e: 603b str r3, [r7, #0]
- }
- 80175a0: bf00 nop
- 80175a2: bf00 nop
- 80175a4: e7fd b.n 80175a2 <vPortEnterCritical+0x4a>
- }
- }
- 80175a6: bf00 nop
- 80175a8: 370c adds r7, #12
- 80175aa: 46bd mov sp, r7
- 80175ac: f85d 7b04 ldr.w r7, [sp], #4
- 80175b0: 4770 bx lr
- 80175b2: bf00 nop
- 80175b4: 24000044 .word 0x24000044
- 80175b8: e000ed04 .word 0xe000ed04
- 080175bc <vPortExitCritical>:
- /*-----------------------------------------------------------*/
- void vPortExitCritical( void )
- {
- 80175bc: b480 push {r7}
- 80175be: b083 sub sp, #12
- 80175c0: af00 add r7, sp, #0
- configASSERT( uxCriticalNesting );
- 80175c2: 4b12 ldr r3, [pc, #72] @ (801760c <vPortExitCritical+0x50>)
- 80175c4: 681b ldr r3, [r3, #0]
- 80175c6: 2b00 cmp r3, #0
- 80175c8: d10b bne.n 80175e2 <vPortExitCritical+0x26>
- __asm volatile
- 80175ca: f04f 0350 mov.w r3, #80 @ 0x50
- 80175ce: f383 8811 msr BASEPRI, r3
- 80175d2: f3bf 8f6f isb sy
- 80175d6: f3bf 8f4f dsb sy
- 80175da: 607b str r3, [r7, #4]
- }
- 80175dc: bf00 nop
- 80175de: bf00 nop
- 80175e0: e7fd b.n 80175de <vPortExitCritical+0x22>
- uxCriticalNesting--;
- 80175e2: 4b0a ldr r3, [pc, #40] @ (801760c <vPortExitCritical+0x50>)
- 80175e4: 681b ldr r3, [r3, #0]
- 80175e6: 3b01 subs r3, #1
- 80175e8: 4a08 ldr r2, [pc, #32] @ (801760c <vPortExitCritical+0x50>)
- 80175ea: 6013 str r3, [r2, #0]
- if( uxCriticalNesting == 0 )
- 80175ec: 4b07 ldr r3, [pc, #28] @ (801760c <vPortExitCritical+0x50>)
- 80175ee: 681b ldr r3, [r3, #0]
- 80175f0: 2b00 cmp r3, #0
- 80175f2: d105 bne.n 8017600 <vPortExitCritical+0x44>
- 80175f4: 2300 movs r3, #0
- 80175f6: 603b str r3, [r7, #0]
- __asm volatile
- 80175f8: 683b ldr r3, [r7, #0]
- 80175fa: f383 8811 msr BASEPRI, r3
- }
- 80175fe: bf00 nop
- {
- portENABLE_INTERRUPTS();
- }
- }
- 8017600: bf00 nop
- 8017602: 370c adds r7, #12
- 8017604: 46bd mov sp, r7
- 8017606: f85d 7b04 ldr.w r7, [sp], #4
- 801760a: 4770 bx lr
- 801760c: 24000044 .word 0x24000044
- 08017610 <PendSV_Handler>:
- void xPortPendSVHandler( void )
- {
- /* This is a naked function. */
- __asm volatile
- 8017610: f3ef 8009 mrs r0, PSP
- 8017614: f3bf 8f6f isb sy
- 8017618: 4b15 ldr r3, [pc, #84] @ (8017670 <pxCurrentTCBConst>)
- 801761a: 681a ldr r2, [r3, #0]
- 801761c: f01e 0f10 tst.w lr, #16
- 8017620: bf08 it eq
- 8017622: ed20 8a10 vstmdbeq r0!, {s16-s31}
- 8017626: e920 4ff0 stmdb r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 801762a: 6010 str r0, [r2, #0]
- 801762c: e92d 0009 stmdb sp!, {r0, r3}
- 8017630: f04f 0050 mov.w r0, #80 @ 0x50
- 8017634: f380 8811 msr BASEPRI, r0
- 8017638: f3bf 8f4f dsb sy
- 801763c: f3bf 8f6f isb sy
- 8017640: f7fe fb3e bl 8015cc0 <vTaskSwitchContext>
- 8017644: f04f 0000 mov.w r0, #0
- 8017648: f380 8811 msr BASEPRI, r0
- 801764c: bc09 pop {r0, r3}
- 801764e: 6819 ldr r1, [r3, #0]
- 8017650: 6808 ldr r0, [r1, #0]
- 8017652: e8b0 4ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 8017656: f01e 0f10 tst.w lr, #16
- 801765a: bf08 it eq
- 801765c: ecb0 8a10 vldmiaeq r0!, {s16-s31}
- 8017660: f380 8809 msr PSP, r0
- 8017664: f3bf 8f6f isb sy
- 8017668: 4770 bx lr
- 801766a: bf00 nop
- 801766c: f3af 8000 nop.w
- 08017670 <pxCurrentTCBConst>:
- 8017670: 24002694 .word 0x24002694
- " \n"
- " .align 4 \n"
- "pxCurrentTCBConst: .word pxCurrentTCB \n"
- ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
- );
- }
- 8017674: bf00 nop
- 8017676: bf00 nop
- 08017678 <xPortSysTickHandler>:
- /*-----------------------------------------------------------*/
- void xPortSysTickHandler( void )
- {
- 8017678: b580 push {r7, lr}
- 801767a: b082 sub sp, #8
- 801767c: af00 add r7, sp, #0
- __asm volatile
- 801767e: f04f 0350 mov.w r3, #80 @ 0x50
- 8017682: f383 8811 msr BASEPRI, r3
- 8017686: f3bf 8f6f isb sy
- 801768a: f3bf 8f4f dsb sy
- 801768e: 607b str r3, [r7, #4]
- }
- 8017690: bf00 nop
- save and then restore the interrupt mask value as its value is already
- known. */
- portDISABLE_INTERRUPTS();
- {
- /* Increment the RTOS tick. */
- if( xTaskIncrementTick() != pdFALSE )
- 8017692: f7fe fa5b bl 8015b4c <xTaskIncrementTick>
- 8017696: 4603 mov r3, r0
- 8017698: 2b00 cmp r3, #0
- 801769a: d003 beq.n 80176a4 <xPortSysTickHandler+0x2c>
- {
- /* A context switch is required. Context switching is performed in
- the PendSV interrupt. Pend the PendSV interrupt. */
- portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
- 801769c: 4b06 ldr r3, [pc, #24] @ (80176b8 <xPortSysTickHandler+0x40>)
- 801769e: f04f 5280 mov.w r2, #268435456 @ 0x10000000
- 80176a2: 601a str r2, [r3, #0]
- 80176a4: 2300 movs r3, #0
- 80176a6: 603b str r3, [r7, #0]
- __asm volatile
- 80176a8: 683b ldr r3, [r7, #0]
- 80176aa: f383 8811 msr BASEPRI, r3
- }
- 80176ae: bf00 nop
- }
- }
- portENABLE_INTERRUPTS();
- }
- 80176b0: bf00 nop
- 80176b2: 3708 adds r7, #8
- 80176b4: 46bd mov sp, r7
- 80176b6: bd80 pop {r7, pc}
- 80176b8: e000ed04 .word 0xe000ed04
- 080176bc <vPortSetupTimerInterrupt>:
- /*
- * Setup the systick timer to generate the tick interrupts at the required
- * frequency.
- */
- __attribute__(( weak )) void vPortSetupTimerInterrupt( void )
- {
- 80176bc: b480 push {r7}
- 80176be: af00 add r7, sp, #0
- ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
- }
- #endif /* configUSE_TICKLESS_IDLE */
- /* Stop and clear the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
- 80176c0: 4b0b ldr r3, [pc, #44] @ (80176f0 <vPortSetupTimerInterrupt+0x34>)
- 80176c2: 2200 movs r2, #0
- 80176c4: 601a str r2, [r3, #0]
- portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
- 80176c6: 4b0b ldr r3, [pc, #44] @ (80176f4 <vPortSetupTimerInterrupt+0x38>)
- 80176c8: 2200 movs r2, #0
- 80176ca: 601a str r2, [r3, #0]
- /* Configure SysTick to interrupt at the requested rate. */
- portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
- 80176cc: 4b0a ldr r3, [pc, #40] @ (80176f8 <vPortSetupTimerInterrupt+0x3c>)
- 80176ce: 681b ldr r3, [r3, #0]
- 80176d0: 4a0a ldr r2, [pc, #40] @ (80176fc <vPortSetupTimerInterrupt+0x40>)
- 80176d2: fba2 2303 umull r2, r3, r2, r3
- 80176d6: 099b lsrs r3, r3, #6
- 80176d8: 4a09 ldr r2, [pc, #36] @ (8017700 <vPortSetupTimerInterrupt+0x44>)
- 80176da: 3b01 subs r3, #1
- 80176dc: 6013 str r3, [r2, #0]
- portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
- 80176de: 4b04 ldr r3, [pc, #16] @ (80176f0 <vPortSetupTimerInterrupt+0x34>)
- 80176e0: 2207 movs r2, #7
- 80176e2: 601a str r2, [r3, #0]
- }
- 80176e4: bf00 nop
- 80176e6: 46bd mov sp, r7
- 80176e8: f85d 7b04 ldr.w r7, [sp], #4
- 80176ec: 4770 bx lr
- 80176ee: bf00 nop
- 80176f0: e000e010 .word 0xe000e010
- 80176f4: e000e018 .word 0xe000e018
- 80176f8: 24000034 .word 0x24000034
- 80176fc: 10624dd3 .word 0x10624dd3
- 8017700: e000e014 .word 0xe000e014
- 08017704 <vPortEnableVFP>:
- /*-----------------------------------------------------------*/
- /* This is a naked function. */
- static void vPortEnableVFP( void )
- {
- __asm volatile
- 8017704: f8df 000c ldr.w r0, [pc, #12] @ 8017714 <vPortEnableVFP+0x10>
- 8017708: 6801 ldr r1, [r0, #0]
- 801770a: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000
- 801770e: 6001 str r1, [r0, #0]
- 8017710: 4770 bx lr
- " \n"
- " orr r1, r1, #( 0xf << 20 ) \n" /* Enable CP10 and CP11 coprocessors, then save back. */
- " str r1, [r0] \n"
- " bx r14 "
- );
- }
- 8017712: bf00 nop
- 8017714: e000ed88 .word 0xe000ed88
- 08017718 <vPortValidateInterruptPriority>:
- /*-----------------------------------------------------------*/
- #if( configASSERT_DEFINED == 1 )
- void vPortValidateInterruptPriority( void )
- {
- 8017718: b480 push {r7}
- 801771a: b085 sub sp, #20
- 801771c: af00 add r7, sp, #0
- uint32_t ulCurrentInterrupt;
- uint8_t ucCurrentPriority;
- /* Obtain the number of the currently executing interrupt. */
- __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
- 801771e: f3ef 8305 mrs r3, IPSR
- 8017722: 60fb str r3, [r7, #12]
- /* Is the interrupt number a user defined interrupt? */
- if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
- 8017724: 68fb ldr r3, [r7, #12]
- 8017726: 2b0f cmp r3, #15
- 8017728: d915 bls.n 8017756 <vPortValidateInterruptPriority+0x3e>
- {
- /* Look up the interrupt's priority. */
- ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
- 801772a: 4a18 ldr r2, [pc, #96] @ (801778c <vPortValidateInterruptPriority+0x74>)
- 801772c: 68fb ldr r3, [r7, #12]
- 801772e: 4413 add r3, r2
- 8017730: 781b ldrb r3, [r3, #0]
- 8017732: 72fb strb r3, [r7, #11]
- interrupt entry is as fast and simple as possible.
- The following links provide detailed information:
- http://www.freertos.org/RTOS-Cortex-M3-M4.html
- http://www.freertos.org/FAQHelp.html */
- configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
- 8017734: 4b16 ldr r3, [pc, #88] @ (8017790 <vPortValidateInterruptPriority+0x78>)
- 8017736: 781b ldrb r3, [r3, #0]
- 8017738: 7afa ldrb r2, [r7, #11]
- 801773a: 429a cmp r2, r3
- 801773c: d20b bcs.n 8017756 <vPortValidateInterruptPriority+0x3e>
- __asm volatile
- 801773e: f04f 0350 mov.w r3, #80 @ 0x50
- 8017742: f383 8811 msr BASEPRI, r3
- 8017746: f3bf 8f6f isb sy
- 801774a: f3bf 8f4f dsb sy
- 801774e: 607b str r3, [r7, #4]
- }
- 8017750: bf00 nop
- 8017752: bf00 nop
- 8017754: e7fd b.n 8017752 <vPortValidateInterruptPriority+0x3a>
- configuration then the correct setting can be achieved on all Cortex-M
- devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
- scheduler. Note however that some vendor specific peripheral libraries
- assume a non-zero priority group setting, in which cases using a value
- of zero will result in unpredictable behaviour. */
- configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
- 8017756: 4b0f ldr r3, [pc, #60] @ (8017794 <vPortValidateInterruptPriority+0x7c>)
- 8017758: 681b ldr r3, [r3, #0]
- 801775a: f403 62e0 and.w r2, r3, #1792 @ 0x700
- 801775e: 4b0e ldr r3, [pc, #56] @ (8017798 <vPortValidateInterruptPriority+0x80>)
- 8017760: 681b ldr r3, [r3, #0]
- 8017762: 429a cmp r2, r3
- 8017764: d90b bls.n 801777e <vPortValidateInterruptPriority+0x66>
- __asm volatile
- 8017766: f04f 0350 mov.w r3, #80 @ 0x50
- 801776a: f383 8811 msr BASEPRI, r3
- 801776e: f3bf 8f6f isb sy
- 8017772: f3bf 8f4f dsb sy
- 8017776: 603b str r3, [r7, #0]
- }
- 8017778: bf00 nop
- 801777a: bf00 nop
- 801777c: e7fd b.n 801777a <vPortValidateInterruptPriority+0x62>
- }
- 801777e: bf00 nop
- 8017780: 3714 adds r7, #20
- 8017782: 46bd mov sp, r7
- 8017784: f85d 7b04 ldr.w r7, [sp], #4
- 8017788: 4770 bx lr
- 801778a: bf00 nop
- 801778c: e000e3f0 .word 0xe000e3f0
- 8017790: 24002cc0 .word 0x24002cc0
- 8017794: e000ed0c .word 0xe000ed0c
- 8017798: 24002cc4 .word 0x24002cc4
- 0801779c <pvPortMalloc>:
- static size_t xBlockAllocatedBit = 0;
- /*-----------------------------------------------------------*/
- void *pvPortMalloc( size_t xWantedSize )
- {
- 801779c: b580 push {r7, lr}
- 801779e: b08a sub sp, #40 @ 0x28
- 80177a0: af00 add r7, sp, #0
- 80177a2: 6078 str r0, [r7, #4]
- BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
- void *pvReturn = NULL;
- 80177a4: 2300 movs r3, #0
- 80177a6: 61fb str r3, [r7, #28]
- vTaskSuspendAll();
- 80177a8: f7fe f914 bl 80159d4 <vTaskSuspendAll>
- {
- /* If this is the first call to malloc then the heap will require
- initialisation to setup the list of free blocks. */
- if( pxEnd == NULL )
- 80177ac: 4b5c ldr r3, [pc, #368] @ (8017920 <pvPortMalloc+0x184>)
- 80177ae: 681b ldr r3, [r3, #0]
- 80177b0: 2b00 cmp r3, #0
- 80177b2: d101 bne.n 80177b8 <pvPortMalloc+0x1c>
- {
- prvHeapInit();
- 80177b4: f000 f924 bl 8017a00 <prvHeapInit>
- /* Check the requested block size is not so large that the top bit is
- set. The top bit of the block size member of the BlockLink_t structure
- is used to determine who owns the block - the application or the
- kernel, so it must be free. */
- if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
- 80177b8: 4b5a ldr r3, [pc, #360] @ (8017924 <pvPortMalloc+0x188>)
- 80177ba: 681a ldr r2, [r3, #0]
- 80177bc: 687b ldr r3, [r7, #4]
- 80177be: 4013 ands r3, r2
- 80177c0: 2b00 cmp r3, #0
- 80177c2: f040 8095 bne.w 80178f0 <pvPortMalloc+0x154>
- {
- /* The wanted size is increased so it can contain a BlockLink_t
- structure in addition to the requested amount of bytes. */
- if( xWantedSize > 0 )
- 80177c6: 687b ldr r3, [r7, #4]
- 80177c8: 2b00 cmp r3, #0
- 80177ca: d01e beq.n 801780a <pvPortMalloc+0x6e>
- {
- xWantedSize += xHeapStructSize;
- 80177cc: 2208 movs r2, #8
- 80177ce: 687b ldr r3, [r7, #4]
- 80177d0: 4413 add r3, r2
- 80177d2: 607b str r3, [r7, #4]
- /* Ensure that blocks are always aligned to the required number
- of bytes. */
- if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
- 80177d4: 687b ldr r3, [r7, #4]
- 80177d6: f003 0307 and.w r3, r3, #7
- 80177da: 2b00 cmp r3, #0
- 80177dc: d015 beq.n 801780a <pvPortMalloc+0x6e>
- {
- /* Byte alignment required. */
- xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
- 80177de: 687b ldr r3, [r7, #4]
- 80177e0: f023 0307 bic.w r3, r3, #7
- 80177e4: 3308 adds r3, #8
- 80177e6: 607b str r3, [r7, #4]
- configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
- 80177e8: 687b ldr r3, [r7, #4]
- 80177ea: f003 0307 and.w r3, r3, #7
- 80177ee: 2b00 cmp r3, #0
- 80177f0: d00b beq.n 801780a <pvPortMalloc+0x6e>
- __asm volatile
- 80177f2: f04f 0350 mov.w r3, #80 @ 0x50
- 80177f6: f383 8811 msr BASEPRI, r3
- 80177fa: f3bf 8f6f isb sy
- 80177fe: f3bf 8f4f dsb sy
- 8017802: 617b str r3, [r7, #20]
- }
- 8017804: bf00 nop
- 8017806: bf00 nop
- 8017808: e7fd b.n 8017806 <pvPortMalloc+0x6a>
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
- 801780a: 687b ldr r3, [r7, #4]
- 801780c: 2b00 cmp r3, #0
- 801780e: d06f beq.n 80178f0 <pvPortMalloc+0x154>
- 8017810: 4b45 ldr r3, [pc, #276] @ (8017928 <pvPortMalloc+0x18c>)
- 8017812: 681b ldr r3, [r3, #0]
- 8017814: 687a ldr r2, [r7, #4]
- 8017816: 429a cmp r2, r3
- 8017818: d86a bhi.n 80178f0 <pvPortMalloc+0x154>
- {
- /* Traverse the list from the start (lowest address) block until
- one of adequate size is found. */
- pxPreviousBlock = &xStart;
- 801781a: 4b44 ldr r3, [pc, #272] @ (801792c <pvPortMalloc+0x190>)
- 801781c: 623b str r3, [r7, #32]
- pxBlock = xStart.pxNextFreeBlock;
- 801781e: 4b43 ldr r3, [pc, #268] @ (801792c <pvPortMalloc+0x190>)
- 8017820: 681b ldr r3, [r3, #0]
- 8017822: 627b str r3, [r7, #36] @ 0x24
- while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
- 8017824: e004 b.n 8017830 <pvPortMalloc+0x94>
- {
- pxPreviousBlock = pxBlock;
- 8017826: 6a7b ldr r3, [r7, #36] @ 0x24
- 8017828: 623b str r3, [r7, #32]
- pxBlock = pxBlock->pxNextFreeBlock;
- 801782a: 6a7b ldr r3, [r7, #36] @ 0x24
- 801782c: 681b ldr r3, [r3, #0]
- 801782e: 627b str r3, [r7, #36] @ 0x24
- while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
- 8017830: 6a7b ldr r3, [r7, #36] @ 0x24
- 8017832: 685b ldr r3, [r3, #4]
- 8017834: 687a ldr r2, [r7, #4]
- 8017836: 429a cmp r2, r3
- 8017838: d903 bls.n 8017842 <pvPortMalloc+0xa6>
- 801783a: 6a7b ldr r3, [r7, #36] @ 0x24
- 801783c: 681b ldr r3, [r3, #0]
- 801783e: 2b00 cmp r3, #0
- 8017840: d1f1 bne.n 8017826 <pvPortMalloc+0x8a>
- }
- /* If the end marker was reached then a block of adequate size
- was not found. */
- if( pxBlock != pxEnd )
- 8017842: 4b37 ldr r3, [pc, #220] @ (8017920 <pvPortMalloc+0x184>)
- 8017844: 681b ldr r3, [r3, #0]
- 8017846: 6a7a ldr r2, [r7, #36] @ 0x24
- 8017848: 429a cmp r2, r3
- 801784a: d051 beq.n 80178f0 <pvPortMalloc+0x154>
- {
- /* Return the memory space pointed to - jumping over the
- BlockLink_t structure at its start. */
- pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
- 801784c: 6a3b ldr r3, [r7, #32]
- 801784e: 681b ldr r3, [r3, #0]
- 8017850: 2208 movs r2, #8
- 8017852: 4413 add r3, r2
- 8017854: 61fb str r3, [r7, #28]
- /* This block is being returned for use so must be taken out
- of the list of free blocks. */
- pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
- 8017856: 6a7b ldr r3, [r7, #36] @ 0x24
- 8017858: 681a ldr r2, [r3, #0]
- 801785a: 6a3b ldr r3, [r7, #32]
- 801785c: 601a str r2, [r3, #0]
- /* If the block is larger than required it can be split into
- two. */
- if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
- 801785e: 6a7b ldr r3, [r7, #36] @ 0x24
- 8017860: 685a ldr r2, [r3, #4]
- 8017862: 687b ldr r3, [r7, #4]
- 8017864: 1ad2 subs r2, r2, r3
- 8017866: 2308 movs r3, #8
- 8017868: 005b lsls r3, r3, #1
- 801786a: 429a cmp r2, r3
- 801786c: d920 bls.n 80178b0 <pvPortMalloc+0x114>
- {
- /* This block is to be split into two. Create a new
- block following the number of bytes requested. The void
- cast is used to prevent byte alignment warnings from the
- compiler. */
- pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
- 801786e: 6a7a ldr r2, [r7, #36] @ 0x24
- 8017870: 687b ldr r3, [r7, #4]
- 8017872: 4413 add r3, r2
- 8017874: 61bb str r3, [r7, #24]
- configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
- 8017876: 69bb ldr r3, [r7, #24]
- 8017878: f003 0307 and.w r3, r3, #7
- 801787c: 2b00 cmp r3, #0
- 801787e: d00b beq.n 8017898 <pvPortMalloc+0xfc>
- __asm volatile
- 8017880: f04f 0350 mov.w r3, #80 @ 0x50
- 8017884: f383 8811 msr BASEPRI, r3
- 8017888: f3bf 8f6f isb sy
- 801788c: f3bf 8f4f dsb sy
- 8017890: 613b str r3, [r7, #16]
- }
- 8017892: bf00 nop
- 8017894: bf00 nop
- 8017896: e7fd b.n 8017894 <pvPortMalloc+0xf8>
- /* Calculate the sizes of two blocks split from the
- single block. */
- pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
- 8017898: 6a7b ldr r3, [r7, #36] @ 0x24
- 801789a: 685a ldr r2, [r3, #4]
- 801789c: 687b ldr r3, [r7, #4]
- 801789e: 1ad2 subs r2, r2, r3
- 80178a0: 69bb ldr r3, [r7, #24]
- 80178a2: 605a str r2, [r3, #4]
- pxBlock->xBlockSize = xWantedSize;
- 80178a4: 6a7b ldr r3, [r7, #36] @ 0x24
- 80178a6: 687a ldr r2, [r7, #4]
- 80178a8: 605a str r2, [r3, #4]
- /* Insert the new block into the list of free blocks. */
- prvInsertBlockIntoFreeList( pxNewBlockLink );
- 80178aa: 69b8 ldr r0, [r7, #24]
- 80178ac: f000 f90a bl 8017ac4 <prvInsertBlockIntoFreeList>
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- xFreeBytesRemaining -= pxBlock->xBlockSize;
- 80178b0: 4b1d ldr r3, [pc, #116] @ (8017928 <pvPortMalloc+0x18c>)
- 80178b2: 681a ldr r2, [r3, #0]
- 80178b4: 6a7b ldr r3, [r7, #36] @ 0x24
- 80178b6: 685b ldr r3, [r3, #4]
- 80178b8: 1ad3 subs r3, r2, r3
- 80178ba: 4a1b ldr r2, [pc, #108] @ (8017928 <pvPortMalloc+0x18c>)
- 80178bc: 6013 str r3, [r2, #0]
- if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
- 80178be: 4b1a ldr r3, [pc, #104] @ (8017928 <pvPortMalloc+0x18c>)
- 80178c0: 681a ldr r2, [r3, #0]
- 80178c2: 4b1b ldr r3, [pc, #108] @ (8017930 <pvPortMalloc+0x194>)
- 80178c4: 681b ldr r3, [r3, #0]
- 80178c6: 429a cmp r2, r3
- 80178c8: d203 bcs.n 80178d2 <pvPortMalloc+0x136>
- {
- xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
- 80178ca: 4b17 ldr r3, [pc, #92] @ (8017928 <pvPortMalloc+0x18c>)
- 80178cc: 681b ldr r3, [r3, #0]
- 80178ce: 4a18 ldr r2, [pc, #96] @ (8017930 <pvPortMalloc+0x194>)
- 80178d0: 6013 str r3, [r2, #0]
- mtCOVERAGE_TEST_MARKER();
- }
- /* The block is being returned - it is allocated and owned
- by the application and has no "next" block. */
- pxBlock->xBlockSize |= xBlockAllocatedBit;
- 80178d2: 6a7b ldr r3, [r7, #36] @ 0x24
- 80178d4: 685a ldr r2, [r3, #4]
- 80178d6: 4b13 ldr r3, [pc, #76] @ (8017924 <pvPortMalloc+0x188>)
- 80178d8: 681b ldr r3, [r3, #0]
- 80178da: 431a orrs r2, r3
- 80178dc: 6a7b ldr r3, [r7, #36] @ 0x24
- 80178de: 605a str r2, [r3, #4]
- pxBlock->pxNextFreeBlock = NULL;
- 80178e0: 6a7b ldr r3, [r7, #36] @ 0x24
- 80178e2: 2200 movs r2, #0
- 80178e4: 601a str r2, [r3, #0]
- xNumberOfSuccessfulAllocations++;
- 80178e6: 4b13 ldr r3, [pc, #76] @ (8017934 <pvPortMalloc+0x198>)
- 80178e8: 681b ldr r3, [r3, #0]
- 80178ea: 3301 adds r3, #1
- 80178ec: 4a11 ldr r2, [pc, #68] @ (8017934 <pvPortMalloc+0x198>)
- 80178ee: 6013 str r3, [r2, #0]
- mtCOVERAGE_TEST_MARKER();
- }
- traceMALLOC( pvReturn, xWantedSize );
- }
- ( void ) xTaskResumeAll();
- 80178f0: f7fe f87e bl 80159f0 <xTaskResumeAll>
- mtCOVERAGE_TEST_MARKER();
- }
- }
- #endif
- configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
- 80178f4: 69fb ldr r3, [r7, #28]
- 80178f6: f003 0307 and.w r3, r3, #7
- 80178fa: 2b00 cmp r3, #0
- 80178fc: d00b beq.n 8017916 <pvPortMalloc+0x17a>
- __asm volatile
- 80178fe: f04f 0350 mov.w r3, #80 @ 0x50
- 8017902: f383 8811 msr BASEPRI, r3
- 8017906: f3bf 8f6f isb sy
- 801790a: f3bf 8f4f dsb sy
- 801790e: 60fb str r3, [r7, #12]
- }
- 8017910: bf00 nop
- 8017912: bf00 nop
- 8017914: e7fd b.n 8017912 <pvPortMalloc+0x176>
- return pvReturn;
- 8017916: 69fb ldr r3, [r7, #28]
- }
- 8017918: 4618 mov r0, r3
- 801791a: 3728 adds r7, #40 @ 0x28
- 801791c: 46bd mov sp, r7
- 801791e: bd80 pop {r7, pc}
- 8017920: 24012cd0 .word 0x24012cd0
- 8017924: 24012ce4 .word 0x24012ce4
- 8017928: 24012cd4 .word 0x24012cd4
- 801792c: 24012cc8 .word 0x24012cc8
- 8017930: 24012cd8 .word 0x24012cd8
- 8017934: 24012cdc .word 0x24012cdc
- 08017938 <vPortFree>:
- /*-----------------------------------------------------------*/
- void vPortFree( void *pv )
- {
- 8017938: b580 push {r7, lr}
- 801793a: b086 sub sp, #24
- 801793c: af00 add r7, sp, #0
- 801793e: 6078 str r0, [r7, #4]
- uint8_t *puc = ( uint8_t * ) pv;
- 8017940: 687b ldr r3, [r7, #4]
- 8017942: 617b str r3, [r7, #20]
- BlockLink_t *pxLink;
- if( pv != NULL )
- 8017944: 687b ldr r3, [r7, #4]
- 8017946: 2b00 cmp r3, #0
- 8017948: d04f beq.n 80179ea <vPortFree+0xb2>
- {
- /* The memory being freed will have an BlockLink_t structure immediately
- before it. */
- puc -= xHeapStructSize;
- 801794a: 2308 movs r3, #8
- 801794c: 425b negs r3, r3
- 801794e: 697a ldr r2, [r7, #20]
- 8017950: 4413 add r3, r2
- 8017952: 617b str r3, [r7, #20]
- /* This casting is to keep the compiler from issuing warnings. */
- pxLink = ( void * ) puc;
- 8017954: 697b ldr r3, [r7, #20]
- 8017956: 613b str r3, [r7, #16]
- /* Check the block is actually allocated. */
- configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
- 8017958: 693b ldr r3, [r7, #16]
- 801795a: 685a ldr r2, [r3, #4]
- 801795c: 4b25 ldr r3, [pc, #148] @ (80179f4 <vPortFree+0xbc>)
- 801795e: 681b ldr r3, [r3, #0]
- 8017960: 4013 ands r3, r2
- 8017962: 2b00 cmp r3, #0
- 8017964: d10b bne.n 801797e <vPortFree+0x46>
- __asm volatile
- 8017966: f04f 0350 mov.w r3, #80 @ 0x50
- 801796a: f383 8811 msr BASEPRI, r3
- 801796e: f3bf 8f6f isb sy
- 8017972: f3bf 8f4f dsb sy
- 8017976: 60fb str r3, [r7, #12]
- }
- 8017978: bf00 nop
- 801797a: bf00 nop
- 801797c: e7fd b.n 801797a <vPortFree+0x42>
- configASSERT( pxLink->pxNextFreeBlock == NULL );
- 801797e: 693b ldr r3, [r7, #16]
- 8017980: 681b ldr r3, [r3, #0]
- 8017982: 2b00 cmp r3, #0
- 8017984: d00b beq.n 801799e <vPortFree+0x66>
- __asm volatile
- 8017986: f04f 0350 mov.w r3, #80 @ 0x50
- 801798a: f383 8811 msr BASEPRI, r3
- 801798e: f3bf 8f6f isb sy
- 8017992: f3bf 8f4f dsb sy
- 8017996: 60bb str r3, [r7, #8]
- }
- 8017998: bf00 nop
- 801799a: bf00 nop
- 801799c: e7fd b.n 801799a <vPortFree+0x62>
- if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
- 801799e: 693b ldr r3, [r7, #16]
- 80179a0: 685a ldr r2, [r3, #4]
- 80179a2: 4b14 ldr r3, [pc, #80] @ (80179f4 <vPortFree+0xbc>)
- 80179a4: 681b ldr r3, [r3, #0]
- 80179a6: 4013 ands r3, r2
- 80179a8: 2b00 cmp r3, #0
- 80179aa: d01e beq.n 80179ea <vPortFree+0xb2>
- {
- if( pxLink->pxNextFreeBlock == NULL )
- 80179ac: 693b ldr r3, [r7, #16]
- 80179ae: 681b ldr r3, [r3, #0]
- 80179b0: 2b00 cmp r3, #0
- 80179b2: d11a bne.n 80179ea <vPortFree+0xb2>
- {
- /* The block is being returned to the heap - it is no longer
- allocated. */
- pxLink->xBlockSize &= ~xBlockAllocatedBit;
- 80179b4: 693b ldr r3, [r7, #16]
- 80179b6: 685a ldr r2, [r3, #4]
- 80179b8: 4b0e ldr r3, [pc, #56] @ (80179f4 <vPortFree+0xbc>)
- 80179ba: 681b ldr r3, [r3, #0]
- 80179bc: 43db mvns r3, r3
- 80179be: 401a ands r2, r3
- 80179c0: 693b ldr r3, [r7, #16]
- 80179c2: 605a str r2, [r3, #4]
- vTaskSuspendAll();
- 80179c4: f7fe f806 bl 80159d4 <vTaskSuspendAll>
- {
- /* Add this block to the list of free blocks. */
- xFreeBytesRemaining += pxLink->xBlockSize;
- 80179c8: 693b ldr r3, [r7, #16]
- 80179ca: 685a ldr r2, [r3, #4]
- 80179cc: 4b0a ldr r3, [pc, #40] @ (80179f8 <vPortFree+0xc0>)
- 80179ce: 681b ldr r3, [r3, #0]
- 80179d0: 4413 add r3, r2
- 80179d2: 4a09 ldr r2, [pc, #36] @ (80179f8 <vPortFree+0xc0>)
- 80179d4: 6013 str r3, [r2, #0]
- traceFREE( pv, pxLink->xBlockSize );
- prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
- 80179d6: 6938 ldr r0, [r7, #16]
- 80179d8: f000 f874 bl 8017ac4 <prvInsertBlockIntoFreeList>
- xNumberOfSuccessfulFrees++;
- 80179dc: 4b07 ldr r3, [pc, #28] @ (80179fc <vPortFree+0xc4>)
- 80179de: 681b ldr r3, [r3, #0]
- 80179e0: 3301 adds r3, #1
- 80179e2: 4a06 ldr r2, [pc, #24] @ (80179fc <vPortFree+0xc4>)
- 80179e4: 6013 str r3, [r2, #0]
- }
- ( void ) xTaskResumeAll();
- 80179e6: f7fe f803 bl 80159f0 <xTaskResumeAll>
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- }
- 80179ea: bf00 nop
- 80179ec: 3718 adds r7, #24
- 80179ee: 46bd mov sp, r7
- 80179f0: bd80 pop {r7, pc}
- 80179f2: bf00 nop
- 80179f4: 24012ce4 .word 0x24012ce4
- 80179f8: 24012cd4 .word 0x24012cd4
- 80179fc: 24012ce0 .word 0x24012ce0
- 08017a00 <prvHeapInit>:
- /* This just exists to keep the linker quiet. */
- }
- /*-----------------------------------------------------------*/
- static void prvHeapInit( void )
- {
- 8017a00: b480 push {r7}
- 8017a02: b085 sub sp, #20
- 8017a04: af00 add r7, sp, #0
- BlockLink_t *pxFirstFreeBlock;
- uint8_t *pucAlignedHeap;
- size_t uxAddress;
- size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
- 8017a06: f44f 3380 mov.w r3, #65536 @ 0x10000
- 8017a0a: 60bb str r3, [r7, #8]
- /* Ensure the heap starts on a correctly aligned boundary. */
- uxAddress = ( size_t ) ucHeap;
- 8017a0c: 4b27 ldr r3, [pc, #156] @ (8017aac <prvHeapInit+0xac>)
- 8017a0e: 60fb str r3, [r7, #12]
- if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
- 8017a10: 68fb ldr r3, [r7, #12]
- 8017a12: f003 0307 and.w r3, r3, #7
- 8017a16: 2b00 cmp r3, #0
- 8017a18: d00c beq.n 8017a34 <prvHeapInit+0x34>
- {
- uxAddress += ( portBYTE_ALIGNMENT - 1 );
- 8017a1a: 68fb ldr r3, [r7, #12]
- 8017a1c: 3307 adds r3, #7
- 8017a1e: 60fb str r3, [r7, #12]
- uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
- 8017a20: 68fb ldr r3, [r7, #12]
- 8017a22: f023 0307 bic.w r3, r3, #7
- 8017a26: 60fb str r3, [r7, #12]
- xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
- 8017a28: 68ba ldr r2, [r7, #8]
- 8017a2a: 68fb ldr r3, [r7, #12]
- 8017a2c: 1ad3 subs r3, r2, r3
- 8017a2e: 4a1f ldr r2, [pc, #124] @ (8017aac <prvHeapInit+0xac>)
- 8017a30: 4413 add r3, r2
- 8017a32: 60bb str r3, [r7, #8]
- }
- pucAlignedHeap = ( uint8_t * ) uxAddress;
- 8017a34: 68fb ldr r3, [r7, #12]
- 8017a36: 607b str r3, [r7, #4]
- /* xStart is used to hold a pointer to the first item in the list of free
- blocks. The void cast is used to prevent compiler warnings. */
- xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
- 8017a38: 4a1d ldr r2, [pc, #116] @ (8017ab0 <prvHeapInit+0xb0>)
- 8017a3a: 687b ldr r3, [r7, #4]
- 8017a3c: 6013 str r3, [r2, #0]
- xStart.xBlockSize = ( size_t ) 0;
- 8017a3e: 4b1c ldr r3, [pc, #112] @ (8017ab0 <prvHeapInit+0xb0>)
- 8017a40: 2200 movs r2, #0
- 8017a42: 605a str r2, [r3, #4]
- /* pxEnd is used to mark the end of the list of free blocks and is inserted
- at the end of the heap space. */
- uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
- 8017a44: 687b ldr r3, [r7, #4]
- 8017a46: 68ba ldr r2, [r7, #8]
- 8017a48: 4413 add r3, r2
- 8017a4a: 60fb str r3, [r7, #12]
- uxAddress -= xHeapStructSize;
- 8017a4c: 2208 movs r2, #8
- 8017a4e: 68fb ldr r3, [r7, #12]
- 8017a50: 1a9b subs r3, r3, r2
- 8017a52: 60fb str r3, [r7, #12]
- uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
- 8017a54: 68fb ldr r3, [r7, #12]
- 8017a56: f023 0307 bic.w r3, r3, #7
- 8017a5a: 60fb str r3, [r7, #12]
- pxEnd = ( void * ) uxAddress;
- 8017a5c: 68fb ldr r3, [r7, #12]
- 8017a5e: 4a15 ldr r2, [pc, #84] @ (8017ab4 <prvHeapInit+0xb4>)
- 8017a60: 6013 str r3, [r2, #0]
- pxEnd->xBlockSize = 0;
- 8017a62: 4b14 ldr r3, [pc, #80] @ (8017ab4 <prvHeapInit+0xb4>)
- 8017a64: 681b ldr r3, [r3, #0]
- 8017a66: 2200 movs r2, #0
- 8017a68: 605a str r2, [r3, #4]
- pxEnd->pxNextFreeBlock = NULL;
- 8017a6a: 4b12 ldr r3, [pc, #72] @ (8017ab4 <prvHeapInit+0xb4>)
- 8017a6c: 681b ldr r3, [r3, #0]
- 8017a6e: 2200 movs r2, #0
- 8017a70: 601a str r2, [r3, #0]
- /* To start with there is a single free block that is sized to take up the
- entire heap space, minus the space taken by pxEnd. */
- pxFirstFreeBlock = ( void * ) pucAlignedHeap;
- 8017a72: 687b ldr r3, [r7, #4]
- 8017a74: 603b str r3, [r7, #0]
- pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
- 8017a76: 683b ldr r3, [r7, #0]
- 8017a78: 68fa ldr r2, [r7, #12]
- 8017a7a: 1ad2 subs r2, r2, r3
- 8017a7c: 683b ldr r3, [r7, #0]
- 8017a7e: 605a str r2, [r3, #4]
- pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
- 8017a80: 4b0c ldr r3, [pc, #48] @ (8017ab4 <prvHeapInit+0xb4>)
- 8017a82: 681a ldr r2, [r3, #0]
- 8017a84: 683b ldr r3, [r7, #0]
- 8017a86: 601a str r2, [r3, #0]
- /* Only one block exists - and it covers the entire usable heap space. */
- xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
- 8017a88: 683b ldr r3, [r7, #0]
- 8017a8a: 685b ldr r3, [r3, #4]
- 8017a8c: 4a0a ldr r2, [pc, #40] @ (8017ab8 <prvHeapInit+0xb8>)
- 8017a8e: 6013 str r3, [r2, #0]
- xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
- 8017a90: 683b ldr r3, [r7, #0]
- 8017a92: 685b ldr r3, [r3, #4]
- 8017a94: 4a09 ldr r2, [pc, #36] @ (8017abc <prvHeapInit+0xbc>)
- 8017a96: 6013 str r3, [r2, #0]
- /* Work out the position of the top bit in a size_t variable. */
- xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
- 8017a98: 4b09 ldr r3, [pc, #36] @ (8017ac0 <prvHeapInit+0xc0>)
- 8017a9a: f04f 4200 mov.w r2, #2147483648 @ 0x80000000
- 8017a9e: 601a str r2, [r3, #0]
- }
- 8017aa0: bf00 nop
- 8017aa2: 3714 adds r7, #20
- 8017aa4: 46bd mov sp, r7
- 8017aa6: f85d 7b04 ldr.w r7, [sp], #4
- 8017aaa: 4770 bx lr
- 8017aac: 24002cc8 .word 0x24002cc8
- 8017ab0: 24012cc8 .word 0x24012cc8
- 8017ab4: 24012cd0 .word 0x24012cd0
- 8017ab8: 24012cd8 .word 0x24012cd8
- 8017abc: 24012cd4 .word 0x24012cd4
- 8017ac0: 24012ce4 .word 0x24012ce4
- 08017ac4 <prvInsertBlockIntoFreeList>:
- /*-----------------------------------------------------------*/
- static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
- {
- 8017ac4: b480 push {r7}
- 8017ac6: b085 sub sp, #20
- 8017ac8: af00 add r7, sp, #0
- 8017aca: 6078 str r0, [r7, #4]
- BlockLink_t *pxIterator;
- uint8_t *puc;
- /* Iterate through the list until a block is found that has a higher address
- than the block being inserted. */
- for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
- 8017acc: 4b28 ldr r3, [pc, #160] @ (8017b70 <prvInsertBlockIntoFreeList+0xac>)
- 8017ace: 60fb str r3, [r7, #12]
- 8017ad0: e002 b.n 8017ad8 <prvInsertBlockIntoFreeList+0x14>
- 8017ad2: 68fb ldr r3, [r7, #12]
- 8017ad4: 681b ldr r3, [r3, #0]
- 8017ad6: 60fb str r3, [r7, #12]
- 8017ad8: 68fb ldr r3, [r7, #12]
- 8017ada: 681b ldr r3, [r3, #0]
- 8017adc: 687a ldr r2, [r7, #4]
- 8017ade: 429a cmp r2, r3
- 8017ae0: d8f7 bhi.n 8017ad2 <prvInsertBlockIntoFreeList+0xe>
- /* Nothing to do here, just iterate to the right position. */
- }
- /* Do the block being inserted, and the block it is being inserted after
- make a contiguous block of memory? */
- puc = ( uint8_t * ) pxIterator;
- 8017ae2: 68fb ldr r3, [r7, #12]
- 8017ae4: 60bb str r3, [r7, #8]
- if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
- 8017ae6: 68fb ldr r3, [r7, #12]
- 8017ae8: 685b ldr r3, [r3, #4]
- 8017aea: 68ba ldr r2, [r7, #8]
- 8017aec: 4413 add r3, r2
- 8017aee: 687a ldr r2, [r7, #4]
- 8017af0: 429a cmp r2, r3
- 8017af2: d108 bne.n 8017b06 <prvInsertBlockIntoFreeList+0x42>
- {
- pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
- 8017af4: 68fb ldr r3, [r7, #12]
- 8017af6: 685a ldr r2, [r3, #4]
- 8017af8: 687b ldr r3, [r7, #4]
- 8017afa: 685b ldr r3, [r3, #4]
- 8017afc: 441a add r2, r3
- 8017afe: 68fb ldr r3, [r7, #12]
- 8017b00: 605a str r2, [r3, #4]
- pxBlockToInsert = pxIterator;
- 8017b02: 68fb ldr r3, [r7, #12]
- 8017b04: 607b str r3, [r7, #4]
- mtCOVERAGE_TEST_MARKER();
- }
- /* Do the block being inserted, and the block it is being inserted before
- make a contiguous block of memory? */
- puc = ( uint8_t * ) pxBlockToInsert;
- 8017b06: 687b ldr r3, [r7, #4]
- 8017b08: 60bb str r3, [r7, #8]
- if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
- 8017b0a: 687b ldr r3, [r7, #4]
- 8017b0c: 685b ldr r3, [r3, #4]
- 8017b0e: 68ba ldr r2, [r7, #8]
- 8017b10: 441a add r2, r3
- 8017b12: 68fb ldr r3, [r7, #12]
- 8017b14: 681b ldr r3, [r3, #0]
- 8017b16: 429a cmp r2, r3
- 8017b18: d118 bne.n 8017b4c <prvInsertBlockIntoFreeList+0x88>
- {
- if( pxIterator->pxNextFreeBlock != pxEnd )
- 8017b1a: 68fb ldr r3, [r7, #12]
- 8017b1c: 681a ldr r2, [r3, #0]
- 8017b1e: 4b15 ldr r3, [pc, #84] @ (8017b74 <prvInsertBlockIntoFreeList+0xb0>)
- 8017b20: 681b ldr r3, [r3, #0]
- 8017b22: 429a cmp r2, r3
- 8017b24: d00d beq.n 8017b42 <prvInsertBlockIntoFreeList+0x7e>
- {
- /* Form one big block from the two blocks. */
- pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
- 8017b26: 687b ldr r3, [r7, #4]
- 8017b28: 685a ldr r2, [r3, #4]
- 8017b2a: 68fb ldr r3, [r7, #12]
- 8017b2c: 681b ldr r3, [r3, #0]
- 8017b2e: 685b ldr r3, [r3, #4]
- 8017b30: 441a add r2, r3
- 8017b32: 687b ldr r3, [r7, #4]
- 8017b34: 605a str r2, [r3, #4]
- pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
- 8017b36: 68fb ldr r3, [r7, #12]
- 8017b38: 681b ldr r3, [r3, #0]
- 8017b3a: 681a ldr r2, [r3, #0]
- 8017b3c: 687b ldr r3, [r7, #4]
- 8017b3e: 601a str r2, [r3, #0]
- 8017b40: e008 b.n 8017b54 <prvInsertBlockIntoFreeList+0x90>
- }
- else
- {
- pxBlockToInsert->pxNextFreeBlock = pxEnd;
- 8017b42: 4b0c ldr r3, [pc, #48] @ (8017b74 <prvInsertBlockIntoFreeList+0xb0>)
- 8017b44: 681a ldr r2, [r3, #0]
- 8017b46: 687b ldr r3, [r7, #4]
- 8017b48: 601a str r2, [r3, #0]
- 8017b4a: e003 b.n 8017b54 <prvInsertBlockIntoFreeList+0x90>
- }
- }
- else
- {
- pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
- 8017b4c: 68fb ldr r3, [r7, #12]
- 8017b4e: 681a ldr r2, [r3, #0]
- 8017b50: 687b ldr r3, [r7, #4]
- 8017b52: 601a str r2, [r3, #0]
- /* If the block being inserted plugged a gab, so was merged with the block
- before and the block after, then it's pxNextFreeBlock pointer will have
- already been set, and should not be set here as that would make it point
- to itself. */
- if( pxIterator != pxBlockToInsert )
- 8017b54: 68fa ldr r2, [r7, #12]
- 8017b56: 687b ldr r3, [r7, #4]
- 8017b58: 429a cmp r2, r3
- 8017b5a: d002 beq.n 8017b62 <prvInsertBlockIntoFreeList+0x9e>
- {
- pxIterator->pxNextFreeBlock = pxBlockToInsert;
- 8017b5c: 68fb ldr r3, [r7, #12]
- 8017b5e: 687a ldr r2, [r7, #4]
- 8017b60: 601a str r2, [r3, #0]
- }
- else
- {
- mtCOVERAGE_TEST_MARKER();
- }
- }
- 8017b62: bf00 nop
- 8017b64: 3714 adds r7, #20
- 8017b66: 46bd mov sp, r7
- 8017b68: f85d 7b04 ldr.w r7, [sp], #4
- 8017b6c: 4770 bx lr
- 8017b6e: bf00 nop
- 8017b70: 24012cc8 .word 0x24012cc8
- 8017b74: 24012cd0 .word 0x24012cd0
- 08017b78 <std>:
- 8017b78: 2300 movs r3, #0
- 8017b7a: b510 push {r4, lr}
- 8017b7c: 4604 mov r4, r0
- 8017b7e: e9c0 3300 strd r3, r3, [r0]
- 8017b82: e9c0 3304 strd r3, r3, [r0, #16]
- 8017b86: 6083 str r3, [r0, #8]
- 8017b88: 8181 strh r1, [r0, #12]
- 8017b8a: 6643 str r3, [r0, #100] @ 0x64
- 8017b8c: 81c2 strh r2, [r0, #14]
- 8017b8e: 6183 str r3, [r0, #24]
- 8017b90: 4619 mov r1, r3
- 8017b92: 2208 movs r2, #8
- 8017b94: 305c adds r0, #92 @ 0x5c
- 8017b96: f000 f906 bl 8017da6 <memset>
- 8017b9a: 4b0d ldr r3, [pc, #52] @ (8017bd0 <std+0x58>)
- 8017b9c: 6263 str r3, [r4, #36] @ 0x24
- 8017b9e: 4b0d ldr r3, [pc, #52] @ (8017bd4 <std+0x5c>)
- 8017ba0: 62a3 str r3, [r4, #40] @ 0x28
- 8017ba2: 4b0d ldr r3, [pc, #52] @ (8017bd8 <std+0x60>)
- 8017ba4: 62e3 str r3, [r4, #44] @ 0x2c
- 8017ba6: 4b0d ldr r3, [pc, #52] @ (8017bdc <std+0x64>)
- 8017ba8: 6323 str r3, [r4, #48] @ 0x30
- 8017baa: 4b0d ldr r3, [pc, #52] @ (8017be0 <std+0x68>)
- 8017bac: 6224 str r4, [r4, #32]
- 8017bae: 429c cmp r4, r3
- 8017bb0: d006 beq.n 8017bc0 <std+0x48>
- 8017bb2: f103 0268 add.w r2, r3, #104 @ 0x68
- 8017bb6: 4294 cmp r4, r2
- 8017bb8: d002 beq.n 8017bc0 <std+0x48>
- 8017bba: 33d0 adds r3, #208 @ 0xd0
- 8017bbc: 429c cmp r4, r3
- 8017bbe: d105 bne.n 8017bcc <std+0x54>
- 8017bc0: f104 0058 add.w r0, r4, #88 @ 0x58
- 8017bc4: e8bd 4010 ldmia.w sp!, {r4, lr}
- 8017bc8: f000 b9bc b.w 8017f44 <__retarget_lock_init_recursive>
- 8017bcc: bd10 pop {r4, pc}
- 8017bce: bf00 nop
- 8017bd0: 08017d21 .word 0x08017d21
- 8017bd4: 08017d43 .word 0x08017d43
- 8017bd8: 08017d7b .word 0x08017d7b
- 8017bdc: 08017d9f .word 0x08017d9f
- 8017be0: 24012ce8 .word 0x24012ce8
- 08017be4 <stdio_exit_handler>:
- 8017be4: 4a02 ldr r2, [pc, #8] @ (8017bf0 <stdio_exit_handler+0xc>)
- 8017be6: 4903 ldr r1, [pc, #12] @ (8017bf4 <stdio_exit_handler+0x10>)
- 8017be8: 4803 ldr r0, [pc, #12] @ (8017bf8 <stdio_exit_handler+0x14>)
- 8017bea: f000 b869 b.w 8017cc0 <_fwalk_sglue>
- 8017bee: bf00 nop
- 8017bf0: 24000048 .word 0x24000048
- 8017bf4: 08018801 .word 0x08018801
- 8017bf8: 24000058 .word 0x24000058
- 08017bfc <cleanup_stdio>:
- 8017bfc: 6841 ldr r1, [r0, #4]
- 8017bfe: 4b0c ldr r3, [pc, #48] @ (8017c30 <cleanup_stdio+0x34>)
- 8017c00: 4299 cmp r1, r3
- 8017c02: b510 push {r4, lr}
- 8017c04: 4604 mov r4, r0
- 8017c06: d001 beq.n 8017c0c <cleanup_stdio+0x10>
- 8017c08: f000 fdfa bl 8018800 <_fflush_r>
- 8017c0c: 68a1 ldr r1, [r4, #8]
- 8017c0e: 4b09 ldr r3, [pc, #36] @ (8017c34 <cleanup_stdio+0x38>)
- 8017c10: 4299 cmp r1, r3
- 8017c12: d002 beq.n 8017c1a <cleanup_stdio+0x1e>
- 8017c14: 4620 mov r0, r4
- 8017c16: f000 fdf3 bl 8018800 <_fflush_r>
- 8017c1a: 68e1 ldr r1, [r4, #12]
- 8017c1c: 4b06 ldr r3, [pc, #24] @ (8017c38 <cleanup_stdio+0x3c>)
- 8017c1e: 4299 cmp r1, r3
- 8017c20: d004 beq.n 8017c2c <cleanup_stdio+0x30>
- 8017c22: 4620 mov r0, r4
- 8017c24: e8bd 4010 ldmia.w sp!, {r4, lr}
- 8017c28: f000 bdea b.w 8018800 <_fflush_r>
- 8017c2c: bd10 pop {r4, pc}
- 8017c2e: bf00 nop
- 8017c30: 24012ce8 .word 0x24012ce8
- 8017c34: 24012d50 .word 0x24012d50
- 8017c38: 24012db8 .word 0x24012db8
- 08017c3c <global_stdio_init.part.0>:
- 8017c3c: b510 push {r4, lr}
- 8017c3e: 4b0b ldr r3, [pc, #44] @ (8017c6c <global_stdio_init.part.0+0x30>)
- 8017c40: 4c0b ldr r4, [pc, #44] @ (8017c70 <global_stdio_init.part.0+0x34>)
- 8017c42: 4a0c ldr r2, [pc, #48] @ (8017c74 <global_stdio_init.part.0+0x38>)
- 8017c44: 601a str r2, [r3, #0]
- 8017c46: 4620 mov r0, r4
- 8017c48: 2200 movs r2, #0
- 8017c4a: 2104 movs r1, #4
- 8017c4c: f7ff ff94 bl 8017b78 <std>
- 8017c50: f104 0068 add.w r0, r4, #104 @ 0x68
- 8017c54: 2201 movs r2, #1
- 8017c56: 2109 movs r1, #9
- 8017c58: f7ff ff8e bl 8017b78 <std>
- 8017c5c: f104 00d0 add.w r0, r4, #208 @ 0xd0
- 8017c60: 2202 movs r2, #2
- 8017c62: e8bd 4010 ldmia.w sp!, {r4, lr}
- 8017c66: 2112 movs r1, #18
- 8017c68: f7ff bf86 b.w 8017b78 <std>
- 8017c6c: 24012e20 .word 0x24012e20
- 8017c70: 24012ce8 .word 0x24012ce8
- 8017c74: 08017be5 .word 0x08017be5
- 08017c78 <__sfp_lock_acquire>:
- 8017c78: 4801 ldr r0, [pc, #4] @ (8017c80 <__sfp_lock_acquire+0x8>)
- 8017c7a: f000 b964 b.w 8017f46 <__retarget_lock_acquire_recursive>
- 8017c7e: bf00 nop
- 8017c80: 24012e29 .word 0x24012e29
- 08017c84 <__sfp_lock_release>:
- 8017c84: 4801 ldr r0, [pc, #4] @ (8017c8c <__sfp_lock_release+0x8>)
- 8017c86: f000 b95f b.w 8017f48 <__retarget_lock_release_recursive>
- 8017c8a: bf00 nop
- 8017c8c: 24012e29 .word 0x24012e29
- 08017c90 <__sinit>:
- 8017c90: b510 push {r4, lr}
- 8017c92: 4604 mov r4, r0
- 8017c94: f7ff fff0 bl 8017c78 <__sfp_lock_acquire>
- 8017c98: 6a23 ldr r3, [r4, #32]
- 8017c9a: b11b cbz r3, 8017ca4 <__sinit+0x14>
- 8017c9c: e8bd 4010 ldmia.w sp!, {r4, lr}
- 8017ca0: f7ff bff0 b.w 8017c84 <__sfp_lock_release>
- 8017ca4: 4b04 ldr r3, [pc, #16] @ (8017cb8 <__sinit+0x28>)
- 8017ca6: 6223 str r3, [r4, #32]
- 8017ca8: 4b04 ldr r3, [pc, #16] @ (8017cbc <__sinit+0x2c>)
- 8017caa: 681b ldr r3, [r3, #0]
- 8017cac: 2b00 cmp r3, #0
- 8017cae: d1f5 bne.n 8017c9c <__sinit+0xc>
- 8017cb0: f7ff ffc4 bl 8017c3c <global_stdio_init.part.0>
- 8017cb4: e7f2 b.n 8017c9c <__sinit+0xc>
- 8017cb6: bf00 nop
- 8017cb8: 08017bfd .word 0x08017bfd
- 8017cbc: 24012e20 .word 0x24012e20
- 08017cc0 <_fwalk_sglue>:
- 8017cc0: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
- 8017cc4: 4607 mov r7, r0
- 8017cc6: 4688 mov r8, r1
- 8017cc8: 4614 mov r4, r2
- 8017cca: 2600 movs r6, #0
- 8017ccc: e9d4 9501 ldrd r9, r5, [r4, #4]
- 8017cd0: f1b9 0901 subs.w r9, r9, #1
- 8017cd4: d505 bpl.n 8017ce2 <_fwalk_sglue+0x22>
- 8017cd6: 6824 ldr r4, [r4, #0]
- 8017cd8: 2c00 cmp r4, #0
- 8017cda: d1f7 bne.n 8017ccc <_fwalk_sglue+0xc>
- 8017cdc: 4630 mov r0, r6
- 8017cde: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
- 8017ce2: 89ab ldrh r3, [r5, #12]
- 8017ce4: 2b01 cmp r3, #1
- 8017ce6: d907 bls.n 8017cf8 <_fwalk_sglue+0x38>
- 8017ce8: f9b5 300e ldrsh.w r3, [r5, #14]
- 8017cec: 3301 adds r3, #1
- 8017cee: d003 beq.n 8017cf8 <_fwalk_sglue+0x38>
- 8017cf0: 4629 mov r1, r5
- 8017cf2: 4638 mov r0, r7
- 8017cf4: 47c0 blx r8
- 8017cf6: 4306 orrs r6, r0
- 8017cf8: 3568 adds r5, #104 @ 0x68
- 8017cfa: e7e9 b.n 8017cd0 <_fwalk_sglue+0x10>
- 08017cfc <iprintf>:
- 8017cfc: b40f push {r0, r1, r2, r3}
- 8017cfe: b507 push {r0, r1, r2, lr}
- 8017d00: 4906 ldr r1, [pc, #24] @ (8017d1c <iprintf+0x20>)
- 8017d02: ab04 add r3, sp, #16
- 8017d04: 6808 ldr r0, [r1, #0]
- 8017d06: f853 2b04 ldr.w r2, [r3], #4
- 8017d0a: 6881 ldr r1, [r0, #8]
- 8017d0c: 9301 str r3, [sp, #4]
- 8017d0e: f000 fa4d bl 80181ac <_vfiprintf_r>
- 8017d12: b003 add sp, #12
- 8017d14: f85d eb04 ldr.w lr, [sp], #4
- 8017d18: b004 add sp, #16
- 8017d1a: 4770 bx lr
- 8017d1c: 24000054 .word 0x24000054
- 08017d20 <__sread>:
- 8017d20: b510 push {r4, lr}
- 8017d22: 460c mov r4, r1
- 8017d24: f9b1 100e ldrsh.w r1, [r1, #14]
- 8017d28: f000 f8be bl 8017ea8 <_read_r>
- 8017d2c: 2800 cmp r0, #0
- 8017d2e: bfab itete ge
- 8017d30: 6d63 ldrge r3, [r4, #84] @ 0x54
- 8017d32: 89a3 ldrhlt r3, [r4, #12]
- 8017d34: 181b addge r3, r3, r0
- 8017d36: f423 5380 biclt.w r3, r3, #4096 @ 0x1000
- 8017d3a: bfac ite ge
- 8017d3c: 6563 strge r3, [r4, #84] @ 0x54
- 8017d3e: 81a3 strhlt r3, [r4, #12]
- 8017d40: bd10 pop {r4, pc}
- 08017d42 <__swrite>:
- 8017d42: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 8017d46: 461f mov r7, r3
- 8017d48: 898b ldrh r3, [r1, #12]
- 8017d4a: 05db lsls r3, r3, #23
- 8017d4c: 4605 mov r5, r0
- 8017d4e: 460c mov r4, r1
- 8017d50: 4616 mov r6, r2
- 8017d52: d505 bpl.n 8017d60 <__swrite+0x1e>
- 8017d54: f9b1 100e ldrsh.w r1, [r1, #14]
- 8017d58: 2302 movs r3, #2
- 8017d5a: 2200 movs r2, #0
- 8017d5c: f000 f892 bl 8017e84 <_lseek_r>
- 8017d60: 89a3 ldrh r3, [r4, #12]
- 8017d62: f9b4 100e ldrsh.w r1, [r4, #14]
- 8017d66: f423 5380 bic.w r3, r3, #4096 @ 0x1000
- 8017d6a: 81a3 strh r3, [r4, #12]
- 8017d6c: 4632 mov r2, r6
- 8017d6e: 463b mov r3, r7
- 8017d70: 4628 mov r0, r5
- 8017d72: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 8017d76: f000 b8a9 b.w 8017ecc <_write_r>
- 08017d7a <__sseek>:
- 8017d7a: b510 push {r4, lr}
- 8017d7c: 460c mov r4, r1
- 8017d7e: f9b1 100e ldrsh.w r1, [r1, #14]
- 8017d82: f000 f87f bl 8017e84 <_lseek_r>
- 8017d86: 1c43 adds r3, r0, #1
- 8017d88: 89a3 ldrh r3, [r4, #12]
- 8017d8a: bf15 itete ne
- 8017d8c: 6560 strne r0, [r4, #84] @ 0x54
- 8017d8e: f423 5380 biceq.w r3, r3, #4096 @ 0x1000
- 8017d92: f443 5380 orrne.w r3, r3, #4096 @ 0x1000
- 8017d96: 81a3 strheq r3, [r4, #12]
- 8017d98: bf18 it ne
- 8017d9a: 81a3 strhne r3, [r4, #12]
- 8017d9c: bd10 pop {r4, pc}
- 08017d9e <__sclose>:
- 8017d9e: f9b1 100e ldrsh.w r1, [r1, #14]
- 8017da2: f000 b809 b.w 8017db8 <_close_r>
- 08017da6 <memset>:
- 8017da6: 4402 add r2, r0
- 8017da8: 4603 mov r3, r0
- 8017daa: 4293 cmp r3, r2
- 8017dac: d100 bne.n 8017db0 <memset+0xa>
- 8017dae: 4770 bx lr
- 8017db0: f803 1b01 strb.w r1, [r3], #1
- 8017db4: e7f9 b.n 8017daa <memset+0x4>
- ...
- 08017db8 <_close_r>:
- 8017db8: b538 push {r3, r4, r5, lr}
- 8017dba: 4d06 ldr r5, [pc, #24] @ (8017dd4 <_close_r+0x1c>)
- 8017dbc: 2300 movs r3, #0
- 8017dbe: 4604 mov r4, r0
- 8017dc0: 4608 mov r0, r1
- 8017dc2: 602b str r3, [r5, #0]
- 8017dc4: f7ec f9cd bl 8004162 <_close>
- 8017dc8: 1c43 adds r3, r0, #1
- 8017dca: d102 bne.n 8017dd2 <_close_r+0x1a>
- 8017dcc: 682b ldr r3, [r5, #0]
- 8017dce: b103 cbz r3, 8017dd2 <_close_r+0x1a>
- 8017dd0: 6023 str r3, [r4, #0]
- 8017dd2: bd38 pop {r3, r4, r5, pc}
- 8017dd4: 24012e24 .word 0x24012e24
- 08017dd8 <_reclaim_reent>:
- 8017dd8: 4b29 ldr r3, [pc, #164] @ (8017e80 <_reclaim_reent+0xa8>)
- 8017dda: 681b ldr r3, [r3, #0]
- 8017ddc: 4283 cmp r3, r0
- 8017dde: b570 push {r4, r5, r6, lr}
- 8017de0: 4604 mov r4, r0
- 8017de2: d04b beq.n 8017e7c <_reclaim_reent+0xa4>
- 8017de4: 69c3 ldr r3, [r0, #28]
- 8017de6: b1ab cbz r3, 8017e14 <_reclaim_reent+0x3c>
- 8017de8: 68db ldr r3, [r3, #12]
- 8017dea: b16b cbz r3, 8017e08 <_reclaim_reent+0x30>
- 8017dec: 2500 movs r5, #0
- 8017dee: 69e3 ldr r3, [r4, #28]
- 8017df0: 68db ldr r3, [r3, #12]
- 8017df2: 5959 ldr r1, [r3, r5]
- 8017df4: 2900 cmp r1, #0
- 8017df6: d13b bne.n 8017e70 <_reclaim_reent+0x98>
- 8017df8: 3504 adds r5, #4
- 8017dfa: 2d80 cmp r5, #128 @ 0x80
- 8017dfc: d1f7 bne.n 8017dee <_reclaim_reent+0x16>
- 8017dfe: 69e3 ldr r3, [r4, #28]
- 8017e00: 4620 mov r0, r4
- 8017e02: 68d9 ldr r1, [r3, #12]
- 8017e04: f000 f8b0 bl 8017f68 <_free_r>
- 8017e08: 69e3 ldr r3, [r4, #28]
- 8017e0a: 6819 ldr r1, [r3, #0]
- 8017e0c: b111 cbz r1, 8017e14 <_reclaim_reent+0x3c>
- 8017e0e: 4620 mov r0, r4
- 8017e10: f000 f8aa bl 8017f68 <_free_r>
- 8017e14: 6961 ldr r1, [r4, #20]
- 8017e16: b111 cbz r1, 8017e1e <_reclaim_reent+0x46>
- 8017e18: 4620 mov r0, r4
- 8017e1a: f000 f8a5 bl 8017f68 <_free_r>
- 8017e1e: 69e1 ldr r1, [r4, #28]
- 8017e20: b111 cbz r1, 8017e28 <_reclaim_reent+0x50>
- 8017e22: 4620 mov r0, r4
- 8017e24: f000 f8a0 bl 8017f68 <_free_r>
- 8017e28: 6b21 ldr r1, [r4, #48] @ 0x30
- 8017e2a: b111 cbz r1, 8017e32 <_reclaim_reent+0x5a>
- 8017e2c: 4620 mov r0, r4
- 8017e2e: f000 f89b bl 8017f68 <_free_r>
- 8017e32: 6b61 ldr r1, [r4, #52] @ 0x34
- 8017e34: b111 cbz r1, 8017e3c <_reclaim_reent+0x64>
- 8017e36: 4620 mov r0, r4
- 8017e38: f000 f896 bl 8017f68 <_free_r>
- 8017e3c: 6ba1 ldr r1, [r4, #56] @ 0x38
- 8017e3e: b111 cbz r1, 8017e46 <_reclaim_reent+0x6e>
- 8017e40: 4620 mov r0, r4
- 8017e42: f000 f891 bl 8017f68 <_free_r>
- 8017e46: 6ca1 ldr r1, [r4, #72] @ 0x48
- 8017e48: b111 cbz r1, 8017e50 <_reclaim_reent+0x78>
- 8017e4a: 4620 mov r0, r4
- 8017e4c: f000 f88c bl 8017f68 <_free_r>
- 8017e50: 6c61 ldr r1, [r4, #68] @ 0x44
- 8017e52: b111 cbz r1, 8017e5a <_reclaim_reent+0x82>
- 8017e54: 4620 mov r0, r4
- 8017e56: f000 f887 bl 8017f68 <_free_r>
- 8017e5a: 6ae1 ldr r1, [r4, #44] @ 0x2c
- 8017e5c: b111 cbz r1, 8017e64 <_reclaim_reent+0x8c>
- 8017e5e: 4620 mov r0, r4
- 8017e60: f000 f882 bl 8017f68 <_free_r>
- 8017e64: 6a23 ldr r3, [r4, #32]
- 8017e66: b14b cbz r3, 8017e7c <_reclaim_reent+0xa4>
- 8017e68: 4620 mov r0, r4
- 8017e6a: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
- 8017e6e: 4718 bx r3
- 8017e70: 680e ldr r6, [r1, #0]
- 8017e72: 4620 mov r0, r4
- 8017e74: f000 f878 bl 8017f68 <_free_r>
- 8017e78: 4631 mov r1, r6
- 8017e7a: e7bb b.n 8017df4 <_reclaim_reent+0x1c>
- 8017e7c: bd70 pop {r4, r5, r6, pc}
- 8017e7e: bf00 nop
- 8017e80: 24000054 .word 0x24000054
- 08017e84 <_lseek_r>:
- 8017e84: b538 push {r3, r4, r5, lr}
- 8017e86: 4d07 ldr r5, [pc, #28] @ (8017ea4 <_lseek_r+0x20>)
- 8017e88: 4604 mov r4, r0
- 8017e8a: 4608 mov r0, r1
- 8017e8c: 4611 mov r1, r2
- 8017e8e: 2200 movs r2, #0
- 8017e90: 602a str r2, [r5, #0]
- 8017e92: 461a mov r2, r3
- 8017e94: f7ec f98c bl 80041b0 <_lseek>
- 8017e98: 1c43 adds r3, r0, #1
- 8017e9a: d102 bne.n 8017ea2 <_lseek_r+0x1e>
- 8017e9c: 682b ldr r3, [r5, #0]
- 8017e9e: b103 cbz r3, 8017ea2 <_lseek_r+0x1e>
- 8017ea0: 6023 str r3, [r4, #0]
- 8017ea2: bd38 pop {r3, r4, r5, pc}
- 8017ea4: 24012e24 .word 0x24012e24
- 08017ea8 <_read_r>:
- 8017ea8: b538 push {r3, r4, r5, lr}
- 8017eaa: 4d07 ldr r5, [pc, #28] @ (8017ec8 <_read_r+0x20>)
- 8017eac: 4604 mov r4, r0
- 8017eae: 4608 mov r0, r1
- 8017eb0: 4611 mov r1, r2
- 8017eb2: 2200 movs r2, #0
- 8017eb4: 602a str r2, [r5, #0]
- 8017eb6: 461a mov r2, r3
- 8017eb8: f7ec f91a bl 80040f0 <_read>
- 8017ebc: 1c43 adds r3, r0, #1
- 8017ebe: d102 bne.n 8017ec6 <_read_r+0x1e>
- 8017ec0: 682b ldr r3, [r5, #0]
- 8017ec2: b103 cbz r3, 8017ec6 <_read_r+0x1e>
- 8017ec4: 6023 str r3, [r4, #0]
- 8017ec6: bd38 pop {r3, r4, r5, pc}
- 8017ec8: 24012e24 .word 0x24012e24
- 08017ecc <_write_r>:
- 8017ecc: b538 push {r3, r4, r5, lr}
- 8017ece: 4d07 ldr r5, [pc, #28] @ (8017eec <_write_r+0x20>)
- 8017ed0: 4604 mov r4, r0
- 8017ed2: 4608 mov r0, r1
- 8017ed4: 4611 mov r1, r2
- 8017ed6: 2200 movs r2, #0
- 8017ed8: 602a str r2, [r5, #0]
- 8017eda: 461a mov r2, r3
- 8017edc: f7ec f925 bl 800412a <_write>
- 8017ee0: 1c43 adds r3, r0, #1
- 8017ee2: d102 bne.n 8017eea <_write_r+0x1e>
- 8017ee4: 682b ldr r3, [r5, #0]
- 8017ee6: b103 cbz r3, 8017eea <_write_r+0x1e>
- 8017ee8: 6023 str r3, [r4, #0]
- 8017eea: bd38 pop {r3, r4, r5, pc}
- 8017eec: 24012e24 .word 0x24012e24
- 08017ef0 <__errno>:
- 8017ef0: 4b01 ldr r3, [pc, #4] @ (8017ef8 <__errno+0x8>)
- 8017ef2: 6818 ldr r0, [r3, #0]
- 8017ef4: 4770 bx lr
- 8017ef6: bf00 nop
- 8017ef8: 24000054 .word 0x24000054
- 08017efc <__libc_init_array>:
- 8017efc: b570 push {r4, r5, r6, lr}
- 8017efe: 4d0d ldr r5, [pc, #52] @ (8017f34 <__libc_init_array+0x38>)
- 8017f00: 4c0d ldr r4, [pc, #52] @ (8017f38 <__libc_init_array+0x3c>)
- 8017f02: 1b64 subs r4, r4, r5
- 8017f04: 10a4 asrs r4, r4, #2
- 8017f06: 2600 movs r6, #0
- 8017f08: 42a6 cmp r6, r4
- 8017f0a: d109 bne.n 8017f20 <__libc_init_array+0x24>
- 8017f0c: 4d0b ldr r5, [pc, #44] @ (8017f3c <__libc_init_array+0x40>)
- 8017f0e: 4c0c ldr r4, [pc, #48] @ (8017f40 <__libc_init_array+0x44>)
- 8017f10: f000 fdc6 bl 8018aa0 <_init>
- 8017f14: 1b64 subs r4, r4, r5
- 8017f16: 10a4 asrs r4, r4, #2
- 8017f18: 2600 movs r6, #0
- 8017f1a: 42a6 cmp r6, r4
- 8017f1c: d105 bne.n 8017f2a <__libc_init_array+0x2e>
- 8017f1e: bd70 pop {r4, r5, r6, pc}
- 8017f20: f855 3b04 ldr.w r3, [r5], #4
- 8017f24: 4798 blx r3
- 8017f26: 3601 adds r6, #1
- 8017f28: e7ee b.n 8017f08 <__libc_init_array+0xc>
- 8017f2a: f855 3b04 ldr.w r3, [r5], #4
- 8017f2e: 4798 blx r3
- 8017f30: 3601 adds r6, #1
- 8017f32: e7f2 b.n 8017f1a <__libc_init_array+0x1e>
- 8017f34: 08018c94 .word 0x08018c94
- 8017f38: 08018c94 .word 0x08018c94
- 8017f3c: 08018c94 .word 0x08018c94
- 8017f40: 08018c98 .word 0x08018c98
- 08017f44 <__retarget_lock_init_recursive>:
- 8017f44: 4770 bx lr
- 08017f46 <__retarget_lock_acquire_recursive>:
- 8017f46: 4770 bx lr
- 08017f48 <__retarget_lock_release_recursive>:
- 8017f48: 4770 bx lr
- 08017f4a <memcpy>:
- 8017f4a: 440a add r2, r1
- 8017f4c: 4291 cmp r1, r2
- 8017f4e: f100 33ff add.w r3, r0, #4294967295 @ 0xffffffff
- 8017f52: d100 bne.n 8017f56 <memcpy+0xc>
- 8017f54: 4770 bx lr
- 8017f56: b510 push {r4, lr}
- 8017f58: f811 4b01 ldrb.w r4, [r1], #1
- 8017f5c: f803 4f01 strb.w r4, [r3, #1]!
- 8017f60: 4291 cmp r1, r2
- 8017f62: d1f9 bne.n 8017f58 <memcpy+0xe>
- 8017f64: bd10 pop {r4, pc}
- ...
- 08017f68 <_free_r>:
- 8017f68: b538 push {r3, r4, r5, lr}
- 8017f6a: 4605 mov r5, r0
- 8017f6c: 2900 cmp r1, #0
- 8017f6e: d041 beq.n 8017ff4 <_free_r+0x8c>
- 8017f70: f851 3c04 ldr.w r3, [r1, #-4]
- 8017f74: 1f0c subs r4, r1, #4
- 8017f76: 2b00 cmp r3, #0
- 8017f78: bfb8 it lt
- 8017f7a: 18e4 addlt r4, r4, r3
- 8017f7c: f000 f8e0 bl 8018140 <__malloc_lock>
- 8017f80: 4a1d ldr r2, [pc, #116] @ (8017ff8 <_free_r+0x90>)
- 8017f82: 6813 ldr r3, [r2, #0]
- 8017f84: b933 cbnz r3, 8017f94 <_free_r+0x2c>
- 8017f86: 6063 str r3, [r4, #4]
- 8017f88: 6014 str r4, [r2, #0]
- 8017f8a: 4628 mov r0, r5
- 8017f8c: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
- 8017f90: f000 b8dc b.w 801814c <__malloc_unlock>
- 8017f94: 42a3 cmp r3, r4
- 8017f96: d908 bls.n 8017faa <_free_r+0x42>
- 8017f98: 6820 ldr r0, [r4, #0]
- 8017f9a: 1821 adds r1, r4, r0
- 8017f9c: 428b cmp r3, r1
- 8017f9e: bf01 itttt eq
- 8017fa0: 6819 ldreq r1, [r3, #0]
- 8017fa2: 685b ldreq r3, [r3, #4]
- 8017fa4: 1809 addeq r1, r1, r0
- 8017fa6: 6021 streq r1, [r4, #0]
- 8017fa8: e7ed b.n 8017f86 <_free_r+0x1e>
- 8017faa: 461a mov r2, r3
- 8017fac: 685b ldr r3, [r3, #4]
- 8017fae: b10b cbz r3, 8017fb4 <_free_r+0x4c>
- 8017fb0: 42a3 cmp r3, r4
- 8017fb2: d9fa bls.n 8017faa <_free_r+0x42>
- 8017fb4: 6811 ldr r1, [r2, #0]
- 8017fb6: 1850 adds r0, r2, r1
- 8017fb8: 42a0 cmp r0, r4
- 8017fba: d10b bne.n 8017fd4 <_free_r+0x6c>
- 8017fbc: 6820 ldr r0, [r4, #0]
- 8017fbe: 4401 add r1, r0
- 8017fc0: 1850 adds r0, r2, r1
- 8017fc2: 4283 cmp r3, r0
- 8017fc4: 6011 str r1, [r2, #0]
- 8017fc6: d1e0 bne.n 8017f8a <_free_r+0x22>
- 8017fc8: 6818 ldr r0, [r3, #0]
- 8017fca: 685b ldr r3, [r3, #4]
- 8017fcc: 6053 str r3, [r2, #4]
- 8017fce: 4408 add r0, r1
- 8017fd0: 6010 str r0, [r2, #0]
- 8017fd2: e7da b.n 8017f8a <_free_r+0x22>
- 8017fd4: d902 bls.n 8017fdc <_free_r+0x74>
- 8017fd6: 230c movs r3, #12
- 8017fd8: 602b str r3, [r5, #0]
- 8017fda: e7d6 b.n 8017f8a <_free_r+0x22>
- 8017fdc: 6820 ldr r0, [r4, #0]
- 8017fde: 1821 adds r1, r4, r0
- 8017fe0: 428b cmp r3, r1
- 8017fe2: bf04 itt eq
- 8017fe4: 6819 ldreq r1, [r3, #0]
- 8017fe6: 685b ldreq r3, [r3, #4]
- 8017fe8: 6063 str r3, [r4, #4]
- 8017fea: bf04 itt eq
- 8017fec: 1809 addeq r1, r1, r0
- 8017fee: 6021 streq r1, [r4, #0]
- 8017ff0: 6054 str r4, [r2, #4]
- 8017ff2: e7ca b.n 8017f8a <_free_r+0x22>
- 8017ff4: bd38 pop {r3, r4, r5, pc}
- 8017ff6: bf00 nop
- 8017ff8: 24012e30 .word 0x24012e30
- 08017ffc <sbrk_aligned>:
- 8017ffc: b570 push {r4, r5, r6, lr}
- 8017ffe: 4e0f ldr r6, [pc, #60] @ (801803c <sbrk_aligned+0x40>)
- 8018000: 460c mov r4, r1
- 8018002: 6831 ldr r1, [r6, #0]
- 8018004: 4605 mov r5, r0
- 8018006: b911 cbnz r1, 801800e <sbrk_aligned+0x12>
- 8018008: f000 fcb6 bl 8018978 <_sbrk_r>
- 801800c: 6030 str r0, [r6, #0]
- 801800e: 4621 mov r1, r4
- 8018010: 4628 mov r0, r5
- 8018012: f000 fcb1 bl 8018978 <_sbrk_r>
- 8018016: 1c43 adds r3, r0, #1
- 8018018: d103 bne.n 8018022 <sbrk_aligned+0x26>
- 801801a: f04f 34ff mov.w r4, #4294967295 @ 0xffffffff
- 801801e: 4620 mov r0, r4
- 8018020: bd70 pop {r4, r5, r6, pc}
- 8018022: 1cc4 adds r4, r0, #3
- 8018024: f024 0403 bic.w r4, r4, #3
- 8018028: 42a0 cmp r0, r4
- 801802a: d0f8 beq.n 801801e <sbrk_aligned+0x22>
- 801802c: 1a21 subs r1, r4, r0
- 801802e: 4628 mov r0, r5
- 8018030: f000 fca2 bl 8018978 <_sbrk_r>
- 8018034: 3001 adds r0, #1
- 8018036: d1f2 bne.n 801801e <sbrk_aligned+0x22>
- 8018038: e7ef b.n 801801a <sbrk_aligned+0x1e>
- 801803a: bf00 nop
- 801803c: 24012e2c .word 0x24012e2c
- 08018040 <_malloc_r>:
- 8018040: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
- 8018044: 1ccd adds r5, r1, #3
- 8018046: f025 0503 bic.w r5, r5, #3
- 801804a: 3508 adds r5, #8
- 801804c: 2d0c cmp r5, #12
- 801804e: bf38 it cc
- 8018050: 250c movcc r5, #12
- 8018052: 2d00 cmp r5, #0
- 8018054: 4606 mov r6, r0
- 8018056: db01 blt.n 801805c <_malloc_r+0x1c>
- 8018058: 42a9 cmp r1, r5
- 801805a: d904 bls.n 8018066 <_malloc_r+0x26>
- 801805c: 230c movs r3, #12
- 801805e: 6033 str r3, [r6, #0]
- 8018060: 2000 movs r0, #0
- 8018062: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
- 8018066: f8df 80d4 ldr.w r8, [pc, #212] @ 801813c <_malloc_r+0xfc>
- 801806a: f000 f869 bl 8018140 <__malloc_lock>
- 801806e: f8d8 3000 ldr.w r3, [r8]
- 8018072: 461c mov r4, r3
- 8018074: bb44 cbnz r4, 80180c8 <_malloc_r+0x88>
- 8018076: 4629 mov r1, r5
- 8018078: 4630 mov r0, r6
- 801807a: f7ff ffbf bl 8017ffc <sbrk_aligned>
- 801807e: 1c43 adds r3, r0, #1
- 8018080: 4604 mov r4, r0
- 8018082: d158 bne.n 8018136 <_malloc_r+0xf6>
- 8018084: f8d8 4000 ldr.w r4, [r8]
- 8018088: 4627 mov r7, r4
- 801808a: 2f00 cmp r7, #0
- 801808c: d143 bne.n 8018116 <_malloc_r+0xd6>
- 801808e: 2c00 cmp r4, #0
- 8018090: d04b beq.n 801812a <_malloc_r+0xea>
- 8018092: 6823 ldr r3, [r4, #0]
- 8018094: 4639 mov r1, r7
- 8018096: 4630 mov r0, r6
- 8018098: eb04 0903 add.w r9, r4, r3
- 801809c: f000 fc6c bl 8018978 <_sbrk_r>
- 80180a0: 4581 cmp r9, r0
- 80180a2: d142 bne.n 801812a <_malloc_r+0xea>
- 80180a4: 6821 ldr r1, [r4, #0]
- 80180a6: 1a6d subs r5, r5, r1
- 80180a8: 4629 mov r1, r5
- 80180aa: 4630 mov r0, r6
- 80180ac: f7ff ffa6 bl 8017ffc <sbrk_aligned>
- 80180b0: 3001 adds r0, #1
- 80180b2: d03a beq.n 801812a <_malloc_r+0xea>
- 80180b4: 6823 ldr r3, [r4, #0]
- 80180b6: 442b add r3, r5
- 80180b8: 6023 str r3, [r4, #0]
- 80180ba: f8d8 3000 ldr.w r3, [r8]
- 80180be: 685a ldr r2, [r3, #4]
- 80180c0: bb62 cbnz r2, 801811c <_malloc_r+0xdc>
- 80180c2: f8c8 7000 str.w r7, [r8]
- 80180c6: e00f b.n 80180e8 <_malloc_r+0xa8>
- 80180c8: 6822 ldr r2, [r4, #0]
- 80180ca: 1b52 subs r2, r2, r5
- 80180cc: d420 bmi.n 8018110 <_malloc_r+0xd0>
- 80180ce: 2a0b cmp r2, #11
- 80180d0: d917 bls.n 8018102 <_malloc_r+0xc2>
- 80180d2: 1961 adds r1, r4, r5
- 80180d4: 42a3 cmp r3, r4
- 80180d6: 6025 str r5, [r4, #0]
- 80180d8: bf18 it ne
- 80180da: 6059 strne r1, [r3, #4]
- 80180dc: 6863 ldr r3, [r4, #4]
- 80180de: bf08 it eq
- 80180e0: f8c8 1000 streq.w r1, [r8]
- 80180e4: 5162 str r2, [r4, r5]
- 80180e6: 604b str r3, [r1, #4]
- 80180e8: 4630 mov r0, r6
- 80180ea: f000 f82f bl 801814c <__malloc_unlock>
- 80180ee: f104 000b add.w r0, r4, #11
- 80180f2: 1d23 adds r3, r4, #4
- 80180f4: f020 0007 bic.w r0, r0, #7
- 80180f8: 1ac2 subs r2, r0, r3
- 80180fa: bf1c itt ne
- 80180fc: 1a1b subne r3, r3, r0
- 80180fe: 50a3 strne r3, [r4, r2]
- 8018100: e7af b.n 8018062 <_malloc_r+0x22>
- 8018102: 6862 ldr r2, [r4, #4]
- 8018104: 42a3 cmp r3, r4
- 8018106: bf0c ite eq
- 8018108: f8c8 2000 streq.w r2, [r8]
- 801810c: 605a strne r2, [r3, #4]
- 801810e: e7eb b.n 80180e8 <_malloc_r+0xa8>
- 8018110: 4623 mov r3, r4
- 8018112: 6864 ldr r4, [r4, #4]
- 8018114: e7ae b.n 8018074 <_malloc_r+0x34>
- 8018116: 463c mov r4, r7
- 8018118: 687f ldr r7, [r7, #4]
- 801811a: e7b6 b.n 801808a <_malloc_r+0x4a>
- 801811c: 461a mov r2, r3
- 801811e: 685b ldr r3, [r3, #4]
- 8018120: 42a3 cmp r3, r4
- 8018122: d1fb bne.n 801811c <_malloc_r+0xdc>
- 8018124: 2300 movs r3, #0
- 8018126: 6053 str r3, [r2, #4]
- 8018128: e7de b.n 80180e8 <_malloc_r+0xa8>
- 801812a: 230c movs r3, #12
- 801812c: 6033 str r3, [r6, #0]
- 801812e: 4630 mov r0, r6
- 8018130: f000 f80c bl 801814c <__malloc_unlock>
- 8018134: e794 b.n 8018060 <_malloc_r+0x20>
- 8018136: 6005 str r5, [r0, #0]
- 8018138: e7d6 b.n 80180e8 <_malloc_r+0xa8>
- 801813a: bf00 nop
- 801813c: 24012e30 .word 0x24012e30
- 08018140 <__malloc_lock>:
- 8018140: 4801 ldr r0, [pc, #4] @ (8018148 <__malloc_lock+0x8>)
- 8018142: f7ff bf00 b.w 8017f46 <__retarget_lock_acquire_recursive>
- 8018146: bf00 nop
- 8018148: 24012e28 .word 0x24012e28
- 0801814c <__malloc_unlock>:
- 801814c: 4801 ldr r0, [pc, #4] @ (8018154 <__malloc_unlock+0x8>)
- 801814e: f7ff befb b.w 8017f48 <__retarget_lock_release_recursive>
- 8018152: bf00 nop
- 8018154: 24012e28 .word 0x24012e28
- 08018158 <__sfputc_r>:
- 8018158: 6893 ldr r3, [r2, #8]
- 801815a: 3b01 subs r3, #1
- 801815c: 2b00 cmp r3, #0
- 801815e: b410 push {r4}
- 8018160: 6093 str r3, [r2, #8]
- 8018162: da08 bge.n 8018176 <__sfputc_r+0x1e>
- 8018164: 6994 ldr r4, [r2, #24]
- 8018166: 42a3 cmp r3, r4
- 8018168: db01 blt.n 801816e <__sfputc_r+0x16>
- 801816a: 290a cmp r1, #10
- 801816c: d103 bne.n 8018176 <__sfputc_r+0x1e>
- 801816e: f85d 4b04 ldr.w r4, [sp], #4
- 8018172: f000 bb6d b.w 8018850 <__swbuf_r>
- 8018176: 6813 ldr r3, [r2, #0]
- 8018178: 1c58 adds r0, r3, #1
- 801817a: 6010 str r0, [r2, #0]
- 801817c: 7019 strb r1, [r3, #0]
- 801817e: 4608 mov r0, r1
- 8018180: f85d 4b04 ldr.w r4, [sp], #4
- 8018184: 4770 bx lr
- 08018186 <__sfputs_r>:
- 8018186: b5f8 push {r3, r4, r5, r6, r7, lr}
- 8018188: 4606 mov r6, r0
- 801818a: 460f mov r7, r1
- 801818c: 4614 mov r4, r2
- 801818e: 18d5 adds r5, r2, r3
- 8018190: 42ac cmp r4, r5
- 8018192: d101 bne.n 8018198 <__sfputs_r+0x12>
- 8018194: 2000 movs r0, #0
- 8018196: e007 b.n 80181a8 <__sfputs_r+0x22>
- 8018198: f814 1b01 ldrb.w r1, [r4], #1
- 801819c: 463a mov r2, r7
- 801819e: 4630 mov r0, r6
- 80181a0: f7ff ffda bl 8018158 <__sfputc_r>
- 80181a4: 1c43 adds r3, r0, #1
- 80181a6: d1f3 bne.n 8018190 <__sfputs_r+0xa>
- 80181a8: bdf8 pop {r3, r4, r5, r6, r7, pc}
- ...
- 080181ac <_vfiprintf_r>:
- 80181ac: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 80181b0: 460d mov r5, r1
- 80181b2: b09d sub sp, #116 @ 0x74
- 80181b4: 4614 mov r4, r2
- 80181b6: 4698 mov r8, r3
- 80181b8: 4606 mov r6, r0
- 80181ba: b118 cbz r0, 80181c4 <_vfiprintf_r+0x18>
- 80181bc: 6a03 ldr r3, [r0, #32]
- 80181be: b90b cbnz r3, 80181c4 <_vfiprintf_r+0x18>
- 80181c0: f7ff fd66 bl 8017c90 <__sinit>
- 80181c4: 6e6b ldr r3, [r5, #100] @ 0x64
- 80181c6: 07d9 lsls r1, r3, #31
- 80181c8: d405 bmi.n 80181d6 <_vfiprintf_r+0x2a>
- 80181ca: 89ab ldrh r3, [r5, #12]
- 80181cc: 059a lsls r2, r3, #22
- 80181ce: d402 bmi.n 80181d6 <_vfiprintf_r+0x2a>
- 80181d0: 6da8 ldr r0, [r5, #88] @ 0x58
- 80181d2: f7ff feb8 bl 8017f46 <__retarget_lock_acquire_recursive>
- 80181d6: 89ab ldrh r3, [r5, #12]
- 80181d8: 071b lsls r3, r3, #28
- 80181da: d501 bpl.n 80181e0 <_vfiprintf_r+0x34>
- 80181dc: 692b ldr r3, [r5, #16]
- 80181de: b99b cbnz r3, 8018208 <_vfiprintf_r+0x5c>
- 80181e0: 4629 mov r1, r5
- 80181e2: 4630 mov r0, r6
- 80181e4: f000 fb72 bl 80188cc <__swsetup_r>
- 80181e8: b170 cbz r0, 8018208 <_vfiprintf_r+0x5c>
- 80181ea: 6e6b ldr r3, [r5, #100] @ 0x64
- 80181ec: 07dc lsls r4, r3, #31
- 80181ee: d504 bpl.n 80181fa <_vfiprintf_r+0x4e>
- 80181f0: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
- 80181f4: b01d add sp, #116 @ 0x74
- 80181f6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 80181fa: 89ab ldrh r3, [r5, #12]
- 80181fc: 0598 lsls r0, r3, #22
- 80181fe: d4f7 bmi.n 80181f0 <_vfiprintf_r+0x44>
- 8018200: 6da8 ldr r0, [r5, #88] @ 0x58
- 8018202: f7ff fea1 bl 8017f48 <__retarget_lock_release_recursive>
- 8018206: e7f3 b.n 80181f0 <_vfiprintf_r+0x44>
- 8018208: 2300 movs r3, #0
- 801820a: 9309 str r3, [sp, #36] @ 0x24
- 801820c: 2320 movs r3, #32
- 801820e: f88d 3029 strb.w r3, [sp, #41] @ 0x29
- 8018212: f8cd 800c str.w r8, [sp, #12]
- 8018216: 2330 movs r3, #48 @ 0x30
- 8018218: f8df 81ac ldr.w r8, [pc, #428] @ 80183c8 <_vfiprintf_r+0x21c>
- 801821c: f88d 302a strb.w r3, [sp, #42] @ 0x2a
- 8018220: f04f 0901 mov.w r9, #1
- 8018224: 4623 mov r3, r4
- 8018226: 469a mov sl, r3
- 8018228: f813 2b01 ldrb.w r2, [r3], #1
- 801822c: b10a cbz r2, 8018232 <_vfiprintf_r+0x86>
- 801822e: 2a25 cmp r2, #37 @ 0x25
- 8018230: d1f9 bne.n 8018226 <_vfiprintf_r+0x7a>
- 8018232: ebba 0b04 subs.w fp, sl, r4
- 8018236: d00b beq.n 8018250 <_vfiprintf_r+0xa4>
- 8018238: 465b mov r3, fp
- 801823a: 4622 mov r2, r4
- 801823c: 4629 mov r1, r5
- 801823e: 4630 mov r0, r6
- 8018240: f7ff ffa1 bl 8018186 <__sfputs_r>
- 8018244: 3001 adds r0, #1
- 8018246: f000 80a7 beq.w 8018398 <_vfiprintf_r+0x1ec>
- 801824a: 9a09 ldr r2, [sp, #36] @ 0x24
- 801824c: 445a add r2, fp
- 801824e: 9209 str r2, [sp, #36] @ 0x24
- 8018250: f89a 3000 ldrb.w r3, [sl]
- 8018254: 2b00 cmp r3, #0
- 8018256: f000 809f beq.w 8018398 <_vfiprintf_r+0x1ec>
- 801825a: 2300 movs r3, #0
- 801825c: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
- 8018260: e9cd 2305 strd r2, r3, [sp, #20]
- 8018264: f10a 0a01 add.w sl, sl, #1
- 8018268: 9304 str r3, [sp, #16]
- 801826a: 9307 str r3, [sp, #28]
- 801826c: f88d 3053 strb.w r3, [sp, #83] @ 0x53
- 8018270: 931a str r3, [sp, #104] @ 0x68
- 8018272: 4654 mov r4, sl
- 8018274: 2205 movs r2, #5
- 8018276: f814 1b01 ldrb.w r1, [r4], #1
- 801827a: 4853 ldr r0, [pc, #332] @ (80183c8 <_vfiprintf_r+0x21c>)
- 801827c: f7e8 f830 bl 80002e0 <memchr>
- 8018280: 9a04 ldr r2, [sp, #16]
- 8018282: b9d8 cbnz r0, 80182bc <_vfiprintf_r+0x110>
- 8018284: 06d1 lsls r1, r2, #27
- 8018286: bf44 itt mi
- 8018288: 2320 movmi r3, #32
- 801828a: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
- 801828e: 0713 lsls r3, r2, #28
- 8018290: bf44 itt mi
- 8018292: 232b movmi r3, #43 @ 0x2b
- 8018294: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
- 8018298: f89a 3000 ldrb.w r3, [sl]
- 801829c: 2b2a cmp r3, #42 @ 0x2a
- 801829e: d015 beq.n 80182cc <_vfiprintf_r+0x120>
- 80182a0: 9a07 ldr r2, [sp, #28]
- 80182a2: 4654 mov r4, sl
- 80182a4: 2000 movs r0, #0
- 80182a6: f04f 0c0a mov.w ip, #10
- 80182aa: 4621 mov r1, r4
- 80182ac: f811 3b01 ldrb.w r3, [r1], #1
- 80182b0: 3b30 subs r3, #48 @ 0x30
- 80182b2: 2b09 cmp r3, #9
- 80182b4: d94b bls.n 801834e <_vfiprintf_r+0x1a2>
- 80182b6: b1b0 cbz r0, 80182e6 <_vfiprintf_r+0x13a>
- 80182b8: 9207 str r2, [sp, #28]
- 80182ba: e014 b.n 80182e6 <_vfiprintf_r+0x13a>
- 80182bc: eba0 0308 sub.w r3, r0, r8
- 80182c0: fa09 f303 lsl.w r3, r9, r3
- 80182c4: 4313 orrs r3, r2
- 80182c6: 9304 str r3, [sp, #16]
- 80182c8: 46a2 mov sl, r4
- 80182ca: e7d2 b.n 8018272 <_vfiprintf_r+0xc6>
- 80182cc: 9b03 ldr r3, [sp, #12]
- 80182ce: 1d19 adds r1, r3, #4
- 80182d0: 681b ldr r3, [r3, #0]
- 80182d2: 9103 str r1, [sp, #12]
- 80182d4: 2b00 cmp r3, #0
- 80182d6: bfbb ittet lt
- 80182d8: 425b neglt r3, r3
- 80182da: f042 0202 orrlt.w r2, r2, #2
- 80182de: 9307 strge r3, [sp, #28]
- 80182e0: 9307 strlt r3, [sp, #28]
- 80182e2: bfb8 it lt
- 80182e4: 9204 strlt r2, [sp, #16]
- 80182e6: 7823 ldrb r3, [r4, #0]
- 80182e8: 2b2e cmp r3, #46 @ 0x2e
- 80182ea: d10a bne.n 8018302 <_vfiprintf_r+0x156>
- 80182ec: 7863 ldrb r3, [r4, #1]
- 80182ee: 2b2a cmp r3, #42 @ 0x2a
- 80182f0: d132 bne.n 8018358 <_vfiprintf_r+0x1ac>
- 80182f2: 9b03 ldr r3, [sp, #12]
- 80182f4: 1d1a adds r2, r3, #4
- 80182f6: 681b ldr r3, [r3, #0]
- 80182f8: 9203 str r2, [sp, #12]
- 80182fa: ea43 73e3 orr.w r3, r3, r3, asr #31
- 80182fe: 3402 adds r4, #2
- 8018300: 9305 str r3, [sp, #20]
- 8018302: f8df a0d4 ldr.w sl, [pc, #212] @ 80183d8 <_vfiprintf_r+0x22c>
- 8018306: 7821 ldrb r1, [r4, #0]
- 8018308: 2203 movs r2, #3
- 801830a: 4650 mov r0, sl
- 801830c: f7e7 ffe8 bl 80002e0 <memchr>
- 8018310: b138 cbz r0, 8018322 <_vfiprintf_r+0x176>
- 8018312: 9b04 ldr r3, [sp, #16]
- 8018314: eba0 000a sub.w r0, r0, sl
- 8018318: 2240 movs r2, #64 @ 0x40
- 801831a: 4082 lsls r2, r0
- 801831c: 4313 orrs r3, r2
- 801831e: 3401 adds r4, #1
- 8018320: 9304 str r3, [sp, #16]
- 8018322: f814 1b01 ldrb.w r1, [r4], #1
- 8018326: 4829 ldr r0, [pc, #164] @ (80183cc <_vfiprintf_r+0x220>)
- 8018328: f88d 1028 strb.w r1, [sp, #40] @ 0x28
- 801832c: 2206 movs r2, #6
- 801832e: f7e7 ffd7 bl 80002e0 <memchr>
- 8018332: 2800 cmp r0, #0
- 8018334: d03f beq.n 80183b6 <_vfiprintf_r+0x20a>
- 8018336: 4b26 ldr r3, [pc, #152] @ (80183d0 <_vfiprintf_r+0x224>)
- 8018338: bb1b cbnz r3, 8018382 <_vfiprintf_r+0x1d6>
- 801833a: 9b03 ldr r3, [sp, #12]
- 801833c: 3307 adds r3, #7
- 801833e: f023 0307 bic.w r3, r3, #7
- 8018342: 3308 adds r3, #8
- 8018344: 9303 str r3, [sp, #12]
- 8018346: 9b09 ldr r3, [sp, #36] @ 0x24
- 8018348: 443b add r3, r7
- 801834a: 9309 str r3, [sp, #36] @ 0x24
- 801834c: e76a b.n 8018224 <_vfiprintf_r+0x78>
- 801834e: fb0c 3202 mla r2, ip, r2, r3
- 8018352: 460c mov r4, r1
- 8018354: 2001 movs r0, #1
- 8018356: e7a8 b.n 80182aa <_vfiprintf_r+0xfe>
- 8018358: 2300 movs r3, #0
- 801835a: 3401 adds r4, #1
- 801835c: 9305 str r3, [sp, #20]
- 801835e: 4619 mov r1, r3
- 8018360: f04f 0c0a mov.w ip, #10
- 8018364: 4620 mov r0, r4
- 8018366: f810 2b01 ldrb.w r2, [r0], #1
- 801836a: 3a30 subs r2, #48 @ 0x30
- 801836c: 2a09 cmp r2, #9
- 801836e: d903 bls.n 8018378 <_vfiprintf_r+0x1cc>
- 8018370: 2b00 cmp r3, #0
- 8018372: d0c6 beq.n 8018302 <_vfiprintf_r+0x156>
- 8018374: 9105 str r1, [sp, #20]
- 8018376: e7c4 b.n 8018302 <_vfiprintf_r+0x156>
- 8018378: fb0c 2101 mla r1, ip, r1, r2
- 801837c: 4604 mov r4, r0
- 801837e: 2301 movs r3, #1
- 8018380: e7f0 b.n 8018364 <_vfiprintf_r+0x1b8>
- 8018382: ab03 add r3, sp, #12
- 8018384: 9300 str r3, [sp, #0]
- 8018386: 462a mov r2, r5
- 8018388: 4b12 ldr r3, [pc, #72] @ (80183d4 <_vfiprintf_r+0x228>)
- 801838a: a904 add r1, sp, #16
- 801838c: 4630 mov r0, r6
- 801838e: f3af 8000 nop.w
- 8018392: 4607 mov r7, r0
- 8018394: 1c78 adds r0, r7, #1
- 8018396: d1d6 bne.n 8018346 <_vfiprintf_r+0x19a>
- 8018398: 6e6b ldr r3, [r5, #100] @ 0x64
- 801839a: 07d9 lsls r1, r3, #31
- 801839c: d405 bmi.n 80183aa <_vfiprintf_r+0x1fe>
- 801839e: 89ab ldrh r3, [r5, #12]
- 80183a0: 059a lsls r2, r3, #22
- 80183a2: d402 bmi.n 80183aa <_vfiprintf_r+0x1fe>
- 80183a4: 6da8 ldr r0, [r5, #88] @ 0x58
- 80183a6: f7ff fdcf bl 8017f48 <__retarget_lock_release_recursive>
- 80183aa: 89ab ldrh r3, [r5, #12]
- 80183ac: 065b lsls r3, r3, #25
- 80183ae: f53f af1f bmi.w 80181f0 <_vfiprintf_r+0x44>
- 80183b2: 9809 ldr r0, [sp, #36] @ 0x24
- 80183b4: e71e b.n 80181f4 <_vfiprintf_r+0x48>
- 80183b6: ab03 add r3, sp, #12
- 80183b8: 9300 str r3, [sp, #0]
- 80183ba: 462a mov r2, r5
- 80183bc: 4b05 ldr r3, [pc, #20] @ (80183d4 <_vfiprintf_r+0x228>)
- 80183be: a904 add r1, sp, #16
- 80183c0: 4630 mov r0, r6
- 80183c2: f000 f879 bl 80184b8 <_printf_i>
- 80183c6: e7e4 b.n 8018392 <_vfiprintf_r+0x1e6>
- 80183c8: 08018c58 .word 0x08018c58
- 80183cc: 08018c62 .word 0x08018c62
- 80183d0: 00000000 .word 0x00000000
- 80183d4: 08018187 .word 0x08018187
- 80183d8: 08018c5e .word 0x08018c5e
- 080183dc <_printf_common>:
- 80183dc: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 80183e0: 4616 mov r6, r2
- 80183e2: 4698 mov r8, r3
- 80183e4: 688a ldr r2, [r1, #8]
- 80183e6: 690b ldr r3, [r1, #16]
- 80183e8: f8dd 9020 ldr.w r9, [sp, #32]
- 80183ec: 4293 cmp r3, r2
- 80183ee: bfb8 it lt
- 80183f0: 4613 movlt r3, r2
- 80183f2: 6033 str r3, [r6, #0]
- 80183f4: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
- 80183f8: 4607 mov r7, r0
- 80183fa: 460c mov r4, r1
- 80183fc: b10a cbz r2, 8018402 <_printf_common+0x26>
- 80183fe: 3301 adds r3, #1
- 8018400: 6033 str r3, [r6, #0]
- 8018402: 6823 ldr r3, [r4, #0]
- 8018404: 0699 lsls r1, r3, #26
- 8018406: bf42 ittt mi
- 8018408: 6833 ldrmi r3, [r6, #0]
- 801840a: 3302 addmi r3, #2
- 801840c: 6033 strmi r3, [r6, #0]
- 801840e: 6825 ldr r5, [r4, #0]
- 8018410: f015 0506 ands.w r5, r5, #6
- 8018414: d106 bne.n 8018424 <_printf_common+0x48>
- 8018416: f104 0a19 add.w sl, r4, #25
- 801841a: 68e3 ldr r3, [r4, #12]
- 801841c: 6832 ldr r2, [r6, #0]
- 801841e: 1a9b subs r3, r3, r2
- 8018420: 42ab cmp r3, r5
- 8018422: dc26 bgt.n 8018472 <_printf_common+0x96>
- 8018424: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
- 8018428: 6822 ldr r2, [r4, #0]
- 801842a: 3b00 subs r3, #0
- 801842c: bf18 it ne
- 801842e: 2301 movne r3, #1
- 8018430: 0692 lsls r2, r2, #26
- 8018432: d42b bmi.n 801848c <_printf_common+0xb0>
- 8018434: f104 0243 add.w r2, r4, #67 @ 0x43
- 8018438: 4641 mov r1, r8
- 801843a: 4638 mov r0, r7
- 801843c: 47c8 blx r9
- 801843e: 3001 adds r0, #1
- 8018440: d01e beq.n 8018480 <_printf_common+0xa4>
- 8018442: 6823 ldr r3, [r4, #0]
- 8018444: 6922 ldr r2, [r4, #16]
- 8018446: f003 0306 and.w r3, r3, #6
- 801844a: 2b04 cmp r3, #4
- 801844c: bf02 ittt eq
- 801844e: 68e5 ldreq r5, [r4, #12]
- 8018450: 6833 ldreq r3, [r6, #0]
- 8018452: 1aed subeq r5, r5, r3
- 8018454: 68a3 ldr r3, [r4, #8]
- 8018456: bf0c ite eq
- 8018458: ea25 75e5 biceq.w r5, r5, r5, asr #31
- 801845c: 2500 movne r5, #0
- 801845e: 4293 cmp r3, r2
- 8018460: bfc4 itt gt
- 8018462: 1a9b subgt r3, r3, r2
- 8018464: 18ed addgt r5, r5, r3
- 8018466: 2600 movs r6, #0
- 8018468: 341a adds r4, #26
- 801846a: 42b5 cmp r5, r6
- 801846c: d11a bne.n 80184a4 <_printf_common+0xc8>
- 801846e: 2000 movs r0, #0
- 8018470: e008 b.n 8018484 <_printf_common+0xa8>
- 8018472: 2301 movs r3, #1
- 8018474: 4652 mov r2, sl
- 8018476: 4641 mov r1, r8
- 8018478: 4638 mov r0, r7
- 801847a: 47c8 blx r9
- 801847c: 3001 adds r0, #1
- 801847e: d103 bne.n 8018488 <_printf_common+0xac>
- 8018480: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
- 8018484: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 8018488: 3501 adds r5, #1
- 801848a: e7c6 b.n 801841a <_printf_common+0x3e>
- 801848c: 18e1 adds r1, r4, r3
- 801848e: 1c5a adds r2, r3, #1
- 8018490: 2030 movs r0, #48 @ 0x30
- 8018492: f881 0043 strb.w r0, [r1, #67] @ 0x43
- 8018496: 4422 add r2, r4
- 8018498: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
- 801849c: f882 1043 strb.w r1, [r2, #67] @ 0x43
- 80184a0: 3302 adds r3, #2
- 80184a2: e7c7 b.n 8018434 <_printf_common+0x58>
- 80184a4: 2301 movs r3, #1
- 80184a6: 4622 mov r2, r4
- 80184a8: 4641 mov r1, r8
- 80184aa: 4638 mov r0, r7
- 80184ac: 47c8 blx r9
- 80184ae: 3001 adds r0, #1
- 80184b0: d0e6 beq.n 8018480 <_printf_common+0xa4>
- 80184b2: 3601 adds r6, #1
- 80184b4: e7d9 b.n 801846a <_printf_common+0x8e>
- ...
- 080184b8 <_printf_i>:
- 80184b8: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
- 80184bc: 7e0f ldrb r7, [r1, #24]
- 80184be: 9e0c ldr r6, [sp, #48] @ 0x30
- 80184c0: 2f78 cmp r7, #120 @ 0x78
- 80184c2: 4691 mov r9, r2
- 80184c4: 4680 mov r8, r0
- 80184c6: 460c mov r4, r1
- 80184c8: 469a mov sl, r3
- 80184ca: f101 0243 add.w r2, r1, #67 @ 0x43
- 80184ce: d807 bhi.n 80184e0 <_printf_i+0x28>
- 80184d0: 2f62 cmp r7, #98 @ 0x62
- 80184d2: d80a bhi.n 80184ea <_printf_i+0x32>
- 80184d4: 2f00 cmp r7, #0
- 80184d6: f000 80d2 beq.w 801867e <_printf_i+0x1c6>
- 80184da: 2f58 cmp r7, #88 @ 0x58
- 80184dc: f000 80b9 beq.w 8018652 <_printf_i+0x19a>
- 80184e0: f104 0642 add.w r6, r4, #66 @ 0x42
- 80184e4: f884 7042 strb.w r7, [r4, #66] @ 0x42
- 80184e8: e03a b.n 8018560 <_printf_i+0xa8>
- 80184ea: f1a7 0363 sub.w r3, r7, #99 @ 0x63
- 80184ee: 2b15 cmp r3, #21
- 80184f0: d8f6 bhi.n 80184e0 <_printf_i+0x28>
- 80184f2: a101 add r1, pc, #4 @ (adr r1, 80184f8 <_printf_i+0x40>)
- 80184f4: f851 f023 ldr.w pc, [r1, r3, lsl #2]
- 80184f8: 08018551 .word 0x08018551
- 80184fc: 08018565 .word 0x08018565
- 8018500: 080184e1 .word 0x080184e1
- 8018504: 080184e1 .word 0x080184e1
- 8018508: 080184e1 .word 0x080184e1
- 801850c: 080184e1 .word 0x080184e1
- 8018510: 08018565 .word 0x08018565
- 8018514: 080184e1 .word 0x080184e1
- 8018518: 080184e1 .word 0x080184e1
- 801851c: 080184e1 .word 0x080184e1
- 8018520: 080184e1 .word 0x080184e1
- 8018524: 08018665 .word 0x08018665
- 8018528: 0801858f .word 0x0801858f
- 801852c: 0801861f .word 0x0801861f
- 8018530: 080184e1 .word 0x080184e1
- 8018534: 080184e1 .word 0x080184e1
- 8018538: 08018687 .word 0x08018687
- 801853c: 080184e1 .word 0x080184e1
- 8018540: 0801858f .word 0x0801858f
- 8018544: 080184e1 .word 0x080184e1
- 8018548: 080184e1 .word 0x080184e1
- 801854c: 08018627 .word 0x08018627
- 8018550: 6833 ldr r3, [r6, #0]
- 8018552: 1d1a adds r2, r3, #4
- 8018554: 681b ldr r3, [r3, #0]
- 8018556: 6032 str r2, [r6, #0]
- 8018558: f104 0642 add.w r6, r4, #66 @ 0x42
- 801855c: f884 3042 strb.w r3, [r4, #66] @ 0x42
- 8018560: 2301 movs r3, #1
- 8018562: e09d b.n 80186a0 <_printf_i+0x1e8>
- 8018564: 6833 ldr r3, [r6, #0]
- 8018566: 6820 ldr r0, [r4, #0]
- 8018568: 1d19 adds r1, r3, #4
- 801856a: 6031 str r1, [r6, #0]
- 801856c: 0606 lsls r6, r0, #24
- 801856e: d501 bpl.n 8018574 <_printf_i+0xbc>
- 8018570: 681d ldr r5, [r3, #0]
- 8018572: e003 b.n 801857c <_printf_i+0xc4>
- 8018574: 0645 lsls r5, r0, #25
- 8018576: d5fb bpl.n 8018570 <_printf_i+0xb8>
- 8018578: f9b3 5000 ldrsh.w r5, [r3]
- 801857c: 2d00 cmp r5, #0
- 801857e: da03 bge.n 8018588 <_printf_i+0xd0>
- 8018580: 232d movs r3, #45 @ 0x2d
- 8018582: 426d negs r5, r5
- 8018584: f884 3043 strb.w r3, [r4, #67] @ 0x43
- 8018588: 4859 ldr r0, [pc, #356] @ (80186f0 <_printf_i+0x238>)
- 801858a: 230a movs r3, #10
- 801858c: e011 b.n 80185b2 <_printf_i+0xfa>
- 801858e: 6821 ldr r1, [r4, #0]
- 8018590: 6833 ldr r3, [r6, #0]
- 8018592: 0608 lsls r0, r1, #24
- 8018594: f853 5b04 ldr.w r5, [r3], #4
- 8018598: d402 bmi.n 80185a0 <_printf_i+0xe8>
- 801859a: 0649 lsls r1, r1, #25
- 801859c: bf48 it mi
- 801859e: b2ad uxthmi r5, r5
- 80185a0: 2f6f cmp r7, #111 @ 0x6f
- 80185a2: 4853 ldr r0, [pc, #332] @ (80186f0 <_printf_i+0x238>)
- 80185a4: 6033 str r3, [r6, #0]
- 80185a6: bf14 ite ne
- 80185a8: 230a movne r3, #10
- 80185aa: 2308 moveq r3, #8
- 80185ac: 2100 movs r1, #0
- 80185ae: f884 1043 strb.w r1, [r4, #67] @ 0x43
- 80185b2: 6866 ldr r6, [r4, #4]
- 80185b4: 60a6 str r6, [r4, #8]
- 80185b6: 2e00 cmp r6, #0
- 80185b8: bfa2 ittt ge
- 80185ba: 6821 ldrge r1, [r4, #0]
- 80185bc: f021 0104 bicge.w r1, r1, #4
- 80185c0: 6021 strge r1, [r4, #0]
- 80185c2: b90d cbnz r5, 80185c8 <_printf_i+0x110>
- 80185c4: 2e00 cmp r6, #0
- 80185c6: d04b beq.n 8018660 <_printf_i+0x1a8>
- 80185c8: 4616 mov r6, r2
- 80185ca: fbb5 f1f3 udiv r1, r5, r3
- 80185ce: fb03 5711 mls r7, r3, r1, r5
- 80185d2: 5dc7 ldrb r7, [r0, r7]
- 80185d4: f806 7d01 strb.w r7, [r6, #-1]!
- 80185d8: 462f mov r7, r5
- 80185da: 42bb cmp r3, r7
- 80185dc: 460d mov r5, r1
- 80185de: d9f4 bls.n 80185ca <_printf_i+0x112>
- 80185e0: 2b08 cmp r3, #8
- 80185e2: d10b bne.n 80185fc <_printf_i+0x144>
- 80185e4: 6823 ldr r3, [r4, #0]
- 80185e6: 07df lsls r7, r3, #31
- 80185e8: d508 bpl.n 80185fc <_printf_i+0x144>
- 80185ea: 6923 ldr r3, [r4, #16]
- 80185ec: 6861 ldr r1, [r4, #4]
- 80185ee: 4299 cmp r1, r3
- 80185f0: bfde ittt le
- 80185f2: 2330 movle r3, #48 @ 0x30
- 80185f4: f806 3c01 strble.w r3, [r6, #-1]
- 80185f8: f106 36ff addle.w r6, r6, #4294967295 @ 0xffffffff
- 80185fc: 1b92 subs r2, r2, r6
- 80185fe: 6122 str r2, [r4, #16]
- 8018600: f8cd a000 str.w sl, [sp]
- 8018604: 464b mov r3, r9
- 8018606: aa03 add r2, sp, #12
- 8018608: 4621 mov r1, r4
- 801860a: 4640 mov r0, r8
- 801860c: f7ff fee6 bl 80183dc <_printf_common>
- 8018610: 3001 adds r0, #1
- 8018612: d14a bne.n 80186aa <_printf_i+0x1f2>
- 8018614: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
- 8018618: b004 add sp, #16
- 801861a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 801861e: 6823 ldr r3, [r4, #0]
- 8018620: f043 0320 orr.w r3, r3, #32
- 8018624: 6023 str r3, [r4, #0]
- 8018626: 4833 ldr r0, [pc, #204] @ (80186f4 <_printf_i+0x23c>)
- 8018628: 2778 movs r7, #120 @ 0x78
- 801862a: f884 7045 strb.w r7, [r4, #69] @ 0x45
- 801862e: 6823 ldr r3, [r4, #0]
- 8018630: 6831 ldr r1, [r6, #0]
- 8018632: 061f lsls r7, r3, #24
- 8018634: f851 5b04 ldr.w r5, [r1], #4
- 8018638: d402 bmi.n 8018640 <_printf_i+0x188>
- 801863a: 065f lsls r7, r3, #25
- 801863c: bf48 it mi
- 801863e: b2ad uxthmi r5, r5
- 8018640: 6031 str r1, [r6, #0]
- 8018642: 07d9 lsls r1, r3, #31
- 8018644: bf44 itt mi
- 8018646: f043 0320 orrmi.w r3, r3, #32
- 801864a: 6023 strmi r3, [r4, #0]
- 801864c: b11d cbz r5, 8018656 <_printf_i+0x19e>
- 801864e: 2310 movs r3, #16
- 8018650: e7ac b.n 80185ac <_printf_i+0xf4>
- 8018652: 4827 ldr r0, [pc, #156] @ (80186f0 <_printf_i+0x238>)
- 8018654: e7e9 b.n 801862a <_printf_i+0x172>
- 8018656: 6823 ldr r3, [r4, #0]
- 8018658: f023 0320 bic.w r3, r3, #32
- 801865c: 6023 str r3, [r4, #0]
- 801865e: e7f6 b.n 801864e <_printf_i+0x196>
- 8018660: 4616 mov r6, r2
- 8018662: e7bd b.n 80185e0 <_printf_i+0x128>
- 8018664: 6833 ldr r3, [r6, #0]
- 8018666: 6825 ldr r5, [r4, #0]
- 8018668: 6961 ldr r1, [r4, #20]
- 801866a: 1d18 adds r0, r3, #4
- 801866c: 6030 str r0, [r6, #0]
- 801866e: 062e lsls r6, r5, #24
- 8018670: 681b ldr r3, [r3, #0]
- 8018672: d501 bpl.n 8018678 <_printf_i+0x1c0>
- 8018674: 6019 str r1, [r3, #0]
- 8018676: e002 b.n 801867e <_printf_i+0x1c6>
- 8018678: 0668 lsls r0, r5, #25
- 801867a: d5fb bpl.n 8018674 <_printf_i+0x1bc>
- 801867c: 8019 strh r1, [r3, #0]
- 801867e: 2300 movs r3, #0
- 8018680: 6123 str r3, [r4, #16]
- 8018682: 4616 mov r6, r2
- 8018684: e7bc b.n 8018600 <_printf_i+0x148>
- 8018686: 6833 ldr r3, [r6, #0]
- 8018688: 1d1a adds r2, r3, #4
- 801868a: 6032 str r2, [r6, #0]
- 801868c: 681e ldr r6, [r3, #0]
- 801868e: 6862 ldr r2, [r4, #4]
- 8018690: 2100 movs r1, #0
- 8018692: 4630 mov r0, r6
- 8018694: f7e7 fe24 bl 80002e0 <memchr>
- 8018698: b108 cbz r0, 801869e <_printf_i+0x1e6>
- 801869a: 1b80 subs r0, r0, r6
- 801869c: 6060 str r0, [r4, #4]
- 801869e: 6863 ldr r3, [r4, #4]
- 80186a0: 6123 str r3, [r4, #16]
- 80186a2: 2300 movs r3, #0
- 80186a4: f884 3043 strb.w r3, [r4, #67] @ 0x43
- 80186a8: e7aa b.n 8018600 <_printf_i+0x148>
- 80186aa: 6923 ldr r3, [r4, #16]
- 80186ac: 4632 mov r2, r6
- 80186ae: 4649 mov r1, r9
- 80186b0: 4640 mov r0, r8
- 80186b2: 47d0 blx sl
- 80186b4: 3001 adds r0, #1
- 80186b6: d0ad beq.n 8018614 <_printf_i+0x15c>
- 80186b8: 6823 ldr r3, [r4, #0]
- 80186ba: 079b lsls r3, r3, #30
- 80186bc: d413 bmi.n 80186e6 <_printf_i+0x22e>
- 80186be: 68e0 ldr r0, [r4, #12]
- 80186c0: 9b03 ldr r3, [sp, #12]
- 80186c2: 4298 cmp r0, r3
- 80186c4: bfb8 it lt
- 80186c6: 4618 movlt r0, r3
- 80186c8: e7a6 b.n 8018618 <_printf_i+0x160>
- 80186ca: 2301 movs r3, #1
- 80186cc: 4632 mov r2, r6
- 80186ce: 4649 mov r1, r9
- 80186d0: 4640 mov r0, r8
- 80186d2: 47d0 blx sl
- 80186d4: 3001 adds r0, #1
- 80186d6: d09d beq.n 8018614 <_printf_i+0x15c>
- 80186d8: 3501 adds r5, #1
- 80186da: 68e3 ldr r3, [r4, #12]
- 80186dc: 9903 ldr r1, [sp, #12]
- 80186de: 1a5b subs r3, r3, r1
- 80186e0: 42ab cmp r3, r5
- 80186e2: dcf2 bgt.n 80186ca <_printf_i+0x212>
- 80186e4: e7eb b.n 80186be <_printf_i+0x206>
- 80186e6: 2500 movs r5, #0
- 80186e8: f104 0619 add.w r6, r4, #25
- 80186ec: e7f5 b.n 80186da <_printf_i+0x222>
- 80186ee: bf00 nop
- 80186f0: 08018c69 .word 0x08018c69
- 80186f4: 08018c7a .word 0x08018c7a
- 080186f8 <__sflush_r>:
- 80186f8: f9b1 200c ldrsh.w r2, [r1, #12]
- 80186fc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 8018700: 0716 lsls r6, r2, #28
- 8018702: 4605 mov r5, r0
- 8018704: 460c mov r4, r1
- 8018706: d454 bmi.n 80187b2 <__sflush_r+0xba>
- 8018708: 684b ldr r3, [r1, #4]
- 801870a: 2b00 cmp r3, #0
- 801870c: dc02 bgt.n 8018714 <__sflush_r+0x1c>
- 801870e: 6c0b ldr r3, [r1, #64] @ 0x40
- 8018710: 2b00 cmp r3, #0
- 8018712: dd48 ble.n 80187a6 <__sflush_r+0xae>
- 8018714: 6ae6 ldr r6, [r4, #44] @ 0x2c
- 8018716: 2e00 cmp r6, #0
- 8018718: d045 beq.n 80187a6 <__sflush_r+0xae>
- 801871a: 2300 movs r3, #0
- 801871c: f412 5280 ands.w r2, r2, #4096 @ 0x1000
- 8018720: 682f ldr r7, [r5, #0]
- 8018722: 6a21 ldr r1, [r4, #32]
- 8018724: 602b str r3, [r5, #0]
- 8018726: d030 beq.n 801878a <__sflush_r+0x92>
- 8018728: 6d62 ldr r2, [r4, #84] @ 0x54
- 801872a: 89a3 ldrh r3, [r4, #12]
- 801872c: 0759 lsls r1, r3, #29
- 801872e: d505 bpl.n 801873c <__sflush_r+0x44>
- 8018730: 6863 ldr r3, [r4, #4]
- 8018732: 1ad2 subs r2, r2, r3
- 8018734: 6b63 ldr r3, [r4, #52] @ 0x34
- 8018736: b10b cbz r3, 801873c <__sflush_r+0x44>
- 8018738: 6c23 ldr r3, [r4, #64] @ 0x40
- 801873a: 1ad2 subs r2, r2, r3
- 801873c: 2300 movs r3, #0
- 801873e: 6ae6 ldr r6, [r4, #44] @ 0x2c
- 8018740: 6a21 ldr r1, [r4, #32]
- 8018742: 4628 mov r0, r5
- 8018744: 47b0 blx r6
- 8018746: 1c43 adds r3, r0, #1
- 8018748: 89a3 ldrh r3, [r4, #12]
- 801874a: d106 bne.n 801875a <__sflush_r+0x62>
- 801874c: 6829 ldr r1, [r5, #0]
- 801874e: 291d cmp r1, #29
- 8018750: d82b bhi.n 80187aa <__sflush_r+0xb2>
- 8018752: 4a2a ldr r2, [pc, #168] @ (80187fc <__sflush_r+0x104>)
- 8018754: 410a asrs r2, r1
- 8018756: 07d6 lsls r6, r2, #31
- 8018758: d427 bmi.n 80187aa <__sflush_r+0xb2>
- 801875a: 2200 movs r2, #0
- 801875c: 6062 str r2, [r4, #4]
- 801875e: 04d9 lsls r1, r3, #19
- 8018760: 6922 ldr r2, [r4, #16]
- 8018762: 6022 str r2, [r4, #0]
- 8018764: d504 bpl.n 8018770 <__sflush_r+0x78>
- 8018766: 1c42 adds r2, r0, #1
- 8018768: d101 bne.n 801876e <__sflush_r+0x76>
- 801876a: 682b ldr r3, [r5, #0]
- 801876c: b903 cbnz r3, 8018770 <__sflush_r+0x78>
- 801876e: 6560 str r0, [r4, #84] @ 0x54
- 8018770: 6b61 ldr r1, [r4, #52] @ 0x34
- 8018772: 602f str r7, [r5, #0]
- 8018774: b1b9 cbz r1, 80187a6 <__sflush_r+0xae>
- 8018776: f104 0344 add.w r3, r4, #68 @ 0x44
- 801877a: 4299 cmp r1, r3
- 801877c: d002 beq.n 8018784 <__sflush_r+0x8c>
- 801877e: 4628 mov r0, r5
- 8018780: f7ff fbf2 bl 8017f68 <_free_r>
- 8018784: 2300 movs r3, #0
- 8018786: 6363 str r3, [r4, #52] @ 0x34
- 8018788: e00d b.n 80187a6 <__sflush_r+0xae>
- 801878a: 2301 movs r3, #1
- 801878c: 4628 mov r0, r5
- 801878e: 47b0 blx r6
- 8018790: 4602 mov r2, r0
- 8018792: 1c50 adds r0, r2, #1
- 8018794: d1c9 bne.n 801872a <__sflush_r+0x32>
- 8018796: 682b ldr r3, [r5, #0]
- 8018798: 2b00 cmp r3, #0
- 801879a: d0c6 beq.n 801872a <__sflush_r+0x32>
- 801879c: 2b1d cmp r3, #29
- 801879e: d001 beq.n 80187a4 <__sflush_r+0xac>
- 80187a0: 2b16 cmp r3, #22
- 80187a2: d11e bne.n 80187e2 <__sflush_r+0xea>
- 80187a4: 602f str r7, [r5, #0]
- 80187a6: 2000 movs r0, #0
- 80187a8: e022 b.n 80187f0 <__sflush_r+0xf8>
- 80187aa: f043 0340 orr.w r3, r3, #64 @ 0x40
- 80187ae: b21b sxth r3, r3
- 80187b0: e01b b.n 80187ea <__sflush_r+0xf2>
- 80187b2: 690f ldr r7, [r1, #16]
- 80187b4: 2f00 cmp r7, #0
- 80187b6: d0f6 beq.n 80187a6 <__sflush_r+0xae>
- 80187b8: 0793 lsls r3, r2, #30
- 80187ba: 680e ldr r6, [r1, #0]
- 80187bc: bf08 it eq
- 80187be: 694b ldreq r3, [r1, #20]
- 80187c0: 600f str r7, [r1, #0]
- 80187c2: bf18 it ne
- 80187c4: 2300 movne r3, #0
- 80187c6: eba6 0807 sub.w r8, r6, r7
- 80187ca: 608b str r3, [r1, #8]
- 80187cc: f1b8 0f00 cmp.w r8, #0
- 80187d0: dde9 ble.n 80187a6 <__sflush_r+0xae>
- 80187d2: 6a21 ldr r1, [r4, #32]
- 80187d4: 6aa6 ldr r6, [r4, #40] @ 0x28
- 80187d6: 4643 mov r3, r8
- 80187d8: 463a mov r2, r7
- 80187da: 4628 mov r0, r5
- 80187dc: 47b0 blx r6
- 80187de: 2800 cmp r0, #0
- 80187e0: dc08 bgt.n 80187f4 <__sflush_r+0xfc>
- 80187e2: f9b4 300c ldrsh.w r3, [r4, #12]
- 80187e6: f043 0340 orr.w r3, r3, #64 @ 0x40
- 80187ea: 81a3 strh r3, [r4, #12]
- 80187ec: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
- 80187f0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 80187f4: 4407 add r7, r0
- 80187f6: eba8 0800 sub.w r8, r8, r0
- 80187fa: e7e7 b.n 80187cc <__sflush_r+0xd4>
- 80187fc: dfbffffe .word 0xdfbffffe
- 08018800 <_fflush_r>:
- 8018800: b538 push {r3, r4, r5, lr}
- 8018802: 690b ldr r3, [r1, #16]
- 8018804: 4605 mov r5, r0
- 8018806: 460c mov r4, r1
- 8018808: b913 cbnz r3, 8018810 <_fflush_r+0x10>
- 801880a: 2500 movs r5, #0
- 801880c: 4628 mov r0, r5
- 801880e: bd38 pop {r3, r4, r5, pc}
- 8018810: b118 cbz r0, 801881a <_fflush_r+0x1a>
- 8018812: 6a03 ldr r3, [r0, #32]
- 8018814: b90b cbnz r3, 801881a <_fflush_r+0x1a>
- 8018816: f7ff fa3b bl 8017c90 <__sinit>
- 801881a: f9b4 300c ldrsh.w r3, [r4, #12]
- 801881e: 2b00 cmp r3, #0
- 8018820: d0f3 beq.n 801880a <_fflush_r+0xa>
- 8018822: 6e62 ldr r2, [r4, #100] @ 0x64
- 8018824: 07d0 lsls r0, r2, #31
- 8018826: d404 bmi.n 8018832 <_fflush_r+0x32>
- 8018828: 0599 lsls r1, r3, #22
- 801882a: d402 bmi.n 8018832 <_fflush_r+0x32>
- 801882c: 6da0 ldr r0, [r4, #88] @ 0x58
- 801882e: f7ff fb8a bl 8017f46 <__retarget_lock_acquire_recursive>
- 8018832: 4628 mov r0, r5
- 8018834: 4621 mov r1, r4
- 8018836: f7ff ff5f bl 80186f8 <__sflush_r>
- 801883a: 6e63 ldr r3, [r4, #100] @ 0x64
- 801883c: 07da lsls r2, r3, #31
- 801883e: 4605 mov r5, r0
- 8018840: d4e4 bmi.n 801880c <_fflush_r+0xc>
- 8018842: 89a3 ldrh r3, [r4, #12]
- 8018844: 059b lsls r3, r3, #22
- 8018846: d4e1 bmi.n 801880c <_fflush_r+0xc>
- 8018848: 6da0 ldr r0, [r4, #88] @ 0x58
- 801884a: f7ff fb7d bl 8017f48 <__retarget_lock_release_recursive>
- 801884e: e7dd b.n 801880c <_fflush_r+0xc>
- 08018850 <__swbuf_r>:
- 8018850: b5f8 push {r3, r4, r5, r6, r7, lr}
- 8018852: 460e mov r6, r1
- 8018854: 4614 mov r4, r2
- 8018856: 4605 mov r5, r0
- 8018858: b118 cbz r0, 8018862 <__swbuf_r+0x12>
- 801885a: 6a03 ldr r3, [r0, #32]
- 801885c: b90b cbnz r3, 8018862 <__swbuf_r+0x12>
- 801885e: f7ff fa17 bl 8017c90 <__sinit>
- 8018862: 69a3 ldr r3, [r4, #24]
- 8018864: 60a3 str r3, [r4, #8]
- 8018866: 89a3 ldrh r3, [r4, #12]
- 8018868: 071a lsls r2, r3, #28
- 801886a: d501 bpl.n 8018870 <__swbuf_r+0x20>
- 801886c: 6923 ldr r3, [r4, #16]
- 801886e: b943 cbnz r3, 8018882 <__swbuf_r+0x32>
- 8018870: 4621 mov r1, r4
- 8018872: 4628 mov r0, r5
- 8018874: f000 f82a bl 80188cc <__swsetup_r>
- 8018878: b118 cbz r0, 8018882 <__swbuf_r+0x32>
- 801887a: f04f 37ff mov.w r7, #4294967295 @ 0xffffffff
- 801887e: 4638 mov r0, r7
- 8018880: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 8018882: 6823 ldr r3, [r4, #0]
- 8018884: 6922 ldr r2, [r4, #16]
- 8018886: 1a98 subs r0, r3, r2
- 8018888: 6963 ldr r3, [r4, #20]
- 801888a: b2f6 uxtb r6, r6
- 801888c: 4283 cmp r3, r0
- 801888e: 4637 mov r7, r6
- 8018890: dc05 bgt.n 801889e <__swbuf_r+0x4e>
- 8018892: 4621 mov r1, r4
- 8018894: 4628 mov r0, r5
- 8018896: f7ff ffb3 bl 8018800 <_fflush_r>
- 801889a: 2800 cmp r0, #0
- 801889c: d1ed bne.n 801887a <__swbuf_r+0x2a>
- 801889e: 68a3 ldr r3, [r4, #8]
- 80188a0: 3b01 subs r3, #1
- 80188a2: 60a3 str r3, [r4, #8]
- 80188a4: 6823 ldr r3, [r4, #0]
- 80188a6: 1c5a adds r2, r3, #1
- 80188a8: 6022 str r2, [r4, #0]
- 80188aa: 701e strb r6, [r3, #0]
- 80188ac: 6962 ldr r2, [r4, #20]
- 80188ae: 1c43 adds r3, r0, #1
- 80188b0: 429a cmp r2, r3
- 80188b2: d004 beq.n 80188be <__swbuf_r+0x6e>
- 80188b4: 89a3 ldrh r3, [r4, #12]
- 80188b6: 07db lsls r3, r3, #31
- 80188b8: d5e1 bpl.n 801887e <__swbuf_r+0x2e>
- 80188ba: 2e0a cmp r6, #10
- 80188bc: d1df bne.n 801887e <__swbuf_r+0x2e>
- 80188be: 4621 mov r1, r4
- 80188c0: 4628 mov r0, r5
- 80188c2: f7ff ff9d bl 8018800 <_fflush_r>
- 80188c6: 2800 cmp r0, #0
- 80188c8: d0d9 beq.n 801887e <__swbuf_r+0x2e>
- 80188ca: e7d6 b.n 801887a <__swbuf_r+0x2a>
- 080188cc <__swsetup_r>:
- 80188cc: b538 push {r3, r4, r5, lr}
- 80188ce: 4b29 ldr r3, [pc, #164] @ (8018974 <__swsetup_r+0xa8>)
- 80188d0: 4605 mov r5, r0
- 80188d2: 6818 ldr r0, [r3, #0]
- 80188d4: 460c mov r4, r1
- 80188d6: b118 cbz r0, 80188e0 <__swsetup_r+0x14>
- 80188d8: 6a03 ldr r3, [r0, #32]
- 80188da: b90b cbnz r3, 80188e0 <__swsetup_r+0x14>
- 80188dc: f7ff f9d8 bl 8017c90 <__sinit>
- 80188e0: f9b4 300c ldrsh.w r3, [r4, #12]
- 80188e4: 0719 lsls r1, r3, #28
- 80188e6: d422 bmi.n 801892e <__swsetup_r+0x62>
- 80188e8: 06da lsls r2, r3, #27
- 80188ea: d407 bmi.n 80188fc <__swsetup_r+0x30>
- 80188ec: 2209 movs r2, #9
- 80188ee: 602a str r2, [r5, #0]
- 80188f0: f043 0340 orr.w r3, r3, #64 @ 0x40
- 80188f4: 81a3 strh r3, [r4, #12]
- 80188f6: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
- 80188fa: e033 b.n 8018964 <__swsetup_r+0x98>
- 80188fc: 0758 lsls r0, r3, #29
- 80188fe: d512 bpl.n 8018926 <__swsetup_r+0x5a>
- 8018900: 6b61 ldr r1, [r4, #52] @ 0x34
- 8018902: b141 cbz r1, 8018916 <__swsetup_r+0x4a>
- 8018904: f104 0344 add.w r3, r4, #68 @ 0x44
- 8018908: 4299 cmp r1, r3
- 801890a: d002 beq.n 8018912 <__swsetup_r+0x46>
- 801890c: 4628 mov r0, r5
- 801890e: f7ff fb2b bl 8017f68 <_free_r>
- 8018912: 2300 movs r3, #0
- 8018914: 6363 str r3, [r4, #52] @ 0x34
- 8018916: 89a3 ldrh r3, [r4, #12]
- 8018918: f023 0324 bic.w r3, r3, #36 @ 0x24
- 801891c: 81a3 strh r3, [r4, #12]
- 801891e: 2300 movs r3, #0
- 8018920: 6063 str r3, [r4, #4]
- 8018922: 6923 ldr r3, [r4, #16]
- 8018924: 6023 str r3, [r4, #0]
- 8018926: 89a3 ldrh r3, [r4, #12]
- 8018928: f043 0308 orr.w r3, r3, #8
- 801892c: 81a3 strh r3, [r4, #12]
- 801892e: 6923 ldr r3, [r4, #16]
- 8018930: b94b cbnz r3, 8018946 <__swsetup_r+0x7a>
- 8018932: 89a3 ldrh r3, [r4, #12]
- 8018934: f403 7320 and.w r3, r3, #640 @ 0x280
- 8018938: f5b3 7f00 cmp.w r3, #512 @ 0x200
- 801893c: d003 beq.n 8018946 <__swsetup_r+0x7a>
- 801893e: 4621 mov r1, r4
- 8018940: 4628 mov r0, r5
- 8018942: f000 f84f bl 80189e4 <__smakebuf_r>
- 8018946: f9b4 300c ldrsh.w r3, [r4, #12]
- 801894a: f013 0201 ands.w r2, r3, #1
- 801894e: d00a beq.n 8018966 <__swsetup_r+0x9a>
- 8018950: 2200 movs r2, #0
- 8018952: 60a2 str r2, [r4, #8]
- 8018954: 6962 ldr r2, [r4, #20]
- 8018956: 4252 negs r2, r2
- 8018958: 61a2 str r2, [r4, #24]
- 801895a: 6922 ldr r2, [r4, #16]
- 801895c: b942 cbnz r2, 8018970 <__swsetup_r+0xa4>
- 801895e: f013 0080 ands.w r0, r3, #128 @ 0x80
- 8018962: d1c5 bne.n 80188f0 <__swsetup_r+0x24>
- 8018964: bd38 pop {r3, r4, r5, pc}
- 8018966: 0799 lsls r1, r3, #30
- 8018968: bf58 it pl
- 801896a: 6962 ldrpl r2, [r4, #20]
- 801896c: 60a2 str r2, [r4, #8]
- 801896e: e7f4 b.n 801895a <__swsetup_r+0x8e>
- 8018970: 2000 movs r0, #0
- 8018972: e7f7 b.n 8018964 <__swsetup_r+0x98>
- 8018974: 24000054 .word 0x24000054
- 08018978 <_sbrk_r>:
- 8018978: b538 push {r3, r4, r5, lr}
- 801897a: 4d06 ldr r5, [pc, #24] @ (8018994 <_sbrk_r+0x1c>)
- 801897c: 2300 movs r3, #0
- 801897e: 4604 mov r4, r0
- 8018980: 4608 mov r0, r1
- 8018982: 602b str r3, [r5, #0]
- 8018984: f7eb fc22 bl 80041cc <_sbrk>
- 8018988: 1c43 adds r3, r0, #1
- 801898a: d102 bne.n 8018992 <_sbrk_r+0x1a>
- 801898c: 682b ldr r3, [r5, #0]
- 801898e: b103 cbz r3, 8018992 <_sbrk_r+0x1a>
- 8018990: 6023 str r3, [r4, #0]
- 8018992: bd38 pop {r3, r4, r5, pc}
- 8018994: 24012e24 .word 0x24012e24
- 08018998 <__swhatbuf_r>:
- 8018998: b570 push {r4, r5, r6, lr}
- 801899a: 460c mov r4, r1
- 801899c: f9b1 100e ldrsh.w r1, [r1, #14]
- 80189a0: 2900 cmp r1, #0
- 80189a2: b096 sub sp, #88 @ 0x58
- 80189a4: 4615 mov r5, r2
- 80189a6: 461e mov r6, r3
- 80189a8: da0d bge.n 80189c6 <__swhatbuf_r+0x2e>
- 80189aa: 89a3 ldrh r3, [r4, #12]
- 80189ac: f013 0f80 tst.w r3, #128 @ 0x80
- 80189b0: f04f 0100 mov.w r1, #0
- 80189b4: bf14 ite ne
- 80189b6: 2340 movne r3, #64 @ 0x40
- 80189b8: f44f 6380 moveq.w r3, #1024 @ 0x400
- 80189bc: 2000 movs r0, #0
- 80189be: 6031 str r1, [r6, #0]
- 80189c0: 602b str r3, [r5, #0]
- 80189c2: b016 add sp, #88 @ 0x58
- 80189c4: bd70 pop {r4, r5, r6, pc}
- 80189c6: 466a mov r2, sp
- 80189c8: f000 f848 bl 8018a5c <_fstat_r>
- 80189cc: 2800 cmp r0, #0
- 80189ce: dbec blt.n 80189aa <__swhatbuf_r+0x12>
- 80189d0: 9901 ldr r1, [sp, #4]
- 80189d2: f401 4170 and.w r1, r1, #61440 @ 0xf000
- 80189d6: f5a1 5300 sub.w r3, r1, #8192 @ 0x2000
- 80189da: 4259 negs r1, r3
- 80189dc: 4159 adcs r1, r3
- 80189de: f44f 6380 mov.w r3, #1024 @ 0x400
- 80189e2: e7eb b.n 80189bc <__swhatbuf_r+0x24>
- 080189e4 <__smakebuf_r>:
- 80189e4: 898b ldrh r3, [r1, #12]
- 80189e6: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr}
- 80189e8: 079d lsls r5, r3, #30
- 80189ea: 4606 mov r6, r0
- 80189ec: 460c mov r4, r1
- 80189ee: d507 bpl.n 8018a00 <__smakebuf_r+0x1c>
- 80189f0: f104 0347 add.w r3, r4, #71 @ 0x47
- 80189f4: 6023 str r3, [r4, #0]
- 80189f6: 6123 str r3, [r4, #16]
- 80189f8: 2301 movs r3, #1
- 80189fa: 6163 str r3, [r4, #20]
- 80189fc: b003 add sp, #12
- 80189fe: bdf0 pop {r4, r5, r6, r7, pc}
- 8018a00: ab01 add r3, sp, #4
- 8018a02: 466a mov r2, sp
- 8018a04: f7ff ffc8 bl 8018998 <__swhatbuf_r>
- 8018a08: 9f00 ldr r7, [sp, #0]
- 8018a0a: 4605 mov r5, r0
- 8018a0c: 4639 mov r1, r7
- 8018a0e: 4630 mov r0, r6
- 8018a10: f7ff fb16 bl 8018040 <_malloc_r>
- 8018a14: b948 cbnz r0, 8018a2a <__smakebuf_r+0x46>
- 8018a16: f9b4 300c ldrsh.w r3, [r4, #12]
- 8018a1a: 059a lsls r2, r3, #22
- 8018a1c: d4ee bmi.n 80189fc <__smakebuf_r+0x18>
- 8018a1e: f023 0303 bic.w r3, r3, #3
- 8018a22: f043 0302 orr.w r3, r3, #2
- 8018a26: 81a3 strh r3, [r4, #12]
- 8018a28: e7e2 b.n 80189f0 <__smakebuf_r+0xc>
- 8018a2a: 89a3 ldrh r3, [r4, #12]
- 8018a2c: 6020 str r0, [r4, #0]
- 8018a2e: f043 0380 orr.w r3, r3, #128 @ 0x80
- 8018a32: 81a3 strh r3, [r4, #12]
- 8018a34: 9b01 ldr r3, [sp, #4]
- 8018a36: e9c4 0704 strd r0, r7, [r4, #16]
- 8018a3a: b15b cbz r3, 8018a54 <__smakebuf_r+0x70>
- 8018a3c: f9b4 100e ldrsh.w r1, [r4, #14]
- 8018a40: 4630 mov r0, r6
- 8018a42: f000 f81d bl 8018a80 <_isatty_r>
- 8018a46: b128 cbz r0, 8018a54 <__smakebuf_r+0x70>
- 8018a48: 89a3 ldrh r3, [r4, #12]
- 8018a4a: f023 0303 bic.w r3, r3, #3
- 8018a4e: f043 0301 orr.w r3, r3, #1
- 8018a52: 81a3 strh r3, [r4, #12]
- 8018a54: 89a3 ldrh r3, [r4, #12]
- 8018a56: 431d orrs r5, r3
- 8018a58: 81a5 strh r5, [r4, #12]
- 8018a5a: e7cf b.n 80189fc <__smakebuf_r+0x18>
- 08018a5c <_fstat_r>:
- 8018a5c: b538 push {r3, r4, r5, lr}
- 8018a5e: 4d07 ldr r5, [pc, #28] @ (8018a7c <_fstat_r+0x20>)
- 8018a60: 2300 movs r3, #0
- 8018a62: 4604 mov r4, r0
- 8018a64: 4608 mov r0, r1
- 8018a66: 4611 mov r1, r2
- 8018a68: 602b str r3, [r5, #0]
- 8018a6a: f7eb fb86 bl 800417a <_fstat>
- 8018a6e: 1c43 adds r3, r0, #1
- 8018a70: d102 bne.n 8018a78 <_fstat_r+0x1c>
- 8018a72: 682b ldr r3, [r5, #0]
- 8018a74: b103 cbz r3, 8018a78 <_fstat_r+0x1c>
- 8018a76: 6023 str r3, [r4, #0]
- 8018a78: bd38 pop {r3, r4, r5, pc}
- 8018a7a: bf00 nop
- 8018a7c: 24012e24 .word 0x24012e24
- 08018a80 <_isatty_r>:
- 8018a80: b538 push {r3, r4, r5, lr}
- 8018a82: 4d06 ldr r5, [pc, #24] @ (8018a9c <_isatty_r+0x1c>)
- 8018a84: 2300 movs r3, #0
- 8018a86: 4604 mov r4, r0
- 8018a88: 4608 mov r0, r1
- 8018a8a: 602b str r3, [r5, #0]
- 8018a8c: f7eb fb85 bl 800419a <_isatty>
- 8018a90: 1c43 adds r3, r0, #1
- 8018a92: d102 bne.n 8018a9a <_isatty_r+0x1a>
- 8018a94: 682b ldr r3, [r5, #0]
- 8018a96: b103 cbz r3, 8018a9a <_isatty_r+0x1a>
- 8018a98: 6023 str r3, [r4, #0]
- 8018a9a: bd38 pop {r3, r4, r5, pc}
- 8018a9c: 24012e24 .word 0x24012e24
- 08018aa0 <_init>:
- 8018aa0: b5f8 push {r3, r4, r5, r6, r7, lr}
- 8018aa2: bf00 nop
- 8018aa4: bcf8 pop {r3, r4, r5, r6, r7}
- 8018aa6: bc08 pop {r3}
- 8018aa8: 469e mov lr, r3
- 8018aaa: 4770 bx lr
- 08018aac <_fini>:
- 8018aac: b5f8 push {r3, r4, r5, r6, r7, lr}
- 8018aae: bf00 nop
- 8018ab0: bcf8 pop {r3, r4, r5, r6, r7}
- 8018ab2: bc08 pop {r3}
- 8018ab4: 469e mov lr, r3
- 8018ab6: 4770 bx lr
|
